37504 lines
2.0 MiB
37504 lines
2.0 MiB
; --------------------------------------------------------------------------------
|
|
; @Title: STM32L4PLUS On-Chip Peripherals
|
|
; @Props: Released
|
|
; @Author: KOL, KRZ, NEJ
|
|
; @Changelog: 2019-03-13 KOL
|
|
; 2022-02-22 KRZ
|
|
; 2024-01-18 NEJ
|
|
; @Manufacturer: STM - ST Microelectronics N.V.
|
|
; @Doc: Generated (TRACE32, build: 166062.), based on:
|
|
; STM32L4P5.svd (Ver. 1.6), STM32L4Q5.svd (Ver. 1.6),
|
|
; STM32L4R5.svd (Ver. 2.2), STM32L4R7.svd (Ver. 2.0),
|
|
; STM32L4R9.svd (Ver. 2.0), STM32L4S5.svd (Ver. 2.0),
|
|
; STM32L4S7.svd (Ver. 2.0), STM32L4S9.svd (Ver. 2.0)
|
|
; @Core: Cortex-M4F
|
|
; @Chip: STM32L4P5AE, STM32L4P5AG, STM32L4P5CE, STM32L4P5CG,
|
|
; STM32L4P5QE, STM32L4P5QG, STM32L4P5RE, STM32L4P5RG,
|
|
; STM32L4P5VE, STM32L4P5VG, STM32L4P5ZE, STM32L4P5ZG,
|
|
; STM32L4Q5AG, STM32L4Q5CG, STM32L4Q5QG, STM32L4Q5RG,
|
|
; STM32L4Q5VG, STM32L4Q5ZG, STM32L4R5AG, STM32L4R5AI,
|
|
; STM32L4R5QG, STM32L4R5QI, STM32L4R5VG, STM32L4R5VI,
|
|
; STM32L4R5ZG, STM32L4R5ZI, STM32L4R7AI, STM32L4R7VI,
|
|
; STM32L4R7ZI, STM32L4R9AG, STM32L4R9AI, STM32L4R9VG,
|
|
; STM32L4R9VI, STM32L4R9ZG, STM32L4R9ZI, STM32L4S5AI,
|
|
; STM32L4S5QI, STM32L4S5VI, STM32L4S5ZI, STM32L4S7AI,
|
|
; STM32L4S7VI, STM32L4S7ZI, STM32L4S9AI, STM32L4S9VI,
|
|
; STM32L4S9ZI
|
|
; @Copyright: (C) 1989-2024 Lauterbach GmbH, licensed for use with TRACE32(R) only
|
|
; --------------------------------------------------------------------------------
|
|
; $Id: perstm32l4plus.per 17393 2024-01-25 14:32:14Z kwisniewski $
|
|
|
|
AUTOINDENT.ON CENTER TREE
|
|
ENUMDELIMITER ","
|
|
base ad:0x0
|
|
tree.close "Core Registers (Cortex-M4F)"
|
|
AUTOINDENT.PUSH
|
|
AUTOINDENT.OFF
|
|
tree "System Control"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 12.
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "ACTLR,Auxiliary Control Register"
|
|
bitfld.long 0x00 9. " DISFPCA ,Disables lazy stacking of floating point context" "No,Yes"
|
|
bitfld.long 0x00 8. " DISOOFP ,Disables floating point instructions completing" "No,Yes"
|
|
bitfld.long 0x00 2. " DISFOLD ,Disables folding of IT instructions" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DISDEFWBUF ,Disables write buffer use during default memory map accesses" "No,Yes"
|
|
bitfld.long 0x00 0. " DISMCYCINT ,Disables interruption of multi-cycle instructions" "No,Yes"
|
|
group.long 0x10++0x0B
|
|
line.long 0x00 "SYST_CSR,SysTick Control and Status Register"
|
|
rbitfld.long 0x00 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted"
|
|
bitfld.long 0x00 2. " CLKSOURCE ,SysTick clock source" "External,Core"
|
|
bitfld.long 0x00 1. " TICKINT ,SysTick Handler" "No SysTick,SysTick"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ENABLE ,Counter Enable" "Disabled,Enabled"
|
|
line.long 0x04 "SYST_RVR,SysTick Reload Value Register"
|
|
hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0"
|
|
line.long 0x08 "SYST_CVR,SysTick Current Value Register"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "SYST_CALIB,SysTick Calibration Value Register"
|
|
bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented"
|
|
bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing"
|
|
rgroup.long 0xD00++0x03
|
|
line.long 0x00 "CPUID,CPU ID Base Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Implementer Code"
|
|
bitfld.long 0x00 20.--23. " VARIANT ,Indicates processor revision" "Revision 0,?..."
|
|
bitfld.long 0x00 16.--19. " ARCHITECTURE ,Architecture" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
hexmask.long.word 0x00 4.--15. 1. " PARTNO ,Indicates part number"
|
|
bitfld.long 0x00 0.--3. " REVISION ,Indicates patch release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0xD04++0x23
|
|
line.long 0x00 "ICSR,Interrupt Control State Register"
|
|
bitfld.long 0x00 31. " NMIPENDSET ,Set Pending NMI Bit" "Inactive,Active"
|
|
bitfld.long 0x00 28. " PENDSVSET ,Set Pending pendSV Bit" "Not pending,Pending"
|
|
bitfld.long 0x00 27. " PENDSVCLR ,Removes the pending status of the PendSV exception" "No effect,Removed"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PENDSTSET ,Set Pending SysTick Bit" "Not pending,Pending"
|
|
bitfld.long 0x00 25. " PENDSTCLR ,Clear Pending SysTick Bit" "No effect,Removed"
|
|
bitfld.long 0x00 23. " ISRPREEMPT ,Use Only at Debug Time" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ISRPENDING ,Indicates whether an external interrupt" "Not pending,Pending"
|
|
hexmask.long.word 0x00 12.--20. 1. " VECTPENDING ,Pending ISR Number Field"
|
|
bitfld.long 0x00 11. " RETTOBASE ,Interrupt Exception" "Active,Not active"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,The exception number of the current executing exception"
|
|
line.long 0x04 "VTOR,Vector Table Offset Register"
|
|
hexmask.long 0x04 7.--31. 0x80 " TBLOFF ,Vector table address"
|
|
line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register"
|
|
hexmask.long.word 0x08 16.--31. 1. " VECTKEY ,Register Key"
|
|
rbitfld.long 0x08 15. " ENDIANESS ,Data endianness Bit" "Little,Big"
|
|
bitfld.long 0x08 8.--10. " PRIGROUP ,Interrupt Priority Grouping Field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
|
|
textline " "
|
|
bitfld.long 0x08 2. " SYSRESETREQ ,System Reset Request" "Not requested,Requested"
|
|
bitfld.long 0x08 1. " VECTCLRACTIVE ,Clear Active Vector Bit" "No effect,Clear"
|
|
bitfld.long 0x08 0. " VECTRESET ,System Reset" "No effect,Reset"
|
|
line.long 0x0C "SCR,System Control Register"
|
|
bitfld.long 0x0C 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
|
|
bitfld.long 0x0C 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
|
|
bitfld.long 0x0C 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
|
|
line.long 0x10 "CCR,Configuration Control Register"
|
|
bitfld.long 0x10 18. " BP ,Branch prediction enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x10 17. " IC ,Instruction cache enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x10 16. " DC ,Cache enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 9. " STKALIGN ,8-byte Stack Frame Alignment" "4-byte/no adjustment,8-byte/adjustment"
|
|
bitfld.long 0x10 8. " BFHFNMIGN ,Enable NMI and Hard Fault and FAULTMASK to Ignore Bus Fault" "Disabled,Enabled"
|
|
bitfld.long 0x10 4. " DIV_0_TRP ,Trap Divide by Zero" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 3. " UNALIGN_TRP ,Trap for Unaligned Access" "Disabled,Enabled"
|
|
bitfld.long 0x10 1. " USERSETMPEND ,Controls whether unprivileged software can access the STIR" "Denied,Allowed"
|
|
bitfld.long 0x10 0. " NONEBASETHRDENA ,Control Entry to Thread Mode" "Only from last exception,Any level"
|
|
line.long 0x14 "SHPR1,SSystem Handler Priority Register 1"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_7 ,Priority of System Handler 7"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_6 ,Priority of system handler 6(UsageFault)"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_5 ,Priority of system handler 5(BusFault)"
|
|
textline " "
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_4 ,Priority of system handler 4(MemManage)"
|
|
line.long 0x18 "SHPR2,System Handler Priority Register 2"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_11 ,Priority of system handler 11(SVCall)"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_10 ,Priority of System Handler 10"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_9 ,Priority of System Handler 9"
|
|
textline " "
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_8 ,Priority of System Handler 8"
|
|
line.long 0x1C "SHPR3,System Handler Priority Register 3"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_15 ,Priority of System Handler 15(SysTick)"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_14 ,Priority of System Handler 14(PendSV)"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_13 ,Priority of System Handler 13"
|
|
textline " "
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_12 ,Priority of System Handler 12(DebugMonitor)"
|
|
line.long 0x20 "SHCSR,System Handler Control and State Register"
|
|
bitfld.long 0x20 18. " USGFAULTENA ,Enable UsageFault" "Disabled,Enabled"
|
|
bitfld.long 0x20 17. " BUSFAULTENA ,Enable BusFault" "Disabled,Enabled"
|
|
bitfld.long 0x20 16. " MEMFAULTENA ,Enable MemManage fault" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 15. " SVCALLPENDED ,SVCall is pending" "Not pending,Pending"
|
|
bitfld.long 0x20 14. " BUSFAULTPENDED ,BusFault is pending" "Not pending,Pending"
|
|
bitfld.long 0x20 13. " MEMFAULTPENDED ,MemManage is pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x20 12. " USGFAULTPENDED ,UsageFault is pending" "Not pending,Pending"
|
|
bitfld.long 0x20 11. " SYSTICKACT ,SysTick is Active" "Not active,Active"
|
|
bitfld.long 0x20 10. " PENDSVACT ,PendSV is Active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x20 8. " MONITORACT ,Monitor is Active" "Not active,Active"
|
|
bitfld.long 0x20 7. " SVCALLACT ,SVCall is Active" "Not active,Active"
|
|
bitfld.long 0x20 3. " USGFAULTACT ,UsageFault is Active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x20 1. " BUSFAULTACT ,BusFault is Active" "Not active,Active"
|
|
bitfld.long 0x20 0. " MEMFAULTACT ,MemManage is Active" "Not active,Active"
|
|
group.byte 0xD28++0x1
|
|
line.byte 0x00 "MMFSR,MemManage Status Register"
|
|
bitfld.byte 0x00 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid"
|
|
bitfld.byte 0x00 5. " MLSPERR ,A MemManage fault occurred during FP lazy state preservation" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 4. " MSTKERR ,tacking Access Violations" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " MUNSTKERR ,Unstack Access Violations" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 1. " DACCVIOL ,Data Access Violation" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 0. " IACCVIOL ,Instruction Access Violation" "Not occurred,Occurred"
|
|
line.byte 0x01 "BFSR,Bus Fault Status Register"
|
|
bitfld.byte 0x01 7. " BFARVALID ,Address Valid Flag" "Not valid,Valid"
|
|
bitfld.byte 0x01 5. " LSPERR ,A bus fault occurred during FP lazy state preservation" "Not occurred,Occurred"
|
|
bitfld.byte 0x01 4. " STKERR ,Derived bus fault(exception entry)" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x01 3. " UNSTKERR ,Derived bus fault(exception return)" "Not occurred,Occurred"
|
|
bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise data access error" "Not occurred,Occurred"
|
|
bitfld.byte 0x01 1. " PRECISERR ,Precise data access error" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x01 0. " IBUSERR ,Bus fault on an instruction prefetch" "Not occurred,Occurred"
|
|
group.word 0xD2A++0x1
|
|
line.word 0x00 "USAFAULT,Usage Fault Status Register"
|
|
bitfld.word 0x00 9. " DIVBYZERO ,Divide by zero error" "No error,Error"
|
|
bitfld.word 0x00 8. " UNALIGNED ,Unaligned access error" "No error,Error"
|
|
bitfld.word 0x00 3. " NOCP ,A coprocessor access error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 2. " INVPC ,An integrity check error" "No error,Error"
|
|
bitfld.word 0x00 1. " INVSTATE ,Invalid Combination of EPSR and Instruction" "No error,Error"
|
|
bitfld.word 0x00 0. " UNDEFINSTR ,Undefined instruction error" "No error,Error"
|
|
group.long 0xD2C++0x07
|
|
line.long 0x00 "HFSR,Hard Fault Status Register"
|
|
bitfld.long 0x00 31. " DEBUGEVT ,Indicates when a Debug event has occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x00 30. " FORCED ,Indicates that a fault with configurable priority" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " VECTTBL ,Indicates when a fault has occurred because of a vector table read error on exception processing" "Not occurred,Occurred"
|
|
line.long 0x04 "DFSR,Debug Fault Status Register"
|
|
bitfld.long 0x04 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of EDBGRQ" "Not asserted,Asserted"
|
|
bitfld.long 0x04 3. " VCATCH ,Vector Catch Flag" "Not occurred,Occurred"
|
|
bitfld.long 0x04 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 1. " BKPT ,BKPT Flag" "Not executed,Executed"
|
|
bitfld.long 0x04 0. " HALTED ,Indicates a debug event generated by either" "Not requested,Requested"
|
|
group.long 0xD34++0x0B
|
|
line.long 0x00 "MMFAR,MemManage Fault Address Register"
|
|
line.long 0x04 "BFAR,BusFault Address Register"
|
|
line.long 0x08 "AFSR,Auxiliary Fault Status Register"
|
|
group.long 0xD88++0x03
|
|
line.long 0x00 "CPACR,Coprocessor Access Control Register"
|
|
bitfld.long 0x00 22.--23. " CP11 ,Access privileges for coprocessor 11" "Access denied,Privileged only,Reserved,Full access"
|
|
bitfld.long 0x00 20.--21. " CP10 ,Access privileges for coprocessor 10" "Access denied,Privileged only,Reserved,Full access"
|
|
bitfld.long 0x00 14.--15. " CP7 ,Access privileges for coprocessor 7" "Access denied,Privileged only,Reserved,Full access"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " CP6 ,Access privileges for coprocessor 6" "Access denied,Privileged only,Reserved,Full access"
|
|
bitfld.long 0x00 10.--11. " CP5 ,Access privileges for coprocessor 5" "Access denied,Privileged only,Reserved,Full access"
|
|
bitfld.long 0x00 8.--9. " CP4 ,Access privileges for coprocessor 4" "Access denied,Privileged only,Reserved,Full access"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " CP3 ,Access privileges for coprocessor 3" "Access denied,Privileged only,Reserved,Full access"
|
|
bitfld.long 0x00 4.--5. " CP2 ,Access privileges for coprocessor 2" "Access denied,Privileged only,Reserved,Full access"
|
|
bitfld.long 0x00 2.--3. " CP1 ,Access privileges for coprocessor 1" "Access denied,Privileged only,Reserved,Full access"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " CP0 ,Access privileges for coprocessor 0" "Access denied,Privileged only,Reserved,Full access"
|
|
wgroup.long 0xF00++0x03
|
|
line.long 0x00 "STIR,Software Trigger Interrupt Register"
|
|
hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be triggered"
|
|
width 10.
|
|
tree "Feature Registers"
|
|
rgroup.long 0xD40++0x0B
|
|
line.long 0x00 "ID_PFR0,Processor Feature Register 0"
|
|
bitfld.long 0x00 4.--7. " STATE1 ,Thumb instruction set support" ",,,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..."
|
|
line.long 0x04 "ID_PFR1,Processor Feature Register 1"
|
|
bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..."
|
|
line.long 0x08 "ID_DFR0,Debug Feature Register 0"
|
|
bitfld.long 0x08 20.--23. " DBGMOD ,Support for memory-mapped debug model for M profile processors" "Not supported,Supported,?..."
|
|
hgroup.long 0xD4C++0x03
|
|
hide.long 0x00 "ID_AFR0,Auxiliary Feature Register 0"
|
|
rgroup.long 0xD50++0x03
|
|
line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0"
|
|
bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,ACTLR only,?..."
|
|
bitfld.long 0x00 16.--19. " TCMSUP ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "Level 1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,,,,,,,,,,,,,,,Ignored"
|
|
bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,PMSAv7,?..."
|
|
hgroup.long 0xD54++0x03
|
|
hide.long 0x00 "ID_MMFR1,Memory Model Feature Register 1"
|
|
rgroup.long 0xD58++0x03
|
|
line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2"
|
|
bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..."
|
|
rgroup.long 0xD60++0x13
|
|
line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0"
|
|
bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..."
|
|
bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..."
|
|
bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,CDP/LDC/MCR/STC,CDP2/LDC2/MCR2/STC2,MCRR/MRRC,MCRR2/MRRC2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..."
|
|
bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..."
|
|
bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..."
|
|
line.long 0x04 "ID_ISAR1,Instruction Set Attributes Register 1"
|
|
bitfld.long 0x04 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..."
|
|
bitfld.long 0x04 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..."
|
|
bitfld.long 0x04 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..."
|
|
textline " "
|
|
bitfld.long 0x04 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Supported,Supported,?..."
|
|
line.long 0x08 "ID_ISAR2,Instruction Set Attributes Register 2"
|
|
bitfld.long 0x08 24.--27. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..."
|
|
bitfld.long 0x08 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..."
|
|
bitfld.long 0x08 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,Supported,Supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x08 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MLA,MLA/MLS,?..."
|
|
bitfld.long 0x08 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..."
|
|
bitfld.long 0x08 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,LDRD/STRD,?..."
|
|
line.long 0x0C "ID_ISAR3,Instruction Set Attributes Register 3"
|
|
bitfld.long 0x0C 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..."
|
|
bitfld.long 0x0C 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..."
|
|
bitfld.long 0x0C 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x0C 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..."
|
|
bitfld.long 0x0C 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB,?..."
|
|
line.long 0x10 "ID_ISAR4,Instruction Set Attributes Register 4"
|
|
bitfld.long 0x10 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,?..."
|
|
bitfld.long 0x10 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x10 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,DMB/DSB/ISB,?..."
|
|
textline " "
|
|
bitfld.long 0x10 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..."
|
|
bitfld.long 0x10 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,Shift LSL 0-3,,Shift other,?..."
|
|
bitfld.long 0x10 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,LDRBT/LDRT/STRBT/STRT/LDRHT/LDRSBT/LDRSHTSTRHT,?..."
|
|
tree.end
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0C "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0C "CID3,Component ID3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Memory Protection Unit"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 15.
|
|
rgroup.long 0xD90++0x03
|
|
line.long 0x00 "MPU_TYPE,MPU Type Register"
|
|
bitfld.long 0x00 16.--23. " IREGION ,Instruction region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,Supported"
|
|
group.long 0xD94++0x03
|
|
line.long 0x00 "MPU_CTRL,MPU Control Register"
|
|
bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled"
|
|
group.long 0xD98++0x03
|
|
line.long 0x00 "MPU_RNR,MPU Region Number Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR"
|
|
tree.close "MPU regions"
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0
|
|
group.long 0xD9C++0x03 "Region 0"
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 0 (not implemented)"
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1
|
|
group.long 0xD9C++0x03 "Region 1"
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 1 (not implemented)"
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2
|
|
group.long 0xD9C++0x03 "Region 2"
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 2 (not implemented)"
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3
|
|
group.long 0xD9C++0x03 "Region 3"
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 3 (not implemented)"
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4
|
|
group.long 0xD9C++0x03 "Region 4"
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 4 (not implemented)"
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5
|
|
group.long 0xD9C++0x03 "Region 5"
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 5 (not implemented)"
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6
|
|
group.long 0xD9C++0x03 "Region 6"
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 6 (not implemented)"
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7
|
|
group.long 0xD9C++0x03 "Region 7"
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 7 (not implemented)"
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8
|
|
group.long 0xD9C++0x03 "Region 8"
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 8 (not implemented)"
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9
|
|
group.long 0xD9C++0x03 "Region 9"
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 9 (not implemented)"
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA
|
|
group.long 0xD9C++0x03 "Region 10"
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 10 (not implemented)"
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB
|
|
group.long 0xD9C++0x03 "Region 11"
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 11 (not implemented)"
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC
|
|
group.long 0xD9C++0x03 "Region 12"
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 12 (not implemented)"
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD
|
|
group.long 0xD9C++0x03 "Region 13"
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 13 (not implemented)"
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE
|
|
group.long 0xD9C++0x03 "Region 14"
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 14 (not implemented)"
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF
|
|
group.long 0xD9C++0x03 "Region 15"
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 15 (not implemented)"
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Nested Vectored Interrupt Controller"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 6.
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "ICTR,Interrupt Controller Type Register"
|
|
bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,33-64,65-96,97-128,129-160,161-192,193-224,225-240,?..."
|
|
tree "Interrupt Enable Registers"
|
|
width 23.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x100++0x7
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x100++0x0B
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x100++0x0F
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x100++0x13
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x100++0x17
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x100++0x1B
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x100++0x1F
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x100++0x1F
|
|
hide.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Pending Registers"
|
|
width 23.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x200++0x07
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x200++0x0B
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x200++0x0F
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x200++0x13
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x200++0x17
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x200++0x1B
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x200++0x1F
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x200++0x1F
|
|
hide.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Active Bit Registers"
|
|
width 9.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
rgroup.long 0x300++0x03
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
rgroup.long 0x300++0x07
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
rgroup.long 0x300++0x0B
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
rgroup.long 0x300++0x0F
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
rgroup.long 0x300++0x13
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
rgroup.long 0x300++0x17
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
rgroup.long 0x300++0x1B
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
rgroup.long 0x300++0x1F
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x1c "ACTIVE8,Active Bit Register 8"
|
|
bitfld.long 0x1c 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1c 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1c 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x300++0x1F
|
|
hide.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
hide.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
hide.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
hide.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
hide.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
hide.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
hide.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
hide.long 0x1c "ACTIVE8,Active Bit Register 8"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Priority Registers"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x400++0x1F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x400++0x3F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x400++0x5F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x400++0x7F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x400++0x9F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x400++0xBF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x400++0xDF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
line.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x400++0xEF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
line.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
line.long 0xE0 "IPR56,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority"
|
|
hexmask.long.byte 0xE0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority"
|
|
hexmask.long.byte 0xE0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority"
|
|
hexmask.long.byte 0xE0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority"
|
|
line.long 0xE4 "IPR57,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority"
|
|
hexmask.long.byte 0xE4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority"
|
|
hexmask.long.byte 0xE4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority"
|
|
hexmask.long.byte 0xE4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority"
|
|
line.long 0xE8 "IPR58,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority"
|
|
hexmask.long.byte 0xE8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority"
|
|
hexmask.long.byte 0xE8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority"
|
|
hexmask.long.byte 0xE8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority"
|
|
line.long 0xEC "IPR59,Interrupt Priority Register"
|
|
hexmask.long.byte 0xEC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority"
|
|
hexmask.long.byte 0xEC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority"
|
|
hexmask.long.byte 0xEC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority"
|
|
hexmask.long.byte 0xEC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority"
|
|
else
|
|
hgroup.long 0x400++0xEF
|
|
hide.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hide.long 0xC "IPR3,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hide.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hide.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hide.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hide.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hide.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hide.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hide.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hide.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hide.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hide.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hide.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hide.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hide.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hide.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hide.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hide.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hide.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hide.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hide.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hide.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hide.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hide.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hide.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hide.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hide.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hide.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hide.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hide.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hide.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hide.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hide.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hide.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hide.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hide.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hide.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hide.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hide.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hide.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hide.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hide.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hide.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hide.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hide.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hide.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hide.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hide.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hide.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hide.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hide.long 0xE0 "IPR56,Interrupt Priority Register"
|
|
hide.long 0xE4 "IPR57,Interrupt Priority Register"
|
|
hide.long 0xE8 "IPR58,Interrupt Priority Register"
|
|
hide.long 0xEC "IPR59,Interrupt Priority Register"
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
sif CORENAME()=="CORTEXM4F"
|
|
tree "Floating-point Unit (FPU)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 8.
|
|
group.long 0xF34++0x0B
|
|
line.long 0x00 "FPCCR,Floating-Point Context Control Register"
|
|
bitfld.long 0x00 31. " ASPEN ,Execution of a floating-point instruction sets the CONTROL.FPCA bit to 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " LSPEN ,Enables lazy context save of FP state" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " MONRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the DebugMonitor exception to pending" "Not able,Able"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the BusFault exception to pending" "Not able,Able"
|
|
bitfld.long 0x00 5. " MMRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the MemManage exception to pending" "Not able,Able"
|
|
bitfld.long 0x00 4. " HFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the HardFault exception to pending" "Not able,Able"
|
|
textline " "
|
|
bitfld.long 0x00 3. " THREAD ,Indicates the processor mode when it allocated the FP stack frame" "Handler,Thread"
|
|
bitfld.long 0x00 1. " USER ,Indicates the privilege level of the software executing" "Privileged,Unprivileged"
|
|
bitfld.long 0x00 0. " LSPACT ,Indicates whether Lazy preservation of the FP state is active" "Not active,Active"
|
|
line.long 0x04 "FPCAR,Floating-Point Context Address Register"
|
|
hexmask.long 0x04 3.--31. 0x8 " ADDRESS ,The location of the unpopulated floating-point register space allocated on an exception stack frame"
|
|
line.long 0x08 "FPDSCR,Floating-Point Default Status Control Register"
|
|
bitfld.long 0x08 26. " AHP ,Default value for FPSCR.AHP" "IEEE 754-2008,Alternative"
|
|
bitfld.long 0x08 25. " DN ,Default value for FPSCR.DN" "NaN operands,Any operation"
|
|
bitfld.long 0x08 24. " FZ ,Default value for FPSCR.FZ" "No Flush mode,Flush mode"
|
|
textline " "
|
|
bitfld.long 0x08 22.--23. " RMODE ,Default value for FPSCR.RMode" "Round to Nearest,Round towards Plus Infinity,Round towards Minus Infinity,Round towards Zero"
|
|
rgroup.long 0xF40++0x07
|
|
line.long 0x00 "MVFR0,Media and FP Feature Register 0"
|
|
bitfld.long 0x00 28.--31. " FPRNDMOD ,Indicates the rounding modes supported by the FP floating-point hardware" ",All supported,?..."
|
|
bitfld.long 0x00 24.--27. " SRTERR ,Indicates the hardware support for FP short vectors" "Not supported,?..."
|
|
bitfld.long 0x00 20.--23. " SQRROOT ,Indicates the hardware support for FP square root operations" ",Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " DIV ,Indicates the hardware support for FP divide operations" ",Supported,?..."
|
|
bitfld.long 0x00 12.--15. " FPEXTRP ,Indicates whether the FP hardware implementation supports exception trapping" "Not supported,?..."
|
|
bitfld.long 0x00 8.--11. " DBLPREC ,Indicates the hardware support for FP double_precision operations" "Not supported,,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " SNGLPREC ,Indicates the hardware support for FP single-precision operations" ",,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " A_SIMD ,Indicates the size of the FP register bank" ",Supported-16x64-bit,?..."
|
|
line.long 0x04 "MVFR1,Media and FP Feature Register 1"
|
|
bitfld.long 0x04 28.--31. " FP_FUSED_MAC ,Indicates whether the FP supports fused multiply accumulate operations" ",Supported,?..."
|
|
bitfld.long 0x04 24.--27. " FP_HPFP ,Indicates whether the FP supports half-precision and double-precision floating-point conversion instructions" ",Half-single,Half-single and half-double,?..."
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " D_NAN ,Indicates whether the FP hardware implementation supports only the Default NaN mode" ",NaN propagation,?..."
|
|
bitfld.long 0x04 0.--3. " FTZ_MODE ,Indicates whether the FP hardware implementation supports only the Flush-to-Zero mode of operation" ",Full denorm. num. arit.,?..."
|
|
width 0xB
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
endif
|
|
tree "Debug"
|
|
tree "Core Debug"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 7.
|
|
group.long 0xD30++0x03
|
|
line.long 0x00 "DFSR,Debug Fault Status Register"
|
|
eventfld.long 0x00 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not generated,Generated"
|
|
eventfld.long 0x00 3. " VCATCH ,Indicates triggering of a Vector catch" "Not triggered,Triggered"
|
|
eventfld.long 0x00 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not generated,Generated"
|
|
newline
|
|
eventfld.long 0x00 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not generated,Generated"
|
|
eventfld.long 0x00 0. " HALTED ,Indicates a debug event generated by either a C_HALT or C_STEP request, triggered by a write to the DHCSR or a step request triggered by setting DEMCR.MON_STEP to 1" "Not generated,Generated"
|
|
newline
|
|
hgroup.long 0xDF0++0x03
|
|
hide.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
in
|
|
newline
|
|
wgroup.long 0xDF4++0x03
|
|
line.long 0x00 "DCRSR,Debug Core Register Selector Register"
|
|
bitfld.long 0x00 16. " REGWNR ,Register Read/Write" "Read,Write"
|
|
hexmask.long.byte 0x00 0.--6. 1. " REGSEL ,Specifies the ARM core register or special-purpose register or Floating-point extension register"
|
|
group.long 0xDF8++0x03
|
|
line.long 0x00 "DCRDR,Debug Core Register Data Register"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000)
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step"
|
|
newline
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
endif
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Flash Patch and Breakpoint Unit (FPB)"
|
|
sif COMPonent.AVAILABLE("FPB")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))
|
|
width 10.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "FP_CTRL,Flash Patch Control Register"
|
|
bitfld.long 0x00 28.--31. " REV ,Flash Patch Breakpoint architecture revision" "Version 1,Version 2,?..."
|
|
rbitfld.long 0x00 4.--7. 12.--14. " NUM_CODE ,The number of instruction address comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127"
|
|
bitfld.long 0x00 1. " KEY ,Key Field" "Low,High"
|
|
bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled"
|
|
textline ""
|
|
line.long 0x04 "FP_REMAP,Flash Patch Remap Register"
|
|
bitfld.long 0x04 29. " RMPSPT ,Indicates whether the FPB unit supports flash patch remap" "Not supported,SRAM region"
|
|
hexmask.long.tbyte 0x04 5.--28. 0x20 " REMAP ,Remap Base Address Field"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x8))&0x01)==0x00)
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xC))&0x01)==0x00)
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x10))&0x01)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x14))&0x01)==0x00)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x18))&0x01)==0x00)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x1C))&0x01)==0x00)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x20))&0x01)==0x00)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x24))&0x01)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0c "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0c "CID3,Component ID3"
|
|
tree.end
|
|
width 0xB
|
|
else
|
|
newline
|
|
textline "FPB component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Data Watchpoint and Trace Unit (DWT)"
|
|
sif COMPonent.AVAILABLE("DWT")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
|
|
width 15.
|
|
group.long 0x00++0x1B
|
|
line.long 0x00 "DWT_CTRL,Control Register"
|
|
rbitfld.long 0x00 28.--31. " NUMCOMP ,Number of comparators implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.long 0x00 27. " NOTRCPKT ,Shows whether the implementation supports trace sampling and exception tracing" "Supported,Not supported"
|
|
rbitfld.long 0x00 26. " NOEXTTRIG ,Shows whether the implementation includes external match signals" "Supported,Not supported"
|
|
textline " "
|
|
rbitfld.long 0x00 25. " NOCYCCNT ,Shows whether the implementation supports a cycle counter" "Supported,Not supported"
|
|
rbitfld.long 0x00 24. " NOPRFCNT ,Shows whether the implementation supports the profiling counters" "Supported,Not supported"
|
|
bitfld.long 0x00 22. " CYCEVTENA ,Enables POSTCNT underflow Event counter packets generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " FOLDEVTENA ,Enables generation of the Folded-instruction counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " LSUEVTENA ,Enables generation of the LSU counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " SLEEPEVTENA ,Enables generation of the Sleep counter overflow event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " EXCEVTENA ,Enables generation of the Exception overhead counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CPIEVTENA ,Enables generation of the CPI counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " EXCTRCENA ,Enables generation of exception trace" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PCSAMPLEENA ,Enables use of POSTCNT counter as a timer for Periodic PC sample packet generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 10.--11. " SYNCTAP ,Selects the position of the synchronization packet counter tap on the CYCCNT counter" "Disabled,CYCCNT[24],CYCCNT[26],CYCCNT[28]"
|
|
bitfld.long 0x00 9. " CYCTAP ,Selects the position of the POSTCNT tap on the CYCCNT counter" "CYCCNT[6],CYCCNT[10]"
|
|
textline " "
|
|
bitfld.long 0x00 5.--8. " POSTINIT ,Initial value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1.--4. " POSTPRESET ,Reload value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0. " CYCCNTENA ,Enables CYCCNT" "Disabled,Enabled"
|
|
line.long 0x04 "DWT_CYCCNT,Cycle Count Register"
|
|
line.long 0x08 "DWT_CPICNT,CPI Count Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " CPICNT ,The base CPI counter"
|
|
line.long 0x0c "DWT_EXCCNT,Exception Overhead Count Register"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " EXCCNT ,The exception overhead counter"
|
|
line.long 0x10 "DWT_SLEEPCNT,Sleep Count Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. " SLEEPCNT ,Sleep Counter"
|
|
line.long 0x14 "DWT_LSUCNT,LSU Count Register"
|
|
hexmask.long.byte 0x14 0.--7. 1. " LSUCNT ,Load-store counter"
|
|
line.long 0x18 "DWT_FOLDCNT,Folded-instruction Count Register"
|
|
hexmask.long.byte 0x18 0.--7. 1. " FOLDCNT ,Folded-instruction counter"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "DWT_PCSR,Program Counter Sample register"
|
|
textline " "
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
|
|
line.long 0x04 "DWT_MASK0,DWT Mask Registers 0"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x20)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x00)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x180)==0x80)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet,UNPREDICTABLE,UNPREDICTABLE,Generate watchpoint debug event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,CMPMATCH[N] event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
else
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x30)++0x07
|
|
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
|
|
line.long 0x04 "DWT_MASK1,DWT Mask Registers 1"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x20)
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x00)
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x40)++0x07
|
|
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
|
|
line.long 0x04 "DWT_MASK2,DWT Mask Registers 2"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x20)
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x00)
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x50)++0x07
|
|
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
|
|
line.long 0x04 "DWT_MASK3,DWT Mask Registers 3"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x20)
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x00)
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0c "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0c "CID3,Component ID3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "DWT component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
AUTOINDENT.POP
|
|
tree.end
|
|
tree "ADC (Analog-to-Digital Converter)"
|
|
base ad:0x0
|
|
sif (cpuis("STM32L4P5*")||cpuis("STM32L4Q5*")||cpuis("STM32L4R5*"))
|
|
tree "ADC"
|
|
base ad:0x50040000
|
|
group.long 0x0++0x1B
|
|
line.long 0x0 "ISR,interrupt and status register"
|
|
bitfld.long 0x0 10. "JQOVF,JQOVF" "0,1"
|
|
bitfld.long 0x0 9. "AWD3,AWD3" "0,1"
|
|
bitfld.long 0x0 8. "AWD2,AWD2" "0,1"
|
|
bitfld.long 0x0 7. "AWD1,AWD1" "0,1"
|
|
bitfld.long 0x0 6. "JEOS,JEOS" "0,1"
|
|
bitfld.long 0x0 5. "JEOC,JEOC" "0,1"
|
|
bitfld.long 0x0 4. "OVR,OVR" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "EOS,EOS" "0,1"
|
|
bitfld.long 0x0 2. "EOC,EOC" "0,1"
|
|
bitfld.long 0x0 1. "EOSMP,EOSMP" "0,1"
|
|
bitfld.long 0x0 0. "ADRDY,ADRDY" "0,1"
|
|
line.long 0x4 "IER,interrupt enable register"
|
|
bitfld.long 0x4 10. "JQOVFIE,JQOVFIE" "0,1"
|
|
bitfld.long 0x4 9. "AWD3IE,AWD3IE" "0,1"
|
|
bitfld.long 0x4 8. "AWD2IE,AWD2IE" "0,1"
|
|
bitfld.long 0x4 7. "AWD1IE,AWD1IE" "0,1"
|
|
bitfld.long 0x4 6. "JEOSIE,JEOSIE" "0,1"
|
|
bitfld.long 0x4 5. "JEOCIE,JEOCIE" "0,1"
|
|
bitfld.long 0x4 4. "OVRIE,OVRIE" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "EOSIE,EOSIE" "0,1"
|
|
bitfld.long 0x4 2. "EOCIE,EOCIE" "0,1"
|
|
bitfld.long 0x4 1. "EOSMPIE,EOSMPIE" "0,1"
|
|
bitfld.long 0x4 0. "ADRDYIE,ADRDYIE" "0,1"
|
|
line.long 0x8 "CR,control register"
|
|
bitfld.long 0x8 31. "ADCAL,ADCAL" "0,1"
|
|
bitfld.long 0x8 30. "ADCALDIF,ADCALDIF" "0,1"
|
|
bitfld.long 0x8 29. "DEEPPWD,DEEPPWD" "0,1"
|
|
bitfld.long 0x8 28. "ADVREGEN,ADVREGEN" "0,1"
|
|
bitfld.long 0x8 5. "JADSTP,JADSTP" "0,1"
|
|
bitfld.long 0x8 4. "ADSTP,ADSTP" "0,1"
|
|
bitfld.long 0x8 3. "JADSTART,JADSTART" "0,1"
|
|
newline
|
|
bitfld.long 0x8 2. "ADSTART,ADSTART" "0,1"
|
|
bitfld.long 0x8 1. "ADDIS,ADDIS" "0,1"
|
|
bitfld.long 0x8 0. "ADEN,ADEN" "0,1"
|
|
line.long 0xC "CFGR,configuration register"
|
|
bitfld.long 0xC 31. "JQDIS,Injected Queue disable" "0,1"
|
|
hexmask.long.byte 0xC 26.--30. 1. "AWDCH1CH,AWDCH1CH"
|
|
bitfld.long 0xC 25. "JAUTO,JAUTO" "0,1"
|
|
bitfld.long 0xC 24. "JAWD1EN,JAWD1EN" "0,1"
|
|
bitfld.long 0xC 23. "AWD1EN,AWD1EN" "0,1"
|
|
bitfld.long 0xC 22. "AWD1SGL,AWD1SGL" "0,1"
|
|
bitfld.long 0xC 21. "JQM,JQM" "0,1"
|
|
newline
|
|
bitfld.long 0xC 20. "JDISCEN,JDISCEN" "0,1"
|
|
bitfld.long 0xC 17.--19. "DISCNUM,DISCNUM" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 16. "DISCEN,DISCEN" "0,1"
|
|
bitfld.long 0xC 14. "AUTDLY,AUTDLY" "0,1"
|
|
bitfld.long 0xC 13. "CONT,CONT" "0,1"
|
|
bitfld.long 0xC 12. "OVRMOD,OVRMOD" "0,1"
|
|
bitfld.long 0xC 10.--11. "EXTEN,EXTEN" "0,1,2,3"
|
|
newline
|
|
sif (cpuis("STM32L4P5*")||cpuis("STM32L4Q5*"))
|
|
bitfld.long 0xC 9. "EXTSEL3,EXTSEL3" "0,1"
|
|
bitfld.long 0xC 8. "EXTSEL2,EXTSEL2" "0,1"
|
|
bitfld.long 0xC 7. "EXTSEL1,EXTSEL1" "0,1"
|
|
bitfld.long 0xC 6. "EXTSEL0,EXTSEL0" "0,1"
|
|
bitfld.long 0xC 2. "DFSDMCFG,DFSDM mode configuration" "0,1"
|
|
endif
|
|
sif (cpuis("STM32L4R5*"))
|
|
hexmask.long.byte 0xC 6.--9. 1. "EXTSEL,EXTSEL"
|
|
endif
|
|
bitfld.long 0xC 5. "ALIGN,ALIGN" "0,1"
|
|
newline
|
|
bitfld.long 0xC 3.--4. "RES,RES" "0,1,2,3"
|
|
bitfld.long 0xC 1. "DMACFG,DMACFG" "0,1"
|
|
bitfld.long 0xC 0. "DMAEN,DMAEN" "0,1"
|
|
line.long 0x10 "CFGR2,configuration register"
|
|
bitfld.long 0x10 10. "ROVSM,Regular Oversampling mode" "0,1"
|
|
bitfld.long 0x10 9. "TROVS,Triggered Regular" "0,1"
|
|
hexmask.long.byte 0x10 5.--8. 1. "OVSS,ALIGN"
|
|
bitfld.long 0x10 2.--4. "OVSR,RES" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 1. "JOVSE,DMACFG" "0,1"
|
|
bitfld.long 0x10 0. "ROVSE,DMAEN" "0,1"
|
|
line.long 0x14 "SMPR1,sample time register 1"
|
|
bitfld.long 0x14 31. "SMPPLUS,Addition of one clock cycle to the" "0,1"
|
|
bitfld.long 0x14 27.--29. "SMP9,SMP9" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 24.--26. "SMP8,SMP8" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 21.--23. "SMP7,SMP7" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 18.--20. "SMP6,SMP6" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 15.--17. "SMP5,SMP5" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 12.--14. "SMP4,SMP4" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x14 9.--11. "SMP3,SMP3" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 6.--8. "SMP2,SMP2" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 3.--5. "SMP1,SMP1" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 0.--2. "SMP0,SMP0" "0,1,2,3,4,5,6,7"
|
|
line.long 0x18 "SMPR2,sample time register 2"
|
|
bitfld.long 0x18 24.--26. "SMP18,SMP18" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 21.--23. "SMP17,SMP17" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 18.--20. "SMP16,SMP16" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 15.--17. "SMP15,SMP15" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 12.--14. "SMP14,SMP14" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 9.--11. "SMP13,SMP13" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 6.--8. "SMP12,SMP12" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x18 3.--5. "SMP11,SMP11" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 0.--2. "SMP10,SMP10" "0,1,2,3,4,5,6,7"
|
|
group.long 0x20++0xB
|
|
line.long 0x0 "TR1,watchdog threshold register 1"
|
|
hexmask.long.word 0x0 16.--27. 1. "HT1,HT1"
|
|
hexmask.long.word 0x0 0.--11. 1. "LT1,LT1"
|
|
line.long 0x4 "TR2,watchdog threshold register"
|
|
hexmask.long.byte 0x4 16.--23. 1. "HT2,HT2"
|
|
hexmask.long.byte 0x4 0.--7. 1. "LT2,LT2"
|
|
line.long 0x8 "TR3,watchdog threshold register 3"
|
|
hexmask.long.byte 0x8 16.--23. 1. "HT3,HT3"
|
|
hexmask.long.byte 0x8 0.--7. 1. "LT3,LT3"
|
|
group.long 0x30++0xF
|
|
line.long 0x0 "SQR1,regular sequence register 1"
|
|
hexmask.long.byte 0x0 24.--28. 1. "SQ4,SQ4"
|
|
hexmask.long.byte 0x0 18.--22. 1. "SQ3,SQ3"
|
|
hexmask.long.byte 0x0 12.--16. 1. "SQ2,SQ2"
|
|
hexmask.long.byte 0x0 6.--10. 1. "SQ1,SQ1"
|
|
hexmask.long.byte 0x0 0.--3. 1. "L,Regular channel sequence"
|
|
line.long 0x4 "SQR2,regular sequence register 2"
|
|
hexmask.long.byte 0x4 24.--28. 1. "SQ9,SQ9"
|
|
hexmask.long.byte 0x4 18.--22. 1. "SQ8,SQ8"
|
|
hexmask.long.byte 0x4 12.--16. 1. "SQ7,SQ7"
|
|
hexmask.long.byte 0x4 6.--10. 1. "SQ6,SQ6"
|
|
hexmask.long.byte 0x4 0.--4. 1. "SQ5,SQ5"
|
|
line.long 0x8 "SQR3,regular sequence register 3"
|
|
hexmask.long.byte 0x8 24.--28. 1. "SQ14,SQ14"
|
|
hexmask.long.byte 0x8 18.--22. 1. "SQ13,SQ13"
|
|
hexmask.long.byte 0x8 12.--16. 1. "SQ12,SQ12"
|
|
hexmask.long.byte 0x8 6.--10. 1. "SQ11,SQ11"
|
|
hexmask.long.byte 0x8 0.--4. 1. "SQ10,SQ10"
|
|
line.long 0xC "SQR4,regular sequence register 4"
|
|
hexmask.long.byte 0xC 6.--10. 1. "SQ16,SQ16"
|
|
hexmask.long.byte 0xC 0.--4. 1. "SQ15,SQ15"
|
|
rgroup.long 0x40++0x3
|
|
line.long 0x0 "DR,regular Data Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "RDATA,Regular Data converted"
|
|
group.long 0x4C++0x3
|
|
line.long 0x0 "JSQR,injected sequence register"
|
|
hexmask.long.byte 0x0 26.--30. 1. "JSQ4,JSQ4"
|
|
hexmask.long.byte 0x0 20.--24. 1. "JSQ3,JSQ3"
|
|
hexmask.long.byte 0x0 14.--18. 1. "JSQ2,JSQ2"
|
|
hexmask.long.byte 0x0 8.--12. 1. "JSQ1,JSQ1"
|
|
bitfld.long 0x0 6.--7. "JEXTEN,JEXTEN" "0,1,2,3"
|
|
hexmask.long.byte 0x0 2.--5. 1. "JEXTSEL,JEXTSEL"
|
|
bitfld.long 0x0 0.--1. "JL,JL" "0,1,2,3"
|
|
group.long 0x60++0xF
|
|
line.long 0x0 "OFR1,offset register 1"
|
|
bitfld.long 0x0 31. "OFFSET1_EN,OFFSET1_EN" "0,1"
|
|
hexmask.long.byte 0x0 26.--30. 1. "OFFSET1_CH,OFFSET1_CH"
|
|
hexmask.long.word 0x0 0.--11. 1. "OFFSET1,OFFSET1"
|
|
line.long 0x4 "OFR2,offset register 2"
|
|
bitfld.long 0x4 31. "OFFSET2_EN,OFFSET2_EN" "0,1"
|
|
hexmask.long.byte 0x4 26.--30. 1. "OFFSET2_CH,OFFSET2_CH"
|
|
hexmask.long.word 0x4 0.--11. 1. "OFFSET2,OFFSET2"
|
|
line.long 0x8 "OFR3,offset register 3"
|
|
bitfld.long 0x8 31. "OFFSET3_EN,OFFSET3_EN" "0,1"
|
|
hexmask.long.byte 0x8 26.--30. 1. "OFFSET3_CH,OFFSET3_CH"
|
|
hexmask.long.word 0x8 0.--11. 1. "OFFSET3,OFFSET3"
|
|
line.long 0xC "OFR4,offset register 4"
|
|
bitfld.long 0xC 31. "OFFSET4_EN,OFFSET4_EN" "0,1"
|
|
hexmask.long.byte 0xC 26.--30. 1. "OFFSET4_CH,OFFSET4_CH"
|
|
hexmask.long.word 0xC 0.--11. 1. "OFFSET4,OFFSET4"
|
|
rgroup.long 0x80++0xF
|
|
line.long 0x0 "JDR1,injected data register 1"
|
|
hexmask.long.word 0x0 0.--15. 1. "JDATA1,JDATA1"
|
|
line.long 0x4 "JDR2,injected data register 2"
|
|
hexmask.long.word 0x4 0.--15. 1. "JDATA2,JDATA2"
|
|
line.long 0x8 "JDR3,injected data register 3"
|
|
hexmask.long.word 0x8 0.--15. 1. "JDATA3,JDATA3"
|
|
line.long 0xC "JDR4,injected data register 4"
|
|
hexmask.long.word 0xC 0.--15. 1. "JDATA4,JDATA4"
|
|
group.long 0xA0++0x7
|
|
line.long 0x0 "AWD2CR,Analog Watchdog 2 Configuration"
|
|
hexmask.long.tbyte 0x0 0.--17. 1. "AWD2CH,AWD2CH"
|
|
line.long 0x4 "AWD3CR,Analog Watchdog 3 Configuration"
|
|
hexmask.long.tbyte 0x4 0.--17. 1. "AWD3CH,AWD3CH"
|
|
group.long 0xB0++0x7
|
|
line.long 0x0 "DIFSEL,Differential Mode Selection Register"
|
|
rbitfld.long 0x0 16.--18. "DIFSEL_16_18,Differential mode for channels 18 to" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x0 1.--15. 1. "DIFSEL_1_15,Differential mode for channels 15 to"
|
|
line.long 0x4 "CALFACT,Calibration Factors"
|
|
hexmask.long.byte 0x4 16.--22. 1. "CALFACT_D,CALFACT_D"
|
|
hexmask.long.byte 0x4 0.--6. 1. "CALFACT_S,CALFACT_S"
|
|
tree.end
|
|
endif
|
|
sif (cpuis("STM32L4R7*"))
|
|
tree "ADC"
|
|
base ad:0x50040000
|
|
group.long 0x0++0x1B
|
|
line.long 0x0 "ISR,interrupt and status register"
|
|
bitfld.long 0x0 10. "JQOVF,JQOVF" "0,1"
|
|
bitfld.long 0x0 9. "AWD3,AWD3" "0,1"
|
|
bitfld.long 0x0 8. "AWD2,AWD2" "0,1"
|
|
bitfld.long 0x0 7. "AWD1,AWD1" "0,1"
|
|
bitfld.long 0x0 6. "JEOS,JEOS" "0,1"
|
|
bitfld.long 0x0 5. "JEOC,JEOC" "0,1"
|
|
bitfld.long 0x0 4. "OVR,OVR" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "EOS,EOS" "0,1"
|
|
bitfld.long 0x0 2. "EOC,EOC" "0,1"
|
|
bitfld.long 0x0 1. "EOSMP,EOSMP" "0,1"
|
|
bitfld.long 0x0 0. "ADRDY,ADRDY" "0,1"
|
|
line.long 0x4 "IER,interrupt enable register"
|
|
bitfld.long 0x4 10. "JQOVFIE,JQOVFIE" "0,1"
|
|
bitfld.long 0x4 9. "AWD3IE,AWD3IE" "0,1"
|
|
bitfld.long 0x4 8. "AWD2IE,AWD2IE" "0,1"
|
|
bitfld.long 0x4 7. "AWD1IE,AWD1IE" "0,1"
|
|
bitfld.long 0x4 6. "JEOSIE,JEOSIE" "0,1"
|
|
bitfld.long 0x4 5. "JEOCIE,JEOCIE" "0,1"
|
|
bitfld.long 0x4 4. "OVRIE,OVRIE" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "EOSIE,EOSIE" "0,1"
|
|
bitfld.long 0x4 2. "EOCIE,EOCIE" "0,1"
|
|
bitfld.long 0x4 1. "EOSMPIE,EOSMPIE" "0,1"
|
|
bitfld.long 0x4 0. "ADRDYIE,ADRDYIE" "0,1"
|
|
line.long 0x8 "CR,control register"
|
|
bitfld.long 0x8 31. "ADCAL,ADCAL" "0,1"
|
|
bitfld.long 0x8 30. "ADCALDIF,ADCALDIF" "0,1"
|
|
bitfld.long 0x8 29. "DEEPPWD,DEEPPWD" "0,1"
|
|
bitfld.long 0x8 28. "ADVREGEN,ADVREGEN" "0,1"
|
|
bitfld.long 0x8 5. "JADSTP,JADSTP" "0,1"
|
|
bitfld.long 0x8 4. "ADSTP,ADSTP" "0,1"
|
|
bitfld.long 0x8 3. "JADSTART,JADSTART" "0,1"
|
|
newline
|
|
bitfld.long 0x8 2. "ADSTART,ADSTART" "0,1"
|
|
bitfld.long 0x8 1. "ADDIS,ADDIS" "0,1"
|
|
bitfld.long 0x8 0. "ADEN,ADEN" "0,1"
|
|
line.long 0xC "CFGR,configuration register"
|
|
bitfld.long 0xC 31. "JQDIS,Injected Queue disable" "0,1"
|
|
hexmask.long.byte 0xC 26.--30. 1. "AWDCH1CH,AWDCH1CH"
|
|
bitfld.long 0xC 25. "JAUTO,JAUTO" "0,1"
|
|
bitfld.long 0xC 24. "JAWD1EN,JAWD1EN" "0,1"
|
|
bitfld.long 0xC 23. "AWD1EN,AWD1EN" "0,1"
|
|
bitfld.long 0xC 22. "AWD1SGL,AWD1SGL" "0,1"
|
|
bitfld.long 0xC 21. "JQM,JQM" "0,1"
|
|
newline
|
|
bitfld.long 0xC 20. "JDISCEN,JDISCEN" "0,1"
|
|
bitfld.long 0xC 17.--19. "DISCNUM,DISCNUM" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 16. "DISCEN,DISCEN" "0,1"
|
|
bitfld.long 0xC 14. "AUTDLY,AUTDLY" "0,1"
|
|
bitfld.long 0xC 13. "CONT,CONT" "0,1"
|
|
bitfld.long 0xC 12. "OVRMOD,OVRMOD" "0,1"
|
|
bitfld.long 0xC 10.--11. "EXTEN,EXTEN" "0,1,2,3"
|
|
newline
|
|
hexmask.long.byte 0xC 6.--9. 1. "EXTSEL,EXTSEL"
|
|
bitfld.long 0xC 5. "ALIGN,ALIGN" "0,1"
|
|
bitfld.long 0xC 3.--4. "RES,RES" "0,1,2,3"
|
|
bitfld.long 0xC 1. "DMACFG,DMACFG" "0,1"
|
|
bitfld.long 0xC 0. "DMAEN,DMAEN" "0,1"
|
|
line.long 0x10 "CFGR2,configuration register"
|
|
bitfld.long 0x10 10. "ROVSM,EXTEN" "0,1"
|
|
bitfld.long 0x10 9. "TROVS,Triggered Regular" "0,1"
|
|
hexmask.long.byte 0x10 5.--8. 1. "OVSS,ALIGN"
|
|
bitfld.long 0x10 2.--4. "OVSR,RES" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 1. "JOVSE,DMACFG" "0,1"
|
|
bitfld.long 0x10 0. "ROVSE,DMAEN" "0,1"
|
|
line.long 0x14 "SMPR1,sample time register 1"
|
|
bitfld.long 0x14 31. "SMPPLUS,Addition of one clock cycle to the" "0,1"
|
|
bitfld.long 0x14 27.--29. "SMP9,SMP9" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 24.--26. "SMP8,SMP8" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 21.--23. "SMP7,SMP7" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 18.--20. "SMP6,SMP6" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 15.--17. "SMP5,SMP5" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 12.--14. "SMP4,SMP4" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x14 9.--11. "SMP3,SMP3" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 6.--8. "SMP2,SMP2" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 3.--5. "SMP1,SMP1" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 0.--2. "SMP0,SMP0" "0,1,2,3,4,5,6,7"
|
|
line.long 0x18 "SMPR2,sample time register 2"
|
|
bitfld.long 0x18 24.--26. "SMP18,SMP18" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 21.--23. "SMP17,SMP17" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 18.--20. "SMP16,SMP16" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 15.--17. "SMP15,SMP15" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 12.--14. "SMP14,SMP14" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 9.--11. "SMP13,SMP13" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 6.--8. "SMP12,SMP12" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x18 3.--5. "SMP11,SMP11" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 0.--2. "SMP10,SMP10" "0,1,2,3,4,5,6,7"
|
|
group.long 0x20++0xB
|
|
line.long 0x0 "TR1,watchdog threshold register 1"
|
|
hexmask.long.word 0x0 16.--27. 1. "HT1,HT1"
|
|
hexmask.long.word 0x0 0.--11. 1. "LT1,LT1"
|
|
line.long 0x4 "TR2,watchdog threshold register"
|
|
hexmask.long.byte 0x4 16.--23. 1. "HT2,HT2"
|
|
hexmask.long.byte 0x4 0.--7. 1. "LT2,LT2"
|
|
line.long 0x8 "TR3,watchdog threshold register 3"
|
|
hexmask.long.byte 0x8 16.--23. 1. "HT3,HT3"
|
|
hexmask.long.byte 0x8 0.--7. 1. "LT3,LT3"
|
|
group.long 0x30++0xF
|
|
line.long 0x0 "SQR1,regular sequence register 1"
|
|
hexmask.long.byte 0x0 24.--28. 1. "SQ4,SQ4"
|
|
hexmask.long.byte 0x0 18.--22. 1. "SQ3,SQ3"
|
|
hexmask.long.byte 0x0 12.--16. 1. "SQ2,SQ2"
|
|
hexmask.long.byte 0x0 6.--10. 1. "SQ1,SQ1"
|
|
hexmask.long.byte 0x0 0.--3. 1. "L,Regular channel sequence"
|
|
line.long 0x4 "SQR2,regular sequence register 2"
|
|
hexmask.long.byte 0x4 24.--28. 1. "SQ9,SQ9"
|
|
hexmask.long.byte 0x4 18.--22. 1. "SQ8,SQ8"
|
|
hexmask.long.byte 0x4 12.--16. 1. "SQ7,SQ7"
|
|
hexmask.long.byte 0x4 6.--10. 1. "SQ6,SQ6"
|
|
hexmask.long.byte 0x4 0.--4. 1. "SQ5,SQ5"
|
|
line.long 0x8 "SQR3,regular sequence register 3"
|
|
hexmask.long.byte 0x8 24.--28. 1. "SQ14,SQ14"
|
|
hexmask.long.byte 0x8 18.--22. 1. "SQ13,SQ13"
|
|
hexmask.long.byte 0x8 12.--16. 1. "SQ12,SQ12"
|
|
hexmask.long.byte 0x8 6.--10. 1. "SQ11,SQ11"
|
|
hexmask.long.byte 0x8 0.--4. 1. "SQ10,SQ10"
|
|
line.long 0xC "SQR4,regular sequence register 4"
|
|
hexmask.long.byte 0xC 6.--10. 1. "SQ16,SQ16"
|
|
hexmask.long.byte 0xC 0.--4. 1. "SQ15,SQ15"
|
|
rgroup.long 0x40++0x3
|
|
line.long 0x0 "DR,regular Data Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "RDATA,Regular Data converted"
|
|
group.long 0x4C++0x3
|
|
line.long 0x0 "JSQR,injected sequence register"
|
|
hexmask.long.byte 0x0 26.--30. 1. "JSQ4,JSQ4"
|
|
hexmask.long.byte 0x0 20.--24. 1. "JSQ3,JSQ3"
|
|
hexmask.long.byte 0x0 14.--18. 1. "JSQ2,JSQ2"
|
|
hexmask.long.byte 0x0 8.--12. 1. "JSQ1,JSQ1"
|
|
bitfld.long 0x0 6.--7. "JEXTEN,JEXTEN" "0,1,2,3"
|
|
hexmask.long.byte 0x0 2.--5. 1. "JEXTSEL,JEXTSEL"
|
|
bitfld.long 0x0 0.--1. "JL,JL" "0,1,2,3"
|
|
group.long 0x60++0xF
|
|
line.long 0x0 "OFR1,offset register 1"
|
|
bitfld.long 0x0 31. "OFFSET1_EN,OFFSET1_EN" "0,1"
|
|
hexmask.long.byte 0x0 26.--30. 1. "OFFSET1_CH,OFFSET1_CH"
|
|
hexmask.long.word 0x0 0.--11. 1. "OFFSET1,OFFSET1"
|
|
line.long 0x4 "OFR2,offset register 2"
|
|
bitfld.long 0x4 31. "OFFSET2_EN,OFFSET2_EN" "0,1"
|
|
hexmask.long.byte 0x4 26.--30. 1. "OFFSET2_CH,OFFSET2_CH"
|
|
hexmask.long.word 0x4 0.--11. 1. "OFFSET2,OFFSET2"
|
|
line.long 0x8 "OFR3,offset register 3"
|
|
bitfld.long 0x8 31. "OFFSET3_EN,OFFSET3_EN" "0,1"
|
|
hexmask.long.byte 0x8 26.--30. 1. "OFFSET3_CH,OFFSET3_CH"
|
|
hexmask.long.word 0x8 0.--11. 1. "OFFSET3,OFFSET3"
|
|
line.long 0xC "OFR4,offset register 4"
|
|
bitfld.long 0xC 31. "OFFSET4_EN,OFFSET4_EN" "0,1"
|
|
hexmask.long.byte 0xC 26.--30. 1. "OFFSET4_CH,OFFSET4_CH"
|
|
hexmask.long.word 0xC 0.--11. 1. "OFFSET4,OFFSET4"
|
|
rgroup.long 0x80++0xF
|
|
line.long 0x0 "JDR1,injected data register 1"
|
|
hexmask.long.word 0x0 0.--15. 1. "JDATA1,JDATA1"
|
|
line.long 0x4 "JDR2,injected data register 2"
|
|
hexmask.long.word 0x4 0.--15. 1. "JDATA2,JDATA2"
|
|
line.long 0x8 "JDR3,injected data register 3"
|
|
hexmask.long.word 0x8 0.--15. 1. "JDATA3,JDATA3"
|
|
line.long 0xC "JDR4,injected data register 4"
|
|
hexmask.long.word 0xC 0.--15. 1. "JDATA4,JDATA4"
|
|
group.long 0xA0++0x7
|
|
line.long 0x0 "AWD2CR,Analog Watchdog 2 Configuration"
|
|
hexmask.long.tbyte 0x0 0.--17. 1. "AWD2CH,AWD2CH"
|
|
line.long 0x4 "AWD3CR,Analog Watchdog 3 Configuration"
|
|
hexmask.long.tbyte 0x4 0.--17. 1. "AWD3CH,AWD3CH"
|
|
group.long 0xB0++0x7
|
|
line.long 0x0 "DIFSEL,Differential Mode Selection Register"
|
|
rbitfld.long 0x0 16.--18. "DIFSEL_16_18,Differential mode for channels 18 to" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x0 1.--15. 1. "DIFSEL_1_15,Differential mode for channels 15 to"
|
|
line.long 0x4 "CALFACT,Calibration Factors"
|
|
hexmask.long.byte 0x4 16.--22. 1. "CALFACT_D,CALFACT_D"
|
|
hexmask.long.byte 0x4 0.--6. 1. "CALFACT_S,CALFACT_S"
|
|
tree.end
|
|
endif
|
|
sif (cpuis("STM32L4R9*"))
|
|
tree "ADC"
|
|
base ad:0x50040000
|
|
group.long 0x0++0x1B
|
|
line.long 0x0 "ISR,interrupt and status register"
|
|
bitfld.long 0x0 10. "JQOVF,JQOVF" "0,1"
|
|
bitfld.long 0x0 9. "AWD3,AWD3" "0,1"
|
|
bitfld.long 0x0 8. "AWD2,AWD2" "0,1"
|
|
bitfld.long 0x0 7. "AWD1,AWD1" "0,1"
|
|
bitfld.long 0x0 6. "JEOS,JEOS" "0,1"
|
|
bitfld.long 0x0 5. "JEOC,JEOC" "0,1"
|
|
bitfld.long 0x0 4. "OVR,OVR" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "EOS,EOS" "0,1"
|
|
bitfld.long 0x0 2. "EOC,EOC" "0,1"
|
|
bitfld.long 0x0 1. "EOSMP,EOSMP" "0,1"
|
|
bitfld.long 0x0 0. "ADRDY,ADRDY" "0,1"
|
|
line.long 0x4 "IER,interrupt enable register"
|
|
bitfld.long 0x4 10. "JQOVFIE,JQOVFIE" "0,1"
|
|
bitfld.long 0x4 9. "AWD3IE,AWD3IE" "0,1"
|
|
bitfld.long 0x4 8. "AWD2IE,AWD2IE" "0,1"
|
|
bitfld.long 0x4 7. "AWD1IE,AWD1IE" "0,1"
|
|
bitfld.long 0x4 6. "JEOSIE,JEOSIE" "0,1"
|
|
bitfld.long 0x4 5. "JEOCIE,JEOCIE" "0,1"
|
|
bitfld.long 0x4 4. "OVRIE,OVRIE" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "EOSIE,EOSIE" "0,1"
|
|
bitfld.long 0x4 2. "EOCIE,EOCIE" "0,1"
|
|
bitfld.long 0x4 1. "EOSMPIE,EOSMPIE" "0,1"
|
|
bitfld.long 0x4 0. "ADRDYIE,ADRDYIE" "0,1"
|
|
line.long 0x8 "CR,control register"
|
|
bitfld.long 0x8 31. "ADCAL,ADCAL" "0,1"
|
|
bitfld.long 0x8 30. "ADCALDIF,ADCALDIF" "0,1"
|
|
bitfld.long 0x8 29. "DEEPPWD,DEEPPWD" "0,1"
|
|
bitfld.long 0x8 28. "ADVREGEN,ADVREGEN" "0,1"
|
|
bitfld.long 0x8 5. "JADSTP,JADSTP" "0,1"
|
|
bitfld.long 0x8 4. "ADSTP,ADSTP" "0,1"
|
|
bitfld.long 0x8 3. "JADSTART,JADSTART" "0,1"
|
|
newline
|
|
bitfld.long 0x8 2. "ADSTART,ADSTART" "0,1"
|
|
bitfld.long 0x8 1. "ADDIS,ADDIS" "0,1"
|
|
bitfld.long 0x8 0. "ADEN,ADEN" "0,1"
|
|
line.long 0xC "CFGR,configuration register"
|
|
bitfld.long 0xC 31. "JQDIS,Injected Queue disable" "0,1"
|
|
hexmask.long.byte 0xC 26.--30. 1. "AWDCH1CH,AWDCH1CH"
|
|
bitfld.long 0xC 25. "JAUTO,JAUTO" "0,1"
|
|
bitfld.long 0xC 24. "JAWD1EN,JAWD1EN" "0,1"
|
|
bitfld.long 0xC 23. "AWD1EN,AWD1EN" "0,1"
|
|
bitfld.long 0xC 22. "AWD1SGL,AWD1SGL" "0,1"
|
|
bitfld.long 0xC 21. "JQM,JQM" "0,1"
|
|
newline
|
|
bitfld.long 0xC 20. "JDISCEN,JDISCEN" "0,1"
|
|
bitfld.long 0xC 17.--19. "DISCNUM,DISCNUM" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 16. "DISCEN,DISCEN" "0,1"
|
|
bitfld.long 0xC 14. "AUTDLY,AUTDLY" "0,1"
|
|
bitfld.long 0xC 13. "CONT,CONT" "0,1"
|
|
bitfld.long 0xC 12. "OVRMOD,OVRMOD" "0,1"
|
|
bitfld.long 0xC 10.--11. "EXTEN,EXTEN" "0,1,2,3"
|
|
newline
|
|
hexmask.long.byte 0xC 6.--9. 1. "EXTSEL,EXTSEL"
|
|
bitfld.long 0xC 5. "ALIGN,ALIGN" "0,1"
|
|
bitfld.long 0xC 3.--4. "RES,RES" "0,1,2,3"
|
|
bitfld.long 0xC 1. "DMACFG,DMACFG" "0,1"
|
|
bitfld.long 0xC 0. "DMAEN,DMAEN" "0,1"
|
|
line.long 0x10 "CFGR2,configuration register"
|
|
bitfld.long 0x10 10. "ROVSM,EXTEN" "0,1"
|
|
bitfld.long 0x10 9. "TROVS,Triggered Regular" "0,1"
|
|
hexmask.long.byte 0x10 5.--8. 1. "OVSS,ALIGN"
|
|
bitfld.long 0x10 2.--4. "OVSR,RES" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 1. "JOVSE,DMACFG" "0,1"
|
|
bitfld.long 0x10 0. "ROVSE,DMAEN" "0,1"
|
|
line.long 0x14 "SMPR1,sample time register 1"
|
|
bitfld.long 0x14 31. "SMPPLUS,Addition of one clock cycle to the" "0,1"
|
|
bitfld.long 0x14 27.--29. "SMP9,SMP9" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 24.--26. "SMP8,SMP8" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 21.--23. "SMP7,SMP7" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 18.--20. "SMP6,SMP6" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 15.--17. "SMP5,SMP5" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 12.--14. "SMP4,SMP4" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x14 9.--11. "SMP3,SMP3" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 6.--8. "SMP2,SMP2" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 3.--5. "SMP1,SMP1" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 0.--2. "SMP0,SMP0" "0,1,2,3,4,5,6,7"
|
|
line.long 0x18 "SMPR2,sample time register 2"
|
|
bitfld.long 0x18 24.--26. "SMP18,SMP18" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 21.--23. "SMP17,SMP17" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 18.--20. "SMP16,SMP16" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 15.--17. "SMP15,SMP15" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 12.--14. "SMP14,SMP14" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 9.--11. "SMP13,SMP13" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 6.--8. "SMP12,SMP12" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x18 3.--5. "SMP11,SMP11" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 0.--2. "SMP10,SMP10" "0,1,2,3,4,5,6,7"
|
|
group.long 0x20++0xB
|
|
line.long 0x0 "TR1,watchdog threshold register 1"
|
|
hexmask.long.word 0x0 16.--27. 1. "HT1,HT1"
|
|
hexmask.long.word 0x0 0.--11. 1. "LT1,LT1"
|
|
line.long 0x4 "TR2,watchdog threshold register"
|
|
hexmask.long.byte 0x4 16.--23. 1. "HT2,HT2"
|
|
hexmask.long.byte 0x4 0.--7. 1. "LT2,LT2"
|
|
line.long 0x8 "TR3,watchdog threshold register 3"
|
|
hexmask.long.byte 0x8 16.--23. 1. "HT3,HT3"
|
|
hexmask.long.byte 0x8 0.--7. 1. "LT3,LT3"
|
|
group.long 0x30++0xF
|
|
line.long 0x0 "SQR1,regular sequence register 1"
|
|
hexmask.long.byte 0x0 24.--28. 1. "SQ4,SQ4"
|
|
hexmask.long.byte 0x0 18.--22. 1. "SQ3,SQ3"
|
|
hexmask.long.byte 0x0 12.--16. 1. "SQ2,SQ2"
|
|
hexmask.long.byte 0x0 6.--10. 1. "SQ1,SQ1"
|
|
hexmask.long.byte 0x0 0.--3. 1. "L,Regular channel sequence"
|
|
line.long 0x4 "SQR2,regular sequence register 2"
|
|
hexmask.long.byte 0x4 24.--28. 1. "SQ9,SQ9"
|
|
hexmask.long.byte 0x4 18.--22. 1. "SQ8,SQ8"
|
|
hexmask.long.byte 0x4 12.--16. 1. "SQ7,SQ7"
|
|
hexmask.long.byte 0x4 6.--10. 1. "SQ6,SQ6"
|
|
hexmask.long.byte 0x4 0.--4. 1. "SQ5,SQ5"
|
|
line.long 0x8 "SQR3,regular sequence register 3"
|
|
hexmask.long.byte 0x8 24.--28. 1. "SQ14,SQ14"
|
|
hexmask.long.byte 0x8 18.--22. 1. "SQ13,SQ13"
|
|
hexmask.long.byte 0x8 12.--16. 1. "SQ12,SQ12"
|
|
hexmask.long.byte 0x8 6.--10. 1. "SQ11,SQ11"
|
|
hexmask.long.byte 0x8 0.--4. 1. "SQ10,SQ10"
|
|
line.long 0xC "SQR4,regular sequence register 4"
|
|
hexmask.long.byte 0xC 6.--10. 1. "SQ16,SQ16"
|
|
hexmask.long.byte 0xC 0.--4. 1. "SQ15,SQ15"
|
|
rgroup.long 0x40++0x3
|
|
line.long 0x0 "DR,regular Data Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "RDATA,Regular Data converted"
|
|
group.long 0x4C++0x3
|
|
line.long 0x0 "JSQR,injected sequence register"
|
|
hexmask.long.byte 0x0 26.--30. 1. "JSQ4,JSQ4"
|
|
hexmask.long.byte 0x0 20.--24. 1. "JSQ3,JSQ3"
|
|
hexmask.long.byte 0x0 14.--18. 1. "JSQ2,JSQ2"
|
|
hexmask.long.byte 0x0 8.--12. 1. "JSQ1,JSQ1"
|
|
bitfld.long 0x0 6.--7. "JEXTEN,JEXTEN" "0,1,2,3"
|
|
hexmask.long.byte 0x0 2.--5. 1. "JEXTSEL,JEXTSEL"
|
|
bitfld.long 0x0 0.--1. "JL,JL" "0,1,2,3"
|
|
group.long 0x60++0xF
|
|
line.long 0x0 "OFR1,offset register 1"
|
|
bitfld.long 0x0 31. "OFFSET1_EN,OFFSET1_EN" "0,1"
|
|
hexmask.long.byte 0x0 26.--30. 1. "OFFSET1_CH,OFFSET1_CH"
|
|
hexmask.long.word 0x0 0.--11. 1. "OFFSET1,OFFSET1"
|
|
line.long 0x4 "OFR2,offset register 2"
|
|
bitfld.long 0x4 31. "OFFSET2_EN,OFFSET2_EN" "0,1"
|
|
hexmask.long.byte 0x4 26.--30. 1. "OFFSET2_CH,OFFSET2_CH"
|
|
hexmask.long.word 0x4 0.--11. 1. "OFFSET2,OFFSET2"
|
|
line.long 0x8 "OFR3,offset register 3"
|
|
bitfld.long 0x8 31. "OFFSET3_EN,OFFSET3_EN" "0,1"
|
|
hexmask.long.byte 0x8 26.--30. 1. "OFFSET3_CH,OFFSET3_CH"
|
|
hexmask.long.word 0x8 0.--11. 1. "OFFSET3,OFFSET3"
|
|
line.long 0xC "OFR4,offset register 4"
|
|
bitfld.long 0xC 31. "OFFSET4_EN,OFFSET4_EN" "0,1"
|
|
hexmask.long.byte 0xC 26.--30. 1. "OFFSET4_CH,OFFSET4_CH"
|
|
hexmask.long.word 0xC 0.--11. 1. "OFFSET4,OFFSET4"
|
|
rgroup.long 0x80++0xF
|
|
line.long 0x0 "JDR1,injected data register 1"
|
|
hexmask.long.word 0x0 0.--15. 1. "JDATA1,JDATA1"
|
|
line.long 0x4 "JDR2,injected data register 2"
|
|
hexmask.long.word 0x4 0.--15. 1. "JDATA2,JDATA2"
|
|
line.long 0x8 "JDR3,injected data register 3"
|
|
hexmask.long.word 0x8 0.--15. 1. "JDATA3,JDATA3"
|
|
line.long 0xC "JDR4,injected data register 4"
|
|
hexmask.long.word 0xC 0.--15. 1. "JDATA4,JDATA4"
|
|
group.long 0xA0++0x7
|
|
line.long 0x0 "AWD2CR,Analog Watchdog 2 Configuration"
|
|
hexmask.long.tbyte 0x0 0.--17. 1. "AWD2CH,AWD2CH"
|
|
line.long 0x4 "AWD3CR,Analog Watchdog 3 Configuration"
|
|
hexmask.long.tbyte 0x4 0.--17. 1. "AWD3CH,AWD3CH"
|
|
group.long 0xB0++0x7
|
|
line.long 0x0 "DIFSEL,Differential Mode Selection Register"
|
|
rbitfld.long 0x0 16.--18. "DIFSEL_16_18,Differential mode for channels 18 to" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x0 1.--15. 1. "DIFSEL_1_15,Differential mode for channels 15 to"
|
|
line.long 0x4 "CALFACT,Calibration Factors"
|
|
hexmask.long.byte 0x4 16.--22. 1. "CALFACT_D,CALFACT_D"
|
|
hexmask.long.byte 0x4 0.--6. 1. "CALFACT_S,CALFACT_S"
|
|
tree.end
|
|
endif
|
|
sif (cpuis("STM32L4S5*"))
|
|
tree "ADC"
|
|
base ad:0x50040000
|
|
group.long 0x0++0x1B
|
|
line.long 0x0 "ISR,interrupt and status register"
|
|
bitfld.long 0x0 10. "JQOVF,JQOVF" "0,1"
|
|
bitfld.long 0x0 9. "AWD3,AWD3" "0,1"
|
|
bitfld.long 0x0 8. "AWD2,AWD2" "0,1"
|
|
bitfld.long 0x0 7. "AWD1,AWD1" "0,1"
|
|
bitfld.long 0x0 6. "JEOS,JEOS" "0,1"
|
|
bitfld.long 0x0 5. "JEOC,JEOC" "0,1"
|
|
bitfld.long 0x0 4. "OVR,OVR" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "EOS,EOS" "0,1"
|
|
bitfld.long 0x0 2. "EOC,EOC" "0,1"
|
|
bitfld.long 0x0 1. "EOSMP,EOSMP" "0,1"
|
|
bitfld.long 0x0 0. "ADRDY,ADRDY" "0,1"
|
|
line.long 0x4 "IER,interrupt enable register"
|
|
bitfld.long 0x4 10. "JQOVFIE,JQOVFIE" "0,1"
|
|
bitfld.long 0x4 9. "AWD3IE,AWD3IE" "0,1"
|
|
bitfld.long 0x4 8. "AWD2IE,AWD2IE" "0,1"
|
|
bitfld.long 0x4 7. "AWD1IE,AWD1IE" "0,1"
|
|
bitfld.long 0x4 6. "JEOSIE,JEOSIE" "0,1"
|
|
bitfld.long 0x4 5. "JEOCIE,JEOCIE" "0,1"
|
|
bitfld.long 0x4 4. "OVRIE,OVRIE" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "EOSIE,EOSIE" "0,1"
|
|
bitfld.long 0x4 2. "EOCIE,EOCIE" "0,1"
|
|
bitfld.long 0x4 1. "EOSMPIE,EOSMPIE" "0,1"
|
|
bitfld.long 0x4 0. "ADRDYIE,ADRDYIE" "0,1"
|
|
line.long 0x8 "CR,control register"
|
|
bitfld.long 0x8 31. "ADCAL,ADCAL" "0,1"
|
|
bitfld.long 0x8 30. "ADCALDIF,ADCALDIF" "0,1"
|
|
bitfld.long 0x8 29. "DEEPPWD,DEEPPWD" "0,1"
|
|
bitfld.long 0x8 28. "ADVREGEN,ADVREGEN" "0,1"
|
|
bitfld.long 0x8 5. "JADSTP,JADSTP" "0,1"
|
|
bitfld.long 0x8 4. "ADSTP,ADSTP" "0,1"
|
|
bitfld.long 0x8 3. "JADSTART,JADSTART" "0,1"
|
|
newline
|
|
bitfld.long 0x8 2. "ADSTART,ADSTART" "0,1"
|
|
bitfld.long 0x8 1. "ADDIS,ADDIS" "0,1"
|
|
bitfld.long 0x8 0. "ADEN,ADEN" "0,1"
|
|
line.long 0xC "CFGR,configuration register"
|
|
bitfld.long 0xC 31. "JQDIS,Injected Queue disable" "0,1"
|
|
hexmask.long.byte 0xC 26.--30. 1. "AWDCH1CH,AWDCH1CH"
|
|
bitfld.long 0xC 25. "JAUTO,JAUTO" "0,1"
|
|
bitfld.long 0xC 24. "JAWD1EN,JAWD1EN" "0,1"
|
|
bitfld.long 0xC 23. "AWD1EN,AWD1EN" "0,1"
|
|
bitfld.long 0xC 22. "AWD1SGL,AWD1SGL" "0,1"
|
|
bitfld.long 0xC 21. "JQM,JQM" "0,1"
|
|
newline
|
|
bitfld.long 0xC 20. "JDISCEN,JDISCEN" "0,1"
|
|
bitfld.long 0xC 17.--19. "DISCNUM,DISCNUM" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 16. "DISCEN,DISCEN" "0,1"
|
|
bitfld.long 0xC 14. "AUTDLY,AUTDLY" "0,1"
|
|
bitfld.long 0xC 13. "CONT,CONT" "0,1"
|
|
bitfld.long 0xC 12. "OVRMOD,OVRMOD" "0,1"
|
|
bitfld.long 0xC 10.--11. "EXTEN,EXTEN" "0,1,2,3"
|
|
newline
|
|
hexmask.long.byte 0xC 6.--9. 1. "EXTSEL,EXTSEL"
|
|
bitfld.long 0xC 5. "ALIGN,ALIGN" "0,1"
|
|
bitfld.long 0xC 3.--4. "RES,RES" "0,1,2,3"
|
|
bitfld.long 0xC 1. "DMACFG,DMACFG" "0,1"
|
|
bitfld.long 0xC 0. "DMAEN,DMAEN" "0,1"
|
|
line.long 0x10 "CFGR2,configuration register"
|
|
bitfld.long 0x10 10. "ROVSM,EXTEN" "0,1"
|
|
bitfld.long 0x10 9. "TROVS,Triggered Regular" "0,1"
|
|
hexmask.long.byte 0x10 5.--8. 1. "OVSS,ALIGN"
|
|
bitfld.long 0x10 2.--4. "OVSR,RES" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 1. "JOVSE,DMACFG" "0,1"
|
|
bitfld.long 0x10 0. "ROVSE,DMAEN" "0,1"
|
|
line.long 0x14 "SMPR1,sample time register 1"
|
|
bitfld.long 0x14 31. "SMPPLUS,Addition of one clock cycle to the" "0,1"
|
|
bitfld.long 0x14 27.--29. "SMP9,SMP9" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 24.--26. "SMP8,SMP8" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 21.--23. "SMP7,SMP7" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 18.--20. "SMP6,SMP6" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 15.--17. "SMP5,SMP5" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 12.--14. "SMP4,SMP4" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x14 9.--11. "SMP3,SMP3" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 6.--8. "SMP2,SMP2" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 3.--5. "SMP1,SMP1" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 0.--2. "SMP0,SMP0" "0,1,2,3,4,5,6,7"
|
|
line.long 0x18 "SMPR2,sample time register 2"
|
|
bitfld.long 0x18 24.--26. "SMP18,SMP18" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 21.--23. "SMP17,SMP17" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 18.--20. "SMP16,SMP16" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 15.--17. "SMP15,SMP15" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 12.--14. "SMP14,SMP14" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 9.--11. "SMP13,SMP13" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 6.--8. "SMP12,SMP12" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x18 3.--5. "SMP11,SMP11" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 0.--2. "SMP10,SMP10" "0,1,2,3,4,5,6,7"
|
|
group.long 0x20++0xB
|
|
line.long 0x0 "TR1,watchdog threshold register 1"
|
|
hexmask.long.word 0x0 16.--27. 1. "HT1,HT1"
|
|
hexmask.long.word 0x0 0.--11. 1. "LT1,LT1"
|
|
line.long 0x4 "TR2,watchdog threshold register"
|
|
hexmask.long.byte 0x4 16.--23. 1. "HT2,HT2"
|
|
hexmask.long.byte 0x4 0.--7. 1. "LT2,LT2"
|
|
line.long 0x8 "TR3,watchdog threshold register 3"
|
|
hexmask.long.byte 0x8 16.--23. 1. "HT3,HT3"
|
|
hexmask.long.byte 0x8 0.--7. 1. "LT3,LT3"
|
|
group.long 0x30++0xF
|
|
line.long 0x0 "SQR1,regular sequence register 1"
|
|
hexmask.long.byte 0x0 24.--28. 1. "SQ4,SQ4"
|
|
hexmask.long.byte 0x0 18.--22. 1. "SQ3,SQ3"
|
|
hexmask.long.byte 0x0 12.--16. 1. "SQ2,SQ2"
|
|
hexmask.long.byte 0x0 6.--10. 1. "SQ1,SQ1"
|
|
hexmask.long.byte 0x0 0.--3. 1. "L,Regular channel sequence"
|
|
line.long 0x4 "SQR2,regular sequence register 2"
|
|
hexmask.long.byte 0x4 24.--28. 1. "SQ9,SQ9"
|
|
hexmask.long.byte 0x4 18.--22. 1. "SQ8,SQ8"
|
|
hexmask.long.byte 0x4 12.--16. 1. "SQ7,SQ7"
|
|
hexmask.long.byte 0x4 6.--10. 1. "SQ6,SQ6"
|
|
hexmask.long.byte 0x4 0.--4. 1. "SQ5,SQ5"
|
|
line.long 0x8 "SQR3,regular sequence register 3"
|
|
hexmask.long.byte 0x8 24.--28. 1. "SQ14,SQ14"
|
|
hexmask.long.byte 0x8 18.--22. 1. "SQ13,SQ13"
|
|
hexmask.long.byte 0x8 12.--16. 1. "SQ12,SQ12"
|
|
hexmask.long.byte 0x8 6.--10. 1. "SQ11,SQ11"
|
|
hexmask.long.byte 0x8 0.--4. 1. "SQ10,SQ10"
|
|
line.long 0xC "SQR4,regular sequence register 4"
|
|
hexmask.long.byte 0xC 6.--10. 1. "SQ16,SQ16"
|
|
hexmask.long.byte 0xC 0.--4. 1. "SQ15,SQ15"
|
|
rgroup.long 0x40++0x3
|
|
line.long 0x0 "DR,regular Data Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "RDATA,Regular Data converted"
|
|
group.long 0x4C++0x3
|
|
line.long 0x0 "JSQR,injected sequence register"
|
|
hexmask.long.byte 0x0 26.--30. 1. "JSQ4,JSQ4"
|
|
hexmask.long.byte 0x0 20.--24. 1. "JSQ3,JSQ3"
|
|
hexmask.long.byte 0x0 14.--18. 1. "JSQ2,JSQ2"
|
|
hexmask.long.byte 0x0 8.--12. 1. "JSQ1,JSQ1"
|
|
bitfld.long 0x0 6.--7. "JEXTEN,JEXTEN" "0,1,2,3"
|
|
hexmask.long.byte 0x0 2.--5. 1. "JEXTSEL,JEXTSEL"
|
|
bitfld.long 0x0 0.--1. "JL,JL" "0,1,2,3"
|
|
group.long 0x60++0xF
|
|
line.long 0x0 "OFR1,offset register 1"
|
|
bitfld.long 0x0 31. "OFFSET1_EN,OFFSET1_EN" "0,1"
|
|
hexmask.long.byte 0x0 26.--30. 1. "OFFSET1_CH,OFFSET1_CH"
|
|
hexmask.long.word 0x0 0.--11. 1. "OFFSET1,OFFSET1"
|
|
line.long 0x4 "OFR2,offset register 2"
|
|
bitfld.long 0x4 31. "OFFSET2_EN,OFFSET2_EN" "0,1"
|
|
hexmask.long.byte 0x4 26.--30. 1. "OFFSET2_CH,OFFSET2_CH"
|
|
hexmask.long.word 0x4 0.--11. 1. "OFFSET2,OFFSET2"
|
|
line.long 0x8 "OFR3,offset register 3"
|
|
bitfld.long 0x8 31. "OFFSET3_EN,OFFSET3_EN" "0,1"
|
|
hexmask.long.byte 0x8 26.--30. 1. "OFFSET3_CH,OFFSET3_CH"
|
|
hexmask.long.word 0x8 0.--11. 1. "OFFSET3,OFFSET3"
|
|
line.long 0xC "OFR4,offset register 4"
|
|
bitfld.long 0xC 31. "OFFSET4_EN,OFFSET4_EN" "0,1"
|
|
hexmask.long.byte 0xC 26.--30. 1. "OFFSET4_CH,OFFSET4_CH"
|
|
hexmask.long.word 0xC 0.--11. 1. "OFFSET4,OFFSET4"
|
|
rgroup.long 0x80++0xF
|
|
line.long 0x0 "JDR1,injected data register 1"
|
|
hexmask.long.word 0x0 0.--15. 1. "JDATA1,JDATA1"
|
|
line.long 0x4 "JDR2,injected data register 2"
|
|
hexmask.long.word 0x4 0.--15. 1. "JDATA2,JDATA2"
|
|
line.long 0x8 "JDR3,injected data register 3"
|
|
hexmask.long.word 0x8 0.--15. 1. "JDATA3,JDATA3"
|
|
line.long 0xC "JDR4,injected data register 4"
|
|
hexmask.long.word 0xC 0.--15. 1. "JDATA4,JDATA4"
|
|
group.long 0xA0++0x7
|
|
line.long 0x0 "AWD2CR,Analog Watchdog 2 Configuration"
|
|
hexmask.long.tbyte 0x0 0.--17. 1. "AWD2CH,AWD2CH"
|
|
line.long 0x4 "AWD3CR,Analog Watchdog 3 Configuration"
|
|
hexmask.long.tbyte 0x4 0.--17. 1. "AWD3CH,AWD3CH"
|
|
group.long 0xB0++0x7
|
|
line.long 0x0 "DIFSEL,Differential Mode Selection Register"
|
|
rbitfld.long 0x0 16.--18. "DIFSEL_16_18,Differential mode for channels 18 to" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x0 1.--15. 1. "DIFSEL_1_15,Differential mode for channels 15 to"
|
|
line.long 0x4 "CALFACT,Calibration Factors"
|
|
hexmask.long.byte 0x4 16.--22. 1. "CALFACT_D,CALFACT_D"
|
|
hexmask.long.byte 0x4 0.--6. 1. "CALFACT_S,CALFACT_S"
|
|
tree.end
|
|
endif
|
|
sif (cpuis("STM32L4S7*"))
|
|
tree "ADC"
|
|
base ad:0x50040000
|
|
group.long 0x0++0x1B
|
|
line.long 0x0 "ISR,interrupt and status register"
|
|
bitfld.long 0x0 10. "JQOVF,JQOVF" "0,1"
|
|
bitfld.long 0x0 9. "AWD3,AWD3" "0,1"
|
|
bitfld.long 0x0 8. "AWD2,AWD2" "0,1"
|
|
bitfld.long 0x0 7. "AWD1,AWD1" "0,1"
|
|
bitfld.long 0x0 6. "JEOS,JEOS" "0,1"
|
|
bitfld.long 0x0 5. "JEOC,JEOC" "0,1"
|
|
bitfld.long 0x0 4. "OVR,OVR" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "EOS,EOS" "0,1"
|
|
bitfld.long 0x0 2. "EOC,EOC" "0,1"
|
|
bitfld.long 0x0 1. "EOSMP,EOSMP" "0,1"
|
|
bitfld.long 0x0 0. "ADRDY,ADRDY" "0,1"
|
|
line.long 0x4 "IER,interrupt enable register"
|
|
bitfld.long 0x4 10. "JQOVFIE,JQOVFIE" "0,1"
|
|
bitfld.long 0x4 9. "AWD3IE,AWD3IE" "0,1"
|
|
bitfld.long 0x4 8. "AWD2IE,AWD2IE" "0,1"
|
|
bitfld.long 0x4 7. "AWD1IE,AWD1IE" "0,1"
|
|
bitfld.long 0x4 6. "JEOSIE,JEOSIE" "0,1"
|
|
bitfld.long 0x4 5. "JEOCIE,JEOCIE" "0,1"
|
|
bitfld.long 0x4 4. "OVRIE,OVRIE" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "EOSIE,EOSIE" "0,1"
|
|
bitfld.long 0x4 2. "EOCIE,EOCIE" "0,1"
|
|
bitfld.long 0x4 1. "EOSMPIE,EOSMPIE" "0,1"
|
|
bitfld.long 0x4 0. "ADRDYIE,ADRDYIE" "0,1"
|
|
line.long 0x8 "CR,control register"
|
|
bitfld.long 0x8 31. "ADCAL,ADCAL" "0,1"
|
|
bitfld.long 0x8 30. "ADCALDIF,ADCALDIF" "0,1"
|
|
bitfld.long 0x8 29. "DEEPPWD,DEEPPWD" "0,1"
|
|
bitfld.long 0x8 28. "ADVREGEN,ADVREGEN" "0,1"
|
|
bitfld.long 0x8 5. "JADSTP,JADSTP" "0,1"
|
|
bitfld.long 0x8 4. "ADSTP,ADSTP" "0,1"
|
|
bitfld.long 0x8 3. "JADSTART,JADSTART" "0,1"
|
|
newline
|
|
bitfld.long 0x8 2. "ADSTART,ADSTART" "0,1"
|
|
bitfld.long 0x8 1. "ADDIS,ADDIS" "0,1"
|
|
bitfld.long 0x8 0. "ADEN,ADEN" "0,1"
|
|
line.long 0xC "CFGR,configuration register"
|
|
bitfld.long 0xC 31. "JQDIS,Injected Queue disable" "0,1"
|
|
hexmask.long.byte 0xC 26.--30. 1. "AWDCH1CH,AWDCH1CH"
|
|
bitfld.long 0xC 25. "JAUTO,JAUTO" "0,1"
|
|
bitfld.long 0xC 24. "JAWD1EN,JAWD1EN" "0,1"
|
|
bitfld.long 0xC 23. "AWD1EN,AWD1EN" "0,1"
|
|
bitfld.long 0xC 22. "AWD1SGL,AWD1SGL" "0,1"
|
|
bitfld.long 0xC 21. "JQM,JQM" "0,1"
|
|
newline
|
|
bitfld.long 0xC 20. "JDISCEN,JDISCEN" "0,1"
|
|
bitfld.long 0xC 17.--19. "DISCNUM,DISCNUM" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 16. "DISCEN,DISCEN" "0,1"
|
|
bitfld.long 0xC 14. "AUTDLY,AUTDLY" "0,1"
|
|
bitfld.long 0xC 13. "CONT,CONT" "0,1"
|
|
bitfld.long 0xC 12. "OVRMOD,OVRMOD" "0,1"
|
|
bitfld.long 0xC 10.--11. "EXTEN,EXTEN" "0,1,2,3"
|
|
newline
|
|
hexmask.long.byte 0xC 6.--9. 1. "EXTSEL,EXTSEL"
|
|
bitfld.long 0xC 5. "ALIGN,ALIGN" "0,1"
|
|
bitfld.long 0xC 3.--4. "RES,RES" "0,1,2,3"
|
|
bitfld.long 0xC 1. "DMACFG,DMACFG" "0,1"
|
|
bitfld.long 0xC 0. "DMAEN,DMAEN" "0,1"
|
|
line.long 0x10 "CFGR2,configuration register"
|
|
bitfld.long 0x10 10. "ROVSM,EXTEN" "0,1"
|
|
bitfld.long 0x10 9. "TROVS,Triggered Regular" "0,1"
|
|
hexmask.long.byte 0x10 5.--8. 1. "OVSS,ALIGN"
|
|
bitfld.long 0x10 2.--4. "OVSR,RES" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 1. "JOVSE,DMACFG" "0,1"
|
|
bitfld.long 0x10 0. "ROVSE,DMAEN" "0,1"
|
|
line.long 0x14 "SMPR1,sample time register 1"
|
|
bitfld.long 0x14 31. "SMPPLUS,Addition of one clock cycle to the" "0,1"
|
|
bitfld.long 0x14 27.--29. "SMP9,SMP9" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 24.--26. "SMP8,SMP8" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 21.--23. "SMP7,SMP7" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 18.--20. "SMP6,SMP6" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 15.--17. "SMP5,SMP5" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 12.--14. "SMP4,SMP4" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x14 9.--11. "SMP3,SMP3" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 6.--8. "SMP2,SMP2" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 3.--5. "SMP1,SMP1" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 0.--2. "SMP0,SMP0" "0,1,2,3,4,5,6,7"
|
|
line.long 0x18 "SMPR2,sample time register 2"
|
|
bitfld.long 0x18 24.--26. "SMP18,SMP18" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 21.--23. "SMP17,SMP17" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 18.--20. "SMP16,SMP16" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 15.--17. "SMP15,SMP15" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 12.--14. "SMP14,SMP14" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 9.--11. "SMP13,SMP13" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 6.--8. "SMP12,SMP12" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x18 3.--5. "SMP11,SMP11" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 0.--2. "SMP10,SMP10" "0,1,2,3,4,5,6,7"
|
|
group.long 0x20++0xB
|
|
line.long 0x0 "TR1,watchdog threshold register 1"
|
|
hexmask.long.word 0x0 16.--27. 1. "HT1,HT1"
|
|
hexmask.long.word 0x0 0.--11. 1. "LT1,LT1"
|
|
line.long 0x4 "TR2,watchdog threshold register"
|
|
hexmask.long.byte 0x4 16.--23. 1. "HT2,HT2"
|
|
hexmask.long.byte 0x4 0.--7. 1. "LT2,LT2"
|
|
line.long 0x8 "TR3,watchdog threshold register 3"
|
|
hexmask.long.byte 0x8 16.--23. 1. "HT3,HT3"
|
|
hexmask.long.byte 0x8 0.--7. 1. "LT3,LT3"
|
|
group.long 0x30++0xF
|
|
line.long 0x0 "SQR1,regular sequence register 1"
|
|
hexmask.long.byte 0x0 24.--28. 1. "SQ4,SQ4"
|
|
hexmask.long.byte 0x0 18.--22. 1. "SQ3,SQ3"
|
|
hexmask.long.byte 0x0 12.--16. 1. "SQ2,SQ2"
|
|
hexmask.long.byte 0x0 6.--10. 1. "SQ1,SQ1"
|
|
hexmask.long.byte 0x0 0.--3. 1. "L,Regular channel sequence"
|
|
line.long 0x4 "SQR2,regular sequence register 2"
|
|
hexmask.long.byte 0x4 24.--28. 1. "SQ9,SQ9"
|
|
hexmask.long.byte 0x4 18.--22. 1. "SQ8,SQ8"
|
|
hexmask.long.byte 0x4 12.--16. 1. "SQ7,SQ7"
|
|
hexmask.long.byte 0x4 6.--10. 1. "SQ6,SQ6"
|
|
hexmask.long.byte 0x4 0.--4. 1. "SQ5,SQ5"
|
|
line.long 0x8 "SQR3,regular sequence register 3"
|
|
hexmask.long.byte 0x8 24.--28. 1. "SQ14,SQ14"
|
|
hexmask.long.byte 0x8 18.--22. 1. "SQ13,SQ13"
|
|
hexmask.long.byte 0x8 12.--16. 1. "SQ12,SQ12"
|
|
hexmask.long.byte 0x8 6.--10. 1. "SQ11,SQ11"
|
|
hexmask.long.byte 0x8 0.--4. 1. "SQ10,SQ10"
|
|
line.long 0xC "SQR4,regular sequence register 4"
|
|
hexmask.long.byte 0xC 6.--10. 1. "SQ16,SQ16"
|
|
hexmask.long.byte 0xC 0.--4. 1. "SQ15,SQ15"
|
|
rgroup.long 0x40++0x3
|
|
line.long 0x0 "DR,regular Data Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "RDATA,Regular Data converted"
|
|
group.long 0x4C++0x3
|
|
line.long 0x0 "JSQR,injected sequence register"
|
|
hexmask.long.byte 0x0 26.--30. 1. "JSQ4,JSQ4"
|
|
hexmask.long.byte 0x0 20.--24. 1. "JSQ3,JSQ3"
|
|
hexmask.long.byte 0x0 14.--18. 1. "JSQ2,JSQ2"
|
|
hexmask.long.byte 0x0 8.--12. 1. "JSQ1,JSQ1"
|
|
bitfld.long 0x0 6.--7. "JEXTEN,JEXTEN" "0,1,2,3"
|
|
hexmask.long.byte 0x0 2.--5. 1. "JEXTSEL,JEXTSEL"
|
|
bitfld.long 0x0 0.--1. "JL,JL" "0,1,2,3"
|
|
group.long 0x60++0xF
|
|
line.long 0x0 "OFR1,offset register 1"
|
|
bitfld.long 0x0 31. "OFFSET1_EN,OFFSET1_EN" "0,1"
|
|
hexmask.long.byte 0x0 26.--30. 1. "OFFSET1_CH,OFFSET1_CH"
|
|
hexmask.long.word 0x0 0.--11. 1. "OFFSET1,OFFSET1"
|
|
line.long 0x4 "OFR2,offset register 2"
|
|
bitfld.long 0x4 31. "OFFSET2_EN,OFFSET2_EN" "0,1"
|
|
hexmask.long.byte 0x4 26.--30. 1. "OFFSET2_CH,OFFSET2_CH"
|
|
hexmask.long.word 0x4 0.--11. 1. "OFFSET2,OFFSET2"
|
|
line.long 0x8 "OFR3,offset register 3"
|
|
bitfld.long 0x8 31. "OFFSET3_EN,OFFSET3_EN" "0,1"
|
|
hexmask.long.byte 0x8 26.--30. 1. "OFFSET3_CH,OFFSET3_CH"
|
|
hexmask.long.word 0x8 0.--11. 1. "OFFSET3,OFFSET3"
|
|
line.long 0xC "OFR4,offset register 4"
|
|
bitfld.long 0xC 31. "OFFSET4_EN,OFFSET4_EN" "0,1"
|
|
hexmask.long.byte 0xC 26.--30. 1. "OFFSET4_CH,OFFSET4_CH"
|
|
hexmask.long.word 0xC 0.--11. 1. "OFFSET4,OFFSET4"
|
|
rgroup.long 0x80++0xF
|
|
line.long 0x0 "JDR1,injected data register 1"
|
|
hexmask.long.word 0x0 0.--15. 1. "JDATA1,JDATA1"
|
|
line.long 0x4 "JDR2,injected data register 2"
|
|
hexmask.long.word 0x4 0.--15. 1. "JDATA2,JDATA2"
|
|
line.long 0x8 "JDR3,injected data register 3"
|
|
hexmask.long.word 0x8 0.--15. 1. "JDATA3,JDATA3"
|
|
line.long 0xC "JDR4,injected data register 4"
|
|
hexmask.long.word 0xC 0.--15. 1. "JDATA4,JDATA4"
|
|
group.long 0xA0++0x7
|
|
line.long 0x0 "AWD2CR,Analog Watchdog 2 Configuration"
|
|
hexmask.long.tbyte 0x0 0.--17. 1. "AWD2CH,AWD2CH"
|
|
line.long 0x4 "AWD3CR,Analog Watchdog 3 Configuration"
|
|
hexmask.long.tbyte 0x4 0.--17. 1. "AWD3CH,AWD3CH"
|
|
group.long 0xB0++0x7
|
|
line.long 0x0 "DIFSEL,Differential Mode Selection Register"
|
|
rbitfld.long 0x0 16.--18. "DIFSEL_16_18,Differential mode for channels 18 to" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x0 1.--15. 1. "DIFSEL_1_15,Differential mode for channels 15 to"
|
|
line.long 0x4 "CALFACT,Calibration Factors"
|
|
hexmask.long.byte 0x4 16.--22. 1. "CALFACT_D,CALFACT_D"
|
|
hexmask.long.byte 0x4 0.--6. 1. "CALFACT_S,CALFACT_S"
|
|
tree.end
|
|
endif
|
|
sif (cpuis("STM32L4S9*"))
|
|
tree "ADC"
|
|
base ad:0x50040000
|
|
group.long 0x0++0x1B
|
|
line.long 0x0 "ISR,interrupt and status register"
|
|
bitfld.long 0x0 10. "JQOVF,JQOVF" "0,1"
|
|
bitfld.long 0x0 9. "AWD3,AWD3" "0,1"
|
|
bitfld.long 0x0 8. "AWD2,AWD2" "0,1"
|
|
bitfld.long 0x0 7. "AWD1,AWD1" "0,1"
|
|
bitfld.long 0x0 6. "JEOS,JEOS" "0,1"
|
|
bitfld.long 0x0 5. "JEOC,JEOC" "0,1"
|
|
bitfld.long 0x0 4. "OVR,OVR" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "EOS,EOS" "0,1"
|
|
bitfld.long 0x0 2. "EOC,EOC" "0,1"
|
|
bitfld.long 0x0 1. "EOSMP,EOSMP" "0,1"
|
|
bitfld.long 0x0 0. "ADRDY,ADRDY" "0,1"
|
|
line.long 0x4 "IER,interrupt enable register"
|
|
bitfld.long 0x4 10. "JQOVFIE,JQOVFIE" "0,1"
|
|
bitfld.long 0x4 9. "AWD3IE,AWD3IE" "0,1"
|
|
bitfld.long 0x4 8. "AWD2IE,AWD2IE" "0,1"
|
|
bitfld.long 0x4 7. "AWD1IE,AWD1IE" "0,1"
|
|
bitfld.long 0x4 6. "JEOSIE,JEOSIE" "0,1"
|
|
bitfld.long 0x4 5. "JEOCIE,JEOCIE" "0,1"
|
|
bitfld.long 0x4 4. "OVRIE,OVRIE" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "EOSIE,EOSIE" "0,1"
|
|
bitfld.long 0x4 2. "EOCIE,EOCIE" "0,1"
|
|
bitfld.long 0x4 1. "EOSMPIE,EOSMPIE" "0,1"
|
|
bitfld.long 0x4 0. "ADRDYIE,ADRDYIE" "0,1"
|
|
line.long 0x8 "CR,control register"
|
|
bitfld.long 0x8 31. "ADCAL,ADCAL" "0,1"
|
|
bitfld.long 0x8 30. "ADCALDIF,ADCALDIF" "0,1"
|
|
bitfld.long 0x8 29. "DEEPPWD,DEEPPWD" "0,1"
|
|
bitfld.long 0x8 28. "ADVREGEN,ADVREGEN" "0,1"
|
|
bitfld.long 0x8 5. "JADSTP,JADSTP" "0,1"
|
|
bitfld.long 0x8 4. "ADSTP,ADSTP" "0,1"
|
|
bitfld.long 0x8 3. "JADSTART,JADSTART" "0,1"
|
|
newline
|
|
bitfld.long 0x8 2. "ADSTART,ADSTART" "0,1"
|
|
bitfld.long 0x8 1. "ADDIS,ADDIS" "0,1"
|
|
bitfld.long 0x8 0. "ADEN,ADEN" "0,1"
|
|
line.long 0xC "CFGR,configuration register"
|
|
bitfld.long 0xC 31. "JQDIS,Injected Queue disable" "0,1"
|
|
hexmask.long.byte 0xC 26.--30. 1. "AWDCH1CH,AWDCH1CH"
|
|
bitfld.long 0xC 25. "JAUTO,JAUTO" "0,1"
|
|
bitfld.long 0xC 24. "JAWD1EN,JAWD1EN" "0,1"
|
|
bitfld.long 0xC 23. "AWD1EN,AWD1EN" "0,1"
|
|
bitfld.long 0xC 22. "AWD1SGL,AWD1SGL" "0,1"
|
|
bitfld.long 0xC 21. "JQM,JQM" "0,1"
|
|
newline
|
|
bitfld.long 0xC 20. "JDISCEN,JDISCEN" "0,1"
|
|
bitfld.long 0xC 17.--19. "DISCNUM,DISCNUM" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 16. "DISCEN,DISCEN" "0,1"
|
|
bitfld.long 0xC 14. "AUTDLY,AUTDLY" "0,1"
|
|
bitfld.long 0xC 13. "CONT,CONT" "0,1"
|
|
bitfld.long 0xC 12. "OVRMOD,OVRMOD" "0,1"
|
|
bitfld.long 0xC 10.--11. "EXTEN,EXTEN" "0,1,2,3"
|
|
newline
|
|
hexmask.long.byte 0xC 6.--9. 1. "EXTSEL,EXTSEL"
|
|
bitfld.long 0xC 5. "ALIGN,ALIGN" "0,1"
|
|
bitfld.long 0xC 3.--4. "RES,RES" "0,1,2,3"
|
|
bitfld.long 0xC 1. "DMACFG,DMACFG" "0,1"
|
|
bitfld.long 0xC 0. "DMAEN,DMAEN" "0,1"
|
|
line.long 0x10 "CFGR2,configuration register"
|
|
bitfld.long 0x10 10. "ROVSM,EXTEN" "0,1"
|
|
bitfld.long 0x10 9. "TROVS,Triggered Regular" "0,1"
|
|
hexmask.long.byte 0x10 5.--8. 1. "OVSS,ALIGN"
|
|
bitfld.long 0x10 2.--4. "OVSR,RES" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 1. "JOVSE,DMACFG" "0,1"
|
|
bitfld.long 0x10 0. "ROVSE,DMAEN" "0,1"
|
|
line.long 0x14 "SMPR1,sample time register 1"
|
|
bitfld.long 0x14 31. "SMPPLUS,Addition of one clock cycle to the" "0,1"
|
|
bitfld.long 0x14 27.--29. "SMP9,SMP9" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 24.--26. "SMP8,SMP8" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 21.--23. "SMP7,SMP7" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 18.--20. "SMP6,SMP6" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 15.--17. "SMP5,SMP5" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 12.--14. "SMP4,SMP4" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x14 9.--11. "SMP3,SMP3" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 6.--8. "SMP2,SMP2" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 3.--5. "SMP1,SMP1" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 0.--2. "SMP0,SMP0" "0,1,2,3,4,5,6,7"
|
|
line.long 0x18 "SMPR2,sample time register 2"
|
|
bitfld.long 0x18 24.--26. "SMP18,SMP18" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 21.--23. "SMP17,SMP17" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 18.--20. "SMP16,SMP16" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 15.--17. "SMP15,SMP15" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 12.--14. "SMP14,SMP14" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 9.--11. "SMP13,SMP13" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 6.--8. "SMP12,SMP12" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x18 3.--5. "SMP11,SMP11" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 0.--2. "SMP10,SMP10" "0,1,2,3,4,5,6,7"
|
|
group.long 0x20++0xB
|
|
line.long 0x0 "TR1,watchdog threshold register 1"
|
|
hexmask.long.word 0x0 16.--27. 1. "HT1,HT1"
|
|
hexmask.long.word 0x0 0.--11. 1. "LT1,LT1"
|
|
line.long 0x4 "TR2,watchdog threshold register"
|
|
hexmask.long.byte 0x4 16.--23. 1. "HT2,HT2"
|
|
hexmask.long.byte 0x4 0.--7. 1. "LT2,LT2"
|
|
line.long 0x8 "TR3,watchdog threshold register 3"
|
|
hexmask.long.byte 0x8 16.--23. 1. "HT3,HT3"
|
|
hexmask.long.byte 0x8 0.--7. 1. "LT3,LT3"
|
|
group.long 0x30++0xF
|
|
line.long 0x0 "SQR1,regular sequence register 1"
|
|
hexmask.long.byte 0x0 24.--28. 1. "SQ4,SQ4"
|
|
hexmask.long.byte 0x0 18.--22. 1. "SQ3,SQ3"
|
|
hexmask.long.byte 0x0 12.--16. 1. "SQ2,SQ2"
|
|
hexmask.long.byte 0x0 6.--10. 1. "SQ1,SQ1"
|
|
hexmask.long.byte 0x0 0.--3. 1. "L,Regular channel sequence"
|
|
line.long 0x4 "SQR2,regular sequence register 2"
|
|
hexmask.long.byte 0x4 24.--28. 1. "SQ9,SQ9"
|
|
hexmask.long.byte 0x4 18.--22. 1. "SQ8,SQ8"
|
|
hexmask.long.byte 0x4 12.--16. 1. "SQ7,SQ7"
|
|
hexmask.long.byte 0x4 6.--10. 1. "SQ6,SQ6"
|
|
hexmask.long.byte 0x4 0.--4. 1. "SQ5,SQ5"
|
|
line.long 0x8 "SQR3,regular sequence register 3"
|
|
hexmask.long.byte 0x8 24.--28. 1. "SQ14,SQ14"
|
|
hexmask.long.byte 0x8 18.--22. 1. "SQ13,SQ13"
|
|
hexmask.long.byte 0x8 12.--16. 1. "SQ12,SQ12"
|
|
hexmask.long.byte 0x8 6.--10. 1. "SQ11,SQ11"
|
|
hexmask.long.byte 0x8 0.--4. 1. "SQ10,SQ10"
|
|
line.long 0xC "SQR4,regular sequence register 4"
|
|
hexmask.long.byte 0xC 6.--10. 1. "SQ16,SQ16"
|
|
hexmask.long.byte 0xC 0.--4. 1. "SQ15,SQ15"
|
|
rgroup.long 0x40++0x3
|
|
line.long 0x0 "DR,regular Data Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "RDATA,Regular Data converted"
|
|
group.long 0x4C++0x3
|
|
line.long 0x0 "JSQR,injected sequence register"
|
|
hexmask.long.byte 0x0 26.--30. 1. "JSQ4,JSQ4"
|
|
hexmask.long.byte 0x0 20.--24. 1. "JSQ3,JSQ3"
|
|
hexmask.long.byte 0x0 14.--18. 1. "JSQ2,JSQ2"
|
|
hexmask.long.byte 0x0 8.--12. 1. "JSQ1,JSQ1"
|
|
bitfld.long 0x0 6.--7. "JEXTEN,JEXTEN" "0,1,2,3"
|
|
hexmask.long.byte 0x0 2.--5. 1. "JEXTSEL,JEXTSEL"
|
|
bitfld.long 0x0 0.--1. "JL,JL" "0,1,2,3"
|
|
group.long 0x60++0xF
|
|
line.long 0x0 "OFR1,offset register 1"
|
|
bitfld.long 0x0 31. "OFFSET1_EN,OFFSET1_EN" "0,1"
|
|
hexmask.long.byte 0x0 26.--30. 1. "OFFSET1_CH,OFFSET1_CH"
|
|
hexmask.long.word 0x0 0.--11. 1. "OFFSET1,OFFSET1"
|
|
line.long 0x4 "OFR2,offset register 2"
|
|
bitfld.long 0x4 31. "OFFSET2_EN,OFFSET2_EN" "0,1"
|
|
hexmask.long.byte 0x4 26.--30. 1. "OFFSET2_CH,OFFSET2_CH"
|
|
hexmask.long.word 0x4 0.--11. 1. "OFFSET2,OFFSET2"
|
|
line.long 0x8 "OFR3,offset register 3"
|
|
bitfld.long 0x8 31. "OFFSET3_EN,OFFSET3_EN" "0,1"
|
|
hexmask.long.byte 0x8 26.--30. 1. "OFFSET3_CH,OFFSET3_CH"
|
|
hexmask.long.word 0x8 0.--11. 1. "OFFSET3,OFFSET3"
|
|
line.long 0xC "OFR4,offset register 4"
|
|
bitfld.long 0xC 31. "OFFSET4_EN,OFFSET4_EN" "0,1"
|
|
hexmask.long.byte 0xC 26.--30. 1. "OFFSET4_CH,OFFSET4_CH"
|
|
hexmask.long.word 0xC 0.--11. 1. "OFFSET4,OFFSET4"
|
|
rgroup.long 0x80++0xF
|
|
line.long 0x0 "JDR1,injected data register 1"
|
|
hexmask.long.word 0x0 0.--15. 1. "JDATA1,JDATA1"
|
|
line.long 0x4 "JDR2,injected data register 2"
|
|
hexmask.long.word 0x4 0.--15. 1. "JDATA2,JDATA2"
|
|
line.long 0x8 "JDR3,injected data register 3"
|
|
hexmask.long.word 0x8 0.--15. 1. "JDATA3,JDATA3"
|
|
line.long 0xC "JDR4,injected data register 4"
|
|
hexmask.long.word 0xC 0.--15. 1. "JDATA4,JDATA4"
|
|
group.long 0xA0++0x7
|
|
line.long 0x0 "AWD2CR,Analog Watchdog 2 Configuration"
|
|
hexmask.long.tbyte 0x0 0.--17. 1. "AWD2CH,AWD2CH"
|
|
line.long 0x4 "AWD3CR,Analog Watchdog 3 Configuration"
|
|
hexmask.long.tbyte 0x4 0.--17. 1. "AWD3CH,AWD3CH"
|
|
group.long 0xB0++0x7
|
|
line.long 0x0 "DIFSEL,Differential Mode Selection Register"
|
|
rbitfld.long 0x0 16.--18. "DIFSEL_16_18,Differential mode for channels 18 to" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x0 1.--15. 1. "DIFSEL_1_15,Differential mode for channels 15 to"
|
|
line.long 0x4 "CALFACT,Calibration Factors"
|
|
hexmask.long.byte 0x4 16.--22. 1. "CALFACT_D,CALFACT_D"
|
|
hexmask.long.byte 0x4 0.--6. 1. "CALFACT_S,CALFACT_S"
|
|
tree.end
|
|
endif
|
|
tree "ADC_Common"
|
|
base ad:0x50040300
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "CSR,ADC Common status register"
|
|
bitfld.long 0x0 26. "JQOVF_SLV,Injected Context Queue Overflow flag of" "0,1"
|
|
bitfld.long 0x0 25. "AWD3_SLV,Analog watchdog 3 flag of the slave" "0,1"
|
|
bitfld.long 0x0 24. "AWD2_SLV,Analog watchdog 2 flag of the slave" "0,1"
|
|
bitfld.long 0x0 23. "AWD1_SLV,Analog watchdog 1 flag of the slave" "0,1"
|
|
bitfld.long 0x0 22. "JEOS_SLV,End of injected sequence flag of the" "0,1"
|
|
bitfld.long 0x0 21. "JEOC_SLV,End of injected conversion flag of the" "0,1"
|
|
bitfld.long 0x0 20. "OVR_SLV,Overrun flag of the slave" "0,1"
|
|
bitfld.long 0x0 19. "EOS_SLV,End of regular sequence flag of the" "0,1"
|
|
bitfld.long 0x0 18. "EOC_SLV,End of regular conversion of the slave" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "EOSMP_SLV,EOSMP_SLV" "0,1"
|
|
bitfld.long 0x0 16. "ADRDY_SLV,ADRDY_SLV" "0,1"
|
|
bitfld.long 0x0 10. "JQOVF_MST,JQOVF_MST" "0,1"
|
|
bitfld.long 0x0 9. "AWD3_MST,AWD3_MST" "0,1"
|
|
bitfld.long 0x0 8. "AWD2_MST,AWD2_MST" "0,1"
|
|
bitfld.long 0x0 7. "AWD1_MST,AWD1_MST" "0,1"
|
|
bitfld.long 0x0 6. "JEOS_MST,JEOS_MST" "0,1"
|
|
bitfld.long 0x0 5. "JEOC_MST,JEOC_MST" "0,1"
|
|
bitfld.long 0x0 4. "OVR_MST,OVR_MST" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "EOS_MST,EOS_MST" "0,1"
|
|
bitfld.long 0x0 2. "EOC_MST,EOC_MST" "0,1"
|
|
bitfld.long 0x0 1. "EOSMP_MST,EOSMP_MST" "0,1"
|
|
bitfld.long 0x0 0. "ADDRDY_MST,ADDRDY_MST" "0,1"
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "CCR,ADC common control register"
|
|
bitfld.long 0x0 24. "CH18SEL,CH18 selection" "0,1"
|
|
bitfld.long 0x0 23. "CH17SEL,CH17 selection" "0,1"
|
|
bitfld.long 0x0 22. "VREFEN,VREFINT enable" "0,1"
|
|
hexmask.long.byte 0x0 18.--21. 1. "PRESC,ADC prescaler"
|
|
bitfld.long 0x0 16.--17. "CKMODE,ADC clock mode" "0,1,2,3"
|
|
bitfld.long 0x0 14.--15. "MDMA,Direct memory access mode for multi ADC" "0,1,2,3"
|
|
bitfld.long 0x0 13. "DMACFG,DMA configuration (for multi-ADC" "0,1"
|
|
hexmask.long.byte 0x0 8.--11. 1. "DELAY,Delay between 2 sampling"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DUAL,Dual ADC mode selection"
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x0 "CDR,ADC common regular data register for dual"
|
|
hexmask.long.word 0x0 16.--31. 1. "RDATA_SLV,Regular data of the slave"
|
|
hexmask.long.word 0x0 0.--15. 1. "RDATA_MST,Regular data of the master"
|
|
tree.end
|
|
tree.end
|
|
tree "AES (Advanced Encryption Standard)"
|
|
base ad:0x50060000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CR,control register"
|
|
bitfld.long 0x0 12. "DMAOUTEN,Enable DMA management of data output" "0,1"
|
|
bitfld.long 0x0 11. "DMAINEN,Enable DMA management of data input" "0,1"
|
|
bitfld.long 0x0 10. "ERRIE,Error interrupt enable" "0,1"
|
|
bitfld.long 0x0 9. "CCFIE,CCF flag interrupt enable" "0,1"
|
|
bitfld.long 0x0 8. "ERRC,Error clear" "0,1"
|
|
bitfld.long 0x0 7. "CCFC,Computation Complete Flag" "0,1"
|
|
bitfld.long 0x0 5.--6. "CHMOD,AES chaining mode" "0,1,2,3"
|
|
bitfld.long 0x0 3.--4. "MODE,AES operating mode" "0,1,2,3"
|
|
bitfld.long 0x0 1.--2. "DATATYPE,Data type selection (for data in and" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 0. "EN,AES enable" "0,1"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "SR,status register"
|
|
bitfld.long 0x0 2. "WRERR,Write error flag" "0,1"
|
|
bitfld.long 0x0 1. "RDERR,Read error flag" "0,1"
|
|
bitfld.long 0x0 0. "CCF,Computation complete flag" "0,1"
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "DINR,data input register"
|
|
hexmask.long 0x0 0.--31. 1. "AES_DINR,Data Input Register"
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x0 "DOUTR,data output register"
|
|
hexmask.long 0x0 0.--31. 1. "AES_DOUTR,Data output register"
|
|
group.long 0x10++0x1F
|
|
line.long 0x0 "KEYR0,key register 0"
|
|
hexmask.long 0x0 0.--31. 1. "AES_KEYR0,Data Output Register (LSB key"
|
|
line.long 0x4 "KEYR1,key register 1"
|
|
hexmask.long 0x4 0.--31. 1. "AES_KEYR1,AES key register (key"
|
|
line.long 0x8 "KEYR2,key register 2"
|
|
hexmask.long 0x8 0.--31. 1. "AES_KEYR2,AES key register (key"
|
|
line.long 0xC "KEYR3,key register 3"
|
|
hexmask.long 0xC 0.--31. 1. "AES_KEYR3,AES key register (MSB key"
|
|
line.long 0x10 "IVR0,initialization vector register"
|
|
hexmask.long 0x10 0.--31. 1. "AES_IVR0,initialization vector register (LSB IVR"
|
|
line.long 0x14 "IVR1,initialization vector register"
|
|
hexmask.long 0x14 0.--31. 1. "AES_IVR1,Initialization Vector Register (IVR"
|
|
line.long 0x18 "IVR2,initialization vector register"
|
|
hexmask.long 0x18 0.--31. 1. "AES_IVR2,Initialization Vector Register (IVR"
|
|
line.long 0x1C "IVR3,initialization vector register"
|
|
hexmask.long 0x1C 0.--31. 1. "AES_IVR3,Initialization Vector Register (MSB IVR"
|
|
tree.end
|
|
tree "CAN (Controller Area Network)"
|
|
base ad:0x40006400
|
|
group.long 0x0++0x1F
|
|
line.long 0x0 "MCR,master control register"
|
|
bitfld.long 0x0 16. "DBF,DBF" "0,1"
|
|
bitfld.long 0x0 15. "RESET,RESET" "0,1"
|
|
bitfld.long 0x0 7. "TTCM,TTCM" "0,1"
|
|
bitfld.long 0x0 6. "ABOM,ABOM" "0,1"
|
|
bitfld.long 0x0 5. "AWUM,AWUM" "0,1"
|
|
bitfld.long 0x0 4. "NART,NART" "0,1"
|
|
bitfld.long 0x0 3. "RFLM,RFLM" "0,1"
|
|
bitfld.long 0x0 2. "TXFP,TXFP" "0,1"
|
|
bitfld.long 0x0 1. "SLEEP,SLEEP" "0,1"
|
|
bitfld.long 0x0 0. "INRQ,INRQ" "0,1"
|
|
line.long 0x4 "MSR,master status register"
|
|
rbitfld.long 0x4 11. "RX,RX" "0,1"
|
|
rbitfld.long 0x4 10. "SAMP,SAMP" "0,1"
|
|
rbitfld.long 0x4 9. "RXM,RXM" "0,1"
|
|
rbitfld.long 0x4 8. "TXM,TXM" "0,1"
|
|
bitfld.long 0x4 4. "SLAKI,SLAKI" "0,1"
|
|
bitfld.long 0x4 3. "WKUI,WKUI" "0,1"
|
|
bitfld.long 0x4 2. "ERRI,ERRI" "0,1"
|
|
rbitfld.long 0x4 1. "SLAK,SLAK" "0,1"
|
|
rbitfld.long 0x4 0. "INAK,INAK" "0,1"
|
|
line.long 0x8 "TSR,transmit status register"
|
|
rbitfld.long 0x8 31. "LOW2,Lowest priority flag for mailbox" "0,1"
|
|
rbitfld.long 0x8 30. "LOW1,Lowest priority flag for mailbox" "0,1"
|
|
rbitfld.long 0x8 29. "LOW0,Lowest priority flag for mailbox" "0,1"
|
|
rbitfld.long 0x8 28. "TME2,Lowest priority flag for mailbox" "0,1"
|
|
rbitfld.long 0x8 27. "TME1,Lowest priority flag for mailbox" "0,1"
|
|
rbitfld.long 0x8 26. "TME0,Lowest priority flag for mailbox" "0,1"
|
|
rbitfld.long 0x8 24.--25. "CODE,CODE" "0,1,2,3"
|
|
bitfld.long 0x8 23. "ABRQ2,ABRQ2" "0,1"
|
|
bitfld.long 0x8 19. "TERR2,TERR2" "0,1"
|
|
bitfld.long 0x8 18. "ALST2,ALST2" "0,1"
|
|
bitfld.long 0x8 17. "TXOK2,TXOK2" "0,1"
|
|
newline
|
|
bitfld.long 0x8 16. "RQCP2,RQCP2" "0,1"
|
|
bitfld.long 0x8 15. "ABRQ1,ABRQ1" "0,1"
|
|
bitfld.long 0x8 11. "TERR1,TERR1" "0,1"
|
|
bitfld.long 0x8 10. "ALST1,ALST1" "0,1"
|
|
bitfld.long 0x8 9. "TXOK1,TXOK1" "0,1"
|
|
bitfld.long 0x8 8. "RQCP1,RQCP1" "0,1"
|
|
bitfld.long 0x8 7. "ABRQ0,ABRQ0" "0,1"
|
|
bitfld.long 0x8 3. "TERR0,TERR0" "0,1"
|
|
bitfld.long 0x8 2. "ALST0,ALST0" "0,1"
|
|
bitfld.long 0x8 1. "TXOK0,TXOK0" "0,1"
|
|
bitfld.long 0x8 0. "RQCP0,RQCP0" "0,1"
|
|
line.long 0xC "RF0R,receive FIFO 0 register"
|
|
bitfld.long 0xC 5. "RFOM0,RFOM0" "0,1"
|
|
bitfld.long 0xC 4. "FOVR0,FOVR0" "0,1"
|
|
bitfld.long 0xC 3. "FULL0,FULL0" "0,1"
|
|
rbitfld.long 0xC 0.--1. "FMP0,FMP0" "0,1,2,3"
|
|
line.long 0x10 "RF1R,receive FIFO 1 register"
|
|
bitfld.long 0x10 5. "RFOM1,RFOM1" "0,1"
|
|
bitfld.long 0x10 4. "FOVR1,FOVR1" "0,1"
|
|
bitfld.long 0x10 3. "FULL1,FULL1" "0,1"
|
|
rbitfld.long 0x10 0.--1. "FMP1,FMP1" "0,1,2,3"
|
|
line.long 0x14 "IER,interrupt enable register"
|
|
bitfld.long 0x14 17. "SLKIE,SLKIE" "0,1"
|
|
bitfld.long 0x14 16. "WKUIE,WKUIE" "0,1"
|
|
bitfld.long 0x14 15. "ERRIE,ERRIE" "0,1"
|
|
bitfld.long 0x14 11. "LECIE,LECIE" "0,1"
|
|
bitfld.long 0x14 10. "BOFIE,BOFIE" "0,1"
|
|
bitfld.long 0x14 9. "EPVIE,EPVIE" "0,1"
|
|
bitfld.long 0x14 8. "EWGIE,EWGIE" "0,1"
|
|
bitfld.long 0x14 6. "FOVIE1,FOVIE1" "0,1"
|
|
bitfld.long 0x14 5. "FFIE1,FFIE1" "0,1"
|
|
bitfld.long 0x14 4. "FMPIE1,FMPIE1" "0,1"
|
|
bitfld.long 0x14 3. "FOVIE0,FOVIE0" "0,1"
|
|
newline
|
|
bitfld.long 0x14 2. "FFIE0,FFIE0" "0,1"
|
|
bitfld.long 0x14 1. "FMPIE0,FMPIE0" "0,1"
|
|
bitfld.long 0x14 0. "TMEIE,TMEIE" "0,1"
|
|
line.long 0x18 "ESR,interrupt enable register"
|
|
hexmask.long.byte 0x18 24.--31. 1. "REC,REC"
|
|
hexmask.long.byte 0x18 16.--23. 1. "TEC,TEC"
|
|
bitfld.long 0x18 4.--6. "LEC,LEC" "0,1,2,3,4,5,6,7"
|
|
rbitfld.long 0x18 2. "BOFF,BOFF" "0,1"
|
|
rbitfld.long 0x18 1. "EPVF,EPVF" "0,1"
|
|
rbitfld.long 0x18 0. "EWGF,EWGF" "0,1"
|
|
line.long 0x1C "BTR,bit timing register"
|
|
bitfld.long 0x1C 31. "SILM,SILM" "0,1"
|
|
bitfld.long 0x1C 30. "LBKM,LBKM" "0,1"
|
|
bitfld.long 0x1C 24.--25. "SJW,SJW" "0,1,2,3"
|
|
bitfld.long 0x1C 20.--22. "TS2,TS2" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x1C 16.--19. 1. "TS1,TS1"
|
|
hexmask.long.word 0x1C 0.--9. 1. "BRP,BRP"
|
|
group.long 0x180++0x2F
|
|
line.long 0x0 "TI0R,TX mailbox identifier register"
|
|
hexmask.long.word 0x0 21.--31. 1. "STID,STID"
|
|
hexmask.long.tbyte 0x0 3.--20. 1. "EXID,EXID"
|
|
bitfld.long 0x0 2. "IDE,IDE" "0,1"
|
|
bitfld.long 0x0 1. "RTR,RTR" "0,1"
|
|
bitfld.long 0x0 0. "TXRQ,TXRQ" "0,1"
|
|
line.long 0x4 "TDT0R,mailbox data length control and time stamp"
|
|
hexmask.long.word 0x4 16.--31. 1. "TIME,TIME"
|
|
bitfld.long 0x4 8. "TGT,TGT" "0,1"
|
|
hexmask.long.byte 0x4 0.--3. 1. "DLC,DLC"
|
|
line.long 0x8 "TDL0R,mailbox data low register"
|
|
hexmask.long.byte 0x8 24.--31. 1. "DATA3,DATA3"
|
|
hexmask.long.byte 0x8 16.--23. 1. "DATA2,DATA2"
|
|
hexmask.long.byte 0x8 8.--15. 1. "DATA1,DATA1"
|
|
hexmask.long.byte 0x8 0.--7. 1. "DATA0,DATA0"
|
|
line.long 0xC "TDH0R,mailbox data high register"
|
|
hexmask.long.byte 0xC 24.--31. 1. "DATA7,DATA7"
|
|
hexmask.long.byte 0xC 16.--23. 1. "DATA6,DATA6"
|
|
hexmask.long.byte 0xC 8.--15. 1. "DATA5,DATA5"
|
|
hexmask.long.byte 0xC 0.--7. 1. "DATA4,DATA4"
|
|
line.long 0x10 "TI1R,mailbox identifier register"
|
|
hexmask.long.word 0x10 21.--31. 1. "STID,STID"
|
|
hexmask.long.tbyte 0x10 3.--20. 1. "EXID,EXID"
|
|
bitfld.long 0x10 2. "IDE,IDE" "0,1"
|
|
bitfld.long 0x10 1. "RTR,RTR" "0,1"
|
|
bitfld.long 0x10 0. "TXRQ,TXRQ" "0,1"
|
|
line.long 0x14 "TDT1R,mailbox data length control and time stamp"
|
|
hexmask.long.word 0x14 16.--31. 1. "TIME,TIME"
|
|
bitfld.long 0x14 8. "TGT,TGT" "0,1"
|
|
hexmask.long.byte 0x14 0.--3. 1. "DLC,DLC"
|
|
line.long 0x18 "TDL1R,mailbox data low register"
|
|
hexmask.long.byte 0x18 24.--31. 1. "DATA3,DATA3"
|
|
hexmask.long.byte 0x18 16.--23. 1. "DATA2,DATA2"
|
|
hexmask.long.byte 0x18 8.--15. 1. "DATA1,DATA1"
|
|
hexmask.long.byte 0x18 0.--7. 1. "DATA0,DATA0"
|
|
line.long 0x1C "TDH1R,mailbox data high register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. "DATA7,DATA7"
|
|
hexmask.long.byte 0x1C 16.--23. 1. "DATA6,DATA6"
|
|
hexmask.long.byte 0x1C 8.--15. 1. "DATA5,DATA5"
|
|
hexmask.long.byte 0x1C 0.--7. 1. "DATA4,DATA4"
|
|
line.long 0x20 "TI2R,mailbox identifier register"
|
|
hexmask.long.word 0x20 21.--31. 1. "STID,STID"
|
|
hexmask.long.tbyte 0x20 3.--20. 1. "EXID,EXID"
|
|
bitfld.long 0x20 2. "IDE,IDE" "0,1"
|
|
bitfld.long 0x20 1. "RTR,RTR" "0,1"
|
|
bitfld.long 0x20 0. "TXRQ,TXRQ" "0,1"
|
|
line.long 0x24 "TDT2R,mailbox data length control and time stamp"
|
|
hexmask.long.word 0x24 16.--31. 1. "TIME,TIME"
|
|
bitfld.long 0x24 8. "TGT,TGT" "0,1"
|
|
hexmask.long.byte 0x24 0.--3. 1. "DLC,DLC"
|
|
line.long 0x28 "TDL2R,mailbox data low register"
|
|
hexmask.long.byte 0x28 24.--31. 1. "DATA3,DATA3"
|
|
hexmask.long.byte 0x28 16.--23. 1. "DATA2,DATA2"
|
|
hexmask.long.byte 0x28 8.--15. 1. "DATA1,DATA1"
|
|
hexmask.long.byte 0x28 0.--7. 1. "DATA0,DATA0"
|
|
line.long 0x2C "TDH2R,mailbox data high register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. "DATA7,DATA7"
|
|
hexmask.long.byte 0x2C 16.--23. 1. "DATA6,DATA6"
|
|
hexmask.long.byte 0x2C 8.--15. 1. "DATA5,DATA5"
|
|
hexmask.long.byte 0x2C 0.--7. 1. "DATA4,DATA4"
|
|
rgroup.long 0x1B0++0x1F
|
|
line.long 0x0 "RI0R,receive FIFO mailbox identifier"
|
|
hexmask.long.word 0x0 21.--31. 1. "STID,STID"
|
|
hexmask.long.tbyte 0x0 3.--20. 1. "EXID,EXID"
|
|
bitfld.long 0x0 2. "IDE,IDE" "0,1"
|
|
bitfld.long 0x0 1. "RTR,RTR" "0,1"
|
|
line.long 0x4 "RDT0R,mailbox data high register"
|
|
hexmask.long.word 0x4 16.--31. 1. "TIME,TIME"
|
|
hexmask.long.byte 0x4 8.--15. 1. "FMI,FMI"
|
|
hexmask.long.byte 0x4 0.--3. 1. "DLC,DLC"
|
|
line.long 0x8 "RDL0R,mailbox data high register"
|
|
hexmask.long.byte 0x8 24.--31. 1. "DATA3,DATA3"
|
|
hexmask.long.byte 0x8 16.--23. 1. "DATA2,DATA2"
|
|
hexmask.long.byte 0x8 8.--15. 1. "DATA1,DATA1"
|
|
hexmask.long.byte 0x8 0.--7. 1. "DATA0,DATA0"
|
|
line.long 0xC "RDH0R,receive FIFO mailbox data high"
|
|
hexmask.long.byte 0xC 24.--31. 1. "DATA7,DATA7"
|
|
hexmask.long.byte 0xC 16.--23. 1. "DATA6,DATA6"
|
|
hexmask.long.byte 0xC 8.--15. 1. "DATA5,DATA5"
|
|
hexmask.long.byte 0xC 0.--7. 1. "DATA4,DATA4"
|
|
line.long 0x10 "RI1R,mailbox data high register"
|
|
hexmask.long.word 0x10 21.--31. 1. "STID,STID"
|
|
hexmask.long.tbyte 0x10 3.--20. 1. "EXID,EXID"
|
|
bitfld.long 0x10 2. "IDE,IDE" "0,1"
|
|
bitfld.long 0x10 1. "RTR,RTR" "0,1"
|
|
line.long 0x14 "RDT1R,mailbox data high register"
|
|
hexmask.long.word 0x14 16.--31. 1. "TIME,TIME"
|
|
hexmask.long.byte 0x14 8.--15. 1. "FMI,FMI"
|
|
hexmask.long.byte 0x14 0.--3. 1. "DLC,DLC"
|
|
line.long 0x18 "RDL1R,mailbox data high register"
|
|
hexmask.long.byte 0x18 24.--31. 1. "DATA3,DATA3"
|
|
hexmask.long.byte 0x18 16.--23. 1. "DATA2,DATA2"
|
|
hexmask.long.byte 0x18 8.--15. 1. "DATA1,DATA1"
|
|
hexmask.long.byte 0x18 0.--7. 1. "DATA0,DATA0"
|
|
line.long 0x1C "RDH1R,mailbox data high register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. "DATA7,DATA7"
|
|
hexmask.long.byte 0x1C 16.--23. 1. "DATA6,DATA6"
|
|
hexmask.long.byte 0x1C 8.--15. 1. "DATA5,DATA5"
|
|
hexmask.long.byte 0x1C 0.--7. 1. "DATA4,DATA4"
|
|
group.long 0x200++0x7
|
|
line.long 0x0 "FMR,filter master register"
|
|
hexmask.long.byte 0x0 8.--13. 1. "CANSB,CAN start bank"
|
|
bitfld.long 0x0 0. "FINIT,Filter initialization mode" "0,1"
|
|
line.long 0x4 "FM1R,filter mode register"
|
|
bitfld.long 0x4 27. "FBM27,Filter mode" "0,1"
|
|
bitfld.long 0x4 26. "FBM26,Filter mode" "0,1"
|
|
bitfld.long 0x4 25. "FBM25,Filter mode" "0,1"
|
|
bitfld.long 0x4 24. "FBM24,Filter mode" "0,1"
|
|
bitfld.long 0x4 23. "FBM23,Filter mode" "0,1"
|
|
bitfld.long 0x4 22. "FBM22,Filter mode" "0,1"
|
|
bitfld.long 0x4 21. "FBM21,Filter mode" "0,1"
|
|
bitfld.long 0x4 20. "FBM20,Filter mode" "0,1"
|
|
bitfld.long 0x4 19. "FBM19,Filter mode" "0,1"
|
|
bitfld.long 0x4 18. "FBM18,Filter mode" "0,1"
|
|
bitfld.long 0x4 17. "FBM17,Filter mode" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "FBM16,Filter mode" "0,1"
|
|
bitfld.long 0x4 15. "FBM15,Filter mode" "0,1"
|
|
bitfld.long 0x4 14. "FBM14,Filter mode" "0,1"
|
|
bitfld.long 0x4 13. "FBM13,Filter mode" "0,1"
|
|
bitfld.long 0x4 12. "FBM12,Filter mode" "0,1"
|
|
bitfld.long 0x4 11. "FBM11,Filter mode" "0,1"
|
|
bitfld.long 0x4 10. "FBM10,Filter mode" "0,1"
|
|
bitfld.long 0x4 9. "FBM9,Filter mode" "0,1"
|
|
bitfld.long 0x4 8. "FBM8,Filter mode" "0,1"
|
|
bitfld.long 0x4 7. "FBM7,Filter mode" "0,1"
|
|
bitfld.long 0x4 6. "FBM6,Filter mode" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "FBM5,Filter mode" "0,1"
|
|
bitfld.long 0x4 4. "FBM4,Filter mode" "0,1"
|
|
bitfld.long 0x4 3. "FBM3,Filter mode" "0,1"
|
|
bitfld.long 0x4 2. "FBM2,Filter mode" "0,1"
|
|
bitfld.long 0x4 1. "FBM1,Filter mode" "0,1"
|
|
bitfld.long 0x4 0. "FBM0,Filter mode" "0,1"
|
|
group.long 0x20C++0x3
|
|
line.long 0x0 "FS1R,filter scale register"
|
|
bitfld.long 0x0 27. "FSC27,Filter scale configuration" "0,1"
|
|
bitfld.long 0x0 26. "FSC26,Filter scale configuration" "0,1"
|
|
bitfld.long 0x0 25. "FSC25,Filter scale configuration" "0,1"
|
|
bitfld.long 0x0 24. "FSC24,Filter scale configuration" "0,1"
|
|
bitfld.long 0x0 23. "FSC23,Filter scale configuration" "0,1"
|
|
bitfld.long 0x0 22. "FSC22,Filter scale configuration" "0,1"
|
|
bitfld.long 0x0 21. "FSC21,Filter scale configuration" "0,1"
|
|
bitfld.long 0x0 20. "FSC20,Filter scale configuration" "0,1"
|
|
bitfld.long 0x0 19. "FSC19,Filter scale configuration" "0,1"
|
|
bitfld.long 0x0 18. "FSC18,Filter scale configuration" "0,1"
|
|
bitfld.long 0x0 17. "FSC17,Filter scale configuration" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "FSC16,Filter scale configuration" "0,1"
|
|
bitfld.long 0x0 15. "FSC15,Filter scale configuration" "0,1"
|
|
bitfld.long 0x0 14. "FSC14,Filter scale configuration" "0,1"
|
|
bitfld.long 0x0 13. "FSC13,Filter scale configuration" "0,1"
|
|
bitfld.long 0x0 12. "FSC12,Filter scale configuration" "0,1"
|
|
bitfld.long 0x0 11. "FSC11,Filter scale configuration" "0,1"
|
|
bitfld.long 0x0 10. "FSC10,Filter scale configuration" "0,1"
|
|
bitfld.long 0x0 9. "FSC9,Filter scale configuration" "0,1"
|
|
bitfld.long 0x0 8. "FSC8,Filter scale configuration" "0,1"
|
|
bitfld.long 0x0 7. "FSC7,Filter scale configuration" "0,1"
|
|
bitfld.long 0x0 6. "FSC6,Filter scale configuration" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "FSC5,Filter scale configuration" "0,1"
|
|
bitfld.long 0x0 4. "FSC4,Filter scale configuration" "0,1"
|
|
bitfld.long 0x0 3. "FSC3,Filter scale configuration" "0,1"
|
|
bitfld.long 0x0 2. "FSC2,Filter scale configuration" "0,1"
|
|
bitfld.long 0x0 1. "FSC1,Filter scale configuration" "0,1"
|
|
bitfld.long 0x0 0. "FSC0,Filter scale configuration" "0,1"
|
|
group.long 0x214++0x3
|
|
line.long 0x0 "FFA1R,filter FIFO assignment"
|
|
bitfld.long 0x0 27. "FFA27,Filter FIFO assignment for" "0,1"
|
|
bitfld.long 0x0 26. "FFA26,Filter FIFO assignment for" "0,1"
|
|
bitfld.long 0x0 25. "FFA25,Filter FIFO assignment for" "0,1"
|
|
bitfld.long 0x0 24. "FFA24,Filter FIFO assignment for" "0,1"
|
|
bitfld.long 0x0 23. "FFA23,Filter FIFO assignment for" "0,1"
|
|
bitfld.long 0x0 22. "FFA22,Filter FIFO assignment for" "0,1"
|
|
bitfld.long 0x0 21. "FFA21,Filter FIFO assignment for" "0,1"
|
|
bitfld.long 0x0 20. "FFA20,Filter FIFO assignment for" "0,1"
|
|
bitfld.long 0x0 19. "FFA19,Filter FIFO assignment for" "0,1"
|
|
bitfld.long 0x0 18. "FFA18,Filter FIFO assignment for" "0,1"
|
|
bitfld.long 0x0 17. "FFA17,Filter FIFO assignment for" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "FFA16,Filter FIFO assignment for" "0,1"
|
|
bitfld.long 0x0 15. "FFA15,Filter FIFO assignment for" "0,1"
|
|
bitfld.long 0x0 14. "FFA14,Filter FIFO assignment for" "0,1"
|
|
bitfld.long 0x0 13. "FFA13,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 12. "FFA12,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 11. "FFA11,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 10. "FFA10,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 9. "FFA9,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 8. "FFA8,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 7. "FFA7,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 6. "FFA6,Filter FIFO assignment for filter" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "FFA5,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 4. "FFA4,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 3. "FFA3,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 2. "FFA2,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 1. "FFA1,Filter FIFO assignment for filter" "0,1"
|
|
bitfld.long 0x0 0. "FFA0,Filter FIFO assignment for filter" "0,1"
|
|
group.long 0x21C++0x3
|
|
line.long 0x0 "FA1R,filter activation register"
|
|
bitfld.long 0x0 27. "FACT27,Filter active" "0,1"
|
|
bitfld.long 0x0 26. "FACT26,Filter active" "0,1"
|
|
bitfld.long 0x0 25. "FACT25,Filter active" "0,1"
|
|
bitfld.long 0x0 24. "FACT24,Filter active" "0,1"
|
|
bitfld.long 0x0 23. "FACT23,Filter active" "0,1"
|
|
bitfld.long 0x0 22. "FACT22,Filter active" "0,1"
|
|
bitfld.long 0x0 21. "FACT21,Filter active" "0,1"
|
|
bitfld.long 0x0 20. "FACT20,Filter active" "0,1"
|
|
bitfld.long 0x0 19. "FACT19,Filter active" "0,1"
|
|
bitfld.long 0x0 18. "FACT18,Filter active" "0,1"
|
|
bitfld.long 0x0 17. "FACT17,Filter active" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "FACT16,Filter active" "0,1"
|
|
bitfld.long 0x0 15. "FACT15,Filter active" "0,1"
|
|
bitfld.long 0x0 14. "FACT14,Filter active" "0,1"
|
|
bitfld.long 0x0 13. "FACT13,Filter active" "0,1"
|
|
bitfld.long 0x0 12. "FACT12,Filter active" "0,1"
|
|
bitfld.long 0x0 11. "FACT11,Filter active" "0,1"
|
|
bitfld.long 0x0 10. "FACT10,Filter active" "0,1"
|
|
bitfld.long 0x0 9. "FACT9,Filter active" "0,1"
|
|
bitfld.long 0x0 8. "FACT8,Filter active" "0,1"
|
|
bitfld.long 0x0 7. "FACT7,Filter active" "0,1"
|
|
bitfld.long 0x0 6. "FACT6,Filter active" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "FACT5,Filter active" "0,1"
|
|
bitfld.long 0x0 4. "FACT4,Filter active" "0,1"
|
|
bitfld.long 0x0 3. "FACT3,Filter active" "0,1"
|
|
bitfld.long 0x0 2. "FACT2,Filter active" "0,1"
|
|
bitfld.long 0x0 1. "FACT1,Filter active" "0,1"
|
|
bitfld.long 0x0 0. "FACT0,Filter active" "0,1"
|
|
group.long 0x240++0xDF
|
|
line.long 0x0 "F0R1,Filter bank 0 register 1"
|
|
bitfld.long 0x0 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0x0 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0x0 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0x0 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0x0 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0x0 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0x0 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0x0 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0x0 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0x0 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0x0 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0x0 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0x0 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0x0 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0x0 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0x0 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0x0 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0x0 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0x0 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0x0 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0x0 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0x0 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0x0 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0x0 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0x0 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0x0 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0x0 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0x0 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0x0 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0x0 0. "FB0,Filter bits" "0,1"
|
|
line.long 0x4 "F0R2,Filter bank 0 register 2"
|
|
bitfld.long 0x4 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0x4 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0x4 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0x4 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0x4 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0x4 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0x4 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0x4 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0x4 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0x4 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0x4 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x4 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0x4 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0x4 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0x4 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0x4 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0x4 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0x4 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0x4 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0x4 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0x4 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0x4 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0x4 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0x4 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0x4 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0x4 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0x4 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0x4 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0x4 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0x4 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0x4 0. "FB0,Filter bits" "0,1"
|
|
line.long 0x8 "F1R1,Filter bank 1 register 1"
|
|
bitfld.long 0x8 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0x8 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0x8 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0x8 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0x8 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0x8 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0x8 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0x8 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0x8 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0x8 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0x8 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x8 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0x8 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0x8 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0x8 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0x8 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0x8 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0x8 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0x8 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0x8 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0x8 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0x8 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x8 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0x8 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0x8 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0x8 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0x8 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0x8 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0x8 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0x8 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0x8 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0x8 0. "FB0,Filter bits" "0,1"
|
|
line.long 0xC "F1R2,Filter bank 1 register 2"
|
|
bitfld.long 0xC 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0xC 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0xC 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0xC 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0xC 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0xC 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0xC 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0xC 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0xC 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0xC 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0xC 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0xC 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0xC 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0xC 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0xC 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0xC 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0xC 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0xC 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0xC 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0xC 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0xC 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0xC 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0xC 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0xC 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0xC 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0xC 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0xC 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0xC 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0xC 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0xC 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0xC 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0xC 0. "FB0,Filter bits" "0,1"
|
|
line.long 0x10 "F2R1,Filter bank 2 register 1"
|
|
bitfld.long 0x10 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0x10 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0x10 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0x10 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0x10 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0x10 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0x10 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0x10 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0x10 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0x10 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0x10 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x10 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0x10 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0x10 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0x10 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0x10 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0x10 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0x10 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0x10 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0x10 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0x10 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0x10 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x10 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0x10 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0x10 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0x10 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0x10 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0x10 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0x10 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0x10 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0x10 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0x10 0. "FB0,Filter bits" "0,1"
|
|
line.long 0x14 "F2R2,Filter bank 2 register 2"
|
|
bitfld.long 0x14 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0x14 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0x14 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0x14 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0x14 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0x14 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0x14 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0x14 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0x14 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0x14 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0x14 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x14 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0x14 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0x14 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0x14 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0x14 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0x14 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0x14 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0x14 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0x14 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0x14 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0x14 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x14 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0x14 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0x14 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0x14 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0x14 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0x14 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0x14 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0x14 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0x14 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0x14 0. "FB0,Filter bits" "0,1"
|
|
line.long 0x18 "F3R1,Filter bank 3 register 1"
|
|
bitfld.long 0x18 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0x18 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0x18 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0x18 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0x18 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0x18 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0x18 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0x18 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0x18 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0x18 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0x18 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x18 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0x18 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0x18 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0x18 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0x18 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0x18 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0x18 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0x18 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0x18 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0x18 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0x18 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x18 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0x18 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0x18 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0x18 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0x18 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0x18 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0x18 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0x18 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0x18 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0x18 0. "FB0,Filter bits" "0,1"
|
|
line.long 0x1C "F3R2,Filter bank 3 register 2"
|
|
bitfld.long 0x1C 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0x1C 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0x1C 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0x1C 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0x1C 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0x1C 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0x1C 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0x1C 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0x1C 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0x1C 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0x1C 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0x1C 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0x1C 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0x1C 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0x1C 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0x1C 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0x1C 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0x1C 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0x1C 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0x1C 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0x1C 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0x1C 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0x1C 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0x1C 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0x1C 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0x1C 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0x1C 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0x1C 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0x1C 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0x1C 0. "FB0,Filter bits" "0,1"
|
|
line.long 0x20 "F4R1,Filter bank 4 register 1"
|
|
bitfld.long 0x20 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0x20 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0x20 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0x20 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0x20 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0x20 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0x20 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0x20 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0x20 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0x20 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0x20 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x20 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0x20 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0x20 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0x20 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0x20 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0x20 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0x20 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0x20 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0x20 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0x20 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0x20 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x20 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0x20 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0x20 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0x20 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0x20 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0x20 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0x20 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0x20 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0x20 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0x20 0. "FB0,Filter bits" "0,1"
|
|
line.long 0x24 "F4R2,Filter bank 4 register 2"
|
|
bitfld.long 0x24 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0x24 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0x24 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0x24 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0x24 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0x24 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0x24 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0x24 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0x24 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0x24 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0x24 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x24 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0x24 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0x24 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0x24 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0x24 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0x24 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0x24 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0x24 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0x24 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0x24 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0x24 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x24 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0x24 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0x24 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0x24 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0x24 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0x24 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0x24 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0x24 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0x24 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0x24 0. "FB0,Filter bits" "0,1"
|
|
line.long 0x28 "F5R1,Filter bank 5 register 1"
|
|
bitfld.long 0x28 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0x28 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0x28 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0x28 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0x28 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0x28 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0x28 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0x28 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0x28 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0x28 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0x28 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x28 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0x28 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0x28 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0x28 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0x28 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0x28 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0x28 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0x28 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0x28 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0x28 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0x28 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x28 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0x28 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0x28 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0x28 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0x28 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0x28 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0x28 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0x28 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0x28 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0x28 0. "FB0,Filter bits" "0,1"
|
|
line.long 0x2C "F5R2,Filter bank 5 register 2"
|
|
bitfld.long 0x2C 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0x2C 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0x2C 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0x2C 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0x2C 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0x2C 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0x2C 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0x2C 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0x2C 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0x2C 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0x2C 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x2C 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0x2C 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0x2C 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0x2C 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0x2C 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0x2C 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0x2C 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0x2C 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0x2C 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0x2C 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0x2C 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x2C 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0x2C 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0x2C 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0x2C 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0x2C 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0x2C 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0x2C 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0x2C 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0x2C 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0x2C 0. "FB0,Filter bits" "0,1"
|
|
line.long 0x30 "F6R1,Filter bank 6 register 1"
|
|
bitfld.long 0x30 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0x30 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0x30 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0x30 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0x30 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0x30 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0x30 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0x30 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0x30 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0x30 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0x30 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x30 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0x30 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0x30 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0x30 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0x30 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0x30 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0x30 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0x30 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0x30 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0x30 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0x30 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x30 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0x30 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0x30 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0x30 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0x30 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0x30 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0x30 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0x30 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0x30 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0x30 0. "FB0,Filter bits" "0,1"
|
|
line.long 0x34 "F6R2,Filter bank 6 register 2"
|
|
bitfld.long 0x34 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0x34 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0x34 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0x34 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0x34 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0x34 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0x34 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0x34 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0x34 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0x34 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0x34 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x34 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0x34 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0x34 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0x34 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0x34 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0x34 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0x34 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0x34 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0x34 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0x34 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0x34 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x34 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0x34 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0x34 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0x34 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0x34 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0x34 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0x34 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0x34 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0x34 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0x34 0. "FB0,Filter bits" "0,1"
|
|
line.long 0x38 "F7R1,Filter bank 7 register 1"
|
|
bitfld.long 0x38 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0x38 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0x38 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0x38 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0x38 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0x38 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0x38 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0x38 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0x38 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0x38 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0x38 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x38 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0x38 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0x38 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0x38 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0x38 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0x38 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0x38 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0x38 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0x38 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0x38 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0x38 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x38 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0x38 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0x38 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0x38 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0x38 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0x38 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0x38 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0x38 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0x38 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0x38 0. "FB0,Filter bits" "0,1"
|
|
line.long 0x3C "F7R2,Filter bank 7 register 2"
|
|
bitfld.long 0x3C 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0x3C 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0x3C 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0x3C 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0x3C 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0x3C 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0x3C 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0x3C 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0x3C 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0x3C 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0x3C 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x3C 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0x3C 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0x3C 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0x3C 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0x3C 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0x3C 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0x3C 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0x3C 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0x3C 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0x3C 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0x3C 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x3C 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0x3C 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0x3C 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0x3C 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0x3C 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0x3C 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0x3C 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0x3C 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0x3C 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0x3C 0. "FB0,Filter bits" "0,1"
|
|
line.long 0x40 "F8R1,Filter bank 8 register 1"
|
|
bitfld.long 0x40 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0x40 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0x40 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0x40 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0x40 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0x40 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0x40 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0x40 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0x40 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0x40 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0x40 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x40 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0x40 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0x40 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0x40 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0x40 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0x40 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0x40 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0x40 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0x40 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0x40 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0x40 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x40 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0x40 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0x40 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0x40 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0x40 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0x40 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0x40 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0x40 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0x40 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0x40 0. "FB0,Filter bits" "0,1"
|
|
line.long 0x44 "F8R2,Filter bank 8 register 2"
|
|
bitfld.long 0x44 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0x44 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0x44 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0x44 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0x44 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0x44 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0x44 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0x44 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0x44 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0x44 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0x44 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x44 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0x44 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0x44 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0x44 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0x44 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0x44 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0x44 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0x44 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0x44 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0x44 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0x44 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x44 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0x44 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0x44 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0x44 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0x44 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0x44 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0x44 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0x44 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0x44 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0x44 0. "FB0,Filter bits" "0,1"
|
|
line.long 0x48 "F9R1,Filter bank 9 register 1"
|
|
bitfld.long 0x48 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0x48 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0x48 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0x48 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0x48 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0x48 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0x48 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0x48 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0x48 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0x48 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0x48 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x48 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0x48 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0x48 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0x48 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0x48 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0x48 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0x48 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0x48 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0x48 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0x48 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0x48 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x48 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0x48 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0x48 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0x48 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0x48 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0x48 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0x48 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0x48 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0x48 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0x48 0. "FB0,Filter bits" "0,1"
|
|
line.long 0x4C "F9R2,Filter bank 9 register 2"
|
|
bitfld.long 0x4C 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0x4C 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0x4C 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0x4C 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0x4C 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0x4C 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0x4C 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0x4C 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0x4C 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0x4C 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0x4C 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x4C 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0x4C 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0x4C 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0x4C 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0x4C 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0x4C 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0x4C 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0x4C 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0x4C 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0x4C 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0x4C 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x4C 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0x4C 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0x4C 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0x4C 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0x4C 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0x4C 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0x4C 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0x4C 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0x4C 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0x4C 0. "FB0,Filter bits" "0,1"
|
|
line.long 0x50 "F10R1,Filter bank 10 register 1"
|
|
bitfld.long 0x50 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0x50 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0x50 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0x50 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0x50 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0x50 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0x50 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0x50 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0x50 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0x50 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0x50 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x50 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0x50 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0x50 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0x50 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0x50 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0x50 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0x50 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0x50 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0x50 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0x50 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0x50 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x50 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0x50 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0x50 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0x50 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0x50 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0x50 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0x50 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0x50 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0x50 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0x50 0. "FB0,Filter bits" "0,1"
|
|
line.long 0x54 "F10R2,Filter bank 10 register 2"
|
|
bitfld.long 0x54 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0x54 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0x54 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0x54 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0x54 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0x54 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0x54 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0x54 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0x54 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0x54 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0x54 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x54 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0x54 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0x54 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0x54 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0x54 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0x54 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0x54 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0x54 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0x54 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0x54 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0x54 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x54 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0x54 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0x54 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0x54 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0x54 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0x54 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0x54 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0x54 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0x54 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0x54 0. "FB0,Filter bits" "0,1"
|
|
line.long 0x58 "F11R1,Filter bank 11 register 1"
|
|
bitfld.long 0x58 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0x58 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0x58 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0x58 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0x58 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0x58 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0x58 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0x58 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0x58 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0x58 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0x58 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x58 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0x58 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0x58 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0x58 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0x58 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0x58 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0x58 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0x58 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0x58 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0x58 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0x58 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x58 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0x58 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0x58 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0x58 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0x58 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0x58 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0x58 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0x58 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0x58 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0x58 0. "FB0,Filter bits" "0,1"
|
|
line.long 0x5C "F11R2,Filter bank 11 register 2"
|
|
bitfld.long 0x5C 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0x5C 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0x5C 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0x5C 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0x5C 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0x5C 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0x5C 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0x5C 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0x5C 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0x5C 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0x5C 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x5C 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0x5C 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0x5C 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0x5C 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0x5C 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0x5C 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0x5C 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0x5C 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0x5C 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0x5C 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0x5C 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x5C 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0x5C 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0x5C 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0x5C 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0x5C 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0x5C 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0x5C 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0x5C 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0x5C 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0x5C 0. "FB0,Filter bits" "0,1"
|
|
line.long 0x60 "F12R1,Filter bank 4 register 1"
|
|
bitfld.long 0x60 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0x60 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0x60 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0x60 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0x60 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0x60 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0x60 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0x60 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0x60 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0x60 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0x60 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x60 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0x60 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0x60 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0x60 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0x60 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0x60 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0x60 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0x60 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0x60 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0x60 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0x60 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x60 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0x60 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0x60 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0x60 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0x60 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0x60 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0x60 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0x60 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0x60 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0x60 0. "FB0,Filter bits" "0,1"
|
|
line.long 0x64 "F12R2,Filter bank 12 register 2"
|
|
bitfld.long 0x64 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0x64 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0x64 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0x64 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0x64 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0x64 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0x64 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0x64 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0x64 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0x64 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0x64 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x64 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0x64 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0x64 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0x64 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0x64 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0x64 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0x64 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0x64 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0x64 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0x64 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0x64 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x64 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0x64 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0x64 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0x64 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0x64 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0x64 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0x64 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0x64 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0x64 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0x64 0. "FB0,Filter bits" "0,1"
|
|
line.long 0x68 "F13R1,Filter bank 13 register 1"
|
|
bitfld.long 0x68 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0x68 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0x68 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0x68 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0x68 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0x68 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0x68 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0x68 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0x68 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0x68 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0x68 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x68 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0x68 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0x68 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0x68 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0x68 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0x68 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0x68 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0x68 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0x68 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0x68 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0x68 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x68 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0x68 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0x68 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0x68 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0x68 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0x68 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0x68 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0x68 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0x68 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0x68 0. "FB0,Filter bits" "0,1"
|
|
line.long 0x6C "F13R2,Filter bank 13 register 2"
|
|
bitfld.long 0x6C 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0x6C 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0x6C 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0x6C 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0x6C 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0x6C 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0x6C 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0x6C 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0x6C 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0x6C 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0x6C 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x6C 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0x6C 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0x6C 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0x6C 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0x6C 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0x6C 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0x6C 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0x6C 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0x6C 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0x6C 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0x6C 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x6C 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0x6C 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0x6C 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0x6C 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0x6C 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0x6C 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0x6C 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0x6C 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0x6C 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0x6C 0. "FB0,Filter bits" "0,1"
|
|
line.long 0x70 "F14R1,Filter bank 14 register 1"
|
|
bitfld.long 0x70 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0x70 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0x70 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0x70 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0x70 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0x70 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0x70 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0x70 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0x70 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0x70 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0x70 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x70 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0x70 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0x70 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0x70 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0x70 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0x70 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0x70 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0x70 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0x70 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0x70 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0x70 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x70 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0x70 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0x70 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0x70 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0x70 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0x70 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0x70 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0x70 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0x70 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0x70 0. "FB0,Filter bits" "0,1"
|
|
line.long 0x74 "F14R2,Filter bank 14 register 2"
|
|
bitfld.long 0x74 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0x74 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0x74 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0x74 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0x74 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0x74 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0x74 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0x74 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0x74 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0x74 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0x74 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x74 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0x74 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0x74 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0x74 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0x74 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0x74 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0x74 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0x74 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0x74 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0x74 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0x74 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x74 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0x74 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0x74 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0x74 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0x74 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0x74 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0x74 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0x74 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0x74 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0x74 0. "FB0,Filter bits" "0,1"
|
|
line.long 0x78 "F15R1,Filter bank 15 register 1"
|
|
bitfld.long 0x78 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0x78 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0x78 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0x78 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0x78 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0x78 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0x78 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0x78 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0x78 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0x78 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0x78 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x78 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0x78 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0x78 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0x78 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0x78 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0x78 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0x78 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0x78 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0x78 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0x78 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0x78 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x78 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0x78 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0x78 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0x78 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0x78 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0x78 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0x78 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0x78 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0x78 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0x78 0. "FB0,Filter bits" "0,1"
|
|
line.long 0x7C "F15R2,Filter bank 15 register 2"
|
|
bitfld.long 0x7C 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0x7C 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0x7C 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0x7C 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0x7C 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0x7C 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0x7C 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0x7C 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0x7C 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0x7C 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0x7C 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x7C 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0x7C 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0x7C 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0x7C 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0x7C 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0x7C 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0x7C 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0x7C 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0x7C 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0x7C 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0x7C 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x7C 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0x7C 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0x7C 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0x7C 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0x7C 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0x7C 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0x7C 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0x7C 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0x7C 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0x7C 0. "FB0,Filter bits" "0,1"
|
|
line.long 0x80 "F16R1,Filter bank 16 register 1"
|
|
bitfld.long 0x80 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0x80 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0x80 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0x80 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0x80 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0x80 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0x80 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0x80 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0x80 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0x80 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0x80 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x80 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0x80 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0x80 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0x80 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0x80 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0x80 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0x80 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0x80 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0x80 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0x80 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0x80 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x80 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0x80 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0x80 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0x80 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0x80 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0x80 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0x80 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0x80 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0x80 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0x80 0. "FB0,Filter bits" "0,1"
|
|
line.long 0x84 "F16R2,Filter bank 16 register 2"
|
|
bitfld.long 0x84 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0x84 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0x84 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0x84 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0x84 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0x84 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0x84 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0x84 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0x84 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0x84 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0x84 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x84 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0x84 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0x84 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0x84 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0x84 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0x84 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0x84 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0x84 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0x84 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0x84 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0x84 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x84 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0x84 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0x84 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0x84 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0x84 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0x84 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0x84 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0x84 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0x84 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0x84 0. "FB0,Filter bits" "0,1"
|
|
line.long 0x88 "F17R1,Filter bank 17 register 1"
|
|
bitfld.long 0x88 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0x88 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0x88 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0x88 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0x88 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0x88 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0x88 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0x88 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0x88 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0x88 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0x88 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x88 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0x88 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0x88 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0x88 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0x88 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0x88 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0x88 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0x88 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0x88 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0x88 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0x88 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x88 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0x88 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0x88 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0x88 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0x88 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0x88 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0x88 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0x88 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0x88 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0x88 0. "FB0,Filter bits" "0,1"
|
|
line.long 0x8C "F17R2,Filter bank 17 register 2"
|
|
bitfld.long 0x8C 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0x8C 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0x8C 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0x8C 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0x8C 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0x8C 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0x8C 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0x8C 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0x8C 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0x8C 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0x8C 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x8C 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0x8C 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0x8C 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0x8C 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0x8C 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0x8C 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0x8C 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0x8C 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0x8C 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0x8C 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0x8C 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x8C 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0x8C 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0x8C 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0x8C 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0x8C 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0x8C 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0x8C 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0x8C 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0x8C 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0x8C 0. "FB0,Filter bits" "0,1"
|
|
line.long 0x90 "F18R1,Filter bank 18 register 1"
|
|
bitfld.long 0x90 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0x90 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0x90 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0x90 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0x90 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0x90 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0x90 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0x90 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0x90 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0x90 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0x90 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x90 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0x90 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0x90 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0x90 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0x90 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0x90 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0x90 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0x90 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0x90 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0x90 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0x90 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x90 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0x90 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0x90 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0x90 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0x90 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0x90 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0x90 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0x90 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0x90 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0x90 0. "FB0,Filter bits" "0,1"
|
|
line.long 0x94 "F18R2,Filter bank 18 register 2"
|
|
bitfld.long 0x94 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0x94 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0x94 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0x94 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0x94 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0x94 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0x94 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0x94 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0x94 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0x94 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0x94 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x94 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0x94 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0x94 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0x94 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0x94 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0x94 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0x94 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0x94 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0x94 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0x94 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0x94 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x94 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0x94 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0x94 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0x94 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0x94 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0x94 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0x94 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0x94 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0x94 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0x94 0. "FB0,Filter bits" "0,1"
|
|
line.long 0x98 "F19R1,Filter bank 19 register 1"
|
|
bitfld.long 0x98 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0x98 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0x98 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0x98 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0x98 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0x98 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0x98 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0x98 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0x98 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0x98 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0x98 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x98 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0x98 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0x98 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0x98 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0x98 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0x98 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0x98 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0x98 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0x98 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0x98 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0x98 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x98 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0x98 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0x98 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0x98 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0x98 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0x98 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0x98 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0x98 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0x98 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0x98 0. "FB0,Filter bits" "0,1"
|
|
line.long 0x9C "F19R2,Filter bank 19 register 2"
|
|
bitfld.long 0x9C 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0x9C 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0x9C 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0x9C 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0x9C 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0x9C 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0x9C 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0x9C 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0x9C 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0x9C 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0x9C 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x9C 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0x9C 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0x9C 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0x9C 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0x9C 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0x9C 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0x9C 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0x9C 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0x9C 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0x9C 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0x9C 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0x9C 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0x9C 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0x9C 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0x9C 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0x9C 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0x9C 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0x9C 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0x9C 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0x9C 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0x9C 0. "FB0,Filter bits" "0,1"
|
|
line.long 0xA0 "F20R1,Filter bank 20 register 1"
|
|
bitfld.long 0xA0 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0xA0 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0xA0 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0xA0 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0xA0 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0xA0 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0xA0 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0xA0 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0xA0 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0xA0 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0xA0 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0xA0 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0xA0 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0xA0 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0xA0 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0xA0 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0xA0 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0xA0 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0xA0 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0xA0 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0xA0 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0xA0 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0xA0 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0xA0 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0xA0 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0xA0 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0xA0 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0xA0 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0xA0 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0xA0 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0xA0 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0xA0 0. "FB0,Filter bits" "0,1"
|
|
line.long 0xA4 "F20R2,Filter bank 20 register 2"
|
|
bitfld.long 0xA4 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0xA4 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0xA4 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0xA4 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0xA4 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0xA4 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0xA4 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0xA4 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0xA4 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0xA4 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0xA4 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0xA4 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0xA4 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0xA4 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0xA4 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0xA4 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0xA4 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0xA4 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0xA4 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0xA4 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0xA4 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0xA4 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0xA4 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0xA4 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0xA4 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0xA4 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0xA4 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0xA4 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0xA4 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0xA4 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0xA4 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0xA4 0. "FB0,Filter bits" "0,1"
|
|
line.long 0xA8 "F21R1,Filter bank 21 register 1"
|
|
bitfld.long 0xA8 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0xA8 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0xA8 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0xA8 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0xA8 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0xA8 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0xA8 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0xA8 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0xA8 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0xA8 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0xA8 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0xA8 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0xA8 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0xA8 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0xA8 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0xA8 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0xA8 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0xA8 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0xA8 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0xA8 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0xA8 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0xA8 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0xA8 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0xA8 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0xA8 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0xA8 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0xA8 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0xA8 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0xA8 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0xA8 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0xA8 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0xA8 0. "FB0,Filter bits" "0,1"
|
|
line.long 0xAC "F21R2,Filter bank 21 register 2"
|
|
bitfld.long 0xAC 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0xAC 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0xAC 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0xAC 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0xAC 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0xAC 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0xAC 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0xAC 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0xAC 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0xAC 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0xAC 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0xAC 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0xAC 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0xAC 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0xAC 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0xAC 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0xAC 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0xAC 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0xAC 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0xAC 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0xAC 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0xAC 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0xAC 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0xAC 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0xAC 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0xAC 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0xAC 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0xAC 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0xAC 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0xAC 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0xAC 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0xAC 0. "FB0,Filter bits" "0,1"
|
|
line.long 0xB0 "F22R1,Filter bank 22 register 1"
|
|
bitfld.long 0xB0 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0xB0 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0xB0 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0xB0 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0xB0 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0xB0 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0xB0 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0xB0 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0xB0 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0xB0 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0xB0 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0xB0 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0xB0 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0xB0 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0xB0 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0xB0 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0xB0 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0xB0 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0xB0 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0xB0 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0xB0 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0xB0 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0xB0 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0xB0 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0xB0 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0xB0 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0xB0 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0xB0 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0xB0 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0xB0 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0xB0 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0xB0 0. "FB0,Filter bits" "0,1"
|
|
line.long 0xB4 "F22R2,Filter bank 22 register 2"
|
|
bitfld.long 0xB4 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0xB4 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0xB4 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0xB4 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0xB4 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0xB4 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0xB4 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0xB4 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0xB4 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0xB4 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0xB4 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0xB4 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0xB4 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0xB4 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0xB4 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0xB4 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0xB4 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0xB4 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0xB4 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0xB4 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0xB4 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0xB4 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0xB4 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0xB4 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0xB4 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0xB4 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0xB4 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0xB4 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0xB4 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0xB4 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0xB4 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0xB4 0. "FB0,Filter bits" "0,1"
|
|
line.long 0xB8 "F23R1,Filter bank 23 register 1"
|
|
bitfld.long 0xB8 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0xB8 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0xB8 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0xB8 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0xB8 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0xB8 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0xB8 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0xB8 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0xB8 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0xB8 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0xB8 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0xB8 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0xB8 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0xB8 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0xB8 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0xB8 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0xB8 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0xB8 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0xB8 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0xB8 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0xB8 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0xB8 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0xB8 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0xB8 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0xB8 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0xB8 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0xB8 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0xB8 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0xB8 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0xB8 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0xB8 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0xB8 0. "FB0,Filter bits" "0,1"
|
|
line.long 0xBC "F23R2,Filter bank 23 register 2"
|
|
bitfld.long 0xBC 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0xBC 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0xBC 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0xBC 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0xBC 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0xBC 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0xBC 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0xBC 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0xBC 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0xBC 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0xBC 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0xBC 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0xBC 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0xBC 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0xBC 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0xBC 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0xBC 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0xBC 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0xBC 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0xBC 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0xBC 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0xBC 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0xBC 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0xBC 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0xBC 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0xBC 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0xBC 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0xBC 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0xBC 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0xBC 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0xBC 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0xBC 0. "FB0,Filter bits" "0,1"
|
|
line.long 0xC0 "F24R1,Filter bank 24 register 1"
|
|
bitfld.long 0xC0 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0xC0 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0xC0 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0xC0 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0xC0 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0xC0 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0xC0 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0xC0 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0xC0 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0xC0 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0xC0 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0xC0 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0xC0 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0xC0 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0xC0 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0xC0 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0xC0 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0xC0 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0xC0 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0xC0 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0xC0 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0xC0 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0xC0 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0xC0 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0xC0 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0xC0 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0xC0 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0xC0 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0xC0 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0xC0 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0xC0 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0xC0 0. "FB0,Filter bits" "0,1"
|
|
line.long 0xC4 "F24R2,Filter bank 24 register 2"
|
|
bitfld.long 0xC4 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0xC4 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0xC4 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0xC4 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0xC4 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0xC4 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0xC4 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0xC4 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0xC4 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0xC4 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0xC4 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0xC4 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0xC4 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0xC4 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0xC4 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0xC4 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0xC4 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0xC4 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0xC4 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0xC4 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0xC4 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0xC4 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0xC4 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0xC4 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0xC4 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0xC4 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0xC4 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0xC4 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0xC4 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0xC4 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0xC4 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0xC4 0. "FB0,Filter bits" "0,1"
|
|
line.long 0xC8 "F25R1,Filter bank 25 register 1"
|
|
bitfld.long 0xC8 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0xC8 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0xC8 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0xC8 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0xC8 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0xC8 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0xC8 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0xC8 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0xC8 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0xC8 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0xC8 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0xC8 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0xC8 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0xC8 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0xC8 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0xC8 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0xC8 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0xC8 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0xC8 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0xC8 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0xC8 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0xC8 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0xC8 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0xC8 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0xC8 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0xC8 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0xC8 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0xC8 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0xC8 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0xC8 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0xC8 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0xC8 0. "FB0,Filter bits" "0,1"
|
|
line.long 0xCC "F25R2,Filter bank 25 register 2"
|
|
bitfld.long 0xCC 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0xCC 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0xCC 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0xCC 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0xCC 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0xCC 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0xCC 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0xCC 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0xCC 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0xCC 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0xCC 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0xCC 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0xCC 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0xCC 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0xCC 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0xCC 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0xCC 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0xCC 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0xCC 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0xCC 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0xCC 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0xCC 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0xCC 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0xCC 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0xCC 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0xCC 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0xCC 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0xCC 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0xCC 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0xCC 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0xCC 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0xCC 0. "FB0,Filter bits" "0,1"
|
|
line.long 0xD0 "F26R1,Filter bank 26 register 1"
|
|
bitfld.long 0xD0 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0xD0 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0xD0 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0xD0 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0xD0 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0xD0 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0xD0 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0xD0 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0xD0 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0xD0 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0xD0 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0xD0 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0xD0 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0xD0 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0xD0 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0xD0 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0xD0 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0xD0 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0xD0 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0xD0 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0xD0 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0xD0 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0xD0 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0xD0 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0xD0 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0xD0 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0xD0 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0xD0 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0xD0 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0xD0 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0xD0 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0xD0 0. "FB0,Filter bits" "0,1"
|
|
line.long 0xD4 "F26R2,Filter bank 26 register 2"
|
|
bitfld.long 0xD4 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0xD4 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0xD4 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0xD4 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0xD4 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0xD4 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0xD4 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0xD4 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0xD4 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0xD4 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0xD4 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0xD4 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0xD4 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0xD4 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0xD4 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0xD4 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0xD4 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0xD4 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0xD4 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0xD4 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0xD4 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0xD4 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0xD4 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0xD4 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0xD4 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0xD4 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0xD4 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0xD4 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0xD4 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0xD4 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0xD4 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0xD4 0. "FB0,Filter bits" "0,1"
|
|
line.long 0xD8 "F27R1,Filter bank 27 register 1"
|
|
bitfld.long 0xD8 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0xD8 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0xD8 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0xD8 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0xD8 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0xD8 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0xD8 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0xD8 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0xD8 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0xD8 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0xD8 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0xD8 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0xD8 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0xD8 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0xD8 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0xD8 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0xD8 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0xD8 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0xD8 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0xD8 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0xD8 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0xD8 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0xD8 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0xD8 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0xD8 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0xD8 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0xD8 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0xD8 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0xD8 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0xD8 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0xD8 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0xD8 0. "FB0,Filter bits" "0,1"
|
|
line.long 0xDC "F27R2,Filter bank 27 register 2"
|
|
bitfld.long 0xDC 31. "FB31,Filter bits" "0,1"
|
|
bitfld.long 0xDC 30. "FB30,Filter bits" "0,1"
|
|
bitfld.long 0xDC 29. "FB29,Filter bits" "0,1"
|
|
bitfld.long 0xDC 28. "FB28,Filter bits" "0,1"
|
|
bitfld.long 0xDC 27. "FB27,Filter bits" "0,1"
|
|
bitfld.long 0xDC 26. "FB26,Filter bits" "0,1"
|
|
bitfld.long 0xDC 25. "FB25,Filter bits" "0,1"
|
|
bitfld.long 0xDC 24. "FB24,Filter bits" "0,1"
|
|
bitfld.long 0xDC 23. "FB23,Filter bits" "0,1"
|
|
bitfld.long 0xDC 22. "FB22,Filter bits" "0,1"
|
|
bitfld.long 0xDC 21. "FB21,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0xDC 20. "FB20,Filter bits" "0,1"
|
|
bitfld.long 0xDC 19. "FB19,Filter bits" "0,1"
|
|
bitfld.long 0xDC 18. "FB18,Filter bits" "0,1"
|
|
bitfld.long 0xDC 17. "FB17,Filter bits" "0,1"
|
|
bitfld.long 0xDC 16. "FB16,Filter bits" "0,1"
|
|
bitfld.long 0xDC 15. "FB15,Filter bits" "0,1"
|
|
bitfld.long 0xDC 14. "FB14,Filter bits" "0,1"
|
|
bitfld.long 0xDC 13. "FB13,Filter bits" "0,1"
|
|
bitfld.long 0xDC 12. "FB12,Filter bits" "0,1"
|
|
bitfld.long 0xDC 11. "FB11,Filter bits" "0,1"
|
|
bitfld.long 0xDC 10. "FB10,Filter bits" "0,1"
|
|
newline
|
|
bitfld.long 0xDC 9. "FB9,Filter bits" "0,1"
|
|
bitfld.long 0xDC 8. "FB8,Filter bits" "0,1"
|
|
bitfld.long 0xDC 7. "FB7,Filter bits" "0,1"
|
|
bitfld.long 0xDC 6. "FB6,Filter bits" "0,1"
|
|
bitfld.long 0xDC 5. "FB5,Filter bits" "0,1"
|
|
bitfld.long 0xDC 4. "FB4,Filter bits" "0,1"
|
|
bitfld.long 0xDC 3. "FB3,Filter bits" "0,1"
|
|
bitfld.long 0xDC 2. "FB2,Filter bits" "0,1"
|
|
bitfld.long 0xDC 1. "FB1,Filter bits" "0,1"
|
|
bitfld.long 0xDC 0. "FB0,Filter bits" "0,1"
|
|
tree.end
|
|
tree "COMP (Comparator)"
|
|
base ad:0x40010200
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "COMP1_CSR,Comparator 1 control and status"
|
|
bitfld.long 0x0 31. "COMP1_LOCK,COMP1_CSR register lock" "0,1"
|
|
rbitfld.long 0x0 30. "COMP1_VALUE,Comparator 1 output status" "0,1"
|
|
bitfld.long 0x0 23. "COMP1_SCALEN,Voltage scaler enable bit" "0,1"
|
|
bitfld.long 0x0 22. "COMP1_BRGEN,Scaler bridge enable" "0,1"
|
|
bitfld.long 0x0 18.--20. "COMP1_BLANKING,Comparator 1 blanking source selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 16.--17. "COMP1_HYST,Comparator 1 hysteresis selection" "0,1,2,3"
|
|
bitfld.long 0x0 15. "COMP1_POLARITY,Comparator 1 polarity selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "COMP1_INPSEL,Comparator1 input plus selection" "0,1"
|
|
bitfld.long 0x0 4.--6. "COMP1_INMSEL,Comparator 1 Input Minus connection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 2.--3. "COMP1_PWRMODE,Power Mode of the comparator" "0,1,2,3"
|
|
bitfld.long 0x0 0. "COMP1_EN,Comparator 1 enable bit" "0,1"
|
|
line.long 0x4 "COMP2_CSR,Comparator 2 control and status"
|
|
bitfld.long 0x4 31. "COMP2_LOCK,COMP2_CSR register lock" "0,1"
|
|
rbitfld.long 0x4 30. "COMP2_VALUE,Comparator 2 output status" "0,1"
|
|
bitfld.long 0x4 23. "COMP2_SCALEN,Voltage scaler enable bit" "0,1"
|
|
bitfld.long 0x4 22. "COMP2_BRGEN,Scaler bridge enable" "0,1"
|
|
bitfld.long 0x4 18.--20. "COMP2_BLANKING,Comparator 2 blanking source selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 16.--17. "COMP2_HYST,Comparator 2 hysteresis selection" "0,1,2,3"
|
|
bitfld.long 0x4 15. "COMP2_POLARITY,Comparator 2 polarity selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "COMP2_WINMODE,Windows mode selection bit" "0,1"
|
|
bitfld.long 0x4 7. "COMP2_INPSEL,Comparator 2 Input Plus connection" "0,1"
|
|
bitfld.long 0x4 4.--6. "COMP2_INMSEL,Comparator 2 Input Minus connection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 2.--3. "COMP2_PWRMODE,Power Mode of the comparator" "0,1,2,3"
|
|
bitfld.long 0x4 0. "COMP2_EN,Comparator 2 enable bit" "0,1"
|
|
tree.end
|
|
tree "CRC (Cyclic Redundancy Check Calculation Unit)"
|
|
base ad:0x40023000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "DR,Data register"
|
|
hexmask.long 0x0 0.--31. 1. "DR,Data register bits"
|
|
line.long 0x4 "IDR,Independent data register"
|
|
hexmask.long.byte 0x4 0.--7. 1. "IDR,General-purpose 8-bit data register"
|
|
line.long 0x8 "CR,Control register"
|
|
bitfld.long 0x8 7. "REV_OUT,Reverse output data" "0,1"
|
|
bitfld.long 0x8 5.--6. "REV_IN,Reverse input data" "0,1,2,3"
|
|
bitfld.long 0x8 3.--4. "POLYSIZE,Polynomial size" "0,1,2,3"
|
|
bitfld.long 0x8 0. "RESET,RESET bit" "0,1"
|
|
group.long 0x10++0x7
|
|
line.long 0x0 "INIT,Initial CRC value"
|
|
hexmask.long 0x0 0.--31. 1. "CRC_INIT,Programmable initial CRC"
|
|
line.long 0x4 "POL,polynomial"
|
|
hexmask.long 0x4 0.--31. 1. "Polynomialcoefficients,Programmable polynomial"
|
|
tree.end
|
|
tree "CRS (Clock Recovery System)"
|
|
base ad:0x40006000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "CR,control register"
|
|
hexmask.long.byte 0x0 8.--13. 1. "TRIM,HSI48 oscillator smooth"
|
|
bitfld.long 0x0 7. "SWSYNC,Generate software SYNC" "0,1"
|
|
bitfld.long 0x0 6. "AUTOTRIMEN,Automatic trimming enable" "0,1"
|
|
bitfld.long 0x0 5. "CEN,Frequency error counter" "0,1"
|
|
bitfld.long 0x0 3. "ESYNCIE,Expected SYNC interrupt" "0,1"
|
|
bitfld.long 0x0 2. "ERRIE,Synchronization or trimming error" "0,1"
|
|
bitfld.long 0x0 1. "SYNCWARNIE,SYNC warning interrupt" "0,1"
|
|
bitfld.long 0x0 0. "SYNCOKIE,SYNC event OK interrupt" "0,1"
|
|
line.long 0x4 "CFGR,configuration register"
|
|
bitfld.long 0x4 31. "SYNCPOL,SYNC polarity selection" "0,1"
|
|
bitfld.long 0x4 28.--29. "SYNCSRC,SYNC signal source" "0,1,2,3"
|
|
bitfld.long 0x4 24.--26. "SYNCDIV,SYNC divider" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x4 16.--23. 1. "FELIM,Frequency error limit"
|
|
hexmask.long.word 0x4 0.--15. 1. "RELOAD,Counter reload value"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "ISR,interrupt and status register"
|
|
hexmask.long.word 0x0 16.--31. 1. "FECAP,Frequency error capture"
|
|
bitfld.long 0x0 15. "FEDIR,Frequency error direction" "0,1"
|
|
bitfld.long 0x0 10. "TRIMOVF,Trimming overflow or" "0,1"
|
|
bitfld.long 0x0 9. "SYNCMISS,SYNC missed" "0,1"
|
|
bitfld.long 0x0 8. "SYNCERR,SYNC error" "0,1"
|
|
bitfld.long 0x0 3. "ESYNCF,Expected SYNC flag" "0,1"
|
|
bitfld.long 0x0 2. "ERRF,Error flag" "0,1"
|
|
bitfld.long 0x0 1. "SYNCWARNF,SYNC warning flag" "0,1"
|
|
bitfld.long 0x0 0. "SYNCOKF,SYNC event OK flag" "0,1"
|
|
group.long 0xC++0x3
|
|
line.long 0x0 "ICR,interrupt flag clear register"
|
|
bitfld.long 0x0 3. "ESYNCC,Expected SYNC clear flag" "0,1"
|
|
bitfld.long 0x0 2. "ERRC,Error clear flag" "0,1"
|
|
bitfld.long 0x0 1. "SYNCWARNC,SYNC warning clear flag" "0,1"
|
|
bitfld.long 0x0 0. "SYNCOKC,SYNC event OK clear flag" "0,1"
|
|
tree.end
|
|
tree "DAC (Digital-to-Analog Converter)"
|
|
base ad:0x40007400
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CR,control register"
|
|
bitfld.long 0x0 30. "CEN2,DAC Channel 2 calibration" "0,1"
|
|
bitfld.long 0x0 29. "DMAUDRIE2,DAC channel2 DMA underrun interrupt" "0,1"
|
|
bitfld.long 0x0 28. "DMAEN2,DAC channel2 DMA enable" "0,1"
|
|
hexmask.long.byte 0x0 24.--27. 1. "MAMP2,DAC channel2 mask/amplitude"
|
|
bitfld.long 0x0 22.--23. "WAVE2,DAC channel2 noise/triangle wave" "0,1,2,3"
|
|
bitfld.long 0x0 19.--21. "TSEL2,DAC channel2 trigger" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 18. "TEN2,DAC channel2 trigger" "0,1"
|
|
bitfld.long 0x0 16. "EN2,DAC channel2 enable" "0,1"
|
|
bitfld.long 0x0 14. "CEN1,DAC Channel 1 calibration" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "DMAUDRIE1,DAC channel1 DMA Underrun Interrupt" "0,1"
|
|
bitfld.long 0x0 12. "DMAEN1,DAC channel1 DMA enable" "0,1"
|
|
hexmask.long.byte 0x0 8.--11. 1. "MAMP1,DAC channel1 mask/amplitude"
|
|
bitfld.long 0x0 6.--7. "WAVE1,DAC channel1 noise/triangle wave" "0,1,2,3"
|
|
bitfld.long 0x0 3.--5. "TSEL1,DAC channel1 trigger" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 2. "TEN1,DAC channel1 trigger" "0,1"
|
|
bitfld.long 0x0 0. "EN1,DAC channel1 enable" "0,1"
|
|
wgroup.long 0x4++0x3
|
|
line.long 0x0 "SWTRIGR,software trigger register"
|
|
bitfld.long 0x0 1. "SWTRIG2,DAC channel2 software" "0,1"
|
|
bitfld.long 0x0 0. "SWTRIG1,DAC channel1 software" "0,1"
|
|
group.long 0x8++0x23
|
|
line.long 0x0 "DHR12R1,channel1 12-bit right-aligned data holding"
|
|
hexmask.long.word 0x0 0.--11. 1. "DACC1DHR,DAC channel1 12-bit right-aligned"
|
|
line.long 0x4 "DHR12L1,channel1 12-bit left-aligned data holding"
|
|
hexmask.long.word 0x4 4.--15. 1. "DACC1DHR,DAC channel1 12-bit left-aligned"
|
|
line.long 0x8 "DHR8R1,channel1 8-bit right-aligned data holding"
|
|
hexmask.long.byte 0x8 0.--7. 1. "DACC1DHR,DAC channel1 8-bit right-aligned"
|
|
line.long 0xC "DHR12R2,channel2 12-bit right aligned data holding"
|
|
hexmask.long.word 0xC 0.--11. 1. "DACC2DHR,DAC channel2 12-bit right-aligned"
|
|
line.long 0x10 "DHR12L2,channel2 12-bit left aligned data holding"
|
|
hexmask.long.word 0x10 4.--15. 1. "DACC2DHR,DAC channel2 12-bit left-aligned"
|
|
line.long 0x14 "DHR8R2,channel2 8-bit right-aligned data holding"
|
|
hexmask.long.byte 0x14 0.--7. 1. "DACC2DHR,DAC channel2 8-bit right-aligned"
|
|
line.long 0x18 "DHR12RD,Dual DAC 12-bit right-aligned data holding"
|
|
hexmask.long.word 0x18 16.--27. 1. "DACC2DHR,DAC channel2 12-bit right-aligned"
|
|
hexmask.long.word 0x18 0.--11. 1. "DACC1DHR,DAC channel1 12-bit right-aligned"
|
|
line.long 0x1C "DHR12LD,DUAL DAC 12-bit left aligned data holding"
|
|
hexmask.long.word 0x1C 20.--31. 1. "DACC2DHR,DAC channel2 12-bit left-aligned"
|
|
hexmask.long.word 0x1C 4.--15. 1. "DACC1DHR,DAC channel1 12-bit left-aligned"
|
|
line.long 0x20 "DHR8RD,DUAL DAC 8-bit right aligned data holding"
|
|
hexmask.long.byte 0x20 8.--15. 1. "DACC2DHR,DAC channel2 8-bit right-aligned"
|
|
hexmask.long.byte 0x20 0.--7. 1. "DACC1DHR,DAC channel1 8-bit right-aligned"
|
|
rgroup.long 0x2C++0x7
|
|
line.long 0x0 "DOR1,channel1 data output register"
|
|
hexmask.long.word 0x0 0.--11. 1. "DACC1DOR,DAC channel1 data output"
|
|
line.long 0x4 "DOR2,channel2 data output register"
|
|
hexmask.long.word 0x4 0.--11. 1. "DACC2DOR,DAC channel2 data output"
|
|
group.long 0x34++0x1B
|
|
line.long 0x0 "SR,status register"
|
|
rbitfld.long 0x0 31. "BWST2,DAC Channel 2 busy writing sample time" "0,1"
|
|
rbitfld.long 0x0 30. "CAL_FLAG2,DAC Channel 2 calibration offset" "0,1"
|
|
bitfld.long 0x0 29. "DMAUDR2,DAC channel2 DMA underrun" "0,1"
|
|
rbitfld.long 0x0 15. "BWST1,DAC Channel 1 busy writing sample time" "0,1"
|
|
rbitfld.long 0x0 14. "CAL_FLAG1,DAC Channel 1 calibration offset" "0,1"
|
|
bitfld.long 0x0 13. "DMAUDR1,DAC channel1 DMA underrun" "0,1"
|
|
line.long 0x4 "CCR,calibration control register"
|
|
hexmask.long.byte 0x4 16.--20. 1. "OTRIM2,DAC Channel 2 offset trimming"
|
|
hexmask.long.byte 0x4 0.--4. 1. "OTRIM1,DAC Channel 1 offset trimming"
|
|
line.long 0x8 "MCR,mode control register"
|
|
bitfld.long 0x8 16.--18. "MODE2,DAC Channel 2 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 0.--2. "MODE1,DAC Channel 1 mode" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "SHSR1,Sample and Hold sample time register"
|
|
hexmask.long.word 0xC 0.--9. 1. "TSAMPLE1,DAC Channel 1 sample Time"
|
|
line.long 0x10 "SHSR2,Sample and Hold sample time register"
|
|
hexmask.long.word 0x10 0.--9. 1. "TSAMPLE2,DAC Channel 2 sample Time"
|
|
line.long 0x14 "SHHR,Sample and Hold hold time"
|
|
hexmask.long.word 0x14 16.--25. 1. "THOLD2,DAC Channel 2 hold time"
|
|
hexmask.long.word 0x14 0.--9. 1. "THOLD1,DAC Channel 1 hold Time"
|
|
line.long 0x18 "SHRR,Sample and Hold refresh time"
|
|
hexmask.long.byte 0x18 16.--23. 1. "TREFRESH2,DAC Channel 2 refresh Time"
|
|
hexmask.long.byte 0x18 0.--7. 1. "TREFRESH1,DAC Channel 1 refresh Time"
|
|
tree.end
|
|
tree "DBGMCU (MCU Debug Component)"
|
|
base ad:0xE0042000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "IDCODE,MCU Device ID Code Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "REV_ID,Revision Identifier"
|
|
hexmask.long.word 0x0 0.--15. 1. "DEV_ID,Device Identifier"
|
|
group.long 0x4++0xF
|
|
line.long 0x0 "CR,Debug MCU Configuration"
|
|
bitfld.long 0x0 6.--7. "TRACE_MODE,Trace pin assignment" "0,1,2,3"
|
|
bitfld.long 0x0 5. "TRACE_IOEN,Trace pin assignment" "0,1"
|
|
bitfld.long 0x0 2. "DBG_STANDBY,Debug Standby Mode" "0,1"
|
|
bitfld.long 0x0 1. "DBG_STOP,Debug Stop Mode" "0,1"
|
|
bitfld.long 0x0 0. "DBG_SLEEP,Debug Sleep Mode" "0,1"
|
|
line.long 0x4 "APB1_FZR1,APB Low Freeze Register 1"
|
|
bitfld.long 0x4 31. "DBG_LPTIMER_STOP,LPTIM1 counter stopped when core is" "0,1"
|
|
bitfld.long 0x4 25. "DBG_CAN_STOP,bxCAN stopped when core is" "0,1"
|
|
bitfld.long 0x4 23. "DBG_I2C3_STOP,I2C3 SMBUS timeout counter stopped when" "0,1"
|
|
bitfld.long 0x4 22. "DBG_I2C2_STOP,I2C2 SMBUS timeout mode stopped when" "0,1"
|
|
bitfld.long 0x4 21. "DBG_I2C1_STOP,I2C1 SMBUS timeout mode stopped when" "0,1"
|
|
bitfld.long 0x4 12. "DBG_IWDG_STOP,Debug Independent Wachdog stopped when" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "DBG_WWDG_STOP,Debug Window Wachdog stopped when Core" "0,1"
|
|
bitfld.long 0x4 10. "DBG_RTC_STOP,Debug RTC stopped when Core is" "0,1"
|
|
bitfld.long 0x4 5. "DBG_TIM7_STOP,TIM7 counter stopped when core is" "0,1"
|
|
bitfld.long 0x4 4. "DBG_TIMER6_STOP,Debug Timer 6 stopped when Core is" "0,1"
|
|
bitfld.long 0x4 3. "DBG_TIM5_STOP,TIM5 counter stopped when core is" "0,1"
|
|
bitfld.long 0x4 2. "DBG_TIM4_STOP,TIM4 counter stopped when core is" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "DBG_TIM3_STOP,TIM3 counter stopped when core is" "0,1"
|
|
bitfld.long 0x4 0. "DBG_TIMER2_STOP,Debug Timer 2 stopped when Core is" "0,1"
|
|
line.long 0x8 "APB1_FZR2,APB Low Freeze Register 2"
|
|
bitfld.long 0x8 5. "DBG_LPTIM2_STOP,LPTIM2 counter stopped when core is" "0,1"
|
|
line.long 0xC "APB2_FZR,APB High Freeze Register"
|
|
bitfld.long 0xC 18. "DBG_TIM17_STOP,TIM17 counter stopped when core is" "0,1"
|
|
bitfld.long 0xC 17. "DBG_TIM16_STOP,TIM16 counter stopped when core is" "0,1"
|
|
bitfld.long 0xC 16. "DBG_TIM15_STOP,TIM15 counter stopped when core is" "0,1"
|
|
bitfld.long 0xC 13. "DBG_TIM8_STOP,TIM8 counter stopped when core is" "0,1"
|
|
bitfld.long 0xC 11. "DBG_TIM1_STOP,TIM1 counter stopped when core is" "0,1"
|
|
tree.end
|
|
tree "DCMI (Digital Camera Interface)"
|
|
base ad:0x50050000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CR,control register 1"
|
|
bitfld.long 0x0 20. "OELS,Odd/Even Line Select (Line Select" "0,1"
|
|
bitfld.long 0x0 19. "LSM,Line Select mode" "0,1"
|
|
bitfld.long 0x0 18. "OEBS,Odd/Even Byte Select (Byte Select" "0,1"
|
|
bitfld.long 0x0 16.--17. "BSM,Byte Select mode" "0,1,2,3"
|
|
bitfld.long 0x0 14. "ENABLE,DCMI enable" "0,1"
|
|
bitfld.long 0x0 10.--11. "EDM,Extended data mode" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "FCRC,Frame capture rate control" "0,1,2,3"
|
|
bitfld.long 0x0 7. "VSPOL,Vertical synchronization" "0,1"
|
|
bitfld.long 0x0 6. "HSPOL,Horizontal synchronization" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "PCKPOL,Pixel clock polarity" "0,1"
|
|
bitfld.long 0x0 4. "ESS,Embedded synchronization" "0,1"
|
|
bitfld.long 0x0 3. "JPEG,JPEG format" "0,1"
|
|
bitfld.long 0x0 2. "CROP,Crop feature" "0,1"
|
|
bitfld.long 0x0 1. "CM,Capture mode" "0,1"
|
|
bitfld.long 0x0 0. "CAPTURE,Capture enable" "0,1"
|
|
rgroup.long 0x4++0x7
|
|
line.long 0x0 "SR,status register"
|
|
bitfld.long 0x0 2. "FNE,FIFO not empty" "0,1"
|
|
bitfld.long 0x0 1. "VSYNC,VSYNC" "0,1"
|
|
bitfld.long 0x0 0. "HSYNC,HSYNC" "0,1"
|
|
line.long 0x4 "RIS,raw interrupt status register"
|
|
bitfld.long 0x4 4. "LINE_RIS,Line raw interrupt status" "0,1"
|
|
bitfld.long 0x4 3. "VSYNC_RIS,VSYNC raw interrupt status" "0,1"
|
|
bitfld.long 0x4 2. "ERR_RIS,Synchronization error raw interrupt" "0,1"
|
|
bitfld.long 0x4 1. "OVR_RIS,Overrun raw interrupt" "0,1"
|
|
bitfld.long 0x4 0. "FRAME_RIS,Capture complete raw interrupt" "0,1"
|
|
group.long 0xC++0x3
|
|
line.long 0x0 "IER,interrupt enable register"
|
|
bitfld.long 0x0 4. "LINE_IE,Line interrupt enable" "0,1"
|
|
bitfld.long 0x0 3. "VSYNC_IE,VSYNC interrupt enable" "0,1"
|
|
bitfld.long 0x0 2. "ERR_IE,Synchronization error interrupt" "0,1"
|
|
bitfld.long 0x0 1. "OVR_IE,Overrun interrupt enable" "0,1"
|
|
bitfld.long 0x0 0. "FRAME_IE,Capture complete interrupt" "0,1"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "MIS,masked interrupt status"
|
|
bitfld.long 0x0 4. "LINE_MIS,Line masked interrupt" "0,1"
|
|
bitfld.long 0x0 3. "VSYNC_MIS,VSYNC masked interrupt" "0,1"
|
|
bitfld.long 0x0 2. "ERR_MIS,Synchronization error masked interrupt" "0,1"
|
|
bitfld.long 0x0 1. "OVR_MIS,Overrun masked interrupt" "0,1"
|
|
bitfld.long 0x0 0. "FRAME_MIS,Capture complete masked interrupt" "0,1"
|
|
wgroup.long 0x14++0x3
|
|
line.long 0x0 "ICR,interrupt clear register"
|
|
bitfld.long 0x0 4. "LINE_ISC,line interrupt status" "0,1"
|
|
bitfld.long 0x0 3. "VSYNC_ISC,Vertical synch interrupt status" "0,1"
|
|
bitfld.long 0x0 2. "ERR_ISC,Synchronization error interrupt status" "0,1"
|
|
bitfld.long 0x0 1. "OVR_ISC,Overrun interrupt status" "0,1"
|
|
bitfld.long 0x0 0. "FRAME_ISC,Capture complete interrupt status" "0,1"
|
|
group.long 0x18++0xF
|
|
line.long 0x0 "ESCR,embedded synchronization code"
|
|
hexmask.long.byte 0x0 24.--31. 1. "FEC,Frame end delimiter code"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LEC,Line end delimiter code"
|
|
hexmask.long.byte 0x0 8.--15. 1. "LSC,Line start delimiter code"
|
|
hexmask.long.byte 0x0 0.--7. 1. "FSC,Frame start delimiter code"
|
|
line.long 0x4 "ESUR,embedded synchronization unmask"
|
|
hexmask.long.byte 0x4 24.--31. 1. "FEU,Frame end delimiter unmask"
|
|
hexmask.long.byte 0x4 16.--23. 1. "LEU,Line end delimiter unmask"
|
|
hexmask.long.byte 0x4 8.--15. 1. "LSU,Line start delimiter"
|
|
hexmask.long.byte 0x4 0.--7. 1. "FSU,Frame start delimiter"
|
|
line.long 0x8 "CWSTRT,crop window start"
|
|
hexmask.long.word 0x8 16.--28. 1. "VST,Vertical start line count"
|
|
hexmask.long.word 0x8 0.--13. 1. "HOFFCNT,Horizontal offset count"
|
|
line.long 0xC "CWSIZE,crop window size"
|
|
hexmask.long.word 0xC 16.--29. 1. "VLINE,Vertical line count"
|
|
hexmask.long.word 0xC 0.--13. 1. "CAPCNT,Capture count"
|
|
rgroup.long 0x28++0x3
|
|
line.long 0x0 "DR,data register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "Byte3,Data byte 3"
|
|
hexmask.long.byte 0x0 16.--23. 1. "Byte2,Data byte 2"
|
|
hexmask.long.byte 0x0 8.--15. 1. "Byte1,Data byte 1"
|
|
hexmask.long.byte 0x0 0.--7. 1. "Byte0,Data byte 0"
|
|
tree.end
|
|
tree "DFSDM (Digital Filter for Sigma Delta Modulators)"
|
|
base ad:0x40016000
|
|
group.long 0x0++0x17
|
|
line.long 0x0 "CH0CFGR1,channel configuration y"
|
|
bitfld.long 0x0 31. "DFSDMEN,DFSDMEN" "0,1"
|
|
bitfld.long 0x0 30. "CKOUTSRC,CKOUTSRC" "0,1"
|
|
hexmask.long.byte 0x0 16.--23. 1. "CKOUTDIV,CKOUTDIV"
|
|
bitfld.long 0x0 14.--15. "DATPACK,DATPACK" "0,1,2,3"
|
|
bitfld.long 0x0 12.--13. "DATMPX,DATMPX" "0,1,2,3"
|
|
bitfld.long 0x0 8. "CHINSEL,CHINSEL" "0,1"
|
|
bitfld.long 0x0 7. "CHEN,CHEN" "0,1"
|
|
bitfld.long 0x0 6. "CKABEN,CKABEN" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "SCDEN,SCDEN" "0,1"
|
|
bitfld.long 0x0 2.--3. "SPICKSEL,SPICKSEL" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "SITP,SITP" "0,1,2,3"
|
|
line.long 0x4 "CH0CFGR2,channel configuration y"
|
|
hexmask.long.tbyte 0x4 8.--31. 1. "OFFSET,OFFSET"
|
|
hexmask.long.byte 0x4 3.--7. 1. "DTRBS,DTRBS"
|
|
line.long 0x8 "CH0AWSCDR,analog watchdog and short-circuit detector"
|
|
bitfld.long 0x8 22.--23. "AWFORD,AWFORD" "0,1,2,3"
|
|
hexmask.long.byte 0x8 16.--20. 1. "AWFOSR,AWFOSR"
|
|
hexmask.long.byte 0x8 12.--15. 1. "BKSCD,BKSCD"
|
|
hexmask.long.byte 0x8 0.--7. 1. "SCDT,SCDT"
|
|
line.long 0xC "CH0WDATR,channel watchdog filter data"
|
|
hexmask.long.word 0xC 0.--15. 1. "WDATA,WDATA"
|
|
line.long 0x10 "CH0DATINR,channel data input register"
|
|
hexmask.long.word 0x10 16.--31. 1. "INDAT1,INDAT1"
|
|
hexmask.long.word 0x10 0.--15. 1. "INDAT0,INDAT0"
|
|
line.long 0x14 "CH0DLYR,channel y delay register"
|
|
hexmask.long.byte 0x14 0.--5. 1. "PLSSKP,PLSSKP"
|
|
group.long 0x20++0x17
|
|
line.long 0x0 "CH1CFGR1,CH1CFGR1"
|
|
bitfld.long 0x0 14.--15. "DATPACK,DATPACK" "0,1,2,3"
|
|
bitfld.long 0x0 12.--13. "DATMPX,DATMPX" "0,1,2,3"
|
|
bitfld.long 0x0 8. "CHINSEL,CHINSEL" "0,1"
|
|
bitfld.long 0x0 7. "CHEN,CHEN" "0,1"
|
|
bitfld.long 0x0 6. "CKABEN,CKABEN" "0,1"
|
|
bitfld.long 0x0 5. "SCDEN,SCDEN" "0,1"
|
|
bitfld.long 0x0 2.--3. "SPICKSEL,SPICKSEL" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "SITP,SITP" "0,1,2,3"
|
|
line.long 0x4 "CH1CFGR2,CH1CFGR2"
|
|
hexmask.long.tbyte 0x4 8.--31. 1. "OFFSET,OFFSET"
|
|
hexmask.long.byte 0x4 3.--7. 1. "DTRBS,DTRBS"
|
|
line.long 0x8 "CH1AWSCDR,CH1AWSCDR"
|
|
bitfld.long 0x8 22.--23. "AWFORD,AWFORD" "0,1,2,3"
|
|
hexmask.long.byte 0x8 16.--20. 1. "AWFOSR,AWFOSR"
|
|
hexmask.long.byte 0x8 12.--15. 1. "BKSCD,BKSCD"
|
|
hexmask.long.byte 0x8 0.--7. 1. "SCDT,SCDT"
|
|
line.long 0xC "CH1WDATR,CH1WDATR"
|
|
hexmask.long.word 0xC 0.--15. 1. "WDATA,WDATA"
|
|
line.long 0x10 "CH1DATINR,CH1DATINR"
|
|
hexmask.long.word 0x10 16.--31. 1. "INDAT1,INDAT1"
|
|
hexmask.long.word 0x10 0.--15. 1. "INDAT0,INDAT0"
|
|
line.long 0x14 "CH1DLYR,channel y delay register"
|
|
hexmask.long.byte 0x14 0.--5. 1. "PLSSKP,PLSSKP"
|
|
group.long 0x40++0x17
|
|
line.long 0x0 "CH2CFGR1,CH2CFGR1"
|
|
bitfld.long 0x0 14.--15. "DATPACK,DATPACK" "0,1,2,3"
|
|
bitfld.long 0x0 12.--13. "DATMPX,DATMPX" "0,1,2,3"
|
|
bitfld.long 0x0 8. "CHINSEL,CHINSEL" "0,1"
|
|
bitfld.long 0x0 7. "CHEN,CHEN" "0,1"
|
|
bitfld.long 0x0 6. "CKABEN,CKABEN" "0,1"
|
|
bitfld.long 0x0 5. "SCDEN,SCDEN" "0,1"
|
|
bitfld.long 0x0 2.--3. "SPICKSEL,SPICKSEL" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "SITP,SITP" "0,1,2,3"
|
|
line.long 0x4 "CH2CFGR2,CH2CFGR2"
|
|
hexmask.long.tbyte 0x4 8.--31. 1. "OFFSET,OFFSET"
|
|
hexmask.long.byte 0x4 3.--7. 1. "DTRBS,DTRBS"
|
|
line.long 0x8 "CH2AWSCDR,CH2AWSCDR"
|
|
bitfld.long 0x8 22.--23. "AWFORD,AWFORD" "0,1,2,3"
|
|
hexmask.long.byte 0x8 16.--20. 1. "AWFOSR,AWFOSR"
|
|
hexmask.long.byte 0x8 12.--15. 1. "BKSCD,BKSCD"
|
|
hexmask.long.byte 0x8 0.--7. 1. "SCDT,SCDT"
|
|
line.long 0xC "CH2WDATR,CH2WDATR"
|
|
hexmask.long.word 0xC 0.--15. 1. "WDATA,WDATA"
|
|
line.long 0x10 "CH2DATINR,CH2DATINR"
|
|
hexmask.long.word 0x10 16.--31. 1. "INDAT1,INDAT1"
|
|
hexmask.long.word 0x10 0.--15. 1. "INDAT0,INDAT0"
|
|
line.long 0x14 "CH2DLYR,channel y delay register"
|
|
hexmask.long.byte 0x14 0.--5. 1. "PLSSKP,PLSSKP"
|
|
group.long 0x60++0x17
|
|
line.long 0x0 "CH3CFGR1,CH3CFGR1"
|
|
bitfld.long 0x0 14.--15. "DATPACK,DATPACK" "0,1,2,3"
|
|
bitfld.long 0x0 12.--13. "DATMPX,DATMPX" "0,1,2,3"
|
|
bitfld.long 0x0 8. "CHINSEL,CHINSEL" "0,1"
|
|
bitfld.long 0x0 7. "CHEN,CHEN" "0,1"
|
|
bitfld.long 0x0 6. "CKABEN,CKABEN" "0,1"
|
|
bitfld.long 0x0 5. "SCDEN,SCDEN" "0,1"
|
|
bitfld.long 0x0 2.--3. "SPICKSEL,SPICKSEL" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "SITP,SITP" "0,1,2,3"
|
|
line.long 0x4 "CH3CFGR2,CH3CFGR2"
|
|
hexmask.long.tbyte 0x4 8.--31. 1. "OFFSET,OFFSET"
|
|
hexmask.long.byte 0x4 3.--7. 1. "DTRBS,DTRBS"
|
|
line.long 0x8 "CH3AWSCDR,CH3AWSCDR"
|
|
bitfld.long 0x8 22.--23. "AWFORD,AWFORD" "0,1,2,3"
|
|
hexmask.long.byte 0x8 16.--20. 1. "AWFOSR,AWFOSR"
|
|
hexmask.long.byte 0x8 12.--15. 1. "BKSCD,BKSCD"
|
|
hexmask.long.byte 0x8 0.--7. 1. "SCDT,SCDT"
|
|
line.long 0xC "CH3WDATR,CH3WDATR"
|
|
hexmask.long.word 0xC 0.--15. 1. "WDATA,WDATA"
|
|
line.long 0x10 "CH3DATINR,CH3DATINR"
|
|
hexmask.long.word 0x10 16.--31. 1. "INDAT1,INDAT1"
|
|
hexmask.long.word 0x10 0.--15. 1. "INDAT0,INDAT0"
|
|
line.long 0x14 "CH3DLYR,channel y delay register"
|
|
hexmask.long.byte 0x14 0.--5. 1. "PLSSKP,PLSSKP"
|
|
group.long 0x80++0x17
|
|
line.long 0x0 "CH4CFGR1,CH4CFGR1"
|
|
bitfld.long 0x0 14.--15. "DATPACK,DATPACK" "0,1,2,3"
|
|
bitfld.long 0x0 12.--13. "DATMPX,DATMPX" "0,1,2,3"
|
|
bitfld.long 0x0 8. "CHINSEL,CHINSEL" "0,1"
|
|
bitfld.long 0x0 7. "CHEN,CHEN" "0,1"
|
|
bitfld.long 0x0 6. "CKABEN,CKABEN" "0,1"
|
|
bitfld.long 0x0 5. "SCDEN,SCDEN" "0,1"
|
|
bitfld.long 0x0 2.--3. "SPICKSEL,SPICKSEL" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "SITP,SITP" "0,1,2,3"
|
|
line.long 0x4 "CH4CFGR2,CH4CFGR2"
|
|
hexmask.long.tbyte 0x4 8.--31. 1. "OFFSET,OFFSET"
|
|
hexmask.long.byte 0x4 3.--7. 1. "DTRBS,DTRBS"
|
|
line.long 0x8 "CH4AWSCDR,CH4AWSCDR"
|
|
bitfld.long 0x8 22.--23. "AWFORD,AWFORD" "0,1,2,3"
|
|
hexmask.long.byte 0x8 16.--20. 1. "AWFOSR,AWFOSR"
|
|
hexmask.long.byte 0x8 12.--15. 1. "BKSCD,BKSCD"
|
|
hexmask.long.byte 0x8 0.--7. 1. "SCDT,SCDT"
|
|
line.long 0xC "CH4WDATR,CH4WDATR"
|
|
hexmask.long.word 0xC 0.--15. 1. "WDATA,WDATA"
|
|
line.long 0x10 "CH4DATINR,CH4DATINR"
|
|
hexmask.long.word 0x10 16.--31. 1. "INDAT1,INDAT1"
|
|
hexmask.long.word 0x10 0.--15. 1. "INDAT0,INDAT0"
|
|
line.long 0x14 "CH4DLYR,channel y delay register"
|
|
hexmask.long.byte 0x14 0.--5. 1. "PLSSKP,PLSSKP"
|
|
group.long 0xA0++0x17
|
|
line.long 0x0 "CH5CFGR1,CH5CFGR1"
|
|
bitfld.long 0x0 14.--15. "DATPACK,DATPACK" "0,1,2,3"
|
|
bitfld.long 0x0 12.--13. "DATMPX,DATMPX" "0,1,2,3"
|
|
bitfld.long 0x0 8. "CHINSEL,CHINSEL" "0,1"
|
|
bitfld.long 0x0 7. "CHEN,CHEN" "0,1"
|
|
bitfld.long 0x0 6. "CKABEN,CKABEN" "0,1"
|
|
bitfld.long 0x0 5. "SCDEN,SCDEN" "0,1"
|
|
bitfld.long 0x0 2.--3. "SPICKSEL,SPICKSEL" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "SITP,SITP" "0,1,2,3"
|
|
line.long 0x4 "CH5CFGR2,CH5CFGR2"
|
|
hexmask.long.tbyte 0x4 8.--31. 1. "OFFSET,OFFSET"
|
|
hexmask.long.byte 0x4 3.--7. 1. "DTRBS,DTRBS"
|
|
line.long 0x8 "CH5AWSCDR,CH5AWSCDR"
|
|
bitfld.long 0x8 22.--23. "AWFORD,AWFORD" "0,1,2,3"
|
|
hexmask.long.byte 0x8 16.--20. 1. "AWFOSR,AWFOSR"
|
|
hexmask.long.byte 0x8 12.--15. 1. "BKSCD,BKSCD"
|
|
hexmask.long.byte 0x8 0.--7. 1. "SCDT,SCDT"
|
|
line.long 0xC "CH5WDATR,CH5WDATR"
|
|
hexmask.long.word 0xC 0.--15. 1. "WDATA,WDATA"
|
|
line.long 0x10 "CH5DATINR,CH5DATINR"
|
|
hexmask.long.word 0x10 16.--31. 1. "INDAT1,INDAT1"
|
|
hexmask.long.word 0x10 0.--15. 1. "INDAT0,INDAT0"
|
|
line.long 0x14 "CH5DLYR,channel y delay register"
|
|
hexmask.long.byte 0x14 0.--5. 1. "PLSSKP,PLSSKP"
|
|
group.long 0xC0++0x17
|
|
line.long 0x0 "CH6CFGR1,CH6CFGR1"
|
|
bitfld.long 0x0 14.--15. "DATPACK,DATPACK" "0,1,2,3"
|
|
bitfld.long 0x0 12.--13. "DATMPX,DATMPX" "0,1,2,3"
|
|
bitfld.long 0x0 8. "CHINSEL,CHINSEL" "0,1"
|
|
bitfld.long 0x0 7. "CHEN,CHEN" "0,1"
|
|
bitfld.long 0x0 6. "CKABEN,CKABEN" "0,1"
|
|
bitfld.long 0x0 5. "SCDEN,SCDEN" "0,1"
|
|
bitfld.long 0x0 2.--3. "SPICKSEL,SPICKSEL" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "SITP,SITP" "0,1,2,3"
|
|
line.long 0x4 "CH6CFGR2,CH6CFGR2"
|
|
hexmask.long.tbyte 0x4 8.--31. 1. "OFFSET,OFFSET"
|
|
hexmask.long.byte 0x4 3.--7. 1. "DTRBS,DTRBS"
|
|
line.long 0x8 "CH6AWSCDR,CH6AWSCDR"
|
|
bitfld.long 0x8 22.--23. "AWFORD,AWFORD" "0,1,2,3"
|
|
hexmask.long.byte 0x8 16.--20. 1. "AWFOSR,AWFOSR"
|
|
hexmask.long.byte 0x8 12.--15. 1. "BKSCD,BKSCD"
|
|
hexmask.long.byte 0x8 0.--7. 1. "SCDT,SCDT"
|
|
line.long 0xC "CH6WDATR,CH6WDATR"
|
|
hexmask.long.word 0xC 0.--15. 1. "WDATA,WDATA"
|
|
line.long 0x10 "CH6DATINR,CH6DATINR"
|
|
hexmask.long.word 0x10 16.--31. 1. "INDAT1,INDAT1"
|
|
hexmask.long.word 0x10 0.--15. 1. "INDAT0,INDAT0"
|
|
line.long 0x14 "CH6DLYR,channel y delay register"
|
|
hexmask.long.byte 0x14 0.--5. 1. "PLSSKP,PLSSKP"
|
|
group.long 0xE0++0x17
|
|
line.long 0x0 "CH7CFGR1,CH7CFGR1"
|
|
bitfld.long 0x0 14.--15. "DATPACK,DATPACK" "0,1,2,3"
|
|
bitfld.long 0x0 12.--13. "DATMPX,DATMPX" "0,1,2,3"
|
|
bitfld.long 0x0 8. "CHINSEL,CHINSEL" "0,1"
|
|
bitfld.long 0x0 7. "CHEN,CHEN" "0,1"
|
|
bitfld.long 0x0 6. "CKABEN,CKABEN" "0,1"
|
|
bitfld.long 0x0 5. "SCDEN,SCDEN" "0,1"
|
|
bitfld.long 0x0 2.--3. "SPICKSEL,SPICKSEL" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "SITP,SITP" "0,1,2,3"
|
|
line.long 0x4 "CH7CFGR2,CH7CFGR2"
|
|
hexmask.long.tbyte 0x4 8.--31. 1. "OFFSET,OFFSET"
|
|
hexmask.long.byte 0x4 3.--7. 1. "DTRBS,DTRBS"
|
|
line.long 0x8 "CH7AWSCDR,CH7AWSCDR"
|
|
bitfld.long 0x8 22.--23. "AWFORD,AWFORD" "0,1,2,3"
|
|
hexmask.long.byte 0x8 16.--20. 1. "AWFOSR,AWFOSR"
|
|
hexmask.long.byte 0x8 12.--15. 1. "BKSCD,BKSCD"
|
|
hexmask.long.byte 0x8 0.--7. 1. "SCDT,SCDT"
|
|
line.long 0xC "CH7WDATR,CH7WDATR"
|
|
hexmask.long.word 0xC 0.--15. 1. "WDATA,WDATA"
|
|
line.long 0x10 "CH7DATINR,CH7DATINR"
|
|
hexmask.long.word 0x10 16.--31. 1. "INDAT1,INDAT1"
|
|
hexmask.long.word 0x10 0.--15. 1. "INDAT0,INDAT0"
|
|
line.long 0x14 "CH7DLYR,channel y delay register"
|
|
hexmask.long.byte 0x14 0.--5. 1. "PLSSKP,PLSSKP"
|
|
group.long 0x100++0x7
|
|
line.long 0x0 "DFSDM_FLT0CR1,control register 1"
|
|
bitfld.long 0x0 30. "AWFSEL,Analog watchdog fast mode" "0,1"
|
|
bitfld.long 0x0 29. "FAST,Fast conversion mode selection for" "0,1"
|
|
bitfld.long 0x0 24.--26. "RCH,Regular channel selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 21. "RDMAEN,DMA channel enabled to read data for the" "0,1"
|
|
bitfld.long 0x0 19. "RSYNC,Launch regular conversion synchronously" "0,1"
|
|
bitfld.long 0x0 18. "RCONT,Continuous mode selection for regular" "0,1"
|
|
bitfld.long 0x0 17. "RSWSTART,Software start of a conversion on the" "0,1"
|
|
bitfld.long 0x0 13.--14. "JEXTEN,Trigger enable and trigger edge" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "JEXTSEL,Trigger signal selection for launching" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 5. "JDMAEN,DMA channel enabled to read data for the" "0,1"
|
|
bitfld.long 0x0 4. "JSCAN,Scanning conversion mode for injected" "0,1"
|
|
bitfld.long 0x0 3. "JSYNC,Launch an injected conversion" "0,1"
|
|
bitfld.long 0x0 1. "JSWSTART,Start a conversion of the injected group" "0,1"
|
|
bitfld.long 0x0 0. "DFEN,DFSDM enable" "0,1"
|
|
line.long 0x4 "DFSDM_FLT0CR2,control register 2"
|
|
hexmask.long.byte 0x4 16.--23. 1. "AWDCH,Analog watchdog channel"
|
|
hexmask.long.byte 0x4 8.--15. 1. "EXCH,Extremes detector channel"
|
|
bitfld.long 0x4 6. "CKABIE,Clock absence interrupt" "0,1"
|
|
bitfld.long 0x4 5. "SCDIE,Short-circuit detector interrupt" "0,1"
|
|
bitfld.long 0x4 4. "AWDIE,Analog watchdog interrupt" "0,1"
|
|
bitfld.long 0x4 3. "ROVRIE,Regular data overrun interrupt" "0,1"
|
|
bitfld.long 0x4 2. "JOVRIE,Injected data overrun interrupt" "0,1"
|
|
bitfld.long 0x4 1. "REOCIE,Regular end of conversion interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "JEOCIE,Injected end of conversion interrupt" "0,1"
|
|
rgroup.long 0x108++0x3
|
|
line.long 0x0 "DFSDM_FLT0ISR,interrupt and status register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "SCDF,short-circuit detector"
|
|
hexmask.long.byte 0x0 16.--23. 1. "CKABF,Clock absence flag"
|
|
bitfld.long 0x0 14. "RCIP,Regular conversion in progress" "0,1"
|
|
bitfld.long 0x0 13. "JCIP,Injected conversion in progress" "0,1"
|
|
bitfld.long 0x0 4. "AWDF,Analog watchdog" "0,1"
|
|
bitfld.long 0x0 3. "ROVRF,Regular conversion overrun" "0,1"
|
|
bitfld.long 0x0 2. "JOVRF,Injected conversion overrun" "0,1"
|
|
bitfld.long 0x0 1. "REOCF,End of regular conversion" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "JEOCF,End of injected conversion" "0,1"
|
|
group.long 0x10C++0xB
|
|
line.long 0x0 "DFSDM_FLT0ICR,interrupt flag clear register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "CLRSCDF,Clear the short-circuit detector"
|
|
hexmask.long.byte 0x0 16.--23. 1. "CLRCKABF,Clear the clock absence"
|
|
bitfld.long 0x0 3. "CLRROVRF,Clear the regular conversion overrun" "0,1"
|
|
bitfld.long 0x0 2. "CLRJOVRF,Clear the injected conversion overrun" "0,1"
|
|
line.long 0x4 "DFSDM_FLT0JCHGR,injected channel group selection"
|
|
hexmask.long.byte 0x4 0.--7. 1. "JCHG,Injected channel group"
|
|
line.long 0x8 "DFSDM_FLT0FCR,filter control register"
|
|
bitfld.long 0x8 29.--31. "FORD,Sinc filter order" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x8 16.--25. 1. "FOSR,Sinc filter oversampling ratio"
|
|
hexmask.long.byte 0x8 0.--7. 1. "IOSR,Integrator oversampling ratio (averaging"
|
|
rgroup.long 0x118++0x7
|
|
line.long 0x0 "DFSDM_FLT0JDATAR,data register for injected"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "JDATA,Injected group conversion"
|
|
bitfld.long 0x0 0.--2. "JDATACH,Injected channel most recently" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "DFSDM_FLT0RDATAR,data register for the regular"
|
|
hexmask.long.tbyte 0x4 8.--31. 1. "RDATA,Regular channel conversion"
|
|
bitfld.long 0x4 4. "RPEND,Regular channel pending" "0,1"
|
|
bitfld.long 0x4 0.--2. "RDATACH,Regular channel most recently" "0,1,2,3,4,5,6,7"
|
|
group.long 0x120++0x7
|
|
line.long 0x0 "DFSDM_FLT0AWHTR,analog watchdog high threshold"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "AWHT,Analog watchdog high"
|
|
hexmask.long.byte 0x0 0.--3. 1. "BKAWH,Break signal assignment to analog"
|
|
line.long 0x4 "DFSDM_FLT0AWLTR,analog watchdog low threshold"
|
|
hexmask.long.tbyte 0x4 8.--31. 1. "AWLT,Analog watchdog low"
|
|
hexmask.long.byte 0x4 0.--3. 1. "BKAWL,Break signal assignment to analog"
|
|
rgroup.long 0x128++0x3
|
|
line.long 0x0 "DFSDM_FLT0AWSR,analog watchdog status"
|
|
hexmask.long.byte 0x0 8.--15. 1. "AWHTF,Analog watchdog high threshold"
|
|
hexmask.long.byte 0x0 0.--7. 1. "AWLTF,Analog watchdog low threshold"
|
|
group.long 0x12C++0x3
|
|
line.long 0x0 "DFSDM_FLT0AWCFR,analog watchdog clear flag"
|
|
hexmask.long.byte 0x0 8.--15. 1. "CLRAWHTF,Clear the analog watchdog high threshold"
|
|
hexmask.long.byte 0x0 0.--7. 1. "CLRAWLTF,Clear the analog watchdog low threshold"
|
|
rgroup.long 0x130++0xB
|
|
line.long 0x0 "DFSDM_FLT0EXMAX,Extremes detector maximum"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "EXMAX,Extremes detector maximum"
|
|
bitfld.long 0x0 0.--2. "EXMAXCH,Extremes detector maximum data" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "DFSDM_FLT0EXMIN,Extremes detector minimum"
|
|
hexmask.long.tbyte 0x4 8.--31. 1. "EXMIN,EXMIN"
|
|
bitfld.long 0x4 0.--2. "EXMINCH,Extremes detector minimum data" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "DFSDM_FLT0CNVTIMR,conversion timer register"
|
|
hexmask.long 0x8 4.--31. 1. "CNVCNT,28-bit timer counting conversion time t"
|
|
group.long 0x180++0x7
|
|
line.long 0x0 "DFSDM_FLT1CR1,control register 1"
|
|
bitfld.long 0x0 30. "AWFSEL,Analog watchdog fast mode" "0,1"
|
|
bitfld.long 0x0 29. "FAST,Fast conversion mode selection for" "0,1"
|
|
bitfld.long 0x0 24.--26. "RCH,Regular channel selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 21. "RDMAEN,DMA channel enabled to read data for the" "0,1"
|
|
bitfld.long 0x0 19. "RSYNC,Launch regular conversion synchronously" "0,1"
|
|
bitfld.long 0x0 18. "RCONT,Continuous mode selection for regular" "0,1"
|
|
bitfld.long 0x0 17. "RSWSTART,Software start of a conversion on the" "0,1"
|
|
bitfld.long 0x0 13.--14. "JEXTEN,Trigger enable and trigger edge" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "JEXTSEL,Trigger signal selection for launching" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 5. "JDMAEN,DMA channel enabled to read data for the" "0,1"
|
|
bitfld.long 0x0 4. "JSCAN,Scanning conversion mode for injected" "0,1"
|
|
bitfld.long 0x0 3. "JSYNC,Launch an injected conversion" "0,1"
|
|
bitfld.long 0x0 1. "JSWSTART,Start a conversion of the injected group" "0,1"
|
|
bitfld.long 0x0 0. "DFEN,DFSDM enable" "0,1"
|
|
line.long 0x4 "DFSDM_FLT1CR2,control register 2"
|
|
hexmask.long.byte 0x4 16.--23. 1. "AWDCH,Analog watchdog channel"
|
|
hexmask.long.byte 0x4 8.--15. 1. "EXCH,Extremes detector channel"
|
|
bitfld.long 0x4 6. "CKABIE,Clock absence interrupt" "0,1"
|
|
bitfld.long 0x4 5. "SCDIE,Short-circuit detector interrupt" "0,1"
|
|
bitfld.long 0x4 4. "AWDIE,Analog watchdog interrupt" "0,1"
|
|
bitfld.long 0x4 3. "ROVRIE,Regular data overrun interrupt" "0,1"
|
|
bitfld.long 0x4 2. "JOVRIE,Injected data overrun interrupt" "0,1"
|
|
bitfld.long 0x4 1. "REOCIE,Regular end of conversion interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "JEOCIE,Injected end of conversion interrupt" "0,1"
|
|
rgroup.long 0x188++0x3
|
|
line.long 0x0 "DFSDM_FLT1ISR,interrupt and status register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "SCDF,short-circuit detector"
|
|
hexmask.long.byte 0x0 16.--23. 1. "CKABF,Clock absence flag"
|
|
bitfld.long 0x0 14. "RCIP,Regular conversion in progress" "0,1"
|
|
bitfld.long 0x0 13. "JCIP,Injected conversion in progress" "0,1"
|
|
bitfld.long 0x0 4. "AWDF,Analog watchdog" "0,1"
|
|
bitfld.long 0x0 3. "ROVRF,Regular conversion overrun" "0,1"
|
|
bitfld.long 0x0 2. "JOVRF,Injected conversion overrun" "0,1"
|
|
bitfld.long 0x0 1. "REOCF,End of regular conversion" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "JEOCF,End of injected conversion" "0,1"
|
|
group.long 0x18C++0xB
|
|
line.long 0x0 "DFSDM_FLT1ICR,interrupt flag clear register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "CLRSCDF,Clear the short-circuit detector"
|
|
hexmask.long.byte 0x0 16.--23. 1. "CLRCKABF,Clear the clock absence"
|
|
bitfld.long 0x0 3. "CLRROVRF,Clear the regular conversion overrun" "0,1"
|
|
bitfld.long 0x0 2. "CLRJOVRF,Clear the injected conversion overrun" "0,1"
|
|
line.long 0x4 "DFSDM_FLT1CHGR,injected channel group selection"
|
|
hexmask.long.byte 0x4 0.--7. 1. "JCHG,Injected channel group"
|
|
line.long 0x8 "DFSDM_FLT1FCR,filter control register"
|
|
bitfld.long 0x8 29.--31. "FORD,Sinc filter order" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x8 16.--25. 1. "FOSR,Sinc filter oversampling ratio"
|
|
hexmask.long.byte 0x8 0.--7. 1. "IOSR,Integrator oversampling ratio (averaging"
|
|
rgroup.long 0x198++0x7
|
|
line.long 0x0 "DFSDM_FLT1JDATAR,data register for injected"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "JDATA,Injected group conversion"
|
|
bitfld.long 0x0 0.--2. "JDATACH,Injected channel most recently" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "DFSDM_FLT1RDATAR,data register for the regular"
|
|
hexmask.long.tbyte 0x4 8.--31. 1. "RDATA,Regular channel conversion"
|
|
bitfld.long 0x4 4. "RPEND,Regular channel pending" "0,1"
|
|
bitfld.long 0x4 0.--2. "RDATACH,Regular channel most recently" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1A0++0x7
|
|
line.long 0x0 "DFSDM_FLT1AWHTR,analog watchdog high threshold"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "AWHT,Analog watchdog high"
|
|
hexmask.long.byte 0x0 0.--3. 1. "BKAWH,Break signal assignment to analog"
|
|
line.long 0x4 "DFSDM_FLT1AWLTR,analog watchdog low threshold"
|
|
hexmask.long.tbyte 0x4 8.--31. 1. "AWLT,Analog watchdog low"
|
|
hexmask.long.byte 0x4 0.--3. 1. "BKAWL,Break signal assignment to analog"
|
|
rgroup.long 0x1A8++0x3
|
|
line.long 0x0 "DFSDM_FLT1AWSR,analog watchdog status"
|
|
hexmask.long.byte 0x0 8.--15. 1. "AWHTF,Analog watchdog high threshold"
|
|
hexmask.long.byte 0x0 0.--7. 1. "AWLTF,Analog watchdog low threshold"
|
|
group.long 0x1AC++0x3
|
|
line.long 0x0 "DFSDM_FLT1AWCFR,analog watchdog clear flag"
|
|
hexmask.long.byte 0x0 8.--15. 1. "CLRAWHTF,Clear the analog watchdog high threshold"
|
|
hexmask.long.byte 0x0 0.--7. 1. "CLRAWLTF,Clear the analog watchdog low threshold"
|
|
rgroup.long 0x1B0++0xB
|
|
line.long 0x0 "DFSDM_FLT1EXMAX,Extremes detector maximum"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "EXMAX,Extremes detector maximum"
|
|
bitfld.long 0x0 0.--2. "EXMAXCH,Extremes detector maximum data" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "DFSDM_FLT1EXMIN,Extremes detector minimum"
|
|
hexmask.long.tbyte 0x4 8.--31. 1. "EXMIN,EXMIN"
|
|
bitfld.long 0x4 0.--2. "EXMINCH,Extremes detector minimum data" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "DFSDM_FLT1CNVTIMR,conversion timer register"
|
|
hexmask.long 0x8 4.--31. 1. "CNVCNT,28-bit timer counting conversion time t"
|
|
group.long 0x200++0x7
|
|
line.long 0x0 "DFSDM_FLT2CR1,control register 1"
|
|
bitfld.long 0x0 30. "AWFSEL,Analog watchdog fast mode" "0,1"
|
|
bitfld.long 0x0 29. "FAST,Fast conversion mode selection for" "0,1"
|
|
bitfld.long 0x0 24.--26. "RCH,Regular channel selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 21. "RDMAEN,DMA channel enabled to read data for the" "0,1"
|
|
bitfld.long 0x0 19. "RSYNC,Launch regular conversion synchronously" "0,1"
|
|
bitfld.long 0x0 18. "RCONT,Continuous mode selection for regular" "0,1"
|
|
bitfld.long 0x0 17. "RSWSTART,Software start of a conversion on the" "0,1"
|
|
bitfld.long 0x0 13.--14. "JEXTEN,Trigger enable and trigger edge" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "JEXTSEL,Trigger signal selection for launching" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 5. "JDMAEN,DMA channel enabled to read data for the" "0,1"
|
|
bitfld.long 0x0 4. "JSCAN,Scanning conversion mode for injected" "0,1"
|
|
bitfld.long 0x0 3. "JSYNC,Launch an injected conversion" "0,1"
|
|
bitfld.long 0x0 1. "JSWSTART,Start a conversion of the injected group" "0,1"
|
|
bitfld.long 0x0 0. "DFEN,DFSDM enable" "0,1"
|
|
line.long 0x4 "DFSDM_FLT2CR2,control register 2"
|
|
hexmask.long.byte 0x4 16.--23. 1. "AWDCH,Analog watchdog channel"
|
|
hexmask.long.byte 0x4 8.--15. 1. "EXCH,Extremes detector channel"
|
|
bitfld.long 0x4 6. "CKABIE,Clock absence interrupt" "0,1"
|
|
bitfld.long 0x4 5. "SCDIE,Short-circuit detector interrupt" "0,1"
|
|
bitfld.long 0x4 4. "AWDIE,Analog watchdog interrupt" "0,1"
|
|
bitfld.long 0x4 3. "ROVRIE,Regular data overrun interrupt" "0,1"
|
|
bitfld.long 0x4 2. "JOVRIE,Injected data overrun interrupt" "0,1"
|
|
bitfld.long 0x4 1. "REOCIE,Regular end of conversion interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "JEOCIE,Injected end of conversion interrupt" "0,1"
|
|
rgroup.long 0x208++0x3
|
|
line.long 0x0 "DFSDM_FLT2ISR,interrupt and status register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "SCDF,short-circuit detector"
|
|
hexmask.long.byte 0x0 16.--23. 1. "CKABF,Clock absence flag"
|
|
bitfld.long 0x0 14. "RCIP,Regular conversion in progress" "0,1"
|
|
bitfld.long 0x0 13. "JCIP,Injected conversion in progress" "0,1"
|
|
bitfld.long 0x0 4. "AWDF,Analog watchdog" "0,1"
|
|
bitfld.long 0x0 3. "ROVRF,Regular conversion overrun" "0,1"
|
|
bitfld.long 0x0 2. "JOVRF,Injected conversion overrun" "0,1"
|
|
bitfld.long 0x0 1. "REOCF,End of regular conversion" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "JEOCF,End of injected conversion" "0,1"
|
|
group.long 0x20C++0xB
|
|
line.long 0x0 "DFSDM_FLT2ICR,interrupt flag clear register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "CLRSCDF,Clear the short-circuit detector"
|
|
hexmask.long.byte 0x0 16.--23. 1. "CLRCKABF,Clear the clock absence"
|
|
bitfld.long 0x0 3. "CLRROVRF,Clear the regular conversion overrun" "0,1"
|
|
bitfld.long 0x0 2. "CLRJOVRF,Clear the injected conversion overrun" "0,1"
|
|
line.long 0x4 "DFSDM_FLT2JCHGR,injected channel group selection"
|
|
hexmask.long.byte 0x4 0.--7. 1. "JCHG,Injected channel group"
|
|
line.long 0x8 "DFSDM_FLT2FCR,filter control register"
|
|
bitfld.long 0x8 29.--31. "FORD,Sinc filter order" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x8 16.--25. 1. "FOSR,Sinc filter oversampling ratio"
|
|
hexmask.long.byte 0x8 0.--7. 1. "IOSR,Integrator oversampling ratio (averaging"
|
|
rgroup.long 0x218++0x7
|
|
line.long 0x0 "DFSDM_FLT2JDATAR,data register for injected"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "JDATA,Injected group conversion"
|
|
bitfld.long 0x0 0.--2. "JDATACH,Injected channel most recently" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "DFSDM_FLT2RDATAR,data register for the regular"
|
|
hexmask.long.tbyte 0x4 8.--31. 1. "RDATA,Regular channel conversion"
|
|
bitfld.long 0x4 4. "RPEND,Regular channel pending" "0,1"
|
|
bitfld.long 0x4 0.--2. "RDATACH,Regular channel most recently" "0,1,2,3,4,5,6,7"
|
|
group.long 0x220++0x7
|
|
line.long 0x0 "DFSDM_FLT2AWHTR,analog watchdog high threshold"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "AWHT,Analog watchdog high"
|
|
hexmask.long.byte 0x0 0.--3. 1. "BKAWH,Break signal assignment to analog"
|
|
line.long 0x4 "DFSDM_FLT2AWLTR,analog watchdog low threshold"
|
|
hexmask.long.tbyte 0x4 8.--31. 1. "AWLT,Analog watchdog low"
|
|
hexmask.long.byte 0x4 0.--3. 1. "BKAWL,Break signal assignment to analog"
|
|
rgroup.long 0x228++0x3
|
|
line.long 0x0 "DFSDM_FLT2AWSR,analog watchdog status"
|
|
hexmask.long.byte 0x0 8.--15. 1. "AWHTF,Analog watchdog high threshold"
|
|
hexmask.long.byte 0x0 0.--7. 1. "AWLTF,Analog watchdog low threshold"
|
|
group.long 0x22C++0x3
|
|
line.long 0x0 "DFSDM_FLT2AWCFR,analog watchdog clear flag"
|
|
hexmask.long.byte 0x0 8.--15. 1. "CLRAWHTF,Clear the analog watchdog high threshold"
|
|
hexmask.long.byte 0x0 0.--7. 1. "CLRAWLTF,Clear the analog watchdog low threshold"
|
|
rgroup.long 0x230++0xB
|
|
line.long 0x0 "DFSDM_FLT2EXMAX,Extremes detector maximum"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "EXMAX,Extremes detector maximum"
|
|
bitfld.long 0x0 0.--2. "EXMAXCH,Extremes detector maximum data" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "DFSDM_FLT2EXMIN,Extremes detector minimum"
|
|
hexmask.long.tbyte 0x4 8.--31. 1. "EXMIN,EXMIN"
|
|
bitfld.long 0x4 0.--2. "EXMINCH,Extremes detector minimum data" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "DFSDM_FLT2CNVTIMR,conversion timer register"
|
|
hexmask.long 0x8 4.--31. 1. "CNVCNT,28-bit timer counting conversion time t"
|
|
group.long 0x280++0x7
|
|
line.long 0x0 "DFSDM_FLT3CR1,control register 1"
|
|
bitfld.long 0x0 30. "AWFSEL,Analog watchdog fast mode" "0,1"
|
|
bitfld.long 0x0 29. "FAST,Fast conversion mode selection for" "0,1"
|
|
bitfld.long 0x0 24.--26. "RCH,Regular channel selection" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 21. "RDMAEN,DMA channel enabled to read data for the" "0,1"
|
|
bitfld.long 0x0 19. "RSYNC,Launch regular conversion synchronously" "0,1"
|
|
bitfld.long 0x0 18. "RCONT,Continuous mode selection for regular" "0,1"
|
|
bitfld.long 0x0 17. "RSWSTART,Software start of a conversion on the" "0,1"
|
|
bitfld.long 0x0 13.--14. "JEXTEN,Trigger enable and trigger edge" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "JEXTSEL,Trigger signal selection for launching" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 5. "JDMAEN,DMA channel enabled to read data for the" "0,1"
|
|
bitfld.long 0x0 4. "JSCAN,Scanning conversion mode for injected" "0,1"
|
|
bitfld.long 0x0 3. "JSYNC,Launch an injected conversion" "0,1"
|
|
bitfld.long 0x0 1. "JSWSTART,Start a conversion of the injected group" "0,1"
|
|
bitfld.long 0x0 0. "DFEN,DFSDM enable" "0,1"
|
|
line.long 0x4 "DFSDM_FLT3CR2,control register 2"
|
|
hexmask.long.byte 0x4 16.--23. 1. "AWDCH,Analog watchdog channel"
|
|
hexmask.long.byte 0x4 8.--15. 1. "EXCH,Extremes detector channel"
|
|
bitfld.long 0x4 6. "CKABIE,Clock absence interrupt" "0,1"
|
|
bitfld.long 0x4 5. "SCDIE,Short-circuit detector interrupt" "0,1"
|
|
bitfld.long 0x4 4. "AWDIE,Analog watchdog interrupt" "0,1"
|
|
bitfld.long 0x4 3. "ROVRIE,Regular data overrun interrupt" "0,1"
|
|
bitfld.long 0x4 2. "JOVRIE,Injected data overrun interrupt" "0,1"
|
|
bitfld.long 0x4 1. "REOCIE,Regular end of conversion interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "JEOCIE,Injected end of conversion interrupt" "0,1"
|
|
rgroup.long 0x288++0x3
|
|
line.long 0x0 "DFSDM_FLT3ISR,interrupt and status register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "SCDF,short-circuit detector"
|
|
hexmask.long.byte 0x0 16.--23. 1. "CKABF,Clock absence flag"
|
|
bitfld.long 0x0 14. "RCIP,Regular conversion in progress" "0,1"
|
|
bitfld.long 0x0 13. "JCIP,Injected conversion in progress" "0,1"
|
|
bitfld.long 0x0 4. "AWDF,Analog watchdog" "0,1"
|
|
bitfld.long 0x0 3. "ROVRF,Regular conversion overrun" "0,1"
|
|
bitfld.long 0x0 2. "JOVRF,Injected conversion overrun" "0,1"
|
|
bitfld.long 0x0 1. "REOCF,End of regular conversion" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "JEOCF,End of injected conversion" "0,1"
|
|
group.long 0x28C++0xB
|
|
line.long 0x0 "DFSDM_FLT3ICR,interrupt flag clear register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "CLRSCDF,Clear the short-circuit detector"
|
|
hexmask.long.byte 0x0 16.--23. 1. "CLRCKABF,Clear the clock absence"
|
|
bitfld.long 0x0 3. "CLRROVRF,Clear the regular conversion overrun" "0,1"
|
|
bitfld.long 0x0 2. "CLRJOVRF,Clear the injected conversion overrun" "0,1"
|
|
line.long 0x4 "DFSDM_FLT3JCHGR,injected channel group selection"
|
|
hexmask.long.byte 0x4 0.--7. 1. "JCHG,Injected channel group"
|
|
line.long 0x8 "DFSDM_FLT3FCR,filter control register"
|
|
bitfld.long 0x8 29.--31. "FORD,Sinc filter order" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x8 16.--25. 1. "FOSR,Sinc filter oversampling ratio"
|
|
hexmask.long.byte 0x8 0.--7. 1. "IOSR,Integrator oversampling ratio (averaging"
|
|
rgroup.long 0x298++0x7
|
|
line.long 0x0 "DFSDM_FLT3JDATAR,data register for injected"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "JDATA,Injected group conversion"
|
|
bitfld.long 0x0 0.--2. "JDATACH,Injected channel most recently" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "DFSDM_FLT3RDATAR,data register for the regular"
|
|
hexmask.long.tbyte 0x4 8.--31. 1. "RDATA,Regular channel conversion"
|
|
bitfld.long 0x4 4. "RPEND,Regular channel pending" "0,1"
|
|
bitfld.long 0x4 0.--2. "RDATACH,Regular channel most recently" "0,1,2,3,4,5,6,7"
|
|
group.long 0x2A0++0x7
|
|
line.long 0x0 "DFSDM_FLT3AWHTR,analog watchdog high threshold"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "AWHT,Analog watchdog high"
|
|
hexmask.long.byte 0x0 0.--3. 1. "BKAWH,Break signal assignment to analog"
|
|
line.long 0x4 "DFSDM_FLT3AWLTR,analog watchdog low threshold"
|
|
hexmask.long.tbyte 0x4 8.--31. 1. "AWLT,Analog watchdog low"
|
|
hexmask.long.byte 0x4 0.--3. 1. "BKAWL,Break signal assignment to analog"
|
|
rgroup.long 0x2A8++0x3
|
|
line.long 0x0 "DFSDM_FLT3AWSR,analog watchdog status"
|
|
hexmask.long.byte 0x0 8.--15. 1. "AWHTF,Analog watchdog high threshold"
|
|
hexmask.long.byte 0x0 0.--7. 1. "AWLTF,Analog watchdog low threshold"
|
|
group.long 0x2AC++0x3
|
|
line.long 0x0 "DFSDM_FLT3AWCFR,analog watchdog clear flag"
|
|
hexmask.long.byte 0x0 8.--15. 1. "CLRAWHTF,Clear the analog watchdog high threshold"
|
|
hexmask.long.byte 0x0 0.--7. 1. "CLRAWLTF,Clear the analog watchdog low threshold"
|
|
rgroup.long 0x2B0++0xB
|
|
line.long 0x0 "DFSDM_FLT3EXMAX,Extremes detector maximum"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "EXMAX,Extremes detector maximum"
|
|
bitfld.long 0x0 0.--2. "EXMAXCH,Extremes detector maximum data" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "DFSDM_FLT3EXMIN,Extremes detector minimum"
|
|
hexmask.long.tbyte 0x4 8.--31. 1. "EXMIN,EXMIN"
|
|
bitfld.long 0x4 0.--2. "EXMINCH,Extremes detector minimum data" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "DFSDM_FLT3CNVTIMR,conversion timer register"
|
|
hexmask.long 0x8 4.--31. 1. "CNVCNT,28-bit timer counting conversion time t"
|
|
tree.end
|
|
tree "DMA (Direct Memory Access)"
|
|
base ad:0x0
|
|
tree "DMA1"
|
|
base ad:0x40020000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "ISR,interrupt status register"
|
|
bitfld.long 0x0 27. "TEIF7,Channel x transfer error flag (x = 1" "0,1"
|
|
bitfld.long 0x0 26. "HTIF7,Channel x half transfer flag (x = 1" "0,1"
|
|
bitfld.long 0x0 25. "TCIF7,Channel x transfer complete flag (x = 1" "0,1"
|
|
bitfld.long 0x0 24. "GIF7,Channel x global interrupt flag (x = 1" "0,1"
|
|
bitfld.long 0x0 23. "TEIF6,Channel x transfer error flag (x = 1" "0,1"
|
|
bitfld.long 0x0 22. "HTIF6,Channel x half transfer flag (x = 1" "0,1"
|
|
bitfld.long 0x0 21. "TCIF6,Channel x transfer complete flag (x = 1" "0,1"
|
|
bitfld.long 0x0 20. "GIF6,Channel x global interrupt flag (x = 1" "0,1"
|
|
bitfld.long 0x0 19. "TEIF5,Channel x transfer error flag (x = 1" "0,1"
|
|
bitfld.long 0x0 18. "HTIF5,Channel x half transfer flag (x = 1" "0,1"
|
|
bitfld.long 0x0 17. "TCIF5,Channel x transfer complete flag (x = 1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "GIF5,Channel x global interrupt flag (x = 1" "0,1"
|
|
bitfld.long 0x0 15. "TEIF4,Channel x transfer error flag (x = 1" "0,1"
|
|
bitfld.long 0x0 14. "HTIF4,Channel x half transfer flag (x = 1" "0,1"
|
|
bitfld.long 0x0 13. "TCIF4,Channel x transfer complete flag (x = 1" "0,1"
|
|
bitfld.long 0x0 12. "GIF4,Channel x global interrupt flag (x = 1" "0,1"
|
|
bitfld.long 0x0 11. "TEIF3,Channel x transfer error flag (x = 1" "0,1"
|
|
bitfld.long 0x0 10. "HTIF3,Channel x half transfer flag (x = 1" "0,1"
|
|
bitfld.long 0x0 9. "TCIF3,Channel x transfer complete flag (x = 1" "0,1"
|
|
bitfld.long 0x0 8. "GIF3,Channel x global interrupt flag (x = 1" "0,1"
|
|
bitfld.long 0x0 7. "TEIF2,Channel x transfer error flag (x = 1" "0,1"
|
|
bitfld.long 0x0 6. "HTIF2,Channel x half transfer flag (x = 1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "TCIF2,Channel x transfer complete flag (x = 1" "0,1"
|
|
bitfld.long 0x0 4. "GIF2,Channel x global interrupt flag (x = 1" "0,1"
|
|
bitfld.long 0x0 3. "TEIF1,Channel x transfer error flag (x = 1" "0,1"
|
|
bitfld.long 0x0 2. "HTIF1,Channel x half transfer flag (x = 1" "0,1"
|
|
bitfld.long 0x0 1. "TCIF1,Channel x transfer complete flag (x = 1" "0,1"
|
|
bitfld.long 0x0 0. "GIF1,Channel x global interrupt flag (x = 1" "0,1"
|
|
wgroup.long 0x4++0x3
|
|
line.long 0x0 "IFCR,interrupt flag clear register"
|
|
bitfld.long 0x0 27. "CTEIF7,Channel x transfer error clear (x = 1" "0,1"
|
|
bitfld.long 0x0 26. "CHTIF7,Channel x half transfer clear (x = 1" "0,1"
|
|
bitfld.long 0x0 25. "CTCIF7,Channel x transfer complete clear (x = 1" "0,1"
|
|
bitfld.long 0x0 24. "CGIF7,Channel x global interrupt clear (x = 1" "0,1"
|
|
bitfld.long 0x0 23. "CTEIF6,Channel x transfer error clear (x = 1" "0,1"
|
|
bitfld.long 0x0 22. "CHTIF6,Channel x half transfer clear (x = 1" "0,1"
|
|
bitfld.long 0x0 21. "CTCIF6,Channel x transfer complete clear (x = 1" "0,1"
|
|
bitfld.long 0x0 20. "CGIF6,Channel x global interrupt clear (x = 1" "0,1"
|
|
bitfld.long 0x0 19. "CTEIF5,Channel x transfer error clear (x = 1" "0,1"
|
|
bitfld.long 0x0 18. "CHTIF5,Channel x half transfer clear (x = 1" "0,1"
|
|
bitfld.long 0x0 17. "CTCIF5,Channel x transfer complete clear (x = 1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "CGIF5,Channel x global interrupt clear (x = 1" "0,1"
|
|
bitfld.long 0x0 15. "CTEIF4,Channel x transfer error clear (x = 1" "0,1"
|
|
bitfld.long 0x0 14. "CHTIF4,Channel x half transfer clear (x = 1" "0,1"
|
|
bitfld.long 0x0 13. "CTCIF4,Channel x transfer complete clear (x = 1" "0,1"
|
|
bitfld.long 0x0 12. "CGIF4,Channel x global interrupt clear (x = 1" "0,1"
|
|
bitfld.long 0x0 11. "CTEIF3,Channel x transfer error clear (x = 1" "0,1"
|
|
bitfld.long 0x0 10. "CHTIF3,Channel x half transfer clear (x = 1" "0,1"
|
|
bitfld.long 0x0 9. "CTCIF3,Channel x transfer complete clear (x = 1" "0,1"
|
|
bitfld.long 0x0 8. "CGIF3,Channel x global interrupt clear (x = 1" "0,1"
|
|
bitfld.long 0x0 7. "CTEIF2,Channel x transfer error clear (x = 1" "0,1"
|
|
bitfld.long 0x0 6. "CHTIF2,Channel x half transfer clear (x = 1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "CTCIF2,Channel x transfer complete clear (x = 1" "0,1"
|
|
bitfld.long 0x0 4. "CGIF2,Channel x global interrupt clear (x = 1" "0,1"
|
|
bitfld.long 0x0 3. "CTEIF1,Channel x transfer error clear (x = 1" "0,1"
|
|
bitfld.long 0x0 2. "CHTIF1,Channel x half transfer clear (x = 1" "0,1"
|
|
bitfld.long 0x0 1. "CTCIF1,Channel x transfer complete clear (x = 1" "0,1"
|
|
bitfld.long 0x0 0. "CGIF1,Channel x global interrupt clear (x = 1" "0,1"
|
|
group.long 0x8++0xF
|
|
line.long 0x0 "CCR1,channel x configuration"
|
|
bitfld.long 0x0 14. "MEM2MEM,Memory to memory mode" "0,1"
|
|
bitfld.long 0x0 12.--13. "PL,Channel priority level" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "PSIZE,Peripheral size" "0,1,2,3"
|
|
bitfld.long 0x0 7. "MINC,Memory increment mode" "0,1"
|
|
bitfld.long 0x0 6. "PINC,Peripheral increment mode" "0,1"
|
|
bitfld.long 0x0 5. "CIRC,Circular mode" "0,1"
|
|
bitfld.long 0x0 4. "DIR,Data transfer direction" "0,1"
|
|
bitfld.long 0x0 3. "TEIE,Transfer error interrupt" "0,1"
|
|
bitfld.long 0x0 2. "HTIE,Half transfer interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TCIE,Transfer complete interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "EN,Channel enable" "0,1"
|
|
line.long 0x4 "CNDTR1,channel x number of data"
|
|
hexmask.long.word 0x4 0.--15. 1. "NDT,Number of data to transfer"
|
|
line.long 0x8 "CPAR1,channel x peripheral address"
|
|
hexmask.long 0x8 0.--31. 1. "PA,Peripheral address"
|
|
line.long 0xC "CMAR1,channel x memory address"
|
|
hexmask.long 0xC 0.--31. 1. "MA,Memory address"
|
|
group.long 0x1C++0xF
|
|
line.long 0x0 "CCR2,channel x configuration"
|
|
bitfld.long 0x0 14. "MEM2MEM,Memory to memory mode" "0,1"
|
|
bitfld.long 0x0 12.--13. "PL,Channel priority level" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "PSIZE,Peripheral size" "0,1,2,3"
|
|
bitfld.long 0x0 7. "MINC,Memory increment mode" "0,1"
|
|
bitfld.long 0x0 6. "PINC,Peripheral increment mode" "0,1"
|
|
bitfld.long 0x0 5. "CIRC,Circular mode" "0,1"
|
|
bitfld.long 0x0 4. "DIR,Data transfer direction" "0,1"
|
|
bitfld.long 0x0 3. "TEIE,Transfer error interrupt" "0,1"
|
|
bitfld.long 0x0 2. "HTIE,Half transfer interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TCIE,Transfer complete interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "EN,Channel enable" "0,1"
|
|
line.long 0x4 "CNDTR2,channel x number of data"
|
|
hexmask.long.word 0x4 0.--15. 1. "NDT,Number of data to transfer"
|
|
line.long 0x8 "CPAR2,channel x peripheral address"
|
|
hexmask.long 0x8 0.--31. 1. "PA,Peripheral address"
|
|
line.long 0xC "CMAR2,channel x memory address"
|
|
hexmask.long 0xC 0.--31. 1. "MA,Memory address"
|
|
group.long 0x30++0xF
|
|
line.long 0x0 "CCR3,channel x configuration"
|
|
bitfld.long 0x0 14. "MEM2MEM,Memory to memory mode" "0,1"
|
|
bitfld.long 0x0 12.--13. "PL,Channel priority level" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "PSIZE,Peripheral size" "0,1,2,3"
|
|
bitfld.long 0x0 7. "MINC,Memory increment mode" "0,1"
|
|
bitfld.long 0x0 6. "PINC,Peripheral increment mode" "0,1"
|
|
bitfld.long 0x0 5. "CIRC,Circular mode" "0,1"
|
|
bitfld.long 0x0 4. "DIR,Data transfer direction" "0,1"
|
|
bitfld.long 0x0 3. "TEIE,Transfer error interrupt" "0,1"
|
|
bitfld.long 0x0 2. "HTIE,Half transfer interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TCIE,Transfer complete interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "EN,Channel enable" "0,1"
|
|
line.long 0x4 "CNDTR3,channel x number of data"
|
|
hexmask.long.word 0x4 0.--15. 1. "NDT,Number of data to transfer"
|
|
line.long 0x8 "CPAR3,channel x peripheral address"
|
|
hexmask.long 0x8 0.--31. 1. "PA,Peripheral address"
|
|
line.long 0xC "CMAR3,channel x memory address"
|
|
hexmask.long 0xC 0.--31. 1. "MA,Memory address"
|
|
group.long 0x44++0xF
|
|
line.long 0x0 "CCR4,channel x configuration"
|
|
bitfld.long 0x0 14. "MEM2MEM,Memory to memory mode" "0,1"
|
|
bitfld.long 0x0 12.--13. "PL,Channel priority level" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "PSIZE,Peripheral size" "0,1,2,3"
|
|
bitfld.long 0x0 7. "MINC,Memory increment mode" "0,1"
|
|
bitfld.long 0x0 6. "PINC,Peripheral increment mode" "0,1"
|
|
bitfld.long 0x0 5. "CIRC,Circular mode" "0,1"
|
|
bitfld.long 0x0 4. "DIR,Data transfer direction" "0,1"
|
|
bitfld.long 0x0 3. "TEIE,Transfer error interrupt" "0,1"
|
|
bitfld.long 0x0 2. "HTIE,Half transfer interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TCIE,Transfer complete interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "EN,Channel enable" "0,1"
|
|
line.long 0x4 "CNDTR4,channel x number of data"
|
|
hexmask.long.word 0x4 0.--15. 1. "NDT,Number of data to transfer"
|
|
line.long 0x8 "CPAR4,channel x peripheral address"
|
|
hexmask.long 0x8 0.--31. 1. "PA,Peripheral address"
|
|
line.long 0xC "CMAR4,channel x memory address"
|
|
hexmask.long 0xC 0.--31. 1. "MA,Memory address"
|
|
group.long 0x58++0xF
|
|
line.long 0x0 "CCR5,channel x configuration"
|
|
bitfld.long 0x0 14. "MEM2MEM,Memory to memory mode" "0,1"
|
|
bitfld.long 0x0 12.--13. "PL,Channel priority level" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "PSIZE,Peripheral size" "0,1,2,3"
|
|
bitfld.long 0x0 7. "MINC,Memory increment mode" "0,1"
|
|
bitfld.long 0x0 6. "PINC,Peripheral increment mode" "0,1"
|
|
bitfld.long 0x0 5. "CIRC,Circular mode" "0,1"
|
|
bitfld.long 0x0 4. "DIR,Data transfer direction" "0,1"
|
|
bitfld.long 0x0 3. "TEIE,Transfer error interrupt" "0,1"
|
|
bitfld.long 0x0 2. "HTIE,Half transfer interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TCIE,Transfer complete interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "EN,Channel enable" "0,1"
|
|
line.long 0x4 "CNDTR5,channel x number of data"
|
|
hexmask.long.word 0x4 0.--15. 1. "NDT,Number of data to transfer"
|
|
line.long 0x8 "CPAR5,channel x peripheral address"
|
|
hexmask.long 0x8 0.--31. 1. "PA,Peripheral address"
|
|
line.long 0xC "CMAR5,channel x memory address"
|
|
hexmask.long 0xC 0.--31. 1. "MA,Memory address"
|
|
group.long 0x6C++0xF
|
|
line.long 0x0 "CCR6,channel x configuration"
|
|
bitfld.long 0x0 14. "MEM2MEM,Memory to memory mode" "0,1"
|
|
bitfld.long 0x0 12.--13. "PL,Channel priority level" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "PSIZE,Peripheral size" "0,1,2,3"
|
|
bitfld.long 0x0 7. "MINC,Memory increment mode" "0,1"
|
|
bitfld.long 0x0 6. "PINC,Peripheral increment mode" "0,1"
|
|
bitfld.long 0x0 5. "CIRC,Circular mode" "0,1"
|
|
bitfld.long 0x0 4. "DIR,Data transfer direction" "0,1"
|
|
bitfld.long 0x0 3. "TEIE,Transfer error interrupt" "0,1"
|
|
bitfld.long 0x0 2. "HTIE,Half transfer interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TCIE,Transfer complete interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "EN,Channel enable" "0,1"
|
|
line.long 0x4 "CNDTR6,channel x number of data"
|
|
hexmask.long.word 0x4 0.--15. 1. "NDT,Number of data to transfer"
|
|
line.long 0x8 "CPAR6,channel x peripheral address"
|
|
hexmask.long 0x8 0.--31. 1. "PA,Peripheral address"
|
|
line.long 0xC "CMAR6,channel x memory address"
|
|
hexmask.long 0xC 0.--31. 1. "MA,Memory address"
|
|
group.long 0x80++0xF
|
|
line.long 0x0 "CCR7,channel x configuration"
|
|
bitfld.long 0x0 14. "MEM2MEM,Memory to memory mode" "0,1"
|
|
bitfld.long 0x0 12.--13. "PL,Channel priority level" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "PSIZE,Peripheral size" "0,1,2,3"
|
|
bitfld.long 0x0 7. "MINC,Memory increment mode" "0,1"
|
|
bitfld.long 0x0 6. "PINC,Peripheral increment mode" "0,1"
|
|
bitfld.long 0x0 5. "CIRC,Circular mode" "0,1"
|
|
bitfld.long 0x0 4. "DIR,Data transfer direction" "0,1"
|
|
bitfld.long 0x0 3. "TEIE,Transfer error interrupt" "0,1"
|
|
bitfld.long 0x0 2. "HTIE,Half transfer interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TCIE,Transfer complete interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "EN,Channel enable" "0,1"
|
|
line.long 0x4 "CNDTR7,channel x number of data"
|
|
hexmask.long.word 0x4 0.--15. 1. "NDT,Number of data to transfer"
|
|
line.long 0x8 "CPAR7,channel x peripheral address"
|
|
hexmask.long 0x8 0.--31. 1. "PA,Peripheral address"
|
|
line.long 0xC "CMAR7,channel x memory address"
|
|
hexmask.long 0xC 0.--31. 1. "MA,Memory address"
|
|
tree.end
|
|
tree "DMA2"
|
|
base ad:0x40020400
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "ISR,interrupt status register"
|
|
bitfld.long 0x0 27. "TEIF7,Channel x transfer error flag (x = 1" "0,1"
|
|
bitfld.long 0x0 26. "HTIF7,Channel x half transfer flag (x = 1" "0,1"
|
|
bitfld.long 0x0 25. "TCIF7,Channel x transfer complete flag (x = 1" "0,1"
|
|
bitfld.long 0x0 24. "GIF7,Channel x global interrupt flag (x = 1" "0,1"
|
|
bitfld.long 0x0 23. "TEIF6,Channel x transfer error flag (x = 1" "0,1"
|
|
bitfld.long 0x0 22. "HTIF6,Channel x half transfer flag (x = 1" "0,1"
|
|
bitfld.long 0x0 21. "TCIF6,Channel x transfer complete flag (x = 1" "0,1"
|
|
bitfld.long 0x0 20. "GIF6,Channel x global interrupt flag (x = 1" "0,1"
|
|
bitfld.long 0x0 19. "TEIF5,Channel x transfer error flag (x = 1" "0,1"
|
|
bitfld.long 0x0 18. "HTIF5,Channel x half transfer flag (x = 1" "0,1"
|
|
bitfld.long 0x0 17. "TCIF5,Channel x transfer complete flag (x = 1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "GIF5,Channel x global interrupt flag (x = 1" "0,1"
|
|
bitfld.long 0x0 15. "TEIF4,Channel x transfer error flag (x = 1" "0,1"
|
|
bitfld.long 0x0 14. "HTIF4,Channel x half transfer flag (x = 1" "0,1"
|
|
bitfld.long 0x0 13. "TCIF4,Channel x transfer complete flag (x = 1" "0,1"
|
|
bitfld.long 0x0 12. "GIF4,Channel x global interrupt flag (x = 1" "0,1"
|
|
bitfld.long 0x0 11. "TEIF3,Channel x transfer error flag (x = 1" "0,1"
|
|
bitfld.long 0x0 10. "HTIF3,Channel x half transfer flag (x = 1" "0,1"
|
|
bitfld.long 0x0 9. "TCIF3,Channel x transfer complete flag (x = 1" "0,1"
|
|
bitfld.long 0x0 8. "GIF3,Channel x global interrupt flag (x = 1" "0,1"
|
|
bitfld.long 0x0 7. "TEIF2,Channel x transfer error flag (x = 1" "0,1"
|
|
bitfld.long 0x0 6. "HTIF2,Channel x half transfer flag (x = 1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "TCIF2,Channel x transfer complete flag (x = 1" "0,1"
|
|
bitfld.long 0x0 4. "GIF2,Channel x global interrupt flag (x = 1" "0,1"
|
|
bitfld.long 0x0 3. "TEIF1,Channel x transfer error flag (x = 1" "0,1"
|
|
bitfld.long 0x0 2. "HTIF1,Channel x half transfer flag (x = 1" "0,1"
|
|
bitfld.long 0x0 1. "TCIF1,Channel x transfer complete flag (x = 1" "0,1"
|
|
bitfld.long 0x0 0. "GIF1,Channel x global interrupt flag (x = 1" "0,1"
|
|
wgroup.long 0x4++0x3
|
|
line.long 0x0 "IFCR,interrupt flag clear register"
|
|
bitfld.long 0x0 27. "CTEIF7,Channel x transfer error clear (x = 1" "0,1"
|
|
bitfld.long 0x0 26. "CHTIF7,Channel x half transfer clear (x = 1" "0,1"
|
|
bitfld.long 0x0 25. "CTCIF7,Channel x transfer complete clear (x = 1" "0,1"
|
|
bitfld.long 0x0 24. "CGIF7,Channel x global interrupt clear (x = 1" "0,1"
|
|
bitfld.long 0x0 23. "CTEIF6,Channel x transfer error clear (x = 1" "0,1"
|
|
bitfld.long 0x0 22. "CHTIF6,Channel x half transfer clear (x = 1" "0,1"
|
|
bitfld.long 0x0 21. "CTCIF6,Channel x transfer complete clear (x = 1" "0,1"
|
|
bitfld.long 0x0 20. "CGIF6,Channel x global interrupt clear (x = 1" "0,1"
|
|
bitfld.long 0x0 19. "CTEIF5,Channel x transfer error clear (x = 1" "0,1"
|
|
bitfld.long 0x0 18. "CHTIF5,Channel x half transfer clear (x = 1" "0,1"
|
|
bitfld.long 0x0 17. "CTCIF5,Channel x transfer complete clear (x = 1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "CGIF5,Channel x global interrupt clear (x = 1" "0,1"
|
|
bitfld.long 0x0 15. "CTEIF4,Channel x transfer error clear (x = 1" "0,1"
|
|
bitfld.long 0x0 14. "CHTIF4,Channel x half transfer clear (x = 1" "0,1"
|
|
bitfld.long 0x0 13. "CTCIF4,Channel x transfer complete clear (x = 1" "0,1"
|
|
bitfld.long 0x0 12. "CGIF4,Channel x global interrupt clear (x = 1" "0,1"
|
|
bitfld.long 0x0 11. "CTEIF3,Channel x transfer error clear (x = 1" "0,1"
|
|
bitfld.long 0x0 10. "CHTIF3,Channel x half transfer clear (x = 1" "0,1"
|
|
bitfld.long 0x0 9. "CTCIF3,Channel x transfer complete clear (x = 1" "0,1"
|
|
bitfld.long 0x0 8. "CGIF3,Channel x global interrupt clear (x = 1" "0,1"
|
|
bitfld.long 0x0 7. "CTEIF2,Channel x transfer error clear (x = 1" "0,1"
|
|
bitfld.long 0x0 6. "CHTIF2,Channel x half transfer clear (x = 1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "CTCIF2,Channel x transfer complete clear (x = 1" "0,1"
|
|
bitfld.long 0x0 4. "CGIF2,Channel x global interrupt clear (x = 1" "0,1"
|
|
bitfld.long 0x0 3. "CTEIF1,Channel x transfer error clear (x = 1" "0,1"
|
|
bitfld.long 0x0 2. "CHTIF1,Channel x half transfer clear (x = 1" "0,1"
|
|
bitfld.long 0x0 1. "CTCIF1,Channel x transfer complete clear (x = 1" "0,1"
|
|
bitfld.long 0x0 0. "CGIF1,Channel x global interrupt clear (x = 1" "0,1"
|
|
group.long 0x8++0xF
|
|
line.long 0x0 "CCR1,channel x configuration"
|
|
bitfld.long 0x0 14. "MEM2MEM,Memory to memory mode" "0,1"
|
|
bitfld.long 0x0 12.--13. "PL,Channel priority level" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "PSIZE,Peripheral size" "0,1,2,3"
|
|
bitfld.long 0x0 7. "MINC,Memory increment mode" "0,1"
|
|
bitfld.long 0x0 6. "PINC,Peripheral increment mode" "0,1"
|
|
bitfld.long 0x0 5. "CIRC,Circular mode" "0,1"
|
|
bitfld.long 0x0 4. "DIR,Data transfer direction" "0,1"
|
|
bitfld.long 0x0 3. "TEIE,Transfer error interrupt" "0,1"
|
|
bitfld.long 0x0 2. "HTIE,Half transfer interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TCIE,Transfer complete interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "EN,Channel enable" "0,1"
|
|
line.long 0x4 "CNDTR1,channel x number of data"
|
|
hexmask.long.word 0x4 0.--15. 1. "NDT,Number of data to transfer"
|
|
line.long 0x8 "CPAR1,channel x peripheral address"
|
|
hexmask.long 0x8 0.--31. 1. "PA,Peripheral address"
|
|
line.long 0xC "CMAR1,channel x memory address"
|
|
hexmask.long 0xC 0.--31. 1. "MA,Memory address"
|
|
group.long 0x1C++0xF
|
|
line.long 0x0 "CCR2,channel x configuration"
|
|
bitfld.long 0x0 14. "MEM2MEM,Memory to memory mode" "0,1"
|
|
bitfld.long 0x0 12.--13. "PL,Channel priority level" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "PSIZE,Peripheral size" "0,1,2,3"
|
|
bitfld.long 0x0 7. "MINC,Memory increment mode" "0,1"
|
|
bitfld.long 0x0 6. "PINC,Peripheral increment mode" "0,1"
|
|
bitfld.long 0x0 5. "CIRC,Circular mode" "0,1"
|
|
bitfld.long 0x0 4. "DIR,Data transfer direction" "0,1"
|
|
bitfld.long 0x0 3. "TEIE,Transfer error interrupt" "0,1"
|
|
bitfld.long 0x0 2. "HTIE,Half transfer interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TCIE,Transfer complete interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "EN,Channel enable" "0,1"
|
|
line.long 0x4 "CNDTR2,channel x number of data"
|
|
hexmask.long.word 0x4 0.--15. 1. "NDT,Number of data to transfer"
|
|
line.long 0x8 "CPAR2,channel x peripheral address"
|
|
hexmask.long 0x8 0.--31. 1. "PA,Peripheral address"
|
|
line.long 0xC "CMAR2,channel x memory address"
|
|
hexmask.long 0xC 0.--31. 1. "MA,Memory address"
|
|
group.long 0x30++0xF
|
|
line.long 0x0 "CCR3,channel x configuration"
|
|
bitfld.long 0x0 14. "MEM2MEM,Memory to memory mode" "0,1"
|
|
bitfld.long 0x0 12.--13. "PL,Channel priority level" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "PSIZE,Peripheral size" "0,1,2,3"
|
|
bitfld.long 0x0 7. "MINC,Memory increment mode" "0,1"
|
|
bitfld.long 0x0 6. "PINC,Peripheral increment mode" "0,1"
|
|
bitfld.long 0x0 5. "CIRC,Circular mode" "0,1"
|
|
bitfld.long 0x0 4. "DIR,Data transfer direction" "0,1"
|
|
bitfld.long 0x0 3. "TEIE,Transfer error interrupt" "0,1"
|
|
bitfld.long 0x0 2. "HTIE,Half transfer interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TCIE,Transfer complete interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "EN,Channel enable" "0,1"
|
|
line.long 0x4 "CNDTR3,channel x number of data"
|
|
hexmask.long.word 0x4 0.--15. 1. "NDT,Number of data to transfer"
|
|
line.long 0x8 "CPAR3,channel x peripheral address"
|
|
hexmask.long 0x8 0.--31. 1. "PA,Peripheral address"
|
|
line.long 0xC "CMAR3,channel x memory address"
|
|
hexmask.long 0xC 0.--31. 1. "MA,Memory address"
|
|
group.long 0x44++0xF
|
|
line.long 0x0 "CCR4,channel x configuration"
|
|
bitfld.long 0x0 14. "MEM2MEM,Memory to memory mode" "0,1"
|
|
bitfld.long 0x0 12.--13. "PL,Channel priority level" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "PSIZE,Peripheral size" "0,1,2,3"
|
|
bitfld.long 0x0 7. "MINC,Memory increment mode" "0,1"
|
|
bitfld.long 0x0 6. "PINC,Peripheral increment mode" "0,1"
|
|
bitfld.long 0x0 5. "CIRC,Circular mode" "0,1"
|
|
bitfld.long 0x0 4. "DIR,Data transfer direction" "0,1"
|
|
bitfld.long 0x0 3. "TEIE,Transfer error interrupt" "0,1"
|
|
bitfld.long 0x0 2. "HTIE,Half transfer interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TCIE,Transfer complete interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "EN,Channel enable" "0,1"
|
|
line.long 0x4 "CNDTR4,channel x number of data"
|
|
hexmask.long.word 0x4 0.--15. 1. "NDT,Number of data to transfer"
|
|
line.long 0x8 "CPAR4,channel x peripheral address"
|
|
hexmask.long 0x8 0.--31. 1. "PA,Peripheral address"
|
|
line.long 0xC "CMAR4,channel x memory address"
|
|
hexmask.long 0xC 0.--31. 1. "MA,Memory address"
|
|
group.long 0x58++0xF
|
|
line.long 0x0 "CCR5,channel x configuration"
|
|
bitfld.long 0x0 14. "MEM2MEM,Memory to memory mode" "0,1"
|
|
bitfld.long 0x0 12.--13. "PL,Channel priority level" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "PSIZE,Peripheral size" "0,1,2,3"
|
|
bitfld.long 0x0 7. "MINC,Memory increment mode" "0,1"
|
|
bitfld.long 0x0 6. "PINC,Peripheral increment mode" "0,1"
|
|
bitfld.long 0x0 5. "CIRC,Circular mode" "0,1"
|
|
bitfld.long 0x0 4. "DIR,Data transfer direction" "0,1"
|
|
bitfld.long 0x0 3. "TEIE,Transfer error interrupt" "0,1"
|
|
bitfld.long 0x0 2. "HTIE,Half transfer interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TCIE,Transfer complete interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "EN,Channel enable" "0,1"
|
|
line.long 0x4 "CNDTR5,channel x number of data"
|
|
hexmask.long.word 0x4 0.--15. 1. "NDT,Number of data to transfer"
|
|
line.long 0x8 "CPAR5,channel x peripheral address"
|
|
hexmask.long 0x8 0.--31. 1. "PA,Peripheral address"
|
|
line.long 0xC "CMAR5,channel x memory address"
|
|
hexmask.long 0xC 0.--31. 1. "MA,Memory address"
|
|
group.long 0x6C++0xF
|
|
line.long 0x0 "CCR6,channel x configuration"
|
|
bitfld.long 0x0 14. "MEM2MEM,Memory to memory mode" "0,1"
|
|
bitfld.long 0x0 12.--13. "PL,Channel priority level" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "PSIZE,Peripheral size" "0,1,2,3"
|
|
bitfld.long 0x0 7. "MINC,Memory increment mode" "0,1"
|
|
bitfld.long 0x0 6. "PINC,Peripheral increment mode" "0,1"
|
|
bitfld.long 0x0 5. "CIRC,Circular mode" "0,1"
|
|
bitfld.long 0x0 4. "DIR,Data transfer direction" "0,1"
|
|
bitfld.long 0x0 3. "TEIE,Transfer error interrupt" "0,1"
|
|
bitfld.long 0x0 2. "HTIE,Half transfer interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TCIE,Transfer complete interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "EN,Channel enable" "0,1"
|
|
line.long 0x4 "CNDTR6,channel x number of data"
|
|
hexmask.long.word 0x4 0.--15. 1. "NDT,Number of data to transfer"
|
|
line.long 0x8 "CPAR6,channel x peripheral address"
|
|
hexmask.long 0x8 0.--31. 1. "PA,Peripheral address"
|
|
line.long 0xC "CMAR6,channel x memory address"
|
|
hexmask.long 0xC 0.--31. 1. "MA,Memory address"
|
|
group.long 0x80++0xF
|
|
line.long 0x0 "CCR7,channel x configuration"
|
|
bitfld.long 0x0 14. "MEM2MEM,Memory to memory mode" "0,1"
|
|
bitfld.long 0x0 12.--13. "PL,Channel priority level" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "PSIZE,Peripheral size" "0,1,2,3"
|
|
bitfld.long 0x0 7. "MINC,Memory increment mode" "0,1"
|
|
bitfld.long 0x0 6. "PINC,Peripheral increment mode" "0,1"
|
|
bitfld.long 0x0 5. "CIRC,Circular mode" "0,1"
|
|
bitfld.long 0x0 4. "DIR,Data transfer direction" "0,1"
|
|
bitfld.long 0x0 3. "TEIE,Transfer error interrupt" "0,1"
|
|
bitfld.long 0x0 2. "HTIE,Half transfer interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TCIE,Transfer complete interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "EN,Channel enable" "0,1"
|
|
line.long 0x4 "CNDTR7,channel x number of data"
|
|
hexmask.long.word 0x4 0.--15. 1. "NDT,Number of data to transfer"
|
|
line.long 0x8 "CPAR7,channel x peripheral address"
|
|
hexmask.long 0x8 0.--31. 1. "PA,Peripheral address"
|
|
line.long 0xC "CMAR7,channel x memory address"
|
|
hexmask.long 0xC 0.--31. 1. "MA,Memory address"
|
|
tree.end
|
|
tree.end
|
|
tree "DMA2D (Chrom-ART Accelerator Controller)"
|
|
base ad:0x4002B000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CR,control register"
|
|
bitfld.long 0x0 16.--17. "MODE,DMA2D mode" "0,1,2,3"
|
|
bitfld.long 0x0 13. "CEIE,Configuration Error Interrupt" "0,1"
|
|
bitfld.long 0x0 12. "CTCIE,CLUT transfer complete interrupt" "0,1"
|
|
bitfld.long 0x0 11. "CAEIE,CLUT access error interrupt" "0,1"
|
|
bitfld.long 0x0 10. "TWIE,Transfer watermark interrupt" "0,1"
|
|
bitfld.long 0x0 9. "TCIE,Transfer complete interrupt" "0,1"
|
|
bitfld.long 0x0 8. "TEIE,Transfer error interrupt" "0,1"
|
|
bitfld.long 0x0 2. "ABORT,Abort" "0,1"
|
|
bitfld.long 0x0 1. "SUSP,Suspend" "0,1"
|
|
bitfld.long 0x0 0. "START,Start" "0,1"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "ISR,Interrupt Status Register"
|
|
bitfld.long 0x0 5. "CEIF,Configuration error interrupt" "0,1"
|
|
bitfld.long 0x0 4. "CTCIF,CLUT transfer complete interrupt" "0,1"
|
|
bitfld.long 0x0 3. "CAEIF,CLUT access error interrupt" "0,1"
|
|
bitfld.long 0x0 2. "TWIF,Transfer watermark interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TCIF,Transfer complete interrupt" "0,1"
|
|
bitfld.long 0x0 0. "TEIF,Transfer error interrupt" "0,1"
|
|
group.long 0x8++0x47
|
|
line.long 0x0 "IFCR,interrupt flag clear register"
|
|
bitfld.long 0x0 5. "CCEIF,Clear configuration error interrupt" "0,1"
|
|
bitfld.long 0x0 4. "CCTCIF,Clear CLUT transfer complete interrupt" "0,1"
|
|
bitfld.long 0x0 3. "CAECIF,Clear CLUT access error interrupt" "0,1"
|
|
bitfld.long 0x0 2. "CTWIF,Clear transfer watermark interrupt" "0,1"
|
|
bitfld.long 0x0 1. "CTCIF,Clear transfer complete interrupt" "0,1"
|
|
bitfld.long 0x0 0. "CTEIF,Clear Transfer error interrupt" "0,1"
|
|
line.long 0x4 "FGMAR,foreground memory address"
|
|
hexmask.long 0x4 0.--31. 1. "MA,Memory address"
|
|
line.long 0x8 "FGOR,foreground offset register"
|
|
hexmask.long.word 0x8 0.--13. 1. "LO,Line offset"
|
|
line.long 0xC "BGMAR,background memory address"
|
|
hexmask.long 0xC 0.--31. 1. "MA,Memory address"
|
|
line.long 0x10 "BGOR,background offset register"
|
|
hexmask.long.word 0x10 0.--13. 1. "LO,Line offset"
|
|
line.long 0x14 "FGPFCCR,foreground PFC control"
|
|
hexmask.long.byte 0x14 24.--31. 1. "ALPHA,Alpha value"
|
|
bitfld.long 0x14 21. "RBS,Red Blue Swap" "0,1"
|
|
bitfld.long 0x14 20. "AI,Alpha Inverted" "0,1"
|
|
bitfld.long 0x14 16.--17. "AM,Alpha mode" "0,1,2,3"
|
|
hexmask.long.byte 0x14 8.--15. 1. "CS,CLUT size"
|
|
bitfld.long 0x14 5. "START,Start" "0,1"
|
|
bitfld.long 0x14 4. "CCM,CLUT color mode" "0,1"
|
|
hexmask.long.byte 0x14 0.--3. 1. "CM,Color mode"
|
|
line.long 0x18 "FGCOLR,foreground color register"
|
|
hexmask.long.byte 0x18 16.--23. 1. "RED,Red Value"
|
|
hexmask.long.byte 0x18 8.--15. 1. "GREEN,Green Value"
|
|
hexmask.long.byte 0x18 0.--7. 1. "BLUE,Blue Value"
|
|
line.long 0x1C "BGPFCCR,background PFC control"
|
|
hexmask.long.byte 0x1C 24.--31. 1. "ALPHA,Alpha value"
|
|
bitfld.long 0x1C 21. "RBS,Red Blue Swap" "0,1"
|
|
bitfld.long 0x1C 20. "AI,Alpha Inverted" "0,1"
|
|
bitfld.long 0x1C 16.--17. "AM,Alpha mode" "0,1,2,3"
|
|
hexmask.long.byte 0x1C 8.--15. 1. "CS,CLUT size"
|
|
bitfld.long 0x1C 5. "START,Start" "0,1"
|
|
bitfld.long 0x1C 4. "CCM,CLUT Color mode" "0,1"
|
|
hexmask.long.byte 0x1C 0.--3. 1. "CM,Color mode"
|
|
line.long 0x20 "BGCOLR,background color register"
|
|
hexmask.long.byte 0x20 16.--23. 1. "RED,Red Value"
|
|
hexmask.long.byte 0x20 8.--15. 1. "GREEN,Green Value"
|
|
hexmask.long.byte 0x20 0.--7. 1. "BLUE,Blue Value"
|
|
line.long 0x24 "FGCMAR,foreground CLUT memory address"
|
|
hexmask.long 0x24 0.--31. 1. "MA,Memory Address"
|
|
line.long 0x28 "BGCMAR,background CLUT memory address"
|
|
hexmask.long 0x28 0.--31. 1. "MA,Memory address"
|
|
line.long 0x2C "OPFCCR,output PFC control register"
|
|
bitfld.long 0x2C 21. "RBS,Red Blue Swap" "0,1"
|
|
bitfld.long 0x2C 20. "AI,Alpha Inverted" "0,1"
|
|
bitfld.long 0x2C 0.--2. "CM,Color mode" "0,1,2,3,4,5,6,7"
|
|
line.long 0x30 "OCOLR,output color register"
|
|
hexmask.long.byte 0x30 24.--31. 1. "APLHA,Alpha Channel Value"
|
|
hexmask.long.byte 0x30 16.--23. 1. "RED,Red Value"
|
|
hexmask.long.byte 0x30 8.--15. 1. "GREEN,Green Value"
|
|
hexmask.long.byte 0x30 0.--7. 1. "BLUE,Blue Value"
|
|
line.long 0x34 "OMAR,output memory address register"
|
|
hexmask.long 0x34 0.--31. 1. "MA,Memory Address"
|
|
line.long 0x38 "OOR,output offset register"
|
|
hexmask.long.word 0x38 0.--13. 1. "LO,Line Offset"
|
|
line.long 0x3C "NLR,number of line register"
|
|
hexmask.long.word 0x3C 16.--29. 1. "PL,Pixel per lines"
|
|
hexmask.long.word 0x3C 0.--15. 1. "NL,Number of lines"
|
|
line.long 0x40 "LWR,line watermark register"
|
|
hexmask.long.word 0x40 0.--15. 1. "LW,Line watermark"
|
|
line.long 0x44 "AMTCR,AHB master timer configuration"
|
|
hexmask.long.byte 0x44 8.--15. 1. "DT,Dead Time"
|
|
bitfld.long 0x44 0. "EN,Enable" "0,1"
|
|
group.long 0x400++0x3
|
|
line.long 0x0 "FGCLUT,FGCLUT"
|
|
hexmask.long.byte 0x0 24.--31. 1. "APLHA,APLHA"
|
|
hexmask.long.byte 0x0 16.--23. 1. "RED,RED"
|
|
hexmask.long.byte 0x0 8.--15. 1. "GREEN,GREEN"
|
|
hexmask.long.byte 0x0 0.--7. 1. "BLUE,BLUE"
|
|
group.long 0x800++0x3
|
|
line.long 0x0 "BGCLUT,BGCLUT"
|
|
hexmask.long.byte 0x0 24.--31. 1. "APLHA,APLHA"
|
|
hexmask.long.byte 0x0 16.--23. 1. "RED,RED"
|
|
hexmask.long.byte 0x0 8.--15. 1. "GREEN,GREEN"
|
|
hexmask.long.byte 0x0 0.--7. 1. "BLUE,BLUE"
|
|
tree.end
|
|
tree "DMAMUX (DMA Request Multiplexer)"
|
|
base ad:0x40020800
|
|
group.long 0x0++0x37
|
|
line.long 0x0 "C0CR,channel 0 configuration register"
|
|
hexmask.long.byte 0x0 24.--28. 1. "SYNC_ID,Synchronization identification"
|
|
hexmask.long.byte 0x0 19.--23. 1. "NBREQ,Number of DMA requests minus 1 to forward"
|
|
bitfld.long 0x0 17.--18. "SPOL,Synchronization polarity" "0,1,2,3"
|
|
bitfld.long 0x0 16. "SE,Synchronization enable" "0,1"
|
|
bitfld.long 0x0 9. "EGE,Event generation enable" "0,1"
|
|
bitfld.long 0x0 8. "SOIE,Synchronization overrun interrupt enable" "0,1"
|
|
hexmask.long.byte 0x0 0.--6. 1. "DMAREQ_ID,DMA request identification"
|
|
line.long 0x4 "C1CR,channel 1 configuration register"
|
|
hexmask.long.byte 0x4 24.--28. 1. "SYNC_ID,Synchronization identification"
|
|
hexmask.long.byte 0x4 19.--23. 1. "NBREQ,Number of DMA requests minus 1 to forward"
|
|
bitfld.long 0x4 17.--18. "SPOL,Synchronization polarity" "0,1,2,3"
|
|
bitfld.long 0x4 16. "SE,Synchronization enable" "0,1"
|
|
bitfld.long 0x4 9. "EGE,Event generation enable" "0,1"
|
|
bitfld.long 0x4 8. "SOIE,Synchronization overrun interrupt enable" "0,1"
|
|
hexmask.long.byte 0x4 0.--6. 1. "DMAREQ_ID,DMA request identification"
|
|
line.long 0x8 "C2CR,channel 2 configuration register"
|
|
hexmask.long.byte 0x8 24.--28. 1. "SYNC_ID,Synchronization identification"
|
|
hexmask.long.byte 0x8 19.--23. 1. "NBREQ,Number of DMA requests minus 1 to forward"
|
|
bitfld.long 0x8 17.--18. "SPOL,Synchronization polarity" "0,1,2,3"
|
|
bitfld.long 0x8 16. "SE,Synchronization enable" "0,1"
|
|
bitfld.long 0x8 9. "EGE,Event generation enable" "0,1"
|
|
bitfld.long 0x8 8. "SOIE,Synchronization overrun interrupt enable" "0,1"
|
|
hexmask.long.byte 0x8 0.--6. 1. "DMAREQ_ID,DMA request identification"
|
|
line.long 0xC "C3CR,channel 3 configuration register"
|
|
hexmask.long.byte 0xC 24.--28. 1. "SYNC_ID,Synchronization identification"
|
|
hexmask.long.byte 0xC 19.--23. 1. "NBREQ,Number of DMA requests minus 1 to forward"
|
|
bitfld.long 0xC 17.--18. "SPOL,Synchronization polarity" "0,1,2,3"
|
|
bitfld.long 0xC 16. "SE,Synchronization enable" "0,1"
|
|
bitfld.long 0xC 9. "EGE,Event generation enable" "0,1"
|
|
bitfld.long 0xC 8. "SOIE,Synchronization overrun interrupt enable" "0,1"
|
|
hexmask.long.byte 0xC 0.--6. 1. "DMAREQ_ID,DMA request identification"
|
|
line.long 0x10 "C4CR,channel 4 configuration register"
|
|
hexmask.long.byte 0x10 24.--28. 1. "SYNC_ID,Synchronization identification"
|
|
hexmask.long.byte 0x10 19.--23. 1. "NBREQ,Number of DMA requests minus 1 to forward"
|
|
bitfld.long 0x10 17.--18. "SPOL,Synchronization polarity" "0,1,2,3"
|
|
bitfld.long 0x10 16. "SE,Synchronization enable" "0,1"
|
|
bitfld.long 0x10 9. "EGE,Event generation enable" "0,1"
|
|
bitfld.long 0x10 8. "SOIE,Synchronization overrun interrupt enable" "0,1"
|
|
hexmask.long.byte 0x10 0.--6. 1. "DMAREQ_ID,DMA request identification"
|
|
line.long 0x14 "C5CR,channel 5 configuration register"
|
|
hexmask.long.byte 0x14 24.--28. 1. "SYNC_ID,Synchronization identification"
|
|
hexmask.long.byte 0x14 19.--23. 1. "NBREQ,Number of DMA requests minus 1 to forward"
|
|
bitfld.long 0x14 17.--18. "SPOL,Synchronization polarity" "0,1,2,3"
|
|
bitfld.long 0x14 16. "SE,Synchronization enable" "0,1"
|
|
bitfld.long 0x14 9. "EGE,Event generation enable" "0,1"
|
|
bitfld.long 0x14 8. "SOIE,Synchronization overrun interrupt enable" "0,1"
|
|
hexmask.long.byte 0x14 0.--6. 1. "DMAREQ_ID,DMA request identification"
|
|
line.long 0x18 "C6CR,channel 6 configuration register"
|
|
hexmask.long.byte 0x18 24.--28. 1. "SYNC_ID,Synchronization identification"
|
|
hexmask.long.byte 0x18 19.--23. 1. "NBREQ,Number of DMA requests minus 1 to forward"
|
|
bitfld.long 0x18 17.--18. "SPOL,Synchronization polarity" "0,1,2,3"
|
|
bitfld.long 0x18 16. "SE,Synchronization enable" "0,1"
|
|
bitfld.long 0x18 9. "EGE,Event generation enable" "0,1"
|
|
bitfld.long 0x18 8. "SOIE,Synchronization overrun interrupt enable" "0,1"
|
|
hexmask.long.byte 0x18 0.--6. 1. "DMAREQ_ID,DMA request identification"
|
|
line.long 0x1C "C7CR,channel 7 configuration register"
|
|
hexmask.long.byte 0x1C 24.--28. 1. "SYNC_ID,Synchronization identification"
|
|
hexmask.long.byte 0x1C 19.--23. 1. "NBREQ,Number of DMA requests minus 1 to forward"
|
|
bitfld.long 0x1C 17.--18. "SPOL,Synchronization polarity" "0,1,2,3"
|
|
bitfld.long 0x1C 16. "SE,Synchronization enable" "0,1"
|
|
bitfld.long 0x1C 9. "EGE,Event generation enable" "0,1"
|
|
bitfld.long 0x1C 8. "SOIE,Synchronization overrun interrupt enable" "0,1"
|
|
hexmask.long.byte 0x1C 0.--6. 1. "DMAREQ_ID,DMA request identification"
|
|
line.long 0x20 "C8CR,channel 8 configuration register"
|
|
hexmask.long.byte 0x20 24.--28. 1. "SYNC_ID,Synchronization identification"
|
|
hexmask.long.byte 0x20 19.--23. 1. "NBREQ,Number of DMA requests minus 1 to forward"
|
|
bitfld.long 0x20 17.--18. "SPOL,Synchronization polarity" "0,1,2,3"
|
|
bitfld.long 0x20 16. "SE,Synchronization enable" "0,1"
|
|
bitfld.long 0x20 9. "EGE,Event generation enable" "0,1"
|
|
bitfld.long 0x20 8. "SOIE,Synchronization overrun interrupt enable" "0,1"
|
|
hexmask.long.byte 0x20 0.--6. 1. "DMAREQ_ID,DMA request identification"
|
|
line.long 0x24 "C9CR,channel 9 configuration register"
|
|
hexmask.long.byte 0x24 24.--28. 1. "SYNC_ID,Synchronization identification"
|
|
hexmask.long.byte 0x24 19.--23. 1. "NBREQ,Number of DMA requests minus 1 to forward"
|
|
bitfld.long 0x24 17.--18. "SPOL,Synchronization polarity" "0,1,2,3"
|
|
bitfld.long 0x24 16. "SE,Synchronization enable" "0,1"
|
|
bitfld.long 0x24 9. "EGE,Event generation enable" "0,1"
|
|
bitfld.long 0x24 8. "SOIE,Synchronization overrun interrupt enable" "0,1"
|
|
hexmask.long.byte 0x24 0.--6. 1. "DMAREQ_ID,DMA request identification"
|
|
line.long 0x28 "C10CR,channel 10 configuration register"
|
|
hexmask.long.byte 0x28 24.--28. 1. "SYNC_ID,Synchronization identification"
|
|
hexmask.long.byte 0x28 19.--23. 1. "NBREQ,Number of DMA requests minus 1 to forward"
|
|
bitfld.long 0x28 17.--18. "SPOL,Synchronization polarity" "0,1,2,3"
|
|
bitfld.long 0x28 16. "SE,Synchronization enable" "0,1"
|
|
bitfld.long 0x28 9. "EGE,Event generation enable" "0,1"
|
|
bitfld.long 0x28 8. "SOIE,Synchronization overrun interrupt enable" "0,1"
|
|
hexmask.long.byte 0x28 0.--6. 1. "DMAREQ_ID,DMA request identification"
|
|
line.long 0x2C "C11CR,channel 11 configuration register"
|
|
hexmask.long.byte 0x2C 24.--28. 1. "SYNC_ID,Synchronization identification"
|
|
hexmask.long.byte 0x2C 19.--23. 1. "NBREQ,Number of DMA requests minus 1 to forward"
|
|
bitfld.long 0x2C 17.--18. "SPOL,Synchronization polarity" "0,1,2,3"
|
|
bitfld.long 0x2C 16. "SE,Synchronization enable" "0,1"
|
|
bitfld.long 0x2C 9. "EGE,Event generation enable" "0,1"
|
|
bitfld.long 0x2C 8. "SOIE,Synchronization overrun interrupt enable" "0,1"
|
|
hexmask.long.byte 0x2C 0.--6. 1. "DMAREQ_ID,DMA request identification"
|
|
line.long 0x30 "C12CR,channel 12 configuration register"
|
|
hexmask.long.byte 0x30 24.--28. 1. "SYNC_ID,Synchronization identification"
|
|
hexmask.long.byte 0x30 19.--23. 1. "NBREQ,Number of DMA requests minus 1 to forward"
|
|
bitfld.long 0x30 17.--18. "SPOL,Synchronization polarity" "0,1,2,3"
|
|
bitfld.long 0x30 16. "SE,Synchronization enable" "0,1"
|
|
bitfld.long 0x30 9. "EGE,Event generation enable" "0,1"
|
|
bitfld.long 0x30 8. "SOIE,Synchronization overrun interrupt enable" "0,1"
|
|
hexmask.long.byte 0x30 0.--6. 1. "DMAREQ_ID,DMA request identification"
|
|
line.long 0x34 "C13CR,channel 13 configuration register"
|
|
hexmask.long.byte 0x34 24.--28. 1. "SYNC_ID,Synchronization identification"
|
|
hexmask.long.byte 0x34 19.--23. 1. "NBREQ,Number of DMA requests minus 1 to forward"
|
|
bitfld.long 0x34 17.--18. "SPOL,Synchronization polarity" "0,1,2,3"
|
|
bitfld.long 0x34 16. "SE,Synchronization enable" "0,1"
|
|
bitfld.long 0x34 9. "EGE,Event generation enable" "0,1"
|
|
bitfld.long 0x34 8. "SOIE,Synchronization overrun interrupt enable" "0,1"
|
|
hexmask.long.byte 0x34 0.--6. 1. "DMAREQ_ID,DMA request identification"
|
|
rgroup.long 0x80++0x3
|
|
line.long 0x0 "CSR,channel status register"
|
|
bitfld.long 0x0 13. "SOF13,Synchronization overrun event flag" "0,1"
|
|
bitfld.long 0x0 12. "SOF12,Synchronization overrun event flag" "0,1"
|
|
bitfld.long 0x0 11. "SOF11,Synchronization overrun event flag" "0,1"
|
|
bitfld.long 0x0 10. "SOF10,Synchronization overrun event flag" "0,1"
|
|
bitfld.long 0x0 9. "SOF9,Synchronization overrun event flag" "0,1"
|
|
bitfld.long 0x0 8. "SOF8,Synchronization overrun event flag" "0,1"
|
|
bitfld.long 0x0 7. "SOF7,Synchronization overrun event flag" "0,1"
|
|
bitfld.long 0x0 6. "SOF6,Synchronization overrun event flag" "0,1"
|
|
bitfld.long 0x0 5. "SOF5,Synchronization overrun event flag" "0,1"
|
|
bitfld.long 0x0 4. "SOF4,Synchronization overrun event flag" "0,1"
|
|
bitfld.long 0x0 3. "SOF3,Synchronization overrun event flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "SOF2,Synchronization overrun event flag" "0,1"
|
|
bitfld.long 0x0 1. "SOF1,Synchronization overrun event flag" "0,1"
|
|
bitfld.long 0x0 0. "SOF0,Synchronization overrun event flag" "0,1"
|
|
wgroup.long 0x84++0x3
|
|
line.long 0x0 "CFR,clear flag register"
|
|
bitfld.long 0x0 13. "CSOF13,Clear synchronization overrun event flag" "0,1"
|
|
bitfld.long 0x0 12. "CSOF12,Clear synchronization overrun event flag" "0,1"
|
|
bitfld.long 0x0 11. "CSOF11,Clear synchronization overrun event flag" "0,1"
|
|
bitfld.long 0x0 10. "CSOF10,Clear synchronization overrun event flag" "0,1"
|
|
bitfld.long 0x0 9. "CSOF9,Clear synchronization overrun event flag" "0,1"
|
|
bitfld.long 0x0 8. "CSOF8,Clear synchronization overrun event flag" "0,1"
|
|
bitfld.long 0x0 7. "CSOF7,Clear synchronization overrun event flag" "0,1"
|
|
bitfld.long 0x0 6. "CSOF6,Clear synchronization overrun event flag" "0,1"
|
|
bitfld.long 0x0 5. "CSOF5,Clear synchronization overrun event flag" "0,1"
|
|
bitfld.long 0x0 4. "CSOF4,Clear synchronization overrun event flag" "0,1"
|
|
bitfld.long 0x0 3. "CSOF3,Clear synchronization overrun event flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CSOF2,Clear synchronization overrun event flag" "0,1"
|
|
bitfld.long 0x0 1. "CSOF1,Clear synchronization overrun event flag" "0,1"
|
|
bitfld.long 0x0 0. "CSOF0,Clear synchronization overrun event flag" "0,1"
|
|
group.long 0x100++0xF
|
|
line.long 0x0 "RG0CR,request generator channel 0 configuration register"
|
|
hexmask.long.byte 0x0 19.--23. 1. "GNBREQ,Number of DMA requests to be generated minus 1"
|
|
bitfld.long 0x0 17.--18. "GPOL,DMA request generator trigger polarity" "0,1,2,3"
|
|
bitfld.long 0x0 16. "GE,DMA request generator channel 0 enable" "0,1"
|
|
bitfld.long 0x0 8. "OIE,Trigger overrun interrupt enable" "0,1"
|
|
hexmask.long.byte 0x0 0.--4. 1. "SIG_ID,Signal identification"
|
|
line.long 0x4 "RG1CR,request generator channel 1 configuration register"
|
|
hexmask.long.byte 0x4 19.--23. 1. "GNBREQ,Number of DMA requests to be generated minus 1"
|
|
bitfld.long 0x4 17.--18. "GPOL,DMA request generator trigger polarity" "0,1,2,3"
|
|
bitfld.long 0x4 16. "GE,DMA request generator channel 1 enable" "0,1"
|
|
bitfld.long 0x4 8. "OIE,Trigger overrun interrupt enable" "0,1"
|
|
hexmask.long.byte 0x4 0.--4. 1. "SIG_ID,Signal identification"
|
|
line.long 0x8 "RG2CR,request generator channel 2 configuration register"
|
|
hexmask.long.byte 0x8 19.--23. 1. "GNBREQ,Number of DMA requests to be generated minus 1"
|
|
bitfld.long 0x8 17.--18. "GPOL,DMA request generator trigger polarity" "0,1,2,3"
|
|
bitfld.long 0x8 16. "GE,DMA request generator channel 2 enable" "0,1"
|
|
bitfld.long 0x8 8. "OIE,Trigger overrun interrupt enable" "0,1"
|
|
hexmask.long.byte 0x8 0.--4. 1. "SIG_ID,Signal identification"
|
|
line.long 0xC "RG3CR,request generator channel 3 configuration register"
|
|
hexmask.long.byte 0xC 19.--23. 1. "GNBREQ,Number of DMA requests to be generated minus 1"
|
|
bitfld.long 0xC 17.--18. "GPOL,DMA request generator trigger polarity" "0,1,2,3"
|
|
bitfld.long 0xC 16. "GE,DMA request generator channel 3 enable" "0,1"
|
|
bitfld.long 0xC 8. "OIE,Trigger overrun interrupt enable" "0,1"
|
|
hexmask.long.byte 0xC 0.--4. 1. "SIG_ID,Signal identification"
|
|
rgroup.long 0x140++0x3
|
|
line.long 0x0 "RGSR,request generator interrupt status register"
|
|
bitfld.long 0x0 3. "OF3,Trigger overrun event flag" "0,1"
|
|
bitfld.long 0x0 2. "OF2,Trigger overrun event flag" "0,1"
|
|
bitfld.long 0x0 1. "OF1,Trigger overrun event flag" "0,1"
|
|
bitfld.long 0x0 0. "OF0,Trigger overrun event flag" "0,1"
|
|
wgroup.long 0x144++0x3
|
|
line.long 0x0 "RGCFR,request generator interrupt clear flag register"
|
|
bitfld.long 0x0 3. "COF3,Clear trigger overrun event flag" "0,1"
|
|
bitfld.long 0x0 2. "COF2,Clear trigger overrun event flag" "0,1"
|
|
bitfld.long 0x0 1. "COF1,Clear trigger overrun event flag" "0,1"
|
|
bitfld.long 0x0 0. "COF0,Clear trigger overrun event flag" "0,1"
|
|
tree.end
|
|
sif (cpuis("STM32L4R9*")||cpuis("STM32L4S9*"))
|
|
tree "DSI (DSI Host)"
|
|
base ad:0x40016C00
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "DSI_VR,DSI Host Version Register"
|
|
hexmask.long 0x0 0.--31. 1. "VERSION,Version of the DSI Host"
|
|
group.long 0x4++0x17
|
|
line.long 0x0 "DSI_CR,DSI Host Control Register"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
line.long 0x4 "DSI_CCR,DSI HOST Clock Control"
|
|
hexmask.long.byte 0x4 8.--15. 1. "TOCKDIV,Timeout Clock Division"
|
|
hexmask.long.byte 0x4 0.--7. 1. "TXECKDIV,TX Escape Clock Division"
|
|
line.long 0x8 "DSI_LVCIDR,DSI Host LTDC VCID Register"
|
|
bitfld.long 0x8 0.--1. "VCID,Virtual Channel ID" "0,1,2,3"
|
|
line.long 0xC "DSI_LCOLCR,DSI Host LTDC Color Coding"
|
|
bitfld.long 0xC 8. "LPE,Loosely Packet Enable" "0,1"
|
|
hexmask.long.byte 0xC 0.--3. 1. "COLC,Color Coding"
|
|
line.long 0x10 "DSI_LPCR,DSI Host LTDC Polarity Configuration"
|
|
bitfld.long 0x10 2. "HSP,HSYNC Polarity" "0,1"
|
|
bitfld.long 0x10 1. "VSP,VSYNC Polarity" "0,1"
|
|
bitfld.long 0x10 0. "DEP,Data Enable Polarity" "0,1"
|
|
line.long 0x14 "DSI_LPMCR,DSI Host Low-Power mode Configuration"
|
|
hexmask.long.byte 0x14 16.--23. 1. "LPSIZE,Largest Packet Size"
|
|
hexmask.long.byte 0x14 0.--7. 1. "VLPSIZE,VACT Largest Packet Size"
|
|
group.long 0x2C++0x47
|
|
line.long 0x0 "DSI_PCR,DSI Host Protocol Configuration"
|
|
bitfld.long 0x0 4. "CRCRXE,CRC Reception Enable" "0,1"
|
|
bitfld.long 0x0 3. "ECCRXE,ECC Reception Enable" "0,1"
|
|
bitfld.long 0x0 2. "BTAE,Bus Turn Around Enable" "0,1"
|
|
bitfld.long 0x0 1. "ETRXE,EoTp Reception Enable" "0,1"
|
|
bitfld.long 0x0 0. "ETTXE,EoTp Transmission Enable" "0,1"
|
|
line.long 0x4 "DSI_GVCIDR,DSI Host Generic VCID Register"
|
|
bitfld.long 0x4 0.--1. "VCID,Virtual Channel ID" "0,1,2,3"
|
|
line.long 0x8 "DSI_MCR,DSI Host mode Configuration"
|
|
bitfld.long 0x8 0. "CMDM,Command mode" "0,1"
|
|
line.long 0xC "DSI_VMCR,DSI Host Video mode Configuration"
|
|
bitfld.long 0xC 24. "PGO,Pattern Generator" "0,1"
|
|
bitfld.long 0xC 20. "PGM,Pattern Generator mode" "0,1"
|
|
bitfld.long 0xC 16. "PGE,Pattern Generator Enable" "0,1"
|
|
bitfld.long 0xC 15. "LPCE,Low-Power Command Enable" "0,1"
|
|
bitfld.long 0xC 14. "FBTAAE,Frame Bus-Turn-Around Acknowledge" "0,1"
|
|
bitfld.long 0xC 13. "LPHFPE,Low-Power Horizontal Front-Porch" "0,1"
|
|
bitfld.long 0xC 12. "LPHBPE,Low-Power Horizontal Back-Porch" "0,1"
|
|
newline
|
|
bitfld.long 0xC 11. "LPVAE,Low-Power Vertical Active" "0,1"
|
|
bitfld.long 0xC 10. "LPVFPE,Low-power Vertical Front-porch" "0,1"
|
|
bitfld.long 0xC 9. "LPVBPE,Low-power Vertical Back-Porch" "0,1"
|
|
bitfld.long 0xC 8. "LPVSAE,Low-Power Vertical Sync Active" "0,1"
|
|
bitfld.long 0xC 0.--1. "VMT,Video mode Type" "0,1,2,3"
|
|
line.long 0x10 "DSI_VPCR,DSI Host Video Packet Configuration"
|
|
hexmask.long.word 0x10 0.--13. 1. "VPSIZE,Video Packet Size"
|
|
line.long 0x14 "DSI_VCCR,DSI Host Video Chunks Configuration"
|
|
hexmask.long.word 0x14 0.--12. 1. "NUMC,Number of Chunks"
|
|
line.long 0x18 "DSI_VNPCR,DSI Host Video Null Packet Configuration"
|
|
hexmask.long.word 0x18 0.--12. 1. "NPSIZE,Null Packet Size"
|
|
line.long 0x1C "DSI_VHSACR,DSI Host Video HSA Configuration"
|
|
hexmask.long.word 0x1C 0.--11. 1. "HSA,Horizontal Synchronism Active"
|
|
line.long 0x20 "DSI_VHBPCR,DSI Host Video HBP Configuration"
|
|
hexmask.long.word 0x20 0.--11. 1. "HBP,Horizontal Back-Porch"
|
|
line.long 0x24 "DSI_VLCR,DSI Host Video Line Configuration"
|
|
hexmask.long.word 0x24 0.--14. 1. "HLINE,Horizontal Line duration"
|
|
line.long 0x28 "DSI_VVSACR,DSI Host Video VSA Configuration"
|
|
hexmask.long.word 0x28 0.--9. 1. "VSA,Vertical Synchronism Active"
|
|
line.long 0x2C "DSI_VVBPCR,DSI Host Video VBP Configuration"
|
|
hexmask.long.word 0x2C 0.--9. 1. "VBP,Vertical Back-Porch"
|
|
line.long 0x30 "DSI_VVFPCR,DSI Host Video VFP Configuration"
|
|
hexmask.long.word 0x30 0.--9. 1. "VFP,Vertical Front-Porch"
|
|
line.long 0x34 "DSI_VVACR,DSI Host Video VA Configuration"
|
|
hexmask.long.word 0x34 0.--13. 1. "VA,Vertical Active duration"
|
|
line.long 0x38 "DSI_LCCR,DSI Host LTDC Command Configuration"
|
|
hexmask.long.word 0x38 0.--15. 1. "CMDSIZE,Command Size"
|
|
line.long 0x3C "DSI_CMCR,DSI Host Command mode Configuration"
|
|
bitfld.long 0x3C 24. "MRDPS,Maximum Read Packet Size" "0,1"
|
|
bitfld.long 0x3C 19. "DLWTX,DCS Long Write" "0,1"
|
|
bitfld.long 0x3C 18. "DSR0TX,DCS Short Read Zero parameter" "0,1"
|
|
bitfld.long 0x3C 17. "DSW1TX,DCS Short Read One parameter" "0,1"
|
|
bitfld.long 0x3C 16. "DSW0TX,DCS Short Write Zero parameter" "0,1"
|
|
bitfld.long 0x3C 14. "GLWTX,Generic Long Write" "0,1"
|
|
bitfld.long 0x3C 13. "GSR2TX,Generic Short Read Two parameters" "0,1"
|
|
newline
|
|
bitfld.long 0x3C 12. "GSR1TX,Generic Short Read One parameters" "0,1"
|
|
bitfld.long 0x3C 11. "GSR0TX,Generic Short Read Zero parameters" "0,1"
|
|
bitfld.long 0x3C 10. "GSW2TX,Generic Short Write Two parameters" "0,1"
|
|
bitfld.long 0x3C 9. "GSW1TX,Generic Short Write One parameters" "0,1"
|
|
bitfld.long 0x3C 8. "GSW0TX,Generic Short Write Zero parameters" "0,1"
|
|
bitfld.long 0x3C 1. "ARE,Acknowledge Request Enable" "0,1"
|
|
bitfld.long 0x3C 0. "TEARE,Tearing Effect Acknowledge Request" "0,1"
|
|
line.long 0x40 "DSI_GHCR,DSI Host Generic Header Configuration"
|
|
hexmask.long.byte 0x40 16.--23. 1. "WCMSB,WordCount MSB"
|
|
hexmask.long.byte 0x40 8.--15. 1. "WCLSB,WordCount LSB"
|
|
bitfld.long 0x40 6.--7. "VCID,Channel" "0,1,2,3"
|
|
hexmask.long.byte 0x40 0.--5. 1. "DT,Type"
|
|
line.long 0x44 "DSI_GPDR,DSI Host Generic Payload Data"
|
|
hexmask.long.byte 0x44 24.--31. 1. "DATA4,Payload Byte 4"
|
|
hexmask.long.byte 0x44 16.--23. 1. "DATA3,Payload Byte 3"
|
|
hexmask.long.byte 0x44 8.--15. 1. "DATA2,Payload Byte 2"
|
|
hexmask.long.byte 0x44 0.--7. 1. "DATA1,Payload Byte 1"
|
|
rgroup.long 0x74++0x3
|
|
line.long 0x0 "DSI_GPSR,DSI Host Generic Packet Status"
|
|
bitfld.long 0x0 6. "RCB,Read Command Busy" "0,1"
|
|
bitfld.long 0x0 5. "PRDFF,Payload Read FIFO Full" "0,1"
|
|
bitfld.long 0x0 4. "PRDFE,Payload Read FIFO Empty" "0,1"
|
|
bitfld.long 0x0 3. "PWRFF,Payload Write FIFO Full" "0,1"
|
|
bitfld.long 0x0 2. "PWRFE,Payload Write FIFO Empty" "0,1"
|
|
bitfld.long 0x0 1. "CMDFF,Command FIFO Full" "0,1"
|
|
bitfld.long 0x0 0. "CMDFE,Command FIFO Empty" "0,1"
|
|
group.long 0x78++0x17
|
|
line.long 0x0 "DSI_TCCR0,DSI Host Timeout Counter Configuration"
|
|
hexmask.long.word 0x0 16.--31. 1. "HSTX_TOCNT,High-Speed Transmission Timeout"
|
|
hexmask.long.word 0x0 0.--15. 1. "LPRX_TOCNT,Low-power Reception Timeout"
|
|
line.long 0x4 "DSI_TCCR1,DSI Host Timeout Counter Configuration"
|
|
hexmask.long.word 0x4 0.--15. 1. "HSRD_TOCNT,High-Speed Read Timeout"
|
|
line.long 0x8 "DSI_TCCR2,DSI Host Timeout Counter Configuration"
|
|
hexmask.long.word 0x8 0.--15. 1. "LPRD_TOCNT,Low-Power Read Timeout"
|
|
line.long 0xC "DSI_TCCR3,DSI Host Timeout Counter Configuration"
|
|
bitfld.long 0xC 24. "PM,Presp mode" "0,1"
|
|
hexmask.long.word 0xC 0.--15. 1. "HSWR_TOCNT,High-Speed Write Timeout"
|
|
line.long 0x10 "DSI_TCCR4,DSI Host Timeout Counter Configuration"
|
|
hexmask.long.word 0x10 0.--15. 1. "LSWR_TOCNT,Low-Power Write Timeout"
|
|
line.long 0x14 "DSI_TCCR5,DSI Host Timeout Counter Configuration"
|
|
hexmask.long.word 0x14 0.--15. 1. "BTA_TOCNT,Bus-Turn-Around Timeout"
|
|
group.long 0x94++0x1B
|
|
line.long 0x0 "DSI_CLCR,DSI Host Clock Lane Configuration"
|
|
bitfld.long 0x0 1. "ACR,Automatic Clock lane" "0,1"
|
|
bitfld.long 0x0 0. "DPCC,D-PHY Clock Control" "0,1"
|
|
line.long 0x4 "DSI_CLTCR,DSI Host Clock Lane Timer Configuration"
|
|
hexmask.long.word 0x4 16.--25. 1. "HS2LP_TIME,High-Speed to Low-Power"
|
|
hexmask.long.word 0x4 0.--9. 1. "LP2HS_TIME,Low-Power to High-Speed"
|
|
line.long 0x8 "DSI_DLTRC,DSI Host Data Lane Timer Configuration"
|
|
hexmask.long.byte 0x8 24.--31. 1. "HS2LP_TIME,High-Speed To Low-Power"
|
|
hexmask.long.byte 0x8 16.--23. 1. "LP2HS_TIME,Low-Power To High-Speed"
|
|
hexmask.long.word 0x8 0.--14. 1. "MRD_TIME,Maximum Read Time"
|
|
line.long 0xC "DSI_PCTLR,DSI Host PHY Control Register"
|
|
bitfld.long 0xC 2. "CKE,Clock Enable" "0,1"
|
|
bitfld.long 0xC 1. "DEN,Digital Enable" "0,1"
|
|
line.long 0x10 "DSI_PCONFR,DSI Host PHY Configuration"
|
|
hexmask.long.byte 0x10 8.--15. 1. "SW_TIME,Stop Wait Time"
|
|
bitfld.long 0x10 0.--1. "NL,Number of Lanes" "0,1,2,3"
|
|
line.long 0x14 "DSI_PUCR,DSI Host PHY ULPS Control"
|
|
bitfld.long 0x14 3. "UEDL,ULPS Exit on Data Lane" "0,1"
|
|
bitfld.long 0x14 2. "URDL,ULPS Request on Data Lane" "0,1"
|
|
bitfld.long 0x14 1. "UECL,ULPS Exit on Clock Lane" "0,1"
|
|
bitfld.long 0x14 0. "URCL,ULPS Request on Clock Lane" "0,1"
|
|
line.long 0x18 "DSI_PTTCR,DSI Host PHY TX Triggers Configuration"
|
|
hexmask.long.byte 0x18 0.--3. 1. "TX_TRIG,Transmission Trigger"
|
|
rgroup.long 0xB0++0x3
|
|
line.long 0x0 "DSI_PSR,DSI Host PHY Status Register"
|
|
bitfld.long 0x0 8. "UAN1,ULPS Active Not lane 1" "0,1"
|
|
bitfld.long 0x0 7. "PSS1,PHY Stop State lane 1" "0,1"
|
|
bitfld.long 0x0 6. "RUE0,RX ULPS Escape lane 0" "0,1"
|
|
bitfld.long 0x0 5. "UAN0,ULPS Active Not lane 1" "0,1"
|
|
bitfld.long 0x0 4. "PSS0,PHY Stop State lane 0" "0,1"
|
|
bitfld.long 0x0 3. "UANC,ULPS Active Not Clock lane" "0,1"
|
|
bitfld.long 0x0 2. "PSSC,PHY Stop State Clock lane" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "PD,PHY Direction" "0,1"
|
|
rgroup.long 0xBC++0x7
|
|
line.long 0x0 "DSI_ISR0,DSI Host Interrupt & Status Register"
|
|
bitfld.long 0x0 20. "PE4,PHY Error 4" "0,1"
|
|
bitfld.long 0x0 19. "PE3,PHY Error 3" "0,1"
|
|
bitfld.long 0x0 18. "PE2,PHY Error 2" "0,1"
|
|
bitfld.long 0x0 17. "PE1,PHY Error 1" "0,1"
|
|
bitfld.long 0x0 16. "PE0,PHY Error 0" "0,1"
|
|
bitfld.long 0x0 15. "AE15,Acknowledge Error 15" "0,1"
|
|
bitfld.long 0x0 14. "AE14,Acknowledge Error 14" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "AE13,Acknowledge Error 13" "0,1"
|
|
bitfld.long 0x0 12. "AE12,Acknowledge Error 12" "0,1"
|
|
bitfld.long 0x0 11. "AE11,Acknowledge Error 11" "0,1"
|
|
bitfld.long 0x0 10. "AE10,Acknowledge Error 10" "0,1"
|
|
bitfld.long 0x0 9. "AE9,Acknowledge Error 9" "0,1"
|
|
bitfld.long 0x0 8. "AE8,Acknowledge Error 8" "0,1"
|
|
bitfld.long 0x0 7. "AE7,Acknowledge Error 7" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "AE6,Acknowledge Error 6" "0,1"
|
|
bitfld.long 0x0 5. "AE5,Acknowledge Error 5" "0,1"
|
|
bitfld.long 0x0 4. "AE4,Acknowledge Error 4" "0,1"
|
|
bitfld.long 0x0 3. "AE3,Acknowledge Error 3" "0,1"
|
|
bitfld.long 0x0 2. "AE2,Acknowledge Error 2" "0,1"
|
|
bitfld.long 0x0 1. "AE1,Acknowledge Error 1" "0,1"
|
|
bitfld.long 0x0 0. "AE0,Acknowledge Error 0" "0,1"
|
|
line.long 0x4 "DSI_ISR1,DSI Host Interrupt & Status Register"
|
|
bitfld.long 0x4 12. "GPRXE,Generic Payload Receive" "0,1"
|
|
bitfld.long 0x4 11. "GPRDE,Generic Payload Read Error" "0,1"
|
|
bitfld.long 0x4 10. "GPTXE,Generic Payload Transmit" "0,1"
|
|
bitfld.long 0x4 9. "GPWRE,Generic Payload Write" "0,1"
|
|
bitfld.long 0x4 8. "GCWRE,Generic Command Write" "0,1"
|
|
bitfld.long 0x4 7. "LPWRE,LTDC Payload Write Error" "0,1"
|
|
bitfld.long 0x4 6. "EOTPE,EoTp Error" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "PSE,Packet Size Error" "0,1"
|
|
bitfld.long 0x4 4. "CRCE,CRC Error" "0,1"
|
|
bitfld.long 0x4 3. "ECCME,ECC Multi-bit Error" "0,1"
|
|
bitfld.long 0x4 2. "ECCSE,ECC Single-bit Error" "0,1"
|
|
bitfld.long 0x4 1. "TOLPRX,Timeout Low-Power" "0,1"
|
|
bitfld.long 0x4 0. "TOHSTX,Timeout High-Speed" "0,1"
|
|
group.long 0xC4++0x7
|
|
line.long 0x0 "DSI_IER0,DSI Host Interrupt Enable Register"
|
|
bitfld.long 0x0 20. "PE4IE,PHY Error 4 Interrupt" "0,1"
|
|
bitfld.long 0x0 19. "PE3IE,PHY Error 3 Interrupt" "0,1"
|
|
bitfld.long 0x0 18. "PE2IE,PHY Error 2 Interrupt" "0,1"
|
|
bitfld.long 0x0 17. "PE1IE,PHY Error 1 Interrupt" "0,1"
|
|
bitfld.long 0x0 16. "PE0IE,PHY Error 0 Interrupt" "0,1"
|
|
bitfld.long 0x0 15. "AE15IE,Acknowledge Error 15 Interrupt" "0,1"
|
|
bitfld.long 0x0 14. "AE14IE,Acknowledge Error 14 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "AE13IE,Acknowledge Error 13 Interrupt" "0,1"
|
|
bitfld.long 0x0 12. "AE12IE,Acknowledge Error 12 Interrupt" "0,1"
|
|
bitfld.long 0x0 11. "AE11IE,Acknowledge Error 11 Interrupt" "0,1"
|
|
bitfld.long 0x0 10. "AE10IE,Acknowledge Error 10 Interrupt" "0,1"
|
|
bitfld.long 0x0 9. "AE9IE,Acknowledge Error 9 Interrupt" "0,1"
|
|
bitfld.long 0x0 8. "AE8IE,Acknowledge Error 8 Interrupt" "0,1"
|
|
bitfld.long 0x0 7. "AE7IE,Acknowledge Error 7 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "AE6IE,Acknowledge Error 6 Interrupt" "0,1"
|
|
bitfld.long 0x0 5. "AE5IE,Acknowledge Error 5 Interrupt" "0,1"
|
|
bitfld.long 0x0 4. "AE4IE,Acknowledge Error 4 Interrupt" "0,1"
|
|
bitfld.long 0x0 3. "AE3IE,Acknowledge Error 3 Interrupt" "0,1"
|
|
bitfld.long 0x0 2. "AE2IE,Acknowledge Error 2 Interrupt" "0,1"
|
|
bitfld.long 0x0 1. "AE1IE,Acknowledge Error 1 Interrupt" "0,1"
|
|
bitfld.long 0x0 0. "AE0IE,Acknowledge Error 0 Interrupt" "0,1"
|
|
line.long 0x4 "DSI_IER1,DSI Host Interrupt Enable Register"
|
|
bitfld.long 0x4 12. "GPRXEIE,Generic Payload Receive Error Interrupt" "0,1"
|
|
bitfld.long 0x4 11. "GPRDEIE,Generic Payload Read Error Interrupt" "0,1"
|
|
bitfld.long 0x4 10. "GPTXEIE,Generic Payload Transmit Error Interrupt" "0,1"
|
|
bitfld.long 0x4 9. "GPWREIE,Generic Payload Write Error Interrupt" "0,1"
|
|
bitfld.long 0x4 8. "GCWREIE,Generic Command Write Error Interrupt" "0,1"
|
|
bitfld.long 0x4 7. "LPWREIE,LTDC Payload Write Error Interrupt" "0,1"
|
|
bitfld.long 0x4 6. "EOTPEIE,EoTp Error Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "PSEIE,Packet Size Error Interrupt" "0,1"
|
|
bitfld.long 0x4 4. "CRCEIE,CRC Error Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 3. "ECCMEIE,ECC Multi-bit Error Interrupt" "0,1"
|
|
bitfld.long 0x4 2. "ECCSEIE,ECC Single-bit Error Interrupt" "0,1"
|
|
bitfld.long 0x4 1. "TOLPRXIE,Timeout Low-Power Reception Interrupt" "0,1"
|
|
bitfld.long 0x4 0. "TOHSTXIE,Timeout High-Speed Transmission" "0,1"
|
|
wgroup.long 0xD8++0x7
|
|
line.long 0x0 "DSI_FIR0,DSI Host Force Interrupt Register"
|
|
bitfld.long 0x0 20. "FPE4,Force PHY Error 4" "0,1"
|
|
bitfld.long 0x0 19. "FPE3,Force PHY Error 3" "0,1"
|
|
bitfld.long 0x0 18. "FPE2,Force PHY Error 2" "0,1"
|
|
bitfld.long 0x0 17. "FPE1,Force PHY Error 1" "0,1"
|
|
bitfld.long 0x0 16. "FPE0,Force PHY Error 0" "0,1"
|
|
bitfld.long 0x0 15. "FAE15,Force Acknowledge Error 15" "0,1"
|
|
bitfld.long 0x0 14. "FAE14,Force Acknowledge Error 14" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "FAE13,Force Acknowledge Error 13" "0,1"
|
|
bitfld.long 0x0 12. "FAE12,Force Acknowledge Error 12" "0,1"
|
|
bitfld.long 0x0 11. "FAE11,Force Acknowledge Error 11" "0,1"
|
|
bitfld.long 0x0 10. "FAE10,Force Acknowledge Error 10" "0,1"
|
|
bitfld.long 0x0 9. "FAE9,Force Acknowledge Error 9" "0,1"
|
|
bitfld.long 0x0 8. "FAE8,Force Acknowledge Error 8" "0,1"
|
|
bitfld.long 0x0 7. "FAE7,Force Acknowledge Error 7" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "FAE6,Force Acknowledge Error 6" "0,1"
|
|
bitfld.long 0x0 5. "FAE5,Force Acknowledge Error 5" "0,1"
|
|
bitfld.long 0x0 4. "FAE4,Force Acknowledge Error 4" "0,1"
|
|
bitfld.long 0x0 3. "FAE3,Force Acknowledge Error 3" "0,1"
|
|
bitfld.long 0x0 2. "FAE2,Force Acknowledge Error 2" "0,1"
|
|
bitfld.long 0x0 1. "FAE1,Force Acknowledge Error 1" "0,1"
|
|
bitfld.long 0x0 0. "FAE0,Force Acknowledge Error 0" "0,1"
|
|
line.long 0x4 "DSI_FIR1,DSI Host Force Interrupt Register"
|
|
bitfld.long 0x4 12. "FGPRXE,Force Generic Payload Receive" "0,1"
|
|
bitfld.long 0x4 11. "FGPRDE,Force Generic Payload Read" "0,1"
|
|
bitfld.long 0x4 10. "FGPTXE,Force Generic Payload Transmit" "0,1"
|
|
bitfld.long 0x4 9. "FGPWRE,Force Generic Payload Write" "0,1"
|
|
bitfld.long 0x4 8. "FGCWRE,Force Generic Command Write" "0,1"
|
|
bitfld.long 0x4 7. "FLPWRE,Force LTDC Payload Write" "0,1"
|
|
bitfld.long 0x4 6. "FEOTPE,Force EoTp Error" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "FPSE,Force Packet Size Error" "0,1"
|
|
bitfld.long 0x4 4. "FCRCE,Force CRC Error" "0,1"
|
|
bitfld.long 0x4 3. "FECCME,Force ECC Multi-bit Error" "0,1"
|
|
bitfld.long 0x4 2. "FECCSE,Force ECC Single-bit Error" "0,1"
|
|
bitfld.long 0x4 1. "FTOLPRX,Force Timeout Low-Power" "0,1"
|
|
bitfld.long 0x4 0. "FTOHSTX,Force Timeout High-Speed" "0,1"
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "DSI_VSCR,DSI Host Video Shadow Control"
|
|
bitfld.long 0x0 8. "UR,Update Register" "0,1"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
rgroup.long 0x10C++0x7
|
|
line.long 0x0 "DSI_LCVCIDR,DSI Host LTDC Current VCID"
|
|
bitfld.long 0x0 0.--1. "VCID,Virtual Channel ID" "0,1,2,3"
|
|
line.long 0x4 "DSI_LCCCR,DSI Host LTDC Current Color Coding"
|
|
bitfld.long 0x4 8. "LPE,Loosely Packed Enable" "0,1"
|
|
hexmask.long.byte 0x4 0.--3. 1. "COLC,Color Coding"
|
|
rgroup.long 0x118++0x3
|
|
line.long 0x0 "DSI_LPMCCR,DSI Host Low-Power mode Current"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LPSIZE,Largest Packet Size"
|
|
hexmask.long.byte 0x0 0.--7. 1. "VLPSIZE,VACT Largest Packet Size"
|
|
rgroup.long 0x138++0x2B
|
|
line.long 0x0 "DSI_VMCCR,DSI Host Video mode Current Configuration"
|
|
bitfld.long 0x0 9. "LPCE,Low-Power Command Enable" "0,1"
|
|
bitfld.long 0x0 8. "FBTAAE,Frame BTA Acknowledge" "0,1"
|
|
bitfld.long 0x0 7. "LPHFE,Low-Power Horizontal Front-Porch" "0,1"
|
|
bitfld.long 0x0 6. "LPHBPE,Low-power Horizontal Back-Porch" "0,1"
|
|
bitfld.long 0x0 5. "LPVAE,Low-Power Vertical Active" "0,1"
|
|
bitfld.long 0x0 4. "LPVFPE,Low-power Vertical Front-Porch" "0,1"
|
|
bitfld.long 0x0 3. "LPVBPE,Low-power Vertical Back-Porch" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "LPVSAE,Low-Power Vertical Sync time" "0,1"
|
|
bitfld.long 0x0 0.--1. "VMT,Video mode Type" "0,1,2,3"
|
|
line.long 0x4 "DSI_VPCCR,DSI Host Video Packet Current Configuration"
|
|
hexmask.long.word 0x4 0.--13. 1. "VPSIZE,Video Packet Size"
|
|
line.long 0x8 "DSI_VCCCR,DSI Host Video Chunks Current Configuration"
|
|
hexmask.long.word 0x8 0.--12. 1. "NUMC,Number of Chunks"
|
|
line.long 0xC "DSI_VNPCCR,DSI Host Video Null Packet Current"
|
|
hexmask.long.word 0xC 0.--12. 1. "NPSIZE,Null Packet Size"
|
|
line.long 0x10 "DSI_VHSACCR,DSI Host Video HSA Current Configuration"
|
|
hexmask.long.word 0x10 0.--11. 1. "HSA,Horizontal Synchronism Active"
|
|
line.long 0x14 "DSI_VHBPCCR,DSI Host Video HBP Current Configuration"
|
|
hexmask.long.word 0x14 0.--11. 1. "HBP,Horizontal Back-Porch"
|
|
line.long 0x18 "DSI_VLCCR,DSI Host Video Line Current Configuration"
|
|
hexmask.long.word 0x18 0.--14. 1. "HLINE,Horizontal Line duration"
|
|
line.long 0x1C "DSI_VVSACCR,DSI Host Video VSA Current Configuration"
|
|
hexmask.long.word 0x1C 0.--9. 1. "VSA,Vertical Synchronism Active"
|
|
line.long 0x20 "DSI_VVBPCCR,DSI Host Video VBP Current Configuration"
|
|
hexmask.long.word 0x20 0.--9. 1. "VBP,Vertical Back-Porch"
|
|
line.long 0x24 "DSI_VVFPCCR,DSI Host Video VFP Current Configuration"
|
|
hexmask.long.word 0x24 0.--9. 1. "VFP,Vertical Front-Porch"
|
|
line.long 0x28 "DSI_VVACCR,DSI Host Video VA Current Configuration"
|
|
hexmask.long.word 0x28 0.--13. 1. "VA,Vertical Active duration"
|
|
group.long 0x400++0xB
|
|
line.long 0x0 "DSI_WCFGR,DSI Wrapper Configuration"
|
|
bitfld.long 0x0 7. "VSPOL,VSync Polarity" "0,1"
|
|
bitfld.long 0x0 6. "AR,Automatic Refresh" "0,1"
|
|
bitfld.long 0x0 5. "TEPOL,TE Polarity" "0,1"
|
|
bitfld.long 0x0 4. "TESRC,TE Source" "0,1"
|
|
bitfld.long 0x0 1.--3. "COLMUX,Color Multiplexing" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 0. "DSIM,DSI Mode" "0,1"
|
|
line.long 0x4 "DSI_WCR,DSI Wrapper Control Register"
|
|
bitfld.long 0x4 3. "DSIEN,DSI Enable" "0,1"
|
|
bitfld.long 0x4 2. "LTDCEN,LTDC Enable" "0,1"
|
|
bitfld.long 0x4 1. "SHTDN,Shutdown" "0,1"
|
|
bitfld.long 0x4 0. "COLM,Color Mode" "0,1"
|
|
line.long 0x8 "DSI_WIER,DSI Wrapper Interrupt Enable"
|
|
bitfld.long 0x8 13. "RRIE,Regulator Ready Interrupt" "0,1"
|
|
bitfld.long 0x8 10. "PLLUIE,PLL Unlock Interrupt" "0,1"
|
|
bitfld.long 0x8 9. "PLLLIE,PLL Lock Interrupt Enable" "0,1"
|
|
bitfld.long 0x8 1. "ERIE,End of Refresh Interrupt" "0,1"
|
|
bitfld.long 0x8 0. "TEIE,Tearing Effect Interrupt" "0,1"
|
|
rgroup.long 0x40C++0x3
|
|
line.long 0x0 "DSI_WISR,DSI Wrapper Interrupt & Status"
|
|
bitfld.long 0x0 13. "RRIF,Regulator Ready Interrupt" "0,1"
|
|
bitfld.long 0x0 12. "RRS,Regulator Ready Status" "0,1"
|
|
bitfld.long 0x0 10. "PLLUIF,PLL Unlock Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 9. "PLLLIF,PLL Lock Interrupt Flag" "0,1"
|
|
bitfld.long 0x0 8. "PLLLS,PLL Lock Status" "0,1"
|
|
bitfld.long 0x0 2. "BUSY,Busy Flag" "0,1"
|
|
bitfld.long 0x0 1. "ERIF,End of Refresh Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "TEIF,Tearing Effect Interrupt" "0,1"
|
|
group.long 0x410++0x3
|
|
line.long 0x0 "DSI_WIFCR,DSI Wrapper Interrupt Flag Clear"
|
|
bitfld.long 0x0 13. "CRRIF,Clear Regulator Ready Interrupt" "0,1"
|
|
bitfld.long 0x0 10. "CPLLUIF,Clear PLL Unlock Interrupt" "0,1"
|
|
bitfld.long 0x0 9. "CPLLLIF,Clear PLL Lock Interrupt" "0,1"
|
|
bitfld.long 0x0 1. "CERIF,Clear End of Refresh Interrupt" "0,1"
|
|
bitfld.long 0x0 0. "CTEIF,Clear Tearing Effect Interrupt" "0,1"
|
|
group.long 0x418++0x13
|
|
line.long 0x0 "DSI_WPCR0,DSI Wrapper PHY Configuration Register"
|
|
bitfld.long 0x0 27. "TCLKPOSTEN,custom time for tCLK-POST" "0,1"
|
|
bitfld.long 0x0 26. "TLPXCEN,custom time for tLPX for Clock lane" "0,1"
|
|
bitfld.long 0x0 25. "THSEXITEN,custom time for tHS-EXIT" "0,1"
|
|
bitfld.long 0x0 24. "TLPXDEN,custom time for tLPX for Data lanes" "0,1"
|
|
bitfld.long 0x0 23. "THSZEROEN,custom time for tHS-ZERO" "0,1"
|
|
bitfld.long 0x0 22. "THSTRAILEN,custom time for tHS-TRAIL" "0,1"
|
|
bitfld.long 0x0 21. "THSPREPEN,custom time for tHS-PREPARE" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20. "TCLKZEROEN,custom time for tCLK-ZERO" "0,1"
|
|
bitfld.long 0x0 19. "TCLKPREPEN,custom time for tCLK-PREPARE" "0,1"
|
|
bitfld.long 0x0 18. "PDEN,Pull-Down Enable" "0,1"
|
|
bitfld.long 0x0 16. "TDDL,Turn Disable Data Lanes" "0,1"
|
|
bitfld.long 0x0 14. "CDOFFDL,Contention Detection OFF on Data" "0,1"
|
|
bitfld.long 0x0 13. "FTXSMDL,Force in TX Stop Mode the Data" "0,1"
|
|
bitfld.long 0x0 12. "FTXSMCL,Force in TX Stop Mode the Clock" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "HSIDL1,Invert the High-Speed data signal on" "0,1"
|
|
bitfld.long 0x0 10. "HSIDL0,Invert the Hight-Speed data signal on" "0,1"
|
|
bitfld.long 0x0 9. "HSICL,Invert Hight-Speed data signal on Clock" "0,1"
|
|
bitfld.long 0x0 8. "SWDL1,Swap Data Lane 1 pins" "0,1"
|
|
bitfld.long 0x0 7. "SWDL0,Swap Data Lane 0 pins" "0,1"
|
|
bitfld.long 0x0 6. "SWCL,Swap Clock Lane pins" "0,1"
|
|
hexmask.long.byte 0x0 0.--5. 1. "UIX4,Unit Interval multiplied by"
|
|
line.long 0x4 "DSI_WPCR1,DSI Wrapper PHY Configuration Register"
|
|
bitfld.long 0x4 25.--26. "LPRXFT,Low-Power RX low-pass Filtering" "0,1,2,3"
|
|
bitfld.long 0x4 22. "FLPRXLPM,Forces LP Receiver in Low-Power" "0,1"
|
|
bitfld.long 0x4 18.--19. "HSTXSRCDL,High-Speed Transmission Slew Rate" "0,1,2,3"
|
|
bitfld.long 0x4 16.--17. "HSTXSRCCL,High-Speed Transmission Slew Rate" "0,1,2,3"
|
|
bitfld.long 0x4 12. "SDCC,SDD Control" "0,1"
|
|
bitfld.long 0x4 8.--9. "LPSRDL,Low-Power transmission Slew Rate" "0,1,2,3"
|
|
bitfld.long 0x4 6.--7. "LPSRCL,Low-Power transmission Slew Rate" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 2.--3. "HSTXDLL,High-Speed Transmission Delay on Data" "0,1,2,3"
|
|
bitfld.long 0x4 0.--1. "HSTXDCL,High-Speed Transmission Delay on Clock" "0,1,2,3"
|
|
line.long 0x8 "DSI_WPCR2,DSI Wrapper PHY Configuration Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. "THSTRAIL,tHSTRAIL"
|
|
hexmask.long.byte 0x8 16.--23. 1. "THSPREP,tHS-PREPARE"
|
|
hexmask.long.byte 0x8 8.--15. 1. "TCLKZEO,tCLK-ZERO"
|
|
hexmask.long.byte 0x8 0.--7. 1. "TCLKPREP,tCLK-PREPARE"
|
|
line.long 0xC "DSI_WPCR3,DSI_WPCR3"
|
|
hexmask.long.byte 0xC 24.--31. 1. "TLPXC,tLPXC for Clock lane"
|
|
hexmask.long.byte 0xC 16.--23. 1. "THSEXIT,tHSEXIT"
|
|
hexmask.long.byte 0xC 8.--15. 1. "TLPXD,tLPX for Data lanes"
|
|
hexmask.long.byte 0xC 0.--7. 1. "THSZERO,tHS-ZERO"
|
|
line.long 0x10 "DSI_WPCR4,DSI Wrapper PHY Configuration Register 4"
|
|
hexmask.long.byte 0x10 0.--7. 1. "THSZERO,tCLK-POST"
|
|
group.long 0x430++0x3
|
|
line.long 0x0 "DSI_WRPCR,DSI Wrapper Regulator and PLL Control"
|
|
bitfld.long 0x0 24. "REGEN,Regulator Enable" "0,1"
|
|
bitfld.long 0x0 16.--17. "ODF,PLL Output Division Factor" "0,1,2,3"
|
|
hexmask.long.byte 0x0 11.--14. 1. "IDF,PLL Input Division Factor"
|
|
hexmask.long.byte 0x0 2.--8. 1. "NDIV,PLL Loop Division Factor"
|
|
bitfld.long 0x0 0. "PLLEN,PLL Enable" "0,1"
|
|
tree.end
|
|
endif
|
|
tree "EXTI (Extended Interrupt and Event Controller)"
|
|
base ad:0x40010400
|
|
group.long 0x0++0x17
|
|
line.long 0x0 "IMR1,Interrupt mask register"
|
|
bitfld.long 0x0 31. "MR31,Interrupt Mask on line 31" "0,1"
|
|
bitfld.long 0x0 30. "MR30,Interrupt Mask on line 30" "0,1"
|
|
bitfld.long 0x0 29. "MR29,Interrupt Mask on line 29" "0,1"
|
|
bitfld.long 0x0 28. "MR28,Interrupt Mask on line 28" "0,1"
|
|
bitfld.long 0x0 27. "MR27,Interrupt Mask on line 27" "0,1"
|
|
bitfld.long 0x0 26. "MR26,Interrupt Mask on line 26" "0,1"
|
|
bitfld.long 0x0 25. "MR25,Interrupt Mask on line 25" "0,1"
|
|
bitfld.long 0x0 24. "MR24,Interrupt Mask on line 24" "0,1"
|
|
bitfld.long 0x0 23. "MR23,Interrupt Mask on line 23" "0,1"
|
|
bitfld.long 0x0 22. "MR22,Interrupt Mask on line 22" "0,1"
|
|
bitfld.long 0x0 21. "MR21,Interrupt Mask on line 21" "0,1"
|
|
bitfld.long 0x0 20. "MR20,Interrupt Mask on line 20" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "MR19,Interrupt Mask on line 19" "0,1"
|
|
bitfld.long 0x0 18. "MR18,Interrupt Mask on line 18" "0,1"
|
|
bitfld.long 0x0 17. "MR17,Interrupt Mask on line 17" "0,1"
|
|
bitfld.long 0x0 16. "MR16,Interrupt Mask on line 16" "0,1"
|
|
bitfld.long 0x0 15. "MR15,Interrupt Mask on line 15" "0,1"
|
|
bitfld.long 0x0 14. "MR14,Interrupt Mask on line 14" "0,1"
|
|
bitfld.long 0x0 13. "MR13,Interrupt Mask on line 13" "0,1"
|
|
bitfld.long 0x0 12. "MR12,Interrupt Mask on line 12" "0,1"
|
|
bitfld.long 0x0 11. "MR11,Interrupt Mask on line 11" "0,1"
|
|
bitfld.long 0x0 10. "MR10,Interrupt Mask on line 10" "0,1"
|
|
bitfld.long 0x0 9. "MR9,Interrupt Mask on line 9" "0,1"
|
|
bitfld.long 0x0 8. "MR8,Interrupt Mask on line 8" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "MR7,Interrupt Mask on line 7" "0,1"
|
|
bitfld.long 0x0 6. "MR6,Interrupt Mask on line 6" "0,1"
|
|
bitfld.long 0x0 5. "MR5,Interrupt Mask on line 5" "0,1"
|
|
bitfld.long 0x0 4. "MR4,Interrupt Mask on line 4" "0,1"
|
|
bitfld.long 0x0 3. "MR3,Interrupt Mask on line 3" "0,1"
|
|
bitfld.long 0x0 2. "MR2,Interrupt Mask on line 2" "0,1"
|
|
bitfld.long 0x0 1. "MR1,Interrupt Mask on line 1" "0,1"
|
|
bitfld.long 0x0 0. "MR0,Interrupt Mask on line 0" "0,1"
|
|
line.long 0x4 "EMR1,Event mask register"
|
|
bitfld.long 0x4 31. "MR31,Event Mask on line 31" "0,1"
|
|
bitfld.long 0x4 30. "MR30,Event Mask on line 30" "0,1"
|
|
bitfld.long 0x4 29. "MR29,Event Mask on line 29" "0,1"
|
|
bitfld.long 0x4 28. "MR28,Event Mask on line 28" "0,1"
|
|
bitfld.long 0x4 27. "MR27,Event Mask on line 27" "0,1"
|
|
bitfld.long 0x4 26. "MR26,Event Mask on line 26" "0,1"
|
|
bitfld.long 0x4 25. "MR25,Event Mask on line 25" "0,1"
|
|
bitfld.long 0x4 24. "MR24,Event Mask on line 24" "0,1"
|
|
bitfld.long 0x4 23. "MR23,Event Mask on line 23" "0,1"
|
|
bitfld.long 0x4 22. "MR22,Event Mask on line 22" "0,1"
|
|
bitfld.long 0x4 21. "MR21,Event Mask on line 21" "0,1"
|
|
bitfld.long 0x4 20. "MR20,Event Mask on line 20" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "MR19,Event Mask on line 19" "0,1"
|
|
bitfld.long 0x4 18. "MR18,Event Mask on line 18" "0,1"
|
|
bitfld.long 0x4 17. "MR17,Event Mask on line 17" "0,1"
|
|
bitfld.long 0x4 16. "MR16,Event Mask on line 16" "0,1"
|
|
bitfld.long 0x4 15. "MR15,Event Mask on line 15" "0,1"
|
|
bitfld.long 0x4 14. "MR14,Event Mask on line 14" "0,1"
|
|
bitfld.long 0x4 13. "MR13,Event Mask on line 13" "0,1"
|
|
bitfld.long 0x4 12. "MR12,Event Mask on line 12" "0,1"
|
|
bitfld.long 0x4 11. "MR11,Event Mask on line 11" "0,1"
|
|
bitfld.long 0x4 10. "MR10,Event Mask on line 10" "0,1"
|
|
bitfld.long 0x4 9. "MR9,Event Mask on line 9" "0,1"
|
|
bitfld.long 0x4 8. "MR8,Event Mask on line 8" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "MR7,Event Mask on line 7" "0,1"
|
|
bitfld.long 0x4 6. "MR6,Event Mask on line 6" "0,1"
|
|
bitfld.long 0x4 5. "MR5,Event Mask on line 5" "0,1"
|
|
bitfld.long 0x4 4. "MR4,Event Mask on line 4" "0,1"
|
|
bitfld.long 0x4 3. "MR3,Event Mask on line 3" "0,1"
|
|
bitfld.long 0x4 2. "MR2,Event Mask on line 2" "0,1"
|
|
bitfld.long 0x4 1. "MR1,Event Mask on line 1" "0,1"
|
|
bitfld.long 0x4 0. "MR0,Event Mask on line 0" "0,1"
|
|
line.long 0x8 "RTSR1,Rising Trigger selection"
|
|
bitfld.long 0x8 22. "TR22,Rising trigger event configuration of" "0,1"
|
|
bitfld.long 0x8 21. "TR21,Rising trigger event configuration of" "0,1"
|
|
bitfld.long 0x8 20. "TR20,Rising trigger event configuration of" "0,1"
|
|
bitfld.long 0x8 19. "TR19,Rising trigger event configuration of" "0,1"
|
|
bitfld.long 0x8 18. "TR18,Rising trigger event configuration of" "0,1"
|
|
bitfld.long 0x8 16. "TR16,Rising trigger event configuration of" "0,1"
|
|
bitfld.long 0x8 15. "TR15,Rising trigger event configuration of" "0,1"
|
|
bitfld.long 0x8 14. "TR14,Rising trigger event configuration of" "0,1"
|
|
bitfld.long 0x8 13. "TR13,Rising trigger event configuration of" "0,1"
|
|
bitfld.long 0x8 12. "TR12,Rising trigger event configuration of" "0,1"
|
|
bitfld.long 0x8 11. "TR11,Rising trigger event configuration of" "0,1"
|
|
bitfld.long 0x8 10. "TR10,Rising trigger event configuration of" "0,1"
|
|
newline
|
|
bitfld.long 0x8 9. "TR9,Rising trigger event configuration of" "0,1"
|
|
bitfld.long 0x8 8. "TR8,Rising trigger event configuration of" "0,1"
|
|
bitfld.long 0x8 7. "TR7,Rising trigger event configuration of" "0,1"
|
|
bitfld.long 0x8 6. "TR6,Rising trigger event configuration of" "0,1"
|
|
bitfld.long 0x8 5. "TR5,Rising trigger event configuration of" "0,1"
|
|
bitfld.long 0x8 4. "TR4,Rising trigger event configuration of" "0,1"
|
|
bitfld.long 0x8 3. "TR3,Rising trigger event configuration of" "0,1"
|
|
bitfld.long 0x8 2. "TR2,Rising trigger event configuration of" "0,1"
|
|
bitfld.long 0x8 1. "TR1,Rising trigger event configuration of" "0,1"
|
|
bitfld.long 0x8 0. "TR0,Rising trigger event configuration of" "0,1"
|
|
line.long 0xC "FTSR1,Falling Trigger selection"
|
|
bitfld.long 0xC 22. "TR22,Falling trigger event configuration of" "0,1"
|
|
bitfld.long 0xC 21. "TR21,Falling trigger event configuration of" "0,1"
|
|
bitfld.long 0xC 20. "TR20,Falling trigger event configuration of" "0,1"
|
|
bitfld.long 0xC 19. "TR19,Falling trigger event configuration of" "0,1"
|
|
bitfld.long 0xC 18. "TR18,Falling trigger event configuration of" "0,1"
|
|
bitfld.long 0xC 16. "TR16,Falling trigger event configuration of" "0,1"
|
|
bitfld.long 0xC 15. "TR15,Falling trigger event configuration of" "0,1"
|
|
bitfld.long 0xC 14. "TR14,Falling trigger event configuration of" "0,1"
|
|
bitfld.long 0xC 13. "TR13,Falling trigger event configuration of" "0,1"
|
|
bitfld.long 0xC 12. "TR12,Falling trigger event configuration of" "0,1"
|
|
bitfld.long 0xC 11. "TR11,Falling trigger event configuration of" "0,1"
|
|
bitfld.long 0xC 10. "TR10,Falling trigger event configuration of" "0,1"
|
|
newline
|
|
bitfld.long 0xC 9. "TR9,Falling trigger event configuration of" "0,1"
|
|
bitfld.long 0xC 8. "TR8,Falling trigger event configuration of" "0,1"
|
|
bitfld.long 0xC 7. "TR7,Falling trigger event configuration of" "0,1"
|
|
bitfld.long 0xC 6. "TR6,Falling trigger event configuration of" "0,1"
|
|
bitfld.long 0xC 5. "TR5,Falling trigger event configuration of" "0,1"
|
|
bitfld.long 0xC 4. "TR4,Falling trigger event configuration of" "0,1"
|
|
bitfld.long 0xC 3. "TR3,Falling trigger event configuration of" "0,1"
|
|
bitfld.long 0xC 2. "TR2,Falling trigger event configuration of" "0,1"
|
|
bitfld.long 0xC 1. "TR1,Falling trigger event configuration of" "0,1"
|
|
bitfld.long 0xC 0. "TR0,Falling trigger event configuration of" "0,1"
|
|
line.long 0x10 "SWIER1,Software interrupt event"
|
|
bitfld.long 0x10 22. "SWIER22,Software Interrupt on line" "0,1"
|
|
bitfld.long 0x10 21. "SWIER21,Software Interrupt on line" "0,1"
|
|
bitfld.long 0x10 20. "SWIER20,Software Interrupt on line" "0,1"
|
|
bitfld.long 0x10 19. "SWIER19,Software Interrupt on line" "0,1"
|
|
bitfld.long 0x10 18. "SWIER18,Software Interrupt on line" "0,1"
|
|
bitfld.long 0x10 16. "SWIER16,Software Interrupt on line" "0,1"
|
|
bitfld.long 0x10 15. "SWIER15,Software Interrupt on line" "0,1"
|
|
bitfld.long 0x10 14. "SWIER14,Software Interrupt on line" "0,1"
|
|
bitfld.long 0x10 13. "SWIER13,Software Interrupt on line" "0,1"
|
|
bitfld.long 0x10 12. "SWIER12,Software Interrupt on line" "0,1"
|
|
bitfld.long 0x10 11. "SWIER11,Software Interrupt on line" "0,1"
|
|
bitfld.long 0x10 10. "SWIER10,Software Interrupt on line" "0,1"
|
|
newline
|
|
bitfld.long 0x10 9. "SWIER9,Software Interrupt on line" "0,1"
|
|
bitfld.long 0x10 8. "SWIER8,Software Interrupt on line" "0,1"
|
|
bitfld.long 0x10 7. "SWIER7,Software Interrupt on line" "0,1"
|
|
bitfld.long 0x10 6. "SWIER6,Software Interrupt on line" "0,1"
|
|
bitfld.long 0x10 5. "SWIER5,Software Interrupt on line" "0,1"
|
|
bitfld.long 0x10 4. "SWIER4,Software Interrupt on line" "0,1"
|
|
bitfld.long 0x10 3. "SWIER3,Software Interrupt on line" "0,1"
|
|
bitfld.long 0x10 2. "SWIER2,Software Interrupt on line" "0,1"
|
|
bitfld.long 0x10 1. "SWIER1,Software Interrupt on line" "0,1"
|
|
bitfld.long 0x10 0. "SWIER0,Software Interrupt on line" "0,1"
|
|
line.long 0x14 "PR1,Pending register"
|
|
bitfld.long 0x14 22. "PR22,Pending bit 22" "0,1"
|
|
bitfld.long 0x14 21. "PR21,Pending bit 21" "0,1"
|
|
bitfld.long 0x14 20. "PR20,Pending bit 20" "0,1"
|
|
bitfld.long 0x14 19. "PR19,Pending bit 19" "0,1"
|
|
bitfld.long 0x14 18. "PR18,Pending bit 18" "0,1"
|
|
bitfld.long 0x14 16. "PR16,Pending bit 16" "0,1"
|
|
bitfld.long 0x14 15. "PR15,Pending bit 15" "0,1"
|
|
bitfld.long 0x14 14. "PR14,Pending bit 14" "0,1"
|
|
bitfld.long 0x14 13. "PR13,Pending bit 13" "0,1"
|
|
bitfld.long 0x14 12. "PR12,Pending bit 12" "0,1"
|
|
bitfld.long 0x14 11. "PR11,Pending bit 11" "0,1"
|
|
bitfld.long 0x14 10. "PR10,Pending bit 10" "0,1"
|
|
newline
|
|
bitfld.long 0x14 9. "PR9,Pending bit 9" "0,1"
|
|
bitfld.long 0x14 8. "PR8,Pending bit 8" "0,1"
|
|
bitfld.long 0x14 7. "PR7,Pending bit 7" "0,1"
|
|
bitfld.long 0x14 6. "PR6,Pending bit 6" "0,1"
|
|
bitfld.long 0x14 5. "PR5,Pending bit 5" "0,1"
|
|
bitfld.long 0x14 4. "PR4,Pending bit 4" "0,1"
|
|
bitfld.long 0x14 3. "PR3,Pending bit 3" "0,1"
|
|
bitfld.long 0x14 2. "PR2,Pending bit 2" "0,1"
|
|
bitfld.long 0x14 1. "PR1,Pending bit 1" "0,1"
|
|
bitfld.long 0x14 0. "PR0,Pending bit 0" "0,1"
|
|
group.long 0x20++0x17
|
|
line.long 0x0 "IMR2,Interrupt mask register"
|
|
bitfld.long 0x0 7. "MR39,Interrupt Mask on external/internal line" "0,1"
|
|
bitfld.long 0x0 6. "MR38,Interrupt Mask on external/internal line" "0,1"
|
|
bitfld.long 0x0 5. "MR37,Interrupt Mask on external/internal line" "0,1"
|
|
bitfld.long 0x0 4. "MR36,Interrupt Mask on external/internal line" "0,1"
|
|
bitfld.long 0x0 3. "MR35,Interrupt Mask on external/internal line" "0,1"
|
|
bitfld.long 0x0 2. "MR34,Interrupt Mask on external/internal line" "0,1"
|
|
bitfld.long 0x0 1. "MR33,Interrupt Mask on external/internal line" "0,1"
|
|
bitfld.long 0x0 0. "MR32,Interrupt Mask on external/internal line" "0,1"
|
|
line.long 0x4 "EMR2,Event mask register"
|
|
bitfld.long 0x4 7. "MR39,Event mask on external/internal line" "0,1"
|
|
bitfld.long 0x4 6. "MR38,Event mask on external/internal line" "0,1"
|
|
bitfld.long 0x4 5. "MR37,Event mask on external/internal line" "0,1"
|
|
bitfld.long 0x4 4. "MR36,Event mask on external/internal line" "0,1"
|
|
bitfld.long 0x4 3. "MR35,Event mask on external/internal line" "0,1"
|
|
bitfld.long 0x4 2. "MR34,Event mask on external/internal line" "0,1"
|
|
bitfld.long 0x4 1. "MR33,Event mask on external/internal line" "0,1"
|
|
bitfld.long 0x4 0. "MR32,Event mask on external/internal line" "0,1"
|
|
line.long 0x8 "RTSR2,Rising Trigger selection"
|
|
bitfld.long 0x8 6. "RT38,Rising trigger event configuration bit" "0,1"
|
|
bitfld.long 0x8 5. "RT37,Rising trigger event configuration bit" "0,1"
|
|
bitfld.long 0x8 4. "RT36,Rising trigger event configuration bit" "0,1"
|
|
bitfld.long 0x8 3. "RT35,Rising trigger event configuration bit" "0,1"
|
|
line.long 0xC "FTSR2,Falling Trigger selection"
|
|
bitfld.long 0xC 6. "FT38,Falling trigger event configuration bit" "0,1"
|
|
bitfld.long 0xC 5. "FT37,Falling trigger event configuration bit" "0,1"
|
|
bitfld.long 0xC 4. "FT36,Falling trigger event configuration bit" "0,1"
|
|
bitfld.long 0xC 3. "FT35,Falling trigger event configuration bit" "0,1"
|
|
line.long 0x10 "SWIER2,Software interrupt event"
|
|
bitfld.long 0x10 6. "SWI38,Software interrupt on line" "0,1"
|
|
bitfld.long 0x10 5. "SWI37,Software interrupt on line" "0,1"
|
|
bitfld.long 0x10 4. "SWI36,Software interrupt on line" "0,1"
|
|
bitfld.long 0x10 3. "SWI35,Software interrupt on line" "0,1"
|
|
line.long 0x14 "PR2,Pending register"
|
|
bitfld.long 0x14 6. "PIF38,Pending interrupt flag on line" "0,1"
|
|
bitfld.long 0x14 5. "PIF37,Pending interrupt flag on line" "0,1"
|
|
bitfld.long 0x14 4. "PIF36,Pending interrupt flag on line" "0,1"
|
|
bitfld.long 0x14 3. "PIF35,Pending interrupt flag on line" "0,1"
|
|
tree.end
|
|
tree "FLASH (Embedded Flash Memory)"
|
|
base ad:0x40022000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "ACR,Access control register"
|
|
bitfld.long 0x0 14. "SLEEP_PD,Flash Power-down mode during Low-power" "0,1"
|
|
bitfld.long 0x0 13. "RUN_PD,Flash Power-down mode during Low-power" "0,1"
|
|
bitfld.long 0x0 12. "DCRST,Data cache reset" "0,1"
|
|
bitfld.long 0x0 11. "ICRST,Instruction cache reset" "0,1"
|
|
bitfld.long 0x0 10. "DCEN,Data cache enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "ICEN,Instruction cache enable" "0,1"
|
|
bitfld.long 0x0 8. "PRFTEN,Prefetch enable" "0,1"
|
|
sif (cpuis("STM32L4P5*")||cpuis("STM32L4Q5*"))
|
|
bitfld.long 0x0 0.--2. "LATENCY,Latency" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
sif (cpuis("STM32L4R7*"))
|
|
bitfld.long 0x0 0.--2. "LATENCY,Latency" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
sif (cpuis("STM32L4R9*"))
|
|
bitfld.long 0x0 0.--2. "LATENCY,Latency" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
endif
|
|
sif (cpuis("STM32L4S5*"))
|
|
bitfld.long 0x0 0.--2. "LATENCY,Latency" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
sif (cpuis("STM32L4S7*"))
|
|
bitfld.long 0x0 0.--2. "LATENCY,Latency" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
sif (cpuis("STM32L4S9*"))
|
|
bitfld.long 0x0 0.--2. "LATENCY,Latency" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
sif (cpuis("STM32L4R5*"))
|
|
hexmask.long.byte 0x0 0.--3. 1. "LATENCY,Latency"
|
|
endif
|
|
wgroup.long 0x4++0xB
|
|
line.long 0x0 "PDKEYR,Power down key register"
|
|
hexmask.long 0x0 0.--31. 1. "PDKEYR,RUN_PD in FLASH_ACR key"
|
|
line.long 0x4 "KEYR,Flash key register"
|
|
hexmask.long 0x4 0.--31. 1. "KEYR,KEYR"
|
|
line.long 0x8 "OPTKEYR,Option byte key register"
|
|
hexmask.long 0x8 0.--31. 1. "OPTKEYR,Option byte key"
|
|
group.long 0x10++0xB
|
|
line.long 0x0 "SR,Status register"
|
|
sif (cpuis("STM32L4R5*"))
|
|
bitfld.long 0x0 17. "PEMPTY,Program EMPTY" "0,1"
|
|
endif
|
|
rbitfld.long 0x0 16. "BSY,Busy" "0,1"
|
|
bitfld.long 0x0 15. "OPTVERR,Option validity error" "0,1"
|
|
bitfld.long 0x0 14. "RDERR,PCROP read error" "0,1"
|
|
bitfld.long 0x0 9. "FASTERR,Fast programming error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "MISERR,Fast programming data miss" "0,1"
|
|
bitfld.long 0x0 7. "PGSERR,Programming sequence error" "0,1"
|
|
bitfld.long 0x0 6. "SIZERR,Size error" "0,1"
|
|
bitfld.long 0x0 5. "PGAERR,Programming alignment" "0,1"
|
|
bitfld.long 0x0 4. "WRPERR,Write protected error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "PROGERR,Programming error" "0,1"
|
|
bitfld.long 0x0 1. "OPERR,Operation error" "0,1"
|
|
bitfld.long 0x0 0. "EOP,End of operation" "0,1"
|
|
line.long 0x4 "CR,Flash control register"
|
|
bitfld.long 0x4 31. "LOCK,FLASH_CR Lock" "0,1"
|
|
bitfld.long 0x4 30. "OPTLOCK,Options Lock" "0,1"
|
|
bitfld.long 0x4 27. "OBL_LAUNCH,Force the option byte" "0,1"
|
|
bitfld.long 0x4 26. "RDERRIE,PCROP read error interrupt" "0,1"
|
|
bitfld.long 0x4 25. "ERRIE,Error interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 24. "EOPIE,End of operation interrupt" "0,1"
|
|
bitfld.long 0x4 18. "FSTPG,Fast programming" "0,1"
|
|
bitfld.long 0x4 17. "OPTSTRT,Options modification start" "0,1"
|
|
bitfld.long 0x4 16. "START,Start" "0,1"
|
|
bitfld.long 0x4 15. "MER2,Bank 2 Mass erase" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "BKER,Bank erase" "0,1"
|
|
hexmask.long.byte 0x4 3.--10. 1. "PNB,Page number"
|
|
bitfld.long 0x4 2. "MER1,Bank 1 Mass erase" "0,1"
|
|
bitfld.long 0x4 1. "PER,Page erase" "0,1"
|
|
bitfld.long 0x4 0. "PG,Programming" "0,1"
|
|
line.long 0x8 "ECCR,Flash ECC register"
|
|
bitfld.long 0x8 31. "ECCD,ECC detection" "0,1"
|
|
bitfld.long 0x8 30. "ECCC,ECC correction" "0,1"
|
|
sif (cpuis("STM32L4R5*"))
|
|
bitfld.long 0x8 29. "ECCD2,ECC2 detection" "0,1"
|
|
bitfld.long 0x8 28. "ECCC2,ECC correction" "0,1"
|
|
endif
|
|
bitfld.long 0x8 24. "ECCIE,ECC correction interrupt" "0,1"
|
|
newline
|
|
sif (cpuis("STM32L4R5*"))
|
|
rbitfld.long 0x8 22. "SYSF_ECC,System Flash ECC fail" "0,1"
|
|
rbitfld.long 0x8 21. "BK_ECC,ECC fail bank" "0,1"
|
|
hexmask.long.tbyte 0x8 0.--20. 1. "ADDR_ECC,ECC fail address"
|
|
endif
|
|
sif (cpuis("STM32L4P5*")||cpuis("STM32L4Q5*"))
|
|
rbitfld.long 0x8 20. "SYSF_ECC,System Flash ECC fail" "0,1"
|
|
rbitfld.long 0x8 19. "BK_ECC,ECC fail bank" "0,1"
|
|
newline
|
|
hexmask.long.tbyte 0x8 0.--18. 1. "ADDR_ECC,ECC fail address"
|
|
endif
|
|
sif (cpuis("STM32L4R7*"))
|
|
rbitfld.long 0x8 20. "SYSF_ECC,System Flash ECC fail" "0,1"
|
|
rbitfld.long 0x8 19. "BK_ECC,ECC fail bank" "0,1"
|
|
hexmask.long.tbyte 0x8 0.--18. 1. "ADDR_ECC,ECC fail address"
|
|
endif
|
|
sif (cpuis("STM32L4R9*"))
|
|
rbitfld.long 0x8 20. "SYSF_ECC,System Flash ECC fail" "0,1"
|
|
newline
|
|
rbitfld.long 0x8 19. "BK_ECC,ECC fail bank" "0,1"
|
|
hexmask.long.tbyte 0x8 0.--18. 1. "ADDR_ECC,ECC fail address"
|
|
endif
|
|
sif (cpuis("STM32L4S5*"))
|
|
rbitfld.long 0x8 20. "SYSF_ECC,System Flash ECC fail" "0,1"
|
|
rbitfld.long 0x8 19. "BK_ECC,ECC fail bank" "0,1"
|
|
hexmask.long.tbyte 0x8 0.--18. 1. "ADDR_ECC,ECC fail address"
|
|
newline
|
|
endif
|
|
sif (cpuis("STM32L4S7*"))
|
|
rbitfld.long 0x8 20. "SYSF_ECC,System Flash ECC fail" "0,1"
|
|
rbitfld.long 0x8 19. "BK_ECC,ECC fail bank" "0,1"
|
|
hexmask.long.tbyte 0x8 0.--18. 1. "ADDR_ECC,ECC fail address"
|
|
endif
|
|
sif (cpuis("STM32L4S9*"))
|
|
rbitfld.long 0x8 20. "SYSF_ECC,System Flash ECC fail" "0,1"
|
|
rbitfld.long 0x8 19. "BK_ECC,ECC fail bank" "0,1"
|
|
newline
|
|
hexmask.long.tbyte 0x8 0.--18. 1. "ADDR_ECC,ECC fail address"
|
|
endif
|
|
group.long 0x20++0xF
|
|
line.long 0x0 "OPTR,Flash option register"
|
|
sif (cpuis("STM32L4R5*"))
|
|
bitfld.long 0x0 27. "nBOOT0,nBOOT0 option bit" "0,1"
|
|
bitfld.long 0x0 26. "nSWBOOT0,Software BOOT0" "0,1"
|
|
endif
|
|
bitfld.long 0x0 25. "SRAM2_RST,SRAM2 Erase when system" "0,1"
|
|
bitfld.long 0x0 24. "SRAM2_PE,SRAM2 parity check enable" "0,1"
|
|
bitfld.long 0x0 23. "nBOOT1,Boot configuration" "0,1"
|
|
newline
|
|
sif (cpuis("STM32L4R5*"))
|
|
bitfld.long 0x0 22. "DBANK,DBANK" "0,1"
|
|
bitfld.long 0x0 21. "DB1M,Dual-bank on 1 Mbyte Flash memory devices" "0,1"
|
|
endif
|
|
sif (cpuis("STM32L4P5*")||cpuis("STM32L4Q5*"))
|
|
bitfld.long 0x0 21. "DUALBANK,Dual-Bank on 512 KB or 256 KB Flash" "0,1"
|
|
bitfld.long 0x0 16. "IDWG_SW,Independent watchdog" "0,1"
|
|
endif
|
|
sif (cpuis("STM32L4R7*"))
|
|
bitfld.long 0x0 21. "DUALBANK,Dual-Bank on 512 KB or 256 KB Flash" "0,1"
|
|
newline
|
|
endif
|
|
sif (cpuis("STM32L4R9*"))
|
|
bitfld.long 0x0 21. "DUALBANK,Dual-Bank on 512 KB or 256 KB Flash" "0,1"
|
|
endif
|
|
sif (cpuis("STM32L4S5*"))
|
|
bitfld.long 0x0 21. "DUALBANK,Dual-Bank on 512 KB or 256 KB Flash" "0,1"
|
|
endif
|
|
sif (cpuis("STM32L4S7*"))
|
|
bitfld.long 0x0 21. "DUALBANK,Dual-Bank on 512 KB or 256 KB Flash" "0,1"
|
|
endif
|
|
sif (cpuis("STM32L4S9*"))
|
|
bitfld.long 0x0 21. "DUALBANK,Dual-Bank on 512 KB or 256 KB Flash" "0,1"
|
|
endif
|
|
bitfld.long 0x0 20. "BFB2,Dual-bank boot" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "WWDG_SW,Window watchdog selection" "0,1"
|
|
bitfld.long 0x0 18. "IWDG_STDBY,Independent watchdog counter freeze in" "0,1"
|
|
bitfld.long 0x0 17. "IWDG_STOP,Independent watchdog counter freeze in" "0,1"
|
|
sif (cpuis("STM32L4R5*"))
|
|
bitfld.long 0x0 16. "IWDG_SW,Independent watchdog" "0,1"
|
|
endif
|
|
sif (cpuis("STM32L4R7*"))
|
|
bitfld.long 0x0 16. "IDWG_SW,Independent watchdog" "0,1"
|
|
newline
|
|
endif
|
|
sif (cpuis("STM32L4R9*"))
|
|
bitfld.long 0x0 16. "IDWG_SW,Independent watchdog" "0,1"
|
|
endif
|
|
sif (cpuis("STM32L4S5*"))
|
|
bitfld.long 0x0 16. "IDWG_SW,Independent watchdog" "0,1"
|
|
endif
|
|
sif (cpuis("STM32L4S7*"))
|
|
bitfld.long 0x0 16. "IDWG_SW,Independent watchdog" "0,1"
|
|
endif
|
|
sif (cpuis("STM32L4S9*"))
|
|
bitfld.long 0x0 16. "IDWG_SW,Independent watchdog" "0,1"
|
|
endif
|
|
sif (cpuis("STM32L4R5*"))
|
|
bitfld.long 0x0 14. "nRST_SHDW,nRST_SHDW" "0,1"
|
|
newline
|
|
endif
|
|
bitfld.long 0x0 13. "nRST_STDBY,nRST_STDBY" "0,1"
|
|
bitfld.long 0x0 12. "nRST_STOP,nRST_STOP" "0,1"
|
|
bitfld.long 0x0 8.--10. "BOR_LEV,BOR reset Level" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x0 0.--7. 1. "RDP,Read protection level"
|
|
line.long 0x4 "PCROP1SR,Flash Bank 1 PCROP Start address"
|
|
sif (cpuis("STM32L4P5*")||cpuis("STM32L4Q5*"))
|
|
hexmask.long.word 0x4 0.--15. 1. "PCROP1_STRT,Bank 1 PCROP area start"
|
|
endif
|
|
sif (cpuis("STM32L4R5*"))
|
|
hexmask.long.tbyte 0x4 0.--16. 1. "PCROP1_STRT,Bank 1 PCROP area start"
|
|
endif
|
|
sif (cpuis("STM32L4R7*"))
|
|
hexmask.long.word 0x4 0.--15. 1. "PCROP1_STRT,Bank 1 PCROP area start"
|
|
endif
|
|
sif (cpuis("STM32L4R9*"))
|
|
hexmask.long.word 0x4 0.--15. 1. "PCROP1_STRT,Bank 1 PCROP area start"
|
|
endif
|
|
sif (cpuis("STM32L4S5*"))
|
|
hexmask.long.word 0x4 0.--15. 1. "PCROP1_STRT,Bank 1 PCROP area start"
|
|
newline
|
|
endif
|
|
sif (cpuis("STM32L4S7*"))
|
|
hexmask.long.word 0x4 0.--15. 1. "PCROP1_STRT,Bank 1 PCROP area start"
|
|
endif
|
|
sif (cpuis("STM32L4S9*"))
|
|
hexmask.long.word 0x4 0.--15. 1. "PCROP1_STRT,Bank 1 PCROP area start"
|
|
endif
|
|
line.long 0x8 "PCROP1ER,Flash Bank 1 PCROP End address"
|
|
bitfld.long 0x8 31. "PCROP_RDP,PCROP area preserved when RDP level" "0,1"
|
|
sif (cpuis("STM32L4P5*")||cpuis("STM32L4Q5*"))
|
|
hexmask.long.word 0x8 0.--15. 1. "PCROP1_END,Bank 1 PCROP area end"
|
|
endif
|
|
sif (cpuis("STM32L4R7*"))
|
|
hexmask.long.word 0x8 0.--15. 1. "PCROP1_END,Bank 1 PCROP area end"
|
|
endif
|
|
sif (cpuis("STM32L4R9*"))
|
|
hexmask.long.word 0x8 0.--15. 1. "PCROP1_END,Bank 1 PCROP area end"
|
|
endif
|
|
sif (cpuis("STM32L4S5*"))
|
|
hexmask.long.word 0x8 0.--15. 1. "PCROP1_END,Bank 1 PCROP area end"
|
|
newline
|
|
endif
|
|
sif (cpuis("STM32L4S7*"))
|
|
hexmask.long.word 0x8 0.--15. 1. "PCROP1_END,Bank 1 PCROP area end"
|
|
endif
|
|
sif (cpuis("STM32L4S9*"))
|
|
hexmask.long.word 0x8 0.--15. 1. "PCROP1_END,Bank 1 PCROP area end"
|
|
endif
|
|
sif (cpuis("STM32L4R5*"))
|
|
hexmask.long.tbyte 0x8 0.--16. 1. "PCROP1_END,Bank 1 PCROP area end"
|
|
endif
|
|
line.long 0xC "WRP1AR,Flash Bank 1 WRP area A address"
|
|
hexmask.long.byte 0xC 16.--23. 1. "WRP1A_END,Bank 1 WRP first area A end"
|
|
hexmask.long.byte 0xC 0.--7. 1. "WRP1A_STRT,Bank 1 WRP first area start"
|
|
sif (cpuis("STM32L4P5*")||cpuis("STM32L4Q5*"))
|
|
group.long 0x30++0x3
|
|
line.long 0x0 "WRP1BR,Flash Bank 1 WRP area B address"
|
|
hexmask.long.byte 0x0 16.--23. 1. "WRP1B_END,Bank 1 WRP second area B end"
|
|
hexmask.long.byte 0x0 0.--7. 1. "WRP1B_STRT,Bank 1 WRP second area B start"
|
|
group.long 0x4C++0x3
|
|
line.long 0x0 "WRP2AR,Flash Bank 2 WRP area A address"
|
|
hexmask.long.byte 0x0 16.--23. 1. "WRP2A_END,Bank 2 WRP first area A end"
|
|
hexmask.long.byte 0x0 0.--7. 1. "WRP2A_STRT,Bank 2 WRP first area A start"
|
|
endif
|
|
sif (cpuis("STM32L4R5*"))
|
|
group.long 0x30++0x3
|
|
line.long 0x0 "WRP2AR,Flash WRP2 area A address register"
|
|
hexmask.long.byte 0x0 16.--23. 1. "WRP2A_END,WRP first area A end offset"
|
|
hexmask.long.byte 0x0 0.--7. 1. "WRP2A_STRT,WRP first area A start offset"
|
|
group.long 0x4C++0x3
|
|
line.long 0x0 "WRP1BR,Flash WRP1 area B address register"
|
|
hexmask.long.byte 0x0 16.--23. 1. "WRP1B_END,Bank 2 WRP first area A end"
|
|
hexmask.long.byte 0x0 0.--7. 1. "WRP1B_STRT,Bank 2 WRP first area A start"
|
|
endif
|
|
sif (cpuis("STM32L4R7*"))
|
|
group.long 0x30++0x3
|
|
line.long 0x0 "WRP1BR,Flash Bank 1 WRP area B address"
|
|
hexmask.long.byte 0x0 16.--23. 1. "WRP1B_END,Bank 1 WRP second area B end"
|
|
hexmask.long.byte 0x0 0.--7. 1. "WRP1B_STRT,Bank 1 WRP second area B start"
|
|
group.long 0x4C++0x3
|
|
line.long 0x0 "WRP2AR,Flash Bank 2 WRP area A address"
|
|
hexmask.long.byte 0x0 16.--23. 1. "WRP2A_END,Bank 2 WRP first area A end"
|
|
hexmask.long.byte 0x0 0.--7. 1. "WRP2A_STRT,Bank 2 WRP first area A start"
|
|
endif
|
|
sif (cpuis("STM32L4R9*"))
|
|
group.long 0x30++0x3
|
|
line.long 0x0 "WRP1BR,Flash Bank 1 WRP area B address"
|
|
hexmask.long.byte 0x0 16.--23. 1. "WRP1B_END,Bank 1 WRP second area B end"
|
|
hexmask.long.byte 0x0 0.--7. 1. "WRP1B_STRT,Bank 1 WRP second area B start"
|
|
group.long 0x4C++0x3
|
|
line.long 0x0 "WRP2AR,Flash Bank 2 WRP area A address"
|
|
hexmask.long.byte 0x0 16.--23. 1. "WRP2A_END,Bank 2 WRP first area A end"
|
|
hexmask.long.byte 0x0 0.--7. 1. "WRP2A_STRT,Bank 2 WRP first area A start"
|
|
endif
|
|
sif (cpuis("STM32L4S5*"))
|
|
group.long 0x30++0x3
|
|
line.long 0x0 "WRP1BR,Flash Bank 1 WRP area B address"
|
|
hexmask.long.byte 0x0 16.--23. 1. "WRP1B_END,Bank 1 WRP second area B end"
|
|
hexmask.long.byte 0x0 0.--7. 1. "WRP1B_STRT,Bank 1 WRP second area B start"
|
|
group.long 0x4C++0x3
|
|
line.long 0x0 "WRP2AR,Flash Bank 2 WRP area A address"
|
|
hexmask.long.byte 0x0 16.--23. 1. "WRP2A_END,Bank 2 WRP first area A end"
|
|
hexmask.long.byte 0x0 0.--7. 1. "WRP2A_STRT,Bank 2 WRP first area A start"
|
|
endif
|
|
sif (cpuis("STM32L4S7*"))
|
|
group.long 0x30++0x3
|
|
line.long 0x0 "WRP1BR,Flash Bank 1 WRP area B address"
|
|
hexmask.long.byte 0x0 16.--23. 1. "WRP1B_END,Bank 1 WRP second area B end"
|
|
hexmask.long.byte 0x0 0.--7. 1. "WRP1B_STRT,Bank 1 WRP second area B start"
|
|
group.long 0x4C++0x3
|
|
line.long 0x0 "WRP2AR,Flash Bank 2 WRP area A address"
|
|
hexmask.long.byte 0x0 16.--23. 1. "WRP2A_END,Bank 2 WRP first area A end"
|
|
hexmask.long.byte 0x0 0.--7. 1. "WRP2A_STRT,Bank 2 WRP first area A start"
|
|
endif
|
|
sif (cpuis("STM32L4S9*"))
|
|
group.long 0x30++0x3
|
|
line.long 0x0 "WRP1BR,Flash Bank 1 WRP area B address"
|
|
hexmask.long.byte 0x0 16.--23. 1. "WRP1B_END,Bank 1 WRP second area B end"
|
|
hexmask.long.byte 0x0 0.--7. 1. "WRP1B_STRT,Bank 1 WRP second area B start"
|
|
group.long 0x4C++0x3
|
|
line.long 0x0 "WRP2AR,Flash Bank 2 WRP area A address"
|
|
hexmask.long.byte 0x0 16.--23. 1. "WRP2A_END,Bank 2 WRP first area A end"
|
|
hexmask.long.byte 0x0 0.--7. 1. "WRP2A_STRT,Bank 2 WRP first area A start"
|
|
endif
|
|
group.long 0x44++0x7
|
|
line.long 0x0 "PCROP2SR,Flash Bank 2 PCROP Start address"
|
|
sif (cpuis("STM32L4P5*")||cpuis("STM32L4Q5*"))
|
|
hexmask.long.word 0x0 0.--15. 1. "PCROP2_STRT,Bank 2 PCROP area start"
|
|
endif
|
|
sif (cpuis("STM32L4R5*"))
|
|
hexmask.long.tbyte 0x0 0.--16. 1. "PCROP2_STRT,PCROP area start offset"
|
|
endif
|
|
sif (cpuis("STM32L4R7*"))
|
|
hexmask.long.word 0x0 0.--15. 1. "PCROP2_STRT,Bank 2 PCROP area start"
|
|
endif
|
|
sif (cpuis("STM32L4R9*"))
|
|
hexmask.long.word 0x0 0.--15. 1. "PCROP2_STRT,Bank 2 PCROP area start"
|
|
endif
|
|
sif (cpuis("STM32L4S5*"))
|
|
hexmask.long.word 0x0 0.--15. 1. "PCROP2_STRT,Bank 2 PCROP area start"
|
|
newline
|
|
endif
|
|
sif (cpuis("STM32L4S7*"))
|
|
hexmask.long.word 0x0 0.--15. 1. "PCROP2_STRT,Bank 2 PCROP area start"
|
|
endif
|
|
sif (cpuis("STM32L4S9*"))
|
|
hexmask.long.word 0x0 0.--15. 1. "PCROP2_STRT,Bank 2 PCROP area start"
|
|
endif
|
|
line.long 0x4 "PCROP2ER,Flash Bank 2 PCROP End address"
|
|
sif (cpuis("STM32L4P5*")||cpuis("STM32L4Q5*"))
|
|
hexmask.long.word 0x4 0.--15. 1. "PCROP2_END,Bank 2 PCROP area end"
|
|
endif
|
|
sif (cpuis("STM32L4R5*"))
|
|
hexmask.long.tbyte 0x4 0.--16. 1. "PCROP2_END,Bank 2 PCROP area end"
|
|
endif
|
|
sif (cpuis("STM32L4R7*"))
|
|
hexmask.long.word 0x4 0.--15. 1. "PCROP2_END,Bank 2 PCROP area end"
|
|
endif
|
|
sif (cpuis("STM32L4R9*"))
|
|
hexmask.long.word 0x4 0.--15. 1. "PCROP2_END,Bank 2 PCROP area end"
|
|
endif
|
|
sif (cpuis("STM32L4S5*"))
|
|
hexmask.long.word 0x4 0.--15. 1. "PCROP2_END,Bank 2 PCROP area end"
|
|
newline
|
|
endif
|
|
sif (cpuis("STM32L4S7*"))
|
|
hexmask.long.word 0x4 0.--15. 1. "PCROP2_END,Bank 2 PCROP area end"
|
|
endif
|
|
sif (cpuis("STM32L4S9*"))
|
|
hexmask.long.word 0x4 0.--15. 1. "PCROP2_END,Bank 2 PCROP area end"
|
|
endif
|
|
group.long 0x50++0x3
|
|
line.long 0x0 "WRP2BR,Flash Bank 2 WRP area B address"
|
|
hexmask.long.byte 0x0 16.--23. 1. "WRP2B_END,Bank 2 WRP second area B end"
|
|
hexmask.long.byte 0x0 0.--7. 1. "WRP2B_STRT,Bank 2 WRP second area B start"
|
|
sif (cpuis("STM32L4R5*"))
|
|
group.long 0x130++0x3
|
|
line.long 0x0 "CFGR,Flash configuration register"
|
|
bitfld.long 0x0 0. "LVEN,Low voltage enable" "0,1"
|
|
endif
|
|
tree.end
|
|
tree "FMC (Flexible Static Memory Controller)"
|
|
base ad:0xA0000000
|
|
group.long 0x0++0x1F
|
|
line.long 0x0 "BCR1,SRAM/NOR-Flash chip-select control register"
|
|
bitfld.long 0x0 21. "WFDIS,Write FIFO Disable" "0,1"
|
|
bitfld.long 0x0 20. "CCLKEN,CCLKEN" "0,1"
|
|
bitfld.long 0x0 19. "CBURSTRW,CBURSTRW" "0,1"
|
|
bitfld.long 0x0 15. "ASYNCWAIT,ASYNCWAIT" "0,1"
|
|
bitfld.long 0x0 14. "EXTMOD,EXTMOD" "0,1"
|
|
bitfld.long 0x0 13. "WAITEN,WAITEN" "0,1"
|
|
bitfld.long 0x0 12. "WREN,WREN" "0,1"
|
|
bitfld.long 0x0 11. "WAITCFG,WAITCFG" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "WAITPOL,WAITPOL" "0,1"
|
|
bitfld.long 0x0 8. "BURSTEN,BURSTEN" "0,1"
|
|
bitfld.long 0x0 6. "FACCEN,FACCEN" "0,1"
|
|
bitfld.long 0x0 4.--5. "MWID,MWID" "0,1,2,3"
|
|
bitfld.long 0x0 2.--3. "MTYP,MTYP" "0,1,2,3"
|
|
bitfld.long 0x0 1. "MUXEN,MUXEN" "0,1"
|
|
bitfld.long 0x0 0. "MBKEN,MBKEN" "0,1"
|
|
line.long 0x4 "BTR1,SRAM/NOR-Flash chip-select timing register"
|
|
bitfld.long 0x4 28.--29. "ACCMOD,ACCMOD" "0,1,2,3"
|
|
hexmask.long.byte 0x4 24.--27. 1. "DATLAT,DATLAT"
|
|
hexmask.long.byte 0x4 20.--23. 1. "CLKDIV,CLKDIV"
|
|
hexmask.long.byte 0x4 16.--19. 1. "BUSTURN,BUSTURN"
|
|
hexmask.long.byte 0x4 8.--15. 1. "DATAST,DATAST"
|
|
hexmask.long.byte 0x4 4.--7. 1. "ADDHLD,ADDHLD"
|
|
hexmask.long.byte 0x4 0.--3. 1. "ADDSET,ADDSET"
|
|
line.long 0x8 "BCR2,SRAM/NOR-Flash chip-select control register"
|
|
bitfld.long 0x8 19. "CBURSTRW,CBURSTRW" "0,1"
|
|
bitfld.long 0x8 15. "ASYNCWAIT,ASYNCWAIT" "0,1"
|
|
bitfld.long 0x8 14. "EXTMOD,EXTMOD" "0,1"
|
|
bitfld.long 0x8 13. "WAITEN,WAITEN" "0,1"
|
|
bitfld.long 0x8 12. "WREN,WREN" "0,1"
|
|
bitfld.long 0x8 11. "WAITCFG,WAITCFG" "0,1"
|
|
bitfld.long 0x8 10. "WRAPMOD,WRAPMOD" "0,1"
|
|
bitfld.long 0x8 9. "WAITPOL,WAITPOL" "0,1"
|
|
newline
|
|
bitfld.long 0x8 8. "BURSTEN,BURSTEN" "0,1"
|
|
bitfld.long 0x8 6. "FACCEN,FACCEN" "0,1"
|
|
bitfld.long 0x8 4.--5. "MWID,MWID" "0,1,2,3"
|
|
bitfld.long 0x8 2.--3. "MTYP,MTYP" "0,1,2,3"
|
|
bitfld.long 0x8 1. "MUXEN,MUXEN" "0,1"
|
|
bitfld.long 0x8 0. "MBKEN,MBKEN" "0,1"
|
|
line.long 0xC "BTR2,SRAM/NOR-Flash chip-select timing register"
|
|
bitfld.long 0xC 28.--29. "ACCMOD,ACCMOD" "0,1,2,3"
|
|
hexmask.long.byte 0xC 24.--27. 1. "DATLAT,DATLAT"
|
|
hexmask.long.byte 0xC 20.--23. 1. "CLKDIV,CLKDIV"
|
|
hexmask.long.byte 0xC 16.--19. 1. "BUSTURN,BUSTURN"
|
|
hexmask.long.byte 0xC 8.--15. 1. "DATAST,DATAST"
|
|
hexmask.long.byte 0xC 4.--7. 1. "ADDHLD,ADDHLD"
|
|
hexmask.long.byte 0xC 0.--3. 1. "ADDSET,ADDSET"
|
|
line.long 0x10 "BCR3,SRAM/NOR-Flash chip-select control register"
|
|
bitfld.long 0x10 19. "CBURSTRW,CBURSTRW" "0,1"
|
|
bitfld.long 0x10 15. "ASYNCWAIT,ASYNCWAIT" "0,1"
|
|
bitfld.long 0x10 14. "EXTMOD,EXTMOD" "0,1"
|
|
bitfld.long 0x10 13. "WAITEN,WAITEN" "0,1"
|
|
bitfld.long 0x10 12. "WREN,WREN" "0,1"
|
|
bitfld.long 0x10 11. "WAITCFG,WAITCFG" "0,1"
|
|
bitfld.long 0x10 10. "WRAPMOD,WRAPMOD" "0,1"
|
|
bitfld.long 0x10 9. "WAITPOL,WAITPOL" "0,1"
|
|
newline
|
|
bitfld.long 0x10 8. "BURSTEN,BURSTEN" "0,1"
|
|
bitfld.long 0x10 6. "FACCEN,FACCEN" "0,1"
|
|
bitfld.long 0x10 4.--5. "MWID,MWID" "0,1,2,3"
|
|
bitfld.long 0x10 2.--3. "MTYP,MTYP" "0,1,2,3"
|
|
bitfld.long 0x10 1. "MUXEN,MUXEN" "0,1"
|
|
bitfld.long 0x10 0. "MBKEN,MBKEN" "0,1"
|
|
line.long 0x14 "BTR3,SRAM/NOR-Flash chip-select timing register"
|
|
bitfld.long 0x14 28.--29. "ACCMOD,ACCMOD" "0,1,2,3"
|
|
hexmask.long.byte 0x14 24.--27. 1. "DATLAT,DATLAT"
|
|
hexmask.long.byte 0x14 20.--23. 1. "CLKDIV,CLKDIV"
|
|
hexmask.long.byte 0x14 16.--19. 1. "BUSTURN,BUSTURN"
|
|
hexmask.long.byte 0x14 8.--15. 1. "DATAST,DATAST"
|
|
hexmask.long.byte 0x14 4.--7. 1. "ADDHLD,ADDHLD"
|
|
hexmask.long.byte 0x14 0.--3. 1. "ADDSET,ADDSET"
|
|
line.long 0x18 "BCR4,SRAM/NOR-Flash chip-select control register"
|
|
bitfld.long 0x18 19. "CBURSTRW,CBURSTRW" "0,1"
|
|
bitfld.long 0x18 15. "ASYNCWAIT,ASYNCWAIT" "0,1"
|
|
bitfld.long 0x18 14. "EXTMOD,EXTMOD" "0,1"
|
|
bitfld.long 0x18 13. "WAITEN,WAITEN" "0,1"
|
|
bitfld.long 0x18 12. "WREN,WREN" "0,1"
|
|
bitfld.long 0x18 11. "WAITCFG,WAITCFG" "0,1"
|
|
bitfld.long 0x18 10. "WRAPMOD,WRAPMOD" "0,1"
|
|
bitfld.long 0x18 9. "WAITPOL,WAITPOL" "0,1"
|
|
newline
|
|
bitfld.long 0x18 8. "BURSTEN,BURSTEN" "0,1"
|
|
bitfld.long 0x18 6. "FACCEN,FACCEN" "0,1"
|
|
bitfld.long 0x18 4.--5. "MWID,MWID" "0,1,2,3"
|
|
bitfld.long 0x18 2.--3. "MTYP,MTYP" "0,1,2,3"
|
|
bitfld.long 0x18 1. "MUXEN,MUXEN" "0,1"
|
|
bitfld.long 0x18 0. "MBKEN,MBKEN" "0,1"
|
|
line.long 0x1C "BTR4,SRAM/NOR-Flash chip-select timing register"
|
|
bitfld.long 0x1C 28.--29. "ACCMOD,ACCMOD" "0,1,2,3"
|
|
hexmask.long.byte 0x1C 24.--27. 1. "DATLAT,DATLAT"
|
|
hexmask.long.byte 0x1C 20.--23. 1. "CLKDIV,CLKDIV"
|
|
hexmask.long.byte 0x1C 16.--19. 1. "BUSTURN,BUSTURN"
|
|
hexmask.long.byte 0x1C 8.--15. 1. "DATAST,DATAST"
|
|
hexmask.long.byte 0x1C 4.--7. 1. "ADDHLD,ADDHLD"
|
|
hexmask.long.byte 0x1C 0.--3. 1. "ADDSET,ADDSET"
|
|
group.long 0x80++0xF
|
|
line.long 0x0 "PCR,PC Card/NAND Flash control register"
|
|
bitfld.long 0x0 17.--19. "ECCPS,ECCPS" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x0 13.--16. 1. "TAR,TAR"
|
|
hexmask.long.byte 0x0 9.--12. 1. "TCLR,TCLR"
|
|
bitfld.long 0x0 6. "ECCEN,ECCEN" "0,1"
|
|
bitfld.long 0x0 4.--5. "PWID,PWID" "0,1,2,3"
|
|
bitfld.long 0x0 3. "PTYP,PTYP" "0,1"
|
|
bitfld.long 0x0 2. "PBKEN,PBKEN" "0,1"
|
|
bitfld.long 0x0 1. "PWAITEN,PWAITEN" "0,1"
|
|
line.long 0x4 "SR,FIFO status and interrupt register"
|
|
rbitfld.long 0x4 6. "FEMPT,FEMPT" "0,1"
|
|
bitfld.long 0x4 5. "IFEN,IFEN" "0,1"
|
|
bitfld.long 0x4 4. "ILEN,ILEN" "0,1"
|
|
bitfld.long 0x4 3. "IREN,IREN" "0,1"
|
|
bitfld.long 0x4 2. "IFS,IFS" "0,1"
|
|
bitfld.long 0x4 1. "ILS,ILS" "0,1"
|
|
bitfld.long 0x4 0. "IRS,IRS" "0,1"
|
|
line.long 0x8 "PMEM,Common memory space timing register"
|
|
hexmask.long.byte 0x8 24.--31. 1. "MEMHIZx,MEMHIZx"
|
|
hexmask.long.byte 0x8 16.--23. 1. "MEMHOLDx,MEMHOLDx"
|
|
hexmask.long.byte 0x8 8.--15. 1. "MEMWAITx,MEMWAITx"
|
|
hexmask.long.byte 0x8 0.--7. 1. "MEMSETx,MEMSETx"
|
|
line.long 0xC "PATT,Attribute memory space timing register"
|
|
hexmask.long.byte 0xC 24.--31. 1. "ATTHIZx,ATTHIZx"
|
|
hexmask.long.byte 0xC 16.--23. 1. "ATTHOLDx,ATTHOLDx"
|
|
hexmask.long.byte 0xC 8.--15. 1. "ATTWAITx,ATTWAITx"
|
|
hexmask.long.byte 0xC 0.--7. 1. "ATTSETx,ATTSETx"
|
|
rgroup.long 0x94++0x3
|
|
line.long 0x0 "ECCR,ECC result register 3"
|
|
hexmask.long 0x0 0.--31. 1. "ECCx,ECCx"
|
|
group.long 0x104++0x3
|
|
line.long 0x0 "BWTR1,SRAM/NOR-Flash write timing registers"
|
|
bitfld.long 0x0 28.--29. "ACCMOD,ACCMOD" "0,1,2,3"
|
|
hexmask.long.byte 0x0 24.--27. 1. "DATLAT,DATLAT"
|
|
hexmask.long.byte 0x0 20.--23. 1. "CLKDIV,CLKDIV"
|
|
hexmask.long.byte 0x0 8.--15. 1. "DATAST,DATAST"
|
|
hexmask.long.byte 0x0 4.--7. 1. "ADDHLD,ADDHLD"
|
|
hexmask.long.byte 0x0 0.--3. 1. "ADDSET,ADDSET"
|
|
group.long 0x10C++0x3
|
|
line.long 0x0 "BWTR2,SRAM/NOR-Flash write timing registers"
|
|
bitfld.long 0x0 28.--29. "ACCMOD,ACCMOD" "0,1,2,3"
|
|
hexmask.long.byte 0x0 24.--27. 1. "DATLAT,DATLAT"
|
|
hexmask.long.byte 0x0 20.--23. 1. "CLKDIV,CLKDIV"
|
|
hexmask.long.byte 0x0 8.--15. 1. "DATAST,DATAST"
|
|
hexmask.long.byte 0x0 4.--7. 1. "ADDHLD,ADDHLD"
|
|
hexmask.long.byte 0x0 0.--3. 1. "ADDSET,ADDSET"
|
|
group.long 0x114++0x3
|
|
line.long 0x0 "BWTR3,SRAM/NOR-Flash write timing registers"
|
|
bitfld.long 0x0 28.--29. "ACCMOD,ACCMOD" "0,1,2,3"
|
|
hexmask.long.byte 0x0 24.--27. 1. "DATLAT,DATLAT"
|
|
hexmask.long.byte 0x0 20.--23. 1. "CLKDIV,CLKDIV"
|
|
hexmask.long.byte 0x0 8.--15. 1. "DATAST,DATAST"
|
|
hexmask.long.byte 0x0 4.--7. 1. "ADDHLD,ADDHLD"
|
|
hexmask.long.byte 0x0 0.--3. 1. "ADDSET,ADDSET"
|
|
group.long 0x11C++0x3
|
|
line.long 0x0 "BWTR4,SRAM/NOR-Flash write timing registers"
|
|
bitfld.long 0x0 28.--29. "ACCMOD,ACCMOD" "0,1,2,3"
|
|
hexmask.long.byte 0x0 24.--27. 1. "DATLAT,DATLAT"
|
|
hexmask.long.byte 0x0 20.--23. 1. "CLKDIV,CLKDIV"
|
|
hexmask.long.byte 0x0 8.--15. 1. "DATAST,DATAST"
|
|
hexmask.long.byte 0x0 4.--7. 1. "ADDHLD,ADDHLD"
|
|
hexmask.long.byte 0x0 0.--3. 1. "ADDSET,ADDSET"
|
|
tree.end
|
|
tree "FPU (Floating Point Unit)"
|
|
base ad:0x0
|
|
tree "FPU"
|
|
base ad:0xE000EF34
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "FPCCR,Floating-point context control"
|
|
bitfld.long 0x0 31. "ASPEN,ASPEN" "0,1"
|
|
bitfld.long 0x0 30. "LSPEN,LSPEN" "0,1"
|
|
bitfld.long 0x0 8. "MONRDY,MONRDY" "0,1"
|
|
bitfld.long 0x0 6. "BFRDY,BFRDY" "0,1"
|
|
bitfld.long 0x0 5. "MMRDY,MMRDY" "0,1"
|
|
bitfld.long 0x0 4. "HFRDY,HFRDY" "0,1"
|
|
bitfld.long 0x0 3. "THREAD,THREAD" "0,1"
|
|
bitfld.long 0x0 1. "USER,USER" "0,1"
|
|
bitfld.long 0x0 0. "LSPACT,LSPACT" "0,1"
|
|
line.long 0x4 "FPCAR,Floating-point context address"
|
|
hexmask.long 0x4 3.--31. 1. "ADDRESS,Location of unpopulated"
|
|
line.long 0x8 "FPSCR,Floating-point status control"
|
|
bitfld.long 0x8 31. "N,Negative condition code" "0,1"
|
|
bitfld.long 0x8 30. "Z,Zero condition code flag" "0,1"
|
|
bitfld.long 0x8 29. "C,Carry condition code flag" "0,1"
|
|
bitfld.long 0x8 28. "V,Overflow condition code" "0,1"
|
|
bitfld.long 0x8 26. "AHP,Alternative half-precision control" "0,1"
|
|
bitfld.long 0x8 25. "DN,Default NaN mode control" "0,1"
|
|
bitfld.long 0x8 24. "FZ,Flush-to-zero mode control" "0,1"
|
|
bitfld.long 0x8 22.--23. "RMode,Rounding Mode control" "0,1,2,3"
|
|
bitfld.long 0x8 7. "IDC,Input denormal cumulative exception" "0,1"
|
|
bitfld.long 0x8 4. "IXC,Inexact cumulative exception" "0,1"
|
|
bitfld.long 0x8 3. "UFC,Underflow cumulative exception" "0,1"
|
|
newline
|
|
bitfld.long 0x8 2. "OFC,Overflow cumulative exception" "0,1"
|
|
bitfld.long 0x8 1. "DZC,Division by zero cumulative exception" "0,1"
|
|
bitfld.long 0x8 0. "IOC,Invalid operation cumulative exception" "0,1"
|
|
tree.end
|
|
tree "FPU_CPACR"
|
|
base ad:0xE000ED88
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CPACR,Coprocessor access control"
|
|
hexmask.long.byte 0x0 20.--23. 1. "CP,CP"
|
|
tree.end
|
|
tree.end
|
|
tree "FW (Firewall)"
|
|
base ad:0x40011C00
|
|
group.long 0x0++0x17
|
|
line.long 0x0 "CSSA,Code segment start address"
|
|
hexmask.long.word 0x0 8.--23. 1. "ADD,code segment start address"
|
|
line.long 0x4 "CSL,Code segment length"
|
|
hexmask.long.word 0x4 8.--21. 1. "LENG,code segment length"
|
|
line.long 0x8 "NVDSSA,Non-volatile data segment start"
|
|
hexmask.long.word 0x8 8.--23. 1. "ADD,Non-volatile data segment start"
|
|
line.long 0xC "NVDSL,Non-volatile data segment"
|
|
hexmask.long.word 0xC 8.--21. 1. "LENG,Non-volatile data segment"
|
|
line.long 0x10 "VDSSA,Volatile data segment start"
|
|
hexmask.long.word 0x10 6.--15. 1. "ADD,Volatile data segment start"
|
|
line.long 0x14 "VDSL,Volatile data segment length"
|
|
hexmask.long.word 0x14 6.--15. 1. "LENG,Non-volatile data segment"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "CR,Configuration register"
|
|
bitfld.long 0x0 2. "VDE,Volatile data execution" "0,1"
|
|
bitfld.long 0x0 1. "VDS,Volatile data shared" "0,1"
|
|
bitfld.long 0x0 0. "FPA,Firewall pre alarm" "0,1"
|
|
tree.end
|
|
sif (cpuis("STM32L4R5*")||cpuis("STM32L4R7*")||cpuis("STM32L4R9*")||cpuis("STM32L4S5*")||cpuis("STM32L4S7*")||cpuis("STM32L4S9*"))
|
|
tree "GFXMMU (Chrom-GRC)"
|
|
base ad:0x4002C000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CR,Graphic MMU configuration"
|
|
bitfld.long 0x0 6. "BM192,192 Block mode" "0,1"
|
|
bitfld.long 0x0 4. "AMEIE,AHB master error interrupt" "0,1"
|
|
bitfld.long 0x0 3. "B3OIE,Buffer 3 overflow interrupt" "0,1"
|
|
bitfld.long 0x0 2. "B2OIE,Buffer 2 overflow interrupt" "0,1"
|
|
bitfld.long 0x0 1. "B1OIE,Buffer 1 overflow interrupt" "0,1"
|
|
bitfld.long 0x0 0. "B0OIE,Buffer 0 overflow interrupt" "0,1"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "SR,Graphic MMU status register"
|
|
bitfld.long 0x0 4. "AMEF,AHB master error flag" "0,1"
|
|
bitfld.long 0x0 3. "B3OF,Buffer 3 overflow flag" "0,1"
|
|
bitfld.long 0x0 2. "B2OF,Buffer 2 overflow flag" "0,1"
|
|
bitfld.long 0x0 1. "B1OF,Buffer 1 overflow flag" "0,1"
|
|
bitfld.long 0x0 0. "B0OF,Buffer 0 overflow flag" "0,1"
|
|
wgroup.long 0x8++0x3
|
|
line.long 0x0 "FCR,Graphic MMU flag clear"
|
|
bitfld.long 0x0 4. "CAMEF,Clear AHB master error" "0,1"
|
|
bitfld.long 0x0 3. "CB3OF,Clear buffer 3 overflow" "0,1"
|
|
bitfld.long 0x0 2. "CB2OF,Clear buffer 2 overflow" "0,1"
|
|
bitfld.long 0x0 1. "CB1OF,Clear buffer 1 overflow" "0,1"
|
|
bitfld.long 0x0 0. "CB0OF,Clear buffer 0 overflow" "0,1"
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "DVR,Graphic MMU default value"
|
|
hexmask.long 0x0 0.--31. 1. "DV,Default value"
|
|
group.long 0x20++0xF
|
|
line.long 0x0 "B0CR,Graphic MMU buffer 0 configuration"
|
|
hexmask.long.word 0x0 23.--31. 1. "PBBA,Physical buffer base"
|
|
hexmask.long.tbyte 0x0 4.--22. 1. "PBO,Physical buffer offset"
|
|
line.long 0x4 "B1CR,Graphic MMU buffer 1 configuration"
|
|
hexmask.long.word 0x4 23.--31. 1. "PBBA,Physical buffer base"
|
|
hexmask.long.tbyte 0x4 4.--22. 1. "PBO,Physical buffer offset"
|
|
line.long 0x8 "B2CR,Graphic MMU buffer 2 configuration"
|
|
hexmask.long.word 0x8 23.--31. 1. "PBBA,Physical buffer base"
|
|
hexmask.long.tbyte 0x8 4.--22. 1. "PBO,Physical buffer offset"
|
|
line.long 0xC "B3CR,Graphic MMU buffer 3 configuration"
|
|
hexmask.long.word 0xC 23.--31. 1. "PBBA,Physical buffer base"
|
|
hexmask.long.tbyte 0xC 4.--22. 1. "PBO,Physical buffer offset"
|
|
rgroup.long 0xFF4++0xB
|
|
line.long 0x0 "VERR,Graphic MMU version register"
|
|
hexmask.long.byte 0x0 4.--7. 1. "MAJREV,Major revision"
|
|
hexmask.long.byte 0x0 0.--3. 1. "MINREV,Minor revision"
|
|
line.long 0x4 "IPIDR,Graphic MMU identification"
|
|
hexmask.long 0x4 0.--31. 1. "ID,Identification Code"
|
|
line.long 0x8 "SIDR,Graphic MMU size identification"
|
|
hexmask.long 0x8 0.--31. 1. "SID,Size and ID"
|
|
group.long 0x1000++0x3
|
|
line.long 0x0 "LUT0L,Graphic MMU LUT entry 0 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1008++0x3
|
|
line.long 0x0 "LUT1L,Graphic MMU LUT entry 1 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1010++0x3
|
|
line.long 0x0 "LUT2L,Graphic MMU LUT entry 2 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1018++0x3
|
|
line.long 0x0 "LUT3L,Graphic MMU LUT entry 3 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1020++0x3
|
|
line.long 0x0 "LUT4L,Graphic MMU LUT entry 4 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1028++0x3
|
|
line.long 0x0 "LUT5L,Graphic MMU LUT entry 5 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1030++0x3
|
|
line.long 0x0 "LUT6L,Graphic MMU LUT entry 6 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1038++0x3
|
|
line.long 0x0 "LUT7L,Graphic MMU LUT entry 7 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1040++0x3
|
|
line.long 0x0 "LUT8L,Graphic MMU LUT entry 8 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1048++0x3
|
|
line.long 0x0 "LUT9L,Graphic MMU LUT entry 9 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1050++0x3
|
|
line.long 0x0 "LUT10L,Graphic MMU LUT entry 10 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1058++0x3
|
|
line.long 0x0 "LUT11L,Graphic MMU LUT entry 11 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1060++0x3
|
|
line.long 0x0 "LUT12L,Graphic MMU LUT entry 12 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1068++0x3
|
|
line.long 0x0 "LUT13L,Graphic MMU LUT entry 13 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1070++0x3
|
|
line.long 0x0 "LUT14L,Graphic MMU LUT entry 14 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1078++0x3
|
|
line.long 0x0 "LUT15L,Graphic MMU LUT entry 15 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1080++0x3
|
|
line.long 0x0 "LUT16L,Graphic MMU LUT entry 16 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1088++0x3
|
|
line.long 0x0 "LUT17L,Graphic MMU LUT entry 17 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1090++0x3
|
|
line.long 0x0 "LUT18L,Graphic MMU LUT entry 18 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1098++0x3
|
|
line.long 0x0 "LUT19L,Graphic MMU LUT entry 19 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x10A0++0x3
|
|
line.long 0x0 "LUT20L,Graphic MMU LUT entry 20 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x10A8++0x3
|
|
line.long 0x0 "LUT21L,Graphic MMU LUT entry 21 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x10B0++0x3
|
|
line.long 0x0 "LUT22L,Graphic MMU LUT entry 22 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x10B8++0x3
|
|
line.long 0x0 "LUT23L,Graphic MMU LUT entry 23 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x10C0++0x3
|
|
line.long 0x0 "LUT24L,Graphic MMU LUT entry 24 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x10C8++0x3
|
|
line.long 0x0 "LUT25L,Graphic MMU LUT entry 25 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x10D0++0x3
|
|
line.long 0x0 "LUT26L,Graphic MMU LUT entry 26 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x10D8++0x3
|
|
line.long 0x0 "LUT27L,Graphic MMU LUT entry 27 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x10E0++0x3
|
|
line.long 0x0 "LUT28L,Graphic MMU LUT entry 28 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x10E8++0x3
|
|
line.long 0x0 "LUT29L,Graphic MMU LUT entry 29 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x10F0++0x3
|
|
line.long 0x0 "LUT30L,Graphic MMU LUT entry 30 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x10F8++0x3
|
|
line.long 0x0 "LUT31L,Graphic MMU LUT entry 31 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1100++0x3
|
|
line.long 0x0 "LUT32L,Graphic MMU LUT entry 32 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1108++0x3
|
|
line.long 0x0 "LUT33L,Graphic MMU LUT entry 33 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1110++0x3
|
|
line.long 0x0 "LUT34L,Graphic MMU LUT entry 34 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1118++0x3
|
|
line.long 0x0 "LUT35L,Graphic MMU LUT entry 35 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1120++0x3
|
|
line.long 0x0 "LUT36L,Graphic MMU LUT entry 36 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1128++0x3
|
|
line.long 0x0 "LUT37L,Graphic MMU LUT entry 37 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1130++0x3
|
|
line.long 0x0 "LUT38L,Graphic MMU LUT entry 38 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1138++0x3
|
|
line.long 0x0 "LUT39L,Graphic MMU LUT entry 39 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1140++0x3
|
|
line.long 0x0 "LUT40L,Graphic MMU LUT entry 40 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1148++0x3
|
|
line.long 0x0 "LUT41L,Graphic MMU LUT entry 41 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1150++0x3
|
|
line.long 0x0 "LUT42L,Graphic MMU LUT entry 42 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1158++0x3
|
|
line.long 0x0 "LUT43L,Graphic MMU LUT entry 43 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1160++0x3
|
|
line.long 0x0 "LUT44L,Graphic MMU LUT entry 44 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1168++0x3
|
|
line.long 0x0 "LUT45L,Graphic MMU LUT entry 45 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1170++0x3
|
|
line.long 0x0 "LUT46L,Graphic MMU LUT entry 46 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1178++0x3
|
|
line.long 0x0 "LUT47L,Graphic MMU LUT entry 47 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1180++0x3
|
|
line.long 0x0 "LUT48L,Graphic MMU LUT entry 48 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1188++0x3
|
|
line.long 0x0 "LUT49L,Graphic MMU LUT entry 49 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1190++0x3
|
|
line.long 0x0 "LUT50L,Graphic MMU LUT entry 50 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1198++0x3
|
|
line.long 0x0 "LUT51L,Graphic MMU LUT entry 51 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x11A0++0x3
|
|
line.long 0x0 "LUT52L,Graphic MMU LUT entry 52 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x11A8++0x3
|
|
line.long 0x0 "LUT53L,Graphic MMU LUT entry 53 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x11B0++0x3
|
|
line.long 0x0 "LUT54L,Graphic MMU LUT entry 54 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x11B8++0x3
|
|
line.long 0x0 "LUT55L,Graphic MMU LUT entry 55 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x11C0++0x3
|
|
line.long 0x0 "LUT56L,Graphic MMU LUT entry 56 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x11C8++0x3
|
|
line.long 0x0 "LUT57L,Graphic MMU LUT entry 57 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x11D0++0x3
|
|
line.long 0x0 "LUT58L,Graphic MMU LUT entry 58 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x11D8++0x3
|
|
line.long 0x0 "LUT59L,Graphic MMU LUT entry 59 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x11E0++0x3
|
|
line.long 0x0 "LUT60L,Graphic MMU LUT entry 60 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x11E8++0x3
|
|
line.long 0x0 "LUT61L,Graphic MMU LUT entry 61 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x11F0++0x3
|
|
line.long 0x0 "LUT62L,Graphic MMU LUT entry 62 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x11F8++0x3
|
|
line.long 0x0 "LUT63L,Graphic MMU LUT entry 63 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1200++0x3
|
|
line.long 0x0 "LUT64L,Graphic MMU LUT entry 64 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1208++0x3
|
|
line.long 0x0 "LUT65L,Graphic MMU LUT entry 65 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1210++0x3
|
|
line.long 0x0 "LUT66L,Graphic MMU LUT entry 66 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1218++0x3
|
|
line.long 0x0 "LUT67L,Graphic MMU LUT entry 67 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1220++0x3
|
|
line.long 0x0 "LUT68L,Graphic MMU LUT entry 68 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1228++0x3
|
|
line.long 0x0 "LUT69L,Graphic MMU LUT entry 69 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1230++0x3
|
|
line.long 0x0 "LUT70L,Graphic MMU LUT entry 70 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1238++0x3
|
|
line.long 0x0 "LUT71L,Graphic MMU LUT entry 71 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1240++0x3
|
|
line.long 0x0 "LUT72L,Graphic MMU LUT entry 72 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1248++0x3
|
|
line.long 0x0 "LUT73L,Graphic MMU LUT entry 73 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1250++0x3
|
|
line.long 0x0 "LUT74L,Graphic MMU LUT entry 74 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1258++0x3
|
|
line.long 0x0 "LUT75L,Graphic MMU LUT entry 75 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1260++0x3
|
|
line.long 0x0 "LUT76L,Graphic MMU LUT entry 76 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1268++0x3
|
|
line.long 0x0 "LUT77L,Graphic MMU LUT entry 77 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1270++0x3
|
|
line.long 0x0 "LUT78L,Graphic MMU LUT entry 78 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1278++0x3
|
|
line.long 0x0 "LUT79L,Graphic MMU LUT entry 79 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1280++0x3
|
|
line.long 0x0 "LUT80L,Graphic MMU LUT entry 80 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1288++0x3
|
|
line.long 0x0 "LUT81L,Graphic MMU LUT entry 81 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1290++0x3
|
|
line.long 0x0 "LUT82L,Graphic MMU LUT entry 82 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1298++0x3
|
|
line.long 0x0 "LUT83L,Graphic MMU LUT entry 83 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x12A0++0x3
|
|
line.long 0x0 "LUT84L,Graphic MMU LUT entry 84 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x12A8++0x3
|
|
line.long 0x0 "LUT85L,Graphic MMU LUT entry 85 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x12B0++0x3
|
|
line.long 0x0 "LUT86L,Graphic MMU LUT entry 86 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x12B8++0x3
|
|
line.long 0x0 "LUT87L,Graphic MMU LUT entry 87 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x12C0++0x3
|
|
line.long 0x0 "LUT88L,Graphic MMU LUT entry 88 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x12C8++0x3
|
|
line.long 0x0 "LUT89L,Graphic MMU LUT entry 89 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x12D0++0x3
|
|
line.long 0x0 "LUT90L,Graphic MMU LUT entry 90 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x12D8++0x3
|
|
line.long 0x0 "LUT91L,Graphic MMU LUT entry 91 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x12E0++0x3
|
|
line.long 0x0 "LUT92L,Graphic MMU LUT entry 92 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x12E8++0x3
|
|
line.long 0x0 "LUT93L,Graphic MMU LUT entry 93 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x12F0++0x3
|
|
line.long 0x0 "LUT94L,Graphic MMU LUT entry 94 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x12F8++0x3
|
|
line.long 0x0 "LUT95L,Graphic MMU LUT entry 95 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1300++0x3
|
|
line.long 0x0 "LUT96L,Graphic MMU LUT entry 96 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1308++0x3
|
|
line.long 0x0 "LUT97L,Graphic MMU LUT entry 97 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1310++0x3
|
|
line.long 0x0 "LUT98L,Graphic MMU LUT entry 98 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1318++0x3
|
|
line.long 0x0 "LUT99L,Graphic MMU LUT entry 99 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1320++0x3
|
|
line.long 0x0 "LUT100L,Graphic MMU LUT entry 100 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1328++0x3
|
|
line.long 0x0 "LUT101L,Graphic MMU LUT entry 101 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1330++0x3
|
|
line.long 0x0 "LUT102L,Graphic MMU LUT entry 102 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1338++0x3
|
|
line.long 0x0 "LUT103L,Graphic MMU LUT entry 103 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1340++0x3
|
|
line.long 0x0 "LUT104L,Graphic MMU LUT entry 104 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1348++0x3
|
|
line.long 0x0 "LUT105L,Graphic MMU LUT entry 105 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1350++0x3
|
|
line.long 0x0 "LUT106L,Graphic MMU LUT entry 106 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1358++0x3
|
|
line.long 0x0 "LUT107L,Graphic MMU LUT entry 107 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1360++0x3
|
|
line.long 0x0 "LUT108L,Graphic MMU LUT entry 108 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1368++0x3
|
|
line.long 0x0 "LUT109L,Graphic MMU LUT entry 109 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1370++0x3
|
|
line.long 0x0 "LUT110L,Graphic MMU LUT entry 110 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1378++0x3
|
|
line.long 0x0 "LUT111L,Graphic MMU LUT entry 111 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1380++0x3
|
|
line.long 0x0 "LUT112L,Graphic MMU LUT entry 112 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1388++0x3
|
|
line.long 0x0 "LUT113L,Graphic MMU LUT entry 113 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1390++0x3
|
|
line.long 0x0 "LUT114L,Graphic MMU LUT entry 114 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1398++0x3
|
|
line.long 0x0 "LUT115L,Graphic MMU LUT entry 115 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x13A0++0x3
|
|
line.long 0x0 "LUT116L,Graphic MMU LUT entry 116 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x13A8++0x3
|
|
line.long 0x0 "LUT117L,Graphic MMU LUT entry 117 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x13B0++0x3
|
|
line.long 0x0 "LUT118L,Graphic MMU LUT entry 118 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x13B8++0x3
|
|
line.long 0x0 "LUT119L,Graphic MMU LUT entry 119 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x13C0++0x3
|
|
line.long 0x0 "LUT120L,Graphic MMU LUT entry 120 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x13C8++0x3
|
|
line.long 0x0 "LUT121L,Graphic MMU LUT entry 121 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x13D0++0x3
|
|
line.long 0x0 "LUT122L,Graphic MMU LUT entry 122 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x13D8++0x3
|
|
line.long 0x0 "LUT123L,Graphic MMU LUT entry 123 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x13E0++0x3
|
|
line.long 0x0 "LUT124L,Graphic MMU LUT entry 124 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x13E8++0x3
|
|
line.long 0x0 "LUT125L,Graphic MMU LUT entry 125 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x13F0++0x3
|
|
line.long 0x0 "LUT126L,Graphic MMU LUT entry 126 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x13F8++0x3
|
|
line.long 0x0 "LUT127L,Graphic MMU LUT entry 127 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1400++0x3
|
|
line.long 0x0 "LUT128L,Graphic MMU LUT entry 128 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1408++0x3
|
|
line.long 0x0 "LUT129L,Graphic MMU LUT entry 129 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1410++0x3
|
|
line.long 0x0 "LUT130L,Graphic MMU LUT entry 130 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1418++0x3
|
|
line.long 0x0 "LUT131L,Graphic MMU LUT entry 131 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1420++0x3
|
|
line.long 0x0 "LUT132L,Graphic MMU LUT entry 132 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1428++0x3
|
|
line.long 0x0 "LUT133L,Graphic MMU LUT entry 133 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1430++0x3
|
|
line.long 0x0 "LUT134L,Graphic MMU LUT entry 134 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1438++0x3
|
|
line.long 0x0 "LUT135L,Graphic MMU LUT entry 135 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1440++0x3
|
|
line.long 0x0 "LUT136L,Graphic MMU LUT entry 136 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1448++0x3
|
|
line.long 0x0 "LUT137L,Graphic MMU LUT entry 137 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1450++0x3
|
|
line.long 0x0 "LUT138L,Graphic MMU LUT entry 138 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1458++0x3
|
|
line.long 0x0 "LUT139L,Graphic MMU LUT entry 139 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1460++0x3
|
|
line.long 0x0 "LUT140L,Graphic MMU LUT entry 140 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1468++0x3
|
|
line.long 0x0 "LUT141L,Graphic MMU LUT entry 141 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1470++0x3
|
|
line.long 0x0 "LUT142L,Graphic MMU LUT entry 142 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1478++0x3
|
|
line.long 0x0 "LUT143L,Graphic MMU LUT entry 143 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1480++0x3
|
|
line.long 0x0 "LUT144L,Graphic MMU LUT entry 144 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1488++0x3
|
|
line.long 0x0 "LUT145L,Graphic MMU LUT entry 145 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1490++0x3
|
|
line.long 0x0 "LUT146L,Graphic MMU LUT entry 146 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1498++0x3
|
|
line.long 0x0 "LUT147L,Graphic MMU LUT entry 147 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x14A0++0x3
|
|
line.long 0x0 "LUT148L,Graphic MMU LUT entry 148 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x14A8++0x3
|
|
line.long 0x0 "LUT149L,Graphic MMU LUT entry 149 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x14B0++0x3
|
|
line.long 0x0 "LUT150L,Graphic MMU LUT entry 150 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x14B8++0x3
|
|
line.long 0x0 "LUT151L,Graphic MMU LUT entry 151 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x14C0++0x3
|
|
line.long 0x0 "LUT152L,Graphic MMU LUT entry 152 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x14C8++0x3
|
|
line.long 0x0 "LUT153L,Graphic MMU LUT entry 153 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x14D0++0x3
|
|
line.long 0x0 "LUT154L,Graphic MMU LUT entry 154 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x14D8++0x3
|
|
line.long 0x0 "LUT155L,Graphic MMU LUT entry 155 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x14E0++0x3
|
|
line.long 0x0 "LUT156L,Graphic MMU LUT entry 156 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x14E8++0x3
|
|
line.long 0x0 "LUT157L,Graphic MMU LUT entry 157 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x14F0++0x3
|
|
line.long 0x0 "LUT158L,Graphic MMU LUT entry 158 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x14F8++0x3
|
|
line.long 0x0 "LUT159L,Graphic MMU LUT entry 159 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1500++0x3
|
|
line.long 0x0 "LUT160L,Graphic MMU LUT entry 160 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1508++0x3
|
|
line.long 0x0 "LUT161L,Graphic MMU LUT entry 161 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1510++0x3
|
|
line.long 0x0 "LUT162L,Graphic MMU LUT entry 162 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1518++0x3
|
|
line.long 0x0 "LUT163L,Graphic MMU LUT entry 163 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1520++0x3
|
|
line.long 0x0 "LUT164L,Graphic MMU LUT entry 164 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1528++0x3
|
|
line.long 0x0 "LUT165L,Graphic MMU LUT entry 165 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1530++0x3
|
|
line.long 0x0 "LUT166L,Graphic MMU LUT entry 166 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1538++0x3
|
|
line.long 0x0 "LUT167L,Graphic MMU LUT entry 167 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1540++0x3
|
|
line.long 0x0 "LUT168L,Graphic MMU LUT entry 168 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1548++0x3
|
|
line.long 0x0 "LUT169L,Graphic MMU LUT entry 169 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1550++0x3
|
|
line.long 0x0 "LUT170L,Graphic MMU LUT entry 170 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1558++0x3
|
|
line.long 0x0 "LUT171L,Graphic MMU LUT entry 171 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1560++0x3
|
|
line.long 0x0 "LUT172L,Graphic MMU LUT entry 172 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1568++0x3
|
|
line.long 0x0 "LUT173L,Graphic MMU LUT entry 173 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1570++0x3
|
|
line.long 0x0 "LUT174L,Graphic MMU LUT entry 174 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1578++0x3
|
|
line.long 0x0 "LUT175L,Graphic MMU LUT entry 175 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1580++0x3
|
|
line.long 0x0 "LUT176L,Graphic MMU LUT entry 176 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1588++0x3
|
|
line.long 0x0 "LUT177L,Graphic MMU LUT entry 177 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1590++0x3
|
|
line.long 0x0 "LUT178L,Graphic MMU LUT entry 178 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1598++0x3
|
|
line.long 0x0 "LUT179L,Graphic MMU LUT entry 179 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x15A0++0x3
|
|
line.long 0x0 "LUT180L,Graphic MMU LUT entry 180 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x15A8++0x3
|
|
line.long 0x0 "LUT181L,Graphic MMU LUT entry 181 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x15B0++0x3
|
|
line.long 0x0 "LUT182L,Graphic MMU LUT entry 182 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x15B8++0x3
|
|
line.long 0x0 "LUT183L,Graphic MMU LUT entry 183 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x15C0++0x3
|
|
line.long 0x0 "LUT184L,Graphic MMU LUT entry 184 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x15C8++0x3
|
|
line.long 0x0 "LUT185L,Graphic MMU LUT entry 185 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x15D0++0x3
|
|
line.long 0x0 "LUT186L,Graphic MMU LUT entry 186 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x15D8++0x3
|
|
line.long 0x0 "LUT187L,Graphic MMU LUT entry 187 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x15E0++0x3
|
|
line.long 0x0 "LUT188L,Graphic MMU LUT entry 188 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x15E8++0x3
|
|
line.long 0x0 "LUT189L,Graphic MMU LUT entry 189 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x15F0++0x3
|
|
line.long 0x0 "LUT190L,Graphic MMU LUT entry 190 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x15F8++0x3
|
|
line.long 0x0 "LUT191L,Graphic MMU LUT entry 191 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1600++0x3
|
|
line.long 0x0 "LUT192L,Graphic MMU LUT entry 192 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1608++0x3
|
|
line.long 0x0 "LUT193L,Graphic MMU LUT entry 193 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1610++0x3
|
|
line.long 0x0 "LUT194L,Graphic MMU LUT entry 194 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1618++0x3
|
|
line.long 0x0 "LUT195L,Graphic MMU LUT entry 195 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1620++0x3
|
|
line.long 0x0 "LUT196L,Graphic MMU LUT entry 196 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1628++0x3
|
|
line.long 0x0 "LUT197L,Graphic MMU LUT entry 197 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1630++0x3
|
|
line.long 0x0 "LUT198L,Graphic MMU LUT entry 198 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1638++0x3
|
|
line.long 0x0 "LUT199L,Graphic MMU LUT entry 199 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1640++0x3
|
|
line.long 0x0 "LUT200L,Graphic MMU LUT entry 200 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1648++0x3
|
|
line.long 0x0 "LUT201L,Graphic MMU LUT entry 201 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1650++0x3
|
|
line.long 0x0 "LUT202L,Graphic MMU LUT entry 202 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1658++0x3
|
|
line.long 0x0 "LUT203L,Graphic MMU LUT entry 203 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1660++0x3
|
|
line.long 0x0 "LUT204L,Graphic MMU LUT entry 204 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1668++0x3
|
|
line.long 0x0 "LUT205L,Graphic MMU LUT entry 205 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1670++0x3
|
|
line.long 0x0 "LUT206L,Graphic MMU LUT entry 206 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1678++0x3
|
|
line.long 0x0 "LUT207L,Graphic MMU LUT entry 207 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1680++0x3
|
|
line.long 0x0 "LUT208L,Graphic MMU LUT entry 208 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1688++0x3
|
|
line.long 0x0 "LUT209L,Graphic MMU LUT entry 209 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1690++0x3
|
|
line.long 0x0 "LUT210L,Graphic MMU LUT entry 210 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1698++0x3
|
|
line.long 0x0 "LUT211L,Graphic MMU LUT entry 211 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x16A0++0x3
|
|
line.long 0x0 "LUT212L,Graphic MMU LUT entry 212 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x16A8++0x3
|
|
line.long 0x0 "LUT213L,Graphic MMU LUT entry 213 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x16B0++0x3
|
|
line.long 0x0 "LUT214L,Graphic MMU LUT entry 214 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x16B8++0x3
|
|
line.long 0x0 "LUT215L,Graphic MMU LUT entry 215 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x16C0++0x3
|
|
line.long 0x0 "LUT216L,Graphic MMU LUT entry 216 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x16C8++0x3
|
|
line.long 0x0 "LUT217L,Graphic MMU LUT entry 217 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x16D0++0x3
|
|
line.long 0x0 "LUT218L,Graphic MMU LUT entry 218 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x16D8++0x3
|
|
line.long 0x0 "LUT219L,Graphic MMU LUT entry 219 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x16E0++0x3
|
|
line.long 0x0 "LUT220L,Graphic MMU LUT entry 220 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x16E8++0x3
|
|
line.long 0x0 "LUT221L,Graphic MMU LUT entry 221 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x16F0++0x3
|
|
line.long 0x0 "LUT222L,Graphic MMU LUT entry 222 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x16F8++0x3
|
|
line.long 0x0 "LUT223L,Graphic MMU LUT entry 223 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1700++0x3
|
|
line.long 0x0 "LUT224L,Graphic MMU LUT entry 224 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1708++0x3
|
|
line.long 0x0 "LUT225L,Graphic MMU LUT entry 225 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1710++0x3
|
|
line.long 0x0 "LUT226L,Graphic MMU LUT entry 226 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1718++0x3
|
|
line.long 0x0 "LUT227L,Graphic MMU LUT entry 227 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1720++0x3
|
|
line.long 0x0 "LUT228L,Graphic MMU LUT entry 228 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1728++0x3
|
|
line.long 0x0 "LUT229L,Graphic MMU LUT entry 229 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1730++0x3
|
|
line.long 0x0 "LUT230L,Graphic MMU LUT entry 230 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1738++0x3
|
|
line.long 0x0 "LUT231L,Graphic MMU LUT entry 231 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1740++0x3
|
|
line.long 0x0 "LUT232L,Graphic MMU LUT entry 232 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1748++0x3
|
|
line.long 0x0 "LUT233L,Graphic MMU LUT entry 233 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1750++0x3
|
|
line.long 0x0 "LUT234L,Graphic MMU LUT entry 234 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1758++0x3
|
|
line.long 0x0 "LUT235L,Graphic MMU LUT entry 235 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1760++0x3
|
|
line.long 0x0 "LUT236L,Graphic MMU LUT entry 236 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1768++0x3
|
|
line.long 0x0 "LUT237L,Graphic MMU LUT entry 237 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1770++0x3
|
|
line.long 0x0 "LUT238L,Graphic MMU LUT entry 238 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1778++0x3
|
|
line.long 0x0 "LUT239L,Graphic MMU LUT entry 239 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1780++0x3
|
|
line.long 0x0 "LUT240L,Graphic MMU LUT entry 240 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1788++0x3
|
|
line.long 0x0 "LUT241L,Graphic MMU LUT entry 241 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1790++0x3
|
|
line.long 0x0 "LUT242L,Graphic MMU LUT entry 242 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1798++0x3
|
|
line.long 0x0 "LUT243L,Graphic MMU LUT entry 243 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x17A0++0x3
|
|
line.long 0x0 "LUT244L,Graphic MMU LUT entry 244 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x17A8++0x3
|
|
line.long 0x0 "LUT245L,Graphic MMU LUT entry 245 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x17B0++0x3
|
|
line.long 0x0 "LUT246L,Graphic MMU LUT entry 246 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x17B8++0x3
|
|
line.long 0x0 "LUT247L,Graphic MMU LUT entry 247 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x17C0++0x3
|
|
line.long 0x0 "LUT248L,Graphic MMU LUT entry 248 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x17C8++0x3
|
|
line.long 0x0 "LUT249L,Graphic MMU LUT entry 249 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x17D0++0x3
|
|
line.long 0x0 "LUT250L,Graphic MMU LUT entry 250 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x17D8++0x3
|
|
line.long 0x0 "LUT251L,Graphic MMU LUT entry 251 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x17E0++0x3
|
|
line.long 0x0 "LUT252L,Graphic MMU LUT entry 252 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x17E8++0x3
|
|
line.long 0x0 "LUT253L,Graphic MMU LUT entry 253 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x17F0++0x3
|
|
line.long 0x0 "LUT254L,Graphic MMU LUT entry 254 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x17F8++0x3
|
|
line.long 0x0 "LUT255L,Graphic MMU LUT entry 255 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1800++0x3
|
|
line.long 0x0 "LUT256L,Graphic MMU LUT entry 256 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1808++0x3
|
|
line.long 0x0 "LUT257L,Graphic MMU LUT entry 257 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1810++0x3
|
|
line.long 0x0 "LUT258L,Graphic MMU LUT entry 258 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1818++0x3
|
|
line.long 0x0 "LUT259L,Graphic MMU LUT entry 259 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1820++0x3
|
|
line.long 0x0 "LUT260L,Graphic MMU LUT entry 260 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1828++0x3
|
|
line.long 0x0 "LUT261L,Graphic MMU LUT entry 261 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1830++0x3
|
|
line.long 0x0 "LUT262L,Graphic MMU LUT entry 262 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1838++0x3
|
|
line.long 0x0 "LUT263L,Graphic MMU LUT entry 263 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1840++0x3
|
|
line.long 0x0 "LUT264L,Graphic MMU LUT entry 264 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1848++0x3
|
|
line.long 0x0 "LUT265L,Graphic MMU LUT entry 265 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1850++0x3
|
|
line.long 0x0 "LUT266L,Graphic MMU LUT entry 266 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1858++0x3
|
|
line.long 0x0 "LUT267L,Graphic MMU LUT entry 267 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1860++0x3
|
|
line.long 0x0 "LUT268L,Graphic MMU LUT entry 268 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1868++0x3
|
|
line.long 0x0 "LUT269L,Graphic MMU LUT entry 269 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1870++0x3
|
|
line.long 0x0 "LUT270L,Graphic MMU LUT entry 270 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1878++0x3
|
|
line.long 0x0 "LUT271L,Graphic MMU LUT entry 271 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1880++0x3
|
|
line.long 0x0 "LUT272L,Graphic MMU LUT entry 272 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1888++0x3
|
|
line.long 0x0 "LUT273L,Graphic MMU LUT entry 273 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1890++0x3
|
|
line.long 0x0 "LUT274L,Graphic MMU LUT entry 274 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1898++0x3
|
|
line.long 0x0 "LUT275L,Graphic MMU LUT entry 275 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x18A0++0x3
|
|
line.long 0x0 "LUT276L,Graphic MMU LUT entry 276 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x18A8++0x3
|
|
line.long 0x0 "LUT277L,Graphic MMU LUT entry 277 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x18B0++0x3
|
|
line.long 0x0 "LUT278L,Graphic MMU LUT entry 278 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x18B8++0x3
|
|
line.long 0x0 "LUT279L,Graphic MMU LUT entry 279 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x18C0++0x3
|
|
line.long 0x0 "LUT280L,Graphic MMU LUT entry 280 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x18C8++0x3
|
|
line.long 0x0 "LUT281L,Graphic MMU LUT entry 281 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x18D0++0x3
|
|
line.long 0x0 "LUT282L,Graphic MMU LUT entry 282 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x18D8++0x3
|
|
line.long 0x0 "LUT283L,Graphic MMU LUT entry 283 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x18E0++0x3
|
|
line.long 0x0 "LUT284L,Graphic MMU LUT entry 284 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x18E8++0x3
|
|
line.long 0x0 "LUT285L,Graphic MMU LUT entry 285 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x18F0++0x3
|
|
line.long 0x0 "LUT286L,Graphic MMU LUT entry 286 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x18F8++0x3
|
|
line.long 0x0 "LUT287L,Graphic MMU LUT entry 287 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1900++0x3
|
|
line.long 0x0 "LUT288L,Graphic MMU LUT entry 288 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1908++0x3
|
|
line.long 0x0 "LUT289L,Graphic MMU LUT entry 289 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1910++0x3
|
|
line.long 0x0 "LUT290L,Graphic MMU LUT entry 290 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1918++0x3
|
|
line.long 0x0 "LUT291L,Graphic MMU LUT entry 291 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1920++0x3
|
|
line.long 0x0 "LUT292L,Graphic MMU LUT entry 292 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1928++0x3
|
|
line.long 0x0 "LUT293L,Graphic MMU LUT entry 293 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1930++0x3
|
|
line.long 0x0 "LUT294L,Graphic MMU LUT entry 294 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1938++0x3
|
|
line.long 0x0 "LUT295L,Graphic MMU LUT entry 295 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1940++0x3
|
|
line.long 0x0 "LUT296L,Graphic MMU LUT entry 296 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1948++0x3
|
|
line.long 0x0 "LUT297L,Graphic MMU LUT entry 297 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1950++0x3
|
|
line.long 0x0 "LUT298L,Graphic MMU LUT entry 298 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1958++0x3
|
|
line.long 0x0 "LUT299L,Graphic MMU LUT entry 299 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1960++0x3
|
|
line.long 0x0 "LUT300L,Graphic MMU LUT entry 300 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1968++0x3
|
|
line.long 0x0 "LUT301L,Graphic MMU LUT entry 301 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1970++0x3
|
|
line.long 0x0 "LUT302L,Graphic MMU LUT entry 302 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1978++0x3
|
|
line.long 0x0 "LUT303L,Graphic MMU LUT entry 303 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1980++0x3
|
|
line.long 0x0 "LUT304L,Graphic MMU LUT entry 304 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1988++0x3
|
|
line.long 0x0 "LUT305L,Graphic MMU LUT entry 305 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1990++0x3
|
|
line.long 0x0 "LUT306L,Graphic MMU LUT entry 306 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1998++0x3
|
|
line.long 0x0 "LUT307L,Graphic MMU LUT entry 307 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x19A0++0x3
|
|
line.long 0x0 "LUT308L,Graphic MMU LUT entry 308 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x19A8++0x3
|
|
line.long 0x0 "LUT309L,Graphic MMU LUT entry 309 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x19B0++0x3
|
|
line.long 0x0 "LUT310L,Graphic MMU LUT entry 310 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x19B8++0x3
|
|
line.long 0x0 "LUT311L,Graphic MMU LUT entry 311 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x19C0++0x3
|
|
line.long 0x0 "LUT312L,Graphic MMU LUT entry 312 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x19C8++0x3
|
|
line.long 0x0 "LUT313L,Graphic MMU LUT entry 313 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x19D0++0x3
|
|
line.long 0x0 "LUT314L,Graphic MMU LUT entry 314 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x19D8++0x3
|
|
line.long 0x0 "LUT315L,Graphic MMU LUT entry 315 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x19E0++0x3
|
|
line.long 0x0 "LUT316L,Graphic MMU LUT entry 316 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x19E8++0x3
|
|
line.long 0x0 "LUT317L,Graphic MMU LUT entry 317 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x19F0++0x3
|
|
line.long 0x0 "LUT318L,Graphic MMU LUT entry 318 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x19F8++0x3
|
|
line.long 0x0 "LUT319L,Graphic MMU LUT entry 319 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1A00++0x3
|
|
line.long 0x0 "LUT320L,Graphic MMU LUT entry 320 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1A08++0x3
|
|
line.long 0x0 "LUT321L,Graphic MMU LUT entry 321 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1A10++0x3
|
|
line.long 0x0 "LUT322L,Graphic MMU LUT entry 322 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1A18++0x3
|
|
line.long 0x0 "LUT323L,Graphic MMU LUT entry 323 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1A20++0x3
|
|
line.long 0x0 "LUT324L,Graphic MMU LUT entry 324 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1A28++0x3
|
|
line.long 0x0 "LUT325L,Graphic MMU LUT entry 325 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1A30++0x3
|
|
line.long 0x0 "LUT326L,Graphic MMU LUT entry 326 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1A38++0x3
|
|
line.long 0x0 "LUT327L,Graphic MMU LUT entry 327 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1A40++0x3
|
|
line.long 0x0 "LUT328L,Graphic MMU LUT entry 328 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1A48++0x3
|
|
line.long 0x0 "LUT329L,Graphic MMU LUT entry 329 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1A50++0x3
|
|
line.long 0x0 "LUT330L,Graphic MMU LUT entry 330 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1A58++0x3
|
|
line.long 0x0 "LUT331L,Graphic MMU LUT entry 331 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1A60++0x3
|
|
line.long 0x0 "LUT332L,Graphic MMU LUT entry 332 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1A68++0x3
|
|
line.long 0x0 "LUT333L,Graphic MMU LUT entry 333 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1A70++0x3
|
|
line.long 0x0 "LUT334L,Graphic MMU LUT entry 334 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1A78++0x3
|
|
line.long 0x0 "LUT335L,Graphic MMU LUT entry 335 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1A80++0x3
|
|
line.long 0x0 "LUT336L,Graphic MMU LUT entry 336 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1A88++0x3
|
|
line.long 0x0 "LUT337L,Graphic MMU LUT entry 337 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1A90++0x3
|
|
line.long 0x0 "LUT338L,Graphic MMU LUT entry 338 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1A98++0x3
|
|
line.long 0x0 "LUT339L,Graphic MMU LUT entry 339 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1AA0++0x3
|
|
line.long 0x0 "LUT340L,Graphic MMU LUT entry 340 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1AA8++0x3
|
|
line.long 0x0 "LUT341L,Graphic MMU LUT entry 341 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1AB0++0x3
|
|
line.long 0x0 "LUT342L,Graphic MMU LUT entry 342 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1AB8++0x3
|
|
line.long 0x0 "LUT343L,Graphic MMU LUT entry 343 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1AC0++0x3
|
|
line.long 0x0 "LUT344L,Graphic MMU LUT entry 344 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1AC8++0x3
|
|
line.long 0x0 "LUT345L,Graphic MMU LUT entry 345 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1AD0++0x3
|
|
line.long 0x0 "LUT346L,Graphic MMU LUT entry 346 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1AD8++0x3
|
|
line.long 0x0 "LUT347L,Graphic MMU LUT entry 347 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1AE0++0x3
|
|
line.long 0x0 "LUT348L,Graphic MMU LUT entry 348 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1AE8++0x3
|
|
line.long 0x0 "LUT349L,Graphic MMU LUT entry 349 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1AF0++0x3
|
|
line.long 0x0 "LUT350L,Graphic MMU LUT entry 350 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1AF8++0x3
|
|
line.long 0x0 "LUT351L,Graphic MMU LUT entry 351 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1B00++0x3
|
|
line.long 0x0 "LUT352L,Graphic MMU LUT entry 352 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1B08++0x3
|
|
line.long 0x0 "LUT353L,Graphic MMU LUT entry 353 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1B10++0x3
|
|
line.long 0x0 "LUT354L,Graphic MMU LUT entry 354 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1B18++0x3
|
|
line.long 0x0 "LUT355L,Graphic MMU LUT entry 355 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1B20++0x3
|
|
line.long 0x0 "LUT356L,Graphic MMU LUT entry 356 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1B28++0x3
|
|
line.long 0x0 "LUT357L,Graphic MMU LUT entry 357 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1B30++0x3
|
|
line.long 0x0 "LUT358L,Graphic MMU LUT entry 358 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1B38++0x3
|
|
line.long 0x0 "LUT359L,Graphic MMU LUT entry 359 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1B40++0x3
|
|
line.long 0x0 "LUT360L,Graphic MMU LUT entry 360 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1B48++0x3
|
|
line.long 0x0 "LUT361L,Graphic MMU LUT entry 361 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1B50++0x3
|
|
line.long 0x0 "LUT362L,Graphic MMU LUT entry 362 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1B58++0x3
|
|
line.long 0x0 "LUT363L,Graphic MMU LUT entry 363 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1B60++0x3
|
|
line.long 0x0 "LUT364L,Graphic MMU LUT entry 364 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1B68++0x3
|
|
line.long 0x0 "LUT365L,Graphic MMU LUT entry 365 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1B70++0x3
|
|
line.long 0x0 "LUT366L,Graphic MMU LUT entry 366 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1B78++0x3
|
|
line.long 0x0 "LUT367L,Graphic MMU LUT entry 367 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1B80++0x3
|
|
line.long 0x0 "LUT368L,Graphic MMU LUT entry 368 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1B88++0x3
|
|
line.long 0x0 "LUT369L,Graphic MMU LUT entry 369 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1B90++0x3
|
|
line.long 0x0 "LUT370L,Graphic MMU LUT entry 370 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1B98++0x3
|
|
line.long 0x0 "LUT371L,Graphic MMU LUT entry 371 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1BA0++0x3
|
|
line.long 0x0 "LUT372L,Graphic MMU LUT entry 372 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1BA8++0x3
|
|
line.long 0x0 "LUT373L,Graphic MMU LUT entry 373 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1BB0++0x3
|
|
line.long 0x0 "LUT374L,Graphic MMU LUT entry 374 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1BB8++0x3
|
|
line.long 0x0 "LUT375L,Graphic MMU LUT entry 375 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1BC0++0x3
|
|
line.long 0x0 "LUT376L,Graphic MMU LUT entry 376 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1BC8++0x3
|
|
line.long 0x0 "LUT377L,Graphic MMU LUT entry 377 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1BD0++0x3
|
|
line.long 0x0 "LUT378L,Graphic MMU LUT entry 378 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1BD8++0x3
|
|
line.long 0x0 "LUT379L,Graphic MMU LUT entry 379 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1BE0++0x3
|
|
line.long 0x0 "LUT380L,Graphic MMU LUT entry 380 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1BE8++0x3
|
|
line.long 0x0 "LUT381L,Graphic MMU LUT entry 381 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1BF0++0x3
|
|
line.long 0x0 "LUT382L,Graphic MMU LUT entry 382 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1BF8++0x3
|
|
line.long 0x0 "LUT383L,Graphic MMU LUT entry 383 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1C00++0x3
|
|
line.long 0x0 "LUT384L,Graphic MMU LUT entry 384 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1C08++0x3
|
|
line.long 0x0 "LUT385L,Graphic MMU LUT entry 385 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1C10++0x3
|
|
line.long 0x0 "LUT386L,Graphic MMU LUT entry 386 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1C18++0x3
|
|
line.long 0x0 "LUT387L,Graphic MMU LUT entry 387 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1C20++0x3
|
|
line.long 0x0 "LUT388L,Graphic MMU LUT entry 388 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1C28++0x3
|
|
line.long 0x0 "LUT389L,Graphic MMU LUT entry 389 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1C30++0x3
|
|
line.long 0x0 "LUT390L,Graphic MMU LUT entry 390 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1C38++0x3
|
|
line.long 0x0 "LUT391L,Graphic MMU LUT entry 391 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1C40++0x3
|
|
line.long 0x0 "LUT392L,Graphic MMU LUT entry 392 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1C48++0x3
|
|
line.long 0x0 "LUT393L,Graphic MMU LUT entry 393 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1C50++0x3
|
|
line.long 0x0 "LUT394L,Graphic MMU LUT entry 394 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1C58++0x3
|
|
line.long 0x0 "LUT395L,Graphic MMU LUT entry 395 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1C60++0x3
|
|
line.long 0x0 "LUT396L,Graphic MMU LUT entry 396 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1C68++0x3
|
|
line.long 0x0 "LUT397L,Graphic MMU LUT entry 397 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1C70++0x3
|
|
line.long 0x0 "LUT398L,Graphic MMU LUT entry 398 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1C78++0x3
|
|
line.long 0x0 "LUT399L,Graphic MMU LUT entry 399 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1C80++0x3
|
|
line.long 0x0 "LUT400L,Graphic MMU LUT entry 400 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1C88++0x3
|
|
line.long 0x0 "LUT401L,Graphic MMU LUT entry 401 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1C90++0x3
|
|
line.long 0x0 "LUT402L,Graphic MMU LUT entry 402 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1C98++0x3
|
|
line.long 0x0 "LUT403L,Graphic MMU LUT entry 403 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1CA0++0x3
|
|
line.long 0x0 "LUT404L,Graphic MMU LUT entry 404 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1CA8++0x3
|
|
line.long 0x0 "LUT405L,Graphic MMU LUT entry 405 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1CB0++0x3
|
|
line.long 0x0 "LUT406L,Graphic MMU LUT entry 406 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1CB8++0x3
|
|
line.long 0x0 "LUT407L,Graphic MMU LUT entry 407 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1CC0++0x3
|
|
line.long 0x0 "LUT408L,Graphic MMU LUT entry 408 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1CC8++0x3
|
|
line.long 0x0 "LUT409L,Graphic MMU LUT entry 409 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1CD0++0x3
|
|
line.long 0x0 "LUT410L,Graphic MMU LUT entry 410 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1CD8++0x3
|
|
line.long 0x0 "LUT411L,Graphic MMU LUT entry 411 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1CE0++0x3
|
|
line.long 0x0 "LUT412L,Graphic MMU LUT entry 412 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1CE8++0x3
|
|
line.long 0x0 "LUT413L,Graphic MMU LUT entry 413 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1CF0++0x3
|
|
line.long 0x0 "LUT414L,Graphic MMU LUT entry 414 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1CF8++0x3
|
|
line.long 0x0 "LUT415L,Graphic MMU LUT entry 415 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1D00++0x3
|
|
line.long 0x0 "LUT416L,Graphic MMU LUT entry 416 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1D08++0x3
|
|
line.long 0x0 "LUT417L,Graphic MMU LUT entry 417 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1D10++0x3
|
|
line.long 0x0 "LUT418L,Graphic MMU LUT entry 418 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1D18++0x3
|
|
line.long 0x0 "LUT419L,Graphic MMU LUT entry 419 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1D20++0x3
|
|
line.long 0x0 "LUT420L,Graphic MMU LUT entry 420 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1D28++0x3
|
|
line.long 0x0 "LUT421L,Graphic MMU LUT entry 421 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1D30++0x3
|
|
line.long 0x0 "LUT422L,Graphic MMU LUT entry 422 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1D38++0x3
|
|
line.long 0x0 "LUT423L,Graphic MMU LUT entry 423 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1D40++0x3
|
|
line.long 0x0 "LUT424L,Graphic MMU LUT entry 424 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1D48++0x3
|
|
line.long 0x0 "LUT425L,Graphic MMU LUT entry 425 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1D50++0x3
|
|
line.long 0x0 "LUT426L,Graphic MMU LUT entry 426 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1D58++0x3
|
|
line.long 0x0 "LUT427L,Graphic MMU LUT entry 427 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1D60++0x3
|
|
line.long 0x0 "LUT428L,Graphic MMU LUT entry 428 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1D68++0x3
|
|
line.long 0x0 "LUT429L,Graphic MMU LUT entry 429 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1D70++0x3
|
|
line.long 0x0 "LUT430L,Graphic MMU LUT entry 430 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1D78++0x3
|
|
line.long 0x0 "LUT431L,Graphic MMU LUT entry 431 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1D80++0x3
|
|
line.long 0x0 "LUT432L,Graphic MMU LUT entry 432 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1D88++0x3
|
|
line.long 0x0 "LUT433L,Graphic MMU LUT entry 433 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1D90++0x3
|
|
line.long 0x0 "LUT434L,Graphic MMU LUT entry 434 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1D98++0x3
|
|
line.long 0x0 "LUT435L,Graphic MMU LUT entry 435 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1DA0++0x3
|
|
line.long 0x0 "LUT436L,Graphic MMU LUT entry 436 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1DA8++0x3
|
|
line.long 0x0 "LUT437L,Graphic MMU LUT entry 437 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1DB0++0x3
|
|
line.long 0x0 "LUT438L,Graphic MMU LUT entry 438 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1DB8++0x3
|
|
line.long 0x0 "LUT439L,Graphic MMU LUT entry 439 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1DC0++0x3
|
|
line.long 0x0 "LUT440L,Graphic MMU LUT entry 440 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1DC8++0x3
|
|
line.long 0x0 "LUT441L,Graphic MMU LUT entry 441 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1DD0++0x3
|
|
line.long 0x0 "LUT442L,Graphic MMU LUT entry 442 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1DD8++0x3
|
|
line.long 0x0 "LUT443L,Graphic MMU LUT entry 443 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1DE0++0x3
|
|
line.long 0x0 "LUT444L,Graphic MMU LUT entry 444 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1DE8++0x3
|
|
line.long 0x0 "LUT445L,Graphic MMU LUT entry 445 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1DF0++0x3
|
|
line.long 0x0 "LUT446L,Graphic MMU LUT entry 446 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1DF8++0x3
|
|
line.long 0x0 "LUT447L,Graphic MMU LUT entry 447 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1E00++0x3
|
|
line.long 0x0 "LUT448L,Graphic MMU LUT entry 448 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1E08++0x3
|
|
line.long 0x0 "LUT449L,Graphic MMU LUT entry 449 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1E10++0x3
|
|
line.long 0x0 "LUT450L,Graphic MMU LUT entry 450 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1E18++0x3
|
|
line.long 0x0 "LUT451L,Graphic MMU LUT entry 451 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1E20++0x3
|
|
line.long 0x0 "LUT452L,Graphic MMU LUT entry 452 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1E28++0x3
|
|
line.long 0x0 "LUT453L,Graphic MMU LUT entry 453 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1E30++0x3
|
|
line.long 0x0 "LUT454L,Graphic MMU LUT entry 454 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1E38++0x3
|
|
line.long 0x0 "LUT455L,Graphic MMU LUT entry 455 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1E40++0x3
|
|
line.long 0x0 "LUT456L,Graphic MMU LUT entry 456 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1E48++0x3
|
|
line.long 0x0 "LUT457L,Graphic MMU LUT entry 457 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1E50++0x3
|
|
line.long 0x0 "LUT458L,Graphic MMU LUT entry 458 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1E58++0x3
|
|
line.long 0x0 "LUT459L,Graphic MMU LUT entry 459 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1E60++0x3
|
|
line.long 0x0 "LUT460L,Graphic MMU LUT entry 460 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1E68++0x3
|
|
line.long 0x0 "LUT461L,Graphic MMU LUT entry 461 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1E70++0x3
|
|
line.long 0x0 "LUT462L,Graphic MMU LUT entry 462 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1E78++0x3
|
|
line.long 0x0 "LUT463L,Graphic MMU LUT entry 463 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1E80++0x3
|
|
line.long 0x0 "LUT464L,Graphic MMU LUT entry 464 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1E88++0x3
|
|
line.long 0x0 "LUT465L,Graphic MMU LUT entry 465 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1E90++0x3
|
|
line.long 0x0 "LUT466L,Graphic MMU LUT entry 466 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1E98++0x3
|
|
line.long 0x0 "LUT467L,Graphic MMU LUT entry 467 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1EA0++0x3
|
|
line.long 0x0 "LUT468L,Graphic MMU LUT entry 468 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1EA8++0x3
|
|
line.long 0x0 "LUT469L,Graphic MMU LUT entry 469 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1EB0++0x3
|
|
line.long 0x0 "LUT470L,Graphic MMU LUT entry 470 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1EB8++0x3
|
|
line.long 0x0 "LUT471L,Graphic MMU LUT entry 471 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1EC0++0x3
|
|
line.long 0x0 "LUT472L,Graphic MMU LUT entry 472 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1EC8++0x3
|
|
line.long 0x0 "LUT473L,Graphic MMU LUT entry 473 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1ED0++0x3
|
|
line.long 0x0 "LUT474L,Graphic MMU LUT entry 474 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1ED8++0x3
|
|
line.long 0x0 "LUT475L,Graphic MMU LUT entry 475 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1EE0++0x3
|
|
line.long 0x0 "LUT476L,Graphic MMU LUT entry 476 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1EE8++0x3
|
|
line.long 0x0 "LUT477L,Graphic MMU LUT entry 477 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1EF0++0x3
|
|
line.long 0x0 "LUT478L,Graphic MMU LUT entry 478 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1EF8++0x3
|
|
line.long 0x0 "LUT479L,Graphic MMU LUT entry 479 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1F00++0x3
|
|
line.long 0x0 "LUT480L,Graphic MMU LUT entry 480 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1F08++0x3
|
|
line.long 0x0 "LUT481L,Graphic MMU LUT entry 481 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1F10++0x3
|
|
line.long 0x0 "LUT482L,Graphic MMU LUT entry 482 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1F18++0x3
|
|
line.long 0x0 "LUT483L,Graphic MMU LUT entry 483 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1F20++0x3
|
|
line.long 0x0 "LUT484L,Graphic MMU LUT entry 484 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1F28++0x3
|
|
line.long 0x0 "LUT485L,Graphic MMU LUT entry 485 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1F30++0x3
|
|
line.long 0x0 "LUT486L,Graphic MMU LUT entry 486 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1F38++0x3
|
|
line.long 0x0 "LUT487L,Graphic MMU LUT entry 487 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1F40++0x3
|
|
line.long 0x0 "LUT488L,Graphic MMU LUT entry 488 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1F48++0x3
|
|
line.long 0x0 "LUT489L,Graphic MMU LUT entry 489 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1F50++0x3
|
|
line.long 0x0 "LUT490L,Graphic MMU LUT entry 490 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1F58++0x3
|
|
line.long 0x0 "LUT491L,Graphic MMU LUT entry 491 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1F60++0x3
|
|
line.long 0x0 "LUT492L,Graphic MMU LUT entry 492 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1F68++0x3
|
|
line.long 0x0 "LUT493L,Graphic MMU LUT entry 493 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1F70++0x3
|
|
line.long 0x0 "LUT494L,Graphic MMU LUT entry 494 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1F78++0x3
|
|
line.long 0x0 "LUT495L,Graphic MMU LUT entry 495 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1F80++0x3
|
|
line.long 0x0 "LUT496L,Graphic MMU LUT entry 496 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1F88++0x3
|
|
line.long 0x0 "LUT497L,Graphic MMU LUT entry 497 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1F90++0x3
|
|
line.long 0x0 "LUT498L,Graphic MMU LUT entry 498 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1F98++0x3
|
|
line.long 0x0 "LUT499L,Graphic MMU LUT entry 499 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1FA0++0x3
|
|
line.long 0x0 "LUT500L,Graphic MMU LUT entry 500 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1FA8++0x3
|
|
line.long 0x0 "LUT501L,Graphic MMU LUT entry 501 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1FB0++0x3
|
|
line.long 0x0 "LUT502L,Graphic MMU LUT entry 502 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1FB8++0x3
|
|
line.long 0x0 "LUT503L,Graphic MMU LUT entry 503 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1FC0++0x3
|
|
line.long 0x0 "LUT504L,Graphic MMU LUT entry 504 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1FC8++0x3
|
|
line.long 0x0 "LUT505L,Graphic MMU LUT entry 505 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1FD0++0x3
|
|
line.long 0x0 "LUT506L,Graphic MMU LUT entry 506 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1FD8++0x3
|
|
line.long 0x0 "LUT507L,Graphic MMU LUT entry 507 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1FE0++0x3
|
|
line.long 0x0 "LUT508L,Graphic MMU LUT entry 508 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1FE8++0x3
|
|
line.long 0x0 "LUT509L,Graphic MMU LUT entry 509 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1FF0++0x3
|
|
line.long 0x0 "LUT510L,Graphic MMU LUT entry 510 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1FF8++0x3
|
|
line.long 0x0 "LUT511L,Graphic MMU LUT entry 511 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2000++0x3
|
|
line.long 0x0 "LUT512L,Graphic MMU LUT entry 512 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2008++0x3
|
|
line.long 0x0 "LUT513L,Graphic MMU LUT entry 513 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2010++0x3
|
|
line.long 0x0 "LUT514L,Graphic MMU LUT entry 514 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2018++0x3
|
|
line.long 0x0 "LUT515L,Graphic MMU LUT entry 515 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2020++0x3
|
|
line.long 0x0 "LUT516L,Graphic MMU LUT entry 516 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2028++0x3
|
|
line.long 0x0 "LUT517L,Graphic MMU LUT entry 517 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2030++0x3
|
|
line.long 0x0 "LUT518L,Graphic MMU LUT entry 518 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2038++0x3
|
|
line.long 0x0 "LUT519L,Graphic MMU LUT entry 519 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2040++0x3
|
|
line.long 0x0 "LUT520L,Graphic MMU LUT entry 520 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2048++0x3
|
|
line.long 0x0 "LUT521L,Graphic MMU LUT entry 521 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2050++0x3
|
|
line.long 0x0 "LUT522L,Graphic MMU LUT entry 522 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2058++0x3
|
|
line.long 0x0 "LUT523L,Graphic MMU LUT entry 523 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2060++0x3
|
|
line.long 0x0 "LUT524L,Graphic MMU LUT entry 524 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2068++0x3
|
|
line.long 0x0 "LUT525L,Graphic MMU LUT entry 525 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2070++0x3
|
|
line.long 0x0 "LUT526L,Graphic MMU LUT entry 526 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2078++0x3
|
|
line.long 0x0 "LUT527L,Graphic MMU LUT entry 527 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2080++0x3
|
|
line.long 0x0 "LUT528L,Graphic MMU LUT entry 528 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2088++0x3
|
|
line.long 0x0 "LUT529L,Graphic MMU LUT entry 529 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2090++0x3
|
|
line.long 0x0 "LUT530L,Graphic MMU LUT entry 530 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2098++0x3
|
|
line.long 0x0 "LUT531L,Graphic MMU LUT entry 531 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x20A0++0x3
|
|
line.long 0x0 "LUT532L,Graphic MMU LUT entry 532 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x20A8++0x3
|
|
line.long 0x0 "LUT533L,Graphic MMU LUT entry 533 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x20B0++0x3
|
|
line.long 0x0 "LUT534L,Graphic MMU LUT entry 534 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x20B8++0x3
|
|
line.long 0x0 "LUT535L,Graphic MMU LUT entry 535 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x20C0++0x3
|
|
line.long 0x0 "LUT536L,Graphic MMU LUT entry 536 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x20C8++0x3
|
|
line.long 0x0 "LUT537L,Graphic MMU LUT entry 537 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x20D0++0x3
|
|
line.long 0x0 "LUT538L,Graphic MMU LUT entry 538 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x20D8++0x3
|
|
line.long 0x0 "LUT539L,Graphic MMU LUT entry 539 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x20E0++0x3
|
|
line.long 0x0 "LUT540L,Graphic MMU LUT entry 540 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x20E8++0x3
|
|
line.long 0x0 "LUT541L,Graphic MMU LUT entry 541 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x20F0++0x3
|
|
line.long 0x0 "LUT542L,Graphic MMU LUT entry 542 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x20F8++0x3
|
|
line.long 0x0 "LUT543L,Graphic MMU LUT entry 543 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2100++0x3
|
|
line.long 0x0 "LUT544L,Graphic MMU LUT entry 544 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2108++0x3
|
|
line.long 0x0 "LUT545L,Graphic MMU LUT entry 545 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2110++0x3
|
|
line.long 0x0 "LUT546L,Graphic MMU LUT entry 546 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2118++0x3
|
|
line.long 0x0 "LUT547L,Graphic MMU LUT entry 547 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2120++0x3
|
|
line.long 0x0 "LUT548L,Graphic MMU LUT entry 548 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2128++0x3
|
|
line.long 0x0 "LUT549L,Graphic MMU LUT entry 549 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2130++0x3
|
|
line.long 0x0 "LUT550L,Graphic MMU LUT entry 550 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2138++0x3
|
|
line.long 0x0 "LUT551L,Graphic MMU LUT entry 551 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2140++0x3
|
|
line.long 0x0 "LUT552L,Graphic MMU LUT entry 552 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2148++0x3
|
|
line.long 0x0 "LUT553L,Graphic MMU LUT entry 553 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2150++0x3
|
|
line.long 0x0 "LUT554L,Graphic MMU LUT entry 554 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2158++0x3
|
|
line.long 0x0 "LUT555L,Graphic MMU LUT entry 555 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2160++0x3
|
|
line.long 0x0 "LUT556L,Graphic MMU LUT entry 556 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2168++0x3
|
|
line.long 0x0 "LUT557L,Graphic MMU LUT entry 557 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2170++0x3
|
|
line.long 0x0 "LUT558L,Graphic MMU LUT entry 558 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2178++0x3
|
|
line.long 0x0 "LUT559L,Graphic MMU LUT entry 559 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2180++0x3
|
|
line.long 0x0 "LUT560L,Graphic MMU LUT entry 560 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2188++0x3
|
|
line.long 0x0 "LUT561L,Graphic MMU LUT entry 561 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2190++0x3
|
|
line.long 0x0 "LUT562L,Graphic MMU LUT entry 562 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2198++0x3
|
|
line.long 0x0 "LUT563L,Graphic MMU LUT entry 563 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x21A0++0x3
|
|
line.long 0x0 "LUT564L,Graphic MMU LUT entry 564 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x21A8++0x3
|
|
line.long 0x0 "LUT565L,Graphic MMU LUT entry 565 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x21B0++0x3
|
|
line.long 0x0 "LUT566L,Graphic MMU LUT entry 566 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x21B8++0x3
|
|
line.long 0x0 "LUT567L,Graphic MMU LUT entry 567 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x21C0++0x3
|
|
line.long 0x0 "LUT568L,Graphic MMU LUT entry 568 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x21C8++0x3
|
|
line.long 0x0 "LUT569L,Graphic MMU LUT entry 569 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x21D0++0x3
|
|
line.long 0x0 "LUT570L,Graphic MMU LUT entry 570 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x21D8++0x3
|
|
line.long 0x0 "LUT571L,Graphic MMU LUT entry 571 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x21E0++0x3
|
|
line.long 0x0 "LUT572L,Graphic MMU LUT entry 572 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x21E8++0x3
|
|
line.long 0x0 "LUT573L,Graphic MMU LUT entry 573 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x21F0++0x3
|
|
line.long 0x0 "LUT574L,Graphic MMU LUT entry 574 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x21F8++0x3
|
|
line.long 0x0 "LUT575L,Graphic MMU LUT entry 575 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2200++0x3
|
|
line.long 0x0 "LUT576L,Graphic MMU LUT entry 576 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2208++0x3
|
|
line.long 0x0 "LUT577L,Graphic MMU LUT entry 577 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2210++0x3
|
|
line.long 0x0 "LUT578L,Graphic MMU LUT entry 578 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2218++0x3
|
|
line.long 0x0 "LUT579L,Graphic MMU LUT entry 579 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2220++0x3
|
|
line.long 0x0 "LUT580L,Graphic MMU LUT entry 580 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2228++0x3
|
|
line.long 0x0 "LUT581L,Graphic MMU LUT entry 581 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2230++0x3
|
|
line.long 0x0 "LUT582L,Graphic MMU LUT entry 582 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2238++0x3
|
|
line.long 0x0 "LUT583L,Graphic MMU LUT entry 583 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2240++0x3
|
|
line.long 0x0 "LUT584L,Graphic MMU LUT entry 584 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2248++0x3
|
|
line.long 0x0 "LUT585L,Graphic MMU LUT entry 585 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2250++0x3
|
|
line.long 0x0 "LUT586L,Graphic MMU LUT entry 586 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2258++0x3
|
|
line.long 0x0 "LUT587L,Graphic MMU LUT entry 587 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2260++0x3
|
|
line.long 0x0 "LUT588L,Graphic MMU LUT entry 588 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2268++0x3
|
|
line.long 0x0 "LUT589L,Graphic MMU LUT entry 589 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2270++0x3
|
|
line.long 0x0 "LUT590L,Graphic MMU LUT entry 590 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2278++0x3
|
|
line.long 0x0 "LUT591L,Graphic MMU LUT entry 591 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2280++0x3
|
|
line.long 0x0 "LUT592L,Graphic MMU LUT entry 592 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2288++0x3
|
|
line.long 0x0 "LUT593L,Graphic MMU LUT entry 593 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2290++0x3
|
|
line.long 0x0 "LUT594L,Graphic MMU LUT entry 594 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2298++0x3
|
|
line.long 0x0 "LUT595L,Graphic MMU LUT entry 595 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x22A0++0x3
|
|
line.long 0x0 "LUT596L,Graphic MMU LUT entry 596 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x22A8++0x3
|
|
line.long 0x0 "LUT597L,Graphic MMU LUT entry 597 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x22B0++0x3
|
|
line.long 0x0 "LUT598L,Graphic MMU LUT entry 598 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x22B8++0x3
|
|
line.long 0x0 "LUT599L,Graphic MMU LUT entry 599 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x22C0++0x3
|
|
line.long 0x0 "LUT600L,Graphic MMU LUT entry 600 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x22C8++0x3
|
|
line.long 0x0 "LUT601L,Graphic MMU LUT entry 601 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x22D0++0x3
|
|
line.long 0x0 "LUT602L,Graphic MMU LUT entry 602 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x22D8++0x3
|
|
line.long 0x0 "LUT603L,Graphic MMU LUT entry 603 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x22E0++0x3
|
|
line.long 0x0 "LUT604L,Graphic MMU LUT entry 604 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x22E8++0x3
|
|
line.long 0x0 "LUT605L,Graphic MMU LUT entry 605 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x22F0++0x3
|
|
line.long 0x0 "LUT606L,Graphic MMU LUT entry 606 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x22F8++0x3
|
|
line.long 0x0 "LUT607L,Graphic MMU LUT entry 607 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2300++0x3
|
|
line.long 0x0 "LUT608L,Graphic MMU LUT entry 608 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2308++0x3
|
|
line.long 0x0 "LUT609L,Graphic MMU LUT entry 609 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2310++0x3
|
|
line.long 0x0 "LUT610L,Graphic MMU LUT entry 610 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2318++0x3
|
|
line.long 0x0 "LUT611L,Graphic MMU LUT entry 611 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2320++0x3
|
|
line.long 0x0 "LUT612L,Graphic MMU LUT entry 612 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2328++0x3
|
|
line.long 0x0 "LUT613L,Graphic MMU LUT entry 613 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2330++0x3
|
|
line.long 0x0 "LUT614L,Graphic MMU LUT entry 614 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2338++0x3
|
|
line.long 0x0 "LUT615L,Graphic MMU LUT entry 615 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2340++0x3
|
|
line.long 0x0 "LUT616L,Graphic MMU LUT entry 616 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2348++0x3
|
|
line.long 0x0 "LUT617L,Graphic MMU LUT entry 617 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2350++0x3
|
|
line.long 0x0 "LUT618L,Graphic MMU LUT entry 618 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2358++0x3
|
|
line.long 0x0 "LUT619L,Graphic MMU LUT entry 619 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2360++0x3
|
|
line.long 0x0 "LUT620L,Graphic MMU LUT entry 620 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2368++0x3
|
|
line.long 0x0 "LUT621L,Graphic MMU LUT entry 621 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2370++0x3
|
|
line.long 0x0 "LUT622L,Graphic MMU LUT entry 622 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2378++0x3
|
|
line.long 0x0 "LUT623L,Graphic MMU LUT entry 623 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2380++0x3
|
|
line.long 0x0 "LUT624L,Graphic MMU LUT entry 624 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2388++0x3
|
|
line.long 0x0 "LUT625L,Graphic MMU LUT entry 625 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2390++0x3
|
|
line.long 0x0 "LUT626L,Graphic MMU LUT entry 626 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2398++0x3
|
|
line.long 0x0 "LUT627L,Graphic MMU LUT entry 627 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x23A0++0x3
|
|
line.long 0x0 "LUT628L,Graphic MMU LUT entry 628 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x23A8++0x3
|
|
line.long 0x0 "LUT629L,Graphic MMU LUT entry 629 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x23B0++0x3
|
|
line.long 0x0 "LUT630L,Graphic MMU LUT entry 630 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x23B8++0x3
|
|
line.long 0x0 "LUT631L,Graphic MMU LUT entry 631 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x23C0++0x3
|
|
line.long 0x0 "LUT632L,Graphic MMU LUT entry 632 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x23C8++0x3
|
|
line.long 0x0 "LUT633L,Graphic MMU LUT entry 633 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x23D0++0x3
|
|
line.long 0x0 "LUT634L,Graphic MMU LUT entry 634 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x23D8++0x3
|
|
line.long 0x0 "LUT635L,Graphic MMU LUT entry 635 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x23E0++0x3
|
|
line.long 0x0 "LUT636L,Graphic MMU LUT entry 636 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x23E8++0x3
|
|
line.long 0x0 "LUT637L,Graphic MMU LUT entry 637 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x23F0++0x3
|
|
line.long 0x0 "LUT638L,Graphic MMU LUT entry 638 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x23F8++0x3
|
|
line.long 0x0 "LUT639L,Graphic MMU LUT entry 639 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2400++0x3
|
|
line.long 0x0 "LUT640L,Graphic MMU LUT entry 640 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2408++0x3
|
|
line.long 0x0 "LUT641L,Graphic MMU LUT entry 641 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2410++0x3
|
|
line.long 0x0 "LUT642L,Graphic MMU LUT entry 642 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2418++0x3
|
|
line.long 0x0 "LUT643L,Graphic MMU LUT entry 643 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2420++0x3
|
|
line.long 0x0 "LUT644L,Graphic MMU LUT entry 644 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2428++0x3
|
|
line.long 0x0 "LUT645L,Graphic MMU LUT entry 645 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2430++0x3
|
|
line.long 0x0 "LUT646L,Graphic MMU LUT entry 646 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2438++0x3
|
|
line.long 0x0 "LUT647L,Graphic MMU LUT entry 647 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2440++0x3
|
|
line.long 0x0 "LUT648L,Graphic MMU LUT entry 648 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2448++0x3
|
|
line.long 0x0 "LUT649L,Graphic MMU LUT entry 649 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2450++0x3
|
|
line.long 0x0 "LUT650L,Graphic MMU LUT entry 650 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2458++0x3
|
|
line.long 0x0 "LUT651L,Graphic MMU LUT entry 651 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2460++0x3
|
|
line.long 0x0 "LUT652L,Graphic MMU LUT entry 652 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2468++0x3
|
|
line.long 0x0 "LUT653L,Graphic MMU LUT entry 653 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2470++0x3
|
|
line.long 0x0 "LUT654L,Graphic MMU LUT entry 654 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2478++0x3
|
|
line.long 0x0 "LUT655L,Graphic MMU LUT entry 655 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2480++0x3
|
|
line.long 0x0 "LUT656L,Graphic MMU LUT entry 656 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2488++0x3
|
|
line.long 0x0 "LUT657L,Graphic MMU LUT entry 657 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2490++0x3
|
|
line.long 0x0 "LUT658L,Graphic MMU LUT entry 658 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2498++0x3
|
|
line.long 0x0 "LUT659L,Graphic MMU LUT entry 659 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x24A0++0x3
|
|
line.long 0x0 "LUT660L,Graphic MMU LUT entry 660 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x24A8++0x3
|
|
line.long 0x0 "LUT661L,Graphic MMU LUT entry 661 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x24B0++0x3
|
|
line.long 0x0 "LUT662L,Graphic MMU LUT entry 662 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x24B8++0x3
|
|
line.long 0x0 "LUT663L,Graphic MMU LUT entry 663 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x24C0++0x3
|
|
line.long 0x0 "LUT664L,Graphic MMU LUT entry 664 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x24C8++0x3
|
|
line.long 0x0 "LUT665L,Graphic MMU LUT entry 665 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x24D0++0x3
|
|
line.long 0x0 "LUT666L,Graphic MMU LUT entry 666 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x24D8++0x3
|
|
line.long 0x0 "LUT667L,Graphic MMU LUT entry 667 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x24E0++0x3
|
|
line.long 0x0 "LUT668L,Graphic MMU LUT entry 668 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x24E8++0x3
|
|
line.long 0x0 "LUT669L,Graphic MMU LUT entry 669 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x24F0++0x3
|
|
line.long 0x0 "LUT670L,Graphic MMU LUT entry 670 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x24F8++0x3
|
|
line.long 0x0 "LUT671L,Graphic MMU LUT entry 671 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2500++0x3
|
|
line.long 0x0 "LUT672L,Graphic MMU LUT entry 672 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2508++0x3
|
|
line.long 0x0 "LUT673L,Graphic MMU LUT entry 673 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2510++0x3
|
|
line.long 0x0 "LUT674L,Graphic MMU LUT entry 674 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2518++0x3
|
|
line.long 0x0 "LUT675L,Graphic MMU LUT entry 675 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2520++0x3
|
|
line.long 0x0 "LUT676L,Graphic MMU LUT entry 676 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2528++0x3
|
|
line.long 0x0 "LUT677L,Graphic MMU LUT entry 677 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2530++0x3
|
|
line.long 0x0 "LUT678L,Graphic MMU LUT entry 678 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2538++0x3
|
|
line.long 0x0 "LUT679L,Graphic MMU LUT entry 679 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2540++0x3
|
|
line.long 0x0 "LUT680L,Graphic MMU LUT entry 680 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2548++0x3
|
|
line.long 0x0 "LUT681L,Graphic MMU LUT entry 681 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2550++0x3
|
|
line.long 0x0 "LUT682L,Graphic MMU LUT entry 682 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2558++0x3
|
|
line.long 0x0 "LUT683L,Graphic MMU LUT entry 683 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2560++0x3
|
|
line.long 0x0 "LUT684L,Graphic MMU LUT entry 684 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2568++0x3
|
|
line.long 0x0 "LUT685L,Graphic MMU LUT entry 685 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2570++0x3
|
|
line.long 0x0 "LUT686L,Graphic MMU LUT entry 686 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2578++0x3
|
|
line.long 0x0 "LUT687L,Graphic MMU LUT entry 687 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2580++0x3
|
|
line.long 0x0 "LUT688L,Graphic MMU LUT entry 688 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2588++0x3
|
|
line.long 0x0 "LUT689L,Graphic MMU LUT entry 689 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2590++0x3
|
|
line.long 0x0 "LUT690L,Graphic MMU LUT entry 690 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2598++0x3
|
|
line.long 0x0 "LUT691L,Graphic MMU LUT entry 691 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x25A0++0x3
|
|
line.long 0x0 "LUT692L,Graphic MMU LUT entry 692 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x25A8++0x3
|
|
line.long 0x0 "LUT693L,Graphic MMU LUT entry 693 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x25B0++0x3
|
|
line.long 0x0 "LUT694L,Graphic MMU LUT entry 694 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x25B8++0x3
|
|
line.long 0x0 "LUT695L,Graphic MMU LUT entry 695 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x25C0++0x3
|
|
line.long 0x0 "LUT696L,Graphic MMU LUT entry 696 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x25C8++0x3
|
|
line.long 0x0 "LUT697L,Graphic MMU LUT entry 697 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x25D0++0x3
|
|
line.long 0x0 "LUT698L,Graphic MMU LUT entry 698 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x25D8++0x3
|
|
line.long 0x0 "LUT699L,Graphic MMU LUT entry 699 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x25E0++0x3
|
|
line.long 0x0 "LUT700L,Graphic MMU LUT entry 700 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x25E8++0x3
|
|
line.long 0x0 "LUT701L,Graphic MMU LUT entry 701 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x25F0++0x3
|
|
line.long 0x0 "LUT702L,Graphic MMU LUT entry 702 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x25F8++0x3
|
|
line.long 0x0 "LUT703L,Graphic MMU LUT entry 703 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2600++0x3
|
|
line.long 0x0 "LUT704L,Graphic MMU LUT entry 704 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2608++0x3
|
|
line.long 0x0 "LUT705L,Graphic MMU LUT entry 705 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2610++0x3
|
|
line.long 0x0 "LUT706L,Graphic MMU LUT entry 706 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2618++0x3
|
|
line.long 0x0 "LUT707L,Graphic MMU LUT entry 707 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2620++0x3
|
|
line.long 0x0 "LUT708L,Graphic MMU LUT entry 708 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2628++0x3
|
|
line.long 0x0 "LUT709L,Graphic MMU LUT entry 709 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2630++0x3
|
|
line.long 0x0 "LUT710L,Graphic MMU LUT entry 710 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2638++0x3
|
|
line.long 0x0 "LUT711L,Graphic MMU LUT entry 711 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2640++0x3
|
|
line.long 0x0 "LUT712L,Graphic MMU LUT entry 712 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2648++0x3
|
|
line.long 0x0 "LUT713L,Graphic MMU LUT entry 713 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2650++0x3
|
|
line.long 0x0 "LUT714L,Graphic MMU LUT entry 714 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2658++0x3
|
|
line.long 0x0 "LUT715L,Graphic MMU LUT entry 715 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2660++0x3
|
|
line.long 0x0 "LUT716L,Graphic MMU LUT entry 716 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2668++0x3
|
|
line.long 0x0 "LUT717L,Graphic MMU LUT entry 717 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2670++0x3
|
|
line.long 0x0 "LUT718L,Graphic MMU LUT entry 718 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2678++0x3
|
|
line.long 0x0 "LUT719L,Graphic MMU LUT entry 719 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2680++0x3
|
|
line.long 0x0 "LUT720L,Graphic MMU LUT entry 720 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2688++0x3
|
|
line.long 0x0 "LUT721L,Graphic MMU LUT entry 721 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2690++0x3
|
|
line.long 0x0 "LUT722L,Graphic MMU LUT entry 722 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2698++0x3
|
|
line.long 0x0 "LUT723L,Graphic MMU LUT entry 723 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x26A0++0x3
|
|
line.long 0x0 "LUT724L,Graphic MMU LUT entry 724 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x26A8++0x3
|
|
line.long 0x0 "LUT725L,Graphic MMU LUT entry 725 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x26B0++0x3
|
|
line.long 0x0 "LUT726L,Graphic MMU LUT entry 726 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x26B8++0x3
|
|
line.long 0x0 "LUT727L,Graphic MMU LUT entry 727 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x26C0++0x3
|
|
line.long 0x0 "LUT728L,Graphic MMU LUT entry 728 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x26C8++0x3
|
|
line.long 0x0 "LUT729L,Graphic MMU LUT entry 729 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x26D0++0x3
|
|
line.long 0x0 "LUT730L,Graphic MMU LUT entry 730 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x26D8++0x3
|
|
line.long 0x0 "LUT731L,Graphic MMU LUT entry 731 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x26E0++0x3
|
|
line.long 0x0 "LUT732L,Graphic MMU LUT entry 732 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x26E8++0x3
|
|
line.long 0x0 "LUT733L,Graphic MMU LUT entry 733 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x26F0++0x3
|
|
line.long 0x0 "LUT734L,Graphic MMU LUT entry 734 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x26F8++0x3
|
|
line.long 0x0 "LUT735L,Graphic MMU LUT entry 735 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2700++0x3
|
|
line.long 0x0 "LUT736L,Graphic MMU LUT entry 736 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2708++0x3
|
|
line.long 0x0 "LUT737L,Graphic MMU LUT entry 737 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2710++0x3
|
|
line.long 0x0 "LUT738L,Graphic MMU LUT entry 738 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2718++0x3
|
|
line.long 0x0 "LUT739L,Graphic MMU LUT entry 739 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2720++0x3
|
|
line.long 0x0 "LUT740L,Graphic MMU LUT entry 740 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2728++0x3
|
|
line.long 0x0 "LUT741L,Graphic MMU LUT entry 741 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2730++0x3
|
|
line.long 0x0 "LUT742L,Graphic MMU LUT entry 742 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2738++0x3
|
|
line.long 0x0 "LUT743L,Graphic MMU LUT entry 743 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2740++0x3
|
|
line.long 0x0 "LUT744L,Graphic MMU LUT entry 744 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2748++0x3
|
|
line.long 0x0 "LUT745L,Graphic MMU LUT entry 745 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2750++0x3
|
|
line.long 0x0 "LUT746L,Graphic MMU LUT entry 746 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2758++0x3
|
|
line.long 0x0 "LUT747L,Graphic MMU LUT entry 747 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2760++0x3
|
|
line.long 0x0 "LUT748L,Graphic MMU LUT entry 748 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2768++0x3
|
|
line.long 0x0 "LUT749L,Graphic MMU LUT entry 749 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2770++0x3
|
|
line.long 0x0 "LUT750L,Graphic MMU LUT entry 750 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2778++0x3
|
|
line.long 0x0 "LUT751L,Graphic MMU LUT entry 751 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2780++0x3
|
|
line.long 0x0 "LUT752L,Graphic MMU LUT entry 752 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2788++0x3
|
|
line.long 0x0 "LUT753L,Graphic MMU LUT entry 753 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2790++0x3
|
|
line.long 0x0 "LUT754L,Graphic MMU LUT entry 754 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2798++0x3
|
|
line.long 0x0 "LUT755L,Graphic MMU LUT entry 755 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x27A0++0x3
|
|
line.long 0x0 "LUT756L,Graphic MMU LUT entry 756 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x27A8++0x3
|
|
line.long 0x0 "LUT757L,Graphic MMU LUT entry 757 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x27B0++0x3
|
|
line.long 0x0 "LUT758L,Graphic MMU LUT entry 758 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x27B8++0x3
|
|
line.long 0x0 "LUT759L,Graphic MMU LUT entry 759 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x27C0++0x3
|
|
line.long 0x0 "LUT760L,Graphic MMU LUT entry 760 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x27C8++0x3
|
|
line.long 0x0 "LUT761L,Graphic MMU LUT entry 761 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x27D0++0x3
|
|
line.long 0x0 "LUT762L,Graphic MMU LUT entry 762 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x27D8++0x3
|
|
line.long 0x0 "LUT763L,Graphic MMU LUT entry 763 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x27E0++0x3
|
|
line.long 0x0 "LUT764L,Graphic MMU LUT entry 764 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x27E8++0x3
|
|
line.long 0x0 "LUT765L,Graphic MMU LUT entry 765 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x27F0++0x3
|
|
line.long 0x0 "LUT766L,Graphic MMU LUT entry 766 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x27F8++0x3
|
|
line.long 0x0 "LUT767L,Graphic MMU LUT entry 767 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2800++0x3
|
|
line.long 0x0 "LUT768L,Graphic MMU LUT entry 768 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2808++0x3
|
|
line.long 0x0 "LUT769L,Graphic MMU LUT entry 769 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2810++0x3
|
|
line.long 0x0 "LUT770L,Graphic MMU LUT entry 770 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2818++0x3
|
|
line.long 0x0 "LUT771L,Graphic MMU LUT entry 771 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2820++0x3
|
|
line.long 0x0 "LUT772L,Graphic MMU LUT entry 772 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2828++0x3
|
|
line.long 0x0 "LUT773L,Graphic MMU LUT entry 773 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2830++0x3
|
|
line.long 0x0 "LUT774L,Graphic MMU LUT entry 774 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2838++0x3
|
|
line.long 0x0 "LUT775L,Graphic MMU LUT entry 775 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2840++0x3
|
|
line.long 0x0 "LUT776L,Graphic MMU LUT entry 776 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2848++0x3
|
|
line.long 0x0 "LUT777L,Graphic MMU LUT entry 777 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2850++0x3
|
|
line.long 0x0 "LUT778L,Graphic MMU LUT entry 778 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2858++0x3
|
|
line.long 0x0 "LUT779L,Graphic MMU LUT entry 779 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2860++0x3
|
|
line.long 0x0 "LUT780L,Graphic MMU LUT entry 780 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2868++0x3
|
|
line.long 0x0 "LUT781L,Graphic MMU LUT entry 781 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2870++0x3
|
|
line.long 0x0 "LUT782L,Graphic MMU LUT entry 782 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2878++0x3
|
|
line.long 0x0 "LUT783L,Graphic MMU LUT entry 783 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2880++0x3
|
|
line.long 0x0 "LUT784L,Graphic MMU LUT entry 784 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2888++0x3
|
|
line.long 0x0 "LUT785L,Graphic MMU LUT entry 785 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2890++0x3
|
|
line.long 0x0 "LUT786L,Graphic MMU LUT entry 786 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2898++0x3
|
|
line.long 0x0 "LUT787L,Graphic MMU LUT entry 787 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x28A0++0x3
|
|
line.long 0x0 "LUT788L,Graphic MMU LUT entry 788 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x28A8++0x3
|
|
line.long 0x0 "LUT789L,Graphic MMU LUT entry 789 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x28B0++0x3
|
|
line.long 0x0 "LUT790L,Graphic MMU LUT entry 790 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x28B8++0x3
|
|
line.long 0x0 "LUT791L,Graphic MMU LUT entry 791 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x28C0++0x3
|
|
line.long 0x0 "LUT792L,Graphic MMU LUT entry 792 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x28C8++0x3
|
|
line.long 0x0 "LUT793L,Graphic MMU LUT entry 793 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x28D0++0x3
|
|
line.long 0x0 "LUT794L,Graphic MMU LUT entry 794 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x28D8++0x3
|
|
line.long 0x0 "LUT795L,Graphic MMU LUT entry 795 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x28E0++0x3
|
|
line.long 0x0 "LUT796L,Graphic MMU LUT entry 796 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x28E8++0x3
|
|
line.long 0x0 "LUT797L,Graphic MMU LUT entry 797 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x28F0++0x3
|
|
line.long 0x0 "LUT798L,Graphic MMU LUT entry 798 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x28F8++0x3
|
|
line.long 0x0 "LUT799L,Graphic MMU LUT entry 799 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2900++0x3
|
|
line.long 0x0 "LUT800L,Graphic MMU LUT entry 800 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2908++0x3
|
|
line.long 0x0 "LUT801L,Graphic MMU LUT entry 801 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2910++0x3
|
|
line.long 0x0 "LUT802L,Graphic MMU LUT entry 802 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2918++0x3
|
|
line.long 0x0 "LUT803L,Graphic MMU LUT entry 803 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2920++0x3
|
|
line.long 0x0 "LUT804L,Graphic MMU LUT entry 804 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2928++0x3
|
|
line.long 0x0 "LUT805L,Graphic MMU LUT entry 805 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2930++0x3
|
|
line.long 0x0 "LUT806L,Graphic MMU LUT entry 806 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2938++0x3
|
|
line.long 0x0 "LUT807L,Graphic MMU LUT entry 807 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2940++0x3
|
|
line.long 0x0 "LUT808L,Graphic MMU LUT entry 808 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2948++0x3
|
|
line.long 0x0 "LUT809L,Graphic MMU LUT entry 809 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2950++0x3
|
|
line.long 0x0 "LUT810L,Graphic MMU LUT entry 810 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2958++0x3
|
|
line.long 0x0 "LUT811L,Graphic MMU LUT entry 811 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2960++0x3
|
|
line.long 0x0 "LUT812L,Graphic MMU LUT entry 812 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2968++0x3
|
|
line.long 0x0 "LUT813L,Graphic MMU LUT entry 813 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2970++0x3
|
|
line.long 0x0 "LUT814L,Graphic MMU LUT entry 814 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2978++0x3
|
|
line.long 0x0 "LUT815L,Graphic MMU LUT entry 815 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2980++0x3
|
|
line.long 0x0 "LUT816L,Graphic MMU LUT entry 816 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2988++0x3
|
|
line.long 0x0 "LUT817L,Graphic MMU LUT entry 817 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2990++0x3
|
|
line.long 0x0 "LUT818L,Graphic MMU LUT entry 818 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2998++0x3
|
|
line.long 0x0 "LUT819L,Graphic MMU LUT entry 819 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x29A0++0x3
|
|
line.long 0x0 "LUT820L,Graphic MMU LUT entry 820 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x29A8++0x3
|
|
line.long 0x0 "LUT821L,Graphic MMU LUT entry 821 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x29B0++0x3
|
|
line.long 0x0 "LUT822L,Graphic MMU LUT entry 822 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x29B8++0x3
|
|
line.long 0x0 "LUT823L,Graphic MMU LUT entry 823 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x29C0++0x3
|
|
line.long 0x0 "LUT824L,Graphic MMU LUT entry 824 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x29C8++0x3
|
|
line.long 0x0 "LUT825L,Graphic MMU LUT entry 825 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x29D0++0x3
|
|
line.long 0x0 "LUT826L,Graphic MMU LUT entry 826 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x29D8++0x3
|
|
line.long 0x0 "LUT827L,Graphic MMU LUT entry 827 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x29E0++0x3
|
|
line.long 0x0 "LUT828L,Graphic MMU LUT entry 828 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x29E8++0x3
|
|
line.long 0x0 "LUT829L,Graphic MMU LUT entry 829 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x29F0++0x3
|
|
line.long 0x0 "LUT830L,Graphic MMU LUT entry 830 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x29F8++0x3
|
|
line.long 0x0 "LUT831L,Graphic MMU LUT entry 831 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2A00++0x3
|
|
line.long 0x0 "LUT832L,Graphic MMU LUT entry 832 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2A08++0x3
|
|
line.long 0x0 "LUT833L,Graphic MMU LUT entry 833 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2A10++0x3
|
|
line.long 0x0 "LUT834L,Graphic MMU LUT entry 834 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2A18++0x3
|
|
line.long 0x0 "LUT835L,Graphic MMU LUT entry 835 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2A20++0x3
|
|
line.long 0x0 "LUT836L,Graphic MMU LUT entry 836 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2A28++0x3
|
|
line.long 0x0 "LUT837L,Graphic MMU LUT entry 837 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2A30++0x3
|
|
line.long 0x0 "LUT838L,Graphic MMU LUT entry 838 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2A38++0x3
|
|
line.long 0x0 "LUT839L,Graphic MMU LUT entry 839 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2A40++0x3
|
|
line.long 0x0 "LUT840L,Graphic MMU LUT entry 840 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2A48++0x3
|
|
line.long 0x0 "LUT841L,Graphic MMU LUT entry 841 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2A50++0x3
|
|
line.long 0x0 "LUT842L,Graphic MMU LUT entry 842 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2A58++0x3
|
|
line.long 0x0 "LUT843L,Graphic MMU LUT entry 843 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2A60++0x3
|
|
line.long 0x0 "LUT844L,Graphic MMU LUT entry 844 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2A68++0x3
|
|
line.long 0x0 "LUT845L,Graphic MMU LUT entry 845 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2A70++0x3
|
|
line.long 0x0 "LUT846L,Graphic MMU LUT entry 846 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2A78++0x3
|
|
line.long 0x0 "LUT847L,Graphic MMU LUT entry 847 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2A80++0x3
|
|
line.long 0x0 "LUT848L,Graphic MMU LUT entry 848 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2A88++0x3
|
|
line.long 0x0 "LUT849L,Graphic MMU LUT entry 849 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2A90++0x3
|
|
line.long 0x0 "LUT850L,Graphic MMU LUT entry 850 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2A98++0x3
|
|
line.long 0x0 "LUT851L,Graphic MMU LUT entry 851 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2AA0++0x3
|
|
line.long 0x0 "LUT852L,Graphic MMU LUT entry 852 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2AA8++0x3
|
|
line.long 0x0 "LUT853L,Graphic MMU LUT entry 853 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2AB0++0x3
|
|
line.long 0x0 "LUT854L,Graphic MMU LUT entry 854 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2AB8++0x3
|
|
line.long 0x0 "LUT855L,Graphic MMU LUT entry 855 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2AC0++0x3
|
|
line.long 0x0 "LUT856L,Graphic MMU LUT entry 856 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2AC8++0x3
|
|
line.long 0x0 "LUT857L,Graphic MMU LUT entry 857 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2AD0++0x3
|
|
line.long 0x0 "LUT858L,Graphic MMU LUT entry 858 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2AD8++0x3
|
|
line.long 0x0 "LUT859L,Graphic MMU LUT entry 859 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2AE0++0x3
|
|
line.long 0x0 "LUT860L,Graphic MMU LUT entry 860 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2AE8++0x3
|
|
line.long 0x0 "LUT861L,Graphic MMU LUT entry 861 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2AF0++0x3
|
|
line.long 0x0 "LUT862L,Graphic MMU LUT entry 862 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2AF8++0x3
|
|
line.long 0x0 "LUT863L,Graphic MMU LUT entry 863 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2B00++0x3
|
|
line.long 0x0 "LUT864L,Graphic MMU LUT entry 864 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2B08++0x3
|
|
line.long 0x0 "LUT865L,Graphic MMU LUT entry 865 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2B10++0x3
|
|
line.long 0x0 "LUT866L,Graphic MMU LUT entry 866 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2B18++0x3
|
|
line.long 0x0 "LUT867L,Graphic MMU LUT entry 867 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2B20++0x3
|
|
line.long 0x0 "LUT868L,Graphic MMU LUT entry 868 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2B28++0x3
|
|
line.long 0x0 "LUT869L,Graphic MMU LUT entry 869 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2B30++0x3
|
|
line.long 0x0 "LUT870L,Graphic MMU LUT entry 870 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2B38++0x3
|
|
line.long 0x0 "LUT871L,Graphic MMU LUT entry 871 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2B40++0x3
|
|
line.long 0x0 "LUT872L,Graphic MMU LUT entry 872 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2B48++0x3
|
|
line.long 0x0 "LUT873L,Graphic MMU LUT entry 873 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2B50++0x3
|
|
line.long 0x0 "LUT874L,Graphic MMU LUT entry 874 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2B58++0x3
|
|
line.long 0x0 "LUT875L,Graphic MMU LUT entry 875 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2B60++0x3
|
|
line.long 0x0 "LUT876L,Graphic MMU LUT entry 876 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2B68++0x3
|
|
line.long 0x0 "LUT877L,Graphic MMU LUT entry 877 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2B70++0x3
|
|
line.long 0x0 "LUT878L,Graphic MMU LUT entry 878 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2B78++0x3
|
|
line.long 0x0 "LUT879L,Graphic MMU LUT entry 879 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2B80++0x3
|
|
line.long 0x0 "LUT880L,Graphic MMU LUT entry 880 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2B88++0x3
|
|
line.long 0x0 "LUT881L,Graphic MMU LUT entry 881 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2B90++0x3
|
|
line.long 0x0 "LUT882L,Graphic MMU LUT entry 882 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2B98++0x3
|
|
line.long 0x0 "LUT883L,Graphic MMU LUT entry 883 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2BA0++0x3
|
|
line.long 0x0 "LUT884L,Graphic MMU LUT entry 884 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2BA8++0x3
|
|
line.long 0x0 "LUT885L,Graphic MMU LUT entry 885 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2BB0++0x3
|
|
line.long 0x0 "LUT886L,Graphic MMU LUT entry 886 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2BB8++0x3
|
|
line.long 0x0 "LUT887L,Graphic MMU LUT entry 887 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2BC0++0x3
|
|
line.long 0x0 "LUT888L,Graphic MMU LUT entry 888 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2BC8++0x3
|
|
line.long 0x0 "LUT889L,Graphic MMU LUT entry 889 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2BD0++0x3
|
|
line.long 0x0 "LUT890L,Graphic MMU LUT entry 890 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2BD8++0x3
|
|
line.long 0x0 "LUT891L,Graphic MMU LUT entry 891 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2BE0++0x3
|
|
line.long 0x0 "LUT892L,Graphic MMU LUT entry 892 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2BE8++0x3
|
|
line.long 0x0 "LUT893L,Graphic MMU LUT entry 893 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2BF0++0x3
|
|
line.long 0x0 "LUT894L,Graphic MMU LUT entry 894 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2BF8++0x3
|
|
line.long 0x0 "LUT895L,Graphic MMU LUT entry 895 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2C00++0x3
|
|
line.long 0x0 "LUT896L,Graphic MMU LUT entry 896 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2C08++0x3
|
|
line.long 0x0 "LUT897L,Graphic MMU LUT entry 897 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2C10++0x3
|
|
line.long 0x0 "LUT898L,Graphic MMU LUT entry 898 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2C18++0x3
|
|
line.long 0x0 "LUT899L,Graphic MMU LUT entry 899 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2C20++0x3
|
|
line.long 0x0 "LUT900L,Graphic MMU LUT entry 900 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2C28++0x3
|
|
line.long 0x0 "LUT901L,Graphic MMU LUT entry 901 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2C30++0x3
|
|
line.long 0x0 "LUT902L,Graphic MMU LUT entry 902 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2C38++0x3
|
|
line.long 0x0 "LUT903L,Graphic MMU LUT entry 903 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2C40++0x3
|
|
line.long 0x0 "LUT904L,Graphic MMU LUT entry 904 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2C48++0x3
|
|
line.long 0x0 "LUT905L,Graphic MMU LUT entry 905 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2C50++0x3
|
|
line.long 0x0 "LUT906L,Graphic MMU LUT entry 906 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2C58++0x3
|
|
line.long 0x0 "LUT907L,Graphic MMU LUT entry 907 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2C60++0x3
|
|
line.long 0x0 "LUT908L,Graphic MMU LUT entry 908 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2C68++0x3
|
|
line.long 0x0 "LUT909L,Graphic MMU LUT entry 909 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2C70++0x3
|
|
line.long 0x0 "LUT910L,Graphic MMU LUT entry 910 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2C78++0x3
|
|
line.long 0x0 "LUT911L,Graphic MMU LUT entry 911 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2C80++0x3
|
|
line.long 0x0 "LUT912L,Graphic MMU LUT entry 912 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2C88++0x3
|
|
line.long 0x0 "LUT913L,Graphic MMU LUT entry 913 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2C90++0x3
|
|
line.long 0x0 "LUT914L,Graphic MMU LUT entry 914 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2C98++0x3
|
|
line.long 0x0 "LUT915L,Graphic MMU LUT entry 915 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2CA0++0x3
|
|
line.long 0x0 "LUT916L,Graphic MMU LUT entry 916 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2CA8++0x3
|
|
line.long 0x0 "LUT917L,Graphic MMU LUT entry 917 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2CB0++0x3
|
|
line.long 0x0 "LUT918L,Graphic MMU LUT entry 918 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2CB8++0x3
|
|
line.long 0x0 "LUT919L,Graphic MMU LUT entry 919 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2CC0++0x3
|
|
line.long 0x0 "LUT920L,Graphic MMU LUT entry 920 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2CC8++0x3
|
|
line.long 0x0 "LUT921L,Graphic MMU LUT entry 921 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2CD0++0x3
|
|
line.long 0x0 "LUT922L,Graphic MMU LUT entry 922 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2CD8++0x3
|
|
line.long 0x0 "LUT923L,Graphic MMU LUT entry 923 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2CE0++0x3
|
|
line.long 0x0 "LUT924L,Graphic MMU LUT entry 924 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2CE8++0x3
|
|
line.long 0x0 "LUT925L,Graphic MMU LUT entry 925 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2CF0++0x3
|
|
line.long 0x0 "LUT926L,Graphic MMU LUT entry 926 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2CF8++0x3
|
|
line.long 0x0 "LUT927L,Graphic MMU LUT entry 927 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2D00++0x3
|
|
line.long 0x0 "LUT928L,Graphic MMU LUT entry 928 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2D08++0x3
|
|
line.long 0x0 "LUT929L,Graphic MMU LUT entry 929 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2D10++0x3
|
|
line.long 0x0 "LUT930L,Graphic MMU LUT entry 930 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2D18++0x3
|
|
line.long 0x0 "LUT931L,Graphic MMU LUT entry 931 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2D20++0x3
|
|
line.long 0x0 "LUT932L,Graphic MMU LUT entry 932 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2D28++0x3
|
|
line.long 0x0 "LUT933L,Graphic MMU LUT entry 933 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2D30++0x3
|
|
line.long 0x0 "LUT934L,Graphic MMU LUT entry 934 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2D38++0x3
|
|
line.long 0x0 "LUT935L,Graphic MMU LUT entry 935 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2D40++0x3
|
|
line.long 0x0 "LUT936L,Graphic MMU LUT entry 936 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2D48++0x3
|
|
line.long 0x0 "LUT937L,Graphic MMU LUT entry 937 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2D50++0x3
|
|
line.long 0x0 "LUT938L,Graphic MMU LUT entry 938 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2D58++0x3
|
|
line.long 0x0 "LUT939L,Graphic MMU LUT entry 939 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2D60++0x3
|
|
line.long 0x0 "LUT940L,Graphic MMU LUT entry 940 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2D68++0x3
|
|
line.long 0x0 "LUT941L,Graphic MMU LUT entry 941 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2D70++0x3
|
|
line.long 0x0 "LUT942L,Graphic MMU LUT entry 942 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2D78++0x3
|
|
line.long 0x0 "LUT943L,Graphic MMU LUT entry 943 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2D80++0x3
|
|
line.long 0x0 "LUT944L,Graphic MMU LUT entry 944 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2D88++0x3
|
|
line.long 0x0 "LUT945L,Graphic MMU LUT entry 945 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2D90++0x3
|
|
line.long 0x0 "LUT946L,Graphic MMU LUT entry 946 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2D98++0x3
|
|
line.long 0x0 "LUT947L,Graphic MMU LUT entry 947 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2DA0++0x3
|
|
line.long 0x0 "LUT948L,Graphic MMU LUT entry 948 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2DA8++0x3
|
|
line.long 0x0 "LUT949L,Graphic MMU LUT entry 949 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2DB0++0x3
|
|
line.long 0x0 "LUT950L,Graphic MMU LUT entry 950 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2DB8++0x3
|
|
line.long 0x0 "LUT951L,Graphic MMU LUT entry 951 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2DC0++0x3
|
|
line.long 0x0 "LUT952L,Graphic MMU LUT entry 952 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2DC8++0x3
|
|
line.long 0x0 "LUT953L,Graphic MMU LUT entry 953 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2DD0++0x3
|
|
line.long 0x0 "LUT954L,Graphic MMU LUT entry 954 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2DD8++0x3
|
|
line.long 0x0 "LUT955L,Graphic MMU LUT entry 955 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2DE0++0x3
|
|
line.long 0x0 "LUT956L,Graphic MMU LUT entry 956 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2DE8++0x3
|
|
line.long 0x0 "LUT957L,Graphic MMU LUT entry 957 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2DF0++0x3
|
|
line.long 0x0 "LUT958L,Graphic MMU LUT entry 958 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2DF8++0x3
|
|
line.long 0x0 "LUT959L,Graphic MMU LUT entry 959 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2E00++0x3
|
|
line.long 0x0 "LUT960L,Graphic MMU LUT entry 960 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2E08++0x3
|
|
line.long 0x0 "LUT961L,Graphic MMU LUT entry 961 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2E10++0x3
|
|
line.long 0x0 "LUT962L,Graphic MMU LUT entry 962 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2E18++0x3
|
|
line.long 0x0 "LUT963L,Graphic MMU LUT entry 963 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2E20++0x3
|
|
line.long 0x0 "LUT964L,Graphic MMU LUT entry 964 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2E28++0x3
|
|
line.long 0x0 "LUT965L,Graphic MMU LUT entry 965 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2E30++0x3
|
|
line.long 0x0 "LUT966L,Graphic MMU LUT entry 966 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2E38++0x3
|
|
line.long 0x0 "LUT967L,Graphic MMU LUT entry 967 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2E40++0x3
|
|
line.long 0x0 "LUT968L,Graphic MMU LUT entry 968 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2E48++0x3
|
|
line.long 0x0 "LUT969L,Graphic MMU LUT entry 969 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2E50++0x3
|
|
line.long 0x0 "LUT970L,Graphic MMU LUT entry 970 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2E58++0x3
|
|
line.long 0x0 "LUT971L,Graphic MMU LUT entry 971 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2E60++0x3
|
|
line.long 0x0 "LUT972L,Graphic MMU LUT entry 972 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2E68++0x3
|
|
line.long 0x0 "LUT973L,Graphic MMU LUT entry 973 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2E70++0x3
|
|
line.long 0x0 "LUT974L,Graphic MMU LUT entry 974 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2E78++0x3
|
|
line.long 0x0 "LUT975L,Graphic MMU LUT entry 975 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2E80++0x3
|
|
line.long 0x0 "LUT976L,Graphic MMU LUT entry 976 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2E88++0x3
|
|
line.long 0x0 "LUT977L,Graphic MMU LUT entry 977 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2E90++0x3
|
|
line.long 0x0 "LUT978L,Graphic MMU LUT entry 978 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2E98++0x3
|
|
line.long 0x0 "LUT979L,Graphic MMU LUT entry 979 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2EA0++0x3
|
|
line.long 0x0 "LUT980L,Graphic MMU LUT entry 980 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2EA8++0x3
|
|
line.long 0x0 "LUT981L,Graphic MMU LUT entry 981 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2EB0++0x3
|
|
line.long 0x0 "LUT982L,Graphic MMU LUT entry 982 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2EB8++0x3
|
|
line.long 0x0 "LUT983L,Graphic MMU LUT entry 983 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2EC0++0x3
|
|
line.long 0x0 "LUT984L,Graphic MMU LUT entry 984 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2EC8++0x3
|
|
line.long 0x0 "LUT985L,Graphic MMU LUT entry 985 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2ED0++0x3
|
|
line.long 0x0 "LUT986L,Graphic MMU LUT entry 986 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2ED8++0x3
|
|
line.long 0x0 "LUT987L,Graphic MMU LUT entry 987 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2EE0++0x3
|
|
line.long 0x0 "LUT988L,Graphic MMU LUT entry 988 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2EE8++0x3
|
|
line.long 0x0 "LUT989L,Graphic MMU LUT entry 989 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2EF0++0x3
|
|
line.long 0x0 "LUT990L,Graphic MMU LUT entry 990 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2EF8++0x3
|
|
line.long 0x0 "LUT991L,Graphic MMU LUT entry 991 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2F00++0x3
|
|
line.long 0x0 "LUT992L,Graphic MMU LUT entry 992 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2F08++0x3
|
|
line.long 0x0 "LUT993L,Graphic MMU LUT entry 993 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2F10++0x3
|
|
line.long 0x0 "LUT994L,Graphic MMU LUT entry 994 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2F18++0x3
|
|
line.long 0x0 "LUT995L,Graphic MMU LUT entry 995 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2F20++0x3
|
|
line.long 0x0 "LUT996L,Graphic MMU LUT entry 996 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2F28++0x3
|
|
line.long 0x0 "LUT997L,Graphic MMU LUT entry 997 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2F30++0x3
|
|
line.long 0x0 "LUT998L,Graphic MMU LUT entry 998 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2F38++0x3
|
|
line.long 0x0 "LUT999L,Graphic MMU LUT entry 999 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2F40++0x3
|
|
line.long 0x0 "LUT1000L,Graphic MMU LUT entry 1000 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2F48++0x3
|
|
line.long 0x0 "LUT1001L,Graphic MMU LUT entry 1001 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2F50++0x3
|
|
line.long 0x0 "LUT1002L,Graphic MMU LUT entry 1002 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2F58++0x3
|
|
line.long 0x0 "LUT1003L,Graphic MMU LUT entry 1003 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2F60++0x3
|
|
line.long 0x0 "LUT1004L,Graphic MMU LUT entry 1004 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2F68++0x3
|
|
line.long 0x0 "LUT1005L,Graphic MMU LUT entry 1005 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2F70++0x3
|
|
line.long 0x0 "LUT1006L,Graphic MMU LUT entry 1006 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2F78++0x3
|
|
line.long 0x0 "LUT1007L,Graphic MMU LUT entry 1007 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2F80++0x3
|
|
line.long 0x0 "LUT1008L,Graphic MMU LUT entry 1008 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2F88++0x3
|
|
line.long 0x0 "LUT1009L,Graphic MMU LUT entry 1009 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2F90++0x3
|
|
line.long 0x0 "LUT1010L,Graphic MMU LUT entry 1010 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2F98++0x3
|
|
line.long 0x0 "LUT1011L,Graphic MMU LUT entry 1011 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2FA0++0x3
|
|
line.long 0x0 "LUT1012L,Graphic MMU LUT entry 1012 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2FA8++0x3
|
|
line.long 0x0 "LUT1013L,Graphic MMU LUT entry 1013 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2FB0++0x3
|
|
line.long 0x0 "LUT1014L,Graphic MMU LUT entry 1014 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2FB8++0x3
|
|
line.long 0x0 "LUT1015L,Graphic MMU LUT entry 1015 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2FC0++0x3
|
|
line.long 0x0 "LUT1016L,Graphic MMU LUT entry 1016 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2FC8++0x3
|
|
line.long 0x0 "LUT1017L,Graphic MMU LUT entry 1017 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2FD0++0x3
|
|
line.long 0x0 "LUT1018L,Graphic MMU LUT entry 1018 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2FD8++0x3
|
|
line.long 0x0 "LUT1019L,Graphic MMU LUT entry 1019 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2FE0++0x3
|
|
line.long 0x0 "LUT1020L,Graphic MMU LUT entry 1020 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2FE8++0x3
|
|
line.long 0x0 "LUT1021L,Graphic MMU LUT entry 1021 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2FF0++0x3
|
|
line.long 0x0 "LUT1022L,Graphic MMU LUT entry 1022 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x2FF8++0x3
|
|
line.long 0x0 "LUT1023L,Graphic MMU LUT entry 1023 low"
|
|
hexmask.long.byte 0x0 16.--23. 1. "LVB,Last Valid Block"
|
|
hexmask.long.byte 0x0 8.--15. 1. "FVB,First Valid Block"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x1004++0x3
|
|
line.long 0x0 "LUT0H,Graphic MMU LUT entry 0 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x100C++0x3
|
|
line.long 0x0 "LUT1H,Graphic MMU LUT entry 1 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1014++0x3
|
|
line.long 0x0 "LUT2H,Graphic MMU LUT entry 2 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x101C++0x3
|
|
line.long 0x0 "LUT3H,Graphic MMU LUT entry 3 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1024++0x3
|
|
line.long 0x0 "LUT4H,Graphic MMU LUT entry 4 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x102C++0x3
|
|
line.long 0x0 "LUT5H,Graphic MMU LUT entry 5 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1034++0x3
|
|
line.long 0x0 "LUT6H,Graphic MMU LUT entry 6 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x103C++0x3
|
|
line.long 0x0 "LUT7H,Graphic MMU LUT entry 7 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1044++0x3
|
|
line.long 0x0 "LUT8H,Graphic MMU LUT entry 8 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x104C++0x3
|
|
line.long 0x0 "LUT9H,Graphic MMU LUT entry 9 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1054++0x3
|
|
line.long 0x0 "LUT10H,Graphic MMU LUT entry 10 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x105C++0x3
|
|
line.long 0x0 "LUT11H,Graphic MMU LUT entry 11 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1064++0x3
|
|
line.long 0x0 "LUT12H,Graphic MMU LUT entry 12 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x106C++0x3
|
|
line.long 0x0 "LUT13H,Graphic MMU LUT entry 13 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1074++0x3
|
|
line.long 0x0 "LUT14H,Graphic MMU LUT entry 14 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x107C++0x3
|
|
line.long 0x0 "LUT15H,Graphic MMU LUT entry 15 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1084++0x3
|
|
line.long 0x0 "LUT16H,Graphic MMU LUT entry 16 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x108C++0x3
|
|
line.long 0x0 "LUT17H,Graphic MMU LUT entry 17 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1094++0x3
|
|
line.long 0x0 "LUT18H,Graphic MMU LUT entry 18 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x109C++0x3
|
|
line.long 0x0 "LUT19H,Graphic MMU LUT entry 19 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x10A4++0x3
|
|
line.long 0x0 "LUT20H,Graphic MMU LUT entry 20 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x10AC++0x3
|
|
line.long 0x0 "LUT21H,Graphic MMU LUT entry 21 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x10B4++0x3
|
|
line.long 0x0 "LUT22H,Graphic MMU LUT entry 22 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x10BC++0x3
|
|
line.long 0x0 "LUT23H,Graphic MMU LUT entry 23 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x10C4++0x3
|
|
line.long 0x0 "LUT24H,Graphic MMU LUT entry 24 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x10CC++0x3
|
|
line.long 0x0 "LUT25H,Graphic MMU LUT entry 25 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x10D4++0x3
|
|
line.long 0x0 "LUT26H,Graphic MMU LUT entry 26 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x10DC++0x3
|
|
line.long 0x0 "LUT27H,Graphic MMU LUT entry 27 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x10E4++0x3
|
|
line.long 0x0 "LUT28H,Graphic MMU LUT entry 28 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x10EC++0x3
|
|
line.long 0x0 "LUT29H,Graphic MMU LUT entry 29 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x10F4++0x3
|
|
line.long 0x0 "LUT30H,Graphic MMU LUT entry 30 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x10FC++0x3
|
|
line.long 0x0 "LUT31H,Graphic MMU LUT entry 31 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1104++0x3
|
|
line.long 0x0 "LUT32H,Graphic MMU LUT entry 32 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x110C++0x3
|
|
line.long 0x0 "LUT33H,Graphic MMU LUT entry 33 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1114++0x3
|
|
line.long 0x0 "LUT34H,Graphic MMU LUT entry 34 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x111C++0x3
|
|
line.long 0x0 "LUT35H,Graphic MMU LUT entry 35 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1124++0x3
|
|
line.long 0x0 "LUT36H,Graphic MMU LUT entry 36 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x112C++0x3
|
|
line.long 0x0 "LUT37H,Graphic MMU LUT entry 37 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1134++0x3
|
|
line.long 0x0 "LUT38H,Graphic MMU LUT entry 38 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x113C++0x3
|
|
line.long 0x0 "LUT39H,Graphic MMU LUT entry 39 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1144++0x3
|
|
line.long 0x0 "LUT40H,Graphic MMU LUT entry 40 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x114C++0x3
|
|
line.long 0x0 "LUT41H,Graphic MMU LUT entry 41 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1154++0x3
|
|
line.long 0x0 "LUT42H,Graphic MMU LUT entry 42 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x115C++0x3
|
|
line.long 0x0 "LUT43H,Graphic MMU LUT entry 43 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1164++0x3
|
|
line.long 0x0 "LUT44H,Graphic MMU LUT entry 44 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x116C++0x3
|
|
line.long 0x0 "LUT45H,Graphic MMU LUT entry 45 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1174++0x3
|
|
line.long 0x0 "LUT46H,Graphic MMU LUT entry 46 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x117C++0x3
|
|
line.long 0x0 "LUT47H,Graphic MMU LUT entry 47 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1184++0x3
|
|
line.long 0x0 "LUT48H,Graphic MMU LUT entry 48 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x118C++0x3
|
|
line.long 0x0 "LUT49H,Graphic MMU LUT entry 49 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1194++0x3
|
|
line.long 0x0 "LUT50H,Graphic MMU LUT entry 50 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x119C++0x3
|
|
line.long 0x0 "LUT51H,Graphic MMU LUT entry 51 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x11A4++0x3
|
|
line.long 0x0 "LUT52H,Graphic MMU LUT entry 52 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x11AC++0x3
|
|
line.long 0x0 "LUT53H,Graphic MMU LUT entry 53 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x11B4++0x3
|
|
line.long 0x0 "LUT54H,Graphic MMU LUT entry 54 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x11BC++0x3
|
|
line.long 0x0 "LUT55H,Graphic MMU LUT entry 55 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x11C4++0x3
|
|
line.long 0x0 "LUT56H,Graphic MMU LUT entry 56 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x11CC++0x3
|
|
line.long 0x0 "LUT57H,Graphic MMU LUT entry 57 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x11D4++0x3
|
|
line.long 0x0 "LUT58H,Graphic MMU LUT entry 58 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x11DC++0x3
|
|
line.long 0x0 "LUT59H,Graphic MMU LUT entry 59 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x11E4++0x3
|
|
line.long 0x0 "LUT60H,Graphic MMU LUT entry 60 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x11EC++0x3
|
|
line.long 0x0 "LUT61H,Graphic MMU LUT entry 61 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x11F4++0x3
|
|
line.long 0x0 "LUT62H,Graphic MMU LUT entry 62 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x11FC++0x3
|
|
line.long 0x0 "LUT63H,Graphic MMU LUT entry 63 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1204++0x3
|
|
line.long 0x0 "LUT64H,Graphic MMU LUT entry 64 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x120C++0x3
|
|
line.long 0x0 "LUT65H,Graphic MMU LUT entry 65 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1214++0x3
|
|
line.long 0x0 "LUT66H,Graphic MMU LUT entry 66 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x121C++0x3
|
|
line.long 0x0 "LUT67H,Graphic MMU LUT entry 67 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1224++0x3
|
|
line.long 0x0 "LUT68H,Graphic MMU LUT entry 68 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x122C++0x3
|
|
line.long 0x0 "LUT69H,Graphic MMU LUT entry 69 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1234++0x3
|
|
line.long 0x0 "LUT70H,Graphic MMU LUT entry 70 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x123C++0x3
|
|
line.long 0x0 "LUT71H,Graphic MMU LUT entry 71 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1244++0x3
|
|
line.long 0x0 "LUT72H,Graphic MMU LUT entry 72 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x124C++0x3
|
|
line.long 0x0 "LUT73H,Graphic MMU LUT entry 73 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1254++0x3
|
|
line.long 0x0 "LUT74H,Graphic MMU LUT entry 74 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x125C++0x3
|
|
line.long 0x0 "LUT75H,Graphic MMU LUT entry 75 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1264++0x3
|
|
line.long 0x0 "LUT76H,Graphic MMU LUT entry 76 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x126C++0x3
|
|
line.long 0x0 "LUT77H,Graphic MMU LUT entry 77 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1274++0x3
|
|
line.long 0x0 "LUT78H,Graphic MMU LUT entry 78 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x127C++0x3
|
|
line.long 0x0 "LUT79H,Graphic MMU LUT entry 79 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1284++0x3
|
|
line.long 0x0 "LUT80H,Graphic MMU LUT entry 80 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x128C++0x3
|
|
line.long 0x0 "LUT81H,Graphic MMU LUT entry 81 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1294++0x3
|
|
line.long 0x0 "LUT82H,Graphic MMU LUT entry 82 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x129C++0x3
|
|
line.long 0x0 "LUT83H,Graphic MMU LUT entry 83 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x12A4++0x3
|
|
line.long 0x0 "LUT84H,Graphic MMU LUT entry 84 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x12AC++0x3
|
|
line.long 0x0 "LUT85H,Graphic MMU LUT entry 85 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x12B4++0x3
|
|
line.long 0x0 "LUT86H,Graphic MMU LUT entry 86 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x12BC++0x3
|
|
line.long 0x0 "LUT87H,Graphic MMU LUT entry 87 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x12C4++0x3
|
|
line.long 0x0 "LUT88H,Graphic MMU LUT entry 88 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x12CC++0x3
|
|
line.long 0x0 "LUT89H,Graphic MMU LUT entry 89 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x12D4++0x3
|
|
line.long 0x0 "LUT90H,Graphic MMU LUT entry 90 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x12DC++0x3
|
|
line.long 0x0 "LUT91H,Graphic MMU LUT entry 91 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x12E4++0x3
|
|
line.long 0x0 "LUT92H,Graphic MMU LUT entry 92 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x12EC++0x3
|
|
line.long 0x0 "LUT93H,Graphic MMU LUT entry 93 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x12F4++0x3
|
|
line.long 0x0 "LUT94H,Graphic MMU LUT entry 94 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x12FC++0x3
|
|
line.long 0x0 "LUT95H,Graphic MMU LUT entry 95 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1304++0x3
|
|
line.long 0x0 "LUT96H,Graphic MMU LUT entry 96 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x130C++0x3
|
|
line.long 0x0 "LUT97H,Graphic MMU LUT entry 97 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1314++0x3
|
|
line.long 0x0 "LUT98H,Graphic MMU LUT entry 98 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x131C++0x3
|
|
line.long 0x0 "LUT99H,Graphic MMU LUT entry 99 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1324++0x3
|
|
line.long 0x0 "LUT100H,Graphic MMU LUT entry 100 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x132C++0x3
|
|
line.long 0x0 "LUT101H,Graphic MMU LUT entry 101 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1334++0x3
|
|
line.long 0x0 "LUT102H,Graphic MMU LUT entry 102 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x133C++0x3
|
|
line.long 0x0 "LUT103H,Graphic MMU LUT entry 103 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1344++0x3
|
|
line.long 0x0 "LUT104H,Graphic MMU LUT entry 104 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x134C++0x3
|
|
line.long 0x0 "LUT105H,Graphic MMU LUT entry 105 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1354++0x3
|
|
line.long 0x0 "LUT106H,Graphic MMU LUT entry 106 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x135C++0x3
|
|
line.long 0x0 "LUT107H,Graphic MMU LUT entry 107 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1364++0x3
|
|
line.long 0x0 "LUT108H,Graphic MMU LUT entry 108 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x136C++0x3
|
|
line.long 0x0 "LUT109H,Graphic MMU LUT entry 109 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1374++0x3
|
|
line.long 0x0 "LUT110H,Graphic MMU LUT entry 110 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x137C++0x3
|
|
line.long 0x0 "LUT111H,Graphic MMU LUT entry 111 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1384++0x3
|
|
line.long 0x0 "LUT112H,Graphic MMU LUT entry 112 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x138C++0x3
|
|
line.long 0x0 "LUT113H,Graphic MMU LUT entry 113 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1394++0x3
|
|
line.long 0x0 "LUT114H,Graphic MMU LUT entry 114 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x139C++0x3
|
|
line.long 0x0 "LUT115H,Graphic MMU LUT entry 115 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x13A4++0x3
|
|
line.long 0x0 "LUT116H,Graphic MMU LUT entry 116 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x13AC++0x3
|
|
line.long 0x0 "LUT117H,Graphic MMU LUT entry 117 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x13B4++0x3
|
|
line.long 0x0 "LUT118H,Graphic MMU LUT entry 118 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x13BC++0x3
|
|
line.long 0x0 "LUT119H,Graphic MMU LUT entry 119 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x13C4++0x3
|
|
line.long 0x0 "LUT120H,Graphic MMU LUT entry 120 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x13CC++0x3
|
|
line.long 0x0 "LUT121H,Graphic MMU LUT entry 121 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x13D4++0x3
|
|
line.long 0x0 "LUT122H,Graphic MMU LUT entry 122 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x13DC++0x3
|
|
line.long 0x0 "LUT123H,Graphic MMU LUT entry 123 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x13E4++0x3
|
|
line.long 0x0 "LUT124H,Graphic MMU LUT entry 124 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x13EC++0x3
|
|
line.long 0x0 "LUT125H,Graphic MMU LUT entry 125 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x13F4++0x3
|
|
line.long 0x0 "LUT126H,Graphic MMU LUT entry 126 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x13FC++0x3
|
|
line.long 0x0 "LUT127H,Graphic MMU LUT entry 127 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1404++0x3
|
|
line.long 0x0 "LUT128H,Graphic MMU LUT entry 128 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x140C++0x3
|
|
line.long 0x0 "LUT129H,Graphic MMU LUT entry 129 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1414++0x3
|
|
line.long 0x0 "LUT130H,Graphic MMU LUT entry 130 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x141C++0x3
|
|
line.long 0x0 "LUT131H,Graphic MMU LUT entry 131 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1424++0x3
|
|
line.long 0x0 "LUT132H,Graphic MMU LUT entry 132 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x142C++0x3
|
|
line.long 0x0 "LUT133H,Graphic MMU LUT entry 133 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1434++0x3
|
|
line.long 0x0 "LUT134H,Graphic MMU LUT entry 134 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x143C++0x3
|
|
line.long 0x0 "LUT135H,Graphic MMU LUT entry 135 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1444++0x3
|
|
line.long 0x0 "LUT136H,Graphic MMU LUT entry 136 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x144C++0x3
|
|
line.long 0x0 "LUT137H,Graphic MMU LUT entry 137 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1454++0x3
|
|
line.long 0x0 "LUT138H,Graphic MMU LUT entry 138 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x145C++0x3
|
|
line.long 0x0 "LUT139H,Graphic MMU LUT entry 139 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1464++0x3
|
|
line.long 0x0 "LUT140H,Graphic MMU LUT entry 140 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x146C++0x3
|
|
line.long 0x0 "LUT141H,Graphic MMU LUT entry 141 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1474++0x3
|
|
line.long 0x0 "LUT142H,Graphic MMU LUT entry 142 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x147C++0x3
|
|
line.long 0x0 "LUT143H,Graphic MMU LUT entry 143 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1484++0x3
|
|
line.long 0x0 "LUT144H,Graphic MMU LUT entry 144 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x148C++0x3
|
|
line.long 0x0 "LUT145H,Graphic MMU LUT entry 145 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1494++0x3
|
|
line.long 0x0 "LUT146H,Graphic MMU LUT entry 146 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x149C++0x3
|
|
line.long 0x0 "LUT147H,Graphic MMU LUT entry 147 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x14A4++0x3
|
|
line.long 0x0 "LUT148H,Graphic MMU LUT entry 148 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x14AC++0x3
|
|
line.long 0x0 "LUT149H,Graphic MMU LUT entry 149 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x14B4++0x3
|
|
line.long 0x0 "LUT150H,Graphic MMU LUT entry 150 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x14BC++0x3
|
|
line.long 0x0 "LUT151H,Graphic MMU LUT entry 151 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x14C4++0x3
|
|
line.long 0x0 "LUT152H,Graphic MMU LUT entry 152 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x14CC++0x3
|
|
line.long 0x0 "LUT153H,Graphic MMU LUT entry 153 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x14D4++0x3
|
|
line.long 0x0 "LUT154H,Graphic MMU LUT entry 154 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x14DC++0x3
|
|
line.long 0x0 "LUT155H,Graphic MMU LUT entry 155 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x14E4++0x3
|
|
line.long 0x0 "LUT156H,Graphic MMU LUT entry 156 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x14EC++0x3
|
|
line.long 0x0 "LUT157H,Graphic MMU LUT entry 157 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x14F4++0x3
|
|
line.long 0x0 "LUT158H,Graphic MMU LUT entry 158 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x14FC++0x3
|
|
line.long 0x0 "LUT159H,Graphic MMU LUT entry 159 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1504++0x3
|
|
line.long 0x0 "LUT160H,Graphic MMU LUT entry 160 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x150C++0x3
|
|
line.long 0x0 "LUT161H,Graphic MMU LUT entry 161 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1514++0x3
|
|
line.long 0x0 "LUT162H,Graphic MMU LUT entry 162 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x151C++0x3
|
|
line.long 0x0 "LUT163H,Graphic MMU LUT entry 163 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1524++0x3
|
|
line.long 0x0 "LUT164H,Graphic MMU LUT entry 164 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x152C++0x3
|
|
line.long 0x0 "LUT165H,Graphic MMU LUT entry 165 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1534++0x3
|
|
line.long 0x0 "LUT166H,Graphic MMU LUT entry 166 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x153C++0x3
|
|
line.long 0x0 "LUT167H,Graphic MMU LUT entry 167 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1544++0x3
|
|
line.long 0x0 "LUT168H,Graphic MMU LUT entry 168 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x154C++0x3
|
|
line.long 0x0 "LUT169H,Graphic MMU LUT entry 169 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1554++0x3
|
|
line.long 0x0 "LUT170H,Graphic MMU LUT entry 170 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x155C++0x3
|
|
line.long 0x0 "LUT171H,Graphic MMU LUT entry 171 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1564++0x3
|
|
line.long 0x0 "LUT172H,Graphic MMU LUT entry 172 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x156C++0x3
|
|
line.long 0x0 "LUT173H,Graphic MMU LUT entry 173 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1574++0x3
|
|
line.long 0x0 "LUT174H,Graphic MMU LUT entry 174 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x157C++0x3
|
|
line.long 0x0 "LUT175H,Graphic MMU LUT entry 175 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1584++0x3
|
|
line.long 0x0 "LUT176H,Graphic MMU LUT entry 176 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x158C++0x3
|
|
line.long 0x0 "LUT177H,Graphic MMU LUT entry 177 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1594++0x3
|
|
line.long 0x0 "LUT178H,Graphic MMU LUT entry 178 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x159C++0x3
|
|
line.long 0x0 "LUT179H,Graphic MMU LUT entry 179 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x15A4++0x3
|
|
line.long 0x0 "LUT180H,Graphic MMU LUT entry 180 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x15AC++0x3
|
|
line.long 0x0 "LUT181H,Graphic MMU LUT entry 181 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x15B4++0x3
|
|
line.long 0x0 "LUT182H,Graphic MMU LUT entry 182 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x15BC++0x3
|
|
line.long 0x0 "LUT183H,Graphic MMU LUT entry 183 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x15C4++0x3
|
|
line.long 0x0 "LUT184H,Graphic MMU LUT entry 184 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x15CC++0x3
|
|
line.long 0x0 "LUT185H,Graphic MMU LUT entry 185 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x15D4++0x3
|
|
line.long 0x0 "LUT186H,Graphic MMU LUT entry 186 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x15DC++0x3
|
|
line.long 0x0 "LUT187H,Graphic MMU LUT entry 187 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x15E4++0x3
|
|
line.long 0x0 "LUT188H,Graphic MMU LUT entry 188 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x15EC++0x3
|
|
line.long 0x0 "LUT189H,Graphic MMU LUT entry 189 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x15F4++0x3
|
|
line.long 0x0 "LUT190H,Graphic MMU LUT entry 190 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x15FC++0x3
|
|
line.long 0x0 "LUT191H,Graphic MMU LUT entry 191 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1604++0x3
|
|
line.long 0x0 "LUT192H,Graphic MMU LUT entry 192 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x160C++0x3
|
|
line.long 0x0 "LUT193H,Graphic MMU LUT entry 193 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1614++0x3
|
|
line.long 0x0 "LUT194H,Graphic MMU LUT entry 194 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x161C++0x3
|
|
line.long 0x0 "LUT195H,Graphic MMU LUT entry 195 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1624++0x3
|
|
line.long 0x0 "LUT196H,Graphic MMU LUT entry 196 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x162C++0x3
|
|
line.long 0x0 "LUT197H,Graphic MMU LUT entry 197 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1634++0x3
|
|
line.long 0x0 "LUT198H,Graphic MMU LUT entry 198 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x163C++0x3
|
|
line.long 0x0 "LUT199H,Graphic MMU LUT entry 199 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1644++0x3
|
|
line.long 0x0 "LUT200H,Graphic MMU LUT entry 200 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x164C++0x3
|
|
line.long 0x0 "LUT201H,Graphic MMU LUT entry 201 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1654++0x3
|
|
line.long 0x0 "LUT202H,Graphic MMU LUT entry 202 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x165C++0x3
|
|
line.long 0x0 "LUT203H,Graphic MMU LUT entry 203 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1664++0x3
|
|
line.long 0x0 "LUT204H,Graphic MMU LUT entry 204 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x166C++0x3
|
|
line.long 0x0 "LUT205H,Graphic MMU LUT entry 205 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1674++0x3
|
|
line.long 0x0 "LUT206H,Graphic MMU LUT entry 206 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x167C++0x3
|
|
line.long 0x0 "LUT207H,Graphic MMU LUT entry 207 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1684++0x3
|
|
line.long 0x0 "LUT208H,Graphic MMU LUT entry 208 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x168C++0x3
|
|
line.long 0x0 "LUT209H,Graphic MMU LUT entry 209 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1694++0x3
|
|
line.long 0x0 "LUT210H,Graphic MMU LUT entry 210 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x169C++0x3
|
|
line.long 0x0 "LUT211H,Graphic MMU LUT entry 211 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x16A4++0x3
|
|
line.long 0x0 "LUT212H,Graphic MMU LUT entry 212 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x16AC++0x3
|
|
line.long 0x0 "LUT213H,Graphic MMU LUT entry 213 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x16B4++0x3
|
|
line.long 0x0 "LUT214H,Graphic MMU LUT entry 214 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x16BC++0x3
|
|
line.long 0x0 "LUT215H,Graphic MMU LUT entry 215 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x16C4++0x3
|
|
line.long 0x0 "LUT216H,Graphic MMU LUT entry 216 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x16CC++0x3
|
|
line.long 0x0 "LUT217H,Graphic MMU LUT entry 217 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x16D4++0x3
|
|
line.long 0x0 "LUT218H,Graphic MMU LUT entry 218 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x16DC++0x3
|
|
line.long 0x0 "LUT219H,Graphic MMU LUT entry 219 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x16E4++0x3
|
|
line.long 0x0 "LUT220H,Graphic MMU LUT entry 220 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x16EC++0x3
|
|
line.long 0x0 "LUT221H,Graphic MMU LUT entry 221 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x16F4++0x3
|
|
line.long 0x0 "LUT222H,Graphic MMU LUT entry 222 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x16FC++0x3
|
|
line.long 0x0 "LUT223H,Graphic MMU LUT entry 223 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1704++0x3
|
|
line.long 0x0 "LUT224H,Graphic MMU LUT entry 224 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x170C++0x3
|
|
line.long 0x0 "LUT225H,Graphic MMU LUT entry 225 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1714++0x3
|
|
line.long 0x0 "LUT226H,Graphic MMU LUT entry 226 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x171C++0x3
|
|
line.long 0x0 "LUT227H,Graphic MMU LUT entry 227 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1724++0x3
|
|
line.long 0x0 "LUT228H,Graphic MMU LUT entry 228 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x172C++0x3
|
|
line.long 0x0 "LUT229H,Graphic MMU LUT entry 229 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1734++0x3
|
|
line.long 0x0 "LUT230H,Graphic MMU LUT entry 230 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x173C++0x3
|
|
line.long 0x0 "LUT231H,Graphic MMU LUT entry 231 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1744++0x3
|
|
line.long 0x0 "LUT232H,Graphic MMU LUT entry 232 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x174C++0x3
|
|
line.long 0x0 "LUT233H,Graphic MMU LUT entry 233 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1754++0x3
|
|
line.long 0x0 "LUT234H,Graphic MMU LUT entry 234 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x175C++0x3
|
|
line.long 0x0 "LUT235H,Graphic MMU LUT entry 235 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1764++0x3
|
|
line.long 0x0 "LUT236H,Graphic MMU LUT entry 236 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x176C++0x3
|
|
line.long 0x0 "LUT237H,Graphic MMU LUT entry 237 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1774++0x3
|
|
line.long 0x0 "LUT238H,Graphic MMU LUT entry 238 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x177C++0x3
|
|
line.long 0x0 "LUT239H,Graphic MMU LUT entry 239 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1784++0x3
|
|
line.long 0x0 "LUT240H,Graphic MMU LUT entry 240 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x178C++0x3
|
|
line.long 0x0 "LUT241H,Graphic MMU LUT entry 241 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1794++0x3
|
|
line.long 0x0 "LUT242H,Graphic MMU LUT entry 242 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x179C++0x3
|
|
line.long 0x0 "LUT243H,Graphic MMU LUT entry 243 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x17A4++0x3
|
|
line.long 0x0 "LUT244H,Graphic MMU LUT entry 244 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x17AC++0x3
|
|
line.long 0x0 "LUT245H,Graphic MMU LUT entry 245 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x17B4++0x3
|
|
line.long 0x0 "LUT246H,Graphic MMU LUT entry 246 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x17BC++0x3
|
|
line.long 0x0 "LUT247H,Graphic MMU LUT entry 247 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x17C4++0x3
|
|
line.long 0x0 "LUT248H,Graphic MMU LUT entry 248 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x17CC++0x3
|
|
line.long 0x0 "LUT249H,Graphic MMU LUT entry 249 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x17D4++0x3
|
|
line.long 0x0 "LUT250H,Graphic MMU LUT entry 250 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x17DC++0x3
|
|
line.long 0x0 "LUT251H,Graphic MMU LUT entry 251 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x17E4++0x3
|
|
line.long 0x0 "LUT252H,Graphic MMU LUT entry 252 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x17EC++0x3
|
|
line.long 0x0 "LUT253H,Graphic MMU LUT entry 253 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x17F4++0x3
|
|
line.long 0x0 "LUT254H,Graphic MMU LUT entry 254 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x17FC++0x3
|
|
line.long 0x0 "LUT255H,Graphic MMU LUT entry 255 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1804++0x3
|
|
line.long 0x0 "LUT256H,Graphic MMU LUT entry 256 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x180C++0x3
|
|
line.long 0x0 "LUT257H,Graphic MMU LUT entry 257 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1814++0x3
|
|
line.long 0x0 "LUT258H,Graphic MMU LUT entry 258 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x181C++0x3
|
|
line.long 0x0 "LUT259H,Graphic MMU LUT entry 259 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1824++0x3
|
|
line.long 0x0 "LUT260H,Graphic MMU LUT entry 260 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x182C++0x3
|
|
line.long 0x0 "LUT261H,Graphic MMU LUT entry 261 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1834++0x3
|
|
line.long 0x0 "LUT262H,Graphic MMU LUT entry 262 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x183C++0x3
|
|
line.long 0x0 "LUT263H,Graphic MMU LUT entry 263 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1844++0x3
|
|
line.long 0x0 "LUT264H,Graphic MMU LUT entry 264 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x184C++0x3
|
|
line.long 0x0 "LUT265H,Graphic MMU LUT entry 265 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1854++0x3
|
|
line.long 0x0 "LUT266H,Graphic MMU LUT entry 266 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x185C++0x3
|
|
line.long 0x0 "LUT267H,Graphic MMU LUT entry 267 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1864++0x3
|
|
line.long 0x0 "LUT268H,Graphic MMU LUT entry 268 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x186C++0x3
|
|
line.long 0x0 "LUT269H,Graphic MMU LUT entry 269 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1874++0x3
|
|
line.long 0x0 "LUT270H,Graphic MMU LUT entry 270 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x187C++0x3
|
|
line.long 0x0 "LUT271H,Graphic MMU LUT entry 271 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1884++0x3
|
|
line.long 0x0 "LUT272H,Graphic MMU LUT entry 272 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x188C++0x3
|
|
line.long 0x0 "LUT273H,Graphic MMU LUT entry 273 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1894++0x3
|
|
line.long 0x0 "LUT274H,Graphic MMU LUT entry 274 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x189C++0x3
|
|
line.long 0x0 "LUT275H,Graphic MMU LUT entry 275 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x18A4++0x3
|
|
line.long 0x0 "LUT276H,Graphic MMU LUT entry 276 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x18AC++0x3
|
|
line.long 0x0 "LUT277H,Graphic MMU LUT entry 277 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x18B4++0x3
|
|
line.long 0x0 "LUT278H,Graphic MMU LUT entry 278 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x18BC++0x3
|
|
line.long 0x0 "LUT279H,Graphic MMU LUT entry 279 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x18C4++0x3
|
|
line.long 0x0 "LUT280H,Graphic MMU LUT entry 280 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x18CC++0x3
|
|
line.long 0x0 "LUT281H,Graphic MMU LUT entry 281 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x18D4++0x3
|
|
line.long 0x0 "LUT282H,Graphic MMU LUT entry 282 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x18DC++0x3
|
|
line.long 0x0 "LUT283H,Graphic MMU LUT entry 283 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x18E4++0x3
|
|
line.long 0x0 "LUT284H,Graphic MMU LUT entry 284 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x18EC++0x3
|
|
line.long 0x0 "LUT285H,Graphic MMU LUT entry 285 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x18F4++0x3
|
|
line.long 0x0 "LUT286H,Graphic MMU LUT entry 286 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x18FC++0x3
|
|
line.long 0x0 "LUT287H,Graphic MMU LUT entry 287 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1904++0x3
|
|
line.long 0x0 "LUT288H,Graphic MMU LUT entry 288 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x190C++0x3
|
|
line.long 0x0 "LUT289H,Graphic MMU LUT entry 289 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1914++0x3
|
|
line.long 0x0 "LUT290H,Graphic MMU LUT entry 290 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x191C++0x3
|
|
line.long 0x0 "LUT291H,Graphic MMU LUT entry 291 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1924++0x3
|
|
line.long 0x0 "LUT292H,Graphic MMU LUT entry 292 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x192C++0x3
|
|
line.long 0x0 "LUT293H,Graphic MMU LUT entry 293 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1934++0x3
|
|
line.long 0x0 "LUT294H,Graphic MMU LUT entry 294 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x193C++0x3
|
|
line.long 0x0 "LUT295H,Graphic MMU LUT entry 295 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1944++0x3
|
|
line.long 0x0 "LUT296H,Graphic MMU LUT entry 296 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x194C++0x3
|
|
line.long 0x0 "LUT297H,Graphic MMU LUT entry 297 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1954++0x3
|
|
line.long 0x0 "LUT298H,Graphic MMU LUT entry 298 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x195C++0x3
|
|
line.long 0x0 "LUT299H,Graphic MMU LUT entry 299 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1964++0x3
|
|
line.long 0x0 "LUT300H,Graphic MMU LUT entry 300 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x196C++0x3
|
|
line.long 0x0 "LUT301H,Graphic MMU LUT entry 301 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1974++0x3
|
|
line.long 0x0 "LUT302H,Graphic MMU LUT entry 302 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x197C++0x3
|
|
line.long 0x0 "LUT303H,Graphic MMU LUT entry 303 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1984++0x3
|
|
line.long 0x0 "LUT304H,Graphic MMU LUT entry 304 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x198C++0x3
|
|
line.long 0x0 "LUT305H,Graphic MMU LUT entry 305 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1994++0x3
|
|
line.long 0x0 "LUT306H,Graphic MMU LUT entry 306 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x199C++0x3
|
|
line.long 0x0 "LUT307H,Graphic MMU LUT entry 307 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x19A4++0x3
|
|
line.long 0x0 "LUT308H,Graphic MMU LUT entry 308 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x19AC++0x3
|
|
line.long 0x0 "LUT309H,Graphic MMU LUT entry 309 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x19B4++0x3
|
|
line.long 0x0 "LUT310H,Graphic MMU LUT entry 310 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x19BC++0x3
|
|
line.long 0x0 "LUT311H,Graphic MMU LUT entry 311 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x19C4++0x3
|
|
line.long 0x0 "LUT312H,Graphic MMU LUT entry 312 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x19CC++0x3
|
|
line.long 0x0 "LUT313H,Graphic MMU LUT entry 313 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x19D4++0x3
|
|
line.long 0x0 "LUT314H,Graphic MMU LUT entry 314 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x19DC++0x3
|
|
line.long 0x0 "LUT315H,Graphic MMU LUT entry 315 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x19E4++0x3
|
|
line.long 0x0 "LUT316H,Graphic MMU LUT entry 316 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x19EC++0x3
|
|
line.long 0x0 "LUT317H,Graphic MMU LUT entry 317 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x19F4++0x3
|
|
line.long 0x0 "LUT318H,Graphic MMU LUT entry 318 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x19FC++0x3
|
|
line.long 0x0 "LUT319H,Graphic MMU LUT entry 319 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1A04++0x3
|
|
line.long 0x0 "LUT320H,Graphic MMU LUT entry 320 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1A0C++0x3
|
|
line.long 0x0 "LUT321H,Graphic MMU LUT entry 321 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1A14++0x3
|
|
line.long 0x0 "LUT322H,Graphic MMU LUT entry 322 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1A1C++0x3
|
|
line.long 0x0 "LUT323H,Graphic MMU LUT entry 323 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1A24++0x3
|
|
line.long 0x0 "LUT324H,Graphic MMU LUT entry 324 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1A2C++0x3
|
|
line.long 0x0 "LUT325H,Graphic MMU LUT entry 325 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1A34++0x3
|
|
line.long 0x0 "LUT326H,Graphic MMU LUT entry 326 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1A3C++0x3
|
|
line.long 0x0 "LUT327H,Graphic MMU LUT entry 327 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1A44++0x3
|
|
line.long 0x0 "LUT328H,Graphic MMU LUT entry 328 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1A4C++0x3
|
|
line.long 0x0 "LUT329H,Graphic MMU LUT entry 329 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1A54++0x3
|
|
line.long 0x0 "LUT330H,Graphic MMU LUT entry 330 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1A5C++0x3
|
|
line.long 0x0 "LUT331H,Graphic MMU LUT entry 331 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1A64++0x3
|
|
line.long 0x0 "LUT332H,Graphic MMU LUT entry 332 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1A6C++0x3
|
|
line.long 0x0 "LUT333H,Graphic MMU LUT entry 333 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1A74++0x3
|
|
line.long 0x0 "LUT334H,Graphic MMU LUT entry 334 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1A7C++0x3
|
|
line.long 0x0 "LUT335H,Graphic MMU LUT entry 335 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1A84++0x3
|
|
line.long 0x0 "LUT336H,Graphic MMU LUT entry 336 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1A8C++0x3
|
|
line.long 0x0 "LUT337H,Graphic MMU LUT entry 337 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1A94++0x3
|
|
line.long 0x0 "LUT338H,Graphic MMU LUT entry 338 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1A9C++0x3
|
|
line.long 0x0 "LUT339H,Graphic MMU LUT entry 339 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1AA4++0x3
|
|
line.long 0x0 "LUT340H,Graphic MMU LUT entry 340 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1AAC++0x3
|
|
line.long 0x0 "LUT341H,Graphic MMU LUT entry 341 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1AB4++0x3
|
|
line.long 0x0 "LUT342H,Graphic MMU LUT entry 342 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1ABC++0x3
|
|
line.long 0x0 "LUT343H,Graphic MMU LUT entry 343 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1AC4++0x3
|
|
line.long 0x0 "LUT344H,Graphic MMU LUT entry 344 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1ACC++0x3
|
|
line.long 0x0 "LUT345H,Graphic MMU LUT entry 345 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1AD4++0x3
|
|
line.long 0x0 "LUT346H,Graphic MMU LUT entry 346 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1ADC++0x3
|
|
line.long 0x0 "LUT347H,Graphic MMU LUT entry 347 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1AE4++0x3
|
|
line.long 0x0 "LUT348H,Graphic MMU LUT entry 348 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1AEC++0x3
|
|
line.long 0x0 "LUT349H,Graphic MMU LUT entry 349 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1AF4++0x3
|
|
line.long 0x0 "LUT350H,Graphic MMU LUT entry 350 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1AFC++0x3
|
|
line.long 0x0 "LUT351H,Graphic MMU LUT entry 351 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1B04++0x3
|
|
line.long 0x0 "LUT352H,Graphic MMU LUT entry 352 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1B0C++0x3
|
|
line.long 0x0 "LUT353H,Graphic MMU LUT entry 353 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1B14++0x3
|
|
line.long 0x0 "LUT354H,Graphic MMU LUT entry 354 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1B1C++0x3
|
|
line.long 0x0 "LUT355H,Graphic MMU LUT entry 355 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1B24++0x3
|
|
line.long 0x0 "LUT356H,Graphic MMU LUT entry 356 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1B2C++0x3
|
|
line.long 0x0 "LUT357H,Graphic MMU LUT entry 357 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1B34++0x3
|
|
line.long 0x0 "LUT358H,Graphic MMU LUT entry 358 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1B3C++0x3
|
|
line.long 0x0 "LUT359H,Graphic MMU LUT entry 359 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1B44++0x3
|
|
line.long 0x0 "LUT360H,Graphic MMU LUT entry 360 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1B4C++0x3
|
|
line.long 0x0 "LUT361H,Graphic MMU LUT entry 361 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1B54++0x3
|
|
line.long 0x0 "LUT362H,Graphic MMU LUT entry 362 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1B5C++0x3
|
|
line.long 0x0 "LUT363H,Graphic MMU LUT entry 363 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1B64++0x3
|
|
line.long 0x0 "LUT364H,Graphic MMU LUT entry 364 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1B6C++0x3
|
|
line.long 0x0 "LUT365H,Graphic MMU LUT entry 365 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1B74++0x3
|
|
line.long 0x0 "LUT366H,Graphic MMU LUT entry 366 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1B7C++0x3
|
|
line.long 0x0 "LUT367H,Graphic MMU LUT entry 367 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1B84++0x3
|
|
line.long 0x0 "LUT368H,Graphic MMU LUT entry 368 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1B8C++0x3
|
|
line.long 0x0 "LUT369H,Graphic MMU LUT entry 369 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1B94++0x3
|
|
line.long 0x0 "LUT370H,Graphic MMU LUT entry 370 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1B9C++0x3
|
|
line.long 0x0 "LUT371H,Graphic MMU LUT entry 371 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1BA4++0x3
|
|
line.long 0x0 "LUT372H,Graphic MMU LUT entry 372 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1BAC++0x3
|
|
line.long 0x0 "LUT373H,Graphic MMU LUT entry 373 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1BB4++0x3
|
|
line.long 0x0 "LUT374H,Graphic MMU LUT entry 374 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1BBC++0x3
|
|
line.long 0x0 "LUT375H,Graphic MMU LUT entry 375 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1BC4++0x3
|
|
line.long 0x0 "LUT376H,Graphic MMU LUT entry 376 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1BCC++0x3
|
|
line.long 0x0 "LUT377H,Graphic MMU LUT entry 377 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1BD4++0x3
|
|
line.long 0x0 "LUT378H,Graphic MMU LUT entry 378 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1BDC++0x3
|
|
line.long 0x0 "LUT379H,Graphic MMU LUT entry 379 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1BE4++0x3
|
|
line.long 0x0 "LUT380H,Graphic MMU LUT entry 380 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1BEC++0x3
|
|
line.long 0x0 "LUT381H,Graphic MMU LUT entry 381 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1BF4++0x3
|
|
line.long 0x0 "LUT382H,Graphic MMU LUT entry 382 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1BFC++0x3
|
|
line.long 0x0 "LUT383H,Graphic MMU LUT entry 383 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1C04++0x3
|
|
line.long 0x0 "LUT384H,Graphic MMU LUT entry 384 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1C0C++0x3
|
|
line.long 0x0 "LUT385H,Graphic MMU LUT entry 385 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1C14++0x3
|
|
line.long 0x0 "LUT386H,Graphic MMU LUT entry 386 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1C1C++0x3
|
|
line.long 0x0 "LUT387H,Graphic MMU LUT entry 387 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1C24++0x3
|
|
line.long 0x0 "LUT388H,Graphic MMU LUT entry 388 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1C2C++0x3
|
|
line.long 0x0 "LUT389H,Graphic MMU LUT entry 389 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1C34++0x3
|
|
line.long 0x0 "LUT390H,Graphic MMU LUT entry 390 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1C3C++0x3
|
|
line.long 0x0 "LUT391H,Graphic MMU LUT entry 391 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1C44++0x3
|
|
line.long 0x0 "LUT392H,Graphic MMU LUT entry 392 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1C4C++0x3
|
|
line.long 0x0 "LUT393H,Graphic MMU LUT entry 393 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1C54++0x3
|
|
line.long 0x0 "LUT394H,Graphic MMU LUT entry 394 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1C5C++0x3
|
|
line.long 0x0 "LUT395H,Graphic MMU LUT entry 395 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1C64++0x3
|
|
line.long 0x0 "LUT396H,Graphic MMU LUT entry 396 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1C6C++0x3
|
|
line.long 0x0 "LUT397H,Graphic MMU LUT entry 397 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1C74++0x3
|
|
line.long 0x0 "LUT398H,Graphic MMU LUT entry 398 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1C7C++0x3
|
|
line.long 0x0 "LUT399H,Graphic MMU LUT entry 399 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1C84++0x3
|
|
line.long 0x0 "LUT400H,Graphic MMU LUT entry 400 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1C8C++0x3
|
|
line.long 0x0 "LUT401H,Graphic MMU LUT entry 401 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1C94++0x3
|
|
line.long 0x0 "LUT402H,Graphic MMU LUT entry 402 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1C9C++0x3
|
|
line.long 0x0 "LUT403H,Graphic MMU LUT entry 403 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1CA4++0x3
|
|
line.long 0x0 "LUT404H,Graphic MMU LUT entry 404 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1CAC++0x3
|
|
line.long 0x0 "LUT405H,Graphic MMU LUT entry 405 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1CB4++0x3
|
|
line.long 0x0 "LUT406H,Graphic MMU LUT entry 406 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1CBC++0x3
|
|
line.long 0x0 "LUT407H,Graphic MMU LUT entry 407 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1CC4++0x3
|
|
line.long 0x0 "LUT408H,Graphic MMU LUT entry 408 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1CCC++0x3
|
|
line.long 0x0 "LUT409H,Graphic MMU LUT entry 409 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1CD4++0x3
|
|
line.long 0x0 "LUT410H,Graphic MMU LUT entry 410 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1CDC++0x3
|
|
line.long 0x0 "LUT411H,Graphic MMU LUT entry 411 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1CE4++0x3
|
|
line.long 0x0 "LUT412H,Graphic MMU LUT entry 412 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1CEC++0x3
|
|
line.long 0x0 "LUT413H,Graphic MMU LUT entry 413 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1CF4++0x3
|
|
line.long 0x0 "LUT414H,Graphic MMU LUT entry 414 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1CFC++0x3
|
|
line.long 0x0 "LUT415H,Graphic MMU LUT entry 415 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1D04++0x3
|
|
line.long 0x0 "LUT416H,Graphic MMU LUT entry 416 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1D0C++0x3
|
|
line.long 0x0 "LUT417H,Graphic MMU LUT entry 417 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1D14++0x3
|
|
line.long 0x0 "LUT418H,Graphic MMU LUT entry 418 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1D1C++0x3
|
|
line.long 0x0 "LUT419H,Graphic MMU LUT entry 419 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1D24++0x3
|
|
line.long 0x0 "LUT420H,Graphic MMU LUT entry 420 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1D2C++0x3
|
|
line.long 0x0 "LUT421H,Graphic MMU LUT entry 421 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1D34++0x3
|
|
line.long 0x0 "LUT422H,Graphic MMU LUT entry 422 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1D3C++0x3
|
|
line.long 0x0 "LUT423H,Graphic MMU LUT entry 423 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1D44++0x3
|
|
line.long 0x0 "LUT424H,Graphic MMU LUT entry 424 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1D4C++0x3
|
|
line.long 0x0 "LUT425H,Graphic MMU LUT entry 425 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1D54++0x3
|
|
line.long 0x0 "LUT426H,Graphic MMU LUT entry 426 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1D5C++0x3
|
|
line.long 0x0 "LUT427H,Graphic MMU LUT entry 427 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1D64++0x3
|
|
line.long 0x0 "LUT428H,Graphic MMU LUT entry 428 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1D6C++0x3
|
|
line.long 0x0 "LUT429H,Graphic MMU LUT entry 429 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1D74++0x3
|
|
line.long 0x0 "LUT430H,Graphic MMU LUT entry 430 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1D7C++0x3
|
|
line.long 0x0 "LUT431H,Graphic MMU LUT entry 431 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1D84++0x3
|
|
line.long 0x0 "LUT432H,Graphic MMU LUT entry 432 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1D8C++0x3
|
|
line.long 0x0 "LUT433H,Graphic MMU LUT entry 433 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1D94++0x3
|
|
line.long 0x0 "LUT434H,Graphic MMU LUT entry 434 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1D9C++0x3
|
|
line.long 0x0 "LUT435H,Graphic MMU LUT entry 435 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1DA4++0x3
|
|
line.long 0x0 "LUT436H,Graphic MMU LUT entry 436 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1DAC++0x3
|
|
line.long 0x0 "LUT437H,Graphic MMU LUT entry 437 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1DB4++0x3
|
|
line.long 0x0 "LUT438H,Graphic MMU LUT entry 438 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1DBC++0x3
|
|
line.long 0x0 "LUT439H,Graphic MMU LUT entry 439 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1DC4++0x3
|
|
line.long 0x0 "LUT440H,Graphic MMU LUT entry 440 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1DCC++0x3
|
|
line.long 0x0 "LUT441H,Graphic MMU LUT entry 441 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1DD4++0x3
|
|
line.long 0x0 "LUT442H,Graphic MMU LUT entry 442 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1DDC++0x3
|
|
line.long 0x0 "LUT443H,Graphic MMU LUT entry 443 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1DE4++0x3
|
|
line.long 0x0 "LUT444H,Graphic MMU LUT entry 444 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1DEC++0x3
|
|
line.long 0x0 "LUT445H,Graphic MMU LUT entry 445 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1DF4++0x3
|
|
line.long 0x0 "LUT446H,Graphic MMU LUT entry 446 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1DFC++0x3
|
|
line.long 0x0 "LUT447H,Graphic MMU LUT entry 447 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1E04++0x3
|
|
line.long 0x0 "LUT448H,Graphic MMU LUT entry 448 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1E0C++0x3
|
|
line.long 0x0 "LUT449H,Graphic MMU LUT entry 449 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1E14++0x3
|
|
line.long 0x0 "LUT450H,Graphic MMU LUT entry 450 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1E1C++0x3
|
|
line.long 0x0 "LUT451H,Graphic MMU LUT entry 451 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1E24++0x3
|
|
line.long 0x0 "LUT452H,Graphic MMU LUT entry 452 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1E2C++0x3
|
|
line.long 0x0 "LUT453H,Graphic MMU LUT entry 453 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1E34++0x3
|
|
line.long 0x0 "LUT454H,Graphic MMU LUT entry 454 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1E3C++0x3
|
|
line.long 0x0 "LUT455H,Graphic MMU LUT entry 455 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1E44++0x3
|
|
line.long 0x0 "LUT456H,Graphic MMU LUT entry 456 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1E4C++0x3
|
|
line.long 0x0 "LUT457H,Graphic MMU LUT entry 457 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1E54++0x3
|
|
line.long 0x0 "LUT458H,Graphic MMU LUT entry 458 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1E5C++0x3
|
|
line.long 0x0 "LUT459H,Graphic MMU LUT entry 459 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1E64++0x3
|
|
line.long 0x0 "LUT460H,Graphic MMU LUT entry 460 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1E6C++0x3
|
|
line.long 0x0 "LUT461H,Graphic MMU LUT entry 461 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1E74++0x3
|
|
line.long 0x0 "LUT462H,Graphic MMU LUT entry 462 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1E7C++0x3
|
|
line.long 0x0 "LUT463H,Graphic MMU LUT entry 463 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1E84++0x3
|
|
line.long 0x0 "LUT464H,Graphic MMU LUT entry 464 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1E8C++0x3
|
|
line.long 0x0 "LUT465H,Graphic MMU LUT entry 465 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1E94++0x3
|
|
line.long 0x0 "LUT466H,Graphic MMU LUT entry 466 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1E9C++0x3
|
|
line.long 0x0 "LUT467H,Graphic MMU LUT entry 467 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1EA4++0x3
|
|
line.long 0x0 "LUT468H,Graphic MMU LUT entry 468 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1EAC++0x3
|
|
line.long 0x0 "LUT469H,Graphic MMU LUT entry 469 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1EB4++0x3
|
|
line.long 0x0 "LUT470H,Graphic MMU LUT entry 470 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1EBC++0x3
|
|
line.long 0x0 "LUT471H,Graphic MMU LUT entry 471 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1EC4++0x3
|
|
line.long 0x0 "LUT472H,Graphic MMU LUT entry 472 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1ECC++0x3
|
|
line.long 0x0 "LUT473H,Graphic MMU LUT entry 473 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1ED4++0x3
|
|
line.long 0x0 "LUT474H,Graphic MMU LUT entry 474 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1EDC++0x3
|
|
line.long 0x0 "LUT475H,Graphic MMU LUT entry 475 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1EE4++0x3
|
|
line.long 0x0 "LUT476H,Graphic MMU LUT entry 476 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1EEC++0x3
|
|
line.long 0x0 "LUT477H,Graphic MMU LUT entry 477 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1EF4++0x3
|
|
line.long 0x0 "LUT478H,Graphic MMU LUT entry 478 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1EFC++0x3
|
|
line.long 0x0 "LUT479H,Graphic MMU LUT entry 479 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1F04++0x3
|
|
line.long 0x0 "LUT480H,Graphic MMU LUT entry 480 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1F0C++0x3
|
|
line.long 0x0 "LUT481H,Graphic MMU LUT entry 481 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1F14++0x3
|
|
line.long 0x0 "LUT482H,Graphic MMU LUT entry 482 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1F1C++0x3
|
|
line.long 0x0 "LUT483H,Graphic MMU LUT entry 483 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1F24++0x3
|
|
line.long 0x0 "LUT484H,Graphic MMU LUT entry 484 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1F2C++0x3
|
|
line.long 0x0 "LUT485H,Graphic MMU LUT entry 485 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1F34++0x3
|
|
line.long 0x0 "LUT486H,Graphic MMU LUT entry 486 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1F3C++0x3
|
|
line.long 0x0 "LUT487H,Graphic MMU LUT entry 487 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1F44++0x3
|
|
line.long 0x0 "LUT488H,Graphic MMU LUT entry 488 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1F4C++0x3
|
|
line.long 0x0 "LUT489H,Graphic MMU LUT entry 489 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1F54++0x3
|
|
line.long 0x0 "LUT490H,Graphic MMU LUT entry 490 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1F5C++0x3
|
|
line.long 0x0 "LUT491H,Graphic MMU LUT entry 491 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1F64++0x3
|
|
line.long 0x0 "LUT492H,Graphic MMU LUT entry 492 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1F6C++0x3
|
|
line.long 0x0 "LUT493H,Graphic MMU LUT entry 493 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1F74++0x3
|
|
line.long 0x0 "LUT494H,Graphic MMU LUT entry 494 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1F7C++0x3
|
|
line.long 0x0 "LUT495H,Graphic MMU LUT entry 495 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1F84++0x3
|
|
line.long 0x0 "LUT496H,Graphic MMU LUT entry 496 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1F8C++0x3
|
|
line.long 0x0 "LUT497H,Graphic MMU LUT entry 497 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1F94++0x3
|
|
line.long 0x0 "LUT498H,Graphic MMU LUT entry 498 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1F9C++0x3
|
|
line.long 0x0 "LUT499H,Graphic MMU LUT entry 499 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1FA4++0x3
|
|
line.long 0x0 "LUT500H,Graphic MMU LUT entry 500 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1FAC++0x3
|
|
line.long 0x0 "LUT501H,Graphic MMU LUT entry 501 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1FB4++0x3
|
|
line.long 0x0 "LUT502H,Graphic MMU LUT entry 502 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1FBC++0x3
|
|
line.long 0x0 "LUT503H,Graphic MMU LUT entry 503 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1FC4++0x3
|
|
line.long 0x0 "LUT504H,Graphic MMU LUT entry 504 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1FCC++0x3
|
|
line.long 0x0 "LUT505H,Graphic MMU LUT entry 505 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1FD4++0x3
|
|
line.long 0x0 "LUT506H,Graphic MMU LUT entry 506 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1FDC++0x3
|
|
line.long 0x0 "LUT507H,Graphic MMU LUT entry 507 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1FE4++0x3
|
|
line.long 0x0 "LUT508H,Graphic MMU LUT entry 508 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1FEC++0x3
|
|
line.long 0x0 "LUT509H,Graphic MMU LUT entry 509 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1FF4++0x3
|
|
line.long 0x0 "LUT510H,Graphic MMU LUT entry 510 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x1FFC++0x3
|
|
line.long 0x0 "LUT511H,Graphic MMU LUT entry 511 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2004++0x3
|
|
line.long 0x0 "LUT512H,Graphic MMU LUT entry 512 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x200C++0x3
|
|
line.long 0x0 "LUT513H,Graphic MMU LUT entry 513 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2014++0x3
|
|
line.long 0x0 "LUT514H,Graphic MMU LUT entry 514 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x201C++0x3
|
|
line.long 0x0 "LUT515H,Graphic MMU LUT entry 515 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2024++0x3
|
|
line.long 0x0 "LUT516H,Graphic MMU LUT entry 516 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x202C++0x3
|
|
line.long 0x0 "LUT517H,Graphic MMU LUT entry 517 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2034++0x3
|
|
line.long 0x0 "LUT518H,Graphic MMU LUT entry 518 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x203C++0x3
|
|
line.long 0x0 "LUT519H,Graphic MMU LUT entry 519 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2044++0x3
|
|
line.long 0x0 "LUT520H,Graphic MMU LUT entry 520 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x204C++0x3
|
|
line.long 0x0 "LUT521H,Graphic MMU LUT entry 521 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2054++0x3
|
|
line.long 0x0 "LUT522H,Graphic MMU LUT entry 522 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x205C++0x3
|
|
line.long 0x0 "LUT523H,Graphic MMU LUT entry 523 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2064++0x3
|
|
line.long 0x0 "LUT524H,Graphic MMU LUT entry 524 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x206C++0x3
|
|
line.long 0x0 "LUT525H,Graphic MMU LUT entry 525 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2074++0x3
|
|
line.long 0x0 "LUT526H,Graphic MMU LUT entry 526 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x207C++0x3
|
|
line.long 0x0 "LUT527H,Graphic MMU LUT entry 527 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2084++0x3
|
|
line.long 0x0 "LUT528H,Graphic MMU LUT entry 528 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x208C++0x3
|
|
line.long 0x0 "LUT529H,Graphic MMU LUT entry 529 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2094++0x3
|
|
line.long 0x0 "LUT530H,Graphic MMU LUT entry 530 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x209C++0x3
|
|
line.long 0x0 "LUT531H,Graphic MMU LUT entry 531 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x20A4++0x3
|
|
line.long 0x0 "LUT532H,Graphic MMU LUT entry 532 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x20AC++0x3
|
|
line.long 0x0 "LUT533H,Graphic MMU LUT entry 533 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x20B4++0x3
|
|
line.long 0x0 "LUT534H,Graphic MMU LUT entry 534 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x20BC++0x3
|
|
line.long 0x0 "LUT535H,Graphic MMU LUT entry 535 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x20C4++0x3
|
|
line.long 0x0 "LUT536H,Graphic MMU LUT entry 536 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x20CC++0x3
|
|
line.long 0x0 "LUT537H,Graphic MMU LUT entry 537 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x20D4++0x3
|
|
line.long 0x0 "LUT538H,Graphic MMU LUT entry 538 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x20DC++0x3
|
|
line.long 0x0 "LUT539H,Graphic MMU LUT entry 539 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x20E4++0x3
|
|
line.long 0x0 "LUT540H,Graphic MMU LUT entry 540 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x20EC++0x3
|
|
line.long 0x0 "LUT541H,Graphic MMU LUT entry 541 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x20F4++0x3
|
|
line.long 0x0 "LUT542H,Graphic MMU LUT entry 542 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x20FC++0x3
|
|
line.long 0x0 "LUT543H,Graphic MMU LUT entry 543 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2104++0x3
|
|
line.long 0x0 "LUT544H,Graphic MMU LUT entry 544 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x210C++0x3
|
|
line.long 0x0 "LUT545H,Graphic MMU LUT entry 545 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2114++0x3
|
|
line.long 0x0 "LUT546H,Graphic MMU LUT entry 546 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x211C++0x3
|
|
line.long 0x0 "LUT547H,Graphic MMU LUT entry 547 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2124++0x3
|
|
line.long 0x0 "LUT548H,Graphic MMU LUT entry 548 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x212C++0x3
|
|
line.long 0x0 "LUT549H,Graphic MMU LUT entry 549 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2134++0x3
|
|
line.long 0x0 "LUT550H,Graphic MMU LUT entry 550 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x213C++0x3
|
|
line.long 0x0 "LUT551H,Graphic MMU LUT entry 551 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2144++0x3
|
|
line.long 0x0 "LUT552H,Graphic MMU LUT entry 552 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x214C++0x3
|
|
line.long 0x0 "LUT553H,Graphic MMU LUT entry 553 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2154++0x3
|
|
line.long 0x0 "LUT554H,Graphic MMU LUT entry 554 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x215C++0x3
|
|
line.long 0x0 "LUT555H,Graphic MMU LUT entry 555 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2164++0x3
|
|
line.long 0x0 "LUT556H,Graphic MMU LUT entry 556 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x216C++0x3
|
|
line.long 0x0 "LUT557H,Graphic MMU LUT entry 557 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2174++0x3
|
|
line.long 0x0 "LUT558H,Graphic MMU LUT entry 558 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x217C++0x3
|
|
line.long 0x0 "LUT559H,Graphic MMU LUT entry 559 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2184++0x3
|
|
line.long 0x0 "LUT560H,Graphic MMU LUT entry 560 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x218C++0x3
|
|
line.long 0x0 "LUT561H,Graphic MMU LUT entry 561 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2194++0x3
|
|
line.long 0x0 "LUT562H,Graphic MMU LUT entry 562 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x219C++0x3
|
|
line.long 0x0 "LUT563H,Graphic MMU LUT entry 563 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x21A4++0x3
|
|
line.long 0x0 "LUT564H,Graphic MMU LUT entry 564 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x21AC++0x3
|
|
line.long 0x0 "LUT565H,Graphic MMU LUT entry 565 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x21B4++0x3
|
|
line.long 0x0 "LUT566H,Graphic MMU LUT entry 566 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x21BC++0x3
|
|
line.long 0x0 "LUT567H,Graphic MMU LUT entry 567 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x21C4++0x3
|
|
line.long 0x0 "LUT568H,Graphic MMU LUT entry 568 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x21CC++0x3
|
|
line.long 0x0 "LUT569H,Graphic MMU LUT entry 569 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x21D4++0x3
|
|
line.long 0x0 "LUT570H,Graphic MMU LUT entry 570 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x21DC++0x3
|
|
line.long 0x0 "LUT571H,Graphic MMU LUT entry 571 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x21E4++0x3
|
|
line.long 0x0 "LUT572H,Graphic MMU LUT entry 572 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x21EC++0x3
|
|
line.long 0x0 "LUT573H,Graphic MMU LUT entry 573 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x21F4++0x3
|
|
line.long 0x0 "LUT574H,Graphic MMU LUT entry 574 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x21FC++0x3
|
|
line.long 0x0 "LUT575H,Graphic MMU LUT entry 575 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2204++0x3
|
|
line.long 0x0 "LUT576H,Graphic MMU LUT entry 576 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x220C++0x3
|
|
line.long 0x0 "LUT577H,Graphic MMU LUT entry 577 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2214++0x3
|
|
line.long 0x0 "LUT578H,Graphic MMU LUT entry 578 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x221C++0x3
|
|
line.long 0x0 "LUT579H,Graphic MMU LUT entry 579 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2224++0x3
|
|
line.long 0x0 "LUT580H,Graphic MMU LUT entry 580 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x222C++0x3
|
|
line.long 0x0 "LUT581H,Graphic MMU LUT entry 581 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2234++0x3
|
|
line.long 0x0 "LUT582H,Graphic MMU LUT entry 582 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x223C++0x3
|
|
line.long 0x0 "LUT583H,Graphic MMU LUT entry 583 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2244++0x3
|
|
line.long 0x0 "LUT584H,Graphic MMU LUT entry 584 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x224C++0x3
|
|
line.long 0x0 "LUT585H,Graphic MMU LUT entry 585 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2254++0x3
|
|
line.long 0x0 "LUT586H,Graphic MMU LUT entry 586 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x225C++0x3
|
|
line.long 0x0 "LUT587H,Graphic MMU LUT entry 587 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2264++0x3
|
|
line.long 0x0 "LUT588H,Graphic MMU LUT entry 588 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x226C++0x3
|
|
line.long 0x0 "LUT589H,Graphic MMU LUT entry 589 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2274++0x3
|
|
line.long 0x0 "LUT590H,Graphic MMU LUT entry 590 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x227C++0x3
|
|
line.long 0x0 "LUT591H,Graphic MMU LUT entry 591 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2284++0x3
|
|
line.long 0x0 "LUT592H,Graphic MMU LUT entry 592 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x228C++0x3
|
|
line.long 0x0 "LUT593H,Graphic MMU LUT entry 593 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2294++0x3
|
|
line.long 0x0 "LUT594H,Graphic MMU LUT entry 594 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x229C++0x3
|
|
line.long 0x0 "LUT595H,Graphic MMU LUT entry 595 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x22A4++0x3
|
|
line.long 0x0 "LUT596H,Graphic MMU LUT entry 596 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x22AC++0x3
|
|
line.long 0x0 "LUT597H,Graphic MMU LUT entry 597 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x22B4++0x3
|
|
line.long 0x0 "LUT598H,Graphic MMU LUT entry 598 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x22BC++0x3
|
|
line.long 0x0 "LUT599H,Graphic MMU LUT entry 599 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x22C4++0x3
|
|
line.long 0x0 "LUT600H,Graphic MMU LUT entry 600 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x22CC++0x3
|
|
line.long 0x0 "LUT601H,Graphic MMU LUT entry 601 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x22D4++0x3
|
|
line.long 0x0 "LUT602H,Graphic MMU LUT entry 602 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x22DC++0x3
|
|
line.long 0x0 "LUT603H,Graphic MMU LUT entry 603 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x22E4++0x3
|
|
line.long 0x0 "LUT604H,Graphic MMU LUT entry 604 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x22EC++0x3
|
|
line.long 0x0 "LUT605H,Graphic MMU LUT entry 605 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x22F4++0x3
|
|
line.long 0x0 "LUT606H,Graphic MMU LUT entry 606 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x22FC++0x3
|
|
line.long 0x0 "LUT607H,Graphic MMU LUT entry 607 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2304++0x3
|
|
line.long 0x0 "LUT608H,Graphic MMU LUT entry 608 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x230C++0x3
|
|
line.long 0x0 "LUT609H,Graphic MMU LUT entry 609 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2314++0x3
|
|
line.long 0x0 "LUT610H,Graphic MMU LUT entry 610 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x231C++0x3
|
|
line.long 0x0 "LUT611H,Graphic MMU LUT entry 611 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2324++0x3
|
|
line.long 0x0 "LUT612H,Graphic MMU LUT entry 612 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x232C++0x3
|
|
line.long 0x0 "LUT613H,Graphic MMU LUT entry 613 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2334++0x3
|
|
line.long 0x0 "LUT614H,Graphic MMU LUT entry 614 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x233C++0x3
|
|
line.long 0x0 "LUT615H,Graphic MMU LUT entry 615 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2344++0x3
|
|
line.long 0x0 "LUT616H,Graphic MMU LUT entry 616 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x234C++0x3
|
|
line.long 0x0 "LUT617H,Graphic MMU LUT entry 617 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2354++0x3
|
|
line.long 0x0 "LUT618H,Graphic MMU LUT entry 618 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x235C++0x3
|
|
line.long 0x0 "LUT619H,Graphic MMU LUT entry 619 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2364++0x3
|
|
line.long 0x0 "LUT620H,Graphic MMU LUT entry 620 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x236C++0x3
|
|
line.long 0x0 "LUT621H,Graphic MMU LUT entry 621 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2374++0x3
|
|
line.long 0x0 "LUT622H,Graphic MMU LUT entry 622 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x237C++0x3
|
|
line.long 0x0 "LUT623H,Graphic MMU LUT entry 623 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2384++0x3
|
|
line.long 0x0 "LUT624H,Graphic MMU LUT entry 624 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x238C++0x3
|
|
line.long 0x0 "LUT625H,Graphic MMU LUT entry 625 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2394++0x3
|
|
line.long 0x0 "LUT626H,Graphic MMU LUT entry 626 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x239C++0x3
|
|
line.long 0x0 "LUT627H,Graphic MMU LUT entry 627 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x23A4++0x3
|
|
line.long 0x0 "LUT628H,Graphic MMU LUT entry 628 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x23AC++0x3
|
|
line.long 0x0 "LUT629H,Graphic MMU LUT entry 629 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x23B4++0x3
|
|
line.long 0x0 "LUT630H,Graphic MMU LUT entry 630 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x23BC++0x3
|
|
line.long 0x0 "LUT631H,Graphic MMU LUT entry 631 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x23C4++0x3
|
|
line.long 0x0 "LUT632H,Graphic MMU LUT entry 632 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x23CC++0x3
|
|
line.long 0x0 "LUT633H,Graphic MMU LUT entry 633 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x23D4++0x3
|
|
line.long 0x0 "LUT634H,Graphic MMU LUT entry 634 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x23DC++0x3
|
|
line.long 0x0 "LUT635H,Graphic MMU LUT entry 635 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x23E4++0x3
|
|
line.long 0x0 "LUT636H,Graphic MMU LUT entry 636 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x23EC++0x3
|
|
line.long 0x0 "LUT637H,Graphic MMU LUT entry 637 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x23F4++0x3
|
|
line.long 0x0 "LUT638H,Graphic MMU LUT entry 638 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x23FC++0x3
|
|
line.long 0x0 "LUT639H,Graphic MMU LUT entry 639 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2404++0x3
|
|
line.long 0x0 "LUT640H,Graphic MMU LUT entry 640 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x240C++0x3
|
|
line.long 0x0 "LUT641H,Graphic MMU LUT entry 641 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2414++0x3
|
|
line.long 0x0 "LUT642H,Graphic MMU LUT entry 642 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x241C++0x3
|
|
line.long 0x0 "LUT643H,Graphic MMU LUT entry 643 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2424++0x3
|
|
line.long 0x0 "LUT644H,Graphic MMU LUT entry 644 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x242C++0x3
|
|
line.long 0x0 "LUT645H,Graphic MMU LUT entry 645 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2434++0x3
|
|
line.long 0x0 "LUT646H,Graphic MMU LUT entry 646 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x243C++0x3
|
|
line.long 0x0 "LUT647H,Graphic MMU LUT entry 647 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2444++0x3
|
|
line.long 0x0 "LUT648H,Graphic MMU LUT entry 648 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x244C++0x3
|
|
line.long 0x0 "LUT649H,Graphic MMU LUT entry 649 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2454++0x3
|
|
line.long 0x0 "LUT650H,Graphic MMU LUT entry 650 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x245C++0x3
|
|
line.long 0x0 "LUT651H,Graphic MMU LUT entry 651 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2464++0x3
|
|
line.long 0x0 "LUT652H,Graphic MMU LUT entry 652 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x246C++0x3
|
|
line.long 0x0 "LUT653H,Graphic MMU LUT entry 653 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2474++0x3
|
|
line.long 0x0 "LUT654H,Graphic MMU LUT entry 654 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x247C++0x3
|
|
line.long 0x0 "LUT655H,Graphic MMU LUT entry 655 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2484++0x3
|
|
line.long 0x0 "LUT656H,Graphic MMU LUT entry 656 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x248C++0x3
|
|
line.long 0x0 "LUT657H,Graphic MMU LUT entry 657 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2494++0x3
|
|
line.long 0x0 "LUT658H,Graphic MMU LUT entry 658 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x249C++0x3
|
|
line.long 0x0 "LUT659H,Graphic MMU LUT entry 659 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x24A4++0x3
|
|
line.long 0x0 "LUT660H,Graphic MMU LUT entry 660 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x24AC++0x3
|
|
line.long 0x0 "LUT661H,Graphic MMU LUT entry 661 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x24B4++0x3
|
|
line.long 0x0 "LUT662H,Graphic MMU LUT entry 662 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x24BC++0x3
|
|
line.long 0x0 "LUT663H,Graphic MMU LUT entry 663 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x24C4++0x3
|
|
line.long 0x0 "LUT664H,Graphic MMU LUT entry 664 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x24CC++0x3
|
|
line.long 0x0 "LUT665H,Graphic MMU LUT entry 665 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x24D4++0x3
|
|
line.long 0x0 "LUT666H,Graphic MMU LUT entry 666 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x24DC++0x3
|
|
line.long 0x0 "LUT667H,Graphic MMU LUT entry 667 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x24E4++0x3
|
|
line.long 0x0 "LUT668H,Graphic MMU LUT entry 668 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x24EC++0x3
|
|
line.long 0x0 "LUT669H,Graphic MMU LUT entry 669 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x24F4++0x3
|
|
line.long 0x0 "LUT670H,Graphic MMU LUT entry 670 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x24FC++0x3
|
|
line.long 0x0 "LUT671H,Graphic MMU LUT entry 671 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2504++0x3
|
|
line.long 0x0 "LUT672H,Graphic MMU LUT entry 672 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x250C++0x3
|
|
line.long 0x0 "LUT673H,Graphic MMU LUT entry 673 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2514++0x3
|
|
line.long 0x0 "LUT674H,Graphic MMU LUT entry 674 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x251C++0x3
|
|
line.long 0x0 "LUT675H,Graphic MMU LUT entry 675 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2524++0x3
|
|
line.long 0x0 "LUT676H,Graphic MMU LUT entry 676 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x252C++0x3
|
|
line.long 0x0 "LUT677H,Graphic MMU LUT entry 677 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2534++0x3
|
|
line.long 0x0 "LUT678H,Graphic MMU LUT entry 678 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x253C++0x3
|
|
line.long 0x0 "LUT679H,Graphic MMU LUT entry 679 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2544++0x3
|
|
line.long 0x0 "LUT680H,Graphic MMU LUT entry 680 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x254C++0x3
|
|
line.long 0x0 "LUT681H,Graphic MMU LUT entry 681 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2554++0x3
|
|
line.long 0x0 "LUT682H,Graphic MMU LUT entry 682 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x255C++0x3
|
|
line.long 0x0 "LUT683H,Graphic MMU LUT entry 683 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2564++0x3
|
|
line.long 0x0 "LUT684H,Graphic MMU LUT entry 684 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x256C++0x3
|
|
line.long 0x0 "LUT685H,Graphic MMU LUT entry 685 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2574++0x3
|
|
line.long 0x0 "LUT686H,Graphic MMU LUT entry 686 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x257C++0x3
|
|
line.long 0x0 "LUT687H,Graphic MMU LUT entry 687 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2584++0x3
|
|
line.long 0x0 "LUT688H,Graphic MMU LUT entry 688 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x258C++0x3
|
|
line.long 0x0 "LUT689H,Graphic MMU LUT entry 689 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2594++0x3
|
|
line.long 0x0 "LUT690H,Graphic MMU LUT entry 690 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x259C++0x3
|
|
line.long 0x0 "LUT691H,Graphic MMU LUT entry 691 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x25A4++0x3
|
|
line.long 0x0 "LUT692H,Graphic MMU LUT entry 692 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x25AC++0x3
|
|
line.long 0x0 "LUT693H,Graphic MMU LUT entry 693 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x25B4++0x3
|
|
line.long 0x0 "LUT694H,Graphic MMU LUT entry 694 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x25BC++0x3
|
|
line.long 0x0 "LUT695H,Graphic MMU LUT entry 695 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x25C4++0x3
|
|
line.long 0x0 "LUT696H,Graphic MMU LUT entry 696 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x25CC++0x3
|
|
line.long 0x0 "LUT697H,Graphic MMU LUT entry 697 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x25D4++0x3
|
|
line.long 0x0 "LUT698H,Graphic MMU LUT entry 698 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x25DC++0x3
|
|
line.long 0x0 "LUT699H,Graphic MMU LUT entry 699 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x25E4++0x3
|
|
line.long 0x0 "LUT700H,Graphic MMU LUT entry 700 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x25EC++0x3
|
|
line.long 0x0 "LUT701H,Graphic MMU LUT entry 701 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x25F4++0x3
|
|
line.long 0x0 "LUT702H,Graphic MMU LUT entry 702 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x25FC++0x3
|
|
line.long 0x0 "LUT703H,Graphic MMU LUT entry 703 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2604++0x3
|
|
line.long 0x0 "LUT704H,Graphic MMU LUT entry 704 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x260C++0x3
|
|
line.long 0x0 "LUT705H,Graphic MMU LUT entry 705 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2614++0x3
|
|
line.long 0x0 "LUT706H,Graphic MMU LUT entry 706 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x261C++0x3
|
|
line.long 0x0 "LUT707H,Graphic MMU LUT entry 707 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2624++0x3
|
|
line.long 0x0 "LUT708H,Graphic MMU LUT entry 708 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x262C++0x3
|
|
line.long 0x0 "LUT709H,Graphic MMU LUT entry 709 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2634++0x3
|
|
line.long 0x0 "LUT710H,Graphic MMU LUT entry 710 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x263C++0x3
|
|
line.long 0x0 "LUT711H,Graphic MMU LUT entry 711 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2644++0x3
|
|
line.long 0x0 "LUT712H,Graphic MMU LUT entry 712 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x264C++0x3
|
|
line.long 0x0 "LUT713H,Graphic MMU LUT entry 713 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2654++0x3
|
|
line.long 0x0 "LUT714H,Graphic MMU LUT entry 714 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x265C++0x3
|
|
line.long 0x0 "LUT715H,Graphic MMU LUT entry 715 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2664++0x3
|
|
line.long 0x0 "LUT716H,Graphic MMU LUT entry 716 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x266C++0x3
|
|
line.long 0x0 "LUT717H,Graphic MMU LUT entry 717 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2674++0x3
|
|
line.long 0x0 "LUT718H,Graphic MMU LUT entry 718 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x267C++0x3
|
|
line.long 0x0 "LUT719H,Graphic MMU LUT entry 719 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2684++0x3
|
|
line.long 0x0 "LUT720H,Graphic MMU LUT entry 720 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x268C++0x3
|
|
line.long 0x0 "LUT721H,Graphic MMU LUT entry 721 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2694++0x3
|
|
line.long 0x0 "LUT722H,Graphic MMU LUT entry 722 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x269C++0x3
|
|
line.long 0x0 "LUT723H,Graphic MMU LUT entry 723 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x26A4++0x3
|
|
line.long 0x0 "LUT724H,Graphic MMU LUT entry 724 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x26AC++0x3
|
|
line.long 0x0 "LUT725H,Graphic MMU LUT entry 725 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x26B4++0x3
|
|
line.long 0x0 "LUT726H,Graphic MMU LUT entry 726 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x26BC++0x3
|
|
line.long 0x0 "LUT727H,Graphic MMU LUT entry 727 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x26C4++0x3
|
|
line.long 0x0 "LUT728H,Graphic MMU LUT entry 728 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x26CC++0x3
|
|
line.long 0x0 "LUT729H,Graphic MMU LUT entry 729 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x26D4++0x3
|
|
line.long 0x0 "LUT730H,Graphic MMU LUT entry 730 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x26DC++0x3
|
|
line.long 0x0 "LUT731H,Graphic MMU LUT entry 731 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x26E4++0x3
|
|
line.long 0x0 "LUT732H,Graphic MMU LUT entry 732 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x26EC++0x3
|
|
line.long 0x0 "LUT733H,Graphic MMU LUT entry 733 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x26F4++0x3
|
|
line.long 0x0 "LUT734H,Graphic MMU LUT entry 734 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x26FC++0x3
|
|
line.long 0x0 "LUT735H,Graphic MMU LUT entry 735 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2704++0x3
|
|
line.long 0x0 "LUT736H,Graphic MMU LUT entry 736 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x270C++0x3
|
|
line.long 0x0 "LUT737H,Graphic MMU LUT entry 737 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2714++0x3
|
|
line.long 0x0 "LUT738H,Graphic MMU LUT entry 738 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x271C++0x3
|
|
line.long 0x0 "LUT739H,Graphic MMU LUT entry 739 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2724++0x3
|
|
line.long 0x0 "LUT740H,Graphic MMU LUT entry 740 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x272C++0x3
|
|
line.long 0x0 "LUT741H,Graphic MMU LUT entry 741 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2734++0x3
|
|
line.long 0x0 "LUT742H,Graphic MMU LUT entry 742 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x273C++0x3
|
|
line.long 0x0 "LUT743H,Graphic MMU LUT entry 743 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2744++0x3
|
|
line.long 0x0 "LUT744H,Graphic MMU LUT entry 744 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x274C++0x3
|
|
line.long 0x0 "LUT745H,Graphic MMU LUT entry 745 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2754++0x3
|
|
line.long 0x0 "LUT746H,Graphic MMU LUT entry 746 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x275C++0x3
|
|
line.long 0x0 "LUT747H,Graphic MMU LUT entry 747 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2764++0x3
|
|
line.long 0x0 "LUT748H,Graphic MMU LUT entry 748 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x276C++0x3
|
|
line.long 0x0 "LUT749H,Graphic MMU LUT entry 749 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2774++0x3
|
|
line.long 0x0 "LUT750H,Graphic MMU LUT entry 750 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x277C++0x3
|
|
line.long 0x0 "LUT751H,Graphic MMU LUT entry 751 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2784++0x3
|
|
line.long 0x0 "LUT752H,Graphic MMU LUT entry 752 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x278C++0x3
|
|
line.long 0x0 "LUT753H,Graphic MMU LUT entry 753 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2794++0x3
|
|
line.long 0x0 "LUT754H,Graphic MMU LUT entry 754 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x279C++0x3
|
|
line.long 0x0 "LUT755H,Graphic MMU LUT entry 755 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x27A4++0x3
|
|
line.long 0x0 "LUT756H,Graphic MMU LUT entry 756 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x27AC++0x3
|
|
line.long 0x0 "LUT757H,Graphic MMU LUT entry 757 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x27B4++0x3
|
|
line.long 0x0 "LUT758H,Graphic MMU LUT entry 758 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x27BC++0x3
|
|
line.long 0x0 "LUT759H,Graphic MMU LUT entry 759 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x27C4++0x3
|
|
line.long 0x0 "LUT760H,Graphic MMU LUT entry 760 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x27CC++0x3
|
|
line.long 0x0 "LUT761H,Graphic MMU LUT entry 761 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x27D4++0x3
|
|
line.long 0x0 "LUT762H,Graphic MMU LUT entry 762 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x27DC++0x3
|
|
line.long 0x0 "LUT763H,Graphic MMU LUT entry 763 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x27E4++0x3
|
|
line.long 0x0 "LUT764H,Graphic MMU LUT entry 764 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x27EC++0x3
|
|
line.long 0x0 "LUT765H,Graphic MMU LUT entry 765 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x27F4++0x3
|
|
line.long 0x0 "LUT766H,Graphic MMU LUT entry 766 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x27FC++0x3
|
|
line.long 0x0 "LUT767H,Graphic MMU LUT entry 767 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2804++0x3
|
|
line.long 0x0 "LUT768H,Graphic MMU LUT entry 768 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x280C++0x3
|
|
line.long 0x0 "LUT769H,Graphic MMU LUT entry 769 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2814++0x3
|
|
line.long 0x0 "LUT770H,Graphic MMU LUT entry 770 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x281C++0x3
|
|
line.long 0x0 "LUT771H,Graphic MMU LUT entry 771 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2824++0x3
|
|
line.long 0x0 "LUT772H,Graphic MMU LUT entry 772 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x282C++0x3
|
|
line.long 0x0 "LUT773H,Graphic MMU LUT entry 773 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2834++0x3
|
|
line.long 0x0 "LUT774H,Graphic MMU LUT entry 774 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x283C++0x3
|
|
line.long 0x0 "LUT775H,Graphic MMU LUT entry 775 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2844++0x3
|
|
line.long 0x0 "LUT776H,Graphic MMU LUT entry 776 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x284C++0x3
|
|
line.long 0x0 "LUT777H,Graphic MMU LUT entry 777 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2854++0x3
|
|
line.long 0x0 "LUT778H,Graphic MMU LUT entry 778 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x285C++0x3
|
|
line.long 0x0 "LUT779H,Graphic MMU LUT entry 779 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2864++0x3
|
|
line.long 0x0 "LUT780H,Graphic MMU LUT entry 780 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x286C++0x3
|
|
line.long 0x0 "LUT781H,Graphic MMU LUT entry 781 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2874++0x3
|
|
line.long 0x0 "LUT782H,Graphic MMU LUT entry 782 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x287C++0x3
|
|
line.long 0x0 "LUT783H,Graphic MMU LUT entry 783 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2884++0x3
|
|
line.long 0x0 "LUT784H,Graphic MMU LUT entry 784 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x288C++0x3
|
|
line.long 0x0 "LUT785H,Graphic MMU LUT entry 785 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2894++0x3
|
|
line.long 0x0 "LUT786H,Graphic MMU LUT entry 786 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x289C++0x3
|
|
line.long 0x0 "LUT787H,Graphic MMU LUT entry 787 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x28A4++0x3
|
|
line.long 0x0 "LUT788H,Graphic MMU LUT entry 788 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x28AC++0x3
|
|
line.long 0x0 "LUT789H,Graphic MMU LUT entry 789 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x28B4++0x3
|
|
line.long 0x0 "LUT790H,Graphic MMU LUT entry 790 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x28BC++0x3
|
|
line.long 0x0 "LUT791H,Graphic MMU LUT entry 791 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x28C4++0x3
|
|
line.long 0x0 "LUT792H,Graphic MMU LUT entry 792 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x28CC++0x3
|
|
line.long 0x0 "LUT793H,Graphic MMU LUT entry 793 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x28D4++0x3
|
|
line.long 0x0 "LUT794H,Graphic MMU LUT entry 794 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x28DC++0x3
|
|
line.long 0x0 "LUT795H,Graphic MMU LUT entry 795 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x28E4++0x3
|
|
line.long 0x0 "LUT796H,Graphic MMU LUT entry 796 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x28EC++0x3
|
|
line.long 0x0 "LUT797H,Graphic MMU LUT entry 797 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x28F4++0x3
|
|
line.long 0x0 "LUT798H,Graphic MMU LUT entry 798 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x28FC++0x3
|
|
line.long 0x0 "LUT799H,Graphic MMU LUT entry 799 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2904++0x3
|
|
line.long 0x0 "LUT800H,Graphic MMU LUT entry 800 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x290C++0x3
|
|
line.long 0x0 "LUT801H,Graphic MMU LUT entry 801 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2914++0x3
|
|
line.long 0x0 "LUT802H,Graphic MMU LUT entry 802 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x291C++0x3
|
|
line.long 0x0 "LUT803H,Graphic MMU LUT entry 803 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2924++0x3
|
|
line.long 0x0 "LUT804H,Graphic MMU LUT entry 804 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x292C++0x3
|
|
line.long 0x0 "LUT805H,Graphic MMU LUT entry 805 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2934++0x3
|
|
line.long 0x0 "LUT806H,Graphic MMU LUT entry 806 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x293C++0x3
|
|
line.long 0x0 "LUT807H,Graphic MMU LUT entry 807 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2944++0x3
|
|
line.long 0x0 "LUT808H,Graphic MMU LUT entry 808 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x294C++0x3
|
|
line.long 0x0 "LUT809H,Graphic MMU LUT entry 809 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2954++0x3
|
|
line.long 0x0 "LUT810H,Graphic MMU LUT entry 810 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x295C++0x3
|
|
line.long 0x0 "LUT811H,Graphic MMU LUT entry 811 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2964++0x3
|
|
line.long 0x0 "LUT812H,Graphic MMU LUT entry 812 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x296C++0x3
|
|
line.long 0x0 "LUT813H,Graphic MMU LUT entry 813 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2974++0x3
|
|
line.long 0x0 "LUT814H,Graphic MMU LUT entry 814 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x297C++0x3
|
|
line.long 0x0 "LUT815H,Graphic MMU LUT entry 815 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2984++0x3
|
|
line.long 0x0 "LUT816H,Graphic MMU LUT entry 816 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x298C++0x3
|
|
line.long 0x0 "LUT817H,Graphic MMU LUT entry 817 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2994++0x3
|
|
line.long 0x0 "LUT818H,Graphic MMU LUT entry 818 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x299C++0x3
|
|
line.long 0x0 "LUT819H,Graphic MMU LUT entry 819 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x29A4++0x3
|
|
line.long 0x0 "LUT820H,Graphic MMU LUT entry 820 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x29AC++0x3
|
|
line.long 0x0 "LUT821H,Graphic MMU LUT entry 821 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x29B4++0x3
|
|
line.long 0x0 "LUT822H,Graphic MMU LUT entry 822 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x29BC++0x3
|
|
line.long 0x0 "LUT823H,Graphic MMU LUT entry 823 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x29C4++0x3
|
|
line.long 0x0 "LUT824H,Graphic MMU LUT entry 824 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x29CC++0x3
|
|
line.long 0x0 "LUT825H,Graphic MMU LUT entry 825 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x29D4++0x3
|
|
line.long 0x0 "LUT826H,Graphic MMU LUT entry 826 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x29DC++0x3
|
|
line.long 0x0 "LUT827H,Graphic MMU LUT entry 827 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x29E4++0x3
|
|
line.long 0x0 "LUT828H,Graphic MMU LUT entry 828 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x29EC++0x3
|
|
line.long 0x0 "LUT829H,Graphic MMU LUT entry 829 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x29F4++0x3
|
|
line.long 0x0 "LUT830H,Graphic MMU LUT entry 830 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x29FC++0x3
|
|
line.long 0x0 "LUT831H,Graphic MMU LUT entry 831 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2A04++0x3
|
|
line.long 0x0 "LUT832H,Graphic MMU LUT entry 832 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2A0C++0x3
|
|
line.long 0x0 "LUT833H,Graphic MMU LUT entry 833 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2A14++0x3
|
|
line.long 0x0 "LUT834H,Graphic MMU LUT entry 834 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2A1C++0x3
|
|
line.long 0x0 "LUT835H,Graphic MMU LUT entry 835 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2A24++0x3
|
|
line.long 0x0 "LUT836H,Graphic MMU LUT entry 836 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2A2C++0x3
|
|
line.long 0x0 "LUT837H,Graphic MMU LUT entry 837 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2A34++0x3
|
|
line.long 0x0 "LUT838H,Graphic MMU LUT entry 838 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2A3C++0x3
|
|
line.long 0x0 "LUT839H,Graphic MMU LUT entry 839 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2A44++0x3
|
|
line.long 0x0 "LUT840H,Graphic MMU LUT entry 840 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2A4C++0x3
|
|
line.long 0x0 "LUT841H,Graphic MMU LUT entry 841 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2A54++0x3
|
|
line.long 0x0 "LUT842H,Graphic MMU LUT entry 842 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2A5C++0x3
|
|
line.long 0x0 "LUT843H,Graphic MMU LUT entry 843 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2A64++0x3
|
|
line.long 0x0 "LUT844H,Graphic MMU LUT entry 844 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2A6C++0x3
|
|
line.long 0x0 "LUT845H,Graphic MMU LUT entry 845 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2A74++0x3
|
|
line.long 0x0 "LUT846H,Graphic MMU LUT entry 846 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2A7C++0x3
|
|
line.long 0x0 "LUT847H,Graphic MMU LUT entry 847 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2A84++0x3
|
|
line.long 0x0 "LUT848H,Graphic MMU LUT entry 848 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2A8C++0x3
|
|
line.long 0x0 "LUT849H,Graphic MMU LUT entry 849 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2A94++0x3
|
|
line.long 0x0 "LUT850H,Graphic MMU LUT entry 850 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2A9C++0x3
|
|
line.long 0x0 "LUT851H,Graphic MMU LUT entry 851 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2AA4++0x3
|
|
line.long 0x0 "LUT852H,Graphic MMU LUT entry 852 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2AAC++0x3
|
|
line.long 0x0 "LUT853H,Graphic MMU LUT entry 853 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2AB4++0x3
|
|
line.long 0x0 "LUT854H,Graphic MMU LUT entry 854 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2ABC++0x3
|
|
line.long 0x0 "LUT855H,Graphic MMU LUT entry 855 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2AC4++0x3
|
|
line.long 0x0 "LUT856H,Graphic MMU LUT entry 856 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2ACC++0x3
|
|
line.long 0x0 "LUT857H,Graphic MMU LUT entry 857 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2AD4++0x3
|
|
line.long 0x0 "LUT858H,Graphic MMU LUT entry 858 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2ADC++0x3
|
|
line.long 0x0 "LUT859H,Graphic MMU LUT entry 859 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2AE4++0x3
|
|
line.long 0x0 "LUT860H,Graphic MMU LUT entry 860 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2AEC++0x3
|
|
line.long 0x0 "LUT861H,Graphic MMU LUT entry 861 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2AF4++0x3
|
|
line.long 0x0 "LUT862H,Graphic MMU LUT entry 862 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2AFC++0x3
|
|
line.long 0x0 "LUT863H,Graphic MMU LUT entry 863 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2B04++0x3
|
|
line.long 0x0 "LUT864H,Graphic MMU LUT entry 864 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2B0C++0x3
|
|
line.long 0x0 "LUT865H,Graphic MMU LUT entry 865 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2B14++0x3
|
|
line.long 0x0 "LUT866H,Graphic MMU LUT entry 866 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2B1C++0x3
|
|
line.long 0x0 "LUT867H,Graphic MMU LUT entry 867 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2B24++0x3
|
|
line.long 0x0 "LUT868H,Graphic MMU LUT entry 868 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2B2C++0x3
|
|
line.long 0x0 "LUT869H,Graphic MMU LUT entry 869 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2B34++0x3
|
|
line.long 0x0 "LUT870H,Graphic MMU LUT entry 870 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2B3C++0x3
|
|
line.long 0x0 "LUT871H,Graphic MMU LUT entry 871 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2B44++0x3
|
|
line.long 0x0 "LUT872H,Graphic MMU LUT entry 872 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2B4C++0x3
|
|
line.long 0x0 "LUT873H,Graphic MMU LUT entry 873 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2B54++0x3
|
|
line.long 0x0 "LUT874H,Graphic MMU LUT entry 874 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2B5C++0x3
|
|
line.long 0x0 "LUT875H,Graphic MMU LUT entry 875 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2B64++0x3
|
|
line.long 0x0 "LUT876H,Graphic MMU LUT entry 876 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2B6C++0x3
|
|
line.long 0x0 "LUT877H,Graphic MMU LUT entry 877 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2B74++0x3
|
|
line.long 0x0 "LUT878H,Graphic MMU LUT entry 878 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2B7C++0x3
|
|
line.long 0x0 "LUT879H,Graphic MMU LUT entry 879 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2B84++0x3
|
|
line.long 0x0 "LUT880H,Graphic MMU LUT entry 880 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2B8C++0x3
|
|
line.long 0x0 "LUT881H,Graphic MMU LUT entry 881 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2B94++0x3
|
|
line.long 0x0 "LUT882H,Graphic MMU LUT entry 882 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2B9C++0x3
|
|
line.long 0x0 "LUT883H,Graphic MMU LUT entry 883 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2BA4++0x3
|
|
line.long 0x0 "LUT884H,Graphic MMU LUT entry 884 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2BAC++0x3
|
|
line.long 0x0 "LUT885H,Graphic MMU LUT entry 885 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2BB4++0x3
|
|
line.long 0x0 "LUT886H,Graphic MMU LUT entry 886 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2BBC++0x3
|
|
line.long 0x0 "LUT887H,Graphic MMU LUT entry 887 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2BC4++0x3
|
|
line.long 0x0 "LUT888H,Graphic MMU LUT entry 888 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2BCC++0x3
|
|
line.long 0x0 "LUT889H,Graphic MMU LUT entry 889 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2BD4++0x3
|
|
line.long 0x0 "LUT890H,Graphic MMU LUT entry 890 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2BDC++0x3
|
|
line.long 0x0 "LUT891H,Graphic MMU LUT entry 891 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2BE4++0x3
|
|
line.long 0x0 "LUT892H,Graphic MMU LUT entry 892 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2BEC++0x3
|
|
line.long 0x0 "LUT893H,Graphic MMU LUT entry 893 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2BF4++0x3
|
|
line.long 0x0 "LUT894H,Graphic MMU LUT entry 894 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2BFC++0x3
|
|
line.long 0x0 "LUT895H,Graphic MMU LUT entry 895 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2C04++0x3
|
|
line.long 0x0 "LUT896H,Graphic MMU LUT entry 896 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2C0C++0x3
|
|
line.long 0x0 "LUT897H,Graphic MMU LUT entry 897 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2C14++0x3
|
|
line.long 0x0 "LUT898H,Graphic MMU LUT entry 898 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2C1C++0x3
|
|
line.long 0x0 "LUT899H,Graphic MMU LUT entry 899 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2C24++0x3
|
|
line.long 0x0 "LUT900H,Graphic MMU LUT entry 900 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2C2C++0x3
|
|
line.long 0x0 "LUT901H,Graphic MMU LUT entry 901 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2C34++0x3
|
|
line.long 0x0 "LUT902H,Graphic MMU LUT entry 902 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2C3C++0x3
|
|
line.long 0x0 "LUT903H,Graphic MMU LUT entry 903 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2C44++0x3
|
|
line.long 0x0 "LUT904H,Graphic MMU LUT entry 904 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2C4C++0x3
|
|
line.long 0x0 "LUT905H,Graphic MMU LUT entry 905 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2C54++0x3
|
|
line.long 0x0 "LUT906H,Graphic MMU LUT entry 906 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2C5C++0x3
|
|
line.long 0x0 "LUT907H,Graphic MMU LUT entry 907 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2C64++0x3
|
|
line.long 0x0 "LUT908H,Graphic MMU LUT entry 908 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2C6C++0x3
|
|
line.long 0x0 "LUT909H,Graphic MMU LUT entry 909 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2C74++0x3
|
|
line.long 0x0 "LUT910H,Graphic MMU LUT entry 910 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2C7C++0x3
|
|
line.long 0x0 "LUT911H,Graphic MMU LUT entry 911 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2C84++0x3
|
|
line.long 0x0 "LUT912H,Graphic MMU LUT entry 912 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2C8C++0x3
|
|
line.long 0x0 "LUT913H,Graphic MMU LUT entry 913 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2C94++0x3
|
|
line.long 0x0 "LUT914H,Graphic MMU LUT entry 914 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2C9C++0x3
|
|
line.long 0x0 "LUT915H,Graphic MMU LUT entry 915 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2CA4++0x3
|
|
line.long 0x0 "LUT916H,Graphic MMU LUT entry 916 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2CAC++0x3
|
|
line.long 0x0 "LUT917H,Graphic MMU LUT entry 917 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2CB4++0x3
|
|
line.long 0x0 "LUT918H,Graphic MMU LUT entry 918 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2CBC++0x3
|
|
line.long 0x0 "LUT919H,Graphic MMU LUT entry 919 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2CC4++0x3
|
|
line.long 0x0 "LUT920H,Graphic MMU LUT entry 920 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2CCC++0x3
|
|
line.long 0x0 "LUT921H,Graphic MMU LUT entry 921 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2CD4++0x3
|
|
line.long 0x0 "LUT922H,Graphic MMU LUT entry 922 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2CDC++0x3
|
|
line.long 0x0 "LUT923H,Graphic MMU LUT entry 923 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2CE4++0x3
|
|
line.long 0x0 "LUT924H,Graphic MMU LUT entry 924 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2CEC++0x3
|
|
line.long 0x0 "LUT925H,Graphic MMU LUT entry 925 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2CF4++0x3
|
|
line.long 0x0 "LUT926H,Graphic MMU LUT entry 926 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2CFC++0x3
|
|
line.long 0x0 "LUT927H,Graphic MMU LUT entry 927 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2D04++0x3
|
|
line.long 0x0 "LUT928H,Graphic MMU LUT entry 928 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2D0C++0x3
|
|
line.long 0x0 "LUT929H,Graphic MMU LUT entry 929 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2D14++0x3
|
|
line.long 0x0 "LUT930H,Graphic MMU LUT entry 930 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2D1C++0x3
|
|
line.long 0x0 "LUT931H,Graphic MMU LUT entry 931 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2D24++0x3
|
|
line.long 0x0 "LUT932H,Graphic MMU LUT entry 932 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2D2C++0x3
|
|
line.long 0x0 "LUT933H,Graphic MMU LUT entry 933 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2D34++0x3
|
|
line.long 0x0 "LUT934H,Graphic MMU LUT entry 934 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2D3C++0x3
|
|
line.long 0x0 "LUT935H,Graphic MMU LUT entry 935 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2D44++0x3
|
|
line.long 0x0 "LUT936H,Graphic MMU LUT entry 936 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2D4C++0x3
|
|
line.long 0x0 "LUT937H,Graphic MMU LUT entry 937 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2D54++0x3
|
|
line.long 0x0 "LUT938H,Graphic MMU LUT entry 938 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2D5C++0x3
|
|
line.long 0x0 "LUT939H,Graphic MMU LUT entry 939 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2D64++0x3
|
|
line.long 0x0 "LUT940H,Graphic MMU LUT entry 940 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2D6C++0x3
|
|
line.long 0x0 "LUT941H,Graphic MMU LUT entry 941 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2D74++0x3
|
|
line.long 0x0 "LUT942H,Graphic MMU LUT entry 942 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2D7C++0x3
|
|
line.long 0x0 "LUT943H,Graphic MMU LUT entry 943 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2D84++0x3
|
|
line.long 0x0 "LUT944H,Graphic MMU LUT entry 944 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2D8C++0x3
|
|
line.long 0x0 "LUT945H,Graphic MMU LUT entry 945 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2D94++0x3
|
|
line.long 0x0 "LUT946H,Graphic MMU LUT entry 946 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2D9C++0x3
|
|
line.long 0x0 "LUT947H,Graphic MMU LUT entry 947 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2DA4++0x3
|
|
line.long 0x0 "LUT948H,Graphic MMU LUT entry 948 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2DAC++0x3
|
|
line.long 0x0 "LUT949H,Graphic MMU LUT entry 949 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2DB4++0x3
|
|
line.long 0x0 "LUT950H,Graphic MMU LUT entry 950 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2DBC++0x3
|
|
line.long 0x0 "LUT951H,Graphic MMU LUT entry 951 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2DC4++0x3
|
|
line.long 0x0 "LUT952H,Graphic MMU LUT entry 952 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2DCC++0x3
|
|
line.long 0x0 "LUT953H,Graphic MMU LUT entry 953 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2DD4++0x3
|
|
line.long 0x0 "LUT954H,Graphic MMU LUT entry 954 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2DDC++0x3
|
|
line.long 0x0 "LUT955H,Graphic MMU LUT entry 955 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2DE4++0x3
|
|
line.long 0x0 "LUT956H,Graphic MMU LUT entry 956 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2DEC++0x3
|
|
line.long 0x0 "LUT957H,Graphic MMU LUT entry 957 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2DF4++0x3
|
|
line.long 0x0 "LUT958H,Graphic MMU LUT entry 958 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2DFC++0x3
|
|
line.long 0x0 "LUT959H,Graphic MMU LUT entry 959 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2E04++0x3
|
|
line.long 0x0 "LUT960H,Graphic MMU LUT entry 960 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2E0C++0x3
|
|
line.long 0x0 "LUT961H,Graphic MMU LUT entry 961 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2E14++0x3
|
|
line.long 0x0 "LUT962H,Graphic MMU LUT entry 962 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2E1C++0x3
|
|
line.long 0x0 "LUT963H,Graphic MMU LUT entry 963 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2E24++0x3
|
|
line.long 0x0 "LUT964H,Graphic MMU LUT entry 964 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2E2C++0x3
|
|
line.long 0x0 "LUT965H,Graphic MMU LUT entry 965 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2E34++0x3
|
|
line.long 0x0 "LUT966H,Graphic MMU LUT entry 966 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2E3C++0x3
|
|
line.long 0x0 "LUT967H,Graphic MMU LUT entry 967 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2E44++0x3
|
|
line.long 0x0 "LUT968H,Graphic MMU LUT entry 968 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2E4C++0x3
|
|
line.long 0x0 "LUT969H,Graphic MMU LUT entry 969 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2E54++0x3
|
|
line.long 0x0 "LUT970H,Graphic MMU LUT entry 970 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2E5C++0x3
|
|
line.long 0x0 "LUT971H,Graphic MMU LUT entry 971 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2E64++0x3
|
|
line.long 0x0 "LUT972H,Graphic MMU LUT entry 972 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2E6C++0x3
|
|
line.long 0x0 "LUT973H,Graphic MMU LUT entry 973 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2E74++0x3
|
|
line.long 0x0 "LUT974H,Graphic MMU LUT entry 974 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2E7C++0x3
|
|
line.long 0x0 "LUT975H,Graphic MMU LUT entry 975 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2E84++0x3
|
|
line.long 0x0 "LUT976H,Graphic MMU LUT entry 976 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2E8C++0x3
|
|
line.long 0x0 "LUT977H,Graphic MMU LUT entry 977 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2E94++0x3
|
|
line.long 0x0 "LUT978H,Graphic MMU LUT entry 978 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2E9C++0x3
|
|
line.long 0x0 "LUT979H,Graphic MMU LUT entry 979 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2EA4++0x3
|
|
line.long 0x0 "LUT980H,Graphic MMU LUT entry 980 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2EAC++0x3
|
|
line.long 0x0 "LUT981H,Graphic MMU LUT entry 981 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2EB4++0x3
|
|
line.long 0x0 "LUT982H,Graphic MMU LUT entry 982 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2EBC++0x3
|
|
line.long 0x0 "LUT983H,Graphic MMU LUT entry 983 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2EC4++0x3
|
|
line.long 0x0 "LUT984H,Graphic MMU LUT entry 984 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2ECC++0x3
|
|
line.long 0x0 "LUT985H,Graphic MMU LUT entry 985 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2ED4++0x3
|
|
line.long 0x0 "LUT986H,Graphic MMU LUT entry 986 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2EDC++0x3
|
|
line.long 0x0 "LUT987H,Graphic MMU LUT entry 987 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2EE4++0x3
|
|
line.long 0x0 "LUT988H,Graphic MMU LUT entry 988 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2EEC++0x3
|
|
line.long 0x0 "LUT989H,Graphic MMU LUT entry 989 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2EF4++0x3
|
|
line.long 0x0 "LUT990H,Graphic MMU LUT entry 990 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2EFC++0x3
|
|
line.long 0x0 "LUT991H,Graphic MMU LUT entry 991 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2F04++0x3
|
|
line.long 0x0 "LUT992H,Graphic MMU LUT entry 992 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2F0C++0x3
|
|
line.long 0x0 "LUT993H,Graphic MMU LUT entry 993 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2F14++0x3
|
|
line.long 0x0 "LUT994H,Graphic MMU LUT entry 994 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2F1C++0x3
|
|
line.long 0x0 "LUT995H,Graphic MMU LUT entry 995 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2F24++0x3
|
|
line.long 0x0 "LUT996H,Graphic MMU LUT entry 996 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2F2C++0x3
|
|
line.long 0x0 "LUT997H,Graphic MMU LUT entry 997 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2F34++0x3
|
|
line.long 0x0 "LUT998H,Graphic MMU LUT entry 998 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2F3C++0x3
|
|
line.long 0x0 "LUT999H,Graphic MMU LUT entry 999 high"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2F44++0x3
|
|
line.long 0x0 "LUT1000H,Graphic MMU LUT entry 1000"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2F4C++0x3
|
|
line.long 0x0 "LUT1001H,Graphic MMU LUT entry 1001"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2F54++0x3
|
|
line.long 0x0 "LUT1002H,Graphic MMU LUT entry 1002"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2F5C++0x3
|
|
line.long 0x0 "LUT1003H,Graphic MMU LUT entry 1003"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2F64++0x3
|
|
line.long 0x0 "LUT1004H,Graphic MMU LUT entry 1004"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2F6C++0x3
|
|
line.long 0x0 "LUT1005H,Graphic MMU LUT entry 1005"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2F74++0x3
|
|
line.long 0x0 "LUT1006H,Graphic MMU LUT entry 1006"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2F7C++0x3
|
|
line.long 0x0 "LUT1007H,Graphic MMU LUT entry 1007"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2F84++0x3
|
|
line.long 0x0 "LUT1008H,Graphic MMU LUT entry 1008"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2F8C++0x3
|
|
line.long 0x0 "LUT1009H,Graphic MMU LUT entry 1009"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2F94++0x3
|
|
line.long 0x0 "LUT1010H,Graphic MMU LUT entry 1010"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2F9C++0x3
|
|
line.long 0x0 "LUT1011H,Graphic MMU LUT entry 1011"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2FA4++0x3
|
|
line.long 0x0 "LUT1012H,Graphic MMU LUT entry 1012"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2FAC++0x3
|
|
line.long 0x0 "LUT1013H,Graphic MMU LUT entry 1013"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2FB4++0x3
|
|
line.long 0x0 "LUT1014H,Graphic MMU LUT entry 1014"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2FBC++0x3
|
|
line.long 0x0 "LUT1015H,Graphic MMU LUT entry 1015"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2FC4++0x3
|
|
line.long 0x0 "LUT1016H,Graphic MMU LUT entry 1016"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2FCC++0x3
|
|
line.long 0x0 "LUT1017H,Graphic MMU LUT entry 1017"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2FD4++0x3
|
|
line.long 0x0 "LUT1018H,Graphic MMU LUT entry 1018"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2FDC++0x3
|
|
line.long 0x0 "LUT1019H,Graphic MMU LUT entry 1019"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2FE4++0x3
|
|
line.long 0x0 "LUT1020H,Graphic MMU LUT entry 1020"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2FEC++0x3
|
|
line.long 0x0 "LUT1021H,Graphic MMU LUT entry 1021"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2FF4++0x3
|
|
line.long 0x0 "LUT1022H,Graphic MMU LUT entry 1022"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
group.long 0x2FFC++0x3
|
|
line.long 0x0 "LUT1023H,Graphic MMU LUT entry 1023"
|
|
hexmask.long.tbyte 0x0 4.--21. 1. "LO,Line offset"
|
|
tree.end
|
|
endif
|
|
tree "GPIO (General-Purpose I/Os)"
|
|
base ad:0x0
|
|
tree "GPIOA"
|
|
base ad:0x48000000
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "MODER,GPIO port mode register"
|
|
bitfld.long 0x0 30.--31. "MODER15,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 28.--29. "MODER14,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 26.--27. "MODER13,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 24.--25. "MODER12,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 22.--23. "MODER11,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 20.--21. "MODER10,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "MODER9,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 16.--17. "MODER8,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 14.--15. "MODER7,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 12.--13. "MODER6,Port x configuration bits (y =" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 10.--11. "MODER5,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "MODER4,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 6.--7. "MODER3,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 4.--5. "MODER2,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 2.--3. "MODER1,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "MODER0,Port x configuration bits (y =" "0,1,2,3"
|
|
line.long 0x4 "OTYPER,GPIO port output type register"
|
|
bitfld.long 0x4 15. "OT15,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 14. "OT14,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 13. "OT13,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 12. "OT12,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 11. "OT11,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 10. "OT10,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 9. "OT9,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 8. "OT8,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 7. "OT7,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 6. "OT6,Port x configuration bits (y =" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "OT5,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 4. "OT4,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 3. "OT3,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 2. "OT2,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 1. "OT1,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 0. "OT0,Port x configuration bits (y =" "0,1"
|
|
line.long 0x8 "OSPEEDR,GPIO port output speed"
|
|
bitfld.long 0x8 30.--31. "OSPEEDR15,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 28.--29. "OSPEEDR14,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 26.--27. "OSPEEDR13,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 24.--25. "OSPEEDR12,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 22.--23. "OSPEEDR11,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 20.--21. "OSPEEDR10,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 18.--19. "OSPEEDR9,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 16.--17. "OSPEEDR8,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 14.--15. "OSPEEDR7,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 12.--13. "OSPEEDR6,Port x configuration bits (y =" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x8 10.--11. "OSPEEDR5,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 8.--9. "OSPEEDR4,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 6.--7. "OSPEEDR3,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 4.--5. "OSPEEDR2,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 2.--3. "OSPEEDR1,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 0.--1. "OSPEEDR0,Port x configuration bits (y =" "0,1,2,3"
|
|
line.long 0xC "PUPDR,GPIO port pull-up/pull-down"
|
|
bitfld.long 0xC 30.--31. "PUPDR15,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 28.--29. "PUPDR14,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 26.--27. "PUPDR13,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 24.--25. "PUPDR12,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 22.--23. "PUPDR11,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 20.--21. "PUPDR10,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 18.--19. "PUPDR9,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 16.--17. "PUPDR8,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 14.--15. "PUPDR7,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 12.--13. "PUPDR6,Port x configuration bits (y =" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0xC 10.--11. "PUPDR5,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 8.--9. "PUPDR4,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 6.--7. "PUPDR3,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 4.--5. "PUPDR2,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 2.--3. "PUPDR1,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 0.--1. "PUPDR0,Port x configuration bits (y =" "0,1,2,3"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "IDR,GPIO port input data register"
|
|
bitfld.long 0x0 15. "IDR15,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 14. "IDR14,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 13. "IDR13,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 12. "IDR12,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 11. "IDR11,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 10. "IDR10,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 9. "IDR9,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 8. "IDR8,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 7. "IDR7,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 6. "IDR6,Port input data (y =" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "IDR5,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 4. "IDR4,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 3. "IDR3,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 2. "IDR2,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 1. "IDR1,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 0. "IDR0,Port input data (y =" "0,1"
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "ODR,GPIO port output data register"
|
|
bitfld.long 0x0 15. "ODR15,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 14. "ODR14,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 13. "ODR13,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 12. "ODR12,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 11. "ODR11,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 10. "ODR10,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 9. "ODR9,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 8. "ODR8,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 7. "ODR7,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 6. "ODR6,Port output data (y =" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "ODR5,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 4. "ODR4,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 3. "ODR3,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 2. "ODR2,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 1. "ODR1,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 0. "ODR0,Port output data (y =" "0,1"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x0 "BSRR,GPIO port bit set/reset"
|
|
bitfld.long 0x0 31. "BR15,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 30. "BR14,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 29. "BR13,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 28. "BR12,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 27. "BR11,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 26. "BR10,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 25. "BR9,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 24. "BR8,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 23. "BR7,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 22. "BR6,Port x reset bit y (y =" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "BR5,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 20. "BR4,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 19. "BR3,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 18. "BR2,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 17. "BR1,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 16. "BR0,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 15. "BS15,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 14. "BS14,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 13. "BS13,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 12. "BS12,Port x set bit y (y=" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "BS11,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 10. "BS10,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 9. "BS9,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 8. "BS8,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 7. "BS7,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 6. "BS6,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 5. "BS5,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 4. "BS4,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 3. "BS3,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 2. "BS2,Port x set bit y (y=" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "BS1,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 0. "BS0,Port x set bit y (y=" "0,1"
|
|
group.long 0x1C++0xB
|
|
line.long 0x0 "LCKR,GPIO port configuration lock"
|
|
bitfld.long 0x0 16. "LCKK,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 15. "LCK15,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 14. "LCK14,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 13. "LCK13,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 12. "LCK12,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 11. "LCK11,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 10. "LCK10,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 9. "LCK9,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 8. "LCK8,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 7. "LCK7,Port x lock bit y (y=" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "LCK6,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 5. "LCK5,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 4. "LCK4,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 3. "LCK3,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 2. "LCK2,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 1. "LCK1,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 0. "LCK0,Port x lock bit y (y=" "0,1"
|
|
line.long 0x4 "AFRL,GPIO alternate function low"
|
|
hexmask.long.byte 0x4 28.--31. 1. "AFRL7,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 24.--27. 1. "AFRL6,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 20.--23. 1. "AFRL5,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 16.--19. 1. "AFRL4,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 12.--15. 1. "AFRL3,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 8.--11. 1. "AFRL2,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 4.--7. 1. "AFRL1,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 0.--3. 1. "AFRL0,Alternate function selection for port x"
|
|
line.long 0x8 "AFRH,GPIO alternate function high"
|
|
hexmask.long.byte 0x8 28.--31. 1. "AFRH15,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 24.--27. 1. "AFRH14,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 20.--23. 1. "AFRH13,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 16.--19. 1. "AFRH12,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 12.--15. 1. "AFRH11,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 8.--11. 1. "AFRH10,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 4.--7. 1. "AFRH9,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 0.--3. 1. "AFRH8,Alternate function selection for port x"
|
|
wgroup.long 0x28++0x3
|
|
line.long 0x0 "BRR,GPIO port bit reset register"
|
|
bitfld.long 0x0 15. "BR15,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 14. "BR14,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 13. "BR13,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 12. "BR12,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 11. "BR11,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 10. "BR10,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 9. "BR9,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 8. "BR8,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 7. "BR7,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 6. "BR6,Port Reset bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "BR5,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 4. "BR4,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 3. "BR3,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 2. "BR2,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 1. "BR1,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 0. "BR0,Port Reset bit" "0,1"
|
|
group.long 0x2C++0x3
|
|
line.long 0x0 "ASCR,GPIO port analog switch control"
|
|
bitfld.long 0x0 15. "ASC15,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 14. "ASC14,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 13. "ASC13,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 12. "ASC12,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 11. "ASC11,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 10. "ASC10,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 9. "ASC9,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 8. "ASC8,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 7. "ASC7,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 6. "ASC6,Port analog switch control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "ASC5,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 4. "ASC4,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 3. "ASC3,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 2. "ASC2,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 1. "ASC1,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 0. "ASC0,Port analog switch control" "0,1"
|
|
tree.end
|
|
tree "GPIOB"
|
|
base ad:0x48000400
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "MODER,GPIO port mode register"
|
|
bitfld.long 0x0 30.--31. "MODER15,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 28.--29. "MODER14,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 26.--27. "MODER13,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 24.--25. "MODER12,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 22.--23. "MODER11,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 20.--21. "MODER10,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "MODER9,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 16.--17. "MODER8,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 14.--15. "MODER7,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 12.--13. "MODER6,Port x configuration bits (y =" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 10.--11. "MODER5,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "MODER4,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 6.--7. "MODER3,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 4.--5. "MODER2,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 2.--3. "MODER1,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "MODER0,Port x configuration bits (y =" "0,1,2,3"
|
|
line.long 0x4 "OTYPER,GPIO port output type register"
|
|
bitfld.long 0x4 15. "OT15,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 14. "OT14,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 13. "OT13,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 12. "OT12,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 11. "OT11,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 10. "OT10,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 9. "OT9,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 8. "OT8,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 7. "OT7,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 6. "OT6,Port x configuration bits (y =" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "OT5,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 4. "OT4,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 3. "OT3,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 2. "OT2,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 1. "OT1,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 0. "OT0,Port x configuration bits (y =" "0,1"
|
|
line.long 0x8 "OSPEEDR,GPIO port output speed"
|
|
bitfld.long 0x8 30.--31. "OSPEEDR15,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 28.--29. "OSPEEDR14,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 26.--27. "OSPEEDR13,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 24.--25. "OSPEEDR12,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 22.--23. "OSPEEDR11,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 20.--21. "OSPEEDR10,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 18.--19. "OSPEEDR9,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 16.--17. "OSPEEDR8,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 14.--15. "OSPEEDR7,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 12.--13. "OSPEEDR6,Port x configuration bits (y =" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x8 10.--11. "OSPEEDR5,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 8.--9. "OSPEEDR4,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 6.--7. "OSPEEDR3,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 4.--5. "OSPEEDR2,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 2.--3. "OSPEEDR1,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 0.--1. "OSPEEDR0,Port x configuration bits (y =" "0,1,2,3"
|
|
line.long 0xC "PUPDR,GPIO port pull-up/pull-down"
|
|
bitfld.long 0xC 30.--31. "PUPDR15,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 28.--29. "PUPDR14,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 26.--27. "PUPDR13,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 24.--25. "PUPDR12,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 22.--23. "PUPDR11,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 20.--21. "PUPDR10,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 18.--19. "PUPDR9,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 16.--17. "PUPDR8,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 14.--15. "PUPDR7,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 12.--13. "PUPDR6,Port x configuration bits (y =" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0xC 10.--11. "PUPDR5,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 8.--9. "PUPDR4,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 6.--7. "PUPDR3,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 4.--5. "PUPDR2,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 2.--3. "PUPDR1,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 0.--1. "PUPDR0,Port x configuration bits (y =" "0,1,2,3"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "IDR,GPIO port input data register"
|
|
bitfld.long 0x0 15. "IDR15,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 14. "IDR14,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 13. "IDR13,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 12. "IDR12,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 11. "IDR11,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 10. "IDR10,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 9. "IDR9,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 8. "IDR8,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 7. "IDR7,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 6. "IDR6,Port input data (y =" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "IDR5,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 4. "IDR4,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 3. "IDR3,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 2. "IDR2,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 1. "IDR1,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 0. "IDR0,Port input data (y =" "0,1"
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "ODR,GPIO port output data register"
|
|
bitfld.long 0x0 15. "ODR15,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 14. "ODR14,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 13. "ODR13,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 12. "ODR12,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 11. "ODR11,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 10. "ODR10,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 9. "ODR9,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 8. "ODR8,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 7. "ODR7,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 6. "ODR6,Port output data (y =" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "ODR5,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 4. "ODR4,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 3. "ODR3,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 2. "ODR2,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 1. "ODR1,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 0. "ODR0,Port output data (y =" "0,1"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x0 "BSRR,GPIO port bit set/reset"
|
|
bitfld.long 0x0 31. "BR15,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 30. "BR14,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 29. "BR13,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 28. "BR12,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 27. "BR11,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 26. "BR10,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 25. "BR9,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 24. "BR8,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 23. "BR7,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 22. "BR6,Port x reset bit y (y =" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "BR5,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 20. "BR4,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 19. "BR3,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 18. "BR2,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 17. "BR1,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 16. "BR0,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 15. "BS15,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 14. "BS14,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 13. "BS13,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 12. "BS12,Port x set bit y (y=" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "BS11,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 10. "BS10,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 9. "BS9,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 8. "BS8,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 7. "BS7,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 6. "BS6,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 5. "BS5,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 4. "BS4,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 3. "BS3,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 2. "BS2,Port x set bit y (y=" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "BS1,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 0. "BS0,Port x set bit y (y=" "0,1"
|
|
group.long 0x1C++0xB
|
|
line.long 0x0 "LCKR,GPIO port configuration lock"
|
|
bitfld.long 0x0 16. "LCKK,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 15. "LCK15,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 14. "LCK14,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 13. "LCK13,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 12. "LCK12,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 11. "LCK11,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 10. "LCK10,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 9. "LCK9,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 8. "LCK8,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 7. "LCK7,Port x lock bit y (y=" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "LCK6,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 5. "LCK5,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 4. "LCK4,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 3. "LCK3,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 2. "LCK2,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 1. "LCK1,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 0. "LCK0,Port x lock bit y (y=" "0,1"
|
|
line.long 0x4 "AFRL,GPIO alternate function low"
|
|
hexmask.long.byte 0x4 28.--31. 1. "AFRL7,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 24.--27. 1. "AFRL6,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 20.--23. 1. "AFRL5,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 16.--19. 1. "AFRL4,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 12.--15. 1. "AFRL3,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 8.--11. 1. "AFRL2,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 4.--7. 1. "AFRL1,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 0.--3. 1. "AFRL0,Alternate function selection for port x"
|
|
line.long 0x8 "AFRH,GPIO alternate function high"
|
|
hexmask.long.byte 0x8 28.--31. 1. "AFRH15,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 24.--27. 1. "AFRH14,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 20.--23. 1. "AFRH13,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 16.--19. 1. "AFRH12,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 12.--15. 1. "AFRH11,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 8.--11. 1. "AFRH10,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 4.--7. 1. "AFRH9,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 0.--3. 1. "AFRH8,Alternate function selection for port x"
|
|
wgroup.long 0x28++0x3
|
|
line.long 0x0 "BRR,GPIO port bit reset register"
|
|
bitfld.long 0x0 15. "BR15,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 14. "BR14,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 13. "BR13,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 12. "BR12,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 11. "BR11,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 10. "BR10,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 9. "BR9,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 8. "BR8,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 7. "BR7,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 6. "BR6,Port Reset bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "BR5,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 4. "BR4,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 3. "BR3,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 2. "BR2,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 1. "BR1,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 0. "BR0,Port Reset bit" "0,1"
|
|
group.long 0x2C++0x3
|
|
line.long 0x0 "ASCR,GPIO port analog switch control"
|
|
bitfld.long 0x0 15. "ASC15,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 14. "ASC14,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 13. "ASC13,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 12. "ASC12,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 11. "ASC11,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 10. "ASC10,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 9. "ASC9,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 8. "ASC8,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 7. "ASC7,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 6. "ASC6,Port analog switch control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "ASC5,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 4. "ASC4,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 3. "ASC3,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 2. "ASC2,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 1. "ASC1,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 0. "ASC0,Port analog switch control" "0,1"
|
|
tree.end
|
|
tree "GPIOC"
|
|
base ad:0x48000800
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "MODER,GPIO port mode register"
|
|
bitfld.long 0x0 30.--31. "MODER15,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 28.--29. "MODER14,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 26.--27. "MODER13,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 24.--25. "MODER12,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 22.--23. "MODER11,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 20.--21. "MODER10,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "MODER9,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 16.--17. "MODER8,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 14.--15. "MODER7,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 12.--13. "MODER6,Port x configuration bits (y =" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 10.--11. "MODER5,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "MODER4,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 6.--7. "MODER3,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 4.--5. "MODER2,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 2.--3. "MODER1,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "MODER0,Port x configuration bits (y =" "0,1,2,3"
|
|
line.long 0x4 "OTYPER,GPIO port output type register"
|
|
bitfld.long 0x4 15. "OT15,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 14. "OT14,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 13. "OT13,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 12. "OT12,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 11. "OT11,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 10. "OT10,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 9. "OT9,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 8. "OT8,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 7. "OT7,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 6. "OT6,Port x configuration bits (y =" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "OT5,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 4. "OT4,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 3. "OT3,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 2. "OT2,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 1. "OT1,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 0. "OT0,Port x configuration bits (y =" "0,1"
|
|
line.long 0x8 "OSPEEDR,GPIO port output speed"
|
|
bitfld.long 0x8 30.--31. "OSPEEDR15,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 28.--29. "OSPEEDR14,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 26.--27. "OSPEEDR13,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 24.--25. "OSPEEDR12,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 22.--23. "OSPEEDR11,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 20.--21. "OSPEEDR10,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 18.--19. "OSPEEDR9,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 16.--17. "OSPEEDR8,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 14.--15. "OSPEEDR7,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 12.--13. "OSPEEDR6,Port x configuration bits (y =" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x8 10.--11. "OSPEEDR5,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 8.--9. "OSPEEDR4,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 6.--7. "OSPEEDR3,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 4.--5. "OSPEEDR2,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 2.--3. "OSPEEDR1,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 0.--1. "OSPEEDR0,Port x configuration bits (y =" "0,1,2,3"
|
|
line.long 0xC "PUPDR,GPIO port pull-up/pull-down"
|
|
bitfld.long 0xC 30.--31. "PUPDR15,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 28.--29. "PUPDR14,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 26.--27. "PUPDR13,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 24.--25. "PUPDR12,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 22.--23. "PUPDR11,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 20.--21. "PUPDR10,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 18.--19. "PUPDR9,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 16.--17. "PUPDR8,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 14.--15. "PUPDR7,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 12.--13. "PUPDR6,Port x configuration bits (y =" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0xC 10.--11. "PUPDR5,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 8.--9. "PUPDR4,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 6.--7. "PUPDR3,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 4.--5. "PUPDR2,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 2.--3. "PUPDR1,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 0.--1. "PUPDR0,Port x configuration bits (y =" "0,1,2,3"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "IDR,GPIO port input data register"
|
|
bitfld.long 0x0 15. "IDR15,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 14. "IDR14,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 13. "IDR13,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 12. "IDR12,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 11. "IDR11,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 10. "IDR10,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 9. "IDR9,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 8. "IDR8,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 7. "IDR7,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 6. "IDR6,Port input data (y =" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "IDR5,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 4. "IDR4,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 3. "IDR3,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 2. "IDR2,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 1. "IDR1,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 0. "IDR0,Port input data (y =" "0,1"
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "ODR,GPIO port output data register"
|
|
bitfld.long 0x0 15. "ODR15,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 14. "ODR14,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 13. "ODR13,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 12. "ODR12,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 11. "ODR11,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 10. "ODR10,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 9. "ODR9,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 8. "ODR8,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 7. "ODR7,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 6. "ODR6,Port output data (y =" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "ODR5,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 4. "ODR4,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 3. "ODR3,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 2. "ODR2,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 1. "ODR1,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 0. "ODR0,Port output data (y =" "0,1"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x0 "BSRR,GPIO port bit set/reset"
|
|
bitfld.long 0x0 31. "BR15,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 30. "BR14,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 29. "BR13,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 28. "BR12,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 27. "BR11,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 26. "BR10,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 25. "BR9,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 24. "BR8,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 23. "BR7,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 22. "BR6,Port x reset bit y (y =" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "BR5,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 20. "BR4,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 19. "BR3,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 18. "BR2,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 17. "BR1,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 16. "BR0,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 15. "BS15,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 14. "BS14,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 13. "BS13,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 12. "BS12,Port x set bit y (y=" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "BS11,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 10. "BS10,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 9. "BS9,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 8. "BS8,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 7. "BS7,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 6. "BS6,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 5. "BS5,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 4. "BS4,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 3. "BS3,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 2. "BS2,Port x set bit y (y=" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "BS1,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 0. "BS0,Port x set bit y (y=" "0,1"
|
|
group.long 0x1C++0xB
|
|
line.long 0x0 "LCKR,GPIO port configuration lock"
|
|
bitfld.long 0x0 16. "LCKK,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 15. "LCK15,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 14. "LCK14,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 13. "LCK13,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 12. "LCK12,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 11. "LCK11,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 10. "LCK10,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 9. "LCK9,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 8. "LCK8,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 7. "LCK7,Port x lock bit y (y=" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "LCK6,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 5. "LCK5,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 4. "LCK4,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 3. "LCK3,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 2. "LCK2,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 1. "LCK1,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 0. "LCK0,Port x lock bit y (y=" "0,1"
|
|
line.long 0x4 "AFRL,GPIO alternate function low"
|
|
hexmask.long.byte 0x4 28.--31. 1. "AFRL7,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 24.--27. 1. "AFRL6,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 20.--23. 1. "AFRL5,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 16.--19. 1. "AFRL4,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 12.--15. 1. "AFRL3,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 8.--11. 1. "AFRL2,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 4.--7. 1. "AFRL1,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 0.--3. 1. "AFRL0,Alternate function selection for port x"
|
|
line.long 0x8 "AFRH,GPIO alternate function high"
|
|
hexmask.long.byte 0x8 28.--31. 1. "AFRH15,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 24.--27. 1. "AFRH14,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 20.--23. 1. "AFRH13,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 16.--19. 1. "AFRH12,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 12.--15. 1. "AFRH11,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 8.--11. 1. "AFRH10,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 4.--7. 1. "AFRH9,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 0.--3. 1. "AFRH8,Alternate function selection for port x"
|
|
wgroup.long 0x28++0x3
|
|
line.long 0x0 "BRR,GPIO port bit reset register"
|
|
bitfld.long 0x0 15. "BR15,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 14. "BR14,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 13. "BR13,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 12. "BR12,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 11. "BR11,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 10. "BR10,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 9. "BR9,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 8. "BR8,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 7. "BR7,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 6. "BR6,Port Reset bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "BR5,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 4. "BR4,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 3. "BR3,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 2. "BR2,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 1. "BR1,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 0. "BR0,Port Reset bit" "0,1"
|
|
group.long 0x2C++0x3
|
|
line.long 0x0 "ASCR,GPIO port analog switch control"
|
|
bitfld.long 0x0 15. "ASC15,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 14. "ASC14,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 13. "ASC13,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 12. "ASC12,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 11. "ASC11,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 10. "ASC10,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 9. "ASC9,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 8. "ASC8,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 7. "ASC7,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 6. "ASC6,Port analog switch control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "ASC5,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 4. "ASC4,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 3. "ASC3,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 2. "ASC2,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 1. "ASC1,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 0. "ASC0,Port analog switch control" "0,1"
|
|
tree.end
|
|
tree "GPIOD"
|
|
base ad:0x48000C00
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "MODER,GPIO port mode register"
|
|
bitfld.long 0x0 30.--31. "MODER15,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 28.--29. "MODER14,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 26.--27. "MODER13,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 24.--25. "MODER12,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 22.--23. "MODER11,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 20.--21. "MODER10,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "MODER9,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 16.--17. "MODER8,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 14.--15. "MODER7,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 12.--13. "MODER6,Port x configuration bits (y =" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 10.--11. "MODER5,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "MODER4,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 6.--7. "MODER3,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 4.--5. "MODER2,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 2.--3. "MODER1,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "MODER0,Port x configuration bits (y =" "0,1,2,3"
|
|
line.long 0x4 "OTYPER,GPIO port output type register"
|
|
bitfld.long 0x4 15. "OT15,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 14. "OT14,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 13. "OT13,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 12. "OT12,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 11. "OT11,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 10. "OT10,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 9. "OT9,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 8. "OT8,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 7. "OT7,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 6. "OT6,Port x configuration bits (y =" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "OT5,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 4. "OT4,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 3. "OT3,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 2. "OT2,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 1. "OT1,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 0. "OT0,Port x configuration bits (y =" "0,1"
|
|
line.long 0x8 "OSPEEDR,GPIO port output speed"
|
|
bitfld.long 0x8 30.--31. "OSPEEDR15,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 28.--29. "OSPEEDR14,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 26.--27. "OSPEEDR13,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 24.--25. "OSPEEDR12,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 22.--23. "OSPEEDR11,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 20.--21. "OSPEEDR10,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 18.--19. "OSPEEDR9,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 16.--17. "OSPEEDR8,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 14.--15. "OSPEEDR7,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 12.--13. "OSPEEDR6,Port x configuration bits (y =" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x8 10.--11. "OSPEEDR5,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 8.--9. "OSPEEDR4,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 6.--7. "OSPEEDR3,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 4.--5. "OSPEEDR2,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 2.--3. "OSPEEDR1,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 0.--1. "OSPEEDR0,Port x configuration bits (y =" "0,1,2,3"
|
|
line.long 0xC "PUPDR,GPIO port pull-up/pull-down"
|
|
bitfld.long 0xC 30.--31. "PUPDR15,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 28.--29. "PUPDR14,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 26.--27. "PUPDR13,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 24.--25. "PUPDR12,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 22.--23. "PUPDR11,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 20.--21. "PUPDR10,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 18.--19. "PUPDR9,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 16.--17. "PUPDR8,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 14.--15. "PUPDR7,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 12.--13. "PUPDR6,Port x configuration bits (y =" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0xC 10.--11. "PUPDR5,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 8.--9. "PUPDR4,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 6.--7. "PUPDR3,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 4.--5. "PUPDR2,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 2.--3. "PUPDR1,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 0.--1. "PUPDR0,Port x configuration bits (y =" "0,1,2,3"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "IDR,GPIO port input data register"
|
|
bitfld.long 0x0 15. "IDR15,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 14. "IDR14,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 13. "IDR13,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 12. "IDR12,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 11. "IDR11,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 10. "IDR10,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 9. "IDR9,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 8. "IDR8,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 7. "IDR7,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 6. "IDR6,Port input data (y =" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "IDR5,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 4. "IDR4,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 3. "IDR3,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 2. "IDR2,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 1. "IDR1,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 0. "IDR0,Port input data (y =" "0,1"
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "ODR,GPIO port output data register"
|
|
bitfld.long 0x0 15. "ODR15,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 14. "ODR14,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 13. "ODR13,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 12. "ODR12,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 11. "ODR11,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 10. "ODR10,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 9. "ODR9,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 8. "ODR8,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 7. "ODR7,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 6. "ODR6,Port output data (y =" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "ODR5,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 4. "ODR4,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 3. "ODR3,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 2. "ODR2,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 1. "ODR1,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 0. "ODR0,Port output data (y =" "0,1"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x0 "BSRR,GPIO port bit set/reset"
|
|
bitfld.long 0x0 31. "BR15,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 30. "BR14,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 29. "BR13,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 28. "BR12,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 27. "BR11,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 26. "BR10,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 25. "BR9,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 24. "BR8,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 23. "BR7,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 22. "BR6,Port x reset bit y (y =" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "BR5,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 20. "BR4,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 19. "BR3,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 18. "BR2,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 17. "BR1,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 16. "BR0,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 15. "BS15,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 14. "BS14,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 13. "BS13,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 12. "BS12,Port x set bit y (y=" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "BS11,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 10. "BS10,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 9. "BS9,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 8. "BS8,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 7. "BS7,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 6. "BS6,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 5. "BS5,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 4. "BS4,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 3. "BS3,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 2. "BS2,Port x set bit y (y=" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "BS1,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 0. "BS0,Port x set bit y (y=" "0,1"
|
|
group.long 0x1C++0xB
|
|
line.long 0x0 "LCKR,GPIO port configuration lock"
|
|
bitfld.long 0x0 16. "LCKK,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 15. "LCK15,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 14. "LCK14,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 13. "LCK13,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 12. "LCK12,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 11. "LCK11,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 10. "LCK10,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 9. "LCK9,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 8. "LCK8,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 7. "LCK7,Port x lock bit y (y=" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "LCK6,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 5. "LCK5,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 4. "LCK4,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 3. "LCK3,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 2. "LCK2,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 1. "LCK1,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 0. "LCK0,Port x lock bit y (y=" "0,1"
|
|
line.long 0x4 "AFRL,GPIO alternate function low"
|
|
hexmask.long.byte 0x4 28.--31. 1. "AFRL7,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 24.--27. 1. "AFRL6,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 20.--23. 1. "AFRL5,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 16.--19. 1. "AFRL4,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 12.--15. 1. "AFRL3,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 8.--11. 1. "AFRL2,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 4.--7. 1. "AFRL1,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 0.--3. 1. "AFRL0,Alternate function selection for port x"
|
|
line.long 0x8 "AFRH,GPIO alternate function high"
|
|
hexmask.long.byte 0x8 28.--31. 1. "AFRH15,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 24.--27. 1. "AFRH14,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 20.--23. 1. "AFRH13,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 16.--19. 1. "AFRH12,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 12.--15. 1. "AFRH11,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 8.--11. 1. "AFRH10,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 4.--7. 1. "AFRH9,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 0.--3. 1. "AFRH8,Alternate function selection for port x"
|
|
wgroup.long 0x28++0x3
|
|
line.long 0x0 "BRR,GPIO port bit reset register"
|
|
bitfld.long 0x0 15. "BR15,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 14. "BR14,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 13. "BR13,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 12. "BR12,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 11. "BR11,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 10. "BR10,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 9. "BR9,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 8. "BR8,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 7. "BR7,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 6. "BR6,Port Reset bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "BR5,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 4. "BR4,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 3. "BR3,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 2. "BR2,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 1. "BR1,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 0. "BR0,Port Reset bit" "0,1"
|
|
group.long 0x2C++0x3
|
|
line.long 0x0 "ASCR,GPIO port analog switch control"
|
|
bitfld.long 0x0 15. "ASC15,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 14. "ASC14,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 13. "ASC13,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 12. "ASC12,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 11. "ASC11,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 10. "ASC10,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 9. "ASC9,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 8. "ASC8,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 7. "ASC7,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 6. "ASC6,Port analog switch control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "ASC5,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 4. "ASC4,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 3. "ASC3,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 2. "ASC2,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 1. "ASC1,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 0. "ASC0,Port analog switch control" "0,1"
|
|
tree.end
|
|
tree "GPIOE"
|
|
base ad:0x48001000
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "MODER,GPIO port mode register"
|
|
bitfld.long 0x0 30.--31. "MODER15,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 28.--29. "MODER14,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 26.--27. "MODER13,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 24.--25. "MODER12,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 22.--23. "MODER11,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 20.--21. "MODER10,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "MODER9,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 16.--17. "MODER8,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 14.--15. "MODER7,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 12.--13. "MODER6,Port x configuration bits (y =" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 10.--11. "MODER5,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "MODER4,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 6.--7. "MODER3,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 4.--5. "MODER2,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 2.--3. "MODER1,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "MODER0,Port x configuration bits (y =" "0,1,2,3"
|
|
line.long 0x4 "OTYPER,GPIO port output type register"
|
|
bitfld.long 0x4 15. "OT15,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 14. "OT14,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 13. "OT13,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 12. "OT12,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 11. "OT11,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 10. "OT10,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 9. "OT9,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 8. "OT8,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 7. "OT7,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 6. "OT6,Port x configuration bits (y =" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "OT5,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 4. "OT4,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 3. "OT3,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 2. "OT2,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 1. "OT1,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 0. "OT0,Port x configuration bits (y =" "0,1"
|
|
line.long 0x8 "OSPEEDR,GPIO port output speed"
|
|
bitfld.long 0x8 30.--31. "OSPEEDR15,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 28.--29. "OSPEEDR14,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 26.--27. "OSPEEDR13,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 24.--25. "OSPEEDR12,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 22.--23. "OSPEEDR11,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 20.--21. "OSPEEDR10,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 18.--19. "OSPEEDR9,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 16.--17. "OSPEEDR8,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 14.--15. "OSPEEDR7,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 12.--13. "OSPEEDR6,Port x configuration bits (y =" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x8 10.--11. "OSPEEDR5,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 8.--9. "OSPEEDR4,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 6.--7. "OSPEEDR3,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 4.--5. "OSPEEDR2,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 2.--3. "OSPEEDR1,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 0.--1. "OSPEEDR0,Port x configuration bits (y =" "0,1,2,3"
|
|
line.long 0xC "PUPDR,GPIO port pull-up/pull-down"
|
|
bitfld.long 0xC 30.--31. "PUPDR15,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 28.--29. "PUPDR14,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 26.--27. "PUPDR13,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 24.--25. "PUPDR12,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 22.--23. "PUPDR11,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 20.--21. "PUPDR10,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 18.--19. "PUPDR9,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 16.--17. "PUPDR8,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 14.--15. "PUPDR7,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 12.--13. "PUPDR6,Port x configuration bits (y =" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0xC 10.--11. "PUPDR5,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 8.--9. "PUPDR4,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 6.--7. "PUPDR3,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 4.--5. "PUPDR2,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 2.--3. "PUPDR1,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 0.--1. "PUPDR0,Port x configuration bits (y =" "0,1,2,3"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "IDR,GPIO port input data register"
|
|
bitfld.long 0x0 15. "IDR15,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 14. "IDR14,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 13. "IDR13,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 12. "IDR12,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 11. "IDR11,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 10. "IDR10,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 9. "IDR9,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 8. "IDR8,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 7. "IDR7,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 6. "IDR6,Port input data (y =" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "IDR5,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 4. "IDR4,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 3. "IDR3,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 2. "IDR2,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 1. "IDR1,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 0. "IDR0,Port input data (y =" "0,1"
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "ODR,GPIO port output data register"
|
|
bitfld.long 0x0 15. "ODR15,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 14. "ODR14,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 13. "ODR13,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 12. "ODR12,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 11. "ODR11,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 10. "ODR10,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 9. "ODR9,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 8. "ODR8,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 7. "ODR7,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 6. "ODR6,Port output data (y =" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "ODR5,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 4. "ODR4,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 3. "ODR3,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 2. "ODR2,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 1. "ODR1,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 0. "ODR0,Port output data (y =" "0,1"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x0 "BSRR,GPIO port bit set/reset"
|
|
bitfld.long 0x0 31. "BR15,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 30. "BR14,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 29. "BR13,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 28. "BR12,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 27. "BR11,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 26. "BR10,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 25. "BR9,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 24. "BR8,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 23. "BR7,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 22. "BR6,Port x reset bit y (y =" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "BR5,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 20. "BR4,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 19. "BR3,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 18. "BR2,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 17. "BR1,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 16. "BR0,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 15. "BS15,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 14. "BS14,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 13. "BS13,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 12. "BS12,Port x set bit y (y=" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "BS11,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 10. "BS10,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 9. "BS9,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 8. "BS8,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 7. "BS7,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 6. "BS6,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 5. "BS5,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 4. "BS4,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 3. "BS3,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 2. "BS2,Port x set bit y (y=" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "BS1,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 0. "BS0,Port x set bit y (y=" "0,1"
|
|
group.long 0x1C++0xB
|
|
line.long 0x0 "LCKR,GPIO port configuration lock"
|
|
bitfld.long 0x0 16. "LCKK,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 15. "LCK15,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 14. "LCK14,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 13. "LCK13,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 12. "LCK12,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 11. "LCK11,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 10. "LCK10,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 9. "LCK9,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 8. "LCK8,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 7. "LCK7,Port x lock bit y (y=" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "LCK6,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 5. "LCK5,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 4. "LCK4,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 3. "LCK3,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 2. "LCK2,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 1. "LCK1,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 0. "LCK0,Port x lock bit y (y=" "0,1"
|
|
line.long 0x4 "AFRL,GPIO alternate function low"
|
|
hexmask.long.byte 0x4 28.--31. 1. "AFRL7,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 24.--27. 1. "AFRL6,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 20.--23. 1. "AFRL5,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 16.--19. 1. "AFRL4,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 12.--15. 1. "AFRL3,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 8.--11. 1. "AFRL2,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 4.--7. 1. "AFRL1,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 0.--3. 1. "AFRL0,Alternate function selection for port x"
|
|
line.long 0x8 "AFRH,GPIO alternate function high"
|
|
hexmask.long.byte 0x8 28.--31. 1. "AFRH15,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 24.--27. 1. "AFRH14,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 20.--23. 1. "AFRH13,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 16.--19. 1. "AFRH12,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 12.--15. 1. "AFRH11,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 8.--11. 1. "AFRH10,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 4.--7. 1. "AFRH9,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 0.--3. 1. "AFRH8,Alternate function selection for port x"
|
|
wgroup.long 0x28++0x3
|
|
line.long 0x0 "BRR,GPIO port bit reset register"
|
|
bitfld.long 0x0 15. "BR15,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 14. "BR14,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 13. "BR13,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 12. "BR12,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 11. "BR11,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 10. "BR10,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 9. "BR9,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 8. "BR8,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 7. "BR7,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 6. "BR6,Port Reset bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "BR5,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 4. "BR4,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 3. "BR3,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 2. "BR2,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 1. "BR1,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 0. "BR0,Port Reset bit" "0,1"
|
|
group.long 0x2C++0x3
|
|
line.long 0x0 "ASCR,GPIO port analog switch control"
|
|
bitfld.long 0x0 15. "ASC15,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 14. "ASC14,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 13. "ASC13,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 12. "ASC12,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 11. "ASC11,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 10. "ASC10,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 9. "ASC9,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 8. "ASC8,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 7. "ASC7,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 6. "ASC6,Port analog switch control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "ASC5,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 4. "ASC4,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 3. "ASC3,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 2. "ASC2,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 1. "ASC1,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 0. "ASC0,Port analog switch control" "0,1"
|
|
tree.end
|
|
tree "GPIOF"
|
|
base ad:0x48001400
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "MODER,GPIO port mode register"
|
|
bitfld.long 0x0 30.--31. "MODER15,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 28.--29. "MODER14,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 26.--27. "MODER13,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 24.--25. "MODER12,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 22.--23. "MODER11,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 20.--21. "MODER10,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "MODER9,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 16.--17. "MODER8,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 14.--15. "MODER7,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 12.--13. "MODER6,Port x configuration bits (y =" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 10.--11. "MODER5,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "MODER4,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 6.--7. "MODER3,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 4.--5. "MODER2,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 2.--3. "MODER1,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "MODER0,Port x configuration bits (y =" "0,1,2,3"
|
|
line.long 0x4 "OTYPER,GPIO port output type register"
|
|
bitfld.long 0x4 15. "OT15,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 14. "OT14,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 13. "OT13,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 12. "OT12,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 11. "OT11,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 10. "OT10,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 9. "OT9,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 8. "OT8,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 7. "OT7,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 6. "OT6,Port x configuration bits (y =" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "OT5,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 4. "OT4,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 3. "OT3,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 2. "OT2,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 1. "OT1,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 0. "OT0,Port x configuration bits (y =" "0,1"
|
|
line.long 0x8 "OSPEEDR,GPIO port output speed"
|
|
bitfld.long 0x8 30.--31. "OSPEEDR15,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 28.--29. "OSPEEDR14,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 26.--27. "OSPEEDR13,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 24.--25. "OSPEEDR12,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 22.--23. "OSPEEDR11,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 20.--21. "OSPEEDR10,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 18.--19. "OSPEEDR9,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 16.--17. "OSPEEDR8,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 14.--15. "OSPEEDR7,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 12.--13. "OSPEEDR6,Port x configuration bits (y =" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x8 10.--11. "OSPEEDR5,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 8.--9. "OSPEEDR4,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 6.--7. "OSPEEDR3,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 4.--5. "OSPEEDR2,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 2.--3. "OSPEEDR1,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 0.--1. "OSPEEDR0,Port x configuration bits (y =" "0,1,2,3"
|
|
line.long 0xC "PUPDR,GPIO port pull-up/pull-down"
|
|
bitfld.long 0xC 30.--31. "PUPDR15,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 28.--29. "PUPDR14,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 26.--27. "PUPDR13,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 24.--25. "PUPDR12,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 22.--23. "PUPDR11,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 20.--21. "PUPDR10,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 18.--19. "PUPDR9,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 16.--17. "PUPDR8,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 14.--15. "PUPDR7,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 12.--13. "PUPDR6,Port x configuration bits (y =" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0xC 10.--11. "PUPDR5,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 8.--9. "PUPDR4,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 6.--7. "PUPDR3,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 4.--5. "PUPDR2,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 2.--3. "PUPDR1,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 0.--1. "PUPDR0,Port x configuration bits (y =" "0,1,2,3"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "IDR,GPIO port input data register"
|
|
bitfld.long 0x0 15. "IDR15,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 14. "IDR14,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 13. "IDR13,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 12. "IDR12,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 11. "IDR11,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 10. "IDR10,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 9. "IDR9,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 8. "IDR8,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 7. "IDR7,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 6. "IDR6,Port input data (y =" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "IDR5,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 4. "IDR4,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 3. "IDR3,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 2. "IDR2,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 1. "IDR1,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 0. "IDR0,Port input data (y =" "0,1"
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "ODR,GPIO port output data register"
|
|
bitfld.long 0x0 15. "ODR15,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 14. "ODR14,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 13. "ODR13,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 12. "ODR12,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 11. "ODR11,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 10. "ODR10,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 9. "ODR9,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 8. "ODR8,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 7. "ODR7,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 6. "ODR6,Port output data (y =" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "ODR5,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 4. "ODR4,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 3. "ODR3,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 2. "ODR2,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 1. "ODR1,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 0. "ODR0,Port output data (y =" "0,1"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x0 "BSRR,GPIO port bit set/reset"
|
|
bitfld.long 0x0 31. "BR15,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 30. "BR14,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 29. "BR13,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 28. "BR12,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 27. "BR11,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 26. "BR10,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 25. "BR9,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 24. "BR8,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 23. "BR7,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 22. "BR6,Port x reset bit y (y =" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "BR5,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 20. "BR4,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 19. "BR3,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 18. "BR2,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 17. "BR1,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 16. "BR0,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 15. "BS15,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 14. "BS14,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 13. "BS13,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 12. "BS12,Port x set bit y (y=" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "BS11,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 10. "BS10,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 9. "BS9,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 8. "BS8,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 7. "BS7,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 6. "BS6,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 5. "BS5,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 4. "BS4,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 3. "BS3,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 2. "BS2,Port x set bit y (y=" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "BS1,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 0. "BS0,Port x set bit y (y=" "0,1"
|
|
group.long 0x1C++0xB
|
|
line.long 0x0 "LCKR,GPIO port configuration lock"
|
|
bitfld.long 0x0 16. "LCKK,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 15. "LCK15,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 14. "LCK14,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 13. "LCK13,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 12. "LCK12,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 11. "LCK11,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 10. "LCK10,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 9. "LCK9,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 8. "LCK8,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 7. "LCK7,Port x lock bit y (y=" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "LCK6,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 5. "LCK5,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 4. "LCK4,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 3. "LCK3,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 2. "LCK2,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 1. "LCK1,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 0. "LCK0,Port x lock bit y (y=" "0,1"
|
|
line.long 0x4 "AFRL,GPIO alternate function low"
|
|
hexmask.long.byte 0x4 28.--31. 1. "AFRL7,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 24.--27. 1. "AFRL6,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 20.--23. 1. "AFRL5,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 16.--19. 1. "AFRL4,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 12.--15. 1. "AFRL3,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 8.--11. 1. "AFRL2,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 4.--7. 1. "AFRL1,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 0.--3. 1. "AFRL0,Alternate function selection for port x"
|
|
line.long 0x8 "AFRH,GPIO alternate function high"
|
|
hexmask.long.byte 0x8 28.--31. 1. "AFRH15,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 24.--27. 1. "AFRH14,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 20.--23. 1. "AFRH13,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 16.--19. 1. "AFRH12,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 12.--15. 1. "AFRH11,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 8.--11. 1. "AFRH10,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 4.--7. 1. "AFRH9,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 0.--3. 1. "AFRH8,Alternate function selection for port x"
|
|
wgroup.long 0x28++0x3
|
|
line.long 0x0 "BRR,GPIO port bit reset register"
|
|
bitfld.long 0x0 15. "BR15,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 14. "BR14,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 13. "BR13,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 12. "BR12,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 11. "BR11,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 10. "BR10,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 9. "BR9,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 8. "BR8,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 7. "BR7,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 6. "BR6,Port Reset bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "BR5,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 4. "BR4,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 3. "BR3,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 2. "BR2,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 1. "BR1,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 0. "BR0,Port Reset bit" "0,1"
|
|
group.long 0x2C++0x3
|
|
line.long 0x0 "ASCR,GPIO port analog switch control"
|
|
bitfld.long 0x0 15. "ASC15,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 14. "ASC14,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 13. "ASC13,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 12. "ASC12,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 11. "ASC11,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 10. "ASC10,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 9. "ASC9,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 8. "ASC8,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 7. "ASC7,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 6. "ASC6,Port analog switch control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "ASC5,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 4. "ASC4,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 3. "ASC3,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 2. "ASC2,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 1. "ASC1,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 0. "ASC0,Port analog switch control" "0,1"
|
|
tree.end
|
|
tree "GPIOG"
|
|
base ad:0x48001800
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "MODER,GPIO port mode register"
|
|
bitfld.long 0x0 30.--31. "MODER15,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 28.--29. "MODER14,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 26.--27. "MODER13,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 24.--25. "MODER12,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 22.--23. "MODER11,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 20.--21. "MODER10,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "MODER9,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 16.--17. "MODER8,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 14.--15. "MODER7,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 12.--13. "MODER6,Port x configuration bits (y =" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 10.--11. "MODER5,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "MODER4,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 6.--7. "MODER3,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 4.--5. "MODER2,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 2.--3. "MODER1,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "MODER0,Port x configuration bits (y =" "0,1,2,3"
|
|
line.long 0x4 "OTYPER,GPIO port output type register"
|
|
bitfld.long 0x4 15. "OT15,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 14. "OT14,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 13. "OT13,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 12. "OT12,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 11. "OT11,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 10. "OT10,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 9. "OT9,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 8. "OT8,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 7. "OT7,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 6. "OT6,Port x configuration bits (y =" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "OT5,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 4. "OT4,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 3. "OT3,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 2. "OT2,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 1. "OT1,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 0. "OT0,Port x configuration bits (y =" "0,1"
|
|
line.long 0x8 "OSPEEDR,GPIO port output speed"
|
|
bitfld.long 0x8 30.--31. "OSPEEDR15,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 28.--29. "OSPEEDR14,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 26.--27. "OSPEEDR13,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 24.--25. "OSPEEDR12,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 22.--23. "OSPEEDR11,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 20.--21. "OSPEEDR10,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 18.--19. "OSPEEDR9,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 16.--17. "OSPEEDR8,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 14.--15. "OSPEEDR7,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 12.--13. "OSPEEDR6,Port x configuration bits (y =" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x8 10.--11. "OSPEEDR5,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 8.--9. "OSPEEDR4,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 6.--7. "OSPEEDR3,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 4.--5. "OSPEEDR2,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 2.--3. "OSPEEDR1,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 0.--1. "OSPEEDR0,Port x configuration bits (y =" "0,1,2,3"
|
|
line.long 0xC "PUPDR,GPIO port pull-up/pull-down"
|
|
bitfld.long 0xC 30.--31. "PUPDR15,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 28.--29. "PUPDR14,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 26.--27. "PUPDR13,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 24.--25. "PUPDR12,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 22.--23. "PUPDR11,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 20.--21. "PUPDR10,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 18.--19. "PUPDR9,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 16.--17. "PUPDR8,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 14.--15. "PUPDR7,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 12.--13. "PUPDR6,Port x configuration bits (y =" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0xC 10.--11. "PUPDR5,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 8.--9. "PUPDR4,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 6.--7. "PUPDR3,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 4.--5. "PUPDR2,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 2.--3. "PUPDR1,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 0.--1. "PUPDR0,Port x configuration bits (y =" "0,1,2,3"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "IDR,GPIO port input data register"
|
|
bitfld.long 0x0 15. "IDR15,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 14. "IDR14,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 13. "IDR13,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 12. "IDR12,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 11. "IDR11,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 10. "IDR10,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 9. "IDR9,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 8. "IDR8,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 7. "IDR7,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 6. "IDR6,Port input data (y =" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "IDR5,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 4. "IDR4,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 3. "IDR3,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 2. "IDR2,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 1. "IDR1,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 0. "IDR0,Port input data (y =" "0,1"
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "ODR,GPIO port output data register"
|
|
bitfld.long 0x0 15. "ODR15,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 14. "ODR14,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 13. "ODR13,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 12. "ODR12,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 11. "ODR11,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 10. "ODR10,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 9. "ODR9,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 8. "ODR8,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 7. "ODR7,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 6. "ODR6,Port output data (y =" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "ODR5,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 4. "ODR4,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 3. "ODR3,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 2. "ODR2,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 1. "ODR1,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 0. "ODR0,Port output data (y =" "0,1"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x0 "BSRR,GPIO port bit set/reset"
|
|
bitfld.long 0x0 31. "BR15,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 30. "BR14,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 29. "BR13,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 28. "BR12,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 27. "BR11,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 26. "BR10,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 25. "BR9,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 24. "BR8,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 23. "BR7,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 22. "BR6,Port x reset bit y (y =" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "BR5,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 20. "BR4,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 19. "BR3,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 18. "BR2,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 17. "BR1,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 16. "BR0,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 15. "BS15,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 14. "BS14,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 13. "BS13,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 12. "BS12,Port x set bit y (y=" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "BS11,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 10. "BS10,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 9. "BS9,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 8. "BS8,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 7. "BS7,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 6. "BS6,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 5. "BS5,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 4. "BS4,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 3. "BS3,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 2. "BS2,Port x set bit y (y=" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "BS1,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 0. "BS0,Port x set bit y (y=" "0,1"
|
|
group.long 0x1C++0xB
|
|
line.long 0x0 "LCKR,GPIO port configuration lock"
|
|
bitfld.long 0x0 16. "LCKK,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 15. "LCK15,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 14. "LCK14,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 13. "LCK13,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 12. "LCK12,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 11. "LCK11,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 10. "LCK10,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 9. "LCK9,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 8. "LCK8,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 7. "LCK7,Port x lock bit y (y=" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "LCK6,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 5. "LCK5,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 4. "LCK4,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 3. "LCK3,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 2. "LCK2,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 1. "LCK1,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 0. "LCK0,Port x lock bit y (y=" "0,1"
|
|
line.long 0x4 "AFRL,GPIO alternate function low"
|
|
hexmask.long.byte 0x4 28.--31. 1. "AFRL7,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 24.--27. 1. "AFRL6,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 20.--23. 1. "AFRL5,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 16.--19. 1. "AFRL4,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 12.--15. 1. "AFRL3,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 8.--11. 1. "AFRL2,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 4.--7. 1. "AFRL1,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 0.--3. 1. "AFRL0,Alternate function selection for port x"
|
|
line.long 0x8 "AFRH,GPIO alternate function high"
|
|
hexmask.long.byte 0x8 28.--31. 1. "AFRH15,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 24.--27. 1. "AFRH14,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 20.--23. 1. "AFRH13,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 16.--19. 1. "AFRH12,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 12.--15. 1. "AFRH11,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 8.--11. 1. "AFRH10,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 4.--7. 1. "AFRH9,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 0.--3. 1. "AFRH8,Alternate function selection for port x"
|
|
wgroup.long 0x28++0x3
|
|
line.long 0x0 "BRR,GPIO port bit reset register"
|
|
bitfld.long 0x0 15. "BR15,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 14. "BR14,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 13. "BR13,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 12. "BR12,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 11. "BR11,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 10. "BR10,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 9. "BR9,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 8. "BR8,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 7. "BR7,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 6. "BR6,Port Reset bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "BR5,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 4. "BR4,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 3. "BR3,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 2. "BR2,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 1. "BR1,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 0. "BR0,Port Reset bit" "0,1"
|
|
group.long 0x2C++0x3
|
|
line.long 0x0 "ASCR,GPIO port analog switch control"
|
|
bitfld.long 0x0 15. "ASC15,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 14. "ASC14,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 13. "ASC13,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 12. "ASC12,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 11. "ASC11,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 10. "ASC10,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 9. "ASC9,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 8. "ASC8,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 7. "ASC7,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 6. "ASC6,Port analog switch control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "ASC5,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 4. "ASC4,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 3. "ASC3,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 2. "ASC2,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 1. "ASC1,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 0. "ASC0,Port analog switch control" "0,1"
|
|
tree.end
|
|
tree "GPIOH"
|
|
base ad:0x48001C00
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "MODER,GPIO port mode register"
|
|
bitfld.long 0x0 30.--31. "MODER15,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 28.--29. "MODER14,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 26.--27. "MODER13,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 24.--25. "MODER12,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 22.--23. "MODER11,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 20.--21. "MODER10,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "MODER9,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 16.--17. "MODER8,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 14.--15. "MODER7,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 12.--13. "MODER6,Port x configuration bits (y =" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 10.--11. "MODER5,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "MODER4,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 6.--7. "MODER3,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 4.--5. "MODER2,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 2.--3. "MODER1,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "MODER0,Port x configuration bits (y =" "0,1,2,3"
|
|
line.long 0x4 "OTYPER,GPIO port output type register"
|
|
bitfld.long 0x4 15. "OT15,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 14. "OT14,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 13. "OT13,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 12. "OT12,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 11. "OT11,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 10. "OT10,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 9. "OT9,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 8. "OT8,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 7. "OT7,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 6. "OT6,Port x configuration bits (y =" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "OT5,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 4. "OT4,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 3. "OT3,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 2. "OT2,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 1. "OT1,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 0. "OT0,Port x configuration bits (y =" "0,1"
|
|
line.long 0x8 "OSPEEDR,GPIO port output speed"
|
|
bitfld.long 0x8 30.--31. "OSPEEDR15,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 28.--29. "OSPEEDR14,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 26.--27. "OSPEEDR13,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 24.--25. "OSPEEDR12,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 22.--23. "OSPEEDR11,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 20.--21. "OSPEEDR10,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 18.--19. "OSPEEDR9,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 16.--17. "OSPEEDR8,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 14.--15. "OSPEEDR7,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 12.--13. "OSPEEDR6,Port x configuration bits (y =" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x8 10.--11. "OSPEEDR5,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 8.--9. "OSPEEDR4,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 6.--7. "OSPEEDR3,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 4.--5. "OSPEEDR2,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 2.--3. "OSPEEDR1,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 0.--1. "OSPEEDR0,Port x configuration bits (y =" "0,1,2,3"
|
|
line.long 0xC "PUPDR,GPIO port pull-up/pull-down"
|
|
bitfld.long 0xC 30.--31. "PUPDR15,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 28.--29. "PUPDR14,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 26.--27. "PUPDR13,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 24.--25. "PUPDR12,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 22.--23. "PUPDR11,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 20.--21. "PUPDR10,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 18.--19. "PUPDR9,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 16.--17. "PUPDR8,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 14.--15. "PUPDR7,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 12.--13. "PUPDR6,Port x configuration bits (y =" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0xC 10.--11. "PUPDR5,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 8.--9. "PUPDR4,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 6.--7. "PUPDR3,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 4.--5. "PUPDR2,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 2.--3. "PUPDR1,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 0.--1. "PUPDR0,Port x configuration bits (y =" "0,1,2,3"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "IDR,GPIO port input data register"
|
|
bitfld.long 0x0 15. "IDR15,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 14. "IDR14,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 13. "IDR13,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 12. "IDR12,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 11. "IDR11,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 10. "IDR10,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 9. "IDR9,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 8. "IDR8,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 7. "IDR7,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 6. "IDR6,Port input data (y =" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "IDR5,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 4. "IDR4,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 3. "IDR3,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 2. "IDR2,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 1. "IDR1,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 0. "IDR0,Port input data (y =" "0,1"
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "ODR,GPIO port output data register"
|
|
bitfld.long 0x0 15. "ODR15,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 14. "ODR14,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 13. "ODR13,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 12. "ODR12,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 11. "ODR11,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 10. "ODR10,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 9. "ODR9,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 8. "ODR8,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 7. "ODR7,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 6. "ODR6,Port output data (y =" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "ODR5,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 4. "ODR4,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 3. "ODR3,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 2. "ODR2,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 1. "ODR1,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 0. "ODR0,Port output data (y =" "0,1"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x0 "BSRR,GPIO port bit set/reset"
|
|
bitfld.long 0x0 31. "BR15,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 30. "BR14,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 29. "BR13,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 28. "BR12,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 27. "BR11,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 26. "BR10,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 25. "BR9,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 24. "BR8,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 23. "BR7,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 22. "BR6,Port x reset bit y (y =" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "BR5,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 20. "BR4,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 19. "BR3,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 18. "BR2,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 17. "BR1,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 16. "BR0,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 15. "BS15,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 14. "BS14,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 13. "BS13,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 12. "BS12,Port x set bit y (y=" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "BS11,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 10. "BS10,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 9. "BS9,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 8. "BS8,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 7. "BS7,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 6. "BS6,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 5. "BS5,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 4. "BS4,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 3. "BS3,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 2. "BS2,Port x set bit y (y=" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "BS1,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 0. "BS0,Port x set bit y (y=" "0,1"
|
|
group.long 0x1C++0xB
|
|
line.long 0x0 "LCKR,GPIO port configuration lock"
|
|
bitfld.long 0x0 16. "LCKK,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 15. "LCK15,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 14. "LCK14,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 13. "LCK13,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 12. "LCK12,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 11. "LCK11,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 10. "LCK10,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 9. "LCK9,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 8. "LCK8,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 7. "LCK7,Port x lock bit y (y=" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "LCK6,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 5. "LCK5,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 4. "LCK4,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 3. "LCK3,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 2. "LCK2,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 1. "LCK1,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 0. "LCK0,Port x lock bit y (y=" "0,1"
|
|
line.long 0x4 "AFRL,GPIO alternate function low"
|
|
hexmask.long.byte 0x4 28.--31. 1. "AFRL7,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 24.--27. 1. "AFRL6,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 20.--23. 1. "AFRL5,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 16.--19. 1. "AFRL4,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 12.--15. 1. "AFRL3,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 8.--11. 1. "AFRL2,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 4.--7. 1. "AFRL1,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 0.--3. 1. "AFRL0,Alternate function selection for port x"
|
|
line.long 0x8 "AFRH,GPIO alternate function high"
|
|
hexmask.long.byte 0x8 28.--31. 1. "AFRH15,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 24.--27. 1. "AFRH14,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 20.--23. 1. "AFRH13,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 16.--19. 1. "AFRH12,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 12.--15. 1. "AFRH11,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 8.--11. 1. "AFRH10,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 4.--7. 1. "AFRH9,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 0.--3. 1. "AFRH8,Alternate function selection for port x"
|
|
wgroup.long 0x28++0x3
|
|
line.long 0x0 "BRR,GPIO port bit reset register"
|
|
bitfld.long 0x0 15. "BR15,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 14. "BR14,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 13. "BR13,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 12. "BR12,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 11. "BR11,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 10. "BR10,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 9. "BR9,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 8. "BR8,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 7. "BR7,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 6. "BR6,Port Reset bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "BR5,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 4. "BR4,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 3. "BR3,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 2. "BR2,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 1. "BR1,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 0. "BR0,Port Reset bit" "0,1"
|
|
group.long 0x2C++0x3
|
|
line.long 0x0 "ASCR,GPIO port analog switch control"
|
|
bitfld.long 0x0 15. "ASC15,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 14. "ASC14,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 13. "ASC13,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 12. "ASC12,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 11. "ASC11,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 10. "ASC10,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 9. "ASC9,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 8. "ASC8,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 7. "ASC7,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 6. "ASC6,Port analog switch control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "ASC5,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 4. "ASC4,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 3. "ASC3,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 2. "ASC2,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 1. "ASC1,Port analog switch control" "0,1"
|
|
bitfld.long 0x0 0. "ASC0,Port analog switch control" "0,1"
|
|
tree.end
|
|
tree "GPIOI"
|
|
base ad:0x48002000
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "MODER,GPIO port mode register"
|
|
bitfld.long 0x0 30.--31. "MODER15,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 28.--29. "MODER14,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 26.--27. "MODER13,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 24.--25. "MODER12,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 22.--23. "MODER11,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 20.--21. "MODER10,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "MODER9,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 16.--17. "MODER8,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 14.--15. "MODER7,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 12.--13. "MODER6,Port x configuration bits (y =" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 10.--11. "MODER5,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "MODER4,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 6.--7. "MODER3,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 4.--5. "MODER2,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 2.--3. "MODER1,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "MODER0,Port x configuration bits (y =" "0,1,2,3"
|
|
line.long 0x4 "OTYPER,GPIO port output type register"
|
|
bitfld.long 0x4 15. "OT15,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 14. "OT14,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 13. "OT13,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 12. "OT12,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 11. "OT11,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 10. "OT10,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 9. "OT9,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 8. "OT8,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 7. "OT7,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 6. "OT6,Port x configuration bits (y =" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "OT5,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 4. "OT4,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 3. "OT3,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 2. "OT2,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 1. "OT1,Port x configuration bits (y =" "0,1"
|
|
bitfld.long 0x4 0. "OT0,Port x configuration bits (y =" "0,1"
|
|
line.long 0x8 "OSPEEDR,GPIO port output speed"
|
|
bitfld.long 0x8 30.--31. "OSPEEDR15,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 28.--29. "OSPEEDR14,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 26.--27. "OSPEEDR13,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 24.--25. "OSPEEDR12,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 22.--23. "OSPEEDR11,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 20.--21. "OSPEEDR10,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 18.--19. "OSPEEDR9,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 16.--17. "OSPEEDR8,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 14.--15. "OSPEEDR7,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 12.--13. "OSPEEDR6,Port x configuration bits (y =" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x8 10.--11. "OSPEEDR5,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 8.--9. "OSPEEDR4,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 6.--7. "OSPEEDR3,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 4.--5. "OSPEEDR2,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 2.--3. "OSPEEDR1,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0x8 0.--1. "OSPEEDR0,Port x configuration bits (y =" "0,1,2,3"
|
|
line.long 0xC "PUPDR,GPIO port pull-up/pull-down"
|
|
bitfld.long 0xC 30.--31. "PUPDR15,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 28.--29. "PUPDR14,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 26.--27. "PUPDR13,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 24.--25. "PUPDR12,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 22.--23. "PUPDR11,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 20.--21. "PUPDR10,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 18.--19. "PUPDR9,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 16.--17. "PUPDR8,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 14.--15. "PUPDR7,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 12.--13. "PUPDR6,Port x configuration bits (y =" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0xC 10.--11. "PUPDR5,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 8.--9. "PUPDR4,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 6.--7. "PUPDR3,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 4.--5. "PUPDR2,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 2.--3. "PUPDR1,Port x configuration bits (y =" "0,1,2,3"
|
|
bitfld.long 0xC 0.--1. "PUPDR0,Port x configuration bits (y =" "0,1,2,3"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "IDR,GPIO port input data register"
|
|
bitfld.long 0x0 15. "IDR15,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 14. "IDR14,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 13. "IDR13,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 12. "IDR12,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 11. "IDR11,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 10. "IDR10,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 9. "IDR9,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 8. "IDR8,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 7. "IDR7,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 6. "IDR6,Port input data (y =" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "IDR5,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 4. "IDR4,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 3. "IDR3,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 2. "IDR2,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 1. "IDR1,Port input data (y =" "0,1"
|
|
bitfld.long 0x0 0. "IDR0,Port input data (y =" "0,1"
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "ODR,GPIO port output data register"
|
|
bitfld.long 0x0 15. "ODR15,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 14. "ODR14,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 13. "ODR13,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 12. "ODR12,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 11. "ODR11,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 10. "ODR10,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 9. "ODR9,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 8. "ODR8,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 7. "ODR7,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 6. "ODR6,Port output data (y =" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "ODR5,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 4. "ODR4,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 3. "ODR3,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 2. "ODR2,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 1. "ODR1,Port output data (y =" "0,1"
|
|
bitfld.long 0x0 0. "ODR0,Port output data (y =" "0,1"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x0 "BSRR,GPIO port bit set/reset"
|
|
bitfld.long 0x0 31. "BR15,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 30. "BR14,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 29. "BR13,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 28. "BR12,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 27. "BR11,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 26. "BR10,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 25. "BR9,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 24. "BR8,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 23. "BR7,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 22. "BR6,Port x reset bit y (y =" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "BR5,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 20. "BR4,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 19. "BR3,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 18. "BR2,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 17. "BR1,Port x reset bit y (y =" "0,1"
|
|
bitfld.long 0x0 16. "BR0,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 15. "BS15,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 14. "BS14,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 13. "BS13,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 12. "BS12,Port x set bit y (y=" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "BS11,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 10. "BS10,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 9. "BS9,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 8. "BS8,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 7. "BS7,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 6. "BS6,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 5. "BS5,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 4. "BS4,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 3. "BS3,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 2. "BS2,Port x set bit y (y=" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "BS1,Port x set bit y (y=" "0,1"
|
|
bitfld.long 0x0 0. "BS0,Port x set bit y (y=" "0,1"
|
|
group.long 0x1C++0xB
|
|
line.long 0x0 "LCKR,GPIO port configuration lock"
|
|
bitfld.long 0x0 16. "LCKK,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 15. "LCK15,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 14. "LCK14,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 13. "LCK13,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 12. "LCK12,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 11. "LCK11,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 10. "LCK10,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 9. "LCK9,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 8. "LCK8,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 7. "LCK7,Port x lock bit y (y=" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "LCK6,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 5. "LCK5,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 4. "LCK4,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 3. "LCK3,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 2. "LCK2,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 1. "LCK1,Port x lock bit y (y=" "0,1"
|
|
bitfld.long 0x0 0. "LCK0,Port x lock bit y (y=" "0,1"
|
|
line.long 0x4 "AFRL,GPIO alternate function low"
|
|
hexmask.long.byte 0x4 28.--31. 1. "AFRL7,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 24.--27. 1. "AFRL6,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 20.--23. 1. "AFRL5,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 16.--19. 1. "AFRL4,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 12.--15. 1. "AFRL3,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 8.--11. 1. "AFRL2,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 4.--7. 1. "AFRL1,Alternate function selection for port x"
|
|
hexmask.long.byte 0x4 0.--3. 1. "AFRL0,Alternate function selection for port x"
|
|
line.long 0x8 "AFRH,GPIO alternate function high"
|
|
hexmask.long.byte 0x8 28.--31. 1. "AFRH15,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 24.--27. 1. "AFRH14,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 20.--23. 1. "AFRH13,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 16.--19. 1. "AFRH12,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 12.--15. 1. "AFRH11,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 8.--11. 1. "AFRH10,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 4.--7. 1. "AFRH9,Alternate function selection for port x"
|
|
hexmask.long.byte 0x8 0.--3. 1. "AFRH8,Alternate function selection for port x"
|
|
wgroup.long 0x28++0x3
|
|
line.long 0x0 "BRR,GPIO port bit reset register"
|
|
bitfld.long 0x0 15. "BR15,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 14. "BR14,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 13. "BR13,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 12. "BR12,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 11. "BR11,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 10. "BR10,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 9. "BR9,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 8. "BR8,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 7. "BR7,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 6. "BR6,Port Reset bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "BR5,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 4. "BR4,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 3. "BR3,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 2. "BR2,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 1. "BR1,Port Reset bit" "0,1"
|
|
bitfld.long 0x0 0. "BR0,Port Reset bit" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "HASH (Hash Processor)"
|
|
base ad:0x50060400
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CR,control register"
|
|
bitfld.long 0x0 18. "ALGO1,ALGO" "0,1"
|
|
bitfld.long 0x0 16. "LKEY,Long key selection" "0,1"
|
|
bitfld.long 0x0 13. "MDMAT,Multiple DMA Transfers" "0,1"
|
|
rbitfld.long 0x0 12. "DINNE,DIN not empty" "0,1"
|
|
hexmask.long.byte 0x0 8.--11. 1. "NBW,Number of words already"
|
|
bitfld.long 0x0 7. "ALGO0,Algorithm selection" "0,1"
|
|
bitfld.long 0x0 6. "MODE,Mode selection" "0,1"
|
|
bitfld.long 0x0 4.--5. "DATATYPE,Data type selection" "0,1,2,3"
|
|
bitfld.long 0x0 3. "DMAE,DMA enable" "0,1"
|
|
bitfld.long 0x0 2. "INIT,Initialize message digest" "0,1"
|
|
line.long 0x4 "DIN,data input register"
|
|
hexmask.long 0x4 0.--31. 1. "DATAIN,Data input"
|
|
line.long 0x8 "STR,start register"
|
|
bitfld.long 0x8 8. "DCAL,Digest calculation" "0,1"
|
|
hexmask.long.byte 0x8 0.--4. 1. "NBLW,Number of valid bits in the last word of"
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x0 "HR0,digest registers"
|
|
hexmask.long 0x0 0.--31. 1. "H0,H0"
|
|
group.long 0x20++0x7
|
|
line.long 0x0 "IMR,interrupt enable register"
|
|
bitfld.long 0x0 1. "DCIE,Digest calculation completion interrupt" "0,1"
|
|
bitfld.long 0x0 0. "DINIE,Data input interrupt" "0,1"
|
|
line.long 0x4 "SR,status register"
|
|
rbitfld.long 0x4 3. "BUSY,Busy bit" "0,1"
|
|
rbitfld.long 0x4 2. "DMAS,DMA Status" "0,1"
|
|
bitfld.long 0x4 1. "DCIS,Digest calculation completion interrupt" "0,1"
|
|
bitfld.long 0x4 0. "DINIS,Data input interrupt" "0,1"
|
|
group.long 0xF8++0xD7
|
|
line.long 0x0 "CSR0,context swap registers"
|
|
hexmask.long 0x0 0.--31. 1. "CSR0,CSR0"
|
|
line.long 0x4 "CSR1,context swap registers"
|
|
hexmask.long 0x4 0.--31. 1. "CSR1,CSR1"
|
|
line.long 0x8 "CSR2,context swap registers"
|
|
hexmask.long 0x8 0.--31. 1. "CSR2,CSR2"
|
|
line.long 0xC "CSR3,context swap registers"
|
|
hexmask.long 0xC 0.--31. 1. "CSR3,CSR3"
|
|
line.long 0x10 "CSR4,context swap registers"
|
|
hexmask.long 0x10 0.--31. 1. "CSR4,CSR4"
|
|
line.long 0x14 "CSR5,context swap registers"
|
|
hexmask.long 0x14 0.--31. 1. "CSR5,CSR5"
|
|
line.long 0x18 "CSR6,context swap registers"
|
|
hexmask.long 0x18 0.--31. 1. "CSR6,CSR6"
|
|
line.long 0x1C "CSR7,context swap registers"
|
|
hexmask.long 0x1C 0.--31. 1. "CSR7,CSR7"
|
|
line.long 0x20 "CSR8,context swap registers"
|
|
hexmask.long 0x20 0.--31. 1. "CSR8,CSR8"
|
|
line.long 0x24 "CSR9,context swap registers"
|
|
hexmask.long 0x24 0.--31. 1. "CSR9,CSR9"
|
|
line.long 0x28 "CSR10,context swap registers"
|
|
hexmask.long 0x28 0.--31. 1. "CSR10,CSR10"
|
|
line.long 0x2C "CSR11,context swap registers"
|
|
hexmask.long 0x2C 0.--31. 1. "CSR11,CSR11"
|
|
line.long 0x30 "CSR12,context swap registers"
|
|
hexmask.long 0x30 0.--31. 1. "CSR12,CSR12"
|
|
line.long 0x34 "CSR13,context swap registers"
|
|
hexmask.long 0x34 0.--31. 1. "CSR13,CSR13"
|
|
line.long 0x38 "CSR14,context swap registers"
|
|
hexmask.long 0x38 0.--31. 1. "CSR14,CSR14"
|
|
line.long 0x3C "CSR15,context swap registers"
|
|
hexmask.long 0x3C 0.--31. 1. "CSR15,CSR15"
|
|
line.long 0x40 "CSR16,context swap registers"
|
|
hexmask.long 0x40 0.--31. 1. "CSR16,CSR16"
|
|
line.long 0x44 "CSR17,context swap registers"
|
|
hexmask.long 0x44 0.--31. 1. "CSR17,CSR17"
|
|
line.long 0x48 "CSR18,context swap registers"
|
|
hexmask.long 0x48 0.--31. 1. "CSR18,CSR18"
|
|
line.long 0x4C "CSR19,context swap registers"
|
|
hexmask.long 0x4C 0.--31. 1. "CSR19,CSR19"
|
|
line.long 0x50 "CSR20,context swap registers"
|
|
hexmask.long 0x50 0.--31. 1. "CSR20,CSR20"
|
|
line.long 0x54 "CSR21,context swap registers"
|
|
hexmask.long 0x54 0.--31. 1. "CSR21,CSR21"
|
|
line.long 0x58 "CSR22,context swap registers"
|
|
hexmask.long 0x58 0.--31. 1. "CSR22,CSR22"
|
|
line.long 0x5C "CSR23,context swap registers"
|
|
hexmask.long 0x5C 0.--31. 1. "CSR23,CSR23"
|
|
line.long 0x60 "CSR24,context swap registers"
|
|
hexmask.long 0x60 0.--31. 1. "CSR24,CSR24"
|
|
line.long 0x64 "CSR25,context swap registers"
|
|
hexmask.long 0x64 0.--31. 1. "CSR25,CSR25"
|
|
line.long 0x68 "CSR26,context swap registers"
|
|
hexmask.long 0x68 0.--31. 1. "CSR26,CSR26"
|
|
line.long 0x6C "CSR27,context swap registers"
|
|
hexmask.long 0x6C 0.--31. 1. "CSR27,CSR27"
|
|
line.long 0x70 "CSR28,context swap registers"
|
|
hexmask.long 0x70 0.--31. 1. "CSR28,CSR28"
|
|
line.long 0x74 "CSR29,context swap registers"
|
|
hexmask.long 0x74 0.--31. 1. "CSR29,CSR29"
|
|
line.long 0x78 "CSR30,context swap registers"
|
|
hexmask.long 0x78 0.--31. 1. "CSR30,CSR30"
|
|
line.long 0x7C "CSR31,context swap registers"
|
|
hexmask.long 0x7C 0.--31. 1. "CSR31,CSR31"
|
|
line.long 0x80 "CSR32,context swap registers"
|
|
hexmask.long 0x80 0.--31. 1. "CSR32,CSR32"
|
|
line.long 0x84 "CSR33,context swap registers"
|
|
hexmask.long 0x84 0.--31. 1. "CSR33,CSR33"
|
|
line.long 0x88 "CSR34,context swap registers"
|
|
hexmask.long 0x88 0.--31. 1. "CSR34,CSR34"
|
|
line.long 0x8C "CSR35,context swap registers"
|
|
hexmask.long 0x8C 0.--31. 1. "CSR35,CSR35"
|
|
line.long 0x90 "CSR36,context swap registers"
|
|
hexmask.long 0x90 0.--31. 1. "CSR36,CSR36"
|
|
line.long 0x94 "CSR37,context swap registers"
|
|
hexmask.long 0x94 0.--31. 1. "CSR37,CSR37"
|
|
line.long 0x98 "CSR38,context swap registers"
|
|
hexmask.long 0x98 0.--31. 1. "CSR38,CSR38"
|
|
line.long 0x9C "CSR39,context swap registers"
|
|
hexmask.long 0x9C 0.--31. 1. "CSR39,CSR39"
|
|
line.long 0xA0 "CSR40,context swap registers"
|
|
hexmask.long 0xA0 0.--31. 1. "CSR40,CSR40"
|
|
line.long 0xA4 "CSR41,context swap registers"
|
|
hexmask.long 0xA4 0.--31. 1. "CSR41,CSR41"
|
|
line.long 0xA8 "CSR42,context swap registers"
|
|
hexmask.long 0xA8 0.--31. 1. "CSR42,CSR42"
|
|
line.long 0xAC "CSR43,context swap registers"
|
|
hexmask.long 0xAC 0.--31. 1. "CSR43,CSR43"
|
|
line.long 0xB0 "CSR44,context swap registers"
|
|
hexmask.long 0xB0 0.--31. 1. "CSR44,CSR44"
|
|
line.long 0xB4 "CSR45,context swap registers"
|
|
hexmask.long 0xB4 0.--31. 1. "CSR45,CSR45"
|
|
line.long 0xB8 "CSR46,context swap registers"
|
|
hexmask.long 0xB8 0.--31. 1. "CSR46,CSR46"
|
|
line.long 0xBC "CSR47,context swap registers"
|
|
hexmask.long 0xBC 0.--31. 1. "CSR47,CSR47"
|
|
line.long 0xC0 "CSR48,context swap registers"
|
|
hexmask.long 0xC0 0.--31. 1. "CSR48,CSR48"
|
|
line.long 0xC4 "CSR49,context swap registers"
|
|
hexmask.long 0xC4 0.--31. 1. "CSR49,CSR49"
|
|
line.long 0xC8 "CSR50,context swap registers"
|
|
hexmask.long 0xC8 0.--31. 1. "CSR50,CSR50"
|
|
line.long 0xCC "CSR51,context swap registers"
|
|
hexmask.long 0xCC 0.--31. 1. "CSR51,CSR51"
|
|
line.long 0xD0 "CSR52,context swap registers"
|
|
hexmask.long 0xD0 0.--31. 1. "CSR52,CSR52"
|
|
line.long 0xD4 "CSR53,context swap registers"
|
|
hexmask.long 0xD4 0.--31. 1. "CSR53,CSR53"
|
|
rgroup.long 0x310++0x1F
|
|
line.long 0x0 "HASH_HR0,HASH digest register"
|
|
hexmask.long 0x0 0.--31. 1. "H0,H0"
|
|
line.long 0x4 "HASH_HR1,read-only"
|
|
hexmask.long 0x4 0.--31. 1. "H1,H1"
|
|
line.long 0x8 "HASH_HR2,read-only"
|
|
hexmask.long 0x8 0.--31. 1. "H2,H2"
|
|
line.long 0xC "HASH_HR3,read-only"
|
|
hexmask.long 0xC 0.--31. 1. "H3,H3"
|
|
line.long 0x10 "HASH_HR4,read-only"
|
|
hexmask.long 0x10 0.--31. 1. "H4,H4"
|
|
line.long 0x14 "HASH_HR5,read-only"
|
|
hexmask.long 0x14 0.--31. 1. "H5,H5"
|
|
line.long 0x18 "HASH_HR6,read-only"
|
|
hexmask.long 0x18 0.--31. 1. "H6,H6"
|
|
line.long 0x1C "HASH_HR7,read-only"
|
|
hexmask.long 0x1C 0.--31. 1. "H7,H7"
|
|
tree.end
|
|
tree "I2C (Inter-Integrated Circuit)"
|
|
base ad:0x0
|
|
tree "I2C1"
|
|
base ad:0x40005400
|
|
group.long 0x0++0x1B
|
|
line.long 0x0 "CR1,Control register 1"
|
|
bitfld.long 0x0 23. "PECEN,PEC enable" "0,1"
|
|
bitfld.long 0x0 22. "ALERTEN,SMBUS alert enable" "0,1"
|
|
bitfld.long 0x0 21. "SMBDEN,SMBus Device Default address" "0,1"
|
|
bitfld.long 0x0 20. "SMBHEN,SMBus Host address enable" "0,1"
|
|
bitfld.long 0x0 19. "GCEN,General call enable" "0,1"
|
|
bitfld.long 0x0 18. "WUPEN,Wakeup from STOP enable" "0,1"
|
|
bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "0,1"
|
|
bitfld.long 0x0 16. "SBC,Slave byte control" "0,1"
|
|
bitfld.long 0x0 15. "RXDMAEN,DMA reception requests" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "TXDMAEN,DMA transmission requests" "0,1"
|
|
bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "0,1"
|
|
hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter"
|
|
bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "0,1"
|
|
bitfld.long 0x0 6. "TCIE,Transfer Complete interrupt" "0,1"
|
|
bitfld.long 0x0 5. "STOPIE,STOP detection Interrupt" "0,1"
|
|
bitfld.long 0x0 4. "NACKIE,Not acknowledge received interrupt" "0,1"
|
|
bitfld.long 0x0 3. "ADDRIE,Address match interrupt enable (slave" "0,1"
|
|
bitfld.long 0x0 2. "RXIE,RX Interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXIE,TX Interrupt enable" "0,1"
|
|
bitfld.long 0x0 0. "PE,Peripheral enable" "0,1"
|
|
line.long 0x4 "CR2,Control register 2"
|
|
bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "0,1"
|
|
bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master" "0,1"
|
|
bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "0,1"
|
|
hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes"
|
|
bitfld.long 0x4 15. "NACK,NACK generation (slave" "0,1"
|
|
bitfld.long 0x4 14. "STOP,Stop generation (master" "0,1"
|
|
bitfld.long 0x4 13. "START,Start generation" "0,1"
|
|
bitfld.long 0x4 12. "HEAD10R,10-bit address header only read" "0,1"
|
|
bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "RD_WRN,Transfer direction (master" "0,1"
|
|
hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address bit (master"
|
|
line.long 0x8 "OAR1,Own address register 1"
|
|
bitfld.long 0x8 15. "OA1EN,Own Address 1 enable" "0,1"
|
|
bitfld.long 0x8 10. "OA1MODE,Own Address 1 10-bit mode" "0,1"
|
|
hexmask.long.word 0x8 0.--9. 1. "OA1,Interface address"
|
|
line.long 0xC "OAR2,Own address register 2"
|
|
bitfld.long 0xC 15. "OA2EN,Own Address 2 enable" "0,1"
|
|
bitfld.long 0xC 8.--10. "OA2MSK,Own Address 2 masks" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address"
|
|
line.long 0x10 "TIMINGR,Timing register"
|
|
hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler"
|
|
hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time"
|
|
hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time"
|
|
hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master"
|
|
hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master"
|
|
line.long 0x14 "TIMEOUTR,Status register 1"
|
|
bitfld.long 0x14 31. "TEXTEN,Extended clock timeout" "0,1"
|
|
hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B"
|
|
bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "0,1"
|
|
bitfld.long 0x14 12. "TIDLE,Idle clock timeout" "0,1"
|
|
hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A"
|
|
line.long 0x18 "ISR,Interrupt and Status register"
|
|
hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (Slave"
|
|
rbitfld.long 0x18 16. "DIR,Transfer direction (Slave" "0,1"
|
|
rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1"
|
|
rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1"
|
|
rbitfld.long 0x18 12. "TIMEOUT,Timeout or t_low detection" "0,1"
|
|
rbitfld.long 0x18 11. "PECERR,PEC Error in reception" "0,1"
|
|
rbitfld.long 0x18 10. "OVR,Overrun/Underrun (slave" "0,1"
|
|
rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1"
|
|
rbitfld.long 0x18 8. "BERR,Bus error" "0,1"
|
|
newline
|
|
rbitfld.long 0x18 7. "TCR,Transfer Complete Reload" "0,1"
|
|
rbitfld.long 0x18 6. "TC,Transfer Complete (master" "0,1"
|
|
rbitfld.long 0x18 5. "STOPF,Stop detection flag" "0,1"
|
|
rbitfld.long 0x18 4. "NACKF,Not acknowledge received" "0,1"
|
|
rbitfld.long 0x18 3. "ADDR,Address matched (slave" "0,1"
|
|
rbitfld.long 0x18 2. "RXNE,Receive data register not empty" "0,1"
|
|
bitfld.long 0x18 1. "TXIS,Transmit interrupt status" "0,1"
|
|
bitfld.long 0x18 0. "TXE,Transmit data register empty" "0,1"
|
|
wgroup.long 0x1C++0x3
|
|
line.long 0x0 "ICR,Interrupt clear register"
|
|
bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1"
|
|
bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag" "0,1"
|
|
bitfld.long 0x0 11. "PECCF,PEC Error flag clear" "0,1"
|
|
bitfld.long 0x0 10. "OVRCF,Overrun/Underrun flag" "0,1"
|
|
bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag" "0,1"
|
|
bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1"
|
|
bitfld.long 0x0 5. "STOPCF,Stop detection flag clear" "0,1"
|
|
bitfld.long 0x0 4. "NACKCF,Not Acknowledge flag clear" "0,1"
|
|
bitfld.long 0x0 3. "ADDRCF,Address Matched flag clear" "0,1"
|
|
rgroup.long 0x20++0x7
|
|
line.long 0x0 "PECR,PEC register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking"
|
|
line.long 0x4 "RXDR,Receive data register"
|
|
hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data"
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "TXDR,Transmit data register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data"
|
|
tree.end
|
|
tree "I2C2"
|
|
base ad:0x40005800
|
|
group.long 0x0++0x1B
|
|
line.long 0x0 "CR1,Control register 1"
|
|
bitfld.long 0x0 23. "PECEN,PEC enable" "0,1"
|
|
bitfld.long 0x0 22. "ALERTEN,SMBUS alert enable" "0,1"
|
|
bitfld.long 0x0 21. "SMBDEN,SMBus Device Default address" "0,1"
|
|
bitfld.long 0x0 20. "SMBHEN,SMBus Host address enable" "0,1"
|
|
bitfld.long 0x0 19. "GCEN,General call enable" "0,1"
|
|
bitfld.long 0x0 18. "WUPEN,Wakeup from STOP enable" "0,1"
|
|
bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "0,1"
|
|
bitfld.long 0x0 16. "SBC,Slave byte control" "0,1"
|
|
bitfld.long 0x0 15. "RXDMAEN,DMA reception requests" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "TXDMAEN,DMA transmission requests" "0,1"
|
|
bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "0,1"
|
|
hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter"
|
|
bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "0,1"
|
|
bitfld.long 0x0 6. "TCIE,Transfer Complete interrupt" "0,1"
|
|
bitfld.long 0x0 5. "STOPIE,STOP detection Interrupt" "0,1"
|
|
bitfld.long 0x0 4. "NACKIE,Not acknowledge received interrupt" "0,1"
|
|
bitfld.long 0x0 3. "ADDRIE,Address match interrupt enable (slave" "0,1"
|
|
bitfld.long 0x0 2. "RXIE,RX Interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXIE,TX Interrupt enable" "0,1"
|
|
bitfld.long 0x0 0. "PE,Peripheral enable" "0,1"
|
|
line.long 0x4 "CR2,Control register 2"
|
|
bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "0,1"
|
|
bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master" "0,1"
|
|
bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "0,1"
|
|
hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes"
|
|
bitfld.long 0x4 15. "NACK,NACK generation (slave" "0,1"
|
|
bitfld.long 0x4 14. "STOP,Stop generation (master" "0,1"
|
|
bitfld.long 0x4 13. "START,Start generation" "0,1"
|
|
bitfld.long 0x4 12. "HEAD10R,10-bit address header only read" "0,1"
|
|
bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "RD_WRN,Transfer direction (master" "0,1"
|
|
hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address bit (master"
|
|
line.long 0x8 "OAR1,Own address register 1"
|
|
bitfld.long 0x8 15. "OA1EN,Own Address 1 enable" "0,1"
|
|
bitfld.long 0x8 10. "OA1MODE,Own Address 1 10-bit mode" "0,1"
|
|
hexmask.long.word 0x8 0.--9. 1. "OA1,Interface address"
|
|
line.long 0xC "OAR2,Own address register 2"
|
|
bitfld.long 0xC 15. "OA2EN,Own Address 2 enable" "0,1"
|
|
bitfld.long 0xC 8.--10. "OA2MSK,Own Address 2 masks" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address"
|
|
line.long 0x10 "TIMINGR,Timing register"
|
|
hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler"
|
|
hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time"
|
|
hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time"
|
|
hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master"
|
|
hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master"
|
|
line.long 0x14 "TIMEOUTR,Status register 1"
|
|
bitfld.long 0x14 31. "TEXTEN,Extended clock timeout" "0,1"
|
|
hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B"
|
|
bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "0,1"
|
|
bitfld.long 0x14 12. "TIDLE,Idle clock timeout" "0,1"
|
|
hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A"
|
|
line.long 0x18 "ISR,Interrupt and Status register"
|
|
hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (Slave"
|
|
rbitfld.long 0x18 16. "DIR,Transfer direction (Slave" "0,1"
|
|
rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1"
|
|
rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1"
|
|
rbitfld.long 0x18 12. "TIMEOUT,Timeout or t_low detection" "0,1"
|
|
rbitfld.long 0x18 11. "PECERR,PEC Error in reception" "0,1"
|
|
rbitfld.long 0x18 10. "OVR,Overrun/Underrun (slave" "0,1"
|
|
rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1"
|
|
rbitfld.long 0x18 8. "BERR,Bus error" "0,1"
|
|
newline
|
|
rbitfld.long 0x18 7. "TCR,Transfer Complete Reload" "0,1"
|
|
rbitfld.long 0x18 6. "TC,Transfer Complete (master" "0,1"
|
|
rbitfld.long 0x18 5. "STOPF,Stop detection flag" "0,1"
|
|
rbitfld.long 0x18 4. "NACKF,Not acknowledge received" "0,1"
|
|
rbitfld.long 0x18 3. "ADDR,Address matched (slave" "0,1"
|
|
rbitfld.long 0x18 2. "RXNE,Receive data register not empty" "0,1"
|
|
bitfld.long 0x18 1. "TXIS,Transmit interrupt status" "0,1"
|
|
bitfld.long 0x18 0. "TXE,Transmit data register empty" "0,1"
|
|
wgroup.long 0x1C++0x3
|
|
line.long 0x0 "ICR,Interrupt clear register"
|
|
bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1"
|
|
bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag" "0,1"
|
|
bitfld.long 0x0 11. "PECCF,PEC Error flag clear" "0,1"
|
|
bitfld.long 0x0 10. "OVRCF,Overrun/Underrun flag" "0,1"
|
|
bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag" "0,1"
|
|
bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1"
|
|
bitfld.long 0x0 5. "STOPCF,Stop detection flag clear" "0,1"
|
|
bitfld.long 0x0 4. "NACKCF,Not Acknowledge flag clear" "0,1"
|
|
bitfld.long 0x0 3. "ADDRCF,Address Matched flag clear" "0,1"
|
|
rgroup.long 0x20++0x7
|
|
line.long 0x0 "PECR,PEC register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking"
|
|
line.long 0x4 "RXDR,Receive data register"
|
|
hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data"
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "TXDR,Transmit data register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data"
|
|
tree.end
|
|
tree "I2C3"
|
|
base ad:0x40005C00
|
|
group.long 0x0++0x1B
|
|
line.long 0x0 "CR1,Control register 1"
|
|
bitfld.long 0x0 23. "PECEN,PEC enable" "0,1"
|
|
bitfld.long 0x0 22. "ALERTEN,SMBUS alert enable" "0,1"
|
|
bitfld.long 0x0 21. "SMBDEN,SMBus Device Default address" "0,1"
|
|
bitfld.long 0x0 20. "SMBHEN,SMBus Host address enable" "0,1"
|
|
bitfld.long 0x0 19. "GCEN,General call enable" "0,1"
|
|
bitfld.long 0x0 18. "WUPEN,Wakeup from STOP enable" "0,1"
|
|
bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "0,1"
|
|
bitfld.long 0x0 16. "SBC,Slave byte control" "0,1"
|
|
bitfld.long 0x0 15. "RXDMAEN,DMA reception requests" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "TXDMAEN,DMA transmission requests" "0,1"
|
|
bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "0,1"
|
|
hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter"
|
|
bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "0,1"
|
|
bitfld.long 0x0 6. "TCIE,Transfer Complete interrupt" "0,1"
|
|
bitfld.long 0x0 5. "STOPIE,STOP detection Interrupt" "0,1"
|
|
bitfld.long 0x0 4. "NACKIE,Not acknowledge received interrupt" "0,1"
|
|
bitfld.long 0x0 3. "ADDRIE,Address match interrupt enable (slave" "0,1"
|
|
bitfld.long 0x0 2. "RXIE,RX Interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXIE,TX Interrupt enable" "0,1"
|
|
bitfld.long 0x0 0. "PE,Peripheral enable" "0,1"
|
|
line.long 0x4 "CR2,Control register 2"
|
|
bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "0,1"
|
|
bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master" "0,1"
|
|
bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "0,1"
|
|
hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes"
|
|
bitfld.long 0x4 15. "NACK,NACK generation (slave" "0,1"
|
|
bitfld.long 0x4 14. "STOP,Stop generation (master" "0,1"
|
|
bitfld.long 0x4 13. "START,Start generation" "0,1"
|
|
bitfld.long 0x4 12. "HEAD10R,10-bit address header only read" "0,1"
|
|
bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "RD_WRN,Transfer direction (master" "0,1"
|
|
hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address bit (master"
|
|
line.long 0x8 "OAR1,Own address register 1"
|
|
bitfld.long 0x8 15. "OA1EN,Own Address 1 enable" "0,1"
|
|
bitfld.long 0x8 10. "OA1MODE,Own Address 1 10-bit mode" "0,1"
|
|
hexmask.long.word 0x8 0.--9. 1. "OA1,Interface address"
|
|
line.long 0xC "OAR2,Own address register 2"
|
|
bitfld.long 0xC 15. "OA2EN,Own Address 2 enable" "0,1"
|
|
bitfld.long 0xC 8.--10. "OA2MSK,Own Address 2 masks" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address"
|
|
line.long 0x10 "TIMINGR,Timing register"
|
|
hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler"
|
|
hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time"
|
|
hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time"
|
|
hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master"
|
|
hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master"
|
|
line.long 0x14 "TIMEOUTR,Status register 1"
|
|
bitfld.long 0x14 31. "TEXTEN,Extended clock timeout" "0,1"
|
|
hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B"
|
|
bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "0,1"
|
|
bitfld.long 0x14 12. "TIDLE,Idle clock timeout" "0,1"
|
|
hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A"
|
|
line.long 0x18 "ISR,Interrupt and Status register"
|
|
hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (Slave"
|
|
rbitfld.long 0x18 16. "DIR,Transfer direction (Slave" "0,1"
|
|
rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1"
|
|
rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1"
|
|
rbitfld.long 0x18 12. "TIMEOUT,Timeout or t_low detection" "0,1"
|
|
rbitfld.long 0x18 11. "PECERR,PEC Error in reception" "0,1"
|
|
rbitfld.long 0x18 10. "OVR,Overrun/Underrun (slave" "0,1"
|
|
rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1"
|
|
rbitfld.long 0x18 8. "BERR,Bus error" "0,1"
|
|
newline
|
|
rbitfld.long 0x18 7. "TCR,Transfer Complete Reload" "0,1"
|
|
rbitfld.long 0x18 6. "TC,Transfer Complete (master" "0,1"
|
|
rbitfld.long 0x18 5. "STOPF,Stop detection flag" "0,1"
|
|
rbitfld.long 0x18 4. "NACKF,Not acknowledge received" "0,1"
|
|
rbitfld.long 0x18 3. "ADDR,Address matched (slave" "0,1"
|
|
rbitfld.long 0x18 2. "RXNE,Receive data register not empty" "0,1"
|
|
bitfld.long 0x18 1. "TXIS,Transmit interrupt status" "0,1"
|
|
bitfld.long 0x18 0. "TXE,Transmit data register empty" "0,1"
|
|
wgroup.long 0x1C++0x3
|
|
line.long 0x0 "ICR,Interrupt clear register"
|
|
bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1"
|
|
bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag" "0,1"
|
|
bitfld.long 0x0 11. "PECCF,PEC Error flag clear" "0,1"
|
|
bitfld.long 0x0 10. "OVRCF,Overrun/Underrun flag" "0,1"
|
|
bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag" "0,1"
|
|
bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1"
|
|
bitfld.long 0x0 5. "STOPCF,Stop detection flag clear" "0,1"
|
|
bitfld.long 0x0 4. "NACKCF,Not Acknowledge flag clear" "0,1"
|
|
bitfld.long 0x0 3. "ADDRCF,Address Matched flag clear" "0,1"
|
|
rgroup.long 0x20++0x7
|
|
line.long 0x0 "PECR,PEC register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking"
|
|
line.long 0x4 "RXDR,Receive data register"
|
|
hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data"
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "TXDR,Transmit data register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data"
|
|
tree.end
|
|
tree "I2C4"
|
|
base ad:0x40008400
|
|
group.long 0x0++0x1B
|
|
line.long 0x0 "CR1,Control register 1"
|
|
bitfld.long 0x0 23. "PECEN,PEC enable" "0,1"
|
|
bitfld.long 0x0 22. "ALERTEN,SMBUS alert enable" "0,1"
|
|
bitfld.long 0x0 21. "SMBDEN,SMBus Device Default address" "0,1"
|
|
bitfld.long 0x0 20. "SMBHEN,SMBus Host address enable" "0,1"
|
|
bitfld.long 0x0 19. "GCEN,General call enable" "0,1"
|
|
bitfld.long 0x0 18. "WUPEN,Wakeup from STOP enable" "0,1"
|
|
bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "0,1"
|
|
bitfld.long 0x0 16. "SBC,Slave byte control" "0,1"
|
|
bitfld.long 0x0 15. "RXDMAEN,DMA reception requests" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "TXDMAEN,DMA transmission requests" "0,1"
|
|
bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "0,1"
|
|
hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter"
|
|
bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "0,1"
|
|
bitfld.long 0x0 6. "TCIE,Transfer Complete interrupt" "0,1"
|
|
bitfld.long 0x0 5. "STOPIE,STOP detection Interrupt" "0,1"
|
|
bitfld.long 0x0 4. "NACKIE,Not acknowledge received interrupt" "0,1"
|
|
bitfld.long 0x0 3. "ADDRIE,Address match interrupt enable (slave" "0,1"
|
|
bitfld.long 0x0 2. "RXIE,RX Interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TXIE,TX Interrupt enable" "0,1"
|
|
bitfld.long 0x0 0. "PE,Peripheral enable" "0,1"
|
|
line.long 0x4 "CR2,Control register 2"
|
|
bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "0,1"
|
|
bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master" "0,1"
|
|
bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "0,1"
|
|
hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes"
|
|
bitfld.long 0x4 15. "NACK,NACK generation (slave" "0,1"
|
|
bitfld.long 0x4 14. "STOP,Stop generation (master" "0,1"
|
|
bitfld.long 0x4 13. "START,Start generation" "0,1"
|
|
bitfld.long 0x4 12. "HEAD10R,10-bit address header only read" "0,1"
|
|
bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "RD_WRN,Transfer direction (master" "0,1"
|
|
hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address bit (master"
|
|
line.long 0x8 "OAR1,Own address register 1"
|
|
bitfld.long 0x8 15. "OA1EN,Own Address 1 enable" "0,1"
|
|
bitfld.long 0x8 10. "OA1MODE,Own Address 1 10-bit mode" "0,1"
|
|
hexmask.long.word 0x8 0.--9. 1. "OA1,Interface address"
|
|
line.long 0xC "OAR2,Own address register 2"
|
|
bitfld.long 0xC 15. "OA2EN,Own Address 2 enable" "0,1"
|
|
bitfld.long 0xC 8.--10. "OA2MSK,Own Address 2 masks" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address"
|
|
line.long 0x10 "TIMINGR,Timing register"
|
|
hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler"
|
|
hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time"
|
|
hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time"
|
|
hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master"
|
|
hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master"
|
|
line.long 0x14 "TIMEOUTR,Status register 1"
|
|
bitfld.long 0x14 31. "TEXTEN,Extended clock timeout" "0,1"
|
|
hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B"
|
|
bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "0,1"
|
|
bitfld.long 0x14 12. "TIDLE,Idle clock timeout" "0,1"
|
|
hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A"
|
|
line.long 0x18 "ISR,Interrupt and Status register"
|
|
hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (Slave"
|
|
rbitfld.long 0x18 16. "DIR,Transfer direction (Slave" "0,1"
|
|
rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1"
|
|
rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1"
|
|
rbitfld.long 0x18 12. "TIMEOUT,Timeout or t_low detection" "0,1"
|
|
rbitfld.long 0x18 11. "PECERR,PEC Error in reception" "0,1"
|
|
rbitfld.long 0x18 10. "OVR,Overrun/Underrun (slave" "0,1"
|
|
rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1"
|
|
rbitfld.long 0x18 8. "BERR,Bus error" "0,1"
|
|
newline
|
|
rbitfld.long 0x18 7. "TCR,Transfer Complete Reload" "0,1"
|
|
rbitfld.long 0x18 6. "TC,Transfer Complete (master" "0,1"
|
|
rbitfld.long 0x18 5. "STOPF,Stop detection flag" "0,1"
|
|
rbitfld.long 0x18 4. "NACKF,Not acknowledge received" "0,1"
|
|
rbitfld.long 0x18 3. "ADDR,Address matched (slave" "0,1"
|
|
rbitfld.long 0x18 2. "RXNE,Receive data register not empty" "0,1"
|
|
bitfld.long 0x18 1. "TXIS,Transmit interrupt status" "0,1"
|
|
bitfld.long 0x18 0. "TXE,Transmit data register empty" "0,1"
|
|
wgroup.long 0x1C++0x3
|
|
line.long 0x0 "ICR,Interrupt clear register"
|
|
bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1"
|
|
bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag" "0,1"
|
|
bitfld.long 0x0 11. "PECCF,PEC Error flag clear" "0,1"
|
|
bitfld.long 0x0 10. "OVRCF,Overrun/Underrun flag" "0,1"
|
|
bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag" "0,1"
|
|
bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1"
|
|
bitfld.long 0x0 5. "STOPCF,Stop detection flag clear" "0,1"
|
|
bitfld.long 0x0 4. "NACKCF,Not Acknowledge flag clear" "0,1"
|
|
bitfld.long 0x0 3. "ADDRCF,Address Matched flag clear" "0,1"
|
|
rgroup.long 0x20++0x7
|
|
line.long 0x0 "PECR,PEC register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking"
|
|
line.long 0x4 "RXDR,Receive data register"
|
|
hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data"
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "TXDR,Transmit data register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data"
|
|
tree.end
|
|
tree.end
|
|
tree "IWDG (Independent Watchdog)"
|
|
base ad:0x40003000
|
|
wgroup.long 0x0++0x3
|
|
line.long 0x0 "KR,Key register"
|
|
hexmask.long.word 0x0 0.--15. 1. "KEY,Key value (write only read"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "PR,Prescaler register"
|
|
bitfld.long 0x0 0.--2. "PR,Prescaler divider" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "RLR,Reload register"
|
|
hexmask.long.word 0x4 0.--11. 1. "RL,Watchdog counter reload"
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x0 "SR,Status register"
|
|
bitfld.long 0x0 2. "WVU,Watchdog counter window value" "0,1"
|
|
bitfld.long 0x0 1. "RVU,Watchdog counter reload value" "0,1"
|
|
bitfld.long 0x0 0. "PVU,Watchdog prescaler value" "0,1"
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "WINR,Window register"
|
|
hexmask.long.word 0x0 0.--11. 1. "WIN,Watchdog counter window"
|
|
tree.end
|
|
tree "LPTIM (Low-Power Timer)"
|
|
base ad:0x0
|
|
tree "LPTIM1"
|
|
base ad:0x40007C00
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "ISR,Interrupt and Status Register"
|
|
bitfld.long 0x0 6. "DOWN,Counter direction change up to" "0,1"
|
|
bitfld.long 0x0 5. "UP,Counter direction change down to" "0,1"
|
|
bitfld.long 0x0 4. "ARROK,Autoreload register update" "0,1"
|
|
bitfld.long 0x0 3. "CMPOK,Compare register update OK" "0,1"
|
|
bitfld.long 0x0 2. "EXTTRIG,External trigger edge" "0,1"
|
|
bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1"
|
|
bitfld.long 0x0 0. "CMPM,Compare match" "0,1"
|
|
wgroup.long 0x4++0x3
|
|
line.long 0x0 "ICR,Interrupt Clear Register"
|
|
bitfld.long 0x0 6. "DOWNCF,Direction change to down Clear" "0,1"
|
|
bitfld.long 0x0 5. "UPCF,Direction change to UP Clear" "0,1"
|
|
bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK Clear" "0,1"
|
|
bitfld.long 0x0 3. "CMPOKCF,Compare register update OK Clear" "0,1"
|
|
bitfld.long 0x0 2. "EXTTRIGCF,External trigger valid edge Clear" "0,1"
|
|
bitfld.long 0x0 1. "ARRMCF,Autoreload match Clear" "0,1"
|
|
bitfld.long 0x0 0. "CMPMCF,compare match Clear Flag" "0,1"
|
|
group.long 0x8++0x13
|
|
line.long 0x0 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt" "0,1"
|
|
bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt" "0,1"
|
|
bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt" "0,1"
|
|
bitfld.long 0x0 3. "CMPOKIE,Compare register update OK Interrupt" "0,1"
|
|
bitfld.long 0x0 2. "EXTTRIGIE,External trigger valid edge Interrupt" "0,1"
|
|
bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt" "0,1"
|
|
bitfld.long 0x0 0. "CMPMIE,Compare match Interrupt" "0,1"
|
|
line.long 0x4 "CFGR,Configuration Register"
|
|
bitfld.long 0x4 24. "ENC,Encoder mode enable" "0,1"
|
|
bitfld.long 0x4 23. "COUNTMODE,counter mode enabled" "0,1"
|
|
bitfld.long 0x4 22. "PRELOAD,Registers update mode" "0,1"
|
|
bitfld.long 0x4 21. "WAVPOL,Waveform shape polarity" "0,1"
|
|
bitfld.long 0x4 20. "WAVE,Waveform shape" "0,1"
|
|
bitfld.long 0x4 19. "TIMOUT,Timeout enable" "0,1"
|
|
bitfld.long 0x4 17.--18. "TRIGEN,Trigger enable and" "0,1,2,3"
|
|
bitfld.long 0x4 13.--15. "TRIGSEL,Trigger selector" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 9.--11. "PRESC,Clock prescaler" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 6.--7. "TRGFLT,Configurable digital filter for" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 3.--4. "CKFLT,Configurable digital filter for external" "0,1,2,3"
|
|
bitfld.long 0x4 1.--2. "CKPOL,Clock Polarity" "0,1,2,3"
|
|
bitfld.long 0x4 0. "CKSEL,Clock selector" "0,1"
|
|
line.long 0x8 "CR,Control Register"
|
|
bitfld.long 0x8 2. "CNTSTRT,Timer start in continuous" "0,1"
|
|
bitfld.long 0x8 1. "SNGSTRT,LPTIM start in single mode" "0,1"
|
|
bitfld.long 0x8 0. "ENABLE,LPTIM Enable" "0,1"
|
|
line.long 0xC "CMP,Compare Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "CMP,Compare value"
|
|
line.long 0x10 "ARR,Autoreload Register"
|
|
hexmask.long.word 0x10 0.--15. 1. "ARR,Auto reload value"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "CNT,Counter Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value"
|
|
tree.end
|
|
tree "LPTIM2"
|
|
base ad:0x40009400
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "ISR,Interrupt and Status Register"
|
|
bitfld.long 0x0 6. "DOWN,Counter direction change up to" "0,1"
|
|
bitfld.long 0x0 5. "UP,Counter direction change down to" "0,1"
|
|
bitfld.long 0x0 4. "ARROK,Autoreload register update" "0,1"
|
|
bitfld.long 0x0 3. "CMPOK,Compare register update OK" "0,1"
|
|
bitfld.long 0x0 2. "EXTTRIG,External trigger edge" "0,1"
|
|
bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1"
|
|
bitfld.long 0x0 0. "CMPM,Compare match" "0,1"
|
|
wgroup.long 0x4++0x3
|
|
line.long 0x0 "ICR,Interrupt Clear Register"
|
|
bitfld.long 0x0 6. "DOWNCF,Direction change to down Clear" "0,1"
|
|
bitfld.long 0x0 5. "UPCF,Direction change to UP Clear" "0,1"
|
|
bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK Clear" "0,1"
|
|
bitfld.long 0x0 3. "CMPOKCF,Compare register update OK Clear" "0,1"
|
|
bitfld.long 0x0 2. "EXTTRIGCF,External trigger valid edge Clear" "0,1"
|
|
bitfld.long 0x0 1. "ARRMCF,Autoreload match Clear" "0,1"
|
|
bitfld.long 0x0 0. "CMPMCF,compare match Clear Flag" "0,1"
|
|
group.long 0x8++0x13
|
|
line.long 0x0 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt" "0,1"
|
|
bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt" "0,1"
|
|
bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt" "0,1"
|
|
bitfld.long 0x0 3. "CMPOKIE,Compare register update OK Interrupt" "0,1"
|
|
bitfld.long 0x0 2. "EXTTRIGIE,External trigger valid edge Interrupt" "0,1"
|
|
bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt" "0,1"
|
|
bitfld.long 0x0 0. "CMPMIE,Compare match Interrupt" "0,1"
|
|
line.long 0x4 "CFGR,Configuration Register"
|
|
bitfld.long 0x4 24. "ENC,Encoder mode enable" "0,1"
|
|
bitfld.long 0x4 23. "COUNTMODE,counter mode enabled" "0,1"
|
|
bitfld.long 0x4 22. "PRELOAD,Registers update mode" "0,1"
|
|
bitfld.long 0x4 21. "WAVPOL,Waveform shape polarity" "0,1"
|
|
bitfld.long 0x4 20. "WAVE,Waveform shape" "0,1"
|
|
bitfld.long 0x4 19. "TIMOUT,Timeout enable" "0,1"
|
|
bitfld.long 0x4 17.--18. "TRIGEN,Trigger enable and" "0,1,2,3"
|
|
bitfld.long 0x4 13.--15. "TRIGSEL,Trigger selector" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 9.--11. "PRESC,Clock prescaler" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 6.--7. "TRGFLT,Configurable digital filter for" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 3.--4. "CKFLT,Configurable digital filter for external" "0,1,2,3"
|
|
bitfld.long 0x4 1.--2. "CKPOL,Clock Polarity" "0,1,2,3"
|
|
bitfld.long 0x4 0. "CKSEL,Clock selector" "0,1"
|
|
line.long 0x8 "CR,Control Register"
|
|
bitfld.long 0x8 2. "CNTSTRT,Timer start in continuous" "0,1"
|
|
bitfld.long 0x8 1. "SNGSTRT,LPTIM start in single mode" "0,1"
|
|
bitfld.long 0x8 0. "ENABLE,LPTIM Enable" "0,1"
|
|
line.long 0xC "CMP,Compare Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "CMP,Compare value"
|
|
line.long 0x10 "ARR,Autoreload Register"
|
|
hexmask.long.word 0x10 0.--15. 1. "ARR,Auto reload value"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "CNT,Counter Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value"
|
|
tree.end
|
|
tree.end
|
|
tree "LTDC (LCD-TFT Display Controller)"
|
|
base ad:0x40016800
|
|
group.long 0x8++0x13
|
|
line.long 0x0 "SSCR,LTDC Synchronization Size Configuration"
|
|
hexmask.long.word 0x0 16.--27. 1. "HSW,Horizontal Synchronization Width (in"
|
|
hexmask.long.word 0x0 0.--10. 1. "VSH,Vertical Synchronization Height (in"
|
|
line.long 0x4 "BPCR,LTDC Back Porch Configuration"
|
|
hexmask.long.word 0x4 16.--27. 1. "AHBP,Accumulated Horizontal back porch (in"
|
|
hexmask.long.word 0x4 0.--10. 1. "AVBP,Accumulated Vertical back porch (in"
|
|
line.long 0x8 "AWCR,LTDC Active Width Configuration"
|
|
hexmask.long.word 0x8 16.--27. 1. "AAW,Accumulated Active Width (in units of"
|
|
hexmask.long.word 0x8 0.--10. 1. "AAH,Accumulated Active Height (in units of"
|
|
line.long 0xC "TWCR,LTDC Total Width Configuration"
|
|
hexmask.long.word 0xC 16.--27. 1. "TOTALW,Total Width (in units of pixel clock"
|
|
hexmask.long.word 0xC 0.--10. 1. "TOTALH,Total Height (in units of horizontal"
|
|
line.long 0x10 "GCR,LTDC Global Control Register"
|
|
bitfld.long 0x10 31. "HSPOL,Horizontal Synchronization" "0,1"
|
|
bitfld.long 0x10 30. "VSPOL,Vertical Synchronization" "0,1"
|
|
bitfld.long 0x10 29. "DEPOL,Not Data Enable Polarity" "0,1"
|
|
bitfld.long 0x10 28. "PCPOL,Pixel Clock Polarity" "0,1"
|
|
bitfld.long 0x10 16. "DEN,Dither Enable" "0,1"
|
|
rbitfld.long 0x10 12.--14. "DRW,Dither Red Width" "0,1,2,3,4,5,6,7"
|
|
rbitfld.long 0x10 8.--10. "DGW,Dither Green Width" "0,1,2,3,4,5,6,7"
|
|
rbitfld.long 0x10 4.--6. "DBW,Dither Blue Width" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 0. "LTDCEN,LCD-TFT controller enable" "0,1"
|
|
group.long 0x24++0x3
|
|
line.long 0x0 "SRCR,LTDC Shadow Reload Configuration"
|
|
bitfld.long 0x0 1. "VBR,Vertical Blanking Reload" "0,1"
|
|
bitfld.long 0x0 0. "IMR,Immediate Reload" "0,1"
|
|
group.long 0x2C++0x3
|
|
line.long 0x0 "BCCR,LTDC Background Color Configuration"
|
|
hexmask.long.byte 0x0 16.--23. 1. "BCRED,Background Color Red value"
|
|
hexmask.long.byte 0x0 8.--15. 1. "BCGREEN,Background Color Green"
|
|
hexmask.long.byte 0x0 0.--7. 1. "BCBLUE,Background Color Blue"
|
|
group.long 0x34++0x3
|
|
line.long 0x0 "IER,LTDC Interrupt Enable Register"
|
|
bitfld.long 0x0 3. "RRIE,Register Reload interrupt" "0,1"
|
|
bitfld.long 0x0 2. "TERRIE,Transfer Error Interrupt" "0,1"
|
|
bitfld.long 0x0 1. "FUIE,FIFO Underrun Interrupt" "0,1"
|
|
bitfld.long 0x0 0. "LIE,Line Interrupt Enable" "0,1"
|
|
rgroup.long 0x38++0x3
|
|
line.long 0x0 "ISR,LTDC Interrupt Status Register"
|
|
bitfld.long 0x0 3. "RRIF,Register Reload Interrupt" "0,1"
|
|
bitfld.long 0x0 2. "TERRIF,Transfer Error interrupt" "0,1"
|
|
bitfld.long 0x0 1. "FUIF,FIFO Underrun Interrupt" "0,1"
|
|
bitfld.long 0x0 0. "LIF,Line Interrupt flag" "0,1"
|
|
wgroup.long 0x3C++0x3
|
|
line.long 0x0 "ICR,LTDC Interrupt Clear Register"
|
|
bitfld.long 0x0 3. "CRRIF,Clears Register Reload Interrupt" "0,1"
|
|
bitfld.long 0x0 2. "CTERRIF,Clears the Transfer Error Interrupt" "0,1"
|
|
bitfld.long 0x0 1. "CFUIF,Clears the FIFO Underrun Interrupt" "0,1"
|
|
bitfld.long 0x0 0. "CLIF,Clears the Line Interrupt" "0,1"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "LIPCR,LTDC Line Interrupt Position Configuration"
|
|
hexmask.long.word 0x0 0.--10. 1. "LIPOS,Line Interrupt Position"
|
|
rgroup.long 0x44++0x7
|
|
line.long 0x0 "CPSR,LTDC Current Position Status"
|
|
hexmask.long.word 0x0 16.--31. 1. "CXPOS,Current X Position"
|
|
hexmask.long.word 0x0 0.--15. 1. "CYPOS,Current Y Position"
|
|
line.long 0x4 "CDSR,LTDC Current Display Status"
|
|
bitfld.long 0x4 3. "HSYNCS,Horizontal Synchronization display" "0,1"
|
|
bitfld.long 0x4 2. "VSYNCS,Vertical Synchronization display" "0,1"
|
|
bitfld.long 0x4 1. "HDES,Horizontal Data Enable display" "0,1"
|
|
bitfld.long 0x4 0. "VDES,Vertical Data Enable display" "0,1"
|
|
group.long 0x84++0x3
|
|
line.long 0x0 "L1CR,LTDC Layer Control Register"
|
|
bitfld.long 0x0 4. "CLUTEN,Color Look-Up Table Enable" "0,1"
|
|
bitfld.long 0x0 1. "COLKEN,Color Keying Enable" "0,1"
|
|
bitfld.long 0x0 0. "LEN,Layer Enable" "0,1"
|
|
group.long 0x104++0x3
|
|
line.long 0x0 "L2CR,LTDC Layer Control Register"
|
|
bitfld.long 0x0 4. "CLUTEN,Color Look-Up Table Enable" "0,1"
|
|
bitfld.long 0x0 1. "COLKEN,Color Keying Enable" "0,1"
|
|
bitfld.long 0x0 0. "LEN,Layer Enable" "0,1"
|
|
group.long 0x88++0x3
|
|
line.long 0x0 "L1WHPCR,LTDC Layer Window Horizontal Position"
|
|
hexmask.long.word 0x0 16.--27. 1. "WHSPPOS,Window Horizontal Stop"
|
|
hexmask.long.word 0x0 0.--11. 1. "WHSTPOS,Window Horizontal Start"
|
|
group.long 0x108++0x3
|
|
line.long 0x0 "L2WHPCR,LTDC Layerx Window Horizontal Position"
|
|
hexmask.long.word 0x0 16.--27. 1. "WHSPPOS,Window Horizontal Stop"
|
|
hexmask.long.word 0x0 0.--11. 1. "WHSTPOS,Window Horizontal Start"
|
|
group.long 0x8C++0x3
|
|
line.long 0x0 "L1WVPCR,LTDC Layer Window Vertical Position"
|
|
hexmask.long.word 0x0 16.--26. 1. "WVSPPOS,Window Vertical Stop"
|
|
hexmask.long.word 0x0 0.--10. 1. "WVSTPOS,Window Vertical Start"
|
|
group.long 0x10C++0x3
|
|
line.long 0x0 "L2WVPCR,LTDC Layer Window Vertical Position"
|
|
hexmask.long.word 0x0 16.--26. 1. "WVSPPOS,Window Vertical Stop"
|
|
hexmask.long.word 0x0 0.--10. 1. "WVSTPOS,Window Vertical Start"
|
|
group.long 0x90++0x3
|
|
line.long 0x0 "L1CKCR,LTDC Layer Color Keying Configuration"
|
|
hexmask.long.byte 0x0 16.--23. 1. "CKRED,Color Key Red value"
|
|
hexmask.long.byte 0x0 8.--15. 1. "CKGREEN,Color Key Green value"
|
|
hexmask.long.byte 0x0 0.--7. 1. "CKBLUE,Color Key Blue value"
|
|
group.long 0x110++0x3
|
|
line.long 0x0 "L2CKCR,LTDC Layer Color Keying Configuration"
|
|
hexmask.long.byte 0x0 16.--23. 1. "CKRED,Color Key Red value"
|
|
hexmask.long.byte 0x0 8.--15. 1. "CKGREEN,Color Key Green value"
|
|
hexmask.long.byte 0x0 0.--7. 1. "CKBLUE,Color Key Blue value"
|
|
group.long 0x94++0x3
|
|
line.long 0x0 "L1PFCR,LTDC Layer Pixel Format Configuration"
|
|
bitfld.long 0x0 0.--2. "PF,Pixel Format" "0,1,2,3,4,5,6,7"
|
|
group.long 0x114++0x3
|
|
line.long 0x0 "L2PFCR,LTDC Layer Pixel Format Configuration"
|
|
bitfld.long 0x0 0.--2. "PF,Pixel Format" "0,1,2,3,4,5,6,7"
|
|
group.long 0x98++0x3
|
|
line.long 0x0 "L1CACR,LTDC Layer Constant Alpha Configuration"
|
|
hexmask.long.byte 0x0 0.--7. 1. "CONSTA,Constant Alpha"
|
|
group.long 0x118++0x3
|
|
line.long 0x0 "L2CACR,LTDC Layer Constant Alpha Configuration"
|
|
hexmask.long.byte 0x0 0.--7. 1. "CONSTA,Constant Alpha"
|
|
group.long 0x9C++0x3
|
|
line.long 0x0 "L1DCCR,LTDC Layer Default Color Configuration"
|
|
hexmask.long.byte 0x0 24.--31. 1. "DCALPHA,Default Color Alpha"
|
|
hexmask.long.byte 0x0 16.--23. 1. "DCRED,Default Color Red"
|
|
hexmask.long.byte 0x0 8.--15. 1. "DCGREEN,Default Color Green"
|
|
hexmask.long.byte 0x0 0.--7. 1. "DCBLUE,Default Color Blue"
|
|
group.long 0x11C++0x3
|
|
line.long 0x0 "L2DCCR,LTDC Layer Default Color Configuration"
|
|
hexmask.long.byte 0x0 24.--31. 1. "DCALPHA,Default Color Alpha"
|
|
hexmask.long.byte 0x0 16.--23. 1. "DCRED,Default Color Red"
|
|
hexmask.long.byte 0x0 8.--15. 1. "DCGREEN,Default Color Green"
|
|
hexmask.long.byte 0x0 0.--7. 1. "DCBLUE,Default Color Blue"
|
|
group.long 0xA0++0x3
|
|
line.long 0x0 "L1BFCR,LTDC Layer Blending Factors Configuration"
|
|
bitfld.long 0x0 8.--10. "BF1,Blending Factor 1" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 0.--2. "BF2,Blending Factor 2" "0,1,2,3,4,5,6,7"
|
|
group.long 0x124++0x3
|
|
line.long 0x0 "L2BFCR,LTDC Layer Blending Factors Configuration"
|
|
bitfld.long 0x0 8.--10. "BF1,Blending Factor 1" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 0.--2. "BF2,Blending Factor 2" "0,1,2,3,4,5,6,7"
|
|
group.long 0xAC++0x3
|
|
line.long 0x0 "L1CFBAR,LTDC Layer Color Frame Buffer Address"
|
|
hexmask.long 0x0 0.--31. 1. "CFBADD,Color Frame Buffer Start"
|
|
group.long 0x12C++0x3
|
|
line.long 0x0 "L2CFBAR,LTDC Layer Color Frame Buffer Address"
|
|
hexmask.long 0x0 0.--31. 1. "CFBADD,Color Frame Buffer Start"
|
|
group.long 0xB0++0x3
|
|
line.long 0x0 "L1CFBLR,LTDC Layer Color Frame Buffer Length"
|
|
hexmask.long.word 0x0 16.--28. 1. "CFBP,Color Frame Buffer Pitch in"
|
|
hexmask.long.word 0x0 0.--12. 1. "CFBLL,Color Frame Buffer Line"
|
|
group.long 0x130++0x3
|
|
line.long 0x0 "L2CFBLR,LTDC Layer Color Frame Buffer Length"
|
|
hexmask.long.word 0x0 16.--28. 1. "CFBP,Color Frame Buffer Pitch in"
|
|
hexmask.long.word 0x0 0.--12. 1. "CFBLL,Color Frame Buffer Line"
|
|
group.long 0xB4++0x3
|
|
line.long 0x0 "L1CFBLNR,LTDC Layer ColorFrame Buffer Line Number"
|
|
hexmask.long.word 0x0 0.--10. 1. "CFBLNBR,Frame Buffer Line Number"
|
|
group.long 0x134++0x3
|
|
line.long 0x0 "L2CFBLNR,LTDC Layer ColorFrame Buffer Line Number"
|
|
hexmask.long.word 0x0 0.--10. 1. "CFBLNBR,Frame Buffer Line Number"
|
|
wgroup.long 0xC4++0x3
|
|
line.long 0x0 "L1CLUTWR,LTDC Layerx CLUT Write"
|
|
hexmask.long.byte 0x0 24.--31. 1. "CLUTADD,CLUT Address"
|
|
hexmask.long.byte 0x0 16.--23. 1. "RED,Red value"
|
|
hexmask.long.byte 0x0 8.--15. 1. "GREEN,Green value"
|
|
hexmask.long.byte 0x0 0.--7. 1. "BLUE,Blue value"
|
|
wgroup.long 0x144++0x3
|
|
line.long 0x0 "L2CLUTWR,LTDC Layerx CLUT Write"
|
|
hexmask.long.byte 0x0 24.--31. 1. "CLUTADD,CLUT Address"
|
|
hexmask.long.byte 0x0 16.--23. 1. "RED,Red value"
|
|
hexmask.long.byte 0x0 8.--15. 1. "GREEN,Green value"
|
|
hexmask.long.byte 0x0 0.--7. 1. "BLUE,Blue value"
|
|
tree.end
|
|
tree "MPU (Memory Protection Unit)"
|
|
base ad:0xE000ED90
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "MPU_TYPER,MPU type register"
|
|
hexmask.long.byte 0x0 16.--23. 1. "IREGION,Number of MPU instruction"
|
|
hexmask.long.byte 0x0 8.--15. 1. "DREGION,Number of MPU data regions"
|
|
bitfld.long 0x0 0. "SEPARATE,Separate flag" "0,1"
|
|
group.long 0x4++0xF
|
|
line.long 0x0 "MPU_CTRL,MPU control register"
|
|
bitfld.long 0x0 2. "PRIVDEFENA,Enable priviliged software access to" "0,1"
|
|
bitfld.long 0x0 1. "HFNMIENA,Enables the operation of MPU during hard" "0,1"
|
|
bitfld.long 0x0 0. "ENABLE,Enables the MPU" "0,1"
|
|
line.long 0x4 "MPU_RNR,MPU region number register"
|
|
hexmask.long.byte 0x4 0.--7. 1. "REGION,MPU region"
|
|
line.long 0x8 "MPU_RBAR,MPU region base address"
|
|
hexmask.long 0x8 5.--31. 1. "ADDR,Region base address field"
|
|
bitfld.long 0x8 4. "VALID,MPU region number valid" "0,1"
|
|
hexmask.long.byte 0x8 0.--3. 1. "REGION,MPU region field"
|
|
line.long 0xC "MPU_RASR,MPU region attribute and size"
|
|
bitfld.long 0xC 28. "XN,Instruction access disable" "0,1"
|
|
bitfld.long 0xC 24.--26. "AP,Access permission" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 19.--21. "TEX,memory attribute" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 18. "S,Shareable memory attribute" "0,1"
|
|
bitfld.long 0xC 17. "C,memory attribute" "0,1"
|
|
bitfld.long 0xC 16. "B,memory attribute" "0,1"
|
|
hexmask.long.byte 0xC 8.--15. 1. "SRD,Subregion disable bits"
|
|
hexmask.long.byte 0xC 1.--5. 1. "SIZE,Size of the MPU protection"
|
|
newline
|
|
bitfld.long 0xC 0. "ENABLE,Region enable bit." "0,1"
|
|
tree.end
|
|
tree "NVIC (Nested Vectored Interrupt Controller)"
|
|
base ad:0x0
|
|
sif (cpuis("STM32L4P5*")||cpuis("STM32L4Q5*"))
|
|
tree "NVIC"
|
|
base ad:0xE000E100
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "ISER0,Interrupt Set-Enable Register"
|
|
hexmask.long 0x0 0.--31. 1. "SETENA,SETENA"
|
|
line.long 0x4 "ISER1,Interrupt Set-Enable Register"
|
|
hexmask.long 0x4 0.--31. 1. "SETENA,SETENA"
|
|
line.long 0x8 "ISER2,Interrupt Set-Enable Register"
|
|
hexmask.long 0x8 0.--31. 1. "SETENA,SETENA"
|
|
group.long 0x80++0xB
|
|
line.long 0x0 "ICER0,Interrupt Clear-Enable"
|
|
hexmask.long 0x0 0.--31. 1. "CLRENA,CLRENA"
|
|
line.long 0x4 "ICER1,Interrupt Clear-Enable"
|
|
hexmask.long 0x4 0.--31. 1. "CLRENA,CLRENA"
|
|
line.long 0x8 "ICER2,Interrupt Clear-Enable"
|
|
hexmask.long 0x8 0.--31. 1. "CLRENA,CLRENA"
|
|
group.long 0x100++0xB
|
|
line.long 0x0 "ISPR0,Interrupt Set-Pending Register"
|
|
hexmask.long 0x0 0.--31. 1. "SETPEND,SETPEND"
|
|
line.long 0x4 "ISPR1,Interrupt Set-Pending Register"
|
|
hexmask.long 0x4 0.--31. 1. "SETPEND,SETPEND"
|
|
line.long 0x8 "ISPR2,Interrupt Set-Pending Register"
|
|
hexmask.long 0x8 0.--31. 1. "SETPEND,SETPEND"
|
|
group.long 0x180++0xB
|
|
line.long 0x0 "ICPR0,Interrupt Clear-Pending"
|
|
hexmask.long 0x0 0.--31. 1. "CLRPEND,CLRPEND"
|
|
line.long 0x4 "ICPR1,Interrupt Clear-Pending"
|
|
hexmask.long 0x4 0.--31. 1. "CLRPEND,CLRPEND"
|
|
line.long 0x8 "ICPR2,Interrupt Clear-Pending"
|
|
hexmask.long 0x8 0.--31. 1. "CLRPEND,CLRPEND"
|
|
rgroup.long 0x200++0xB
|
|
line.long 0x0 "IABR0,Interrupt Active Bit Register"
|
|
hexmask.long 0x0 0.--31. 1. "ACTIVE,ACTIVE"
|
|
line.long 0x4 "IABR1,Interrupt Active Bit Register"
|
|
hexmask.long 0x4 0.--31. 1. "ACTIVE,ACTIVE"
|
|
line.long 0x8 "IABR2,Interrupt Active Bit Register"
|
|
hexmask.long 0x8 0.--31. 1. "ACTIVE,ACTIVE"
|
|
group.long 0x300++0x53
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x0 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x0 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x0 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x4 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x4 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x4 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x8 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x8 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x8 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0xC 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0xC 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0xC 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x10 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x10 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x10 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x14 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x14 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x14 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x18 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x18 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x18 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x1C 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x1C 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x1C 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x20 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x20 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x20 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x24 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x24 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x24 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x28 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x28 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x28 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x2C 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x2C 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x2C 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x30 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x30 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x30 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x34 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x34 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x34 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x38 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x38 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x38 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x3C 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x3C 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x3C 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x40 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x40 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x40 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x44 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x44 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x44 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x48 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x48 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x48 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x4C 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x4C 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x4C 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x50 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x50 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x50 0.--7. 1. "IPR_N0,IPR_N0"
|
|
sif (cpuis("STM32L4P5*"))
|
|
group.long 0x354++0x13
|
|
line.long 0x0 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x0 16.--23. 1. "IPR_N2,IPR_N2"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x0 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x4 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x4 16.--23. 1. "IPR_N2,IPR_N2"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x4 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x8 "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x8 16.--23. 1. "IPR_N2,IPR_N2"
|
|
newline
|
|
hexmask.long.byte 0x8 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x8 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0xC "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0xC 16.--23. 1. "IPR_N2,IPR_N2"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0xC 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x10 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x10 16.--23. 1. "IPR_N2,IPR_N2"
|
|
newline
|
|
hexmask.long.byte 0x10 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x10 0.--7. 1. "IPR_N0,IPR_N0"
|
|
endif
|
|
tree.end
|
|
endif
|
|
sif (cpuis("STM32L4R5*"))
|
|
tree "NVIC"
|
|
base ad:0xE000E100
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "ISER0,Interrupt Set-Enable Register"
|
|
hexmask.long 0x0 0.--31. 1. "SETENA,SETENA"
|
|
line.long 0x4 "ISER1,Interrupt Set-Enable Register"
|
|
hexmask.long 0x4 0.--31. 1. "SETENA,SETENA"
|
|
line.long 0x8 "ISER2,Interrupt Set-Enable Register"
|
|
hexmask.long 0x8 0.--31. 1. "SETENA,SETENA"
|
|
group.long 0x80++0xB
|
|
line.long 0x0 "ICER0,Interrupt Clear-Enable"
|
|
hexmask.long 0x0 0.--31. 1. "CLRENA,CLRENA"
|
|
line.long 0x4 "ICER1,Interrupt Clear-Enable"
|
|
hexmask.long 0x4 0.--31. 1. "CLRENA,CLRENA"
|
|
line.long 0x8 "ICER2,Interrupt Clear-Enable"
|
|
hexmask.long 0x8 0.--31. 1. "CLRENA,CLRENA"
|
|
group.long 0x100++0xB
|
|
line.long 0x0 "ISPR0,Interrupt Set-Pending Register"
|
|
hexmask.long 0x0 0.--31. 1. "SETPEND,SETPEND"
|
|
line.long 0x4 "ISPR1,Interrupt Set-Pending Register"
|
|
hexmask.long 0x4 0.--31. 1. "SETPEND,SETPEND"
|
|
line.long 0x8 "ISPR2,Interrupt Set-Pending Register"
|
|
hexmask.long 0x8 0.--31. 1. "SETPEND,SETPEND"
|
|
group.long 0x180++0xB
|
|
line.long 0x0 "ICPR0,Interrupt Clear-Pending"
|
|
hexmask.long 0x0 0.--31. 1. "CLRPEND,CLRPEND"
|
|
line.long 0x4 "ICPR1,Interrupt Clear-Pending"
|
|
hexmask.long 0x4 0.--31. 1. "CLRPEND,CLRPEND"
|
|
line.long 0x8 "ICPR2,Interrupt Clear-Pending"
|
|
hexmask.long 0x8 0.--31. 1. "CLRPEND,CLRPEND"
|
|
rgroup.long 0x200++0xB
|
|
line.long 0x0 "IABR0,Interrupt Active Bit Register"
|
|
hexmask.long 0x0 0.--31. 1. "ACTIVE,ACTIVE"
|
|
line.long 0x4 "IABR1,Interrupt Active Bit Register"
|
|
hexmask.long 0x4 0.--31. 1. "ACTIVE,ACTIVE"
|
|
line.long 0x8 "IABR2,Interrupt Active Bit Register"
|
|
hexmask.long 0x8 0.--31. 1. "ACTIVE,ACTIVE"
|
|
group.long 0x300++0x67
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x0 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x0 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x0 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x4 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x4 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x4 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x8 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x8 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x8 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0xC 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0xC 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0xC 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x10 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x10 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x10 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x14 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x14 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x14 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x18 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x18 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x18 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x1C 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x1C 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x1C 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x20 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x20 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x20 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x24 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x24 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x24 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x28 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x28 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x28 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x2C 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x2C 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x2C 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x30 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x30 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x30 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x34 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x34 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x34 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x38 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x38 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x38 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x3C 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x3C 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x3C 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x40 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x40 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x40 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x44 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x44 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x44 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x48 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x48 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x48 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x4C 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x4C 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x4C 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x50 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x50 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x50 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x54 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x54 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x54 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x58 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x58 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x58 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x5C 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x5C 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x5C 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x60 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x60 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x60 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x64 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x64 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x64 0.--7. 1. "IPR_N0,IPR_N0"
|
|
tree.end
|
|
endif
|
|
sif (cpuis("STM32L4R7*"))
|
|
tree "NVIC"
|
|
base ad:0xE000E100
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "ISER0,Interrupt Set-Enable Register"
|
|
hexmask.long 0x0 0.--31. 1. "SETENA,SETENA"
|
|
line.long 0x4 "ISER1,Interrupt Set-Enable Register"
|
|
hexmask.long 0x4 0.--31. 1. "SETENA,SETENA"
|
|
line.long 0x8 "ISER2,Interrupt Set-Enable Register"
|
|
hexmask.long 0x8 0.--31. 1. "SETENA,SETENA"
|
|
group.long 0x80++0xB
|
|
line.long 0x0 "ICER0,Interrupt Clear-Enable"
|
|
hexmask.long 0x0 0.--31. 1. "CLRENA,CLRENA"
|
|
line.long 0x4 "ICER1,Interrupt Clear-Enable"
|
|
hexmask.long 0x4 0.--31. 1. "CLRENA,CLRENA"
|
|
line.long 0x8 "ICER2,Interrupt Clear-Enable"
|
|
hexmask.long 0x8 0.--31. 1. "CLRENA,CLRENA"
|
|
group.long 0x100++0xB
|
|
line.long 0x0 "ISPR0,Interrupt Set-Pending Register"
|
|
hexmask.long 0x0 0.--31. 1. "SETPEND,SETPEND"
|
|
line.long 0x4 "ISPR1,Interrupt Set-Pending Register"
|
|
hexmask.long 0x4 0.--31. 1. "SETPEND,SETPEND"
|
|
line.long 0x8 "ISPR2,Interrupt Set-Pending Register"
|
|
hexmask.long 0x8 0.--31. 1. "SETPEND,SETPEND"
|
|
group.long 0x180++0xB
|
|
line.long 0x0 "ICPR0,Interrupt Clear-Pending"
|
|
hexmask.long 0x0 0.--31. 1. "CLRPEND,CLRPEND"
|
|
line.long 0x4 "ICPR1,Interrupt Clear-Pending"
|
|
hexmask.long 0x4 0.--31. 1. "CLRPEND,CLRPEND"
|
|
line.long 0x8 "ICPR2,Interrupt Clear-Pending"
|
|
hexmask.long 0x8 0.--31. 1. "CLRPEND,CLRPEND"
|
|
rgroup.long 0x200++0xB
|
|
line.long 0x0 "IABR0,Interrupt Active Bit Register"
|
|
hexmask.long 0x0 0.--31. 1. "ACTIVE,ACTIVE"
|
|
line.long 0x4 "IABR1,Interrupt Active Bit Register"
|
|
hexmask.long 0x4 0.--31. 1. "ACTIVE,ACTIVE"
|
|
line.long 0x8 "IABR2,Interrupt Active Bit Register"
|
|
hexmask.long 0x8 0.--31. 1. "ACTIVE,ACTIVE"
|
|
group.long 0x300++0x53
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x0 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x0 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x0 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x4 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x4 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x4 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x8 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x8 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x8 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0xC 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0xC 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0xC 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x10 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x10 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x10 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x14 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x14 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x14 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x18 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x18 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x18 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x1C 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x1C 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x1C 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x20 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x20 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x20 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x24 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x24 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x24 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x28 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x28 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x28 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x2C 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x2C 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x2C 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x30 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x30 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x30 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x34 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x34 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x34 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x38 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x38 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x38 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x3C 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x3C 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x3C 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x40 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x40 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x40 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x44 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x44 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x44 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x48 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x48 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x48 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x4C 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x4C 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x4C 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x50 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x50 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x50 0.--7. 1. "IPR_N0,IPR_N0"
|
|
tree.end
|
|
endif
|
|
sif (cpuis("STM32L4R9*"))
|
|
tree "NVIC"
|
|
base ad:0xE000E100
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "ISER0,Interrupt Set-Enable Register"
|
|
hexmask.long 0x0 0.--31. 1. "SETENA,SETENA"
|
|
line.long 0x4 "ISER1,Interrupt Set-Enable Register"
|
|
hexmask.long 0x4 0.--31. 1. "SETENA,SETENA"
|
|
line.long 0x8 "ISER2,Interrupt Set-Enable Register"
|
|
hexmask.long 0x8 0.--31. 1. "SETENA,SETENA"
|
|
group.long 0x80++0xB
|
|
line.long 0x0 "ICER0,Interrupt Clear-Enable"
|
|
hexmask.long 0x0 0.--31. 1. "CLRENA,CLRENA"
|
|
line.long 0x4 "ICER1,Interrupt Clear-Enable"
|
|
hexmask.long 0x4 0.--31. 1. "CLRENA,CLRENA"
|
|
line.long 0x8 "ICER2,Interrupt Clear-Enable"
|
|
hexmask.long 0x8 0.--31. 1. "CLRENA,CLRENA"
|
|
group.long 0x100++0xB
|
|
line.long 0x0 "ISPR0,Interrupt Set-Pending Register"
|
|
hexmask.long 0x0 0.--31. 1. "SETPEND,SETPEND"
|
|
line.long 0x4 "ISPR1,Interrupt Set-Pending Register"
|
|
hexmask.long 0x4 0.--31. 1. "SETPEND,SETPEND"
|
|
line.long 0x8 "ISPR2,Interrupt Set-Pending Register"
|
|
hexmask.long 0x8 0.--31. 1. "SETPEND,SETPEND"
|
|
group.long 0x180++0xB
|
|
line.long 0x0 "ICPR0,Interrupt Clear-Pending"
|
|
hexmask.long 0x0 0.--31. 1. "CLRPEND,CLRPEND"
|
|
line.long 0x4 "ICPR1,Interrupt Clear-Pending"
|
|
hexmask.long 0x4 0.--31. 1. "CLRPEND,CLRPEND"
|
|
line.long 0x8 "ICPR2,Interrupt Clear-Pending"
|
|
hexmask.long 0x8 0.--31. 1. "CLRPEND,CLRPEND"
|
|
rgroup.long 0x200++0xB
|
|
line.long 0x0 "IABR0,Interrupt Active Bit Register"
|
|
hexmask.long 0x0 0.--31. 1. "ACTIVE,ACTIVE"
|
|
line.long 0x4 "IABR1,Interrupt Active Bit Register"
|
|
hexmask.long 0x4 0.--31. 1. "ACTIVE,ACTIVE"
|
|
line.long 0x8 "IABR2,Interrupt Active Bit Register"
|
|
hexmask.long 0x8 0.--31. 1. "ACTIVE,ACTIVE"
|
|
group.long 0x300++0x53
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x0 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x0 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x0 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x4 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x4 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x4 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x8 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x8 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x8 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0xC 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0xC 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0xC 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x10 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x10 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x10 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x14 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x14 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x14 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x18 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x18 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x18 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x1C 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x1C 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x1C 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x20 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x20 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x20 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x24 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x24 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x24 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x28 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x28 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x28 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x2C 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x2C 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x2C 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x30 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x30 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x30 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x34 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x34 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x34 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x38 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x38 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x38 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x3C 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x3C 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x3C 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x40 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x40 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x40 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x44 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x44 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x44 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x48 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x48 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x48 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x4C 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x4C 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x4C 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x50 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x50 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x50 0.--7. 1. "IPR_N0,IPR_N0"
|
|
tree.end
|
|
endif
|
|
sif (cpuis("STM32L4S5*"))
|
|
tree "NVIC"
|
|
base ad:0xE000E100
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "ISER0,Interrupt Set-Enable Register"
|
|
hexmask.long 0x0 0.--31. 1. "SETENA,SETENA"
|
|
line.long 0x4 "ISER1,Interrupt Set-Enable Register"
|
|
hexmask.long 0x4 0.--31. 1. "SETENA,SETENA"
|
|
line.long 0x8 "ISER2,Interrupt Set-Enable Register"
|
|
hexmask.long 0x8 0.--31. 1. "SETENA,SETENA"
|
|
group.long 0x80++0xB
|
|
line.long 0x0 "ICER0,Interrupt Clear-Enable"
|
|
hexmask.long 0x0 0.--31. 1. "CLRENA,CLRENA"
|
|
line.long 0x4 "ICER1,Interrupt Clear-Enable"
|
|
hexmask.long 0x4 0.--31. 1. "CLRENA,CLRENA"
|
|
line.long 0x8 "ICER2,Interrupt Clear-Enable"
|
|
hexmask.long 0x8 0.--31. 1. "CLRENA,CLRENA"
|
|
group.long 0x100++0xB
|
|
line.long 0x0 "ISPR0,Interrupt Set-Pending Register"
|
|
hexmask.long 0x0 0.--31. 1. "SETPEND,SETPEND"
|
|
line.long 0x4 "ISPR1,Interrupt Set-Pending Register"
|
|
hexmask.long 0x4 0.--31. 1. "SETPEND,SETPEND"
|
|
line.long 0x8 "ISPR2,Interrupt Set-Pending Register"
|
|
hexmask.long 0x8 0.--31. 1. "SETPEND,SETPEND"
|
|
group.long 0x180++0xB
|
|
line.long 0x0 "ICPR0,Interrupt Clear-Pending"
|
|
hexmask.long 0x0 0.--31. 1. "CLRPEND,CLRPEND"
|
|
line.long 0x4 "ICPR1,Interrupt Clear-Pending"
|
|
hexmask.long 0x4 0.--31. 1. "CLRPEND,CLRPEND"
|
|
line.long 0x8 "ICPR2,Interrupt Clear-Pending"
|
|
hexmask.long 0x8 0.--31. 1. "CLRPEND,CLRPEND"
|
|
rgroup.long 0x200++0xB
|
|
line.long 0x0 "IABR0,Interrupt Active Bit Register"
|
|
hexmask.long 0x0 0.--31. 1. "ACTIVE,ACTIVE"
|
|
line.long 0x4 "IABR1,Interrupt Active Bit Register"
|
|
hexmask.long 0x4 0.--31. 1. "ACTIVE,ACTIVE"
|
|
line.long 0x8 "IABR2,Interrupt Active Bit Register"
|
|
hexmask.long 0x8 0.--31. 1. "ACTIVE,ACTIVE"
|
|
group.long 0x300++0x53
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x0 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x0 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x0 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x4 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x4 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x4 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x8 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x8 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x8 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0xC 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0xC 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0xC 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x10 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x10 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x10 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x14 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x14 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x14 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x18 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x18 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x18 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x1C 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x1C 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x1C 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x20 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x20 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x20 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x24 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x24 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x24 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x28 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x28 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x28 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x2C 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x2C 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x2C 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x30 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x30 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x30 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x34 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x34 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x34 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x38 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x38 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x38 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x3C 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x3C 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x3C 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x40 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x40 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x40 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x44 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x44 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x44 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x48 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x48 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x48 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x4C 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x4C 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x4C 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x50 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x50 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x50 0.--7. 1. "IPR_N0,IPR_N0"
|
|
tree.end
|
|
endif
|
|
sif (cpuis("STM32L4S7*"))
|
|
tree "NVIC"
|
|
base ad:0xE000E100
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "ISER0,Interrupt Set-Enable Register"
|
|
hexmask.long 0x0 0.--31. 1. "SETENA,SETENA"
|
|
line.long 0x4 "ISER1,Interrupt Set-Enable Register"
|
|
hexmask.long 0x4 0.--31. 1. "SETENA,SETENA"
|
|
line.long 0x8 "ISER2,Interrupt Set-Enable Register"
|
|
hexmask.long 0x8 0.--31. 1. "SETENA,SETENA"
|
|
group.long 0x80++0xB
|
|
line.long 0x0 "ICER0,Interrupt Clear-Enable"
|
|
hexmask.long 0x0 0.--31. 1. "CLRENA,CLRENA"
|
|
line.long 0x4 "ICER1,Interrupt Clear-Enable"
|
|
hexmask.long 0x4 0.--31. 1. "CLRENA,CLRENA"
|
|
line.long 0x8 "ICER2,Interrupt Clear-Enable"
|
|
hexmask.long 0x8 0.--31. 1. "CLRENA,CLRENA"
|
|
group.long 0x100++0xB
|
|
line.long 0x0 "ISPR0,Interrupt Set-Pending Register"
|
|
hexmask.long 0x0 0.--31. 1. "SETPEND,SETPEND"
|
|
line.long 0x4 "ISPR1,Interrupt Set-Pending Register"
|
|
hexmask.long 0x4 0.--31. 1. "SETPEND,SETPEND"
|
|
line.long 0x8 "ISPR2,Interrupt Set-Pending Register"
|
|
hexmask.long 0x8 0.--31. 1. "SETPEND,SETPEND"
|
|
group.long 0x180++0xB
|
|
line.long 0x0 "ICPR0,Interrupt Clear-Pending"
|
|
hexmask.long 0x0 0.--31. 1. "CLRPEND,CLRPEND"
|
|
line.long 0x4 "ICPR1,Interrupt Clear-Pending"
|
|
hexmask.long 0x4 0.--31. 1. "CLRPEND,CLRPEND"
|
|
line.long 0x8 "ICPR2,Interrupt Clear-Pending"
|
|
hexmask.long 0x8 0.--31. 1. "CLRPEND,CLRPEND"
|
|
rgroup.long 0x200++0xB
|
|
line.long 0x0 "IABR0,Interrupt Active Bit Register"
|
|
hexmask.long 0x0 0.--31. 1. "ACTIVE,ACTIVE"
|
|
line.long 0x4 "IABR1,Interrupt Active Bit Register"
|
|
hexmask.long 0x4 0.--31. 1. "ACTIVE,ACTIVE"
|
|
line.long 0x8 "IABR2,Interrupt Active Bit Register"
|
|
hexmask.long 0x8 0.--31. 1. "ACTIVE,ACTIVE"
|
|
group.long 0x300++0x53
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x0 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x0 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x0 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x4 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x4 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x4 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x8 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x8 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x8 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0xC 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0xC 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0xC 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x10 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x10 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x10 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x14 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x14 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x14 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x18 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x18 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x18 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x1C 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x1C 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x1C 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x20 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x20 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x20 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x24 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x24 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x24 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x28 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x28 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x28 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x2C 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x2C 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x2C 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x30 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x30 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x30 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x34 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x34 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x34 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x38 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x38 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x38 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x3C 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x3C 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x3C 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x40 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x40 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x40 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x44 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x44 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x44 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x48 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x48 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x48 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x4C 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x4C 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x4C 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x50 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x50 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x50 0.--7. 1. "IPR_N0,IPR_N0"
|
|
tree.end
|
|
endif
|
|
sif (cpuis("STM32L4S9*"))
|
|
tree "NVIC"
|
|
base ad:0xE000E100
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "ISER0,Interrupt Set-Enable Register"
|
|
hexmask.long 0x0 0.--31. 1. "SETENA,SETENA"
|
|
line.long 0x4 "ISER1,Interrupt Set-Enable Register"
|
|
hexmask.long 0x4 0.--31. 1. "SETENA,SETENA"
|
|
line.long 0x8 "ISER2,Interrupt Set-Enable Register"
|
|
hexmask.long 0x8 0.--31. 1. "SETENA,SETENA"
|
|
group.long 0x80++0xB
|
|
line.long 0x0 "ICER0,Interrupt Clear-Enable"
|
|
hexmask.long 0x0 0.--31. 1. "CLRENA,CLRENA"
|
|
line.long 0x4 "ICER1,Interrupt Clear-Enable"
|
|
hexmask.long 0x4 0.--31. 1. "CLRENA,CLRENA"
|
|
line.long 0x8 "ICER2,Interrupt Clear-Enable"
|
|
hexmask.long 0x8 0.--31. 1. "CLRENA,CLRENA"
|
|
group.long 0x100++0xB
|
|
line.long 0x0 "ISPR0,Interrupt Set-Pending Register"
|
|
hexmask.long 0x0 0.--31. 1. "SETPEND,SETPEND"
|
|
line.long 0x4 "ISPR1,Interrupt Set-Pending Register"
|
|
hexmask.long 0x4 0.--31. 1. "SETPEND,SETPEND"
|
|
line.long 0x8 "ISPR2,Interrupt Set-Pending Register"
|
|
hexmask.long 0x8 0.--31. 1. "SETPEND,SETPEND"
|
|
group.long 0x180++0xB
|
|
line.long 0x0 "ICPR0,Interrupt Clear-Pending"
|
|
hexmask.long 0x0 0.--31. 1. "CLRPEND,CLRPEND"
|
|
line.long 0x4 "ICPR1,Interrupt Clear-Pending"
|
|
hexmask.long 0x4 0.--31. 1. "CLRPEND,CLRPEND"
|
|
line.long 0x8 "ICPR2,Interrupt Clear-Pending"
|
|
hexmask.long 0x8 0.--31. 1. "CLRPEND,CLRPEND"
|
|
rgroup.long 0x200++0xB
|
|
line.long 0x0 "IABR0,Interrupt Active Bit Register"
|
|
hexmask.long 0x0 0.--31. 1. "ACTIVE,ACTIVE"
|
|
line.long 0x4 "IABR1,Interrupt Active Bit Register"
|
|
hexmask.long 0x4 0.--31. 1. "ACTIVE,ACTIVE"
|
|
line.long 0x8 "IABR2,Interrupt Active Bit Register"
|
|
hexmask.long 0x8 0.--31. 1. "ACTIVE,ACTIVE"
|
|
group.long 0x300++0x53
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x0 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x0 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x0 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x4 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x4 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x4 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x8 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x8 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x8 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0xC 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0xC 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0xC 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x10 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x10 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x10 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x14 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x14 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x14 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x18 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x18 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x18 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x1C 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x1C 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x1C 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x20 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x20 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x20 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x24 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x24 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x24 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x28 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x28 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x28 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x2C 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x2C 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x2C 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x30 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x30 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x30 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x34 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x34 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x34 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x38 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x38 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x38 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x3C 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x3C 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x3C 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x40 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x40 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x40 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x44 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x44 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x44 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x48 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x48 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x48 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x4C 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x4C 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x4C 0.--7. 1. "IPR_N0,IPR_N0"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. "IPR_N3,IPR_N3"
|
|
hexmask.long.byte 0x50 16.--23. 1. "IPR_N2,IPR_N2"
|
|
hexmask.long.byte 0x50 8.--15. 1. "IPR_N1,IPR_N1"
|
|
hexmask.long.byte 0x50 0.--7. 1. "IPR_N0,IPR_N0"
|
|
tree.end
|
|
endif
|
|
tree "NVIC_STIR"
|
|
base ad:0xE000EF00
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "STIR,Software trigger interrupt"
|
|
hexmask.long.word 0x0 0.--8. 1. "INTID,Software generated interrupt"
|
|
tree.end
|
|
tree.end
|
|
tree "OCTOSPI (Octo-SPI Interface)"
|
|
base ad:0x0
|
|
sif (cpuis("STM32L4P5*")||cpuis("STM32L4Q5*")||cpuis("STM32L4R5*"))
|
|
tree "OCTOSPI1"
|
|
base ad:0xA0001000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CR,control register"
|
|
bitfld.long 0x0 28.--29. "FMODE,Functional mode" "0,1,2,3"
|
|
bitfld.long 0x0 23. "PMM,Polling match mode" "0,1"
|
|
bitfld.long 0x0 22. "APMS,Automatic poll mode stop" "0,1"
|
|
bitfld.long 0x0 20. "TOIE,TimeOut interrupt enable" "0,1"
|
|
bitfld.long 0x0 19. "SMIE,Status match interrupt" "0,1"
|
|
bitfld.long 0x0 18. "FTIE,FIFO threshold interrupt" "0,1"
|
|
bitfld.long 0x0 17. "TCIE,Transfer complete interrupt" "0,1"
|
|
bitfld.long 0x0 16. "TEIE,Transfer error interrupt" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--12. 1. "FTHRES,IFO threshold level"
|
|
bitfld.long 0x0 7. "FSEL,FLASH memory selection" "0,1"
|
|
bitfld.long 0x0 6. "DQM,Dual-quad mode" "0,1"
|
|
bitfld.long 0x0 3. "TCEN,Timeout counter enable" "0,1"
|
|
bitfld.long 0x0 2. "DMAEN,DMA enable" "0,1"
|
|
bitfld.long 0x0 1. "ABORT,Abort request" "0,1"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x8++0xB
|
|
line.long 0x0 "DCR1,device configuration register"
|
|
sif (cpuis("STM32L4P5*")||cpuis("STM32L4Q5*"))
|
|
bitfld.long 0x0 24.--25. "MTYP,Memory type" "0,1,2,3"
|
|
bitfld.long 0x0 8.--10. "CSHT,Chip-select high time" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
sif (cpuis("STM32L4R5*"))
|
|
bitfld.long 0x0 24.--26. "MTYP,Memory type" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
hexmask.long.byte 0x0 16.--20. 1. "DEVSIZE,Device size"
|
|
sif (cpuis("STM32L4R5*"))
|
|
hexmask.long.byte 0x0 8.--13. 1. "CSHT,Chip-select high time"
|
|
endif
|
|
sif (cpuis("STM32L4R5*"))
|
|
bitfld.long 0x0 3. "DLYBYP,Delay block bypass" "0,1"
|
|
endif
|
|
bitfld.long 0x0 1. "FRCK,Free running clock" "0,1"
|
|
bitfld.long 0x0 0. "CKMODE,Mode 0 / mode 3" "0,1"
|
|
line.long 0x4 "DCR2,device configuration register"
|
|
sif (cpuis("STM32L4P5*")||cpuis("STM32L4Q5*"))
|
|
bitfld.long 0x4 16.--18. "WRAPSIZE,Wrap size" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
hexmask.long.byte 0x4 0.--7. 1. "PRESCALER,Clock prescaler"
|
|
line.long 0x8 "DCR3,device configuration register"
|
|
hexmask.long.byte 0x8 16.--20. 1. "CSBOUND,CS boundary"
|
|
sif (cpuis("STM32L4R5*"))
|
|
hexmask.long.byte 0x8 0.--7. 1. "MAXTRAN,Maximum transfer"
|
|
endif
|
|
sif (cpuis("STM32L4R5*"))
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "DCR4,device configuration register 4"
|
|
hexmask.long 0x0 0.--31. 1. "REFRESH,Refresh rate"
|
|
endif
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "SR,status register"
|
|
hexmask.long.byte 0x0 8.--13. 1. "FLEVEL,FIFO level"
|
|
bitfld.long 0x0 5. "BUSY,BUSY" "0,1"
|
|
bitfld.long 0x0 4. "TOF,Timeout flag" "0,1"
|
|
bitfld.long 0x0 3. "SMF,Status match flag" "0,1"
|
|
bitfld.long 0x0 2. "FTF,FIFO threshold flag" "0,1"
|
|
bitfld.long 0x0 1. "TCF,Transfer complete flag" "0,1"
|
|
bitfld.long 0x0 0. "TEF,Transfer error flag" "0,1"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x0 "FCR,flag clear register"
|
|
bitfld.long 0x0 4. "CTOF,Clear timeout flag" "0,1"
|
|
bitfld.long 0x0 3. "CSMF,Clear status match flag" "0,1"
|
|
bitfld.long 0x0 1. "CTCF,Clear transfer complete" "0,1"
|
|
bitfld.long 0x0 0. "CTEF,Clear transfer error flag" "0,1"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "DLR,data length register"
|
|
hexmask.long 0x0 0.--31. 1. "DL,Data length"
|
|
group.long 0x48++0x3
|
|
line.long 0x0 "AR,address register"
|
|
hexmask.long 0x0 0.--31. 1. "ADDRESS,ADDRESS"
|
|
group.long 0x50++0x3
|
|
line.long 0x0 "DR,data register"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Data"
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "PSMKR,polling status mask register"
|
|
hexmask.long 0x0 0.--31. 1. "MASK,Status mask"
|
|
group.long 0x88++0x3
|
|
line.long 0x0 "PSMAR,polling status match register"
|
|
hexmask.long 0x0 0.--31. 1. "MATCH,Status match"
|
|
group.long 0x90++0x3
|
|
line.long 0x0 "PIR,polling interval register"
|
|
hexmask.long.word 0x0 0.--15. 1. "INTERVAL,Polling interval"
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "CCR,communication configuration"
|
|
bitfld.long 0x0 31. "SIOO,Send instruction only once" "0,1"
|
|
bitfld.long 0x0 29. "DQSE,DQS enable" "0,1"
|
|
bitfld.long 0x0 27. "DDTR,Alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 24.--26. "DMODE,Data mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 20.--21. "ABSIZE,Alternate bytes size" "0,1,2,3"
|
|
bitfld.long 0x0 19. "ABDTR,Alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 16.--18. "ABMODE,Alternate byte mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 12.--13. "ADSIZE,Address size" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 11. "ADDTR,Address double transfer" "0,1"
|
|
bitfld.long 0x0 8.--10. "ADMODE,Address mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 4.--5. "ISIZE,Instruction size" "0,1,2,3"
|
|
bitfld.long 0x0 3. "IDTR,Instruction double transfer" "0,1"
|
|
bitfld.long 0x0 0.--2. "IMODE,Instruction mode" "0,1,2,3,4,5,6,7"
|
|
group.long 0x108++0x3
|
|
line.long 0x0 "TCR,timing configuration register"
|
|
bitfld.long 0x0 30. "SSHIFT,Sample shift" "0,1"
|
|
bitfld.long 0x0 28. "DHQC,Delay hold quarter cycle" "0,1"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DCYC,Number of dummy cycles"
|
|
group.long 0x110++0x3
|
|
line.long 0x0 "IR,instruction register"
|
|
hexmask.long 0x0 0.--31. 1. "INSTRUCTION,INSTRUCTION"
|
|
group.long 0x120++0x3
|
|
line.long 0x0 "ABR,alternate bytes register"
|
|
hexmask.long 0x0 0.--31. 1. "ALTERNATE,Alternate bytes"
|
|
group.long 0x130++0x3
|
|
line.long 0x0 "LPTR,low-power timeout register"
|
|
hexmask.long.word 0x0 0.--15. 1. "TIMEOUT,Timeout period"
|
|
group.long 0x180++0x3
|
|
line.long 0x0 "WCCR,write communication configuration"
|
|
sif (cpuis("STM32L4P5*")||cpuis("STM32L4Q5*"))
|
|
bitfld.long 0x0 31. "SIOO,Send instruction only once" "0,1"
|
|
endif
|
|
bitfld.long 0x0 29. "DQSE,DQS enable" "0,1"
|
|
bitfld.long 0x0 27. "DDTR,alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 24.--26. "DMODE,Data mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 20.--21. "ABSIZE,Alternate bytes size" "0,1,2,3"
|
|
bitfld.long 0x0 19. "ABDTR,Alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 16.--18. "ABMODE,Alternate byte mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 12.--13. "ADSIZE,Address size" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 11. "ADDTR,Address double transfer" "0,1"
|
|
bitfld.long 0x0 8.--10. "ADMODE,Address mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 4.--5. "ISIZE,Instruction size" "0,1,2,3"
|
|
bitfld.long 0x0 3. "IDTR,Instruction double transfer" "0,1"
|
|
bitfld.long 0x0 0.--2. "IMODE,Instruction mode" "0,1,2,3,4,5,6,7"
|
|
group.long 0x188++0x3
|
|
line.long 0x0 "WTCR,write timing configuration"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DCYC,Number of dummy cycles"
|
|
group.long 0x190++0x3
|
|
line.long 0x0 "WIR,write instruction register"
|
|
hexmask.long 0x0 0.--31. 1. "INSTRUCTION,INSTRUCTION"
|
|
group.long 0x1A0++0x3
|
|
line.long 0x0 "WABR,write alternate bytes register"
|
|
hexmask.long 0x0 0.--31. 1. "ALTERNATE,Alternate bytes"
|
|
group.long 0x200++0x3
|
|
line.long 0x0 "HLCR,HyperBusTM latency configuration"
|
|
hexmask.long.byte 0x0 16.--23. 1. "TRWR,Read write recovery time"
|
|
hexmask.long.byte 0x0 8.--15. 1. "TACC,Access time"
|
|
bitfld.long 0x0 1. "WZL,Write zero latency" "0,1"
|
|
bitfld.long 0x0 0. "LM,Latency mode" "0,1"
|
|
sif (cpuis("STM32L4P5*")||cpuis("STM32L4Q5*"))
|
|
rgroup.long 0x3F0++0xF
|
|
line.long 0x0 "HWCFGR,HW configuration register"
|
|
hexmask.long.byte 0x0 28.--31. 1. "MST,Master"
|
|
hexmask.long.byte 0x0 24.--27. 1. "MMW,Memory map write"
|
|
newline
|
|
hexmask.long.byte 0x0 20.--23. 1. "IDL,ID Length"
|
|
hexmask.long.byte 0x0 12.--19. 1. "PRES,Prescaler"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--11. 1. "FIFO,FIFO depth"
|
|
hexmask.long.byte 0x0 0.--3. 1. "AXI,AXI interface"
|
|
line.long 0x4 "VER,version register"
|
|
hexmask.long.byte 0x4 0.--7. 1. "VER,Version"
|
|
line.long 0x8 "ID,identification"
|
|
hexmask.long 0x8 0.--31. 1. "ID,Identification"
|
|
line.long 0xC "MID,magic ID"
|
|
hexmask.long 0xC 0.--31. 1. "MID,Magic ID"
|
|
endif
|
|
sif (cpuis("STM32L4R5*"))
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x0 "SR,status register"
|
|
hexmask.long.byte 0x0 8.--13. 1. "FLEVEL,FIFO level"
|
|
bitfld.long 0x0 5. "BUSY,BUSY" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "TOF,Timeout flag" "0,1"
|
|
bitfld.long 0x0 3. "SMF,Status match flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "FTF,FIFO threshold flag" "0,1"
|
|
bitfld.long 0x0 1. "TCF,Transfer complete flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "TEF,Transfer error flag" "0,1"
|
|
endif
|
|
tree.end
|
|
endif
|
|
sif (cpuis("STM32L4P5*")||cpuis("STM32L4Q5*")||cpuis("STM32L4R5*"))
|
|
tree "OCTOSPI2"
|
|
base ad:0xA0001400
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CR,control register"
|
|
bitfld.long 0x0 28.--29. "FMODE,Functional mode" "0,1,2,3"
|
|
bitfld.long 0x0 23. "PMM,Polling match mode" "0,1"
|
|
bitfld.long 0x0 22. "APMS,Automatic poll mode stop" "0,1"
|
|
bitfld.long 0x0 20. "TOIE,TimeOut interrupt enable" "0,1"
|
|
bitfld.long 0x0 19. "SMIE,Status match interrupt" "0,1"
|
|
bitfld.long 0x0 18. "FTIE,FIFO threshold interrupt" "0,1"
|
|
bitfld.long 0x0 17. "TCIE,Transfer complete interrupt" "0,1"
|
|
bitfld.long 0x0 16. "TEIE,Transfer error interrupt" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--12. 1. "FTHRES,IFO threshold level"
|
|
bitfld.long 0x0 7. "FSEL,FLASH memory selection" "0,1"
|
|
bitfld.long 0x0 6. "DQM,Dual-quad mode" "0,1"
|
|
bitfld.long 0x0 3. "TCEN,Timeout counter enable" "0,1"
|
|
bitfld.long 0x0 2. "DMAEN,DMA enable" "0,1"
|
|
bitfld.long 0x0 1. "ABORT,Abort request" "0,1"
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x8++0xB
|
|
line.long 0x0 "DCR1,device configuration register"
|
|
sif (cpuis("STM32L4P5*")||cpuis("STM32L4Q5*"))
|
|
bitfld.long 0x0 24.--25. "MTYP,Memory type" "0,1,2,3"
|
|
bitfld.long 0x0 8.--10. "CSHT,Chip-select high time" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
sif (cpuis("STM32L4R5*"))
|
|
bitfld.long 0x0 24.--26. "MTYP,Memory type" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
hexmask.long.byte 0x0 16.--20. 1. "DEVSIZE,Device size"
|
|
sif (cpuis("STM32L4R5*"))
|
|
hexmask.long.byte 0x0 8.--13. 1. "CSHT,Chip-select high time"
|
|
endif
|
|
sif (cpuis("STM32L4R5*"))
|
|
bitfld.long 0x0 3. "DLYBYP,Delay block bypass" "0,1"
|
|
endif
|
|
bitfld.long 0x0 1. "FRCK,Free running clock" "0,1"
|
|
bitfld.long 0x0 0. "CKMODE,Mode 0 / mode 3" "0,1"
|
|
line.long 0x4 "DCR2,device configuration register"
|
|
sif (cpuis("STM32L4P5*")||cpuis("STM32L4Q5*"))
|
|
bitfld.long 0x4 16.--18. "WRAPSIZE,Wrap size" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
hexmask.long.byte 0x4 0.--7. 1. "PRESCALER,Clock prescaler"
|
|
line.long 0x8 "DCR3,device configuration register"
|
|
hexmask.long.byte 0x8 16.--20. 1. "CSBOUND,CS boundary"
|
|
sif (cpuis("STM32L4R5*"))
|
|
hexmask.long.byte 0x8 0.--7. 1. "MAXTRAN,Maximum transfer"
|
|
endif
|
|
sif (cpuis("STM32L4R5*"))
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "DCR4,device configuration register 4"
|
|
hexmask.long 0x0 0.--31. 1. "REFRESH,Refresh rate"
|
|
endif
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "SR,status register"
|
|
hexmask.long.byte 0x0 8.--13. 1. "FLEVEL,FIFO level"
|
|
bitfld.long 0x0 5. "BUSY,BUSY" "0,1"
|
|
bitfld.long 0x0 4. "TOF,Timeout flag" "0,1"
|
|
bitfld.long 0x0 3. "SMF,Status match flag" "0,1"
|
|
bitfld.long 0x0 2. "FTF,FIFO threshold flag" "0,1"
|
|
bitfld.long 0x0 1. "TCF,Transfer complete flag" "0,1"
|
|
bitfld.long 0x0 0. "TEF,Transfer error flag" "0,1"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x0 "FCR,flag clear register"
|
|
bitfld.long 0x0 4. "CTOF,Clear timeout flag" "0,1"
|
|
bitfld.long 0x0 3. "CSMF,Clear status match flag" "0,1"
|
|
bitfld.long 0x0 1. "CTCF,Clear transfer complete" "0,1"
|
|
bitfld.long 0x0 0. "CTEF,Clear transfer error flag" "0,1"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "DLR,data length register"
|
|
hexmask.long 0x0 0.--31. 1. "DL,Data length"
|
|
group.long 0x48++0x3
|
|
line.long 0x0 "AR,address register"
|
|
hexmask.long 0x0 0.--31. 1. "ADDRESS,ADDRESS"
|
|
group.long 0x50++0x3
|
|
line.long 0x0 "DR,data register"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Data"
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "PSMKR,polling status mask register"
|
|
hexmask.long 0x0 0.--31. 1. "MASK,Status mask"
|
|
group.long 0x88++0x3
|
|
line.long 0x0 "PSMAR,polling status match register"
|
|
hexmask.long 0x0 0.--31. 1. "MATCH,Status match"
|
|
group.long 0x90++0x3
|
|
line.long 0x0 "PIR,polling interval register"
|
|
hexmask.long.word 0x0 0.--15. 1. "INTERVAL,Polling interval"
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "CCR,communication configuration"
|
|
bitfld.long 0x0 31. "SIOO,Send instruction only once" "0,1"
|
|
bitfld.long 0x0 29. "DQSE,DQS enable" "0,1"
|
|
bitfld.long 0x0 27. "DDTR,Alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 24.--26. "DMODE,Data mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 20.--21. "ABSIZE,Alternate bytes size" "0,1,2,3"
|
|
bitfld.long 0x0 19. "ABDTR,Alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 16.--18. "ABMODE,Alternate byte mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 12.--13. "ADSIZE,Address size" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 11. "ADDTR,Address double transfer" "0,1"
|
|
bitfld.long 0x0 8.--10. "ADMODE,Address mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 4.--5. "ISIZE,Instruction size" "0,1,2,3"
|
|
bitfld.long 0x0 3. "IDTR,Instruction double transfer" "0,1"
|
|
bitfld.long 0x0 0.--2. "IMODE,Instruction mode" "0,1,2,3,4,5,6,7"
|
|
group.long 0x108++0x3
|
|
line.long 0x0 "TCR,timing configuration register"
|
|
bitfld.long 0x0 30. "SSHIFT,Sample shift" "0,1"
|
|
bitfld.long 0x0 28. "DHQC,Delay hold quarter cycle" "0,1"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DCYC,Number of dummy cycles"
|
|
group.long 0x110++0x3
|
|
line.long 0x0 "IR,instruction register"
|
|
hexmask.long 0x0 0.--31. 1. "INSTRUCTION,INSTRUCTION"
|
|
group.long 0x120++0x3
|
|
line.long 0x0 "ABR,alternate bytes register"
|
|
hexmask.long 0x0 0.--31. 1. "ALTERNATE,Alternate bytes"
|
|
group.long 0x130++0x3
|
|
line.long 0x0 "LPTR,low-power timeout register"
|
|
hexmask.long.word 0x0 0.--15. 1. "TIMEOUT,Timeout period"
|
|
group.long 0x180++0x3
|
|
line.long 0x0 "WCCR,write communication configuration"
|
|
sif (cpuis("STM32L4P5*")||cpuis("STM32L4Q5*"))
|
|
bitfld.long 0x0 31. "SIOO,Send instruction only once" "0,1"
|
|
endif
|
|
bitfld.long 0x0 29. "DQSE,DQS enable" "0,1"
|
|
bitfld.long 0x0 27. "DDTR,alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 24.--26. "DMODE,Data mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 20.--21. "ABSIZE,Alternate bytes size" "0,1,2,3"
|
|
bitfld.long 0x0 19. "ABDTR,Alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 16.--18. "ABMODE,Alternate byte mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 12.--13. "ADSIZE,Address size" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 11. "ADDTR,Address double transfer" "0,1"
|
|
bitfld.long 0x0 8.--10. "ADMODE,Address mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 4.--5. "ISIZE,Instruction size" "0,1,2,3"
|
|
bitfld.long 0x0 3. "IDTR,Instruction double transfer" "0,1"
|
|
bitfld.long 0x0 0.--2. "IMODE,Instruction mode" "0,1,2,3,4,5,6,7"
|
|
group.long 0x188++0x3
|
|
line.long 0x0 "WTCR,write timing configuration"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DCYC,Number of dummy cycles"
|
|
group.long 0x190++0x3
|
|
line.long 0x0 "WIR,write instruction register"
|
|
hexmask.long 0x0 0.--31. 1. "INSTRUCTION,INSTRUCTION"
|
|
group.long 0x1A0++0x3
|
|
line.long 0x0 "WABR,write alternate bytes register"
|
|
hexmask.long 0x0 0.--31. 1. "ALTERNATE,Alternate bytes"
|
|
group.long 0x200++0x3
|
|
line.long 0x0 "HLCR,HyperBusTM latency configuration"
|
|
hexmask.long.byte 0x0 16.--23. 1. "TRWR,Read write recovery time"
|
|
hexmask.long.byte 0x0 8.--15. 1. "TACC,Access time"
|
|
bitfld.long 0x0 1. "WZL,Write zero latency" "0,1"
|
|
bitfld.long 0x0 0. "LM,Latency mode" "0,1"
|
|
sif (cpuis("STM32L4P5*")||cpuis("STM32L4Q5*"))
|
|
rgroup.long 0x3F0++0xF
|
|
line.long 0x0 "HWCFGR,HW configuration register"
|
|
hexmask.long.byte 0x0 28.--31. 1. "MST,Master"
|
|
hexmask.long.byte 0x0 24.--27. 1. "MMW,Memory map write"
|
|
newline
|
|
hexmask.long.byte 0x0 20.--23. 1. "IDL,ID Length"
|
|
hexmask.long.byte 0x0 12.--19. 1. "PRES,Prescaler"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--11. 1. "FIFO,FIFO depth"
|
|
hexmask.long.byte 0x0 0.--3. 1. "AXI,AXI interface"
|
|
line.long 0x4 "VER,version register"
|
|
hexmask.long.byte 0x4 0.--7. 1. "VER,Version"
|
|
line.long 0x8 "ID,identification"
|
|
hexmask.long 0x8 0.--31. 1. "ID,Identification"
|
|
line.long 0xC "MID,magic ID"
|
|
hexmask.long 0xC 0.--31. 1. "MID,Magic ID"
|
|
endif
|
|
sif (cpuis("STM32L4R5*"))
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x0 "SR,status register"
|
|
hexmask.long.byte 0x0 8.--13. 1. "FLEVEL,FIFO level"
|
|
bitfld.long 0x0 5. "BUSY,BUSY" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "TOF,Timeout flag" "0,1"
|
|
bitfld.long 0x0 3. "SMF,Status match flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "FTF,FIFO threshold flag" "0,1"
|
|
bitfld.long 0x0 1. "TCF,Transfer complete flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "TEF,Transfer error flag" "0,1"
|
|
endif
|
|
tree.end
|
|
endif
|
|
sif (cpuis("STM32L4R7*"))
|
|
tree "OCTOSPI1"
|
|
base ad:0xA0001000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CR,control register"
|
|
bitfld.long 0x0 28.--29. "FMODE,Functional mode" "0,1,2,3"
|
|
bitfld.long 0x0 23. "PMM,Polling match mode" "0,1"
|
|
bitfld.long 0x0 22. "APMS,Automatic poll mode stop" "0,1"
|
|
bitfld.long 0x0 20. "TOIE,TimeOut interrupt enable" "0,1"
|
|
bitfld.long 0x0 19. "SMIE,Status match interrupt" "0,1"
|
|
bitfld.long 0x0 18. "FTIE,FIFO threshold interrupt" "0,1"
|
|
bitfld.long 0x0 17. "TCIE,Transfer complete interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "TEIE,Transfer error interrupt" "0,1"
|
|
hexmask.long.byte 0x0 8.--12. 1. "FTHRES,IFO threshold level"
|
|
bitfld.long 0x0 7. "FSEL,FLASH memory selection" "0,1"
|
|
bitfld.long 0x0 6. "DQM,Dual-quad mode" "0,1"
|
|
bitfld.long 0x0 3. "TCEN,Timeout counter enable" "0,1"
|
|
bitfld.long 0x0 2. "DMAEN,DMA enable" "0,1"
|
|
bitfld.long 0x0 1. "ABORT,Abort request" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x8++0xB
|
|
line.long 0x0 "DCR1,device configuration register"
|
|
bitfld.long 0x0 24.--25. "MTYP,Memory type" "0,1,2,3"
|
|
hexmask.long.byte 0x0 16.--20. 1. "DEVSIZE,Device size"
|
|
bitfld.long 0x0 8.--10. "CSHT,Chip-select high time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 1. "FRCK,Free running clock" "0,1"
|
|
bitfld.long 0x0 0. "CKMODE,Mode 0 / mode 3" "0,1"
|
|
line.long 0x4 "DCR2,device configuration register"
|
|
bitfld.long 0x4 16.--18. "WRAPSIZE,Wrap size" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x4 0.--7. 1. "PRESCALER,Clock prescaler"
|
|
line.long 0x8 "DCR3,device configuration register"
|
|
hexmask.long.byte 0x8 16.--20. 1. "CSBOUND,CS boundary"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "SR,status register"
|
|
hexmask.long.byte 0x0 8.--13. 1. "FLEVEL,FIFO level"
|
|
bitfld.long 0x0 5. "BUSY,BUSY" "0,1"
|
|
bitfld.long 0x0 4. "TOF,Timeout flag" "0,1"
|
|
bitfld.long 0x0 3. "SMF,Status match flag" "0,1"
|
|
bitfld.long 0x0 2. "FTF,FIFO threshold flag" "0,1"
|
|
bitfld.long 0x0 1. "TCF,Transfer complete flag" "0,1"
|
|
bitfld.long 0x0 0. "TEF,Transfer error flag" "0,1"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x0 "FCR,flag clear register"
|
|
bitfld.long 0x0 4. "CTOF,Clear timeout flag" "0,1"
|
|
bitfld.long 0x0 3. "CSMF,Clear status match flag" "0,1"
|
|
bitfld.long 0x0 1. "CTCF,Clear transfer complete" "0,1"
|
|
bitfld.long 0x0 0. "CTEF,Clear transfer error flag" "0,1"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "DLR,data length register"
|
|
hexmask.long 0x0 0.--31. 1. "DL,Data length"
|
|
group.long 0x48++0x3
|
|
line.long 0x0 "AR,address register"
|
|
hexmask.long 0x0 0.--31. 1. "ADDRESS,ADDRESS"
|
|
group.long 0x50++0x3
|
|
line.long 0x0 "DR,data register"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Data"
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "PSMKR,polling status mask register"
|
|
hexmask.long 0x0 0.--31. 1. "MASK,Status mask"
|
|
group.long 0x88++0x3
|
|
line.long 0x0 "PSMAR,polling status match register"
|
|
hexmask.long 0x0 0.--31. 1. "MATCH,Status match"
|
|
group.long 0x90++0x3
|
|
line.long 0x0 "PIR,polling interval register"
|
|
hexmask.long.word 0x0 0.--15. 1. "INTERVAL,Polling interval"
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "CCR,communication configuration"
|
|
bitfld.long 0x0 31. "SIOO,Send instruction only once" "0,1"
|
|
bitfld.long 0x0 29. "DQSE,DQS enable" "0,1"
|
|
bitfld.long 0x0 27. "DDTR,Alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 24.--26. "DMODE,Data mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 20.--21. "ABSIZE,Alternate bytes size" "0,1,2,3"
|
|
bitfld.long 0x0 19. "ABDTR,Alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 16.--18. "ABMODE,Alternate byte mode" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "ADSIZE,Address size" "0,1,2,3"
|
|
bitfld.long 0x0 11. "ADDTR,Address double transfer" "0,1"
|
|
bitfld.long 0x0 8.--10. "ADMODE,Address mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 4.--5. "ISIZE,Instruction size" "0,1,2,3"
|
|
bitfld.long 0x0 3. "IDTR,Instruction double transfer" "0,1"
|
|
bitfld.long 0x0 0.--2. "IMODE,Instruction mode" "0,1,2,3,4,5,6,7"
|
|
group.long 0x108++0x3
|
|
line.long 0x0 "TCR,timing configuration register"
|
|
bitfld.long 0x0 30. "SSHIFT,Sample shift" "0,1"
|
|
bitfld.long 0x0 28. "DHQC,Delay hold quarter cycle" "0,1"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DCYC,Number of dummy cycles"
|
|
group.long 0x110++0x3
|
|
line.long 0x0 "IR,instruction register"
|
|
hexmask.long 0x0 0.--31. 1. "INSTRUCTION,INSTRUCTION"
|
|
group.long 0x120++0x3
|
|
line.long 0x0 "ABR,alternate bytes register"
|
|
hexmask.long 0x0 0.--31. 1. "ALTERNATE,Alternate bytes"
|
|
group.long 0x130++0x3
|
|
line.long 0x0 "LPTR,low-power timeout register"
|
|
hexmask.long.word 0x0 0.--15. 1. "TIMEOUT,Timeout period"
|
|
group.long 0x180++0x3
|
|
line.long 0x0 "WCCR,write communication configuration"
|
|
bitfld.long 0x0 31. "SIOO,Send instruction only once" "0,1"
|
|
bitfld.long 0x0 29. "DQSE,DQS enable" "0,1"
|
|
bitfld.long 0x0 27. "DDTR,alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 24.--26. "DMODE,Data mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 20.--21. "ABSIZE,Alternate bytes size" "0,1,2,3"
|
|
bitfld.long 0x0 19. "ABDTR,Alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 16.--18. "ABMODE,Alternate byte mode" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "ADSIZE,Address size" "0,1,2,3"
|
|
bitfld.long 0x0 11. "ADDTR,Address double transfer" "0,1"
|
|
bitfld.long 0x0 8.--10. "ADMODE,Address mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 4.--5. "ISIZE,Instruction size" "0,1,2,3"
|
|
bitfld.long 0x0 3. "IDTR,Instruction double transfer" "0,1"
|
|
bitfld.long 0x0 0.--2. "IMODE,Instruction mode" "0,1,2,3,4,5,6,7"
|
|
group.long 0x188++0x3
|
|
line.long 0x0 "WTCR,write timing configuration"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DCYC,Number of dummy cycles"
|
|
group.long 0x190++0x3
|
|
line.long 0x0 "WIR,write instruction register"
|
|
hexmask.long 0x0 0.--31. 1. "INSTRUCTION,INSTRUCTION"
|
|
group.long 0x1A0++0x3
|
|
line.long 0x0 "WABR,write alternate bytes register"
|
|
hexmask.long 0x0 0.--31. 1. "ALTERNATE,Alternate bytes"
|
|
group.long 0x200++0x3
|
|
line.long 0x0 "HLCR,HyperBusTM latency configuration"
|
|
hexmask.long.byte 0x0 16.--23. 1. "TRWR,Read write recovery time"
|
|
hexmask.long.byte 0x0 8.--15. 1. "TACC,Access time"
|
|
bitfld.long 0x0 1. "WZL,Write zero latency" "0,1"
|
|
bitfld.long 0x0 0. "LM,Latency mode" "0,1"
|
|
rgroup.long 0x3F0++0xF
|
|
line.long 0x0 "HWCFGR,HW configuration register"
|
|
hexmask.long.byte 0x0 28.--31. 1. "MST,Master"
|
|
hexmask.long.byte 0x0 24.--27. 1. "MMW,Memory map write"
|
|
hexmask.long.byte 0x0 20.--23. 1. "IDL,ID Length"
|
|
hexmask.long.byte 0x0 12.--19. 1. "PRES,Prescaler"
|
|
hexmask.long.byte 0x0 4.--11. 1. "FIFO,FIFO depth"
|
|
hexmask.long.byte 0x0 0.--3. 1. "AXI,AXI interface"
|
|
line.long 0x4 "VER,version register"
|
|
hexmask.long.byte 0x4 0.--7. 1. "VER,Version"
|
|
line.long 0x8 "ID,identification"
|
|
hexmask.long 0x8 0.--31. 1. "ID,Identification"
|
|
line.long 0xC "MID,magic ID"
|
|
hexmask.long 0xC 0.--31. 1. "MID,Magic ID"
|
|
tree.end
|
|
tree "OCTOSPI2"
|
|
base ad:0xA0001400
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CR,control register"
|
|
bitfld.long 0x0 28.--29. "FMODE,Functional mode" "0,1,2,3"
|
|
bitfld.long 0x0 23. "PMM,Polling match mode" "0,1"
|
|
bitfld.long 0x0 22. "APMS,Automatic poll mode stop" "0,1"
|
|
bitfld.long 0x0 20. "TOIE,TimeOut interrupt enable" "0,1"
|
|
bitfld.long 0x0 19. "SMIE,Status match interrupt" "0,1"
|
|
bitfld.long 0x0 18. "FTIE,FIFO threshold interrupt" "0,1"
|
|
bitfld.long 0x0 17. "TCIE,Transfer complete interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "TEIE,Transfer error interrupt" "0,1"
|
|
hexmask.long.byte 0x0 8.--12. 1. "FTHRES,IFO threshold level"
|
|
bitfld.long 0x0 7. "FSEL,FLASH memory selection" "0,1"
|
|
bitfld.long 0x0 6. "DQM,Dual-quad mode" "0,1"
|
|
bitfld.long 0x0 3. "TCEN,Timeout counter enable" "0,1"
|
|
bitfld.long 0x0 2. "DMAEN,DMA enable" "0,1"
|
|
bitfld.long 0x0 1. "ABORT,Abort request" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x8++0xB
|
|
line.long 0x0 "DCR1,device configuration register"
|
|
bitfld.long 0x0 24.--25. "MTYP,Memory type" "0,1,2,3"
|
|
hexmask.long.byte 0x0 16.--20. 1. "DEVSIZE,Device size"
|
|
bitfld.long 0x0 8.--10. "CSHT,Chip-select high time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 1. "FRCK,Free running clock" "0,1"
|
|
bitfld.long 0x0 0. "CKMODE,Mode 0 / mode 3" "0,1"
|
|
line.long 0x4 "DCR2,device configuration register"
|
|
bitfld.long 0x4 16.--18. "WRAPSIZE,Wrap size" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x4 0.--7. 1. "PRESCALER,Clock prescaler"
|
|
line.long 0x8 "DCR3,device configuration register"
|
|
hexmask.long.byte 0x8 16.--20. 1. "CSBOUND,CS boundary"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "SR,status register"
|
|
hexmask.long.byte 0x0 8.--13. 1. "FLEVEL,FIFO level"
|
|
bitfld.long 0x0 5. "BUSY,BUSY" "0,1"
|
|
bitfld.long 0x0 4. "TOF,Timeout flag" "0,1"
|
|
bitfld.long 0x0 3. "SMF,Status match flag" "0,1"
|
|
bitfld.long 0x0 2. "FTF,FIFO threshold flag" "0,1"
|
|
bitfld.long 0x0 1. "TCF,Transfer complete flag" "0,1"
|
|
bitfld.long 0x0 0. "TEF,Transfer error flag" "0,1"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x0 "FCR,flag clear register"
|
|
bitfld.long 0x0 4. "CTOF,Clear timeout flag" "0,1"
|
|
bitfld.long 0x0 3. "CSMF,Clear status match flag" "0,1"
|
|
bitfld.long 0x0 1. "CTCF,Clear transfer complete" "0,1"
|
|
bitfld.long 0x0 0. "CTEF,Clear transfer error flag" "0,1"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "DLR,data length register"
|
|
hexmask.long 0x0 0.--31. 1. "DL,Data length"
|
|
group.long 0x48++0x3
|
|
line.long 0x0 "AR,address register"
|
|
hexmask.long 0x0 0.--31. 1. "ADDRESS,ADDRESS"
|
|
group.long 0x50++0x3
|
|
line.long 0x0 "DR,data register"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Data"
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "PSMKR,polling status mask register"
|
|
hexmask.long 0x0 0.--31. 1. "MASK,Status mask"
|
|
group.long 0x88++0x3
|
|
line.long 0x0 "PSMAR,polling status match register"
|
|
hexmask.long 0x0 0.--31. 1. "MATCH,Status match"
|
|
group.long 0x90++0x3
|
|
line.long 0x0 "PIR,polling interval register"
|
|
hexmask.long.word 0x0 0.--15. 1. "INTERVAL,Polling interval"
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "CCR,communication configuration"
|
|
bitfld.long 0x0 31. "SIOO,Send instruction only once" "0,1"
|
|
bitfld.long 0x0 29. "DQSE,DQS enable" "0,1"
|
|
bitfld.long 0x0 27. "DDTR,Alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 24.--26. "DMODE,Data mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 20.--21. "ABSIZE,Alternate bytes size" "0,1,2,3"
|
|
bitfld.long 0x0 19. "ABDTR,Alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 16.--18. "ABMODE,Alternate byte mode" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "ADSIZE,Address size" "0,1,2,3"
|
|
bitfld.long 0x0 11. "ADDTR,Address double transfer" "0,1"
|
|
bitfld.long 0x0 8.--10. "ADMODE,Address mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 4.--5. "ISIZE,Instruction size" "0,1,2,3"
|
|
bitfld.long 0x0 3. "IDTR,Instruction double transfer" "0,1"
|
|
bitfld.long 0x0 0.--2. "IMODE,Instruction mode" "0,1,2,3,4,5,6,7"
|
|
group.long 0x108++0x3
|
|
line.long 0x0 "TCR,timing configuration register"
|
|
bitfld.long 0x0 30. "SSHIFT,Sample shift" "0,1"
|
|
bitfld.long 0x0 28. "DHQC,Delay hold quarter cycle" "0,1"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DCYC,Number of dummy cycles"
|
|
group.long 0x110++0x3
|
|
line.long 0x0 "IR,instruction register"
|
|
hexmask.long 0x0 0.--31. 1. "INSTRUCTION,INSTRUCTION"
|
|
group.long 0x120++0x3
|
|
line.long 0x0 "ABR,alternate bytes register"
|
|
hexmask.long 0x0 0.--31. 1. "ALTERNATE,Alternate bytes"
|
|
group.long 0x130++0x3
|
|
line.long 0x0 "LPTR,low-power timeout register"
|
|
hexmask.long.word 0x0 0.--15. 1. "TIMEOUT,Timeout period"
|
|
group.long 0x180++0x3
|
|
line.long 0x0 "WCCR,write communication configuration"
|
|
bitfld.long 0x0 31. "SIOO,Send instruction only once" "0,1"
|
|
bitfld.long 0x0 29. "DQSE,DQS enable" "0,1"
|
|
bitfld.long 0x0 27. "DDTR,alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 24.--26. "DMODE,Data mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 20.--21. "ABSIZE,Alternate bytes size" "0,1,2,3"
|
|
bitfld.long 0x0 19. "ABDTR,Alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 16.--18. "ABMODE,Alternate byte mode" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "ADSIZE,Address size" "0,1,2,3"
|
|
bitfld.long 0x0 11. "ADDTR,Address double transfer" "0,1"
|
|
bitfld.long 0x0 8.--10. "ADMODE,Address mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 4.--5. "ISIZE,Instruction size" "0,1,2,3"
|
|
bitfld.long 0x0 3. "IDTR,Instruction double transfer" "0,1"
|
|
bitfld.long 0x0 0.--2. "IMODE,Instruction mode" "0,1,2,3,4,5,6,7"
|
|
group.long 0x188++0x3
|
|
line.long 0x0 "WTCR,write timing configuration"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DCYC,Number of dummy cycles"
|
|
group.long 0x190++0x3
|
|
line.long 0x0 "WIR,write instruction register"
|
|
hexmask.long 0x0 0.--31. 1. "INSTRUCTION,INSTRUCTION"
|
|
group.long 0x1A0++0x3
|
|
line.long 0x0 "WABR,write alternate bytes register"
|
|
hexmask.long 0x0 0.--31. 1. "ALTERNATE,Alternate bytes"
|
|
group.long 0x200++0x3
|
|
line.long 0x0 "HLCR,HyperBusTM latency configuration"
|
|
hexmask.long.byte 0x0 16.--23. 1. "TRWR,Read write recovery time"
|
|
hexmask.long.byte 0x0 8.--15. 1. "TACC,Access time"
|
|
bitfld.long 0x0 1. "WZL,Write zero latency" "0,1"
|
|
bitfld.long 0x0 0. "LM,Latency mode" "0,1"
|
|
rgroup.long 0x3F0++0xF
|
|
line.long 0x0 "HWCFGR,HW configuration register"
|
|
hexmask.long.byte 0x0 28.--31. 1. "MST,Master"
|
|
hexmask.long.byte 0x0 24.--27. 1. "MMW,Memory map write"
|
|
hexmask.long.byte 0x0 20.--23. 1. "IDL,ID Length"
|
|
hexmask.long.byte 0x0 12.--19. 1. "PRES,Prescaler"
|
|
hexmask.long.byte 0x0 4.--11. 1. "FIFO,FIFO depth"
|
|
hexmask.long.byte 0x0 0.--3. 1. "AXI,AXI interface"
|
|
line.long 0x4 "VER,version register"
|
|
hexmask.long.byte 0x4 0.--7. 1. "VER,Version"
|
|
line.long 0x8 "ID,identification"
|
|
hexmask.long 0x8 0.--31. 1. "ID,Identification"
|
|
line.long 0xC "MID,magic ID"
|
|
hexmask.long 0xC 0.--31. 1. "MID,Magic ID"
|
|
tree.end
|
|
endif
|
|
sif (cpuis("STM32L4R9*"))
|
|
tree "OCTOSPI1"
|
|
base ad:0xA0001000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CR,control register"
|
|
bitfld.long 0x0 28.--29. "FMODE,Functional mode" "0,1,2,3"
|
|
bitfld.long 0x0 23. "PMM,Polling match mode" "0,1"
|
|
bitfld.long 0x0 22. "APMS,Automatic poll mode stop" "0,1"
|
|
bitfld.long 0x0 20. "TOIE,TimeOut interrupt enable" "0,1"
|
|
bitfld.long 0x0 19. "SMIE,Status match interrupt" "0,1"
|
|
bitfld.long 0x0 18. "FTIE,FIFO threshold interrupt" "0,1"
|
|
bitfld.long 0x0 17. "TCIE,Transfer complete interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "TEIE,Transfer error interrupt" "0,1"
|
|
hexmask.long.byte 0x0 8.--12. 1. "FTHRES,IFO threshold level"
|
|
bitfld.long 0x0 7. "FSEL,FLASH memory selection" "0,1"
|
|
bitfld.long 0x0 6. "DQM,Dual-quad mode" "0,1"
|
|
bitfld.long 0x0 3. "TCEN,Timeout counter enable" "0,1"
|
|
bitfld.long 0x0 2. "DMAEN,DMA enable" "0,1"
|
|
bitfld.long 0x0 1. "ABORT,Abort request" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x8++0xB
|
|
line.long 0x0 "DCR1,device configuration register"
|
|
bitfld.long 0x0 24.--25. "MTYP,Memory type" "0,1,2,3"
|
|
hexmask.long.byte 0x0 16.--20. 1. "DEVSIZE,Device size"
|
|
bitfld.long 0x0 8.--10. "CSHT,Chip-select high time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 1. "FRCK,Free running clock" "0,1"
|
|
bitfld.long 0x0 0. "CKMODE,Mode 0 / mode 3" "0,1"
|
|
line.long 0x4 "DCR2,device configuration register"
|
|
bitfld.long 0x4 16.--18. "WRAPSIZE,Wrap size" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x4 0.--7. 1. "PRESCALER,Clock prescaler"
|
|
line.long 0x8 "DCR3,device configuration register"
|
|
hexmask.long.byte 0x8 16.--20. 1. "CSBOUND,CS boundary"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "SR,status register"
|
|
hexmask.long.byte 0x0 8.--13. 1. "FLEVEL,FIFO level"
|
|
bitfld.long 0x0 5. "BUSY,BUSY" "0,1"
|
|
bitfld.long 0x0 4. "TOF,Timeout flag" "0,1"
|
|
bitfld.long 0x0 3. "SMF,Status match flag" "0,1"
|
|
bitfld.long 0x0 2. "FTF,FIFO threshold flag" "0,1"
|
|
bitfld.long 0x0 1. "TCF,Transfer complete flag" "0,1"
|
|
bitfld.long 0x0 0. "TEF,Transfer error flag" "0,1"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x0 "FCR,flag clear register"
|
|
bitfld.long 0x0 4. "CTOF,Clear timeout flag" "0,1"
|
|
bitfld.long 0x0 3. "CSMF,Clear status match flag" "0,1"
|
|
bitfld.long 0x0 1. "CTCF,Clear transfer complete" "0,1"
|
|
bitfld.long 0x0 0. "CTEF,Clear transfer error flag" "0,1"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "DLR,data length register"
|
|
hexmask.long 0x0 0.--31. 1. "DL,Data length"
|
|
group.long 0x48++0x3
|
|
line.long 0x0 "AR,address register"
|
|
hexmask.long 0x0 0.--31. 1. "ADDRESS,ADDRESS"
|
|
group.long 0x50++0x3
|
|
line.long 0x0 "DR,data register"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Data"
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "PSMKR,polling status mask register"
|
|
hexmask.long 0x0 0.--31. 1. "MASK,Status mask"
|
|
group.long 0x88++0x3
|
|
line.long 0x0 "PSMAR,polling status match register"
|
|
hexmask.long 0x0 0.--31. 1. "MATCH,Status match"
|
|
group.long 0x90++0x3
|
|
line.long 0x0 "PIR,polling interval register"
|
|
hexmask.long.word 0x0 0.--15. 1. "INTERVAL,Polling interval"
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "CCR,communication configuration"
|
|
bitfld.long 0x0 31. "SIOO,Send instruction only once" "0,1"
|
|
bitfld.long 0x0 29. "DQSE,DQS enable" "0,1"
|
|
bitfld.long 0x0 27. "DDTR,Alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 24.--26. "DMODE,Data mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 20.--21. "ABSIZE,Alternate bytes size" "0,1,2,3"
|
|
bitfld.long 0x0 19. "ABDTR,Alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 16.--18. "ABMODE,Alternate byte mode" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "ADSIZE,Address size" "0,1,2,3"
|
|
bitfld.long 0x0 11. "ADDTR,Address double transfer" "0,1"
|
|
bitfld.long 0x0 8.--10. "ADMODE,Address mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 4.--5. "ISIZE,Instruction size" "0,1,2,3"
|
|
bitfld.long 0x0 3. "IDTR,Instruction double transfer" "0,1"
|
|
bitfld.long 0x0 0.--2. "IMODE,Instruction mode" "0,1,2,3,4,5,6,7"
|
|
group.long 0x108++0x3
|
|
line.long 0x0 "TCR,timing configuration register"
|
|
bitfld.long 0x0 30. "SSHIFT,Sample shift" "0,1"
|
|
bitfld.long 0x0 28. "DHQC,Delay hold quarter cycle" "0,1"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DCYC,Number of dummy cycles"
|
|
group.long 0x110++0x3
|
|
line.long 0x0 "IR,instruction register"
|
|
hexmask.long 0x0 0.--31. 1. "INSTRUCTION,INSTRUCTION"
|
|
group.long 0x120++0x3
|
|
line.long 0x0 "ABR,alternate bytes register"
|
|
hexmask.long 0x0 0.--31. 1. "ALTERNATE,Alternate bytes"
|
|
group.long 0x130++0x3
|
|
line.long 0x0 "LPTR,low-power timeout register"
|
|
hexmask.long.word 0x0 0.--15. 1. "TIMEOUT,Timeout period"
|
|
group.long 0x180++0x3
|
|
line.long 0x0 "WCCR,write communication configuration"
|
|
bitfld.long 0x0 31. "SIOO,Send instruction only once" "0,1"
|
|
bitfld.long 0x0 29. "DQSE,DQS enable" "0,1"
|
|
bitfld.long 0x0 27. "DDTR,alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 24.--26. "DMODE,Data mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 20.--21. "ABSIZE,Alternate bytes size" "0,1,2,3"
|
|
bitfld.long 0x0 19. "ABDTR,Alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 16.--18. "ABMODE,Alternate byte mode" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "ADSIZE,Address size" "0,1,2,3"
|
|
bitfld.long 0x0 11. "ADDTR,Address double transfer" "0,1"
|
|
bitfld.long 0x0 8.--10. "ADMODE,Address mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 4.--5. "ISIZE,Instruction size" "0,1,2,3"
|
|
bitfld.long 0x0 3. "IDTR,Instruction double transfer" "0,1"
|
|
bitfld.long 0x0 0.--2. "IMODE,Instruction mode" "0,1,2,3,4,5,6,7"
|
|
group.long 0x188++0x3
|
|
line.long 0x0 "WTCR,write timing configuration"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DCYC,Number of dummy cycles"
|
|
group.long 0x190++0x3
|
|
line.long 0x0 "WIR,write instruction register"
|
|
hexmask.long 0x0 0.--31. 1. "INSTRUCTION,INSTRUCTION"
|
|
group.long 0x1A0++0x3
|
|
line.long 0x0 "WABR,write alternate bytes register"
|
|
hexmask.long 0x0 0.--31. 1. "ALTERNATE,Alternate bytes"
|
|
group.long 0x200++0x3
|
|
line.long 0x0 "HLCR,HyperBusTM latency configuration"
|
|
hexmask.long.byte 0x0 16.--23. 1. "TRWR,Read write recovery time"
|
|
hexmask.long.byte 0x0 8.--15. 1. "TACC,Access time"
|
|
bitfld.long 0x0 1. "WZL,Write zero latency" "0,1"
|
|
bitfld.long 0x0 0. "LM,Latency mode" "0,1"
|
|
rgroup.long 0x3F0++0xF
|
|
line.long 0x0 "HWCFGR,HW configuration register"
|
|
hexmask.long.byte 0x0 28.--31. 1. "MST,Master"
|
|
hexmask.long.byte 0x0 24.--27. 1. "MMW,Memory map write"
|
|
hexmask.long.byte 0x0 20.--23. 1. "IDL,ID Length"
|
|
hexmask.long.byte 0x0 12.--19. 1. "PRES,Prescaler"
|
|
hexmask.long.byte 0x0 4.--11. 1. "FIFO,FIFO depth"
|
|
hexmask.long.byte 0x0 0.--3. 1. "AXI,AXI interface"
|
|
line.long 0x4 "VER,version register"
|
|
hexmask.long.byte 0x4 0.--7. 1. "VER,Version"
|
|
line.long 0x8 "ID,identification"
|
|
hexmask.long 0x8 0.--31. 1. "ID,Identification"
|
|
line.long 0xC "MID,magic ID"
|
|
hexmask.long 0xC 0.--31. 1. "MID,Magic ID"
|
|
tree.end
|
|
tree "OCTOSPI2"
|
|
base ad:0xA0001400
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CR,control register"
|
|
bitfld.long 0x0 28.--29. "FMODE,Functional mode" "0,1,2,3"
|
|
bitfld.long 0x0 23. "PMM,Polling match mode" "0,1"
|
|
bitfld.long 0x0 22. "APMS,Automatic poll mode stop" "0,1"
|
|
bitfld.long 0x0 20. "TOIE,TimeOut interrupt enable" "0,1"
|
|
bitfld.long 0x0 19. "SMIE,Status match interrupt" "0,1"
|
|
bitfld.long 0x0 18. "FTIE,FIFO threshold interrupt" "0,1"
|
|
bitfld.long 0x0 17. "TCIE,Transfer complete interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "TEIE,Transfer error interrupt" "0,1"
|
|
hexmask.long.byte 0x0 8.--12. 1. "FTHRES,IFO threshold level"
|
|
bitfld.long 0x0 7. "FSEL,FLASH memory selection" "0,1"
|
|
bitfld.long 0x0 6. "DQM,Dual-quad mode" "0,1"
|
|
bitfld.long 0x0 3. "TCEN,Timeout counter enable" "0,1"
|
|
bitfld.long 0x0 2. "DMAEN,DMA enable" "0,1"
|
|
bitfld.long 0x0 1. "ABORT,Abort request" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x8++0xB
|
|
line.long 0x0 "DCR1,device configuration register"
|
|
bitfld.long 0x0 24.--25. "MTYP,Memory type" "0,1,2,3"
|
|
hexmask.long.byte 0x0 16.--20. 1. "DEVSIZE,Device size"
|
|
bitfld.long 0x0 8.--10. "CSHT,Chip-select high time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 1. "FRCK,Free running clock" "0,1"
|
|
bitfld.long 0x0 0. "CKMODE,Mode 0 / mode 3" "0,1"
|
|
line.long 0x4 "DCR2,device configuration register"
|
|
bitfld.long 0x4 16.--18. "WRAPSIZE,Wrap size" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x4 0.--7. 1. "PRESCALER,Clock prescaler"
|
|
line.long 0x8 "DCR3,device configuration register"
|
|
hexmask.long.byte 0x8 16.--20. 1. "CSBOUND,CS boundary"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "SR,status register"
|
|
hexmask.long.byte 0x0 8.--13. 1. "FLEVEL,FIFO level"
|
|
bitfld.long 0x0 5. "BUSY,BUSY" "0,1"
|
|
bitfld.long 0x0 4. "TOF,Timeout flag" "0,1"
|
|
bitfld.long 0x0 3. "SMF,Status match flag" "0,1"
|
|
bitfld.long 0x0 2. "FTF,FIFO threshold flag" "0,1"
|
|
bitfld.long 0x0 1. "TCF,Transfer complete flag" "0,1"
|
|
bitfld.long 0x0 0. "TEF,Transfer error flag" "0,1"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x0 "FCR,flag clear register"
|
|
bitfld.long 0x0 4. "CTOF,Clear timeout flag" "0,1"
|
|
bitfld.long 0x0 3. "CSMF,Clear status match flag" "0,1"
|
|
bitfld.long 0x0 1. "CTCF,Clear transfer complete" "0,1"
|
|
bitfld.long 0x0 0. "CTEF,Clear transfer error flag" "0,1"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "DLR,data length register"
|
|
hexmask.long 0x0 0.--31. 1. "DL,Data length"
|
|
group.long 0x48++0x3
|
|
line.long 0x0 "AR,address register"
|
|
hexmask.long 0x0 0.--31. 1. "ADDRESS,ADDRESS"
|
|
group.long 0x50++0x3
|
|
line.long 0x0 "DR,data register"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Data"
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "PSMKR,polling status mask register"
|
|
hexmask.long 0x0 0.--31. 1. "MASK,Status mask"
|
|
group.long 0x88++0x3
|
|
line.long 0x0 "PSMAR,polling status match register"
|
|
hexmask.long 0x0 0.--31. 1. "MATCH,Status match"
|
|
group.long 0x90++0x3
|
|
line.long 0x0 "PIR,polling interval register"
|
|
hexmask.long.word 0x0 0.--15. 1. "INTERVAL,Polling interval"
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "CCR,communication configuration"
|
|
bitfld.long 0x0 31. "SIOO,Send instruction only once" "0,1"
|
|
bitfld.long 0x0 29. "DQSE,DQS enable" "0,1"
|
|
bitfld.long 0x0 27. "DDTR,Alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 24.--26. "DMODE,Data mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 20.--21. "ABSIZE,Alternate bytes size" "0,1,2,3"
|
|
bitfld.long 0x0 19. "ABDTR,Alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 16.--18. "ABMODE,Alternate byte mode" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "ADSIZE,Address size" "0,1,2,3"
|
|
bitfld.long 0x0 11. "ADDTR,Address double transfer" "0,1"
|
|
bitfld.long 0x0 8.--10. "ADMODE,Address mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 4.--5. "ISIZE,Instruction size" "0,1,2,3"
|
|
bitfld.long 0x0 3. "IDTR,Instruction double transfer" "0,1"
|
|
bitfld.long 0x0 0.--2. "IMODE,Instruction mode" "0,1,2,3,4,5,6,7"
|
|
group.long 0x108++0x3
|
|
line.long 0x0 "TCR,timing configuration register"
|
|
bitfld.long 0x0 30. "SSHIFT,Sample shift" "0,1"
|
|
bitfld.long 0x0 28. "DHQC,Delay hold quarter cycle" "0,1"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DCYC,Number of dummy cycles"
|
|
group.long 0x110++0x3
|
|
line.long 0x0 "IR,instruction register"
|
|
hexmask.long 0x0 0.--31. 1. "INSTRUCTION,INSTRUCTION"
|
|
group.long 0x120++0x3
|
|
line.long 0x0 "ABR,alternate bytes register"
|
|
hexmask.long 0x0 0.--31. 1. "ALTERNATE,Alternate bytes"
|
|
group.long 0x130++0x3
|
|
line.long 0x0 "LPTR,low-power timeout register"
|
|
hexmask.long.word 0x0 0.--15. 1. "TIMEOUT,Timeout period"
|
|
group.long 0x180++0x3
|
|
line.long 0x0 "WCCR,write communication configuration"
|
|
bitfld.long 0x0 31. "SIOO,Send instruction only once" "0,1"
|
|
bitfld.long 0x0 29. "DQSE,DQS enable" "0,1"
|
|
bitfld.long 0x0 27. "DDTR,alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 24.--26. "DMODE,Data mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 20.--21. "ABSIZE,Alternate bytes size" "0,1,2,3"
|
|
bitfld.long 0x0 19. "ABDTR,Alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 16.--18. "ABMODE,Alternate byte mode" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "ADSIZE,Address size" "0,1,2,3"
|
|
bitfld.long 0x0 11. "ADDTR,Address double transfer" "0,1"
|
|
bitfld.long 0x0 8.--10. "ADMODE,Address mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 4.--5. "ISIZE,Instruction size" "0,1,2,3"
|
|
bitfld.long 0x0 3. "IDTR,Instruction double transfer" "0,1"
|
|
bitfld.long 0x0 0.--2. "IMODE,Instruction mode" "0,1,2,3,4,5,6,7"
|
|
group.long 0x188++0x3
|
|
line.long 0x0 "WTCR,write timing configuration"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DCYC,Number of dummy cycles"
|
|
group.long 0x190++0x3
|
|
line.long 0x0 "WIR,write instruction register"
|
|
hexmask.long 0x0 0.--31. 1. "INSTRUCTION,INSTRUCTION"
|
|
group.long 0x1A0++0x3
|
|
line.long 0x0 "WABR,write alternate bytes register"
|
|
hexmask.long 0x0 0.--31. 1. "ALTERNATE,Alternate bytes"
|
|
group.long 0x200++0x3
|
|
line.long 0x0 "HLCR,HyperBusTM latency configuration"
|
|
hexmask.long.byte 0x0 16.--23. 1. "TRWR,Read write recovery time"
|
|
hexmask.long.byte 0x0 8.--15. 1. "TACC,Access time"
|
|
bitfld.long 0x0 1. "WZL,Write zero latency" "0,1"
|
|
bitfld.long 0x0 0. "LM,Latency mode" "0,1"
|
|
rgroup.long 0x3F0++0xF
|
|
line.long 0x0 "HWCFGR,HW configuration register"
|
|
hexmask.long.byte 0x0 28.--31. 1. "MST,Master"
|
|
hexmask.long.byte 0x0 24.--27. 1. "MMW,Memory map write"
|
|
hexmask.long.byte 0x0 20.--23. 1. "IDL,ID Length"
|
|
hexmask.long.byte 0x0 12.--19. 1. "PRES,Prescaler"
|
|
hexmask.long.byte 0x0 4.--11. 1. "FIFO,FIFO depth"
|
|
hexmask.long.byte 0x0 0.--3. 1. "AXI,AXI interface"
|
|
line.long 0x4 "VER,version register"
|
|
hexmask.long.byte 0x4 0.--7. 1. "VER,Version"
|
|
line.long 0x8 "ID,identification"
|
|
hexmask.long 0x8 0.--31. 1. "ID,Identification"
|
|
line.long 0xC "MID,magic ID"
|
|
hexmask.long 0xC 0.--31. 1. "MID,Magic ID"
|
|
tree.end
|
|
endif
|
|
sif (cpuis("STM32L4S5*"))
|
|
tree "OCTOSPI1"
|
|
base ad:0xA0001000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CR,control register"
|
|
bitfld.long 0x0 28.--29. "FMODE,Functional mode" "0,1,2,3"
|
|
bitfld.long 0x0 23. "PMM,Polling match mode" "0,1"
|
|
bitfld.long 0x0 22. "APMS,Automatic poll mode stop" "0,1"
|
|
bitfld.long 0x0 20. "TOIE,TimeOut interrupt enable" "0,1"
|
|
bitfld.long 0x0 19. "SMIE,Status match interrupt" "0,1"
|
|
bitfld.long 0x0 18. "FTIE,FIFO threshold interrupt" "0,1"
|
|
bitfld.long 0x0 17. "TCIE,Transfer complete interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "TEIE,Transfer error interrupt" "0,1"
|
|
hexmask.long.byte 0x0 8.--12. 1. "FTHRES,IFO threshold level"
|
|
bitfld.long 0x0 7. "FSEL,FLASH memory selection" "0,1"
|
|
bitfld.long 0x0 6. "DQM,Dual-quad mode" "0,1"
|
|
bitfld.long 0x0 3. "TCEN,Timeout counter enable" "0,1"
|
|
bitfld.long 0x0 2. "DMAEN,DMA enable" "0,1"
|
|
bitfld.long 0x0 1. "ABORT,Abort request" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x8++0xB
|
|
line.long 0x0 "DCR1,device configuration register"
|
|
bitfld.long 0x0 24.--25. "MTYP,Memory type" "0,1,2,3"
|
|
hexmask.long.byte 0x0 16.--20. 1. "DEVSIZE,Device size"
|
|
bitfld.long 0x0 8.--10. "CSHT,Chip-select high time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 1. "FRCK,Free running clock" "0,1"
|
|
bitfld.long 0x0 0. "CKMODE,Mode 0 / mode 3" "0,1"
|
|
line.long 0x4 "DCR2,device configuration register"
|
|
bitfld.long 0x4 16.--18. "WRAPSIZE,Wrap size" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x4 0.--7. 1. "PRESCALER,Clock prescaler"
|
|
line.long 0x8 "DCR3,device configuration register"
|
|
hexmask.long.byte 0x8 16.--20. 1. "CSBOUND,CS boundary"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "SR,status register"
|
|
hexmask.long.byte 0x0 8.--13. 1. "FLEVEL,FIFO level"
|
|
bitfld.long 0x0 5. "BUSY,BUSY" "0,1"
|
|
bitfld.long 0x0 4. "TOF,Timeout flag" "0,1"
|
|
bitfld.long 0x0 3. "SMF,Status match flag" "0,1"
|
|
bitfld.long 0x0 2. "FTF,FIFO threshold flag" "0,1"
|
|
bitfld.long 0x0 1. "TCF,Transfer complete flag" "0,1"
|
|
bitfld.long 0x0 0. "TEF,Transfer error flag" "0,1"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x0 "FCR,flag clear register"
|
|
bitfld.long 0x0 4. "CTOF,Clear timeout flag" "0,1"
|
|
bitfld.long 0x0 3. "CSMF,Clear status match flag" "0,1"
|
|
bitfld.long 0x0 1. "CTCF,Clear transfer complete" "0,1"
|
|
bitfld.long 0x0 0. "CTEF,Clear transfer error flag" "0,1"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "DLR,data length register"
|
|
hexmask.long 0x0 0.--31. 1. "DL,Data length"
|
|
group.long 0x48++0x3
|
|
line.long 0x0 "AR,address register"
|
|
hexmask.long 0x0 0.--31. 1. "ADDRESS,ADDRESS"
|
|
group.long 0x50++0x3
|
|
line.long 0x0 "DR,data register"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Data"
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "PSMKR,polling status mask register"
|
|
hexmask.long 0x0 0.--31. 1. "MASK,Status mask"
|
|
group.long 0x88++0x3
|
|
line.long 0x0 "PSMAR,polling status match register"
|
|
hexmask.long 0x0 0.--31. 1. "MATCH,Status match"
|
|
group.long 0x90++0x3
|
|
line.long 0x0 "PIR,polling interval register"
|
|
hexmask.long.word 0x0 0.--15. 1. "INTERVAL,Polling interval"
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "CCR,communication configuration"
|
|
bitfld.long 0x0 31. "SIOO,Send instruction only once" "0,1"
|
|
bitfld.long 0x0 29. "DQSE,DQS enable" "0,1"
|
|
bitfld.long 0x0 27. "DDTR,Alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 24.--26. "DMODE,Data mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 20.--21. "ABSIZE,Alternate bytes size" "0,1,2,3"
|
|
bitfld.long 0x0 19. "ABDTR,Alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 16.--18. "ABMODE,Alternate byte mode" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "ADSIZE,Address size" "0,1,2,3"
|
|
bitfld.long 0x0 11. "ADDTR,Address double transfer" "0,1"
|
|
bitfld.long 0x0 8.--10. "ADMODE,Address mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 4.--5. "ISIZE,Instruction size" "0,1,2,3"
|
|
bitfld.long 0x0 3. "IDTR,Instruction double transfer" "0,1"
|
|
bitfld.long 0x0 0.--2. "IMODE,Instruction mode" "0,1,2,3,4,5,6,7"
|
|
group.long 0x108++0x3
|
|
line.long 0x0 "TCR,timing configuration register"
|
|
bitfld.long 0x0 30. "SSHIFT,Sample shift" "0,1"
|
|
bitfld.long 0x0 28. "DHQC,Delay hold quarter cycle" "0,1"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DCYC,Number of dummy cycles"
|
|
group.long 0x110++0x3
|
|
line.long 0x0 "IR,instruction register"
|
|
hexmask.long 0x0 0.--31. 1. "INSTRUCTION,INSTRUCTION"
|
|
group.long 0x120++0x3
|
|
line.long 0x0 "ABR,alternate bytes register"
|
|
hexmask.long 0x0 0.--31. 1. "ALTERNATE,Alternate bytes"
|
|
group.long 0x130++0x3
|
|
line.long 0x0 "LPTR,low-power timeout register"
|
|
hexmask.long.word 0x0 0.--15. 1. "TIMEOUT,Timeout period"
|
|
group.long 0x180++0x3
|
|
line.long 0x0 "WCCR,write communication configuration"
|
|
bitfld.long 0x0 31. "SIOO,Send instruction only once" "0,1"
|
|
bitfld.long 0x0 29. "DQSE,DQS enable" "0,1"
|
|
bitfld.long 0x0 27. "DDTR,alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 24.--26. "DMODE,Data mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 20.--21. "ABSIZE,Alternate bytes size" "0,1,2,3"
|
|
bitfld.long 0x0 19. "ABDTR,Alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 16.--18. "ABMODE,Alternate byte mode" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "ADSIZE,Address size" "0,1,2,3"
|
|
bitfld.long 0x0 11. "ADDTR,Address double transfer" "0,1"
|
|
bitfld.long 0x0 8.--10. "ADMODE,Address mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 4.--5. "ISIZE,Instruction size" "0,1,2,3"
|
|
bitfld.long 0x0 3. "IDTR,Instruction double transfer" "0,1"
|
|
bitfld.long 0x0 0.--2. "IMODE,Instruction mode" "0,1,2,3,4,5,6,7"
|
|
group.long 0x188++0x3
|
|
line.long 0x0 "WTCR,write timing configuration"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DCYC,Number of dummy cycles"
|
|
group.long 0x190++0x3
|
|
line.long 0x0 "WIR,write instruction register"
|
|
hexmask.long 0x0 0.--31. 1. "INSTRUCTION,INSTRUCTION"
|
|
group.long 0x1A0++0x3
|
|
line.long 0x0 "WABR,write alternate bytes register"
|
|
hexmask.long 0x0 0.--31. 1. "ALTERNATE,Alternate bytes"
|
|
group.long 0x200++0x3
|
|
line.long 0x0 "HLCR,HyperBusTM latency configuration"
|
|
hexmask.long.byte 0x0 16.--23. 1. "TRWR,Read write recovery time"
|
|
hexmask.long.byte 0x0 8.--15. 1. "TACC,Access time"
|
|
bitfld.long 0x0 1. "WZL,Write zero latency" "0,1"
|
|
bitfld.long 0x0 0. "LM,Latency mode" "0,1"
|
|
rgroup.long 0x3F0++0xF
|
|
line.long 0x0 "HWCFGR,HW configuration register"
|
|
hexmask.long.byte 0x0 28.--31. 1. "MST,Master"
|
|
hexmask.long.byte 0x0 24.--27. 1. "MMW,Memory map write"
|
|
hexmask.long.byte 0x0 20.--23. 1. "IDL,ID Length"
|
|
hexmask.long.byte 0x0 12.--19. 1. "PRES,Prescaler"
|
|
hexmask.long.byte 0x0 4.--11. 1. "FIFO,FIFO depth"
|
|
hexmask.long.byte 0x0 0.--3. 1. "AXI,AXI interface"
|
|
line.long 0x4 "VER,version register"
|
|
hexmask.long.byte 0x4 0.--7. 1. "VER,Version"
|
|
line.long 0x8 "ID,identification"
|
|
hexmask.long 0x8 0.--31. 1. "ID,Identification"
|
|
line.long 0xC "MID,magic ID"
|
|
hexmask.long 0xC 0.--31. 1. "MID,Magic ID"
|
|
tree.end
|
|
tree "OCTOSPI2"
|
|
base ad:0xA0001400
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CR,control register"
|
|
bitfld.long 0x0 28.--29. "FMODE,Functional mode" "0,1,2,3"
|
|
bitfld.long 0x0 23. "PMM,Polling match mode" "0,1"
|
|
bitfld.long 0x0 22. "APMS,Automatic poll mode stop" "0,1"
|
|
bitfld.long 0x0 20. "TOIE,TimeOut interrupt enable" "0,1"
|
|
bitfld.long 0x0 19. "SMIE,Status match interrupt" "0,1"
|
|
bitfld.long 0x0 18. "FTIE,FIFO threshold interrupt" "0,1"
|
|
bitfld.long 0x0 17. "TCIE,Transfer complete interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "TEIE,Transfer error interrupt" "0,1"
|
|
hexmask.long.byte 0x0 8.--12. 1. "FTHRES,IFO threshold level"
|
|
bitfld.long 0x0 7. "FSEL,FLASH memory selection" "0,1"
|
|
bitfld.long 0x0 6. "DQM,Dual-quad mode" "0,1"
|
|
bitfld.long 0x0 3. "TCEN,Timeout counter enable" "0,1"
|
|
bitfld.long 0x0 2. "DMAEN,DMA enable" "0,1"
|
|
bitfld.long 0x0 1. "ABORT,Abort request" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x8++0xB
|
|
line.long 0x0 "DCR1,device configuration register"
|
|
bitfld.long 0x0 24.--25. "MTYP,Memory type" "0,1,2,3"
|
|
hexmask.long.byte 0x0 16.--20. 1. "DEVSIZE,Device size"
|
|
bitfld.long 0x0 8.--10. "CSHT,Chip-select high time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 1. "FRCK,Free running clock" "0,1"
|
|
bitfld.long 0x0 0. "CKMODE,Mode 0 / mode 3" "0,1"
|
|
line.long 0x4 "DCR2,device configuration register"
|
|
bitfld.long 0x4 16.--18. "WRAPSIZE,Wrap size" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x4 0.--7. 1. "PRESCALER,Clock prescaler"
|
|
line.long 0x8 "DCR3,device configuration register"
|
|
hexmask.long.byte 0x8 16.--20. 1. "CSBOUND,CS boundary"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "SR,status register"
|
|
hexmask.long.byte 0x0 8.--13. 1. "FLEVEL,FIFO level"
|
|
bitfld.long 0x0 5. "BUSY,BUSY" "0,1"
|
|
bitfld.long 0x0 4. "TOF,Timeout flag" "0,1"
|
|
bitfld.long 0x0 3. "SMF,Status match flag" "0,1"
|
|
bitfld.long 0x0 2. "FTF,FIFO threshold flag" "0,1"
|
|
bitfld.long 0x0 1. "TCF,Transfer complete flag" "0,1"
|
|
bitfld.long 0x0 0. "TEF,Transfer error flag" "0,1"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x0 "FCR,flag clear register"
|
|
bitfld.long 0x0 4. "CTOF,Clear timeout flag" "0,1"
|
|
bitfld.long 0x0 3. "CSMF,Clear status match flag" "0,1"
|
|
bitfld.long 0x0 1. "CTCF,Clear transfer complete" "0,1"
|
|
bitfld.long 0x0 0. "CTEF,Clear transfer error flag" "0,1"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "DLR,data length register"
|
|
hexmask.long 0x0 0.--31. 1. "DL,Data length"
|
|
group.long 0x48++0x3
|
|
line.long 0x0 "AR,address register"
|
|
hexmask.long 0x0 0.--31. 1. "ADDRESS,ADDRESS"
|
|
group.long 0x50++0x3
|
|
line.long 0x0 "DR,data register"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Data"
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "PSMKR,polling status mask register"
|
|
hexmask.long 0x0 0.--31. 1. "MASK,Status mask"
|
|
group.long 0x88++0x3
|
|
line.long 0x0 "PSMAR,polling status match register"
|
|
hexmask.long 0x0 0.--31. 1. "MATCH,Status match"
|
|
group.long 0x90++0x3
|
|
line.long 0x0 "PIR,polling interval register"
|
|
hexmask.long.word 0x0 0.--15. 1. "INTERVAL,Polling interval"
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "CCR,communication configuration"
|
|
bitfld.long 0x0 31. "SIOO,Send instruction only once" "0,1"
|
|
bitfld.long 0x0 29. "DQSE,DQS enable" "0,1"
|
|
bitfld.long 0x0 27. "DDTR,Alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 24.--26. "DMODE,Data mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 20.--21. "ABSIZE,Alternate bytes size" "0,1,2,3"
|
|
bitfld.long 0x0 19. "ABDTR,Alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 16.--18. "ABMODE,Alternate byte mode" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "ADSIZE,Address size" "0,1,2,3"
|
|
bitfld.long 0x0 11. "ADDTR,Address double transfer" "0,1"
|
|
bitfld.long 0x0 8.--10. "ADMODE,Address mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 4.--5. "ISIZE,Instruction size" "0,1,2,3"
|
|
bitfld.long 0x0 3. "IDTR,Instruction double transfer" "0,1"
|
|
bitfld.long 0x0 0.--2. "IMODE,Instruction mode" "0,1,2,3,4,5,6,7"
|
|
group.long 0x108++0x3
|
|
line.long 0x0 "TCR,timing configuration register"
|
|
bitfld.long 0x0 30. "SSHIFT,Sample shift" "0,1"
|
|
bitfld.long 0x0 28. "DHQC,Delay hold quarter cycle" "0,1"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DCYC,Number of dummy cycles"
|
|
group.long 0x110++0x3
|
|
line.long 0x0 "IR,instruction register"
|
|
hexmask.long 0x0 0.--31. 1. "INSTRUCTION,INSTRUCTION"
|
|
group.long 0x120++0x3
|
|
line.long 0x0 "ABR,alternate bytes register"
|
|
hexmask.long 0x0 0.--31. 1. "ALTERNATE,Alternate bytes"
|
|
group.long 0x130++0x3
|
|
line.long 0x0 "LPTR,low-power timeout register"
|
|
hexmask.long.word 0x0 0.--15. 1. "TIMEOUT,Timeout period"
|
|
group.long 0x180++0x3
|
|
line.long 0x0 "WCCR,write communication configuration"
|
|
bitfld.long 0x0 31. "SIOO,Send instruction only once" "0,1"
|
|
bitfld.long 0x0 29. "DQSE,DQS enable" "0,1"
|
|
bitfld.long 0x0 27. "DDTR,alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 24.--26. "DMODE,Data mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 20.--21. "ABSIZE,Alternate bytes size" "0,1,2,3"
|
|
bitfld.long 0x0 19. "ABDTR,Alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 16.--18. "ABMODE,Alternate byte mode" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "ADSIZE,Address size" "0,1,2,3"
|
|
bitfld.long 0x0 11. "ADDTR,Address double transfer" "0,1"
|
|
bitfld.long 0x0 8.--10. "ADMODE,Address mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 4.--5. "ISIZE,Instruction size" "0,1,2,3"
|
|
bitfld.long 0x0 3. "IDTR,Instruction double transfer" "0,1"
|
|
bitfld.long 0x0 0.--2. "IMODE,Instruction mode" "0,1,2,3,4,5,6,7"
|
|
group.long 0x188++0x3
|
|
line.long 0x0 "WTCR,write timing configuration"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DCYC,Number of dummy cycles"
|
|
group.long 0x190++0x3
|
|
line.long 0x0 "WIR,write instruction register"
|
|
hexmask.long 0x0 0.--31. 1. "INSTRUCTION,INSTRUCTION"
|
|
group.long 0x1A0++0x3
|
|
line.long 0x0 "WABR,write alternate bytes register"
|
|
hexmask.long 0x0 0.--31. 1. "ALTERNATE,Alternate bytes"
|
|
group.long 0x200++0x3
|
|
line.long 0x0 "HLCR,HyperBusTM latency configuration"
|
|
hexmask.long.byte 0x0 16.--23. 1. "TRWR,Read write recovery time"
|
|
hexmask.long.byte 0x0 8.--15. 1. "TACC,Access time"
|
|
bitfld.long 0x0 1. "WZL,Write zero latency" "0,1"
|
|
bitfld.long 0x0 0. "LM,Latency mode" "0,1"
|
|
rgroup.long 0x3F0++0xF
|
|
line.long 0x0 "HWCFGR,HW configuration register"
|
|
hexmask.long.byte 0x0 28.--31. 1. "MST,Master"
|
|
hexmask.long.byte 0x0 24.--27. 1. "MMW,Memory map write"
|
|
hexmask.long.byte 0x0 20.--23. 1. "IDL,ID Length"
|
|
hexmask.long.byte 0x0 12.--19. 1. "PRES,Prescaler"
|
|
hexmask.long.byte 0x0 4.--11. 1. "FIFO,FIFO depth"
|
|
hexmask.long.byte 0x0 0.--3. 1. "AXI,AXI interface"
|
|
line.long 0x4 "VER,version register"
|
|
hexmask.long.byte 0x4 0.--7. 1. "VER,Version"
|
|
line.long 0x8 "ID,identification"
|
|
hexmask.long 0x8 0.--31. 1. "ID,Identification"
|
|
line.long 0xC "MID,magic ID"
|
|
hexmask.long 0xC 0.--31. 1. "MID,Magic ID"
|
|
tree.end
|
|
endif
|
|
sif (cpuis("STM32L4S7*"))
|
|
tree "OCTOSPI1"
|
|
base ad:0xA0001000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CR,control register"
|
|
bitfld.long 0x0 28.--29. "FMODE,Functional mode" "0,1,2,3"
|
|
bitfld.long 0x0 23. "PMM,Polling match mode" "0,1"
|
|
bitfld.long 0x0 22. "APMS,Automatic poll mode stop" "0,1"
|
|
bitfld.long 0x0 20. "TOIE,TimeOut interrupt enable" "0,1"
|
|
bitfld.long 0x0 19. "SMIE,Status match interrupt" "0,1"
|
|
bitfld.long 0x0 18. "FTIE,FIFO threshold interrupt" "0,1"
|
|
bitfld.long 0x0 17. "TCIE,Transfer complete interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "TEIE,Transfer error interrupt" "0,1"
|
|
hexmask.long.byte 0x0 8.--12. 1. "FTHRES,IFO threshold level"
|
|
bitfld.long 0x0 7. "FSEL,FLASH memory selection" "0,1"
|
|
bitfld.long 0x0 6. "DQM,Dual-quad mode" "0,1"
|
|
bitfld.long 0x0 3. "TCEN,Timeout counter enable" "0,1"
|
|
bitfld.long 0x0 2. "DMAEN,DMA enable" "0,1"
|
|
bitfld.long 0x0 1. "ABORT,Abort request" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x8++0xB
|
|
line.long 0x0 "DCR1,device configuration register"
|
|
bitfld.long 0x0 24.--25. "MTYP,Memory type" "0,1,2,3"
|
|
hexmask.long.byte 0x0 16.--20. 1. "DEVSIZE,Device size"
|
|
bitfld.long 0x0 8.--10. "CSHT,Chip-select high time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 1. "FRCK,Free running clock" "0,1"
|
|
bitfld.long 0x0 0. "CKMODE,Mode 0 / mode 3" "0,1"
|
|
line.long 0x4 "DCR2,device configuration register"
|
|
bitfld.long 0x4 16.--18. "WRAPSIZE,Wrap size" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x4 0.--7. 1. "PRESCALER,Clock prescaler"
|
|
line.long 0x8 "DCR3,device configuration register"
|
|
hexmask.long.byte 0x8 16.--20. 1. "CSBOUND,CS boundary"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "SR,status register"
|
|
hexmask.long.byte 0x0 8.--13. 1. "FLEVEL,FIFO level"
|
|
bitfld.long 0x0 5. "BUSY,BUSY" "0,1"
|
|
bitfld.long 0x0 4. "TOF,Timeout flag" "0,1"
|
|
bitfld.long 0x0 3. "SMF,Status match flag" "0,1"
|
|
bitfld.long 0x0 2. "FTF,FIFO threshold flag" "0,1"
|
|
bitfld.long 0x0 1. "TCF,Transfer complete flag" "0,1"
|
|
bitfld.long 0x0 0. "TEF,Transfer error flag" "0,1"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x0 "FCR,flag clear register"
|
|
bitfld.long 0x0 4. "CTOF,Clear timeout flag" "0,1"
|
|
bitfld.long 0x0 3. "CSMF,Clear status match flag" "0,1"
|
|
bitfld.long 0x0 1. "CTCF,Clear transfer complete" "0,1"
|
|
bitfld.long 0x0 0. "CTEF,Clear transfer error flag" "0,1"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "DLR,data length register"
|
|
hexmask.long 0x0 0.--31. 1. "DL,Data length"
|
|
group.long 0x48++0x3
|
|
line.long 0x0 "AR,address register"
|
|
hexmask.long 0x0 0.--31. 1. "ADDRESS,ADDRESS"
|
|
group.long 0x50++0x3
|
|
line.long 0x0 "DR,data register"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Data"
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "PSMKR,polling status mask register"
|
|
hexmask.long 0x0 0.--31. 1. "MASK,Status mask"
|
|
group.long 0x88++0x3
|
|
line.long 0x0 "PSMAR,polling status match register"
|
|
hexmask.long 0x0 0.--31. 1. "MATCH,Status match"
|
|
group.long 0x90++0x3
|
|
line.long 0x0 "PIR,polling interval register"
|
|
hexmask.long.word 0x0 0.--15. 1. "INTERVAL,Polling interval"
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "CCR,communication configuration"
|
|
bitfld.long 0x0 31. "SIOO,Send instruction only once" "0,1"
|
|
bitfld.long 0x0 29. "DQSE,DQS enable" "0,1"
|
|
bitfld.long 0x0 27. "DDTR,Alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 24.--26. "DMODE,Data mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 20.--21. "ABSIZE,Alternate bytes size" "0,1,2,3"
|
|
bitfld.long 0x0 19. "ABDTR,Alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 16.--18. "ABMODE,Alternate byte mode" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "ADSIZE,Address size" "0,1,2,3"
|
|
bitfld.long 0x0 11. "ADDTR,Address double transfer" "0,1"
|
|
bitfld.long 0x0 8.--10. "ADMODE,Address mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 4.--5. "ISIZE,Instruction size" "0,1,2,3"
|
|
bitfld.long 0x0 3. "IDTR,Instruction double transfer" "0,1"
|
|
bitfld.long 0x0 0.--2. "IMODE,Instruction mode" "0,1,2,3,4,5,6,7"
|
|
group.long 0x108++0x3
|
|
line.long 0x0 "TCR,timing configuration register"
|
|
bitfld.long 0x0 30. "SSHIFT,Sample shift" "0,1"
|
|
bitfld.long 0x0 28. "DHQC,Delay hold quarter cycle" "0,1"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DCYC,Number of dummy cycles"
|
|
group.long 0x110++0x3
|
|
line.long 0x0 "IR,instruction register"
|
|
hexmask.long 0x0 0.--31. 1. "INSTRUCTION,INSTRUCTION"
|
|
group.long 0x120++0x3
|
|
line.long 0x0 "ABR,alternate bytes register"
|
|
hexmask.long 0x0 0.--31. 1. "ALTERNATE,Alternate bytes"
|
|
group.long 0x130++0x3
|
|
line.long 0x0 "LPTR,low-power timeout register"
|
|
hexmask.long.word 0x0 0.--15. 1. "TIMEOUT,Timeout period"
|
|
group.long 0x180++0x3
|
|
line.long 0x0 "WCCR,write communication configuration"
|
|
bitfld.long 0x0 31. "SIOO,Send instruction only once" "0,1"
|
|
bitfld.long 0x0 29. "DQSE,DQS enable" "0,1"
|
|
bitfld.long 0x0 27. "DDTR,alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 24.--26. "DMODE,Data mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 20.--21. "ABSIZE,Alternate bytes size" "0,1,2,3"
|
|
bitfld.long 0x0 19. "ABDTR,Alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 16.--18. "ABMODE,Alternate byte mode" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "ADSIZE,Address size" "0,1,2,3"
|
|
bitfld.long 0x0 11. "ADDTR,Address double transfer" "0,1"
|
|
bitfld.long 0x0 8.--10. "ADMODE,Address mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 4.--5. "ISIZE,Instruction size" "0,1,2,3"
|
|
bitfld.long 0x0 3. "IDTR,Instruction double transfer" "0,1"
|
|
bitfld.long 0x0 0.--2. "IMODE,Instruction mode" "0,1,2,3,4,5,6,7"
|
|
group.long 0x188++0x3
|
|
line.long 0x0 "WTCR,write timing configuration"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DCYC,Number of dummy cycles"
|
|
group.long 0x190++0x3
|
|
line.long 0x0 "WIR,write instruction register"
|
|
hexmask.long 0x0 0.--31. 1. "INSTRUCTION,INSTRUCTION"
|
|
group.long 0x1A0++0x3
|
|
line.long 0x0 "WABR,write alternate bytes register"
|
|
hexmask.long 0x0 0.--31. 1. "ALTERNATE,Alternate bytes"
|
|
group.long 0x200++0x3
|
|
line.long 0x0 "HLCR,HyperBusTM latency configuration"
|
|
hexmask.long.byte 0x0 16.--23. 1. "TRWR,Read write recovery time"
|
|
hexmask.long.byte 0x0 8.--15. 1. "TACC,Access time"
|
|
bitfld.long 0x0 1. "WZL,Write zero latency" "0,1"
|
|
bitfld.long 0x0 0. "LM,Latency mode" "0,1"
|
|
rgroup.long 0x3F0++0xF
|
|
line.long 0x0 "HWCFGR,HW configuration register"
|
|
hexmask.long.byte 0x0 28.--31. 1. "MST,Master"
|
|
hexmask.long.byte 0x0 24.--27. 1. "MMW,Memory map write"
|
|
hexmask.long.byte 0x0 20.--23. 1. "IDL,ID Length"
|
|
hexmask.long.byte 0x0 12.--19. 1. "PRES,Prescaler"
|
|
hexmask.long.byte 0x0 4.--11. 1. "FIFO,FIFO depth"
|
|
hexmask.long.byte 0x0 0.--3. 1. "AXI,AXI interface"
|
|
line.long 0x4 "VER,version register"
|
|
hexmask.long.byte 0x4 0.--7. 1. "VER,Version"
|
|
line.long 0x8 "ID,identification"
|
|
hexmask.long 0x8 0.--31. 1. "ID,Identification"
|
|
line.long 0xC "MID,magic ID"
|
|
hexmask.long 0xC 0.--31. 1. "MID,Magic ID"
|
|
tree.end
|
|
tree "OCTOSPI2"
|
|
base ad:0xA0001400
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CR,control register"
|
|
bitfld.long 0x0 28.--29. "FMODE,Functional mode" "0,1,2,3"
|
|
bitfld.long 0x0 23. "PMM,Polling match mode" "0,1"
|
|
bitfld.long 0x0 22. "APMS,Automatic poll mode stop" "0,1"
|
|
bitfld.long 0x0 20. "TOIE,TimeOut interrupt enable" "0,1"
|
|
bitfld.long 0x0 19. "SMIE,Status match interrupt" "0,1"
|
|
bitfld.long 0x0 18. "FTIE,FIFO threshold interrupt" "0,1"
|
|
bitfld.long 0x0 17. "TCIE,Transfer complete interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "TEIE,Transfer error interrupt" "0,1"
|
|
hexmask.long.byte 0x0 8.--12. 1. "FTHRES,IFO threshold level"
|
|
bitfld.long 0x0 7. "FSEL,FLASH memory selection" "0,1"
|
|
bitfld.long 0x0 6. "DQM,Dual-quad mode" "0,1"
|
|
bitfld.long 0x0 3. "TCEN,Timeout counter enable" "0,1"
|
|
bitfld.long 0x0 2. "DMAEN,DMA enable" "0,1"
|
|
bitfld.long 0x0 1. "ABORT,Abort request" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x8++0xB
|
|
line.long 0x0 "DCR1,device configuration register"
|
|
bitfld.long 0x0 24.--25. "MTYP,Memory type" "0,1,2,3"
|
|
hexmask.long.byte 0x0 16.--20. 1. "DEVSIZE,Device size"
|
|
bitfld.long 0x0 8.--10. "CSHT,Chip-select high time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 1. "FRCK,Free running clock" "0,1"
|
|
bitfld.long 0x0 0. "CKMODE,Mode 0 / mode 3" "0,1"
|
|
line.long 0x4 "DCR2,device configuration register"
|
|
bitfld.long 0x4 16.--18. "WRAPSIZE,Wrap size" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x4 0.--7. 1. "PRESCALER,Clock prescaler"
|
|
line.long 0x8 "DCR3,device configuration register"
|
|
hexmask.long.byte 0x8 16.--20. 1. "CSBOUND,CS boundary"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "SR,status register"
|
|
hexmask.long.byte 0x0 8.--13. 1. "FLEVEL,FIFO level"
|
|
bitfld.long 0x0 5. "BUSY,BUSY" "0,1"
|
|
bitfld.long 0x0 4. "TOF,Timeout flag" "0,1"
|
|
bitfld.long 0x0 3. "SMF,Status match flag" "0,1"
|
|
bitfld.long 0x0 2. "FTF,FIFO threshold flag" "0,1"
|
|
bitfld.long 0x0 1. "TCF,Transfer complete flag" "0,1"
|
|
bitfld.long 0x0 0. "TEF,Transfer error flag" "0,1"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x0 "FCR,flag clear register"
|
|
bitfld.long 0x0 4. "CTOF,Clear timeout flag" "0,1"
|
|
bitfld.long 0x0 3. "CSMF,Clear status match flag" "0,1"
|
|
bitfld.long 0x0 1. "CTCF,Clear transfer complete" "0,1"
|
|
bitfld.long 0x0 0. "CTEF,Clear transfer error flag" "0,1"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "DLR,data length register"
|
|
hexmask.long 0x0 0.--31. 1. "DL,Data length"
|
|
group.long 0x48++0x3
|
|
line.long 0x0 "AR,address register"
|
|
hexmask.long 0x0 0.--31. 1. "ADDRESS,ADDRESS"
|
|
group.long 0x50++0x3
|
|
line.long 0x0 "DR,data register"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Data"
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "PSMKR,polling status mask register"
|
|
hexmask.long 0x0 0.--31. 1. "MASK,Status mask"
|
|
group.long 0x88++0x3
|
|
line.long 0x0 "PSMAR,polling status match register"
|
|
hexmask.long 0x0 0.--31. 1. "MATCH,Status match"
|
|
group.long 0x90++0x3
|
|
line.long 0x0 "PIR,polling interval register"
|
|
hexmask.long.word 0x0 0.--15. 1. "INTERVAL,Polling interval"
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "CCR,communication configuration"
|
|
bitfld.long 0x0 31. "SIOO,Send instruction only once" "0,1"
|
|
bitfld.long 0x0 29. "DQSE,DQS enable" "0,1"
|
|
bitfld.long 0x0 27. "DDTR,Alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 24.--26. "DMODE,Data mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 20.--21. "ABSIZE,Alternate bytes size" "0,1,2,3"
|
|
bitfld.long 0x0 19. "ABDTR,Alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 16.--18. "ABMODE,Alternate byte mode" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "ADSIZE,Address size" "0,1,2,3"
|
|
bitfld.long 0x0 11. "ADDTR,Address double transfer" "0,1"
|
|
bitfld.long 0x0 8.--10. "ADMODE,Address mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 4.--5. "ISIZE,Instruction size" "0,1,2,3"
|
|
bitfld.long 0x0 3. "IDTR,Instruction double transfer" "0,1"
|
|
bitfld.long 0x0 0.--2. "IMODE,Instruction mode" "0,1,2,3,4,5,6,7"
|
|
group.long 0x108++0x3
|
|
line.long 0x0 "TCR,timing configuration register"
|
|
bitfld.long 0x0 30. "SSHIFT,Sample shift" "0,1"
|
|
bitfld.long 0x0 28. "DHQC,Delay hold quarter cycle" "0,1"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DCYC,Number of dummy cycles"
|
|
group.long 0x110++0x3
|
|
line.long 0x0 "IR,instruction register"
|
|
hexmask.long 0x0 0.--31. 1. "INSTRUCTION,INSTRUCTION"
|
|
group.long 0x120++0x3
|
|
line.long 0x0 "ABR,alternate bytes register"
|
|
hexmask.long 0x0 0.--31. 1. "ALTERNATE,Alternate bytes"
|
|
group.long 0x130++0x3
|
|
line.long 0x0 "LPTR,low-power timeout register"
|
|
hexmask.long.word 0x0 0.--15. 1. "TIMEOUT,Timeout period"
|
|
group.long 0x180++0x3
|
|
line.long 0x0 "WCCR,write communication configuration"
|
|
bitfld.long 0x0 31. "SIOO,Send instruction only once" "0,1"
|
|
bitfld.long 0x0 29. "DQSE,DQS enable" "0,1"
|
|
bitfld.long 0x0 27. "DDTR,alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 24.--26. "DMODE,Data mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 20.--21. "ABSIZE,Alternate bytes size" "0,1,2,3"
|
|
bitfld.long 0x0 19. "ABDTR,Alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 16.--18. "ABMODE,Alternate byte mode" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "ADSIZE,Address size" "0,1,2,3"
|
|
bitfld.long 0x0 11. "ADDTR,Address double transfer" "0,1"
|
|
bitfld.long 0x0 8.--10. "ADMODE,Address mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 4.--5. "ISIZE,Instruction size" "0,1,2,3"
|
|
bitfld.long 0x0 3. "IDTR,Instruction double transfer" "0,1"
|
|
bitfld.long 0x0 0.--2. "IMODE,Instruction mode" "0,1,2,3,4,5,6,7"
|
|
group.long 0x188++0x3
|
|
line.long 0x0 "WTCR,write timing configuration"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DCYC,Number of dummy cycles"
|
|
group.long 0x190++0x3
|
|
line.long 0x0 "WIR,write instruction register"
|
|
hexmask.long 0x0 0.--31. 1. "INSTRUCTION,INSTRUCTION"
|
|
group.long 0x1A0++0x3
|
|
line.long 0x0 "WABR,write alternate bytes register"
|
|
hexmask.long 0x0 0.--31. 1. "ALTERNATE,Alternate bytes"
|
|
group.long 0x200++0x3
|
|
line.long 0x0 "HLCR,HyperBusTM latency configuration"
|
|
hexmask.long.byte 0x0 16.--23. 1. "TRWR,Read write recovery time"
|
|
hexmask.long.byte 0x0 8.--15. 1. "TACC,Access time"
|
|
bitfld.long 0x0 1. "WZL,Write zero latency" "0,1"
|
|
bitfld.long 0x0 0. "LM,Latency mode" "0,1"
|
|
rgroup.long 0x3F0++0xF
|
|
line.long 0x0 "HWCFGR,HW configuration register"
|
|
hexmask.long.byte 0x0 28.--31. 1. "MST,Master"
|
|
hexmask.long.byte 0x0 24.--27. 1. "MMW,Memory map write"
|
|
hexmask.long.byte 0x0 20.--23. 1. "IDL,ID Length"
|
|
hexmask.long.byte 0x0 12.--19. 1. "PRES,Prescaler"
|
|
hexmask.long.byte 0x0 4.--11. 1. "FIFO,FIFO depth"
|
|
hexmask.long.byte 0x0 0.--3. 1. "AXI,AXI interface"
|
|
line.long 0x4 "VER,version register"
|
|
hexmask.long.byte 0x4 0.--7. 1. "VER,Version"
|
|
line.long 0x8 "ID,identification"
|
|
hexmask.long 0x8 0.--31. 1. "ID,Identification"
|
|
line.long 0xC "MID,magic ID"
|
|
hexmask.long 0xC 0.--31. 1. "MID,Magic ID"
|
|
tree.end
|
|
endif
|
|
sif (cpuis("STM32L4S9*"))
|
|
tree "OCTOSPI1"
|
|
base ad:0xA0001000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CR,control register"
|
|
bitfld.long 0x0 28.--29. "FMODE,Functional mode" "0,1,2,3"
|
|
bitfld.long 0x0 23. "PMM,Polling match mode" "0,1"
|
|
bitfld.long 0x0 22. "APMS,Automatic poll mode stop" "0,1"
|
|
bitfld.long 0x0 20. "TOIE,TimeOut interrupt enable" "0,1"
|
|
bitfld.long 0x0 19. "SMIE,Status match interrupt" "0,1"
|
|
bitfld.long 0x0 18. "FTIE,FIFO threshold interrupt" "0,1"
|
|
bitfld.long 0x0 17. "TCIE,Transfer complete interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "TEIE,Transfer error interrupt" "0,1"
|
|
hexmask.long.byte 0x0 8.--12. 1. "FTHRES,IFO threshold level"
|
|
bitfld.long 0x0 7. "FSEL,FLASH memory selection" "0,1"
|
|
bitfld.long 0x0 6. "DQM,Dual-quad mode" "0,1"
|
|
bitfld.long 0x0 3. "TCEN,Timeout counter enable" "0,1"
|
|
bitfld.long 0x0 2. "DMAEN,DMA enable" "0,1"
|
|
bitfld.long 0x0 1. "ABORT,Abort request" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x8++0xB
|
|
line.long 0x0 "DCR1,device configuration register"
|
|
bitfld.long 0x0 24.--25. "MTYP,Memory type" "0,1,2,3"
|
|
hexmask.long.byte 0x0 16.--20. 1. "DEVSIZE,Device size"
|
|
bitfld.long 0x0 8.--10. "CSHT,Chip-select high time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 1. "FRCK,Free running clock" "0,1"
|
|
bitfld.long 0x0 0. "CKMODE,Mode 0 / mode 3" "0,1"
|
|
line.long 0x4 "DCR2,device configuration register"
|
|
bitfld.long 0x4 16.--18. "WRAPSIZE,Wrap size" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x4 0.--7. 1. "PRESCALER,Clock prescaler"
|
|
line.long 0x8 "DCR3,device configuration register"
|
|
hexmask.long.byte 0x8 16.--20. 1. "CSBOUND,CS boundary"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "SR,status register"
|
|
hexmask.long.byte 0x0 8.--13. 1. "FLEVEL,FIFO level"
|
|
bitfld.long 0x0 5. "BUSY,BUSY" "0,1"
|
|
bitfld.long 0x0 4. "TOF,Timeout flag" "0,1"
|
|
bitfld.long 0x0 3. "SMF,Status match flag" "0,1"
|
|
bitfld.long 0x0 2. "FTF,FIFO threshold flag" "0,1"
|
|
bitfld.long 0x0 1. "TCF,Transfer complete flag" "0,1"
|
|
bitfld.long 0x0 0. "TEF,Transfer error flag" "0,1"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x0 "FCR,flag clear register"
|
|
bitfld.long 0x0 4. "CTOF,Clear timeout flag" "0,1"
|
|
bitfld.long 0x0 3. "CSMF,Clear status match flag" "0,1"
|
|
bitfld.long 0x0 1. "CTCF,Clear transfer complete" "0,1"
|
|
bitfld.long 0x0 0. "CTEF,Clear transfer error flag" "0,1"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "DLR,data length register"
|
|
hexmask.long 0x0 0.--31. 1. "DL,Data length"
|
|
group.long 0x48++0x3
|
|
line.long 0x0 "AR,address register"
|
|
hexmask.long 0x0 0.--31. 1. "ADDRESS,ADDRESS"
|
|
group.long 0x50++0x3
|
|
line.long 0x0 "DR,data register"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Data"
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "PSMKR,polling status mask register"
|
|
hexmask.long 0x0 0.--31. 1. "MASK,Status mask"
|
|
group.long 0x88++0x3
|
|
line.long 0x0 "PSMAR,polling status match register"
|
|
hexmask.long 0x0 0.--31. 1. "MATCH,Status match"
|
|
group.long 0x90++0x3
|
|
line.long 0x0 "PIR,polling interval register"
|
|
hexmask.long.word 0x0 0.--15. 1. "INTERVAL,Polling interval"
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "CCR,communication configuration"
|
|
bitfld.long 0x0 31. "SIOO,Send instruction only once" "0,1"
|
|
bitfld.long 0x0 29. "DQSE,DQS enable" "0,1"
|
|
bitfld.long 0x0 27. "DDTR,Alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 24.--26. "DMODE,Data mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 20.--21. "ABSIZE,Alternate bytes size" "0,1,2,3"
|
|
bitfld.long 0x0 19. "ABDTR,Alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 16.--18. "ABMODE,Alternate byte mode" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "ADSIZE,Address size" "0,1,2,3"
|
|
bitfld.long 0x0 11. "ADDTR,Address double transfer" "0,1"
|
|
bitfld.long 0x0 8.--10. "ADMODE,Address mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 4.--5. "ISIZE,Instruction size" "0,1,2,3"
|
|
bitfld.long 0x0 3. "IDTR,Instruction double transfer" "0,1"
|
|
bitfld.long 0x0 0.--2. "IMODE,Instruction mode" "0,1,2,3,4,5,6,7"
|
|
group.long 0x108++0x3
|
|
line.long 0x0 "TCR,timing configuration register"
|
|
bitfld.long 0x0 30. "SSHIFT,Sample shift" "0,1"
|
|
bitfld.long 0x0 28. "DHQC,Delay hold quarter cycle" "0,1"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DCYC,Number of dummy cycles"
|
|
group.long 0x110++0x3
|
|
line.long 0x0 "IR,instruction register"
|
|
hexmask.long 0x0 0.--31. 1. "INSTRUCTION,INSTRUCTION"
|
|
group.long 0x120++0x3
|
|
line.long 0x0 "ABR,alternate bytes register"
|
|
hexmask.long 0x0 0.--31. 1. "ALTERNATE,Alternate bytes"
|
|
group.long 0x130++0x3
|
|
line.long 0x0 "LPTR,low-power timeout register"
|
|
hexmask.long.word 0x0 0.--15. 1. "TIMEOUT,Timeout period"
|
|
group.long 0x180++0x3
|
|
line.long 0x0 "WCCR,write communication configuration"
|
|
bitfld.long 0x0 31. "SIOO,Send instruction only once" "0,1"
|
|
bitfld.long 0x0 29. "DQSE,DQS enable" "0,1"
|
|
bitfld.long 0x0 27. "DDTR,alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 24.--26. "DMODE,Data mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 20.--21. "ABSIZE,Alternate bytes size" "0,1,2,3"
|
|
bitfld.long 0x0 19. "ABDTR,Alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 16.--18. "ABMODE,Alternate byte mode" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "ADSIZE,Address size" "0,1,2,3"
|
|
bitfld.long 0x0 11. "ADDTR,Address double transfer" "0,1"
|
|
bitfld.long 0x0 8.--10. "ADMODE,Address mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 4.--5. "ISIZE,Instruction size" "0,1,2,3"
|
|
bitfld.long 0x0 3. "IDTR,Instruction double transfer" "0,1"
|
|
bitfld.long 0x0 0.--2. "IMODE,Instruction mode" "0,1,2,3,4,5,6,7"
|
|
group.long 0x188++0x3
|
|
line.long 0x0 "WTCR,write timing configuration"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DCYC,Number of dummy cycles"
|
|
group.long 0x190++0x3
|
|
line.long 0x0 "WIR,write instruction register"
|
|
hexmask.long 0x0 0.--31. 1. "INSTRUCTION,INSTRUCTION"
|
|
group.long 0x1A0++0x3
|
|
line.long 0x0 "WABR,write alternate bytes register"
|
|
hexmask.long 0x0 0.--31. 1. "ALTERNATE,Alternate bytes"
|
|
group.long 0x200++0x3
|
|
line.long 0x0 "HLCR,HyperBusTM latency configuration"
|
|
hexmask.long.byte 0x0 16.--23. 1. "TRWR,Read write recovery time"
|
|
hexmask.long.byte 0x0 8.--15. 1. "TACC,Access time"
|
|
bitfld.long 0x0 1. "WZL,Write zero latency" "0,1"
|
|
bitfld.long 0x0 0. "LM,Latency mode" "0,1"
|
|
rgroup.long 0x3F0++0xF
|
|
line.long 0x0 "HWCFGR,HW configuration register"
|
|
hexmask.long.byte 0x0 28.--31. 1. "MST,Master"
|
|
hexmask.long.byte 0x0 24.--27. 1. "MMW,Memory map write"
|
|
hexmask.long.byte 0x0 20.--23. 1. "IDL,ID Length"
|
|
hexmask.long.byte 0x0 12.--19. 1. "PRES,Prescaler"
|
|
hexmask.long.byte 0x0 4.--11. 1. "FIFO,FIFO depth"
|
|
hexmask.long.byte 0x0 0.--3. 1. "AXI,AXI interface"
|
|
line.long 0x4 "VER,version register"
|
|
hexmask.long.byte 0x4 0.--7. 1. "VER,Version"
|
|
line.long 0x8 "ID,identification"
|
|
hexmask.long 0x8 0.--31. 1. "ID,Identification"
|
|
line.long 0xC "MID,magic ID"
|
|
hexmask.long 0xC 0.--31. 1. "MID,Magic ID"
|
|
tree.end
|
|
tree "OCTOSPI2"
|
|
base ad:0xA0001400
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CR,control register"
|
|
bitfld.long 0x0 28.--29. "FMODE,Functional mode" "0,1,2,3"
|
|
bitfld.long 0x0 23. "PMM,Polling match mode" "0,1"
|
|
bitfld.long 0x0 22. "APMS,Automatic poll mode stop" "0,1"
|
|
bitfld.long 0x0 20. "TOIE,TimeOut interrupt enable" "0,1"
|
|
bitfld.long 0x0 19. "SMIE,Status match interrupt" "0,1"
|
|
bitfld.long 0x0 18. "FTIE,FIFO threshold interrupt" "0,1"
|
|
bitfld.long 0x0 17. "TCIE,Transfer complete interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "TEIE,Transfer error interrupt" "0,1"
|
|
hexmask.long.byte 0x0 8.--12. 1. "FTHRES,IFO threshold level"
|
|
bitfld.long 0x0 7. "FSEL,FLASH memory selection" "0,1"
|
|
bitfld.long 0x0 6. "DQM,Dual-quad mode" "0,1"
|
|
bitfld.long 0x0 3. "TCEN,Timeout counter enable" "0,1"
|
|
bitfld.long 0x0 2. "DMAEN,DMA enable" "0,1"
|
|
bitfld.long 0x0 1. "ABORT,Abort request" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "EN,Enable" "0,1"
|
|
group.long 0x8++0xB
|
|
line.long 0x0 "DCR1,device configuration register"
|
|
bitfld.long 0x0 24.--25. "MTYP,Memory type" "0,1,2,3"
|
|
hexmask.long.byte 0x0 16.--20. 1. "DEVSIZE,Device size"
|
|
bitfld.long 0x0 8.--10. "CSHT,Chip-select high time" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 1. "FRCK,Free running clock" "0,1"
|
|
bitfld.long 0x0 0. "CKMODE,Mode 0 / mode 3" "0,1"
|
|
line.long 0x4 "DCR2,device configuration register"
|
|
bitfld.long 0x4 16.--18. "WRAPSIZE,Wrap size" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x4 0.--7. 1. "PRESCALER,Clock prescaler"
|
|
line.long 0x8 "DCR3,device configuration register"
|
|
hexmask.long.byte 0x8 16.--20. 1. "CSBOUND,CS boundary"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "SR,status register"
|
|
hexmask.long.byte 0x0 8.--13. 1. "FLEVEL,FIFO level"
|
|
bitfld.long 0x0 5. "BUSY,BUSY" "0,1"
|
|
bitfld.long 0x0 4. "TOF,Timeout flag" "0,1"
|
|
bitfld.long 0x0 3. "SMF,Status match flag" "0,1"
|
|
bitfld.long 0x0 2. "FTF,FIFO threshold flag" "0,1"
|
|
bitfld.long 0x0 1. "TCF,Transfer complete flag" "0,1"
|
|
bitfld.long 0x0 0. "TEF,Transfer error flag" "0,1"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x0 "FCR,flag clear register"
|
|
bitfld.long 0x0 4. "CTOF,Clear timeout flag" "0,1"
|
|
bitfld.long 0x0 3. "CSMF,Clear status match flag" "0,1"
|
|
bitfld.long 0x0 1. "CTCF,Clear transfer complete" "0,1"
|
|
bitfld.long 0x0 0. "CTEF,Clear transfer error flag" "0,1"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "DLR,data length register"
|
|
hexmask.long 0x0 0.--31. 1. "DL,Data length"
|
|
group.long 0x48++0x3
|
|
line.long 0x0 "AR,address register"
|
|
hexmask.long 0x0 0.--31. 1. "ADDRESS,ADDRESS"
|
|
group.long 0x50++0x3
|
|
line.long 0x0 "DR,data register"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Data"
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "PSMKR,polling status mask register"
|
|
hexmask.long 0x0 0.--31. 1. "MASK,Status mask"
|
|
group.long 0x88++0x3
|
|
line.long 0x0 "PSMAR,polling status match register"
|
|
hexmask.long 0x0 0.--31. 1. "MATCH,Status match"
|
|
group.long 0x90++0x3
|
|
line.long 0x0 "PIR,polling interval register"
|
|
hexmask.long.word 0x0 0.--15. 1. "INTERVAL,Polling interval"
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "CCR,communication configuration"
|
|
bitfld.long 0x0 31. "SIOO,Send instruction only once" "0,1"
|
|
bitfld.long 0x0 29. "DQSE,DQS enable" "0,1"
|
|
bitfld.long 0x0 27. "DDTR,Alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 24.--26. "DMODE,Data mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 20.--21. "ABSIZE,Alternate bytes size" "0,1,2,3"
|
|
bitfld.long 0x0 19. "ABDTR,Alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 16.--18. "ABMODE,Alternate byte mode" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "ADSIZE,Address size" "0,1,2,3"
|
|
bitfld.long 0x0 11. "ADDTR,Address double transfer" "0,1"
|
|
bitfld.long 0x0 8.--10. "ADMODE,Address mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 4.--5. "ISIZE,Instruction size" "0,1,2,3"
|
|
bitfld.long 0x0 3. "IDTR,Instruction double transfer" "0,1"
|
|
bitfld.long 0x0 0.--2. "IMODE,Instruction mode" "0,1,2,3,4,5,6,7"
|
|
group.long 0x108++0x3
|
|
line.long 0x0 "TCR,timing configuration register"
|
|
bitfld.long 0x0 30. "SSHIFT,Sample shift" "0,1"
|
|
bitfld.long 0x0 28. "DHQC,Delay hold quarter cycle" "0,1"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DCYC,Number of dummy cycles"
|
|
group.long 0x110++0x3
|
|
line.long 0x0 "IR,instruction register"
|
|
hexmask.long 0x0 0.--31. 1. "INSTRUCTION,INSTRUCTION"
|
|
group.long 0x120++0x3
|
|
line.long 0x0 "ABR,alternate bytes register"
|
|
hexmask.long 0x0 0.--31. 1. "ALTERNATE,Alternate bytes"
|
|
group.long 0x130++0x3
|
|
line.long 0x0 "LPTR,low-power timeout register"
|
|
hexmask.long.word 0x0 0.--15. 1. "TIMEOUT,Timeout period"
|
|
group.long 0x180++0x3
|
|
line.long 0x0 "WCCR,write communication configuration"
|
|
bitfld.long 0x0 31. "SIOO,Send instruction only once" "0,1"
|
|
bitfld.long 0x0 29. "DQSE,DQS enable" "0,1"
|
|
bitfld.long 0x0 27. "DDTR,alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 24.--26. "DMODE,Data mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 20.--21. "ABSIZE,Alternate bytes size" "0,1,2,3"
|
|
bitfld.long 0x0 19. "ABDTR,Alternate bytes double transfer" "0,1"
|
|
bitfld.long 0x0 16.--18. "ABMODE,Alternate byte mode" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "ADSIZE,Address size" "0,1,2,3"
|
|
bitfld.long 0x0 11. "ADDTR,Address double transfer" "0,1"
|
|
bitfld.long 0x0 8.--10. "ADMODE,Address mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 4.--5. "ISIZE,Instruction size" "0,1,2,3"
|
|
bitfld.long 0x0 3. "IDTR,Instruction double transfer" "0,1"
|
|
bitfld.long 0x0 0.--2. "IMODE,Instruction mode" "0,1,2,3,4,5,6,7"
|
|
group.long 0x188++0x3
|
|
line.long 0x0 "WTCR,write timing configuration"
|
|
hexmask.long.byte 0x0 0.--4. 1. "DCYC,Number of dummy cycles"
|
|
group.long 0x190++0x3
|
|
line.long 0x0 "WIR,write instruction register"
|
|
hexmask.long 0x0 0.--31. 1. "INSTRUCTION,INSTRUCTION"
|
|
group.long 0x1A0++0x3
|
|
line.long 0x0 "WABR,write alternate bytes register"
|
|
hexmask.long 0x0 0.--31. 1. "ALTERNATE,Alternate bytes"
|
|
group.long 0x200++0x3
|
|
line.long 0x0 "HLCR,HyperBusTM latency configuration"
|
|
hexmask.long.byte 0x0 16.--23. 1. "TRWR,Read write recovery time"
|
|
hexmask.long.byte 0x0 8.--15. 1. "TACC,Access time"
|
|
bitfld.long 0x0 1. "WZL,Write zero latency" "0,1"
|
|
bitfld.long 0x0 0. "LM,Latency mode" "0,1"
|
|
rgroup.long 0x3F0++0xF
|
|
line.long 0x0 "HWCFGR,HW configuration register"
|
|
hexmask.long.byte 0x0 28.--31. 1. "MST,Master"
|
|
hexmask.long.byte 0x0 24.--27. 1. "MMW,Memory map write"
|
|
hexmask.long.byte 0x0 20.--23. 1. "IDL,ID Length"
|
|
hexmask.long.byte 0x0 12.--19. 1. "PRES,Prescaler"
|
|
hexmask.long.byte 0x0 4.--11. 1. "FIFO,FIFO depth"
|
|
hexmask.long.byte 0x0 0.--3. 1. "AXI,AXI interface"
|
|
line.long 0x4 "VER,version register"
|
|
hexmask.long.byte 0x4 0.--7. 1. "VER,Version"
|
|
line.long 0x8 "ID,identification"
|
|
hexmask.long 0x8 0.--31. 1. "ID,Identification"
|
|
line.long 0xC "MID,magic ID"
|
|
hexmask.long 0xC 0.--31. 1. "MID,Magic ID"
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
tree "OCTOSPIM (Octo-SPI Manager)"
|
|
base ad:0x50061C00
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "P1CR,OctoSPI IO Manager Port 1 Configuration"
|
|
bitfld.long 0x0 25.--26. "IOHSRC,Source for Port" "0,1,2,3"
|
|
bitfld.long 0x0 24. "IOHEN,Enable for Port n" "0,1"
|
|
bitfld.long 0x0 17.--18. "IOLSRC,Source for Port" "0,1,2,3"
|
|
bitfld.long 0x0 16. "IOLEN,Enable for Port" "0,1"
|
|
bitfld.long 0x0 9. "NCSSRC,CS Source for Port" "0,1"
|
|
bitfld.long 0x0 8. "NCSEN,CS Enable for Port" "0,1"
|
|
bitfld.long 0x0 5. "DQSSRC,DQS Source for Port" "0,1"
|
|
bitfld.long 0x0 4. "DQSEN,DQS Enable for Port" "0,1"
|
|
bitfld.long 0x0 1. "CLKSRC,CLK/CLK Source for Port" "0,1"
|
|
bitfld.long 0x0 0. "CLKEN,CLK/CLK Enable for Port" "0,1"
|
|
line.long 0x4 "P2CR,OctoSPI IO Manager Port 2 Configuration"
|
|
bitfld.long 0x4 25.--26. "IOHSRC,Source for Port" "0,1,2,3"
|
|
bitfld.long 0x4 24. "IOHEN,Enable for Port n" "0,1"
|
|
bitfld.long 0x4 17.--18. "IOLSRC,Source for Port" "0,1,2,3"
|
|
bitfld.long 0x4 16. "IOLEN,Enable for Port" "0,1"
|
|
bitfld.long 0x4 9. "NCSSRC,CS Source for Port" "0,1"
|
|
bitfld.long 0x4 8. "NCSEN,CS Enable for Port" "0,1"
|
|
bitfld.long 0x4 5. "DQSSRC,DQS Source for Port" "0,1"
|
|
bitfld.long 0x4 4. "DQSEN,DQS Enable for Port" "0,1"
|
|
bitfld.long 0x4 1. "CLKSRC,CLK/CLK Source for Port" "0,1"
|
|
bitfld.long 0x4 0. "CLKEN,CLK/CLK Enable for Port" "0,1"
|
|
tree.end
|
|
tree "OPAMP (Operational Amplifiers)"
|
|
base ad:0x40007800
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "OPAMP1_CSR,OPAMP1 control/status register"
|
|
bitfld.long 0x0 31. "OPA_RANGE,Operational amplifier power supply range" "0,1"
|
|
bitfld.long 0x0 15. "CALOUT,Operational amplifier calibration" "0,1"
|
|
bitfld.long 0x0 14. "USERTRIM,allows to switch from AOP offset trimmed" "0,1"
|
|
bitfld.long 0x0 13. "CALSEL,Calibration selection" "0,1"
|
|
bitfld.long 0x0 12. "CALON,Calibration mode enabled" "0,1"
|
|
bitfld.long 0x0 10. "VP_SEL,Non inverted input" "0,1"
|
|
bitfld.long 0x0 8.--9. "VM_SEL,Inverting input selection" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 4.--5. "PGA_GAIN,Operational amplifier Programmable" "0,1,2,3"
|
|
bitfld.long 0x0 2.--3. "OPAMODE,Operational amplifier PGA" "0,1,2,3"
|
|
bitfld.long 0x0 1. "OPALPM,Operational amplifier Low Power" "0,1"
|
|
bitfld.long 0x0 0. "OPAEN,Operational amplifier" "0,1"
|
|
line.long 0x4 "OPAMP1_OTR,OPAMP1 offset trimming register in normal"
|
|
hexmask.long.byte 0x4 8.--12. 1. "TRIMOFFSETP,Trim for PMOS differential"
|
|
hexmask.long.byte 0x4 0.--4. 1. "TRIMOFFSETN,Trim for NMOS differential"
|
|
line.long 0x8 "OPAMP1_LPOTR,OPAMP1 offset trimming register in low-power"
|
|
hexmask.long.byte 0x8 8.--12. 1. "TRIMLPOFFSETP,Trim for PMOS differential"
|
|
hexmask.long.byte 0x8 0.--4. 1. "TRIMLPOFFSETN,Trim for NMOS differential"
|
|
group.long 0x10++0xB
|
|
line.long 0x0 "OPAMP2_CSR,OPAMP2 control/status register"
|
|
bitfld.long 0x0 15. "CALOUT,Operational amplifier calibration" "0,1"
|
|
bitfld.long 0x0 14. "USERTRIM,allows to switch from AOP offset trimmed" "0,1"
|
|
bitfld.long 0x0 13. "CALSEL,Calibration selection" "0,1"
|
|
bitfld.long 0x0 12. "CALON,Calibration mode enabled" "0,1"
|
|
bitfld.long 0x0 10. "VP_SEL,Non inverted input" "0,1"
|
|
bitfld.long 0x0 8.--9. "VM_SEL,Inverting input selection" "0,1,2,3"
|
|
bitfld.long 0x0 4.--5. "PGA_GAIN,Operational amplifier Programmable" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "OPAMODE,Operational amplifier PGA" "0,1,2,3"
|
|
bitfld.long 0x0 1. "OPALPM,Operational amplifier Low Power" "0,1"
|
|
bitfld.long 0x0 0. "OPAEN,Operational amplifier" "0,1"
|
|
line.long 0x4 "OPAMP2_OTR,OPAMP2 offset trimming register in normal"
|
|
hexmask.long.byte 0x4 8.--12. 1. "TRIMOFFSETP,Trim for PMOS differential"
|
|
hexmask.long.byte 0x4 0.--4. 1. "TRIMOFFSETN,Trim for NMOS differential"
|
|
line.long 0x8 "OPAMP2_LPOTR,OPAMP2 offset trimming register in low-power"
|
|
hexmask.long.byte 0x8 8.--12. 1. "TRIMLPOFFSETP,Trim for PMOS differential"
|
|
hexmask.long.byte 0x8 0.--4. 1. "TRIMLPOFFSETN,Trim for NMOS differential"
|
|
tree.end
|
|
tree "PWR (Power Control)"
|
|
base ad:0x40007000
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "PWR_CR1,Power control register 1"
|
|
bitfld.long 0x0 14. "LPR,Low-power run" "0,1"
|
|
bitfld.long 0x0 9.--10. "VOS,Voltage scaling range selection" "0: Cannot be written (forbidden by hardware),1: Range 1,2: Range 2,3: Cannot be written (forbidden by hardware)"
|
|
newline
|
|
bitfld.long 0x0 8. "DBP,Disable backup domain write protection" "0: Access to RTC and Backup registers disabled,1: Access to RTC and Backup registers enabled"
|
|
bitfld.long 0x0 4. "RRSTP,SRAM3 retention in Stop 2 mode" "0: SRAM3 is powered off in Stop 2 mode (SRAM3..,1: SRAM3 is powered in Stop 2 mode (RAM3 content is.."
|
|
newline
|
|
bitfld.long 0x0 0.--2. "LPMS,Low-power mode selection" "0: Stop 0 mode,1: Stop 1 mode,2: Stop 2 mode,3: Standby mode,?,?,?,?"
|
|
line.long 0x4 "PWR_CR2,Power control register 2"
|
|
bitfld.long 0x4 10. "USV,V<sub>DDUSB</sub> USB supply valid" "0: V<sub>DDUSB</sub> is not present. Logical and..,1: V<sub>DDUSB</sub> is valid."
|
|
bitfld.long 0x4 9. "IOSV,V<sub>DDIO2</sub> Independent I/Os supply valid" "0: V<sub>DDIO2</sub> is not present. Logical and..,1: V<sub>DDIO2</sub> is valid."
|
|
newline
|
|
bitfld.long 0x4 7. "PVME4,Peripheral voltage monitoring 4 enable: V<sub>DDA</sub> vs. 2.2V" "0: PVM4 (V<sub>DDA</sub> monitoring vs. 2.2V..,1: PVM4 (V<sub>DDA</sub> monitoring vs. 2.2V.."
|
|
bitfld.long 0x4 6. "PVME3,Peripheral voltage monitoring 3 enable: V<sub>DDA</sub> vs. 1.62V" "0: PVM3 (V<sub>DDA</sub> monitoring vs. 1.62V..,1: PVM3 (V<sub>DDA</sub> monitoring vs. 1.62V.."
|
|
newline
|
|
bitfld.long 0x4 5. "PVME2,Peripheral voltage monitoring 2 enable: V<sub>DDIO2</sub> vs. 0.9V" "0: PVM2 (V<sub>DDIO2</sub> monitoring vs. 0.9V..,1: PVM2 (V<sub>DDIO2</sub> monitoring vs. 0.9V.."
|
|
bitfld.long 0x4 4. "PVME1,Peripheral voltage monitoring 1 enable: V<sub>DDUSB</sub> vs. 1.2V" "0: PVM1 (V<sub>DDUSB</sub> monitoring vs. 1.2V..,1: PVM1 (V<sub>DDUSB</sub> monitoring vs. 1.2V.."
|
|
newline
|
|
bitfld.long 0x4 1.--3. "PLS,Power voltage detector level selection." "0: V<sub>PVD0</sub> around 2.0 V,1: V<sub>PVD1</sub> around 2.2 V,2: V<sub>PVD2</sub> around 2.4 V,3: V<sub>PVD3</sub> around 2.5 V,4: V<sub>PVD4</sub> around 2.6 V,5: V<sub>PVD5</sub> around 2.8 V,6: V<sub>PVD6</sub> around 2.9 V,7: External input analog voltage PVD_IN (compared.."
|
|
bitfld.long 0x4 0. "PVDE,Power voltage detector enable" "0: Power voltage detector disable.,1: Power voltage detector enable."
|
|
line.long 0x8 "PWR_CR3,Power control register 3"
|
|
bitfld.long 0x8 15. "EIWUL,Enable internal wakeup line" "0: Internal wakeup line disable.,1: Internal wakeup line enable."
|
|
bitfld.long 0x8 12. "DSIPDEN,Enable Pull-down activation on DSI pins" "0: Pull-Down is disabled on DSI pins.,1: Pull-Down is enabled on DSI pins."
|
|
newline
|
|
bitfld.long 0x8 11. "ENULP,Enable ULP sampling" "0,1"
|
|
bitfld.long 0x8 10. "APC,Apply pull-up and pull-down configuration" "0,1"
|
|
newline
|
|
bitfld.long 0x8 8.--9. "RRS,SRAM2 retention in Standby mode" "0: SRAM2 is powered off in Standby mode (SRAM2..,1: Full SRAM2 is powered by the low-power regulator..,2: Only 4 Kbytes of SRAM2 is powered by the..,?"
|
|
bitfld.long 0x8 4. "EWUP5,Enable Wakeup pin WKUP5" "0,1"
|
|
newline
|
|
bitfld.long 0x8 3. "EWUP4,Enable Wakeup pin WKUP4" "0,1"
|
|
bitfld.long 0x8 2. "EWUP3,Enable Wakeup pin WKUP3" "0,1"
|
|
newline
|
|
bitfld.long 0x8 1. "EWUP2,Enable Wakeup pin WKUP2" "0,1"
|
|
bitfld.long 0x8 0. "EWUP1,Enable Wakeup pin WKUP1" "0,1"
|
|
line.long 0xC "PWR_CR4,Power control register 4"
|
|
bitfld.long 0xC 13. "EXT_SMPS_ON,external SMPS on." "0: the external SMPS switch is open.,1: the external SMPS switch is closed internal.."
|
|
bitfld.long 0xC 9. "VBRS,V<sub>BAT</sub> battery charging resistor selection" "0: Charge V<sub>BAT</sub> through a 5 kOhms resistor,1: Charge V<sub>BAT</sub> through a 1.5 kOhms.."
|
|
newline
|
|
bitfld.long 0xC 8. "VBE,V<sub>BAT</sub> battery charging enable" "0: V<sub>BAT</sub> battery charging disable,1: V<sub>BAT</sub> battery charging enable"
|
|
bitfld.long 0xC 4. "WP5,Wakeup pin WKUP5 polarity" "0: Detection on high level (rising edge),1: Detection on low level (falling edge)"
|
|
newline
|
|
bitfld.long 0xC 3. "WP4,Wakeup pin WKUP4 polarity" "0: Detection on high level (rising edge),1: Detection on low level (falling edge)"
|
|
bitfld.long 0xC 2. "WP3,Wakeup pin WKUP3 polarity" "0: Detection on high level (rising edge),1: Detection on low level (falling edge)"
|
|
newline
|
|
bitfld.long 0xC 1. "WP2,Wakeup pin WKUP2 polarity" "0: Detection on high level (rising edge),1: Detection on low level (falling edge)"
|
|
bitfld.long 0xC 0. "WP1,Wakeup pin WKUP1 polarity" "0: Detection on high level (rising edge),1: Detection on low level (falling edge)"
|
|
rgroup.long 0x10++0x7
|
|
line.long 0x0 "PWR_SR1,Power status register 1"
|
|
bitfld.long 0x0 15. "WUFI,Wakeup flag internal" "0,1"
|
|
bitfld.long 0x0 13. "EXT_SMPS_RDY,External SMPS ready" "0: Internal regulator not ready in Range 2 the..,1: Internal regulator ready in Range 2 the external.."
|
|
newline
|
|
bitfld.long 0x0 8. "SBF,Standby flag" "0: The device did not enter the Standby mode,1: The device entered the Standby mode"
|
|
bitfld.long 0x0 4. "WUF5,Wakeup flag 5" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "WUF4,Wakeup flag 4" "0,1"
|
|
bitfld.long 0x0 2. "WUF3,Wakeup flag 3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "WUF2,Wakeup flag 2" "0,1"
|
|
bitfld.long 0x0 0. "WUF1,Wakeup flag 1" "0,1"
|
|
line.long 0x4 "PWR_SR2,Power status register 2"
|
|
bitfld.long 0x4 15. "PVMO4,Peripheral voltage monitoring output: V<sub>DDA</sub> vs. 2.2 V" "0: V<sub>DDA</sub> voltage is above PVM4 threshold..,1: V<sub>DDA</sub> voltage is below PVM4 threshold.."
|
|
bitfld.long 0x4 14. "PVMO3,Peripheral voltage monitoring output: V<sub>DDA</sub> vs. 1.62 V" "0: V<sub>DDA</sub> voltage is above PVM3 threshold..,1: V<sub>DDA</sub> voltage is below PVM3 threshold.."
|
|
newline
|
|
bitfld.long 0x4 13. "PVMO2,Peripheral voltage monitoring output: V<sub>DDIO2</sub> vs. 0.9 V" "0: V<sub>DDIO2</sub> voltage is above PVM2..,1: V<sub>DDIO2</sub> voltage is below PVM2.."
|
|
bitfld.long 0x4 12. "PVMO1,Peripheral voltage monitoring output: V<sub>DDUSB</sub> vs. 1.2 V" "0: V<sub>DDUSB</sub> voltage is above PVM1..,1: V<sub>DDUSB</sub> voltage is below PVM1.."
|
|
newline
|
|
bitfld.long 0x4 11. "PVDO,Power voltage detector output" "0: V<sub>DD</sub> is above the selected PVD threshold,1: V<sub>DD</sub> is below the selected PVD threshold"
|
|
bitfld.long 0x4 10. "VOSF,Voltage scaling flag" "0: The regulator is ready in the selected voltage..,1: The regulator output voltage is changing to the.."
|
|
newline
|
|
bitfld.long 0x4 9. "REGLPF,Low-power regulator flag" "0: The regulator is ready in main mode (MR),1: The regulator is in low-power mode (LPR)"
|
|
bitfld.long 0x4 8. "REGLPS,Low-power regulator started" "0: The low-power regulator is not ready,1: The low-power regulator is ready"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x0 "PWR_SCR,Power status clear register"
|
|
bitfld.long 0x0 8. "CSBF,Clear standby flag" "0,1"
|
|
bitfld.long 0x0 4. "CWUF5,Clear wakeup flag 5" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CWUF4,Clear wakeup flag 4" "0,1"
|
|
bitfld.long 0x0 2. "CWUF3,Clear wakeup flag 3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CWUF2,Clear wakeup flag 2" "0,1"
|
|
bitfld.long 0x0 0. "CWUF1,Clear wakeup flag 1" "0,1"
|
|
group.long 0x20++0x1F
|
|
line.long 0x0 "PWR_PUCRA,Power Port A pull-up control register"
|
|
bitfld.long 0x0 15. "PU15,Port A pull-up bit 15" "0,1"
|
|
bitfld.long 0x0 13. "PU13,Port A pull-up bit y (y=0...13)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "PU12,Port A pull-up bit y (y=0...13)" "0,1"
|
|
bitfld.long 0x0 11. "PU11,Port A pull-up bit y (y=0...13)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "PU10,Port A pull-up bit y (y=0...13)" "0,1"
|
|
bitfld.long 0x0 9. "PU9,Port A pull-up bit y (y=0...13)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "PU8,Port A pull-up bit y (y=0...13)" "0,1"
|
|
bitfld.long 0x0 7. "PU7,Port A pull-up bit y (y=0...13)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "PU6,Port A pull-up bit y (y=0...13)" "0,1"
|
|
bitfld.long 0x0 5. "PU5,Port A pull-up bit y (y=0...13)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "PU4,Port A pull-up bit y (y=0...13)" "0,1"
|
|
bitfld.long 0x0 3. "PU3,Port A pull-up bit y (y=0...13)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "PU2,Port A pull-up bit y (y=0...13)" "0,1"
|
|
bitfld.long 0x0 1. "PU1,Port A pull-up bit y (y=0...13)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "PU0,Port A pull-up bit y (y=0...13)" "0,1"
|
|
line.long 0x4 "PWR_PDCRA,Power Port A pull-down control register"
|
|
bitfld.long 0x4 14. "PD14,Port A pull-down bit 14" "0,1"
|
|
bitfld.long 0x4 12. "PD12,Port A pull-down bit y (y=0..12)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "PD11,Port A pull-down bit y (y=0..12)" "0,1"
|
|
bitfld.long 0x4 10. "PD10,Port A pull-down bit y (y=0..12)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "PD9,Port A pull-down bit y (y=0..12)" "0,1"
|
|
bitfld.long 0x4 8. "PD8,Port A pull-down bit y (y=0..12)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "PD7,Port A pull-down bit y (y=0..12)" "0,1"
|
|
bitfld.long 0x4 6. "PD6,Port A pull-down bit y (y=0..12)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "PD5,Port A pull-down bit y (y=0..12)" "0,1"
|
|
bitfld.long 0x4 4. "PD4,Port A pull-down bit y (y=0..12)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "PD3,Port A pull-down bit y (y=0..12)" "0,1"
|
|
bitfld.long 0x4 2. "PD2,Port A pull-down bit y (y=0..12)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "PD1,Port A pull-down bit y (y=0..12)" "0,1"
|
|
bitfld.long 0x4 0. "PD0,Port A pull-down bit y (y=0..12)" "0,1"
|
|
line.long 0x8 "PWR_PUCRB,Power Port B pull-up control register"
|
|
bitfld.long 0x8 15. "PU15,Port B pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x8 14. "PU14,Port B pull-up bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x8 13. "PU13,Port B pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x8 12. "PU12,Port B pull-up bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x8 11. "PU11,Port B pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x8 10. "PU10,Port B pull-up bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x8 9. "PU9,Port B pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x8 8. "PU8,Port B pull-up bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x8 7. "PU7,Port B pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x8 6. "PU6,Port B pull-up bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x8 5. "PU5,Port B pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x8 4. "PU4,Port B pull-up bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x8 3. "PU3,Port B pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x8 2. "PU2,Port B pull-up bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x8 1. "PU1,Port B pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x8 0. "PU0,Port B pull-up bit y (y=0..15)" "0,1"
|
|
line.long 0xC "PWR_PDCRB,Power Port B pull-down control register"
|
|
bitfld.long 0xC 15. "PD15,Port B pull-down bit y (y=5..15)" "0,1"
|
|
bitfld.long 0xC 14. "PD14,Port B pull-down bit y (y=5..15)" "0,1"
|
|
newline
|
|
bitfld.long 0xC 13. "PD13,Port B pull-down bit y (y=5..15)" "0,1"
|
|
bitfld.long 0xC 12. "PD12,Port B pull-down bit y (y=5..15)" "0,1"
|
|
newline
|
|
bitfld.long 0xC 11. "PD11,Port B pull-down bit y (y=5..15)" "0,1"
|
|
bitfld.long 0xC 10. "PD10,Port B pull-down bit y (y=5..15)" "0,1"
|
|
newline
|
|
bitfld.long 0xC 9. "PD9,Port B pull-down bit y (y=5..15)" "0,1"
|
|
bitfld.long 0xC 8. "PD8,Port B pull-down bit y (y=5..15)" "0,1"
|
|
newline
|
|
bitfld.long 0xC 7. "PD7,Port B pull-down bit y (y=5..15)" "0,1"
|
|
bitfld.long 0xC 6. "PD6,Port B pull-down bit y (y=5..15)" "0,1"
|
|
newline
|
|
bitfld.long 0xC 5. "PD5,Port B pull-down bit y (y=5..15)" "0,1"
|
|
bitfld.long 0xC 3. "PD3,Port B pull-down bit y (y=0..3)" "0,1"
|
|
newline
|
|
bitfld.long 0xC 2. "PD2,Port B pull-down bit y (y=0..3)" "0,1"
|
|
bitfld.long 0xC 1. "PD1,Port B pull-down bit y (y=0..3)" "0,1"
|
|
newline
|
|
bitfld.long 0xC 0. "PD0,Port B pull-down bit y (y=0..3)" "0,1"
|
|
line.long 0x10 "PWR_PUCRC,Power Port C pull-up control register"
|
|
bitfld.long 0x10 15. "PU15,Port C pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x10 14. "PU14,Port C pull-up bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x10 13. "PU13,Port C pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x10 12. "PU12,Port C pull-up bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x10 11. "PU11,Port C pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x10 10. "PU10,Port C pull-up bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x10 9. "PU9,Port C pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x10 8. "PU8,Port C pull-up bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x10 7. "PU7,Port C pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x10 6. "PU6,Port C pull-up bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x10 5. "PU5,Port C pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x10 4. "PU4,Port C pull-up bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x10 3. "PU3,Port C pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x10 2. "PU2,Port C pull-up bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x10 1. "PU1,Port C pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x10 0. "PU0,Port C pull-up bit y (y=0..15)" "0,1"
|
|
line.long 0x14 "PWR_PDCRC,Power Port C pull-down control register"
|
|
bitfld.long 0x14 15. "PD15,Port C pull-down bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x14 14. "PD14,Port C pull-down bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x14 13. "PD13,Port C pull-down bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x14 12. "PD12,Port C pull-down bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x14 11. "PD11,Port C pull-down bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x14 10. "PD10,Port C pull-down bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x14 9. "PD9,Port C pull-down bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x14 8. "PD8,Port C pull-down bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x14 7. "PD7,Port C pull-down bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x14 6. "PD6,Port C pull-down bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x14 5. "PD5,Port C pull-down bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x14 4. "PD4,Port C pull-down bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x14 3. "PD3,Port C pull-down bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x14 2. "PD2,Port C pull-down bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x14 1. "PD1,Port C pull-down bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x14 0. "PD0,Port C pull-down bit y (y=0..15)" "0,1"
|
|
line.long 0x18 "PWR_PUCRD,Power Port D pull-up control register"
|
|
bitfld.long 0x18 15. "PU15,Port D pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x18 14. "PU14,Port D pull-up bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x18 13. "PU13,Port D pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x18 12. "PU12,Port D pull-up bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x18 11. "PU11,Port D pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x18 10. "PU10,Port D pull-up bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x18 9. "PU9,Port D pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x18 8. "PU8,Port D pull-up bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x18 7. "PU7,Port D pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x18 6. "PU6,Port D pull-up bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x18 5. "PU5,Port D pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x18 4. "PU4,Port D pull-up bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x18 3. "PU3,Port D pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x18 2. "PU2,Port D pull-up bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x18 1. "PU1,Port D pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x18 0. "PU0,Port D pull-up bit y (y=0..15)" "0,1"
|
|
line.long 0x1C "PWR_PDCRD,Power Port D pull-down control register"
|
|
bitfld.long 0x1C 15. "PD15,Port D pull-down bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x1C 14. "PD14,Port D pull-down bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 13. "PD13,Port D pull-down bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x1C 12. "PD12,Port D pull-down bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 11. "PD11,Port D pull-down bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x1C 10. "PD10,Port D pull-down bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 9. "PD9,Port D pull-down bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x1C 8. "PD8,Port D pull-down bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 7. "PD7,Port D pull-down bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x1C 6. "PD6,Port D pull-down bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 5. "PD5,Port D pull-down bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x1C 4. "PD4,Port D pull-down bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 3. "PD3,Port D pull-down bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x1C 2. "PD2,Port D pull-down bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 1. "PD1,Port D pull-down bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x1C 0. "PD0,Port D pull-down bit y (y=0..15)" "0,1"
|
|
group.long 0x44++0x23
|
|
line.long 0x0 "PWR_PDCRE,Power Port E pull-down control register"
|
|
bitfld.long 0x0 15. "PD15,Port E pull-down bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x0 14. "PD14,Port E pull-down bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "PD13,Port E pull-down bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x0 12. "PD12,Port E pull-down bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "PD11,Port E pull-down bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x0 10. "PD10,Port E pull-down bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "PD9,Port E pull-down bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x0 8. "PD8,Port E pull-down bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PD7,Port E pull-down bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x0 6. "PD6,Port E pull-down bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "PD5,Port E pull-down bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x0 4. "PD4,Port E pull-down bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "PD3,Port E pull-down bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x0 2. "PD2,Port E pull-down bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "PD1,Port E pull-down bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x0 0. "PD0,Port E pull-down bit y (y=0..15)" "0,1"
|
|
line.long 0x4 "PWR_PUCRF,Power Port F pull-up control register"
|
|
bitfld.long 0x4 15. "PU15,Port F pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x4 14. "PU14,Port F pull-up bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "PU13,Port F pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x4 12. "PU12,Port F pull-up bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "PU11,Port F pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x4 10. "PU10,Port F pull-up bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "PU9,Port F pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x4 8. "PU8,Port F pull-up bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "PU7,Port F pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x4 6. "PU6,Port F pull-up bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "PU5,Port F pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x4 4. "PU4,Port F pull-up bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "PU3,Port F pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x4 2. "PU2,Port F pull-up bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "PU1,Port F pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x4 0. "PU0,Port F pull-up bit y (y=0..15)" "0,1"
|
|
line.long 0x8 "PWR_PDCRF,Power Port F pull-down control register"
|
|
bitfld.long 0x8 15. "PD15,Port F pull-down bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x8 14. "PD14,Port F pull-down bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x8 13. "PD13,Port F pull-down bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x8 12. "PD12,Port F pull-down bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x8 11. "PD11,Port F pull-down bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x8 10. "PD10,Port F pull-down bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x8 9. "PD9,Port F pull-down bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x8 8. "PD8,Port F pull-down bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x8 7. "PD7,Port F pull-down bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x8 6. "PD6,Port F pull-down bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x8 5. "PD5,Port F pull-down bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x8 4. "PD4,Port F pull-down bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x8 3. "PD3,Port F pull-down bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x8 2. "PD2,Port F pull-down bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x8 1. "PD1,Port F pull-down bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x8 0. "PD0,Port F pull-down bit y (y=0..15)" "0,1"
|
|
line.long 0xC "PWR_PUCRG,Power Port G pull-up control register"
|
|
bitfld.long 0xC 15. "PU15,Port G pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0xC 14. "PU14,Port G pull-up bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0xC 13. "PU13,Port G pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0xC 12. "PU12,Port G pull-up bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0xC 11. "PU11,Port G pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0xC 10. "PU10,Port G pull-up bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0xC 9. "PU9,Port G pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0xC 8. "PU8,Port G pull-up bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0xC 7. "PU7,Port G pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0xC 6. "PU6,Port G pull-up bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0xC 5. "PU5,Port G pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0xC 4. "PU4,Port G pull-up bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0xC 3. "PU3,Port G pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0xC 2. "PU2,Port G pull-up bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0xC 1. "PU1,Port G pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0xC 0. "PU0,Port G pull-up bit y (y=0..15)" "0,1"
|
|
line.long 0x10 "PWR_PDCRG,Power Port G pull-down control register"
|
|
bitfld.long 0x10 15. "PD15,Port G pull-down bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x10 14. "PD14,Port G pull-down bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x10 13. "PD13,Port G pull-down bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x10 12. "PD12,Port G pull-down bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x10 11. "PD11,Port G pull-down bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x10 10. "PD10,Port G pull-down bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x10 9. "PD9,Port G pull-down bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x10 8. "PD8,Port G pull-down bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x10 7. "PD7,Port G pull-down bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x10 6. "PD6,Port G pull-down bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x10 5. "PD5,Port G pull-down bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x10 4. "PD4,Port G pull-down bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x10 3. "PD3,Port G pull-down bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x10 2. "PD2,Port G pull-down bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x10 1. "PD1,Port G pull-down bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x10 0. "PD0,Port G pull-down bit y (y=0..15)" "0,1"
|
|
line.long 0x14 "PWR_PUCRH,Power Port H pull-up control register"
|
|
bitfld.long 0x14 15. "PU15,Port H pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x14 14. "PU14,Port H pull-up bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x14 13. "PU13,Port H pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x14 12. "PU12,Port H pull-up bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x14 11. "PU11,Port H pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x14 10. "PU10,Port H pull-up bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x14 9. "PU9,Port H pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x14 8. "PU8,Port H pull-up bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x14 7. "PU7,Port H pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x14 6. "PU6,Port H pull-up bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x14 5. "PU5,Port H pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x14 4. "PU4,Port H pull-up bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x14 3. "PU3,Port H pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x14 2. "PU2,Port H pull-up bit y (y=0..15)" "0,1"
|
|
newline
|
|
bitfld.long 0x14 1. "PU1,Port H pull-up bit y (y=0..15)" "0,1"
|
|
bitfld.long 0x14 0. "PU0,Port H pull-up bit y (y=0..15)" "0,1"
|
|
line.long 0x18 "PWR_PDCRH,Power Port H pull-down control register"
|
|
bitfld.long 0x18 15. "PD15,Port H pull-down bit x (y =15...0)" "0,1"
|
|
bitfld.long 0x18 14. "PD14,Port H pull-down bit x (y =15...0)" "0,1"
|
|
newline
|
|
bitfld.long 0x18 13. "PD13,Port H pull-down bit x (y =15...0)" "0,1"
|
|
bitfld.long 0x18 12. "PD12,Port H pull-down bit x (y =15...0)" "0,1"
|
|
newline
|
|
bitfld.long 0x18 11. "PD11,Port H pull-down bit x (y =15...0)" "0,1"
|
|
bitfld.long 0x18 10. "PD10,Port H pull-down bit x (y =15...0)" "0,1"
|
|
newline
|
|
bitfld.long 0x18 9. "PD9,Port H pull-down bit x (y =15...0)" "0,1"
|
|
bitfld.long 0x18 8. "PD8,Port H pull-down bit x (y =15...0)" "0,1"
|
|
newline
|
|
bitfld.long 0x18 7. "PD7,Port H pull-down bit x (y =15...0)" "0,1"
|
|
bitfld.long 0x18 6. "PD6,Port H pull-down bit x (y =15...0)" "0,1"
|
|
newline
|
|
bitfld.long 0x18 5. "PD5,Port H pull-down bit x (y =15...0)" "0,1"
|
|
bitfld.long 0x18 4. "PD4,Port H pull-down bit x (y =15...0)" "0,1"
|
|
newline
|
|
bitfld.long 0x18 3. "PD3,Port H pull-down bit x (y =15...0)" "0,1"
|
|
bitfld.long 0x18 2. "PD2,Port H pull-down bit x (y =15...0)" "0,1"
|
|
newline
|
|
bitfld.long 0x18 1. "PD1,Port H pull-down bit x (y =15...0)" "0,1"
|
|
bitfld.long 0x18 0. "PD0,Port H pull-down bit x (y =15...0)" "0,1"
|
|
line.long 0x1C "PWR_PUCRI,Power Port I pull-up control register"
|
|
bitfld.long 0x1C 11. "PU11,Port I pull-up bit y (y=0..11)" "0,1"
|
|
bitfld.long 0x1C 10. "PU10,Port I pull-up bit y (y=0..11)" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 9. "PU9,Port I pull-up bit y (y=0..11)" "0,1"
|
|
bitfld.long 0x1C 8. "PU8,Port I pull-up bit y (y=0..11)" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 7. "PU7,Port I pull-up bit y (y=0..11)" "0,1"
|
|
bitfld.long 0x1C 6. "PU6,Port I pull-up bit y (y=0..11)" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 5. "PU5,Port I pull-up bit y (y=0..11)" "0,1"
|
|
bitfld.long 0x1C 4. "PU4,Port I pull-up bit y (y=0..11)" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 3. "PU3,Port I pull-up bit y (y=0..11)" "0,1"
|
|
bitfld.long 0x1C 2. "PU2,Port I pull-up bit y (y=0..11)" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 1. "PU1,Port I pull-up bit y (y=0..11)" "0,1"
|
|
bitfld.long 0x1C 0. "PU0,Port I pull-up bit y (y=0..11)" "0,1"
|
|
line.long 0x20 "PWR_PDCRI,Power Port I pull-down control register"
|
|
bitfld.long 0x20 11. "PD11,Port I pull-down bit y (y=0..11)" "0,1"
|
|
bitfld.long 0x20 10. "PD10,Port I pull-down bit y (y=0..11)" "0,1"
|
|
newline
|
|
bitfld.long 0x20 9. "PD9,Port I pull-down bit y (y=0..11)" "0,1"
|
|
bitfld.long 0x20 8. "PD8,Port I pull-down bit y (y=0..11)" "0,1"
|
|
newline
|
|
bitfld.long 0x20 7. "PD7,Port I pull-down bit y (y=0..11)" "0,1"
|
|
bitfld.long 0x20 6. "PD6,Port I pull-down bit y (y=0..11)" "0,1"
|
|
newline
|
|
bitfld.long 0x20 5. "PD5,Port I pull-down bit y (y=0..11)" "0,1"
|
|
bitfld.long 0x20 4. "PD4,Port I pull-down bit y (y=0..11)" "0,1"
|
|
newline
|
|
bitfld.long 0x20 3. "PD3,Port I pull-down bit y (y=0..11)" "0,1"
|
|
bitfld.long 0x20 2. "PD2,Port I pull-down bit y (y=0..11)" "0,1"
|
|
newline
|
|
bitfld.long 0x20 1. "PD1,Port I pull-down bit y (y=0..11)" "0,1"
|
|
bitfld.long 0x20 0. "PD0,Port I pull-down bit y (y=0..11)" "0,1"
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "PWR_CR5,PWR control register"
|
|
bitfld.long 0x0 8. "R1MODE,Main regulator Range 1 mode" "0: Main regulator in Range 1 boost mode.,1: Main regulator in Range 1 normal mode."
|
|
tree.end
|
|
tree "RCC (Reset and Clock Control)"
|
|
base ad:0x40021000
|
|
group.long 0x0++0x1B
|
|
line.long 0x0 "CR,Clock control register"
|
|
rbitfld.long 0x0 29. "PLLSAI2RDY,SAI2 PLL clock ready flag" "0,1"
|
|
bitfld.long 0x0 28. "PLLSAI2ON,SAI2 PLL enable" "0,1"
|
|
rbitfld.long 0x0 27. "PLLSAI1RDY,SAI1 PLL clock ready flag" "0,1"
|
|
bitfld.long 0x0 26. "PLLSAI1ON,SAI1 PLL enable" "0,1"
|
|
rbitfld.long 0x0 25. "PLLRDY,Main PLL clock ready flag" "0,1"
|
|
bitfld.long 0x0 24. "PLLON,Main PLL enable" "0,1"
|
|
bitfld.long 0x0 19. "CSSON,Clock security system" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "HSEBYP,HSE crystal oscillator" "0,1"
|
|
rbitfld.long 0x0 17. "HSERDY,HSE clock ready flag" "0,1"
|
|
bitfld.long 0x0 16. "HSEON,HSE clock enable" "0,1"
|
|
bitfld.long 0x0 11. "HSIASFS,HSI automatic start from" "0,1"
|
|
rbitfld.long 0x0 10. "HSIRDY,HSI clock ready flag" "0,1"
|
|
bitfld.long 0x0 9. "HSIKERON,HSI always enable for peripheral" "0,1"
|
|
bitfld.long 0x0 8. "HSION,HSI clock enable" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--7. 1. "MSIRANGE,MSI clock ranges"
|
|
bitfld.long 0x0 3. "MSIRGSEL,MSI clock range selection" "0,1"
|
|
bitfld.long 0x0 2. "MSIPLLEN,MSI clock PLL enable" "0,1"
|
|
rbitfld.long 0x0 1. "MSIRDY,MSI clock ready flag" "0,1"
|
|
bitfld.long 0x0 0. "MSION,MSI clock enable" "0,1"
|
|
line.long 0x4 "ICSCR,Internal clock sources calibration"
|
|
hexmask.long.byte 0x4 24.--30. 1. "HSITRIM,HSI clock trimming"
|
|
hexmask.long.byte 0x4 16.--23. 1. "HSICAL,HSI clock calibration"
|
|
hexmask.long.byte 0x4 8.--15. 1. "MSITRIM,MSI clock trimming"
|
|
hexmask.long.byte 0x4 0.--7. 1. "MSICAL,MSI clock calibration"
|
|
line.long 0x8 "CFGR,Clock configuration register"
|
|
rbitfld.long 0x8 28.--30. "MCOPRE,Microcontroller clock output" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 24.--26. "MCOSEL,Microcontroller clock" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 15. "STOPWUCK,Wakeup from Stop and CSS backup clock" "0,1"
|
|
bitfld.long 0x8 11.--13. "PPRE2,APB high-speed prescaler" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 8.--10. "PPRE1,PB low-speed prescaler" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x8 4.--7. 1. "HPRE,AHB prescaler"
|
|
rbitfld.long 0x8 2.--3. "SWS,System clock switch status" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x8 0.--1. "SW,System clock switch" "0,1,2,3"
|
|
line.long 0xC "PLLCFGR,PLL configuration register"
|
|
hexmask.long.byte 0xC 27.--31. 1. "PLLPDIV,Main PLL division factor for"
|
|
bitfld.long 0xC 25.--26. "PLLR,Main PLL division factor for PLLCLK" "0,1,2,3"
|
|
bitfld.long 0xC 24. "PLLREN,Main PLL PLLCLK output" "0,1"
|
|
bitfld.long 0xC 21.--22. "PLLQ,Main PLL division factor for" "0,1,2,3"
|
|
bitfld.long 0xC 20. "PLLQEN,Main PLL PLLUSB1CLK output" "0,1"
|
|
bitfld.long 0xC 17. "PLLP,Main PLL division factor for PLLSAI3CLK" "0,1"
|
|
bitfld.long 0xC 16. "PLLPEN,Main PLL PLLSAI3CLK output" "0,1"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--14. 1. "PLLN,Main PLL multiplication factor for"
|
|
hexmask.long.byte 0xC 4.--7. 1. "PLLM,Division factor for the main PLL and"
|
|
bitfld.long 0xC 0.--1. "PLLSRC,Main PLL PLLSAI1 and PLLSAI2 entry" "0,1,2,3"
|
|
line.long 0x10 "PLLSAI1CFGR,PLLSAI1 configuration register"
|
|
hexmask.long.byte 0x10 27.--31. 1. "PLLSAI1PDIV,PLLSAI1 division factor for"
|
|
bitfld.long 0x10 25.--26. "PLLSAI1R,PLLSAI1 division factor for PLLADC1CLK" "0,1,2,3"
|
|
bitfld.long 0x10 24. "PLLSAI1REN,PLLSAI1 PLLADC1CLK output" "0,1"
|
|
bitfld.long 0x10 21.--22. "PLLSAI1Q,SAI1PLL division factor for PLLUSB2CLK" "0,1,2,3"
|
|
bitfld.long 0x10 20. "PLLSAI1QEN,SAI1PLL PLLUSB2CLK output" "0,1"
|
|
bitfld.long 0x10 17. "PLLSAI1P,SAI1PLL division factor for PLLSAI1CLK" "0,1"
|
|
bitfld.long 0x10 16. "PLLSAI1PEN,SAI1PLL PLLSAI1CLK output" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x10 8.--14. 1. "PLLSAI1N,SAI1PLL multiplication factor for"
|
|
hexmask.long.byte 0x10 4.--7. 1. "PLLSAI1M,Division factor for PLLSAI1 input"
|
|
line.long 0x14 "PLLSAI2CFGR,PLLSAI2 configuration register"
|
|
hexmask.long.byte 0x14 27.--31. 1. "PLLSAI2PDIV,PLLSAI2 division factor for"
|
|
bitfld.long 0x14 25.--26. "PLLSAI2R,PLLSAI2 division factor for PLLADC2CLK" "0,1,2,3"
|
|
bitfld.long 0x14 24. "PLLSAI2REN,PLLSAI2 PLLADC2CLK output" "0,1"
|
|
bitfld.long 0x14 21.--22. "PLLSAI2Q,SAI2PLL PLLSAI2CLK output" "0,1,2,3"
|
|
bitfld.long 0x14 20. "PLLSAI2QEN,PLLSAI2 division factor for" "0,1"
|
|
bitfld.long 0x14 17. "PLLSAI2P,SAI1PLL division factor for PLLSAI2CLK" "0,1"
|
|
bitfld.long 0x14 16. "PLLSAI2PEN,SAI2PLL PLLSAI2CLK output" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x14 8.--14. 1. "PLLSAI2N,SAI2PLL multiplication factor for"
|
|
hexmask.long.byte 0x14 4.--7. 1. "PLLSAI2M,Division factor for PLLSAI2 input"
|
|
line.long 0x18 "CIER,Clock interrupt enable"
|
|
bitfld.long 0x18 10. "HSI48RDYIE,HSI48 ready interrupt" "0,1"
|
|
bitfld.long 0x18 9. "LSECSSIE,LSE clock security system interrupt" "0,1"
|
|
bitfld.long 0x18 7. "PLLSAI2RDYIE,PLLSAI2 ready interrupt" "0,1"
|
|
bitfld.long 0x18 6. "PLLSAI1RDYIE,PLLSAI1 ready interrupt" "0,1"
|
|
bitfld.long 0x18 5. "PLLRDYIE,PLL ready interrupt enable" "0,1"
|
|
bitfld.long 0x18 4. "HSERDYIE,HSE ready interrupt enable" "0,1"
|
|
bitfld.long 0x18 3. "HSIRDYIE,HSI ready interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x18 2. "MSIRDYIE,MSI ready interrupt enable" "0,1"
|
|
bitfld.long 0x18 1. "LSERDYIE,LSE ready interrupt enable" "0,1"
|
|
bitfld.long 0x18 0. "LSIRDYIE,LSI ready interrupt enable" "0,1"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "CIFR,Clock interrupt flag register"
|
|
bitfld.long 0x0 10. "HSI48RDYF,HSI48 ready interrupt flag" "0,1"
|
|
bitfld.long 0x0 9. "LSECSSF,LSE Clock security system interrupt" "0,1"
|
|
bitfld.long 0x0 8. "CSSF,Clock security system interrupt" "0,1"
|
|
bitfld.long 0x0 7. "PLLSAI2RDYF,PLLSAI2 ready interrupt" "0,1"
|
|
bitfld.long 0x0 6. "PLLSAI1RDYF,PLLSAI1 ready interrupt" "0,1"
|
|
bitfld.long 0x0 5. "PLLRDYF,PLL ready interrupt flag" "0,1"
|
|
bitfld.long 0x0 4. "HSERDYF,HSE ready interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "HSIRDYF,HSI ready interrupt flag" "0,1"
|
|
bitfld.long 0x0 2. "MSIRDYF,MSI ready interrupt flag" "0,1"
|
|
bitfld.long 0x0 1. "LSERDYF,LSE ready interrupt flag" "0,1"
|
|
bitfld.long 0x0 0. "LSIRDYF,LSI ready interrupt flag" "0,1"
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x0 "CICR,Clock interrupt clear register"
|
|
bitfld.long 0x0 10. "HSI48RDYC,HSI48 oscillator ready interrupt" "0,1"
|
|
bitfld.long 0x0 9. "LSECSSC,LSE Clock security system interrupt" "0,1"
|
|
bitfld.long 0x0 8. "CSSC,Clock security system interrupt" "0,1"
|
|
bitfld.long 0x0 7. "PLLSAI2RDYC,PLLSAI2 ready interrupt" "0,1"
|
|
bitfld.long 0x0 6. "PLLSAI1RDYC,PLLSAI1 ready interrupt" "0,1"
|
|
bitfld.long 0x0 5. "PLLRDYC,PLL ready interrupt clear" "0,1"
|
|
bitfld.long 0x0 4. "HSERDYC,HSE ready interrupt clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "HSIRDYC,HSI ready interrupt clear" "0,1"
|
|
bitfld.long 0x0 2. "MSIRDYC,MSI ready interrupt clear" "0,1"
|
|
bitfld.long 0x0 1. "LSERDYC,LSE ready interrupt clear" "0,1"
|
|
bitfld.long 0x0 0. "LSIRDYC,LSI ready interrupt clear" "0,1"
|
|
group.long 0x28++0xB
|
|
line.long 0x0 "AHB1RSTR,AHB1 peripheral reset register"
|
|
sif (cpuis("STM32L4R5*"))
|
|
bitfld.long 0x0 18. "GFXMMURST,GFXMMU reset" "0,1"
|
|
endif
|
|
sif (cpuis("STM32L4R7*"))
|
|
bitfld.long 0x0 18. "GFXMMURST,GFXMMU reset" "0,1"
|
|
endif
|
|
sif (cpuis("STM32L4R9*"))
|
|
bitfld.long 0x0 18. "GFXMMURST,GFXMMU reset" "0,1"
|
|
endif
|
|
sif (cpuis("STM32L4S5*"))
|
|
bitfld.long 0x0 18. "GFXMMURST,GFXMMU reset" "0,1"
|
|
endif
|
|
sif (cpuis("STM32L4S7*"))
|
|
bitfld.long 0x0 18. "GFXMMURST,GFXMMU reset" "0,1"
|
|
endif
|
|
sif (cpuis("STM32L4S9*"))
|
|
bitfld.long 0x0 18. "GFXMMURST,GFXMMU reset" "0,1"
|
|
endif
|
|
bitfld.long 0x0 17. "DMA2DRST,DMA2D reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "TSCRST,Touch Sensing Controller" "0,1"
|
|
bitfld.long 0x0 12. "CRCRST,CRC reset" "0,1"
|
|
bitfld.long 0x0 8. "FLASHRST,Flash memory interface" "0,1"
|
|
bitfld.long 0x0 2. "DMAMUX1RST,DMAMUXRST" "0,1"
|
|
bitfld.long 0x0 1. "DMA2RST,DMA2 reset" "0,1"
|
|
bitfld.long 0x0 0. "DMA1RST,DMA1 reset" "0,1"
|
|
line.long 0x4 "AHB2RSTR,AHB2 peripheral reset register"
|
|
bitfld.long 0x4 22. "SDMMC1RST,SDMMC1 reset" "0,1"
|
|
bitfld.long 0x4 20. "OSPIMRST,OCTOSPI IO manager reset" "0,1"
|
|
bitfld.long 0x4 18. "RNGRST,Random number generator" "0,1"
|
|
bitfld.long 0x4 17. "HASHRST,Hash reset" "0,1"
|
|
bitfld.long 0x4 16. "AESRST,AES hardware accelerator" "0,1"
|
|
bitfld.long 0x4 14. "DCMIRST,Digital Camera Interface" "0,1"
|
|
bitfld.long 0x4 13. "ADCRST,ADC reset" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "OTGFSRST,USB OTG FS reset" "0,1"
|
|
bitfld.long 0x4 8. "GPIOIRST,IO port I reset" "0,1"
|
|
bitfld.long 0x4 7. "GPIOHRST,IO port H reset" "0,1"
|
|
bitfld.long 0x4 6. "GPIOGRST,IO port G reset" "0,1"
|
|
bitfld.long 0x4 5. "GPIOFRST,IO port F reset" "0,1"
|
|
bitfld.long 0x4 4. "GPIOERST,IO port E reset" "0,1"
|
|
bitfld.long 0x4 3. "GPIODRST,IO port D reset" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "GPIOCRST,IO port C reset" "0,1"
|
|
bitfld.long 0x4 1. "GPIOBRST,IO port B reset" "0,1"
|
|
bitfld.long 0x4 0. "GPIOARST,IO port A reset" "0,1"
|
|
line.long 0x8 "AHB3RSTR,AHB3 peripheral reset register"
|
|
bitfld.long 0x8 9. "OSPI2RST,OctOSPI2 memory interface" "0,1"
|
|
bitfld.long 0x8 0. "FMCRST,Flexible memory controller" "0,1"
|
|
group.long 0x38++0xB
|
|
line.long 0x0 "APB1RSTR1,APB1 peripheral reset register"
|
|
bitfld.long 0x0 31. "LPTIM1RST,Low Power Timer 1 reset" "0,1"
|
|
bitfld.long 0x0 30. "OPAMPRST,OPAMP interface reset" "0,1"
|
|
bitfld.long 0x0 29. "DAC1RST,DAC1 interface reset" "0,1"
|
|
bitfld.long 0x0 28. "PWRRST,Power interface reset" "0,1"
|
|
bitfld.long 0x0 25. "CAN1RST,CAN1 reset" "0,1"
|
|
bitfld.long 0x0 24. "CRSRST,CRS reset" "0,1"
|
|
bitfld.long 0x0 23. "I2C3RST,I2C3 reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "I2C2RST,I2C2 reset" "0,1"
|
|
bitfld.long 0x0 21. "I2C1RST,I2C1 reset" "0,1"
|
|
bitfld.long 0x0 20. "UART5RST,UART5 reset" "0,1"
|
|
bitfld.long 0x0 19. "UART4RST,UART4 reset" "0,1"
|
|
bitfld.long 0x0 18. "USART3RST,USART3 reset" "0,1"
|
|
bitfld.long 0x0 17. "USART2RST,USART2 reset" "0,1"
|
|
bitfld.long 0x0 15. "SPI3RST,SPI3 reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "SPI2RST,SPI2 reset" "0,1"
|
|
bitfld.long 0x0 5. "TIM7RST,TIM7 timer reset" "0,1"
|
|
bitfld.long 0x0 4. "TIM6RST,TIM6 timer reset" "0,1"
|
|
bitfld.long 0x0 3. "TIM5RST,TIM5 timer reset" "0,1"
|
|
bitfld.long 0x0 2. "TIM4RST,TIM3 timer reset" "0,1"
|
|
bitfld.long 0x0 1. "TIM3RST,TIM3 timer reset" "0,1"
|
|
bitfld.long 0x0 0. "TIM2RST,TIM2 timer reset" "0,1"
|
|
line.long 0x4 "APB1RSTR2,APB1 peripheral reset register"
|
|
bitfld.long 0x4 5. "LPTIM2RST,Low-power timer 2 reset" "0,1"
|
|
bitfld.long 0x4 1. "I2C4RST,I2C4 reset" "0,1"
|
|
bitfld.long 0x4 0. "LPUART1RST,Low-power UART 1 reset" "0,1"
|
|
line.long 0x8 "APB2RSTR,APB2 peripheral reset register"
|
|
bitfld.long 0x8 27. "DSIRST,DSI reset" "0,1"
|
|
bitfld.long 0x8 26. "LTDCRST,LCD-TFT reset" "0,1"
|
|
bitfld.long 0x8 24. "DFSDM1RST,Digital filters for sigma-delata" "0,1"
|
|
bitfld.long 0x8 22. "SAI2RST,Serial audio interface 2 (SAI2)" "0,1"
|
|
bitfld.long 0x8 21. "SAI1RST,Serial audio interface 1 (SAI1)" "0,1"
|
|
bitfld.long 0x8 18. "TIM17RST,TIM17 timer reset" "0,1"
|
|
bitfld.long 0x8 17. "TIM16RST,TIM16 timer reset" "0,1"
|
|
newline
|
|
bitfld.long 0x8 16. "TIM15RST,TIM15 timer reset" "0,1"
|
|
bitfld.long 0x8 14. "USART1RST,USART1 reset" "0,1"
|
|
bitfld.long 0x8 13. "TIM8RST,TIM8 timer reset" "0,1"
|
|
bitfld.long 0x8 12. "SPI1RST,SPI1 reset" "0,1"
|
|
bitfld.long 0x8 11. "TIM1RST,TIM1 timer reset" "0,1"
|
|
bitfld.long 0x8 0. "SYSCFGRST,System configuration (SYSCFG)" "0,1"
|
|
group.long 0x48++0xB
|
|
line.long 0x0 "AHB1ENR,AHB1 peripheral clock enable"
|
|
sif (cpuis("STM32L4R5*"))
|
|
bitfld.long 0x0 18. "GFXMMUEN,Graphic MMU clock enable" "0,1"
|
|
endif
|
|
sif (cpuis("STM32L4R7*"))
|
|
bitfld.long 0x0 18. "GFXMMUEN,Graphic MMU clock enable" "0,1"
|
|
endif
|
|
sif (cpuis("STM32L4R9*"))
|
|
bitfld.long 0x0 18. "GFXMMUEN,Graphic MMU clock enable" "0,1"
|
|
endif
|
|
sif (cpuis("STM32L4S5*"))
|
|
bitfld.long 0x0 18. "GFXMMUEN,Graphic MMU clock enable" "0,1"
|
|
endif
|
|
sif (cpuis("STM32L4S7*"))
|
|
bitfld.long 0x0 18. "GFXMMUEN,Graphic MMU clock enable" "0,1"
|
|
endif
|
|
sif (cpuis("STM32L4S9*"))
|
|
bitfld.long 0x0 18. "GFXMMUEN,Graphic MMU clock enable" "0,1"
|
|
endif
|
|
bitfld.long 0x0 17. "DMA2DEN,DMA2D clock enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "TSCEN,Touch Sensing Controller clock" "0,1"
|
|
bitfld.long 0x0 12. "CRCEN,CRC clock enable" "0,1"
|
|
bitfld.long 0x0 8. "FLASHEN,Flash memory interface clock" "0,1"
|
|
bitfld.long 0x0 2. "DMAMUX1EN,DMAMUX clock enable" "0,1"
|
|
bitfld.long 0x0 1. "DMA2EN,DMA2 clock enable" "0,1"
|
|
bitfld.long 0x0 0. "DMA1EN,DMA1 clock enable" "0,1"
|
|
line.long 0x4 "AHB2ENR,AHB2 peripheral clock enable"
|
|
bitfld.long 0x4 22. "SDMMC1EN,SDMMC1 clock enable" "0,1"
|
|
bitfld.long 0x4 20. "OSPIMEN,OctoSPI IO manager clock" "0,1"
|
|
bitfld.long 0x4 18. "RNGEN,Random Number Generator clock" "0,1"
|
|
bitfld.long 0x4 17. "HASHEN,HASH clock enable" "0,1"
|
|
bitfld.long 0x4 16. "AESEN,AES accelerator clock" "0,1"
|
|
bitfld.long 0x4 14. "DCMIEN,DCMI clock enable" "0,1"
|
|
bitfld.long 0x4 13. "ADCEN,ADC clock enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "OTGFSEN,OTG full speed clock" "0,1"
|
|
bitfld.long 0x4 8. "GPIOIEN,IO port I clock enable" "0,1"
|
|
bitfld.long 0x4 7. "GPIOHEN,IO port H clock enable" "0,1"
|
|
bitfld.long 0x4 6. "GPIOGEN,IO port G clock enable" "0,1"
|
|
bitfld.long 0x4 5. "GPIOFEN,IO port F clock enable" "0,1"
|
|
bitfld.long 0x4 4. "GPIOEEN,IO port E clock enable" "0,1"
|
|
bitfld.long 0x4 3. "GPIODEN,IO port D clock enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "GPIOCEN,IO port C clock enable" "0,1"
|
|
bitfld.long 0x4 1. "GPIOBEN,IO port B clock enable" "0,1"
|
|
bitfld.long 0x4 0. "GPIOAEN,IO port A clock enable" "0,1"
|
|
line.long 0x8 "AHB3ENR,AHB3 peripheral clock enable"
|
|
bitfld.long 0x8 9. "OSPI2EN,OSPI2EN memory interface clock" "0,1"
|
|
bitfld.long 0x8 0. "FMCEN,Flexible memory controller clock" "0,1"
|
|
group.long 0x58++0xB
|
|
line.long 0x0 "APB1ENR1,APB1ENR1"
|
|
bitfld.long 0x0 31. "LPTIM1EN,Low power timer 1 clock" "0,1"
|
|
bitfld.long 0x0 30. "OPAMPEN,OPAMP interface clock" "0,1"
|
|
bitfld.long 0x0 29. "DAC1EN,DAC1 interface clock" "0,1"
|
|
bitfld.long 0x0 28. "PWREN,Power interface clock" "0,1"
|
|
bitfld.long 0x0 25. "CAN1EN,CAN1 clock enable" "0,1"
|
|
bitfld.long 0x0 24. "CRSEN,Clock Recovery System clock" "0,1"
|
|
bitfld.long 0x0 23. "I2C3EN,I2C3 clock enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "I2C2EN,I2C2 clock enable" "0,1"
|
|
bitfld.long 0x0 21. "I2C1EN,I2C1 clock enable" "0,1"
|
|
bitfld.long 0x0 20. "UART5EN,UART5 clock enable" "0,1"
|
|
bitfld.long 0x0 19. "UART4EN,UART4 clock enable" "0,1"
|
|
bitfld.long 0x0 18. "USART3EN,USART3 clock enable" "0,1"
|
|
bitfld.long 0x0 17. "USART2EN,USART2 clock enable" "0,1"
|
|
bitfld.long 0x0 15. "SP3EN,SPI3 clock enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "SPI2EN,SPI2 clock enable" "0,1"
|
|
bitfld.long 0x0 11. "WWDGEN,Window watchdog clock" "0,1"
|
|
bitfld.long 0x0 10. "RTCAPBEN,RTC APB clock enable" "0,1"
|
|
bitfld.long 0x0 5. "TIM7EN,TIM7 timer clock enable" "0,1"
|
|
bitfld.long 0x0 4. "TIM6EN,TIM6 timer clock enable" "0,1"
|
|
bitfld.long 0x0 3. "TIM5EN,TIM5 timer clock enable" "0,1"
|
|
bitfld.long 0x0 2. "TIM4EN,TIM4 timer clock enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TIM3EN,TIM3 timer clock enable" "0,1"
|
|
bitfld.long 0x0 0. "TIM2EN,TIM2 timer clock enable" "0,1"
|
|
line.long 0x4 "APB1ENR2,APB1 peripheral clock enable register"
|
|
bitfld.long 0x4 5. "LPTIM2EN,LPTIM2EN" "0,1"
|
|
bitfld.long 0x4 1. "I2C4EN,I2C4 clock enable" "0,1"
|
|
bitfld.long 0x4 0. "LPUART1EN,Low power UART 1 clock" "0,1"
|
|
line.long 0x8 "APB2ENR,APB2ENR"
|
|
bitfld.long 0x8 27. "DSIEN,DSI clock enable" "0,1"
|
|
bitfld.long 0x8 26. "LTDCEN,LCD-TFT clock enable" "0,1"
|
|
bitfld.long 0x8 24. "DFSDM1EN,DFSDM timer clock enable" "0,1"
|
|
bitfld.long 0x8 22. "SAI2EN,SAI2 clock enable" "0,1"
|
|
bitfld.long 0x8 21. "SAI1EN,SAI1 clock enable" "0,1"
|
|
bitfld.long 0x8 18. "TIM17EN,TIM17 timer clock enable" "0,1"
|
|
bitfld.long 0x8 17. "TIM16EN,TIM16 timer clock enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 16. "TIM15EN,TIM15 timer clock enable" "0,1"
|
|
bitfld.long 0x8 14. "USART1EN,USART1clock enable" "0,1"
|
|
bitfld.long 0x8 13. "TIM8EN,TIM8 timer clock enable" "0,1"
|
|
bitfld.long 0x8 12. "SPI1EN,SPI1 clock enable" "0,1"
|
|
bitfld.long 0x8 11. "TIM1EN,TIM1 timer clock enable" "0,1"
|
|
bitfld.long 0x8 7. "FWEN,Firewall clock enable" "0,1"
|
|
bitfld.long 0x8 0. "SYSCFGEN,SYSCFG clock enable" "0,1"
|
|
group.long 0x68++0xB
|
|
line.long 0x0 "AHB1SMENR,AHB1 peripheral clocks enable in Sleep and"
|
|
sif (cpuis("STM32L4R5*"))
|
|
bitfld.long 0x0 18. "GFXMMUSMEN,GFXMMU clock enable during Sleep and" "0,1"
|
|
endif
|
|
sif (cpuis("STM32L4R7*"))
|
|
bitfld.long 0x0 18. "GFXMMUSMEN,GFXMMU clock enable during Sleep and" "0,1"
|
|
endif
|
|
sif (cpuis("STM32L4R9*"))
|
|
bitfld.long 0x0 18. "GFXMMUSMEN,GFXMMU clock enable during Sleep and" "0,1"
|
|
endif
|
|
sif (cpuis("STM32L4S5*"))
|
|
bitfld.long 0x0 18. "GFXMMUSMEN,GFXMMU clock enable during Sleep and" "0,1"
|
|
endif
|
|
sif (cpuis("STM32L4S7*"))
|
|
bitfld.long 0x0 18. "GFXMMUSMEN,GFXMMU clock enable during Sleep and" "0,1"
|
|
endif
|
|
sif (cpuis("STM32L4S9*"))
|
|
bitfld.long 0x0 18. "GFXMMUSMEN,GFXMMU clock enable during Sleep and" "0,1"
|
|
endif
|
|
bitfld.long 0x0 17. "DMA2DSMEN,DMA2D clock enable during Sleep and Stop" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "TSCSMEN,Touch Sensing Controller clocks enable" "0,1"
|
|
bitfld.long 0x0 12. "CRCSMEN,CRCSMEN" "0,1"
|
|
bitfld.long 0x0 9. "SRAM1SMEN,SRAM1 interface clocks enable during" "0,1"
|
|
bitfld.long 0x0 8. "FLASHSMEN,Flash memory interface clocks enable" "0,1"
|
|
bitfld.long 0x0 2. "DMAMUX1SMEN,DMAMUX clock enable during Sleep and" "0,1"
|
|
bitfld.long 0x0 1. "DMA2SMEN,DMA2 clocks enable during Sleep and Stop" "0,1"
|
|
bitfld.long 0x0 0. "DMA1SMEN,DMA1 clocks enable during Sleep and Stop" "0,1"
|
|
line.long 0x4 "AHB2SMENR,AHB2 peripheral clocks enable in Sleep and"
|
|
bitfld.long 0x4 22. "SDMMC1SMEN,SDMMC1 clocks enable during Sleep and" "0,1"
|
|
bitfld.long 0x4 20. "OSPIMSMEN,OctoSPI IO manager clocks enable during" "0,1"
|
|
bitfld.long 0x4 18. "RNGSMEN,Random Number Generator clocks enable" "0,1"
|
|
bitfld.long 0x4 17. "HASHSMEN,HASH clock enable during Sleep and Stop" "0,1"
|
|
bitfld.long 0x4 16. "AESSMEN,AES accelerator clocks enable during" "0,1"
|
|
bitfld.long 0x4 14. "DCMISMEN,DCMI clock enable during Sleep and Stop" "0,1"
|
|
bitfld.long 0x4 13. "ADCFSSMEN,ADC clocks enable during Sleep and Stop" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "OTGFSSMEN,OTG full speed clocks enable during" "0,1"
|
|
bitfld.long 0x4 10. "SRAM3SMEN,SRAM2 interface clocks enable during" "0,1"
|
|
bitfld.long 0x4 9. "SRAM2SMEN,SRAM2 interface clocks enable during" "0,1"
|
|
bitfld.long 0x4 8. "GPIOISMEN,IO port I clocks enable during Sleep and" "0,1"
|
|
bitfld.long 0x4 7. "GPIOHSMEN,IO port H clocks enable during Sleep and" "0,1"
|
|
bitfld.long 0x4 6. "GPIOGSMEN,IO port G clocks enable during Sleep and" "0,1"
|
|
bitfld.long 0x4 5. "GPIOFSMEN,IO port F clocks enable during Sleep and" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "GPIOESMEN,IO port E clocks enable during Sleep and" "0,1"
|
|
bitfld.long 0x4 3. "GPIODSMEN,IO port D clocks enable during Sleep and" "0,1"
|
|
bitfld.long 0x4 2. "GPIOCSMEN,IO port C clocks enable during Sleep and" "0,1"
|
|
bitfld.long 0x4 1. "GPIOBSMEN,IO port B clocks enable during Sleep and" "0,1"
|
|
bitfld.long 0x4 0. "GPIOASMEN,IO port A clocks enable during Sleep and" "0,1"
|
|
line.long 0x8 "AHB3SMENR,AHB3 peripheral clocks enable in Sleep and"
|
|
bitfld.long 0x8 9. "OCTOSPI2,OctoSPI2 memory interface clocks enable" "0,1"
|
|
bitfld.long 0x8 0. "FMCSMEN,Flexible memory controller clocks enable" "0,1"
|
|
group.long 0x78++0xB
|
|
line.long 0x0 "APB1SMENR1,APB1SMENR1"
|
|
bitfld.long 0x0 31. "LPTIM1SMEN,Low power timer 1 clocks enable during" "0,1"
|
|
bitfld.long 0x0 30. "OPAMPSMEN,OPAMP interface clocks enable during" "0,1"
|
|
bitfld.long 0x0 29. "DAC1SMEN,DAC1 interface clocks enable during" "0,1"
|
|
bitfld.long 0x0 28. "PWRSMEN,Power interface clocks enable during" "0,1"
|
|
bitfld.long 0x0 25. "CAN1SMEN,CAN1 clocks enable during Sleep and Stop" "0,1"
|
|
bitfld.long 0x0 24. "CRSSMEN,CRS clock enable during Sleep and Stop" "0,1"
|
|
bitfld.long 0x0 23. "I2C3SMEN,I2C3 clocks enable during Sleep and Stop" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "I2C2SMEN,I2C2 clocks enable during Sleep and Stop" "0,1"
|
|
bitfld.long 0x0 21. "I2C1SMEN,I2C1 clocks enable during Sleep and Stop" "0,1"
|
|
bitfld.long 0x0 20. "UART5SMEN,UART5 clocks enable during Sleep and" "0,1"
|
|
bitfld.long 0x0 19. "UART4SMEN,UART4 clocks enable during Sleep and" "0,1"
|
|
bitfld.long 0x0 18. "USART3SMEN,USART3 clocks enable during Sleep and" "0,1"
|
|
bitfld.long 0x0 17. "USART2SMEN,USART2 clocks enable during Sleep and" "0,1"
|
|
bitfld.long 0x0 15. "SP3SMEN,SPI3 clocks enable during Sleep and Stop" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "SPI2SMEN,SPI2 clocks enable during Sleep and Stop" "0,1"
|
|
bitfld.long 0x0 11. "WWDGSMEN,Window watchdog clocks enable during" "0,1"
|
|
bitfld.long 0x0 10. "RTCAPBSMEN,RTC APB clock enable during Sleep and" "0,1"
|
|
bitfld.long 0x0 5. "TIM7SMEN,TIM7 timer clocks enable during Sleep" "0,1"
|
|
bitfld.long 0x0 4. "TIM6SMEN,TIM6 timer clocks enable during Sleep" "0,1"
|
|
bitfld.long 0x0 3. "TIM5SMEN,TIM5 timer clocks enable during Sleep" "0,1"
|
|
bitfld.long 0x0 2. "TIM4SMEN,TIM4 timer clocks enable during Sleep" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TIM3SMEN,TIM3 timer clocks enable during Sleep" "0,1"
|
|
bitfld.long 0x0 0. "TIM2SMEN,TIM2 timer clocks enable during Sleep" "0,1"
|
|
line.long 0x4 "APB1SMENR2,APB1 peripheral clocks enable in Sleep and"
|
|
bitfld.long 0x4 5. "LPTIM2SMEN,LPTIM2SMEN" "0,1"
|
|
bitfld.long 0x4 1. "I2C4SMEN,I2C4 clocks enable during Sleep and Stop" "0,1"
|
|
bitfld.long 0x4 0. "LPUART1SMEN,Low power UART 1 clocks enable during" "0,1"
|
|
line.long 0x8 "APB2SMENR,APB2SMENR"
|
|
bitfld.long 0x8 27. "DSISMEN,DSI clocks enable during Sleep and Stop" "0,1"
|
|
bitfld.long 0x8 26. "LTDCSMEN,LCD-TFT timer clocks enable during Sleep" "0,1"
|
|
bitfld.long 0x8 24. "DFSDM1SMEN,DFSDM timer clocks enable during Sleep" "0,1"
|
|
bitfld.long 0x8 22. "SAI2SMEN,SAI2 clocks enable during Sleep and Stop" "0,1"
|
|
bitfld.long 0x8 21. "SAI1SMEN,SAI1 clocks enable during Sleep and Stop" "0,1"
|
|
bitfld.long 0x8 18. "TIM17SMEN,TIM17 timer clocks enable during Sleep" "0,1"
|
|
bitfld.long 0x8 17. "TIM16SMEN,TIM16 timer clocks enable during Sleep" "0,1"
|
|
newline
|
|
bitfld.long 0x8 16. "TIM15SMEN,TIM15 timer clocks enable during Sleep" "0,1"
|
|
bitfld.long 0x8 14. "USART1SMEN,USART1clocks enable during Sleep and" "0,1"
|
|
bitfld.long 0x8 13. "TIM8SMEN,TIM8 timer clocks enable during Sleep" "0,1"
|
|
bitfld.long 0x8 12. "SPI1SMEN,SPI1 clocks enable during Sleep and Stop" "0,1"
|
|
bitfld.long 0x8 11. "TIM1SMEN,TIM1 timer clocks enable during Sleep" "0,1"
|
|
bitfld.long 0x8 0. "SYSCFGSMEN,SYSCFG clocks enable during Sleep and" "0,1"
|
|
group.long 0x88++0x3
|
|
line.long 0x0 "CCIPR,CCIPR"
|
|
bitfld.long 0x0 28.--29. "ADCSEL,ADCs clock source" "0,1,2,3"
|
|
bitfld.long 0x0 26.--27. "CLK48SEL,48 MHz clock source" "0,1,2,3"
|
|
bitfld.long 0x0 24.--25. "SAI2SEL,SAI2 clock source" "0,1,2,3"
|
|
bitfld.long 0x0 22.--23. "SAI1SEL,SAI1 clock source" "0,1,2,3"
|
|
bitfld.long 0x0 20.--21. "LPTIM2SEL,Low power timer 2 clock source" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "LPTIM1SEL,Low power timer 1 clock source" "0,1,2,3"
|
|
bitfld.long 0x0 16.--17. "I2C3SEL,I2C3 clock source" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 14.--15. "I2C2SEL,I2C2 clock source" "0,1,2,3"
|
|
bitfld.long 0x0 12.--13. "I2C1SEL,I2C1 clock source" "0,1,2,3"
|
|
bitfld.long 0x0 10.--11. "LPUART1SEL,LPUART1 clock source" "0,1,2,3"
|
|
bitfld.long 0x0 8.--9. "UART5SEL,UART5 clock source" "0,1,2,3"
|
|
bitfld.long 0x0 6.--7. "UART4SEL,UART4 clock source" "0,1,2,3"
|
|
bitfld.long 0x0 4.--5. "USART3SEL,USART3 clock source" "0,1,2,3"
|
|
bitfld.long 0x0 2.--3. "USART2SEL,USART2 clock source" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "USART1SEL,USART1 clock source" "0,1,2,3"
|
|
group.long 0x90++0xF
|
|
line.long 0x0 "BDCR,BDCR"
|
|
bitfld.long 0x0 25. "LSCOSEL,Low speed clock output" "0,1"
|
|
bitfld.long 0x0 24. "LSCOEN,Low speed clock output" "0,1"
|
|
bitfld.long 0x0 16. "BDRST,Backup domain software" "0,1"
|
|
bitfld.long 0x0 15. "RTCEN,RTC clock enable" "0,1"
|
|
bitfld.long 0x0 8.--9. "RTCSEL,RTC clock source selection" "0,1,2,3"
|
|
rbitfld.long 0x0 6. "LSECSSD,LSECSSD" "0,1"
|
|
bitfld.long 0x0 5. "LSECSSON,LSECSSON" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3.--4. "LSEDRV,SE oscillator drive" "0,1,2,3"
|
|
bitfld.long 0x0 2. "LSEBYP,LSE oscillator bypass" "0,1"
|
|
rbitfld.long 0x0 1. "LSERDY,LSE oscillator ready" "0,1"
|
|
bitfld.long 0x0 0. "LSEON,LSE oscillator enable" "0,1"
|
|
line.long 0x4 "CSR,CSR"
|
|
rbitfld.long 0x4 31. "LPWRSTF,Low-power reset flag" "0,1"
|
|
rbitfld.long 0x4 30. "WWDGRSTF,Window watchdog reset flag" "0,1"
|
|
rbitfld.long 0x4 29. "IWDGRSTF,Independent window watchdog reset" "0,1"
|
|
rbitfld.long 0x4 28. "SFTRSTF,Software reset flag" "0,1"
|
|
rbitfld.long 0x4 27. "BORRSTF,BOR flag" "0,1"
|
|
rbitfld.long 0x4 26. "PINRSTF,Pin reset flag" "0,1"
|
|
rbitfld.long 0x4 25. "OBLRSTF,Option byte loader reset" "0,1"
|
|
newline
|
|
rbitfld.long 0x4 24. "FWRSTF,Firewall reset flag" "0,1"
|
|
bitfld.long 0x4 23. "RMVF,Remove reset flag" "0,1"
|
|
hexmask.long.byte 0x4 8.--11. 1. "MSISRANGE,SI range after Standby"
|
|
rbitfld.long 0x4 1. "LSIRDY,LSI oscillator ready" "0,1"
|
|
bitfld.long 0x4 0. "LSION,LSI oscillator enable" "0,1"
|
|
line.long 0x8 "CRRCR,Clock recovery RC register"
|
|
hexmask.long.word 0x8 7.--15. 1. "HSI48CAL,HSI48 clock calibration"
|
|
rbitfld.long 0x8 1. "HSI48RDY,HSI48 clock ready flag" "0,1"
|
|
bitfld.long 0x8 0. "HSI48ON,HSI48 clock enable" "0,1"
|
|
line.long 0xC "CCIPR2,Peripherals independent clock configuration"
|
|
bitfld.long 0xC 20.--21. "OSPISEL,Octospi clock source" "0,1,2,3"
|
|
bitfld.long 0xC 16.--17. "PLLSAI2DIVR,division factor for LTDC" "0,1,2,3"
|
|
bitfld.long 0xC 14. "SDMMCSEL,SDMMC clock selection" "0,1"
|
|
bitfld.long 0xC 12. "DSISEL,clock selection" "0,1"
|
|
bitfld.long 0xC 8.--10. "SAI2SEL,SAI2 clock source" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 5.--7. "SAI1SEL,SAI1 clock source" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 3.--4. "ADFSDMSEL,Digital filter for sigma delta modulator" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0xC 2. "DFSDMSEL,Digital filter for sigma delta modulator" "0,1"
|
|
bitfld.long 0xC 0.--1. "I2C4SEL,I2C4 clock source" "0,1,2,3"
|
|
tree.end
|
|
sif (cpuis("STM32L4P5*")||cpuis("STM32L4R5*")||cpuis("STM32L4R7*")||cpuis("STM32L4R9*")||cpuis("STM32L4S5*")||cpuis("STM32L4S7*")||cpuis("STM32L4S9*"))
|
|
tree "RNG (True Random Number Generator)"
|
|
base ad:0x50060800
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "CR,control register"
|
|
bitfld.long 0x0 3. "IE,Interrupt enable" "0,1"
|
|
bitfld.long 0x0 2. "RNGEN,Random number generator" "0,1"
|
|
line.long 0x4 "SR,status register"
|
|
bitfld.long 0x4 6. "SEIS,Seed error interrupt" "0,1"
|
|
bitfld.long 0x4 5. "CEIS,Clock error interrupt" "0,1"
|
|
rbitfld.long 0x4 2. "SECS,Seed error current status" "0,1"
|
|
rbitfld.long 0x4 1. "CECS,Clock error current status" "0,1"
|
|
rbitfld.long 0x4 0. "DRDY,Data ready" "0,1"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "DR,data register"
|
|
hexmask.long 0x0 0.--31. 1. "RNDATA,Random data"
|
|
tree.end
|
|
endif
|
|
tree "RTC (Real-Time Clock)"
|
|
base ad:0x40002800
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "TR,time register"
|
|
bitfld.long 0x0 22. "PM,AM/PM notation" "0,1"
|
|
bitfld.long 0x0 20.--21. "HT,Hour tens in BCD format" "0,1,2,3"
|
|
hexmask.long.byte 0x0 16.--19. 1. "HU,Hour units in BCD format"
|
|
bitfld.long 0x0 12.--14. "MNT,Minute tens in BCD format" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x0 8.--11. 1. "MNU,Minute units in BCD format"
|
|
bitfld.long 0x0 4.--6. "ST,Second tens in BCD format" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x0 0.--3. 1. "SU,Second units in BCD format"
|
|
line.long 0x4 "DR,date register"
|
|
hexmask.long.byte 0x4 20.--23. 1. "YT,Year tens in BCD format"
|
|
hexmask.long.byte 0x4 16.--19. 1. "YU,Year units in BCD format"
|
|
bitfld.long 0x4 13.--15. "WDU,Week day units" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 12. "MT,Month tens in BCD format" "0,1"
|
|
hexmask.long.byte 0x4 8.--11. 1. "MU,Month units in BCD format"
|
|
bitfld.long 0x4 4.--5. "DT,Date tens in BCD format" "0,1,2,3"
|
|
hexmask.long.byte 0x4 0.--3. 1. "DU,Date units in BCD format"
|
|
sif (cpuis("STM32L4P5*")||cpuis("STM32L4Q5*"))
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "SSR,sub second register"
|
|
hexmask.long 0x0 0.--31. 1. "SS,Synchronous binary counter"
|
|
group.long 0xC++0x3
|
|
line.long 0x0 "ICSR,initialization control and status register"
|
|
rbitfld.long 0x0 16. "RECALPF,Recalibration pending Flag" "0,1"
|
|
bitfld.long 0x0 10.--12. "BCDU,BCD update" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "BIN,Binary mode" "0,1,2,3"
|
|
bitfld.long 0x0 7. "INIT,Initialization mode" "0,1"
|
|
newline
|
|
rbitfld.long 0x0 6. "INITF,Initialization flag" "0,1"
|
|
bitfld.long 0x0 5. "RSF,Registers synchronization" "0,1"
|
|
newline
|
|
rbitfld.long 0x0 4. "INITS,Initialization status flag" "0,1"
|
|
rbitfld.long 0x0 3. "SHPF,Shift operation pending" "0,1"
|
|
newline
|
|
rbitfld.long 0x0 2. "WUTWF,Wakeup timer write flag" "0,1"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "CR,control register"
|
|
bitfld.long 0x0 31. "OUT2EN,RTC_OUT2 output enable" "0,1"
|
|
bitfld.long 0x0 30. "TAMPALRM_TYPE,TAMPALRM output type" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "TAMPALRM_PU,TAMPALRM pull-up enable" "0,1"
|
|
bitfld.long 0x0 26. "TAMPOE,Tamper detection output enable on TAMPALRM" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "TAMPTS,Activate timestamp on tamper detection event" "0,1"
|
|
bitfld.long 0x0 24. "ITSE,timestamp on internal event" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "COE,Calibration output enable" "0,1"
|
|
bitfld.long 0x0 21.--22. "OSEL,Output selection" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 20. "POL,Output polarity" "0,1"
|
|
bitfld.long 0x0 19. "COSEL,Calibration output" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "BKP,Backup" "0,1"
|
|
bitfld.long 0x0 17. "SUB1H,Subtract 1 hour (winter time" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "ADD1H,Add 1 hour (summer time" "0,1"
|
|
bitfld.long 0x0 15. "TSIE,Time-stamp interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "WUTIE,Wakeup timer interrupt" "0,1"
|
|
bitfld.long 0x0 13. "ALRBIE,Alarm B interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "ALRAIE,Alarm A interrupt enable" "0,1"
|
|
bitfld.long 0x0 11. "TSE,Time stamp enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "WUTE,Wakeup timer enable" "0,1"
|
|
bitfld.long 0x0 9. "ALRBE,Alarm B enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "ALRAE,Alarm A enable" "0,1"
|
|
bitfld.long 0x0 7. "SSRUIE,SSR underflow interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "FMT,Hour format" "0,1"
|
|
bitfld.long 0x0 5. "BYPSHAD,Bypass the shadow" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "REFCKON,Reference clock detection enable (50 or" "0,1"
|
|
bitfld.long 0x0 3. "TSEDGE,Time-stamp event active" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "WCKSEL,Wakeup clock selection" "0,1,2,3,4,5,6,7"
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "CALR,calibration register"
|
|
bitfld.long 0x0 15. "CALP,Increase frequency of RTC by 488.5" "0,1"
|
|
bitfld.long 0x0 14. "CALW8,Use an 8-second calibration cycle" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "CALW16,Use a 16-second calibration cycle" "0,1"
|
|
bitfld.long 0x0 12. "LPCAL,Calibration low-power mode" "0,1"
|
|
newline
|
|
hexmask.long.word 0x0 0.--8. 1. "CALM,Calibration minus"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "ALRMAR,alarm A register"
|
|
bitfld.long 0x0 31. "MSK4,Alarm A date mask" "0,1"
|
|
bitfld.long 0x0 30. "WDSEL,Week day selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28.--29. "DT,Date tens in BCD format" "0,1,2,3"
|
|
hexmask.long.byte 0x0 24.--27. 1. "DU,Date units or day in BCD"
|
|
newline
|
|
bitfld.long 0x0 23. "MSK3,Alarm A hours mask" "0,1"
|
|
bitfld.long 0x0 22. "PM,AM/PM notation" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20.--21. "HT,Hour tens in BCD format" "0,1,2,3"
|
|
hexmask.long.byte 0x0 16.--19. 1. "HU,Hour units in BCD format"
|
|
newline
|
|
bitfld.long 0x0 15. "MSK2,Alarm A minutes mask" "0,1"
|
|
bitfld.long 0x0 12.--14. "MNT,Minute tens in BCD format" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "MNU,Minute units in BCD format"
|
|
bitfld.long 0x0 7. "MSK1,Alarm A seconds mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4.--6. "ST,Second tens in BCD format" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x0 0.--3. 1. "SU,Second units in BCD format"
|
|
group.long 0x48++0x7
|
|
line.long 0x0 "ALRMBR,alarm B register"
|
|
bitfld.long 0x0 31. "MSK4,Alarm B date mask" "0,1"
|
|
bitfld.long 0x0 30. "WDSEL,Week day selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28.--29. "DT,Date tens in BCD format" "0,1,2,3"
|
|
hexmask.long.byte 0x0 24.--27. 1. "DU,Date units or day in BCD"
|
|
newline
|
|
bitfld.long 0x0 23. "MSK3,Alarm B hours mask" "0,1"
|
|
bitfld.long 0x0 22. "PM,AM/PM notation" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20.--21. "HT,Hour tens in BCD format" "0,1,2,3"
|
|
hexmask.long.byte 0x0 16.--19. 1. "HU,Hour units in BCD format"
|
|
newline
|
|
bitfld.long 0x0 15. "MSK2,Alarm B minutes mask" "0,1"
|
|
bitfld.long 0x0 12.--14. "MNT,Minute tens in BCD format" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "MNU,Minute units in BCD format"
|
|
bitfld.long 0x0 7. "MSK1,Alarm B seconds mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4.--6. "ST,Second tens in BCD format" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x0 0.--3. 1. "SU,Second units in BCD format"
|
|
line.long 0x4 "ALRMBSSR,alarm B sub second register"
|
|
bitfld.long 0x4 31. "SSCLR,Clear synchronous counter on alarm" "0,1"
|
|
hexmask.long.byte 0x4 24.--29. 1. "MASKSS,Mask the most-significant bits starting"
|
|
newline
|
|
hexmask.long.word 0x4 0.--14. 1. "SS,Sub seconds value"
|
|
rgroup.long 0x50++0x7
|
|
line.long 0x0 "SR,status register"
|
|
bitfld.long 0x0 6. "SSRUF,SSRUF" "0,1"
|
|
bitfld.long 0x0 5. "ITSF,ITSF" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "TSOVF,TSOVF" "0,1"
|
|
bitfld.long 0x0 3. "TSF,TSF" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "WUTF,WUTF" "0,1"
|
|
bitfld.long 0x0 1. "ALRBF,ALRBF" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "ALRAF,ALRAF" "0,1"
|
|
line.long 0x4 "MISR,masked interrupt status register"
|
|
bitfld.long 0x4 6. "SSRUMF,SSRUMF" "0,1"
|
|
bitfld.long 0x4 5. "ITSMF,ITSMF" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "TSOVMF,TSOVMF" "0,1"
|
|
bitfld.long 0x4 3. "TSMF,TSMF" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "WUTMF,WUTMF" "0,1"
|
|
bitfld.long 0x4 1. "ALRBMF,ALRBMF" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "ALRMF,ALRMF" "0,1"
|
|
rgroup.long 0x5C++0x3
|
|
line.long 0x0 "SCR,status clear register"
|
|
bitfld.long 0x0 6. "CSSRUF,CSSRUF" "0,1"
|
|
bitfld.long 0x0 5. "CITSF,CITSF" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "CTSOVF,CTSOVF" "0,1"
|
|
bitfld.long 0x0 3. "CTSF,CTSF" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CWUTF,CWUTF" "0,1"
|
|
bitfld.long 0x0 1. "CALRBF,CALRBF" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "CALRAF,CALRAF" "0,1"
|
|
group.long 0x70++0x7
|
|
line.long 0x0 "ALRABINR,alarm A binary mode register"
|
|
hexmask.long 0x0 0.--31. 1. "SS,Synchronous counter alarm value in Binary mode"
|
|
line.long 0x4 "ALRBBINR,alarm B binary mode register"
|
|
hexmask.long 0x4 0.--31. 1. "SS,Synchronous counter alarm value in Binary mode"
|
|
endif
|
|
sif (cpuis("STM32L4R5*"))
|
|
group.long 0x8++0x7
|
|
line.long 0x0 "CR,control register"
|
|
bitfld.long 0x0 24. "ITSE,timestamp on internal event" "0,1"
|
|
bitfld.long 0x0 23. "COE,Calibration output enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21.--22. "OSEL,Output selection" "0,1,2,3"
|
|
bitfld.long 0x0 20. "POL,Output polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "COSEL,Calibration output" "0,1"
|
|
bitfld.long 0x0 18. "BKP,Backup" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "SUB1H,Subtract 1 hour (winter time" "0,1"
|
|
bitfld.long 0x0 16. "ADD1H,Add 1 hour (summer time" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "TSIE,Time-stamp interrupt" "0,1"
|
|
bitfld.long 0x0 14. "WUTIE,Wakeup timer interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "ALRBIE,Alarm B interrupt enable" "0,1"
|
|
bitfld.long 0x0 12. "ALRAIE,Alarm A interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "TSE,Time stamp enable" "0,1"
|
|
bitfld.long 0x0 10. "WUTE,Wakeup timer enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "ALRBE,Alarm B enable" "0,1"
|
|
bitfld.long 0x0 8. "ALRAE,Alarm A enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "FMT,Hour format" "0,1"
|
|
bitfld.long 0x0 5. "BYPSHAD,Bypass the shadow" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "REFCKON,Reference clock detection enable (50 or" "0,1"
|
|
bitfld.long 0x0 3. "TSEDGE,Time-stamp event active" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "WCKSEL,Wakeup clock selection" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "ISR,initialization and status"
|
|
rbitfld.long 0x4 16. "RECALPF,Recalibration pending Flag" "0,1"
|
|
bitfld.long 0x4 15. "TAMP3F,RTC_TAMP3 detection flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 14. "TAMP2F,RTC_TAMP2 detection flag" "0,1"
|
|
bitfld.long 0x4 13. "TAMP1F,Tamper detection flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "TSOVF,Time-stamp overflow flag" "0,1"
|
|
bitfld.long 0x4 11. "TSF,Time-stamp flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "WUTF,Wakeup timer flag" "0,1"
|
|
bitfld.long 0x4 9. "ALRBF,Alarm B flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "ALRAF,Alarm A flag" "0,1"
|
|
bitfld.long 0x4 7. "INIT,Initialization mode" "0,1"
|
|
newline
|
|
rbitfld.long 0x4 6. "INITF,Initialization flag" "0,1"
|
|
bitfld.long 0x4 5. "RSF,Registers synchronization" "0,1"
|
|
newline
|
|
rbitfld.long 0x4 4. "INITS,Initialization status flag" "0,1"
|
|
bitfld.long 0x4 3. "SHPF,Shift operation pending" "0,1"
|
|
newline
|
|
rbitfld.long 0x4 2. "WUTWF,Wakeup timer write flag" "0,1"
|
|
rbitfld.long 0x4 1. "ALRBWF,Alarm B write flag" "0,1"
|
|
newline
|
|
rbitfld.long 0x4 0. "ALRAWF,Alarm A write flag" "0,1"
|
|
group.long 0x1C++0x7
|
|
line.long 0x0 "ALRMAR,alarm A register"
|
|
bitfld.long 0x0 31. "MSK4,Alarm A date mask" "0,1"
|
|
bitfld.long 0x0 30. "WDSEL,Week day selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28.--29. "DT,Date tens in BCD format" "0,1,2,3"
|
|
hexmask.long.byte 0x0 24.--27. 1. "DU,Date units or day in BCD"
|
|
newline
|
|
bitfld.long 0x0 23. "MSK3,Alarm A hours mask" "0,1"
|
|
bitfld.long 0x0 22. "PM,AM/PM notation" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20.--21. "HT,Hour tens in BCD format" "0,1,2,3"
|
|
hexmask.long.byte 0x0 16.--19. 1. "HU,Hour units in BCD format"
|
|
newline
|
|
bitfld.long 0x0 15. "MSK2,Alarm A minutes mask" "0,1"
|
|
bitfld.long 0x0 12.--14. "MNT,Minute tens in BCD format" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "MNU,Minute units in BCD format"
|
|
bitfld.long 0x0 7. "MSK1,Alarm A seconds mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4.--6. "ST,Second tens in BCD format" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x0 0.--3. 1. "SU,Second units in BCD format"
|
|
line.long 0x4 "ALRMBR,alarm B register"
|
|
bitfld.long 0x4 31. "MSK4,Alarm B date mask" "0,1"
|
|
bitfld.long 0x4 30. "WDSEL,Week day selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28.--29. "DT,Date tens in BCD format" "0,1,2,3"
|
|
hexmask.long.byte 0x4 24.--27. 1. "DU,Date units or day in BCD"
|
|
newline
|
|
bitfld.long 0x4 23. "MSK3,Alarm B hours mask" "0,1"
|
|
bitfld.long 0x4 22. "PM,AM/PM notation" "0,1"
|
|
newline
|
|
bitfld.long 0x4 20.--21. "HT,Hour tens in BCD format" "0,1,2,3"
|
|
hexmask.long.byte 0x4 16.--19. 1. "HU,Hour units in BCD format"
|
|
newline
|
|
bitfld.long 0x4 15. "MSK2,Alarm B minutes mask" "0,1"
|
|
bitfld.long 0x4 12.--14. "MNT,Minute tens in BCD format" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--11. 1. "MNU,Minute units in BCD format"
|
|
bitfld.long 0x4 7. "MSK1,Alarm B seconds mask" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4.--6. "ST,Second tens in BCD format" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x4 0.--3. 1. "SU,Second units in BCD format"
|
|
rgroup.long 0x28++0x3
|
|
line.long 0x0 "SSR,sub second register"
|
|
hexmask.long.word 0x0 0.--15. 1. "SS,Sub second value"
|
|
group.long 0x3C++0x7
|
|
line.long 0x0 "CALR,calibration register"
|
|
bitfld.long 0x0 15. "CALP,Increase frequency of RTC by 488.5" "0,1"
|
|
bitfld.long 0x0 14. "CALW8,Use an 8-second calibration cycle" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "CALW16,Use a 16-second calibration cycle" "0,1"
|
|
hexmask.long.word 0x0 0.--8. 1. "CALM,Calibration minus"
|
|
line.long 0x4 "TAMPCR,tamper configuration register"
|
|
bitfld.long 0x4 24. "TAMP3MF,Tamper 3 mask flag" "0,1"
|
|
bitfld.long 0x4 23. "TAMP3NOERASE,Tamper 3 no erase" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "TAMP3IE,Tamper 3 interrupt enable" "0,1"
|
|
bitfld.long 0x4 21. "TAMP2MF,Tamper 2 mask flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 20. "TAMP2NOERASE,Tamper 2 no erase" "0,1"
|
|
bitfld.long 0x4 19. "TAMP2IE,Tamper 2 interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "TAMP1MF,Tamper 1 mask flag" "0,1"
|
|
bitfld.long 0x4 17. "TAMP1NOERASE,Tamper 1 no erase" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "TAMP1IE,Tamper 1 interrupt enable" "0,1"
|
|
bitfld.long 0x4 15. "TAMPPUDIS,TAMPER pull-up disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13.--14. "TAMPPRCH,Tamper precharge duration" "0,1,2,3"
|
|
bitfld.long 0x4 11.--12. "TAMPFLT,Tamper filter count" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 8.--10. "TAMPFREQ,Tamper sampling frequency" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 7. "TAMPTS,Activate timestamp on tamper detection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "TAMP3TRG,Active level for tamper 3" "0,1"
|
|
bitfld.long 0x4 5. "TAMP3E,Tamper 3 detection enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "TAMP2TRG,Active level for tamper 2" "0,1"
|
|
bitfld.long 0x4 3. "TAMP2E,Tamper 2 detection enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "TAMPIE,Tamper interrupt enable" "0,1"
|
|
bitfld.long 0x4 1. "TAMP1TRG,Active level for tamper 1" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "TAMP1E,Tamper 1 detection enable" "0,1"
|
|
endif
|
|
sif (cpuis("STM32L4R7*"))
|
|
group.long 0x8++0x7
|
|
line.long 0x0 "CR,control register"
|
|
bitfld.long 0x0 24. "ITSE,timestamp on internal event" "0,1"
|
|
bitfld.long 0x0 23. "COE,Calibration output enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21.--22. "OSEL,Output selection" "0,1,2,3"
|
|
bitfld.long 0x0 20. "POL,Output polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "COSEL,Calibration output" "0,1"
|
|
bitfld.long 0x0 18. "BKP,Backup" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "SUB1H,Subtract 1 hour (winter time" "0,1"
|
|
bitfld.long 0x0 16. "ADD1H,Add 1 hour (summer time" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "TSIE,Time-stamp interrupt" "0,1"
|
|
bitfld.long 0x0 14. "WUTIE,Wakeup timer interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "ALRBIE,Alarm B interrupt enable" "0,1"
|
|
bitfld.long 0x0 12. "ALRAIE,Alarm A interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "TSE,Time stamp enable" "0,1"
|
|
bitfld.long 0x0 10. "WUTE,Wakeup timer enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "ALRBE,Alarm B enable" "0,1"
|
|
bitfld.long 0x0 8. "ALRAE,Alarm A enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "FMT,Hour format" "0,1"
|
|
bitfld.long 0x0 5. "BYPSHAD,Bypass the shadow" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "REFCKON,Reference clock detection enable (50 or" "0,1"
|
|
bitfld.long 0x0 3. "TSEDGE,Time-stamp event active" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "WCKSEL,Wakeup clock selection" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "ISR,initialization and status"
|
|
rbitfld.long 0x4 16. "RECALPF,Recalibration pending Flag" "0,1"
|
|
bitfld.long 0x4 15. "TAMP3F,RTC_TAMP3 detection flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 14. "TAMP2F,RTC_TAMP2 detection flag" "0,1"
|
|
bitfld.long 0x4 13. "TAMP1F,Tamper detection flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "TSOVF,Time-stamp overflow flag" "0,1"
|
|
bitfld.long 0x4 11. "TSF,Time-stamp flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "WUTF,Wakeup timer flag" "0,1"
|
|
bitfld.long 0x4 9. "ALRBF,Alarm B flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "ALRAF,Alarm A flag" "0,1"
|
|
bitfld.long 0x4 7. "INIT,Initialization mode" "0,1"
|
|
newline
|
|
rbitfld.long 0x4 6. "INITF,Initialization flag" "0,1"
|
|
bitfld.long 0x4 5. "RSF,Registers synchronization" "0,1"
|
|
newline
|
|
rbitfld.long 0x4 4. "INITS,Initialization status flag" "0,1"
|
|
bitfld.long 0x4 3. "SHPF,Shift operation pending" "0,1"
|
|
newline
|
|
rbitfld.long 0x4 2. "WUTWF,Wakeup timer write flag" "0,1"
|
|
rbitfld.long 0x4 1. "ALRBWF,Alarm B write flag" "0,1"
|
|
newline
|
|
rbitfld.long 0x4 0. "ALRAWF,Alarm A write flag" "0,1"
|
|
group.long 0x1C++0x7
|
|
line.long 0x0 "ALRMAR,alarm A register"
|
|
bitfld.long 0x0 31. "MSK4,Alarm A date mask" "0,1"
|
|
bitfld.long 0x0 30. "WDSEL,Week day selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28.--29. "DT,Date tens in BCD format" "0,1,2,3"
|
|
hexmask.long.byte 0x0 24.--27. 1. "DU,Date units or day in BCD"
|
|
newline
|
|
bitfld.long 0x0 23. "MSK3,Alarm A hours mask" "0,1"
|
|
bitfld.long 0x0 22. "PM,AM/PM notation" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20.--21. "HT,Hour tens in BCD format" "0,1,2,3"
|
|
hexmask.long.byte 0x0 16.--19. 1. "HU,Hour units in BCD format"
|
|
newline
|
|
bitfld.long 0x0 15. "MSK2,Alarm A minutes mask" "0,1"
|
|
bitfld.long 0x0 12.--14. "MNT,Minute tens in BCD format" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "MNU,Minute units in BCD format"
|
|
bitfld.long 0x0 7. "MSK1,Alarm A seconds mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4.--6. "ST,Second tens in BCD format" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x0 0.--3. 1. "SU,Second units in BCD format"
|
|
line.long 0x4 "ALRMBR,alarm B register"
|
|
bitfld.long 0x4 31. "MSK4,Alarm B date mask" "0,1"
|
|
bitfld.long 0x4 30. "WDSEL,Week day selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28.--29. "DT,Date tens in BCD format" "0,1,2,3"
|
|
hexmask.long.byte 0x4 24.--27. 1. "DU,Date units or day in BCD"
|
|
newline
|
|
bitfld.long 0x4 23. "MSK3,Alarm B hours mask" "0,1"
|
|
bitfld.long 0x4 22. "PM,AM/PM notation" "0,1"
|
|
newline
|
|
bitfld.long 0x4 20.--21. "HT,Hour tens in BCD format" "0,1,2,3"
|
|
hexmask.long.byte 0x4 16.--19. 1. "HU,Hour units in BCD format"
|
|
newline
|
|
bitfld.long 0x4 15. "MSK2,Alarm B minutes mask" "0,1"
|
|
bitfld.long 0x4 12.--14. "MNT,Minute tens in BCD format" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--11. 1. "MNU,Minute units in BCD format"
|
|
bitfld.long 0x4 7. "MSK1,Alarm B seconds mask" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4.--6. "ST,Second tens in BCD format" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x4 0.--3. 1. "SU,Second units in BCD format"
|
|
rgroup.long 0x28++0x3
|
|
line.long 0x0 "SSR,sub second register"
|
|
hexmask.long.word 0x0 0.--15. 1. "SS,Sub second value"
|
|
group.long 0x3C++0x7
|
|
line.long 0x0 "CALR,calibration register"
|
|
bitfld.long 0x0 15. "CALP,Increase frequency of RTC by 488.5" "0,1"
|
|
bitfld.long 0x0 14. "CALW8,Use an 8-second calibration cycle" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "CALW16,Use a 16-second calibration cycle" "0,1"
|
|
hexmask.long.word 0x0 0.--8. 1. "CALM,Calibration minus"
|
|
line.long 0x4 "TAMPCR,tamper configuration register"
|
|
bitfld.long 0x4 24. "TAMP3MF,Tamper 3 mask flag" "0,1"
|
|
bitfld.long 0x4 23. "TAMP3NOERASE,Tamper 3 no erase" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "TAMP3IE,Tamper 3 interrupt enable" "0,1"
|
|
bitfld.long 0x4 21. "TAMP2MF,Tamper 2 mask flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 20. "TAMP2NOERASE,Tamper 2 no erase" "0,1"
|
|
bitfld.long 0x4 19. "TAMP2IE,Tamper 2 interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "TAMP1MF,Tamper 1 mask flag" "0,1"
|
|
bitfld.long 0x4 17. "TAMP1NOERASE,Tamper 1 no erase" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "TAMP1IE,Tamper 1 interrupt enable" "0,1"
|
|
bitfld.long 0x4 15. "TAMPPUDIS,TAMPER pull-up disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13.--14. "TAMPPRCH,Tamper precharge duration" "0,1,2,3"
|
|
bitfld.long 0x4 11.--12. "TAMPFLT,Tamper filter count" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 8.--10. "TAMPFREQ,Tamper sampling frequency" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 7. "TAMPTS,Activate timestamp on tamper detection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "TAMP3TRG,Active level for tamper 3" "0,1"
|
|
bitfld.long 0x4 5. "TAMP3E,Tamper 3 detection enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "TAMP2TRG,Active level for tamper 2" "0,1"
|
|
bitfld.long 0x4 3. "TAMP2E,Tamper 2 detection enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "TAMPIE,Tamper interrupt enable" "0,1"
|
|
bitfld.long 0x4 1. "TAMP1TRG,Active level for tamper 1" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "TAMP1E,Tamper 1 detection enable" "0,1"
|
|
group.long 0x48++0x83
|
|
line.long 0x0 "ALRMBSSR,alarm B sub second register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "MASKSS,Mask the most-significant bits starting"
|
|
hexmask.long.word 0x0 0.--14. 1. "SS,Sub seconds value"
|
|
line.long 0x4 "OR,option register"
|
|
bitfld.long 0x4 1. "RTC_OUT_RMP,RTC_OUT remap" "0,1"
|
|
bitfld.long 0x4 0. "RTC_ALARM_TYPE,RTC_ALARM on PC13 output" "0,1"
|
|
line.long 0x8 "BKP0R,backup register"
|
|
hexmask.long 0x8 0.--31. 1. "BKP,BKP"
|
|
line.long 0xC "BKP1R,backup register"
|
|
hexmask.long 0xC 0.--31. 1. "BKP,BKP"
|
|
line.long 0x10 "BKP2R,backup register"
|
|
hexmask.long 0x10 0.--31. 1. "BKP,BKP"
|
|
line.long 0x14 "BKP3R,backup register"
|
|
hexmask.long 0x14 0.--31. 1. "BKP,BKP"
|
|
line.long 0x18 "BKP4R,backup register"
|
|
hexmask.long 0x18 0.--31. 1. "BKP,BKP"
|
|
line.long 0x1C "BKP5R,backup register"
|
|
hexmask.long 0x1C 0.--31. 1. "BKP,BKP"
|
|
line.long 0x20 "BKP6R,backup register"
|
|
hexmask.long 0x20 0.--31. 1. "BKP,BKP"
|
|
line.long 0x24 "BKP7R,backup register"
|
|
hexmask.long 0x24 0.--31. 1. "BKP,BKP"
|
|
line.long 0x28 "BKP8R,backup register"
|
|
hexmask.long 0x28 0.--31. 1. "BKP,BKP"
|
|
line.long 0x2C "BKP9R,backup register"
|
|
hexmask.long 0x2C 0.--31. 1. "BKP,BKP"
|
|
line.long 0x30 "BKP10R,backup register"
|
|
hexmask.long 0x30 0.--31. 1. "BKP,BKP"
|
|
line.long 0x34 "BKP11R,backup register"
|
|
hexmask.long 0x34 0.--31. 1. "BKP,BKP"
|
|
line.long 0x38 "BKP12R,backup register"
|
|
hexmask.long 0x38 0.--31. 1. "BKP,BKP"
|
|
line.long 0x3C "BKP13R,backup register"
|
|
hexmask.long 0x3C 0.--31. 1. "BKP,BKP"
|
|
line.long 0x40 "BKP14R,backup register"
|
|
hexmask.long 0x40 0.--31. 1. "BKP,BKP"
|
|
line.long 0x44 "BKP15R,backup register"
|
|
hexmask.long 0x44 0.--31. 1. "BKP,BKP"
|
|
line.long 0x48 "BKP16R,backup register"
|
|
hexmask.long 0x48 0.--31. 1. "BKP,BKP"
|
|
line.long 0x4C "BKP17R,backup register"
|
|
hexmask.long 0x4C 0.--31. 1. "BKP,BKP"
|
|
line.long 0x50 "BKP18R,backup register"
|
|
hexmask.long 0x50 0.--31. 1. "BKP,BKP"
|
|
line.long 0x54 "BKP19R,backup register"
|
|
hexmask.long 0x54 0.--31. 1. "BKP,BKP"
|
|
line.long 0x58 "BKP20R,backup register"
|
|
hexmask.long 0x58 0.--31. 1. "BKP,BKP"
|
|
line.long 0x5C "BKP21R,backup register"
|
|
hexmask.long 0x5C 0.--31. 1. "BKP,BKP"
|
|
line.long 0x60 "BKP22R,backup register"
|
|
hexmask.long 0x60 0.--31. 1. "BKP,BKP"
|
|
line.long 0x64 "BKP23R,backup register"
|
|
hexmask.long 0x64 0.--31. 1. "BKP,BKP"
|
|
line.long 0x68 "BKP24R,backup register"
|
|
hexmask.long 0x68 0.--31. 1. "BKP,BKP"
|
|
line.long 0x6C "BKP25R,backup register"
|
|
hexmask.long 0x6C 0.--31. 1. "BKP,BKP"
|
|
line.long 0x70 "BKP26R,backup register"
|
|
hexmask.long 0x70 0.--31. 1. "BKP,BKP"
|
|
line.long 0x74 "BKP27R,backup register"
|
|
hexmask.long 0x74 0.--31. 1. "BKP,BKP"
|
|
line.long 0x78 "BKP28R,backup register"
|
|
hexmask.long 0x78 0.--31. 1. "BKP,BKP"
|
|
line.long 0x7C "BKP29R,backup register"
|
|
hexmask.long 0x7C 0.--31. 1. "BKP,BKP"
|
|
line.long 0x80 "BKP30R,backup register"
|
|
hexmask.long 0x80 0.--31. 1. "BKP,BKP"
|
|
endif
|
|
sif (cpuis("STM32L4R9*"))
|
|
group.long 0x8++0x7
|
|
line.long 0x0 "CR,control register"
|
|
bitfld.long 0x0 24. "ITSE,timestamp on internal event" "0,1"
|
|
bitfld.long 0x0 23. "COE,Calibration output enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21.--22. "OSEL,Output selection" "0,1,2,3"
|
|
bitfld.long 0x0 20. "POL,Output polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "COSEL,Calibration output" "0,1"
|
|
bitfld.long 0x0 18. "BKP,Backup" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "SUB1H,Subtract 1 hour (winter time" "0,1"
|
|
bitfld.long 0x0 16. "ADD1H,Add 1 hour (summer time" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "TSIE,Time-stamp interrupt" "0,1"
|
|
bitfld.long 0x0 14. "WUTIE,Wakeup timer interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "ALRBIE,Alarm B interrupt enable" "0,1"
|
|
bitfld.long 0x0 12. "ALRAIE,Alarm A interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "TSE,Time stamp enable" "0,1"
|
|
bitfld.long 0x0 10. "WUTE,Wakeup timer enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "ALRBE,Alarm B enable" "0,1"
|
|
bitfld.long 0x0 8. "ALRAE,Alarm A enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "FMT,Hour format" "0,1"
|
|
bitfld.long 0x0 5. "BYPSHAD,Bypass the shadow" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "REFCKON,Reference clock detection enable (50 or" "0,1"
|
|
bitfld.long 0x0 3. "TSEDGE,Time-stamp event active" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "WCKSEL,Wakeup clock selection" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "ISR,initialization and status"
|
|
rbitfld.long 0x4 16. "RECALPF,Recalibration pending Flag" "0,1"
|
|
bitfld.long 0x4 15. "TAMP3F,RTC_TAMP3 detection flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 14. "TAMP2F,RTC_TAMP2 detection flag" "0,1"
|
|
bitfld.long 0x4 13. "TAMP1F,Tamper detection flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "TSOVF,Time-stamp overflow flag" "0,1"
|
|
bitfld.long 0x4 11. "TSF,Time-stamp flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "WUTF,Wakeup timer flag" "0,1"
|
|
bitfld.long 0x4 9. "ALRBF,Alarm B flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "ALRAF,Alarm A flag" "0,1"
|
|
bitfld.long 0x4 7. "INIT,Initialization mode" "0,1"
|
|
newline
|
|
rbitfld.long 0x4 6. "INITF,Initialization flag" "0,1"
|
|
bitfld.long 0x4 5. "RSF,Registers synchronization" "0,1"
|
|
newline
|
|
rbitfld.long 0x4 4. "INITS,Initialization status flag" "0,1"
|
|
bitfld.long 0x4 3. "SHPF,Shift operation pending" "0,1"
|
|
newline
|
|
rbitfld.long 0x4 2. "WUTWF,Wakeup timer write flag" "0,1"
|
|
rbitfld.long 0x4 1. "ALRBWF,Alarm B write flag" "0,1"
|
|
newline
|
|
rbitfld.long 0x4 0. "ALRAWF,Alarm A write flag" "0,1"
|
|
group.long 0x1C++0x7
|
|
line.long 0x0 "ALRMAR,alarm A register"
|
|
bitfld.long 0x0 31. "MSK4,Alarm A date mask" "0,1"
|
|
bitfld.long 0x0 30. "WDSEL,Week day selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28.--29. "DT,Date tens in BCD format" "0,1,2,3"
|
|
hexmask.long.byte 0x0 24.--27. 1. "DU,Date units or day in BCD"
|
|
newline
|
|
bitfld.long 0x0 23. "MSK3,Alarm A hours mask" "0,1"
|
|
bitfld.long 0x0 22. "PM,AM/PM notation" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20.--21. "HT,Hour tens in BCD format" "0,1,2,3"
|
|
hexmask.long.byte 0x0 16.--19. 1. "HU,Hour units in BCD format"
|
|
newline
|
|
bitfld.long 0x0 15. "MSK2,Alarm A minutes mask" "0,1"
|
|
bitfld.long 0x0 12.--14. "MNT,Minute tens in BCD format" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "MNU,Minute units in BCD format"
|
|
bitfld.long 0x0 7. "MSK1,Alarm A seconds mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4.--6. "ST,Second tens in BCD format" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x0 0.--3. 1. "SU,Second units in BCD format"
|
|
line.long 0x4 "ALRMBR,alarm B register"
|
|
bitfld.long 0x4 31. "MSK4,Alarm B date mask" "0,1"
|
|
bitfld.long 0x4 30. "WDSEL,Week day selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28.--29. "DT,Date tens in BCD format" "0,1,2,3"
|
|
hexmask.long.byte 0x4 24.--27. 1. "DU,Date units or day in BCD"
|
|
newline
|
|
bitfld.long 0x4 23. "MSK3,Alarm B hours mask" "0,1"
|
|
bitfld.long 0x4 22. "PM,AM/PM notation" "0,1"
|
|
newline
|
|
bitfld.long 0x4 20.--21. "HT,Hour tens in BCD format" "0,1,2,3"
|
|
hexmask.long.byte 0x4 16.--19. 1. "HU,Hour units in BCD format"
|
|
newline
|
|
bitfld.long 0x4 15. "MSK2,Alarm B minutes mask" "0,1"
|
|
bitfld.long 0x4 12.--14. "MNT,Minute tens in BCD format" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--11. 1. "MNU,Minute units in BCD format"
|
|
bitfld.long 0x4 7. "MSK1,Alarm B seconds mask" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4.--6. "ST,Second tens in BCD format" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x4 0.--3. 1. "SU,Second units in BCD format"
|
|
rgroup.long 0x28++0x3
|
|
line.long 0x0 "SSR,sub second register"
|
|
hexmask.long.word 0x0 0.--15. 1. "SS,Sub second value"
|
|
group.long 0x3C++0x7
|
|
line.long 0x0 "CALR,calibration register"
|
|
bitfld.long 0x0 15. "CALP,Increase frequency of RTC by 488.5" "0,1"
|
|
bitfld.long 0x0 14. "CALW8,Use an 8-second calibration cycle" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "CALW16,Use a 16-second calibration cycle" "0,1"
|
|
hexmask.long.word 0x0 0.--8. 1. "CALM,Calibration minus"
|
|
line.long 0x4 "TAMPCR,tamper configuration register"
|
|
bitfld.long 0x4 24. "TAMP3MF,Tamper 3 mask flag" "0,1"
|
|
bitfld.long 0x4 23. "TAMP3NOERASE,Tamper 3 no erase" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "TAMP3IE,Tamper 3 interrupt enable" "0,1"
|
|
bitfld.long 0x4 21. "TAMP2MF,Tamper 2 mask flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 20. "TAMP2NOERASE,Tamper 2 no erase" "0,1"
|
|
bitfld.long 0x4 19. "TAMP2IE,Tamper 2 interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "TAMP1MF,Tamper 1 mask flag" "0,1"
|
|
bitfld.long 0x4 17. "TAMP1NOERASE,Tamper 1 no erase" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "TAMP1IE,Tamper 1 interrupt enable" "0,1"
|
|
bitfld.long 0x4 15. "TAMPPUDIS,TAMPER pull-up disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13.--14. "TAMPPRCH,Tamper precharge duration" "0,1,2,3"
|
|
bitfld.long 0x4 11.--12. "TAMPFLT,Tamper filter count" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 8.--10. "TAMPFREQ,Tamper sampling frequency" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 7. "TAMPTS,Activate timestamp on tamper detection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "TAMP3TRG,Active level for tamper 3" "0,1"
|
|
bitfld.long 0x4 5. "TAMP3E,Tamper 3 detection enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "TAMP2TRG,Active level for tamper 2" "0,1"
|
|
bitfld.long 0x4 3. "TAMP2E,Tamper 2 detection enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "TAMPIE,Tamper interrupt enable" "0,1"
|
|
bitfld.long 0x4 1. "TAMP1TRG,Active level for tamper 1" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "TAMP1E,Tamper 1 detection enable" "0,1"
|
|
group.long 0x48++0x83
|
|
line.long 0x0 "ALRMBSSR,alarm B sub second register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "MASKSS,Mask the most-significant bits starting"
|
|
hexmask.long.word 0x0 0.--14. 1. "SS,Sub seconds value"
|
|
line.long 0x4 "OR,option register"
|
|
bitfld.long 0x4 1. "RTC_OUT_RMP,RTC_OUT remap" "0,1"
|
|
bitfld.long 0x4 0. "RTC_ALARM_TYPE,RTC_ALARM on PC13 output" "0,1"
|
|
line.long 0x8 "BKP0R,backup register"
|
|
hexmask.long 0x8 0.--31. 1. "BKP,BKP"
|
|
line.long 0xC "BKP1R,backup register"
|
|
hexmask.long 0xC 0.--31. 1. "BKP,BKP"
|
|
line.long 0x10 "BKP2R,backup register"
|
|
hexmask.long 0x10 0.--31. 1. "BKP,BKP"
|
|
line.long 0x14 "BKP3R,backup register"
|
|
hexmask.long 0x14 0.--31. 1. "BKP,BKP"
|
|
line.long 0x18 "BKP4R,backup register"
|
|
hexmask.long 0x18 0.--31. 1. "BKP,BKP"
|
|
line.long 0x1C "BKP5R,backup register"
|
|
hexmask.long 0x1C 0.--31. 1. "BKP,BKP"
|
|
line.long 0x20 "BKP6R,backup register"
|
|
hexmask.long 0x20 0.--31. 1. "BKP,BKP"
|
|
line.long 0x24 "BKP7R,backup register"
|
|
hexmask.long 0x24 0.--31. 1. "BKP,BKP"
|
|
line.long 0x28 "BKP8R,backup register"
|
|
hexmask.long 0x28 0.--31. 1. "BKP,BKP"
|
|
line.long 0x2C "BKP9R,backup register"
|
|
hexmask.long 0x2C 0.--31. 1. "BKP,BKP"
|
|
line.long 0x30 "BKP10R,backup register"
|
|
hexmask.long 0x30 0.--31. 1. "BKP,BKP"
|
|
line.long 0x34 "BKP11R,backup register"
|
|
hexmask.long 0x34 0.--31. 1. "BKP,BKP"
|
|
line.long 0x38 "BKP12R,backup register"
|
|
hexmask.long 0x38 0.--31. 1. "BKP,BKP"
|
|
line.long 0x3C "BKP13R,backup register"
|
|
hexmask.long 0x3C 0.--31. 1. "BKP,BKP"
|
|
line.long 0x40 "BKP14R,backup register"
|
|
hexmask.long 0x40 0.--31. 1. "BKP,BKP"
|
|
line.long 0x44 "BKP15R,backup register"
|
|
hexmask.long 0x44 0.--31. 1. "BKP,BKP"
|
|
line.long 0x48 "BKP16R,backup register"
|
|
hexmask.long 0x48 0.--31. 1. "BKP,BKP"
|
|
line.long 0x4C "BKP17R,backup register"
|
|
hexmask.long 0x4C 0.--31. 1. "BKP,BKP"
|
|
line.long 0x50 "BKP18R,backup register"
|
|
hexmask.long 0x50 0.--31. 1. "BKP,BKP"
|
|
line.long 0x54 "BKP19R,backup register"
|
|
hexmask.long 0x54 0.--31. 1. "BKP,BKP"
|
|
line.long 0x58 "BKP20R,backup register"
|
|
hexmask.long 0x58 0.--31. 1. "BKP,BKP"
|
|
line.long 0x5C "BKP21R,backup register"
|
|
hexmask.long 0x5C 0.--31. 1. "BKP,BKP"
|
|
line.long 0x60 "BKP22R,backup register"
|
|
hexmask.long 0x60 0.--31. 1. "BKP,BKP"
|
|
line.long 0x64 "BKP23R,backup register"
|
|
hexmask.long 0x64 0.--31. 1. "BKP,BKP"
|
|
line.long 0x68 "BKP24R,backup register"
|
|
hexmask.long 0x68 0.--31. 1. "BKP,BKP"
|
|
line.long 0x6C "BKP25R,backup register"
|
|
hexmask.long 0x6C 0.--31. 1. "BKP,BKP"
|
|
line.long 0x70 "BKP26R,backup register"
|
|
hexmask.long 0x70 0.--31. 1. "BKP,BKP"
|
|
line.long 0x74 "BKP27R,backup register"
|
|
hexmask.long 0x74 0.--31. 1. "BKP,BKP"
|
|
line.long 0x78 "BKP28R,backup register"
|
|
hexmask.long 0x78 0.--31. 1. "BKP,BKP"
|
|
line.long 0x7C "BKP29R,backup register"
|
|
hexmask.long 0x7C 0.--31. 1. "BKP,BKP"
|
|
line.long 0x80 "BKP30R,backup register"
|
|
hexmask.long 0x80 0.--31. 1. "BKP,BKP"
|
|
endif
|
|
sif (cpuis("STM32L4S5*"))
|
|
group.long 0x8++0x7
|
|
line.long 0x0 "CR,control register"
|
|
bitfld.long 0x0 24. "ITSE,timestamp on internal event" "0,1"
|
|
bitfld.long 0x0 23. "COE,Calibration output enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21.--22. "OSEL,Output selection" "0,1,2,3"
|
|
bitfld.long 0x0 20. "POL,Output polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "COSEL,Calibration output" "0,1"
|
|
bitfld.long 0x0 18. "BKP,Backup" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "SUB1H,Subtract 1 hour (winter time" "0,1"
|
|
bitfld.long 0x0 16. "ADD1H,Add 1 hour (summer time" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "TSIE,Time-stamp interrupt" "0,1"
|
|
bitfld.long 0x0 14. "WUTIE,Wakeup timer interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "ALRBIE,Alarm B interrupt enable" "0,1"
|
|
bitfld.long 0x0 12. "ALRAIE,Alarm A interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "TSE,Time stamp enable" "0,1"
|
|
bitfld.long 0x0 10. "WUTE,Wakeup timer enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "ALRBE,Alarm B enable" "0,1"
|
|
bitfld.long 0x0 8. "ALRAE,Alarm A enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "FMT,Hour format" "0,1"
|
|
bitfld.long 0x0 5. "BYPSHAD,Bypass the shadow" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "REFCKON,Reference clock detection enable (50 or" "0,1"
|
|
bitfld.long 0x0 3. "TSEDGE,Time-stamp event active" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "WCKSEL,Wakeup clock selection" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "ISR,initialization and status"
|
|
rbitfld.long 0x4 16. "RECALPF,Recalibration pending Flag" "0,1"
|
|
bitfld.long 0x4 15. "TAMP3F,RTC_TAMP3 detection flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 14. "TAMP2F,RTC_TAMP2 detection flag" "0,1"
|
|
bitfld.long 0x4 13. "TAMP1F,Tamper detection flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "TSOVF,Time-stamp overflow flag" "0,1"
|
|
bitfld.long 0x4 11. "TSF,Time-stamp flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "WUTF,Wakeup timer flag" "0,1"
|
|
bitfld.long 0x4 9. "ALRBF,Alarm B flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "ALRAF,Alarm A flag" "0,1"
|
|
bitfld.long 0x4 7. "INIT,Initialization mode" "0,1"
|
|
newline
|
|
rbitfld.long 0x4 6. "INITF,Initialization flag" "0,1"
|
|
bitfld.long 0x4 5. "RSF,Registers synchronization" "0,1"
|
|
newline
|
|
rbitfld.long 0x4 4. "INITS,Initialization status flag" "0,1"
|
|
bitfld.long 0x4 3. "SHPF,Shift operation pending" "0,1"
|
|
newline
|
|
rbitfld.long 0x4 2. "WUTWF,Wakeup timer write flag" "0,1"
|
|
rbitfld.long 0x4 1. "ALRBWF,Alarm B write flag" "0,1"
|
|
newline
|
|
rbitfld.long 0x4 0. "ALRAWF,Alarm A write flag" "0,1"
|
|
group.long 0x1C++0x7
|
|
line.long 0x0 "ALRMAR,alarm A register"
|
|
bitfld.long 0x0 31. "MSK4,Alarm A date mask" "0,1"
|
|
bitfld.long 0x0 30. "WDSEL,Week day selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28.--29. "DT,Date tens in BCD format" "0,1,2,3"
|
|
hexmask.long.byte 0x0 24.--27. 1. "DU,Date units or day in BCD"
|
|
newline
|
|
bitfld.long 0x0 23. "MSK3,Alarm A hours mask" "0,1"
|
|
bitfld.long 0x0 22. "PM,AM/PM notation" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20.--21. "HT,Hour tens in BCD format" "0,1,2,3"
|
|
hexmask.long.byte 0x0 16.--19. 1. "HU,Hour units in BCD format"
|
|
newline
|
|
bitfld.long 0x0 15. "MSK2,Alarm A minutes mask" "0,1"
|
|
bitfld.long 0x0 12.--14. "MNT,Minute tens in BCD format" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "MNU,Minute units in BCD format"
|
|
bitfld.long 0x0 7. "MSK1,Alarm A seconds mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4.--6. "ST,Second tens in BCD format" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x0 0.--3. 1. "SU,Second units in BCD format"
|
|
line.long 0x4 "ALRMBR,alarm B register"
|
|
bitfld.long 0x4 31. "MSK4,Alarm B date mask" "0,1"
|
|
bitfld.long 0x4 30. "WDSEL,Week day selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28.--29. "DT,Date tens in BCD format" "0,1,2,3"
|
|
hexmask.long.byte 0x4 24.--27. 1. "DU,Date units or day in BCD"
|
|
newline
|
|
bitfld.long 0x4 23. "MSK3,Alarm B hours mask" "0,1"
|
|
bitfld.long 0x4 22. "PM,AM/PM notation" "0,1"
|
|
newline
|
|
bitfld.long 0x4 20.--21. "HT,Hour tens in BCD format" "0,1,2,3"
|
|
hexmask.long.byte 0x4 16.--19. 1. "HU,Hour units in BCD format"
|
|
newline
|
|
bitfld.long 0x4 15. "MSK2,Alarm B minutes mask" "0,1"
|
|
bitfld.long 0x4 12.--14. "MNT,Minute tens in BCD format" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--11. 1. "MNU,Minute units in BCD format"
|
|
bitfld.long 0x4 7. "MSK1,Alarm B seconds mask" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4.--6. "ST,Second tens in BCD format" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x4 0.--3. 1. "SU,Second units in BCD format"
|
|
rgroup.long 0x28++0x3
|
|
line.long 0x0 "SSR,sub second register"
|
|
hexmask.long.word 0x0 0.--15. 1. "SS,Sub second value"
|
|
group.long 0x3C++0x7
|
|
line.long 0x0 "CALR,calibration register"
|
|
bitfld.long 0x0 15. "CALP,Increase frequency of RTC by 488.5" "0,1"
|
|
bitfld.long 0x0 14. "CALW8,Use an 8-second calibration cycle" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "CALW16,Use a 16-second calibration cycle" "0,1"
|
|
hexmask.long.word 0x0 0.--8. 1. "CALM,Calibration minus"
|
|
line.long 0x4 "TAMPCR,tamper configuration register"
|
|
bitfld.long 0x4 24. "TAMP3MF,Tamper 3 mask flag" "0,1"
|
|
bitfld.long 0x4 23. "TAMP3NOERASE,Tamper 3 no erase" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "TAMP3IE,Tamper 3 interrupt enable" "0,1"
|
|
bitfld.long 0x4 21. "TAMP2MF,Tamper 2 mask flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 20. "TAMP2NOERASE,Tamper 2 no erase" "0,1"
|
|
bitfld.long 0x4 19. "TAMP2IE,Tamper 2 interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "TAMP1MF,Tamper 1 mask flag" "0,1"
|
|
bitfld.long 0x4 17. "TAMP1NOERASE,Tamper 1 no erase" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "TAMP1IE,Tamper 1 interrupt enable" "0,1"
|
|
bitfld.long 0x4 15. "TAMPPUDIS,TAMPER pull-up disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13.--14. "TAMPPRCH,Tamper precharge duration" "0,1,2,3"
|
|
bitfld.long 0x4 11.--12. "TAMPFLT,Tamper filter count" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 8.--10. "TAMPFREQ,Tamper sampling frequency" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 7. "TAMPTS,Activate timestamp on tamper detection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "TAMP3TRG,Active level for tamper 3" "0,1"
|
|
bitfld.long 0x4 5. "TAMP3E,Tamper 3 detection enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "TAMP2TRG,Active level for tamper 2" "0,1"
|
|
bitfld.long 0x4 3. "TAMP2E,Tamper 2 detection enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "TAMPIE,Tamper interrupt enable" "0,1"
|
|
bitfld.long 0x4 1. "TAMP1TRG,Active level for tamper 1" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "TAMP1E,Tamper 1 detection enable" "0,1"
|
|
group.long 0x48++0x83
|
|
line.long 0x0 "ALRMBSSR,alarm B sub second register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "MASKSS,Mask the most-significant bits starting"
|
|
hexmask.long.word 0x0 0.--14. 1. "SS,Sub seconds value"
|
|
line.long 0x4 "OR,option register"
|
|
bitfld.long 0x4 1. "RTC_OUT_RMP,RTC_OUT remap" "0,1"
|
|
bitfld.long 0x4 0. "RTC_ALARM_TYPE,RTC_ALARM on PC13 output" "0,1"
|
|
line.long 0x8 "BKP0R,backup register"
|
|
hexmask.long 0x8 0.--31. 1. "BKP,BKP"
|
|
line.long 0xC "BKP1R,backup register"
|
|
hexmask.long 0xC 0.--31. 1. "BKP,BKP"
|
|
line.long 0x10 "BKP2R,backup register"
|
|
hexmask.long 0x10 0.--31. 1. "BKP,BKP"
|
|
line.long 0x14 "BKP3R,backup register"
|
|
hexmask.long 0x14 0.--31. 1. "BKP,BKP"
|
|
line.long 0x18 "BKP4R,backup register"
|
|
hexmask.long 0x18 0.--31. 1. "BKP,BKP"
|
|
line.long 0x1C "BKP5R,backup register"
|
|
hexmask.long 0x1C 0.--31. 1. "BKP,BKP"
|
|
line.long 0x20 "BKP6R,backup register"
|
|
hexmask.long 0x20 0.--31. 1. "BKP,BKP"
|
|
line.long 0x24 "BKP7R,backup register"
|
|
hexmask.long 0x24 0.--31. 1. "BKP,BKP"
|
|
line.long 0x28 "BKP8R,backup register"
|
|
hexmask.long 0x28 0.--31. 1. "BKP,BKP"
|
|
line.long 0x2C "BKP9R,backup register"
|
|
hexmask.long 0x2C 0.--31. 1. "BKP,BKP"
|
|
line.long 0x30 "BKP10R,backup register"
|
|
hexmask.long 0x30 0.--31. 1. "BKP,BKP"
|
|
line.long 0x34 "BKP11R,backup register"
|
|
hexmask.long 0x34 0.--31. 1. "BKP,BKP"
|
|
line.long 0x38 "BKP12R,backup register"
|
|
hexmask.long 0x38 0.--31. 1. "BKP,BKP"
|
|
line.long 0x3C "BKP13R,backup register"
|
|
hexmask.long 0x3C 0.--31. 1. "BKP,BKP"
|
|
line.long 0x40 "BKP14R,backup register"
|
|
hexmask.long 0x40 0.--31. 1. "BKP,BKP"
|
|
line.long 0x44 "BKP15R,backup register"
|
|
hexmask.long 0x44 0.--31. 1. "BKP,BKP"
|
|
line.long 0x48 "BKP16R,backup register"
|
|
hexmask.long 0x48 0.--31. 1. "BKP,BKP"
|
|
line.long 0x4C "BKP17R,backup register"
|
|
hexmask.long 0x4C 0.--31. 1. "BKP,BKP"
|
|
line.long 0x50 "BKP18R,backup register"
|
|
hexmask.long 0x50 0.--31. 1. "BKP,BKP"
|
|
line.long 0x54 "BKP19R,backup register"
|
|
hexmask.long 0x54 0.--31. 1. "BKP,BKP"
|
|
line.long 0x58 "BKP20R,backup register"
|
|
hexmask.long 0x58 0.--31. 1. "BKP,BKP"
|
|
line.long 0x5C "BKP21R,backup register"
|
|
hexmask.long 0x5C 0.--31. 1. "BKP,BKP"
|
|
line.long 0x60 "BKP22R,backup register"
|
|
hexmask.long 0x60 0.--31. 1. "BKP,BKP"
|
|
line.long 0x64 "BKP23R,backup register"
|
|
hexmask.long 0x64 0.--31. 1. "BKP,BKP"
|
|
line.long 0x68 "BKP24R,backup register"
|
|
hexmask.long 0x68 0.--31. 1. "BKP,BKP"
|
|
line.long 0x6C "BKP25R,backup register"
|
|
hexmask.long 0x6C 0.--31. 1. "BKP,BKP"
|
|
line.long 0x70 "BKP26R,backup register"
|
|
hexmask.long 0x70 0.--31. 1. "BKP,BKP"
|
|
line.long 0x74 "BKP27R,backup register"
|
|
hexmask.long 0x74 0.--31. 1. "BKP,BKP"
|
|
line.long 0x78 "BKP28R,backup register"
|
|
hexmask.long 0x78 0.--31. 1. "BKP,BKP"
|
|
line.long 0x7C "BKP29R,backup register"
|
|
hexmask.long 0x7C 0.--31. 1. "BKP,BKP"
|
|
line.long 0x80 "BKP30R,backup register"
|
|
hexmask.long 0x80 0.--31. 1. "BKP,BKP"
|
|
endif
|
|
sif (cpuis("STM32L4S7*"))
|
|
group.long 0x8++0x7
|
|
line.long 0x0 "CR,control register"
|
|
bitfld.long 0x0 24. "ITSE,timestamp on internal event" "0,1"
|
|
bitfld.long 0x0 23. "COE,Calibration output enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21.--22. "OSEL,Output selection" "0,1,2,3"
|
|
bitfld.long 0x0 20. "POL,Output polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "COSEL,Calibration output" "0,1"
|
|
bitfld.long 0x0 18. "BKP,Backup" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "SUB1H,Subtract 1 hour (winter time" "0,1"
|
|
bitfld.long 0x0 16. "ADD1H,Add 1 hour (summer time" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "TSIE,Time-stamp interrupt" "0,1"
|
|
bitfld.long 0x0 14. "WUTIE,Wakeup timer interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "ALRBIE,Alarm B interrupt enable" "0,1"
|
|
bitfld.long 0x0 12. "ALRAIE,Alarm A interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "TSE,Time stamp enable" "0,1"
|
|
bitfld.long 0x0 10. "WUTE,Wakeup timer enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "ALRBE,Alarm B enable" "0,1"
|
|
bitfld.long 0x0 8. "ALRAE,Alarm A enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "FMT,Hour format" "0,1"
|
|
bitfld.long 0x0 5. "BYPSHAD,Bypass the shadow" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "REFCKON,Reference clock detection enable (50 or" "0,1"
|
|
bitfld.long 0x0 3. "TSEDGE,Time-stamp event active" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "WCKSEL,Wakeup clock selection" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "ISR,initialization and status"
|
|
rbitfld.long 0x4 16. "RECALPF,Recalibration pending Flag" "0,1"
|
|
bitfld.long 0x4 15. "TAMP3F,RTC_TAMP3 detection flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 14. "TAMP2F,RTC_TAMP2 detection flag" "0,1"
|
|
bitfld.long 0x4 13. "TAMP1F,Tamper detection flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "TSOVF,Time-stamp overflow flag" "0,1"
|
|
bitfld.long 0x4 11. "TSF,Time-stamp flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "WUTF,Wakeup timer flag" "0,1"
|
|
bitfld.long 0x4 9. "ALRBF,Alarm B flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "ALRAF,Alarm A flag" "0,1"
|
|
bitfld.long 0x4 7. "INIT,Initialization mode" "0,1"
|
|
newline
|
|
rbitfld.long 0x4 6. "INITF,Initialization flag" "0,1"
|
|
bitfld.long 0x4 5. "RSF,Registers synchronization" "0,1"
|
|
newline
|
|
rbitfld.long 0x4 4. "INITS,Initialization status flag" "0,1"
|
|
bitfld.long 0x4 3. "SHPF,Shift operation pending" "0,1"
|
|
newline
|
|
rbitfld.long 0x4 2. "WUTWF,Wakeup timer write flag" "0,1"
|
|
rbitfld.long 0x4 1. "ALRBWF,Alarm B write flag" "0,1"
|
|
newline
|
|
rbitfld.long 0x4 0. "ALRAWF,Alarm A write flag" "0,1"
|
|
group.long 0x1C++0x7
|
|
line.long 0x0 "ALRMAR,alarm A register"
|
|
bitfld.long 0x0 31. "MSK4,Alarm A date mask" "0,1"
|
|
bitfld.long 0x0 30. "WDSEL,Week day selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28.--29. "DT,Date tens in BCD format" "0,1,2,3"
|
|
hexmask.long.byte 0x0 24.--27. 1. "DU,Date units or day in BCD"
|
|
newline
|
|
bitfld.long 0x0 23. "MSK3,Alarm A hours mask" "0,1"
|
|
bitfld.long 0x0 22. "PM,AM/PM notation" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20.--21. "HT,Hour tens in BCD format" "0,1,2,3"
|
|
hexmask.long.byte 0x0 16.--19. 1. "HU,Hour units in BCD format"
|
|
newline
|
|
bitfld.long 0x0 15. "MSK2,Alarm A minutes mask" "0,1"
|
|
bitfld.long 0x0 12.--14. "MNT,Minute tens in BCD format" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "MNU,Minute units in BCD format"
|
|
bitfld.long 0x0 7. "MSK1,Alarm A seconds mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4.--6. "ST,Second tens in BCD format" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x0 0.--3. 1. "SU,Second units in BCD format"
|
|
line.long 0x4 "ALRMBR,alarm B register"
|
|
bitfld.long 0x4 31. "MSK4,Alarm B date mask" "0,1"
|
|
bitfld.long 0x4 30. "WDSEL,Week day selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28.--29. "DT,Date tens in BCD format" "0,1,2,3"
|
|
hexmask.long.byte 0x4 24.--27. 1. "DU,Date units or day in BCD"
|
|
newline
|
|
bitfld.long 0x4 23. "MSK3,Alarm B hours mask" "0,1"
|
|
bitfld.long 0x4 22. "PM,AM/PM notation" "0,1"
|
|
newline
|
|
bitfld.long 0x4 20.--21. "HT,Hour tens in BCD format" "0,1,2,3"
|
|
hexmask.long.byte 0x4 16.--19. 1. "HU,Hour units in BCD format"
|
|
newline
|
|
bitfld.long 0x4 15. "MSK2,Alarm B minutes mask" "0,1"
|
|
bitfld.long 0x4 12.--14. "MNT,Minute tens in BCD format" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--11. 1. "MNU,Minute units in BCD format"
|
|
bitfld.long 0x4 7. "MSK1,Alarm B seconds mask" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4.--6. "ST,Second tens in BCD format" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x4 0.--3. 1. "SU,Second units in BCD format"
|
|
rgroup.long 0x28++0x3
|
|
line.long 0x0 "SSR,sub second register"
|
|
hexmask.long.word 0x0 0.--15. 1. "SS,Sub second value"
|
|
group.long 0x3C++0x7
|
|
line.long 0x0 "CALR,calibration register"
|
|
bitfld.long 0x0 15. "CALP,Increase frequency of RTC by 488.5" "0,1"
|
|
bitfld.long 0x0 14. "CALW8,Use an 8-second calibration cycle" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "CALW16,Use a 16-second calibration cycle" "0,1"
|
|
hexmask.long.word 0x0 0.--8. 1. "CALM,Calibration minus"
|
|
line.long 0x4 "TAMPCR,tamper configuration register"
|
|
bitfld.long 0x4 24. "TAMP3MF,Tamper 3 mask flag" "0,1"
|
|
bitfld.long 0x4 23. "TAMP3NOERASE,Tamper 3 no erase" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "TAMP3IE,Tamper 3 interrupt enable" "0,1"
|
|
bitfld.long 0x4 21. "TAMP2MF,Tamper 2 mask flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 20. "TAMP2NOERASE,Tamper 2 no erase" "0,1"
|
|
bitfld.long 0x4 19. "TAMP2IE,Tamper 2 interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "TAMP1MF,Tamper 1 mask flag" "0,1"
|
|
bitfld.long 0x4 17. "TAMP1NOERASE,Tamper 1 no erase" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "TAMP1IE,Tamper 1 interrupt enable" "0,1"
|
|
bitfld.long 0x4 15. "TAMPPUDIS,TAMPER pull-up disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13.--14. "TAMPPRCH,Tamper precharge duration" "0,1,2,3"
|
|
bitfld.long 0x4 11.--12. "TAMPFLT,Tamper filter count" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 8.--10. "TAMPFREQ,Tamper sampling frequency" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 7. "TAMPTS,Activate timestamp on tamper detection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "TAMP3TRG,Active level for tamper 3" "0,1"
|
|
bitfld.long 0x4 5. "TAMP3E,Tamper 3 detection enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "TAMP2TRG,Active level for tamper 2" "0,1"
|
|
bitfld.long 0x4 3. "TAMP2E,Tamper 2 detection enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "TAMPIE,Tamper interrupt enable" "0,1"
|
|
bitfld.long 0x4 1. "TAMP1TRG,Active level for tamper 1" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "TAMP1E,Tamper 1 detection enable" "0,1"
|
|
group.long 0x48++0x83
|
|
line.long 0x0 "ALRMBSSR,alarm B sub second register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "MASKSS,Mask the most-significant bits starting"
|
|
hexmask.long.word 0x0 0.--14. 1. "SS,Sub seconds value"
|
|
line.long 0x4 "OR,option register"
|
|
bitfld.long 0x4 1. "RTC_OUT_RMP,RTC_OUT remap" "0,1"
|
|
bitfld.long 0x4 0. "RTC_ALARM_TYPE,RTC_ALARM on PC13 output" "0,1"
|
|
line.long 0x8 "BKP0R,backup register"
|
|
hexmask.long 0x8 0.--31. 1. "BKP,BKP"
|
|
line.long 0xC "BKP1R,backup register"
|
|
hexmask.long 0xC 0.--31. 1. "BKP,BKP"
|
|
line.long 0x10 "BKP2R,backup register"
|
|
hexmask.long 0x10 0.--31. 1. "BKP,BKP"
|
|
line.long 0x14 "BKP3R,backup register"
|
|
hexmask.long 0x14 0.--31. 1. "BKP,BKP"
|
|
line.long 0x18 "BKP4R,backup register"
|
|
hexmask.long 0x18 0.--31. 1. "BKP,BKP"
|
|
line.long 0x1C "BKP5R,backup register"
|
|
hexmask.long 0x1C 0.--31. 1. "BKP,BKP"
|
|
line.long 0x20 "BKP6R,backup register"
|
|
hexmask.long 0x20 0.--31. 1. "BKP,BKP"
|
|
line.long 0x24 "BKP7R,backup register"
|
|
hexmask.long 0x24 0.--31. 1. "BKP,BKP"
|
|
line.long 0x28 "BKP8R,backup register"
|
|
hexmask.long 0x28 0.--31. 1. "BKP,BKP"
|
|
line.long 0x2C "BKP9R,backup register"
|
|
hexmask.long 0x2C 0.--31. 1. "BKP,BKP"
|
|
line.long 0x30 "BKP10R,backup register"
|
|
hexmask.long 0x30 0.--31. 1. "BKP,BKP"
|
|
line.long 0x34 "BKP11R,backup register"
|
|
hexmask.long 0x34 0.--31. 1. "BKP,BKP"
|
|
line.long 0x38 "BKP12R,backup register"
|
|
hexmask.long 0x38 0.--31. 1. "BKP,BKP"
|
|
line.long 0x3C "BKP13R,backup register"
|
|
hexmask.long 0x3C 0.--31. 1. "BKP,BKP"
|
|
line.long 0x40 "BKP14R,backup register"
|
|
hexmask.long 0x40 0.--31. 1. "BKP,BKP"
|
|
line.long 0x44 "BKP15R,backup register"
|
|
hexmask.long 0x44 0.--31. 1. "BKP,BKP"
|
|
line.long 0x48 "BKP16R,backup register"
|
|
hexmask.long 0x48 0.--31. 1. "BKP,BKP"
|
|
line.long 0x4C "BKP17R,backup register"
|
|
hexmask.long 0x4C 0.--31. 1. "BKP,BKP"
|
|
line.long 0x50 "BKP18R,backup register"
|
|
hexmask.long 0x50 0.--31. 1. "BKP,BKP"
|
|
line.long 0x54 "BKP19R,backup register"
|
|
hexmask.long 0x54 0.--31. 1. "BKP,BKP"
|
|
line.long 0x58 "BKP20R,backup register"
|
|
hexmask.long 0x58 0.--31. 1. "BKP,BKP"
|
|
line.long 0x5C "BKP21R,backup register"
|
|
hexmask.long 0x5C 0.--31. 1. "BKP,BKP"
|
|
line.long 0x60 "BKP22R,backup register"
|
|
hexmask.long 0x60 0.--31. 1. "BKP,BKP"
|
|
line.long 0x64 "BKP23R,backup register"
|
|
hexmask.long 0x64 0.--31. 1. "BKP,BKP"
|
|
line.long 0x68 "BKP24R,backup register"
|
|
hexmask.long 0x68 0.--31. 1. "BKP,BKP"
|
|
line.long 0x6C "BKP25R,backup register"
|
|
hexmask.long 0x6C 0.--31. 1. "BKP,BKP"
|
|
line.long 0x70 "BKP26R,backup register"
|
|
hexmask.long 0x70 0.--31. 1. "BKP,BKP"
|
|
line.long 0x74 "BKP27R,backup register"
|
|
hexmask.long 0x74 0.--31. 1. "BKP,BKP"
|
|
line.long 0x78 "BKP28R,backup register"
|
|
hexmask.long 0x78 0.--31. 1. "BKP,BKP"
|
|
line.long 0x7C "BKP29R,backup register"
|
|
hexmask.long 0x7C 0.--31. 1. "BKP,BKP"
|
|
line.long 0x80 "BKP30R,backup register"
|
|
hexmask.long 0x80 0.--31. 1. "BKP,BKP"
|
|
endif
|
|
sif (cpuis("STM32L4S9*"))
|
|
group.long 0x8++0x7
|
|
line.long 0x0 "CR,control register"
|
|
bitfld.long 0x0 24. "ITSE,timestamp on internal event" "0,1"
|
|
bitfld.long 0x0 23. "COE,Calibration output enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21.--22. "OSEL,Output selection" "0,1,2,3"
|
|
bitfld.long 0x0 20. "POL,Output polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "COSEL,Calibration output" "0,1"
|
|
bitfld.long 0x0 18. "BKP,Backup" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "SUB1H,Subtract 1 hour (winter time" "0,1"
|
|
bitfld.long 0x0 16. "ADD1H,Add 1 hour (summer time" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "TSIE,Time-stamp interrupt" "0,1"
|
|
bitfld.long 0x0 14. "WUTIE,Wakeup timer interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "ALRBIE,Alarm B interrupt enable" "0,1"
|
|
bitfld.long 0x0 12. "ALRAIE,Alarm A interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "TSE,Time stamp enable" "0,1"
|
|
bitfld.long 0x0 10. "WUTE,Wakeup timer enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "ALRBE,Alarm B enable" "0,1"
|
|
bitfld.long 0x0 8. "ALRAE,Alarm A enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "FMT,Hour format" "0,1"
|
|
bitfld.long 0x0 5. "BYPSHAD,Bypass the shadow" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "REFCKON,Reference clock detection enable (50 or" "0,1"
|
|
bitfld.long 0x0 3. "TSEDGE,Time-stamp event active" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "WCKSEL,Wakeup clock selection" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "ISR,initialization and status"
|
|
rbitfld.long 0x4 16. "RECALPF,Recalibration pending Flag" "0,1"
|
|
bitfld.long 0x4 15. "TAMP3F,RTC_TAMP3 detection flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 14. "TAMP2F,RTC_TAMP2 detection flag" "0,1"
|
|
bitfld.long 0x4 13. "TAMP1F,Tamper detection flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "TSOVF,Time-stamp overflow flag" "0,1"
|
|
bitfld.long 0x4 11. "TSF,Time-stamp flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "WUTF,Wakeup timer flag" "0,1"
|
|
bitfld.long 0x4 9. "ALRBF,Alarm B flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "ALRAF,Alarm A flag" "0,1"
|
|
bitfld.long 0x4 7. "INIT,Initialization mode" "0,1"
|
|
newline
|
|
rbitfld.long 0x4 6. "INITF,Initialization flag" "0,1"
|
|
bitfld.long 0x4 5. "RSF,Registers synchronization" "0,1"
|
|
newline
|
|
rbitfld.long 0x4 4. "INITS,Initialization status flag" "0,1"
|
|
bitfld.long 0x4 3. "SHPF,Shift operation pending" "0,1"
|
|
newline
|
|
rbitfld.long 0x4 2. "WUTWF,Wakeup timer write flag" "0,1"
|
|
rbitfld.long 0x4 1. "ALRBWF,Alarm B write flag" "0,1"
|
|
newline
|
|
rbitfld.long 0x4 0. "ALRAWF,Alarm A write flag" "0,1"
|
|
group.long 0x1C++0x7
|
|
line.long 0x0 "ALRMAR,alarm A register"
|
|
bitfld.long 0x0 31. "MSK4,Alarm A date mask" "0,1"
|
|
bitfld.long 0x0 30. "WDSEL,Week day selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28.--29. "DT,Date tens in BCD format" "0,1,2,3"
|
|
hexmask.long.byte 0x0 24.--27. 1. "DU,Date units or day in BCD"
|
|
newline
|
|
bitfld.long 0x0 23. "MSK3,Alarm A hours mask" "0,1"
|
|
bitfld.long 0x0 22. "PM,AM/PM notation" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20.--21. "HT,Hour tens in BCD format" "0,1,2,3"
|
|
hexmask.long.byte 0x0 16.--19. 1. "HU,Hour units in BCD format"
|
|
newline
|
|
bitfld.long 0x0 15. "MSK2,Alarm A minutes mask" "0,1"
|
|
bitfld.long 0x0 12.--14. "MNT,Minute tens in BCD format" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "MNU,Minute units in BCD format"
|
|
bitfld.long 0x0 7. "MSK1,Alarm A seconds mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4.--6. "ST,Second tens in BCD format" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x0 0.--3. 1. "SU,Second units in BCD format"
|
|
line.long 0x4 "ALRMBR,alarm B register"
|
|
bitfld.long 0x4 31. "MSK4,Alarm B date mask" "0,1"
|
|
bitfld.long 0x4 30. "WDSEL,Week day selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28.--29. "DT,Date tens in BCD format" "0,1,2,3"
|
|
hexmask.long.byte 0x4 24.--27. 1. "DU,Date units or day in BCD"
|
|
newline
|
|
bitfld.long 0x4 23. "MSK3,Alarm B hours mask" "0,1"
|
|
bitfld.long 0x4 22. "PM,AM/PM notation" "0,1"
|
|
newline
|
|
bitfld.long 0x4 20.--21. "HT,Hour tens in BCD format" "0,1,2,3"
|
|
hexmask.long.byte 0x4 16.--19. 1. "HU,Hour units in BCD format"
|
|
newline
|
|
bitfld.long 0x4 15. "MSK2,Alarm B minutes mask" "0,1"
|
|
bitfld.long 0x4 12.--14. "MNT,Minute tens in BCD format" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--11. 1. "MNU,Minute units in BCD format"
|
|
bitfld.long 0x4 7. "MSK1,Alarm B seconds mask" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4.--6. "ST,Second tens in BCD format" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x4 0.--3. 1. "SU,Second units in BCD format"
|
|
rgroup.long 0x28++0x3
|
|
line.long 0x0 "SSR,sub second register"
|
|
hexmask.long.word 0x0 0.--15. 1. "SS,Sub second value"
|
|
group.long 0x3C++0x7
|
|
line.long 0x0 "CALR,calibration register"
|
|
bitfld.long 0x0 15. "CALP,Increase frequency of RTC by 488.5" "0,1"
|
|
bitfld.long 0x0 14. "CALW8,Use an 8-second calibration cycle" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "CALW16,Use a 16-second calibration cycle" "0,1"
|
|
hexmask.long.word 0x0 0.--8. 1. "CALM,Calibration minus"
|
|
line.long 0x4 "TAMPCR,tamper configuration register"
|
|
bitfld.long 0x4 24. "TAMP3MF,Tamper 3 mask flag" "0,1"
|
|
bitfld.long 0x4 23. "TAMP3NOERASE,Tamper 3 no erase" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "TAMP3IE,Tamper 3 interrupt enable" "0,1"
|
|
bitfld.long 0x4 21. "TAMP2MF,Tamper 2 mask flag" "0,1"
|
|
newline
|
|
bitfld.long 0x4 20. "TAMP2NOERASE,Tamper 2 no erase" "0,1"
|
|
bitfld.long 0x4 19. "TAMP2IE,Tamper 2 interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "TAMP1MF,Tamper 1 mask flag" "0,1"
|
|
bitfld.long 0x4 17. "TAMP1NOERASE,Tamper 1 no erase" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "TAMP1IE,Tamper 1 interrupt enable" "0,1"
|
|
bitfld.long 0x4 15. "TAMPPUDIS,TAMPER pull-up disable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13.--14. "TAMPPRCH,Tamper precharge duration" "0,1,2,3"
|
|
bitfld.long 0x4 11.--12. "TAMPFLT,Tamper filter count" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 8.--10. "TAMPFREQ,Tamper sampling frequency" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 7. "TAMPTS,Activate timestamp on tamper detection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "TAMP3TRG,Active level for tamper 3" "0,1"
|
|
bitfld.long 0x4 5. "TAMP3E,Tamper 3 detection enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "TAMP2TRG,Active level for tamper 2" "0,1"
|
|
bitfld.long 0x4 3. "TAMP2E,Tamper 2 detection enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "TAMPIE,Tamper interrupt enable" "0,1"
|
|
bitfld.long 0x4 1. "TAMP1TRG,Active level for tamper 1" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "TAMP1E,Tamper 1 detection enable" "0,1"
|
|
group.long 0x48++0x83
|
|
line.long 0x0 "ALRMBSSR,alarm B sub second register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "MASKSS,Mask the most-significant bits starting"
|
|
hexmask.long.word 0x0 0.--14. 1. "SS,Sub seconds value"
|
|
line.long 0x4 "OR,option register"
|
|
bitfld.long 0x4 1. "RTC_OUT_RMP,RTC_OUT remap" "0,1"
|
|
bitfld.long 0x4 0. "RTC_ALARM_TYPE,RTC_ALARM on PC13 output" "0,1"
|
|
line.long 0x8 "BKP0R,backup register"
|
|
hexmask.long 0x8 0.--31. 1. "BKP,BKP"
|
|
line.long 0xC "BKP1R,backup register"
|
|
hexmask.long 0xC 0.--31. 1. "BKP,BKP"
|
|
line.long 0x10 "BKP2R,backup register"
|
|
hexmask.long 0x10 0.--31. 1. "BKP,BKP"
|
|
line.long 0x14 "BKP3R,backup register"
|
|
hexmask.long 0x14 0.--31. 1. "BKP,BKP"
|
|
line.long 0x18 "BKP4R,backup register"
|
|
hexmask.long 0x18 0.--31. 1. "BKP,BKP"
|
|
line.long 0x1C "BKP5R,backup register"
|
|
hexmask.long 0x1C 0.--31. 1. "BKP,BKP"
|
|
line.long 0x20 "BKP6R,backup register"
|
|
hexmask.long 0x20 0.--31. 1. "BKP,BKP"
|
|
line.long 0x24 "BKP7R,backup register"
|
|
hexmask.long 0x24 0.--31. 1. "BKP,BKP"
|
|
line.long 0x28 "BKP8R,backup register"
|
|
hexmask.long 0x28 0.--31. 1. "BKP,BKP"
|
|
line.long 0x2C "BKP9R,backup register"
|
|
hexmask.long 0x2C 0.--31. 1. "BKP,BKP"
|
|
line.long 0x30 "BKP10R,backup register"
|
|
hexmask.long 0x30 0.--31. 1. "BKP,BKP"
|
|
line.long 0x34 "BKP11R,backup register"
|
|
hexmask.long 0x34 0.--31. 1. "BKP,BKP"
|
|
line.long 0x38 "BKP12R,backup register"
|
|
hexmask.long 0x38 0.--31. 1. "BKP,BKP"
|
|
line.long 0x3C "BKP13R,backup register"
|
|
hexmask.long 0x3C 0.--31. 1. "BKP,BKP"
|
|
line.long 0x40 "BKP14R,backup register"
|
|
hexmask.long 0x40 0.--31. 1. "BKP,BKP"
|
|
line.long 0x44 "BKP15R,backup register"
|
|
hexmask.long 0x44 0.--31. 1. "BKP,BKP"
|
|
line.long 0x48 "BKP16R,backup register"
|
|
hexmask.long 0x48 0.--31. 1. "BKP,BKP"
|
|
line.long 0x4C "BKP17R,backup register"
|
|
hexmask.long 0x4C 0.--31. 1. "BKP,BKP"
|
|
line.long 0x50 "BKP18R,backup register"
|
|
hexmask.long 0x50 0.--31. 1. "BKP,BKP"
|
|
line.long 0x54 "BKP19R,backup register"
|
|
hexmask.long 0x54 0.--31. 1. "BKP,BKP"
|
|
line.long 0x58 "BKP20R,backup register"
|
|
hexmask.long 0x58 0.--31. 1. "BKP,BKP"
|
|
line.long 0x5C "BKP21R,backup register"
|
|
hexmask.long 0x5C 0.--31. 1. "BKP,BKP"
|
|
line.long 0x60 "BKP22R,backup register"
|
|
hexmask.long 0x60 0.--31. 1. "BKP,BKP"
|
|
line.long 0x64 "BKP23R,backup register"
|
|
hexmask.long 0x64 0.--31. 1. "BKP,BKP"
|
|
line.long 0x68 "BKP24R,backup register"
|
|
hexmask.long 0x68 0.--31. 1. "BKP,BKP"
|
|
line.long 0x6C "BKP25R,backup register"
|
|
hexmask.long 0x6C 0.--31. 1. "BKP,BKP"
|
|
line.long 0x70 "BKP26R,backup register"
|
|
hexmask.long 0x70 0.--31. 1. "BKP,BKP"
|
|
line.long 0x74 "BKP27R,backup register"
|
|
hexmask.long 0x74 0.--31. 1. "BKP,BKP"
|
|
line.long 0x78 "BKP28R,backup register"
|
|
hexmask.long 0x78 0.--31. 1. "BKP,BKP"
|
|
line.long 0x7C "BKP29R,backup register"
|
|
hexmask.long 0x7C 0.--31. 1. "BKP,BKP"
|
|
line.long 0x80 "BKP30R,backup register"
|
|
hexmask.long 0x80 0.--31. 1. "BKP,BKP"
|
|
endif
|
|
group.long 0x10++0x7
|
|
line.long 0x0 "PRER,prescaler register"
|
|
hexmask.long.byte 0x0 16.--22. 1. "PREDIV_A,Asynchronous prescaler"
|
|
hexmask.long.word 0x0 0.--14. 1. "PREDIV_S,Synchronous prescaler"
|
|
line.long 0x4 "WUTR,wakeup timer register"
|
|
hexmask.long.word 0x4 0.--15. 1. "WUT,Wakeup auto-reload value"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x0 "WPR,write protection register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "KEY,Write protection key"
|
|
wgroup.long 0x2C++0x3
|
|
line.long 0x0 "SHIFTR,shift control register"
|
|
bitfld.long 0x0 31. "ADD1S,Add one second" "0,1"
|
|
hexmask.long.word 0x0 0.--14. 1. "SUBFS,Subtract a fraction of a"
|
|
rgroup.long 0x30++0xB
|
|
line.long 0x0 "TSTR,time stamp time register"
|
|
bitfld.long 0x0 22. "PM,AM/PM notation" "0,1"
|
|
bitfld.long 0x0 20.--21. "HT,Hour tens in BCD format" "0,1,2,3"
|
|
hexmask.long.byte 0x0 16.--19. 1. "HU,Hour units in BCD format"
|
|
bitfld.long 0x0 12.--14. "MNT,Minute tens in BCD format" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x0 8.--11. 1. "MNU,Minute units in BCD format"
|
|
bitfld.long 0x0 4.--6. "ST,Second tens in BCD format" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x0 0.--3. 1. "SU,Second units in BCD format"
|
|
line.long 0x4 "TSDR,time stamp date register"
|
|
bitfld.long 0x4 13.--15. "WDU,Week day units" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 12. "MT,Month tens in BCD format" "0,1"
|
|
hexmask.long.byte 0x4 8.--11. 1. "MU,Month units in BCD format"
|
|
bitfld.long 0x4 4.--5. "DT,Date tens in BCD format" "0,1,2,3"
|
|
hexmask.long.byte 0x4 0.--3. 1. "DU,Date units in BCD format"
|
|
line.long 0x8 "TSSSR,timestamp sub second register"
|
|
sif (cpuis("STM32L4P5*")||cpuis("STM32L4Q5*"))
|
|
hexmask.long 0x8 0.--31. 1. "SS,Sub second value"
|
|
endif
|
|
sif (cpuis("STM32L4R5*"))
|
|
hexmask.long.word 0x8 0.--15. 1. "SS,Sub second value"
|
|
endif
|
|
sif (cpuis("STM32L4R7*"))
|
|
hexmask.long.word 0x8 0.--15. 1. "SS,Sub second value"
|
|
endif
|
|
sif (cpuis("STM32L4R9*"))
|
|
hexmask.long.word 0x8 0.--15. 1. "SS,Sub second value"
|
|
endif
|
|
sif (cpuis("STM32L4S5*"))
|
|
hexmask.long.word 0x8 0.--15. 1. "SS,Sub second value"
|
|
endif
|
|
sif (cpuis("STM32L4S7*"))
|
|
hexmask.long.word 0x8 0.--15. 1. "SS,Sub second value"
|
|
endif
|
|
sif (cpuis("STM32L4S9*"))
|
|
hexmask.long.word 0x8 0.--15. 1. "SS,Sub second value"
|
|
endif
|
|
group.long 0x44++0x3
|
|
line.long 0x0 "ALRMASSR,alarm A sub second register"
|
|
sif (cpuis("STM32L4P5*")||cpuis("STM32L4Q5*"))
|
|
bitfld.long 0x0 31. "SSCLR,Clear synchronous counter on alarm" "0,1"
|
|
endif
|
|
hexmask.long.byte 0x0 24.--27. 1. "MASKSS,Mask the most-significant bits starting"
|
|
hexmask.long.word 0x0 0.--14. 1. "SS,Sub seconds value"
|
|
sif (cpuis("STM32L4R5*"))
|
|
group.long 0x48++0x87
|
|
line.long 0x0 "ALRMBSSR,alarm B sub second register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "MASKSS,Mask the most-significant bits starting"
|
|
hexmask.long.word 0x0 0.--14. 1. "SS,Sub seconds value"
|
|
line.long 0x4 "OR,option register"
|
|
bitfld.long 0x4 1. "RTC_OUT_RMP,RTC_OUT remap" "0,1"
|
|
bitfld.long 0x4 0. "RTC_ALARM_TYPE,RTC_ALARM on PC13 output" "0,1"
|
|
line.long 0x8 "BKP0R,backup register"
|
|
hexmask.long 0x8 0.--31. 1. "BKP,BKP"
|
|
line.long 0xC "BKP1R,backup register"
|
|
hexmask.long 0xC 0.--31. 1. "BKP,BKP"
|
|
line.long 0x10 "BKP2R,backup register"
|
|
hexmask.long 0x10 0.--31. 1. "BKP,BKP"
|
|
line.long 0x14 "BKP3R,backup register"
|
|
hexmask.long 0x14 0.--31. 1. "BKP,BKP"
|
|
line.long 0x18 "BKP4R,backup register"
|
|
hexmask.long 0x18 0.--31. 1. "BKP,BKP"
|
|
line.long 0x1C "BKP5R,backup register"
|
|
hexmask.long 0x1C 0.--31. 1. "BKP,BKP"
|
|
line.long 0x20 "BKP6R,backup register"
|
|
hexmask.long 0x20 0.--31. 1. "BKP,BKP"
|
|
line.long 0x24 "BKP7R,backup register"
|
|
hexmask.long 0x24 0.--31. 1. "BKP,BKP"
|
|
line.long 0x28 "BKP8R,backup register"
|
|
hexmask.long 0x28 0.--31. 1. "BKP,BKP"
|
|
line.long 0x2C "BKP9R,backup register"
|
|
hexmask.long 0x2C 0.--31. 1. "BKP,BKP"
|
|
line.long 0x30 "BKP10R,backup register"
|
|
hexmask.long 0x30 0.--31. 1. "BKP,BKP"
|
|
line.long 0x34 "BKP11R,backup register"
|
|
hexmask.long 0x34 0.--31. 1. "BKP,BKP"
|
|
line.long 0x38 "BKP12R,backup register"
|
|
hexmask.long 0x38 0.--31. 1. "BKP,BKP"
|
|
line.long 0x3C "BKP13R,backup register"
|
|
hexmask.long 0x3C 0.--31. 1. "BKP,BKP"
|
|
line.long 0x40 "BKP14R,backup register"
|
|
hexmask.long 0x40 0.--31. 1. "BKP,BKP"
|
|
line.long 0x44 "BKP15R,backup register"
|
|
hexmask.long 0x44 0.--31. 1. "BKP,BKP"
|
|
line.long 0x48 "BKP16R,backup register"
|
|
hexmask.long 0x48 0.--31. 1. "BKP,BKP"
|
|
line.long 0x4C "BKP17R,backup register"
|
|
hexmask.long 0x4C 0.--31. 1. "BKP,BKP"
|
|
line.long 0x50 "BKP18R,backup register"
|
|
hexmask.long 0x50 0.--31. 1. "BKP,BKP"
|
|
line.long 0x54 "BKP19R,backup register"
|
|
hexmask.long 0x54 0.--31. 1. "BKP,BKP"
|
|
line.long 0x58 "BKP20R,backup register"
|
|
hexmask.long 0x58 0.--31. 1. "BKP,BKP"
|
|
line.long 0x5C "BKP21R,backup register"
|
|
hexmask.long 0x5C 0.--31. 1. "BKP,BKP"
|
|
line.long 0x60 "BKP22R,backup register"
|
|
hexmask.long 0x60 0.--31. 1. "BKP,BKP"
|
|
line.long 0x64 "BKP23R,backup register"
|
|
hexmask.long 0x64 0.--31. 1. "BKP,BKP"
|
|
line.long 0x68 "BKP24R,backup register"
|
|
hexmask.long 0x68 0.--31. 1. "BKP,BKP"
|
|
line.long 0x6C "BKP25R,backup register"
|
|
hexmask.long 0x6C 0.--31. 1. "BKP,BKP"
|
|
line.long 0x70 "BKP26R,backup register"
|
|
hexmask.long 0x70 0.--31. 1. "BKP,BKP"
|
|
line.long 0x74 "BKP27R,backup register"
|
|
hexmask.long 0x74 0.--31. 1. "BKP,BKP"
|
|
line.long 0x78 "BKP28R,backup register"
|
|
hexmask.long 0x78 0.--31. 1. "BKP,BKP"
|
|
line.long 0x7C "BKP29R,backup register"
|
|
hexmask.long 0x7C 0.--31. 1. "BKP,BKP"
|
|
line.long 0x80 "BKP30R,backup register"
|
|
hexmask.long 0x80 0.--31. 1. "BKP,BKP"
|
|
line.long 0x84 "BKP31R,backup register"
|
|
hexmask.long 0x84 0.--31. 1. "BKP,BKP"
|
|
endif
|
|
sif (cpuis("STM32L4R7*"))
|
|
group.long 0xCC++0x3
|
|
line.long 0x0 "BKP31R,backup register"
|
|
hexmask.long 0x0 0.--31. 1. "BKP,BKP"
|
|
endif
|
|
sif (cpuis("STM32L4R9*"))
|
|
group.long 0xCC++0x3
|
|
line.long 0x0 "BKP31R,backup register"
|
|
hexmask.long 0x0 0.--31. 1. "BKP,BKP"
|
|
endif
|
|
sif (cpuis("STM32L4S5*"))
|
|
group.long 0xCC++0x3
|
|
line.long 0x0 "BKP31R,backup register"
|
|
hexmask.long 0x0 0.--31. 1. "BKP,BKP"
|
|
endif
|
|
sif (cpuis("STM32L4S7*"))
|
|
group.long 0xCC++0x3
|
|
line.long 0x0 "BKP31R,backup register"
|
|
hexmask.long 0x0 0.--31. 1. "BKP,BKP"
|
|
endif
|
|
sif (cpuis("STM32L4S9*"))
|
|
group.long 0xCC++0x3
|
|
line.long 0x0 "BKP31R,backup register"
|
|
hexmask.long 0x0 0.--31. 1. "BKP,BKP"
|
|
endif
|
|
tree.end
|
|
tree "SAI (Serial Audio Interface)"
|
|
base ad:0x0
|
|
tree "SAI1"
|
|
base ad:0x40015400
|
|
group.long 0x24++0x13
|
|
line.long 0x0 "BCR1,BConfiguration register 1"
|
|
hexmask.long.byte 0x0 20.--23. 1. "MCJDIV,Master clock divider"
|
|
bitfld.long 0x0 19. "NODIV,No divider" "0,1"
|
|
bitfld.long 0x0 17. "DMAEN,DMA enable" "0,1"
|
|
bitfld.long 0x0 16. "SAIBEN,Audio block B enable" "0,1"
|
|
bitfld.long 0x0 13. "OutDri,Output drive" "0,1"
|
|
bitfld.long 0x0 12. "MONO,Mono mode" "0,1"
|
|
bitfld.long 0x0 10.--11. "SYNCEN,Synchronization enable" "0,1,2,3"
|
|
bitfld.long 0x0 9. "CKSTR,Clock strobing edge" "0,1"
|
|
bitfld.long 0x0 8. "LSBFIRST,Least significant bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5.--7. "DS,Data size" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 2.--3. "PRTCFG,Protocol configuration" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "MODE,Audio block mode" "0,1,2,3"
|
|
line.long 0x4 "BCR2,BConfiguration register 2"
|
|
bitfld.long 0x4 14.--15. "COMP,Companding mode" "0,1,2,3"
|
|
bitfld.long 0x4 13. "CPL,Complement bit" "0,1"
|
|
hexmask.long.byte 0x4 7.--12. 1. "MUTECN,Mute counter"
|
|
bitfld.long 0x4 6. "MUTEVAL,Mute value" "0,1"
|
|
bitfld.long 0x4 5. "MUTE,Mute" "0,1"
|
|
bitfld.long 0x4 4. "TRIS,Tristate management on data" "0,1"
|
|
bitfld.long 0x4 3. "FFLUS,FIFO flush" "0,1"
|
|
bitfld.long 0x4 0.--2. "FTH,FIFO threshold" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "BFRCR,BFRCR"
|
|
bitfld.long 0x8 18. "FSOFF,Frame synchronization" "0,1"
|
|
bitfld.long 0x8 17. "FSPOL,Frame synchronization" "0,1"
|
|
bitfld.long 0x8 16. "FSDEF,Frame synchronization" "0,1"
|
|
hexmask.long.byte 0x8 8.--14. 1. "FSALL,Frame synchronization active level"
|
|
hexmask.long.byte 0x8 0.--7. 1. "FRL,Frame length"
|
|
line.long 0xC "BSLOTR,BSlot register"
|
|
hexmask.long.word 0xC 16.--31. 1. "SLOTEN,Slot enable"
|
|
hexmask.long.byte 0xC 8.--11. 1. "NBSLOT,Number of slots in an audio"
|
|
bitfld.long 0xC 6.--7. "SLOTSZ,Slot size" "0,1,2,3"
|
|
hexmask.long.byte 0xC 0.--4. 1. "FBOFF,First bit offset"
|
|
line.long 0x10 "BIM,BInterrupt mask register2"
|
|
bitfld.long 0x10 6. "LFSDETIE,Late frame synchronization detection" "0,1"
|
|
bitfld.long 0x10 5. "AFSDETIE,Anticipated frame synchronization" "0,1"
|
|
bitfld.long 0x10 4. "CNRDYIE,Codec not ready interrupt" "0,1"
|
|
bitfld.long 0x10 3. "FREQIE,FIFO request interrupt" "0,1"
|
|
bitfld.long 0x10 2. "WCKCFG,Wrong clock configuration interrupt" "0,1"
|
|
bitfld.long 0x10 1. "MUTEDET,Mute detection interrupt" "0,1"
|
|
bitfld.long 0x10 0. "OVRUDRIE,Overrun/underrun interrupt" "0,1"
|
|
rgroup.long 0x38++0x3
|
|
line.long 0x0 "BSR,BStatus register"
|
|
bitfld.long 0x0 16.--18. "FLVL,FIFO level threshold" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 6. "LFSDET,Late frame synchronization" "0,1"
|
|
bitfld.long 0x0 5. "AFSDET,Anticipated frame synchronization" "0,1"
|
|
bitfld.long 0x0 4. "CNRDY,Codec not ready" "0,1"
|
|
bitfld.long 0x0 3. "FREQ,FIFO request" "0,1"
|
|
bitfld.long 0x0 2. "WCKCFG,Wrong clock configuration" "0,1"
|
|
bitfld.long 0x0 1. "MUTEDET,Mute detection" "0,1"
|
|
bitfld.long 0x0 0. "OVRUDR,Overrun / underrun" "0,1"
|
|
wgroup.long 0x3C++0x3
|
|
line.long 0x0 "BCLRFR,BClear flag register"
|
|
bitfld.long 0x0 6. "LFSDET,Clear late frame synchronization" "0,1"
|
|
bitfld.long 0x0 5. "CAFSDET,Clear anticipated frame synchronization" "0,1"
|
|
bitfld.long 0x0 4. "CNRDY,Clear codec not ready flag" "0,1"
|
|
bitfld.long 0x0 2. "WCKCFG,Clear wrong clock configuration" "0,1"
|
|
bitfld.long 0x0 1. "MUTEDET,Mute detection flag" "0,1"
|
|
bitfld.long 0x0 0. "OVRUDR,Clear overrun / underrun" "0,1"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "BDR,BData register"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Data"
|
|
group.long 0x4++0x1F
|
|
line.long 0x0 "ACR1,AConfiguration register 1"
|
|
hexmask.long.byte 0x0 20.--23. 1. "MCJDIV,Master clock divider"
|
|
bitfld.long 0x0 19. "NODIV,No divider" "0,1"
|
|
bitfld.long 0x0 17. "DMAEN,DMA enable" "0,1"
|
|
bitfld.long 0x0 16. "SAIAEN,Audio block A enable" "0,1"
|
|
bitfld.long 0x0 13. "OutDri,Output drive" "0,1"
|
|
bitfld.long 0x0 12. "MONO,Mono mode" "0,1"
|
|
bitfld.long 0x0 10.--11. "SYNCEN,Synchronization enable" "0,1,2,3"
|
|
bitfld.long 0x0 9. "CKSTR,Clock strobing edge" "0,1"
|
|
bitfld.long 0x0 8. "LSBFIRST,Least significant bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5.--7. "DS,Data size" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 2.--3. "PRTCFG,Protocol configuration" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "MODE,Audio block mode" "0,1,2,3"
|
|
line.long 0x4 "ACR2,AConfiguration register 2"
|
|
bitfld.long 0x4 14.--15. "COMP,Companding mode" "0,1,2,3"
|
|
bitfld.long 0x4 13. "CPL,Complement bit" "0,1"
|
|
hexmask.long.byte 0x4 7.--12. 1. "MUTECN,Mute counter"
|
|
bitfld.long 0x4 6. "MUTEVAL,Mute value" "0,1"
|
|
bitfld.long 0x4 5. "MUTE,Mute" "0,1"
|
|
bitfld.long 0x4 4. "TRIS,Tristate management on data" "0,1"
|
|
bitfld.long 0x4 3. "FFLUS,FIFO flush" "0,1"
|
|
bitfld.long 0x4 0.--2. "FTH,FIFO threshold" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "AFRCR,AFRCR"
|
|
bitfld.long 0x8 18. "FSOFF,Frame synchronization" "0,1"
|
|
bitfld.long 0x8 17. "FSPOL,Frame synchronization" "0,1"
|
|
bitfld.long 0x8 16. "FSDEF,Frame synchronization" "0,1"
|
|
hexmask.long.byte 0x8 8.--14. 1. "FSALL,Frame synchronization active level"
|
|
hexmask.long.byte 0x8 0.--7. 1. "FRL,Frame length"
|
|
line.long 0xC "ASLOTR,ASlot register"
|
|
hexmask.long.word 0xC 16.--31. 1. "SLOTEN,Slot enable"
|
|
hexmask.long.byte 0xC 8.--11. 1. "NBSLOT,Number of slots in an audio"
|
|
bitfld.long 0xC 6.--7. "SLOTSZ,Slot size" "0,1,2,3"
|
|
hexmask.long.byte 0xC 0.--4. 1. "FBOFF,First bit offset"
|
|
line.long 0x10 "AIM,AInterrupt mask register2"
|
|
bitfld.long 0x10 6. "LFSDET,Late frame synchronization detection" "0,1"
|
|
bitfld.long 0x10 5. "AFSDETIE,Anticipated frame synchronization" "0,1"
|
|
bitfld.long 0x10 4. "CNRDYIE,Codec not ready interrupt" "0,1"
|
|
bitfld.long 0x10 3. "FREQIE,FIFO request interrupt" "0,1"
|
|
bitfld.long 0x10 2. "WCKCFG,Wrong clock configuration interrupt" "0,1"
|
|
bitfld.long 0x10 1. "MUTEDET,Mute detection interrupt" "0,1"
|
|
bitfld.long 0x10 0. "OVRUDRIE,Overrun/underrun interrupt" "0,1"
|
|
line.long 0x14 "ASR,AStatus register"
|
|
bitfld.long 0x14 16.--18. "FLVL,FIFO level threshold" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 6. "LFSDET,Late frame synchronization" "0,1"
|
|
bitfld.long 0x14 5. "AFSDET,Anticipated frame synchronization" "0,1"
|
|
bitfld.long 0x14 4. "CNRDY,Codec not ready" "0,1"
|
|
bitfld.long 0x14 3. "FREQ,FIFO request" "0,1"
|
|
bitfld.long 0x14 2. "WCKCFG,Wrong clock configuration flag. This bit" "0,1"
|
|
bitfld.long 0x14 1. "MUTEDET,Mute detection" "0,1"
|
|
bitfld.long 0x14 0. "OVRUDR,Overrun / underrun" "0,1"
|
|
line.long 0x18 "ACLRFR,AClear flag register"
|
|
bitfld.long 0x18 6. "LFSDET,Clear late frame synchronization" "0,1"
|
|
bitfld.long 0x18 5. "CAFSDET,Clear anticipated frame synchronization" "0,1"
|
|
bitfld.long 0x18 4. "CNRDY,Clear codec not ready flag" "0,1"
|
|
bitfld.long 0x18 2. "WCKCFG,Clear wrong clock configuration" "0,1"
|
|
bitfld.long 0x18 1. "MUTEDET,Mute detection flag" "0,1"
|
|
bitfld.long 0x18 0. "OVRUDR,Clear overrun / underrun" "0,1"
|
|
line.long 0x1C "ADR,AData register"
|
|
hexmask.long 0x1C 0.--31. 1. "DATA,Data"
|
|
tree.end
|
|
tree "SAI2"
|
|
base ad:0x40015800
|
|
group.long 0x24++0x13
|
|
line.long 0x0 "BCR1,BConfiguration register 1"
|
|
hexmask.long.byte 0x0 20.--23. 1. "MCJDIV,Master clock divider"
|
|
bitfld.long 0x0 19. "NODIV,No divider" "0,1"
|
|
bitfld.long 0x0 17. "DMAEN,DMA enable" "0,1"
|
|
bitfld.long 0x0 16. "SAIBEN,Audio block B enable" "0,1"
|
|
bitfld.long 0x0 13. "OutDri,Output drive" "0,1"
|
|
bitfld.long 0x0 12. "MONO,Mono mode" "0,1"
|
|
bitfld.long 0x0 10.--11. "SYNCEN,Synchronization enable" "0,1,2,3"
|
|
bitfld.long 0x0 9. "CKSTR,Clock strobing edge" "0,1"
|
|
bitfld.long 0x0 8. "LSBFIRST,Least significant bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5.--7. "DS,Data size" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 2.--3. "PRTCFG,Protocol configuration" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "MODE,Audio block mode" "0,1,2,3"
|
|
line.long 0x4 "BCR2,BConfiguration register 2"
|
|
bitfld.long 0x4 14.--15. "COMP,Companding mode" "0,1,2,3"
|
|
bitfld.long 0x4 13. "CPL,Complement bit" "0,1"
|
|
hexmask.long.byte 0x4 7.--12. 1. "MUTECN,Mute counter"
|
|
bitfld.long 0x4 6. "MUTEVAL,Mute value" "0,1"
|
|
bitfld.long 0x4 5. "MUTE,Mute" "0,1"
|
|
bitfld.long 0x4 4. "TRIS,Tristate management on data" "0,1"
|
|
bitfld.long 0x4 3. "FFLUS,FIFO flush" "0,1"
|
|
bitfld.long 0x4 0.--2. "FTH,FIFO threshold" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "BFRCR,BFRCR"
|
|
bitfld.long 0x8 18. "FSOFF,Frame synchronization" "0,1"
|
|
bitfld.long 0x8 17. "FSPOL,Frame synchronization" "0,1"
|
|
bitfld.long 0x8 16. "FSDEF,Frame synchronization" "0,1"
|
|
hexmask.long.byte 0x8 8.--14. 1. "FSALL,Frame synchronization active level"
|
|
hexmask.long.byte 0x8 0.--7. 1. "FRL,Frame length"
|
|
line.long 0xC "BSLOTR,BSlot register"
|
|
hexmask.long.word 0xC 16.--31. 1. "SLOTEN,Slot enable"
|
|
hexmask.long.byte 0xC 8.--11. 1. "NBSLOT,Number of slots in an audio"
|
|
bitfld.long 0xC 6.--7. "SLOTSZ,Slot size" "0,1,2,3"
|
|
hexmask.long.byte 0xC 0.--4. 1. "FBOFF,First bit offset"
|
|
line.long 0x10 "BIM,BInterrupt mask register2"
|
|
bitfld.long 0x10 6. "LFSDETIE,Late frame synchronization detection" "0,1"
|
|
bitfld.long 0x10 5. "AFSDETIE,Anticipated frame synchronization" "0,1"
|
|
bitfld.long 0x10 4. "CNRDYIE,Codec not ready interrupt" "0,1"
|
|
bitfld.long 0x10 3. "FREQIE,FIFO request interrupt" "0,1"
|
|
bitfld.long 0x10 2. "WCKCFG,Wrong clock configuration interrupt" "0,1"
|
|
bitfld.long 0x10 1. "MUTEDET,Mute detection interrupt" "0,1"
|
|
bitfld.long 0x10 0. "OVRUDRIE,Overrun/underrun interrupt" "0,1"
|
|
rgroup.long 0x38++0x3
|
|
line.long 0x0 "BSR,BStatus register"
|
|
bitfld.long 0x0 16.--18. "FLVL,FIFO level threshold" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 6. "LFSDET,Late frame synchronization" "0,1"
|
|
bitfld.long 0x0 5. "AFSDET,Anticipated frame synchronization" "0,1"
|
|
bitfld.long 0x0 4. "CNRDY,Codec not ready" "0,1"
|
|
bitfld.long 0x0 3. "FREQ,FIFO request" "0,1"
|
|
bitfld.long 0x0 2. "WCKCFG,Wrong clock configuration" "0,1"
|
|
bitfld.long 0x0 1. "MUTEDET,Mute detection" "0,1"
|
|
bitfld.long 0x0 0. "OVRUDR,Overrun / underrun" "0,1"
|
|
wgroup.long 0x3C++0x3
|
|
line.long 0x0 "BCLRFR,BClear flag register"
|
|
bitfld.long 0x0 6. "LFSDET,Clear late frame synchronization" "0,1"
|
|
bitfld.long 0x0 5. "CAFSDET,Clear anticipated frame synchronization" "0,1"
|
|
bitfld.long 0x0 4. "CNRDY,Clear codec not ready flag" "0,1"
|
|
bitfld.long 0x0 2. "WCKCFG,Clear wrong clock configuration" "0,1"
|
|
bitfld.long 0x0 1. "MUTEDET,Mute detection flag" "0,1"
|
|
bitfld.long 0x0 0. "OVRUDR,Clear overrun / underrun" "0,1"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "BDR,BData register"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Data"
|
|
group.long 0x4++0x1F
|
|
line.long 0x0 "ACR1,AConfiguration register 1"
|
|
hexmask.long.byte 0x0 20.--23. 1. "MCJDIV,Master clock divider"
|
|
bitfld.long 0x0 19. "NODIV,No divider" "0,1"
|
|
bitfld.long 0x0 17. "DMAEN,DMA enable" "0,1"
|
|
bitfld.long 0x0 16. "SAIAEN,Audio block A enable" "0,1"
|
|
bitfld.long 0x0 13. "OutDri,Output drive" "0,1"
|
|
bitfld.long 0x0 12. "MONO,Mono mode" "0,1"
|
|
bitfld.long 0x0 10.--11. "SYNCEN,Synchronization enable" "0,1,2,3"
|
|
bitfld.long 0x0 9. "CKSTR,Clock strobing edge" "0,1"
|
|
bitfld.long 0x0 8. "LSBFIRST,Least significant bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5.--7. "DS,Data size" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 2.--3. "PRTCFG,Protocol configuration" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "MODE,Audio block mode" "0,1,2,3"
|
|
line.long 0x4 "ACR2,AConfiguration register 2"
|
|
bitfld.long 0x4 14.--15. "COMP,Companding mode" "0,1,2,3"
|
|
bitfld.long 0x4 13. "CPL,Complement bit" "0,1"
|
|
hexmask.long.byte 0x4 7.--12. 1. "MUTECN,Mute counter"
|
|
bitfld.long 0x4 6. "MUTEVAL,Mute value" "0,1"
|
|
bitfld.long 0x4 5. "MUTE,Mute" "0,1"
|
|
bitfld.long 0x4 4. "TRIS,Tristate management on data" "0,1"
|
|
bitfld.long 0x4 3. "FFLUS,FIFO flush" "0,1"
|
|
bitfld.long 0x4 0.--2. "FTH,FIFO threshold" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "AFRCR,AFRCR"
|
|
bitfld.long 0x8 18. "FSOFF,Frame synchronization" "0,1"
|
|
bitfld.long 0x8 17. "FSPOL,Frame synchronization" "0,1"
|
|
bitfld.long 0x8 16. "FSDEF,Frame synchronization" "0,1"
|
|
hexmask.long.byte 0x8 8.--14. 1. "FSALL,Frame synchronization active level"
|
|
hexmask.long.byte 0x8 0.--7. 1. "FRL,Frame length"
|
|
line.long 0xC "ASLOTR,ASlot register"
|
|
hexmask.long.word 0xC 16.--31. 1. "SLOTEN,Slot enable"
|
|
hexmask.long.byte 0xC 8.--11. 1. "NBSLOT,Number of slots in an audio"
|
|
bitfld.long 0xC 6.--7. "SLOTSZ,Slot size" "0,1,2,3"
|
|
hexmask.long.byte 0xC 0.--4. 1. "FBOFF,First bit offset"
|
|
line.long 0x10 "AIM,AInterrupt mask register2"
|
|
bitfld.long 0x10 6. "LFSDET,Late frame synchronization detection" "0,1"
|
|
bitfld.long 0x10 5. "AFSDETIE,Anticipated frame synchronization" "0,1"
|
|
bitfld.long 0x10 4. "CNRDYIE,Codec not ready interrupt" "0,1"
|
|
bitfld.long 0x10 3. "FREQIE,FIFO request interrupt" "0,1"
|
|
bitfld.long 0x10 2. "WCKCFG,Wrong clock configuration interrupt" "0,1"
|
|
bitfld.long 0x10 1. "MUTEDET,Mute detection interrupt" "0,1"
|
|
bitfld.long 0x10 0. "OVRUDRIE,Overrun/underrun interrupt" "0,1"
|
|
line.long 0x14 "ASR,AStatus register"
|
|
bitfld.long 0x14 16.--18. "FLVL,FIFO level threshold" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 6. "LFSDET,Late frame synchronization" "0,1"
|
|
bitfld.long 0x14 5. "AFSDET,Anticipated frame synchronization" "0,1"
|
|
bitfld.long 0x14 4. "CNRDY,Codec not ready" "0,1"
|
|
bitfld.long 0x14 3. "FREQ,FIFO request" "0,1"
|
|
bitfld.long 0x14 2. "WCKCFG,Wrong clock configuration flag. This bit" "0,1"
|
|
bitfld.long 0x14 1. "MUTEDET,Mute detection" "0,1"
|
|
bitfld.long 0x14 0. "OVRUDR,Overrun / underrun" "0,1"
|
|
line.long 0x18 "ACLRFR,AClear flag register"
|
|
bitfld.long 0x18 6. "LFSDET,Clear late frame synchronization" "0,1"
|
|
bitfld.long 0x18 5. "CAFSDET,Clear anticipated frame synchronization" "0,1"
|
|
bitfld.long 0x18 4. "CNRDY,Clear codec not ready flag" "0,1"
|
|
bitfld.long 0x18 2. "WCKCFG,Clear wrong clock configuration" "0,1"
|
|
bitfld.long 0x18 1. "MUTEDET,Mute detection flag" "0,1"
|
|
bitfld.long 0x18 0. "OVRUDR,Clear overrun / underrun" "0,1"
|
|
line.long 0x1C "ADR,AData register"
|
|
hexmask.long 0x1C 0.--31. 1. "DATA,Data"
|
|
tree.end
|
|
tree.end
|
|
tree "SCB (System Control Block)"
|
|
base ad:0x0
|
|
tree "SCB"
|
|
base ad:0xE000ED00
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "CPUID,CPUID base register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "Implementer,Implementer code"
|
|
hexmask.long.byte 0x0 20.--23. 1. "Variant,Variant number"
|
|
hexmask.long.byte 0x0 16.--19. 1. "Constant,Reads as 0xF"
|
|
hexmask.long.word 0x0 4.--15. 1. "PartNo,Part number of the"
|
|
hexmask.long.byte 0x0 0.--3. 1. "Revision,Revision number"
|
|
group.long 0x4++0x2B
|
|
line.long 0x0 "ICSR,Interrupt control and state"
|
|
bitfld.long 0x0 31. "NMIPENDSET,NMI set-pending bit." "0,1"
|
|
bitfld.long 0x0 28. "PENDSVSET,PendSV set-pending bit" "0,1"
|
|
bitfld.long 0x0 27. "PENDSVCLR,PendSV clear-pending bit" "0,1"
|
|
bitfld.long 0x0 26. "PENDSTSET,SysTick exception set-pending" "0,1"
|
|
bitfld.long 0x0 25. "PENDSTCLR,SysTick exception clear-pending" "0,1"
|
|
bitfld.long 0x0 22. "ISRPENDING,Interrupt pending flag" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 12.--18. 1. "VECTPENDING,Pending vector"
|
|
bitfld.long 0x0 11. "RETTOBASE,Return to base level" "0,1"
|
|
hexmask.long.word 0x0 0.--8. 1. "VECTACTIVE,Active vector"
|
|
line.long 0x4 "VTOR,Vector table offset register"
|
|
hexmask.long.tbyte 0x4 9.--29. 1. "TBLOFF,Vector table base offset"
|
|
line.long 0x8 "AIRCR,Application interrupt and reset control"
|
|
hexmask.long.word 0x8 16.--31. 1. "VECTKEYSTAT,Register key"
|
|
bitfld.long 0x8 15. "ENDIANESS,ENDIANESS" "0,1"
|
|
bitfld.long 0x8 8.--10. "PRIGROUP,PRIGROUP" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 2. "SYSRESETREQ,SYSRESETREQ" "0,1"
|
|
bitfld.long 0x8 1. "VECTCLRACTIVE,VECTCLRACTIVE" "0,1"
|
|
bitfld.long 0x8 0. "VECTRESET,VECTRESET" "0,1"
|
|
line.long 0xC "SCR,System control register"
|
|
bitfld.long 0xC 4. "SEVEONPEND,Send Event on Pending bit" "0,1"
|
|
bitfld.long 0xC 2. "SLEEPDEEP,SLEEPDEEP" "0,1"
|
|
bitfld.long 0xC 1. "SLEEPONEXIT,SLEEPONEXIT" "0,1"
|
|
line.long 0x10 "CCR,Configuration and control"
|
|
bitfld.long 0x10 9. "STKALIGN,STKALIGN" "0,1"
|
|
bitfld.long 0x10 8. "BFHFNMIGN,BFHFNMIGN" "0,1"
|
|
bitfld.long 0x10 4. "DIV_0_TRP,DIV_0_TRP" "0,1"
|
|
bitfld.long 0x10 3. "UNALIGN__TRP,UNALIGN_ TRP" "0,1"
|
|
bitfld.long 0x10 1. "USERSETMPEND,USERSETMPEND" "0,1"
|
|
bitfld.long 0x10 0. "NONBASETHRDENA,Configures how the processor enters" "0,1"
|
|
line.long 0x14 "SHPR1,System handler priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. "PRI_6,Priority of system handler"
|
|
hexmask.long.byte 0x14 8.--15. 1. "PRI_5,Priority of system handler"
|
|
hexmask.long.byte 0x14 0.--7. 1. "PRI_4,Priority of system handler"
|
|
line.long 0x18 "SHPR2,System handler priority"
|
|
hexmask.long.byte 0x18 24.--31. 1. "PRI_11,Priority of system handler"
|
|
line.long 0x1C "SHPR3,System handler priority"
|
|
hexmask.long.byte 0x1C 24.--31. 1. "PRI_15,Priority of system handler"
|
|
hexmask.long.byte 0x1C 16.--23. 1. "PRI_14,Priority of system handler"
|
|
line.long 0x20 "SHCSR,System handler control and state"
|
|
bitfld.long 0x20 18. "USGFAULTENA,Usage fault enable bit" "0,1"
|
|
bitfld.long 0x20 17. "BUSFAULTENA,Bus fault enable bit" "0,1"
|
|
bitfld.long 0x20 16. "MEMFAULTENA,Memory management fault enable" "0,1"
|
|
bitfld.long 0x20 15. "SVCALLPENDED,SVC call pending bit" "0,1"
|
|
bitfld.long 0x20 14. "BUSFAULTPENDED,Bus fault exception pending" "0,1"
|
|
bitfld.long 0x20 13. "MEMFAULTPENDED,Memory management fault exception" "0,1"
|
|
newline
|
|
bitfld.long 0x20 12. "USGFAULTPENDED,Usage fault exception pending" "0,1"
|
|
bitfld.long 0x20 11. "SYSTICKACT,SysTick exception active" "0,1"
|
|
bitfld.long 0x20 10. "PENDSVACT,PendSV exception active" "0,1"
|
|
bitfld.long 0x20 8. "MONITORACT,Debug monitor active bit" "0,1"
|
|
bitfld.long 0x20 7. "SVCALLACT,SVC call active bit" "0,1"
|
|
bitfld.long 0x20 3. "USGFAULTACT,Usage fault exception active" "0,1"
|
|
newline
|
|
bitfld.long 0x20 1. "BUSFAULTACT,Bus fault exception active" "0,1"
|
|
bitfld.long 0x20 0. "MEMFAULTACT,Memory management fault exception active" "0,1"
|
|
line.long 0x24 "CFSR_UFSR_BFSR_MMFSR,Configurable fault status"
|
|
bitfld.long 0x24 25. "DIVBYZERO,Divide by zero usage fault" "0,1"
|
|
bitfld.long 0x24 24. "UNALIGNED,Unaligned access usage" "0,1"
|
|
bitfld.long 0x24 19. "NOCP,No coprocessor usage" "0,1"
|
|
bitfld.long 0x24 18. "INVPC,Invalid PC load usage" "0,1"
|
|
bitfld.long 0x24 17. "INVSTATE,Invalid state usage fault" "0,1"
|
|
bitfld.long 0x24 16. "UNDEFINSTR,Undefined instruction usage" "0,1"
|
|
newline
|
|
bitfld.long 0x24 15. "BFARVALID,Bus Fault Address Register (BFAR) valid" "0,1"
|
|
bitfld.long 0x24 13. "LSPERR,Bus fault on floating-point lazy state" "0,1"
|
|
bitfld.long 0x24 12. "STKERR,Bus fault on stacking for exception" "0,1"
|
|
bitfld.long 0x24 11. "UNSTKERR,Bus fault on unstacking for a return" "0,1"
|
|
bitfld.long 0x24 10. "IMPRECISERR,Imprecise data bus error" "0,1"
|
|
bitfld.long 0x24 9. "PRECISERR,Precise data bus error" "0,1"
|
|
newline
|
|
bitfld.long 0x24 8. "IBUSERR,Instruction bus error" "0,1"
|
|
bitfld.long 0x24 7. "MMARVALID,Memory Management Fault Address Register" "0,1"
|
|
bitfld.long 0x24 5. "MLSPERR,MLSPERR" "0,1"
|
|
bitfld.long 0x24 4. "MSTKERR,Memory manager fault on stacking for" "0,1"
|
|
bitfld.long 0x24 3. "MUNSTKERR,Memory manager fault on unstacking for a" "0,1"
|
|
bitfld.long 0x24 1. "IACCVIOL,Instruction access violation" "0,1"
|
|
line.long 0x28 "HFSR,Hard fault status register"
|
|
bitfld.long 0x28 31. "DEBUG_VT,Reserved for Debug use" "0,1"
|
|
bitfld.long 0x28 30. "FORCED,Forced hard fault" "0,1"
|
|
bitfld.long 0x28 1. "VECTTBL,Vector table hard fault" "0,1"
|
|
group.long 0x34++0xB
|
|
line.long 0x0 "MMFAR,Memory management fault address"
|
|
hexmask.long 0x0 0.--31. 1. "MMFAR,Memory management fault"
|
|
line.long 0x4 "BFAR,Bus fault address register"
|
|
hexmask.long 0x4 0.--31. 1. "BFAR,Bus fault address"
|
|
line.long 0x8 "AFSR,Auxiliary fault status"
|
|
hexmask.long 0x8 0.--31. 1. "IMPDEF,Implementation defined"
|
|
tree.end
|
|
tree "SCB_ACTRL"
|
|
base ad:0xE000E008
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "ACTRL,Auxiliary control register"
|
|
bitfld.long 0x0 9. "DISOOFP,DISOOFP" "0,1"
|
|
bitfld.long 0x0 8. "DISFPCA,DISFPCA" "0,1"
|
|
bitfld.long 0x0 2. "DISFOLD,DISFOLD" "0,1"
|
|
bitfld.long 0x0 1. "DISDEFWBUF,DISDEFWBUF" "0,1"
|
|
bitfld.long 0x0 0. "DISMCYCINT,DISMCYCINT" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "SDMMC (Secure Digital I/O MultiMediaCard Interface)"
|
|
base ad:0x0
|
|
sif (cpuis("STM32L4P5*")||cpuis("STM32L4Q5*")||cpuis("STM32L4R5*"))
|
|
tree "SDMMC1"
|
|
base ad:0x50062400
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "POWER,power control register"
|
|
sif (cpuis("STM32L4P5*")||cpuis("STM32L4Q5*"))
|
|
bitfld.long 0x0 4. "DIRPOL,Data and command direction signals polarity selection" "0,1"
|
|
bitfld.long 0x0 3. "VSWITCHEN,Voltage switch procedure enable" "0,1"
|
|
bitfld.long 0x0 2. "VSWITCH,Voltage switch sequence start" "0,1"
|
|
endif
|
|
bitfld.long 0x0 0.--1. "PWRCTRL,SDMMC state control bits" "0,1,2,3"
|
|
line.long 0x4 "CLKCR,SDI clock control register"
|
|
sif (cpuis("STM32L4P5*")||cpuis("STM32L4Q5*"))
|
|
bitfld.long 0x4 20.--21. "SELCLKRX,Receive clock selection" "0,1,2,3"
|
|
bitfld.long 0x4 19. "BUSSPEED,Bus speed mode selection between DS HS SDR12 SDR25 and SDR50 DDR50" "0,1"
|
|
bitfld.long 0x4 18. "DDR,Data rate signaling selection" "0,1"
|
|
bitfld.long 0x4 17. "HWFC_EN,Hardware flow control enable" "0,1"
|
|
bitfld.long 0x4 16. "NEGEDGE,SDMMC_CK dephasing selection bit for data and command" "0,1"
|
|
bitfld.long 0x4 14.--15. "WIDBUS,Wide bus mode enable bit" "0,1,2,3"
|
|
bitfld.long 0x4 12. "PWRSAV,Power saving configuration bit" "0,1"
|
|
newline
|
|
hexmask.long.word 0x4 0.--9. 1. "CLKDIV,Clock divide factor"
|
|
endif
|
|
sif (cpuis("STM32L4R5*"))
|
|
bitfld.long 0x4 14. "HWFC_EN,HW Flow Control enable" "0,1"
|
|
endif
|
|
sif (cpuis("STM32L4R5*"))
|
|
bitfld.long 0x4 13. "NEGEDGE,SDIO_CK dephasing selection" "0,1"
|
|
endif
|
|
sif (cpuis("STM32L4R5*"))
|
|
bitfld.long 0x4 11.--12. "WIDBUS,Wide bus mode enable bit" "0,1,2,3"
|
|
endif
|
|
sif (cpuis("STM32L4R5*"))
|
|
bitfld.long 0x4 10. "BYPASS,Clock divider bypass enable" "0,1"
|
|
endif
|
|
sif (cpuis("STM32L4R5*"))
|
|
bitfld.long 0x4 9. "PWRSAV,Power saving configuration" "0,1"
|
|
endif
|
|
sif (cpuis("STM32L4R5*"))
|
|
bitfld.long 0x4 8. "CLKEN,Clock enable bit" "0,1"
|
|
newline
|
|
endif
|
|
sif (cpuis("STM32L4R5*"))
|
|
hexmask.long.byte 0x4 0.--7. 1. "CLKDIV,Clock divide factor"
|
|
endif
|
|
sif (cpuis("STM32L4P5*")||cpuis("STM32L4Q5*"))
|
|
group.long 0x8++0x7
|
|
line.long 0x0 "ARGR,argument register"
|
|
hexmask.long 0x0 0.--31. 1. "CMDARG,Command argument"
|
|
line.long 0x4 "CMDR,command register"
|
|
bitfld.long 0x4 16. "CMDSUSPEND,The CPSM treats the command as a Suspend or Resume command and" "0,1"
|
|
bitfld.long 0x4 15. "BOOTEN,Enable boot mode procedure" "0,1"
|
|
newline
|
|
bitfld.long 0x4 14. "BOOTMODE,Select the boot mode procedure to be used" "0,1"
|
|
bitfld.long 0x4 13. "DTHOLD,Hold new data block transmission and reception in the DPSM" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "CPSMEN,Command path state machine (CPSM) Enable" "0,1"
|
|
bitfld.long 0x4 11. "WAITPEND,CPSM Waits for ends of data transfer" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "WAITINT,CPSM waits for interrupt" "0,1"
|
|
bitfld.long 0x4 8.--9. "WAITRESP,Wait for response bits" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 7. "CMDSTOP,The CPSM treats the command as a Stop Transmission command and signals" "0,1"
|
|
bitfld.long 0x4 6. "CMDTRANS,The CPSM treats the command as a data transfer command stops the interrupt" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--5. 1. "CMDINDEX,Command index"
|
|
rgroup.long 0x10++0x13
|
|
line.long 0x0 "RESPCMDR,command response register"
|
|
hexmask.long.byte 0x0 0.--5. 1. "RESPCMD,Response command index"
|
|
line.long 0x4 "RESP1R,response 1..4 register"
|
|
hexmask.long 0x4 0.--31. 1. "CARDSTATUS1,see Table 347"
|
|
line.long 0x8 "RESP2R,response 1..4 register"
|
|
hexmask.long 0x8 0.--31. 1. "CARDSTATUS2,see Table 347"
|
|
line.long 0xC "RESP3R,response 1..4 register"
|
|
hexmask.long 0xC 0.--31. 1. "CARDSTATUS3,see Table 347"
|
|
line.long 0x10 "RESP4R,response 1..4 register"
|
|
hexmask.long 0x10 0.--31. 1. "CARDSTATUS4,see Table 347"
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "DLENR,data length register"
|
|
hexmask.long 0x0 0.--24. 1. "DATALENGTH,Data length value"
|
|
rgroup.long 0x30++0x7
|
|
line.long 0x0 "DCNTR,data counter register"
|
|
hexmask.long 0x0 0.--24. 1. "DATACOUNT,Data count value"
|
|
line.long 0x4 "STAR,status register"
|
|
bitfld.long 0x4 28. "IDMABTC,IDMA buffer transfer complete" "0,1"
|
|
bitfld.long 0x4 27. "IDMATE,IDMA transfer error" "0,1"
|
|
newline
|
|
bitfld.long 0x4 26. "CKSTOP,SDMMC_CK stopped in Voltage switch procedure" "0,1"
|
|
bitfld.long 0x4 25. "VSWEND,Voltage switch critical timing section completion" "0,1"
|
|
newline
|
|
bitfld.long 0x4 24. "ACKTIMEOUT,Boot acknowledgment timeout" "0,1"
|
|
bitfld.long 0x4 23. "ACKFAIL,Boot acknowledgment received (boot acknowledgment check fail)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "SDIOIT,SDIO interrupt received" "0,1"
|
|
bitfld.long 0x4 21. "BUSYD0END,end of SDMMC_D0 Busy following a CMD response detected" "0,1"
|
|
newline
|
|
bitfld.long 0x4 20. "BUSYD0,Inverted value of SDMMC_D0 line (Busy) sampled at the end of a CMD response" "0,1"
|
|
bitfld.long 0x4 19. "RXFIFOE,Receive FIFO empty" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "TXFIFOE,Transmit FIFO empty" "0,1"
|
|
bitfld.long 0x4 17. "RXFIFOF,Receive FIFO full" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "TXFIFOF,Transmit FIFO full" "0,1"
|
|
bitfld.long 0x4 15. "RXFIFOHF,Receive FIFO half full: there are at" "0,1"
|
|
newline
|
|
bitfld.long 0x4 14. "TXFIFOHE,Transmit FIFO half empty: at least 8" "0,1"
|
|
bitfld.long 0x4 13. "CPSMACT,Command path state machine active i.e. not in Idle state" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "DPSMACT,Data path state machine active i.e. not in Idle state" "0,1"
|
|
bitfld.long 0x4 11. "DABORT,Data transfer aborted by CMD12" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "DBCKEND,Data block sent/received" "0,1"
|
|
bitfld.long 0x4 9. "DHOLD,Data transfer Hold" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "DATAEND,Data end (data counter SDIDCOUNT is" "0,1"
|
|
bitfld.long 0x4 7. "CMDSENT,Command sent (no response" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "CMDREND,Command response received (CRC check" "0,1"
|
|
bitfld.long 0x4 5. "RXOVERR,Received FIFO overrun" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "TXUNDERR,Transmit FIFO underrun" "0,1"
|
|
bitfld.long 0x4 3. "DTIMEOUT,Data timeout" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "CTIMEOUT,Command response timeout" "0,1"
|
|
bitfld.long 0x4 1. "DCRCFAIL,Data block sent/received (CRC check" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "CCRCFAIL,Command response received (CRC check" "0,1"
|
|
group.long 0x3C++0x7
|
|
line.long 0x0 "MASKR,mask register"
|
|
bitfld.long 0x0 28. "IDMABTCIE,IDMABTCIE" "0,1"
|
|
bitfld.long 0x0 26. "CKSTOPIE,CKSTOPIE" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "VSWENDIE,Voltage switch critical timing section completion interrupt enable" "0,1"
|
|
bitfld.long 0x0 24. "ACKTIMEOUTIE,Acknowledgment timeout interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "ACKFAILIE,Acknowledgment Fail interrupt enable" "0,1"
|
|
bitfld.long 0x0 22. "SDIOITIE,SDIO mode interrupt received interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "BUSYD0ENDIE,BUSYD0END interrupt enable" "0,1"
|
|
bitfld.long 0x0 18. "TXFIFOEIE,Tx FIFO empty interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "RXFIFOFIE,Rx FIFO full interrupt" "0,1"
|
|
bitfld.long 0x0 15. "RXFIFOHFIE,Rx FIFO half full interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "TXFIFOHEIE,Tx FIFO half empty interrupt" "0,1"
|
|
bitfld.long 0x0 11. "DABORTIE,Data transfer aborted interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "DBCKENDIE,Data block end interrupt" "0,1"
|
|
bitfld.long 0x0 9. "DHOLDIE,Data hold interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "DATAENDIE,Data end interrupt enable" "0,1"
|
|
bitfld.long 0x0 7. "CMDSENTIE,Command sent interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "CMDRENDIE,Command response received interrupt" "0,1"
|
|
bitfld.long 0x0 5. "RXOVERRIE,Rx FIFO overrun error interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "TXUNDERRIE,Tx FIFO underrun error interrupt" "0,1"
|
|
bitfld.long 0x0 3. "DTIMEOUTIE,Data timeout interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CTIMEOUTIE,Command timeout interrupt" "0,1"
|
|
bitfld.long 0x0 1. "DCRCFAILIE,Data CRC fail interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "CCRCFAILIE,Command CRC fail interrupt" "0,1"
|
|
line.long 0x4 "ACKTIMER,acknowledgment timer register"
|
|
hexmask.long 0x4 0.--24. 1. "ACKTIME,Boot acknowledgment timeout period"
|
|
group.long 0x80++0x3F
|
|
line.long 0x0 "FIFOR0,data FIFO register 0"
|
|
hexmask.long 0x0 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
|
|
line.long 0x4 "FIFOR1,data FIFO register 1"
|
|
hexmask.long 0x4 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
|
|
line.long 0x8 "FIFOR2,data FIFO register 2"
|
|
hexmask.long 0x8 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
|
|
line.long 0xC "FIFOR3,data FIFO register 3"
|
|
hexmask.long 0xC 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
|
|
line.long 0x10 "FIFOR4,data FIFO register 4"
|
|
hexmask.long 0x10 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
|
|
line.long 0x14 "FIFOR5,data FIFO register 5"
|
|
hexmask.long 0x14 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
|
|
line.long 0x18 "FIFOR6,data FIFO register 6"
|
|
hexmask.long 0x18 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
|
|
line.long 0x1C "FIFOR7,data FIFO register 7"
|
|
hexmask.long 0x1C 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
|
|
line.long 0x20 "FIFOR8,data FIFO register 8"
|
|
hexmask.long 0x20 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
|
|
line.long 0x24 "FIFOR9,data FIFO register 9"
|
|
hexmask.long 0x24 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
|
|
line.long 0x28 "FIFOR10,data FIFO register 10"
|
|
hexmask.long 0x28 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
|
|
line.long 0x2C "FIFOR11,data FIFO register 11"
|
|
hexmask.long 0x2C 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
|
|
line.long 0x30 "FIFOR12,data FIFO register 12"
|
|
hexmask.long 0x30 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
|
|
line.long 0x34 "FIFOR13,data FIFO register 13"
|
|
hexmask.long 0x34 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
|
|
line.long 0x38 "FIFOR14,data FIFO register 14"
|
|
hexmask.long 0x38 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
|
|
line.long 0x3C "FIFOR15,data FIFO register 15"
|
|
hexmask.long 0x3C 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
|
|
group.long 0x50++0xF
|
|
line.long 0x0 "IDMACTRLR,DMA control register"
|
|
bitfld.long 0x0 2. "IDMABACT,Double buffer mode active buffer indication" "0,1"
|
|
bitfld.long 0x0 1. "IDMABMODE,Buffer mode selection" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "IDMAEN,IDMA enable" "0,1"
|
|
line.long 0x4 "IDMABSIZER,IDMA buffer size register"
|
|
hexmask.long.byte 0x4 5.--12. 1. "IDMABNDT,Number of bytes per buffer"
|
|
line.long 0x8 "IDMABASE0R,IDMA buffer 0 base address register"
|
|
hexmask.long 0x8 0.--31. 1. "IDMABASE0,Buffer 0 memory base address bits [31:2] shall be word aligned (bit [1:0]"
|
|
line.long 0xC "IDMABASE1R,IDMA buffer 0 base address register"
|
|
hexmask.long 0xC 0.--31. 1. "IDMABASE1,Buffer 1 memory base address shall be word aligned (bit [1:0]"
|
|
endif
|
|
sif (cpuis("STM32L4R5*"))
|
|
group.long 0x8++0x7
|
|
line.long 0x0 "ARG,argument register"
|
|
hexmask.long 0x0 0.--31. 1. "CMDARG,Command argument"
|
|
line.long 0x4 "CMD,command register"
|
|
bitfld.long 0x4 14. "CE_ATACMD,CE-ATA command" "0,1"
|
|
bitfld.long 0x4 13. "nIEN,not Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "ENCMDcompl,Enable CMD completion" "0,1"
|
|
bitfld.long 0x4 11. "SDIOSuspend,SD I/O suspend command" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "CPSMEN,Command path state machine (CPSM) Enable" "0,1"
|
|
bitfld.long 0x4 9. "WAITPEND,CPSM Waits for ends of data transfer" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "WAITINT,CPSM waits for interrupt" "0,1"
|
|
bitfld.long 0x4 6.--7. "WAITRESP,Wait for response bits" "0,1,2,3"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--5. 1. "CMDINDEX,Command index"
|
|
rgroup.long 0x10++0x13
|
|
line.long 0x0 "RESPCMD,command response register"
|
|
hexmask.long.byte 0x0 0.--5. 1. "RESPCMD,Response command index"
|
|
line.long 0x4 "RESP1,response 1..4 register"
|
|
hexmask.long 0x4 0.--31. 1. "CARDSTATUS1,see Table 132"
|
|
line.long 0x8 "RESP2,response 1..4 register"
|
|
hexmask.long 0x8 0.--31. 1. "CARDSTATUS2,see Table 132"
|
|
line.long 0xC "RESP3,response 1..4 register"
|
|
hexmask.long 0xC 0.--31. 1. "CARDSTATUS3,see Table 132"
|
|
line.long 0x10 "RESP4,response 1..4 register"
|
|
hexmask.long 0x10 0.--31. 1. "CARDSTATUS4,see Table 132"
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "DLEN,data length register"
|
|
hexmask.long 0x0 0.--24. 1. "DATALENGTH,Data length value"
|
|
rgroup.long 0x30++0x7
|
|
line.long 0x0 "DCOUNT,data counter register"
|
|
hexmask.long 0x0 0.--24. 1. "DATACOUNT,Data count value"
|
|
line.long 0x4 "STA,status register"
|
|
bitfld.long 0x4 23. "CEATAEND,CE-ATA command completion signal" "0,1"
|
|
bitfld.long 0x4 22. "SDIOIT,SDIO interrupt received" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "RXDAVL,Data available in receive" "0,1"
|
|
bitfld.long 0x4 20. "TXDAVL,Data available in transmit" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "RXFIFOE,Receive FIFO empty" "0,1"
|
|
bitfld.long 0x4 18. "TXFIFOE,Transmit FIFO empty" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "RXFIFOF,Receive FIFO full" "0,1"
|
|
bitfld.long 0x4 16. "TXFIFOF,Transmit FIFO full" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "RXFIFOHF,Receive FIFO half full: there are at" "0,1"
|
|
bitfld.long 0x4 14. "TXFIFOHE,Transmit FIFO half empty: at least 8" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "RXACT,Data receive in progress" "0,1"
|
|
bitfld.long 0x4 12. "TXACT,Data transmit in progress" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "CMDACT,Command transfer in" "0,1"
|
|
bitfld.long 0x4 10. "DBCKEND,Data block sent/received (CRC check" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "STBITERR,Start bit not detected on all data" "0,1"
|
|
bitfld.long 0x4 8. "DATAEND,Data end (data counter SDIDCOUNT is" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "CMDSENT,Command sent (no response" "0,1"
|
|
bitfld.long 0x4 6. "CMDREND,Command response received (CRC check" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "RXOVERR,Received FIFO overrun" "0,1"
|
|
bitfld.long 0x4 4. "TXUNDERR,Transmit FIFO underrun" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "DTIMEOUT,Data timeout" "0,1"
|
|
bitfld.long 0x4 2. "CTIMEOUT,Command response timeout" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "DCRCFAIL,Data block sent/received (CRC check" "0,1"
|
|
bitfld.long 0x4 0. "CCRCFAIL,Command response received (CRC check" "0,1"
|
|
endif
|
|
group.long 0x24++0x3
|
|
line.long 0x0 "DTIMER,data timer register"
|
|
hexmask.long 0x0 0.--31. 1. "DATATIME,Data timeout period"
|
|
group.long 0x2C++0x3
|
|
line.long 0x0 "DCTRL,data control register"
|
|
sif (cpuis("STM32L4P5*")||cpuis("STM32L4Q5*"))
|
|
bitfld.long 0x0 13. "FIFORST,FIFO reset will flush any remaining data" "0,1"
|
|
bitfld.long 0x0 12. "BOOTACKEN,Enable the reception of the boot acknowledgment" "0,1"
|
|
bitfld.long 0x0 2.--3. "DTMODE,Data transfer mode selection 1: Stream" "?,1: Stream,?,?"
|
|
endif
|
|
bitfld.long 0x0 11. "SDIOEN,SD I/O enable functions" "0,1"
|
|
bitfld.long 0x0 10. "RWMOD,Read wait mode" "0,1"
|
|
bitfld.long 0x0 9. "RWSTOP,Read wait stop" "0,1"
|
|
bitfld.long 0x0 8. "RWSTART,Read wait start" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--7. 1. "DBLOCKSIZE,Data block size"
|
|
sif (cpuis("STM32L4R5*"))
|
|
bitfld.long 0x0 3. "DMAEN,DMA enable bit" "0,1"
|
|
endif
|
|
sif (cpuis("STM32L4R5*"))
|
|
bitfld.long 0x0 2. "DTMODE,Data transfer mode selection 1: Stream" "?,1: Stream"
|
|
endif
|
|
bitfld.long 0x0 1. "DTDIR,Data transfer direction" "0,1"
|
|
bitfld.long 0x0 0. "DTEN,DTEN" "0,1"
|
|
group.long 0x38++0x3
|
|
line.long 0x0 "ICR,interrupt clear register"
|
|
sif (cpuis("STM32L4P5*")||cpuis("STM32L4Q5*"))
|
|
bitfld.long 0x0 28. "IDMABTCC,IDMA buffer transfer complete clear bit" "0,1"
|
|
bitfld.long 0x0 27. "IDMATEC,IDMA transfer error clear bit" "0,1"
|
|
bitfld.long 0x0 26. "CKSTOPC,CKSTOP flag clear bit" "0,1"
|
|
bitfld.long 0x0 25. "VSWENDC,VSWEND flag clear bit" "0,1"
|
|
bitfld.long 0x0 24. "ACKTIMEOUTC,ACKTIMEOUT flag clear bit" "0,1"
|
|
bitfld.long 0x0 23. "ACKFAILC,ACKFAIL flag clear bit" "0,1"
|
|
bitfld.long 0x0 21. "BUSYD0ENDC,BUSYD0END flag clear bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "DABORTC,DABORT flag clear bit" "0,1"
|
|
bitfld.long 0x0 9. "DHOLDC,DHOLD flag clear bit" "0,1"
|
|
endif
|
|
sif (cpuis("STM32L4R5*"))
|
|
bitfld.long 0x0 23. "CEATAENDC,CEATAEND flag clear bit" "0,1"
|
|
endif
|
|
bitfld.long 0x0 22. "SDIOITC,SDIOIT flag clear bit" "0,1"
|
|
bitfld.long 0x0 10. "DBCKENDC,DBCKEND flag clear bit" "0,1"
|
|
sif (cpuis("STM32L4R5*"))
|
|
bitfld.long 0x0 9. "STBITERRC,STBITERR flag clear bit" "0,1"
|
|
endif
|
|
bitfld.long 0x0 8. "DATAENDC,DATAEND flag clear bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "CMDSENTC,CMDSENT flag clear bit" "0,1"
|
|
bitfld.long 0x0 6. "CMDRENDC,CMDREND flag clear bit" "0,1"
|
|
bitfld.long 0x0 5. "RXOVERRC,RXOVERR flag clear bit" "0,1"
|
|
bitfld.long 0x0 4. "TXUNDERRC,TXUNDERR flag clear bit" "0,1"
|
|
bitfld.long 0x0 3. "DTIMEOUTC,DTIMEOUT flag clear bit" "0,1"
|
|
bitfld.long 0x0 2. "CTIMEOUTC,CTIMEOUT flag clear bit" "0,1"
|
|
bitfld.long 0x0 1. "DCRCFAILC,DCRCFAIL flag clear bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "CCRCFAILC,CCRCFAIL flag clear bit" "0,1"
|
|
sif (cpuis("STM32L4R5*"))
|
|
group.long 0x3C++0x3
|
|
line.long 0x0 "MASK,mask register"
|
|
bitfld.long 0x0 23. "CEATAENDIE,CE-ATA command completion signal" "0,1"
|
|
bitfld.long 0x0 22. "SDIOITIE,SDIO mode interrupt received interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "RXDAVLIE,Data available in Rx FIFO interrupt" "0,1"
|
|
bitfld.long 0x0 20. "TXDAVLIE,Data available in Tx FIFO interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "RXFIFOEIE,Rx FIFO empty interrupt" "0,1"
|
|
bitfld.long 0x0 18. "TXFIFOEIE,Tx FIFO empty interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "RXFIFOFIE,Rx FIFO full interrupt" "0,1"
|
|
bitfld.long 0x0 16. "TXFIFOFIE,Tx FIFO full interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "RXFIFOHFIE,Rx FIFO half full interrupt" "0,1"
|
|
bitfld.long 0x0 14. "TXFIFOHEIE,Tx FIFO half empty interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "RXACTIE,Data receive acting interrupt" "0,1"
|
|
bitfld.long 0x0 12. "TXACTIE,Data transmit acting interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "CMDACTIE,Command acting interrupt" "0,1"
|
|
bitfld.long 0x0 10. "DBCKENDIE,Data block end interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "STBITERRIE,Start bit error interrupt" "0,1"
|
|
bitfld.long 0x0 8. "DATAENDIE,Data end interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "CMDSENTIE,Command sent interrupt" "0,1"
|
|
bitfld.long 0x0 6. "CMDRENDIE,Command response received interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "RXOVERRIE,Rx FIFO overrun error interrupt" "0,1"
|
|
bitfld.long 0x0 4. "TXUNDERRIE,Tx FIFO underrun error interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "DTIMEOUTIE,Data timeout interrupt" "0,1"
|
|
bitfld.long 0x0 2. "CTIMEOUTIE,Command timeout interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "DCRCFAILIE,Data CRC fail interrupt" "0,1"
|
|
bitfld.long 0x0 0. "CCRCFAILIE,Command CRC fail interrupt" "0,1"
|
|
rgroup.long 0x48++0x3
|
|
line.long 0x0 "FIFOCNT,FIFO counter register"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "FIFOCOUNT,Remaining number of words to be written"
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "FIFO,data FIFO register"
|
|
hexmask.long 0x0 0.--31. 1. "FIFOData,Receive and transmit FIFO"
|
|
endif
|
|
tree.end
|
|
endif
|
|
sif (cpuis("STM32L4P5*")||cpuis("STM32L4Q5*"))
|
|
tree "SDMMC2"
|
|
base ad:0x50062800
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "POWER,power control register"
|
|
bitfld.long 0x0 4. "DIRPOL,Data and command direction signals polarity selection" "0,1"
|
|
bitfld.long 0x0 3. "VSWITCHEN,Voltage switch procedure enable" "0,1"
|
|
bitfld.long 0x0 2. "VSWITCH,Voltage switch sequence start" "0,1"
|
|
bitfld.long 0x0 0.--1. "PWRCTRL,SDMMC state control bits" "0,1,2,3"
|
|
line.long 0x4 "CLKCR,SDI clock control register"
|
|
bitfld.long 0x4 20.--21. "SELCLKRX,Receive clock selection" "0,1,2,3"
|
|
bitfld.long 0x4 19. "BUSSPEED,Bus speed mode selection between DS HS SDR12 SDR25 and SDR50 DDR50" "0,1"
|
|
bitfld.long 0x4 18. "DDR,Data rate signaling selection" "0,1"
|
|
bitfld.long 0x4 17. "HWFC_EN,Hardware flow control enable" "0,1"
|
|
bitfld.long 0x4 16. "NEGEDGE,SDMMC_CK dephasing selection bit for data and command" "0,1"
|
|
bitfld.long 0x4 14.--15. "WIDBUS,Wide bus mode enable bit" "0,1,2,3"
|
|
bitfld.long 0x4 12. "PWRSAV,Power saving configuration bit" "0,1"
|
|
newline
|
|
hexmask.long.word 0x4 0.--9. 1. "CLKDIV,Clock divide factor"
|
|
line.long 0x8 "ARGR,argument register"
|
|
hexmask.long 0x8 0.--31. 1. "CMDARG,Command argument"
|
|
line.long 0xC "CMDR,command register"
|
|
bitfld.long 0xC 16. "CMDSUSPEND,The CPSM treats the command as a Suspend or Resume command and" "0,1"
|
|
bitfld.long 0xC 15. "BOOTEN,Enable boot mode procedure" "0,1"
|
|
bitfld.long 0xC 14. "BOOTMODE,Select the boot mode procedure to be used" "0,1"
|
|
bitfld.long 0xC 13. "DTHOLD,Hold new data block transmission and reception in the DPSM" "0,1"
|
|
bitfld.long 0xC 12. "CPSMEN,Command path state machine (CPSM) Enable" "0,1"
|
|
bitfld.long 0xC 11. "WAITPEND,CPSM Waits for ends of data transfer" "0,1"
|
|
bitfld.long 0xC 10. "WAITINT,CPSM waits for interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0xC 8.--9. "WAITRESP,Wait for response bits" "0,1,2,3"
|
|
bitfld.long 0xC 7. "CMDSTOP,The CPSM treats the command as a Stop Transmission command and signals" "0,1"
|
|
bitfld.long 0xC 6. "CMDTRANS,The CPSM treats the command as a data transfer command stops the interrupt" "0,1"
|
|
hexmask.long.byte 0xC 0.--5. 1. "CMDINDEX,Command index"
|
|
rgroup.long 0x10++0x13
|
|
line.long 0x0 "RESPCMDR,command response register"
|
|
hexmask.long.byte 0x0 0.--5. 1. "RESPCMD,Response command index"
|
|
line.long 0x4 "RESP1R,response 1..4 register"
|
|
hexmask.long 0x4 0.--31. 1. "CARDSTATUS1,see Table 347"
|
|
line.long 0x8 "RESP2R,response 1..4 register"
|
|
hexmask.long 0x8 0.--31. 1. "CARDSTATUS2,see Table 347"
|
|
line.long 0xC "RESP3R,response 1..4 register"
|
|
hexmask.long 0xC 0.--31. 1. "CARDSTATUS3,see Table 347"
|
|
line.long 0x10 "RESP4R,response 1..4 register"
|
|
hexmask.long 0x10 0.--31. 1. "CARDSTATUS4,see Table 347"
|
|
group.long 0x24++0xB
|
|
line.long 0x0 "DTIMER,data timer register"
|
|
hexmask.long 0x0 0.--31. 1. "DATATIME,Data timeout period"
|
|
line.long 0x4 "DLENR,data length register"
|
|
hexmask.long 0x4 0.--24. 1. "DATALENGTH,Data length value"
|
|
line.long 0x8 "DCTRL,data control register"
|
|
bitfld.long 0x8 13. "FIFORST,FIFO reset will flush any remaining data" "0,1"
|
|
bitfld.long 0x8 12. "BOOTACKEN,Enable the reception of the boot acknowledgment" "0,1"
|
|
bitfld.long 0x8 11. "SDIOEN,SD I/O enable functions" "0,1"
|
|
bitfld.long 0x8 10. "RWMOD,Read wait mode" "0,1"
|
|
bitfld.long 0x8 9. "RWSTOP,Read wait stop" "0,1"
|
|
bitfld.long 0x8 8. "RWSTART,Read wait start" "0,1"
|
|
hexmask.long.byte 0x8 4.--7. 1. "DBLOCKSIZE,Data block size"
|
|
newline
|
|
bitfld.long 0x8 2.--3. "DTMODE,Data transfer mode selection 1: Stream" "?,1: Stream,?,?"
|
|
bitfld.long 0x8 1. "DTDIR,Data transfer direction" "0,1"
|
|
bitfld.long 0x8 0. "DTEN,DTEN" "0,1"
|
|
rgroup.long 0x30++0x7
|
|
line.long 0x0 "DCNTR,data counter register"
|
|
hexmask.long 0x0 0.--24. 1. "DATACOUNT,Data count value"
|
|
line.long 0x4 "STAR,status register"
|
|
bitfld.long 0x4 28. "IDMABTC,IDMA buffer transfer complete" "0,1"
|
|
bitfld.long 0x4 27. "IDMATE,IDMA transfer error" "0,1"
|
|
bitfld.long 0x4 26. "CKSTOP,SDMMC_CK stopped in Voltage switch procedure" "0,1"
|
|
bitfld.long 0x4 25. "VSWEND,Voltage switch critical timing section completion" "0,1"
|
|
bitfld.long 0x4 24. "ACKTIMEOUT,Boot acknowledgment timeout" "0,1"
|
|
bitfld.long 0x4 23. "ACKFAIL,Boot acknowledgment received (boot acknowledgment check fail)" "0,1"
|
|
bitfld.long 0x4 22. "SDIOIT,SDIO interrupt received" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "BUSYD0END,end of SDMMC_D0 Busy following a CMD response detected" "0,1"
|
|
bitfld.long 0x4 20. "BUSYD0,Inverted value of SDMMC_D0 line (Busy) sampled at the end of a CMD response" "0,1"
|
|
bitfld.long 0x4 19. "RXFIFOE,Receive FIFO empty" "0,1"
|
|
bitfld.long 0x4 18. "TXFIFOE,Transmit FIFO empty" "0,1"
|
|
bitfld.long 0x4 17. "RXFIFOF,Receive FIFO full" "0,1"
|
|
bitfld.long 0x4 16. "TXFIFOF,Transmit FIFO full" "0,1"
|
|
bitfld.long 0x4 15. "RXFIFOHF,Receive FIFO half full: there are at" "0,1"
|
|
newline
|
|
bitfld.long 0x4 14. "TXFIFOHE,Transmit FIFO half empty: at least 8" "0,1"
|
|
bitfld.long 0x4 13. "CPSMACT,Command path state machine active i.e. not in Idle state" "0,1"
|
|
bitfld.long 0x4 12. "DPSMACT,Data path state machine active i.e. not in Idle state" "0,1"
|
|
bitfld.long 0x4 11. "DABORT,Data transfer aborted by CMD12" "0,1"
|
|
bitfld.long 0x4 10. "DBCKEND,Data block sent/received" "0,1"
|
|
bitfld.long 0x4 9. "DHOLD,Data transfer Hold" "0,1"
|
|
bitfld.long 0x4 8. "DATAEND,Data end (data counter SDIDCOUNT is" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "CMDSENT,Command sent (no response" "0,1"
|
|
bitfld.long 0x4 6. "CMDREND,Command response received (CRC check" "0,1"
|
|
bitfld.long 0x4 5. "RXOVERR,Received FIFO overrun" "0,1"
|
|
bitfld.long 0x4 4. "TXUNDERR,Transmit FIFO underrun" "0,1"
|
|
bitfld.long 0x4 3. "DTIMEOUT,Data timeout" "0,1"
|
|
bitfld.long 0x4 2. "CTIMEOUT,Command response timeout" "0,1"
|
|
bitfld.long 0x4 1. "DCRCFAIL,Data block sent/received (CRC check" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "CCRCFAIL,Command response received (CRC check" "0,1"
|
|
group.long 0x38++0xB
|
|
line.long 0x0 "ICR,interrupt clear register"
|
|
bitfld.long 0x0 28. "IDMABTCC,IDMA buffer transfer complete clear bit" "0,1"
|
|
bitfld.long 0x0 27. "IDMATEC,IDMA transfer error clear bit" "0,1"
|
|
bitfld.long 0x0 26. "CKSTOPC,CKSTOP flag clear bit" "0,1"
|
|
bitfld.long 0x0 25. "VSWENDC,VSWEND flag clear bit" "0,1"
|
|
bitfld.long 0x0 24. "ACKTIMEOUTC,ACKTIMEOUT flag clear bit" "0,1"
|
|
bitfld.long 0x0 23. "ACKFAILC,ACKFAIL flag clear bit" "0,1"
|
|
bitfld.long 0x0 22. "SDIOITC,SDIOIT flag clear bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "BUSYD0ENDC,BUSYD0END flag clear bit" "0,1"
|
|
bitfld.long 0x0 11. "DABORTC,DABORT flag clear bit" "0,1"
|
|
bitfld.long 0x0 10. "DBCKENDC,DBCKEND flag clear bit" "0,1"
|
|
bitfld.long 0x0 9. "DHOLDC,DHOLD flag clear bit" "0,1"
|
|
bitfld.long 0x0 8. "DATAENDC,DATAEND flag clear bit" "0,1"
|
|
bitfld.long 0x0 7. "CMDSENTC,CMDSENT flag clear bit" "0,1"
|
|
bitfld.long 0x0 6. "CMDRENDC,CMDREND flag clear bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "RXOVERRC,RXOVERR flag clear bit" "0,1"
|
|
bitfld.long 0x0 4. "TXUNDERRC,TXUNDERR flag clear bit" "0,1"
|
|
bitfld.long 0x0 3. "DTIMEOUTC,DTIMEOUT flag clear bit" "0,1"
|
|
bitfld.long 0x0 2. "CTIMEOUTC,CTIMEOUT flag clear bit" "0,1"
|
|
bitfld.long 0x0 1. "DCRCFAILC,DCRCFAIL flag clear bit" "0,1"
|
|
bitfld.long 0x0 0. "CCRCFAILC,CCRCFAIL flag clear bit" "0,1"
|
|
line.long 0x4 "MASKR,mask register"
|
|
bitfld.long 0x4 28. "IDMABTCIE,IDMABTCIE" "0,1"
|
|
bitfld.long 0x4 26. "CKSTOPIE,CKSTOPIE" "0,1"
|
|
bitfld.long 0x4 25. "VSWENDIE,Voltage switch critical timing section completion interrupt enable" "0,1"
|
|
bitfld.long 0x4 24. "ACKTIMEOUTIE,Acknowledgment timeout interrupt enable" "0,1"
|
|
bitfld.long 0x4 23. "ACKFAILIE,Acknowledgment Fail interrupt enable" "0,1"
|
|
bitfld.long 0x4 22. "SDIOITIE,SDIO mode interrupt received interrupt" "0,1"
|
|
bitfld.long 0x4 21. "BUSYD0ENDIE,BUSYD0END interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "TXFIFOEIE,Tx FIFO empty interrupt" "0,1"
|
|
bitfld.long 0x4 17. "RXFIFOFIE,Rx FIFO full interrupt" "0,1"
|
|
bitfld.long 0x4 15. "RXFIFOHFIE,Rx FIFO half full interrupt" "0,1"
|
|
bitfld.long 0x4 14. "TXFIFOHEIE,Tx FIFO half empty interrupt" "0,1"
|
|
bitfld.long 0x4 11. "DABORTIE,Data transfer aborted interrupt enable" "0,1"
|
|
bitfld.long 0x4 10. "DBCKENDIE,Data block end interrupt" "0,1"
|
|
bitfld.long 0x4 9. "DHOLDIE,Data hold interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "DATAENDIE,Data end interrupt enable" "0,1"
|
|
bitfld.long 0x4 7. "CMDSENTIE,Command sent interrupt" "0,1"
|
|
bitfld.long 0x4 6. "CMDRENDIE,Command response received interrupt" "0,1"
|
|
bitfld.long 0x4 5. "RXOVERRIE,Rx FIFO overrun error interrupt" "0,1"
|
|
bitfld.long 0x4 4. "TXUNDERRIE,Tx FIFO underrun error interrupt" "0,1"
|
|
bitfld.long 0x4 3. "DTIMEOUTIE,Data timeout interrupt" "0,1"
|
|
bitfld.long 0x4 2. "CTIMEOUTIE,Command timeout interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "DCRCFAILIE,Data CRC fail interrupt" "0,1"
|
|
bitfld.long 0x4 0. "CCRCFAILIE,Command CRC fail interrupt" "0,1"
|
|
line.long 0x8 "ACKTIMER,acknowledgment timer register"
|
|
hexmask.long 0x8 0.--24. 1. "ACKTIME,Boot acknowledgment timeout period"
|
|
group.long 0x80++0x3F
|
|
line.long 0x0 "FIFOR0,data FIFO register 0"
|
|
hexmask.long 0x0 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
|
|
line.long 0x4 "FIFOR1,data FIFO register 1"
|
|
hexmask.long 0x4 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
|
|
line.long 0x8 "FIFOR2,data FIFO register 2"
|
|
hexmask.long 0x8 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
|
|
line.long 0xC "FIFOR3,data FIFO register 3"
|
|
hexmask.long 0xC 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
|
|
line.long 0x10 "FIFOR4,data FIFO register 4"
|
|
hexmask.long 0x10 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
|
|
line.long 0x14 "FIFOR5,data FIFO register 5"
|
|
hexmask.long 0x14 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
|
|
line.long 0x18 "FIFOR6,data FIFO register 6"
|
|
hexmask.long 0x18 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
|
|
line.long 0x1C "FIFOR7,data FIFO register 7"
|
|
hexmask.long 0x1C 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
|
|
line.long 0x20 "FIFOR8,data FIFO register 8"
|
|
hexmask.long 0x20 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
|
|
line.long 0x24 "FIFOR9,data FIFO register 9"
|
|
hexmask.long 0x24 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
|
|
line.long 0x28 "FIFOR10,data FIFO register 10"
|
|
hexmask.long 0x28 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
|
|
line.long 0x2C "FIFOR11,data FIFO register 11"
|
|
hexmask.long 0x2C 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
|
|
line.long 0x30 "FIFOR12,data FIFO register 12"
|
|
hexmask.long 0x30 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
|
|
line.long 0x34 "FIFOR13,data FIFO register 13"
|
|
hexmask.long 0x34 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
|
|
line.long 0x38 "FIFOR14,data FIFO register 14"
|
|
hexmask.long 0x38 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
|
|
line.long 0x3C "FIFOR15,data FIFO register 15"
|
|
hexmask.long 0x3C 0.--31. 1. "FIFODATA,Receive and transmit FIFO data"
|
|
group.long 0x50++0xF
|
|
line.long 0x0 "IDMACTRLR,DMA control register"
|
|
bitfld.long 0x0 2. "IDMABACT,Double buffer mode active buffer indication" "0,1"
|
|
bitfld.long 0x0 1. "IDMABMODE,Buffer mode selection" "0,1"
|
|
bitfld.long 0x0 0. "IDMAEN,IDMA enable" "0,1"
|
|
line.long 0x4 "IDMABSIZER,IDMA buffer size register"
|
|
hexmask.long.byte 0x4 5.--12. 1. "IDMABNDT,Number of bytes per buffer"
|
|
line.long 0x8 "IDMABASE0R,IDMA buffer 0 base address register"
|
|
hexmask.long 0x8 0.--31. 1. "IDMABASE0,Buffer 0 memory base address bits [31:2] shall be word aligned (bit [1:0]"
|
|
line.long 0xC "IDMABASE1R,IDMA buffer 0 base address register"
|
|
hexmask.long 0xC 0.--31. 1. "IDMABASE1,Buffer 1 memory base address shall be word aligned (bit [1:0]"
|
|
tree.end
|
|
endif
|
|
sif (cpuis("STM32L4R7*"))
|
|
tree "SDMMC1"
|
|
base ad:0x50062400
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "POWER,power control register"
|
|
bitfld.long 0x0 0.--1. "PWRCTRL,PWRCTRL" "0,1,2,3"
|
|
line.long 0x4 "CLKCR,SDI clock control register"
|
|
bitfld.long 0x4 14. "HWFC_EN,HW Flow Control enable" "0,1"
|
|
bitfld.long 0x4 13. "NEGEDGE,SDIO_CK dephasing selection" "0,1"
|
|
bitfld.long 0x4 11.--12. "WIDBUS,Wide bus mode enable bit" "0,1,2,3"
|
|
bitfld.long 0x4 10. "BYPASS,Clock divider bypass enable" "0,1"
|
|
bitfld.long 0x4 9. "PWRSAV,Power saving configuration" "0,1"
|
|
bitfld.long 0x4 8. "CLKEN,Clock enable bit" "0,1"
|
|
hexmask.long.byte 0x4 0.--7. 1. "CLKDIV,Clock divide factor"
|
|
line.long 0x8 "ARG,argument register"
|
|
hexmask.long 0x8 0.--31. 1. "CMDARG,Command argument"
|
|
line.long 0xC "CMD,command register"
|
|
bitfld.long 0xC 14. "CE_ATACMD,CE-ATA command" "0,1"
|
|
bitfld.long 0xC 13. "nIEN,not Interrupt Enable" "0,1"
|
|
bitfld.long 0xC 12. "ENCMDcompl,Enable CMD completion" "0,1"
|
|
bitfld.long 0xC 11. "SDIOSuspend,SD I/O suspend command" "0,1"
|
|
bitfld.long 0xC 10. "CPSMEN,Command path state machine (CPSM) Enable" "0,1"
|
|
bitfld.long 0xC 9. "WAITPEND,CPSM Waits for ends of data transfer" "0,1"
|
|
bitfld.long 0xC 8. "WAITINT,CPSM waits for interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0xC 6.--7. "WAITRESP,Wait for response bits" "0,1,2,3"
|
|
hexmask.long.byte 0xC 0.--5. 1. "CMDINDEX,Command index"
|
|
rgroup.long 0x10++0x13
|
|
line.long 0x0 "RESPCMD,command response register"
|
|
hexmask.long.byte 0x0 0.--5. 1. "RESPCMD,Response command index"
|
|
line.long 0x4 "RESP1,response 1..4 register"
|
|
hexmask.long 0x4 0.--31. 1. "CARDSTATUS1,see Table 132"
|
|
line.long 0x8 "RESP2,response 1..4 register"
|
|
hexmask.long 0x8 0.--31. 1. "CARDSTATUS2,see Table 132"
|
|
line.long 0xC "RESP3,response 1..4 register"
|
|
hexmask.long 0xC 0.--31. 1. "CARDSTATUS3,see Table 132"
|
|
line.long 0x10 "RESP4,response 1..4 register"
|
|
hexmask.long 0x10 0.--31. 1. "CARDSTATUS4,see Table 132"
|
|
group.long 0x24++0xB
|
|
line.long 0x0 "DTIMER,data timer register"
|
|
hexmask.long 0x0 0.--31. 1. "DATATIME,Data timeout period"
|
|
line.long 0x4 "DLEN,data length register"
|
|
hexmask.long 0x4 0.--24. 1. "DATALENGTH,Data length value"
|
|
line.long 0x8 "DCTRL,data control register"
|
|
bitfld.long 0x8 11. "SDIOEN,SD I/O enable functions" "0,1"
|
|
bitfld.long 0x8 10. "RWMOD,Read wait mode" "0,1"
|
|
bitfld.long 0x8 9. "RWSTOP,Read wait stop" "0,1"
|
|
bitfld.long 0x8 8. "RWSTART,Read wait start" "0,1"
|
|
hexmask.long.byte 0x8 4.--7. 1. "DBLOCKSIZE,Data block size"
|
|
bitfld.long 0x8 3. "DMAEN,DMA enable bit" "0,1"
|
|
bitfld.long 0x8 2. "DTMODE,Data transfer mode selection 1: Stream" "?,1: Stream"
|
|
newline
|
|
bitfld.long 0x8 1. "DTDIR,Data transfer direction" "0,1"
|
|
bitfld.long 0x8 0. "DTEN,DTEN" "0,1"
|
|
rgroup.long 0x30++0x7
|
|
line.long 0x0 "DCOUNT,data counter register"
|
|
hexmask.long 0x0 0.--24. 1. "DATACOUNT,Data count value"
|
|
line.long 0x4 "STA,status register"
|
|
bitfld.long 0x4 23. "CEATAEND,CE-ATA command completion signal" "0,1"
|
|
bitfld.long 0x4 22. "SDIOIT,SDIO interrupt received" "0,1"
|
|
bitfld.long 0x4 21. "RXDAVL,Data available in receive" "0,1"
|
|
bitfld.long 0x4 20. "TXDAVL,Data available in transmit" "0,1"
|
|
bitfld.long 0x4 19. "RXFIFOE,Receive FIFO empty" "0,1"
|
|
bitfld.long 0x4 18. "TXFIFOE,Transmit FIFO empty" "0,1"
|
|
bitfld.long 0x4 17. "RXFIFOF,Receive FIFO full" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "TXFIFOF,Transmit FIFO full" "0,1"
|
|
bitfld.long 0x4 15. "RXFIFOHF,Receive FIFO half full: there are at" "0,1"
|
|
bitfld.long 0x4 14. "TXFIFOHE,Transmit FIFO half empty: at least 8" "0,1"
|
|
bitfld.long 0x4 13. "RXACT,Data receive in progress" "0,1"
|
|
bitfld.long 0x4 12. "TXACT,Data transmit in progress" "0,1"
|
|
bitfld.long 0x4 11. "CMDACT,Command transfer in" "0,1"
|
|
bitfld.long 0x4 10. "DBCKEND,Data block sent/received (CRC check" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "STBITERR,Start bit not detected on all data" "0,1"
|
|
bitfld.long 0x4 8. "DATAEND,Data end (data counter SDIDCOUNT is" "0,1"
|
|
bitfld.long 0x4 7. "CMDSENT,Command sent (no response" "0,1"
|
|
bitfld.long 0x4 6. "CMDREND,Command response received (CRC check" "0,1"
|
|
bitfld.long 0x4 5. "RXOVERR,Received FIFO overrun" "0,1"
|
|
bitfld.long 0x4 4. "TXUNDERR,Transmit FIFO underrun" "0,1"
|
|
bitfld.long 0x4 3. "DTIMEOUT,Data timeout" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "CTIMEOUT,Command response timeout" "0,1"
|
|
bitfld.long 0x4 1. "DCRCFAIL,Data block sent/received (CRC check" "0,1"
|
|
bitfld.long 0x4 0. "CCRCFAIL,Command response received (CRC check" "0,1"
|
|
group.long 0x38++0x7
|
|
line.long 0x0 "ICR,interrupt clear register"
|
|
bitfld.long 0x0 23. "CEATAENDC,CEATAEND flag clear bit" "0,1"
|
|
bitfld.long 0x0 22. "SDIOITC,SDIOIT flag clear bit" "0,1"
|
|
bitfld.long 0x0 10. "DBCKENDC,DBCKEND flag clear bit" "0,1"
|
|
bitfld.long 0x0 9. "STBITERRC,STBITERR flag clear bit" "0,1"
|
|
bitfld.long 0x0 8. "DATAENDC,DATAEND flag clear bit" "0,1"
|
|
bitfld.long 0x0 7. "CMDSENTC,CMDSENT flag clear bit" "0,1"
|
|
bitfld.long 0x0 6. "CMDRENDC,CMDREND flag clear bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "RXOVERRC,RXOVERR flag clear bit" "0,1"
|
|
bitfld.long 0x0 4. "TXUNDERRC,TXUNDERR flag clear bit" "0,1"
|
|
bitfld.long 0x0 3. "DTIMEOUTC,DTIMEOUT flag clear bit" "0,1"
|
|
bitfld.long 0x0 2. "CTIMEOUTC,CTIMEOUT flag clear bit" "0,1"
|
|
bitfld.long 0x0 1. "DCRCFAILC,DCRCFAIL flag clear bit" "0,1"
|
|
bitfld.long 0x0 0. "CCRCFAILC,CCRCFAIL flag clear bit" "0,1"
|
|
line.long 0x4 "MASK,mask register"
|
|
bitfld.long 0x4 23. "CEATAENDIE,CE-ATA command completion signal" "0,1"
|
|
bitfld.long 0x4 22. "SDIOITIE,SDIO mode interrupt received interrupt" "0,1"
|
|
bitfld.long 0x4 21. "RXDAVLIE,Data available in Rx FIFO interrupt" "0,1"
|
|
bitfld.long 0x4 20. "TXDAVLIE,Data available in Tx FIFO interrupt" "0,1"
|
|
bitfld.long 0x4 19. "RXFIFOEIE,Rx FIFO empty interrupt" "0,1"
|
|
bitfld.long 0x4 18. "TXFIFOEIE,Tx FIFO empty interrupt" "0,1"
|
|
bitfld.long 0x4 17. "RXFIFOFIE,Rx FIFO full interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "TXFIFOFIE,Tx FIFO full interrupt" "0,1"
|
|
bitfld.long 0x4 15. "RXFIFOHFIE,Rx FIFO half full interrupt" "0,1"
|
|
bitfld.long 0x4 14. "TXFIFOHEIE,Tx FIFO half empty interrupt" "0,1"
|
|
bitfld.long 0x4 13. "RXACTIE,Data receive acting interrupt" "0,1"
|
|
bitfld.long 0x4 12. "TXACTIE,Data transmit acting interrupt" "0,1"
|
|
bitfld.long 0x4 11. "CMDACTIE,Command acting interrupt" "0,1"
|
|
bitfld.long 0x4 10. "DBCKENDIE,Data block end interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "STBITERRIE,Start bit error interrupt" "0,1"
|
|
bitfld.long 0x4 8. "DATAENDIE,Data end interrupt enable" "0,1"
|
|
bitfld.long 0x4 7. "CMDSENTIE,Command sent interrupt" "0,1"
|
|
bitfld.long 0x4 6. "CMDRENDIE,Command response received interrupt" "0,1"
|
|
bitfld.long 0x4 5. "RXOVERRIE,Rx FIFO overrun error interrupt" "0,1"
|
|
bitfld.long 0x4 4. "TXUNDERRIE,Tx FIFO underrun error interrupt" "0,1"
|
|
bitfld.long 0x4 3. "DTIMEOUTIE,Data timeout interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "CTIMEOUTIE,Command timeout interrupt" "0,1"
|
|
bitfld.long 0x4 1. "DCRCFAILIE,Data CRC fail interrupt" "0,1"
|
|
bitfld.long 0x4 0. "CCRCFAILIE,Command CRC fail interrupt" "0,1"
|
|
rgroup.long 0x48++0x3
|
|
line.long 0x0 "FIFOCNT,FIFO counter register"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "FIFOCOUNT,Remaining number of words to be written"
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "FIFO,data FIFO register"
|
|
hexmask.long 0x0 0.--31. 1. "FIFOData,Receive and transmit FIFO"
|
|
tree.end
|
|
endif
|
|
sif (cpuis("STM32L4R9*"))
|
|
tree "SDMMC1"
|
|
base ad:0x50062400
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "POWER,power control register"
|
|
bitfld.long 0x0 0.--1. "PWRCTRL,PWRCTRL" "0,1,2,3"
|
|
line.long 0x4 "CLKCR,SDI clock control register"
|
|
bitfld.long 0x4 14. "HWFC_EN,HW Flow Control enable" "0,1"
|
|
bitfld.long 0x4 13. "NEGEDGE,SDIO_CK dephasing selection" "0,1"
|
|
bitfld.long 0x4 11.--12. "WIDBUS,Wide bus mode enable bit" "0,1,2,3"
|
|
bitfld.long 0x4 10. "BYPASS,Clock divider bypass enable" "0,1"
|
|
bitfld.long 0x4 9. "PWRSAV,Power saving configuration" "0,1"
|
|
bitfld.long 0x4 8. "CLKEN,Clock enable bit" "0,1"
|
|
hexmask.long.byte 0x4 0.--7. 1. "CLKDIV,Clock divide factor"
|
|
line.long 0x8 "ARG,argument register"
|
|
hexmask.long 0x8 0.--31. 1. "CMDARG,Command argument"
|
|
line.long 0xC "CMD,command register"
|
|
bitfld.long 0xC 14. "CE_ATACMD,CE-ATA command" "0,1"
|
|
bitfld.long 0xC 13. "nIEN,not Interrupt Enable" "0,1"
|
|
bitfld.long 0xC 12. "ENCMDcompl,Enable CMD completion" "0,1"
|
|
bitfld.long 0xC 11. "SDIOSuspend,SD I/O suspend command" "0,1"
|
|
bitfld.long 0xC 10. "CPSMEN,Command path state machine (CPSM) Enable" "0,1"
|
|
bitfld.long 0xC 9. "WAITPEND,CPSM Waits for ends of data transfer" "0,1"
|
|
bitfld.long 0xC 8. "WAITINT,CPSM waits for interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0xC 6.--7. "WAITRESP,Wait for response bits" "0,1,2,3"
|
|
hexmask.long.byte 0xC 0.--5. 1. "CMDINDEX,Command index"
|
|
rgroup.long 0x10++0x13
|
|
line.long 0x0 "RESPCMD,command response register"
|
|
hexmask.long.byte 0x0 0.--5. 1. "RESPCMD,Response command index"
|
|
line.long 0x4 "RESP1,response 1..4 register"
|
|
hexmask.long 0x4 0.--31. 1. "CARDSTATUS1,see Table 132"
|
|
line.long 0x8 "RESP2,response 1..4 register"
|
|
hexmask.long 0x8 0.--31. 1. "CARDSTATUS2,see Table 132"
|
|
line.long 0xC "RESP3,response 1..4 register"
|
|
hexmask.long 0xC 0.--31. 1. "CARDSTATUS3,see Table 132"
|
|
line.long 0x10 "RESP4,response 1..4 register"
|
|
hexmask.long 0x10 0.--31. 1. "CARDSTATUS4,see Table 132"
|
|
group.long 0x24++0xB
|
|
line.long 0x0 "DTIMER,data timer register"
|
|
hexmask.long 0x0 0.--31. 1. "DATATIME,Data timeout period"
|
|
line.long 0x4 "DLEN,data length register"
|
|
hexmask.long 0x4 0.--24. 1. "DATALENGTH,Data length value"
|
|
line.long 0x8 "DCTRL,data control register"
|
|
bitfld.long 0x8 11. "SDIOEN,SD I/O enable functions" "0,1"
|
|
bitfld.long 0x8 10. "RWMOD,Read wait mode" "0,1"
|
|
bitfld.long 0x8 9. "RWSTOP,Read wait stop" "0,1"
|
|
bitfld.long 0x8 8. "RWSTART,Read wait start" "0,1"
|
|
hexmask.long.byte 0x8 4.--7. 1. "DBLOCKSIZE,Data block size"
|
|
bitfld.long 0x8 3. "DMAEN,DMA enable bit" "0,1"
|
|
bitfld.long 0x8 2. "DTMODE,Data transfer mode selection 1: Stream" "?,1: Stream"
|
|
newline
|
|
bitfld.long 0x8 1. "DTDIR,Data transfer direction" "0,1"
|
|
bitfld.long 0x8 0. "DTEN,DTEN" "0,1"
|
|
rgroup.long 0x30++0x7
|
|
line.long 0x0 "DCOUNT,data counter register"
|
|
hexmask.long 0x0 0.--24. 1. "DATACOUNT,Data count value"
|
|
line.long 0x4 "STA,status register"
|
|
bitfld.long 0x4 23. "CEATAEND,CE-ATA command completion signal" "0,1"
|
|
bitfld.long 0x4 22. "SDIOIT,SDIO interrupt received" "0,1"
|
|
bitfld.long 0x4 21. "RXDAVL,Data available in receive" "0,1"
|
|
bitfld.long 0x4 20. "TXDAVL,Data available in transmit" "0,1"
|
|
bitfld.long 0x4 19. "RXFIFOE,Receive FIFO empty" "0,1"
|
|
bitfld.long 0x4 18. "TXFIFOE,Transmit FIFO empty" "0,1"
|
|
bitfld.long 0x4 17. "RXFIFOF,Receive FIFO full" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "TXFIFOF,Transmit FIFO full" "0,1"
|
|
bitfld.long 0x4 15. "RXFIFOHF,Receive FIFO half full: there are at" "0,1"
|
|
bitfld.long 0x4 14. "TXFIFOHE,Transmit FIFO half empty: at least 8" "0,1"
|
|
bitfld.long 0x4 13. "RXACT,Data receive in progress" "0,1"
|
|
bitfld.long 0x4 12. "TXACT,Data transmit in progress" "0,1"
|
|
bitfld.long 0x4 11. "CMDACT,Command transfer in" "0,1"
|
|
bitfld.long 0x4 10. "DBCKEND,Data block sent/received (CRC check" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "STBITERR,Start bit not detected on all data" "0,1"
|
|
bitfld.long 0x4 8. "DATAEND,Data end (data counter SDIDCOUNT is" "0,1"
|
|
bitfld.long 0x4 7. "CMDSENT,Command sent (no response" "0,1"
|
|
bitfld.long 0x4 6. "CMDREND,Command response received (CRC check" "0,1"
|
|
bitfld.long 0x4 5. "RXOVERR,Received FIFO overrun" "0,1"
|
|
bitfld.long 0x4 4. "TXUNDERR,Transmit FIFO underrun" "0,1"
|
|
bitfld.long 0x4 3. "DTIMEOUT,Data timeout" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "CTIMEOUT,Command response timeout" "0,1"
|
|
bitfld.long 0x4 1. "DCRCFAIL,Data block sent/received (CRC check" "0,1"
|
|
bitfld.long 0x4 0. "CCRCFAIL,Command response received (CRC check" "0,1"
|
|
group.long 0x38++0x7
|
|
line.long 0x0 "ICR,interrupt clear register"
|
|
bitfld.long 0x0 23. "CEATAENDC,CEATAEND flag clear bit" "0,1"
|
|
bitfld.long 0x0 22. "SDIOITC,SDIOIT flag clear bit" "0,1"
|
|
bitfld.long 0x0 10. "DBCKENDC,DBCKEND flag clear bit" "0,1"
|
|
bitfld.long 0x0 9. "STBITERRC,STBITERR flag clear bit" "0,1"
|
|
bitfld.long 0x0 8. "DATAENDC,DATAEND flag clear bit" "0,1"
|
|
bitfld.long 0x0 7. "CMDSENTC,CMDSENT flag clear bit" "0,1"
|
|
bitfld.long 0x0 6. "CMDRENDC,CMDREND flag clear bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "RXOVERRC,RXOVERR flag clear bit" "0,1"
|
|
bitfld.long 0x0 4. "TXUNDERRC,TXUNDERR flag clear bit" "0,1"
|
|
bitfld.long 0x0 3. "DTIMEOUTC,DTIMEOUT flag clear bit" "0,1"
|
|
bitfld.long 0x0 2. "CTIMEOUTC,CTIMEOUT flag clear bit" "0,1"
|
|
bitfld.long 0x0 1. "DCRCFAILC,DCRCFAIL flag clear bit" "0,1"
|
|
bitfld.long 0x0 0. "CCRCFAILC,CCRCFAIL flag clear bit" "0,1"
|
|
line.long 0x4 "MASK,mask register"
|
|
bitfld.long 0x4 23. "CEATAENDIE,CE-ATA command completion signal" "0,1"
|
|
bitfld.long 0x4 22. "SDIOITIE,SDIO mode interrupt received interrupt" "0,1"
|
|
bitfld.long 0x4 21. "RXDAVLIE,Data available in Rx FIFO interrupt" "0,1"
|
|
bitfld.long 0x4 20. "TXDAVLIE,Data available in Tx FIFO interrupt" "0,1"
|
|
bitfld.long 0x4 19. "RXFIFOEIE,Rx FIFO empty interrupt" "0,1"
|
|
bitfld.long 0x4 18. "TXFIFOEIE,Tx FIFO empty interrupt" "0,1"
|
|
bitfld.long 0x4 17. "RXFIFOFIE,Rx FIFO full interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "TXFIFOFIE,Tx FIFO full interrupt" "0,1"
|
|
bitfld.long 0x4 15. "RXFIFOHFIE,Rx FIFO half full interrupt" "0,1"
|
|
bitfld.long 0x4 14. "TXFIFOHEIE,Tx FIFO half empty interrupt" "0,1"
|
|
bitfld.long 0x4 13. "RXACTIE,Data receive acting interrupt" "0,1"
|
|
bitfld.long 0x4 12. "TXACTIE,Data transmit acting interrupt" "0,1"
|
|
bitfld.long 0x4 11. "CMDACTIE,Command acting interrupt" "0,1"
|
|
bitfld.long 0x4 10. "DBCKENDIE,Data block end interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "STBITERRIE,Start bit error interrupt" "0,1"
|
|
bitfld.long 0x4 8. "DATAENDIE,Data end interrupt enable" "0,1"
|
|
bitfld.long 0x4 7. "CMDSENTIE,Command sent interrupt" "0,1"
|
|
bitfld.long 0x4 6. "CMDRENDIE,Command response received interrupt" "0,1"
|
|
bitfld.long 0x4 5. "RXOVERRIE,Rx FIFO overrun error interrupt" "0,1"
|
|
bitfld.long 0x4 4. "TXUNDERRIE,Tx FIFO underrun error interrupt" "0,1"
|
|
bitfld.long 0x4 3. "DTIMEOUTIE,Data timeout interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "CTIMEOUTIE,Command timeout interrupt" "0,1"
|
|
bitfld.long 0x4 1. "DCRCFAILIE,Data CRC fail interrupt" "0,1"
|
|
bitfld.long 0x4 0. "CCRCFAILIE,Command CRC fail interrupt" "0,1"
|
|
rgroup.long 0x48++0x3
|
|
line.long 0x0 "FIFOCNT,FIFO counter register"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "FIFOCOUNT,Remaining number of words to be written"
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "FIFO,data FIFO register"
|
|
hexmask.long 0x0 0.--31. 1. "FIFOData,Receive and transmit FIFO"
|
|
tree.end
|
|
endif
|
|
sif (cpuis("STM32L4S5*"))
|
|
tree "SDMMC1"
|
|
base ad:0x50062400
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "POWER,power control register"
|
|
bitfld.long 0x0 0.--1. "PWRCTRL,PWRCTRL" "0,1,2,3"
|
|
line.long 0x4 "CLKCR,SDI clock control register"
|
|
bitfld.long 0x4 14. "HWFC_EN,HW Flow Control enable" "0,1"
|
|
bitfld.long 0x4 13. "NEGEDGE,SDIO_CK dephasing selection" "0,1"
|
|
bitfld.long 0x4 11.--12. "WIDBUS,Wide bus mode enable bit" "0,1,2,3"
|
|
bitfld.long 0x4 10. "BYPASS,Clock divider bypass enable" "0,1"
|
|
bitfld.long 0x4 9. "PWRSAV,Power saving configuration" "0,1"
|
|
bitfld.long 0x4 8. "CLKEN,Clock enable bit" "0,1"
|
|
hexmask.long.byte 0x4 0.--7. 1. "CLKDIV,Clock divide factor"
|
|
line.long 0x8 "ARG,argument register"
|
|
hexmask.long 0x8 0.--31. 1. "CMDARG,Command argument"
|
|
line.long 0xC "CMD,command register"
|
|
bitfld.long 0xC 14. "CE_ATACMD,CE-ATA command" "0,1"
|
|
bitfld.long 0xC 13. "nIEN,not Interrupt Enable" "0,1"
|
|
bitfld.long 0xC 12. "ENCMDcompl,Enable CMD completion" "0,1"
|
|
bitfld.long 0xC 11. "SDIOSuspend,SD I/O suspend command" "0,1"
|
|
bitfld.long 0xC 10. "CPSMEN,Command path state machine (CPSM) Enable" "0,1"
|
|
bitfld.long 0xC 9. "WAITPEND,CPSM Waits for ends of data transfer" "0,1"
|
|
bitfld.long 0xC 8. "WAITINT,CPSM waits for interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0xC 6.--7. "WAITRESP,Wait for response bits" "0,1,2,3"
|
|
hexmask.long.byte 0xC 0.--5. 1. "CMDINDEX,Command index"
|
|
rgroup.long 0x10++0x13
|
|
line.long 0x0 "RESPCMD,command response register"
|
|
hexmask.long.byte 0x0 0.--5. 1. "RESPCMD,Response command index"
|
|
line.long 0x4 "RESP1,response 1..4 register"
|
|
hexmask.long 0x4 0.--31. 1. "CARDSTATUS1,see Table 132"
|
|
line.long 0x8 "RESP2,response 1..4 register"
|
|
hexmask.long 0x8 0.--31. 1. "CARDSTATUS2,see Table 132"
|
|
line.long 0xC "RESP3,response 1..4 register"
|
|
hexmask.long 0xC 0.--31. 1. "CARDSTATUS3,see Table 132"
|
|
line.long 0x10 "RESP4,response 1..4 register"
|
|
hexmask.long 0x10 0.--31. 1. "CARDSTATUS4,see Table 132"
|
|
group.long 0x24++0xB
|
|
line.long 0x0 "DTIMER,data timer register"
|
|
hexmask.long 0x0 0.--31. 1. "DATATIME,Data timeout period"
|
|
line.long 0x4 "DLEN,data length register"
|
|
hexmask.long 0x4 0.--24. 1. "DATALENGTH,Data length value"
|
|
line.long 0x8 "DCTRL,data control register"
|
|
bitfld.long 0x8 11. "SDIOEN,SD I/O enable functions" "0,1"
|
|
bitfld.long 0x8 10. "RWMOD,Read wait mode" "0,1"
|
|
bitfld.long 0x8 9. "RWSTOP,Read wait stop" "0,1"
|
|
bitfld.long 0x8 8. "RWSTART,Read wait start" "0,1"
|
|
hexmask.long.byte 0x8 4.--7. 1. "DBLOCKSIZE,Data block size"
|
|
bitfld.long 0x8 3. "DMAEN,DMA enable bit" "0,1"
|
|
bitfld.long 0x8 2. "DTMODE,Data transfer mode selection 1: Stream" "?,1: Stream"
|
|
newline
|
|
bitfld.long 0x8 1. "DTDIR,Data transfer direction" "0,1"
|
|
bitfld.long 0x8 0. "DTEN,DTEN" "0,1"
|
|
rgroup.long 0x30++0x7
|
|
line.long 0x0 "DCOUNT,data counter register"
|
|
hexmask.long 0x0 0.--24. 1. "DATACOUNT,Data count value"
|
|
line.long 0x4 "STA,status register"
|
|
bitfld.long 0x4 23. "CEATAEND,CE-ATA command completion signal" "0,1"
|
|
bitfld.long 0x4 22. "SDIOIT,SDIO interrupt received" "0,1"
|
|
bitfld.long 0x4 21. "RXDAVL,Data available in receive" "0,1"
|
|
bitfld.long 0x4 20. "TXDAVL,Data available in transmit" "0,1"
|
|
bitfld.long 0x4 19. "RXFIFOE,Receive FIFO empty" "0,1"
|
|
bitfld.long 0x4 18. "TXFIFOE,Transmit FIFO empty" "0,1"
|
|
bitfld.long 0x4 17. "RXFIFOF,Receive FIFO full" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "TXFIFOF,Transmit FIFO full" "0,1"
|
|
bitfld.long 0x4 15. "RXFIFOHF,Receive FIFO half full: there are at" "0,1"
|
|
bitfld.long 0x4 14. "TXFIFOHE,Transmit FIFO half empty: at least 8" "0,1"
|
|
bitfld.long 0x4 13. "RXACT,Data receive in progress" "0,1"
|
|
bitfld.long 0x4 12. "TXACT,Data transmit in progress" "0,1"
|
|
bitfld.long 0x4 11. "CMDACT,Command transfer in" "0,1"
|
|
bitfld.long 0x4 10. "DBCKEND,Data block sent/received (CRC check" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "STBITERR,Start bit not detected on all data" "0,1"
|
|
bitfld.long 0x4 8. "DATAEND,Data end (data counter SDIDCOUNT is" "0,1"
|
|
bitfld.long 0x4 7. "CMDSENT,Command sent (no response" "0,1"
|
|
bitfld.long 0x4 6. "CMDREND,Command response received (CRC check" "0,1"
|
|
bitfld.long 0x4 5. "RXOVERR,Received FIFO overrun" "0,1"
|
|
bitfld.long 0x4 4. "TXUNDERR,Transmit FIFO underrun" "0,1"
|
|
bitfld.long 0x4 3. "DTIMEOUT,Data timeout" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "CTIMEOUT,Command response timeout" "0,1"
|
|
bitfld.long 0x4 1. "DCRCFAIL,Data block sent/received (CRC check" "0,1"
|
|
bitfld.long 0x4 0. "CCRCFAIL,Command response received (CRC check" "0,1"
|
|
group.long 0x38++0x7
|
|
line.long 0x0 "ICR,interrupt clear register"
|
|
bitfld.long 0x0 23. "CEATAENDC,CEATAEND flag clear bit" "0,1"
|
|
bitfld.long 0x0 22. "SDIOITC,SDIOIT flag clear bit" "0,1"
|
|
bitfld.long 0x0 10. "DBCKENDC,DBCKEND flag clear bit" "0,1"
|
|
bitfld.long 0x0 9. "STBITERRC,STBITERR flag clear bit" "0,1"
|
|
bitfld.long 0x0 8. "DATAENDC,DATAEND flag clear bit" "0,1"
|
|
bitfld.long 0x0 7. "CMDSENTC,CMDSENT flag clear bit" "0,1"
|
|
bitfld.long 0x0 6. "CMDRENDC,CMDREND flag clear bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "RXOVERRC,RXOVERR flag clear bit" "0,1"
|
|
bitfld.long 0x0 4. "TXUNDERRC,TXUNDERR flag clear bit" "0,1"
|
|
bitfld.long 0x0 3. "DTIMEOUTC,DTIMEOUT flag clear bit" "0,1"
|
|
bitfld.long 0x0 2. "CTIMEOUTC,CTIMEOUT flag clear bit" "0,1"
|
|
bitfld.long 0x0 1. "DCRCFAILC,DCRCFAIL flag clear bit" "0,1"
|
|
bitfld.long 0x0 0. "CCRCFAILC,CCRCFAIL flag clear bit" "0,1"
|
|
line.long 0x4 "MASK,mask register"
|
|
bitfld.long 0x4 23. "CEATAENDIE,CE-ATA command completion signal" "0,1"
|
|
bitfld.long 0x4 22. "SDIOITIE,SDIO mode interrupt received interrupt" "0,1"
|
|
bitfld.long 0x4 21. "RXDAVLIE,Data available in Rx FIFO interrupt" "0,1"
|
|
bitfld.long 0x4 20. "TXDAVLIE,Data available in Tx FIFO interrupt" "0,1"
|
|
bitfld.long 0x4 19. "RXFIFOEIE,Rx FIFO empty interrupt" "0,1"
|
|
bitfld.long 0x4 18. "TXFIFOEIE,Tx FIFO empty interrupt" "0,1"
|
|
bitfld.long 0x4 17. "RXFIFOFIE,Rx FIFO full interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "TXFIFOFIE,Tx FIFO full interrupt" "0,1"
|
|
bitfld.long 0x4 15. "RXFIFOHFIE,Rx FIFO half full interrupt" "0,1"
|
|
bitfld.long 0x4 14. "TXFIFOHEIE,Tx FIFO half empty interrupt" "0,1"
|
|
bitfld.long 0x4 13. "RXACTIE,Data receive acting interrupt" "0,1"
|
|
bitfld.long 0x4 12. "TXACTIE,Data transmit acting interrupt" "0,1"
|
|
bitfld.long 0x4 11. "CMDACTIE,Command acting interrupt" "0,1"
|
|
bitfld.long 0x4 10. "DBCKENDIE,Data block end interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "STBITERRIE,Start bit error interrupt" "0,1"
|
|
bitfld.long 0x4 8. "DATAENDIE,Data end interrupt enable" "0,1"
|
|
bitfld.long 0x4 7. "CMDSENTIE,Command sent interrupt" "0,1"
|
|
bitfld.long 0x4 6. "CMDRENDIE,Command response received interrupt" "0,1"
|
|
bitfld.long 0x4 5. "RXOVERRIE,Rx FIFO overrun error interrupt" "0,1"
|
|
bitfld.long 0x4 4. "TXUNDERRIE,Tx FIFO underrun error interrupt" "0,1"
|
|
bitfld.long 0x4 3. "DTIMEOUTIE,Data timeout interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "CTIMEOUTIE,Command timeout interrupt" "0,1"
|
|
bitfld.long 0x4 1. "DCRCFAILIE,Data CRC fail interrupt" "0,1"
|
|
bitfld.long 0x4 0. "CCRCFAILIE,Command CRC fail interrupt" "0,1"
|
|
rgroup.long 0x48++0x3
|
|
line.long 0x0 "FIFOCNT,FIFO counter register"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "FIFOCOUNT,Remaining number of words to be written"
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "FIFO,data FIFO register"
|
|
hexmask.long 0x0 0.--31. 1. "FIFOData,Receive and transmit FIFO"
|
|
tree.end
|
|
endif
|
|
sif (cpuis("STM32L4S7*"))
|
|
tree "SDMMC1"
|
|
base ad:0x50062400
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "POWER,power control register"
|
|
bitfld.long 0x0 0.--1. "PWRCTRL,PWRCTRL" "0,1,2,3"
|
|
line.long 0x4 "CLKCR,SDI clock control register"
|
|
bitfld.long 0x4 14. "HWFC_EN,HW Flow Control enable" "0,1"
|
|
bitfld.long 0x4 13. "NEGEDGE,SDIO_CK dephasing selection" "0,1"
|
|
bitfld.long 0x4 11.--12. "WIDBUS,Wide bus mode enable bit" "0,1,2,3"
|
|
bitfld.long 0x4 10. "BYPASS,Clock divider bypass enable" "0,1"
|
|
bitfld.long 0x4 9. "PWRSAV,Power saving configuration" "0,1"
|
|
bitfld.long 0x4 8. "CLKEN,Clock enable bit" "0,1"
|
|
hexmask.long.byte 0x4 0.--7. 1. "CLKDIV,Clock divide factor"
|
|
line.long 0x8 "ARG,argument register"
|
|
hexmask.long 0x8 0.--31. 1. "CMDARG,Command argument"
|
|
line.long 0xC "CMD,command register"
|
|
bitfld.long 0xC 14. "CE_ATACMD,CE-ATA command" "0,1"
|
|
bitfld.long 0xC 13. "nIEN,not Interrupt Enable" "0,1"
|
|
bitfld.long 0xC 12. "ENCMDcompl,Enable CMD completion" "0,1"
|
|
bitfld.long 0xC 11. "SDIOSuspend,SD I/O suspend command" "0,1"
|
|
bitfld.long 0xC 10. "CPSMEN,Command path state machine (CPSM) Enable" "0,1"
|
|
bitfld.long 0xC 9. "WAITPEND,CPSM Waits for ends of data transfer" "0,1"
|
|
bitfld.long 0xC 8. "WAITINT,CPSM waits for interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0xC 6.--7. "WAITRESP,Wait for response bits" "0,1,2,3"
|
|
hexmask.long.byte 0xC 0.--5. 1. "CMDINDEX,Command index"
|
|
rgroup.long 0x10++0x13
|
|
line.long 0x0 "RESPCMD,command response register"
|
|
hexmask.long.byte 0x0 0.--5. 1. "RESPCMD,Response command index"
|
|
line.long 0x4 "RESP1,response 1..4 register"
|
|
hexmask.long 0x4 0.--31. 1. "CARDSTATUS1,see Table 132"
|
|
line.long 0x8 "RESP2,response 1..4 register"
|
|
hexmask.long 0x8 0.--31. 1. "CARDSTATUS2,see Table 132"
|
|
line.long 0xC "RESP3,response 1..4 register"
|
|
hexmask.long 0xC 0.--31. 1. "CARDSTATUS3,see Table 132"
|
|
line.long 0x10 "RESP4,response 1..4 register"
|
|
hexmask.long 0x10 0.--31. 1. "CARDSTATUS4,see Table 132"
|
|
group.long 0x24++0xB
|
|
line.long 0x0 "DTIMER,data timer register"
|
|
hexmask.long 0x0 0.--31. 1. "DATATIME,Data timeout period"
|
|
line.long 0x4 "DLEN,data length register"
|
|
hexmask.long 0x4 0.--24. 1. "DATALENGTH,Data length value"
|
|
line.long 0x8 "DCTRL,data control register"
|
|
bitfld.long 0x8 11. "SDIOEN,SD I/O enable functions" "0,1"
|
|
bitfld.long 0x8 10. "RWMOD,Read wait mode" "0,1"
|
|
bitfld.long 0x8 9. "RWSTOP,Read wait stop" "0,1"
|
|
bitfld.long 0x8 8. "RWSTART,Read wait start" "0,1"
|
|
hexmask.long.byte 0x8 4.--7. 1. "DBLOCKSIZE,Data block size"
|
|
bitfld.long 0x8 3. "DMAEN,DMA enable bit" "0,1"
|
|
bitfld.long 0x8 2. "DTMODE,Data transfer mode selection 1: Stream" "?,1: Stream"
|
|
newline
|
|
bitfld.long 0x8 1. "DTDIR,Data transfer direction" "0,1"
|
|
bitfld.long 0x8 0. "DTEN,DTEN" "0,1"
|
|
rgroup.long 0x30++0x7
|
|
line.long 0x0 "DCOUNT,data counter register"
|
|
hexmask.long 0x0 0.--24. 1. "DATACOUNT,Data count value"
|
|
line.long 0x4 "STA,status register"
|
|
bitfld.long 0x4 23. "CEATAEND,CE-ATA command completion signal" "0,1"
|
|
bitfld.long 0x4 22. "SDIOIT,SDIO interrupt received" "0,1"
|
|
bitfld.long 0x4 21. "RXDAVL,Data available in receive" "0,1"
|
|
bitfld.long 0x4 20. "TXDAVL,Data available in transmit" "0,1"
|
|
bitfld.long 0x4 19. "RXFIFOE,Receive FIFO empty" "0,1"
|
|
bitfld.long 0x4 18. "TXFIFOE,Transmit FIFO empty" "0,1"
|
|
bitfld.long 0x4 17. "RXFIFOF,Receive FIFO full" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "TXFIFOF,Transmit FIFO full" "0,1"
|
|
bitfld.long 0x4 15. "RXFIFOHF,Receive FIFO half full: there are at" "0,1"
|
|
bitfld.long 0x4 14. "TXFIFOHE,Transmit FIFO half empty: at least 8" "0,1"
|
|
bitfld.long 0x4 13. "RXACT,Data receive in progress" "0,1"
|
|
bitfld.long 0x4 12. "TXACT,Data transmit in progress" "0,1"
|
|
bitfld.long 0x4 11. "CMDACT,Command transfer in" "0,1"
|
|
bitfld.long 0x4 10. "DBCKEND,Data block sent/received (CRC check" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "STBITERR,Start bit not detected on all data" "0,1"
|
|
bitfld.long 0x4 8. "DATAEND,Data end (data counter SDIDCOUNT is" "0,1"
|
|
bitfld.long 0x4 7. "CMDSENT,Command sent (no response" "0,1"
|
|
bitfld.long 0x4 6. "CMDREND,Command response received (CRC check" "0,1"
|
|
bitfld.long 0x4 5. "RXOVERR,Received FIFO overrun" "0,1"
|
|
bitfld.long 0x4 4. "TXUNDERR,Transmit FIFO underrun" "0,1"
|
|
bitfld.long 0x4 3. "DTIMEOUT,Data timeout" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "CTIMEOUT,Command response timeout" "0,1"
|
|
bitfld.long 0x4 1. "DCRCFAIL,Data block sent/received (CRC check" "0,1"
|
|
bitfld.long 0x4 0. "CCRCFAIL,Command response received (CRC check" "0,1"
|
|
group.long 0x38++0x7
|
|
line.long 0x0 "ICR,interrupt clear register"
|
|
bitfld.long 0x0 23. "CEATAENDC,CEATAEND flag clear bit" "0,1"
|
|
bitfld.long 0x0 22. "SDIOITC,SDIOIT flag clear bit" "0,1"
|
|
bitfld.long 0x0 10. "DBCKENDC,DBCKEND flag clear bit" "0,1"
|
|
bitfld.long 0x0 9. "STBITERRC,STBITERR flag clear bit" "0,1"
|
|
bitfld.long 0x0 8. "DATAENDC,DATAEND flag clear bit" "0,1"
|
|
bitfld.long 0x0 7. "CMDSENTC,CMDSENT flag clear bit" "0,1"
|
|
bitfld.long 0x0 6. "CMDRENDC,CMDREND flag clear bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "RXOVERRC,RXOVERR flag clear bit" "0,1"
|
|
bitfld.long 0x0 4. "TXUNDERRC,TXUNDERR flag clear bit" "0,1"
|
|
bitfld.long 0x0 3. "DTIMEOUTC,DTIMEOUT flag clear bit" "0,1"
|
|
bitfld.long 0x0 2. "CTIMEOUTC,CTIMEOUT flag clear bit" "0,1"
|
|
bitfld.long 0x0 1. "DCRCFAILC,DCRCFAIL flag clear bit" "0,1"
|
|
bitfld.long 0x0 0. "CCRCFAILC,CCRCFAIL flag clear bit" "0,1"
|
|
line.long 0x4 "MASK,mask register"
|
|
bitfld.long 0x4 23. "CEATAENDIE,CE-ATA command completion signal" "0,1"
|
|
bitfld.long 0x4 22. "SDIOITIE,SDIO mode interrupt received interrupt" "0,1"
|
|
bitfld.long 0x4 21. "RXDAVLIE,Data available in Rx FIFO interrupt" "0,1"
|
|
bitfld.long 0x4 20. "TXDAVLIE,Data available in Tx FIFO interrupt" "0,1"
|
|
bitfld.long 0x4 19. "RXFIFOEIE,Rx FIFO empty interrupt" "0,1"
|
|
bitfld.long 0x4 18. "TXFIFOEIE,Tx FIFO empty interrupt" "0,1"
|
|
bitfld.long 0x4 17. "RXFIFOFIE,Rx FIFO full interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "TXFIFOFIE,Tx FIFO full interrupt" "0,1"
|
|
bitfld.long 0x4 15. "RXFIFOHFIE,Rx FIFO half full interrupt" "0,1"
|
|
bitfld.long 0x4 14. "TXFIFOHEIE,Tx FIFO half empty interrupt" "0,1"
|
|
bitfld.long 0x4 13. "RXACTIE,Data receive acting interrupt" "0,1"
|
|
bitfld.long 0x4 12. "TXACTIE,Data transmit acting interrupt" "0,1"
|
|
bitfld.long 0x4 11. "CMDACTIE,Command acting interrupt" "0,1"
|
|
bitfld.long 0x4 10. "DBCKENDIE,Data block end interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "STBITERRIE,Start bit error interrupt" "0,1"
|
|
bitfld.long 0x4 8. "DATAENDIE,Data end interrupt enable" "0,1"
|
|
bitfld.long 0x4 7. "CMDSENTIE,Command sent interrupt" "0,1"
|
|
bitfld.long 0x4 6. "CMDRENDIE,Command response received interrupt" "0,1"
|
|
bitfld.long 0x4 5. "RXOVERRIE,Rx FIFO overrun error interrupt" "0,1"
|
|
bitfld.long 0x4 4. "TXUNDERRIE,Tx FIFO underrun error interrupt" "0,1"
|
|
bitfld.long 0x4 3. "DTIMEOUTIE,Data timeout interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "CTIMEOUTIE,Command timeout interrupt" "0,1"
|
|
bitfld.long 0x4 1. "DCRCFAILIE,Data CRC fail interrupt" "0,1"
|
|
bitfld.long 0x4 0. "CCRCFAILIE,Command CRC fail interrupt" "0,1"
|
|
rgroup.long 0x48++0x3
|
|
line.long 0x0 "FIFOCNT,FIFO counter register"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "FIFOCOUNT,Remaining number of words to be written"
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "FIFO,data FIFO register"
|
|
hexmask.long 0x0 0.--31. 1. "FIFOData,Receive and transmit FIFO"
|
|
tree.end
|
|
endif
|
|
sif (cpuis("STM32L4S9*"))
|
|
tree "SDMMC1"
|
|
base ad:0x50062400
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "POWER,power control register"
|
|
bitfld.long 0x0 0.--1. "PWRCTRL,PWRCTRL" "0,1,2,3"
|
|
line.long 0x4 "CLKCR,SDI clock control register"
|
|
bitfld.long 0x4 14. "HWFC_EN,HW Flow Control enable" "0,1"
|
|
bitfld.long 0x4 13. "NEGEDGE,SDIO_CK dephasing selection" "0,1"
|
|
bitfld.long 0x4 11.--12. "WIDBUS,Wide bus mode enable bit" "0,1,2,3"
|
|
bitfld.long 0x4 10. "BYPASS,Clock divider bypass enable" "0,1"
|
|
bitfld.long 0x4 9. "PWRSAV,Power saving configuration" "0,1"
|
|
bitfld.long 0x4 8. "CLKEN,Clock enable bit" "0,1"
|
|
hexmask.long.byte 0x4 0.--7. 1. "CLKDIV,Clock divide factor"
|
|
line.long 0x8 "ARG,argument register"
|
|
hexmask.long 0x8 0.--31. 1. "CMDARG,Command argument"
|
|
line.long 0xC "CMD,command register"
|
|
bitfld.long 0xC 14. "CE_ATACMD,CE-ATA command" "0,1"
|
|
bitfld.long 0xC 13. "nIEN,not Interrupt Enable" "0,1"
|
|
bitfld.long 0xC 12. "ENCMDcompl,Enable CMD completion" "0,1"
|
|
bitfld.long 0xC 11. "SDIOSuspend,SD I/O suspend command" "0,1"
|
|
bitfld.long 0xC 10. "CPSMEN,Command path state machine (CPSM) Enable" "0,1"
|
|
bitfld.long 0xC 9. "WAITPEND,CPSM Waits for ends of data transfer" "0,1"
|
|
bitfld.long 0xC 8. "WAITINT,CPSM waits for interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0xC 6.--7. "WAITRESP,Wait for response bits" "0,1,2,3"
|
|
hexmask.long.byte 0xC 0.--5. 1. "CMDINDEX,Command index"
|
|
rgroup.long 0x10++0x13
|
|
line.long 0x0 "RESPCMD,command response register"
|
|
hexmask.long.byte 0x0 0.--5. 1. "RESPCMD,Response command index"
|
|
line.long 0x4 "RESP1,response 1..4 register"
|
|
hexmask.long 0x4 0.--31. 1. "CARDSTATUS1,see Table 132"
|
|
line.long 0x8 "RESP2,response 1..4 register"
|
|
hexmask.long 0x8 0.--31. 1. "CARDSTATUS2,see Table 132"
|
|
line.long 0xC "RESP3,response 1..4 register"
|
|
hexmask.long 0xC 0.--31. 1. "CARDSTATUS3,see Table 132"
|
|
line.long 0x10 "RESP4,response 1..4 register"
|
|
hexmask.long 0x10 0.--31. 1. "CARDSTATUS4,see Table 132"
|
|
group.long 0x24++0xB
|
|
line.long 0x0 "DTIMER,data timer register"
|
|
hexmask.long 0x0 0.--31. 1. "DATATIME,Data timeout period"
|
|
line.long 0x4 "DLEN,data length register"
|
|
hexmask.long 0x4 0.--24. 1. "DATALENGTH,Data length value"
|
|
line.long 0x8 "DCTRL,data control register"
|
|
bitfld.long 0x8 11. "SDIOEN,SD I/O enable functions" "0,1"
|
|
bitfld.long 0x8 10. "RWMOD,Read wait mode" "0,1"
|
|
bitfld.long 0x8 9. "RWSTOP,Read wait stop" "0,1"
|
|
bitfld.long 0x8 8. "RWSTART,Read wait start" "0,1"
|
|
hexmask.long.byte 0x8 4.--7. 1. "DBLOCKSIZE,Data block size"
|
|
bitfld.long 0x8 3. "DMAEN,DMA enable bit" "0,1"
|
|
bitfld.long 0x8 2. "DTMODE,Data transfer mode selection 1: Stream" "?,1: Stream"
|
|
newline
|
|
bitfld.long 0x8 1. "DTDIR,Data transfer direction" "0,1"
|
|
bitfld.long 0x8 0. "DTEN,DTEN" "0,1"
|
|
rgroup.long 0x30++0x7
|
|
line.long 0x0 "DCOUNT,data counter register"
|
|
hexmask.long 0x0 0.--24. 1. "DATACOUNT,Data count value"
|
|
line.long 0x4 "STA,status register"
|
|
bitfld.long 0x4 23. "CEATAEND,CE-ATA command completion signal" "0,1"
|
|
bitfld.long 0x4 22. "SDIOIT,SDIO interrupt received" "0,1"
|
|
bitfld.long 0x4 21. "RXDAVL,Data available in receive" "0,1"
|
|
bitfld.long 0x4 20. "TXDAVL,Data available in transmit" "0,1"
|
|
bitfld.long 0x4 19. "RXFIFOE,Receive FIFO empty" "0,1"
|
|
bitfld.long 0x4 18. "TXFIFOE,Transmit FIFO empty" "0,1"
|
|
bitfld.long 0x4 17. "RXFIFOF,Receive FIFO full" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "TXFIFOF,Transmit FIFO full" "0,1"
|
|
bitfld.long 0x4 15. "RXFIFOHF,Receive FIFO half full: there are at" "0,1"
|
|
bitfld.long 0x4 14. "TXFIFOHE,Transmit FIFO half empty: at least 8" "0,1"
|
|
bitfld.long 0x4 13. "RXACT,Data receive in progress" "0,1"
|
|
bitfld.long 0x4 12. "TXACT,Data transmit in progress" "0,1"
|
|
bitfld.long 0x4 11. "CMDACT,Command transfer in" "0,1"
|
|
bitfld.long 0x4 10. "DBCKEND,Data block sent/received (CRC check" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "STBITERR,Start bit not detected on all data" "0,1"
|
|
bitfld.long 0x4 8. "DATAEND,Data end (data counter SDIDCOUNT is" "0,1"
|
|
bitfld.long 0x4 7. "CMDSENT,Command sent (no response" "0,1"
|
|
bitfld.long 0x4 6. "CMDREND,Command response received (CRC check" "0,1"
|
|
bitfld.long 0x4 5. "RXOVERR,Received FIFO overrun" "0,1"
|
|
bitfld.long 0x4 4. "TXUNDERR,Transmit FIFO underrun" "0,1"
|
|
bitfld.long 0x4 3. "DTIMEOUT,Data timeout" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "CTIMEOUT,Command response timeout" "0,1"
|
|
bitfld.long 0x4 1. "DCRCFAIL,Data block sent/received (CRC check" "0,1"
|
|
bitfld.long 0x4 0. "CCRCFAIL,Command response received (CRC check" "0,1"
|
|
group.long 0x38++0x7
|
|
line.long 0x0 "ICR,interrupt clear register"
|
|
bitfld.long 0x0 23. "CEATAENDC,CEATAEND flag clear bit" "0,1"
|
|
bitfld.long 0x0 22. "SDIOITC,SDIOIT flag clear bit" "0,1"
|
|
bitfld.long 0x0 10. "DBCKENDC,DBCKEND flag clear bit" "0,1"
|
|
bitfld.long 0x0 9. "STBITERRC,STBITERR flag clear bit" "0,1"
|
|
bitfld.long 0x0 8. "DATAENDC,DATAEND flag clear bit" "0,1"
|
|
bitfld.long 0x0 7. "CMDSENTC,CMDSENT flag clear bit" "0,1"
|
|
bitfld.long 0x0 6. "CMDRENDC,CMDREND flag clear bit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "RXOVERRC,RXOVERR flag clear bit" "0,1"
|
|
bitfld.long 0x0 4. "TXUNDERRC,TXUNDERR flag clear bit" "0,1"
|
|
bitfld.long 0x0 3. "DTIMEOUTC,DTIMEOUT flag clear bit" "0,1"
|
|
bitfld.long 0x0 2. "CTIMEOUTC,CTIMEOUT flag clear bit" "0,1"
|
|
bitfld.long 0x0 1. "DCRCFAILC,DCRCFAIL flag clear bit" "0,1"
|
|
bitfld.long 0x0 0. "CCRCFAILC,CCRCFAIL flag clear bit" "0,1"
|
|
line.long 0x4 "MASK,mask register"
|
|
bitfld.long 0x4 23. "CEATAENDIE,CE-ATA command completion signal" "0,1"
|
|
bitfld.long 0x4 22. "SDIOITIE,SDIO mode interrupt received interrupt" "0,1"
|
|
bitfld.long 0x4 21. "RXDAVLIE,Data available in Rx FIFO interrupt" "0,1"
|
|
bitfld.long 0x4 20. "TXDAVLIE,Data available in Tx FIFO interrupt" "0,1"
|
|
bitfld.long 0x4 19. "RXFIFOEIE,Rx FIFO empty interrupt" "0,1"
|
|
bitfld.long 0x4 18. "TXFIFOEIE,Tx FIFO empty interrupt" "0,1"
|
|
bitfld.long 0x4 17. "RXFIFOFIE,Rx FIFO full interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "TXFIFOFIE,Tx FIFO full interrupt" "0,1"
|
|
bitfld.long 0x4 15. "RXFIFOHFIE,Rx FIFO half full interrupt" "0,1"
|
|
bitfld.long 0x4 14. "TXFIFOHEIE,Tx FIFO half empty interrupt" "0,1"
|
|
bitfld.long 0x4 13. "RXACTIE,Data receive acting interrupt" "0,1"
|
|
bitfld.long 0x4 12. "TXACTIE,Data transmit acting interrupt" "0,1"
|
|
bitfld.long 0x4 11. "CMDACTIE,Command acting interrupt" "0,1"
|
|
bitfld.long 0x4 10. "DBCKENDIE,Data block end interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "STBITERRIE,Start bit error interrupt" "0,1"
|
|
bitfld.long 0x4 8. "DATAENDIE,Data end interrupt enable" "0,1"
|
|
bitfld.long 0x4 7. "CMDSENTIE,Command sent interrupt" "0,1"
|
|
bitfld.long 0x4 6. "CMDRENDIE,Command response received interrupt" "0,1"
|
|
bitfld.long 0x4 5. "RXOVERRIE,Rx FIFO overrun error interrupt" "0,1"
|
|
bitfld.long 0x4 4. "TXUNDERRIE,Tx FIFO underrun error interrupt" "0,1"
|
|
bitfld.long 0x4 3. "DTIMEOUTIE,Data timeout interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "CTIMEOUTIE,Command timeout interrupt" "0,1"
|
|
bitfld.long 0x4 1. "DCRCFAILIE,Data CRC fail interrupt" "0,1"
|
|
bitfld.long 0x4 0. "CCRCFAILIE,Command CRC fail interrupt" "0,1"
|
|
rgroup.long 0x48++0x3
|
|
line.long 0x0 "FIFOCNT,FIFO counter register"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "FIFOCOUNT,Remaining number of words to be written"
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "FIFO,data FIFO register"
|
|
hexmask.long 0x0 0.--31. 1. "FIFOData,Receive and transmit FIFO"
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
tree "SPI (Serial Peripheral Interface)"
|
|
base ad:0x0
|
|
tree "SPI1"
|
|
base ad:0x40013000
|
|
group.long 0x0++0x13
|
|
line.long 0x0 "CR1,control register 1"
|
|
bitfld.long 0x0 15. "BIDIMODE,Bidirectional data mode" "0,1"
|
|
bitfld.long 0x0 14. "BIDIOE,Output enable in bidirectional" "0,1"
|
|
bitfld.long 0x0 13. "CRCEN,Hardware CRC calculation" "0,1"
|
|
bitfld.long 0x0 12. "CRCNEXT,CRC transfer next" "0,1"
|
|
bitfld.long 0x0 11. "DFF,Data frame format" "0,1"
|
|
bitfld.long 0x0 10. "RXONLY,Receive only" "0,1"
|
|
bitfld.long 0x0 9. "SSM,Software slave management" "0,1"
|
|
bitfld.long 0x0 8. "SSI,Internal slave select" "0,1"
|
|
bitfld.long 0x0 7. "LSBFIRST,Frame format" "0,1"
|
|
bitfld.long 0x0 6. "SPE,SPI enable" "0,1"
|
|
bitfld.long 0x0 3.--5. "BR,Baud rate control" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 2. "MSTR,Master selection" "0,1"
|
|
bitfld.long 0x0 1. "CPOL,Clock polarity" "0,1"
|
|
bitfld.long 0x0 0. "CPHA,Clock phase" "0,1"
|
|
line.long 0x4 "CR2,control register 2"
|
|
bitfld.long 0x4 14. "LDMA_TX,Last DMA transfer for" "0,1"
|
|
bitfld.long 0x4 13. "LDMA_RX,Last DMA transfer for" "0,1"
|
|
bitfld.long 0x4 12. "FRXTH,FIFO reception threshold" "0,1"
|
|
hexmask.long.byte 0x4 8.--11. 1. "DS,Data size"
|
|
bitfld.long 0x4 7. "TXEIE,Tx buffer empty interrupt" "0,1"
|
|
bitfld.long 0x4 6. "RXNEIE,RX buffer not empty interrupt" "0,1"
|
|
bitfld.long 0x4 5. "ERRIE,Error interrupt enable" "0,1"
|
|
bitfld.long 0x4 4. "FRF,Frame format" "0,1"
|
|
bitfld.long 0x4 3. "NSSP,NSS pulse management" "0,1"
|
|
bitfld.long 0x4 2. "SSOE,SS output enable" "0,1"
|
|
bitfld.long 0x4 1. "TXDMAEN,Tx buffer DMA enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "RXDMAEN,Rx buffer DMA enable" "0,1"
|
|
line.long 0x8 "SR,status register"
|
|
rbitfld.long 0x8 11.--12. "FTLVL,FIFO transmission level" "0,1,2,3"
|
|
rbitfld.long 0x8 9.--10. "FRLVL,FIFO reception level" "0,1,2,3"
|
|
rbitfld.long 0x8 8. "TIFRFE,TI frame format error" "0,1"
|
|
rbitfld.long 0x8 7. "BSY,Busy flag" "0,1"
|
|
rbitfld.long 0x8 6. "OVR,Overrun flag" "0,1"
|
|
rbitfld.long 0x8 5. "MODF,Mode fault" "0,1"
|
|
bitfld.long 0x8 4. "CRCERR,CRC error flag" "0,1"
|
|
rbitfld.long 0x8 1. "TXE,Transmit buffer empty" "0,1"
|
|
rbitfld.long 0x8 0. "RXNE,Receive buffer not empty" "0,1"
|
|
line.long 0xC "DR,data register"
|
|
hexmask.long.word 0xC 0.--15. 1. "DR,Data register"
|
|
line.long 0x10 "CRCPR,CRC polynomial register"
|
|
hexmask.long.word 0x10 0.--15. 1. "CRCPOLY,CRC polynomial register"
|
|
rgroup.long 0x14++0x7
|
|
line.long 0x0 "RXCRCR,RX CRC register"
|
|
hexmask.long.word 0x0 0.--15. 1. "RxCRC,Rx CRC register"
|
|
line.long 0x4 "TXCRCR,TX CRC register"
|
|
hexmask.long.word 0x4 0.--15. 1. "TxCRC,Tx CRC register"
|
|
tree.end
|
|
tree "SPI2"
|
|
base ad:0x40003800
|
|
group.long 0x0++0x13
|
|
line.long 0x0 "CR1,control register 1"
|
|
bitfld.long 0x0 15. "BIDIMODE,Bidirectional data mode" "0,1"
|
|
bitfld.long 0x0 14. "BIDIOE,Output enable in bidirectional" "0,1"
|
|
bitfld.long 0x0 13. "CRCEN,Hardware CRC calculation" "0,1"
|
|
bitfld.long 0x0 12. "CRCNEXT,CRC transfer next" "0,1"
|
|
bitfld.long 0x0 11. "DFF,Data frame format" "0,1"
|
|
bitfld.long 0x0 10. "RXONLY,Receive only" "0,1"
|
|
bitfld.long 0x0 9. "SSM,Software slave management" "0,1"
|
|
bitfld.long 0x0 8. "SSI,Internal slave select" "0,1"
|
|
bitfld.long 0x0 7. "LSBFIRST,Frame format" "0,1"
|
|
bitfld.long 0x0 6. "SPE,SPI enable" "0,1"
|
|
bitfld.long 0x0 3.--5. "BR,Baud rate control" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 2. "MSTR,Master selection" "0,1"
|
|
bitfld.long 0x0 1. "CPOL,Clock polarity" "0,1"
|
|
bitfld.long 0x0 0. "CPHA,Clock phase" "0,1"
|
|
line.long 0x4 "CR2,control register 2"
|
|
bitfld.long 0x4 14. "LDMA_TX,Last DMA transfer for" "0,1"
|
|
bitfld.long 0x4 13. "LDMA_RX,Last DMA transfer for" "0,1"
|
|
bitfld.long 0x4 12. "FRXTH,FIFO reception threshold" "0,1"
|
|
hexmask.long.byte 0x4 8.--11. 1. "DS,Data size"
|
|
bitfld.long 0x4 7. "TXEIE,Tx buffer empty interrupt" "0,1"
|
|
bitfld.long 0x4 6. "RXNEIE,RX buffer not empty interrupt" "0,1"
|
|
bitfld.long 0x4 5. "ERRIE,Error interrupt enable" "0,1"
|
|
bitfld.long 0x4 4. "FRF,Frame format" "0,1"
|
|
bitfld.long 0x4 3. "NSSP,NSS pulse management" "0,1"
|
|
bitfld.long 0x4 2. "SSOE,SS output enable" "0,1"
|
|
bitfld.long 0x4 1. "TXDMAEN,Tx buffer DMA enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "RXDMAEN,Rx buffer DMA enable" "0,1"
|
|
line.long 0x8 "SR,status register"
|
|
rbitfld.long 0x8 11.--12. "FTLVL,FIFO transmission level" "0,1,2,3"
|
|
rbitfld.long 0x8 9.--10. "FRLVL,FIFO reception level" "0,1,2,3"
|
|
rbitfld.long 0x8 8. "TIFRFE,TI frame format error" "0,1"
|
|
rbitfld.long 0x8 7. "BSY,Busy flag" "0,1"
|
|
rbitfld.long 0x8 6. "OVR,Overrun flag" "0,1"
|
|
rbitfld.long 0x8 5. "MODF,Mode fault" "0,1"
|
|
bitfld.long 0x8 4. "CRCERR,CRC error flag" "0,1"
|
|
rbitfld.long 0x8 1. "TXE,Transmit buffer empty" "0,1"
|
|
rbitfld.long 0x8 0. "RXNE,Receive buffer not empty" "0,1"
|
|
line.long 0xC "DR,data register"
|
|
hexmask.long.word 0xC 0.--15. 1. "DR,Data register"
|
|
line.long 0x10 "CRCPR,CRC polynomial register"
|
|
hexmask.long.word 0x10 0.--15. 1. "CRCPOLY,CRC polynomial register"
|
|
rgroup.long 0x14++0x7
|
|
line.long 0x0 "RXCRCR,RX CRC register"
|
|
hexmask.long.word 0x0 0.--15. 1. "RxCRC,Rx CRC register"
|
|
line.long 0x4 "TXCRCR,TX CRC register"
|
|
hexmask.long.word 0x4 0.--15. 1. "TxCRC,Tx CRC register"
|
|
tree.end
|
|
tree "SPI3"
|
|
base ad:0x40003C00
|
|
group.long 0x0++0x13
|
|
line.long 0x0 "CR1,control register 1"
|
|
bitfld.long 0x0 15. "BIDIMODE,Bidirectional data mode" "0,1"
|
|
bitfld.long 0x0 14. "BIDIOE,Output enable in bidirectional" "0,1"
|
|
bitfld.long 0x0 13. "CRCEN,Hardware CRC calculation" "0,1"
|
|
bitfld.long 0x0 12. "CRCNEXT,CRC transfer next" "0,1"
|
|
bitfld.long 0x0 11. "DFF,Data frame format" "0,1"
|
|
bitfld.long 0x0 10. "RXONLY,Receive only" "0,1"
|
|
bitfld.long 0x0 9. "SSM,Software slave management" "0,1"
|
|
bitfld.long 0x0 8. "SSI,Internal slave select" "0,1"
|
|
bitfld.long 0x0 7. "LSBFIRST,Frame format" "0,1"
|
|
bitfld.long 0x0 6. "SPE,SPI enable" "0,1"
|
|
bitfld.long 0x0 3.--5. "BR,Baud rate control" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 2. "MSTR,Master selection" "0,1"
|
|
bitfld.long 0x0 1. "CPOL,Clock polarity" "0,1"
|
|
bitfld.long 0x0 0. "CPHA,Clock phase" "0,1"
|
|
line.long 0x4 "CR2,control register 2"
|
|
bitfld.long 0x4 14. "LDMA_TX,Last DMA transfer for" "0,1"
|
|
bitfld.long 0x4 13. "LDMA_RX,Last DMA transfer for" "0,1"
|
|
bitfld.long 0x4 12. "FRXTH,FIFO reception threshold" "0,1"
|
|
hexmask.long.byte 0x4 8.--11. 1. "DS,Data size"
|
|
bitfld.long 0x4 7. "TXEIE,Tx buffer empty interrupt" "0,1"
|
|
bitfld.long 0x4 6. "RXNEIE,RX buffer not empty interrupt" "0,1"
|
|
bitfld.long 0x4 5. "ERRIE,Error interrupt enable" "0,1"
|
|
bitfld.long 0x4 4. "FRF,Frame format" "0,1"
|
|
bitfld.long 0x4 3. "NSSP,NSS pulse management" "0,1"
|
|
bitfld.long 0x4 2. "SSOE,SS output enable" "0,1"
|
|
bitfld.long 0x4 1. "TXDMAEN,Tx buffer DMA enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "RXDMAEN,Rx buffer DMA enable" "0,1"
|
|
line.long 0x8 "SR,status register"
|
|
rbitfld.long 0x8 11.--12. "FTLVL,FIFO transmission level" "0,1,2,3"
|
|
rbitfld.long 0x8 9.--10. "FRLVL,FIFO reception level" "0,1,2,3"
|
|
rbitfld.long 0x8 8. "TIFRFE,TI frame format error" "0,1"
|
|
rbitfld.long 0x8 7. "BSY,Busy flag" "0,1"
|
|
rbitfld.long 0x8 6. "OVR,Overrun flag" "0,1"
|
|
rbitfld.long 0x8 5. "MODF,Mode fault" "0,1"
|
|
bitfld.long 0x8 4. "CRCERR,CRC error flag" "0,1"
|
|
rbitfld.long 0x8 1. "TXE,Transmit buffer empty" "0,1"
|
|
rbitfld.long 0x8 0. "RXNE,Receive buffer not empty" "0,1"
|
|
line.long 0xC "DR,data register"
|
|
hexmask.long.word 0xC 0.--15. 1. "DR,Data register"
|
|
line.long 0x10 "CRCPR,CRC polynomial register"
|
|
hexmask.long.word 0x10 0.--15. 1. "CRCPOLY,CRC polynomial register"
|
|
rgroup.long 0x14++0x7
|
|
line.long 0x0 "RXCRCR,RX CRC register"
|
|
hexmask.long.word 0x0 0.--15. 1. "RxCRC,Rx CRC register"
|
|
line.long 0x4 "TXCRCR,TX CRC register"
|
|
hexmask.long.word 0x4 0.--15. 1. "TxCRC,Tx CRC register"
|
|
tree.end
|
|
tree.end
|
|
tree "SWPMI (Single Wire Protocol Master Interface)"
|
|
base ad:0x40008800
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "CR,SWPMI Configuration/Control"
|
|
bitfld.long 0x0 10. "DEACT,Single wire protocol master interface" "0,1"
|
|
bitfld.long 0x0 5. "SWPME,Single wire protocol master interface" "0,1"
|
|
bitfld.long 0x0 4. "LPBK,Loopback mode enable" "0,1"
|
|
bitfld.long 0x0 3. "TXMODE,Transmission buffering" "0,1"
|
|
bitfld.long 0x0 2. "RXMODE,Reception buffering mode" "0,1"
|
|
bitfld.long 0x0 1. "TXDMA,Transmission DMA enable" "0,1"
|
|
bitfld.long 0x0 0. "RXDMA,Reception DMA enable" "0,1"
|
|
line.long 0x4 "BRR,SWPMI Bitrate register"
|
|
hexmask.long.byte 0x4 0.--5. 1. "BR,Bitrate prescaler"
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x0 "ISR,SWPMI Interrupt and Status"
|
|
bitfld.long 0x0 10. "DEACTF,DEACTIVATED flag" "0,1"
|
|
bitfld.long 0x0 9. "SUSP,SUSPEND flag" "0,1"
|
|
bitfld.long 0x0 8. "SRF,Slave resume flag" "0,1"
|
|
bitfld.long 0x0 7. "TCF,Transfer complete flag" "0,1"
|
|
bitfld.long 0x0 6. "TXE,Transmit data register" "0,1"
|
|
bitfld.long 0x0 5. "RXNE,Receive data register not" "0,1"
|
|
bitfld.long 0x0 4. "TXUNRF,Transmit underrun error" "0,1"
|
|
bitfld.long 0x0 3. "RXOVRF,Receive overrun error flag" "0,1"
|
|
bitfld.long 0x0 2. "RXBERF,Receive CRC error flag" "0,1"
|
|
bitfld.long 0x0 1. "TXBEF,Transmit buffer empty flag" "0,1"
|
|
bitfld.long 0x0 0. "RXBFF,Receive buffer full flag" "0,1"
|
|
wgroup.long 0x10++0x3
|
|
line.long 0x0 "ICR,SWPMI Interrupt Flag Clear"
|
|
bitfld.long 0x0 8. "CSRF,Clear slave resume flag" "0,1"
|
|
bitfld.long 0x0 7. "CTCF,Clear transfer complete" "0,1"
|
|
bitfld.long 0x0 4. "CTXUNRF,Clear transmit underrun error" "0,1"
|
|
bitfld.long 0x0 3. "CRXOVRF,Clear receive overrun error" "0,1"
|
|
bitfld.long 0x0 2. "CRXBERF,Clear receive CRC error" "0,1"
|
|
bitfld.long 0x0 1. "CTXBEF,Clear transmit buffer empty" "0,1"
|
|
bitfld.long 0x0 0. "CRXBFF,Clear receive buffer full" "0,1"
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "IER,SWPMI Interrupt Enable"
|
|
bitfld.long 0x0 8. "SRIE,Slave resume interrupt" "0,1"
|
|
bitfld.long 0x0 7. "TCIE,Transmit complete interrupt" "0,1"
|
|
bitfld.long 0x0 6. "TIE,Transmit interrupt enable" "0,1"
|
|
bitfld.long 0x0 5. "RIE,Receive interrupt enable" "0,1"
|
|
bitfld.long 0x0 4. "TXUNRIE,Transmit underrun error interrupt" "0,1"
|
|
bitfld.long 0x0 3. "RXOVRIE,Receive overrun error interrupt" "0,1"
|
|
bitfld.long 0x0 2. "RXBERIE,Receive CRC error interrupt" "0,1"
|
|
bitfld.long 0x0 1. "TXBEIE,Transmit buffer empty interrupt" "0,1"
|
|
bitfld.long 0x0 0. "RXBFIE,Receive buffer full interrupt" "0,1"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x0 "RFL,SWPMI Receive Frame Length"
|
|
hexmask.long.byte 0x0 0.--4. 1. "RFL,Receive frame length"
|
|
wgroup.long 0x1C++0x3
|
|
line.long 0x0 "TDR,SWPMI Transmit data register"
|
|
hexmask.long 0x0 0.--31. 1. "TD,Transmit data"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x0 "RDR,SWPMI Receive data register"
|
|
hexmask.long 0x0 0.--31. 1. "RD,received data"
|
|
tree.end
|
|
tree "SYSCFG (System Configuration Controller)"
|
|
base ad:0x40010000
|
|
group.long 0x0++0x1F
|
|
line.long 0x0 "MEMRMP,memory remap register"
|
|
bitfld.long 0x0 8. "FB_MODE,Flash Bank mode selection" "0,1"
|
|
bitfld.long 0x0 3. "QFS,QUADSPI memory mapping" "0,1"
|
|
bitfld.long 0x0 0.--2. "MEM_MODE,Memory mapping selection" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "CFGR1,configuration register 1"
|
|
hexmask.long.byte 0x4 26.--31. 1. "FPU_IE,Floating Point Unit interrupts enable"
|
|
bitfld.long 0x4 22. "I2C3_FMP,I2C3 Fast-mode Plus driving capability" "0,1"
|
|
bitfld.long 0x4 21. "I2C2_FMP,I2C2 Fast-mode Plus driving capability" "0,1"
|
|
bitfld.long 0x4 20. "I2C1_FMP,I2C1 Fast-mode Plus driving capability" "0,1"
|
|
bitfld.long 0x4 19. "I2C_PB9_FMP,Fast-mode Plus (Fm+) driving capability" "0,1"
|
|
bitfld.long 0x4 18. "I2C_PB8_FMP,Fast-mode Plus (Fm+) driving capability" "0,1"
|
|
bitfld.long 0x4 17. "I2C_PB7_FMP,Fast-mode Plus (Fm+) driving capability" "0,1"
|
|
bitfld.long 0x4 16. "I2C_PB6_FMP,Fast-mode Plus (Fm+) driving capability" "0,1"
|
|
bitfld.long 0x4 8. "BOOSTEN,I/O analog switch voltage booster" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "FWDIS,Firewall disable" "0,1"
|
|
line.long 0x8 "EXTICR1,external interrupt configuration register"
|
|
bitfld.long 0x8 12.--14. "EXTI3,EXTI 3 configuration bits" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 8.--10. "EXTI2,EXTI 2 configuration bits" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 4.--6. "EXTI1,EXTI 1 configuration bits" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 0.--2. "EXTI0,EXTI 0 configuration bits" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "EXTICR2,external interrupt configuration register"
|
|
bitfld.long 0xC 12.--14. "EXTI7,EXTI 7 configuration bits" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 8.--10. "EXTI6,EXTI 6 configuration bits" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 4.--6. "EXTI5,EXTI 5 configuration bits" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 0.--2. "EXTI4,EXTI 4 configuration bits" "0,1,2,3,4,5,6,7"
|
|
line.long 0x10 "EXTICR3,external interrupt configuration register"
|
|
bitfld.long 0x10 12.--14. "EXTI11,EXTI 11 configuration bits" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 8.--10. "EXTI10,EXTI 10 configuration bits" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 4.--6. "EXTI9,EXTI 9 configuration bits" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 0.--2. "EXTI8,EXTI 8 configuration bits" "0,1,2,3,4,5,6,7"
|
|
line.long 0x14 "EXTICR4,external interrupt configuration register"
|
|
bitfld.long 0x14 12.--14. "EXTI15,EXTI15 configuration bits" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 8.--10. "EXTI14,EXTI14 configuration bits" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 4.--6. "EXTI13,EXTI13 configuration bits" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 0.--2. "EXTI12,EXTI12 configuration bits" "0,1,2,3,4,5,6,7"
|
|
line.long 0x18 "SCSR,SCSR"
|
|
rbitfld.long 0x18 1. "SRAM2BSY,SRAM2 busy by erase" "0,1"
|
|
bitfld.long 0x18 0. "SRAM2ER,SRAM2 Erase" "0,1"
|
|
line.long 0x1C "CFGR2,CFGR2"
|
|
bitfld.long 0x1C 8. "SPF,SRAM2 parity error flag" "0,1"
|
|
bitfld.long 0x1C 3. "ECCL,ECC Lock" "0,1"
|
|
bitfld.long 0x1C 2. "PVDL,PVD lock enable bit" "0,1"
|
|
bitfld.long 0x1C 1. "SPL,SRAM2 parity lock bit" "0,1"
|
|
bitfld.long 0x1C 0. "CLL,Cortex-M4 LOCKUP (Hardfault) output" "0,1"
|
|
wgroup.long 0x20++0x7
|
|
line.long 0x0 "SWPR,SWPR"
|
|
bitfld.long 0x0 31. "P31WP,SRAM2 page 31 write" "0,1"
|
|
bitfld.long 0x0 30. "P30WP,P30WP" "0,1"
|
|
bitfld.long 0x0 29. "P29WP,P29WP" "0,1"
|
|
bitfld.long 0x0 28. "P28WP,P28WP" "0,1"
|
|
bitfld.long 0x0 27. "P27WP,P27WP" "0,1"
|
|
bitfld.long 0x0 26. "P26WP,P26WP" "0,1"
|
|
bitfld.long 0x0 25. "P25WP,P25WP" "0,1"
|
|
bitfld.long 0x0 24. "P24WP,P24WP" "0,1"
|
|
bitfld.long 0x0 23. "P23WP,P23WP" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "P22WP,P22WP" "0,1"
|
|
bitfld.long 0x0 21. "P21WP,P21WP" "0,1"
|
|
bitfld.long 0x0 20. "P20WP,P20WP" "0,1"
|
|
bitfld.long 0x0 19. "P19WP,P19WP" "0,1"
|
|
bitfld.long 0x0 18. "P18WP,P18WP" "0,1"
|
|
bitfld.long 0x0 17. "P17WP,P17WP" "0,1"
|
|
bitfld.long 0x0 16. "P16WP,P16WP" "0,1"
|
|
bitfld.long 0x0 15. "P15WP,P15WP" "0,1"
|
|
bitfld.long 0x0 14. "P14WP,P14WP" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "P13WP,P13WP" "0,1"
|
|
bitfld.long 0x0 12. "P12WP,P12WP" "0,1"
|
|
bitfld.long 0x0 11. "P11WP,P11WP" "0,1"
|
|
bitfld.long 0x0 10. "P10WP,P10WP" "0,1"
|
|
bitfld.long 0x0 9. "P9WP,P9WP" "0,1"
|
|
bitfld.long 0x0 8. "P8WP,P8WP" "0,1"
|
|
bitfld.long 0x0 7. "P7WP,P7WP" "0,1"
|
|
bitfld.long 0x0 6. "P6WP,P6WP" "0,1"
|
|
bitfld.long 0x0 5. "P5WP,P5WP" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "P4WP,P4WP" "0,1"
|
|
bitfld.long 0x0 3. "P3WP,P3WP" "0,1"
|
|
bitfld.long 0x0 2. "P2WP,P2WP" "0,1"
|
|
bitfld.long 0x0 1. "P1WP,P1WP" "0,1"
|
|
bitfld.long 0x0 0. "P0WP,P0WP" "0,1"
|
|
line.long 0x4 "SKR,SKR"
|
|
hexmask.long.byte 0x4 0.--7. 1. "KEY,SRAM2 write protection key for software"
|
|
tree.end
|
|
tree "SYSTICK (SysTick Timer)"
|
|
base ad:0xE000E010
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "CTRL,SysTick control and status"
|
|
bitfld.long 0x0 16. "COUNTFLAG,COUNTFLAG" "0,1"
|
|
bitfld.long 0x0 2. "CLKSOURCE,Clock source selection" "0,1"
|
|
bitfld.long 0x0 1. "TICKINT,SysTick exception request" "0,1"
|
|
bitfld.long 0x0 0. "ENABLE,Counter enable" "0,1"
|
|
line.long 0x4 "LOAD,SysTick reload value register"
|
|
hexmask.long.tbyte 0x4 0.--23. 1. "RELOAD,RELOAD value"
|
|
line.long 0x8 "VAL,SysTick current value register"
|
|
hexmask.long.tbyte 0x8 0.--23. 1. "CURRENT,Current counter value"
|
|
line.long 0xC "CALIB,SysTick calibration value"
|
|
bitfld.long 0xC 31. "NOREF,NOREF flag. Reads as zero" "0,1"
|
|
bitfld.long 0xC 30. "SKEW,SKEW flag: Indicates whether the TENMS" "0,1"
|
|
hexmask.long.tbyte 0xC 0.--23. 1. "TENMS,Calibration value"
|
|
tree.end
|
|
tree "TIM (Timers)"
|
|
base ad:0x0
|
|
tree "TIM1 (Advanced Control Timer)"
|
|
base ad:0x40012C00
|
|
group.word 0x0++0x1
|
|
line.word 0x0 "TIM1_CR1,TIM1 control register 1"
|
|
bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "0: No remapping. UIF status bit is not copied to..,1: Remapping enabled. UIF status bit is copied to.."
|
|
bitfld.word 0x0 8.--9. "CKD,Clock division" "0: t<sub>DTS</sub>=t<sub>CK_INT</sub>,1: t<sub>DTS</sub>=2*t<sub>CK_INT</sub>,2: t<sub>DTS</sub>=4*t<sub>CK_INT</sub>,3: Reserved do not program this value"
|
|
newline
|
|
bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "0: TIMx_ARR register is not buffered,1: TIMx_ARR register is buffered"
|
|
bitfld.word 0x0 5.--6. "CMS,Center-aligned mode selection" "0: Edge-aligned mode. The counter counts up or down..,1: Center-aligned mode 1. The counter counts up and..,2: Center-aligned mode 2. The counter counts up and..,3: Center-aligned mode 3. The counter counts up and.."
|
|
newline
|
|
bitfld.word 0x0 4. "DIR,Direction" "0: Counter used as upcounter,1: Counter used as downcounter"
|
|
bitfld.word 0x0 3. "OPM,One pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event.."
|
|
newline
|
|
bitfld.word 0x0 2. "URS,Update request source" "0: Any of the following events generate an update..,1: Only counter overflow/underflow generates an.."
|
|
bitfld.word 0x0 1. "UDIS,Update disable" "0: UEV enabled. The Update (UEV) event is generated..,1: UEV disabled. The Update event is not generated.."
|
|
newline
|
|
bitfld.word 0x0 0. "CEN,Counter enable" "0: Counter disabled,1: Counter enabled"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "TIM1_CR2,TIM1 control register 2"
|
|
hexmask.long.byte 0x0 20.--23. 1. "MMS2,Master mode selection 2"
|
|
bitfld.long 0x0 18. "OIS6,Output Idle state 6 (OC6 output)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "OIS5,Output Idle state 5 (OC5 output)" "0,1"
|
|
bitfld.long 0x0 14. "OIS4,Output Idle state 4 (OC4 output)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "OIS3N,Output Idle state 3 (OC3N output)" "0,1"
|
|
bitfld.long 0x0 12. "OIS3,Output Idle state 3 (OC3 output)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "OIS2N,Output Idle state 2 (OC2N output)" "0,1"
|
|
bitfld.long 0x0 10. "OIS2,Output Idle state 2 (OC2 output)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "OIS1N,Output Idle state 1 (OC1N output)" "0: OC1N=0 after a dead-time when MOE=0,1: OC1N=1 after a dead-time when MOE=0"
|
|
bitfld.long 0x0 8. "OIS1,Output Idle state 1 (OC1 output)" "0: OC1=0 (after a dead-time if OC1N is implemented)..,1: OC1=1 (after a dead-time if OC1N is implemented).."
|
|
newline
|
|
bitfld.long 0x0 7. "TI1S,TI1 selection" "0: The TIMx_CH1 pin is connected to TI1 input,1: The TIMx_CH1 CH2 and CH3 pins are connected to.."
|
|
bitfld.long 0x0 4.--6. "MMS,Master mode selection" "0: Reset - the UG bit from the TIMx_EGR register is..,1: Enable - the Counter Enable signal CNT_EN is..,2: Update - The update event is selected as trigger..,3: Compare Pulse - The trigger output send a..,4: Compare - OC1REFC signal is used as trigger..,5: Compare - OC2REFC signal is used as trigger..,6: Compare - OC3REFC signal is used as trigger..,7: Compare - OC4REFC signal is used as trigger.."
|
|
newline
|
|
bitfld.long 0x0 3. "CCDS,Capture/compare DMA selection" "0: CCx DMA request sent when CCx event occurs,1: CCx DMA requests sent when update event occurs"
|
|
bitfld.long 0x0 2. "CCUS,Capture/compare control update selection" "0: When capture/compare control bits are preloaded..,1: When capture/compare control bits are preloaded.."
|
|
newline
|
|
bitfld.long 0x0 0. "CCPC,Capture/compare preloaded control" "0: CCxE CCxNE and OCxM bits are not preloaded,1: CCxE CCxNE and OCxM bits are preloaded after.."
|
|
line.long 0x4 "TIM1_SMCR,TIM1 slave mode control register"
|
|
bitfld.long 0x4 20.--21. "TS_1,TS[4:3]" "0,1,2,3"
|
|
bitfld.long 0x4 16. "SMS_1,SMS[3]" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "ETP,External trigger polarity" "0: ETR is non-inverted active at high level or..,1: ETR is inverted active at low level or falling.."
|
|
bitfld.long 0x4 14. "ECE,External clock enable" "0: External clock mode 2 disabled,1: External clock mode 2 enabled. The counter is.."
|
|
newline
|
|
bitfld.long 0x4 12.--13. "ETPS,External trigger prescaler" "0: Prescaler OFF,1: ETRP frequency divided by 2,2: ETRP frequency divided by 4,3: ETRP frequency divided by 8"
|
|
hexmask.long.byte 0x4 8.--11. 1. "ETF,External trigger filter"
|
|
newline
|
|
bitfld.long 0x4 7. "MSM,Master/slave mode" "0: No action,1: The effect of an event on the trigger input.."
|
|
bitfld.long 0x4 4.--6. "TS,TS[0]: Trigger selection" "0: Internal Trigger 0 (ITR0),1: Internal Trigger 1 (ITR1),2: Internal Trigger 2 (ITR2),3: Internal Trigger 3 (ITR3),4: TI1 Edge Detector (TI1F_ED),5: Filtered Timer Input 1 (TI1FP1),6: Filtered Timer Input 2 (TI2FP2),7: External Trigger input (ETRF)"
|
|
newline
|
|
bitfld.long 0x4 0.--2. "SMS,SMS[0]: Slave mode selection" "0: Slave mode disabled - if CEN = 1 then the..,1: Encoder mode 1 - Counter counts up/down on..,2: Encoder mode 2 - Counter counts up/down on..,3: Encoder mode 3 - Counter counts up/down on both..,4: Reset Mode - Rising edge of the selected trigger..,5: Gated Mode - The counter clock is enabled when..,6: Trigger Mode - The counter starts at a rising..,7: External Clock Mode 1 - Rising edges of the.."
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "TIM1_DIER,TIM1 DMA/interrupt enable register"
|
|
bitfld.word 0x0 14. "TDE,Trigger DMA request enable" "0: Trigger DMA request disabled,1: Trigger DMA request enabled"
|
|
bitfld.word 0x0 13. "COMDE,COM DMA request enable" "0: COM DMA request disabled,1: COM DMA request enabled"
|
|
newline
|
|
bitfld.word 0x0 12. "CC4DE,Capture/Compare 4 DMA request enable" "0: CC4 DMA request disabled,1: CC4 DMA request enabled"
|
|
bitfld.word 0x0 11. "CC3DE,Capture/Compare 3 DMA request enable" "0: CC3 DMA request disabled,1: CC3 DMA request enabled"
|
|
newline
|
|
bitfld.word 0x0 10. "CC2DE,Capture/Compare 2 DMA request enable" "0: CC2 DMA request disabled,1: CC2 DMA request enabled"
|
|
bitfld.word 0x0 9. "CC1DE,Capture/Compare 1 DMA request enable" "0: CC1 DMA request disabled,1: CC1 DMA request enabled"
|
|
newline
|
|
bitfld.word 0x0 8. "UDE,Update DMA request enable" "0: Update DMA request disabled,1: Update DMA request enabled"
|
|
bitfld.word 0x0 7. "BIE,Break interrupt enable" "0: Break interrupt disabled,1: Break interrupt enabled"
|
|
newline
|
|
bitfld.word 0x0 6. "TIE,Trigger interrupt enable" "0: Trigger interrupt disabled,1: Trigger interrupt enabled"
|
|
bitfld.word 0x0 5. "COMIE,COM interrupt enable" "0: COM interrupt disabled,1: COM interrupt enabled"
|
|
newline
|
|
bitfld.word 0x0 4. "CC4IE,Capture/Compare 4 interrupt enable" "0: CC4 interrupt disabled,1: CC4 interrupt enabled"
|
|
bitfld.word 0x0 3. "CC3IE,Capture/Compare 3 interrupt enable" "0: CC3 interrupt disabled,1: CC3 interrupt enabled"
|
|
newline
|
|
bitfld.word 0x0 2. "CC2IE,Capture/Compare 2 interrupt enable" "0: CC2 interrupt disabled,1: CC2 interrupt enabled"
|
|
bitfld.word 0x0 1. "CC1IE,Capture/Compare 1 interrupt enable" "0: CC1 interrupt disabled,1: CC1 interrupt enabled"
|
|
newline
|
|
bitfld.word 0x0 0. "UIE,Update interrupt enable" "0: Update interrupt disabled,1: Update interrupt enabled"
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "TIM1_SR,TIM1 status register"
|
|
bitfld.long 0x0 17. "CC6IF,Compare 6 interrupt flag" "0,1"
|
|
bitfld.long 0x0 16. "CC5IF,Compare 5 interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "SBIF,System Break interrupt flag" "0: No break event occurred.,1: An active level has been detected on the system.."
|
|
bitfld.long 0x0 12. "CC4OF,Capture/Compare 4 overcapture flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "CC3OF,Capture/Compare 3 overcapture flag" "0,1"
|
|
bitfld.long 0x0 10. "CC2OF,Capture/Compare 2 overcapture flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "CC1OF,Capture/Compare 1 overcapture flag" "0: No overcapture has been detected.,1: The counter value has been captured in TIMx_CCR1.."
|
|
bitfld.long 0x0 8. "B2IF,Break 2 interrupt flag" "0: No break event occurred.,1: An active level has been detected on the break 2.."
|
|
newline
|
|
bitfld.long 0x0 7. "BIF,Break interrupt flag" "0: No break event occurred.,1: An active level has been detected on the break.."
|
|
bitfld.long 0x0 6. "TIF,Trigger interrupt flag" "0: No trigger event occurred.,1: Trigger interrupt pending."
|
|
newline
|
|
bitfld.long 0x0 5. "COMIF,COM interrupt flag" "0: No COM event occurred.,1: COM interrupt pending."
|
|
bitfld.long 0x0 4. "CC4IF,Capture/Compare 4 interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CC3IF,Capture/Compare 3 interrupt flag" "0,1"
|
|
bitfld.long 0x0 2. "CC2IF,Capture/Compare 2 interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CC1IF,Capture/Compare 1 interrupt flag" "0: No compare match / No input capture occurred,1: A compare match or an input capture occurred."
|
|
bitfld.long 0x0 0. "UIF,Update interrupt flag" "0: No update occurred.,1: Update interrupt pending. This bit is set by.."
|
|
wgroup.word 0x14++0x1
|
|
line.word 0x0 "TIM1_EGR,TIM1 event generation register"
|
|
bitfld.word 0x0 8. "B2G,Break 2 generation" "0: No action,1: A break 2 event is generated. MOE bit is cleared.."
|
|
bitfld.word 0x0 7. "BG,Break generation" "0: No action,1: A break event is generated. MOE bit is cleared.."
|
|
newline
|
|
bitfld.word 0x0 6. "TG,Trigger generation" "0: No action,1: The TIF flag is set in TIMx_SR register. Related.."
|
|
bitfld.word 0x0 5. "COMG,Capture/Compare control update generation" "0: No action,1: When CCPC bit is set it allows CCxE CCxNE and.."
|
|
newline
|
|
bitfld.word 0x0 4. "CC4G,Capture/Compare 4 generation" "0,1"
|
|
bitfld.word 0x0 3. "CC3G,Capture/Compare 3 generation" "0,1"
|
|
newline
|
|
bitfld.word 0x0 2. "CC2G,Capture/Compare 2 generation" "0,1"
|
|
bitfld.word 0x0 1. "CC1G,Capture/Compare 1 generation" "0: No action,1: A capture/compare event is generated on channel 1:"
|
|
newline
|
|
bitfld.word 0x0 0. "UG,Update generation" "0: No action,1: Reinitialize the counter and generates an update.."
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "TIM1_CCMR1,TIM1 capture/compare mode register 1"
|
|
hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter"
|
|
bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "CC2S,Capture/Compare 2 selection" "0: CC2 channel is configured as output,1: CC2 channel is configured as input IC2 is mapped..,2: CC2 channel is configured as input IC2 is mapped..,3: CC2 channel is configured as input IC2 is mapped.."
|
|
hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
|
|
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 Selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input IC1 is mapped..,2: CC1 channel is configured as input IC1 is mapped..,3: CC1 channel is configured as input IC1 is mapped.."
|
|
group.long 0x18++0x7
|
|
line.long 0x0 "TIM1_CCMR1_ALTERNATE1,TIM1 capture/compare mode register 1"
|
|
bitfld.long 0x0 24. "OC2M_1,OC2M[3]" "0,1"
|
|
bitfld.long 0x0 16. "OC1M_1,OC1M[3]" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "OC2CE,Output Compare 2 clear enable" "0,1"
|
|
bitfld.long 0x0 12.--14. "OC2M,OC2M[2:0]: Output Compare 2 mode" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 11. "OC2PE,Output Compare 2 preload enable" "0,1"
|
|
bitfld.long 0x0 10. "OC2FE,Output Compare 2 fast enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "CC2S,Capture/Compare 2 selection" "0: CC2 channel is configured as output,1: CC2 channel is configured as input IC2 is mapped..,2: CC2 channel is configured as input IC2 is mapped..,3: CC2 channel is configured as input IC2 is mapped.."
|
|
bitfld.long 0x0 7. "OC1CE,Output Compare 1 clear enable" "0: OC1Ref is not affected by the ETRF input,1: OC1Ref is cleared as soon as a High level is.."
|
|
newline
|
|
bitfld.long 0x0 4.--6. "OC1M,OC1M[2:0]: Output Compare 1 mode" "0: Frozen - The comparison between the output..,1: Set channel 1 to active level on match. OC1REF..,2: Set channel 1 to inactive level on match. OC1REF..,3: Toggle - OC1REF toggles when TIMx_CNT=TIMx_CCR1.,4: Force inactive level - OC1REF is forced low.,5: Force active level - OC1REF is forced high.,6: PWM mode 1 - In upcounting channel 1 is active..,7: PWM mode 2 - In upcounting channel 1 is inactive.."
|
|
bitfld.long 0x0 3. "OC1PE,Output Compare 1 preload enable" "0: Preload register on TIMx_CCR1 disabled.,1: Preload register on TIMx_CCR1 enabled."
|
|
newline
|
|
bitfld.long 0x0 2. "OC1FE,Output Compare 1 fast enable" "0: CC1 behaves normally depending on counter and..,1: An active edge on the trigger input acts like a.."
|
|
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input IC1 is mapped..,2: CC1 channel is configured as input IC1 is mapped..,3: CC1 channel is configured as input IC1 is mapped.."
|
|
line.long 0x4 "TIM1_CCMR2,TIM1 capture/compare mode register 2"
|
|
hexmask.long.byte 0x4 12.--15. 1. "IC4F,Input capture 4 filter"
|
|
bitfld.long 0x4 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 8.--9. "CC4S,Capture/Compare 4 selection" "0: CC4 channel is configured as output,1: CC4 channel is configured as input IC4 is mapped..,2: CC4 channel is configured as input IC4 is mapped..,3: CC4 channel is configured as input IC4 is mapped.."
|
|
hexmask.long.byte 0x4 4.--7. 1. "IC3F,Input capture 3 filter"
|
|
newline
|
|
bitfld.long 0x4 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3"
|
|
bitfld.long 0x4 0.--1. "CC3S,Capture/compare 3 selection" "0: CC3 channel is configured as output,1: CC3 channel is configured as input IC3 is mapped..,2: CC3 channel is configured as input IC3 is mapped..,3: CC3 channel is configured as input IC3 is mapped.."
|
|
group.long 0x1C++0xB
|
|
line.long 0x0 "TIM1_CCMR2_ALTERNATE,TIM1 capture/compare mode register 2"
|
|
bitfld.long 0x0 24. "OC4M_1,OC4M[3]" "0,1"
|
|
bitfld.long 0x0 16. "OC3M_1,OC3M[3]" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "OC4CE,Output compare 4 clear enable" "0,1"
|
|
bitfld.long 0x0 12.--14. "OC4M,OC4M[2:0]: Output compare 4 mode" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 11. "OC4PE,Output compare 4 preload enable" "0,1"
|
|
bitfld.long 0x0 10. "OC4FE,Output compare 4 fast enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "CC4S,Capture/Compare 4 selection" "0: CC4 channel is configured as output,1: CC4 channel is configured as input IC4 is mapped..,2: CC4 channel is configured as input IC4 is mapped..,3: CC4 channel is configured as input IC4 is mapped.."
|
|
bitfld.long 0x0 7. "OC3CE,Output compare 3 clear enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4.--6. "OC3M,OC3M[2:0]: Output compare 3 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 3. "OC3PE,Output compare 3 preload enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "OC3FE,Output compare 3 fast enable" "0,1"
|
|
bitfld.long 0x0 0.--1. "CC3S,Capture/Compare 3 selection" "0: CC3 channel is configured as output,1: CC3 channel is configured as input IC3 is mapped..,2: CC3 channel is configured as input IC3 is mapped..,3: CC3 channel is configured as input IC3 is mapped.."
|
|
line.long 0x4 "TIM1_CCER,TIM1 capture/compare enable register"
|
|
bitfld.long 0x4 21. "CC6P,Capture/Compare 6 output polarity" "0,1"
|
|
bitfld.long 0x4 20. "CC6E,Capture/Compare 6 output enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "CC5P,Capture/Compare 5 output polarity" "0,1"
|
|
bitfld.long 0x4 16. "CC5E,Capture/Compare 5 output enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "CC4NP,Capture/Compare 4 complementary output polarity" "0,1"
|
|
bitfld.long 0x4 13. "CC4P,Capture/Compare 4 output polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "CC4E,Capture/Compare 4 output enable" "0,1"
|
|
bitfld.long 0x4 11. "CC3NP,Capture/Compare 3 complementary output polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "CC3NE,Capture/Compare 3 complementary output enable" "0,1"
|
|
bitfld.long 0x4 9. "CC3P,Capture/Compare 3 output polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "CC3E,Capture/Compare 3 output enable" "0,1"
|
|
bitfld.long 0x4 7. "CC2NP,Capture/Compare 2 complementary output polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "CC2NE,Capture/Compare 2 complementary output enable" "0,1"
|
|
bitfld.long 0x4 5. "CC2P,Capture/Compare 2 output polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "CC2E,Capture/Compare 2 output enable" "0,1"
|
|
bitfld.long 0x4 3. "CC1NP,Capture/Compare 1 complementary output polarity" "0: OC1N active high.,1: OC1N active low."
|
|
newline
|
|
bitfld.long 0x4 2. "CC1NE,Capture/Compare 1 complementary output enable" "0: Off - OC1N is not active. OC1N level is then..,1: On - OC1N signal is output on the corresponding.."
|
|
bitfld.long 0x4 1. "CC1P,Capture/Compare 1 output polarity" "0: The configuration is reserved,1: non-inverted/both edges/ The circuit is.."
|
|
newline
|
|
bitfld.long 0x4 0. "CC1E,Capture/Compare 1 output enable" "0: Capture mode disabled / OC1 is not active (see..,1: Capture mode enabled / OC1 signal is output on.."
|
|
line.long 0x8 "TIM1_CNT,TIM1 counter"
|
|
rbitfld.long 0x8 31. "UIFCPY,UIF copy" "0,1"
|
|
hexmask.long.word 0x8 0.--15. 1. "CNT,Counter value"
|
|
group.word 0x28++0x1
|
|
line.word 0x0 "TIM1_PSC,TIM1 prescaler"
|
|
hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value"
|
|
group.word 0x2C++0x1
|
|
line.word 0x0 "TIM1_ARR,TIM1 auto-reload register"
|
|
hexmask.word 0x0 0.--15. 1. "ARR,Auto-reload value"
|
|
group.word 0x30++0x1
|
|
line.word 0x0 "TIM1_RCR,TIM1 repetition counter register"
|
|
hexmask.word 0x0 0.--15. 1. "REP,Repetition counter value"
|
|
group.word 0x34++0x1
|
|
line.word 0x0 "TIM1_CCR1,TIM1 capture/compare register 1"
|
|
hexmask.word 0x0 0.--15. 1. "CCR1,Capture/Compare 1 value"
|
|
group.word 0x38++0x1
|
|
line.word 0x0 "TIM1_CCR2,TIM1 capture/compare register 2"
|
|
hexmask.word 0x0 0.--15. 1. "CCR2,Capture/Compare 2 value"
|
|
group.word 0x3C++0x1
|
|
line.word 0x0 "TIM1_CCR3,TIM1 capture/compare register 3"
|
|
hexmask.word 0x0 0.--15. 1. "CCR3,Capture/Compare value"
|
|
group.word 0x40++0x1
|
|
line.word 0x0 "TIM1_CCR4,TIM1 capture/compare register 4"
|
|
hexmask.word 0x0 0.--15. 1. "CCR4,Capture/Compare value"
|
|
group.long 0x44++0x3
|
|
line.long 0x0 "TIM1_BDTR,TIM1 break and dead-time register"
|
|
bitfld.long 0x0 25. "BK2P,Break 2 polarity" "0: Break input BRK2 is active low,1: Break input BRK2 is active high"
|
|
bitfld.long 0x0 24. "BK2E,Break 2 enable" "0: Break2 function disabled,1: Break2 function enabled"
|
|
newline
|
|
hexmask.long.byte 0x0 20.--23. 1. "BK2F,Break 2 filter"
|
|
hexmask.long.byte 0x0 16.--19. 1. "BKF,Break filter"
|
|
newline
|
|
bitfld.long 0x0 15. "MOE,Main output enable" "0: OC and OCN outputs are disabled or forced to..,1: OC and OCN outputs are enabled if their.."
|
|
bitfld.long 0x0 14. "AOE,Automatic output enable" "0: MOE can be set only by software,1: MOE can be set by software or automatically at.."
|
|
newline
|
|
bitfld.long 0x0 13. "BKP,Break polarity" "0: Break input BRK is active low,1: Break input BRK is active high"
|
|
bitfld.long 0x0 12. "BKE,Break enable" "0: Break function disabled,1: Break function enabled"
|
|
newline
|
|
bitfld.long 0x0 11. "OSSR,Off-state selection for Run mode" "0: When inactive OC/OCN outputs are disabled (the..,1: When inactive OC/OCN outputs are enabled with.."
|
|
bitfld.long 0x0 10. "OSSI,Off-state selection for Idle mode" "0: When inactive OC/OCN outputs are disabled (the..,1: When inactive OC/OCN outputs are first forced.."
|
|
newline
|
|
bitfld.long 0x0 8.--9. "LOCK,Lock configuration" "0: LOCK OFF - No bit is write protected.,1: LOCK Level 1 = DTG bits in TIMx_BDTR register..,2: LOCK Level 2 = LOCK Level 1 + CC Polarity bits..,3: LOCK Level 3 = LOCK Level 2 + CC Control bits.."
|
|
hexmask.long.byte 0x0 0.--7. 1. "DTG,Dead-time generator setup"
|
|
group.word 0x48++0x1
|
|
line.word 0x0 "TIM1_DCR,TIM1 DMA control register"
|
|
hexmask.word.byte 0x0 8.--12. 1. "DBL,DMA burst length"
|
|
hexmask.word.byte 0x0 0.--4. 1. "DBA,DMA base address"
|
|
group.long 0x4C++0x3
|
|
line.long 0x0 "TIM1_DMAR,TIM1 DMA address for full transfer"
|
|
hexmask.long 0x0 0.--31. 1. "DMAB,DMA register for burst accesses"
|
|
group.long 0x54++0x7
|
|
line.long 0x0 "TIM1_CCMR3,TIM1 capture/compare mode register 3"
|
|
bitfld.long 0x0 24. "OC6M_1,OC6M[3]" "0,1"
|
|
bitfld.long 0x0 16. "OC5M_1,OC5M[3]" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "OC6CE,Output compare 6 clear enable" "0,1"
|
|
bitfld.long 0x0 12.--14. "OC6M,OC6M[0]: Output compare 6 mode" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 11. "OC6PE,Output compare 6 preload enable" "0,1"
|
|
bitfld.long 0x0 10. "OC6FE,Output compare 6 fast enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "OC5CE,Output compare 5 clear enable" "0,1"
|
|
bitfld.long 0x0 4.--6. "OC5M,OC5M[0]: Output compare 5 mode" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 3. "OC5PE,Output compare 5 preload enable" "0,1"
|
|
bitfld.long 0x0 2. "OC5FE,Output compare 5 fast enable" "0,1"
|
|
line.long 0x4 "TIM1_CCR5,TIM1 capture/compare register 5"
|
|
bitfld.long 0x4 31. "GC5C3,Group Channel 5 and Channel 3" "0: No effect of OC5REF on OC3REFC,1: OC3REFC is the logical AND of OC3REFC and OC5REF"
|
|
bitfld.long 0x4 30. "GC5C2,Group Channel 5 and Channel 2" "0: No effect of OC5REF on OC2REFC,1: OC2REFC is the logical AND of OC2REFC and OC5REF"
|
|
newline
|
|
bitfld.long 0x4 29. "GC5C1,Group Channel 5 and Channel 1" "0: No effect of OC5REF on OC1REFC5,1: OC1REFC is the logical AND of OC1REFC and OC5REF"
|
|
hexmask.long.word 0x4 0.--15. 1. "CCR5,Capture/Compare 5 value"
|
|
group.word 0x5C++0x1
|
|
line.word 0x0 "TIM1_CCR6,TIM1 capture/compare register 6"
|
|
hexmask.word 0x0 0.--15. 1. "CCR6,Capture/Compare 6 value"
|
|
group.long 0x60++0xB
|
|
line.long 0x0 "TIM1_AF1,TIM1 alternate function option register 1"
|
|
hexmask.long.byte 0x0 14.--17. 1. "ETRSEL,ETR source selection"
|
|
bitfld.long 0x0 11. "BKCMP2P,BRK COMP2 input polarity" "0: COMP2 input polarity is not inverted (active low..,1: COMP2 input polarity is inverted (active high if.."
|
|
newline
|
|
bitfld.long 0x0 10. "BKCMP1P,BRK COMP1 input polarity" "0: COMP1 input polarity is not inverted (active low..,1: COMP1 input polarity is inverted (active high if.."
|
|
bitfld.long 0x0 9. "BKINP,BRK BKIN input polarity" "0: BKIN input polarity is not inverted (active low..,1: BKIN input polarity is inverted (active high if.."
|
|
newline
|
|
bitfld.long 0x0 8. "BKDF1BK0E,BRK dfsdm1_break[0] enable" "0: dfsdm1_break[0] input disabled,1: dfsdm1_break[0] input enabled"
|
|
bitfld.long 0x0 2. "BKCMP2E,BRK COMP2 enable" "0: COMP2 input disabled,1: COMP2 input enabled"
|
|
newline
|
|
bitfld.long 0x0 1. "BKCMP1E,BRK COMP1 enable" "0: COMP1 input disabled,1: COMP1 input enabled"
|
|
bitfld.long 0x0 0. "BKINE,BRK BKIN input enable" "0: BKIN input disabled,1: BKIN input enabled"
|
|
line.long 0x4 "TIM1_AF2,TIM1 Alternate function register 2"
|
|
bitfld.long 0x4 11. "BK2CMP2P,BRK2 COMP2 input polarity" "0: COMP2 input polarity is not inverted (active low..,1: COMP2 input polarity is inverted (active high if.."
|
|
bitfld.long 0x4 10. "BK2CMP1P,BRK2 COMP1 input polarity" "0: COMP1 input polarity is not inverted (active low..,1: COMP1 input polarity is inverted (active high if.."
|
|
newline
|
|
bitfld.long 0x4 9. "BK2INP,BRK2 BKIN2 input polarity" "0: BKIN2 input polarity is not inverted (active low..,1: BKIN2 input polarity is inverted (active high if.."
|
|
bitfld.long 0x4 8. "BK2DF1BK1E,BRK2 dfsdm1_break[1] enable" "0: dfsdm1_break[1] input disabled,1: dfsdm1_break[1] input enabled"
|
|
newline
|
|
bitfld.long 0x4 2. "BK2CMP2E,BRK2 COMP2 enable" "0: COMP2 input disabled,1: COMP2 input enabled"
|
|
bitfld.long 0x4 1. "BK2CMP1E,BRK2 COMP1 enable" "0: COMP1 input disabled,1: COMP1 input enabled"
|
|
newline
|
|
bitfld.long 0x4 0. "BK2INE,BRK2 BKIN input enable" "0: BKIN2 input disabled,1: BKIN2 input enabled"
|
|
line.long 0x8 "TIM1_TISEL,TIM1 timer input selection register"
|
|
hexmask.long.byte 0x8 24.--27. 1. "TI4SEL,selects TI4[0] to TI4[15] input"
|
|
hexmask.long.byte 0x8 16.--19. 1. "TI3SEL,selects TI3[0] to TI3[15] input"
|
|
newline
|
|
hexmask.long.byte 0x8 8.--11. 1. "TI2SEL,selects TI2[0] to TI2[15] input"
|
|
hexmask.long.byte 0x8 0.--3. 1. "TI1SEL,selects TI1[0] to TI1[15] input"
|
|
tree.end
|
|
tree "TIM2 (General Purpose Timer)"
|
|
base ad:0x40000000
|
|
group.word 0x0++0x1
|
|
line.word 0x0 "TIM2_CR1,TIM2 control register 1"
|
|
bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "0: No remapping. UIF status bit is not copied to..,1: Remapping enabled. UIF status bit is copied to.."
|
|
bitfld.word 0x0 8.--9. "CKD,Clock division" "0: t<sub>DTS</sub> = t<sub>CK_INT</sub>,1: t<sub>DTS</sub> = 2 t<sub>CK_INT</sub>,2: t<sub>DTS</sub> = 4 t<sub>CK_INT</sub>,?"
|
|
newline
|
|
bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "0: TIMx_ARR register is not buffered,1: TIMx_ARR register is buffered"
|
|
bitfld.word 0x0 5.--6. "CMS,Center-aligned mode selection" "0: Edge-aligned mode. The counter counts up or down..,1: Center-aligned mode 1. The counter counts up and..,2: Center-aligned mode 2. The counter counts up and..,3: Center-aligned mode 3. The counter counts up and.."
|
|
newline
|
|
bitfld.word 0x0 4. "DIR,Direction" "0: Counter used as upcounter,1: Counter used as downcounter"
|
|
bitfld.word 0x0 3. "OPM,One-pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event.."
|
|
newline
|
|
bitfld.word 0x0 2. "URS,Update request source" "0: Any of the following events generate an update..,1: Only counter overflow/underflow generates an.."
|
|
bitfld.word 0x0 1. "UDIS,Update disable" "0: UEV enabled. The Update (UEV) event is generated..,1: UEV disabled. The Update event is not generated.."
|
|
newline
|
|
bitfld.word 0x0 0. "CEN,Counter enable" "0: Counter disabled,1: Counter enabled"
|
|
group.word 0x4++0x1
|
|
line.word 0x0 "TIM2_CR2,TIM2 control register 2"
|
|
bitfld.word 0x0 7. "TI1S,TI1 selection" "0: The TIMx_CH1 pin is connected to TI1 input,1: The TIMx_CH1 CH2 and CH3 pins are connected to.."
|
|
bitfld.word 0x0 4.--6. "MMS,Master mode selection" "0: Reset - the UG bit from the TIMx_EGR register is..,1: Enable - the Counter enable signal CNT_EN is..,2: Update - The update event is selected as trigger..,3: Compare Pulse - The trigger output send a..,4: Compare - OC1REFC signal is used as trigger..,5: Compare - OC2REFC signal is used as trigger..,6: Compare - OC3REFC signal is used as trigger..,7: Compare - OC4REFC signal is used as trigger.."
|
|
newline
|
|
bitfld.word 0x0 3. "CCDS,Capture/compare DMA selection" "0: CCx DMA request sent when CCx event occurs,1: CCx DMA requests sent when update event occurs"
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "TIM2_SMCR,TIM2 slave mode control register"
|
|
bitfld.long 0x0 20.--21. "TS_1,TS[4:3]" "0,1,2,3"
|
|
bitfld.long 0x0 16. "SMS_1,SMS[3]" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "ETP,External trigger polarity" "0: ETR is non-inverted active at high level or..,1: ETR is inverted active at low level or falling.."
|
|
bitfld.long 0x0 14. "ECE,External clock enable" "0: External clock mode 2 disabled,1: External clock mode 2 enabled. The counter is.."
|
|
newline
|
|
bitfld.long 0x0 12.--13. "ETPS,External trigger prescaler" "0: Prescaler OFF,1: ETRP frequency divided by 2,2: ETRP frequency divided by 4,3: ETRP frequency divided by 8"
|
|
hexmask.long.byte 0x0 8.--11. 1. "ETF,External trigger filter"
|
|
newline
|
|
bitfld.long 0x0 7. "MSM,Master/Slave mode" "0: No action,1: The effect of an event on the trigger input.."
|
|
bitfld.long 0x0 4.--6. "TS,TS[0]: Trigger selection" "0: Internal Trigger 0 (ITR0),1: Internal Trigger 1 (ITR1),2: Internal Trigger 2 (ITR2),3: Internal Trigger 3 (ITR3),4: TI1 Edge Detector (TI1F_ED),5: Filtered Timer Input 1 (TI1FP1),6: Filtered Timer Input 2 (TI2FP2),7: External Trigger input (ETRF)"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "SMS,SMS[0]: Slave mode selection" "0: Slave mode disabled - if CEN = 1 then the..,1: Encoder mode 1 - Counter counts up/down on..,2: Encoder mode 2 - Counter counts up/down on..,3: Encoder mode 3 - Counter counts up/down on both..,4: Reset Mode - Rising edge of the selected trigger..,5: Gated Mode - The counter clock is enabled when..,6: Trigger Mode - The counter starts at a rising..,7: External Clock Mode 1 - Rising edges of the.."
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "TIM2_DIER,TIM2 DMA/Interrupt enable register"
|
|
bitfld.word 0x0 14. "TDE,Trigger DMA request enable" "0: Trigger DMA request disabled.,1: Trigger DMA request enabled."
|
|
bitfld.word 0x0 12. "CC4DE,Capture/Compare 4 DMA request enable" "0: CC4 DMA request disabled.,1: CC4 DMA request enabled."
|
|
newline
|
|
bitfld.word 0x0 11. "CC3DE,Capture/Compare 3 DMA request enable" "0: CC3 DMA request disabled.,1: CC3 DMA request enabled."
|
|
bitfld.word 0x0 10. "CC2DE,Capture/Compare 2 DMA request enable" "0: CC2 DMA request disabled.,1: CC2 DMA request enabled."
|
|
newline
|
|
bitfld.word 0x0 9. "CC1DE,Capture/Compare 1 DMA request enable" "0: CC1 DMA request disabled.,1: CC1 DMA request enabled."
|
|
bitfld.word 0x0 8. "UDE,Update DMA request enable" "0: Update DMA request disabled.,1: Update DMA request enabled."
|
|
newline
|
|
bitfld.word 0x0 6. "TIE,Trigger interrupt enable" "0: Trigger interrupt disabled.,1: Trigger interrupt enabled."
|
|
bitfld.word 0x0 4. "CC4IE,Capture/Compare 4 interrupt enable" "0: CC4 interrupt disabled.,1: CC4 interrupt enabled."
|
|
newline
|
|
bitfld.word 0x0 3. "CC3IE,Capture/Compare 3 interrupt enable" "0: CC3 interrupt disabled.,1: CC3 interrupt enabled."
|
|
bitfld.word 0x0 2. "CC2IE,Capture/Compare 2 interrupt enable" "0: CC2 interrupt disabled.,1: CC2 interrupt enabled."
|
|
newline
|
|
bitfld.word 0x0 1. "CC1IE,Capture/Compare 1 interrupt enable" "0: CC1 interrupt disabled.,1: CC1 interrupt enabled."
|
|
bitfld.word 0x0 0. "UIE,Update interrupt enable" "0: Update interrupt disabled.,1: Update interrupt enabled."
|
|
group.word 0x10++0x1
|
|
line.word 0x0 "TIM2_SR,TIM2 status register"
|
|
bitfld.word 0x0 12. "CC4OF,Capture/Compare 4 overcapture flag" "0,1"
|
|
bitfld.word 0x0 11. "CC3OF,Capture/Compare 3 overcapture flag" "0,1"
|
|
newline
|
|
bitfld.word 0x0 10. "CC2OF,Capture/compare 2 overcapture flag" "0,1"
|
|
bitfld.word 0x0 9. "CC1OF,Capture/Compare 1 overcapture flag" "0: No overcapture has been detected.,1: The counter value has been captured in TIMx_CCR1.."
|
|
newline
|
|
bitfld.word 0x0 6. "TIF,Trigger interrupt flag" "0: No trigger event occurred.,1: Trigger interrupt pending."
|
|
bitfld.word 0x0 4. "CC4IF,Capture/Compare 4 interrupt flag" "0,1"
|
|
newline
|
|
bitfld.word 0x0 3. "CC3IF,Capture/Compare 3 interrupt flag" "0,1"
|
|
bitfld.word 0x0 2. "CC2IF,Capture/Compare 2 interrupt flag" "0,1"
|
|
newline
|
|
bitfld.word 0x0 1. "CC1IF,Capture/compare 1 interrupt flag" "0: No compare match / No input capture occurred,1: A compare match or an input capture occurred"
|
|
bitfld.word 0x0 0. "UIF,Update interrupt flag" "0: No update occurred,1: Update interrupt pending. This bit is set by.."
|
|
wgroup.word 0x14++0x1
|
|
line.word 0x0 "TIM2_EGR,TIM2 event generation register"
|
|
bitfld.word 0x0 6. "TG,Trigger generation" "0: No action,1: The TIF flag is set in TIMx_SR register. Related.."
|
|
bitfld.word 0x0 4. "CC4G,Capture/compare 4 generation" "0,1"
|
|
newline
|
|
bitfld.word 0x0 3. "CC3G,Capture/compare 3 generation" "0,1"
|
|
bitfld.word 0x0 2. "CC2G,Capture/compare 2 generation" "0,1"
|
|
newline
|
|
bitfld.word 0x0 1. "CC1G,Capture/compare 1 generation" "0: No action,1: A capture/compare event is generated on channel 1:"
|
|
bitfld.word 0x0 0. "UG,Update generation" "0: No action,1: Re-initialize the counter and generates an.."
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "TIM2_CCMR1,TIM2 capture/compare mode register 1"
|
|
hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter"
|
|
bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "CC2S,Capture/compare 2 selection" "0: CC2 channel is configured as output.,1: CC2 channel is configured as input IC2 is mapped..,2: CC2 channel is configured as input IC2 is mapped..,3: CC2 channel is configured as input IC2 is mapped.."
|
|
hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
|
|
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input IC1 is mapped..,2: CC1 channel is configured as input IC1 is mapped..,3: CC1 channel is configured as input IC1 is mapped.."
|
|
group.long 0x18++0x7
|
|
line.long 0x0 "TIM2_CCMR1_ALTERNATE,TIM2 capture/compare mode register 1"
|
|
bitfld.long 0x0 24. "OC2M_1,OC2M[3]" "0,1"
|
|
bitfld.long 0x0 16. "OC1M_1,OC1M[3]" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "OC2CE,Output compare 2 clear enable" "0,1"
|
|
bitfld.long 0x0 12.--14. "OC2M,OC2M[2:0]: Output compare 2 mode" "?,?,?,?,?,?,6: 4,?"
|
|
newline
|
|
bitfld.long 0x0 11. "OC2PE,Output compare 2 preload enable" "0,1"
|
|
bitfld.long 0x0 10. "OC2FE,Output compare 2 fast enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "CC2S,Capture/Compare 2 selection" "0: CC2 channel is configured as output,1: CC2 channel is configured as input IC2 is mapped..,2: CC2 channel is configured as input IC2 is mapped..,3: CC2 channel is configured as input IC2 is mapped.."
|
|
bitfld.long 0x0 7. "OC1CE,Output compare 1 clear enable" "0: OC1Ref is not affected by the ETRF input,1: OC1Ref is cleared as soon as a High level is.."
|
|
newline
|
|
bitfld.long 0x0 4.--6. "OC1M,OC1M[2:0]: Output compare 1 mode" "0: Frozen - The comparison between the output..,1: Set channel 1 to active level on match. OC1REF..,2: Set channel 1 to inactive level on match. OC1REF..,3: Toggle - OC1REF toggles when TIMx_CNT=TIMx_CCR1.,4: Force inactive level - OC1REF is forced low.,5: Force active level - OC1REF is forced high.,6: PWM mode 1 - In upcounting channel 1 is active..,7: PWM mode 2 - In upcounting channel 1 is inactive.."
|
|
bitfld.long 0x0 3. "OC1PE,Output compare 1 preload enable" "0: Preload register on TIMx_CCR1 disabled.,1: Preload register on TIMx_CCR1 enabled."
|
|
newline
|
|
bitfld.long 0x0 2. "OC1FE,Output compare 1 fast enable" "0: CC1 behaves normally depending on counter and..,1: An active edge on the trigger input acts like a.."
|
|
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output.,1: CC1 channel is configured as input IC1 is mapped..,2: CC1 channel is configured as input IC1 is mapped..,3: CC1 channel is configured as input IC1 is mapped.."
|
|
line.long 0x4 "TIM2_CCMR2,TIM2 capture/compare mode register 2"
|
|
hexmask.long.byte 0x4 12.--15. 1. "IC4F,Input capture 4 filter"
|
|
bitfld.long 0x4 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 8.--9. "CC4S,Capture/Compare 4 selection" "0: CC4 channel is configured as output,1: CC4 channel is configured as input IC4 is mapped..,2: CC4 channel is configured as input IC4 is mapped..,3: CC4 channel is configured as input IC4 is mapped.."
|
|
hexmask.long.byte 0x4 4.--7. 1. "IC3F,Input capture 3 filter"
|
|
newline
|
|
bitfld.long 0x4 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3"
|
|
bitfld.long 0x4 0.--1. "CC3S,Capture/Compare 3 selection" "0: CC3 channel is configured as output,1: CC3 channel is configured as input IC3 is mapped..,2: CC3 channel is configured as input IC3 is mapped..,3: CC3 channel is configured as input IC3 is mapped.."
|
|
group.long 0x1C++0x3
|
|
line.long 0x0 "TIM2_CCMR2_ALTERNATE,TIM2 capture/compare mode register 2"
|
|
bitfld.long 0x0 24. "OC4M_1,OC4M[3]" "0,1"
|
|
bitfld.long 0x0 16. "OC3M_1,OC3M[3]" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "OC4CE,Output compare 4 clear enable" "0,1"
|
|
bitfld.long 0x0 12.--14. "OC4M,OC4M[2:0]: Output compare 4 mode" "?,?,?,?,?,?,6: 4 in TIMx_CCMR1 register,?"
|
|
newline
|
|
bitfld.long 0x0 11. "OC4PE,Output compare 4 preload enable" "0,1"
|
|
bitfld.long 0x0 10. "OC4FE,Output compare 4 fast enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "CC4S,Capture/Compare 4 selection" "0: CC4 channel is configured as output,1: CC4 channel is configured as input IC4 is mapped..,2: CC4 channel is configured as input IC4 is mapped..,3: CC4 channel is configured as input IC4 is mapped.."
|
|
bitfld.long 0x0 7. "OC3CE,Output compare 3 clear enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4.--6. "OC3M,OC3M[2:0]: Output compare 3 mode" "?,?,?,?,?,?,6: 4 in TIMx_CCMR1 register,?"
|
|
bitfld.long 0x0 3. "OC3PE,Output compare 3 preload enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "OC3FE,Output compare 3 fast enable" "0,1"
|
|
bitfld.long 0x0 0.--1. "CC3S,Capture/Compare 3 selection" "0: CC3 channel is configured as output,1: CC3 channel is configured as input IC3 is mapped..,2: CC3 channel is configured as input IC3 is mapped..,3: CC3 channel is configured as input IC3 is mapped.."
|
|
group.word 0x20++0x1
|
|
line.word 0x0 "TIM2_CCER,TIM2 capture/compare enable register"
|
|
bitfld.word 0x0 15. "CC4NP,Capture/Compare 4 output Polarity." "0,1"
|
|
bitfld.word 0x0 13. "CC4P,Capture/Compare 4 output Polarity." "0,1"
|
|
newline
|
|
bitfld.word 0x0 12. "CC4E,Capture/Compare 4 output enable." "0,1"
|
|
bitfld.word 0x0 11. "CC3NP,Capture/Compare 3 output Polarity." "0,1"
|
|
newline
|
|
bitfld.word 0x0 9. "CC3P,Capture/Compare 3 output Polarity." "0,1"
|
|
bitfld.word 0x0 8. "CC3E,Capture/Compare 3 output enable." "0,1"
|
|
newline
|
|
bitfld.word 0x0 7. "CC2NP,Capture/Compare 2 output Polarity." "0,1"
|
|
bitfld.word 0x0 5. "CC2P,Capture/Compare 2 output Polarity." "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "CC2E,Capture/Compare 2 output enable." "0,1"
|
|
bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 output Polarity." "0,1"
|
|
newline
|
|
bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output Polarity." "0: This configuration is reserved,1: non-inverted/both edges"
|
|
bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable." "0: Capture mode disabled / OC1 is not active,1: Capture mode enabled / OC1 signal is output on.."
|
|
group.long 0x24++0x3
|
|
line.long 0x0 "TIM2_CNT,TIM2 counter"
|
|
hexmask.long 0x0 0.--31. 1. "CNT,Least significant part of counter value"
|
|
group.long 0x24++0x3
|
|
line.long 0x0 "TIM2_CNT_ALTERNATE,TIM2 counter"
|
|
bitfld.long 0x0 31. "UIFCPY,UIF Copy" "0,1"
|
|
hexmask.long 0x0 0.--30. 1. "CNT,Least significant part of counter value"
|
|
group.word 0x28++0x1
|
|
line.word 0x0 "TIM2_PSC,TIM2 prescaler"
|
|
hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value"
|
|
group.long 0x2C++0x3
|
|
line.long 0x0 "TIM2_ARR,TIM2 auto-reload register"
|
|
hexmask.long 0x0 0.--31. 1. "ARR,Low Auto-reload value"
|
|
group.long 0x34++0xF
|
|
line.long 0x0 "TIM2_CCR1,TIM2 capture/compare register 1"
|
|
hexmask.long 0x0 0.--31. 1. "CCR1,Low Capture/Compare 1 value"
|
|
line.long 0x4 "TIM2_CCR2,TIM2 capture/compare register 2"
|
|
hexmask.long 0x4 0.--31. 1. "CCR2,Low Capture/Compare 2 value"
|
|
line.long 0x8 "TIM2_CCR3,TIM2 capture/compare register 3"
|
|
hexmask.long 0x8 0.--31. 1. "CCR3,Low Capture/Compare value"
|
|
line.long 0xC "TIM2_CCR4,TIM2 capture/compare register 4"
|
|
hexmask.long 0xC 0.--31. 1. "CCR4,Low Capture/Compare value"
|
|
group.word 0x48++0x1
|
|
line.word 0x0 "TIM2_DCR,TIM2 DMA control register"
|
|
hexmask.word.byte 0x0 8.--12. 1. "DBL,DMA burst length"
|
|
hexmask.word.byte 0x0 0.--4. 1. "DBA,DMA base address"
|
|
group.word 0x4C++0x1
|
|
line.word 0x0 "TIM2_DMAR,TIM2 DMA address for full transfer"
|
|
hexmask.word 0x0 0.--15. 1. "DMAB,DMA register for burst accesses"
|
|
group.long 0x60++0x3
|
|
line.long 0x0 "TIM2_AF1,TIM2 alternate function option register 1"
|
|
hexmask.long.byte 0x0 14.--17. 1. "ETRSEL,ETR source selection"
|
|
group.long 0x68++0x3
|
|
line.long 0x0 "TIM2_TISEL,TIM2 timer input selection register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "TI4SEL,TI4[0] to TI4[15] input selection"
|
|
hexmask.long.byte 0x0 16.--19. 1. "TI3SEL,TI3[0] to TI3[15] input selection"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "TI2SEL,TI2[0] to TI2[15] input selection"
|
|
hexmask.long.byte 0x0 0.--3. 1. "TI1SEL,TI1[0] to TI1[15] input selection"
|
|
tree.end
|
|
tree "TIM3 (General Purpose Timer)"
|
|
base ad:0x40000400
|
|
group.word 0x0++0x1
|
|
line.word 0x0 "TIM3_CR1,TIM3 control register 1"
|
|
bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "0: No remapping. UIF status bit is not copied to..,1: Remapping enabled. UIF status bit is copied to.."
|
|
bitfld.word 0x0 8.--9. "CKD,Clock division" "0: t<sub>DTS</sub> = t<sub>CK_INT</sub>,1: t<sub>DTS</sub> = 2 t<sub>CK_INT</sub>,2: t<sub>DTS</sub> = 4 t<sub>CK_INT</sub>,?"
|
|
newline
|
|
bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "0: TIMx_ARR register is not buffered,1: TIMx_ARR register is buffered"
|
|
bitfld.word 0x0 5.--6. "CMS,Center-aligned mode selection" "0: Edge-aligned mode. The counter counts up or down..,1: Center-aligned mode 1. The counter counts up and..,2: Center-aligned mode 2. The counter counts up and..,3: Center-aligned mode 3. The counter counts up and.."
|
|
newline
|
|
bitfld.word 0x0 4. "DIR,Direction" "0: Counter used as upcounter,1: Counter used as downcounter"
|
|
bitfld.word 0x0 3. "OPM,One-pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event.."
|
|
newline
|
|
bitfld.word 0x0 2. "URS,Update request source" "0: Any of the following events generate an update..,1: Only counter overflow/underflow generates an.."
|
|
bitfld.word 0x0 1. "UDIS,Update disable" "0: UEV enabled. The Update (UEV) event is generated..,1: UEV disabled. The Update event is not generated.."
|
|
newline
|
|
bitfld.word 0x0 0. "CEN,Counter enable" "0: Counter disabled,1: Counter enabled"
|
|
group.word 0x4++0x1
|
|
line.word 0x0 "TIM3_CR2,TIM3 control register 2"
|
|
bitfld.word 0x0 7. "TI1S,TI1 selection" "0: The TIMx_CH1 pin is connected to TI1 input,1: The TIMx_CH1 CH2 and CH3 pins are connected to.."
|
|
bitfld.word 0x0 4.--6. "MMS,Master mode selection" "0: Reset - the UG bit from the TIMx_EGR register is..,1: Enable - the Counter enable signal CNT_EN is..,2: Update - The update event is selected as trigger..,3: Compare Pulse - The trigger output send a..,4: Compare - OC1REFC signal is used as trigger..,5: Compare - OC2REFC signal is used as trigger..,6: Compare - OC3REFC signal is used as trigger..,7: Compare - OC4REFC signal is used as trigger.."
|
|
newline
|
|
bitfld.word 0x0 3. "CCDS,Capture/compare DMA selection" "0: CCx DMA request sent when CCx event occurs,1: CCx DMA requests sent when update event occurs"
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "TIM3_SMCR,TIM3 slave mode control register"
|
|
bitfld.long 0x0 20.--21. "TS_1,TS[4:3]" "0,1,2,3"
|
|
bitfld.long 0x0 16. "SMS_1,SMS[3]" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "ETP,External trigger polarity" "0: ETR is non-inverted active at high level or..,1: ETR is inverted active at low level or falling.."
|
|
bitfld.long 0x0 14. "ECE,External clock enable" "0: External clock mode 2 disabled,1: External clock mode 2 enabled. The counter is.."
|
|
newline
|
|
bitfld.long 0x0 12.--13. "ETPS,External trigger prescaler" "0: Prescaler OFF,1: ETRP frequency divided by 2,2: ETRP frequency divided by 4,3: ETRP frequency divided by 8"
|
|
hexmask.long.byte 0x0 8.--11. 1. "ETF,External trigger filter"
|
|
newline
|
|
bitfld.long 0x0 7. "MSM,Master/Slave mode" "0: No action,1: The effect of an event on the trigger input.."
|
|
bitfld.long 0x0 4.--6. "TS,TS[0]: Trigger selection" "0: Internal Trigger 0 (ITR0),1: Internal Trigger 1 (ITR1),2: Internal Trigger 2 (ITR2),3: Internal Trigger 3 (ITR3),4: TI1 Edge Detector (TI1F_ED),5: Filtered Timer Input 1 (TI1FP1),6: Filtered Timer Input 2 (TI2FP2),7: External Trigger input (ETRF)"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "SMS,SMS[0]: Slave mode selection" "0: Slave mode disabled - if CEN = 1 then the..,1: Encoder mode 1 - Counter counts up/down on..,2: Encoder mode 2 - Counter counts up/down on..,3: Encoder mode 3 - Counter counts up/down on both..,4: Reset Mode - Rising edge of the selected trigger..,5: Gated Mode - The counter clock is enabled when..,6: Trigger Mode - The counter starts at a rising..,7: External Clock Mode 1 - Rising edges of the.."
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "TIM3_DIER,TIM3 DMA/Interrupt enable register"
|
|
bitfld.word 0x0 14. "TDE,Trigger DMA request enable" "0: Trigger DMA request disabled.,1: Trigger DMA request enabled."
|
|
bitfld.word 0x0 12. "CC4DE,Capture/Compare 4 DMA request enable" "0: CC4 DMA request disabled.,1: CC4 DMA request enabled."
|
|
newline
|
|
bitfld.word 0x0 11. "CC3DE,Capture/Compare 3 DMA request enable" "0: CC3 DMA request disabled.,1: CC3 DMA request enabled."
|
|
bitfld.word 0x0 10. "CC2DE,Capture/Compare 2 DMA request enable" "0: CC2 DMA request disabled.,1: CC2 DMA request enabled."
|
|
newline
|
|
bitfld.word 0x0 9. "CC1DE,Capture/Compare 1 DMA request enable" "0: CC1 DMA request disabled.,1: CC1 DMA request enabled."
|
|
bitfld.word 0x0 8. "UDE,Update DMA request enable" "0: Update DMA request disabled.,1: Update DMA request enabled."
|
|
newline
|
|
bitfld.word 0x0 6. "TIE,Trigger interrupt enable" "0: Trigger interrupt disabled.,1: Trigger interrupt enabled."
|
|
bitfld.word 0x0 4. "CC4IE,Capture/Compare 4 interrupt enable" "0: CC4 interrupt disabled.,1: CC4 interrupt enabled."
|
|
newline
|
|
bitfld.word 0x0 3. "CC3IE,Capture/Compare 3 interrupt enable" "0: CC3 interrupt disabled.,1: CC3 interrupt enabled."
|
|
bitfld.word 0x0 2. "CC2IE,Capture/Compare 2 interrupt enable" "0: CC2 interrupt disabled.,1: CC2 interrupt enabled."
|
|
newline
|
|
bitfld.word 0x0 1. "CC1IE,Capture/Compare 1 interrupt enable" "0: CC1 interrupt disabled.,1: CC1 interrupt enabled."
|
|
bitfld.word 0x0 0. "UIE,Update interrupt enable" "0: Update interrupt disabled.,1: Update interrupt enabled."
|
|
group.word 0x10++0x1
|
|
line.word 0x0 "TIM3_SR,TIM3 status register"
|
|
bitfld.word 0x0 12. "CC4OF,Capture/Compare 4 overcapture flag" "0,1"
|
|
bitfld.word 0x0 11. "CC3OF,Capture/Compare 3 overcapture flag" "0,1"
|
|
newline
|
|
bitfld.word 0x0 10. "CC2OF,Capture/compare 2 overcapture flag" "0,1"
|
|
bitfld.word 0x0 9. "CC1OF,Capture/Compare 1 overcapture flag" "0: No overcapture has been detected.,1: The counter value has been captured in TIMx_CCR1.."
|
|
newline
|
|
bitfld.word 0x0 6. "TIF,Trigger interrupt flag" "0: No trigger event occurred.,1: Trigger interrupt pending."
|
|
bitfld.word 0x0 4. "CC4IF,Capture/Compare 4 interrupt flag" "0,1"
|
|
newline
|
|
bitfld.word 0x0 3. "CC3IF,Capture/Compare 3 interrupt flag" "0,1"
|
|
bitfld.word 0x0 2. "CC2IF,Capture/Compare 2 interrupt flag" "0,1"
|
|
newline
|
|
bitfld.word 0x0 1. "CC1IF,Capture/compare 1 interrupt flag" "0: No compare match / No input capture occurred,1: A compare match or an input capture occurred"
|
|
bitfld.word 0x0 0. "UIF,Update interrupt flag" "0: No update occurred,1: Update interrupt pending. This bit is set by.."
|
|
wgroup.word 0x14++0x1
|
|
line.word 0x0 "TIM3_EGR,TIM3 event generation register"
|
|
bitfld.word 0x0 6. "TG,Trigger generation" "0: No action,1: The TIF flag is set in TIMx_SR register. Related.."
|
|
bitfld.word 0x0 4. "CC4G,Capture/compare 4 generation" "0,1"
|
|
newline
|
|
bitfld.word 0x0 3. "CC3G,Capture/compare 3 generation" "0,1"
|
|
bitfld.word 0x0 2. "CC2G,Capture/compare 2 generation" "0,1"
|
|
newline
|
|
bitfld.word 0x0 1. "CC1G,Capture/compare 1 generation" "0: No action,1: A capture/compare event is generated on channel 1:"
|
|
bitfld.word 0x0 0. "UG,Update generation" "0: No action,1: Re-initialize the counter and generates an.."
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "TIM3_CCMR1,TIM3 capture/compare mode register 1"
|
|
hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter"
|
|
bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "CC2S,Capture/compare 2 selection" "0: CC2 channel is configured as output.,1: CC2 channel is configured as input IC2 is mapped..,2: CC2 channel is configured as input IC2 is mapped..,3: CC2 channel is configured as input IC2 is mapped.."
|
|
hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
|
|
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input IC1 is mapped..,2: CC1 channel is configured as input IC1 is mapped..,3: CC1 channel is configured as input IC1 is mapped.."
|
|
group.long 0x18++0x7
|
|
line.long 0x0 "TIM3_CCMR1_ALTERNATE,TIM3 capture/compare mode register 1"
|
|
bitfld.long 0x0 24. "OC2M_1,OC2M[3]" "0,1"
|
|
bitfld.long 0x0 16. "OC1M_1,OC1M[3]" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "OC2CE,Output compare 2 clear enable" "0,1"
|
|
bitfld.long 0x0 12.--14. "OC2M,OC2M[2:0]: Output compare 2 mode" "?,?,?,?,?,?,6: 4,?"
|
|
newline
|
|
bitfld.long 0x0 11. "OC2PE,Output compare 2 preload enable" "0,1"
|
|
bitfld.long 0x0 10. "OC2FE,Output compare 2 fast enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "CC2S,Capture/Compare 2 selection" "0: CC2 channel is configured as output,1: CC2 channel is configured as input IC2 is mapped..,2: CC2 channel is configured as input IC2 is mapped..,3: CC2 channel is configured as input IC2 is mapped.."
|
|
bitfld.long 0x0 7. "OC1CE,Output compare 1 clear enable" "0: OC1Ref is not affected by the ETRF input,1: OC1Ref is cleared as soon as a High level is.."
|
|
newline
|
|
bitfld.long 0x0 4.--6. "OC1M,OC1M[2:0]: Output compare 1 mode" "0: Frozen - The comparison between the output..,1: Set channel 1 to active level on match. OC1REF..,2: Set channel 1 to inactive level on match. OC1REF..,3: Toggle - OC1REF toggles when TIMx_CNT=TIMx_CCR1.,4: Force inactive level - OC1REF is forced low.,5: Force active level - OC1REF is forced high.,6: PWM mode 1 - In upcounting channel 1 is active..,7: PWM mode 2 - In upcounting channel 1 is inactive.."
|
|
bitfld.long 0x0 3. "OC1PE,Output compare 1 preload enable" "0: Preload register on TIMx_CCR1 disabled.,1: Preload register on TIMx_CCR1 enabled."
|
|
newline
|
|
bitfld.long 0x0 2. "OC1FE,Output compare 1 fast enable" "0: CC1 behaves normally depending on counter and..,1: An active edge on the trigger input acts like a.."
|
|
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output.,1: CC1 channel is configured as input IC1 is mapped..,2: CC1 channel is configured as input IC1 is mapped..,3: CC1 channel is configured as input IC1 is mapped.."
|
|
line.long 0x4 "TIM3_CCMR2,TIM3 capture/compare mode register 2"
|
|
hexmask.long.byte 0x4 12.--15. 1. "IC4F,Input capture 4 filter"
|
|
bitfld.long 0x4 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 8.--9. "CC4S,Capture/Compare 4 selection" "0: CC4 channel is configured as output,1: CC4 channel is configured as input IC4 is mapped..,2: CC4 channel is configured as input IC4 is mapped..,3: CC4 channel is configured as input IC4 is mapped.."
|
|
hexmask.long.byte 0x4 4.--7. 1. "IC3F,Input capture 3 filter"
|
|
newline
|
|
bitfld.long 0x4 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3"
|
|
bitfld.long 0x4 0.--1. "CC3S,Capture/Compare 3 selection" "0: CC3 channel is configured as output,1: CC3 channel is configured as input IC3 is mapped..,2: CC3 channel is configured as input IC3 is mapped..,3: CC3 channel is configured as input IC3 is mapped.."
|
|
group.long 0x1C++0x3
|
|
line.long 0x0 "TIM3_CCMR2_ALTERNATE,TIM3 capture/compare mode register 2"
|
|
bitfld.long 0x0 24. "OC4M_1,OC4M[3]" "0,1"
|
|
bitfld.long 0x0 16. "OC3M_1,OC3M[3]" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "OC4CE,Output compare 4 clear enable" "0,1"
|
|
bitfld.long 0x0 12.--14. "OC4M,OC4M[2:0]: Output compare 4 mode" "?,?,?,?,?,?,6: 4 in TIMx_CCMR1 register,?"
|
|
newline
|
|
bitfld.long 0x0 11. "OC4PE,Output compare 4 preload enable" "0,1"
|
|
bitfld.long 0x0 10. "OC4FE,Output compare 4 fast enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "CC4S,Capture/Compare 4 selection" "0: CC4 channel is configured as output,1: CC4 channel is configured as input IC4 is mapped..,2: CC4 channel is configured as input IC4 is mapped..,3: CC4 channel is configured as input IC4 is mapped.."
|
|
bitfld.long 0x0 7. "OC3CE,Output compare 3 clear enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4.--6. "OC3M,OC3M[2:0]: Output compare 3 mode" "?,?,?,?,?,?,6: 4 in TIMx_CCMR1 register,?"
|
|
bitfld.long 0x0 3. "OC3PE,Output compare 3 preload enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "OC3FE,Output compare 3 fast enable" "0,1"
|
|
bitfld.long 0x0 0.--1. "CC3S,Capture/Compare 3 selection" "0: CC3 channel is configured as output,1: CC3 channel is configured as input IC3 is mapped..,2: CC3 channel is configured as input IC3 is mapped..,3: CC3 channel is configured as input IC3 is mapped.."
|
|
group.word 0x20++0x1
|
|
line.word 0x0 "TIM3_CCER,TIM3 capture/compare enable register"
|
|
bitfld.word 0x0 15. "CC4NP,Capture/Compare 4 output Polarity." "0,1"
|
|
bitfld.word 0x0 13. "CC4P,Capture/Compare 4 output Polarity." "0,1"
|
|
newline
|
|
bitfld.word 0x0 12. "CC4E,Capture/Compare 4 output enable." "0,1"
|
|
bitfld.word 0x0 11. "CC3NP,Capture/Compare 3 output Polarity." "0,1"
|
|
newline
|
|
bitfld.word 0x0 9. "CC3P,Capture/Compare 3 output Polarity." "0,1"
|
|
bitfld.word 0x0 8. "CC3E,Capture/Compare 3 output enable." "0,1"
|
|
newline
|
|
bitfld.word 0x0 7. "CC2NP,Capture/Compare 2 output Polarity." "0,1"
|
|
bitfld.word 0x0 5. "CC2P,Capture/Compare 2 output Polarity." "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "CC2E,Capture/Compare 2 output enable." "0,1"
|
|
bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 output Polarity." "0,1"
|
|
newline
|
|
bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output Polarity." "0: This configuration is reserved,1: non-inverted/both edges"
|
|
bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable." "0: Capture mode disabled / OC1 is not active,1: Capture mode enabled / OC1 signal is output on.."
|
|
group.long 0x24++0x3
|
|
line.long 0x0 "TIM3_CNT,TIM3 counter"
|
|
hexmask.long 0x0 0.--31. 1. "CNT,Least significant part of counter value"
|
|
group.long 0x24++0x3
|
|
line.long 0x0 "TIM3_CNT_ALTERNATE,TIM3 counter"
|
|
bitfld.long 0x0 31. "UIFCPY,UIF Copy" "0,1"
|
|
hexmask.long 0x0 0.--30. 1. "CNT,Least significant part of counter value"
|
|
group.word 0x28++0x1
|
|
line.word 0x0 "TIM3_PSC,TIM3 prescaler"
|
|
hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value"
|
|
group.long 0x2C++0x3
|
|
line.long 0x0 "TIM3_ARR,TIM3 auto-reload register"
|
|
hexmask.long 0x0 0.--31. 1. "ARR,Low Auto-reload value"
|
|
group.long 0x34++0xF
|
|
line.long 0x0 "TIM3_CCR1,TIM3 capture/compare register 1"
|
|
hexmask.long 0x0 0.--31. 1. "CCR1,Low Capture/Compare 1 value"
|
|
line.long 0x4 "TIM3_CCR2,TIM3 capture/compare register 2"
|
|
hexmask.long 0x4 0.--31. 1. "CCR2,Low Capture/Compare 2 value"
|
|
line.long 0x8 "TIM3_CCR3,TIM3 capture/compare register 3"
|
|
hexmask.long 0x8 0.--31. 1. "CCR3,Low Capture/Compare value"
|
|
line.long 0xC "TIM3_CCR4,TIM3 capture/compare register 4"
|
|
hexmask.long 0xC 0.--31. 1. "CCR4,Low Capture/Compare value"
|
|
group.word 0x48++0x1
|
|
line.word 0x0 "TIM3_DCR,TIM3 DMA control register"
|
|
hexmask.word.byte 0x0 8.--12. 1. "DBL,DMA burst length"
|
|
hexmask.word.byte 0x0 0.--4. 1. "DBA,DMA base address"
|
|
group.word 0x4C++0x1
|
|
line.word 0x0 "TIM3_DMAR,TIM3 DMA address for full transfer"
|
|
hexmask.word 0x0 0.--15. 1. "DMAB,DMA register for burst accesses"
|
|
group.long 0x60++0x3
|
|
line.long 0x0 "TIM3_AF1,TIM3 alternate function option register 1"
|
|
hexmask.long.byte 0x0 14.--17. 1. "ETRSEL,ETR source selection"
|
|
group.long 0x68++0x3
|
|
line.long 0x0 "TIM3_TISEL,TIM3 timer input selection register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "TI4SEL,TI4[0] to TI4[15] input selection"
|
|
hexmask.long.byte 0x0 16.--19. 1. "TI3SEL,TI3[0] to TI3[15] input selection"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "TI2SEL,TI2[0] to TI2[15] input selection"
|
|
hexmask.long.byte 0x0 0.--3. 1. "TI1SEL,TI1[0] to TI1[15] input selection"
|
|
tree.end
|
|
tree "TIM4 (General Purpose Timer)"
|
|
base ad:0x40000800
|
|
group.word 0x0++0x1
|
|
line.word 0x0 "TIM4_CR1,TIM4 control register 1"
|
|
bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "0: No remapping. UIF status bit is not copied to..,1: Remapping enabled. UIF status bit is copied to.."
|
|
bitfld.word 0x0 8.--9. "CKD,Clock division" "0: t<sub>DTS</sub> = t<sub>CK_INT</sub>,1: t<sub>DTS</sub> = 2 t<sub>CK_INT</sub>,2: t<sub>DTS</sub> = 4 t<sub>CK_INT</sub>,?"
|
|
newline
|
|
bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "0: TIMx_ARR register is not buffered,1: TIMx_ARR register is buffered"
|
|
bitfld.word 0x0 5.--6. "CMS,Center-aligned mode selection" "0: Edge-aligned mode. The counter counts up or down..,1: Center-aligned mode 1. The counter counts up and..,2: Center-aligned mode 2. The counter counts up and..,3: Center-aligned mode 3. The counter counts up and.."
|
|
newline
|
|
bitfld.word 0x0 4. "DIR,Direction" "0: Counter used as upcounter,1: Counter used as downcounter"
|
|
bitfld.word 0x0 3. "OPM,One-pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event.."
|
|
newline
|
|
bitfld.word 0x0 2. "URS,Update request source" "0: Any of the following events generate an update..,1: Only counter overflow/underflow generates an.."
|
|
bitfld.word 0x0 1. "UDIS,Update disable" "0: UEV enabled. The Update (UEV) event is generated..,1: UEV disabled. The Update event is not generated.."
|
|
newline
|
|
bitfld.word 0x0 0. "CEN,Counter enable" "0: Counter disabled,1: Counter enabled"
|
|
group.word 0x4++0x1
|
|
line.word 0x0 "TIM4_CR2,TIM4 control register 2"
|
|
bitfld.word 0x0 7. "TI1S,TI1 selection" "0: The TIMx_CH1 pin is connected to TI1 input,1: The TIMx_CH1 CH2 and CH3 pins are connected to.."
|
|
bitfld.word 0x0 4.--6. "MMS,Master mode selection" "0: Reset - the UG bit from the TIMx_EGR register is..,1: Enable - the Counter enable signal CNT_EN is..,2: Update - The update event is selected as trigger..,3: Compare Pulse - The trigger output send a..,4: Compare - OC1REFC signal is used as trigger..,5: Compare - OC2REFC signal is used as trigger..,6: Compare - OC3REFC signal is used as trigger..,7: Compare - OC4REFC signal is used as trigger.."
|
|
newline
|
|
bitfld.word 0x0 3. "CCDS,Capture/compare DMA selection" "0: CCx DMA request sent when CCx event occurs,1: CCx DMA requests sent when update event occurs"
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "TIM4_SMCR,TIM4 slave mode control register"
|
|
bitfld.long 0x0 20.--21. "TS_1,TS[4:3]" "0,1,2,3"
|
|
bitfld.long 0x0 16. "SMS_1,SMS[3]" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "ETP,External trigger polarity" "0: ETR is non-inverted active at high level or..,1: ETR is inverted active at low level or falling.."
|
|
bitfld.long 0x0 14. "ECE,External clock enable" "0: External clock mode 2 disabled,1: External clock mode 2 enabled. The counter is.."
|
|
newline
|
|
bitfld.long 0x0 12.--13. "ETPS,External trigger prescaler" "0: Prescaler OFF,1: ETRP frequency divided by 2,2: ETRP frequency divided by 4,3: ETRP frequency divided by 8"
|
|
hexmask.long.byte 0x0 8.--11. 1. "ETF,External trigger filter"
|
|
newline
|
|
bitfld.long 0x0 7. "MSM,Master/Slave mode" "0: No action,1: The effect of an event on the trigger input.."
|
|
bitfld.long 0x0 4.--6. "TS,TS[0]: Trigger selection" "0: Internal Trigger 0 (ITR0),1: Internal Trigger 1 (ITR1),2: Internal Trigger 2 (ITR2),3: Internal Trigger 3 (ITR3),4: TI1 Edge Detector (TI1F_ED),5: Filtered Timer Input 1 (TI1FP1),6: Filtered Timer Input 2 (TI2FP2),7: External Trigger input (ETRF)"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "SMS,SMS[0]: Slave mode selection" "0: Slave mode disabled - if CEN = 1 then the..,1: Encoder mode 1 - Counter counts up/down on..,2: Encoder mode 2 - Counter counts up/down on..,3: Encoder mode 3 - Counter counts up/down on both..,4: Reset Mode - Rising edge of the selected trigger..,5: Gated Mode - The counter clock is enabled when..,6: Trigger Mode - The counter starts at a rising..,7: External Clock Mode 1 - Rising edges of the.."
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "TIM4_DIER,TIM4 DMA/Interrupt enable register"
|
|
bitfld.word 0x0 14. "TDE,Trigger DMA request enable" "0: Trigger DMA request disabled.,1: Trigger DMA request enabled."
|
|
bitfld.word 0x0 12. "CC4DE,Capture/Compare 4 DMA request enable" "0: CC4 DMA request disabled.,1: CC4 DMA request enabled."
|
|
newline
|
|
bitfld.word 0x0 11. "CC3DE,Capture/Compare 3 DMA request enable" "0: CC3 DMA request disabled.,1: CC3 DMA request enabled."
|
|
bitfld.word 0x0 10. "CC2DE,Capture/Compare 2 DMA request enable" "0: CC2 DMA request disabled.,1: CC2 DMA request enabled."
|
|
newline
|
|
bitfld.word 0x0 9. "CC1DE,Capture/Compare 1 DMA request enable" "0: CC1 DMA request disabled.,1: CC1 DMA request enabled."
|
|
bitfld.word 0x0 8. "UDE,Update DMA request enable" "0: Update DMA request disabled.,1: Update DMA request enabled."
|
|
newline
|
|
bitfld.word 0x0 6. "TIE,Trigger interrupt enable" "0: Trigger interrupt disabled.,1: Trigger interrupt enabled."
|
|
bitfld.word 0x0 4. "CC4IE,Capture/Compare 4 interrupt enable" "0: CC4 interrupt disabled.,1: CC4 interrupt enabled."
|
|
newline
|
|
bitfld.word 0x0 3. "CC3IE,Capture/Compare 3 interrupt enable" "0: CC3 interrupt disabled.,1: CC3 interrupt enabled."
|
|
bitfld.word 0x0 2. "CC2IE,Capture/Compare 2 interrupt enable" "0: CC2 interrupt disabled.,1: CC2 interrupt enabled."
|
|
newline
|
|
bitfld.word 0x0 1. "CC1IE,Capture/Compare 1 interrupt enable" "0: CC1 interrupt disabled.,1: CC1 interrupt enabled."
|
|
bitfld.word 0x0 0. "UIE,Update interrupt enable" "0: Update interrupt disabled.,1: Update interrupt enabled."
|
|
group.word 0x10++0x1
|
|
line.word 0x0 "TIM4_SR,TIM4 status register"
|
|
bitfld.word 0x0 12. "CC4OF,Capture/Compare 4 overcapture flag" "0,1"
|
|
bitfld.word 0x0 11. "CC3OF,Capture/Compare 3 overcapture flag" "0,1"
|
|
newline
|
|
bitfld.word 0x0 10. "CC2OF,Capture/compare 2 overcapture flag" "0,1"
|
|
bitfld.word 0x0 9. "CC1OF,Capture/Compare 1 overcapture flag" "0: No overcapture has been detected.,1: The counter value has been captured in TIMx_CCR1.."
|
|
newline
|
|
bitfld.word 0x0 6. "TIF,Trigger interrupt flag" "0: No trigger event occurred.,1: Trigger interrupt pending."
|
|
bitfld.word 0x0 4. "CC4IF,Capture/Compare 4 interrupt flag" "0,1"
|
|
newline
|
|
bitfld.word 0x0 3. "CC3IF,Capture/Compare 3 interrupt flag" "0,1"
|
|
bitfld.word 0x0 2. "CC2IF,Capture/Compare 2 interrupt flag" "0,1"
|
|
newline
|
|
bitfld.word 0x0 1. "CC1IF,Capture/compare 1 interrupt flag" "0: No compare match / No input capture occurred,1: A compare match or an input capture occurred"
|
|
bitfld.word 0x0 0. "UIF,Update interrupt flag" "0: No update occurred,1: Update interrupt pending. This bit is set by.."
|
|
wgroup.word 0x14++0x1
|
|
line.word 0x0 "TIM4_EGR,TIM4 event generation register"
|
|
bitfld.word 0x0 6. "TG,Trigger generation" "0: No action,1: The TIF flag is set in TIMx_SR register. Related.."
|
|
bitfld.word 0x0 4. "CC4G,Capture/compare 4 generation" "0,1"
|
|
newline
|
|
bitfld.word 0x0 3. "CC3G,Capture/compare 3 generation" "0,1"
|
|
bitfld.word 0x0 2. "CC2G,Capture/compare 2 generation" "0,1"
|
|
newline
|
|
bitfld.word 0x0 1. "CC1G,Capture/compare 1 generation" "0: No action,1: A capture/compare event is generated on channel 1:"
|
|
bitfld.word 0x0 0. "UG,Update generation" "0: No action,1: Re-initialize the counter and generates an.."
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "TIM4_CCMR1,TIM4 capture/compare mode register 1"
|
|
hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter"
|
|
bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "CC2S,Capture/compare 2 selection" "0: CC2 channel is configured as output.,1: CC2 channel is configured as input IC2 is mapped..,2: CC2 channel is configured as input IC2 is mapped..,3: CC2 channel is configured as input IC2 is mapped.."
|
|
hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
|
|
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input IC1 is mapped..,2: CC1 channel is configured as input IC1 is mapped..,3: CC1 channel is configured as input IC1 is mapped.."
|
|
group.long 0x18++0x7
|
|
line.long 0x0 "TIM4_CCMR1_ALTERNATE,TIM4 capture/compare mode register 1"
|
|
bitfld.long 0x0 24. "OC2M_1,OC2M[3]" "0,1"
|
|
bitfld.long 0x0 16. "OC1M_1,OC1M[3]" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "OC2CE,Output compare 2 clear enable" "0,1"
|
|
bitfld.long 0x0 12.--14. "OC2M,OC2M[2:0]: Output compare 2 mode" "?,?,?,?,?,?,6: 4,?"
|
|
newline
|
|
bitfld.long 0x0 11. "OC2PE,Output compare 2 preload enable" "0,1"
|
|
bitfld.long 0x0 10. "OC2FE,Output compare 2 fast enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "CC2S,Capture/Compare 2 selection" "0: CC2 channel is configured as output,1: CC2 channel is configured as input IC2 is mapped..,2: CC2 channel is configured as input IC2 is mapped..,3: CC2 channel is configured as input IC2 is mapped.."
|
|
bitfld.long 0x0 7. "OC1CE,Output compare 1 clear enable" "0: OC1Ref is not affected by the ETRF input,1: OC1Ref is cleared as soon as a High level is.."
|
|
newline
|
|
bitfld.long 0x0 4.--6. "OC1M,OC1M[2:0]: Output compare 1 mode" "0: Frozen - The comparison between the output..,1: Set channel 1 to active level on match. OC1REF..,2: Set channel 1 to inactive level on match. OC1REF..,3: Toggle - OC1REF toggles when TIMx_CNT=TIMx_CCR1.,4: Force inactive level - OC1REF is forced low.,5: Force active level - OC1REF is forced high.,6: PWM mode 1 - In upcounting channel 1 is active..,7: PWM mode 2 - In upcounting channel 1 is inactive.."
|
|
bitfld.long 0x0 3. "OC1PE,Output compare 1 preload enable" "0: Preload register on TIMx_CCR1 disabled.,1: Preload register on TIMx_CCR1 enabled."
|
|
newline
|
|
bitfld.long 0x0 2. "OC1FE,Output compare 1 fast enable" "0: CC1 behaves normally depending on counter and..,1: An active edge on the trigger input acts like a.."
|
|
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output.,1: CC1 channel is configured as input IC1 is mapped..,2: CC1 channel is configured as input IC1 is mapped..,3: CC1 channel is configured as input IC1 is mapped.."
|
|
line.long 0x4 "TIM4_CCMR2,TIM4 capture/compare mode register 2"
|
|
hexmask.long.byte 0x4 12.--15. 1. "IC4F,Input capture 4 filter"
|
|
bitfld.long 0x4 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 8.--9. "CC4S,Capture/Compare 4 selection" "0: CC4 channel is configured as output,1: CC4 channel is configured as input IC4 is mapped..,2: CC4 channel is configured as input IC4 is mapped..,3: CC4 channel is configured as input IC4 is mapped.."
|
|
hexmask.long.byte 0x4 4.--7. 1. "IC3F,Input capture 3 filter"
|
|
newline
|
|
bitfld.long 0x4 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3"
|
|
bitfld.long 0x4 0.--1. "CC3S,Capture/Compare 3 selection" "0: CC3 channel is configured as output,1: CC3 channel is configured as input IC3 is mapped..,2: CC3 channel is configured as input IC3 is mapped..,3: CC3 channel is configured as input IC3 is mapped.."
|
|
group.long 0x1C++0x3
|
|
line.long 0x0 "TIM4_CCMR2_ALTERNATE,TIM4 capture/compare mode register 2"
|
|
bitfld.long 0x0 24. "OC4M_1,OC4M[3]" "0,1"
|
|
bitfld.long 0x0 16. "OC3M_1,OC3M[3]" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "OC4CE,Output compare 4 clear enable" "0,1"
|
|
bitfld.long 0x0 12.--14. "OC4M,OC4M[2:0]: Output compare 4 mode" "?,?,?,?,?,?,6: 4 in TIMx_CCMR1 register,?"
|
|
newline
|
|
bitfld.long 0x0 11. "OC4PE,Output compare 4 preload enable" "0,1"
|
|
bitfld.long 0x0 10. "OC4FE,Output compare 4 fast enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "CC4S,Capture/Compare 4 selection" "0: CC4 channel is configured as output,1: CC4 channel is configured as input IC4 is mapped..,2: CC4 channel is configured as input IC4 is mapped..,3: CC4 channel is configured as input IC4 is mapped.."
|
|
bitfld.long 0x0 7. "OC3CE,Output compare 3 clear enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4.--6. "OC3M,OC3M[2:0]: Output compare 3 mode" "?,?,?,?,?,?,6: 4 in TIMx_CCMR1 register,?"
|
|
bitfld.long 0x0 3. "OC3PE,Output compare 3 preload enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "OC3FE,Output compare 3 fast enable" "0,1"
|
|
bitfld.long 0x0 0.--1. "CC3S,Capture/Compare 3 selection" "0: CC3 channel is configured as output,1: CC3 channel is configured as input IC3 is mapped..,2: CC3 channel is configured as input IC3 is mapped..,3: CC3 channel is configured as input IC3 is mapped.."
|
|
group.word 0x20++0x1
|
|
line.word 0x0 "TIM4_CCER,TIM4 capture/compare enable register"
|
|
bitfld.word 0x0 15. "CC4NP,Capture/Compare 4 output Polarity." "0,1"
|
|
bitfld.word 0x0 13. "CC4P,Capture/Compare 4 output Polarity." "0,1"
|
|
newline
|
|
bitfld.word 0x0 12. "CC4E,Capture/Compare 4 output enable." "0,1"
|
|
bitfld.word 0x0 11. "CC3NP,Capture/Compare 3 output Polarity." "0,1"
|
|
newline
|
|
bitfld.word 0x0 9. "CC3P,Capture/Compare 3 output Polarity." "0,1"
|
|
bitfld.word 0x0 8. "CC3E,Capture/Compare 3 output enable." "0,1"
|
|
newline
|
|
bitfld.word 0x0 7. "CC2NP,Capture/Compare 2 output Polarity." "0,1"
|
|
bitfld.word 0x0 5. "CC2P,Capture/Compare 2 output Polarity." "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "CC2E,Capture/Compare 2 output enable." "0,1"
|
|
bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 output Polarity." "0,1"
|
|
newline
|
|
bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output Polarity." "0: This configuration is reserved,1: non-inverted/both edges"
|
|
bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable." "0: Capture mode disabled / OC1 is not active,1: Capture mode enabled / OC1 signal is output on.."
|
|
group.long 0x24++0x3
|
|
line.long 0x0 "TIM4_CNT,TIM4 counter"
|
|
hexmask.long 0x0 0.--31. 1. "CNT,Least significant part of counter value"
|
|
group.long 0x24++0x3
|
|
line.long 0x0 "TIM4_CNT_ALTERNATE,TIM4 counter"
|
|
bitfld.long 0x0 31. "UIFCPY,UIF Copy" "0,1"
|
|
hexmask.long 0x0 0.--30. 1. "CNT,Least significant part of counter value"
|
|
group.word 0x28++0x1
|
|
line.word 0x0 "TIM4_PSC,TIM4 prescaler"
|
|
hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value"
|
|
group.long 0x2C++0x3
|
|
line.long 0x0 "TIM4_ARR,TIM4 auto-reload register"
|
|
hexmask.long 0x0 0.--31. 1. "ARR,Low Auto-reload value"
|
|
group.long 0x34++0xF
|
|
line.long 0x0 "TIM4_CCR1,TIM4 capture/compare register 1"
|
|
hexmask.long 0x0 0.--31. 1. "CCR1,Low Capture/Compare 1 value"
|
|
line.long 0x4 "TIM4_CCR2,TIM4 capture/compare register 2"
|
|
hexmask.long 0x4 0.--31. 1. "CCR2,Low Capture/Compare 2 value"
|
|
line.long 0x8 "TIM4_CCR3,TIM4 capture/compare register 3"
|
|
hexmask.long 0x8 0.--31. 1. "CCR3,Low Capture/Compare value"
|
|
line.long 0xC "TIM4_CCR4,TIM4 capture/compare register 4"
|
|
hexmask.long 0xC 0.--31. 1. "CCR4,Low Capture/Compare value"
|
|
group.word 0x48++0x1
|
|
line.word 0x0 "TIM4_DCR,TIM4 DMA control register"
|
|
hexmask.word.byte 0x0 8.--12. 1. "DBL,DMA burst length"
|
|
hexmask.word.byte 0x0 0.--4. 1. "DBA,DMA base address"
|
|
group.word 0x4C++0x1
|
|
line.word 0x0 "TIM4_DMAR,TIM4 DMA address for full transfer"
|
|
hexmask.word 0x0 0.--15. 1. "DMAB,DMA register for burst accesses"
|
|
group.long 0x60++0x3
|
|
line.long 0x0 "TIM4_AF1,TIM4 alternate function option register 1"
|
|
hexmask.long.byte 0x0 14.--17. 1. "ETRSEL,ETR source selection"
|
|
group.long 0x68++0x3
|
|
line.long 0x0 "TIM4_TISEL,TIM4 timer input selection register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "TI4SEL,TI4[0] to TI4[15] input selection"
|
|
hexmask.long.byte 0x0 16.--19. 1. "TI3SEL,TI3[0] to TI3[15] input selection"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "TI2SEL,TI2[0] to TI2[15] input selection"
|
|
hexmask.long.byte 0x0 0.--3. 1. "TI1SEL,TI1[0] to TI1[15] input selection"
|
|
tree.end
|
|
tree "TIM5 (General Purpose Timer)"
|
|
base ad:0x40000C00
|
|
group.word 0x0++0x1
|
|
line.word 0x0 "TIM5_CR1,TIM5 control register 1"
|
|
bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "0: No remapping. UIF status bit is not copied to..,1: Remapping enabled. UIF status bit is copied to.."
|
|
bitfld.word 0x0 8.--9. "CKD,Clock division" "0: t<sub>DTS</sub> = t<sub>CK_INT</sub>,1: t<sub>DTS</sub> = 2 t<sub>CK_INT</sub>,2: t<sub>DTS</sub> = 4 t<sub>CK_INT</sub>,?"
|
|
newline
|
|
bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "0: TIMx_ARR register is not buffered,1: TIMx_ARR register is buffered"
|
|
bitfld.word 0x0 5.--6. "CMS,Center-aligned mode selection" "0: Edge-aligned mode. The counter counts up or down..,1: Center-aligned mode 1. The counter counts up and..,2: Center-aligned mode 2. The counter counts up and..,3: Center-aligned mode 3. The counter counts up and.."
|
|
newline
|
|
bitfld.word 0x0 4. "DIR,Direction" "0: Counter used as upcounter,1: Counter used as downcounter"
|
|
bitfld.word 0x0 3. "OPM,One-pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event.."
|
|
newline
|
|
bitfld.word 0x0 2. "URS,Update request source" "0: Any of the following events generate an update..,1: Only counter overflow/underflow generates an.."
|
|
bitfld.word 0x0 1. "UDIS,Update disable" "0: UEV enabled. The Update (UEV) event is generated..,1: UEV disabled. The Update event is not generated.."
|
|
newline
|
|
bitfld.word 0x0 0. "CEN,Counter enable" "0: Counter disabled,1: Counter enabled"
|
|
group.word 0x4++0x1
|
|
line.word 0x0 "TIM5_CR2,TIM5 control register 2"
|
|
bitfld.word 0x0 7. "TI1S,TI1 selection" "0: The TIMx_CH1 pin is connected to TI1 input,1: The TIMx_CH1 CH2 and CH3 pins are connected to.."
|
|
bitfld.word 0x0 4.--6. "MMS,Master mode selection" "0: Reset - the UG bit from the TIMx_EGR register is..,1: Enable - the Counter enable signal CNT_EN is..,2: Update - The update event is selected as trigger..,3: Compare Pulse - The trigger output send a..,4: Compare - OC1REFC signal is used as trigger..,5: Compare - OC2REFC signal is used as trigger..,6: Compare - OC3REFC signal is used as trigger..,7: Compare - OC4REFC signal is used as trigger.."
|
|
newline
|
|
bitfld.word 0x0 3. "CCDS,Capture/compare DMA selection" "0: CCx DMA request sent when CCx event occurs,1: CCx DMA requests sent when update event occurs"
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "TIM5_SMCR,TIM5 slave mode control register"
|
|
bitfld.long 0x0 20.--21. "TS_1,TS[4:3]" "0,1,2,3"
|
|
bitfld.long 0x0 16. "SMS_1,SMS[3]" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "ETP,External trigger polarity" "0: ETR is non-inverted active at high level or..,1: ETR is inverted active at low level or falling.."
|
|
bitfld.long 0x0 14. "ECE,External clock enable" "0: External clock mode 2 disabled,1: External clock mode 2 enabled. The counter is.."
|
|
newline
|
|
bitfld.long 0x0 12.--13. "ETPS,External trigger prescaler" "0: Prescaler OFF,1: ETRP frequency divided by 2,2: ETRP frequency divided by 4,3: ETRP frequency divided by 8"
|
|
hexmask.long.byte 0x0 8.--11. 1. "ETF,External trigger filter"
|
|
newline
|
|
bitfld.long 0x0 7. "MSM,Master/Slave mode" "0: No action,1: The effect of an event on the trigger input.."
|
|
bitfld.long 0x0 4.--6. "TS,TS[0]: Trigger selection" "0: Internal Trigger 0 (ITR0),1: Internal Trigger 1 (ITR1),2: Internal Trigger 2 (ITR2),3: Internal Trigger 3 (ITR3),4: TI1 Edge Detector (TI1F_ED),5: Filtered Timer Input 1 (TI1FP1),6: Filtered Timer Input 2 (TI2FP2),7: External Trigger input (ETRF)"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "SMS,SMS[0]: Slave mode selection" "0: Slave mode disabled - if CEN = 1 then the..,1: Encoder mode 1 - Counter counts up/down on..,2: Encoder mode 2 - Counter counts up/down on..,3: Encoder mode 3 - Counter counts up/down on both..,4: Reset Mode - Rising edge of the selected trigger..,5: Gated Mode - The counter clock is enabled when..,6: Trigger Mode - The counter starts at a rising..,7: External Clock Mode 1 - Rising edges of the.."
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "TIM5_DIER,TIM5 DMA/Interrupt enable register"
|
|
bitfld.word 0x0 14. "TDE,Trigger DMA request enable" "0: Trigger DMA request disabled.,1: Trigger DMA request enabled."
|
|
bitfld.word 0x0 12. "CC4DE,Capture/Compare 4 DMA request enable" "0: CC4 DMA request disabled.,1: CC4 DMA request enabled."
|
|
newline
|
|
bitfld.word 0x0 11. "CC3DE,Capture/Compare 3 DMA request enable" "0: CC3 DMA request disabled.,1: CC3 DMA request enabled."
|
|
bitfld.word 0x0 10. "CC2DE,Capture/Compare 2 DMA request enable" "0: CC2 DMA request disabled.,1: CC2 DMA request enabled."
|
|
newline
|
|
bitfld.word 0x0 9. "CC1DE,Capture/Compare 1 DMA request enable" "0: CC1 DMA request disabled.,1: CC1 DMA request enabled."
|
|
bitfld.word 0x0 8. "UDE,Update DMA request enable" "0: Update DMA request disabled.,1: Update DMA request enabled."
|
|
newline
|
|
bitfld.word 0x0 6. "TIE,Trigger interrupt enable" "0: Trigger interrupt disabled.,1: Trigger interrupt enabled."
|
|
bitfld.word 0x0 4. "CC4IE,Capture/Compare 4 interrupt enable" "0: CC4 interrupt disabled.,1: CC4 interrupt enabled."
|
|
newline
|
|
bitfld.word 0x0 3. "CC3IE,Capture/Compare 3 interrupt enable" "0: CC3 interrupt disabled.,1: CC3 interrupt enabled."
|
|
bitfld.word 0x0 2. "CC2IE,Capture/Compare 2 interrupt enable" "0: CC2 interrupt disabled.,1: CC2 interrupt enabled."
|
|
newline
|
|
bitfld.word 0x0 1. "CC1IE,Capture/Compare 1 interrupt enable" "0: CC1 interrupt disabled.,1: CC1 interrupt enabled."
|
|
bitfld.word 0x0 0. "UIE,Update interrupt enable" "0: Update interrupt disabled.,1: Update interrupt enabled."
|
|
group.word 0x10++0x1
|
|
line.word 0x0 "TIM5_SR,TIM5 status register"
|
|
bitfld.word 0x0 12. "CC4OF,Capture/Compare 4 overcapture flag" "0,1"
|
|
bitfld.word 0x0 11. "CC3OF,Capture/Compare 3 overcapture flag" "0,1"
|
|
newline
|
|
bitfld.word 0x0 10. "CC2OF,Capture/compare 2 overcapture flag" "0,1"
|
|
bitfld.word 0x0 9. "CC1OF,Capture/Compare 1 overcapture flag" "0: No overcapture has been detected.,1: The counter value has been captured in TIMx_CCR1.."
|
|
newline
|
|
bitfld.word 0x0 6. "TIF,Trigger interrupt flag" "0: No trigger event occurred.,1: Trigger interrupt pending."
|
|
bitfld.word 0x0 4. "CC4IF,Capture/Compare 4 interrupt flag" "0,1"
|
|
newline
|
|
bitfld.word 0x0 3. "CC3IF,Capture/Compare 3 interrupt flag" "0,1"
|
|
bitfld.word 0x0 2. "CC2IF,Capture/Compare 2 interrupt flag" "0,1"
|
|
newline
|
|
bitfld.word 0x0 1. "CC1IF,Capture/compare 1 interrupt flag" "0: No compare match / No input capture occurred,1: A compare match or an input capture occurred"
|
|
bitfld.word 0x0 0. "UIF,Update interrupt flag" "0: No update occurred,1: Update interrupt pending. This bit is set by.."
|
|
wgroup.word 0x14++0x1
|
|
line.word 0x0 "TIM5_EGR,TIM5 event generation register"
|
|
bitfld.word 0x0 6. "TG,Trigger generation" "0: No action,1: The TIF flag is set in TIMx_SR register. Related.."
|
|
bitfld.word 0x0 4. "CC4G,Capture/compare 4 generation" "0,1"
|
|
newline
|
|
bitfld.word 0x0 3. "CC3G,Capture/compare 3 generation" "0,1"
|
|
bitfld.word 0x0 2. "CC2G,Capture/compare 2 generation" "0,1"
|
|
newline
|
|
bitfld.word 0x0 1. "CC1G,Capture/compare 1 generation" "0: No action,1: A capture/compare event is generated on channel 1:"
|
|
bitfld.word 0x0 0. "UG,Update generation" "0: No action,1: Re-initialize the counter and generates an.."
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "TIM5_CCMR1,TIM5 capture/compare mode register 1"
|
|
hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter"
|
|
bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "CC2S,Capture/compare 2 selection" "0: CC2 channel is configured as output.,1: CC2 channel is configured as input IC2 is mapped..,2: CC2 channel is configured as input IC2 is mapped..,3: CC2 channel is configured as input IC2 is mapped.."
|
|
hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
|
|
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input IC1 is mapped..,2: CC1 channel is configured as input IC1 is mapped..,3: CC1 channel is configured as input IC1 is mapped.."
|
|
group.long 0x18++0x7
|
|
line.long 0x0 "TIM5_CCMR1_ALTERNATE,TIM5 capture/compare mode register 1"
|
|
bitfld.long 0x0 24. "OC2M_1,OC2M[3]" "0,1"
|
|
bitfld.long 0x0 16. "OC1M_1,OC1M[3]" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "OC2CE,Output compare 2 clear enable" "0,1"
|
|
bitfld.long 0x0 12.--14. "OC2M,OC2M[2:0]: Output compare 2 mode" "?,?,?,?,?,?,6: 4,?"
|
|
newline
|
|
bitfld.long 0x0 11. "OC2PE,Output compare 2 preload enable" "0,1"
|
|
bitfld.long 0x0 10. "OC2FE,Output compare 2 fast enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "CC2S,Capture/Compare 2 selection" "0: CC2 channel is configured as output,1: CC2 channel is configured as input IC2 is mapped..,2: CC2 channel is configured as input IC2 is mapped..,3: CC2 channel is configured as input IC2 is mapped.."
|
|
bitfld.long 0x0 7. "OC1CE,Output compare 1 clear enable" "0: OC1Ref is not affected by the ETRF input,1: OC1Ref is cleared as soon as a High level is.."
|
|
newline
|
|
bitfld.long 0x0 4.--6. "OC1M,OC1M[2:0]: Output compare 1 mode" "0: Frozen - The comparison between the output..,1: Set channel 1 to active level on match. OC1REF..,2: Set channel 1 to inactive level on match. OC1REF..,3: Toggle - OC1REF toggles when TIMx_CNT=TIMx_CCR1.,4: Force inactive level - OC1REF is forced low.,5: Force active level - OC1REF is forced high.,6: PWM mode 1 - In upcounting channel 1 is active..,7: PWM mode 2 - In upcounting channel 1 is inactive.."
|
|
bitfld.long 0x0 3. "OC1PE,Output compare 1 preload enable" "0: Preload register on TIMx_CCR1 disabled.,1: Preload register on TIMx_CCR1 enabled."
|
|
newline
|
|
bitfld.long 0x0 2. "OC1FE,Output compare 1 fast enable" "0: CC1 behaves normally depending on counter and..,1: An active edge on the trigger input acts like a.."
|
|
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output.,1: CC1 channel is configured as input IC1 is mapped..,2: CC1 channel is configured as input IC1 is mapped..,3: CC1 channel is configured as input IC1 is mapped.."
|
|
line.long 0x4 "TIM5_CCMR2,TIM5 capture/compare mode register 2"
|
|
hexmask.long.byte 0x4 12.--15. 1. "IC4F,Input capture 4 filter"
|
|
bitfld.long 0x4 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 8.--9. "CC4S,Capture/Compare 4 selection" "0: CC4 channel is configured as output,1: CC4 channel is configured as input IC4 is mapped..,2: CC4 channel is configured as input IC4 is mapped..,3: CC4 channel is configured as input IC4 is mapped.."
|
|
hexmask.long.byte 0x4 4.--7. 1. "IC3F,Input capture 3 filter"
|
|
newline
|
|
bitfld.long 0x4 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3"
|
|
bitfld.long 0x4 0.--1. "CC3S,Capture/Compare 3 selection" "0: CC3 channel is configured as output,1: CC3 channel is configured as input IC3 is mapped..,2: CC3 channel is configured as input IC3 is mapped..,3: CC3 channel is configured as input IC3 is mapped.."
|
|
group.long 0x1C++0x3
|
|
line.long 0x0 "TIM5_CCMR2_ALTERNATE,TIM5 capture/compare mode register 2"
|
|
bitfld.long 0x0 24. "OC4M_1,OC4M[3]" "0,1"
|
|
bitfld.long 0x0 16. "OC3M_1,OC3M[3]" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "OC4CE,Output compare 4 clear enable" "0,1"
|
|
bitfld.long 0x0 12.--14. "OC4M,OC4M[2:0]: Output compare 4 mode" "?,?,?,?,?,?,6: 4 in TIMx_CCMR1 register,?"
|
|
newline
|
|
bitfld.long 0x0 11. "OC4PE,Output compare 4 preload enable" "0,1"
|
|
bitfld.long 0x0 10. "OC4FE,Output compare 4 fast enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "CC4S,Capture/Compare 4 selection" "0: CC4 channel is configured as output,1: CC4 channel is configured as input IC4 is mapped..,2: CC4 channel is configured as input IC4 is mapped..,3: CC4 channel is configured as input IC4 is mapped.."
|
|
bitfld.long 0x0 7. "OC3CE,Output compare 3 clear enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4.--6. "OC3M,OC3M[2:0]: Output compare 3 mode" "?,?,?,?,?,?,6: 4 in TIMx_CCMR1 register,?"
|
|
bitfld.long 0x0 3. "OC3PE,Output compare 3 preload enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "OC3FE,Output compare 3 fast enable" "0,1"
|
|
bitfld.long 0x0 0.--1. "CC3S,Capture/Compare 3 selection" "0: CC3 channel is configured as output,1: CC3 channel is configured as input IC3 is mapped..,2: CC3 channel is configured as input IC3 is mapped..,3: CC3 channel is configured as input IC3 is mapped.."
|
|
group.word 0x20++0x1
|
|
line.word 0x0 "TIM5_CCER,TIM5 capture/compare enable register"
|
|
bitfld.word 0x0 15. "CC4NP,Capture/Compare 4 output Polarity." "0,1"
|
|
bitfld.word 0x0 13. "CC4P,Capture/Compare 4 output Polarity." "0,1"
|
|
newline
|
|
bitfld.word 0x0 12. "CC4E,Capture/Compare 4 output enable." "0,1"
|
|
bitfld.word 0x0 11. "CC3NP,Capture/Compare 3 output Polarity." "0,1"
|
|
newline
|
|
bitfld.word 0x0 9. "CC3P,Capture/Compare 3 output Polarity." "0,1"
|
|
bitfld.word 0x0 8. "CC3E,Capture/Compare 3 output enable." "0,1"
|
|
newline
|
|
bitfld.word 0x0 7. "CC2NP,Capture/Compare 2 output Polarity." "0,1"
|
|
bitfld.word 0x0 5. "CC2P,Capture/Compare 2 output Polarity." "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "CC2E,Capture/Compare 2 output enable." "0,1"
|
|
bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 output Polarity." "0,1"
|
|
newline
|
|
bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output Polarity." "0: This configuration is reserved,1: non-inverted/both edges"
|
|
bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable." "0: Capture mode disabled / OC1 is not active,1: Capture mode enabled / OC1 signal is output on.."
|
|
group.long 0x24++0x3
|
|
line.long 0x0 "TIM5_CNT,TIM5 counter"
|
|
hexmask.long 0x0 0.--31. 1. "CNT,Least significant part of counter value"
|
|
group.long 0x24++0x3
|
|
line.long 0x0 "TIM5_CNT_ALTERNATE,TIM5 counter"
|
|
bitfld.long 0x0 31. "UIFCPY,UIF Copy" "0,1"
|
|
hexmask.long 0x0 0.--30. 1. "CNT,Least significant part of counter value"
|
|
group.word 0x28++0x1
|
|
line.word 0x0 "TIM5_PSC,TIM5 prescaler"
|
|
hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value"
|
|
group.long 0x2C++0x3
|
|
line.long 0x0 "TIM5_ARR,TIM5 auto-reload register"
|
|
hexmask.long 0x0 0.--31. 1. "ARR,Low Auto-reload value"
|
|
group.long 0x34++0xF
|
|
line.long 0x0 "TIM5_CCR1,TIM5 capture/compare register 1"
|
|
hexmask.long 0x0 0.--31. 1. "CCR1,Low Capture/Compare 1 value"
|
|
line.long 0x4 "TIM5_CCR2,TIM5 capture/compare register 2"
|
|
hexmask.long 0x4 0.--31. 1. "CCR2,Low Capture/Compare 2 value"
|
|
line.long 0x8 "TIM5_CCR3,TIM5 capture/compare register 3"
|
|
hexmask.long 0x8 0.--31. 1. "CCR3,Low Capture/Compare value"
|
|
line.long 0xC "TIM5_CCR4,TIM5 capture/compare register 4"
|
|
hexmask.long 0xC 0.--31. 1. "CCR4,Low Capture/Compare value"
|
|
group.word 0x48++0x1
|
|
line.word 0x0 "TIM5_DCR,TIM5 DMA control register"
|
|
hexmask.word.byte 0x0 8.--12. 1. "DBL,DMA burst length"
|
|
hexmask.word.byte 0x0 0.--4. 1. "DBA,DMA base address"
|
|
group.word 0x4C++0x1
|
|
line.word 0x0 "TIM5_DMAR,TIM5 DMA address for full transfer"
|
|
hexmask.word 0x0 0.--15. 1. "DMAB,DMA register for burst accesses"
|
|
group.long 0x60++0x3
|
|
line.long 0x0 "TIM5_AF1,TIM5 alternate function option register 1"
|
|
hexmask.long.byte 0x0 14.--17. 1. "ETRSEL,ETR source selection"
|
|
group.long 0x68++0x3
|
|
line.long 0x0 "TIM5_TISEL,TIM5 timer input selection register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "TI4SEL,TI4[0] to TI4[15] input selection"
|
|
hexmask.long.byte 0x0 16.--19. 1. "TI3SEL,TI3[0] to TI3[15] input selection"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "TI2SEL,TI2[0] to TI2[15] input selection"
|
|
hexmask.long.byte 0x0 0.--3. 1. "TI1SEL,TI1[0] to TI1[15] input selection"
|
|
tree.end
|
|
tree "TIM6 (Basic Timer)"
|
|
base ad:0x40001000
|
|
group.word 0x0++0x1
|
|
line.word 0x0 "TIM6_CR1,TIM6 control register 1"
|
|
bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "0: No remapping. UIF status bit is not copied to..,1: Remapping enabled. UIF status bit is copied to.."
|
|
bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "0: TIMx_ARR register is not buffered.,1: TIMx_ARR register is buffered."
|
|
newline
|
|
bitfld.word 0x0 3. "OPM,One-pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event.."
|
|
bitfld.word 0x0 2. "URS,Update request source" "0: Any of the following events generates an update..,1: Only counter overflow/underflow generates an.."
|
|
newline
|
|
bitfld.word 0x0 1. "UDIS,Update disable" "0: UEV enabled. The Update (UEV) event is generated..,1: UEV disabled. The Update event is not generated.."
|
|
bitfld.word 0x0 0. "CEN,Counter enable" "0: Counter disabled,1: Counter enabled"
|
|
group.word 0x4++0x1
|
|
line.word 0x0 "TIM6_CR2,TIM6 control register 2"
|
|
bitfld.word 0x0 4.--6. "MMS,Master mode selection" "0: Reset - the UG bit from the TIMx_EGR register is..,1: Enable - the Counter enable signal CNT_EN is..,2: Update - The update event is selected as a..,?,?,?,?,?"
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "TIM6_DIER,TIM6 DMA/Interrupt enable register"
|
|
bitfld.word 0x0 8. "UDE,Update DMA request enable" "0: Update DMA request disabled.,1: Update DMA request enabled."
|
|
bitfld.word 0x0 0. "UIE,Update interrupt enable" "0: Update interrupt disabled.,1: Update interrupt enabled."
|
|
group.word 0x10++0x1
|
|
line.word 0x0 "TIM6_SR,TIM6 status register"
|
|
bitfld.word 0x0 0. "UIF,Update interrupt flag" "0: No update occurred.,1: Update interrupt pending. This bit is set by.."
|
|
wgroup.word 0x14++0x1
|
|
line.word 0x0 "TIM6_EGR,TIM6 event generation register"
|
|
bitfld.word 0x0 0. "UG,Update generation" "0: No action.,1: Re-initializes the timer counter and generates.."
|
|
group.long 0x24++0x3
|
|
line.long 0x0 "TIM6_CNT,TIM6 counter"
|
|
rbitfld.long 0x0 31. "UIFCPY,UIF Copy" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value"
|
|
group.word 0x28++0x1
|
|
line.word 0x0 "TIM6_PSC,TIM6 prescaler"
|
|
hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value"
|
|
group.word 0x2C++0x1
|
|
line.word 0x0 "TIM6_ARR,TIM6 auto-reload register"
|
|
hexmask.word 0x0 0.--15. 1. "ARR,Prescaler value"
|
|
tree.end
|
|
tree "TIM7 (Basic Timer)"
|
|
base ad:0x40001400
|
|
group.word 0x0++0x1
|
|
line.word 0x0 "TIM7_CR1,TIM7 control register 1"
|
|
bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "0: No remapping. UIF status bit is not copied to..,1: Remapping enabled. UIF status bit is copied to.."
|
|
bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "0: TIMx_ARR register is not buffered.,1: TIMx_ARR register is buffered."
|
|
newline
|
|
bitfld.word 0x0 3. "OPM,One-pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event.."
|
|
bitfld.word 0x0 2. "URS,Update request source" "0: Any of the following events generates an update..,1: Only counter overflow/underflow generates an.."
|
|
newline
|
|
bitfld.word 0x0 1. "UDIS,Update disable" "0: UEV enabled. The Update (UEV) event is generated..,1: UEV disabled. The Update event is not generated.."
|
|
bitfld.word 0x0 0. "CEN,Counter enable" "0: Counter disabled,1: Counter enabled"
|
|
group.word 0x4++0x1
|
|
line.word 0x0 "TIM7_CR2,TIM7 control register 2"
|
|
bitfld.word 0x0 4.--6. "MMS,Master mode selection" "0: Reset - the UG bit from the TIMx_EGR register is..,1: Enable - the Counter enable signal CNT_EN is..,2: Update - The update event is selected as a..,?,?,?,?,?"
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "TIM7_DIER,TIM7 DMA/Interrupt enable register"
|
|
bitfld.word 0x0 8. "UDE,Update DMA request enable" "0: Update DMA request disabled.,1: Update DMA request enabled."
|
|
bitfld.word 0x0 0. "UIE,Update interrupt enable" "0: Update interrupt disabled.,1: Update interrupt enabled."
|
|
group.word 0x10++0x1
|
|
line.word 0x0 "TIM7_SR,TIM7 status register"
|
|
bitfld.word 0x0 0. "UIF,Update interrupt flag" "0: No update occurred.,1: Update interrupt pending. This bit is set by.."
|
|
wgroup.word 0x14++0x1
|
|
line.word 0x0 "TIM7_EGR,TIM7 event generation register"
|
|
bitfld.word 0x0 0. "UG,Update generation" "0: No action.,1: Re-initializes the timer counter and generates.."
|
|
group.long 0x24++0x3
|
|
line.long 0x0 "TIM7_CNT,TIM7 counter"
|
|
rbitfld.long 0x0 31. "UIFCPY,UIF Copy" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value"
|
|
group.word 0x28++0x1
|
|
line.word 0x0 "TIM7_PSC,TIM7 prescaler"
|
|
hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value"
|
|
group.word 0x2C++0x1
|
|
line.word 0x0 "TIM7_ARR,TIM7 auto-reload register"
|
|
hexmask.word 0x0 0.--15. 1. "ARR,Prescaler value"
|
|
tree.end
|
|
tree "TIM8 (Advanced Control Timer)"
|
|
base ad:0x40013400
|
|
group.word 0x0++0x1
|
|
line.word 0x0 "TIM8_CR1,TIM8 control register 1"
|
|
bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "0: No remapping. UIF status bit is not copied to..,1: Remapping enabled. UIF status bit is copied to.."
|
|
bitfld.word 0x0 8.--9. "CKD,Clock division" "0: t<sub>DTS</sub>=t<sub>CK_INT</sub>,1: t<sub>DTS</sub>=2*t<sub>CK_INT</sub>,2: t<sub>DTS</sub>=4*t<sub>CK_INT</sub>,3: Reserved do not program this value"
|
|
newline
|
|
bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "0: TIMx_ARR register is not buffered,1: TIMx_ARR register is buffered"
|
|
bitfld.word 0x0 5.--6. "CMS,Center-aligned mode selection" "0: Edge-aligned mode. The counter counts up or down..,1: Center-aligned mode 1. The counter counts up and..,2: Center-aligned mode 2. The counter counts up and..,3: Center-aligned mode 3. The counter counts up and.."
|
|
newline
|
|
bitfld.word 0x0 4. "DIR,Direction" "0: Counter used as upcounter,1: Counter used as downcounter"
|
|
bitfld.word 0x0 3. "OPM,One pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event.."
|
|
newline
|
|
bitfld.word 0x0 2. "URS,Update request source" "0: Any of the following events generate an update..,1: Only counter overflow/underflow generates an.."
|
|
bitfld.word 0x0 1. "UDIS,Update disable" "0: UEV enabled. The Update (UEV) event is generated..,1: UEV disabled. The Update event is not generated.."
|
|
newline
|
|
bitfld.word 0x0 0. "CEN,Counter enable" "0: Counter disabled,1: Counter enabled"
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "TIM8_CR2,TIM8 control register 2"
|
|
hexmask.long.byte 0x0 20.--23. 1. "MMS2,Master mode selection 2"
|
|
bitfld.long 0x0 18. "OIS6,Output Idle state 6 (OC6 output)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "OIS5,Output Idle state 5 (OC5 output)" "0,1"
|
|
bitfld.long 0x0 14. "OIS4,Output Idle state 4 (OC4 output)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "OIS3N,Output Idle state 3 (OC3N output)" "0,1"
|
|
bitfld.long 0x0 12. "OIS3,Output Idle state 3 (OC3 output)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "OIS2N,Output Idle state 2 (OC2N output)" "0,1"
|
|
bitfld.long 0x0 10. "OIS2,Output Idle state 2 (OC2 output)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "OIS1N,Output Idle state 1 (OC1N output)" "0: OC1N=0 after a dead-time when MOE=0,1: OC1N=1 after a dead-time when MOE=0"
|
|
bitfld.long 0x0 8. "OIS1,Output Idle state 1 (OC1 output)" "0: OC1=0 (after a dead-time if OC1N is implemented)..,1: OC1=1 (after a dead-time if OC1N is implemented).."
|
|
newline
|
|
bitfld.long 0x0 7. "TI1S,TI1 selection" "0: The TIMx_CH1 pin is connected to TI1 input,1: The TIMx_CH1 CH2 and CH3 pins are connected to.."
|
|
bitfld.long 0x0 4.--6. "MMS,Master mode selection" "0: Reset - the UG bit from the TIMx_EGR register is..,1: Enable - the Counter Enable signal CNT_EN is..,2: Update - The update event is selected as trigger..,3: Compare Pulse - The trigger output send a..,4: Compare - OC1REFC signal is used as trigger..,5: Compare - OC2REFC signal is used as trigger..,6: Compare - OC3REFC signal is used as trigger..,7: Compare - OC4REFC signal is used as trigger.."
|
|
newline
|
|
bitfld.long 0x0 3. "CCDS,Capture/compare DMA selection" "0: CCx DMA request sent when CCx event occurs,1: CCx DMA requests sent when update event occurs"
|
|
bitfld.long 0x0 2. "CCUS,Capture/compare control update selection" "0: When capture/compare control bits are preloaded..,1: When capture/compare control bits are preloaded.."
|
|
newline
|
|
bitfld.long 0x0 0. "CCPC,Capture/compare preloaded control" "0: CCxE CCxNE and OCxM bits are not preloaded,1: CCxE CCxNE and OCxM bits are preloaded after.."
|
|
line.long 0x4 "TIM8_SMCR,TIM8 slave mode control register"
|
|
bitfld.long 0x4 20.--21. "TS_1,TS[4:3]" "0,1,2,3"
|
|
bitfld.long 0x4 16. "SMS_1,SMS[3]" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "ETP,External trigger polarity" "0: ETR is non-inverted active at high level or..,1: ETR is inverted active at low level or falling.."
|
|
bitfld.long 0x4 14. "ECE,External clock enable" "0: External clock mode 2 disabled,1: External clock mode 2 enabled. The counter is.."
|
|
newline
|
|
bitfld.long 0x4 12.--13. "ETPS,External trigger prescaler" "0: Prescaler OFF,1: ETRP frequency divided by 2,2: ETRP frequency divided by 4,3: ETRP frequency divided by 8"
|
|
hexmask.long.byte 0x4 8.--11. 1. "ETF,External trigger filter"
|
|
newline
|
|
bitfld.long 0x4 7. "MSM,Master/slave mode" "0: No action,1: The effect of an event on the trigger input.."
|
|
bitfld.long 0x4 4.--6. "TS,TS[0]: Trigger selection" "0: Internal Trigger 0 (ITR0),1: Internal Trigger 1 (ITR1),2: Internal Trigger 2 (ITR2),3: Internal Trigger 3 (ITR3),4: TI1 Edge Detector (TI1F_ED),5: Filtered Timer Input 1 (TI1FP1),6: Filtered Timer Input 2 (TI2FP2),7: External Trigger input (ETRF)"
|
|
newline
|
|
bitfld.long 0x4 0.--2. "SMS,SMS[0]: Slave mode selection" "0: Slave mode disabled - if CEN = 1 then the..,1: Encoder mode 1 - Counter counts up/down on..,2: Encoder mode 2 - Counter counts up/down on..,3: Encoder mode 3 - Counter counts up/down on both..,4: Reset Mode - Rising edge of the selected trigger..,5: Gated Mode - The counter clock is enabled when..,6: Trigger Mode - The counter starts at a rising..,7: External Clock Mode 1 - Rising edges of the.."
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "TIM8_DIER,TIM8 DMA/interrupt enable register"
|
|
bitfld.word 0x0 14. "TDE,Trigger DMA request enable" "0: Trigger DMA request disabled,1: Trigger DMA request enabled"
|
|
bitfld.word 0x0 13. "COMDE,COM DMA request enable" "0: COM DMA request disabled,1: COM DMA request enabled"
|
|
newline
|
|
bitfld.word 0x0 12. "CC4DE,Capture/Compare 4 DMA request enable" "0: CC4 DMA request disabled,1: CC4 DMA request enabled"
|
|
bitfld.word 0x0 11. "CC3DE,Capture/Compare 3 DMA request enable" "0: CC3 DMA request disabled,1: CC3 DMA request enabled"
|
|
newline
|
|
bitfld.word 0x0 10. "CC2DE,Capture/Compare 2 DMA request enable" "0: CC2 DMA request disabled,1: CC2 DMA request enabled"
|
|
bitfld.word 0x0 9. "CC1DE,Capture/Compare 1 DMA request enable" "0: CC1 DMA request disabled,1: CC1 DMA request enabled"
|
|
newline
|
|
bitfld.word 0x0 8. "UDE,Update DMA request enable" "0: Update DMA request disabled,1: Update DMA request enabled"
|
|
bitfld.word 0x0 7. "BIE,Break interrupt enable" "0: Break interrupt disabled,1: Break interrupt enabled"
|
|
newline
|
|
bitfld.word 0x0 6. "TIE,Trigger interrupt enable" "0: Trigger interrupt disabled,1: Trigger interrupt enabled"
|
|
bitfld.word 0x0 5. "COMIE,COM interrupt enable" "0: COM interrupt disabled,1: COM interrupt enabled"
|
|
newline
|
|
bitfld.word 0x0 4. "CC4IE,Capture/Compare 4 interrupt enable" "0: CC4 interrupt disabled,1: CC4 interrupt enabled"
|
|
bitfld.word 0x0 3. "CC3IE,Capture/Compare 3 interrupt enable" "0: CC3 interrupt disabled,1: CC3 interrupt enabled"
|
|
newline
|
|
bitfld.word 0x0 2. "CC2IE,Capture/Compare 2 interrupt enable" "0: CC2 interrupt disabled,1: CC2 interrupt enabled"
|
|
bitfld.word 0x0 1. "CC1IE,Capture/Compare 1 interrupt enable" "0: CC1 interrupt disabled,1: CC1 interrupt enabled"
|
|
newline
|
|
bitfld.word 0x0 0. "UIE,Update interrupt enable" "0: Update interrupt disabled,1: Update interrupt enabled"
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "TIM8_SR,TIM8 status register"
|
|
bitfld.long 0x0 17. "CC6IF,Compare 6 interrupt flag" "0,1"
|
|
bitfld.long 0x0 16. "CC5IF,Compare 5 interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "SBIF,System Break interrupt flag" "0: No break event occurred.,1: An active level has been detected on the system.."
|
|
bitfld.long 0x0 12. "CC4OF,Capture/Compare 4 overcapture flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "CC3OF,Capture/Compare 3 overcapture flag" "0,1"
|
|
bitfld.long 0x0 10. "CC2OF,Capture/Compare 2 overcapture flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "CC1OF,Capture/Compare 1 overcapture flag" "0: No overcapture has been detected.,1: The counter value has been captured in TIMx_CCR1.."
|
|
bitfld.long 0x0 8. "B2IF,Break 2 interrupt flag" "0: No break event occurred.,1: An active level has been detected on the break 2.."
|
|
newline
|
|
bitfld.long 0x0 7. "BIF,Break interrupt flag" "0: No break event occurred.,1: An active level has been detected on the break.."
|
|
bitfld.long 0x0 6. "TIF,Trigger interrupt flag" "0: No trigger event occurred.,1: Trigger interrupt pending."
|
|
newline
|
|
bitfld.long 0x0 5. "COMIF,COM interrupt flag" "0: No COM event occurred.,1: COM interrupt pending."
|
|
bitfld.long 0x0 4. "CC4IF,Capture/Compare 4 interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "CC3IF,Capture/Compare 3 interrupt flag" "0,1"
|
|
bitfld.long 0x0 2. "CC2IF,Capture/Compare 2 interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CC1IF,Capture/Compare 1 interrupt flag" "0: No compare match / No input capture occurred,1: A compare match or an input capture occurred."
|
|
bitfld.long 0x0 0. "UIF,Update interrupt flag" "0: No update occurred.,1: Update interrupt pending. This bit is set by.."
|
|
wgroup.word 0x14++0x1
|
|
line.word 0x0 "TIM8_EGR,TIM8 event generation register"
|
|
bitfld.word 0x0 8. "B2G,Break 2 generation" "0: No action,1: A break 2 event is generated. MOE bit is cleared.."
|
|
bitfld.word 0x0 7. "BG,Break generation" "0: No action,1: A break event is generated. MOE bit is cleared.."
|
|
newline
|
|
bitfld.word 0x0 6. "TG,Trigger generation" "0: No action,1: The TIF flag is set in TIMx_SR register. Related.."
|
|
bitfld.word 0x0 5. "COMG,Capture/Compare control update generation" "0: No action,1: When CCPC bit is set it allows CCxE CCxNE and.."
|
|
newline
|
|
bitfld.word 0x0 4. "CC4G,Capture/Compare 4 generation" "0,1"
|
|
bitfld.word 0x0 3. "CC3G,Capture/Compare 3 generation" "0,1"
|
|
newline
|
|
bitfld.word 0x0 2. "CC2G,Capture/Compare 2 generation" "0,1"
|
|
bitfld.word 0x0 1. "CC1G,Capture/Compare 1 generation" "0: No action,1: A capture/compare event is generated on channel 1:"
|
|
newline
|
|
bitfld.word 0x0 0. "UG,Update generation" "0: No action,1: Reinitialize the counter and generates an update.."
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "TIM8_CCMR1,TIM8 capture/compare mode register 1"
|
|
hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter"
|
|
bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "CC2S,Capture/Compare 2 selection" "0: CC2 channel is configured as output,1: CC2 channel is configured as input IC2 is mapped..,2: CC2 channel is configured as input IC2 is mapped..,3: CC2 channel is configured as input IC2 is mapped.."
|
|
hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
|
|
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 Selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input IC1 is mapped..,2: CC1 channel is configured as input IC1 is mapped..,3: CC1 channel is configured as input IC1 is mapped.."
|
|
group.long 0x18++0x7
|
|
line.long 0x0 "TIM8_CCMR1_ALTERNATE,TIM8 capture/compare mode register 1"
|
|
bitfld.long 0x0 24. "OC2M_1,OC2M[3]" "0,1"
|
|
bitfld.long 0x0 16. "OC1M_1,OC1M[3]" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "OC2CE,Output Compare 2 clear enable" "0,1"
|
|
bitfld.long 0x0 12.--14. "OC2M,OC2M[2:0]: Output Compare 2 mode" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 11. "OC2PE,Output Compare 2 preload enable" "0,1"
|
|
bitfld.long 0x0 10. "OC2FE,Output Compare 2 fast enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "CC2S,Capture/Compare 2 selection" "0: CC2 channel is configured as output,1: CC2 channel is configured as input IC2 is mapped..,2: CC2 channel is configured as input IC2 is mapped..,3: CC2 channel is configured as input IC2 is mapped.."
|
|
bitfld.long 0x0 7. "OC1CE,Output Compare 1 clear enable" "0: OC1Ref is not affected by the ETRF input,1: OC1Ref is cleared as soon as a High level is.."
|
|
newline
|
|
bitfld.long 0x0 4.--6. "OC1M,OC1M[2:0]: Output Compare 1 mode" "0: Frozen - The comparison between the output..,1: Set channel 1 to active level on match. OC1REF..,2: Set channel 1 to inactive level on match. OC1REF..,3: Toggle - OC1REF toggles when TIMx_CNT=TIMx_CCR1.,4: Force inactive level - OC1REF is forced low.,5: Force active level - OC1REF is forced high.,6: PWM mode 1 - In upcounting channel 1 is active..,7: PWM mode 2 - In upcounting channel 1 is inactive.."
|
|
bitfld.long 0x0 3. "OC1PE,Output Compare 1 preload enable" "0: Preload register on TIMx_CCR1 disabled.,1: Preload register on TIMx_CCR1 enabled."
|
|
newline
|
|
bitfld.long 0x0 2. "OC1FE,Output Compare 1 fast enable" "0: CC1 behaves normally depending on counter and..,1: An active edge on the trigger input acts like a.."
|
|
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input IC1 is mapped..,2: CC1 channel is configured as input IC1 is mapped..,3: CC1 channel is configured as input IC1 is mapped.."
|
|
line.long 0x4 "TIM8_CCMR2,TIM8 capture/compare mode register 2"
|
|
hexmask.long.byte 0x4 12.--15. 1. "IC4F,Input capture 4 filter"
|
|
bitfld.long 0x4 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 8.--9. "CC4S,Capture/Compare 4 selection" "0: CC4 channel is configured as output,1: CC4 channel is configured as input IC4 is mapped..,2: CC4 channel is configured as input IC4 is mapped..,3: CC4 channel is configured as input IC4 is mapped.."
|
|
hexmask.long.byte 0x4 4.--7. 1. "IC3F,Input capture 3 filter"
|
|
newline
|
|
bitfld.long 0x4 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3"
|
|
bitfld.long 0x4 0.--1. "CC3S,Capture/compare 3 selection" "0: CC3 channel is configured as output,1: CC3 channel is configured as input IC3 is mapped..,2: CC3 channel is configured as input IC3 is mapped..,3: CC3 channel is configured as input IC3 is mapped.."
|
|
group.long 0x1C++0xB
|
|
line.long 0x0 "TIM8_CCMR2_ALTERNATE,TIM8 capture/compare mode register 2"
|
|
bitfld.long 0x0 24. "OC4M_1,OC4M[3]" "0,1"
|
|
bitfld.long 0x0 16. "OC3M_1,OC3M[3]" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "OC4CE,Output compare 4 clear enable" "0,1"
|
|
bitfld.long 0x0 12.--14. "OC4M,OC4M[2:0]: Output compare 4 mode" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 11. "OC4PE,Output compare 4 preload enable" "0,1"
|
|
bitfld.long 0x0 10. "OC4FE,Output compare 4 fast enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "CC4S,Capture/Compare 4 selection" "0: CC4 channel is configured as output,1: CC4 channel is configured as input IC4 is mapped..,2: CC4 channel is configured as input IC4 is mapped..,3: CC4 channel is configured as input IC4 is mapped.."
|
|
bitfld.long 0x0 7. "OC3CE,Output compare 3 clear enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4.--6. "OC3M,OC3M[2:0]: Output compare 3 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 3. "OC3PE,Output compare 3 preload enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "OC3FE,Output compare 3 fast enable" "0,1"
|
|
bitfld.long 0x0 0.--1. "CC3S,Capture/Compare 3 selection" "0: CC3 channel is configured as output,1: CC3 channel is configured as input IC3 is mapped..,2: CC3 channel is configured as input IC3 is mapped..,3: CC3 channel is configured as input IC3 is mapped.."
|
|
line.long 0x4 "TIM8_CCER,TIM8 capture/compare enable register"
|
|
bitfld.long 0x4 21. "CC6P,Capture/Compare 6 output polarity" "0,1"
|
|
bitfld.long 0x4 20. "CC6E,Capture/Compare 6 output enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "CC5P,Capture/Compare 5 output polarity" "0,1"
|
|
bitfld.long 0x4 16. "CC5E,Capture/Compare 5 output enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "CC4NP,Capture/Compare 4 complementary output polarity" "0,1"
|
|
bitfld.long 0x4 13. "CC4P,Capture/Compare 4 output polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "CC4E,Capture/Compare 4 output enable" "0,1"
|
|
bitfld.long 0x4 11. "CC3NP,Capture/Compare 3 complementary output polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "CC3NE,Capture/Compare 3 complementary output enable" "0,1"
|
|
bitfld.long 0x4 9. "CC3P,Capture/Compare 3 output polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "CC3E,Capture/Compare 3 output enable" "0,1"
|
|
bitfld.long 0x4 7. "CC2NP,Capture/Compare 2 complementary output polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "CC2NE,Capture/Compare 2 complementary output enable" "0,1"
|
|
bitfld.long 0x4 5. "CC2P,Capture/Compare 2 output polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "CC2E,Capture/Compare 2 output enable" "0,1"
|
|
bitfld.long 0x4 3. "CC1NP,Capture/Compare 1 complementary output polarity" "0: OC1N active high.,1: OC1N active low."
|
|
newline
|
|
bitfld.long 0x4 2. "CC1NE,Capture/Compare 1 complementary output enable" "0: Off - OC1N is not active. OC1N level is then..,1: On - OC1N signal is output on the corresponding.."
|
|
bitfld.long 0x4 1. "CC1P,Capture/Compare 1 output polarity" "0: The configuration is reserved,1: non-inverted/both edges/ The circuit is.."
|
|
newline
|
|
bitfld.long 0x4 0. "CC1E,Capture/Compare 1 output enable" "0: Capture mode disabled / OC1 is not active (see..,1: Capture mode enabled / OC1 signal is output on.."
|
|
line.long 0x8 "TIM8_CNT,TIM8 counter"
|
|
rbitfld.long 0x8 31. "UIFCPY,UIF copy" "0,1"
|
|
hexmask.long.word 0x8 0.--15. 1. "CNT,Counter value"
|
|
group.word 0x28++0x1
|
|
line.word 0x0 "TIM8_PSC,TIM8 prescaler"
|
|
hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value"
|
|
group.word 0x2C++0x1
|
|
line.word 0x0 "TIM8_ARR,TIM8 auto-reload register"
|
|
hexmask.word 0x0 0.--15. 1. "ARR,Auto-reload value"
|
|
group.word 0x30++0x1
|
|
line.word 0x0 "TIM8_RCR,TIM8 repetition counter register"
|
|
hexmask.word 0x0 0.--15. 1. "REP,Repetition counter value"
|
|
group.word 0x34++0x1
|
|
line.word 0x0 "TIM8_CCR1,TIM8 capture/compare register 1"
|
|
hexmask.word 0x0 0.--15. 1. "CCR1,Capture/Compare 1 value"
|
|
group.word 0x38++0x1
|
|
line.word 0x0 "TIM8_CCR2,TIM8 capture/compare register 2"
|
|
hexmask.word 0x0 0.--15. 1. "CCR2,Capture/Compare 2 value"
|
|
group.word 0x3C++0x1
|
|
line.word 0x0 "TIM8_CCR3,TIM8 capture/compare register 3"
|
|
hexmask.word 0x0 0.--15. 1. "CCR3,Capture/Compare value"
|
|
group.word 0x40++0x1
|
|
line.word 0x0 "TIM8_CCR4,TIM8 capture/compare register 4"
|
|
hexmask.word 0x0 0.--15. 1. "CCR4,Capture/Compare value"
|
|
group.long 0x44++0x3
|
|
line.long 0x0 "TIM8_BDTR,TIM8 break and dead-time register"
|
|
bitfld.long 0x0 25. "BK2P,Break 2 polarity" "0: Break input BRK2 is active low,1: Break input BRK2 is active high"
|
|
bitfld.long 0x0 24. "BK2E,Break 2 enable" "0: Break2 function disabled,1: Break2 function enabled"
|
|
newline
|
|
hexmask.long.byte 0x0 20.--23. 1. "BK2F,Break 2 filter"
|
|
hexmask.long.byte 0x0 16.--19. 1. "BKF,Break filter"
|
|
newline
|
|
bitfld.long 0x0 15. "MOE,Main output enable" "0: OC and OCN outputs are disabled or forced to..,1: OC and OCN outputs are enabled if their.."
|
|
bitfld.long 0x0 14. "AOE,Automatic output enable" "0: MOE can be set only by software,1: MOE can be set by software or automatically at.."
|
|
newline
|
|
bitfld.long 0x0 13. "BKP,Break polarity" "0: Break input BRK is active low,1: Break input BRK is active high"
|
|
bitfld.long 0x0 12. "BKE,Break enable" "0: Break function disabled,1: Break function enabled"
|
|
newline
|
|
bitfld.long 0x0 11. "OSSR,Off-state selection for Run mode" "0: When inactive OC/OCN outputs are disabled (the..,1: When inactive OC/OCN outputs are enabled with.."
|
|
bitfld.long 0x0 10. "OSSI,Off-state selection for Idle mode" "0: When inactive OC/OCN outputs are disabled (the..,1: When inactive OC/OCN outputs are first forced.."
|
|
newline
|
|
bitfld.long 0x0 8.--9. "LOCK,Lock configuration" "0: LOCK OFF - No bit is write protected.,1: LOCK Level 1 = DTG bits in TIMx_BDTR register..,2: LOCK Level 2 = LOCK Level 1 + CC Polarity bits..,3: LOCK Level 3 = LOCK Level 2 + CC Control bits.."
|
|
hexmask.long.byte 0x0 0.--7. 1. "DTG,Dead-time generator setup"
|
|
group.word 0x48++0x1
|
|
line.word 0x0 "TIM8_DCR,TIM8 DMA control register"
|
|
hexmask.word.byte 0x0 8.--12. 1. "DBL,DMA burst length"
|
|
hexmask.word.byte 0x0 0.--4. 1. "DBA,DMA base address"
|
|
group.long 0x4C++0x3
|
|
line.long 0x0 "TIM8_DMAR,TIM8 DMA address for full transfer"
|
|
hexmask.long 0x0 0.--31. 1. "DMAB,DMA register for burst accesses"
|
|
group.long 0x54++0x7
|
|
line.long 0x0 "TIM8_CCMR3,TIM8 capture/compare mode register 3"
|
|
bitfld.long 0x0 24. "OC6M_1,OC6M[3]" "0,1"
|
|
bitfld.long 0x0 16. "OC5M_1,OC5M[3]" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "OC6CE,Output compare 6 clear enable" "0,1"
|
|
bitfld.long 0x0 12.--14. "OC6M,OC6M[0]: Output compare 6 mode" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 11. "OC6PE,Output compare 6 preload enable" "0,1"
|
|
bitfld.long 0x0 10. "OC6FE,Output compare 6 fast enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "OC5CE,Output compare 5 clear enable" "0,1"
|
|
bitfld.long 0x0 4.--6. "OC5M,OC5M[0]: Output compare 5 mode" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 3. "OC5PE,Output compare 5 preload enable" "0,1"
|
|
bitfld.long 0x0 2. "OC5FE,Output compare 5 fast enable" "0,1"
|
|
line.long 0x4 "TIM8_CCR5,TIM8 capture/compare register 5"
|
|
bitfld.long 0x4 31. "GC5C3,Group Channel 5 and Channel 3" "0: No effect of OC5REF on OC3REFC,1: OC3REFC is the logical AND of OC3REFC and OC5REF"
|
|
bitfld.long 0x4 30. "GC5C2,Group Channel 5 and Channel 2" "0: No effect of OC5REF on OC2REFC,1: OC2REFC is the logical AND of OC2REFC and OC5REF"
|
|
newline
|
|
bitfld.long 0x4 29. "GC5C1,Group Channel 5 and Channel 1" "0: No effect of OC5REF on OC1REFC5,1: OC1REFC is the logical AND of OC1REFC and OC5REF"
|
|
hexmask.long.word 0x4 0.--15. 1. "CCR5,Capture/Compare 5 value"
|
|
group.word 0x5C++0x1
|
|
line.word 0x0 "TIM8_CCR6,TIM8 capture/compare register 6"
|
|
hexmask.word 0x0 0.--15. 1. "CCR6,Capture/Compare 6 value"
|
|
group.long 0x60++0xB
|
|
line.long 0x0 "TIM8_AF1,TIM8 Alternate function option register 1"
|
|
hexmask.long.byte 0x0 14.--17. 1. "ETRSEL,ETR source selection"
|
|
bitfld.long 0x0 11. "BKCMP2P,BRK COMP2 input polarity" "0: COMP2 input polarity is not inverted (active low..,1: COMP2 input polarity is inverted (active high if.."
|
|
newline
|
|
bitfld.long 0x0 10. "BKCMP1P,BRK COMP1 input polarity" "0: COMP1 input polarity is not inverted (active low..,1: COMP1 input polarity is inverted (active high if.."
|
|
bitfld.long 0x0 9. "BKINP,BRK BKIN input polarity" "0: BKIN input polarity is not inverted (active low..,1: BKIN input polarity is inverted (active high if.."
|
|
newline
|
|
bitfld.long 0x0 8. "BKDF1BK2E,BRK dfsdm1_break[2] enable" "0: dfsdm1_break[2] input disabled,1: dfsdm1_break[2] input enabled"
|
|
bitfld.long 0x0 2. "BKCMP2E,BRK COMP2 enable" "0: COMP2 input disabled,1: COMP2 input enabled"
|
|
newline
|
|
bitfld.long 0x0 1. "BKCMP1E,BRK COMP1 enable" "0: COMP1 input disabled,1: COMP1 input enabled"
|
|
bitfld.long 0x0 0. "BKINE,BRK BKIN input enable" "0: BKIN input disabled,1: BKIN input enabled"
|
|
line.long 0x4 "TIM8_AF2,TIM8 Alternate function option register 2"
|
|
bitfld.long 0x4 11. "BK2CMP2P,BRK2 COMP2 input polarity" "0: COMP2 input polarity is not inverted (active low..,1: COMP2 input polarity is inverted (active high if.."
|
|
bitfld.long 0x4 10. "BK2CMP1P,BRK2 COMP1 input polarity" "0: COMP1 input polarity is not inverted (active low..,1: COMP1 input polarity is inverted (active high if.."
|
|
newline
|
|
bitfld.long 0x4 9. "BK2INP,BRK2 BKIN2 input polarity" "0: BKIN2 input polarity is not inverted (active low..,1: BKIN2 input polarity is inverted (active high if.."
|
|
bitfld.long 0x4 8. "BK2DF1BK3E,BRK2 dfsdm1_break[3] enable" "0: dfsdm1_break[3] input disabled,1: dfsdm1_break[3] input enabled"
|
|
newline
|
|
bitfld.long 0x4 2. "BK2CMP2E,BRK2 COMP2 enable" "0: COMP2 input disabled,1: COMP2 input enabled"
|
|
bitfld.long 0x4 1. "BK2CMP1E,BRK2 COMP1 enable" "0: COMP1 input disabled,1: COMP1 input enabled"
|
|
newline
|
|
bitfld.long 0x4 0. "BK2INE,BRK2 BKIN input enable" "0: BKIN2 input disabled,1: BKIN2 input enabled"
|
|
line.long 0x8 "TIM8_TISEL,TIM8 timer input selection register"
|
|
hexmask.long.byte 0x8 24.--27. 1. "TI4SEL,selects TI4[0] to TI4[15] input"
|
|
hexmask.long.byte 0x8 16.--19. 1. "TI3SEL,selects TI3[0] to TI3[15] input"
|
|
newline
|
|
hexmask.long.byte 0x8 8.--11. 1. "TI2SEL,selects TI2[0] to TI2[15] input"
|
|
hexmask.long.byte 0x8 0.--3. 1. "TI1SEL,selects TI1[0] to TI1[15] input"
|
|
tree.end
|
|
tree "TIM15 (General Purpose Timer)"
|
|
base ad:0x40014000
|
|
group.word 0x0++0x1
|
|
line.word 0x0 "TIM15_CR1,TIM15 control register 1"
|
|
bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "0: No remapping. UIF status bit is not copied to..,1: Remapping enabled. UIF status bit is copied to.."
|
|
bitfld.word 0x0 8.--9. "CKD,Clock division" "0: t<sub>DTS </sub>= t<sub>CK_INT</sub>,1: t<sub>DTS</sub> = 2 * t<sub>CK_INT</sub>,2: t<sub>DTS</sub> = 4 * t<sub>CK_INT</sub>,3: Reserved do not program this value"
|
|
newline
|
|
bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "0: TIMx_ARR register is not buffered,1: TIMx_ARR register is buffered"
|
|
bitfld.word 0x0 3. "OPM,One-pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event.."
|
|
newline
|
|
bitfld.word 0x0 2. "URS,Update request source" "0: Any of the following events generate an update..,1: Only counter overflow/underflow generates an.."
|
|
bitfld.word 0x0 1. "UDIS,Update disable" "0: UEV enabled. The Update (UEV) event is generated..,1: UEV disabled. The Update event is not generated.."
|
|
newline
|
|
bitfld.word 0x0 0. "CEN,Counter enable" "0: Counter disabled,1: Counter enabled"
|
|
group.word 0x4++0x1
|
|
line.word 0x0 "TIM15_CR2,TIM15 control register 2"
|
|
bitfld.word 0x0 10. "OIS2,Output idle state 2 (OC2 output)" "0: OC2=0 when MOE=0,1: OC2=1 when MOE=0"
|
|
bitfld.word 0x0 9. "OIS1N,Output Idle state 1 (OC1N output)" "0: OC1N=0 after a dead-time when MOE=0,1: OC1N=1 after a dead-time when MOE=0"
|
|
newline
|
|
bitfld.word 0x0 8. "OIS1,Output Idle state 1 (OC1 output)" "0: OC1=0 (after a dead-time if OC1N is implemented)..,1: OC1=1 (after a dead-time if OC1N is implemented).."
|
|
bitfld.word 0x0 7. "TI1S,TI1 selection" "0: The TIMx_CH1 pin is connected to TI1 input,1: The TIMx_CH1 CH2 pins are connected to the TI1.."
|
|
newline
|
|
bitfld.word 0x0 4.--6. "MMS,Master mode selection" "0: Reset - the UG bit from the TIMx_EGR register is..,1: Enable - the Counter Enable signal CNT_EN is..,2: Update - The update event is selected as trigger..,3: Compare Pulse - The trigger output send a..,4: Compare - OC1REFC signal is used as trigger..,5: Compare - OC2REFC signal is used as trigger..,?,?"
|
|
bitfld.word 0x0 3. "CCDS,Capture/compare DMA selection" "0: CCx DMA request sent when CCx event occurs,1: CCx DMA requests sent when update event occurs"
|
|
newline
|
|
bitfld.word 0x0 2. "CCUS,Capture/compare control update selection" "0: When capture/compare control bits are preloaded..,1: When capture/compare control bits are preloaded.."
|
|
bitfld.word 0x0 0. "CCPC,Capture/compare preloaded control" "0: CCxE CCxNE and OCxM bits are not preloaded,1: CCxE CCxNE and OCxM bits are preloaded after.."
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "TIM15_SMCR,TIM15 slave mode control register"
|
|
bitfld.long 0x0 20.--21. "TS_1,TS[4:3]" "0,1,2,3"
|
|
bitfld.long 0x0 16. "SMS_1,SMS[3]" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "MSM,Master/slave mode" "0: No action,1: The effect of an event on the trigger input.."
|
|
bitfld.long 0x0 4.--6. "TS,TS[0]: Trigger selection" "0: Internal Trigger 0 (ITR0),1: Internal Trigger 1 (ITR1),2: Internal Trigger 2 (ITR2),3: Internal Trigger 3 (ITR3),4: TI1 Edge Detector (TI1F_ED),5: Filtered Timer Input 1 (TI1FP1),6: Filtered Timer Input 2 (TI2FP2),?"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "SMS,SMS[0]: Slave mode selection" "0: Slave mode disabled - if CEN = 1 then the..,?,?,?,4: Reset Mode - Rising edge of the selected trigger..,5: Gated Mode - The counter clock is enabled when..,6: Trigger Mode - The counter starts at a rising..,7: External Clock Mode 1 - Rising edges of the.."
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "TIM15_DIER,TIM15 DMA/interrupt enable register"
|
|
bitfld.word 0x0 14. "TDE,Trigger DMA request enable" "0: Trigger DMA request disabled,1: Trigger DMA request enabled"
|
|
bitfld.word 0x0 13. "COMDE,COM DMA request enable" "0: COM DMA request disabled,1: COM DMA request enabled"
|
|
newline
|
|
bitfld.word 0x0 9. "CC1DE,Capture/Compare 1 DMA request enable" "0: CC1 DMA request disabled,1: CC1 DMA request enabled"
|
|
bitfld.word 0x0 8. "UDE,Update DMA request enable" "0: Update DMA request disabled,1: Update DMA request enabled"
|
|
newline
|
|
bitfld.word 0x0 7. "BIE,Break interrupt enable" "0: Break interrupt disabled,1: Break interrupt enabled"
|
|
bitfld.word 0x0 6. "TIE,Trigger interrupt enable" "0: Trigger interrupt disabled,1: Trigger interrupt enabled"
|
|
newline
|
|
bitfld.word 0x0 5. "COMIE,COM interrupt enable" "0: COM interrupt disabled,1: COM interrupt enabled"
|
|
bitfld.word 0x0 2. "CC2IE,Capture/Compare 2 interrupt enable" "0: CC2 interrupt disabled,1: CC2 interrupt enabled"
|
|
newline
|
|
bitfld.word 0x0 1. "CC1IE,Capture/Compare 1 interrupt enable" "0: CC1 interrupt disabled,1: CC1 interrupt enabled"
|
|
bitfld.word 0x0 0. "UIE,Update interrupt enable" "0: Update interrupt disabled,1: Update interrupt enabled"
|
|
group.word 0x10++0x1
|
|
line.word 0x0 "TIM15_SR,TIM15 status register"
|
|
bitfld.word 0x0 10. "CC2OF,Capture/Compare 2 overcapture flag" "0,1"
|
|
bitfld.word 0x0 9. "CC1OF,Capture/Compare 1 overcapture flag" "0: No overcapture has been detected,1: The counter value has been captured in TIMx_CCR1.."
|
|
newline
|
|
bitfld.word 0x0 7. "BIF,Break interrupt flag" "0: No break event occurred,1: An active level has been detected on the break.."
|
|
bitfld.word 0x0 6. "TIF,Trigger interrupt flag" "0: No trigger event occurred,1: Trigger interrupt pending"
|
|
newline
|
|
bitfld.word 0x0 5. "COMIF,COM interrupt flag" "0: No COM event occurred,1: COM interrupt pending"
|
|
bitfld.word 0x0 2. "CC2IF,Capture/Compare 2 interrupt flag" "0,1"
|
|
newline
|
|
bitfld.word 0x0 1. "CC1IF,Capture/Compare 1 interrupt flag" "0: No compare match / No input capture occurred,1: A compare match or an input capture occurred"
|
|
bitfld.word 0x0 0. "UIF,Update interrupt flag" "0: No update occurred.,1: Update interrupt pending. This bit is set by.."
|
|
group.word 0x14++0x1
|
|
line.word 0x0 "TIM15_EGR,TIM15 event generation register"
|
|
bitfld.word 0x0 7. "BG,Break generation" "0: No action,1: A break event is generated. MOE bit is cleared.."
|
|
bitfld.word 0x0 6. "TG,Trigger generation" "0: No action,1: The TIF flag is set in TIMx_SR register. Related.."
|
|
newline
|
|
bitfld.word 0x0 5. "COMG,Capture/Compare control update generation" "0: No action,1: When the CCPC bit is set it is possible to.."
|
|
bitfld.word 0x0 2. "CC2G,Capture/Compare 2 generation" "0,1"
|
|
newline
|
|
bitfld.word 0x0 1. "CC1G,Capture/Compare 1 generation" "0: No action,1: A capture/compare event is generated on channel 1:"
|
|
bitfld.word 0x0 0. "UG,Update generation" "0: No action,1: Reinitialize the counter and generates an update.."
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "TIM15_CCMR1,TIM15 capture/compare mode register 1"
|
|
hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter"
|
|
bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "CC2S,Capture/Compare 2 selection" "0: CC2 channel is configured as output,1: CC2 channel is configured as input IC2 is mapped..,2: CC2 channel is configured as input IC2 is mapped..,3: CC2 channel is configured as input IC2 is mapped.."
|
|
hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
|
|
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 Selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input IC1 is mapped..,2: CC1 channel is configured as input IC1 is mapped..,3: CC1 channel is configured as input IC1 is mapped.."
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "TIM15_CCMR1_ALTERNATE,TIM15 capture/compare mode register 1"
|
|
bitfld.long 0x0 24. "OC2M_1,OC2M[3]" "0,1"
|
|
bitfld.long 0x0 16. "OC1M_1,OC1M[3]" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12.--14. "OC2M,OC2M[2:0]: Output Compare 2 mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 11. "OC2PE,Output Compare 2 preload enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "OC2FE,Output Compare 2 fast enable" "0,1"
|
|
bitfld.long 0x0 8.--9. "CC2S,Capture/Compare 2 selection" "0: CC2 channel is configured as output.,1: CC2 channel is configured as input IC2 is mapped..,2: CC2 channel is configured as input IC2 is mapped..,3: CC2 channel is configured as input IC2 is mapped.."
|
|
newline
|
|
bitfld.long 0x0 4.--6. "OC1M,OC1M[2:0]: Output Compare 1 mode" "0: Frozen - The comparison between the output..,1: Set channel 1 to active level on match. OC1REF..,2: Set channel 1 to inactive level on match. OC1REF..,3: Toggle - OC1REF toggles when TIMx_CNT=TIMx_CCR1.,4: Force inactive level - OC1REF is forced low.,5: Force active level - OC1REF is forced high.,6: PWM mode 1 - Channel 1 is active as long as..,7: PWM mode 2 - Channel 1 is inactive as long as.."
|
|
bitfld.long 0x0 3. "OC1PE,Output Compare 1 preload enable" "0: Preload register on TIMx_CCR1 disabled.,1: Preload register on TIMx_CCR1 enabled."
|
|
newline
|
|
bitfld.long 0x0 2. "OC1FE,Output Compare 1 fast enable" "0: CC1 behaves normally depending on counter and..,1: An active edge on the trigger input acts like a.."
|
|
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output.,1: CC1 channel is configured as input IC1 is mapped..,2: CC1 channel is configured as input IC1 is mapped..,3: CC1 channel is configured as input IC1 is mapped.."
|
|
group.word 0x20++0x1
|
|
line.word 0x0 "TIM15_CCER,TIM15 capture/compare enable register"
|
|
bitfld.word 0x0 7. "CC2NP,Capture/Compare 2 complementary output polarity" "0,1"
|
|
bitfld.word 0x0 5. "CC2P,Capture/Compare 2 output polarity" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "CC2E,Capture/Compare 2 output enable" "0,1"
|
|
bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 complementary output polarity" "0: OC1N active high,1: OC1N active low"
|
|
newline
|
|
bitfld.word 0x0 2. "CC1NE,Capture/Compare 1 complementary output enable" "0: Off - OC1N is not active. OC1N level is then..,1: On - OC1N signal is output on the corresponding.."
|
|
bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output polarity" "0: this configuration is reserved,1: non-inverted/both edges/ The circuit is.."
|
|
newline
|
|
bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable" "0: Capture mode disabled / OC1 is not active (see..,1: Capture mode enabled / OC1 signal is output on.."
|
|
group.long 0x24++0x3
|
|
line.long 0x0 "TIM15_CNT,TIM15 counter"
|
|
rbitfld.long 0x0 31. "UIFCPY,UIF Copy" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value"
|
|
group.word 0x28++0x1
|
|
line.word 0x0 "TIM15_PSC,TIM15 prescaler"
|
|
hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value"
|
|
group.word 0x2C++0x1
|
|
line.word 0x0 "TIM15_ARR,TIM15 auto-reload register"
|
|
hexmask.word 0x0 0.--15. 1. "ARR,Auto-reload value"
|
|
group.word 0x30++0x1
|
|
line.word 0x0 "TIM15_RCR,TIM15 repetition counter register"
|
|
hexmask.word.byte 0x0 0.--7. 1. "REP,Repetition counter value"
|
|
group.word 0x34++0x1
|
|
line.word 0x0 "TIM15_CCR1,TIM15 capture/compare register 1"
|
|
hexmask.word 0x0 0.--15. 1. "CCR1,Capture/Compare 1 value"
|
|
group.word 0x38++0x1
|
|
line.word 0x0 "TIM15_CCR2,TIM15 capture/compare register 2"
|
|
hexmask.word 0x0 0.--15. 1. "CCR2,Capture/Compare 2 value"
|
|
group.long 0x44++0x3
|
|
line.long 0x0 "TIM15_BDTR,TIM15 break and dead-time register"
|
|
hexmask.long.byte 0x0 16.--19. 1. "BKF,Break filter"
|
|
bitfld.long 0x0 15. "MOE,Main output enable" "0: OC and OCN outputs are disabled or forced to..,1: OC and OCN outputs are enabled if their.."
|
|
newline
|
|
bitfld.long 0x0 14. "AOE,Automatic output enable" "0: MOE can be set only by software,1: MOE can be set by software or automatically at.."
|
|
bitfld.long 0x0 13. "BKP,Break polarity" "0: Break input BRK is active low,1: Break input BRK is active high"
|
|
newline
|
|
bitfld.long 0x0 12. "BKE,Break enable" "0: Break inputs (BRK and CCS clock failure event)..,?"
|
|
bitfld.long 0x0 11. "OSSR,Off-state selection for Run mode" "0: When inactive OC/OCN outputs are disabled (the..,1: When inactive OC/OCN outputs are enabled with.."
|
|
newline
|
|
bitfld.long 0x0 10. "OSSI,Off-state selection for Idle mode" "0: When inactive OC/OCN outputs are disabled..,1: When inactive OC/OCN outputs are forced first.."
|
|
bitfld.long 0x0 8.--9. "LOCK,Lock configuration" "0: LOCK OFF - No bit is write protected,1: LOCK Level 1 = DTG bits in TIMx_BDTR register..,2: LOCK Level 2 = LOCK Level 1 + CC Polarity bits..,3: LOCK Level 3 = LOCK Level 2 + CC Control bits.."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "DTG,Dead-time generator setup"
|
|
group.word 0x48++0x1
|
|
line.word 0x0 "TIM15_DCR,TIM15 DMA control register"
|
|
hexmask.word.byte 0x0 8.--12. 1. "DBL,DMA burst length"
|
|
hexmask.word.byte 0x0 0.--4. 1. "DBA,DMA base address"
|
|
group.word 0x4C++0x1
|
|
line.word 0x0 "TIM15_DMAR,TIM15 DMA address for full transfer"
|
|
hexmask.word 0x0 0.--15. 1. "DMAB,DMA register for burst accesses"
|
|
group.long 0x60++0x3
|
|
line.long 0x0 "TIM15_AF1,TIM15 alternate register 1"
|
|
bitfld.long 0x0 11. "BKCMP2P,BRK COMP2 input polarity" "0: COMP2 input is active low,1: COMP2 input is active high"
|
|
bitfld.long 0x0 10. "BKCMP1P,BRK COMP1 input polarity" "0: COMP1 input is active low,1: COMP1 input is active high"
|
|
newline
|
|
bitfld.long 0x0 9. "BKINP,BRK BKIN input polarity" "0: BKIN input is active low,1: BKIN input is active high"
|
|
bitfld.long 0x0 8. "BKDF1BK0E,BRK dfsdm1_break[0] enable" "0: dfsdm1_break[0]input disabled,1: dfsdm1_break[0]input enabled"
|
|
newline
|
|
bitfld.long 0x0 2. "BKCMP2E,BRK COMP2 enable" "0: COMP2 input disabled,1: COMP2 input enabled"
|
|
bitfld.long 0x0 1. "BKCMP1E,BRK COMP1 enable" "0: COMP1 input disabled,1: COMP1 input enabled"
|
|
newline
|
|
bitfld.long 0x0 0. "BKINE,BRK BKIN input enable" "0: BKIN input disabled,1: BKIN input enabled"
|
|
group.long 0x68++0x3
|
|
line.long 0x0 "TIM15_TISEL,TIM15 input selection register"
|
|
hexmask.long.byte 0x0 8.--11. 1. "TI2SEL,selects TI2[0] to TI2[15] input"
|
|
hexmask.long.byte 0x0 0.--3. 1. "TI1SEL,selects TI1[0] to TI1[15] input"
|
|
tree.end
|
|
tree "TIM16 (General Purpose Timer)"
|
|
base ad:0x40014400
|
|
group.word 0x0++0x1
|
|
line.word 0x0 "TIM16_CR1,TIM16 control register 1"
|
|
bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "0: No remapping. UIF status bit is not copied to..,1: Remapping enabled. UIF status bit is copied to.."
|
|
bitfld.word 0x0 8.--9. "CKD,Clock division" "0: t <sub>DTS</sub>= t<sub>CK_INT</sub>,1: t <sub>DTS</sub>= 2 * t<sub>CK_INT</sub>,2: t<sub>DTS</sub> = 4 * t<sub>CK_INT</sub>,3: Reserved do not program this value"
|
|
newline
|
|
bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "0: TIMx_ARR register is not buffered,1: TIMx_ARR register is buffered"
|
|
bitfld.word 0x0 3. "OPM,One pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event.."
|
|
newline
|
|
bitfld.word 0x0 2. "URS,Update request source" "0: Any of the following events generate an update..,1: Only counter overflow/underflow generates an.."
|
|
bitfld.word 0x0 1. "UDIS,Update disable" "0: UEV enabled. The Update (UEV) event is generated..,1: UEV disabled. The Update event is not generated.."
|
|
newline
|
|
bitfld.word 0x0 0. "CEN,Counter enable" "0: Counter disabled,1: Counter enabled"
|
|
group.word 0x4++0x1
|
|
line.word 0x0 "TIM16_CR2,TIM16 control register 2"
|
|
bitfld.word 0x0 9. "OIS1N,Output Idle state 1 (OC1N output)" "0: OC1N=0 after a dead-time when MOE=0,1: OC1N=1 after a dead-time when MOE=0"
|
|
bitfld.word 0x0 8. "OIS1,Output Idle state 1 (OC1 output)" "0: OC1=0 (after a dead-time if OC1N is implemented)..,1: OC1=1 (after a dead-time if OC1N is implemented).."
|
|
newline
|
|
bitfld.word 0x0 3. "CCDS,Capture/compare DMA selection" "0: CCx DMA request sent when CCx event occurs,1: CCx DMA requests sent when update event occurs"
|
|
bitfld.word 0x0 2. "CCUS,Capture/compare control update selection" "0: When capture/compare control bits are preloaded..,1: When capture/compare control bits are preloaded.."
|
|
newline
|
|
bitfld.word 0x0 0. "CCPC,Capture/compare preloaded control" "0: CCxE CCxNE and OCxM bits are not preloaded,1: CCxE CCxNE and OCxM bits are preloaded after.."
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "TIM16_DIER,TIM16 DMA/interrupt enable register"
|
|
bitfld.word 0x0 9. "CC1DE,Capture/Compare 1 DMA request enable" "0: CC1 DMA request disabled,1: CC1 DMA request enabled"
|
|
bitfld.word 0x0 8. "UDE,Update DMA request enable" "0: Update DMA request disabled,1: Update DMA request enabled"
|
|
newline
|
|
bitfld.word 0x0 7. "BIE,Break interrupt enable" "0: Break interrupt disabled,1: Break interrupt enabled"
|
|
bitfld.word 0x0 5. "COMIE,COM interrupt enable" "0: COM interrupt disabled,1: COM interrupt enabled"
|
|
newline
|
|
bitfld.word 0x0 1. "CC1IE,Capture/Compare 1 interrupt enable" "0: CC1 interrupt disabled,1: CC1 interrupt enabled"
|
|
bitfld.word 0x0 0. "UIE,Update interrupt enable" "0: Update interrupt disabled,1: Update interrupt enabled"
|
|
group.word 0x10++0x1
|
|
line.word 0x0 "TIM16_SR,TIM16 status register"
|
|
bitfld.word 0x0 9. "CC1OF,Capture/Compare 1 overcapture flag" "0: No overcapture has been detected,1: The counter value has been captured in TIMx_CCR1.."
|
|
bitfld.word 0x0 7. "BIF,Break interrupt flag" "0: No break event occurred,1: An active level has been detected on the break.."
|
|
newline
|
|
bitfld.word 0x0 5. "COMIF,COM interrupt flag" "0: No COM event occurred,1: COM interrupt pending"
|
|
bitfld.word 0x0 1. "CC1IF,Capture/Compare 1 interrupt flag" "0: No compare match / No input capture occurred,1: A compare match or an input capture occurred"
|
|
newline
|
|
bitfld.word 0x0 0. "UIF,Update interrupt flag" "0: No update occurred.,1: Update interrupt pending. This bit is set by.."
|
|
wgroup.word 0x14++0x1
|
|
line.word 0x0 "TIM16_EGR,TIM16 event generation register"
|
|
bitfld.word 0x0 7. "BG,Break generation" "0: No action.,1: A break event is generated. MOE bit is cleared.."
|
|
bitfld.word 0x0 5. "COMG,Capture/Compare control update generation" "0: No action,1: When the CCPC bit is set it is possible to.."
|
|
newline
|
|
bitfld.word 0x0 1. "CC1G,Capture/Compare 1 generation" "0: No action.,1: A capture/compare event is generated on channel 1:"
|
|
bitfld.word 0x0 0. "UG,Update generation" "0: No action.,1: Reinitialize the counter and generates an update.."
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "TIM16_CCMR1,TIM16 capture/compare mode register 1"
|
|
hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter"
|
|
bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 Selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input IC1 is mapped..,?,?"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "TIM16_CCMR1_ALTERNATE,TIM16 capture/compare mode register 1"
|
|
bitfld.long 0x0 16. "OC1M_1,OC1M[3]" "0,1"
|
|
bitfld.long 0x0 4.--6. "OC1M,OC1M[2:0]: Output Compare 1 mode" "0: Frozen - The comparison between the output..,1: Set channel 1 to active level on match. OC1REF..,2: Set channel 1 to inactive level on match. OC1REF..,3: Toggle - OC1REF toggles when TIMx_CNT=TIMx_CCR1.,4: Force inactive level - OC1REF is forced low.,5: Force active level - OC1REF is forced high.,6: PWM mode 1 - Channel 1 is active as long as..,7: PWM mode 2 - Channel 1 is inactive as long as.."
|
|
newline
|
|
bitfld.long 0x0 3. "OC1PE,Output Compare 1 preload enable" "0: Preload register on TIMx_CCR1 disabled.,1: Preload register on TIMx_CCR1 enabled."
|
|
bitfld.long 0x0 2. "OC1FE,Output Compare 1 fast enable" "0: CC1 behaves normally depending on counter and..,1: An active edge on the trigger input acts like a.."
|
|
newline
|
|
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input IC1 is mapped..,?,?"
|
|
group.word 0x20++0x1
|
|
line.word 0x0 "TIM16_CCER,TIM16 capture/compare enable register"
|
|
bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 complementary output polarity" "0: OC1N active high,1: OC1N active low"
|
|
bitfld.word 0x0 2. "CC1NE,Capture/Compare 1 complementary output enable" "0: Off - OC1N is not active. OC1N level is then..,1: On - OC1N signal is output on the corresponding.."
|
|
newline
|
|
bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output polarity" "0: this configuration is reserved,1: non-inverted/both edges/ The circuit is.."
|
|
bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable" "0: Capture mode disabled / OC1 is not active (see..,1: Capture mode enabled / OC1 signal is output on.."
|
|
group.long 0x24++0x3
|
|
line.long 0x0 "TIM16_CNT,TIM16 counter"
|
|
rbitfld.long 0x0 31. "UIFCPY,UIF Copy" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value"
|
|
group.word 0x28++0x1
|
|
line.word 0x0 "TIM16_PSC,TIM16 prescaler"
|
|
hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value"
|
|
group.word 0x2C++0x1
|
|
line.word 0x0 "TIM16_ARR,TIM16 auto-reload register"
|
|
hexmask.word 0x0 0.--15. 1. "ARR,Auto-reload value"
|
|
group.word 0x30++0x1
|
|
line.word 0x0 "TIM16_RCR,TIM16 repetition counter register"
|
|
hexmask.word.byte 0x0 0.--7. 1. "REP,Repetition counter value"
|
|
group.word 0x34++0x1
|
|
line.word 0x0 "TIM16_CCR1,TIM16 capture/compare register 1"
|
|
hexmask.word 0x0 0.--15. 1. "CCR1,Capture/Compare 1 value"
|
|
group.long 0x44++0x3
|
|
line.long 0x0 "TIM16_BDTR,TIM16 break and dead-time register"
|
|
hexmask.long.byte 0x0 16.--19. 1. "BKF,Break filter"
|
|
bitfld.long 0x0 15. "MOE,Main output enable" "0: OC and OCN outputs are disabled or forced to..,1: OC and OCN outputs are enabled if their.."
|
|
newline
|
|
bitfld.long 0x0 14. "AOE,Automatic output enable" "0: MOE can be set only by software,1: MOE can be set by software or automatically at.."
|
|
bitfld.long 0x0 13. "BKP,Break polarity" "0: Break input BRK is active low,1: Break input BRK is active high"
|
|
newline
|
|
bitfld.long 0x0 12. "BKE,Break enable" "0: Break inputs (BRK and CCS clock failure event)..,?"
|
|
bitfld.long 0x0 11. "OSSR,Off-state selection for Run mode" "0: When inactive OC/OCN outputs are disabled (the..,1: When inactive OC/OCN outputs are enabled with.."
|
|
newline
|
|
bitfld.long 0x0 10. "OSSI,Off-state selection for Idle mode" "0: When inactive OC/OCN outputs are disabled..,1: When inactive OC/OCN outputs are forced first.."
|
|
bitfld.long 0x0 8.--9. "LOCK,Lock configuration" "0: LOCK OFF - No bit is write protected,1: LOCK Level 1 = DTG bits in TIMx_BDTR register..,2: LOCK Level 2 = LOCK Level 1 + CC Polarity bits..,3: LOCK Level 3 = LOCK Level 2 + CC Control bits.."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "DTG,Dead-time generator setup"
|
|
group.word 0x48++0x1
|
|
line.word 0x0 "TIM16_DCR,TIM16 DMA control register"
|
|
hexmask.word.byte 0x0 8.--12. 1. "DBL,DMA burst length"
|
|
hexmask.word.byte 0x0 0.--4. 1. "DBA,DMA base address"
|
|
group.word 0x4C++0x1
|
|
line.word 0x0 "TIM16_DMAR,TIM16 DMA address for full transfer"
|
|
hexmask.word 0x0 0.--15. 1. "DMAB,DMA register for burst accesses"
|
|
group.long 0x60++0x3
|
|
line.long 0x0 "TIM16_AF1,TIM16 alternate function register 1"
|
|
bitfld.long 0x0 11. "BKCMP2P,BRK COMP2 input polarity" "0: COMP2 input is active low,1: COMP2 input is active high"
|
|
bitfld.long 0x0 10. "BKCMP1P,BRK COMP1 input polarity" "0: COMP1 input is active low,1: COMP1 input is active high"
|
|
newline
|
|
bitfld.long 0x0 9. "BKINP,BRK BKIN input polarity" "0: BKIN input is active low,1: BKIN input is active high"
|
|
bitfld.long 0x0 8. "BKDF1BK1E,BRK dfsdm1_break[1] enable" "0: dfsdm1_break[1] input disabled,1: dfsdm1_break[1] input enabled"
|
|
newline
|
|
bitfld.long 0x0 2. "BKCMP2E,BRK COMP2 enable" "0: COMP2 input disabled,1: COMP2 input enabled"
|
|
bitfld.long 0x0 1. "BKCMP1E,BRK COMP1 enable" "0: COMP1 input disabled,1: COMP1 input enabled"
|
|
newline
|
|
bitfld.long 0x0 0. "BKINE,BRK BKIN input enable" "0: BKIN input disabled,1: BKIN input enabled"
|
|
group.long 0x68++0x3
|
|
line.long 0x0 "TIM16_TISEL,TIM16 input selection register"
|
|
hexmask.long.byte 0x0 0.--3. 1. "TI1SEL,selects TI1[0] to TI1[15] input"
|
|
tree.end
|
|
tree "TIM17 (General Purpose Timer)"
|
|
base ad:0x40014800
|
|
group.word 0x0++0x1
|
|
line.word 0x0 "TIM17_CR1,TIM17 control register 1"
|
|
bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "0: No remapping. UIF status bit is not copied to..,1: Remapping enabled. UIF status bit is copied to.."
|
|
bitfld.word 0x0 8.--9. "CKD,Clock division" "0: t <sub>DTS</sub>= t<sub>CK_INT</sub>,1: t <sub>DTS</sub>= 2 * t<sub>CK_INT</sub>,2: t<sub>DTS</sub> = 4 * t<sub>CK_INT</sub>,3: Reserved do not program this value"
|
|
newline
|
|
bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "0: TIMx_ARR register is not buffered,1: TIMx_ARR register is buffered"
|
|
bitfld.word 0x0 3. "OPM,One pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event.."
|
|
newline
|
|
bitfld.word 0x0 2. "URS,Update request source" "0: Any of the following events generate an update..,1: Only counter overflow/underflow generates an.."
|
|
bitfld.word 0x0 1. "UDIS,Update disable" "0: UEV enabled. The Update (UEV) event is generated..,1: UEV disabled. The Update event is not generated.."
|
|
newline
|
|
bitfld.word 0x0 0. "CEN,Counter enable" "0: Counter disabled,1: Counter enabled"
|
|
group.word 0x4++0x1
|
|
line.word 0x0 "TIM17_CR2,TIM17 control register 2"
|
|
bitfld.word 0x0 9. "OIS1N,Output Idle state 1 (OC1N output)" "0: OC1N=0 after a dead-time when MOE=0,1: OC1N=1 after a dead-time when MOE=0"
|
|
bitfld.word 0x0 8. "OIS1,Output Idle state 1 (OC1 output)" "0: OC1=0 (after a dead-time if OC1N is implemented)..,1: OC1=1 (after a dead-time if OC1N is implemented).."
|
|
newline
|
|
bitfld.word 0x0 3. "CCDS,Capture/compare DMA selection" "0: CCx DMA request sent when CCx event occurs,1: CCx DMA requests sent when update event occurs"
|
|
bitfld.word 0x0 2. "CCUS,Capture/compare control update selection" "0: When capture/compare control bits are preloaded..,1: When capture/compare control bits are preloaded.."
|
|
newline
|
|
bitfld.word 0x0 0. "CCPC,Capture/compare preloaded control" "0: CCxE CCxNE and OCxM bits are not preloaded,1: CCxE CCxNE and OCxM bits are preloaded after.."
|
|
group.word 0xC++0x1
|
|
line.word 0x0 "TIM17_DIER,TIM17 DMA/interrupt enable register"
|
|
bitfld.word 0x0 9. "CC1DE,Capture/Compare 1 DMA request enable" "0: CC1 DMA request disabled,1: CC1 DMA request enabled"
|
|
bitfld.word 0x0 8. "UDE,Update DMA request enable" "0: Update DMA request disabled,1: Update DMA request enabled"
|
|
newline
|
|
bitfld.word 0x0 7. "BIE,Break interrupt enable" "0: Break interrupt disabled,1: Break interrupt enabled"
|
|
bitfld.word 0x0 5. "COMIE,COM interrupt enable" "0: COM interrupt disabled,1: COM interrupt enabled"
|
|
newline
|
|
bitfld.word 0x0 1. "CC1IE,Capture/Compare 1 interrupt enable" "0: CC1 interrupt disabled,1: CC1 interrupt enabled"
|
|
bitfld.word 0x0 0. "UIE,Update interrupt enable" "0: Update interrupt disabled,1: Update interrupt enabled"
|
|
group.word 0x10++0x1
|
|
line.word 0x0 "TIM17_SR,TIM17 status register"
|
|
bitfld.word 0x0 9. "CC1OF,Capture/Compare 1 overcapture flag" "0: No overcapture has been detected,1: The counter value has been captured in TIMx_CCR1.."
|
|
bitfld.word 0x0 7. "BIF,Break interrupt flag" "0: No break event occurred,1: An active level has been detected on the break.."
|
|
newline
|
|
bitfld.word 0x0 5. "COMIF,COM interrupt flag" "0: No COM event occurred,1: COM interrupt pending"
|
|
bitfld.word 0x0 1. "CC1IF,Capture/Compare 1 interrupt flag" "0: No compare match / No input capture occurred,1: A compare match or an input capture occurred"
|
|
newline
|
|
bitfld.word 0x0 0. "UIF,Update interrupt flag" "0: No update occurred.,1: Update interrupt pending. This bit is set by.."
|
|
wgroup.word 0x14++0x1
|
|
line.word 0x0 "TIM17_EGR,TIM17 event generation register"
|
|
bitfld.word 0x0 7. "BG,Break generation" "0: No action.,1: A break event is generated. MOE bit is cleared.."
|
|
bitfld.word 0x0 5. "COMG,Capture/Compare control update generation" "0: No action,1: When the CCPC bit is set it is possible to.."
|
|
newline
|
|
bitfld.word 0x0 1. "CC1G,Capture/Compare 1 generation" "0: No action.,1: A capture/compare event is generated on channel 1:"
|
|
bitfld.word 0x0 0. "UG,Update generation" "0: No action.,1: Reinitialize the counter and generates an update.."
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "TIM17_CCMR1,TIM17 capture/compare mode register 1"
|
|
hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter"
|
|
bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 Selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input IC1 is mapped..,?,?"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "TIM17_CCMR1_ALTERNATE,TIM17 capture/compare mode register 1"
|
|
bitfld.long 0x0 16. "OC1M_1,OC1M[3]" "0,1"
|
|
bitfld.long 0x0 4.--6. "OC1M,OC1M[2:0]: Output Compare 1 mode" "0: Frozen - The comparison between the output..,1: Set channel 1 to active level on match. OC1REF..,2: Set channel 1 to inactive level on match. OC1REF..,3: Toggle - OC1REF toggles when TIMx_CNT=TIMx_CCR1.,4: Force inactive level - OC1REF is forced low.,5: Force active level - OC1REF is forced high.,6: PWM mode 1 - Channel 1 is active as long as..,7: PWM mode 2 - Channel 1 is inactive as long as.."
|
|
newline
|
|
bitfld.long 0x0 3. "OC1PE,Output Compare 1 preload enable" "0: Preload register on TIMx_CCR1 disabled.,1: Preload register on TIMx_CCR1 enabled."
|
|
bitfld.long 0x0 2. "OC1FE,Output Compare 1 fast enable" "0: CC1 behaves normally depending on counter and..,1: An active edge on the trigger input acts like a.."
|
|
newline
|
|
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input IC1 is mapped..,?,?"
|
|
group.word 0x20++0x1
|
|
line.word 0x0 "TIM17_CCER,TIM17 capture/compare enable register"
|
|
bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 complementary output polarity" "0: OC1N active high,1: OC1N active low"
|
|
bitfld.word 0x0 2. "CC1NE,Capture/Compare 1 complementary output enable" "0: Off - OC1N is not active. OC1N level is then..,1: On - OC1N signal is output on the corresponding.."
|
|
newline
|
|
bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output polarity" "0: this configuration is reserved,1: non-inverted/both edges/ The circuit is.."
|
|
bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable" "0: Capture mode disabled / OC1 is not active (see..,1: Capture mode enabled / OC1 signal is output on.."
|
|
group.long 0x24++0x3
|
|
line.long 0x0 "TIM17_CNT,TIM17 counter"
|
|
rbitfld.long 0x0 31. "UIFCPY,UIF Copy" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value"
|
|
group.word 0x28++0x1
|
|
line.word 0x0 "TIM17_PSC,TIM17 prescaler"
|
|
hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value"
|
|
group.word 0x2C++0x1
|
|
line.word 0x0 "TIM17_ARR,TIM17 auto-reload register"
|
|
hexmask.word 0x0 0.--15. 1. "ARR,Auto-reload value"
|
|
group.word 0x30++0x1
|
|
line.word 0x0 "TIM17_RCR,TIM17 repetition counter register"
|
|
hexmask.word.byte 0x0 0.--7. 1. "REP,Repetition counter value"
|
|
group.word 0x34++0x1
|
|
line.word 0x0 "TIM17_CCR1,TIM17 capture/compare register 1"
|
|
hexmask.word 0x0 0.--15. 1. "CCR1,Capture/Compare 1 value"
|
|
group.long 0x44++0x3
|
|
line.long 0x0 "TIM17_BDTR,TIM17 break and dead-time register"
|
|
hexmask.long.byte 0x0 16.--19. 1. "BKF,Break filter"
|
|
bitfld.long 0x0 15. "MOE,Main output enable" "0: OC and OCN outputs are disabled or forced to..,1: OC and OCN outputs are enabled if their.."
|
|
newline
|
|
bitfld.long 0x0 14. "AOE,Automatic output enable" "0: MOE can be set only by software,1: MOE can be set by software or automatically at.."
|
|
bitfld.long 0x0 13. "BKP,Break polarity" "0: Break input BRK is active low,1: Break input BRK is active high"
|
|
newline
|
|
bitfld.long 0x0 12. "BKE,Break enable" "0: Break inputs (BRK and CCS clock failure event)..,?"
|
|
bitfld.long 0x0 11. "OSSR,Off-state selection for Run mode" "0: When inactive OC/OCN outputs are disabled (the..,1: When inactive OC/OCN outputs are enabled with.."
|
|
newline
|
|
bitfld.long 0x0 10. "OSSI,Off-state selection for Idle mode" "0: When inactive OC/OCN outputs are disabled..,1: When inactive OC/OCN outputs are forced first.."
|
|
bitfld.long 0x0 8.--9. "LOCK,Lock configuration" "0: LOCK OFF - No bit is write protected,1: LOCK Level 1 = DTG bits in TIMx_BDTR register..,2: LOCK Level 2 = LOCK Level 1 + CC Polarity bits..,3: LOCK Level 3 = LOCK Level 2 + CC Control bits.."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "DTG,Dead-time generator setup"
|
|
group.word 0x48++0x1
|
|
line.word 0x0 "TIM17_DCR,TIM17 DMA control register"
|
|
hexmask.word.byte 0x0 8.--12. 1. "DBL,DMA burst length"
|
|
hexmask.word.byte 0x0 0.--4. 1. "DBA,DMA base address"
|
|
group.word 0x4C++0x1
|
|
line.word 0x0 "TIM17_DMAR,TIM17 DMA address for full transfer"
|
|
hexmask.word 0x0 0.--15. 1. "DMAB,DMA register for burst accesses"
|
|
group.long 0x60++0x3
|
|
line.long 0x0 "TIM17_AF1,TIM17 alternate function register 1"
|
|
bitfld.long 0x0 11. "BKCMP2P,BRK COMP2 input polarity" "0: COMP2 input is active low,1: COMP2 input is active high"
|
|
bitfld.long 0x0 10. "BKCMP1P,BRK COMP1 input polarity" "0: COMP1 input is active low,1: COMP1 input is active high"
|
|
newline
|
|
bitfld.long 0x0 9. "BKINP,BRK BKIN input polarity" "0: BKIN input is active low,1: BKIN input is active high"
|
|
bitfld.long 0x0 8. "BKDF1BK2E,BRK dfsdm1_break[2] enable" "0: dfsdm1_break[2] input disabled,1: dfsdm1_break[2] input enabled"
|
|
newline
|
|
bitfld.long 0x0 2. "BKCMP2E,BRK COMP2 enable" "0: COMP2 input disabled,1: COMP2 input enabled"
|
|
bitfld.long 0x0 1. "BKCMP1E,BRK COMP1 enable" "0: COMP1 input disabled,1: COMP1 input enabled"
|
|
newline
|
|
bitfld.long 0x0 0. "BKINE,BRK BKIN input enable" "0: BKIN input disabled,1: BKIN input enabled"
|
|
group.long 0x68++0x3
|
|
line.long 0x0 "TIM17_TISEL,TIM17 input selection register"
|
|
hexmask.long.byte 0x0 0.--3. 1. "TI1SEL,selects TI1[0] to TI1[15] input"
|
|
tree.end
|
|
tree.end
|
|
tree "TSC (Touch Sensing Controller)"
|
|
base ad:0x40024000
|
|
group.long 0x0++0x13
|
|
line.long 0x0 "CR,control register"
|
|
hexmask.long.byte 0x0 28.--31. 1. "CTPH,Charge transfer pulse high"
|
|
hexmask.long.byte 0x0 24.--27. 1. "CTPL,Charge transfer pulse low"
|
|
hexmask.long.byte 0x0 17.--23. 1. "SSD,Spread spectrum deviation"
|
|
bitfld.long 0x0 16. "SSE,Spread spectrum enable" "0,1"
|
|
bitfld.long 0x0 15. "SSPSC,Spread spectrum prescaler" "0,1"
|
|
bitfld.long 0x0 12.--14. "PGPSC,pulse generator prescaler" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 5.--7. "MCV,Max count value" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 4. "IODEF,I/O Default mode" "0,1"
|
|
bitfld.long 0x0 3. "SYNCPOL,Synchronization pin" "0,1"
|
|
bitfld.long 0x0 2. "AM,Acquisition mode" "0,1"
|
|
bitfld.long 0x0 1. "START,Start a new acquisition" "0,1"
|
|
bitfld.long 0x0 0. "TSCE,Touch sensing controller" "0,1"
|
|
line.long 0x4 "IER,interrupt enable register"
|
|
bitfld.long 0x4 1. "MCEIE,Max count error interrupt" "0,1"
|
|
bitfld.long 0x4 0. "EOAIE,End of acquisition interrupt" "0,1"
|
|
line.long 0x8 "ICR,interrupt clear register"
|
|
bitfld.long 0x8 1. "MCEIC,Max count error interrupt" "0,1"
|
|
bitfld.long 0x8 0. "EOAIC,End of acquisition interrupt" "0,1"
|
|
line.long 0xC "ISR,interrupt status register"
|
|
bitfld.long 0xC 1. "MCEF,Max count error flag" "0,1"
|
|
bitfld.long 0xC 0. "EOAF,End of acquisition flag" "0,1"
|
|
line.long 0x10 "IOHCR,I/O hysteresis control"
|
|
bitfld.long 0x10 31. "G8_IO4,G8_IO4" "0,1"
|
|
bitfld.long 0x10 30. "G8_IO3,G8_IO3" "0,1"
|
|
bitfld.long 0x10 29. "G8_IO2,G8_IO2" "0,1"
|
|
bitfld.long 0x10 28. "G8_IO1,G8_IO1" "0,1"
|
|
bitfld.long 0x10 27. "G7_IO4,G7_IO4" "0,1"
|
|
bitfld.long 0x10 26. "G7_IO3,G7_IO3" "0,1"
|
|
bitfld.long 0x10 25. "G7_IO2,G7_IO2" "0,1"
|
|
bitfld.long 0x10 24. "G7_IO1,G7_IO1" "0,1"
|
|
bitfld.long 0x10 23. "G6_IO4,G6_IO4" "0,1"
|
|
bitfld.long 0x10 22. "G6_IO3,G6_IO3" "0,1"
|
|
bitfld.long 0x10 21. "G6_IO2,G6_IO2" "0,1"
|
|
bitfld.long 0x10 20. "G6_IO1,G6_IO1" "0,1"
|
|
newline
|
|
bitfld.long 0x10 19. "G5_IO4,G5_IO4" "0,1"
|
|
bitfld.long 0x10 18. "G5_IO3,G5_IO3" "0,1"
|
|
bitfld.long 0x10 17. "G5_IO2,G5_IO2" "0,1"
|
|
bitfld.long 0x10 16. "G5_IO1,G5_IO1" "0,1"
|
|
bitfld.long 0x10 15. "G4_IO4,G4_IO4" "0,1"
|
|
bitfld.long 0x10 14. "G4_IO3,G4_IO3" "0,1"
|
|
bitfld.long 0x10 13. "G4_IO2,G4_IO2" "0,1"
|
|
bitfld.long 0x10 12. "G4_IO1,G4_IO1" "0,1"
|
|
bitfld.long 0x10 11. "G3_IO4,G3_IO4" "0,1"
|
|
bitfld.long 0x10 10. "G3_IO3,G3_IO3" "0,1"
|
|
bitfld.long 0x10 9. "G3_IO2,G3_IO2" "0,1"
|
|
bitfld.long 0x10 8. "G3_IO1,G3_IO1" "0,1"
|
|
newline
|
|
bitfld.long 0x10 7. "G2_IO4,G2_IO4" "0,1"
|
|
bitfld.long 0x10 6. "G2_IO3,G2_IO3" "0,1"
|
|
bitfld.long 0x10 5. "G2_IO2,G2_IO2" "0,1"
|
|
bitfld.long 0x10 4. "G2_IO1,G2_IO1" "0,1"
|
|
bitfld.long 0x10 3. "G1_IO4,G1_IO4" "0,1"
|
|
bitfld.long 0x10 2. "G1_IO3,G1_IO3" "0,1"
|
|
bitfld.long 0x10 1. "G1_IO2,G1_IO2" "0,1"
|
|
bitfld.long 0x10 0. "G1_IO1,G1_IO1" "0,1"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "IOASCR,I/O analog switch control"
|
|
bitfld.long 0x0 31. "G8_IO4,G8_IO4" "0,1"
|
|
bitfld.long 0x0 30. "G8_IO3,G8_IO3" "0,1"
|
|
bitfld.long 0x0 29. "G8_IO2,G8_IO2" "0,1"
|
|
bitfld.long 0x0 28. "G8_IO1,G8_IO1" "0,1"
|
|
bitfld.long 0x0 27. "G7_IO4,G7_IO4" "0,1"
|
|
bitfld.long 0x0 26. "G7_IO3,G7_IO3" "0,1"
|
|
bitfld.long 0x0 25. "G7_IO2,G7_IO2" "0,1"
|
|
bitfld.long 0x0 24. "G7_IO1,G7_IO1" "0,1"
|
|
bitfld.long 0x0 23. "G6_IO4,G6_IO4" "0,1"
|
|
bitfld.long 0x0 22. "G6_IO3,G6_IO3" "0,1"
|
|
bitfld.long 0x0 21. "G6_IO2,G6_IO2" "0,1"
|
|
bitfld.long 0x0 20. "G6_IO1,G6_IO1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "G5_IO4,G5_IO4" "0,1"
|
|
bitfld.long 0x0 18. "G5_IO3,G5_IO3" "0,1"
|
|
bitfld.long 0x0 17. "G5_IO2,G5_IO2" "0,1"
|
|
bitfld.long 0x0 16. "G5_IO1,G5_IO1" "0,1"
|
|
bitfld.long 0x0 15. "G4_IO4,G4_IO4" "0,1"
|
|
bitfld.long 0x0 14. "G4_IO3,G4_IO3" "0,1"
|
|
bitfld.long 0x0 13. "G4_IO2,G4_IO2" "0,1"
|
|
bitfld.long 0x0 12. "G4_IO1,G4_IO1" "0,1"
|
|
bitfld.long 0x0 11. "G3_IO4,G3_IO4" "0,1"
|
|
bitfld.long 0x0 10. "G3_IO3,G3_IO3" "0,1"
|
|
bitfld.long 0x0 9. "G3_IO2,G3_IO2" "0,1"
|
|
bitfld.long 0x0 8. "G3_IO1,G3_IO1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "G2_IO4,G2_IO4" "0,1"
|
|
bitfld.long 0x0 6. "G2_IO3,G2_IO3" "0,1"
|
|
bitfld.long 0x0 5. "G2_IO2,G2_IO2" "0,1"
|
|
bitfld.long 0x0 4. "G2_IO1,G2_IO1" "0,1"
|
|
bitfld.long 0x0 3. "G1_IO4,G1_IO4" "0,1"
|
|
bitfld.long 0x0 2. "G1_IO3,G1_IO3" "0,1"
|
|
bitfld.long 0x0 1. "G1_IO2,G1_IO2" "0,1"
|
|
bitfld.long 0x0 0. "G1_IO1,G1_IO1" "0,1"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "IOSCR,I/O sampling control register"
|
|
bitfld.long 0x0 31. "G8_IO4,G8_IO4" "0,1"
|
|
bitfld.long 0x0 30. "G8_IO3,G8_IO3" "0,1"
|
|
bitfld.long 0x0 29. "G8_IO2,G8_IO2" "0,1"
|
|
bitfld.long 0x0 28. "G8_IO1,G8_IO1" "0,1"
|
|
bitfld.long 0x0 27. "G7_IO4,G7_IO4" "0,1"
|
|
bitfld.long 0x0 26. "G7_IO3,G7_IO3" "0,1"
|
|
bitfld.long 0x0 25. "G7_IO2,G7_IO2" "0,1"
|
|
bitfld.long 0x0 24. "G7_IO1,G7_IO1" "0,1"
|
|
bitfld.long 0x0 23. "G6_IO4,G6_IO4" "0,1"
|
|
bitfld.long 0x0 22. "G6_IO3,G6_IO3" "0,1"
|
|
bitfld.long 0x0 21. "G6_IO2,G6_IO2" "0,1"
|
|
bitfld.long 0x0 20. "G6_IO1,G6_IO1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "G5_IO4,G5_IO4" "0,1"
|
|
bitfld.long 0x0 18. "G5_IO3,G5_IO3" "0,1"
|
|
bitfld.long 0x0 17. "G5_IO2,G5_IO2" "0,1"
|
|
bitfld.long 0x0 16. "G5_IO1,G5_IO1" "0,1"
|
|
bitfld.long 0x0 15. "G4_IO4,G4_IO4" "0,1"
|
|
bitfld.long 0x0 14. "G4_IO3,G4_IO3" "0,1"
|
|
bitfld.long 0x0 13. "G4_IO2,G4_IO2" "0,1"
|
|
bitfld.long 0x0 12. "G4_IO1,G4_IO1" "0,1"
|
|
bitfld.long 0x0 11. "G3_IO4,G3_IO4" "0,1"
|
|
bitfld.long 0x0 10. "G3_IO3,G3_IO3" "0,1"
|
|
bitfld.long 0x0 9. "G3_IO2,G3_IO2" "0,1"
|
|
bitfld.long 0x0 8. "G3_IO1,G3_IO1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "G2_IO4,G2_IO4" "0,1"
|
|
bitfld.long 0x0 6. "G2_IO3,G2_IO3" "0,1"
|
|
bitfld.long 0x0 5. "G2_IO2,G2_IO2" "0,1"
|
|
bitfld.long 0x0 4. "G2_IO1,G2_IO1" "0,1"
|
|
bitfld.long 0x0 3. "G1_IO4,G1_IO4" "0,1"
|
|
bitfld.long 0x0 2. "G1_IO3,G1_IO3" "0,1"
|
|
bitfld.long 0x0 1. "G1_IO2,G1_IO2" "0,1"
|
|
bitfld.long 0x0 0. "G1_IO1,G1_IO1" "0,1"
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "IOCCR,I/O channel control register"
|
|
bitfld.long 0x0 31. "G8_IO4,G8_IO4" "0,1"
|
|
bitfld.long 0x0 30. "G8_IO3,G8_IO3" "0,1"
|
|
bitfld.long 0x0 29. "G8_IO2,G8_IO2" "0,1"
|
|
bitfld.long 0x0 28. "G8_IO1,G8_IO1" "0,1"
|
|
bitfld.long 0x0 27. "G7_IO4,G7_IO4" "0,1"
|
|
bitfld.long 0x0 26. "G7_IO3,G7_IO3" "0,1"
|
|
bitfld.long 0x0 25. "G7_IO2,G7_IO2" "0,1"
|
|
bitfld.long 0x0 24. "G7_IO1,G7_IO1" "0,1"
|
|
bitfld.long 0x0 23. "G6_IO4,G6_IO4" "0,1"
|
|
bitfld.long 0x0 22. "G6_IO3,G6_IO3" "0,1"
|
|
bitfld.long 0x0 21. "G6_IO2,G6_IO2" "0,1"
|
|
bitfld.long 0x0 20. "G6_IO1,G6_IO1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "G5_IO4,G5_IO4" "0,1"
|
|
bitfld.long 0x0 18. "G5_IO3,G5_IO3" "0,1"
|
|
bitfld.long 0x0 17. "G5_IO2,G5_IO2" "0,1"
|
|
bitfld.long 0x0 16. "G5_IO1,G5_IO1" "0,1"
|
|
bitfld.long 0x0 15. "G4_IO4,G4_IO4" "0,1"
|
|
bitfld.long 0x0 14. "G4_IO3,G4_IO3" "0,1"
|
|
bitfld.long 0x0 13. "G4_IO2,G4_IO2" "0,1"
|
|
bitfld.long 0x0 12. "G4_IO1,G4_IO1" "0,1"
|
|
bitfld.long 0x0 11. "G3_IO4,G3_IO4" "0,1"
|
|
bitfld.long 0x0 10. "G3_IO3,G3_IO3" "0,1"
|
|
bitfld.long 0x0 9. "G3_IO2,G3_IO2" "0,1"
|
|
bitfld.long 0x0 8. "G3_IO1,G3_IO1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "G2_IO4,G2_IO4" "0,1"
|
|
bitfld.long 0x0 6. "G2_IO3,G2_IO3" "0,1"
|
|
bitfld.long 0x0 5. "G2_IO2,G2_IO2" "0,1"
|
|
bitfld.long 0x0 4. "G2_IO1,G2_IO1" "0,1"
|
|
bitfld.long 0x0 3. "G1_IO4,G1_IO4" "0,1"
|
|
bitfld.long 0x0 2. "G1_IO3,G1_IO3" "0,1"
|
|
bitfld.long 0x0 1. "G1_IO2,G1_IO2" "0,1"
|
|
bitfld.long 0x0 0. "G1_IO1,G1_IO1" "0,1"
|
|
group.long 0x30++0x3
|
|
line.long 0x0 "IOGCSR,I/O group control status"
|
|
rbitfld.long 0x0 23. "G8S,Analog I/O group x status" "0,1"
|
|
rbitfld.long 0x0 22. "G7S,Analog I/O group x status" "0,1"
|
|
rbitfld.long 0x0 21. "G6S,Analog I/O group x status" "0,1"
|
|
rbitfld.long 0x0 20. "G5S,Analog I/O group x status" "0,1"
|
|
rbitfld.long 0x0 19. "G4S,Analog I/O group x status" "0,1"
|
|
rbitfld.long 0x0 18. "G3S,Analog I/O group x status" "0,1"
|
|
rbitfld.long 0x0 17. "G2S,Analog I/O group x status" "0,1"
|
|
rbitfld.long 0x0 16. "G1S,Analog I/O group x status" "0,1"
|
|
bitfld.long 0x0 7. "G8E,Analog I/O group x enable" "0,1"
|
|
bitfld.long 0x0 6. "G7E,Analog I/O group x enable" "0,1"
|
|
bitfld.long 0x0 5. "G6E,Analog I/O group x enable" "0,1"
|
|
bitfld.long 0x0 4. "G5E,Analog I/O group x enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "G4E,Analog I/O group x enable" "0,1"
|
|
bitfld.long 0x0 2. "G3E,Analog I/O group x enable" "0,1"
|
|
bitfld.long 0x0 1. "G2E,Analog I/O group x enable" "0,1"
|
|
bitfld.long 0x0 0. "G1E,Analog I/O group x enable" "0,1"
|
|
rgroup.long 0x34++0x1F
|
|
line.long 0x0 "IOG1CR,I/O group x counter register"
|
|
hexmask.long.word 0x0 0.--13. 1. "CNT,Counter value"
|
|
line.long 0x4 "IOG2CR,I/O group x counter register"
|
|
hexmask.long.word 0x4 0.--13. 1. "CNT,Counter value"
|
|
line.long 0x8 "IOG3CR,I/O group x counter register"
|
|
hexmask.long.word 0x8 0.--13. 1. "CNT,Counter value"
|
|
line.long 0xC "IOG4CR,I/O group x counter register"
|
|
hexmask.long.word 0xC 0.--13. 1. "CNT,Counter value"
|
|
line.long 0x10 "IOG5CR,I/O group x counter register"
|
|
hexmask.long.word 0x10 0.--13. 1. "CNT,Counter value"
|
|
line.long 0x14 "IOG6CR,I/O group x counter register"
|
|
hexmask.long.word 0x14 0.--13. 1. "CNT,Counter value"
|
|
line.long 0x18 "IOG7CR,I/O group x counter register"
|
|
hexmask.long.word 0x18 0.--13. 1. "CNT,Counter value"
|
|
line.long 0x1C "IOG8CR,I/O group x counter register"
|
|
hexmask.long.word 0x1C 0.--13. 1. "CNT,Counter value"
|
|
tree.end
|
|
tree "USART (Universal Synchronous Asynchronous Receiver Transmitter)"
|
|
base ad:0x0
|
|
sif (cpuis("STM32L4R7*"))
|
|
tree "LPUART"
|
|
base ad:0x40008000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "LPUART_CR1,LPUART control register 1"
|
|
bitfld.long 0x0 31. "RXFFIE,RXFIFO full interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated when RXFF = 1.."
|
|
bitfld.long 0x0 30. "TXFEIE,TXFIFO empty interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated when TXFE = 1.."
|
|
newline
|
|
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
|
|
bitfld.long 0x0 28. "M1,Word length" "0: 1 Start bit,1: 1 Start bit"
|
|
newline
|
|
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver enable assertion time"
|
|
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver enable deassertion time"
|
|
newline
|
|
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated when the CMF bit.."
|
|
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between Mute mode and active.."
|
|
newline
|
|
bitfld.long 0x0 12. "M0,Word length" "0,1"
|
|
bitfld.long 0x0 11. "WAKE,Receiver wakeup method" "0: Idle line,1: Address mark"
|
|
newline
|
|
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
|
|
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
|
|
newline
|
|
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever PE = 1.."
|
|
bitfld.long 0x0 7. "TXFNFIE,TXFIFO not full interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated whenever.."
|
|
newline
|
|
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever TC = 1.."
|
|
bitfld.long 0x0 5. "RXFNEIE,RXFIFO not empty interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated whenever ORE = 1.."
|
|
newline
|
|
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever IDLE =.."
|
|
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
|
|
newline
|
|
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
|
|
bitfld.long 0x0 1. "UESM,LPUART enable in Stop mode" "0: LPUART not able to wake up the MCU from..,1: LPUART able to wake up the MCU from low-power.."
|
|
newline
|
|
bitfld.long 0x0 0. "UE,LPUART enable" "0: LPUART prescaler and outputs disabled low-power..,1: LPUART enabled"
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "LPUART_CR1_ALTERNATE,LPUART control register 1"
|
|
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
|
|
bitfld.long 0x0 28. "M1,Word length" "0: 1 Start bit,1: 1 Start bit"
|
|
newline
|
|
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver enable assertion time"
|
|
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver enable deassertion time"
|
|
newline
|
|
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated when the CMF bit.."
|
|
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between Mute mode and active.."
|
|
newline
|
|
bitfld.long 0x0 12. "M0,Word length" "0,1"
|
|
bitfld.long 0x0 11. "WAKE,Receiver wakeup method" "0: Idle line,1: Address mark"
|
|
newline
|
|
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
|
|
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
|
|
newline
|
|
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever PE = 1.."
|
|
bitfld.long 0x0 7. "TXEIE,Transmit data register empty" "0: Interrupt is inhibited,1: A LPUART interrupt is generated whenever.."
|
|
newline
|
|
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever TC = 1.."
|
|
bitfld.long 0x0 5. "RXNEIE,Receive data register not empty" "0: Interrupt is inhibited,1: A LPUART interrupt is generated whenever ORE = 1.."
|
|
newline
|
|
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever IDLE =.."
|
|
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
|
|
newline
|
|
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
|
|
bitfld.long 0x0 1. "UESM,LPUART enable in Stop mode" "0: LPUART not able to wake up the MCU from..,1: LPUART able to wake up the MCU from low-power.."
|
|
newline
|
|
bitfld.long 0x0 0. "UE,LPUART enable" "0: LPUART prescaler and outputs disabled low-power..,1: LPUART enabled"
|
|
line.long 0x4 "LPUART_CR2,LPUART control register 2"
|
|
hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the LPUART node"
|
|
bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "0: data is transmitted/received with data bit 0..,1: data is transmitted/received with the MSB (bit.."
|
|
newline
|
|
bitfld.long 0x4 18. "DATAINV,Binary data inversion" "0: Logical data from the data register are..,1: Logical data from the data register are.."
|
|
bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "0: TX pin signal works using the standard logic..,1: TX pin signal values are inverted.."
|
|
newline
|
|
bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "0: RX pin signal works using the standard logic..,1: RX pin signal values are inverted.."
|
|
bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "0: TX/RX pins are used as defined in standard pinout,1: The TX and RX pins functions are swapped. This.."
|
|
newline
|
|
bitfld.long 0x4 12.--13. "STOP,STOP bits" "0: 1 stop bit,?,2: 2 stop bits,?"
|
|
bitfld.long 0x4 4. "ADDM7,7-bit address detection/4-bit address detection" "0: 4-bit address detection,1: 7-bit address detection (in 8-bit data mode)"
|
|
line.long 0x8 "LPUART_CR3,LPUART control register 3"
|
|
bitfld.long 0x8 29.--31. "TXFTCFG,TXFIFO threshold configuration" "0: TXFIFO reaches 1/8 of its depth.,1: TXFIFO reaches 1/4 of its depth.,?,3: TXFIFO reaches 3/4 of its depth.,4: TXFIFO reaches 7/8 of its depth.,5: TXFIFO becomes empty.,6: TXFIFO reaches 1/2 of its depth.,?"
|
|
bitfld.long 0x8 28. "RXFTIE,RXFIFO threshold interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated when Receive.."
|
|
newline
|
|
bitfld.long 0x8 25.--27. "RXFTCFG,Receive FIFO threshold configuration" "0: Receive FIFO reaches 1/8 of its depth.,1: Receive FIFO reaches 1/4 of its depth.,?,3: Receive FIFO reaches 3/4 of its depth.,4: Receive FIFO reaches 7/8 of its depth.,5: Receive FIFO becomes full.,6: Receive FIFO reaches 1/2 of its depth.,?"
|
|
bitfld.long 0x8 23. "TXFTIE,TXFIFO threshold interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated when TXFIFO.."
|
|
newline
|
|
bitfld.long 0x8 22. "WUFIE,Wakeup from low-power mode interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever WUF =.."
|
|
bitfld.long 0x8 20.--21. "WUS,Wakeup from low-power mode interrupt flag selection" "0: WUF active on address match (as defined by..,?,2: WUF active on Start bit detection,3: WUF active on RXNE."
|
|
newline
|
|
bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "0: DE signal is active high.,1: DE signal is active low."
|
|
bitfld.long 0x8 14. "DEM,Driver enable mode" "0: DE function is disabled.,1: DE function is enabled. The DE signal is output.."
|
|
newline
|
|
bitfld.long 0x8 13. "DDRE,DMA disable on reception error" "0: DMA is not disabled in case of reception error.,1: DMA is disabled following a reception error. The.."
|
|
bitfld.long 0x8 12. "OVRDIS,Overrun disable" "0: Overrun Error Flag ORE is set when received data..,1: Overrun functionality is disabled. If new data.."
|
|
newline
|
|
bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever CTSIF = 1 in.."
|
|
bitfld.long 0x8 9. "CTSE,CTS enable" "0: CTS hardware flow control disabled,1: CTS mode enabled data is only transmitted when.."
|
|
newline
|
|
bitfld.long 0x8 8. "RTSE,RTS enable" "0: RTS hardware flow control disabled,1: RTS output enabled data is only requested when.."
|
|
bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "0: DMA mode is disabled for transmission,1: DMA mode is enabled for transmission"
|
|
newline
|
|
bitfld.long 0x8 6. "DMAR,DMA enable receiver" "0: DMA mode is disabled for reception,1: DMA mode is enabled for reception"
|
|
bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "0: Half duplex mode is not selected,1: Half duplex mode is selected"
|
|
newline
|
|
bitfld.long 0x8 0. "EIE,Error interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated when FE = 1 or ORE = 1.."
|
|
line.long 0xC "LPUART_BRR,LPUART baud rate register"
|
|
hexmask.long.tbyte 0xC 0.--19. 1. "BRR,LPUART baud rate"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x0 "LPUART_RQR,LPUART request register"
|
|
bitfld.long 0x0 4. "TXFRQ,Transmit data flush request" "0,1"
|
|
bitfld.long 0x0 3. "RXFRQ,Receive data flush request" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1"
|
|
bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "LPUART_ISR,LPUART interrupt and status register"
|
|
bitfld.long 0x0 27. "TXFT,TXFIFO threshold flag" "0: TXFIFO does not reach the programmed threshold.,1: TXFIFO reached the programmed threshold."
|
|
bitfld.long 0x0 26. "RXFT,RXFIFO threshold flag" "0: Receive FIFO does not reach the programmed..,1: Receive FIFO reached the programmed threshold."
|
|
newline
|
|
bitfld.long 0x0 24. "RXFF,RXFIFO full" "0: RXFIFO is not full,1: RXFIFO is full"
|
|
bitfld.long 0x0 23. "TXFE,TXFIFO empty" "0: TXFIFO is not empty,1: TXFIFO is empty"
|
|
newline
|
|
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1"
|
|
bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20. "WUF,Wakeup from low-power mode flag" "0,1"
|
|
bitfld.long 0x0 19. "RWU,Receiver wakeup from Mute mode" "0: Receiver in Active mode,1: Receiver in Mute mode"
|
|
newline
|
|
bitfld.long 0x0 18. "SBKF,Send break flag" "0: Break character transmitted,1: Break character requested by setting SBKRQ bit.."
|
|
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character Match detected"
|
|
newline
|
|
bitfld.long 0x0 16. "BUSY,Busy flag" "0: LPUART is idle (no reception),1: Reception on going"
|
|
bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
|
|
newline
|
|
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
|
|
bitfld.long 0x0 7. "TXFNF,TXFIFO not full" "0: Data register is full/Transmit FIFO is full.,1: Data register/Transmit FIFO is not full."
|
|
newline
|
|
bitfld.long 0x0 6. "TC,Transmission complete" "0: Transmission is not complete,1: Transmission is complete"
|
|
bitfld.long 0x0 5. "RXFNE,RXFIFO not empty" "0: Data is not received,1: Received data is ready to be read."
|
|
newline
|
|
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
|
|
bitfld.long 0x0 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected"
|
|
newline
|
|
bitfld.long 0x0 2. "NE,Start bit noise detection flag" "0: No noise is detected,1: Noise is detected"
|
|
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
|
|
newline
|
|
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "LPUART_ISR_ALTERNATE,LPUART interrupt and status register"
|
|
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1"
|
|
bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20. "WUF,Wakeup from low-power mode flag" "0,1"
|
|
bitfld.long 0x0 19. "RWU,Receiver wakeup from Mute mode" "0: Receiver in active mode,1: Receiver in Mute mode"
|
|
newline
|
|
bitfld.long 0x0 18. "SBKF,Send break flag" "0: Break character transmitted,1: Break character requested by setting SBKRQ bit.."
|
|
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character Match detected"
|
|
newline
|
|
bitfld.long 0x0 16. "BUSY,Busy flag" "0: LPUART is idle (no reception),1: Reception on going"
|
|
bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
|
|
newline
|
|
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
|
|
bitfld.long 0x0 7. "TXE,Transmit data register empty/TXFIFO not full" "0: Data register full,1: Data register not full"
|
|
newline
|
|
bitfld.long 0x0 6. "TC,Transmission complete" "0: Transmission is not complete,1: Transmission is complete"
|
|
bitfld.long 0x0 5. "RXNE,Read data register not empty" "0: Data is not received,1: Received data is ready to be read."
|
|
newline
|
|
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
|
|
bitfld.long 0x0 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected"
|
|
newline
|
|
bitfld.long 0x0 2. "NE,Start bit noise detection flag" "0: No noise is detected,1: Noise is detected"
|
|
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
|
|
newline
|
|
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x0 "LPUART_ICR,LPUART interrupt flag clear register"
|
|
bitfld.long 0x0 20. "WUCF,Wakeup from low-power mode clear flag" "?,?"
|
|
bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "CTSCF,CTS clear flag" "0,1"
|
|
bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1"
|
|
bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1"
|
|
bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1"
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x0 "LPUART_RDR,LPUART receive data register"
|
|
hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value"
|
|
group.long 0x28++0x7
|
|
line.long 0x0 "LPUART_TDR,LPUART transmit data register"
|
|
hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value"
|
|
line.long 0x4 "LPUART_PRESC,LPUART prescaler register"
|
|
hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler"
|
|
tree.end
|
|
endif
|
|
sif (cpuis("STM32L4R9*"))
|
|
tree "LPUART"
|
|
base ad:0x40008000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "LPUART_CR1,LPUART control register 1"
|
|
bitfld.long 0x0 31. "RXFFIE,RXFIFO full interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated when RXFF = 1.."
|
|
bitfld.long 0x0 30. "TXFEIE,TXFIFO empty interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated when TXFE = 1.."
|
|
newline
|
|
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
|
|
bitfld.long 0x0 28. "M1,Word length" "0: 1 Start bit,1: 1 Start bit"
|
|
newline
|
|
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver enable assertion time"
|
|
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver enable deassertion time"
|
|
newline
|
|
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated when the CMF bit.."
|
|
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between Mute mode and active.."
|
|
newline
|
|
bitfld.long 0x0 12. "M0,Word length" "0,1"
|
|
bitfld.long 0x0 11. "WAKE,Receiver wakeup method" "0: Idle line,1: Address mark"
|
|
newline
|
|
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
|
|
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
|
|
newline
|
|
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever PE = 1.."
|
|
bitfld.long 0x0 7. "TXFNFIE,TXFIFO not full interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated whenever.."
|
|
newline
|
|
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever TC = 1.."
|
|
bitfld.long 0x0 5. "RXFNEIE,RXFIFO not empty interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated whenever ORE = 1.."
|
|
newline
|
|
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever IDLE =.."
|
|
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
|
|
newline
|
|
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
|
|
bitfld.long 0x0 1. "UESM,LPUART enable in Stop mode" "0: LPUART not able to wake up the MCU from..,1: LPUART able to wake up the MCU from low-power.."
|
|
newline
|
|
bitfld.long 0x0 0. "UE,LPUART enable" "0: LPUART prescaler and outputs disabled low-power..,1: LPUART enabled"
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "LPUART_CR1_ALTERNATE,LPUART control register 1"
|
|
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
|
|
bitfld.long 0x0 28. "M1,Word length" "0: 1 Start bit,1: 1 Start bit"
|
|
newline
|
|
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver enable assertion time"
|
|
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver enable deassertion time"
|
|
newline
|
|
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated when the CMF bit.."
|
|
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between Mute mode and active.."
|
|
newline
|
|
bitfld.long 0x0 12. "M0,Word length" "0,1"
|
|
bitfld.long 0x0 11. "WAKE,Receiver wakeup method" "0: Idle line,1: Address mark"
|
|
newline
|
|
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
|
|
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
|
|
newline
|
|
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever PE = 1.."
|
|
bitfld.long 0x0 7. "TXEIE,Transmit data register empty" "0: Interrupt is inhibited,1: A LPUART interrupt is generated whenever.."
|
|
newline
|
|
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever TC = 1.."
|
|
bitfld.long 0x0 5. "RXNEIE,Receive data register not empty" "0: Interrupt is inhibited,1: A LPUART interrupt is generated whenever ORE = 1.."
|
|
newline
|
|
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever IDLE =.."
|
|
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
|
|
newline
|
|
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
|
|
bitfld.long 0x0 1. "UESM,LPUART enable in Stop mode" "0: LPUART not able to wake up the MCU from..,1: LPUART able to wake up the MCU from low-power.."
|
|
newline
|
|
bitfld.long 0x0 0. "UE,LPUART enable" "0: LPUART prescaler and outputs disabled low-power..,1: LPUART enabled"
|
|
line.long 0x4 "LPUART_CR2,LPUART control register 2"
|
|
hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the LPUART node"
|
|
bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "0: data is transmitted/received with data bit 0..,1: data is transmitted/received with the MSB (bit.."
|
|
newline
|
|
bitfld.long 0x4 18. "DATAINV,Binary data inversion" "0: Logical data from the data register are..,1: Logical data from the data register are.."
|
|
bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "0: TX pin signal works using the standard logic..,1: TX pin signal values are inverted.."
|
|
newline
|
|
bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "0: RX pin signal works using the standard logic..,1: RX pin signal values are inverted.."
|
|
bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "0: TX/RX pins are used as defined in standard pinout,1: The TX and RX pins functions are swapped. This.."
|
|
newline
|
|
bitfld.long 0x4 12.--13. "STOP,STOP bits" "0: 1 stop bit,?,2: 2 stop bits,?"
|
|
bitfld.long 0x4 4. "ADDM7,7-bit address detection/4-bit address detection" "0: 4-bit address detection,1: 7-bit address detection (in 8-bit data mode)"
|
|
line.long 0x8 "LPUART_CR3,LPUART control register 3"
|
|
bitfld.long 0x8 29.--31. "TXFTCFG,TXFIFO threshold configuration" "0: TXFIFO reaches 1/8 of its depth.,1: TXFIFO reaches 1/4 of its depth.,?,3: TXFIFO reaches 3/4 of its depth.,4: TXFIFO reaches 7/8 of its depth.,5: TXFIFO becomes empty.,6: TXFIFO reaches 1/2 of its depth.,?"
|
|
bitfld.long 0x8 28. "RXFTIE,RXFIFO threshold interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated when Receive.."
|
|
newline
|
|
bitfld.long 0x8 25.--27. "RXFTCFG,Receive FIFO threshold configuration" "0: Receive FIFO reaches 1/8 of its depth.,1: Receive FIFO reaches 1/4 of its depth.,?,3: Receive FIFO reaches 3/4 of its depth.,4: Receive FIFO reaches 7/8 of its depth.,5: Receive FIFO becomes full.,6: Receive FIFO reaches 1/2 of its depth.,?"
|
|
bitfld.long 0x8 23. "TXFTIE,TXFIFO threshold interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated when TXFIFO.."
|
|
newline
|
|
bitfld.long 0x8 22. "WUFIE,Wakeup from low-power mode interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever WUF =.."
|
|
bitfld.long 0x8 20.--21. "WUS,Wakeup from low-power mode interrupt flag selection" "0: WUF active on address match (as defined by..,?,2: WUF active on Start bit detection,3: WUF active on RXNE."
|
|
newline
|
|
bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "0: DE signal is active high.,1: DE signal is active low."
|
|
bitfld.long 0x8 14. "DEM,Driver enable mode" "0: DE function is disabled.,1: DE function is enabled. The DE signal is output.."
|
|
newline
|
|
bitfld.long 0x8 13. "DDRE,DMA disable on reception error" "0: DMA is not disabled in case of reception error.,1: DMA is disabled following a reception error. The.."
|
|
bitfld.long 0x8 12. "OVRDIS,Overrun disable" "0: Overrun Error Flag ORE is set when received data..,1: Overrun functionality is disabled. If new data.."
|
|
newline
|
|
bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever CTSIF = 1 in.."
|
|
bitfld.long 0x8 9. "CTSE,CTS enable" "0: CTS hardware flow control disabled,1: CTS mode enabled data is only transmitted when.."
|
|
newline
|
|
bitfld.long 0x8 8. "RTSE,RTS enable" "0: RTS hardware flow control disabled,1: RTS output enabled data is only requested when.."
|
|
bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "0: DMA mode is disabled for transmission,1: DMA mode is enabled for transmission"
|
|
newline
|
|
bitfld.long 0x8 6. "DMAR,DMA enable receiver" "0: DMA mode is disabled for reception,1: DMA mode is enabled for reception"
|
|
bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "0: Half duplex mode is not selected,1: Half duplex mode is selected"
|
|
newline
|
|
bitfld.long 0x8 0. "EIE,Error interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated when FE = 1 or ORE = 1.."
|
|
line.long 0xC "LPUART_BRR,LPUART baud rate register"
|
|
hexmask.long.tbyte 0xC 0.--19. 1. "BRR,LPUART baud rate"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x0 "LPUART_RQR,LPUART request register"
|
|
bitfld.long 0x0 4. "TXFRQ,Transmit data flush request" "0,1"
|
|
bitfld.long 0x0 3. "RXFRQ,Receive data flush request" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1"
|
|
bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "LPUART_ISR,LPUART interrupt and status register"
|
|
bitfld.long 0x0 27. "TXFT,TXFIFO threshold flag" "0: TXFIFO does not reach the programmed threshold.,1: TXFIFO reached the programmed threshold."
|
|
bitfld.long 0x0 26. "RXFT,RXFIFO threshold flag" "0: Receive FIFO does not reach the programmed..,1: Receive FIFO reached the programmed threshold."
|
|
newline
|
|
bitfld.long 0x0 24. "RXFF,RXFIFO full" "0: RXFIFO is not full,1: RXFIFO is full"
|
|
bitfld.long 0x0 23. "TXFE,TXFIFO empty" "0: TXFIFO is not empty,1: TXFIFO is empty"
|
|
newline
|
|
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1"
|
|
bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20. "WUF,Wakeup from low-power mode flag" "0,1"
|
|
bitfld.long 0x0 19. "RWU,Receiver wakeup from Mute mode" "0: Receiver in Active mode,1: Receiver in Mute mode"
|
|
newline
|
|
bitfld.long 0x0 18. "SBKF,Send break flag" "0: Break character transmitted,1: Break character requested by setting SBKRQ bit.."
|
|
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character Match detected"
|
|
newline
|
|
bitfld.long 0x0 16. "BUSY,Busy flag" "0: LPUART is idle (no reception),1: Reception on going"
|
|
bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
|
|
newline
|
|
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
|
|
bitfld.long 0x0 7. "TXFNF,TXFIFO not full" "0: Data register is full/Transmit FIFO is full.,1: Data register/Transmit FIFO is not full."
|
|
newline
|
|
bitfld.long 0x0 6. "TC,Transmission complete" "0: Transmission is not complete,1: Transmission is complete"
|
|
bitfld.long 0x0 5. "RXFNE,RXFIFO not empty" "0: Data is not received,1: Received data is ready to be read."
|
|
newline
|
|
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
|
|
bitfld.long 0x0 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected"
|
|
newline
|
|
bitfld.long 0x0 2. "NE,Start bit noise detection flag" "0: No noise is detected,1: Noise is detected"
|
|
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
|
|
newline
|
|
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "LPUART_ISR_ALTERNATE,LPUART interrupt and status register"
|
|
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1"
|
|
bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20. "WUF,Wakeup from low-power mode flag" "0,1"
|
|
bitfld.long 0x0 19. "RWU,Receiver wakeup from Mute mode" "0: Receiver in active mode,1: Receiver in Mute mode"
|
|
newline
|
|
bitfld.long 0x0 18. "SBKF,Send break flag" "0: Break character transmitted,1: Break character requested by setting SBKRQ bit.."
|
|
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character Match detected"
|
|
newline
|
|
bitfld.long 0x0 16. "BUSY,Busy flag" "0: LPUART is idle (no reception),1: Reception on going"
|
|
bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
|
|
newline
|
|
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
|
|
bitfld.long 0x0 7. "TXE,Transmit data register empty/TXFIFO not full" "0: Data register full,1: Data register not full"
|
|
newline
|
|
bitfld.long 0x0 6. "TC,Transmission complete" "0: Transmission is not complete,1: Transmission is complete"
|
|
bitfld.long 0x0 5. "RXNE,Read data register not empty" "0: Data is not received,1: Received data is ready to be read."
|
|
newline
|
|
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
|
|
bitfld.long 0x0 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected"
|
|
newline
|
|
bitfld.long 0x0 2. "NE,Start bit noise detection flag" "0: No noise is detected,1: Noise is detected"
|
|
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
|
|
newline
|
|
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x0 "LPUART_ICR,LPUART interrupt flag clear register"
|
|
bitfld.long 0x0 20. "WUCF,Wakeup from low-power mode clear flag" "?,?"
|
|
bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "CTSCF,CTS clear flag" "0,1"
|
|
bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1"
|
|
bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1"
|
|
bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1"
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x0 "LPUART_RDR,LPUART receive data register"
|
|
hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value"
|
|
group.long 0x28++0x7
|
|
line.long 0x0 "LPUART_TDR,LPUART transmit data register"
|
|
hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value"
|
|
line.long 0x4 "LPUART_PRESC,LPUART prescaler register"
|
|
hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler"
|
|
tree.end
|
|
endif
|
|
sif (cpuis("STM32L4S5*"))
|
|
tree "LPUART"
|
|
base ad:0x40008000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "LPUART_CR1,LPUART control register 1"
|
|
bitfld.long 0x0 31. "RXFFIE,RXFIFO full interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated when RXFF = 1.."
|
|
bitfld.long 0x0 30. "TXFEIE,TXFIFO empty interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated when TXFE = 1.."
|
|
newline
|
|
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
|
|
bitfld.long 0x0 28. "M1,Word length" "0: 1 Start bit,1: 1 Start bit"
|
|
newline
|
|
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver enable assertion time"
|
|
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver enable deassertion time"
|
|
newline
|
|
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated when the CMF bit.."
|
|
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between Mute mode and active.."
|
|
newline
|
|
bitfld.long 0x0 12. "M0,Word length" "0,1"
|
|
bitfld.long 0x0 11. "WAKE,Receiver wakeup method" "0: Idle line,1: Address mark"
|
|
newline
|
|
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
|
|
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
|
|
newline
|
|
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever PE = 1.."
|
|
bitfld.long 0x0 7. "TXFNFIE,TXFIFO not full interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated whenever.."
|
|
newline
|
|
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever TC = 1.."
|
|
bitfld.long 0x0 5. "RXFNEIE,RXFIFO not empty interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated whenever ORE = 1.."
|
|
newline
|
|
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever IDLE =.."
|
|
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
|
|
newline
|
|
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
|
|
bitfld.long 0x0 1. "UESM,LPUART enable in Stop mode" "0: LPUART not able to wake up the MCU from..,1: LPUART able to wake up the MCU from low-power.."
|
|
newline
|
|
bitfld.long 0x0 0. "UE,LPUART enable" "0: LPUART prescaler and outputs disabled low-power..,1: LPUART enabled"
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "LPUART_CR1_ALTERNATE,LPUART control register 1"
|
|
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
|
|
bitfld.long 0x0 28. "M1,Word length" "0: 1 Start bit,1: 1 Start bit"
|
|
newline
|
|
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver enable assertion time"
|
|
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver enable deassertion time"
|
|
newline
|
|
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated when the CMF bit.."
|
|
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between Mute mode and active.."
|
|
newline
|
|
bitfld.long 0x0 12. "M0,Word length" "0,1"
|
|
bitfld.long 0x0 11. "WAKE,Receiver wakeup method" "0: Idle line,1: Address mark"
|
|
newline
|
|
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
|
|
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
|
|
newline
|
|
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever PE = 1.."
|
|
bitfld.long 0x0 7. "TXEIE,Transmit data register empty" "0: Interrupt is inhibited,1: A LPUART interrupt is generated whenever.."
|
|
newline
|
|
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever TC = 1.."
|
|
bitfld.long 0x0 5. "RXNEIE,Receive data register not empty" "0: Interrupt is inhibited,1: A LPUART interrupt is generated whenever ORE = 1.."
|
|
newline
|
|
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever IDLE =.."
|
|
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
|
|
newline
|
|
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
|
|
bitfld.long 0x0 1. "UESM,LPUART enable in Stop mode" "0: LPUART not able to wake up the MCU from..,1: LPUART able to wake up the MCU from low-power.."
|
|
newline
|
|
bitfld.long 0x0 0. "UE,LPUART enable" "0: LPUART prescaler and outputs disabled low-power..,1: LPUART enabled"
|
|
line.long 0x4 "LPUART_CR2,LPUART control register 2"
|
|
hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the LPUART node"
|
|
bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "0: data is transmitted/received with data bit 0..,1: data is transmitted/received with the MSB (bit.."
|
|
newline
|
|
bitfld.long 0x4 18. "DATAINV,Binary data inversion" "0: Logical data from the data register are..,1: Logical data from the data register are.."
|
|
bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "0: TX pin signal works using the standard logic..,1: TX pin signal values are inverted.."
|
|
newline
|
|
bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "0: RX pin signal works using the standard logic..,1: RX pin signal values are inverted.."
|
|
bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "0: TX/RX pins are used as defined in standard pinout,1: The TX and RX pins functions are swapped. This.."
|
|
newline
|
|
bitfld.long 0x4 12.--13. "STOP,STOP bits" "0: 1 stop bit,?,2: 2 stop bits,?"
|
|
bitfld.long 0x4 4. "ADDM7,7-bit address detection/4-bit address detection" "0: 4-bit address detection,1: 7-bit address detection (in 8-bit data mode)"
|
|
line.long 0x8 "LPUART_CR3,LPUART control register 3"
|
|
bitfld.long 0x8 29.--31. "TXFTCFG,TXFIFO threshold configuration" "0: TXFIFO reaches 1/8 of its depth.,1: TXFIFO reaches 1/4 of its depth.,?,3: TXFIFO reaches 3/4 of its depth.,4: TXFIFO reaches 7/8 of its depth.,5: TXFIFO becomes empty.,6: TXFIFO reaches 1/2 of its depth.,?"
|
|
bitfld.long 0x8 28. "RXFTIE,RXFIFO threshold interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated when Receive.."
|
|
newline
|
|
bitfld.long 0x8 25.--27. "RXFTCFG,Receive FIFO threshold configuration" "0: Receive FIFO reaches 1/8 of its depth.,1: Receive FIFO reaches 1/4 of its depth.,?,3: Receive FIFO reaches 3/4 of its depth.,4: Receive FIFO reaches 7/8 of its depth.,5: Receive FIFO becomes full.,6: Receive FIFO reaches 1/2 of its depth.,?"
|
|
bitfld.long 0x8 23. "TXFTIE,TXFIFO threshold interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated when TXFIFO.."
|
|
newline
|
|
bitfld.long 0x8 22. "WUFIE,Wakeup from low-power mode interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever WUF =.."
|
|
bitfld.long 0x8 20.--21. "WUS,Wakeup from low-power mode interrupt flag selection" "0: WUF active on address match (as defined by..,?,2: WUF active on Start bit detection,3: WUF active on RXNE."
|
|
newline
|
|
bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "0: DE signal is active high.,1: DE signal is active low."
|
|
bitfld.long 0x8 14. "DEM,Driver enable mode" "0: DE function is disabled.,1: DE function is enabled. The DE signal is output.."
|
|
newline
|
|
bitfld.long 0x8 13. "DDRE,DMA disable on reception error" "0: DMA is not disabled in case of reception error.,1: DMA is disabled following a reception error. The.."
|
|
bitfld.long 0x8 12. "OVRDIS,Overrun disable" "0: Overrun Error Flag ORE is set when received data..,1: Overrun functionality is disabled. If new data.."
|
|
newline
|
|
bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever CTSIF = 1 in.."
|
|
bitfld.long 0x8 9. "CTSE,CTS enable" "0: CTS hardware flow control disabled,1: CTS mode enabled data is only transmitted when.."
|
|
newline
|
|
bitfld.long 0x8 8. "RTSE,RTS enable" "0: RTS hardware flow control disabled,1: RTS output enabled data is only requested when.."
|
|
bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "0: DMA mode is disabled for transmission,1: DMA mode is enabled for transmission"
|
|
newline
|
|
bitfld.long 0x8 6. "DMAR,DMA enable receiver" "0: DMA mode is disabled for reception,1: DMA mode is enabled for reception"
|
|
bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "0: Half duplex mode is not selected,1: Half duplex mode is selected"
|
|
newline
|
|
bitfld.long 0x8 0. "EIE,Error interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated when FE = 1 or ORE = 1.."
|
|
line.long 0xC "LPUART_BRR,LPUART baud rate register"
|
|
hexmask.long.tbyte 0xC 0.--19. 1. "BRR,LPUART baud rate"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x0 "LPUART_RQR,LPUART request register"
|
|
bitfld.long 0x0 4. "TXFRQ,Transmit data flush request" "0,1"
|
|
bitfld.long 0x0 3. "RXFRQ,Receive data flush request" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1"
|
|
bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "LPUART_ISR,LPUART interrupt and status register"
|
|
bitfld.long 0x0 27. "TXFT,TXFIFO threshold flag" "0: TXFIFO does not reach the programmed threshold.,1: TXFIFO reached the programmed threshold."
|
|
bitfld.long 0x0 26. "RXFT,RXFIFO threshold flag" "0: Receive FIFO does not reach the programmed..,1: Receive FIFO reached the programmed threshold."
|
|
newline
|
|
bitfld.long 0x0 24. "RXFF,RXFIFO full" "0: RXFIFO is not full,1: RXFIFO is full"
|
|
bitfld.long 0x0 23. "TXFE,TXFIFO empty" "0: TXFIFO is not empty,1: TXFIFO is empty"
|
|
newline
|
|
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1"
|
|
bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20. "WUF,Wakeup from low-power mode flag" "0,1"
|
|
bitfld.long 0x0 19. "RWU,Receiver wakeup from Mute mode" "0: Receiver in Active mode,1: Receiver in Mute mode"
|
|
newline
|
|
bitfld.long 0x0 18. "SBKF,Send break flag" "0: Break character transmitted,1: Break character requested by setting SBKRQ bit.."
|
|
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character Match detected"
|
|
newline
|
|
bitfld.long 0x0 16. "BUSY,Busy flag" "0: LPUART is idle (no reception),1: Reception on going"
|
|
bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
|
|
newline
|
|
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
|
|
bitfld.long 0x0 7. "TXFNF,TXFIFO not full" "0: Data register is full/Transmit FIFO is full.,1: Data register/Transmit FIFO is not full."
|
|
newline
|
|
bitfld.long 0x0 6. "TC,Transmission complete" "0: Transmission is not complete,1: Transmission is complete"
|
|
bitfld.long 0x0 5. "RXFNE,RXFIFO not empty" "0: Data is not received,1: Received data is ready to be read."
|
|
newline
|
|
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
|
|
bitfld.long 0x0 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected"
|
|
newline
|
|
bitfld.long 0x0 2. "NE,Start bit noise detection flag" "0: No noise is detected,1: Noise is detected"
|
|
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
|
|
newline
|
|
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "LPUART_ISR_ALTERNATE,LPUART interrupt and status register"
|
|
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1"
|
|
bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20. "WUF,Wakeup from low-power mode flag" "0,1"
|
|
bitfld.long 0x0 19. "RWU,Receiver wakeup from Mute mode" "0: Receiver in active mode,1: Receiver in Mute mode"
|
|
newline
|
|
bitfld.long 0x0 18. "SBKF,Send break flag" "0: Break character transmitted,1: Break character requested by setting SBKRQ bit.."
|
|
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character Match detected"
|
|
newline
|
|
bitfld.long 0x0 16. "BUSY,Busy flag" "0: LPUART is idle (no reception),1: Reception on going"
|
|
bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
|
|
newline
|
|
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
|
|
bitfld.long 0x0 7. "TXE,Transmit data register empty/TXFIFO not full" "0: Data register full,1: Data register not full"
|
|
newline
|
|
bitfld.long 0x0 6. "TC,Transmission complete" "0: Transmission is not complete,1: Transmission is complete"
|
|
bitfld.long 0x0 5. "RXNE,Read data register not empty" "0: Data is not received,1: Received data is ready to be read."
|
|
newline
|
|
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
|
|
bitfld.long 0x0 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected"
|
|
newline
|
|
bitfld.long 0x0 2. "NE,Start bit noise detection flag" "0: No noise is detected,1: Noise is detected"
|
|
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
|
|
newline
|
|
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x0 "LPUART_ICR,LPUART interrupt flag clear register"
|
|
bitfld.long 0x0 20. "WUCF,Wakeup from low-power mode clear flag" "?,?"
|
|
bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "CTSCF,CTS clear flag" "0,1"
|
|
bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1"
|
|
bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1"
|
|
bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1"
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x0 "LPUART_RDR,LPUART receive data register"
|
|
hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value"
|
|
group.long 0x28++0x7
|
|
line.long 0x0 "LPUART_TDR,LPUART transmit data register"
|
|
hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value"
|
|
line.long 0x4 "LPUART_PRESC,LPUART prescaler register"
|
|
hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler"
|
|
tree.end
|
|
endif
|
|
sif (cpuis("STM32L4S7*"))
|
|
tree "LPUART"
|
|
base ad:0x40008000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "LPUART_CR1,LPUART control register 1"
|
|
bitfld.long 0x0 31. "RXFFIE,RXFIFO full interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated when RXFF = 1.."
|
|
bitfld.long 0x0 30. "TXFEIE,TXFIFO empty interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated when TXFE = 1.."
|
|
newline
|
|
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
|
|
bitfld.long 0x0 28. "M1,Word length" "0: 1 Start bit,1: 1 Start bit"
|
|
newline
|
|
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver enable assertion time"
|
|
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver enable deassertion time"
|
|
newline
|
|
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated when the CMF bit.."
|
|
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between Mute mode and active.."
|
|
newline
|
|
bitfld.long 0x0 12. "M0,Word length" "0,1"
|
|
bitfld.long 0x0 11. "WAKE,Receiver wakeup method" "0: Idle line,1: Address mark"
|
|
newline
|
|
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
|
|
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
|
|
newline
|
|
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever PE = 1.."
|
|
bitfld.long 0x0 7. "TXFNFIE,TXFIFO not full interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated whenever.."
|
|
newline
|
|
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever TC = 1.."
|
|
bitfld.long 0x0 5. "RXFNEIE,RXFIFO not empty interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated whenever ORE = 1.."
|
|
newline
|
|
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever IDLE =.."
|
|
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
|
|
newline
|
|
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
|
|
bitfld.long 0x0 1. "UESM,LPUART enable in Stop mode" "0: LPUART not able to wake up the MCU from..,1: LPUART able to wake up the MCU from low-power.."
|
|
newline
|
|
bitfld.long 0x0 0. "UE,LPUART enable" "0: LPUART prescaler and outputs disabled low-power..,1: LPUART enabled"
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "LPUART_CR1_ALTERNATE,LPUART control register 1"
|
|
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
|
|
bitfld.long 0x0 28. "M1,Word length" "0: 1 Start bit,1: 1 Start bit"
|
|
newline
|
|
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver enable assertion time"
|
|
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver enable deassertion time"
|
|
newline
|
|
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated when the CMF bit.."
|
|
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between Mute mode and active.."
|
|
newline
|
|
bitfld.long 0x0 12. "M0,Word length" "0,1"
|
|
bitfld.long 0x0 11. "WAKE,Receiver wakeup method" "0: Idle line,1: Address mark"
|
|
newline
|
|
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
|
|
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
|
|
newline
|
|
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever PE = 1.."
|
|
bitfld.long 0x0 7. "TXEIE,Transmit data register empty" "0: Interrupt is inhibited,1: A LPUART interrupt is generated whenever.."
|
|
newline
|
|
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever TC = 1.."
|
|
bitfld.long 0x0 5. "RXNEIE,Receive data register not empty" "0: Interrupt is inhibited,1: A LPUART interrupt is generated whenever ORE = 1.."
|
|
newline
|
|
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever IDLE =.."
|
|
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
|
|
newline
|
|
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
|
|
bitfld.long 0x0 1. "UESM,LPUART enable in Stop mode" "0: LPUART not able to wake up the MCU from..,1: LPUART able to wake up the MCU from low-power.."
|
|
newline
|
|
bitfld.long 0x0 0. "UE,LPUART enable" "0: LPUART prescaler and outputs disabled low-power..,1: LPUART enabled"
|
|
line.long 0x4 "LPUART_CR2,LPUART control register 2"
|
|
hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the LPUART node"
|
|
bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "0: data is transmitted/received with data bit 0..,1: data is transmitted/received with the MSB (bit.."
|
|
newline
|
|
bitfld.long 0x4 18. "DATAINV,Binary data inversion" "0: Logical data from the data register are..,1: Logical data from the data register are.."
|
|
bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "0: TX pin signal works using the standard logic..,1: TX pin signal values are inverted.."
|
|
newline
|
|
bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "0: RX pin signal works using the standard logic..,1: RX pin signal values are inverted.."
|
|
bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "0: TX/RX pins are used as defined in standard pinout,1: The TX and RX pins functions are swapped. This.."
|
|
newline
|
|
bitfld.long 0x4 12.--13. "STOP,STOP bits" "0: 1 stop bit,?,2: 2 stop bits,?"
|
|
bitfld.long 0x4 4. "ADDM7,7-bit address detection/4-bit address detection" "0: 4-bit address detection,1: 7-bit address detection (in 8-bit data mode)"
|
|
line.long 0x8 "LPUART_CR3,LPUART control register 3"
|
|
bitfld.long 0x8 29.--31. "TXFTCFG,TXFIFO threshold configuration" "0: TXFIFO reaches 1/8 of its depth.,1: TXFIFO reaches 1/4 of its depth.,?,3: TXFIFO reaches 3/4 of its depth.,4: TXFIFO reaches 7/8 of its depth.,5: TXFIFO becomes empty.,6: TXFIFO reaches 1/2 of its depth.,?"
|
|
bitfld.long 0x8 28. "RXFTIE,RXFIFO threshold interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated when Receive.."
|
|
newline
|
|
bitfld.long 0x8 25.--27. "RXFTCFG,Receive FIFO threshold configuration" "0: Receive FIFO reaches 1/8 of its depth.,1: Receive FIFO reaches 1/4 of its depth.,?,3: Receive FIFO reaches 3/4 of its depth.,4: Receive FIFO reaches 7/8 of its depth.,5: Receive FIFO becomes full.,6: Receive FIFO reaches 1/2 of its depth.,?"
|
|
bitfld.long 0x8 23. "TXFTIE,TXFIFO threshold interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated when TXFIFO.."
|
|
newline
|
|
bitfld.long 0x8 22. "WUFIE,Wakeup from low-power mode interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever WUF =.."
|
|
bitfld.long 0x8 20.--21. "WUS,Wakeup from low-power mode interrupt flag selection" "0: WUF active on address match (as defined by..,?,2: WUF active on Start bit detection,3: WUF active on RXNE."
|
|
newline
|
|
bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "0: DE signal is active high.,1: DE signal is active low."
|
|
bitfld.long 0x8 14. "DEM,Driver enable mode" "0: DE function is disabled.,1: DE function is enabled. The DE signal is output.."
|
|
newline
|
|
bitfld.long 0x8 13. "DDRE,DMA disable on reception error" "0: DMA is not disabled in case of reception error.,1: DMA is disabled following a reception error. The.."
|
|
bitfld.long 0x8 12. "OVRDIS,Overrun disable" "0: Overrun Error Flag ORE is set when received data..,1: Overrun functionality is disabled. If new data.."
|
|
newline
|
|
bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever CTSIF = 1 in.."
|
|
bitfld.long 0x8 9. "CTSE,CTS enable" "0: CTS hardware flow control disabled,1: CTS mode enabled data is only transmitted when.."
|
|
newline
|
|
bitfld.long 0x8 8. "RTSE,RTS enable" "0: RTS hardware flow control disabled,1: RTS output enabled data is only requested when.."
|
|
bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "0: DMA mode is disabled for transmission,1: DMA mode is enabled for transmission"
|
|
newline
|
|
bitfld.long 0x8 6. "DMAR,DMA enable receiver" "0: DMA mode is disabled for reception,1: DMA mode is enabled for reception"
|
|
bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "0: Half duplex mode is not selected,1: Half duplex mode is selected"
|
|
newline
|
|
bitfld.long 0x8 0. "EIE,Error interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated when FE = 1 or ORE = 1.."
|
|
line.long 0xC "LPUART_BRR,LPUART baud rate register"
|
|
hexmask.long.tbyte 0xC 0.--19. 1. "BRR,LPUART baud rate"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x0 "LPUART_RQR,LPUART request register"
|
|
bitfld.long 0x0 4. "TXFRQ,Transmit data flush request" "0,1"
|
|
bitfld.long 0x0 3. "RXFRQ,Receive data flush request" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1"
|
|
bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "LPUART_ISR,LPUART interrupt and status register"
|
|
bitfld.long 0x0 27. "TXFT,TXFIFO threshold flag" "0: TXFIFO does not reach the programmed threshold.,1: TXFIFO reached the programmed threshold."
|
|
bitfld.long 0x0 26. "RXFT,RXFIFO threshold flag" "0: Receive FIFO does not reach the programmed..,1: Receive FIFO reached the programmed threshold."
|
|
newline
|
|
bitfld.long 0x0 24. "RXFF,RXFIFO full" "0: RXFIFO is not full,1: RXFIFO is full"
|
|
bitfld.long 0x0 23. "TXFE,TXFIFO empty" "0: TXFIFO is not empty,1: TXFIFO is empty"
|
|
newline
|
|
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1"
|
|
bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20. "WUF,Wakeup from low-power mode flag" "0,1"
|
|
bitfld.long 0x0 19. "RWU,Receiver wakeup from Mute mode" "0: Receiver in Active mode,1: Receiver in Mute mode"
|
|
newline
|
|
bitfld.long 0x0 18. "SBKF,Send break flag" "0: Break character transmitted,1: Break character requested by setting SBKRQ bit.."
|
|
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character Match detected"
|
|
newline
|
|
bitfld.long 0x0 16. "BUSY,Busy flag" "0: LPUART is idle (no reception),1: Reception on going"
|
|
bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
|
|
newline
|
|
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
|
|
bitfld.long 0x0 7. "TXFNF,TXFIFO not full" "0: Data register is full/Transmit FIFO is full.,1: Data register/Transmit FIFO is not full."
|
|
newline
|
|
bitfld.long 0x0 6. "TC,Transmission complete" "0: Transmission is not complete,1: Transmission is complete"
|
|
bitfld.long 0x0 5. "RXFNE,RXFIFO not empty" "0: Data is not received,1: Received data is ready to be read."
|
|
newline
|
|
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
|
|
bitfld.long 0x0 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected"
|
|
newline
|
|
bitfld.long 0x0 2. "NE,Start bit noise detection flag" "0: No noise is detected,1: Noise is detected"
|
|
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
|
|
newline
|
|
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "LPUART_ISR_ALTERNATE,LPUART interrupt and status register"
|
|
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1"
|
|
bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20. "WUF,Wakeup from low-power mode flag" "0,1"
|
|
bitfld.long 0x0 19. "RWU,Receiver wakeup from Mute mode" "0: Receiver in active mode,1: Receiver in Mute mode"
|
|
newline
|
|
bitfld.long 0x0 18. "SBKF,Send break flag" "0: Break character transmitted,1: Break character requested by setting SBKRQ bit.."
|
|
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character Match detected"
|
|
newline
|
|
bitfld.long 0x0 16. "BUSY,Busy flag" "0: LPUART is idle (no reception),1: Reception on going"
|
|
bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
|
|
newline
|
|
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
|
|
bitfld.long 0x0 7. "TXE,Transmit data register empty/TXFIFO not full" "0: Data register full,1: Data register not full"
|
|
newline
|
|
bitfld.long 0x0 6. "TC,Transmission complete" "0: Transmission is not complete,1: Transmission is complete"
|
|
bitfld.long 0x0 5. "RXNE,Read data register not empty" "0: Data is not received,1: Received data is ready to be read."
|
|
newline
|
|
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
|
|
bitfld.long 0x0 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected"
|
|
newline
|
|
bitfld.long 0x0 2. "NE,Start bit noise detection flag" "0: No noise is detected,1: Noise is detected"
|
|
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
|
|
newline
|
|
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x0 "LPUART_ICR,LPUART interrupt flag clear register"
|
|
bitfld.long 0x0 20. "WUCF,Wakeup from low-power mode clear flag" "?,?"
|
|
bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "CTSCF,CTS clear flag" "0,1"
|
|
bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1"
|
|
bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1"
|
|
bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1"
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x0 "LPUART_RDR,LPUART receive data register"
|
|
hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value"
|
|
group.long 0x28++0x7
|
|
line.long 0x0 "LPUART_TDR,LPUART transmit data register"
|
|
hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value"
|
|
line.long 0x4 "LPUART_PRESC,LPUART prescaler register"
|
|
hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler"
|
|
tree.end
|
|
endif
|
|
sif (cpuis("STM32L4S9*"))
|
|
tree "LPUART"
|
|
base ad:0x40008000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "LPUART_CR1,LPUART control register 1"
|
|
bitfld.long 0x0 31. "RXFFIE,RXFIFO full interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated when RXFF = 1.."
|
|
bitfld.long 0x0 30. "TXFEIE,TXFIFO empty interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated when TXFE = 1.."
|
|
newline
|
|
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
|
|
bitfld.long 0x0 28. "M1,Word length" "0: 1 Start bit,1: 1 Start bit"
|
|
newline
|
|
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver enable assertion time"
|
|
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver enable deassertion time"
|
|
newline
|
|
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated when the CMF bit.."
|
|
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between Mute mode and active.."
|
|
newline
|
|
bitfld.long 0x0 12. "M0,Word length" "0,1"
|
|
bitfld.long 0x0 11. "WAKE,Receiver wakeup method" "0: Idle line,1: Address mark"
|
|
newline
|
|
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
|
|
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
|
|
newline
|
|
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever PE = 1.."
|
|
bitfld.long 0x0 7. "TXFNFIE,TXFIFO not full interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated whenever.."
|
|
newline
|
|
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever TC = 1.."
|
|
bitfld.long 0x0 5. "RXFNEIE,RXFIFO not empty interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated whenever ORE = 1.."
|
|
newline
|
|
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever IDLE =.."
|
|
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
|
|
newline
|
|
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
|
|
bitfld.long 0x0 1. "UESM,LPUART enable in Stop mode" "0: LPUART not able to wake up the MCU from..,1: LPUART able to wake up the MCU from low-power.."
|
|
newline
|
|
bitfld.long 0x0 0. "UE,LPUART enable" "0: LPUART prescaler and outputs disabled low-power..,1: LPUART enabled"
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "LPUART_CR1_ALTERNATE,LPUART control register 1"
|
|
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
|
|
bitfld.long 0x0 28. "M1,Word length" "0: 1 Start bit,1: 1 Start bit"
|
|
newline
|
|
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver enable assertion time"
|
|
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver enable deassertion time"
|
|
newline
|
|
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated when the CMF bit.."
|
|
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between Mute mode and active.."
|
|
newline
|
|
bitfld.long 0x0 12. "M0,Word length" "0,1"
|
|
bitfld.long 0x0 11. "WAKE,Receiver wakeup method" "0: Idle line,1: Address mark"
|
|
newline
|
|
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
|
|
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
|
|
newline
|
|
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever PE = 1.."
|
|
bitfld.long 0x0 7. "TXEIE,Transmit data register empty" "0: Interrupt is inhibited,1: A LPUART interrupt is generated whenever.."
|
|
newline
|
|
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever TC = 1.."
|
|
bitfld.long 0x0 5. "RXNEIE,Receive data register not empty" "0: Interrupt is inhibited,1: A LPUART interrupt is generated whenever ORE = 1.."
|
|
newline
|
|
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever IDLE =.."
|
|
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
|
|
newline
|
|
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
|
|
bitfld.long 0x0 1. "UESM,LPUART enable in Stop mode" "0: LPUART not able to wake up the MCU from..,1: LPUART able to wake up the MCU from low-power.."
|
|
newline
|
|
bitfld.long 0x0 0. "UE,LPUART enable" "0: LPUART prescaler and outputs disabled low-power..,1: LPUART enabled"
|
|
line.long 0x4 "LPUART_CR2,LPUART control register 2"
|
|
hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the LPUART node"
|
|
bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "0: data is transmitted/received with data bit 0..,1: data is transmitted/received with the MSB (bit.."
|
|
newline
|
|
bitfld.long 0x4 18. "DATAINV,Binary data inversion" "0: Logical data from the data register are..,1: Logical data from the data register are.."
|
|
bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "0: TX pin signal works using the standard logic..,1: TX pin signal values are inverted.."
|
|
newline
|
|
bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "0: RX pin signal works using the standard logic..,1: RX pin signal values are inverted.."
|
|
bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "0: TX/RX pins are used as defined in standard pinout,1: The TX and RX pins functions are swapped. This.."
|
|
newline
|
|
bitfld.long 0x4 12.--13. "STOP,STOP bits" "0: 1 stop bit,?,2: 2 stop bits,?"
|
|
bitfld.long 0x4 4. "ADDM7,7-bit address detection/4-bit address detection" "0: 4-bit address detection,1: 7-bit address detection (in 8-bit data mode)"
|
|
line.long 0x8 "LPUART_CR3,LPUART control register 3"
|
|
bitfld.long 0x8 29.--31. "TXFTCFG,TXFIFO threshold configuration" "0: TXFIFO reaches 1/8 of its depth.,1: TXFIFO reaches 1/4 of its depth.,?,3: TXFIFO reaches 3/4 of its depth.,4: TXFIFO reaches 7/8 of its depth.,5: TXFIFO becomes empty.,6: TXFIFO reaches 1/2 of its depth.,?"
|
|
bitfld.long 0x8 28. "RXFTIE,RXFIFO threshold interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated when Receive.."
|
|
newline
|
|
bitfld.long 0x8 25.--27. "RXFTCFG,Receive FIFO threshold configuration" "0: Receive FIFO reaches 1/8 of its depth.,1: Receive FIFO reaches 1/4 of its depth.,?,3: Receive FIFO reaches 3/4 of its depth.,4: Receive FIFO reaches 7/8 of its depth.,5: Receive FIFO becomes full.,6: Receive FIFO reaches 1/2 of its depth.,?"
|
|
bitfld.long 0x8 23. "TXFTIE,TXFIFO threshold interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated when TXFIFO.."
|
|
newline
|
|
bitfld.long 0x8 22. "WUFIE,Wakeup from low-power mode interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever WUF =.."
|
|
bitfld.long 0x8 20.--21. "WUS,Wakeup from low-power mode interrupt flag selection" "0: WUF active on address match (as defined by..,?,2: WUF active on Start bit detection,3: WUF active on RXNE."
|
|
newline
|
|
bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "0: DE signal is active high.,1: DE signal is active low."
|
|
bitfld.long 0x8 14. "DEM,Driver enable mode" "0: DE function is disabled.,1: DE function is enabled. The DE signal is output.."
|
|
newline
|
|
bitfld.long 0x8 13. "DDRE,DMA disable on reception error" "0: DMA is not disabled in case of reception error.,1: DMA is disabled following a reception error. The.."
|
|
bitfld.long 0x8 12. "OVRDIS,Overrun disable" "0: Overrun Error Flag ORE is set when received data..,1: Overrun functionality is disabled. If new data.."
|
|
newline
|
|
bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever CTSIF = 1 in.."
|
|
bitfld.long 0x8 9. "CTSE,CTS enable" "0: CTS hardware flow control disabled,1: CTS mode enabled data is only transmitted when.."
|
|
newline
|
|
bitfld.long 0x8 8. "RTSE,RTS enable" "0: RTS hardware flow control disabled,1: RTS output enabled data is only requested when.."
|
|
bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "0: DMA mode is disabled for transmission,1: DMA mode is enabled for transmission"
|
|
newline
|
|
bitfld.long 0x8 6. "DMAR,DMA enable receiver" "0: DMA mode is disabled for reception,1: DMA mode is enabled for reception"
|
|
bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "0: Half duplex mode is not selected,1: Half duplex mode is selected"
|
|
newline
|
|
bitfld.long 0x8 0. "EIE,Error interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated when FE = 1 or ORE = 1.."
|
|
line.long 0xC "LPUART_BRR,LPUART baud rate register"
|
|
hexmask.long.tbyte 0xC 0.--19. 1. "BRR,LPUART baud rate"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x0 "LPUART_RQR,LPUART request register"
|
|
bitfld.long 0x0 4. "TXFRQ,Transmit data flush request" "0,1"
|
|
bitfld.long 0x0 3. "RXFRQ,Receive data flush request" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1"
|
|
bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "LPUART_ISR,LPUART interrupt and status register"
|
|
bitfld.long 0x0 27. "TXFT,TXFIFO threshold flag" "0: TXFIFO does not reach the programmed threshold.,1: TXFIFO reached the programmed threshold."
|
|
bitfld.long 0x0 26. "RXFT,RXFIFO threshold flag" "0: Receive FIFO does not reach the programmed..,1: Receive FIFO reached the programmed threshold."
|
|
newline
|
|
bitfld.long 0x0 24. "RXFF,RXFIFO full" "0: RXFIFO is not full,1: RXFIFO is full"
|
|
bitfld.long 0x0 23. "TXFE,TXFIFO empty" "0: TXFIFO is not empty,1: TXFIFO is empty"
|
|
newline
|
|
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1"
|
|
bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20. "WUF,Wakeup from low-power mode flag" "0,1"
|
|
bitfld.long 0x0 19. "RWU,Receiver wakeup from Mute mode" "0: Receiver in Active mode,1: Receiver in Mute mode"
|
|
newline
|
|
bitfld.long 0x0 18. "SBKF,Send break flag" "0: Break character transmitted,1: Break character requested by setting SBKRQ bit.."
|
|
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character Match detected"
|
|
newline
|
|
bitfld.long 0x0 16. "BUSY,Busy flag" "0: LPUART is idle (no reception),1: Reception on going"
|
|
bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
|
|
newline
|
|
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
|
|
bitfld.long 0x0 7. "TXFNF,TXFIFO not full" "0: Data register is full/Transmit FIFO is full.,1: Data register/Transmit FIFO is not full."
|
|
newline
|
|
bitfld.long 0x0 6. "TC,Transmission complete" "0: Transmission is not complete,1: Transmission is complete"
|
|
bitfld.long 0x0 5. "RXFNE,RXFIFO not empty" "0: Data is not received,1: Received data is ready to be read."
|
|
newline
|
|
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
|
|
bitfld.long 0x0 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected"
|
|
newline
|
|
bitfld.long 0x0 2. "NE,Start bit noise detection flag" "0: No noise is detected,1: Noise is detected"
|
|
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
|
|
newline
|
|
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "LPUART_ISR_ALTERNATE,LPUART interrupt and status register"
|
|
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1"
|
|
bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20. "WUF,Wakeup from low-power mode flag" "0,1"
|
|
bitfld.long 0x0 19. "RWU,Receiver wakeup from Mute mode" "0: Receiver in active mode,1: Receiver in Mute mode"
|
|
newline
|
|
bitfld.long 0x0 18. "SBKF,Send break flag" "0: Break character transmitted,1: Break character requested by setting SBKRQ bit.."
|
|
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character Match detected"
|
|
newline
|
|
bitfld.long 0x0 16. "BUSY,Busy flag" "0: LPUART is idle (no reception),1: Reception on going"
|
|
bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
|
|
newline
|
|
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
|
|
bitfld.long 0x0 7. "TXE,Transmit data register empty/TXFIFO not full" "0: Data register full,1: Data register not full"
|
|
newline
|
|
bitfld.long 0x0 6. "TC,Transmission complete" "0: Transmission is not complete,1: Transmission is complete"
|
|
bitfld.long 0x0 5. "RXNE,Read data register not empty" "0: Data is not received,1: Received data is ready to be read."
|
|
newline
|
|
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
|
|
bitfld.long 0x0 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected"
|
|
newline
|
|
bitfld.long 0x0 2. "NE,Start bit noise detection flag" "0: No noise is detected,1: Noise is detected"
|
|
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
|
|
newline
|
|
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x0 "LPUART_ICR,LPUART interrupt flag clear register"
|
|
bitfld.long 0x0 20. "WUCF,Wakeup from low-power mode clear flag" "?,?"
|
|
bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "CTSCF,CTS clear flag" "0,1"
|
|
bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1"
|
|
bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1"
|
|
bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1"
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x0 "LPUART_RDR,LPUART receive data register"
|
|
hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value"
|
|
group.long 0x28++0x7
|
|
line.long 0x0 "LPUART_TDR,LPUART transmit data register"
|
|
hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value"
|
|
line.long 0x4 "LPUART_PRESC,LPUART prescaler register"
|
|
hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler"
|
|
tree.end
|
|
endif
|
|
tree "UART4"
|
|
base ad:0x40004C00
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "USART_CR1,USART control register 1"
|
|
bitfld.long 0x0 31. "RXFFIE,RXFIFO full interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when RXFF = 1 in the.."
|
|
bitfld.long 0x0 30. "TXFEIE,TXFIFO empty interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TXFE = 1 in the.."
|
|
newline
|
|
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
|
|
bitfld.long 0x0 28. "M1,Word length" "0: 1 start bit,1: 1 start bit"
|
|
newline
|
|
bitfld.long 0x0 27. "EOBIE,End-of-block interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the EOBF flag is.."
|
|
bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the RTOF bit is.."
|
|
newline
|
|
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver enable assertion time"
|
|
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver enable deassertion time"
|
|
newline
|
|
bitfld.long 0x0 15. "OVER8,Oversampling mode" "0: Oversampling by 16,1: Oversampling by 8"
|
|
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the CMF bit is.."
|
|
newline
|
|
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between Mute mode and active.."
|
|
bitfld.long 0x0 12. "M0,Word length" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "WAKE,Receiver wakeup method" "0: Idle line,1: Address mark"
|
|
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
|
|
newline
|
|
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
|
|
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever PE = 1 in the.."
|
|
newline
|
|
bitfld.long 0x0 7. "TXFNFIE,TXFIFO not-full interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TXFNF =1 in.."
|
|
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TC = 1 in the.."
|
|
newline
|
|
bitfld.long 0x0 5. "RXFNEIE,RXFIFO not empty interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever ORE = 1 or.."
|
|
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever IDLE = 1 in.."
|
|
newline
|
|
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
|
|
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
|
|
newline
|
|
bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "0: USART not able to wake up the MCU from low-power..,1: USART able to wake up the MCU from low-power mode."
|
|
bitfld.long 0x0 0. "UE,USART enable" "0: USART prescaler and outputs disabled low-power..,1: USART enabled"
|
|
group.long 0x0++0x17
|
|
line.long 0x0 "USART_CR1_ALTERNATE,USART control register 1"
|
|
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
|
|
bitfld.long 0x0 28. "M1,Word length" "0: 1 start bit,1: 1 start bit"
|
|
newline
|
|
bitfld.long 0x0 27. "EOBIE,End of Bbock interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the EOBF flag is.."
|
|
bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the RTOF bit is.."
|
|
newline
|
|
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver enable assertion time"
|
|
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver enable deassertion time"
|
|
newline
|
|
bitfld.long 0x0 15. "OVER8,Oversampling mode" "0: Oversampling by 16,1: Oversampling by 8"
|
|
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the CMF bit is.."
|
|
newline
|
|
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between Mute mode and active.."
|
|
bitfld.long 0x0 12. "M0,Word length" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "WAKE,Receiver wakeup method" "0: Idle line,1: Address mark"
|
|
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
|
|
newline
|
|
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
|
|
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever PE = 1 in the.."
|
|
newline
|
|
bitfld.long 0x0 7. "TXEIE,Transmit data register empty" "0: Interrupt inhibited,1: USART interrupt generated whenever TXE =1 in the.."
|
|
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TC = 1 in the.."
|
|
newline
|
|
bitfld.long 0x0 5. "RXNEIE,Receive data register not empty" "0: Interrupt inhibited,1: USART interrupt generated whenever ORE = 1 or.."
|
|
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever IDLE = 1 in.."
|
|
newline
|
|
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
|
|
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
|
|
newline
|
|
bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "0: USART not able to wake up the MCU from low-power..,1: USART able to wake up the MCU from low-power mode."
|
|
bitfld.long 0x0 0. "UE,USART enable" "0: USART prescaler and outputs disabled low-power..,1: USART enabled"
|
|
line.long 0x4 "USART_CR2,USART control register 2"
|
|
hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the USART node"
|
|
bitfld.long 0x4 23. "RTOEN,Receiver timeout enable" "0: Receiver timeout feature disabled.,1: Receiver timeout feature enabled."
|
|
newline
|
|
bitfld.long 0x4 21.--22. "ABRMOD,Auto baud rate mode" "0: Measurement of the start bit is used to detect..,1: Falling edge to falling edge measurement (the..,2: 0x7F frame detection.,3: 0x55 frame detection"
|
|
bitfld.long 0x4 20. "ABREN,Auto baud rate enable" "0: Auto baud rate detection is disabled.,1: Auto baud rate detection is enabled."
|
|
newline
|
|
bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "0: data is transmitted/received with data bit 0..,1: data is transmitted/received with the MSB (bit.."
|
|
bitfld.long 0x4 18. "DATAINV,Binary data inversion" "0: Logical data from the data register are..,1: Logical data from the data register are.."
|
|
newline
|
|
bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "0: TX pin signal works using the standard logic..,1: TX pin signal values are inverted.."
|
|
bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "0: RX pin signal works using the standard logic..,1: RX pin signal values are inverted.."
|
|
newline
|
|
bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "0: TX/RX pins are used as defined in standard pinout,1: The TX and RX pins functions are swapped. This.."
|
|
bitfld.long 0x4 14. "LINEN,LIN mode enable" "0: LIN mode disabled,1: LIN mode enabled"
|
|
newline
|
|
bitfld.long 0x4 12.--13. "STOP,Stop bits" "0: 1 stop bit,1: 0.5 stop bit.,2: 2 stop bits,3: 1.5 stop bits"
|
|
bitfld.long 0x4 11. "CLKEN,Clock enable" "0: CK pin disabled,1: CK pin enabled"
|
|
newline
|
|
bitfld.long 0x4 10. "CPOL,Clock polarity" "0: Steady low value on CK pin outside transmission..,1: Steady high value on CK pin outside transmission.."
|
|
bitfld.long 0x4 9. "CPHA,Clock phase" "0: The first clock transition is the first data..,1: The second clock transition is the first data.."
|
|
newline
|
|
bitfld.long 0x4 8. "LBCL,Last bit clock pulse" "0: The clock pulse of the last data bit is not..,1: The clock pulse of the last data bit is output.."
|
|
bitfld.long 0x4 6. "LBDIE,LIN break detection interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever LBDF = 1 in.."
|
|
newline
|
|
bitfld.long 0x4 5. "LBDL,LIN break detection length" "0: 10-bit break detection,1: 11-bit break detection"
|
|
bitfld.long 0x4 4. "ADDM7,7-bit address detection/4-bit address detection" "0: 4-bit address detection,1: 7-bit address detection (in 8-bit data mode)"
|
|
newline
|
|
bitfld.long 0x4 3. "DIS_NSS,NSS pin enable" "0: SPI slave selection depends on NSS input pin.,1: SPI slave is always selected and NSS input pin.."
|
|
bitfld.long 0x4 0. "SLVEN,Synchronous Slave mode enable" "0: Slave mode disabled.,1: Slave mode enabled."
|
|
line.long 0x8 "USART_CR3,USART control register 3"
|
|
bitfld.long 0x8 29.--31. "TXFTCFG,TXFIFO threshold configuration" "0: TXFIFO reaches 1/8 of its depth,1: TXFIFO reaches 1/4 of its depth,2: TXFIFO reaches 1/2 of its depth,3: TXFIFO reaches 3/4 of its depth,4: TXFIFO reaches 7/8 of its depth,5: TXFIFO becomes empty,?,?"
|
|
bitfld.long 0x8 28. "RXFTIE,RXFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when Receive FIFO.."
|
|
newline
|
|
bitfld.long 0x8 25.--27. "RXFTCFG,Receive FIFO threshold configuration" "0: Receive FIFO reaches 1/8 of its depth,1: Receive FIFO reaches 1/4 of its depth,2: Receive FIFO reaches 1/2 of its depth,3: Receive FIFO reaches 3/4 of its depth,4: Receive FIFO reaches 7/8 of its depth,5: Receive FIFO becomes full,?,?"
|
|
bitfld.long 0x8 24. "TCBGTIE,Transmission complete before guard time interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TCBGT=1 in.."
|
|
newline
|
|
bitfld.long 0x8 23. "TXFTIE,TXFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TXFIFO reaches.."
|
|
bitfld.long 0x8 22. "WUFIE,Wakeup from low-power mode interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever WUF = 1 in.."
|
|
newline
|
|
bitfld.long 0x8 20.--21. "WUS,Wakeup from low-power mode interrupt flag selection" "0: WUF active on address match (as defined by..,?,2: WUF active on start bit detection,3: WUF active on RXNE/RXFNE."
|
|
bitfld.long 0x8 17.--19. "SCARCNT,Smartcard auto-retry count" "0: retransmission disabled - No automatic..,?,?,?,4: USART implementation on page 1038,?,?,7: number of automatic retransmission attempts"
|
|
newline
|
|
bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "0: DE signal is active high.,1: DE signal is active low."
|
|
bitfld.long 0x8 14. "DEM,Driver enable mode" "0: DE function is disabled.,1: DE function is enabled. The DE signal is output.."
|
|
newline
|
|
bitfld.long 0x8 13. "DDRE,DMA Disable on reception error" "0: DMA is not disabled in case of reception error.,1: DMA is disabled following a reception error. The.."
|
|
bitfld.long 0x8 12. "OVRDIS,Overrun disable" "0: Overrun Error Flag ORE is set when received data..,1: Overrun functionality is disabled. If new data.."
|
|
newline
|
|
bitfld.long 0x8 11. "ONEBIT,One sample bit method enable" "0: Three sample bit method,1: One sample bit method"
|
|
bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever CTSIF = 1 in.."
|
|
newline
|
|
bitfld.long 0x8 9. "CTSE,CTS enable" "0: CTS hardware flow control disabled,1: CTS mode enabled data is only transmitted when.."
|
|
bitfld.long 0x8 8. "RTSE,RTS enable" "0: RTS hardware flow control disabled,1: RTS output enabled data is only requested when.."
|
|
newline
|
|
bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "0: DMA mode is disabled for transmission,1: DMA mode is enabled for transmission"
|
|
bitfld.long 0x8 6. "DMAR,DMA enable receiver" "0: DMA mode is disabled for reception,1: DMA mode is enabled for reception"
|
|
newline
|
|
bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "0: Smartcard Mode disabled,1: Smartcard Mode enabled"
|
|
bitfld.long 0x8 4. "NACK,Smartcard NACK enable" "0: NACK transmission in case of parity error is..,1: NACK transmission during parity error is enabled"
|
|
newline
|
|
bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "0: Half duplex mode is not selected,1: Half duplex mode is selected"
|
|
bitfld.long 0x8 2. "IRLP,IrDA low-power" "0: Normal mode,1: Low-power mode"
|
|
newline
|
|
bitfld.long 0x8 1. "IREN,IrDA mode enable" "0: IrDA disabled,1: IrDA enabled"
|
|
bitfld.long 0x8 0. "EIE,Error interrupt enable" "0: Interrupt inhibited,1: interrupt generated when FE = 1 or ORE = 1 or NE.."
|
|
line.long 0xC "USART_BRR,USART baud rate register"
|
|
hexmask.long.word 0xC 0.--15. 1. "BRR,USART baud rate"
|
|
line.long 0x10 "USART_GTPR,USART guard time and prescaler register"
|
|
hexmask.long.byte 0x10 8.--15. 1. "GT,Guard time value"
|
|
hexmask.long.byte 0x10 0.--7. 1. "PSC,Prescaler value"
|
|
line.long 0x14 "USART_RTOR,USART receiver timeout register"
|
|
hexmask.long.byte 0x14 24.--31. 1. "BLEN,Block length"
|
|
hexmask.long.tbyte 0x14 0.--23. 1. "RTO,Receiver timeout value"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x0 "USART_RQR,USART request register"
|
|
bitfld.long 0x0 4. "TXFRQ,Transmit data flush request" "0,1"
|
|
bitfld.long 0x0 3. "RXFRQ,Receive data flush request" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1"
|
|
bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "ABRRQ,Auto baud rate request" "?,?"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "USART_ISR,USART interrupt and status register"
|
|
bitfld.long 0x0 27. "TXFT,TXFIFO threshold flag" "0: TXFIFO does not reach the programmed threshold.,1: TXFIFO reached the programmed threshold."
|
|
bitfld.long 0x0 26. "RXFT,RXFIFO threshold flag" "0: Receive FIFO does not reach the programmed..,1: Receive FIFO reached the programmed threshold."
|
|
newline
|
|
bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "0: Transmission is not complete or transmission is..,1: Transmission is complete successfully (before.."
|
|
bitfld.long 0x0 24. "RXFF,RXFIFO full" "0: RXFIFO not full.,1: RXFIFO Full."
|
|
newline
|
|
bitfld.long 0x0 23. "TXFE,TXFIFO empty" "0: TXFIFO not empty.,1: TXFIFO empty."
|
|
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "?,?"
|
|
newline
|
|
bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
|
|
bitfld.long 0x0 20. "WUF,Wakeup from low-power mode flag" "?,?"
|
|
newline
|
|
bitfld.long 0x0 19. "RWU,Receiver wakeup from Mute mode" "0: Receiver in active mode,1: Receiver in Mute mode"
|
|
bitfld.long 0x0 18. "SBKF,Send break flag" "0: Break character transmitted,1: Break character requested by setting SBKRQ bit.."
|
|
newline
|
|
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character Match detected"
|
|
bitfld.long 0x0 16. "BUSY,Busy flag" "0: USART is idle (no reception),1: Reception on going"
|
|
newline
|
|
bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1"
|
|
bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "0: No underrun error,1: underrun error"
|
|
bitfld.long 0x0 12. "EOBF,End of block flag" "0: End of Block not reached,1: End of Block (number of characters) reached"
|
|
newline
|
|
bitfld.long 0x0 11. "RTOF,Receiver timeout" "0: Timeout value not reached,1: Timeout value reached without any data reception"
|
|
bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
|
|
newline
|
|
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
|
|
bitfld.long 0x0 8. "LBDF,LIN break detection flag" "0: LIN Break not detected,1: LIN break detected"
|
|
newline
|
|
bitfld.long 0x0 7. "TXFNF,TXFIFO not full" "0: Transmit FIFO is full,1: Transmit FIFO is not full"
|
|
bitfld.long 0x0 6. "TC,Transmission complete" "0: Transmission is not complete,1: Transmission is complete"
|
|
newline
|
|
bitfld.long 0x0 5. "RXFNE,RXFIFO not empty" "0: Data is not received,1: Received data is ready to be read."
|
|
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
|
|
newline
|
|
bitfld.long 0x0 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected"
|
|
bitfld.long 0x0 2. "NE,Noise detection flag" "0: No noise is detected,1: Noise is detected"
|
|
newline
|
|
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
|
|
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "USART_ISR_ALTERNATE,USART interrupt and status register"
|
|
bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "0: Transmission is not complete or transmission is..,1: Transmission is complete successfully (before.."
|
|
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "?,?"
|
|
newline
|
|
bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
|
|
bitfld.long 0x0 20. "WUF,Wakeup from low-power mode flag" "?,?"
|
|
newline
|
|
bitfld.long 0x0 19. "RWU,Receiver wakeup from Mute mode" "0: Receiver in active mode,1: Receiver in Mute mode"
|
|
bitfld.long 0x0 18. "SBKF,Send break flag" "0: Break character transmitted,1: Break character requested by setting SBKRQ bit.."
|
|
newline
|
|
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character Match detected"
|
|
bitfld.long 0x0 16. "BUSY,Busy flag" "0: USART is idle (no reception),1: Reception on going"
|
|
newline
|
|
bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1"
|
|
bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "0: No underrun error,1: underrun error"
|
|
bitfld.long 0x0 12. "EOBF,End of block flag" "0: End of Block not reached,1: End of Block (number of characters) reached"
|
|
newline
|
|
bitfld.long 0x0 11. "RTOF,Receiver timeout" "0: Timeout value not reached,1: Timeout value reached without any data reception"
|
|
bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
|
|
newline
|
|
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
|
|
bitfld.long 0x0 8. "LBDF,LIN break detection flag" "0: LIN Break not detected,1: LIN break detected"
|
|
newline
|
|
bitfld.long 0x0 7. "TXE,Transmit data register empty" "0: Data register full,1: Data register not full"
|
|
bitfld.long 0x0 6. "TC,Transmission complete" "0: Transmission is not complete,1: Transmission is complete"
|
|
newline
|
|
bitfld.long 0x0 5. "RXNE,Read data register not empty" "0: Data is not received,1: Received data is ready to be read."
|
|
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
|
|
newline
|
|
bitfld.long 0x0 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected"
|
|
bitfld.long 0x0 2. "NE,Noise detection flag" "0: No noise is detected,1: Noise is detected"
|
|
newline
|
|
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
|
|
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x0 "USART_ICR,USART interrupt flag clear register"
|
|
bitfld.long 0x0 20. "WUCF,Wakeup from low-power mode clear flag" "?,?"
|
|
bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "UDRCF,SPI slave underrun clear flag" "?,?"
|
|
bitfld.long 0x0 12. "EOBCF,End of block clear flag" "?,?"
|
|
newline
|
|
bitfld.long 0x0 11. "RTOCF,Receiver timeout clear flag" "?,?"
|
|
bitfld.long 0x0 9. "CTSCF,CTS clear flag" "?,?"
|
|
newline
|
|
bitfld.long 0x0 8. "LBDCF,LIN break detection clear flag" "?,?"
|
|
bitfld.long 0x0 7. "TCBGTCF,Transmission complete before Guard time clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1"
|
|
bitfld.long 0x0 5. "TXFECF,TXFIFO empty clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1"
|
|
bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1"
|
|
bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1"
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x0 "USART_RDR,USART receive data register"
|
|
hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value"
|
|
group.long 0x28++0x7
|
|
line.long 0x0 "USART_TDR,USART transmit data register"
|
|
hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value"
|
|
line.long 0x4 "USART_PRESC,USART prescaler register"
|
|
hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler"
|
|
tree.end
|
|
tree "UART5"
|
|
base ad:0x40005000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "USART_CR1,USART control register 1"
|
|
bitfld.long 0x0 31. "RXFFIE,RXFIFO full interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when RXFF = 1 in the.."
|
|
bitfld.long 0x0 30. "TXFEIE,TXFIFO empty interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TXFE = 1 in the.."
|
|
newline
|
|
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
|
|
bitfld.long 0x0 28. "M1,Word length" "0: 1 start bit,1: 1 start bit"
|
|
newline
|
|
bitfld.long 0x0 27. "EOBIE,End-of-block interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the EOBF flag is.."
|
|
bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the RTOF bit is.."
|
|
newline
|
|
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver enable assertion time"
|
|
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver enable deassertion time"
|
|
newline
|
|
bitfld.long 0x0 15. "OVER8,Oversampling mode" "0: Oversampling by 16,1: Oversampling by 8"
|
|
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the CMF bit is.."
|
|
newline
|
|
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between Mute mode and active.."
|
|
bitfld.long 0x0 12. "M0,Word length" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "WAKE,Receiver wakeup method" "0: Idle line,1: Address mark"
|
|
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
|
|
newline
|
|
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
|
|
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever PE = 1 in the.."
|
|
newline
|
|
bitfld.long 0x0 7. "TXFNFIE,TXFIFO not-full interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TXFNF =1 in.."
|
|
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TC = 1 in the.."
|
|
newline
|
|
bitfld.long 0x0 5. "RXFNEIE,RXFIFO not empty interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever ORE = 1 or.."
|
|
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever IDLE = 1 in.."
|
|
newline
|
|
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
|
|
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
|
|
newline
|
|
bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "0: USART not able to wake up the MCU from low-power..,1: USART able to wake up the MCU from low-power mode."
|
|
bitfld.long 0x0 0. "UE,USART enable" "0: USART prescaler and outputs disabled low-power..,1: USART enabled"
|
|
group.long 0x0++0x17
|
|
line.long 0x0 "USART_CR1_ALTERNATE,USART control register 1"
|
|
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
|
|
bitfld.long 0x0 28. "M1,Word length" "0: 1 start bit,1: 1 start bit"
|
|
newline
|
|
bitfld.long 0x0 27. "EOBIE,End of Bbock interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the EOBF flag is.."
|
|
bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the RTOF bit is.."
|
|
newline
|
|
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver enable assertion time"
|
|
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver enable deassertion time"
|
|
newline
|
|
bitfld.long 0x0 15. "OVER8,Oversampling mode" "0: Oversampling by 16,1: Oversampling by 8"
|
|
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the CMF bit is.."
|
|
newline
|
|
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between Mute mode and active.."
|
|
bitfld.long 0x0 12. "M0,Word length" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "WAKE,Receiver wakeup method" "0: Idle line,1: Address mark"
|
|
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
|
|
newline
|
|
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
|
|
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever PE = 1 in the.."
|
|
newline
|
|
bitfld.long 0x0 7. "TXEIE,Transmit data register empty" "0: Interrupt inhibited,1: USART interrupt generated whenever TXE =1 in the.."
|
|
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TC = 1 in the.."
|
|
newline
|
|
bitfld.long 0x0 5. "RXNEIE,Receive data register not empty" "0: Interrupt inhibited,1: USART interrupt generated whenever ORE = 1 or.."
|
|
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever IDLE = 1 in.."
|
|
newline
|
|
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
|
|
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
|
|
newline
|
|
bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "0: USART not able to wake up the MCU from low-power..,1: USART able to wake up the MCU from low-power mode."
|
|
bitfld.long 0x0 0. "UE,USART enable" "0: USART prescaler and outputs disabled low-power..,1: USART enabled"
|
|
line.long 0x4 "USART_CR2,USART control register 2"
|
|
hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the USART node"
|
|
bitfld.long 0x4 23. "RTOEN,Receiver timeout enable" "0: Receiver timeout feature disabled.,1: Receiver timeout feature enabled."
|
|
newline
|
|
bitfld.long 0x4 21.--22. "ABRMOD,Auto baud rate mode" "0: Measurement of the start bit is used to detect..,1: Falling edge to falling edge measurement (the..,2: 0x7F frame detection.,3: 0x55 frame detection"
|
|
bitfld.long 0x4 20. "ABREN,Auto baud rate enable" "0: Auto baud rate detection is disabled.,1: Auto baud rate detection is enabled."
|
|
newline
|
|
bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "0: data is transmitted/received with data bit 0..,1: data is transmitted/received with the MSB (bit.."
|
|
bitfld.long 0x4 18. "DATAINV,Binary data inversion" "0: Logical data from the data register are..,1: Logical data from the data register are.."
|
|
newline
|
|
bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "0: TX pin signal works using the standard logic..,1: TX pin signal values are inverted.."
|
|
bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "0: RX pin signal works using the standard logic..,1: RX pin signal values are inverted.."
|
|
newline
|
|
bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "0: TX/RX pins are used as defined in standard pinout,1: The TX and RX pins functions are swapped. This.."
|
|
bitfld.long 0x4 14. "LINEN,LIN mode enable" "0: LIN mode disabled,1: LIN mode enabled"
|
|
newline
|
|
bitfld.long 0x4 12.--13. "STOP,Stop bits" "0: 1 stop bit,1: 0.5 stop bit.,2: 2 stop bits,3: 1.5 stop bits"
|
|
bitfld.long 0x4 11. "CLKEN,Clock enable" "0: CK pin disabled,1: CK pin enabled"
|
|
newline
|
|
bitfld.long 0x4 10. "CPOL,Clock polarity" "0: Steady low value on CK pin outside transmission..,1: Steady high value on CK pin outside transmission.."
|
|
bitfld.long 0x4 9. "CPHA,Clock phase" "0: The first clock transition is the first data..,1: The second clock transition is the first data.."
|
|
newline
|
|
bitfld.long 0x4 8. "LBCL,Last bit clock pulse" "0: The clock pulse of the last data bit is not..,1: The clock pulse of the last data bit is output.."
|
|
bitfld.long 0x4 6. "LBDIE,LIN break detection interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever LBDF = 1 in.."
|
|
newline
|
|
bitfld.long 0x4 5. "LBDL,LIN break detection length" "0: 10-bit break detection,1: 11-bit break detection"
|
|
bitfld.long 0x4 4. "ADDM7,7-bit address detection/4-bit address detection" "0: 4-bit address detection,1: 7-bit address detection (in 8-bit data mode)"
|
|
newline
|
|
bitfld.long 0x4 3. "DIS_NSS,NSS pin enable" "0: SPI slave selection depends on NSS input pin.,1: SPI slave is always selected and NSS input pin.."
|
|
bitfld.long 0x4 0. "SLVEN,Synchronous Slave mode enable" "0: Slave mode disabled.,1: Slave mode enabled."
|
|
line.long 0x8 "USART_CR3,USART control register 3"
|
|
bitfld.long 0x8 29.--31. "TXFTCFG,TXFIFO threshold configuration" "0: TXFIFO reaches 1/8 of its depth,1: TXFIFO reaches 1/4 of its depth,2: TXFIFO reaches 1/2 of its depth,3: TXFIFO reaches 3/4 of its depth,4: TXFIFO reaches 7/8 of its depth,5: TXFIFO becomes empty,?,?"
|
|
bitfld.long 0x8 28. "RXFTIE,RXFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when Receive FIFO.."
|
|
newline
|
|
bitfld.long 0x8 25.--27. "RXFTCFG,Receive FIFO threshold configuration" "0: Receive FIFO reaches 1/8 of its depth,1: Receive FIFO reaches 1/4 of its depth,2: Receive FIFO reaches 1/2 of its depth,3: Receive FIFO reaches 3/4 of its depth,4: Receive FIFO reaches 7/8 of its depth,5: Receive FIFO becomes full,?,?"
|
|
bitfld.long 0x8 24. "TCBGTIE,Transmission complete before guard time interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TCBGT=1 in.."
|
|
newline
|
|
bitfld.long 0x8 23. "TXFTIE,TXFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TXFIFO reaches.."
|
|
bitfld.long 0x8 22. "WUFIE,Wakeup from low-power mode interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever WUF = 1 in.."
|
|
newline
|
|
bitfld.long 0x8 20.--21. "WUS,Wakeup from low-power mode interrupt flag selection" "0: WUF active on address match (as defined by..,?,2: WUF active on start bit detection,3: WUF active on RXNE/RXFNE."
|
|
bitfld.long 0x8 17.--19. "SCARCNT,Smartcard auto-retry count" "0: retransmission disabled - No automatic..,?,?,?,4: USART implementation on page 1038,?,?,7: number of automatic retransmission attempts"
|
|
newline
|
|
bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "0: DE signal is active high.,1: DE signal is active low."
|
|
bitfld.long 0x8 14. "DEM,Driver enable mode" "0: DE function is disabled.,1: DE function is enabled. The DE signal is output.."
|
|
newline
|
|
bitfld.long 0x8 13. "DDRE,DMA Disable on reception error" "0: DMA is not disabled in case of reception error.,1: DMA is disabled following a reception error. The.."
|
|
bitfld.long 0x8 12. "OVRDIS,Overrun disable" "0: Overrun Error Flag ORE is set when received data..,1: Overrun functionality is disabled. If new data.."
|
|
newline
|
|
bitfld.long 0x8 11. "ONEBIT,One sample bit method enable" "0: Three sample bit method,1: One sample bit method"
|
|
bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever CTSIF = 1 in.."
|
|
newline
|
|
bitfld.long 0x8 9. "CTSE,CTS enable" "0: CTS hardware flow control disabled,1: CTS mode enabled data is only transmitted when.."
|
|
bitfld.long 0x8 8. "RTSE,RTS enable" "0: RTS hardware flow control disabled,1: RTS output enabled data is only requested when.."
|
|
newline
|
|
bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "0: DMA mode is disabled for transmission,1: DMA mode is enabled for transmission"
|
|
bitfld.long 0x8 6. "DMAR,DMA enable receiver" "0: DMA mode is disabled for reception,1: DMA mode is enabled for reception"
|
|
newline
|
|
bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "0: Smartcard Mode disabled,1: Smartcard Mode enabled"
|
|
bitfld.long 0x8 4. "NACK,Smartcard NACK enable" "0: NACK transmission in case of parity error is..,1: NACK transmission during parity error is enabled"
|
|
newline
|
|
bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "0: Half duplex mode is not selected,1: Half duplex mode is selected"
|
|
bitfld.long 0x8 2. "IRLP,IrDA low-power" "0: Normal mode,1: Low-power mode"
|
|
newline
|
|
bitfld.long 0x8 1. "IREN,IrDA mode enable" "0: IrDA disabled,1: IrDA enabled"
|
|
bitfld.long 0x8 0. "EIE,Error interrupt enable" "0: Interrupt inhibited,1: interrupt generated when FE = 1 or ORE = 1 or NE.."
|
|
line.long 0xC "USART_BRR,USART baud rate register"
|
|
hexmask.long.word 0xC 0.--15. 1. "BRR,USART baud rate"
|
|
line.long 0x10 "USART_GTPR,USART guard time and prescaler register"
|
|
hexmask.long.byte 0x10 8.--15. 1. "GT,Guard time value"
|
|
hexmask.long.byte 0x10 0.--7. 1. "PSC,Prescaler value"
|
|
line.long 0x14 "USART_RTOR,USART receiver timeout register"
|
|
hexmask.long.byte 0x14 24.--31. 1. "BLEN,Block length"
|
|
hexmask.long.tbyte 0x14 0.--23. 1. "RTO,Receiver timeout value"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x0 "USART_RQR,USART request register"
|
|
bitfld.long 0x0 4. "TXFRQ,Transmit data flush request" "0,1"
|
|
bitfld.long 0x0 3. "RXFRQ,Receive data flush request" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1"
|
|
bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "ABRRQ,Auto baud rate request" "?,?"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "USART_ISR,USART interrupt and status register"
|
|
bitfld.long 0x0 27. "TXFT,TXFIFO threshold flag" "0: TXFIFO does not reach the programmed threshold.,1: TXFIFO reached the programmed threshold."
|
|
bitfld.long 0x0 26. "RXFT,RXFIFO threshold flag" "0: Receive FIFO does not reach the programmed..,1: Receive FIFO reached the programmed threshold."
|
|
newline
|
|
bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "0: Transmission is not complete or transmission is..,1: Transmission is complete successfully (before.."
|
|
bitfld.long 0x0 24. "RXFF,RXFIFO full" "0: RXFIFO not full.,1: RXFIFO Full."
|
|
newline
|
|
bitfld.long 0x0 23. "TXFE,TXFIFO empty" "0: TXFIFO not empty.,1: TXFIFO empty."
|
|
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "?,?"
|
|
newline
|
|
bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
|
|
bitfld.long 0x0 20. "WUF,Wakeup from low-power mode flag" "?,?"
|
|
newline
|
|
bitfld.long 0x0 19. "RWU,Receiver wakeup from Mute mode" "0: Receiver in active mode,1: Receiver in Mute mode"
|
|
bitfld.long 0x0 18. "SBKF,Send break flag" "0: Break character transmitted,1: Break character requested by setting SBKRQ bit.."
|
|
newline
|
|
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character Match detected"
|
|
bitfld.long 0x0 16. "BUSY,Busy flag" "0: USART is idle (no reception),1: Reception on going"
|
|
newline
|
|
bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1"
|
|
bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "0: No underrun error,1: underrun error"
|
|
bitfld.long 0x0 12. "EOBF,End of block flag" "0: End of Block not reached,1: End of Block (number of characters) reached"
|
|
newline
|
|
bitfld.long 0x0 11. "RTOF,Receiver timeout" "0: Timeout value not reached,1: Timeout value reached without any data reception"
|
|
bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
|
|
newline
|
|
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
|
|
bitfld.long 0x0 8. "LBDF,LIN break detection flag" "0: LIN Break not detected,1: LIN break detected"
|
|
newline
|
|
bitfld.long 0x0 7. "TXFNF,TXFIFO not full" "0: Transmit FIFO is full,1: Transmit FIFO is not full"
|
|
bitfld.long 0x0 6. "TC,Transmission complete" "0: Transmission is not complete,1: Transmission is complete"
|
|
newline
|
|
bitfld.long 0x0 5. "RXFNE,RXFIFO not empty" "0: Data is not received,1: Received data is ready to be read."
|
|
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
|
|
newline
|
|
bitfld.long 0x0 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected"
|
|
bitfld.long 0x0 2. "NE,Noise detection flag" "0: No noise is detected,1: Noise is detected"
|
|
newline
|
|
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
|
|
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "USART_ISR_ALTERNATE,USART interrupt and status register"
|
|
bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "0: Transmission is not complete or transmission is..,1: Transmission is complete successfully (before.."
|
|
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "?,?"
|
|
newline
|
|
bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
|
|
bitfld.long 0x0 20. "WUF,Wakeup from low-power mode flag" "?,?"
|
|
newline
|
|
bitfld.long 0x0 19. "RWU,Receiver wakeup from Mute mode" "0: Receiver in active mode,1: Receiver in Mute mode"
|
|
bitfld.long 0x0 18. "SBKF,Send break flag" "0: Break character transmitted,1: Break character requested by setting SBKRQ bit.."
|
|
newline
|
|
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character Match detected"
|
|
bitfld.long 0x0 16. "BUSY,Busy flag" "0: USART is idle (no reception),1: Reception on going"
|
|
newline
|
|
bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1"
|
|
bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "0: No underrun error,1: underrun error"
|
|
bitfld.long 0x0 12. "EOBF,End of block flag" "0: End of Block not reached,1: End of Block (number of characters) reached"
|
|
newline
|
|
bitfld.long 0x0 11. "RTOF,Receiver timeout" "0: Timeout value not reached,1: Timeout value reached without any data reception"
|
|
bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
|
|
newline
|
|
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
|
|
bitfld.long 0x0 8. "LBDF,LIN break detection flag" "0: LIN Break not detected,1: LIN break detected"
|
|
newline
|
|
bitfld.long 0x0 7. "TXE,Transmit data register empty" "0: Data register full,1: Data register not full"
|
|
bitfld.long 0x0 6. "TC,Transmission complete" "0: Transmission is not complete,1: Transmission is complete"
|
|
newline
|
|
bitfld.long 0x0 5. "RXNE,Read data register not empty" "0: Data is not received,1: Received data is ready to be read."
|
|
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
|
|
newline
|
|
bitfld.long 0x0 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected"
|
|
bitfld.long 0x0 2. "NE,Noise detection flag" "0: No noise is detected,1: Noise is detected"
|
|
newline
|
|
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
|
|
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x0 "USART_ICR,USART interrupt flag clear register"
|
|
bitfld.long 0x0 20. "WUCF,Wakeup from low-power mode clear flag" "?,?"
|
|
bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "UDRCF,SPI slave underrun clear flag" "?,?"
|
|
bitfld.long 0x0 12. "EOBCF,End of block clear flag" "?,?"
|
|
newline
|
|
bitfld.long 0x0 11. "RTOCF,Receiver timeout clear flag" "?,?"
|
|
bitfld.long 0x0 9. "CTSCF,CTS clear flag" "?,?"
|
|
newline
|
|
bitfld.long 0x0 8. "LBDCF,LIN break detection clear flag" "?,?"
|
|
bitfld.long 0x0 7. "TCBGTCF,Transmission complete before Guard time clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1"
|
|
bitfld.long 0x0 5. "TXFECF,TXFIFO empty clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1"
|
|
bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1"
|
|
bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1"
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x0 "USART_RDR,USART receive data register"
|
|
hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value"
|
|
group.long 0x28++0x7
|
|
line.long 0x0 "USART_TDR,USART transmit data register"
|
|
hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value"
|
|
line.long 0x4 "USART_PRESC,USART prescaler register"
|
|
hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler"
|
|
tree.end
|
|
tree "USART1"
|
|
base ad:0x40013800
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "USART_CR1,USART control register 1"
|
|
bitfld.long 0x0 31. "RXFFIE,RXFIFO full interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when RXFF = 1 in the.."
|
|
bitfld.long 0x0 30. "TXFEIE,TXFIFO empty interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TXFE = 1 in the.."
|
|
newline
|
|
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
|
|
bitfld.long 0x0 28. "M1,Word length" "0: 1 start bit,1: 1 start bit"
|
|
newline
|
|
bitfld.long 0x0 27. "EOBIE,End-of-block interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the EOBF flag is.."
|
|
bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the RTOF bit is.."
|
|
newline
|
|
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver enable assertion time"
|
|
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver enable deassertion time"
|
|
newline
|
|
bitfld.long 0x0 15. "OVER8,Oversampling mode" "0: Oversampling by 16,1: Oversampling by 8"
|
|
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the CMF bit is.."
|
|
newline
|
|
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between Mute mode and active.."
|
|
bitfld.long 0x0 12. "M0,Word length" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "WAKE,Receiver wakeup method" "0: Idle line,1: Address mark"
|
|
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
|
|
newline
|
|
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
|
|
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever PE = 1 in the.."
|
|
newline
|
|
bitfld.long 0x0 7. "TXFNFIE,TXFIFO not-full interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TXFNF =1 in.."
|
|
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TC = 1 in the.."
|
|
newline
|
|
bitfld.long 0x0 5. "RXFNEIE,RXFIFO not empty interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever ORE = 1 or.."
|
|
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever IDLE = 1 in.."
|
|
newline
|
|
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
|
|
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
|
|
newline
|
|
bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "0: USART not able to wake up the MCU from low-power..,1: USART able to wake up the MCU from low-power mode."
|
|
bitfld.long 0x0 0. "UE,USART enable" "0: USART prescaler and outputs disabled low-power..,1: USART enabled"
|
|
group.long 0x0++0x17
|
|
line.long 0x0 "USART_CR1_ALTERNATE,USART control register 1"
|
|
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
|
|
bitfld.long 0x0 28. "M1,Word length" "0: 1 start bit,1: 1 start bit"
|
|
newline
|
|
bitfld.long 0x0 27. "EOBIE,End of Bbock interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the EOBF flag is.."
|
|
bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the RTOF bit is.."
|
|
newline
|
|
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver enable assertion time"
|
|
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver enable deassertion time"
|
|
newline
|
|
bitfld.long 0x0 15. "OVER8,Oversampling mode" "0: Oversampling by 16,1: Oversampling by 8"
|
|
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the CMF bit is.."
|
|
newline
|
|
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between Mute mode and active.."
|
|
bitfld.long 0x0 12. "M0,Word length" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "WAKE,Receiver wakeup method" "0: Idle line,1: Address mark"
|
|
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
|
|
newline
|
|
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
|
|
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever PE = 1 in the.."
|
|
newline
|
|
bitfld.long 0x0 7. "TXEIE,Transmit data register empty" "0: Interrupt inhibited,1: USART interrupt generated whenever TXE =1 in the.."
|
|
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TC = 1 in the.."
|
|
newline
|
|
bitfld.long 0x0 5. "RXNEIE,Receive data register not empty" "0: Interrupt inhibited,1: USART interrupt generated whenever ORE = 1 or.."
|
|
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever IDLE = 1 in.."
|
|
newline
|
|
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
|
|
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
|
|
newline
|
|
bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "0: USART not able to wake up the MCU from low-power..,1: USART able to wake up the MCU from low-power mode."
|
|
bitfld.long 0x0 0. "UE,USART enable" "0: USART prescaler and outputs disabled low-power..,1: USART enabled"
|
|
line.long 0x4 "USART_CR2,USART control register 2"
|
|
hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the USART node"
|
|
bitfld.long 0x4 23. "RTOEN,Receiver timeout enable" "0: Receiver timeout feature disabled.,1: Receiver timeout feature enabled."
|
|
newline
|
|
bitfld.long 0x4 21.--22. "ABRMOD,Auto baud rate mode" "0: Measurement of the start bit is used to detect..,1: Falling edge to falling edge measurement (the..,2: 0x7F frame detection.,3: 0x55 frame detection"
|
|
bitfld.long 0x4 20. "ABREN,Auto baud rate enable" "0: Auto baud rate detection is disabled.,1: Auto baud rate detection is enabled."
|
|
newline
|
|
bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "0: data is transmitted/received with data bit 0..,1: data is transmitted/received with the MSB (bit.."
|
|
bitfld.long 0x4 18. "DATAINV,Binary data inversion" "0: Logical data from the data register are..,1: Logical data from the data register are.."
|
|
newline
|
|
bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "0: TX pin signal works using the standard logic..,1: TX pin signal values are inverted.."
|
|
bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "0: RX pin signal works using the standard logic..,1: RX pin signal values are inverted.."
|
|
newline
|
|
bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "0: TX/RX pins are used as defined in standard pinout,1: The TX and RX pins functions are swapped. This.."
|
|
bitfld.long 0x4 14. "LINEN,LIN mode enable" "0: LIN mode disabled,1: LIN mode enabled"
|
|
newline
|
|
bitfld.long 0x4 12.--13. "STOP,Stop bits" "0: 1 stop bit,1: 0.5 stop bit.,2: 2 stop bits,3: 1.5 stop bits"
|
|
bitfld.long 0x4 11. "CLKEN,Clock enable" "0: CK pin disabled,1: CK pin enabled"
|
|
newline
|
|
bitfld.long 0x4 10. "CPOL,Clock polarity" "0: Steady low value on CK pin outside transmission..,1: Steady high value on CK pin outside transmission.."
|
|
bitfld.long 0x4 9. "CPHA,Clock phase" "0: The first clock transition is the first data..,1: The second clock transition is the first data.."
|
|
newline
|
|
bitfld.long 0x4 8. "LBCL,Last bit clock pulse" "0: The clock pulse of the last data bit is not..,1: The clock pulse of the last data bit is output.."
|
|
bitfld.long 0x4 6. "LBDIE,LIN break detection interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever LBDF = 1 in.."
|
|
newline
|
|
bitfld.long 0x4 5. "LBDL,LIN break detection length" "0: 10-bit break detection,1: 11-bit break detection"
|
|
bitfld.long 0x4 4. "ADDM7,7-bit address detection/4-bit address detection" "0: 4-bit address detection,1: 7-bit address detection (in 8-bit data mode)"
|
|
newline
|
|
bitfld.long 0x4 3. "DIS_NSS,NSS pin enable" "0: SPI slave selection depends on NSS input pin.,1: SPI slave is always selected and NSS input pin.."
|
|
bitfld.long 0x4 0. "SLVEN,Synchronous Slave mode enable" "0: Slave mode disabled.,1: Slave mode enabled."
|
|
line.long 0x8 "USART_CR3,USART control register 3"
|
|
bitfld.long 0x8 29.--31. "TXFTCFG,TXFIFO threshold configuration" "0: TXFIFO reaches 1/8 of its depth,1: TXFIFO reaches 1/4 of its depth,2: TXFIFO reaches 1/2 of its depth,3: TXFIFO reaches 3/4 of its depth,4: TXFIFO reaches 7/8 of its depth,5: TXFIFO becomes empty,?,?"
|
|
bitfld.long 0x8 28. "RXFTIE,RXFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when Receive FIFO.."
|
|
newline
|
|
bitfld.long 0x8 25.--27. "RXFTCFG,Receive FIFO threshold configuration" "0: Receive FIFO reaches 1/8 of its depth,1: Receive FIFO reaches 1/4 of its depth,2: Receive FIFO reaches 1/2 of its depth,3: Receive FIFO reaches 3/4 of its depth,4: Receive FIFO reaches 7/8 of its depth,5: Receive FIFO becomes full,?,?"
|
|
bitfld.long 0x8 24. "TCBGTIE,Transmission complete before guard time interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TCBGT=1 in.."
|
|
newline
|
|
bitfld.long 0x8 23. "TXFTIE,TXFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TXFIFO reaches.."
|
|
bitfld.long 0x8 22. "WUFIE,Wakeup from low-power mode interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever WUF = 1 in.."
|
|
newline
|
|
bitfld.long 0x8 20.--21. "WUS,Wakeup from low-power mode interrupt flag selection" "0: WUF active on address match (as defined by..,?,2: WUF active on start bit detection,3: WUF active on RXNE/RXFNE."
|
|
bitfld.long 0x8 17.--19. "SCARCNT,Smartcard auto-retry count" "0: retransmission disabled - No automatic..,?,?,?,4: USART implementation on page 1038,?,?,7: number of automatic retransmission attempts"
|
|
newline
|
|
bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "0: DE signal is active high.,1: DE signal is active low."
|
|
bitfld.long 0x8 14. "DEM,Driver enable mode" "0: DE function is disabled.,1: DE function is enabled. The DE signal is output.."
|
|
newline
|
|
bitfld.long 0x8 13. "DDRE,DMA Disable on reception error" "0: DMA is not disabled in case of reception error.,1: DMA is disabled following a reception error. The.."
|
|
bitfld.long 0x8 12. "OVRDIS,Overrun disable" "0: Overrun Error Flag ORE is set when received data..,1: Overrun functionality is disabled. If new data.."
|
|
newline
|
|
bitfld.long 0x8 11. "ONEBIT,One sample bit method enable" "0: Three sample bit method,1: One sample bit method"
|
|
bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever CTSIF = 1 in.."
|
|
newline
|
|
bitfld.long 0x8 9. "CTSE,CTS enable" "0: CTS hardware flow control disabled,1: CTS mode enabled data is only transmitted when.."
|
|
bitfld.long 0x8 8. "RTSE,RTS enable" "0: RTS hardware flow control disabled,1: RTS output enabled data is only requested when.."
|
|
newline
|
|
bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "0: DMA mode is disabled for transmission,1: DMA mode is enabled for transmission"
|
|
bitfld.long 0x8 6. "DMAR,DMA enable receiver" "0: DMA mode is disabled for reception,1: DMA mode is enabled for reception"
|
|
newline
|
|
bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "0: Smartcard Mode disabled,1: Smartcard Mode enabled"
|
|
bitfld.long 0x8 4. "NACK,Smartcard NACK enable" "0: NACK transmission in case of parity error is..,1: NACK transmission during parity error is enabled"
|
|
newline
|
|
bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "0: Half duplex mode is not selected,1: Half duplex mode is selected"
|
|
bitfld.long 0x8 2. "IRLP,IrDA low-power" "0: Normal mode,1: Low-power mode"
|
|
newline
|
|
bitfld.long 0x8 1. "IREN,IrDA mode enable" "0: IrDA disabled,1: IrDA enabled"
|
|
bitfld.long 0x8 0. "EIE,Error interrupt enable" "0: Interrupt inhibited,1: interrupt generated when FE = 1 or ORE = 1 or NE.."
|
|
line.long 0xC "USART_BRR,USART baud rate register"
|
|
hexmask.long.word 0xC 0.--15. 1. "BRR,USART baud rate"
|
|
line.long 0x10 "USART_GTPR,USART guard time and prescaler register"
|
|
hexmask.long.byte 0x10 8.--15. 1. "GT,Guard time value"
|
|
hexmask.long.byte 0x10 0.--7. 1. "PSC,Prescaler value"
|
|
line.long 0x14 "USART_RTOR,USART receiver timeout register"
|
|
hexmask.long.byte 0x14 24.--31. 1. "BLEN,Block length"
|
|
hexmask.long.tbyte 0x14 0.--23. 1. "RTO,Receiver timeout value"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x0 "USART_RQR,USART request register"
|
|
bitfld.long 0x0 4. "TXFRQ,Transmit data flush request" "0,1"
|
|
bitfld.long 0x0 3. "RXFRQ,Receive data flush request" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1"
|
|
bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "ABRRQ,Auto baud rate request" "?,?"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "USART_ISR,USART interrupt and status register"
|
|
bitfld.long 0x0 27. "TXFT,TXFIFO threshold flag" "0: TXFIFO does not reach the programmed threshold.,1: TXFIFO reached the programmed threshold."
|
|
bitfld.long 0x0 26. "RXFT,RXFIFO threshold flag" "0: Receive FIFO does not reach the programmed..,1: Receive FIFO reached the programmed threshold."
|
|
newline
|
|
bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "0: Transmission is not complete or transmission is..,1: Transmission is complete successfully (before.."
|
|
bitfld.long 0x0 24. "RXFF,RXFIFO full" "0: RXFIFO not full.,1: RXFIFO Full."
|
|
newline
|
|
bitfld.long 0x0 23. "TXFE,TXFIFO empty" "0: TXFIFO not empty.,1: TXFIFO empty."
|
|
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "?,?"
|
|
newline
|
|
bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
|
|
bitfld.long 0x0 20. "WUF,Wakeup from low-power mode flag" "?,?"
|
|
newline
|
|
bitfld.long 0x0 19. "RWU,Receiver wakeup from Mute mode" "0: Receiver in active mode,1: Receiver in Mute mode"
|
|
bitfld.long 0x0 18. "SBKF,Send break flag" "0: Break character transmitted,1: Break character requested by setting SBKRQ bit.."
|
|
newline
|
|
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character Match detected"
|
|
bitfld.long 0x0 16. "BUSY,Busy flag" "0: USART is idle (no reception),1: Reception on going"
|
|
newline
|
|
bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1"
|
|
bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "0: No underrun error,1: underrun error"
|
|
bitfld.long 0x0 12. "EOBF,End of block flag" "0: End of Block not reached,1: End of Block (number of characters) reached"
|
|
newline
|
|
bitfld.long 0x0 11. "RTOF,Receiver timeout" "0: Timeout value not reached,1: Timeout value reached without any data reception"
|
|
bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
|
|
newline
|
|
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
|
|
bitfld.long 0x0 8. "LBDF,LIN break detection flag" "0: LIN Break not detected,1: LIN break detected"
|
|
newline
|
|
bitfld.long 0x0 7. "TXFNF,TXFIFO not full" "0: Transmit FIFO is full,1: Transmit FIFO is not full"
|
|
bitfld.long 0x0 6. "TC,Transmission complete" "0: Transmission is not complete,1: Transmission is complete"
|
|
newline
|
|
bitfld.long 0x0 5. "RXFNE,RXFIFO not empty" "0: Data is not received,1: Received data is ready to be read."
|
|
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
|
|
newline
|
|
bitfld.long 0x0 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected"
|
|
bitfld.long 0x0 2. "NE,Noise detection flag" "0: No noise is detected,1: Noise is detected"
|
|
newline
|
|
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
|
|
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "USART_ISR_ALTERNATE,USART interrupt and status register"
|
|
bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "0: Transmission is not complete or transmission is..,1: Transmission is complete successfully (before.."
|
|
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "?,?"
|
|
newline
|
|
bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
|
|
bitfld.long 0x0 20. "WUF,Wakeup from low-power mode flag" "?,?"
|
|
newline
|
|
bitfld.long 0x0 19. "RWU,Receiver wakeup from Mute mode" "0: Receiver in active mode,1: Receiver in Mute mode"
|
|
bitfld.long 0x0 18. "SBKF,Send break flag" "0: Break character transmitted,1: Break character requested by setting SBKRQ bit.."
|
|
newline
|
|
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character Match detected"
|
|
bitfld.long 0x0 16. "BUSY,Busy flag" "0: USART is idle (no reception),1: Reception on going"
|
|
newline
|
|
bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1"
|
|
bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "0: No underrun error,1: underrun error"
|
|
bitfld.long 0x0 12. "EOBF,End of block flag" "0: End of Block not reached,1: End of Block (number of characters) reached"
|
|
newline
|
|
bitfld.long 0x0 11. "RTOF,Receiver timeout" "0: Timeout value not reached,1: Timeout value reached without any data reception"
|
|
bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
|
|
newline
|
|
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
|
|
bitfld.long 0x0 8. "LBDF,LIN break detection flag" "0: LIN Break not detected,1: LIN break detected"
|
|
newline
|
|
bitfld.long 0x0 7. "TXE,Transmit data register empty" "0: Data register full,1: Data register not full"
|
|
bitfld.long 0x0 6. "TC,Transmission complete" "0: Transmission is not complete,1: Transmission is complete"
|
|
newline
|
|
bitfld.long 0x0 5. "RXNE,Read data register not empty" "0: Data is not received,1: Received data is ready to be read."
|
|
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
|
|
newline
|
|
bitfld.long 0x0 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected"
|
|
bitfld.long 0x0 2. "NE,Noise detection flag" "0: No noise is detected,1: Noise is detected"
|
|
newline
|
|
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
|
|
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x0 "USART_ICR,USART interrupt flag clear register"
|
|
bitfld.long 0x0 20. "WUCF,Wakeup from low-power mode clear flag" "?,?"
|
|
bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "UDRCF,SPI slave underrun clear flag" "?,?"
|
|
bitfld.long 0x0 12. "EOBCF,End of block clear flag" "?,?"
|
|
newline
|
|
bitfld.long 0x0 11. "RTOCF,Receiver timeout clear flag" "?,?"
|
|
bitfld.long 0x0 9. "CTSCF,CTS clear flag" "?,?"
|
|
newline
|
|
bitfld.long 0x0 8. "LBDCF,LIN break detection clear flag" "?,?"
|
|
bitfld.long 0x0 7. "TCBGTCF,Transmission complete before Guard time clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1"
|
|
bitfld.long 0x0 5. "TXFECF,TXFIFO empty clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1"
|
|
bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1"
|
|
bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1"
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x0 "USART_RDR,USART receive data register"
|
|
hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value"
|
|
group.long 0x28++0x7
|
|
line.long 0x0 "USART_TDR,USART transmit data register"
|
|
hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value"
|
|
line.long 0x4 "USART_PRESC,USART prescaler register"
|
|
hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler"
|
|
tree.end
|
|
tree "USART2"
|
|
base ad:0x40004400
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "USART_CR1,USART control register 1"
|
|
bitfld.long 0x0 31. "RXFFIE,RXFIFO full interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when RXFF = 1 in the.."
|
|
bitfld.long 0x0 30. "TXFEIE,TXFIFO empty interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TXFE = 1 in the.."
|
|
newline
|
|
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
|
|
bitfld.long 0x0 28. "M1,Word length" "0: 1 start bit,1: 1 start bit"
|
|
newline
|
|
bitfld.long 0x0 27. "EOBIE,End-of-block interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the EOBF flag is.."
|
|
bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the RTOF bit is.."
|
|
newline
|
|
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver enable assertion time"
|
|
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver enable deassertion time"
|
|
newline
|
|
bitfld.long 0x0 15. "OVER8,Oversampling mode" "0: Oversampling by 16,1: Oversampling by 8"
|
|
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the CMF bit is.."
|
|
newline
|
|
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between Mute mode and active.."
|
|
bitfld.long 0x0 12. "M0,Word length" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "WAKE,Receiver wakeup method" "0: Idle line,1: Address mark"
|
|
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
|
|
newline
|
|
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
|
|
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever PE = 1 in the.."
|
|
newline
|
|
bitfld.long 0x0 7. "TXFNFIE,TXFIFO not-full interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TXFNF =1 in.."
|
|
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TC = 1 in the.."
|
|
newline
|
|
bitfld.long 0x0 5. "RXFNEIE,RXFIFO not empty interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever ORE = 1 or.."
|
|
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever IDLE = 1 in.."
|
|
newline
|
|
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
|
|
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
|
|
newline
|
|
bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "0: USART not able to wake up the MCU from low-power..,1: USART able to wake up the MCU from low-power mode."
|
|
bitfld.long 0x0 0. "UE,USART enable" "0: USART prescaler and outputs disabled low-power..,1: USART enabled"
|
|
group.long 0x0++0x17
|
|
line.long 0x0 "USART_CR1_ALTERNATE,USART control register 1"
|
|
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
|
|
bitfld.long 0x0 28. "M1,Word length" "0: 1 start bit,1: 1 start bit"
|
|
newline
|
|
bitfld.long 0x0 27. "EOBIE,End of Bbock interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the EOBF flag is.."
|
|
bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the RTOF bit is.."
|
|
newline
|
|
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver enable assertion time"
|
|
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver enable deassertion time"
|
|
newline
|
|
bitfld.long 0x0 15. "OVER8,Oversampling mode" "0: Oversampling by 16,1: Oversampling by 8"
|
|
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the CMF bit is.."
|
|
newline
|
|
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between Mute mode and active.."
|
|
bitfld.long 0x0 12. "M0,Word length" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "WAKE,Receiver wakeup method" "0: Idle line,1: Address mark"
|
|
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
|
|
newline
|
|
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
|
|
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever PE = 1 in the.."
|
|
newline
|
|
bitfld.long 0x0 7. "TXEIE,Transmit data register empty" "0: Interrupt inhibited,1: USART interrupt generated whenever TXE =1 in the.."
|
|
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TC = 1 in the.."
|
|
newline
|
|
bitfld.long 0x0 5. "RXNEIE,Receive data register not empty" "0: Interrupt inhibited,1: USART interrupt generated whenever ORE = 1 or.."
|
|
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever IDLE = 1 in.."
|
|
newline
|
|
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
|
|
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
|
|
newline
|
|
bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "0: USART not able to wake up the MCU from low-power..,1: USART able to wake up the MCU from low-power mode."
|
|
bitfld.long 0x0 0. "UE,USART enable" "0: USART prescaler and outputs disabled low-power..,1: USART enabled"
|
|
line.long 0x4 "USART_CR2,USART control register 2"
|
|
hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the USART node"
|
|
bitfld.long 0x4 23. "RTOEN,Receiver timeout enable" "0: Receiver timeout feature disabled.,1: Receiver timeout feature enabled."
|
|
newline
|
|
bitfld.long 0x4 21.--22. "ABRMOD,Auto baud rate mode" "0: Measurement of the start bit is used to detect..,1: Falling edge to falling edge measurement (the..,2: 0x7F frame detection.,3: 0x55 frame detection"
|
|
bitfld.long 0x4 20. "ABREN,Auto baud rate enable" "0: Auto baud rate detection is disabled.,1: Auto baud rate detection is enabled."
|
|
newline
|
|
bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "0: data is transmitted/received with data bit 0..,1: data is transmitted/received with the MSB (bit.."
|
|
bitfld.long 0x4 18. "DATAINV,Binary data inversion" "0: Logical data from the data register are..,1: Logical data from the data register are.."
|
|
newline
|
|
bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "0: TX pin signal works using the standard logic..,1: TX pin signal values are inverted.."
|
|
bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "0: RX pin signal works using the standard logic..,1: RX pin signal values are inverted.."
|
|
newline
|
|
bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "0: TX/RX pins are used as defined in standard pinout,1: The TX and RX pins functions are swapped. This.."
|
|
bitfld.long 0x4 14. "LINEN,LIN mode enable" "0: LIN mode disabled,1: LIN mode enabled"
|
|
newline
|
|
bitfld.long 0x4 12.--13. "STOP,Stop bits" "0: 1 stop bit,1: 0.5 stop bit.,2: 2 stop bits,3: 1.5 stop bits"
|
|
bitfld.long 0x4 11. "CLKEN,Clock enable" "0: CK pin disabled,1: CK pin enabled"
|
|
newline
|
|
bitfld.long 0x4 10. "CPOL,Clock polarity" "0: Steady low value on CK pin outside transmission..,1: Steady high value on CK pin outside transmission.."
|
|
bitfld.long 0x4 9. "CPHA,Clock phase" "0: The first clock transition is the first data..,1: The second clock transition is the first data.."
|
|
newline
|
|
bitfld.long 0x4 8. "LBCL,Last bit clock pulse" "0: The clock pulse of the last data bit is not..,1: The clock pulse of the last data bit is output.."
|
|
bitfld.long 0x4 6. "LBDIE,LIN break detection interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever LBDF = 1 in.."
|
|
newline
|
|
bitfld.long 0x4 5. "LBDL,LIN break detection length" "0: 10-bit break detection,1: 11-bit break detection"
|
|
bitfld.long 0x4 4. "ADDM7,7-bit address detection/4-bit address detection" "0: 4-bit address detection,1: 7-bit address detection (in 8-bit data mode)"
|
|
newline
|
|
bitfld.long 0x4 3. "DIS_NSS,NSS pin enable" "0: SPI slave selection depends on NSS input pin.,1: SPI slave is always selected and NSS input pin.."
|
|
bitfld.long 0x4 0. "SLVEN,Synchronous Slave mode enable" "0: Slave mode disabled.,1: Slave mode enabled."
|
|
line.long 0x8 "USART_CR3,USART control register 3"
|
|
bitfld.long 0x8 29.--31. "TXFTCFG,TXFIFO threshold configuration" "0: TXFIFO reaches 1/8 of its depth,1: TXFIFO reaches 1/4 of its depth,2: TXFIFO reaches 1/2 of its depth,3: TXFIFO reaches 3/4 of its depth,4: TXFIFO reaches 7/8 of its depth,5: TXFIFO becomes empty,?,?"
|
|
bitfld.long 0x8 28. "RXFTIE,RXFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when Receive FIFO.."
|
|
newline
|
|
bitfld.long 0x8 25.--27. "RXFTCFG,Receive FIFO threshold configuration" "0: Receive FIFO reaches 1/8 of its depth,1: Receive FIFO reaches 1/4 of its depth,2: Receive FIFO reaches 1/2 of its depth,3: Receive FIFO reaches 3/4 of its depth,4: Receive FIFO reaches 7/8 of its depth,5: Receive FIFO becomes full,?,?"
|
|
bitfld.long 0x8 24. "TCBGTIE,Transmission complete before guard time interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TCBGT=1 in.."
|
|
newline
|
|
bitfld.long 0x8 23. "TXFTIE,TXFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TXFIFO reaches.."
|
|
bitfld.long 0x8 22. "WUFIE,Wakeup from low-power mode interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever WUF = 1 in.."
|
|
newline
|
|
bitfld.long 0x8 20.--21. "WUS,Wakeup from low-power mode interrupt flag selection" "0: WUF active on address match (as defined by..,?,2: WUF active on start bit detection,3: WUF active on RXNE/RXFNE."
|
|
bitfld.long 0x8 17.--19. "SCARCNT,Smartcard auto-retry count" "0: retransmission disabled - No automatic..,?,?,?,4: USART implementation on page 1038,?,?,7: number of automatic retransmission attempts"
|
|
newline
|
|
bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "0: DE signal is active high.,1: DE signal is active low."
|
|
bitfld.long 0x8 14. "DEM,Driver enable mode" "0: DE function is disabled.,1: DE function is enabled. The DE signal is output.."
|
|
newline
|
|
bitfld.long 0x8 13. "DDRE,DMA Disable on reception error" "0: DMA is not disabled in case of reception error.,1: DMA is disabled following a reception error. The.."
|
|
bitfld.long 0x8 12. "OVRDIS,Overrun disable" "0: Overrun Error Flag ORE is set when received data..,1: Overrun functionality is disabled. If new data.."
|
|
newline
|
|
bitfld.long 0x8 11. "ONEBIT,One sample bit method enable" "0: Three sample bit method,1: One sample bit method"
|
|
bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever CTSIF = 1 in.."
|
|
newline
|
|
bitfld.long 0x8 9. "CTSE,CTS enable" "0: CTS hardware flow control disabled,1: CTS mode enabled data is only transmitted when.."
|
|
bitfld.long 0x8 8. "RTSE,RTS enable" "0: RTS hardware flow control disabled,1: RTS output enabled data is only requested when.."
|
|
newline
|
|
bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "0: DMA mode is disabled for transmission,1: DMA mode is enabled for transmission"
|
|
bitfld.long 0x8 6. "DMAR,DMA enable receiver" "0: DMA mode is disabled for reception,1: DMA mode is enabled for reception"
|
|
newline
|
|
bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "0: Smartcard Mode disabled,1: Smartcard Mode enabled"
|
|
bitfld.long 0x8 4. "NACK,Smartcard NACK enable" "0: NACK transmission in case of parity error is..,1: NACK transmission during parity error is enabled"
|
|
newline
|
|
bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "0: Half duplex mode is not selected,1: Half duplex mode is selected"
|
|
bitfld.long 0x8 2. "IRLP,IrDA low-power" "0: Normal mode,1: Low-power mode"
|
|
newline
|
|
bitfld.long 0x8 1. "IREN,IrDA mode enable" "0: IrDA disabled,1: IrDA enabled"
|
|
bitfld.long 0x8 0. "EIE,Error interrupt enable" "0: Interrupt inhibited,1: interrupt generated when FE = 1 or ORE = 1 or NE.."
|
|
line.long 0xC "USART_BRR,USART baud rate register"
|
|
hexmask.long.word 0xC 0.--15. 1. "BRR,USART baud rate"
|
|
line.long 0x10 "USART_GTPR,USART guard time and prescaler register"
|
|
hexmask.long.byte 0x10 8.--15. 1. "GT,Guard time value"
|
|
hexmask.long.byte 0x10 0.--7. 1. "PSC,Prescaler value"
|
|
line.long 0x14 "USART_RTOR,USART receiver timeout register"
|
|
hexmask.long.byte 0x14 24.--31. 1. "BLEN,Block length"
|
|
hexmask.long.tbyte 0x14 0.--23. 1. "RTO,Receiver timeout value"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x0 "USART_RQR,USART request register"
|
|
bitfld.long 0x0 4. "TXFRQ,Transmit data flush request" "0,1"
|
|
bitfld.long 0x0 3. "RXFRQ,Receive data flush request" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1"
|
|
bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "ABRRQ,Auto baud rate request" "?,?"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "USART_ISR,USART interrupt and status register"
|
|
bitfld.long 0x0 27. "TXFT,TXFIFO threshold flag" "0: TXFIFO does not reach the programmed threshold.,1: TXFIFO reached the programmed threshold."
|
|
bitfld.long 0x0 26. "RXFT,RXFIFO threshold flag" "0: Receive FIFO does not reach the programmed..,1: Receive FIFO reached the programmed threshold."
|
|
newline
|
|
bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "0: Transmission is not complete or transmission is..,1: Transmission is complete successfully (before.."
|
|
bitfld.long 0x0 24. "RXFF,RXFIFO full" "0: RXFIFO not full.,1: RXFIFO Full."
|
|
newline
|
|
bitfld.long 0x0 23. "TXFE,TXFIFO empty" "0: TXFIFO not empty.,1: TXFIFO empty."
|
|
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "?,?"
|
|
newline
|
|
bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
|
|
bitfld.long 0x0 20. "WUF,Wakeup from low-power mode flag" "?,?"
|
|
newline
|
|
bitfld.long 0x0 19. "RWU,Receiver wakeup from Mute mode" "0: Receiver in active mode,1: Receiver in Mute mode"
|
|
bitfld.long 0x0 18. "SBKF,Send break flag" "0: Break character transmitted,1: Break character requested by setting SBKRQ bit.."
|
|
newline
|
|
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character Match detected"
|
|
bitfld.long 0x0 16. "BUSY,Busy flag" "0: USART is idle (no reception),1: Reception on going"
|
|
newline
|
|
bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1"
|
|
bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "0: No underrun error,1: underrun error"
|
|
bitfld.long 0x0 12. "EOBF,End of block flag" "0: End of Block not reached,1: End of Block (number of characters) reached"
|
|
newline
|
|
bitfld.long 0x0 11. "RTOF,Receiver timeout" "0: Timeout value not reached,1: Timeout value reached without any data reception"
|
|
bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
|
|
newline
|
|
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
|
|
bitfld.long 0x0 8. "LBDF,LIN break detection flag" "0: LIN Break not detected,1: LIN break detected"
|
|
newline
|
|
bitfld.long 0x0 7. "TXFNF,TXFIFO not full" "0: Transmit FIFO is full,1: Transmit FIFO is not full"
|
|
bitfld.long 0x0 6. "TC,Transmission complete" "0: Transmission is not complete,1: Transmission is complete"
|
|
newline
|
|
bitfld.long 0x0 5. "RXFNE,RXFIFO not empty" "0: Data is not received,1: Received data is ready to be read."
|
|
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
|
|
newline
|
|
bitfld.long 0x0 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected"
|
|
bitfld.long 0x0 2. "NE,Noise detection flag" "0: No noise is detected,1: Noise is detected"
|
|
newline
|
|
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
|
|
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "USART_ISR_ALTERNATE,USART interrupt and status register"
|
|
bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "0: Transmission is not complete or transmission is..,1: Transmission is complete successfully (before.."
|
|
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "?,?"
|
|
newline
|
|
bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
|
|
bitfld.long 0x0 20. "WUF,Wakeup from low-power mode flag" "?,?"
|
|
newline
|
|
bitfld.long 0x0 19. "RWU,Receiver wakeup from Mute mode" "0: Receiver in active mode,1: Receiver in Mute mode"
|
|
bitfld.long 0x0 18. "SBKF,Send break flag" "0: Break character transmitted,1: Break character requested by setting SBKRQ bit.."
|
|
newline
|
|
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character Match detected"
|
|
bitfld.long 0x0 16. "BUSY,Busy flag" "0: USART is idle (no reception),1: Reception on going"
|
|
newline
|
|
bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1"
|
|
bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "0: No underrun error,1: underrun error"
|
|
bitfld.long 0x0 12. "EOBF,End of block flag" "0: End of Block not reached,1: End of Block (number of characters) reached"
|
|
newline
|
|
bitfld.long 0x0 11. "RTOF,Receiver timeout" "0: Timeout value not reached,1: Timeout value reached without any data reception"
|
|
bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
|
|
newline
|
|
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
|
|
bitfld.long 0x0 8. "LBDF,LIN break detection flag" "0: LIN Break not detected,1: LIN break detected"
|
|
newline
|
|
bitfld.long 0x0 7. "TXE,Transmit data register empty" "0: Data register full,1: Data register not full"
|
|
bitfld.long 0x0 6. "TC,Transmission complete" "0: Transmission is not complete,1: Transmission is complete"
|
|
newline
|
|
bitfld.long 0x0 5. "RXNE,Read data register not empty" "0: Data is not received,1: Received data is ready to be read."
|
|
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
|
|
newline
|
|
bitfld.long 0x0 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected"
|
|
bitfld.long 0x0 2. "NE,Noise detection flag" "0: No noise is detected,1: Noise is detected"
|
|
newline
|
|
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
|
|
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x0 "USART_ICR,USART interrupt flag clear register"
|
|
bitfld.long 0x0 20. "WUCF,Wakeup from low-power mode clear flag" "?,?"
|
|
bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "UDRCF,SPI slave underrun clear flag" "?,?"
|
|
bitfld.long 0x0 12. "EOBCF,End of block clear flag" "?,?"
|
|
newline
|
|
bitfld.long 0x0 11. "RTOCF,Receiver timeout clear flag" "?,?"
|
|
bitfld.long 0x0 9. "CTSCF,CTS clear flag" "?,?"
|
|
newline
|
|
bitfld.long 0x0 8. "LBDCF,LIN break detection clear flag" "?,?"
|
|
bitfld.long 0x0 7. "TCBGTCF,Transmission complete before Guard time clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1"
|
|
bitfld.long 0x0 5. "TXFECF,TXFIFO empty clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1"
|
|
bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1"
|
|
bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1"
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x0 "USART_RDR,USART receive data register"
|
|
hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value"
|
|
group.long 0x28++0x7
|
|
line.long 0x0 "USART_TDR,USART transmit data register"
|
|
hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value"
|
|
line.long 0x4 "USART_PRESC,USART prescaler register"
|
|
hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler"
|
|
tree.end
|
|
tree "USART3"
|
|
base ad:0x40004800
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "USART_CR1,USART control register 1"
|
|
bitfld.long 0x0 31. "RXFFIE,RXFIFO full interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when RXFF = 1 in the.."
|
|
bitfld.long 0x0 30. "TXFEIE,TXFIFO empty interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TXFE = 1 in the.."
|
|
newline
|
|
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
|
|
bitfld.long 0x0 28. "M1,Word length" "0: 1 start bit,1: 1 start bit"
|
|
newline
|
|
bitfld.long 0x0 27. "EOBIE,End-of-block interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the EOBF flag is.."
|
|
bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the RTOF bit is.."
|
|
newline
|
|
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver enable assertion time"
|
|
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver enable deassertion time"
|
|
newline
|
|
bitfld.long 0x0 15. "OVER8,Oversampling mode" "0: Oversampling by 16,1: Oversampling by 8"
|
|
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the CMF bit is.."
|
|
newline
|
|
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between Mute mode and active.."
|
|
bitfld.long 0x0 12. "M0,Word length" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "WAKE,Receiver wakeup method" "0: Idle line,1: Address mark"
|
|
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
|
|
newline
|
|
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
|
|
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever PE = 1 in the.."
|
|
newline
|
|
bitfld.long 0x0 7. "TXFNFIE,TXFIFO not-full interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TXFNF =1 in.."
|
|
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TC = 1 in the.."
|
|
newline
|
|
bitfld.long 0x0 5. "RXFNEIE,RXFIFO not empty interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever ORE = 1 or.."
|
|
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever IDLE = 1 in.."
|
|
newline
|
|
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
|
|
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
|
|
newline
|
|
bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "0: USART not able to wake up the MCU from low-power..,1: USART able to wake up the MCU from low-power mode."
|
|
bitfld.long 0x0 0. "UE,USART enable" "0: USART prescaler and outputs disabled low-power..,1: USART enabled"
|
|
group.long 0x0++0x17
|
|
line.long 0x0 "USART_CR1_ALTERNATE,USART control register 1"
|
|
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
|
|
bitfld.long 0x0 28. "M1,Word length" "0: 1 start bit,1: 1 start bit"
|
|
newline
|
|
bitfld.long 0x0 27. "EOBIE,End of Bbock interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the EOBF flag is.."
|
|
bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the RTOF bit is.."
|
|
newline
|
|
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver enable assertion time"
|
|
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver enable deassertion time"
|
|
newline
|
|
bitfld.long 0x0 15. "OVER8,Oversampling mode" "0: Oversampling by 16,1: Oversampling by 8"
|
|
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the CMF bit is.."
|
|
newline
|
|
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between Mute mode and active.."
|
|
bitfld.long 0x0 12. "M0,Word length" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "WAKE,Receiver wakeup method" "0: Idle line,1: Address mark"
|
|
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
|
|
newline
|
|
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
|
|
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever PE = 1 in the.."
|
|
newline
|
|
bitfld.long 0x0 7. "TXEIE,Transmit data register empty" "0: Interrupt inhibited,1: USART interrupt generated whenever TXE =1 in the.."
|
|
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TC = 1 in the.."
|
|
newline
|
|
bitfld.long 0x0 5. "RXNEIE,Receive data register not empty" "0: Interrupt inhibited,1: USART interrupt generated whenever ORE = 1 or.."
|
|
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever IDLE = 1 in.."
|
|
newline
|
|
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
|
|
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
|
|
newline
|
|
bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "0: USART not able to wake up the MCU from low-power..,1: USART able to wake up the MCU from low-power mode."
|
|
bitfld.long 0x0 0. "UE,USART enable" "0: USART prescaler and outputs disabled low-power..,1: USART enabled"
|
|
line.long 0x4 "USART_CR2,USART control register 2"
|
|
hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the USART node"
|
|
bitfld.long 0x4 23. "RTOEN,Receiver timeout enable" "0: Receiver timeout feature disabled.,1: Receiver timeout feature enabled."
|
|
newline
|
|
bitfld.long 0x4 21.--22. "ABRMOD,Auto baud rate mode" "0: Measurement of the start bit is used to detect..,1: Falling edge to falling edge measurement (the..,2: 0x7F frame detection.,3: 0x55 frame detection"
|
|
bitfld.long 0x4 20. "ABREN,Auto baud rate enable" "0: Auto baud rate detection is disabled.,1: Auto baud rate detection is enabled."
|
|
newline
|
|
bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "0: data is transmitted/received with data bit 0..,1: data is transmitted/received with the MSB (bit.."
|
|
bitfld.long 0x4 18. "DATAINV,Binary data inversion" "0: Logical data from the data register are..,1: Logical data from the data register are.."
|
|
newline
|
|
bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "0: TX pin signal works using the standard logic..,1: TX pin signal values are inverted.."
|
|
bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "0: RX pin signal works using the standard logic..,1: RX pin signal values are inverted.."
|
|
newline
|
|
bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "0: TX/RX pins are used as defined in standard pinout,1: The TX and RX pins functions are swapped. This.."
|
|
bitfld.long 0x4 14. "LINEN,LIN mode enable" "0: LIN mode disabled,1: LIN mode enabled"
|
|
newline
|
|
bitfld.long 0x4 12.--13. "STOP,Stop bits" "0: 1 stop bit,1: 0.5 stop bit.,2: 2 stop bits,3: 1.5 stop bits"
|
|
bitfld.long 0x4 11. "CLKEN,Clock enable" "0: CK pin disabled,1: CK pin enabled"
|
|
newline
|
|
bitfld.long 0x4 10. "CPOL,Clock polarity" "0: Steady low value on CK pin outside transmission..,1: Steady high value on CK pin outside transmission.."
|
|
bitfld.long 0x4 9. "CPHA,Clock phase" "0: The first clock transition is the first data..,1: The second clock transition is the first data.."
|
|
newline
|
|
bitfld.long 0x4 8. "LBCL,Last bit clock pulse" "0: The clock pulse of the last data bit is not..,1: The clock pulse of the last data bit is output.."
|
|
bitfld.long 0x4 6. "LBDIE,LIN break detection interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever LBDF = 1 in.."
|
|
newline
|
|
bitfld.long 0x4 5. "LBDL,LIN break detection length" "0: 10-bit break detection,1: 11-bit break detection"
|
|
bitfld.long 0x4 4. "ADDM7,7-bit address detection/4-bit address detection" "0: 4-bit address detection,1: 7-bit address detection (in 8-bit data mode)"
|
|
newline
|
|
bitfld.long 0x4 3. "DIS_NSS,NSS pin enable" "0: SPI slave selection depends on NSS input pin.,1: SPI slave is always selected and NSS input pin.."
|
|
bitfld.long 0x4 0. "SLVEN,Synchronous Slave mode enable" "0: Slave mode disabled.,1: Slave mode enabled."
|
|
line.long 0x8 "USART_CR3,USART control register 3"
|
|
bitfld.long 0x8 29.--31. "TXFTCFG,TXFIFO threshold configuration" "0: TXFIFO reaches 1/8 of its depth,1: TXFIFO reaches 1/4 of its depth,2: TXFIFO reaches 1/2 of its depth,3: TXFIFO reaches 3/4 of its depth,4: TXFIFO reaches 7/8 of its depth,5: TXFIFO becomes empty,?,?"
|
|
bitfld.long 0x8 28. "RXFTIE,RXFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when Receive FIFO.."
|
|
newline
|
|
bitfld.long 0x8 25.--27. "RXFTCFG,Receive FIFO threshold configuration" "0: Receive FIFO reaches 1/8 of its depth,1: Receive FIFO reaches 1/4 of its depth,2: Receive FIFO reaches 1/2 of its depth,3: Receive FIFO reaches 3/4 of its depth,4: Receive FIFO reaches 7/8 of its depth,5: Receive FIFO becomes full,?,?"
|
|
bitfld.long 0x8 24. "TCBGTIE,Transmission complete before guard time interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TCBGT=1 in.."
|
|
newline
|
|
bitfld.long 0x8 23. "TXFTIE,TXFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TXFIFO reaches.."
|
|
bitfld.long 0x8 22. "WUFIE,Wakeup from low-power mode interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever WUF = 1 in.."
|
|
newline
|
|
bitfld.long 0x8 20.--21. "WUS,Wakeup from low-power mode interrupt flag selection" "0: WUF active on address match (as defined by..,?,2: WUF active on start bit detection,3: WUF active on RXNE/RXFNE."
|
|
bitfld.long 0x8 17.--19. "SCARCNT,Smartcard auto-retry count" "0: retransmission disabled - No automatic..,?,?,?,4: USART implementation on page 1038,?,?,7: number of automatic retransmission attempts"
|
|
newline
|
|
bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "0: DE signal is active high.,1: DE signal is active low."
|
|
bitfld.long 0x8 14. "DEM,Driver enable mode" "0: DE function is disabled.,1: DE function is enabled. The DE signal is output.."
|
|
newline
|
|
bitfld.long 0x8 13. "DDRE,DMA Disable on reception error" "0: DMA is not disabled in case of reception error.,1: DMA is disabled following a reception error. The.."
|
|
bitfld.long 0x8 12. "OVRDIS,Overrun disable" "0: Overrun Error Flag ORE is set when received data..,1: Overrun functionality is disabled. If new data.."
|
|
newline
|
|
bitfld.long 0x8 11. "ONEBIT,One sample bit method enable" "0: Three sample bit method,1: One sample bit method"
|
|
bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever CTSIF = 1 in.."
|
|
newline
|
|
bitfld.long 0x8 9. "CTSE,CTS enable" "0: CTS hardware flow control disabled,1: CTS mode enabled data is only transmitted when.."
|
|
bitfld.long 0x8 8. "RTSE,RTS enable" "0: RTS hardware flow control disabled,1: RTS output enabled data is only requested when.."
|
|
newline
|
|
bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "0: DMA mode is disabled for transmission,1: DMA mode is enabled for transmission"
|
|
bitfld.long 0x8 6. "DMAR,DMA enable receiver" "0: DMA mode is disabled for reception,1: DMA mode is enabled for reception"
|
|
newline
|
|
bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "0: Smartcard Mode disabled,1: Smartcard Mode enabled"
|
|
bitfld.long 0x8 4. "NACK,Smartcard NACK enable" "0: NACK transmission in case of parity error is..,1: NACK transmission during parity error is enabled"
|
|
newline
|
|
bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "0: Half duplex mode is not selected,1: Half duplex mode is selected"
|
|
bitfld.long 0x8 2. "IRLP,IrDA low-power" "0: Normal mode,1: Low-power mode"
|
|
newline
|
|
bitfld.long 0x8 1. "IREN,IrDA mode enable" "0: IrDA disabled,1: IrDA enabled"
|
|
bitfld.long 0x8 0. "EIE,Error interrupt enable" "0: Interrupt inhibited,1: interrupt generated when FE = 1 or ORE = 1 or NE.."
|
|
line.long 0xC "USART_BRR,USART baud rate register"
|
|
hexmask.long.word 0xC 0.--15. 1. "BRR,USART baud rate"
|
|
line.long 0x10 "USART_GTPR,USART guard time and prescaler register"
|
|
hexmask.long.byte 0x10 8.--15. 1. "GT,Guard time value"
|
|
hexmask.long.byte 0x10 0.--7. 1. "PSC,Prescaler value"
|
|
line.long 0x14 "USART_RTOR,USART receiver timeout register"
|
|
hexmask.long.byte 0x14 24.--31. 1. "BLEN,Block length"
|
|
hexmask.long.tbyte 0x14 0.--23. 1. "RTO,Receiver timeout value"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x0 "USART_RQR,USART request register"
|
|
bitfld.long 0x0 4. "TXFRQ,Transmit data flush request" "0,1"
|
|
bitfld.long 0x0 3. "RXFRQ,Receive data flush request" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1"
|
|
bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "ABRRQ,Auto baud rate request" "?,?"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "USART_ISR,USART interrupt and status register"
|
|
bitfld.long 0x0 27. "TXFT,TXFIFO threshold flag" "0: TXFIFO does not reach the programmed threshold.,1: TXFIFO reached the programmed threshold."
|
|
bitfld.long 0x0 26. "RXFT,RXFIFO threshold flag" "0: Receive FIFO does not reach the programmed..,1: Receive FIFO reached the programmed threshold."
|
|
newline
|
|
bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "0: Transmission is not complete or transmission is..,1: Transmission is complete successfully (before.."
|
|
bitfld.long 0x0 24. "RXFF,RXFIFO full" "0: RXFIFO not full.,1: RXFIFO Full."
|
|
newline
|
|
bitfld.long 0x0 23. "TXFE,TXFIFO empty" "0: TXFIFO not empty.,1: TXFIFO empty."
|
|
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "?,?"
|
|
newline
|
|
bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
|
|
bitfld.long 0x0 20. "WUF,Wakeup from low-power mode flag" "?,?"
|
|
newline
|
|
bitfld.long 0x0 19. "RWU,Receiver wakeup from Mute mode" "0: Receiver in active mode,1: Receiver in Mute mode"
|
|
bitfld.long 0x0 18. "SBKF,Send break flag" "0: Break character transmitted,1: Break character requested by setting SBKRQ bit.."
|
|
newline
|
|
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character Match detected"
|
|
bitfld.long 0x0 16. "BUSY,Busy flag" "0: USART is idle (no reception),1: Reception on going"
|
|
newline
|
|
bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1"
|
|
bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "0: No underrun error,1: underrun error"
|
|
bitfld.long 0x0 12. "EOBF,End of block flag" "0: End of Block not reached,1: End of Block (number of characters) reached"
|
|
newline
|
|
bitfld.long 0x0 11. "RTOF,Receiver timeout" "0: Timeout value not reached,1: Timeout value reached without any data reception"
|
|
bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
|
|
newline
|
|
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
|
|
bitfld.long 0x0 8. "LBDF,LIN break detection flag" "0: LIN Break not detected,1: LIN break detected"
|
|
newline
|
|
bitfld.long 0x0 7. "TXFNF,TXFIFO not full" "0: Transmit FIFO is full,1: Transmit FIFO is not full"
|
|
bitfld.long 0x0 6. "TC,Transmission complete" "0: Transmission is not complete,1: Transmission is complete"
|
|
newline
|
|
bitfld.long 0x0 5. "RXFNE,RXFIFO not empty" "0: Data is not received,1: Received data is ready to be read."
|
|
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
|
|
newline
|
|
bitfld.long 0x0 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected"
|
|
bitfld.long 0x0 2. "NE,Noise detection flag" "0: No noise is detected,1: Noise is detected"
|
|
newline
|
|
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
|
|
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "USART_ISR_ALTERNATE,USART interrupt and status register"
|
|
bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "0: Transmission is not complete or transmission is..,1: Transmission is complete successfully (before.."
|
|
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "?,?"
|
|
newline
|
|
bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
|
|
bitfld.long 0x0 20. "WUF,Wakeup from low-power mode flag" "?,?"
|
|
newline
|
|
bitfld.long 0x0 19. "RWU,Receiver wakeup from Mute mode" "0: Receiver in active mode,1: Receiver in Mute mode"
|
|
bitfld.long 0x0 18. "SBKF,Send break flag" "0: Break character transmitted,1: Break character requested by setting SBKRQ bit.."
|
|
newline
|
|
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character Match detected"
|
|
bitfld.long 0x0 16. "BUSY,Busy flag" "0: USART is idle (no reception),1: Reception on going"
|
|
newline
|
|
bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1"
|
|
bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "0: No underrun error,1: underrun error"
|
|
bitfld.long 0x0 12. "EOBF,End of block flag" "0: End of Block not reached,1: End of Block (number of characters) reached"
|
|
newline
|
|
bitfld.long 0x0 11. "RTOF,Receiver timeout" "0: Timeout value not reached,1: Timeout value reached without any data reception"
|
|
bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
|
|
newline
|
|
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
|
|
bitfld.long 0x0 8. "LBDF,LIN break detection flag" "0: LIN Break not detected,1: LIN break detected"
|
|
newline
|
|
bitfld.long 0x0 7. "TXE,Transmit data register empty" "0: Data register full,1: Data register not full"
|
|
bitfld.long 0x0 6. "TC,Transmission complete" "0: Transmission is not complete,1: Transmission is complete"
|
|
newline
|
|
bitfld.long 0x0 5. "RXNE,Read data register not empty" "0: Data is not received,1: Received data is ready to be read."
|
|
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
|
|
newline
|
|
bitfld.long 0x0 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected"
|
|
bitfld.long 0x0 2. "NE,Noise detection flag" "0: No noise is detected,1: Noise is detected"
|
|
newline
|
|
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
|
|
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x0 "USART_ICR,USART interrupt flag clear register"
|
|
bitfld.long 0x0 20. "WUCF,Wakeup from low-power mode clear flag" "?,?"
|
|
bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "UDRCF,SPI slave underrun clear flag" "?,?"
|
|
bitfld.long 0x0 12. "EOBCF,End of block clear flag" "?,?"
|
|
newline
|
|
bitfld.long 0x0 11. "RTOCF,Receiver timeout clear flag" "?,?"
|
|
bitfld.long 0x0 9. "CTSCF,CTS clear flag" "?,?"
|
|
newline
|
|
bitfld.long 0x0 8. "LBDCF,LIN break detection clear flag" "?,?"
|
|
bitfld.long 0x0 7. "TCBGTCF,Transmission complete before Guard time clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1"
|
|
bitfld.long 0x0 5. "TXFECF,TXFIFO empty clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1"
|
|
bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1"
|
|
bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1"
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x0 "USART_RDR,USART receive data register"
|
|
hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value"
|
|
group.long 0x28++0x7
|
|
line.long 0x0 "USART_TDR,USART transmit data register"
|
|
hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value"
|
|
line.long 0x4 "USART_PRESC,USART prescaler register"
|
|
hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler"
|
|
tree.end
|
|
sif (cpuis("STM32L4P5*")||cpuis("STM32L4Q5*")||cpuis("STM32L4R5*"))
|
|
tree "LPUART"
|
|
base ad:0x40008000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "LPUART_CR1,LPUART control register 1"
|
|
bitfld.long 0x0 31. "RXFFIE,RXFIFO full interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated when RXFF = 1.."
|
|
bitfld.long 0x0 30. "TXFEIE,TXFIFO empty interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated when TXFE = 1.."
|
|
newline
|
|
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
|
|
bitfld.long 0x0 28. "M1,Word length" "0: 1 Start bit,1: 1 Start bit"
|
|
newline
|
|
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver enable assertion time"
|
|
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver enable deassertion time"
|
|
newline
|
|
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated when the CMF bit.."
|
|
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between Mute mode and active.."
|
|
newline
|
|
bitfld.long 0x0 12. "M0,Word length" "0,1"
|
|
bitfld.long 0x0 11. "WAKE,Receiver wakeup method" "0: Idle line,1: Address mark"
|
|
newline
|
|
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
|
|
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
|
|
newline
|
|
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever PE = 1.."
|
|
bitfld.long 0x0 7. "TXFNFIE,TXFIFO not full interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated whenever.."
|
|
newline
|
|
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever TC = 1.."
|
|
bitfld.long 0x0 5. "RXFNEIE,RXFIFO not empty interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated whenever ORE = 1.."
|
|
newline
|
|
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever IDLE =.."
|
|
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
|
|
newline
|
|
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
|
|
bitfld.long 0x0 1. "UESM,LPUART enable in Stop mode" "0: LPUART not able to wake up the MCU from..,1: LPUART able to wake up the MCU from low-power.."
|
|
newline
|
|
bitfld.long 0x0 0. "UE,LPUART enable" "0: LPUART prescaler and outputs disabled low-power..,1: LPUART enabled"
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "LPUART_CR1_ALTERNATE,LPUART control register 1"
|
|
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
|
|
bitfld.long 0x0 28. "M1,Word length" "0: 1 Start bit,1: 1 Start bit"
|
|
newline
|
|
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver enable assertion time"
|
|
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver enable deassertion time"
|
|
newline
|
|
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated when the CMF bit.."
|
|
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in active mode permanently,1: Receiver can switch between Mute mode and active.."
|
|
newline
|
|
bitfld.long 0x0 12. "M0,Word length" "0,1"
|
|
bitfld.long 0x0 11. "WAKE,Receiver wakeup method" "0: Idle line,1: Address mark"
|
|
newline
|
|
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
|
|
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
|
|
newline
|
|
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever PE = 1.."
|
|
bitfld.long 0x0 7. "TXEIE,Transmit data register empty" "0: Interrupt is inhibited,1: A LPUART interrupt is generated whenever.."
|
|
newline
|
|
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever TC = 1.."
|
|
bitfld.long 0x0 5. "RXNEIE,Receive data register not empty" "0: Interrupt is inhibited,1: A LPUART interrupt is generated whenever ORE = 1.."
|
|
newline
|
|
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever IDLE =.."
|
|
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
|
|
newline
|
|
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
|
|
bitfld.long 0x0 1. "UESM,LPUART enable in Stop mode" "0: LPUART not able to wake up the MCU from..,1: LPUART able to wake up the MCU from low-power.."
|
|
newline
|
|
bitfld.long 0x0 0. "UE,LPUART enable" "0: LPUART prescaler and outputs disabled low-power..,1: LPUART enabled"
|
|
line.long 0x4 "LPUART_CR2,LPUART control register 2"
|
|
hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the LPUART node"
|
|
bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "0: data is transmitted/received with data bit 0..,1: data is transmitted/received with the MSB (bit.."
|
|
newline
|
|
bitfld.long 0x4 18. "DATAINV,Binary data inversion" "0: Logical data from the data register are..,1: Logical data from the data register are.."
|
|
bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "0: TX pin signal works using the standard logic..,1: TX pin signal values are inverted.."
|
|
newline
|
|
bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "0: RX pin signal works using the standard logic..,1: RX pin signal values are inverted.."
|
|
bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "0: TX/RX pins are used as defined in standard pinout,1: The TX and RX pins functions are swapped. This.."
|
|
newline
|
|
sif (cpuis("STM32L4P5*")||cpuis("STM32L4Q5*"))
|
|
bitfld.long 0x4 12.--13. "STOP,STOP bits" "0: 1 stop bit,?,2: 2 stop bits,?"
|
|
endif
|
|
sif (cpuis("STM32L4R5*"))
|
|
bitfld.long 0x4 12.--13. "STOP,STOP bits" "0: 1 stop bit,?,?,?"
|
|
newline
|
|
endif
|
|
bitfld.long 0x4 4. "ADDM7,7-bit address detection/4-bit address detection" "0: 4-bit address detection,1: 7-bit address detection (in 8-bit data mode)"
|
|
line.long 0x8 "LPUART_CR3,LPUART control register 3"
|
|
bitfld.long 0x8 29.--31. "TXFTCFG,TXFIFO threshold configuration" "0: TXFIFO reaches 1/8 of its depth.,1: TXFIFO reaches 1/4 of its depth.,?,3: TXFIFO reaches 3/4 of its depth.,4: TXFIFO reaches 7/8 of its depth.,5: TXFIFO becomes empty.,6: TXFIFO reaches 1/2 of its depth.,?"
|
|
bitfld.long 0x8 28. "RXFTIE,RXFIFO threshold interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated when Receive.."
|
|
newline
|
|
bitfld.long 0x8 25.--27. "RXFTCFG,Receive FIFO threshold configuration" "0: Receive FIFO reaches 1/8 of its depth.,1: Receive FIFO reaches 1/4 of its depth.,?,3: Receive FIFO reaches 3/4 of its depth.,4: Receive FIFO reaches 7/8 of its depth.,5: Receive FIFO becomes full.,6: Receive FIFO reaches 1/2 of its depth.,?"
|
|
bitfld.long 0x8 23. "TXFTIE,TXFIFO threshold interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated when TXFIFO.."
|
|
newline
|
|
bitfld.long 0x8 22. "WUFIE,Wakeup from low-power mode interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever WUF =.."
|
|
bitfld.long 0x8 20.--21. "WUS,Wakeup from low-power mode interrupt flag selection" "0: WUF active on address match (as defined by..,?,2: WUF active on Start bit detection,3: WUF active on RXNE."
|
|
newline
|
|
bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "0: DE signal is active high.,1: DE signal is active low."
|
|
bitfld.long 0x8 14. "DEM,Driver enable mode" "0: DE function is disabled.,1: DE function is enabled. The DE signal is output.."
|
|
newline
|
|
bitfld.long 0x8 13. "DDRE,DMA disable on reception error" "0: DMA is not disabled in case of reception error.,1: DMA is disabled following a reception error. The.."
|
|
bitfld.long 0x8 12. "OVRDIS,Overrun disable" "0: Overrun Error Flag ORE is set when received data..,1: Overrun functionality is disabled. If new data.."
|
|
newline
|
|
bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever CTSIF = 1 in.."
|
|
bitfld.long 0x8 9. "CTSE,CTS enable" "0: CTS hardware flow control disabled,1: CTS mode enabled data is only transmitted when.."
|
|
newline
|
|
bitfld.long 0x8 8. "RTSE,RTS enable" "0: RTS hardware flow control disabled,1: RTS output enabled data is only requested when.."
|
|
bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "0: DMA mode is disabled for transmission,1: DMA mode is enabled for transmission"
|
|
newline
|
|
bitfld.long 0x8 6. "DMAR,DMA enable receiver" "0: DMA mode is disabled for reception,1: DMA mode is enabled for reception"
|
|
bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "0: Half duplex mode is not selected,1: Half duplex mode is selected"
|
|
newline
|
|
bitfld.long 0x8 0. "EIE,Error interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated when FE = 1 or ORE = 1.."
|
|
line.long 0xC "LPUART_BRR,LPUART baud rate register"
|
|
hexmask.long.tbyte 0xC 0.--19. 1. "BRR,LPUART baud rate"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x0 "LPUART_RQR,LPUART request register"
|
|
bitfld.long 0x0 4. "TXFRQ,Transmit data flush request" "0,1"
|
|
bitfld.long 0x0 3. "RXFRQ,Receive data flush request" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1"
|
|
bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "LPUART_ISR,LPUART interrupt and status register"
|
|
bitfld.long 0x0 27. "TXFT,TXFIFO threshold flag" "0: TXFIFO does not reach the programmed threshold.,1: TXFIFO reached the programmed threshold."
|
|
bitfld.long 0x0 26. "RXFT,RXFIFO threshold flag" "0: Receive FIFO does not reach the programmed..,1: Receive FIFO reached the programmed threshold."
|
|
newline
|
|
bitfld.long 0x0 24. "RXFF,RXFIFO full" "0: RXFIFO is not full,1: RXFIFO is full"
|
|
bitfld.long 0x0 23. "TXFE,TXFIFO empty" "0: TXFIFO is not empty,1: TXFIFO is empty"
|
|
newline
|
|
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1"
|
|
bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20. "WUF,Wakeup from low-power mode flag" "0,1"
|
|
bitfld.long 0x0 19. "RWU,Receiver wakeup from Mute mode" "0: Receiver in Active mode,1: Receiver in Mute mode"
|
|
newline
|
|
bitfld.long 0x0 18. "SBKF,Send break flag" "0: Break character transmitted,1: Break character requested by setting SBKRQ bit.."
|
|
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character Match detected"
|
|
newline
|
|
bitfld.long 0x0 16. "BUSY,Busy flag" "0: LPUART is idle (no reception),1: Reception on going"
|
|
bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
|
|
newline
|
|
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
|
|
bitfld.long 0x0 7. "TXFNF,TXFIFO not full" "0: Data register is full/Transmit FIFO is full.,1: Data register/Transmit FIFO is not full."
|
|
newline
|
|
bitfld.long 0x0 6. "TC,Transmission complete" "0: Transmission is not complete,1: Transmission is complete"
|
|
bitfld.long 0x0 5. "RXFNE,RXFIFO not empty" "0: Data is not received,1: Received data is ready to be read."
|
|
newline
|
|
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
|
|
bitfld.long 0x0 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected"
|
|
newline
|
|
bitfld.long 0x0 2. "NE,Start bit noise detection flag" "0: No noise is detected,1: Noise is detected"
|
|
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
|
|
newline
|
|
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "LPUART_ISR_ALTERNATE,LPUART interrupt and status register"
|
|
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1"
|
|
bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20. "WUF,Wakeup from low-power mode flag" "0,1"
|
|
bitfld.long 0x0 19. "RWU,Receiver wakeup from Mute mode" "0: Receiver in active mode,1: Receiver in Mute mode"
|
|
newline
|
|
bitfld.long 0x0 18. "SBKF,Send break flag" "0: Break character transmitted,1: Break character requested by setting SBKRQ bit.."
|
|
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character Match detected"
|
|
newline
|
|
bitfld.long 0x0 16. "BUSY,Busy flag" "0: LPUART is idle (no reception),1: Reception on going"
|
|
bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
|
|
newline
|
|
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
|
|
bitfld.long 0x0 7. "TXE,Transmit data register empty/TXFIFO not full" "0: Data register full,1: Data register not full"
|
|
newline
|
|
bitfld.long 0x0 6. "TC,Transmission complete" "0: Transmission is not complete,1: Transmission is complete"
|
|
bitfld.long 0x0 5. "RXNE,Read data register not empty" "0: Data is not received,1: Received data is ready to be read."
|
|
newline
|
|
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
|
|
bitfld.long 0x0 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected"
|
|
newline
|
|
bitfld.long 0x0 2. "NE,Start bit noise detection flag" "0: No noise is detected,1: Noise is detected"
|
|
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
|
|
newline
|
|
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x0 "LPUART_ICR,LPUART interrupt flag clear register"
|
|
bitfld.long 0x0 20. "WUCF,Wakeup from low-power mode clear flag" "?,?"
|
|
bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "CTSCF,CTS clear flag" "0,1"
|
|
bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1"
|
|
bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1"
|
|
bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1"
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x0 "LPUART_RDR,LPUART receive data register"
|
|
hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value"
|
|
group.long 0x28++0x7
|
|
line.long 0x0 "LPUART_TDR,LPUART transmit data register"
|
|
hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value"
|
|
line.long 0x4 "LPUART_PRESC,LPUART prescaler register"
|
|
hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler"
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
tree "USB_OTG_FS (Universal Serial Bus On-The-Go Full-Speed)"
|
|
base ad:0x0
|
|
tree "OTG_FS_DEVICE"
|
|
base ad:0x50000800
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "FS_DCFG,OTG_FS device configuration register"
|
|
bitfld.long 0x0 11.--12. "PFIVL,Periodic frame interval" "0,1,2,3"
|
|
hexmask.long.byte 0x0 4.--10. 1. "DAD,Device address"
|
|
bitfld.long 0x0 2. "NZLSOHSK,Non-zero-length status OUT" "0,1"
|
|
bitfld.long 0x0 0.--1. "DSPD,Device speed" "0,1,2,3"
|
|
line.long 0x4 "FS_DCTL,OTG_FS device control register"
|
|
bitfld.long 0x4 11. "POPRGDNE,Power-on programming done" "0,1"
|
|
bitfld.long 0x4 10. "CGONAK,Clear global OUT NAK" "0,1"
|
|
bitfld.long 0x4 9. "SGONAK,Set global OUT NAK" "0,1"
|
|
bitfld.long 0x4 8. "CGINAK,Clear global IN NAK" "0,1"
|
|
bitfld.long 0x4 7. "SGINAK,Set global IN NAK" "0,1"
|
|
bitfld.long 0x4 4.--6. "TCTL,Test control" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
rbitfld.long 0x4 3. "GONSTS,Global OUT NAK status" "0,1"
|
|
rbitfld.long 0x4 2. "GINSTS,Global IN NAK status" "0,1"
|
|
bitfld.long 0x4 1. "SDIS,Soft disconnect" "0,1"
|
|
bitfld.long 0x4 0. "RWUSIG,Remote wakeup signaling" "0,1"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "FS_DSTS,OTG_FS device status register"
|
|
hexmask.long.word 0x0 8.--21. 1. "FNSOF,Frame number of the received"
|
|
bitfld.long 0x0 3. "EERR,Erratic error" "0,1"
|
|
bitfld.long 0x0 1.--2. "ENUMSPD,Enumerated speed" "0,1,2,3"
|
|
bitfld.long 0x0 0. "SUSPSTS,Suspend status" "0,1"
|
|
group.long 0x10++0x7
|
|
line.long 0x0 "FS_DIEPMSK,OTG_FS device IN endpoint common interrupt"
|
|
bitfld.long 0x0 6. "INEPNEM,IN endpoint NAK effective" "0,1"
|
|
bitfld.long 0x0 5. "INEPNMM,IN token received with EP mismatch" "0,1"
|
|
bitfld.long 0x0 4. "ITTXFEMSK,IN token received when TxFIFO empty" "0,1"
|
|
bitfld.long 0x0 3. "TOM,Timeout condition mask (Non-isochronous" "0,1"
|
|
bitfld.long 0x0 1. "EPDM,Endpoint disabled interrupt" "0,1"
|
|
bitfld.long 0x0 0. "XFRCM,Transfer completed interrupt" "0,1"
|
|
line.long 0x4 "FS_DOEPMSK,OTG_FS device OUT endpoint common interrupt"
|
|
bitfld.long 0x4 4. "OTEPDM,OUT token received when endpoint" "0,1"
|
|
bitfld.long 0x4 3. "STUPM,SETUP phase done mask" "0,1"
|
|
bitfld.long 0x4 1. "EPDM,Endpoint disabled interrupt" "0,1"
|
|
bitfld.long 0x4 0. "XFRCM,Transfer completed interrupt" "0,1"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x0 "FS_DAINT,OTG_FS device all endpoints interrupt"
|
|
hexmask.long.word 0x0 16.--31. 1. "OEPINT,OUT endpoint interrupt"
|
|
hexmask.long.word 0x0 0.--15. 1. "IEPINT,IN endpoint interrupt bits"
|
|
group.long 0x1C++0x3
|
|
line.long 0x0 "FS_DAINTMSK,OTG_FS all endpoints interrupt mask register"
|
|
hexmask.long.word 0x0 16.--31. 1. "OEPINT,OUT endpoint interrupt"
|
|
hexmask.long.word 0x0 0.--15. 1. "IEPM,IN EP interrupt mask bits"
|
|
group.long 0x28++0x7
|
|
line.long 0x0 "DVBUSDIS,OTG_FS device VBUS discharge time"
|
|
hexmask.long.word 0x0 0.--15. 1. "VBUSDT,Device VBUS discharge time"
|
|
line.long 0x4 "DVBUSPULSE,OTG_FS device VBUS pulsing time"
|
|
hexmask.long.word 0x4 0.--11. 1. "DVBUSP,Device VBUS pulsing time"
|
|
group.long 0x34++0x3
|
|
line.long 0x0 "DIEPEMPMSK,OTG_FS device IN endpoint FIFO empty"
|
|
hexmask.long.word 0x0 0.--15. 1. "INEPTXFEM,IN EP Tx FIFO empty interrupt mask"
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "FS_DIEPCTL0,OTG_FS device control IN endpoint 0 control"
|
|
rbitfld.long 0x0 31. "EPENA,Endpoint enable" "0,1"
|
|
rbitfld.long 0x0 30. "EPDIS,Endpoint disable" "0,1"
|
|
bitfld.long 0x0 27. "SNAK,Set NAK" "0,1"
|
|
bitfld.long 0x0 26. "CNAK,Clear NAK" "0,1"
|
|
hexmask.long.byte 0x0 22.--25. 1. "TXFNUM,TxFIFO number"
|
|
bitfld.long 0x0 21. "STALL,STALL handshake" "0,1"
|
|
newline
|
|
rbitfld.long 0x0 18.--19. "EPTYP,Endpoint type" "0,1,2,3"
|
|
rbitfld.long 0x0 17. "NAKSTS,NAK status" "0,1"
|
|
rbitfld.long 0x0 15. "USBAEP,USB active endpoint" "0,1"
|
|
bitfld.long 0x0 0.--1. "MPSIZ,Maximum packet size" "0,1,2,3"
|
|
group.long 0x120++0x3
|
|
line.long 0x0 "DIEPCTL1,OTG device endpoint-1 control"
|
|
bitfld.long 0x0 31. "EPENA,EPENA" "0,1"
|
|
bitfld.long 0x0 30. "EPDIS,EPDIS" "0,1"
|
|
bitfld.long 0x0 29. "SODDFRM_SD1PID,SODDFRM/SD1PID" "0,1"
|
|
bitfld.long 0x0 28. "SD0PID_SEVNFRM,SD0PID/SEVNFRM" "0,1"
|
|
bitfld.long 0x0 27. "SNAK,SNAK" "0,1"
|
|
bitfld.long 0x0 26. "CNAK,CNAK" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 22.--25. 1. "TXFNUM,TXFNUM"
|
|
bitfld.long 0x0 21. "Stall,Stall" "0,1"
|
|
bitfld.long 0x0 18.--19. "EPTYP,EPTYP" "0,1,2,3"
|
|
rbitfld.long 0x0 17. "NAKSTS,NAKSTS" "0,1"
|
|
rbitfld.long 0x0 16. "EONUM_DPID,EONUM/DPID" "0,1"
|
|
bitfld.long 0x0 15. "USBAEP,USBAEP" "0,1"
|
|
newline
|
|
hexmask.long.word 0x0 0.--10. 1. "MPSIZ,MPSIZ"
|
|
group.long 0x140++0x3
|
|
line.long 0x0 "DIEPCTL2,OTG device endpoint-2 control"
|
|
bitfld.long 0x0 31. "EPENA,EPENA" "0,1"
|
|
bitfld.long 0x0 30. "EPDIS,EPDIS" "0,1"
|
|
bitfld.long 0x0 29. "SODDFRM,SODDFRM" "0,1"
|
|
bitfld.long 0x0 28. "SD0PID_SEVNFRM,SD0PID/SEVNFRM" "0,1"
|
|
bitfld.long 0x0 27. "SNAK,SNAK" "0,1"
|
|
bitfld.long 0x0 26. "CNAK,CNAK" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 22.--25. 1. "TXFNUM,TXFNUM"
|
|
bitfld.long 0x0 21. "Stall,Stall" "0,1"
|
|
bitfld.long 0x0 18.--19. "EPTYP,EPTYP" "0,1,2,3"
|
|
rbitfld.long 0x0 17. "NAKSTS,NAKSTS" "0,1"
|
|
rbitfld.long 0x0 16. "EONUM_DPID,EONUM/DPID" "0,1"
|
|
bitfld.long 0x0 15. "USBAEP,USBAEP" "0,1"
|
|
newline
|
|
hexmask.long.word 0x0 0.--10. 1. "MPSIZ,MPSIZ"
|
|
group.long 0x160++0x3
|
|
line.long 0x0 "DIEPCTL3,OTG device endpoint-3 control"
|
|
bitfld.long 0x0 31. "EPENA,EPENA" "0,1"
|
|
bitfld.long 0x0 30. "EPDIS,EPDIS" "0,1"
|
|
bitfld.long 0x0 29. "SODDFRM,SODDFRM" "0,1"
|
|
bitfld.long 0x0 28. "SD0PID_SEVNFRM,SD0PID/SEVNFRM" "0,1"
|
|
bitfld.long 0x0 27. "SNAK,SNAK" "0,1"
|
|
bitfld.long 0x0 26. "CNAK,CNAK" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 22.--25. 1. "TXFNUM,TXFNUM"
|
|
bitfld.long 0x0 21. "Stall,Stall" "0,1"
|
|
bitfld.long 0x0 18.--19. "EPTYP,EPTYP" "0,1,2,3"
|
|
rbitfld.long 0x0 17. "NAKSTS,NAKSTS" "0,1"
|
|
rbitfld.long 0x0 16. "EONUM_DPID,EONUM/DPID" "0,1"
|
|
bitfld.long 0x0 15. "USBAEP,USBAEP" "0,1"
|
|
newline
|
|
hexmask.long.word 0x0 0.--10. 1. "MPSIZ,MPSIZ"
|
|
group.long 0x300++0x3
|
|
line.long 0x0 "DOEPCTL0,device endpoint-0 control"
|
|
bitfld.long 0x0 31. "EPENA,EPENA" "0,1"
|
|
rbitfld.long 0x0 30. "EPDIS,EPDIS" "0,1"
|
|
bitfld.long 0x0 27. "SNAK,SNAK" "0,1"
|
|
bitfld.long 0x0 26. "CNAK,CNAK" "0,1"
|
|
bitfld.long 0x0 21. "Stall,Stall" "0,1"
|
|
bitfld.long 0x0 20. "SNPM,SNPM" "0,1"
|
|
newline
|
|
rbitfld.long 0x0 18.--19. "EPTYP,EPTYP" "0,1,2,3"
|
|
rbitfld.long 0x0 17. "NAKSTS,NAKSTS" "0,1"
|
|
rbitfld.long 0x0 15. "USBAEP,USBAEP" "0,1"
|
|
rbitfld.long 0x0 0.--1. "MPSIZ,MPSIZ" "0,1,2,3"
|
|
group.long 0x320++0x3
|
|
line.long 0x0 "DOEPCTL1,device endpoint-1 control"
|
|
bitfld.long 0x0 31. "EPENA,EPENA" "0,1"
|
|
bitfld.long 0x0 30. "EPDIS,EPDIS" "0,1"
|
|
bitfld.long 0x0 29. "SODDFRM,SODDFRM" "0,1"
|
|
bitfld.long 0x0 28. "SD0PID_SEVNFRM,SD0PID/SEVNFRM" "0,1"
|
|
bitfld.long 0x0 27. "SNAK,SNAK" "0,1"
|
|
bitfld.long 0x0 26. "CNAK,CNAK" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "Stall,Stall" "0,1"
|
|
bitfld.long 0x0 20. "SNPM,SNPM" "0,1"
|
|
bitfld.long 0x0 18.--19. "EPTYP,EPTYP" "0,1,2,3"
|
|
rbitfld.long 0x0 17. "NAKSTS,NAKSTS" "0,1"
|
|
rbitfld.long 0x0 16. "EONUM_DPID,EONUM/DPID" "0,1"
|
|
bitfld.long 0x0 15. "USBAEP,USBAEP" "0,1"
|
|
newline
|
|
hexmask.long.word 0x0 0.--10. 1. "MPSIZ,MPSIZ"
|
|
group.long 0x340++0x3
|
|
line.long 0x0 "DOEPCTL2,device endpoint-2 control"
|
|
bitfld.long 0x0 31. "EPENA,EPENA" "0,1"
|
|
bitfld.long 0x0 30. "EPDIS,EPDIS" "0,1"
|
|
bitfld.long 0x0 29. "SODDFRM,SODDFRM" "0,1"
|
|
bitfld.long 0x0 28. "SD0PID_SEVNFRM,SD0PID/SEVNFRM" "0,1"
|
|
bitfld.long 0x0 27. "SNAK,SNAK" "0,1"
|
|
bitfld.long 0x0 26. "CNAK,CNAK" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "Stall,Stall" "0,1"
|
|
bitfld.long 0x0 20. "SNPM,SNPM" "0,1"
|
|
bitfld.long 0x0 18.--19. "EPTYP,EPTYP" "0,1,2,3"
|
|
rbitfld.long 0x0 17. "NAKSTS,NAKSTS" "0,1"
|
|
rbitfld.long 0x0 16. "EONUM_DPID,EONUM/DPID" "0,1"
|
|
bitfld.long 0x0 15. "USBAEP,USBAEP" "0,1"
|
|
newline
|
|
hexmask.long.word 0x0 0.--10. 1. "MPSIZ,MPSIZ"
|
|
group.long 0x360++0x3
|
|
line.long 0x0 "DOEPCTL3,device endpoint-3 control"
|
|
bitfld.long 0x0 31. "EPENA,EPENA" "0,1"
|
|
bitfld.long 0x0 30. "EPDIS,EPDIS" "0,1"
|
|
bitfld.long 0x0 29. "SODDFRM,SODDFRM" "0,1"
|
|
bitfld.long 0x0 28. "SD0PID_SEVNFRM,SD0PID/SEVNFRM" "0,1"
|
|
bitfld.long 0x0 27. "SNAK,SNAK" "0,1"
|
|
bitfld.long 0x0 26. "CNAK,CNAK" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "Stall,Stall" "0,1"
|
|
bitfld.long 0x0 20. "SNPM,SNPM" "0,1"
|
|
bitfld.long 0x0 18.--19. "EPTYP,EPTYP" "0,1,2,3"
|
|
rbitfld.long 0x0 17. "NAKSTS,NAKSTS" "0,1"
|
|
rbitfld.long 0x0 16. "EONUM_DPID,EONUM/DPID" "0,1"
|
|
bitfld.long 0x0 15. "USBAEP,USBAEP" "0,1"
|
|
newline
|
|
hexmask.long.word 0x0 0.--10. 1. "MPSIZ,MPSIZ"
|
|
group.long 0x108++0x3
|
|
line.long 0x0 "DIEPINT0,device endpoint-x interrupt"
|
|
rbitfld.long 0x0 7. "TXFE,TXFE" "0,1"
|
|
bitfld.long 0x0 6. "INEPNE,INEPNE" "0,1"
|
|
bitfld.long 0x0 4. "ITTXFE,ITTXFE" "0,1"
|
|
bitfld.long 0x0 3. "TOC,TOC" "0,1"
|
|
bitfld.long 0x0 1. "EPDISD,EPDISD" "0,1"
|
|
bitfld.long 0x0 0. "XFRC,XFRC" "0,1"
|
|
group.long 0x128++0x3
|
|
line.long 0x0 "DIEPINT1,device endpoint-1 interrupt"
|
|
rbitfld.long 0x0 7. "TXFE,TXFE" "0,1"
|
|
bitfld.long 0x0 6. "INEPNE,INEPNE" "0,1"
|
|
bitfld.long 0x0 4. "ITTXFE,ITTXFE" "0,1"
|
|
bitfld.long 0x0 3. "TOC,TOC" "0,1"
|
|
bitfld.long 0x0 1. "EPDISD,EPDISD" "0,1"
|
|
bitfld.long 0x0 0. "XFRC,XFRC" "0,1"
|
|
group.long 0x148++0x3
|
|
line.long 0x0 "DIEPINT2,device endpoint-2 interrupt"
|
|
rbitfld.long 0x0 7. "TXFE,TXFE" "0,1"
|
|
bitfld.long 0x0 6. "INEPNE,INEPNE" "0,1"
|
|
bitfld.long 0x0 4. "ITTXFE,ITTXFE" "0,1"
|
|
bitfld.long 0x0 3. "TOC,TOC" "0,1"
|
|
bitfld.long 0x0 1. "EPDISD,EPDISD" "0,1"
|
|
bitfld.long 0x0 0. "XFRC,XFRC" "0,1"
|
|
group.long 0x168++0x3
|
|
line.long 0x0 "DIEPINT3,device endpoint-3 interrupt"
|
|
rbitfld.long 0x0 7. "TXFE,TXFE" "0,1"
|
|
bitfld.long 0x0 6. "INEPNE,INEPNE" "0,1"
|
|
bitfld.long 0x0 4. "ITTXFE,ITTXFE" "0,1"
|
|
bitfld.long 0x0 3. "TOC,TOC" "0,1"
|
|
bitfld.long 0x0 1. "EPDISD,EPDISD" "0,1"
|
|
bitfld.long 0x0 0. "XFRC,XFRC" "0,1"
|
|
group.long 0x308++0x3
|
|
line.long 0x0 "DOEPINT0,device endpoint-0 interrupt"
|
|
bitfld.long 0x0 6. "B2BSTUP,B2BSTUP" "0,1"
|
|
bitfld.long 0x0 4. "OTEPDIS,OTEPDIS" "0,1"
|
|
bitfld.long 0x0 3. "STUP,STUP" "0,1"
|
|
bitfld.long 0x0 1. "EPDISD,EPDISD" "0,1"
|
|
bitfld.long 0x0 0. "XFRC,XFRC" "0,1"
|
|
group.long 0x328++0x3
|
|
line.long 0x0 "DOEPINT1,device endpoint-1 interrupt"
|
|
bitfld.long 0x0 6. "B2BSTUP,B2BSTUP" "0,1"
|
|
bitfld.long 0x0 4. "OTEPDIS,OTEPDIS" "0,1"
|
|
bitfld.long 0x0 3. "STUP,STUP" "0,1"
|
|
bitfld.long 0x0 1. "EPDISD,EPDISD" "0,1"
|
|
bitfld.long 0x0 0. "XFRC,XFRC" "0,1"
|
|
group.long 0x348++0x3
|
|
line.long 0x0 "DOEPINT2,device endpoint-2 interrupt"
|
|
bitfld.long 0x0 6. "B2BSTUP,B2BSTUP" "0,1"
|
|
bitfld.long 0x0 4. "OTEPDIS,OTEPDIS" "0,1"
|
|
bitfld.long 0x0 3. "STUP,STUP" "0,1"
|
|
bitfld.long 0x0 1. "EPDISD,EPDISD" "0,1"
|
|
bitfld.long 0x0 0. "XFRC,XFRC" "0,1"
|
|
group.long 0x368++0x3
|
|
line.long 0x0 "DOEPINT3,device endpoint-3 interrupt"
|
|
bitfld.long 0x0 6. "B2BSTUP,B2BSTUP" "0,1"
|
|
bitfld.long 0x0 4. "OTEPDIS,OTEPDIS" "0,1"
|
|
bitfld.long 0x0 3. "STUP,STUP" "0,1"
|
|
bitfld.long 0x0 1. "EPDISD,EPDISD" "0,1"
|
|
bitfld.long 0x0 0. "XFRC,XFRC" "0,1"
|
|
group.long 0x110++0x3
|
|
line.long 0x0 "DIEPTSIZ0,device endpoint-0 transfer size"
|
|
bitfld.long 0x0 19.--20. "PKTCNT,Packet count" "0,1,2,3"
|
|
hexmask.long.byte 0x0 0.--6. 1. "XFRSIZ,Transfer size"
|
|
group.long 0x310++0x3
|
|
line.long 0x0 "DOEPTSIZ0,device OUT endpoint-0 transfer size"
|
|
bitfld.long 0x0 29.--30. "STUPCNT,SETUP packet count" "0,1,2,3"
|
|
bitfld.long 0x0 19. "PKTCNT,Packet count" "0,1"
|
|
hexmask.long.byte 0x0 0.--6. 1. "XFRSIZ,Transfer size"
|
|
group.long 0x130++0x3
|
|
line.long 0x0 "DIEPTSIZ1,device endpoint-1 transfer size"
|
|
bitfld.long 0x0 29.--30. "MCNT,Multi count" "0,1,2,3"
|
|
hexmask.long.word 0x0 19.--28. 1. "PKTCNT,Packet count"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "XFRSIZ,Transfer size"
|
|
group.long 0x150++0x3
|
|
line.long 0x0 "DIEPTSIZ2,device endpoint-2 transfer size"
|
|
bitfld.long 0x0 29.--30. "MCNT,Multi count" "0,1,2,3"
|
|
hexmask.long.word 0x0 19.--28. 1. "PKTCNT,Packet count"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "XFRSIZ,Transfer size"
|
|
group.long 0x170++0x3
|
|
line.long 0x0 "DIEPTSIZ3,device endpoint-3 transfer size"
|
|
bitfld.long 0x0 29.--30. "MCNT,Multi count" "0,1,2,3"
|
|
hexmask.long.word 0x0 19.--28. 1. "PKTCNT,Packet count"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "XFRSIZ,Transfer size"
|
|
rgroup.long 0x118++0x3
|
|
line.long 0x0 "DTXFSTS0,OTG_FS device IN endpoint transmit FIFO"
|
|
hexmask.long.word 0x0 0.--15. 1. "INEPTFSAV,IN endpoint TxFIFO space"
|
|
rgroup.long 0x138++0x3
|
|
line.long 0x0 "DTXFSTS1,OTG_FS device IN endpoint transmit FIFO"
|
|
hexmask.long.word 0x0 0.--15. 1. "INEPTFSAV,IN endpoint TxFIFO space"
|
|
rgroup.long 0x158++0x3
|
|
line.long 0x0 "DTXFSTS2,OTG_FS device IN endpoint transmit FIFO"
|
|
hexmask.long.word 0x0 0.--15. 1. "INEPTFSAV,IN endpoint TxFIFO space"
|
|
rgroup.long 0x178++0x3
|
|
line.long 0x0 "DTXFSTS3,OTG_FS device IN endpoint transmit FIFO"
|
|
hexmask.long.word 0x0 0.--15. 1. "INEPTFSAV,IN endpoint TxFIFO space"
|
|
group.long 0x330++0x3
|
|
line.long 0x0 "DOEPTSIZ1,device OUT endpoint-1 transfer size"
|
|
bitfld.long 0x0 29.--30. "RXDPID_STUPCNT,Received data PID/SETUP packet" "0,1,2,3"
|
|
hexmask.long.word 0x0 19.--28. 1. "PKTCNT,Packet count"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "XFRSIZ,Transfer size"
|
|
group.long 0x350++0x3
|
|
line.long 0x0 "DOEPTSIZ2,device OUT endpoint-2 transfer size"
|
|
bitfld.long 0x0 29.--30. "RXDPID_STUPCNT,Received data PID/SETUP packet" "0,1,2,3"
|
|
hexmask.long.word 0x0 19.--28. 1. "PKTCNT,Packet count"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "XFRSIZ,Transfer size"
|
|
group.long 0x370++0x3
|
|
line.long 0x0 "DOEPTSIZ3,device OUT endpoint-3 transfer size"
|
|
bitfld.long 0x0 29.--30. "RXDPID_STUPCNT,Received data PID/SETUP packet" "0,1,2,3"
|
|
hexmask.long.word 0x0 19.--28. 1. "PKTCNT,Packet count"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "XFRSIZ,Transfer size"
|
|
tree.end
|
|
tree "OTG_FS_GLOBAL"
|
|
base ad:0x50000000
|
|
group.long 0x0++0x1B
|
|
line.long 0x0 "FS_GOTGCTL,OTG_FS control and status register"
|
|
rbitfld.long 0x0 19. "BSVLD,B-session valid" "0,1"
|
|
rbitfld.long 0x0 18. "ASVLD,A-session valid" "0,1"
|
|
rbitfld.long 0x0 17. "DBCT,Long/short debounce time" "0,1"
|
|
rbitfld.long 0x0 16. "CIDSTS,Connector ID status" "0,1"
|
|
bitfld.long 0x0 11. "DHNPEN,Device HNP enabled" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "HSHNPEN,Host set HNP enable" "0,1"
|
|
bitfld.long 0x0 9. "HNPRQ,HNP request" "0,1"
|
|
rbitfld.long 0x0 8. "HNGSCS,Host negotiation success" "0,1"
|
|
bitfld.long 0x0 1. "SRQ,Session request" "0,1"
|
|
rbitfld.long 0x0 0. "SRQSCS,Session request success" "0,1"
|
|
line.long 0x4 "FS_GOTGINT,OTG_FS interrupt register"
|
|
bitfld.long 0x4 19. "DBCDNE,Debounce done" "0,1"
|
|
bitfld.long 0x4 18. "ADTOCHG,A-device timeout change" "0,1"
|
|
bitfld.long 0x4 17. "HNGDET,Host negotiation detected" "0,1"
|
|
bitfld.long 0x4 9. "HNSSCHG,Host negotiation success status" "0,1"
|
|
bitfld.long 0x4 8. "SRSSCHG,Session request success status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "SEDET,Session end detected" "0,1"
|
|
line.long 0x8 "FS_GAHBCFG,OTG_FS AHB configuration register"
|
|
bitfld.long 0x8 8. "PTXFELVL,Periodic TxFIFO empty" "0,1"
|
|
bitfld.long 0x8 7. "TXFELVL,TxFIFO empty level" "0,1"
|
|
bitfld.long 0x8 0. "GINT,Global interrupt mask" "0,1"
|
|
line.long 0xC "FS_GUSBCFG,OTG_FS USB configuration register"
|
|
bitfld.long 0xC 31. "CTXPKT,Corrupt Tx packet" "0,1"
|
|
bitfld.long 0xC 30. "FDMOD,Force device mode" "0,1"
|
|
bitfld.long 0xC 29. "FHMOD,Force host mode" "0,1"
|
|
hexmask.long.byte 0xC 10.--13. 1. "TRDT,USB turnaround time"
|
|
bitfld.long 0xC 9. "HNPCAP,HNP-capable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 8. "SRPCAP,SRP-capable" "0,1"
|
|
bitfld.long 0xC 6. "PHYSEL,Full Speed serial transceiver" "0,1"
|
|
bitfld.long 0xC 0.--2. "TOCAL,FS timeout calibration" "0,1,2,3,4,5,6,7"
|
|
line.long 0x10 "FS_GRSTCTL,OTG_FS reset register"
|
|
rbitfld.long 0x10 31. "AHBIDL,AHB master idle" "0,1"
|
|
hexmask.long.byte 0x10 6.--10. 1. "TXFNUM,TxFIFO number"
|
|
bitfld.long 0x10 5. "TXFFLSH,TxFIFO flush" "0,1"
|
|
bitfld.long 0x10 4. "RXFFLSH,RxFIFO flush" "0,1"
|
|
bitfld.long 0x10 2. "FCRST,Host frame counter reset" "0,1"
|
|
newline
|
|
bitfld.long 0x10 1. "HSRST,HCLK soft reset" "0,1"
|
|
bitfld.long 0x10 0. "CSRST,Core soft reset" "0,1"
|
|
line.long 0x14 "FS_GINTSTS,OTG_FS core interrupt register"
|
|
bitfld.long 0x14 31. "WKUPINT,Resume/remote wakeup detected" "0,1"
|
|
bitfld.long 0x14 30. "SRQINT,Session request/new session detected" "0,1"
|
|
bitfld.long 0x14 29. "DISCINT,Disconnect detected" "0,1"
|
|
bitfld.long 0x14 28. "CIDSCHG,Connector ID status change" "0,1"
|
|
rbitfld.long 0x14 26. "PTXFE,Periodic TxFIFO empty" "0,1"
|
|
newline
|
|
rbitfld.long 0x14 25. "HCINT,Host channels interrupt" "0,1"
|
|
rbitfld.long 0x14 24. "HPRTINT,Host port interrupt" "0,1"
|
|
bitfld.long 0x14 21. "IPXFR_INCOMPISOOUT,Incomplete periodic transfer(Host" "0,1"
|
|
bitfld.long 0x14 20. "IISOIXFR,Incomplete isochronous IN" "0,1"
|
|
rbitfld.long 0x14 19. "OEPINT,OUT endpoint interrupt" "0,1"
|
|
newline
|
|
rbitfld.long 0x14 18. "IEPINT,IN endpoint interrupt" "0,1"
|
|
bitfld.long 0x14 15. "EOPF,End of periodic frame" "0,1"
|
|
bitfld.long 0x14 14. "ISOODRP,Isochronous OUT packet dropped" "0,1"
|
|
bitfld.long 0x14 13. "ENUMDNE,Enumeration done" "0,1"
|
|
bitfld.long 0x14 12. "USBRST,USB reset" "0,1"
|
|
newline
|
|
bitfld.long 0x14 11. "USBSUSP,USB suspend" "0,1"
|
|
bitfld.long 0x14 10. "ESUSP,Early suspend" "0,1"
|
|
rbitfld.long 0x14 7. "GOUTNAKEFF,Global OUT NAK effective" "0,1"
|
|
rbitfld.long 0x14 6. "GINAKEFF,Global IN non-periodic NAK" "0,1"
|
|
rbitfld.long 0x14 5. "NPTXFE,Non-periodic TxFIFO empty" "0,1"
|
|
newline
|
|
rbitfld.long 0x14 4. "RXFLVL,RxFIFO non-empty" "0,1"
|
|
bitfld.long 0x14 3. "SOF,Start of frame" "0,1"
|
|
rbitfld.long 0x14 2. "OTGINT,OTG interrupt" "0,1"
|
|
bitfld.long 0x14 1. "MMIS,Mode mismatch interrupt" "0,1"
|
|
rbitfld.long 0x14 0. "CMOD,Current mode of operation" "0,1"
|
|
line.long 0x18 "FS_GINTMSK,OTG_FS interrupt mask register"
|
|
bitfld.long 0x18 31. "WUIM,Resume/remote wakeup detected interrupt" "0,1"
|
|
bitfld.long 0x18 30. "SRQIM,Session request/new session detected" "0,1"
|
|
bitfld.long 0x18 29. "DISCINT,Disconnect detected interrupt" "0,1"
|
|
bitfld.long 0x18 28. "CIDSCHGM,Connector ID status change" "0,1"
|
|
bitfld.long 0x18 26. "PTXFEM,Periodic TxFIFO empty mask" "0,1"
|
|
newline
|
|
bitfld.long 0x18 25. "HCIM,Host channels interrupt" "0,1"
|
|
rbitfld.long 0x18 24. "PRTIM,Host port interrupt mask" "0,1"
|
|
bitfld.long 0x18 21. "IPXFRM_IISOOXFRM,Incomplete periodic transfer mask(Host" "0,1"
|
|
bitfld.long 0x18 20. "IISOIXFRM,Incomplete isochronous IN transfer" "0,1"
|
|
bitfld.long 0x18 19. "OEPINT,OUT endpoints interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x18 18. "IEPINT,IN endpoints interrupt" "0,1"
|
|
bitfld.long 0x18 17. "EPMISM,Endpoint mismatch interrupt" "0,1"
|
|
bitfld.long 0x18 15. "EOPFM,End of periodic frame interrupt" "0,1"
|
|
bitfld.long 0x18 14. "ISOODRPM,Isochronous OUT packet dropped interrupt" "0,1"
|
|
bitfld.long 0x18 13. "ENUMDNEM,Enumeration done mask" "0,1"
|
|
newline
|
|
bitfld.long 0x18 12. "USBRST,USB reset mask" "0,1"
|
|
bitfld.long 0x18 11. "USBSUSPM,USB suspend mask" "0,1"
|
|
bitfld.long 0x18 10. "ESUSPM,Early suspend mask" "0,1"
|
|
bitfld.long 0x18 7. "GONAKEFFM,Global OUT NAK effective" "0,1"
|
|
bitfld.long 0x18 6. "GINAKEFFM,Global non-periodic IN NAK effective" "0,1"
|
|
newline
|
|
bitfld.long 0x18 5. "NPTXFEM,Non-periodic TxFIFO empty" "0,1"
|
|
bitfld.long 0x18 4. "RXFLVLM,Receive FIFO non-empty" "0,1"
|
|
bitfld.long 0x18 3. "SOFM,Start of frame mask" "0,1"
|
|
bitfld.long 0x18 2. "OTGINT,OTG interrupt mask" "0,1"
|
|
bitfld.long 0x18 1. "MMISM,Mode mismatch interrupt" "0,1"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "FS_GRXSTSR_Device,OTG_FS Receive status debug read(Device"
|
|
hexmask.long.byte 0x0 21.--24. 1. "FRMNUM,Frame number"
|
|
hexmask.long.byte 0x0 17.--20. 1. "PKTSTS,Packet status"
|
|
bitfld.long 0x0 15.--16. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x0 4.--14. 1. "BCNT,Byte count"
|
|
hexmask.long.byte 0x0 0.--3. 1. "EPNUM,Endpoint number"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "FS_GRXSTSR_Host,OTG_FS Receive status debug read(Host"
|
|
hexmask.long.byte 0x0 21.--24. 1. "FRMNUM,Frame number"
|
|
hexmask.long.byte 0x0 17.--20. 1. "PKTSTS,Packet status"
|
|
bitfld.long 0x0 15.--16. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x0 4.--14. 1. "BCNT,Byte count"
|
|
hexmask.long.byte 0x0 0.--3. 1. "EPNUM,Endpoint number"
|
|
group.long 0x24++0x7
|
|
line.long 0x0 "FS_GRXFSIZ,OTG_FS Receive FIFO size register"
|
|
hexmask.long.word 0x0 0.--15. 1. "RXFD,RxFIFO depth"
|
|
line.long 0x4 "FS_GNPTXFSIZ_Device,OTG_FS non-periodic transmit FIFO size"
|
|
hexmask.long.word 0x4 16.--31. 1. "TX0FD,Endpoint 0 TxFIFO depth"
|
|
hexmask.long.word 0x4 0.--15. 1. "TX0FSA,Endpoint 0 transmit RAM start"
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "FS_GNPTXFSIZ_Host,OTG_FS non-periodic transmit FIFO size"
|
|
hexmask.long.word 0x0 16.--31. 1. "NPTXFD,Non-periodic TxFIFO depth"
|
|
hexmask.long.word 0x0 0.--15. 1. "NPTXFSA,Non-periodic transmit RAM start"
|
|
rgroup.long 0x2C++0x3
|
|
line.long 0x0 "FS_GNPTXSTS,OTG_FS non-periodic transmit FIFO/queue"
|
|
hexmask.long.byte 0x0 24.--30. 1. "NPTXQTOP,Top of the non-periodic transmit request"
|
|
hexmask.long.byte 0x0 16.--23. 1. "NPTQXSAV,Non-periodic transmit request queue"
|
|
hexmask.long.word 0x0 0.--15. 1. "NPTXFSAV,Non-periodic TxFIFO space"
|
|
group.long 0x38++0x7
|
|
line.long 0x0 "FS_GCCFG,OTG_FS general core configuration register"
|
|
bitfld.long 0x0 20. "SOFOUTEN,SOF output enable" "0,1"
|
|
bitfld.long 0x0 19. "VBUSBSEN,Enable the VBUS sensing" "0,1"
|
|
bitfld.long 0x0 18. "VBUSASEN,Enable the VBUS sensing" "0,1"
|
|
bitfld.long 0x0 16. "PWRDWN,Power down" "0,1"
|
|
line.long 0x4 "FS_CID,core ID register"
|
|
hexmask.long 0x4 0.--31. 1. "PRODUCT_ID,Product ID field"
|
|
group.long 0x100++0xF
|
|
line.long 0x0 "FS_HPTXFSIZ,OTG_FS Host periodic transmit FIFO size"
|
|
hexmask.long.word 0x0 16.--31. 1. "PTXFSIZ,Host periodic TxFIFO depth"
|
|
hexmask.long.word 0x0 0.--15. 1. "PTXSA,Host periodic TxFIFO start"
|
|
line.long 0x4 "FS_DIEPTXF1,OTG_FS device IN endpoint transmit FIFO size"
|
|
hexmask.long.word 0x4 16.--31. 1. "INEPTXFD,IN endpoint TxFIFO depth"
|
|
hexmask.long.word 0x4 0.--15. 1. "INEPTXSA,IN endpoint FIFO2 transmit RAM start"
|
|
line.long 0x8 "FS_DIEPTXF2,OTG_FS device IN endpoint transmit FIFO size"
|
|
hexmask.long.word 0x8 16.--31. 1. "INEPTXFD,IN endpoint TxFIFO depth"
|
|
hexmask.long.word 0x8 0.--15. 1. "INEPTXSA,IN endpoint FIFO3 transmit RAM start"
|
|
line.long 0xC "FS_DIEPTXF3,OTG_FS device IN endpoint transmit FIFO size"
|
|
hexmask.long.word 0xC 16.--31. 1. "INEPTXFD,IN endpoint TxFIFO depth"
|
|
hexmask.long.word 0xC 0.--15. 1. "INEPTXSA,IN endpoint FIFO4 transmit RAM start"
|
|
tree.end
|
|
tree "OTG_FS_HOST"
|
|
base ad:0x50000400
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "FS_HCFG,OTG_FS host configuration register"
|
|
rbitfld.long 0x0 2. "FSLSS,FS- and LS-only support" "0,1"
|
|
bitfld.long 0x0 0.--1. "FSLSPCS,FS/LS PHY clock select" "0,1,2,3"
|
|
line.long 0x4 "HFIR,OTG_FS Host frame interval"
|
|
hexmask.long.word 0x4 0.--15. 1. "FRIVL,Frame interval"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "FS_HFNUM,OTG_FS host frame number/frame time"
|
|
hexmask.long.word 0x0 16.--31. 1. "FTREM,Frame time remaining"
|
|
hexmask.long.word 0x0 0.--15. 1. "FRNUM,Frame number"
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "FS_HPTXSTS,OTG_FS_Host periodic transmit FIFO/queue"
|
|
hexmask.long.byte 0x0 24.--31. 1. "PTXQTOP,Top of the periodic transmit request"
|
|
hexmask.long.byte 0x0 16.--23. 1. "PTXQSAV,Periodic transmit request queue space"
|
|
hexmask.long.word 0x0 0.--15. 1. "PTXFSAVL,Periodic transmit data FIFO space"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "HAINT,OTG_FS Host all channels interrupt"
|
|
hexmask.long.word 0x0 0.--15. 1. "HAINT,Channel interrupts"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "HAINTMSK,OTG_FS host all channels interrupt mask"
|
|
hexmask.long.word 0x0 0.--15. 1. "HAINTM,Channel interrupt mask"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "FS_HPRT,OTG_FS host port control and status register"
|
|
rbitfld.long 0x0 17.--18. "PSPD,Port speed" "0,1,2,3"
|
|
hexmask.long.byte 0x0 13.--16. 1. "PTCTL,Port test control"
|
|
bitfld.long 0x0 12. "PPWR,Port power" "0,1"
|
|
rbitfld.long 0x0 10.--11. "PLSTS,Port line status" "0,1,2,3"
|
|
bitfld.long 0x0 8. "PRST,Port reset" "0,1"
|
|
bitfld.long 0x0 7. "PSUSP,Port suspend" "0,1"
|
|
bitfld.long 0x0 6. "PRES,Port resume" "0,1"
|
|
bitfld.long 0x0 5. "POCCHNG,Port overcurrent change" "0,1"
|
|
rbitfld.long 0x0 4. "POCA,Port overcurrent active" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "PENCHNG,Port enable/disable change" "0,1"
|
|
bitfld.long 0x0 2. "PENA,Port enable" "0,1"
|
|
bitfld.long 0x0 1. "PCDET,Port connect detected" "0,1"
|
|
rbitfld.long 0x0 0. "PCSTS,Port connect status" "0,1"
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "FS_HCCHAR0,OTG_FS host channel-0 characteristics"
|
|
bitfld.long 0x0 31. "CHENA,Channel enable" "0,1"
|
|
bitfld.long 0x0 30. "CHDIS,Channel disable" "0,1"
|
|
bitfld.long 0x0 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x0 22.--28. 1. "DAD,Device address"
|
|
bitfld.long 0x0 20.--21. "MCNT,Multicount" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "EPTYP,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x0 17. "LSDEV,Low-speed device" "0,1"
|
|
bitfld.long 0x0 15. "EPDIR,Endpoint direction" "0,1"
|
|
hexmask.long.byte 0x0 11.--14. 1. "EPNUM,Endpoint number"
|
|
newline
|
|
hexmask.long.word 0x0 0.--10. 1. "MPSIZ,Maximum packet size"
|
|
group.long 0x120++0x3
|
|
line.long 0x0 "FS_HCCHAR1,OTG_FS host channel-1 characteristics"
|
|
bitfld.long 0x0 31. "CHENA,Channel enable" "0,1"
|
|
bitfld.long 0x0 30. "CHDIS,Channel disable" "0,1"
|
|
bitfld.long 0x0 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x0 22.--28. 1. "DAD,Device address"
|
|
bitfld.long 0x0 20.--21. "MCNT,Multicount" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "EPTYP,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x0 17. "LSDEV,Low-speed device" "0,1"
|
|
bitfld.long 0x0 15. "EPDIR,Endpoint direction" "0,1"
|
|
hexmask.long.byte 0x0 11.--14. 1. "EPNUM,Endpoint number"
|
|
newline
|
|
hexmask.long.word 0x0 0.--10. 1. "MPSIZ,Maximum packet size"
|
|
group.long 0x140++0x3
|
|
line.long 0x0 "FS_HCCHAR2,OTG_FS host channel-2 characteristics"
|
|
bitfld.long 0x0 31. "CHENA,Channel enable" "0,1"
|
|
bitfld.long 0x0 30. "CHDIS,Channel disable" "0,1"
|
|
bitfld.long 0x0 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x0 22.--28. 1. "DAD,Device address"
|
|
bitfld.long 0x0 20.--21. "MCNT,Multicount" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "EPTYP,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x0 17. "LSDEV,Low-speed device" "0,1"
|
|
bitfld.long 0x0 15. "EPDIR,Endpoint direction" "0,1"
|
|
hexmask.long.byte 0x0 11.--14. 1. "EPNUM,Endpoint number"
|
|
newline
|
|
hexmask.long.word 0x0 0.--10. 1. "MPSIZ,Maximum packet size"
|
|
group.long 0x160++0x3
|
|
line.long 0x0 "FS_HCCHAR3,OTG_FS host channel-3 characteristics"
|
|
bitfld.long 0x0 31. "CHENA,Channel enable" "0,1"
|
|
bitfld.long 0x0 30. "CHDIS,Channel disable" "0,1"
|
|
bitfld.long 0x0 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x0 22.--28. 1. "DAD,Device address"
|
|
bitfld.long 0x0 20.--21. "MCNT,Multicount" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "EPTYP,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x0 17. "LSDEV,Low-speed device" "0,1"
|
|
bitfld.long 0x0 15. "EPDIR,Endpoint direction" "0,1"
|
|
hexmask.long.byte 0x0 11.--14. 1. "EPNUM,Endpoint number"
|
|
newline
|
|
hexmask.long.word 0x0 0.--10. 1. "MPSIZ,Maximum packet size"
|
|
group.long 0x180++0x3
|
|
line.long 0x0 "FS_HCCHAR4,OTG_FS host channel-4 characteristics"
|
|
bitfld.long 0x0 31. "CHENA,Channel enable" "0,1"
|
|
bitfld.long 0x0 30. "CHDIS,Channel disable" "0,1"
|
|
bitfld.long 0x0 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x0 22.--28. 1. "DAD,Device address"
|
|
bitfld.long 0x0 20.--21. "MCNT,Multicount" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "EPTYP,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x0 17. "LSDEV,Low-speed device" "0,1"
|
|
bitfld.long 0x0 15. "EPDIR,Endpoint direction" "0,1"
|
|
hexmask.long.byte 0x0 11.--14. 1. "EPNUM,Endpoint number"
|
|
newline
|
|
hexmask.long.word 0x0 0.--10. 1. "MPSIZ,Maximum packet size"
|
|
group.long 0x1A0++0x3
|
|
line.long 0x0 "FS_HCCHAR5,OTG_FS host channel-5 characteristics"
|
|
bitfld.long 0x0 31. "CHENA,Channel enable" "0,1"
|
|
bitfld.long 0x0 30. "CHDIS,Channel disable" "0,1"
|
|
bitfld.long 0x0 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x0 22.--28. 1. "DAD,Device address"
|
|
bitfld.long 0x0 20.--21. "MCNT,Multicount" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "EPTYP,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x0 17. "LSDEV,Low-speed device" "0,1"
|
|
bitfld.long 0x0 15. "EPDIR,Endpoint direction" "0,1"
|
|
hexmask.long.byte 0x0 11.--14. 1. "EPNUM,Endpoint number"
|
|
newline
|
|
hexmask.long.word 0x0 0.--10. 1. "MPSIZ,Maximum packet size"
|
|
group.long 0x1C0++0x3
|
|
line.long 0x0 "FS_HCCHAR6,OTG_FS host channel-6 characteristics"
|
|
bitfld.long 0x0 31. "CHENA,Channel enable" "0,1"
|
|
bitfld.long 0x0 30. "CHDIS,Channel disable" "0,1"
|
|
bitfld.long 0x0 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x0 22.--28. 1. "DAD,Device address"
|
|
bitfld.long 0x0 20.--21. "MCNT,Multicount" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "EPTYP,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x0 17. "LSDEV,Low-speed device" "0,1"
|
|
bitfld.long 0x0 15. "EPDIR,Endpoint direction" "0,1"
|
|
hexmask.long.byte 0x0 11.--14. 1. "EPNUM,Endpoint number"
|
|
newline
|
|
hexmask.long.word 0x0 0.--10. 1. "MPSIZ,Maximum packet size"
|
|
group.long 0x1E0++0x3
|
|
line.long 0x0 "FS_HCCHAR7,OTG_FS host channel-7 characteristics"
|
|
bitfld.long 0x0 31. "CHENA,Channel enable" "0,1"
|
|
bitfld.long 0x0 30. "CHDIS,Channel disable" "0,1"
|
|
bitfld.long 0x0 29. "ODDFRM,Odd frame" "0,1"
|
|
hexmask.long.byte 0x0 22.--28. 1. "DAD,Device address"
|
|
bitfld.long 0x0 20.--21. "MCNT,Multicount" "0,1,2,3"
|
|
bitfld.long 0x0 18.--19. "EPTYP,Endpoint type" "0,1,2,3"
|
|
bitfld.long 0x0 17. "LSDEV,Low-speed device" "0,1"
|
|
bitfld.long 0x0 15. "EPDIR,Endpoint direction" "0,1"
|
|
hexmask.long.byte 0x0 11.--14. 1. "EPNUM,Endpoint number"
|
|
newline
|
|
hexmask.long.word 0x0 0.--10. 1. "MPSIZ,Maximum packet size"
|
|
group.long 0x108++0x3
|
|
line.long 0x0 "FS_HCINT0,OTG_FS host channel-0 interrupt register"
|
|
bitfld.long 0x0 10. "DTERR,Data toggle error" "0,1"
|
|
bitfld.long 0x0 9. "FRMOR,Frame overrun" "0,1"
|
|
bitfld.long 0x0 8. "BBERR,Babble error" "0,1"
|
|
bitfld.long 0x0 7. "TXERR,Transaction error" "0,1"
|
|
bitfld.long 0x0 5. "ACK,ACK response received/transmitted" "0,1"
|
|
bitfld.long 0x0 4. "NAK,NAK response received" "0,1"
|
|
bitfld.long 0x0 3. "STALL,STALL response received" "0,1"
|
|
bitfld.long 0x0 1. "CHH,Channel halted" "0,1"
|
|
bitfld.long 0x0 0. "XFRC,Transfer completed" "0,1"
|
|
group.long 0x128++0x3
|
|
line.long 0x0 "FS_HCINT1,OTG_FS host channel-1 interrupt register"
|
|
bitfld.long 0x0 10. "DTERR,Data toggle error" "0,1"
|
|
bitfld.long 0x0 9. "FRMOR,Frame overrun" "0,1"
|
|
bitfld.long 0x0 8. "BBERR,Babble error" "0,1"
|
|
bitfld.long 0x0 7. "TXERR,Transaction error" "0,1"
|
|
bitfld.long 0x0 5. "ACK,ACK response received/transmitted" "0,1"
|
|
bitfld.long 0x0 4. "NAK,NAK response received" "0,1"
|
|
bitfld.long 0x0 3. "STALL,STALL response received" "0,1"
|
|
bitfld.long 0x0 1. "CHH,Channel halted" "0,1"
|
|
bitfld.long 0x0 0. "XFRC,Transfer completed" "0,1"
|
|
group.long 0x148++0x3
|
|
line.long 0x0 "FS_HCINT2,OTG_FS host channel-2 interrupt register"
|
|
bitfld.long 0x0 10. "DTERR,Data toggle error" "0,1"
|
|
bitfld.long 0x0 9. "FRMOR,Frame overrun" "0,1"
|
|
bitfld.long 0x0 8. "BBERR,Babble error" "0,1"
|
|
bitfld.long 0x0 7. "TXERR,Transaction error" "0,1"
|
|
bitfld.long 0x0 5. "ACK,ACK response received/transmitted" "0,1"
|
|
bitfld.long 0x0 4. "NAK,NAK response received" "0,1"
|
|
bitfld.long 0x0 3. "STALL,STALL response received" "0,1"
|
|
bitfld.long 0x0 1. "CHH,Channel halted" "0,1"
|
|
bitfld.long 0x0 0. "XFRC,Transfer completed" "0,1"
|
|
group.long 0x168++0x3
|
|
line.long 0x0 "FS_HCINT3,OTG_FS host channel-3 interrupt register"
|
|
bitfld.long 0x0 10. "DTERR,Data toggle error" "0,1"
|
|
bitfld.long 0x0 9. "FRMOR,Frame overrun" "0,1"
|
|
bitfld.long 0x0 8. "BBERR,Babble error" "0,1"
|
|
bitfld.long 0x0 7. "TXERR,Transaction error" "0,1"
|
|
bitfld.long 0x0 5. "ACK,ACK response received/transmitted" "0,1"
|
|
bitfld.long 0x0 4. "NAK,NAK response received" "0,1"
|
|
bitfld.long 0x0 3. "STALL,STALL response received" "0,1"
|
|
bitfld.long 0x0 1. "CHH,Channel halted" "0,1"
|
|
bitfld.long 0x0 0. "XFRC,Transfer completed" "0,1"
|
|
group.long 0x188++0x3
|
|
line.long 0x0 "FS_HCINT4,OTG_FS host channel-4 interrupt register"
|
|
bitfld.long 0x0 10. "DTERR,Data toggle error" "0,1"
|
|
bitfld.long 0x0 9. "FRMOR,Frame overrun" "0,1"
|
|
bitfld.long 0x0 8. "BBERR,Babble error" "0,1"
|
|
bitfld.long 0x0 7. "TXERR,Transaction error" "0,1"
|
|
bitfld.long 0x0 5. "ACK,ACK response received/transmitted" "0,1"
|
|
bitfld.long 0x0 4. "NAK,NAK response received" "0,1"
|
|
bitfld.long 0x0 3. "STALL,STALL response received" "0,1"
|
|
bitfld.long 0x0 1. "CHH,Channel halted" "0,1"
|
|
bitfld.long 0x0 0. "XFRC,Transfer completed" "0,1"
|
|
group.long 0x1A8++0x3
|
|
line.long 0x0 "FS_HCINT5,OTG_FS host channel-5 interrupt register"
|
|
bitfld.long 0x0 10. "DTERR,Data toggle error" "0,1"
|
|
bitfld.long 0x0 9. "FRMOR,Frame overrun" "0,1"
|
|
bitfld.long 0x0 8. "BBERR,Babble error" "0,1"
|
|
bitfld.long 0x0 7. "TXERR,Transaction error" "0,1"
|
|
bitfld.long 0x0 5. "ACK,ACK response received/transmitted" "0,1"
|
|
bitfld.long 0x0 4. "NAK,NAK response received" "0,1"
|
|
bitfld.long 0x0 3. "STALL,STALL response received" "0,1"
|
|
bitfld.long 0x0 1. "CHH,Channel halted" "0,1"
|
|
bitfld.long 0x0 0. "XFRC,Transfer completed" "0,1"
|
|
group.long 0x1C8++0x3
|
|
line.long 0x0 "FS_HCINT6,OTG_FS host channel-6 interrupt register"
|
|
bitfld.long 0x0 10. "DTERR,Data toggle error" "0,1"
|
|
bitfld.long 0x0 9. "FRMOR,Frame overrun" "0,1"
|
|
bitfld.long 0x0 8. "BBERR,Babble error" "0,1"
|
|
bitfld.long 0x0 7. "TXERR,Transaction error" "0,1"
|
|
bitfld.long 0x0 5. "ACK,ACK response received/transmitted" "0,1"
|
|
bitfld.long 0x0 4. "NAK,NAK response received" "0,1"
|
|
bitfld.long 0x0 3. "STALL,STALL response received" "0,1"
|
|
bitfld.long 0x0 1. "CHH,Channel halted" "0,1"
|
|
bitfld.long 0x0 0. "XFRC,Transfer completed" "0,1"
|
|
group.long 0x1E8++0x3
|
|
line.long 0x0 "FS_HCINT7,OTG_FS host channel-7 interrupt register"
|
|
bitfld.long 0x0 10. "DTERR,Data toggle error" "0,1"
|
|
bitfld.long 0x0 9. "FRMOR,Frame overrun" "0,1"
|
|
bitfld.long 0x0 8. "BBERR,Babble error" "0,1"
|
|
bitfld.long 0x0 7. "TXERR,Transaction error" "0,1"
|
|
bitfld.long 0x0 5. "ACK,ACK response received/transmitted" "0,1"
|
|
bitfld.long 0x0 4. "NAK,NAK response received" "0,1"
|
|
bitfld.long 0x0 3. "STALL,STALL response received" "0,1"
|
|
bitfld.long 0x0 1. "CHH,Channel halted" "0,1"
|
|
bitfld.long 0x0 0. "XFRC,Transfer completed" "0,1"
|
|
group.long 0x10C++0x3
|
|
line.long 0x0 "FS_HCINTMSK0,OTG_FS host channel-0 mask register"
|
|
bitfld.long 0x0 10. "DTERRM,Data toggle error mask" "0,1"
|
|
bitfld.long 0x0 9. "FRMORM,Frame overrun mask" "0,1"
|
|
bitfld.long 0x0 8. "BBERRM,Babble error mask" "0,1"
|
|
bitfld.long 0x0 7. "TXERRM,Transaction error mask" "0,1"
|
|
bitfld.long 0x0 6. "NYET,response received interrupt" "0,1"
|
|
bitfld.long 0x0 5. "ACKM,ACK response received/transmitted" "0,1"
|
|
bitfld.long 0x0 4. "NAKM,NAK response received interrupt" "0,1"
|
|
bitfld.long 0x0 3. "STALLM,STALL response received interrupt" "0,1"
|
|
bitfld.long 0x0 1. "CHHM,Channel halted mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "XFRCM,Transfer completed mask" "0,1"
|
|
group.long 0x12C++0x3
|
|
line.long 0x0 "FS_HCINTMSK1,OTG_FS host channel-1 mask register"
|
|
bitfld.long 0x0 10. "DTERRM,Data toggle error mask" "0,1"
|
|
bitfld.long 0x0 9. "FRMORM,Frame overrun mask" "0,1"
|
|
bitfld.long 0x0 8. "BBERRM,Babble error mask" "0,1"
|
|
bitfld.long 0x0 7. "TXERRM,Transaction error mask" "0,1"
|
|
bitfld.long 0x0 6. "NYET,response received interrupt" "0,1"
|
|
bitfld.long 0x0 5. "ACKM,ACK response received/transmitted" "0,1"
|
|
bitfld.long 0x0 4. "NAKM,NAK response received interrupt" "0,1"
|
|
bitfld.long 0x0 3. "STALLM,STALL response received interrupt" "0,1"
|
|
bitfld.long 0x0 1. "CHHM,Channel halted mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "XFRCM,Transfer completed mask" "0,1"
|
|
group.long 0x14C++0x3
|
|
line.long 0x0 "FS_HCINTMSK2,OTG_FS host channel-2 mask register"
|
|
bitfld.long 0x0 10. "DTERRM,Data toggle error mask" "0,1"
|
|
bitfld.long 0x0 9. "FRMORM,Frame overrun mask" "0,1"
|
|
bitfld.long 0x0 8. "BBERRM,Babble error mask" "0,1"
|
|
bitfld.long 0x0 7. "TXERRM,Transaction error mask" "0,1"
|
|
bitfld.long 0x0 6. "NYET,response received interrupt" "0,1"
|
|
bitfld.long 0x0 5. "ACKM,ACK response received/transmitted" "0,1"
|
|
bitfld.long 0x0 4. "NAKM,NAK response received interrupt" "0,1"
|
|
bitfld.long 0x0 3. "STALLM,STALL response received interrupt" "0,1"
|
|
bitfld.long 0x0 1. "CHHM,Channel halted mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "XFRCM,Transfer completed mask" "0,1"
|
|
group.long 0x16C++0x3
|
|
line.long 0x0 "FS_HCINTMSK3,OTG_FS host channel-3 mask register"
|
|
bitfld.long 0x0 10. "DTERRM,Data toggle error mask" "0,1"
|
|
bitfld.long 0x0 9. "FRMORM,Frame overrun mask" "0,1"
|
|
bitfld.long 0x0 8. "BBERRM,Babble error mask" "0,1"
|
|
bitfld.long 0x0 7. "TXERRM,Transaction error mask" "0,1"
|
|
bitfld.long 0x0 6. "NYET,response received interrupt" "0,1"
|
|
bitfld.long 0x0 5. "ACKM,ACK response received/transmitted" "0,1"
|
|
bitfld.long 0x0 4. "NAKM,NAK response received interrupt" "0,1"
|
|
bitfld.long 0x0 3. "STALLM,STALL response received interrupt" "0,1"
|
|
bitfld.long 0x0 1. "CHHM,Channel halted mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "XFRCM,Transfer completed mask" "0,1"
|
|
group.long 0x18C++0x3
|
|
line.long 0x0 "FS_HCINTMSK4,OTG_FS host channel-4 mask register"
|
|
bitfld.long 0x0 10. "DTERRM,Data toggle error mask" "0,1"
|
|
bitfld.long 0x0 9. "FRMORM,Frame overrun mask" "0,1"
|
|
bitfld.long 0x0 8. "BBERRM,Babble error mask" "0,1"
|
|
bitfld.long 0x0 7. "TXERRM,Transaction error mask" "0,1"
|
|
bitfld.long 0x0 6. "NYET,response received interrupt" "0,1"
|
|
bitfld.long 0x0 5. "ACKM,ACK response received/transmitted" "0,1"
|
|
bitfld.long 0x0 4. "NAKM,NAK response received interrupt" "0,1"
|
|
bitfld.long 0x0 3. "STALLM,STALL response received interrupt" "0,1"
|
|
bitfld.long 0x0 1. "CHHM,Channel halted mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "XFRCM,Transfer completed mask" "0,1"
|
|
group.long 0x1AC++0x3
|
|
line.long 0x0 "FS_HCINTMSK5,OTG_FS host channel-5 mask register"
|
|
bitfld.long 0x0 10. "DTERRM,Data toggle error mask" "0,1"
|
|
bitfld.long 0x0 9. "FRMORM,Frame overrun mask" "0,1"
|
|
bitfld.long 0x0 8. "BBERRM,Babble error mask" "0,1"
|
|
bitfld.long 0x0 7. "TXERRM,Transaction error mask" "0,1"
|
|
bitfld.long 0x0 6. "NYET,response received interrupt" "0,1"
|
|
bitfld.long 0x0 5. "ACKM,ACK response received/transmitted" "0,1"
|
|
bitfld.long 0x0 4. "NAKM,NAK response received interrupt" "0,1"
|
|
bitfld.long 0x0 3. "STALLM,STALL response received interrupt" "0,1"
|
|
bitfld.long 0x0 1. "CHHM,Channel halted mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "XFRCM,Transfer completed mask" "0,1"
|
|
group.long 0x1CC++0x3
|
|
line.long 0x0 "FS_HCINTMSK6,OTG_FS host channel-6 mask register"
|
|
bitfld.long 0x0 10. "DTERRM,Data toggle error mask" "0,1"
|
|
bitfld.long 0x0 9. "FRMORM,Frame overrun mask" "0,1"
|
|
bitfld.long 0x0 8. "BBERRM,Babble error mask" "0,1"
|
|
bitfld.long 0x0 7. "TXERRM,Transaction error mask" "0,1"
|
|
bitfld.long 0x0 6. "NYET,response received interrupt" "0,1"
|
|
bitfld.long 0x0 5. "ACKM,ACK response received/transmitted" "0,1"
|
|
bitfld.long 0x0 4. "NAKM,NAK response received interrupt" "0,1"
|
|
bitfld.long 0x0 3. "STALLM,STALL response received interrupt" "0,1"
|
|
bitfld.long 0x0 1. "CHHM,Channel halted mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "XFRCM,Transfer completed mask" "0,1"
|
|
group.long 0x1EC++0x3
|
|
line.long 0x0 "FS_HCINTMSK7,OTG_FS host channel-7 mask register"
|
|
bitfld.long 0x0 10. "DTERRM,Data toggle error mask" "0,1"
|
|
bitfld.long 0x0 9. "FRMORM,Frame overrun mask" "0,1"
|
|
bitfld.long 0x0 8. "BBERRM,Babble error mask" "0,1"
|
|
bitfld.long 0x0 7. "TXERRM,Transaction error mask" "0,1"
|
|
bitfld.long 0x0 6. "NYET,response received interrupt" "0,1"
|
|
bitfld.long 0x0 5. "ACKM,ACK response received/transmitted" "0,1"
|
|
bitfld.long 0x0 4. "NAKM,NAK response received interrupt" "0,1"
|
|
bitfld.long 0x0 3. "STALLM,STALL response received interrupt" "0,1"
|
|
bitfld.long 0x0 1. "CHHM,Channel halted mask" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "XFRCM,Transfer completed mask" "0,1"
|
|
group.long 0x110++0x3
|
|
line.long 0x0 "FS_HCTSIZ0,OTG_FS host channel-0 transfer size"
|
|
bitfld.long 0x0 29.--30. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x0 19.--28. 1. "PKTCNT,Packet count"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "XFRSIZ,Transfer size"
|
|
group.long 0x130++0x3
|
|
line.long 0x0 "FS_HCTSIZ1,OTG_FS host channel-1 transfer size"
|
|
bitfld.long 0x0 29.--30. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x0 19.--28. 1. "PKTCNT,Packet count"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "XFRSIZ,Transfer size"
|
|
group.long 0x150++0x3
|
|
line.long 0x0 "FS_HCTSIZ2,OTG_FS host channel-2 transfer size"
|
|
bitfld.long 0x0 29.--30. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x0 19.--28. 1. "PKTCNT,Packet count"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "XFRSIZ,Transfer size"
|
|
group.long 0x170++0x3
|
|
line.long 0x0 "FS_HCTSIZ3,OTG_FS host channel-3 transfer size"
|
|
bitfld.long 0x0 29.--30. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x0 19.--28. 1. "PKTCNT,Packet count"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "XFRSIZ,Transfer size"
|
|
group.long 0x190++0x3
|
|
line.long 0x0 "FS_HCTSIZ4,OTG_FS host channel-x transfer size"
|
|
bitfld.long 0x0 29.--30. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x0 19.--28. 1. "PKTCNT,Packet count"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "XFRSIZ,Transfer size"
|
|
group.long 0x1B0++0x3
|
|
line.long 0x0 "FS_HCTSIZ5,OTG_FS host channel-5 transfer size"
|
|
bitfld.long 0x0 29.--30. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x0 19.--28. 1. "PKTCNT,Packet count"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "XFRSIZ,Transfer size"
|
|
group.long 0x1D0++0x3
|
|
line.long 0x0 "FS_HCTSIZ6,OTG_FS host channel-6 transfer size"
|
|
bitfld.long 0x0 29.--30. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x0 19.--28. 1. "PKTCNT,Packet count"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "XFRSIZ,Transfer size"
|
|
group.long 0x1F0++0x3
|
|
line.long 0x0 "FS_HCTSIZ7,OTG_FS host channel-7 transfer size"
|
|
bitfld.long 0x0 29.--30. "DPID,Data PID" "0,1,2,3"
|
|
hexmask.long.word 0x0 19.--28. 1. "PKTCNT,Packet count"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "XFRSIZ,Transfer size"
|
|
tree.end
|
|
tree "OTG_FS_PWRCLK"
|
|
base ad:0x50000E00
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "FS_PCGCCTL,OTG_FS power and clock gating control"
|
|
bitfld.long 0x0 4. "PHYSUSP,PHY Suspended" "0,1"
|
|
bitfld.long 0x0 1. "GATEHCLK,Gate HCLK" "0,1"
|
|
bitfld.long 0x0 0. "STPPCLK,Stop PHY clock" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "VREFBUF (Voltage Reference Buffer)"
|
|
base ad:0x40010030
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "CSR,VREF control and status"
|
|
rbitfld.long 0x0 3. "VRR,Voltage reference buffer" "0,1"
|
|
bitfld.long 0x0 2. "VRS,Voltage reference scale" "0,1"
|
|
bitfld.long 0x0 1. "HIZ,High impedance mode" "0,1"
|
|
bitfld.long 0x0 0. "ENVR,Voltage reference buffer" "0,1"
|
|
line.long 0x4 "CCR,calibration control register"
|
|
hexmask.long.byte 0x4 0.--5. 1. "TRIM,Trimming code"
|
|
tree.end
|
|
tree "WWDG (System Window Watchdog)"
|
|
base ad:0x40002C00
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CR,Control register"
|
|
bitfld.long 0x0 7. "WDGA,Activation bit" "0,1"
|
|
hexmask.long.byte 0x0 0.--6. 1. "T,7-bit counter (MSB to LSB)"
|
|
line.long 0x4 "CFR,Configuration register"
|
|
bitfld.long 0x4 9. "EWI,Early wakeup interrupt" "0,1"
|
|
bitfld.long 0x4 7.--8. "WDGTB,Timer base" "0,1,2,3"
|
|
hexmask.long.byte 0x4 0.--6. 1. "W,7-bit window value"
|
|
line.long 0x8 "SR,Status register"
|
|
bitfld.long 0x8 0. "EWIF,Early wakeup interrupt" "0,1"
|
|
tree.end
|
|
AUTOINDENT.OFF
|