21680 lines
1.4 MiB
21680 lines
1.4 MiB
; --------------------------------------------------------------------------------
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; @Title: STA2064/STA2065/STA2164/STA2165 On-Chip Peripherals
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; @Props: Released
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; @Author: LEM, SOL
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; @Changelog: 2010-12-14
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; @Manufacturer: STM - ST Microelectronics N.V.
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; @Doc: STA2064_DS_0.7.pdf; STA2065_DS_0.7.pdf
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; @Core: ARM1176
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; @Chip:
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; @Copyright: (C) 1989-2017 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: persta2064.per 7591 2017-02-18 12:05:10Z askoncej $
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config 16. 8.
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width 0xB
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tree "ARM Core Registers"
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width 0x9
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; --------------------------------------------------------------------------------
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; Identification registers
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; --------------------------------------------------------------------------------
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tree "ID Registers"
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rgroup c15:0x0--0x0
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line.long 0x0 "MIDR,Main ID Register"
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hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer code"
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bitfld.long 0x0 20.--23. " VAR ,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x0 16.--19. " ARCH , Architecture" "Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,ARMv7"
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textline " "
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hexmask.long.word 0x0 4.--15. 0x1 " PART ,Primary Part Number"
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bitfld.long 0x0 0.--3. " REV ,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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rgroup c15:0x0100--0x0100
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line.long 0x00 "CTYPE,CTR,Cache Type Register"
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hexmask.long.byte 0x00 25.--28. 1. " Ctype ,Cache Type"
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bitfld.long 0x00 24. " S ,S bit" "Not separated,Separated"
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bitfld.long 0x00 23. " P ,P bit" "Not restricted,Restricted"
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textline " "
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bitfld.long 0x00 18.--21. " Size ,Size" "0.5 KB,1 KB,2 KB,4 KB,8 KB,16 KB,32 KB,64 KB,128 KB,?..."
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bitfld.long 0x00 15.--17. " Assoc ,Associativity" "Reserved,Reserved,4-way,?..."
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bitfld.long 0x00 14. " M ,M bit" "Data/Instruction,No effect"
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textline " "
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bitfld.long 0x00 12.--13. " Len ,Cache line length" "Reserved,Reserved,8 words,?..."
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bitfld.long 0x00 11. " P ,P bit" "Not restricted,Restricted"
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bitfld.long 0x00 06.--09. " Size ,Size" "0.5 KB,1 KB,2 KB,4 KB,8 KB,16 KB,32 KB,64 KB,128 KB,?..."
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textline " "
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bitfld.long 0x00 03.--05. " Assoc ,Associativity" "Reserved,Reserved,4-way,?..."
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bitfld.long 0x00 02. " M ,M bit" "Low,High"
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bitfld.long 0x00 00.--01. " Len ,Cache line length" "Reserved,Reserved,8 words,?..."
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width 0x9
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rgroup c15:0x0010--0x0010
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line.long 0x00 "PROCF0,Processor Feature 0 Register"
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hexmask.long.byte 0x00 12.--15. 1. " State3 ,Thumb-2 Execution Environment Support"
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hexmask.long.byte 0x00 08.--11. 1. " State2 ,Java Extension Interface Support"
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textline " "
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hexmask.long.byte 0x00 04.--07. 1. " State1 ,Thumb Encoding Type"
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hexmask.long.byte 0x00 00.--03. 1. " State0 ,32-bit ARM Instruction Set Support"
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rgroup c15:0x0110--0x0110
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line.long 0x00 "PROCF1,Processor Feature 1 Register"
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hexmask.long.byte 0x00 08.--11. 1. " MICROPROGMOD ,The ARM Microcontroller Programmer's Model Support"
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hexmask.long.byte 0x00 04.--07. 1. " SECEXTARCH ,Security Extensions Architecture v1 Support"
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textline " "
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hexmask.long.byte 0x00 00.--03. 1. " PROGMODEL ,Standard ARMv4 Programmer's Model Support"
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rgroup c15:0x0210--0x0210
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line.long 0x00 "DEBUGF0,Debug Feature 0 Register"
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hexmask.long.byte 0x00 20.--23. 1. " MEMMAPMICRO ,Memory-Mapped Microcontroller Debug Model Type"
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hexmask.long.byte 0x00 16.--19. 1. " MEMMAPTRACE ,Memory-Mapped Trace Debug Model Type"
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textline " "
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hexmask.long.byte 0x00 12.--15. 1. " COPRBASEDTRACE ,Coprocessor-Based Trace Debug Model Type"
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hexmask.long.byte 0x00 08.--11. 1. " EMBPROCDEBUG ,Embedded Processor Debug Model Type"
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textline " "
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hexmask.long.byte 0x00 04.--07. 1. " SECDEBUG ,Secure Debug Model Type"
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hexmask.long.byte 0x00 00.--03. 1. " APPPROCDEBUG ,Applications Processor Debug Model Type"
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rgroup c15:0x0310--0x0310
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line.long 0x00 "AUXF0,Auxiliary Feature 0 Register"
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rgroup c15:0x0410--0x0410
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line.long 0x00 "MMF0,Memory Model Feature 0 Register"
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hexmask.long.byte 0x00 24.--27. 1. " FCSE ,FCSE Support"
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hexmask.long.byte 0x00 20.--23. 1. " AUXCR ,ARMv6 Auxiliary Control Register Support"
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textline " "
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hexmask.long.byte 0x00 16.--19. 1. " TCM/DMA ,TCM and Associated DMA Support"
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hexmask.long.byte 0x00 12.--15. 1. " CACHECOHWDMA ,Cache Coherency With DMA Agent/Shared Memory Support"
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textline " "
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hexmask.long.byte 0x00 08.--11. 1. " CACHECOHWCPU ,Cache Coherency With CPU Agent/Shared Memory Support"
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hexmask.long.byte 0x00 04.--07. 1. " PROTMEMSYSARCH ,Protected Memory System Architecture PMSA Support"
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textline " "
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hexmask.long.byte 0x00 00.--03. 1. " VIRTMEMSYSARCH ,Virtual Memory System Architecture Support"
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rgroup c15:0x0510--0x0510
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line.long 0x00 "MMF1,Memory Model Feature 1 Register"
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hexmask.long.byte 0x00 28.--31. 1. " BRANCHTARGBUFF ,Branch Target Buffer Support"
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hexmask.long.byte 0x00 24.--27. 1. " TESTCLEAN ,Test and Clean Operations on Data Cache Support"
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textline " "
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hexmask.long.byte 0x00 20.--23. 1. " L1CACHEALL_UNIFIED ,Level One Cache Support"
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hexmask.long.byte 0x00 16.--19. 1. " L1CACHEALL_HARVARD ,Level One Cache Support"
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textline " "
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hexmask.long.byte 0x00 12.--15. 1. " L1CACHELINE_SET/WAY_UNIFIED ,Level One Cache Line Maintenance Operations by Set/Way Support"
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hexmask.long.byte 0x00 08.--11. 1. " L1CACHELINE_SET/WAY_HARVARD ,Level One Cache Line Maintenance Operations by Set/Way Support"
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textline " "
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hexmask.long.byte 0x00 04.--07. 1. " L1CACHELINE_MVA_UNIFIED ,Level One Cache Line Maintenance Operations by MVA Support"
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hexmask.long.byte 0x00 00.--03. 1. " L1CACHELINE_MVA_HARVARD ,Level One Cache Line Maintenance Operations by MVA Support"
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rgroup c15:0x0610--0x0610
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line.long 0x00 "MMF2,Memory Model Feature 2 Register"
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hexmask.long.byte 0x00 28.--31. 1. " HARDWAREACCESSFLAG ,Hardware Access Flag Support"
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hexmask.long.byte 0x00 24.--27. 1. " WAITINTSTALL ,Wait for Interrupt Stalling Support"
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textline " "
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hexmask.long.byte 0x00 20.--23. 1. " MEMBARRIER ,Memory Barrier Operations Support"
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hexmask.long.byte 0x00 16.--19. 1. " TLB_UNIFIED ,TLB Maintenance Operations Support"
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textline " "
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hexmask.long.byte 0x00 12.--15. 1. " TLB_HARVARD ,TLB Maintenance Operations Support"
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hexmask.long.byte 0x00 08.--11. 1. " CACHERANGE ,Cache Maintenance Range Operations Support"
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textline " "
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hexmask.long.byte 0x00 04.--07. 1. " BACKGROUNDPREFCACHERANGE ,Background Prefetch Cache Range Operations Support"
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hexmask.long.byte 0x00 00.--03. 1. " FOREGROUNDPREFCACHERANGE ,Foreground Prefetch Cache Range Operations Support"
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rgroup c15:0x0710--0x0710
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line.long 0x00 "MMF3,Memory Model Feature 3 Register"
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hexmask.long.byte 0x00 04.--07. 1. " HIERARCHICALCACHE_MVA ,Hierarchical Cache Maintenance by MVA Support"
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hexmask.long.byte 0x00 00.--03. 1. " HIERARCHICALCACHE_SET/WAY ,Hierarchical Cache Maintenance by Set/Way Support"
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rgroup c15:0x0020--0x0020
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line.long 0x00 "ISFA0,Instruction Set Feature Attribute 0 Register"
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hexmask.long.byte 0x00 24.--27. 1. " DIV_instrs ,Divide Instructions Support"
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hexmask.long.byte 0x00 20.--23. 1. " DEBUG_instrs ,Debug Instructions Support"
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textline " "
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hexmask.long.byte 0x00 16.--19. 1. " COPROCESSOR_instrs ,Coprocessor Instructions Support"
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hexmask.long.byte 0x00 12.--15. 1. " COMBINEDCOMPARE/BRANCH_instrs ,Combined Compare and Branch Instructions Support"
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textline " "
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hexmask.long.byte 0x00 08.--11. 1. " BITFIELD_instrs ,Bitfield Instructions Support"
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hexmask.long.byte 0x00 04.--07. 1. " BITCOUNTING_instrs ,Bit Counting Instructions Support"
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textline " "
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hexmask.long.byte 0x00 00.--03. 1. " ATOMICLOADSTORE_instrs ,Atomic Load and Store Instructions Support"
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rgroup c15:0x0120--0x0120
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line.long 0x00 "ISFA1,Instruction Set Feature Attribute 1 Register"
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hexmask.long.byte 0x00 28.--31. 1. " JAZELLE_instrs ,Jazelle Instructions Support"
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hexmask.long.byte 0x00 24.--27. 1. " INTERWORKING_instrs ,Interworking Instructions Support"
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textline " "
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hexmask.long.byte 0x00 20.--23. 1. " IMMEDIATE_instrs ,Immediate Instructions Support"
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hexmask.long.byte 0x00 16.--19. 1. " FORIFTHEN_instrs ,If Then Instructions Support"
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textline " "
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hexmask.long.byte 0x00 12.--15. 1. " SIGN/ZEROEXT_instrs ,Sign or Zero Extend Instructions Support"
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hexmask.long.byte 0x00 08.--11. 1. " EXCEPTION2_instrs ,Exception 2 Instructions Support"
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textline " "
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hexmask.long.byte 0x00 04.--07. 1. " EXCEPTION1_instrs ,Exception 1 Instructions Support"
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hexmask.long.byte 0x00 00.--03. 1. " ENDIANNESCONTROL_instrs ,Endianness Control Instructions Support"
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rgroup c15:0x0220--0x0220
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line.long 0x00 "ISFA2,Instruction Set Feature Attribute 2 Register"
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hexmask.long.byte 0x00 28.--31. 1. " REVERSAL_instrs ,Reversal instructions Support"
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hexmask.long.byte 0x00 24.--27. 1. " PSR_instrs ,PSR Instructions Support"
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textline " "
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hexmask.long.byte 0x00 20.--23. 1. " ADVANCEDUNSIGNEDMUL_instrs ,Advanced Unsigned Multiply Instructions Support"
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hexmask.long.byte 0x00 16.--19. 1. " ADVANCEDSIGNEDMUL_instrs ,Advanced Signed Multiply Instructions Support"
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textline " "
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hexmask.long.byte 0x00 12.--15. 1. " MUL_instrs ,Multiply Instructions Support"
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hexmask.long.byte 0x00 08.--11. 1. " MULTIACCESSINT_instrs ,Multi-Access Interruptible Instructions Support"
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textline " "
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hexmask.long.byte 0x00 04.--07. 1. " MEMHINT_instrs ,Memory Hint Instructions Support"
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hexmask.long.byte 0x00 00.--03. 1. " LOADSTORE_instrs ,Load and Store Instructions Support"
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rgroup c15:0x0320--0x0320
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line.long 0x00 "ISFA3,Instruction Set Feature Attribute 3 Register"
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hexmask.long.byte 0x00 28.--31. 1. " THUMB-2EXT_instrs ,Thumb-2 Extensions Support"
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hexmask.long.byte 0x00 24.--27. 1. " TRUENOP_instrs ,True NOP Instructions Support"
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textline " "
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hexmask.long.byte 0x00 20.--23. 1. " THUMBCOPY_instrs ,Thumb Copy Instructions Support"
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hexmask.long.byte 0x00 16.--19. 1. " TABLEBRANCH_instrs ,Table Branch Instructions Support"
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textline " "
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hexmask.long.byte 0x00 12.--15. 1. " SYNCHROPRIMITIVE_instrs ,Synchronization Primitive Instructions Support"
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hexmask.long.byte 0x00 08.--11. 1. " SWI_instrs ,SWI Instructions Support"
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textline " "
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hexmask.long.byte 0x00 04.--07. 1. " SIMD_instrs ,Single Instruction Multiple Data Support"
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hexmask.long.byte 0x00 00.--03. 1. " SATURATE_instrs ,Saturate Instructions Support"
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rgroup c15:0x0420--0x0420
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line.long 0x00 "ISFA4,Instruction Set Feature Attribute 4 Register"
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hexmask.long.byte 0x00 20.--23. 1. " PRIM_instrs ,Fractional support for synchronization primitive instructions"
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hexmask.long.byte 0x00 16.--19. 1. " BARRIER_instrs ,Barrier instructions support"
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textline " "
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hexmask.long.byte 0x00 12.--15. 1. " SMC_instrs ,SMC Instructions Support"
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hexmask.long.byte 0x00 08.--11. 1. " WRITEBACK_instrs ,Writeback Instructions Support"
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textline " "
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hexmask.long.byte 0x00 04.--07. 1. " WITHSHIFT_instrs ,With Shift Instructions Support"
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hexmask.long.byte 0x00 00.--03. 1. " UNPRIVILEGED_instrs ,Unprivileged Instructions Support"
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rgroup c15:0x0520--0x0520
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line.long 0x00 "ISFA5,Instruction Set Feature Attribute 5 Register"
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tree.end
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width 8.
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tree "System Control and Configuration"
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group c15:0x0001--0x0001
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line.long 0x0 "CR,Control Register"
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bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disable,Enable"
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bitfld.long 0x0 28. " TRE ,TEX Remap Enable" "Disable,Enable"
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bitfld.long 0x0 25. " EE ,Exception Endianess" "Little ,Big"
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bitfld.long 0x0 24. " VE ,Vector Enable" "Fixed,VIC"
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textline " "
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bitfld.long 0x0 23. " XP ,Extended pagetable configuration" "Subpages,ARMv6"
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bitfld.long 0x0 22. " U ,Unaligned Data Access Operations" "Disable,Enable"
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bitfld.long 0x0 21. " FI ,Fast Interrupts" "Disable,Enable"
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textline " "
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bitfld.long 0x00 18. " IT ,Global Enable for Instruction TCM" "Disabled,Enabled"
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bitfld.long 0x00 16. " DT ,Global enable for data TCM" "Disabled,Enabled"
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bitfld.long 0x0 15. " L4 ,Compatible to Software Version 4" "No,Yes"
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bitfld.long 0x0 14. " RR ,Round Robin Replacement" "Random,Round robin"
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bitfld.long 0x0 13. " V ,Base Location of Exception Vectors" "0x00000000,0xFFFF0000"
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textline " "
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bitfld.long 0x0 12. " I ,Level one Instruction Cache" "Disable,Enable"
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bitfld.long 0x0 11. " Z ,Program flow prediction" "Disable,Enable"
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bitfld.long 0x0 0x9 " R ,ROM Protection" "Disable,Enable"
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bitfld.long 0x0 0x8 " S ,System Protection" "Disable,Enable"
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textline " "
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bitfld.long 0x0 0x7 " B ,Endianism" "Little,Big"
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bitfld.long 0x0 0x2 " C ,Data Cache" "Disable,Enable"
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bitfld.long 0x0 0x1 " A ,Alignment Fault Check" "Disable,Enable"
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bitfld.long 0x0 0x0 " M ,MMU" "Disable,Enable"
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group c15:0x0101--0x0101
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line.long 0x00 "ACR,Auxiliary Control Register"
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bitfld.long 0x00 31. " FIO ,Additional Level of Control for Low Interrupt Latency Configuration" "Normal,Low-Lat"
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bitfld.long 0x00 30. " FSD ,Additional Level of Control for Speculative Operations" "Enable,Disable"
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bitfld.long 0x00 29. " BFD ,Branch Folding Disable" "Enable,Disable"
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bitfld.long 0x00 28. " PHD ,Instruction Prefetch Halting on Unconditional Disable" "Enable,Disable"
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textline " "
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bitfld.long 0x00 06. " CZ ,Restriction of Cache Size to 16KB Control" "Normal,Limited"
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bitfld.long 0x00 05. " RV ,Block Transfer Cache Operations Disable" "Enable,Disable"
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bitfld.long 0x00 04. " RA ,Clean Entire Data Cache Disable" "Enable,Disable"
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bitfld.long 0x00 03. " TR ,MicroTLB Random Replacement Enable" "Round robin,Random"
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textline " "
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bitfld.long 0x00 02. " SB ,Static branch prediction enable" "Disable,Enable"
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bitfld.long 0x00 01. " DB ,Dynamic branch prediction enable" "Disable,Enable"
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bitfld.long 0x00 00. " RS ,Return stack enable" "Disable,Enable"
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group c15:0x201--0x201
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line.long 0x0 "CPACR,Coprocessor Access Control Register"
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bitfld.long 0x0 26.--27. " CP13 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
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bitfld.long 0x0 24.--25. " CP12 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
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textline " "
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bitfld.long 0x0 22.--23. " CP11 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
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bitfld.long 0x0 20.--21. " CP10 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
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textline " "
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bitfld.long 0x0 18.--19. " CP9 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
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bitfld.long 0x0 16.--17. " CP8 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
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textline " "
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bitfld.long 0x0 14.--15. " CP7 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
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bitfld.long 0x0 12.--13. " CP6 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
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textline " "
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bitfld.long 0x0 10.--11. " CP5 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
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bitfld.long 0x0 8.--9. " CP4 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
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textline " "
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bitfld.long 0x0 6.--7. " CP3 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
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bitfld.long 0x0 4.--5. " CP2 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
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textline " "
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bitfld.long 0x0 2.--3. " CP1 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
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bitfld.long 0x0 0.--1. " CP0 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
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textline " "
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group c15:0x0011--0x0011
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line.long 0x0 "SCR,Secure Configuration Register"
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bitfld.long 0x00 5. " AW ,Controls whether the Non-secure world can modify the A-bit in the CPSR" "Not allowed,Allowed"
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bitfld.long 0x00 4. " FW ,FW-bit controls whether the Non-secure world can modify the F-bit in the CPSR" "Not allowed,Allowed"
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textline " "
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bitfld.long 0x00 3. " EA ,External Abort exceptions handled in Abort mode or Monitor mode" "Abort,Monitor"
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bitfld.long 0x00 2. " FIQ ,FIQ exceptions handled in Abort mode or Monitor mode" "FIQ,Monitor"
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textline " "
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bitfld.long 0x00 1. " IRQ ,IRQ exceptions handled in Abort mode or Monitor mode" "IRQ,Monitor"
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bitfld.long 0x00 0. " NS ,Secure mode " "Secure,Non-secure"
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group c15:0x111--0x111
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line.long 0x0 "SDE,Secure Debug Enable register"
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bitfld.long 0x00 1. " SUNIDEN ,Non-Invasive Secure User Debug Enable bit" "Denied,Permitted"
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bitfld.long 0x00 0. " SUIDEN ,Invasive Secure User Debug Enable bit" "Denied,Permitted"
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group c15:0x0211++0x00
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line.long 0x00 "NACR,Nonsecure Access Control Register"
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bitfld.long 0x00 18. " DMA ,The DMA Channels and Registers for the Secure World Reserve" "Denied,Permitted"
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bitfld.long 0x00 17. " TL ,Lockable Page Table Entries Allocation in Nonsecure World" "Denied,Permitted"
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textline " "
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bitfld.long 0x00 16. " CL ,Lockdown Entries Allocation Within the L2 Cache in Nonsecure World" "Denied,Permitted"
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textline " "
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bitfld.long 0x00 13. " CP13 ,Coprocessor 13 in the Nonsecure World Access Permission" "Denied,Permitted"
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bitfld.long 0x00 12. " CP12 ,Coprocessor 12 in the Nonsecure World Access Permission" "Denied,Permitted"
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textline " "
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bitfld.long 0x00 11. " CP11 ,Coprocessor 11 in the Nonsecure World Access Permission" "Denied,Permitted"
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bitfld.long 0x00 10. " CP10 ,Coprocessor 10 in the Nonsecure World Access Permission" "Denied,Permitted"
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textline " "
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bitfld.long 0x00 9. " CP9 ,Coprocessor 9 in the Nonsecure World Access Permission" "Denied,Permitted"
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bitfld.long 0x00 8. " CP8 ,Coprocessor 8 in the Nonsecure World Access Permission" "Denied,Permitted"
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textline " "
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bitfld.long 0x00 7. " CP7 ,Coprocessor 7 in the Nonsecure World Access Permission" "Denied,Permitted"
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bitfld.long 0x00 6. " CP6 ,Coprocessor 6 in the Nonsecure World Access Permission" "Denied,Permitted"
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textline " "
|
|
bitfld.long 0x00 5. " CP5 ,Coprocessor 5 in the Nonsecure World Access Permission" "Denied,Permitted"
|
|
bitfld.long 0x00 4. " CP4 ,Coprocessor 4 in the Nonsecure World Access Permission" "Denied,Permitted"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CP3 ,Coprocessor 3 in the Nonsecure World Access Permission" "Denied,Permitted"
|
|
bitfld.long 0x00 2. " CP2 ,Coprocessor 2 in the Nonsecure World Access Permission" "Denied,Permitted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CP1 ,Coprocessor 1 in the Nonsecure World Access Permission" "Denied,Permitted"
|
|
bitfld.long 0x00 0. " CP0 ,Coprocessor 0 in the Nonsecure World Access Permission" "Denied,Permitted"
|
|
textline " "
|
|
group c15:0x000c++0x00
|
|
line.long 0x00 "SNVBAR,Secure or Nonsecure Vector Base Address Register"
|
|
hexmask.long 0x00 5.--31. 0x20 " VBA ,Base Address"
|
|
group c15:0x10c--0x10c
|
|
line.long 0x0 "MVBAR,Monitor Vector Base Address Register"
|
|
hexmask.long.long 0x00 5.--31. 1. " MVBA , Monitor Vector Base Address"
|
|
tree.end
|
|
tree "MMU Control and Configuration"
|
|
width 8.
|
|
group c15:0x1--0x1
|
|
line.long 0x0 "CR,Control Register"
|
|
bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disable,Enable"
|
|
bitfld.long 0x0 28. " TRE ,TEX Remap Enable" "Disable,Enable"
|
|
bitfld.long 0x0 25. " EE ,Exception Endianess" "Little ,Big"
|
|
bitfld.long 0x0 24. " VE ,Vector Enable" "Fixed,VIC"
|
|
textline " "
|
|
bitfld.long 0x0 23. " XP ,Extended pagetable configuration" "Subpages,ARMv6"
|
|
bitfld.long 0x0 22. " U ,Unaligned Data Access Operations" "Disable,Enable"
|
|
bitfld.long 0x0 21. " FI ,Fast Interrupts" "Disable,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 18. " IT ,Global Enable for Instruction TCM" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " DT ,Global enable for data TCM" "Disabled,Enabled"
|
|
bitfld.long 0x0 15. " L4 ,Compatible to Software Version 4" "No,Yes"
|
|
bitfld.long 0x0 14. " RR ,Round Robin Replacement" "Random,Round robin"
|
|
bitfld.long 0x0 13. " V ,Base Location of Exception Vectors" "0x00000000,0xFFFF0000"
|
|
textline " "
|
|
bitfld.long 0x0 12. " I ,Level one Instruction Cache" "Disable,Enable"
|
|
bitfld.long 0x0 11. " Z ,Program flow prediction" "Disable,Enable"
|
|
bitfld.long 0x0 0x9 " R ,ROM Protection" "Disable,Enable"
|
|
bitfld.long 0x0 0x8 " S ,System Protection" "Disable,Enable"
|
|
textline " "
|
|
bitfld.long 0x0 0x7 " B ,Endianism" "Little,Big"
|
|
bitfld.long 0x0 0x2 " C ,Data Cache" "Disable,Enable"
|
|
bitfld.long 0x0 0x1 " A ,Alignment Fault Check" "Disable,Enable"
|
|
bitfld.long 0x0 0x0 " M ,MMU" "Disable,Enable"
|
|
textline " "
|
|
group c15:0x0002++0x00
|
|
line.long 0x00 "TTBR0,Translation Table Base Register 0"
|
|
hexmask.long 0x00 14.--31. 0x4000 " TTB0 ,Translation Table Base Address"
|
|
bitfld.long 0x00 3.--4. " RGN ,Outer Cacheable Attributes for Page Table Walking" "Noncacheable,Copyback/allocated,Writethrough,Copyback/not allocated"
|
|
textline " "
|
|
bitfld.long 0x0 2. " P ,Indicates to the Memory Controller ECC is Enabled" "Disable,Enable"
|
|
bitfld.long 0x00 1. " S ,Page Table Walk to Shared Memory" "Nonshared,Shared"
|
|
bitfld.long 0x00 0. " C ,Page Table Walk Inner Cacheable" "Noncacheable,Cacheable"
|
|
group c15:0x0102++0x00
|
|
line.long 0x00 "TTBR1,Translation Table Base Register 1"
|
|
hexmask.long 0x00 14.--31. 0x4000 " TTB1 ,Translation Table Base Address"
|
|
bitfld.long 0x00 3.--4. " RGN ,Outer Cacheable Attributes for Page Table Walking" "Noncacheable,Copyback/allocated,Writethrough,Copyback/not allocated"
|
|
textline " "
|
|
bitfld.long 0x0 2. " P ,Indicates to the Memory Controller ECC is Enabled" "Disable,Enable"
|
|
bitfld.long 0x00 1. " S ,Page Table Walk to Shared Memory" "Nonshared,Shared"
|
|
bitfld.long 0x00 0. " C ,Page Table Walk Inner Cacheable" "Noncacheable,Cacheable"
|
|
group c15:0x0202++0x00
|
|
line.long 0x00 "TTBCR,Translation Table Base Control Register"
|
|
bitfld.long 0x0 0.--2. " N ,Translation Table Base Register 0 page table boundary size" "Off,0x80000000,0x40000000,0x20000000,0x10000000,0x08000000,0x04000000,0x02000000"
|
|
textline " "
|
|
group c15:0x3--0x3
|
|
line.long 0x0 "DACR,Domain Access Control Register"
|
|
bitfld.long 0x0 30.--31. " D15 ,Domain Access 15" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 28.--29. " D14 ,Domain Access 14" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 26.--27. " D13 ,Domain Access 13" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 24.--25. " D12 ,Domain Access 12" "Denied,Client,Reserved,Manager"
|
|
textline " "
|
|
bitfld.long 0x0 22.--23. " D11 ,Domain Access 11" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 20.--21. " D10 ,Domain Access 10" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 18.--19. " D9 ,Domain Access 9" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 16.--17. " D8 ,Domain Access 8" "Denied,Client,Reserved,Manager"
|
|
textline " "
|
|
bitfld.long 0x0 14.--15. " D7 ,Domain Access 7" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 12.--13. " D6 ,Domain Access 6" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 10.--11. " D5 ,Domain Access 5" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 8.--9. " D4 ,Domain Access 4" "Denied,Client,Reserved,Manager"
|
|
textline " "
|
|
bitfld.long 0x0 6.--7. " D3 ,Domain Access 3" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 4.--5. " D2 ,Domain Access 2" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 2.--3. " D1 ,Domain Access 1" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 0.--1. " D0 ,Domain Access 0" "Denied,Client,Reserved,Manager"
|
|
textline " "
|
|
if (((data.long(c15:0x0005))&0x0400)==0x00)
|
|
group c15:0x0005--0x0005
|
|
line.long 0x00 "DFSR,Data Fault Status Register"
|
|
bitfld.long 0x00 12. " SD ,AXI Decode or Slave Error Caused an Abort Status" "Decode,Slave"
|
|
bitfld.long 0x00 11. " RW ,Read or Write Access Caused an Abort Status" "Read,Write"
|
|
textline " "
|
|
bitfld.long 0x00 10. " S ,Part of the Status Field" "0,1"
|
|
bitfld.long 0x00 4.--7. " DOMAIN ,Domain Accessed When a Data Fault Occurs Status" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " STATUS ,Type of Fault Generated" "No function,Alignment,Instruction debug,Access Bit/Section,Instruction cache,Translation Section,Access Bit/Page,Translation Page,Precise external abort,Domain Section,No function,Domain Page,External abort/first,Permission Section,External abort/second,Permission Page"
|
|
else
|
|
group c15:0x0005--0x0005
|
|
line.long 0x00 "DFSR,Data Fault Status Register"
|
|
bitfld.long 0x00 12. " SD ,AXI Decode or Slave Error Caused an Abort Status" "Decode,Slave"
|
|
bitfld.long 0x00 11. " RW ,Read or Write Access Caused an Abort Status" "Read,Write"
|
|
textline " "
|
|
bitfld.long 0x00 10. " S ,Part of the Status Field" "0,1"
|
|
bitfld.long 0x00 4.--7. " DOMAIN ,Domain Accessed When a Data Fault Occurs Status" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " STATUS ,Type of Fault Generated" "No function,No function,No function,No function,No function,No function,Imprecise external abort,No function,No function,No function,No function,No function,No function,No function,No function,No function"
|
|
endif
|
|
group c15:0x0006--0x0006
|
|
line.long 0x00 "FAR,Fault Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " MVA ,Modified Virtual Address"
|
|
group c15:0x0105--0x0105
|
|
line.long 0x00 "IFSR,Instruction Fault Status Register"
|
|
bitfld.long 0x00 12. " SD ,AXI Decode or Slave Error Caused an Abort Status" "Decode,Slave"
|
|
bitfld.long 0x00 0.--3. " STATUS ,Type of Fault Generated" "No function,Alignment fault,Instruction debug event fault,Access Bit fault on Section,No function,Translation Section fault,Access Bit fault on Page,Translation Page fault,Precise external abort,Domain section fault,No function,Domain page fault,External abort/first,Permission section fault,External abort/second,Permission page fault"
|
|
group c15:0x0206--0x0206
|
|
line.long 0x00 "IFAR,Instruction Fault Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " IFMVA ,Instruction Fault MVA"
|
|
textline " "
|
|
; wgroup c15:0x0008--0x0008
|
|
; line.long 0x00 "TLBOR,TLB Operations Register"
|
|
; hexmask.long.tbyte 0x00 12.--31. 1. " MVA ,Modified virtual address"
|
|
; hexmask.long.byte 0x00 0.--7. 1. " ASID ,ASID"
|
|
group c15:0x000A--0x000A
|
|
line.long 0x00 "TLBLR,TLB Lockdown Register"
|
|
bitfld.long 0x00 26.--28. " VICTIM ,Entry in the Lockdown Region" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " P ,Subsequent Hardware Page Table Walks Place a TLB Entry" "Set associative,Lockdown TLB"
|
|
textline " "
|
|
group c15:0x002A--0x002A
|
|
line.long 0x00 "PMRRR,Primary Memory Region Remap Register"
|
|
bitfld.long 0x00 19. " RSA1N ,Shareable Attribute Remap when S=1 for Normal Regions" "Remapped,Not remapped"
|
|
bitfld.long 0x00 18. " RSA0N ,Shareable Attribute Remap when S=0 for Normal Regions" "Not remapped,Remapped"
|
|
textline " "
|
|
bitfld.long 0x00 17. " RSA1D ,Shareable Attribute Remap when S=1 for Device regions" "Remapped,Not remapped"
|
|
bitfld.long 0x00 16. " RSA0D ,Shareable Attribute Remap when S=0 for Device regions" "Not remapped,Remapped"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " TEX7 ,{TEX[0] C B} = b111 Remap" "Strongly ordered,Device,Normal,UNP"
|
|
bitfld.long 0x00 12.--13. " TEX6 ,{TEX[0] C B} = b110 Remap" "Strongly ordered,Device,Normal,UNP"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " TEX5 ,{TEX[0] C B} = b101 Remap" "Strongly ordered,Device,Normal,UNP"
|
|
bitfld.long 0x00 8.--9. " TEX4 ,{TEX[0] C B} = b100 Remap" "Strongly ordered,Device,Normal,UNP"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " TEX3 ,{TEX[0] C B} = b011 Remap" "Strongly ordered,Device,Normal,UNP"
|
|
bitfld.long 0x00 4.--5. " TEX2 ,{TEX[0] C B} = b010 Remap" "Strongly ordered,Device,Normal,UNP"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " TEX1 ,{TEX[0] C B} = b001 Remap" "Strongly ordered,Device,Normal,UNP"
|
|
bitfld.long 0x00 0.--1. " TEX0 ,{TEX[0] C B} = b000 Remap" "Strongly ordered,Device,Normal,UNP"
|
|
group c15:0x012A--0x012A
|
|
line.long 0x00 "NMRRR,Normal Memory Region Remap Register"
|
|
bitfld.long 0x00 30.--31. " OTEX7 ,Outer Attribute for {TEX[0] C B} = b111 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 28.--29. " OTEX6 ,Outer Attribute for {TEX[0] C B} = b110 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " OTEX5 ,Outer Attribute for {TEX[0] C B} = b101 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 24.--25. " OTEX4 ,Outer Attribute for {TEX[0] C B} = b100 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " OTEX3 ,Outer Attribute for {TEX[0] C B} = b011 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 20.--21. " OTEX2 ,Outer Attribute for {TEX[0] C B} = b010 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " OTEX1 ,Outer Attribute for {TEX[0] C B} = b001 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 16.--17. " OTEX0 ,Outer Attribute for {TEX[0] C B} = b000 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " ITEX7 ,Inner attribute for {TEX[0] C B} = b111 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 12.--13. " ITEX6 ,Inner attribute for {TEX[0] C B} = b110 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " ITEX5 ,Inner attribute for {TEX[0] C B} = b101 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 8.--9. " ITEX4 ,Inner attribute for {TEX[0] C B} = b100 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " ITEX3 ,Inner attribute for {TEX[0] C B} = b011 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 4.--5. " ITEX2 ,Inner attribute for {TEX[0] C B} = b010 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " ITEX1 ,Inner attribute for {TEX[0] C B} = b001 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 0.--1. " ITEX0 ,Inner attribute for {TEX[0] C B} = b000 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate"
|
|
group c15:0x042F--0x042F
|
|
line.long 0x00 "PPMRR,Peripheral Port Memory Remap Register"
|
|
hexmask.long 0x00 12.--31. 0x1000 " BA ,Base address"
|
|
bitfld.long 0x00 0.--4. " SIZE ,Size of the Memory Region That the Peripheral Port is Remapped to" "0KB,Reserved,Reserved,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,?..."
|
|
textline " "
|
|
group c15:0x000D--0x000D
|
|
line.long 0x00 "FCSEPID,FCSE PID Register"
|
|
hexmask.long.byte 0x0 25.--31. 0x1 " FCSEPID ,FCSE PID"
|
|
group c15:0x010D--0x010D
|
|
line.long 0x00 "CONTEXT,Context ID Register"
|
|
hexmask.long.tbyte 0x00 08.--31. 1. " PROCID ,Process ID Value"
|
|
hexmask.long.byte 0x00 00.--07. 1. " ASID , ASID Value"
|
|
group c15:0x020D--0x020D
|
|
line.long 0x00 "URWTPIDR,User Read/Write Thread and Process ID Register"
|
|
group c15:0x030D--0x030D
|
|
line.long 0x00 "UROTPIDR,User Read Only Thread and Process ID Register"
|
|
group c15:0x040D--0x040D
|
|
line.long 0x00 "UPOTPIDR,User Privileged Only Thread and Process ID"
|
|
tree.end
|
|
width 0x7
|
|
tree "Cache Control and Configuration"
|
|
group c15:0x0009--0x0009
|
|
line.long 0x00 "DCLR,Data Cache Lockdown Register"
|
|
bitfld.long 0x00 07. " L7 ,Cache Way Lock" "Unlocked,Locked"
|
|
bitfld.long 0x00 06. " L6 ,Cache Way Lock" "Unlocked,Locked"
|
|
bitfld.long 0x00 05. " L5 ,Cache Way Lock" "Unlocked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 04. " L4 ,Cache Way Lock" "Unlocked,Locked"
|
|
bitfld.long 0x00 03. " L3 ,Cache Way Lock" "Unlocked,Locked"
|
|
bitfld.long 0x00 02. " L2 ,Cache Way Lock" "Unlocked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 01. " L1 ,Cache Way Lock" "Unlocked,Locked"
|
|
bitfld.long 0x00 00. " L0 ,Cache Way Lock" "Unlocked,Locked"
|
|
group c15:0x0109--0x0109
|
|
line.long 0x00 "ICLR,Instruction Cache Lockdown Register"
|
|
bitfld.long 0x00 07. " L7 ,Cache Way Lock" "Unlocked,Locked"
|
|
bitfld.long 0x00 06. " L6 ,Cache Way Lock" "Unlocked,Locked"
|
|
bitfld.long 0x00 05. " L5 ,Cache Way Lock" "Unlocked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 04. " L4 ,Cache Way Lock" "Unlocked,Locked"
|
|
bitfld.long 0x00 03. " L3 ,Cache Way Lock" "Unlocked,Locked"
|
|
bitfld.long 0x00 02. " L2 ,Cache Way Lock" "Unlocked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 01. " L1 ,Cache Way Lock" "Unlocked,Locked"
|
|
bitfld.long 0x00 00. " L0 ,Cache Way Lock" "Unlocked,Locked"
|
|
group c15:0x0089--0x0089
|
|
line.long 0x00 "CBOR,Cache Behavior Override Register"
|
|
bitfld.long 0x00 5. " S_WT ,Write-Through Behavior for Regions Marked as Secure Write-Back" "Not forced,Forced"
|
|
bitfld.long 0x00 4. " S_IL ,Instruction Cache Linefill Behavior for Secure Regions" "Enabled,Disabled"
|
|
bitfld.long 0x00 3. " S_DL ,Data Cache Linefill Behavior for Secure Regions" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " NS_WT ,Write-Through Behavior for Regions Marked as Non-Secure Write-Back" "Not forced,Forced"
|
|
bitfld.long 0x00 1. " NS_IL ,Instruction Cache Linefill Behavior for Non-Secure Regions" "Enabled,Disabled"
|
|
bitfld.long 0x00 0. " NS_DL ,Data Cache Linefill Behavior for Non-Secure Regions" "Enabled,Disabled"
|
|
tree.end
|
|
width 0xB
|
|
tree "TCM Control and Configuration"
|
|
rgroup c15:0x0200--0x0200
|
|
line.long 0x00 "TCMS,TCM Status Register"
|
|
bitfld.long 0x00 16.--18. " DTCM ,Number of Data TCM Banks Implemented" "0 Data,1 Data,2 Data,?..."
|
|
bitfld.long 0x00 0.--2. " ITCM ,Number of Instruction TCM Banks Implemented" "0 Instruction,1 Instruction,2 Instruction,?..."
|
|
group c15:0x0019--0x0019
|
|
line.long 0x00 "DTCMR,Data TCM Region Register"
|
|
hexmask.long 0x00 12.--31. 0x1000 " BA ,Base address"
|
|
bitfld.long 0x00 2.--6. " SIZE ,Size of the TCM on Reads" "0KB,Reserved,Reserved,4KB,8KB,16KB,32KB,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,TCM Enable" "Disabled,Enabled"
|
|
group c15:0x0119--0x0119
|
|
line.long 0x00 "ITCMR,Instruction TCM Region Register"
|
|
hexmask.long 0x00 12.--31. 0x1000 " BA ,Base address"
|
|
bitfld.long 0x00 2.--6. " SIZE ,Size of the TCM on Reads" "0KB,Reserved,Reserved,4KB,8KB,16KB,32KB,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,TCM Enable" "Disabled,Enabled"
|
|
group c15:0x0219--0x0219
|
|
line.long 0x00 "DTCMNSACR,Data TCM Non-Secure Access Control Register"
|
|
bitfld.long 0x00 0. " NSA ,NS access" "Secure,Secure and Non-Secure"
|
|
group c15:0x0319--0x0319
|
|
line.long 0x00 "ITCMNSACR,Instruction TCM Non-Secure Access Control Register"
|
|
bitfld.long 0x00 0. " NSA ,NS access" "Secure,Secure and Non-Secure"
|
|
group c15:0x0029--0x0029
|
|
line.long 0x00 "TCMSR,TCM Selection Register"
|
|
bitfld.long 0x00 0.--1. " TCMN ,TCM number" "TCM 0,TCM 1,Ignored,Ignored"
|
|
tree.end
|
|
width 0xD
|
|
tree "DMA Control"
|
|
rgroup c15:0x010B--0x010B
|
|
line.long 0x00 "DMAISR1,DMA Identification and Status Register 1"
|
|
bitfld.long 0x00 1. " CH1 ,Information on DMA Channel 1 Functions" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CH0 ,Information on DMA Channel 0 Functions" "Disabled,Enabled"
|
|
rgroup c15:0x020B--0x020B
|
|
line.long 0x00 "DMAISR2,DMA Identification and Status Register 2"
|
|
bitfld.long 0x00 1. " CH1 ,Information on DMA Channel 1 Functions" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CH0 ,Information on DMA Channel 0 Functions" "Disabled,Enabled"
|
|
rgroup c15:0x030B--0x030B
|
|
line.long 0x00 "DMAISR3,DMA Identification and Status Register 3"
|
|
bitfld.long 0x00 1. " CH1 ,Information on DMA Channel 1 Functions" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CH0 ,Information on DMA Channel 0 Functions" "Disabled,Enabled"
|
|
wgroup c15:0x023B--0x023B
|
|
line.long 0x00 "DMAER_Clear,DMA Enable Register Clear"
|
|
group c15:0x002B--0x002B
|
|
line.long 0x00 "DMACNR,DMA Channel Number Register"
|
|
bitfld.long 0x00 0. " CN ,DMA Channel Select" "Channel 0,Channel 1"
|
|
rgroup c15:0x008B--0x008B
|
|
line.long 0x00 "DMACSR,DMA Channel Status Register"
|
|
bitfld.long 0x00 16. " ESX[0] ,Add a SLVERR or DECERR Qualifier to the ES Encoding" "DECERR,SLVERR"
|
|
bitfld.long 0x00 13. " ISX[0] ,Add a SLVERR or DECERR Qualifier to the IS Encoding" "DECERR,SLVERR"
|
|
textline " "
|
|
bitfld.long 0x00 12. " BP ,DMA Parameters Type" "Acceptable,Conditioned inappropriately"
|
|
textline " "
|
|
bitfld.long 0x00 7.--11. " ES ,Status of the External Address Error" "No error,No error,No error,No error,No error,No error,No error,No error,Reserved,Unshared data error,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Access Bit fault on section,Reserved,Translation fault section,Access Bit fault on page,Translation fault page,Reserved,Domain fault section,External Abort can be imprecise,Domain fault page,External Abort on first-level,Permission fault section,External Abort on second-level,Permission fault page"
|
|
textline " "
|
|
bitfld.long 0x00 2.--6. " IS ,Status of the Internal Address Error" "No error,No error,No error,No error,No error,No error,No error,No error,TCM out of range,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Access Bit fault on section,Reserved,Translation fault section,Access Bit fault on page,Translation fault page,Reserved,Domain fault section,Reserved,Domain fault page,External Abort on first-level,Permission fault section,External Abort on second-level,Permission fault page"
|
|
bitfld.long 0x00 0.--1. " STATUS ,Status of the DMA channel" "Idle,Queued,Running,Complete or Error"
|
|
group c15:0x00FB--0x00FB
|
|
line.long 0x00 "DMACIDR,DMA Context ID Register"
|
|
hexmask.long.tbyte 0x00 8.--31. 1. " PROCID ,ASID Extend to Form the Process ID and Identify the Current Process"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ASID ,ASID of the Current Process"
|
|
group c15:0x004B--0x004B
|
|
line.long 0x00 "DMACR,DMA Control Register"
|
|
bitfld.long 0x00 31. " TR ,Target TCM Select" "Data,Instruction"
|
|
bitfld.long 0x00 30. " DT ,Direction of Transfer Select" "Level 2 memory-TCM,TCM-level 2 memory"
|
|
textline " "
|
|
bitfld.long 0x00 29. " IC ,Interrupt on Completion" "No Interrupt,Interrupt"
|
|
bitfld.long 0x00 28. " IE ,Interrupt on Error" "No Interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 27. " FT ,This bit has no effect" "Low,High"
|
|
bitfld.long 0x00 26. " UM ,User Mode Transfer" "Privileged,User"
|
|
textline " "
|
|
hexmask.long.word 0x00 8.--19. 1. " ST ,The Increment Value on the External Address"
|
|
bitfld.long 0x00 0.--1. " TS ,Size of DMA Channel Transactions" "Byte,Halfword,Word,Doubleword"
|
|
wgroup c15:0x003B--0x003B
|
|
line.long 0x00 "DMAER_Stop,DMA Enable Register Stop"
|
|
wgroup c15:0x013B--0x013B
|
|
line.long 0x00 "DMAER_Start,DMA Enable Register Start"
|
|
group c15:0x006B--0x006B
|
|
line.long 0x00 "DMAESAR,DMA External Start Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " ESVA ,External Start VA"
|
|
rgroup c15:0x000B--0x000B
|
|
line.long 0x00 "DMAISR0,DMA Identification and Status Register 0"
|
|
bitfld.long 0x00 1. " CH1 ,Information on DMA Channel 1 Functions" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CH0 ,Information on DMA Channel 0 Functions" "Disabled,Enabled"
|
|
group c15:0x007B--0x007B
|
|
line.long 0x00 "DMAIEAR,DMA Internal End Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " IEVA ,Internal End VA"
|
|
group c15:0x005B--0x005B
|
|
line.long 0x00 "DMAISAR,DMA Internal Start Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " ISVA ,Internal Start VA"
|
|
group c15:0x001B--0x001B
|
|
line.long 0x00 "DMAUAR,DMA User Accessibility Register"
|
|
bitfld.long 0x00 1. " U1 ,User Mode Process Access the Registers for Channel 1" "Not accessed,Accessed"
|
|
bitfld.long 0x00 0. " U0 ,User Mode Process Access the Registers for Channel 0" "Not accessed,Accessed"
|
|
tree.end
|
|
width 0x6
|
|
tree "System Performance Monitor"
|
|
group c15:0x00CF--0x00CF
|
|
line.long 0x00 "PMCR,Performance Monitor Control Register"
|
|
hexmask.long.byte 0x00 20.--27. 1. " EVTCOUNT0 ,Source of Events for Count Register 0"
|
|
hexmask.long.byte 0x00 12.--19. 1. " EVTCOUNT1 ,Source of Events for Count Register 1"
|
|
bitfld.long 0x00 11. " X ,Export of the Events to the Event Bus to an External Monitoring Block Enable" "Disabled,Enabled"
|
|
textline " "
|
|
eventfld.long 0x00 10. " CCR ,Cycle Counter Register overflow flag" "No overflow,Overflow"
|
|
eventfld.long 0x00 9. " CR1 ,Count Register 1 overflow flag" "No overflow,Overflow"
|
|
eventfld.long 0x00 8. " CR0 ,Count Register 0 overflow flag" "No overflow,Overflow"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ECC ,Cycle Counter Interrupt Reporting Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EC1 ,Count Register 1 Interrupt Reporting Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " EC0 ,Count Register 0 Interrupt Reporting Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " D ,Cycle Count Divider" "Every cycle,Every 64th cycle"
|
|
bitfld.long 0x00 2. " C ,Cycle Counter Register Reset" "No action,Reset"
|
|
bitfld.long 0x00 1. " P ,Count Register 1 and Count Register 0 Reset" "No action,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 0. " E ,All Counters Enable" "Disabled,Enabled"
|
|
group c15:0x02CF--0x02CF
|
|
line.long 0x00 "CR0,Count Register 0"
|
|
hexmask.long 0x00 0.--31. 1. " CV ,Count value"
|
|
group c15:0x03CF--0x03CF
|
|
line.long 0x00 "CR1,Count Register 1"
|
|
hexmask.long 0x00 0.--31. 1. " CV ,Count value"
|
|
group c15:0x01CF--0x01CF
|
|
line.long 0x00 "CCR,Cycle Counter Register"
|
|
hexmask.long 0x00 0.--31. 1. " CV ,Count value"
|
|
tree.end
|
|
width 0xB
|
|
tree "System Validation"
|
|
group c15:0x009F--0x009F
|
|
line.long 0x00 "SUNSAVCR,Secure User and Non-Secure Access Validation Control Register"
|
|
bitfld.long 0x00 0. " V ,Access to System Validation Registers from User and Non-Secure Modes Control" "Secure privileged/privileged,Any"
|
|
group c15:0x04CF--0x04CF
|
|
line.long 0x00 "SVC0_RC,Reset Counter"
|
|
hexmask.long.byte 0x00 0.--5. 1. " CV ,Counter value"
|
|
group c15:0x05CF--0x05CF
|
|
line.long 0x00 "SVC1_IC,Interrupt Counter"
|
|
hexmask.long.byte 0x00 0.--5. 1. " CV ,Counter value"
|
|
group c15:0x06CF--0x06CF
|
|
line.long 0x00 "SVC2_FIC,Fast Interrupt Counter"
|
|
hexmask.long.byte 0x00 0.--5. 1. " CV ,Counter value"
|
|
group c15:0x07CF--0x07CF
|
|
line.long 0x00 "SVC3_EDRC,External Debug Request Counter"
|
|
hexmask.long.byte 0x00 0.--5. 1. " CV ,Counter value"
|
|
group c15:0x00EF--0x00EF
|
|
line.long 0x00 "SVCSM,System Validation Cache Size Mask"
|
|
bitfld.long 0x00 31. " WE ,Write enable" "Not changed,Changed"
|
|
bitfld.long 0x00 12.--14. " DTCM ,Apparent Size of Data TCM and Apparent Number of Data TCM Banks" "Not present,Reserved,Reserved,1 bank 4KB,2 banks 4KB,2 banks 8KB,2 banks 16KB,2 banks 32KB"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " ITCM ,Apparent Size of Instruction TCM and Apparent Number of Instruction TCM Banks" "Not present,Reserved,Reserved,1 bank 4KB,2 banks 4KB,2 banks 8KB,2 banks 16KB,2 banks 32KB"
|
|
bitfld.long 0x00 4.--6. " DCACHE ,Apparent Size of Data Cache" "Reserved,Reserved,Reserved,4KB,8KB,16KB,32KB,64KB"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " ICACHE ,Apparent Size of Instruction Cache" "Reserved,Reserved,Reserved,4KB,8KB,16KB,32KB,64KB"
|
|
width 0xC
|
|
tree.open "System Validations"
|
|
tree "System Validation Operations 0-15"
|
|
wgroup c15:0x00DF--0x00DF
|
|
line.long 0x00 "SV0,System Validation Operations 0"
|
|
wgroup c15:0x01DF--0x01DF
|
|
line.long 0x00 "SV1_SRC,Start Reset Counter"
|
|
wgroup c15:0x02DF--0x02DF
|
|
line.long 0x00 "SV2_SIC,Start Interrupt Counter"
|
|
wgroup c15:0x03DF--0x03DF
|
|
line.long 0x00 "SV3_SRIC,Start Reset and Interrupt Counters"
|
|
wgroup c15:0x04DF--0x04DF
|
|
line.long 0x00 "SV4_SFIC,Start Fast Interrupt Counter"
|
|
wgroup c15:0x05DF--0x05DF
|
|
line.long 0x00 "SV5_SRFIC,Start Reset and Fast Interrupt Counters"
|
|
wgroup c15:0x06DF--0x06DF
|
|
line.long 0x00 "SV6_SIFIC,Start Interrupt and Fast Interrupt Counters"
|
|
wgroup c15:0x07DF--0x07DF
|
|
line.long 0x00 "SV7_SRIFIC,Start Reset/Interrupt and Fast Interrupt Counters"
|
|
wgroup c15:0x10DF--0x10DF
|
|
line.long 0x00 "SV8_SEDRC,Start External Debug Request Counter"
|
|
wgroup c15:0x11DF--0x11DF
|
|
line.long 0x00 "SV9_SEDRC,Start External Debug Request Counter"
|
|
wgroup c15:0x12DF--0x12DF
|
|
line.long 0x00 "SV10_SEDRC,Start External Debug Request Counter"
|
|
wgroup c15:0x13DF--0x13DF
|
|
line.long 0x00 "SV11_SEDRC,Start External Debug Request Counter"
|
|
wgroup c15:0x14DF--0x14DF
|
|
line.long 0x00 "SV12_SEDRC,Start External Debug Request Counter"
|
|
wgroup c15:0x15DF--0x15DF
|
|
line.long 0x00 "SV13_SEDRC,Start External Debug Request Counter"
|
|
wgroup c15:0x16DF--0x16DF
|
|
line.long 0x00 "SV14_SEDRC,Start External Debug Request Counter"
|
|
wgroup c15:0x17DF--0x17DF
|
|
line.long 0x00 "SV15_SEDRC,Start External Debug Request Counter"
|
|
tree.end
|
|
width 0xD
|
|
tree "System Validation Operations 16-31"
|
|
wgroup c15:0x20DF--0x20DF
|
|
line.long 0x00 "SV16,System Validation Operations 16"
|
|
wgroup c15:0x21DF--0x21DF
|
|
line.long 0x00 "SV17_SRC,Stop Reset Counter"
|
|
wgroup c15:0x22DF--0x22DF
|
|
line.long 0x00 "SV18_SIC,Stop Interrupt Counter"
|
|
wgroup c15:0x23DF--0x23DF
|
|
line.long 0x00 "SV19_SRIC,Stop Reset and Interrupt Counters"
|
|
wgroup c15:0x24DF--0x24DF
|
|
line.long 0x00 "SV20_SFIC,Stop Fast Interrupt Counter"
|
|
wgroup c15:0x25DF--0x25DF
|
|
line.long 0x00 "SV21_SRFIC,Stop Reset and Fast Interrupt Counters"
|
|
wgroup c15:0x26DF--0x26DF
|
|
line.long 0x00 "SV22_SIFIC,Stop Interrupt and Fast Interrupt Counters"
|
|
wgroup c15:0x27DF--0x27DF
|
|
line.long 0x00 "SV23_SRIFIC,Stop Reset/Interrupt and Fast Interrupt Counters"
|
|
wgroup c15:0x30DF--0x30DF
|
|
line.long 0x00 "SV24_SEDRC,Stop External Debug Request Counter"
|
|
wgroup c15:0x31DF--0x31DF
|
|
line.long 0x00 "SV25_SEDRC,Stop External Debug Request Counter"
|
|
wgroup c15:0x32DF--0x32DF
|
|
line.long 0x00 "SV26_SEDRC,Stop External Debug Request Counter"
|
|
wgroup c15:0x33DF--0x33DF
|
|
line.long 0x00 "SV27_SEDRC,Stop External Debug Request Counter"
|
|
wgroup c15:0x34DF--0x34DF
|
|
line.long 0x00 "SV28_SEDRC,Stop External Debug Request Counter"
|
|
wgroup c15:0x35DF--0x35DF
|
|
line.long 0x00 "SV29_SEDRC,Stop External Debug Request Counter"
|
|
wgroup c15:0x36DF--0x36DF
|
|
line.long 0x00 "SV30_SEDRC,Stop External Debug Request Counter"
|
|
wgroup c15:0x37DF--0x37DF
|
|
line.long 0x00 "SV31_SEDRC,Stop External Debug Request Counter"
|
|
tree.end
|
|
width 0x6
|
|
tree "System Validation Operations 32-47"
|
|
wgroup c15:0x40DF--0x40DF
|
|
line.long 0x00 "SV32,System Validation Operations 32"
|
|
wgroup c15:0x41DF--0x41DF
|
|
line.long 0x00 "SV33,System Validation Operations 33"
|
|
wgroup c15:0x42DF--0x42DF
|
|
line.long 0x00 "SV34,System Validation Operations 34"
|
|
wgroup c15:0x43DF--0x43DF
|
|
line.long 0x00 "SV35,System Validation Operations 35"
|
|
wgroup c15:0x44DF--0x44DF
|
|
line.long 0x00 "SV36,System Validation Operations 36"
|
|
wgroup c15:0x45DF--0x45DF
|
|
line.long 0x00 "SV37,System Validation Operations 37"
|
|
wgroup c15:0x46DF--0x46DF
|
|
line.long 0x00 "SV38,System Validation Operations 38"
|
|
wgroup c15:0x47DF--0x47DF
|
|
line.long 0x00 "SV39,System Validation Operations 39"
|
|
wgroup c15:0x50DF--0x50DF
|
|
line.long 0x00 "SV40,System Validation Operations 40"
|
|
wgroup c15:0x51DF--0x51DF
|
|
line.long 0x00 "SV41,System Validation Operations 41"
|
|
wgroup c15:0x52DF--0x52DF
|
|
line.long 0x00 "SV42,System Validation Operations 42"
|
|
wgroup c15:0x53DF--0x53DF
|
|
line.long 0x00 "SV43,System Validation Operations 43"
|
|
wgroup c15:0x54DF--0x54DF
|
|
line.long 0x00 "SV44,System Validation Operations 44"
|
|
wgroup c15:0x55DF--0x55DF
|
|
line.long 0x00 "SV45,System Validation Operations 45"
|
|
wgroup c15:0x56DF--0x56DF
|
|
line.long 0x00 "SV46,System Validation Operations 46"
|
|
wgroup c15:0x57DF--0x57DF
|
|
line.long 0x00 "SV47,System Validation Operations 47"
|
|
tree.end
|
|
tree "System Validation Operations 48-63"
|
|
wgroup c15:0x60DF--0x60DF
|
|
line.long 0x00 "SV48,System Validation Operations 48"
|
|
wgroup c15:0x61DF--0x61DF
|
|
line.long 0x00 "SV49,System Validation Operations 49"
|
|
wgroup c15:0x62DF--0x62DF
|
|
line.long 0x00 "SV50,System Validation Operations 50"
|
|
wgroup c15:0x63DF--0x63DF
|
|
line.long 0x00 "SV51,System Validation Operations 51"
|
|
wgroup c15:0x64DF--0x64DF
|
|
line.long 0x00 "SV52,System Validation Operations 52"
|
|
wgroup c15:0x65DF--0x65DF
|
|
line.long 0x00 "SV53,System Validation Operations 53"
|
|
wgroup c15:0x66DF--0x66DF
|
|
line.long 0x00 "SV54,System Validation Operations 54"
|
|
wgroup c15:0x67DF--0x67DF
|
|
line.long 0x00 "SV55,System Validation Operations 55"
|
|
wgroup c15:0x70DF--0x70DF
|
|
line.long 0x00 "SV56,System Validation Operations 56"
|
|
wgroup c15:0x71DF--0x71DF
|
|
line.long 0x00 "SV57,System Validation Operations 57"
|
|
wgroup c15:0x72DF--0x72DF
|
|
line.long 0x00 "SV58,System Validation Operations 58"
|
|
wgroup c15:0x73DF--0x73DF
|
|
line.long 0x00 "SV59,System Validation Operations 59"
|
|
wgroup c15:0x74DF--0x74DF
|
|
line.long 0x00 "SV60,System Validation Operations 60"
|
|
wgroup c15:0x75DF--0x75DF
|
|
line.long 0x00 "SV61,System Validation Operations 61"
|
|
wgroup c15:0x76DF--0x76DF
|
|
line.long 0x00 "SV62,System Validation Operations 62"
|
|
wgroup c15:0x77DF--0x77DF
|
|
line.long 0x00 "SV63,System Validation Operations 63"
|
|
tree.end
|
|
tree.end
|
|
tree.end
|
|
width 0x9
|
|
tree "Debug Access to Caches and TLB"
|
|
group c15:0x30CF--0x30CF
|
|
line.long 0x00 "DCMVR0,Data Cache Master Valid Register 0"
|
|
group c15:0x31CF--0x31CF
|
|
line.long 0x00 "DCMVR1,Data Cache Master Valid Register 1"
|
|
group c15:0x32CF--0x32CF
|
|
line.long 0x00 "DCMVR2,Data Cache Master Valid Register 2"
|
|
group c15:0x33CF--0x33CF
|
|
line.long 0x00 "DCMVR3,Data Cache Master Valid Register 3"
|
|
group c15:0x34CF--0x34CF
|
|
line.long 0x00 "DCMVR4,Data Cache Master Valid Register 4"
|
|
group c15:0x35CF--0x35CF
|
|
line.long 0x00 "DCMVR5,Data Cache Master Valid Register 5"
|
|
group c15:0x36CF--0x36CF
|
|
line.long 0x00 "DCMVR6,Data Cache Master Valid Register 6"
|
|
group c15:0x37CF--0x37CF
|
|
line.long 0x00 "DCMVR7,Data Cache Master Valid Register 7"
|
|
group c15:0x308F--0x308F
|
|
line.long 0x00 "ICMVR0,Instruction Cache Master Valid Register 0"
|
|
group c15:0x318F--0x318F
|
|
line.long 0x00 "ICMVR1,Instruction Cache Master Valid Register 1"
|
|
group c15:0x328F--0x328F
|
|
line.long 0x00 "ICMVR2,Instruction Cache Master Valid Register 2"
|
|
group c15:0x338F--0x338F
|
|
line.long 0x00 "ICMVR3,Instruction Cache Master Valid Register 3"
|
|
group c15:0x348F--0x348F
|
|
line.long 0x00 "ICMVR4,Instruction Cache Master Valid Register 4"
|
|
group c15:0x358F--0x358F
|
|
line.long 0x00 "ICMVR5,Instruction Cache Master Valid Register 5"
|
|
group c15:0x368F--0x368F
|
|
line.long 0x00 "ICMVR6,Instruction Cache Master Valid Register 6"
|
|
group c15:0x378F--0x378F
|
|
line.long 0x00 "ICMVR7,Instruction Cache Master Valid Register 7"
|
|
group c15:0x527F--0x527F
|
|
line.long 0x00 "TLBLAR,TLB Lockdown Attributes Register"
|
|
bitfld.long 0x00 30.--31. " AP3 ,Sub-page access permissions for the fourth sub-page" "0,1,2,3"
|
|
bitfld.long 0x00 28.--29. " AP2 ,Sub-page access permissions for the third sub-page" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " AP1 ,Sub-page access permissions for the second sub-page" "0,1,2,3"
|
|
bitfld.long 0x00 25. " SPV ,Page Table Entry Sub-Pages Support" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 7.--10. " DOMAIN ,Domain Number for the Page Table Entry" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 6. " XN ,Execute Never Attribute" "Can,Cannot"
|
|
textline " "
|
|
bitfld.long 0x00 0. " S ,Memory Region Shareable" "Not shared,Shared"
|
|
textline " "
|
|
bitfld.long 0x00 1.--5. " TEX_C_B ,TEX[2:0]/C/B Bits" "Strongly ordered,Shared device,Outer/inner Write throught/not allocated,Outer/inner write back/not allocated,Outer/inner noncachable,Reserved,Reserved,Reserved,Non shared device,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Noncachable,Noncachable/write back/allocated,Noncachable/write through/not allocated,Noncachable/write back/not allocated,Write back/allocated/noncachable,Write back/allocated,Write back/through/allocated/not allocated,Write back/allocated/not allocated,Write through/not allocated/noncachable,Write through/back/not allocated/allocated,Write through/not allocated,Write through/back/not allocated,Write back/not allocated/noncachable,Write back/not allocated/allocated,Write back/through/not allocated/,write back/not allocated"
|
|
textline " "
|
|
bitfld.long 0x00 0. " S ,Memory region shareable" "Not shared,Shared"
|
|
group c15:0x524F--0x524F
|
|
line.long 0x00 "TLBLIR,TLB Lockdown Index Register"
|
|
bitfld.long 0x00 0.--2. " Index ,TLB Lockdown Entrie to Read or Write Select" "0,1,2,3,4,5,6,7"
|
|
group c15:0x526F--0x526F
|
|
line.long 0x00 "TLBLPAR,TLB Lockdown PA Register"
|
|
hexmask.long.tbyte 0x00 12.--31. 1. " PA ,PA of This Page Table Entry"
|
|
bitfld.long 0x00 9. " NSA ,Memory Accesses Types" "Secure,Non-Secure"
|
|
textline " "
|
|
bitfld.long 0x00 8. " NSTID ,Page Table Entry Type" "Secure,Non-Secure"
|
|
bitfld.long 0x00 6.--7. " SIZE ,Size of the Memory Region" "16MB supersection,4KB page,64KB page,1M section"
|
|
textline " "
|
|
bitfld.long 0x00 1.--3. " APX/AP ,Access permissions extension bit/Access permissions" "No access,Supervisor RW,Supervisor RW/User R,Full access,No access,Supervisor R,Supervisor/User R,Supervisor/User R"
|
|
bitfld.long 0x00 0. " V ,Page Table Entry Valid" "Not valid,Valid"
|
|
group c15:0x525F--0x525F
|
|
line.long 0x00 "TLBLVAR,TLB Lockdown VA Register"
|
|
hexmask.long.tbyte 0x00 12.--31. 1. " VA ,VA of This Page Table Entry"
|
|
bitfld.long 0x00 9. " G ,Page Table Entry Status" "Application-specific,Global"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " ASID ,ASID for Application-Specific Page Table Entries"
|
|
tree.end
|
|
width 0x7
|
|
tree "Debug"
|
|
rgroup c14:0x0000++0x00
|
|
line.long 0x00 "DIDR,Debug ID Register"
|
|
bitfld.long 0x00 28.--31. " WRP ,Number of Watchpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 24.--27. " BRP ,Number of Breakpoint Register Pairs" "Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 20.--23. " CONTEXT ,Number of Breakpoint Register Pairs with context ID comparison capability" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " VERSION ,Debug architecture version" "Reserved,Reserved,v6.1,?..."
|
|
bitfld.long 0x00 12.--15. " DAR ,Debug architecture revision" "Reserved,TrustZone,?..."
|
|
bitfld.long 0x00 4.--7. " VARIANT ,Implementation-defined variant number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " REVISION ,Implementation-defined revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group c14:0x0010++0x00
|
|
line.long 0x00 "DSCR,Debug Status and Control Register"
|
|
bitfld.long 0x00 30. " RDTRFULL ,The rDTRfull flag" "Empty,Full"
|
|
bitfld.long 0x00 29. " WDTRFULL ,The wDTRfull flag" "Empty,Full"
|
|
bitfld.long 0x00 19. " IDAI ,Imprecise Data Aborts Ignored" "No Debug,DMB operation"
|
|
textline " "
|
|
bitfld.long 0x00 18. " NSWS ,Non-Secure World Status bit" "Secure,Non-Secure"
|
|
bitfld.long 0x00 17. " SPNIDEN ,SPNIDEN Input Pin State" "High,Low"
|
|
bitfld.long 0x00 16. " SPIDEN ,SPNIDEN Input Pin State" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MDME ,The Monitor debug-mode enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " MS ,Mode select bit" "Monitor,Halt"
|
|
bitfld.long 0x00 13. " EARMIE ,Execute ARM instruction enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " UMACCC ,User mode access to comms channel control bit" "Enabled,Disabled"
|
|
bitfld.long 0x00 11. " INT ,Interrupts bit" "Enabled,Disabled"
|
|
bitfld.long 0x00 10. " DBGACK ,DbgAck bit" "No effect,HIGH"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PD ,Powerdown disable" "LOW,HIGH"
|
|
bitfld.long 0x00 8. " SU ,Sticky Undefined bit" "Not occurred,Occurred"
|
|
bitfld.long 0x00 7. " SIDA ,Sticky imprecise Data Aborts bit" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 6. " SPDA ,Sticky precise Data Abort bit" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2.--5. " ME ,Method of entry bits" "Halt DBGTAP,Breakpoint,Watchpoint,BKPT,EDBGRQ,Vector catch,?..."
|
|
bitfld.long 0x00 1. " CR ,Core restarted bit" "Not exited,Exited"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CH ,Core halted bit" "Normal,Debug"
|
|
group c14:0x0070++0x00
|
|
line.long 0x00 "VCR,Vector Catch Register"
|
|
bitfld.long 0x00 31. " FIQ ,Vector Catch Enable - FIQ in Non-Secure world" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " IRQ ,Vector Catch Enable - IRQ in Non-Secure world" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " DA ,Vector Catch Enable - Data Abort in Non-Secure world" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " PA ,Vector Catch Enable - Prefetch Abort in Non-Secure world" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " SVC ,Vector Catch Enable - SVC in Non-Secure world" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " UI ,Vector Catch Enable - Undefined Instruction in Non-Secure world" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FIQ ,Vector Catch Enable - FIQ in Secure world" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " IRQ ,Vector Catch Enable - IRQ in Secure world" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " DA ,Vector Catch Enable - Data Abort in Secure world" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PA ,Vector Catch Enable - Prefetch Abort in Secure World" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " SMC ,Vector Catch Enable - SMC in Secure world" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " FIQ ,Vector Catch Enable - FIQ in Secure world" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " IRQ ,Vector Catch Enable - IRQ in Secure world" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " DA ,Vector Catch Enable - Data Abort in Secure world" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " PA ,Vector Catch Enable - Prefetch Abort in Secure world" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SVC ,Vector Catch Enable - SVC in Secure world" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " UI ,Vector Catch Enable - Undefined Instruction in Secure world" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CE ,Vector Catch Enable - Reset" "Disabled,Enabled"
|
|
group c14:0x00a0++0x00
|
|
line.long 0x00 "DSCCR,Debug State Cache Control Register"
|
|
bitfld.long 0x00 2. " NWT ,Not Write-Through" "Write through,No write through"
|
|
bitfld.long 0x00 1. " NIL ,No Instruction Cache Line-Fill" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " NDL ,No Data/Unified Cache Line-Fill" "Disabled,Enabled"
|
|
group c14:0x00b0++0x00
|
|
line.long 0x00 "DSMCR,Debug State MMU Control Register"
|
|
bitfld.long 0x00 6. " NDMM ,Data/Unified Main TLB match" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " NDML ,Data/Unified Main TLB load" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " NIUM ,Instruction Micro TLB match" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " NDUM ,Data/Unified Micro TLB match" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " NIUL ,Instruction Micro TLB load and flush" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " NDUL ,Data/Unified Micro TLB load and flush" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Breakpoints"
|
|
group c14:0x400++0x00
|
|
line.long 0x00 "BVR0,Breakpoint Value Register 0"
|
|
hexmask.long 0x00 0.--31. 1. " BACID ,Breakpoint address or context ID"
|
|
group c14:0x0500++0x00
|
|
line.long 0x00 "BCR0,Breakpoint Control Register 0"
|
|
bitfld.long 0x00 21.--22. " M ,Meaning of BVR" "IMVA Match,Context ID Match,IMVA Mis-match,?..."
|
|
bitfld.long 0x00 20. " E ,Enable linking" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--19. " LBRP ,Linked BRP number" "BRP0,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " SBM ,Secure breakpoint match" "Secure or Non-Secure,Non-Secure,Secure,?..."
|
|
bitfld.long 0x00 5.--8. " BAS ,Byte address select" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
|
|
bitfld.long 0x00 1.--2. " S ,Supervisor Access" "Reserved,Privileged,User,Either"
|
|
textline " "
|
|
bitfld.long 0x00 0. " B ,Breakpoint enable" "Disabled,Enabled"
|
|
group c14:0x410++0x00
|
|
line.long 0x00 "BVR1,Breakpoint Value Register 1"
|
|
hexmask.long 0x00 0.--31. 1. " BACID ,Breakpoint address or context ID"
|
|
group c14:0x0510++0x00
|
|
line.long 0x00 "BCR1,Breakpoint Control Register 1"
|
|
bitfld.long 0x00 21.--22. " M ,Meaning of BVR" "IMVA Match,Context ID Match,IMVA Mis-match,?..."
|
|
bitfld.long 0x00 20. " E ,Enable linking" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--19. " LBRP ,Linked BRP number" "BRP0,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " SBM ,Secure breakpoint match" "Secure or Non-Secure,Non-Secure,Secure,?..."
|
|
bitfld.long 0x00 5.--8. " BAS ,Byte address select" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
|
|
bitfld.long 0x00 1.--2. " S ,Supervisor Access" "Reserved,Privileged,User,Either"
|
|
textline " "
|
|
bitfld.long 0x00 0. " B ,Breakpoint enable" "Disabled,Enabled"
|
|
group c14:0x420++0x00
|
|
line.long 0x00 "BVR2,Breakpoint Value Register 2"
|
|
hexmask.long 0x00 0.--31. 1. " BACID ,Breakpoint address or context ID"
|
|
group c14:0x0520++0x00
|
|
line.long 0x00 "BCR2,Breakpoint Control Register 2"
|
|
bitfld.long 0x00 21.--22. " M ,Meaning of BVR" "IMVA Match,Context ID Match,IMVA Mis-match,?..."
|
|
bitfld.long 0x00 20. " E ,Enable linking" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--19. " LBRP ,Linked BRP number" "BRP0,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " SBM ,Secure breakpoint match" "Secure or Non-Secure,Non-Secure,Secure,?..."
|
|
bitfld.long 0x00 5.--8. " BAS ,Byte address select" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
|
|
bitfld.long 0x00 1.--2. " S ,Supervisor Access" "Reserved,Privileged,User,Either"
|
|
textline " "
|
|
bitfld.long 0x00 0. " B ,Breakpoint enable" "Disabled,Enabled"
|
|
group c14:0x430++0x00
|
|
line.long 0x00 "BVR3,Breakpoint Value Register 3"
|
|
hexmask.long 0x00 0.--31. 1. " BACID ,Breakpoint address or context ID"
|
|
group c14:0x0530++0x00
|
|
line.long 0x00 "BCR3,Breakpoint Control Register 3"
|
|
bitfld.long 0x00 21.--22. " M ,Meaning of BVR" "IMVA Match,Context ID Match,IMVA Mis-match,?..."
|
|
bitfld.long 0x00 20. " E ,Enable linking" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--19. " LBRP ,Linked BRP number" "BRP0,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " SBM ,Secure breakpoint match" "Secure or Non-Secure,Non-Secure,Secure,?..."
|
|
bitfld.long 0x00 5.--8. " BAS ,Byte address select" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
|
|
bitfld.long 0x00 1.--2. " S ,Supervisor Access" "Reserved,Privileged,User,Either"
|
|
textline " "
|
|
bitfld.long 0x00 0. " B ,Breakpoint enable" "Disabled,Enabled"
|
|
group c14:0x440++0x00
|
|
line.long 0x00 "BVR4,Breakpoint Value Register 4"
|
|
hexmask.long 0x00 0.--31. 1. " BACID ,Breakpoint address or context ID"
|
|
group c14:0x0540++0x00
|
|
line.long 0x00 "BCR4,Breakpoint Control Register 4"
|
|
bitfld.long 0x00 21.--22. " M ,Meaning of BVR" "IMVA Match,Context ID Match,IMVA Mis-match,?..."
|
|
bitfld.long 0x00 20. " E ,Enable linking" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--19. " LBRP ,Linked BRP number" "BRP0,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " SBM ,Secure breakpoint match" "Secure or Non-Secure,Non-Secure,Secure,?..."
|
|
bitfld.long 0x00 5.--8. " BAS ,Byte address select" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
|
|
bitfld.long 0x00 1.--2. " S ,Supervisor Access" "Reserved,Privileged,User,Either"
|
|
textline " "
|
|
bitfld.long 0x00 0. " B ,Breakpoint enable" "Disabled,Enabled"
|
|
group c14:0x450++0x00
|
|
line.long 0x00 "BVR5,Breakpoint Value Register 5"
|
|
hexmask.long 0x00 0.--31. 1. " BACID ,Breakpoint address or context ID"
|
|
group c14:0x0550++0x00
|
|
line.long 0x00 "BCR5,Breakpoint Control Register 5"
|
|
bitfld.long 0x00 21.--22. " M ,Meaning of BVR" "IMVA Match,Context ID Match,IMVA Mis-match,?..."
|
|
bitfld.long 0x00 20. " E ,Enable linking" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--19. " LBRP ,Linked BRP number" "BRP0,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " SBM ,Secure breakpoint match" "Secure or Non-Secure,Non-Secure,Secure,?..."
|
|
bitfld.long 0x00 5.--8. " BAS ,Byte address select" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
|
|
bitfld.long 0x00 1.--2. " S ,Supervisor Access" "Reserved,Privileged,User,Either"
|
|
textline " "
|
|
bitfld.long 0x00 0. " B ,Breakpoint enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Watchpoints"
|
|
group c14:0x0600++0x00
|
|
line.long 0x00 "WVR0,Watchpoint Value Register 0"
|
|
hexmask.long 0x00 0.--31. 1. " WA ,Watchpoint address"
|
|
group c14:0x0700++0x00
|
|
line.long 0x00 "WCR0,Watchpoint Control Register 0"
|
|
bitfld.long 0x00 20. " E ,Enable linking bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--19. " LBRP ,Linked BRP" "BRP0,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x00 14.--15. " SWM ,Secure watchpoint match" "Secure or Non-Secure,Non-Secure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x00 5.--8. " BAS ,Byte address select" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
|
|
bitfld.long 0x00 3.--4. " L/S ,Load/store access" "Reserved,Load,Store,Either"
|
|
bitfld.long 0x00 1.--2. " S ,Supervisor Access" "Reserved,Privileged,User,Either"
|
|
textline " "
|
|
bitfld.long 0x00 0. " W ,Watchpoint enable" "Disabled,Enabled"
|
|
group c14:0x0610++0x00
|
|
line.long 0x00 "WVR1,Watchpoint Value Register 1"
|
|
hexmask.long 0x00 0.--31. 1. " WA ,Watchpoint address"
|
|
group c14:0x0710++0x00
|
|
line.long 0x00 "WCR1,Watchpoint Control Register 1"
|
|
bitfld.long 0x00 20. " E ,Enable linking bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--19. " LBRP ,Linked BRP" "BRP0,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
bitfld.long 0x00 14.--15. " SWM ,Secure watchpoint match" "Secure or Non-Secure,Non-Secure,Secure,?..."
|
|
textline " "
|
|
bitfld.long 0x00 5.--8. " BAS ,Byte address select" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
|
|
bitfld.long 0x00 3.--4. " L/S ,Load/store access" "Reserved,Load,Store,Either"
|
|
bitfld.long 0x00 1.--2. " S ,Supervisor Access" "Reserved,Privileged,User,Either"
|
|
textline " "
|
|
bitfld.long 0x00 0. " W ,Watchpoint enable" "Disabled,Enabled"
|
|
group c14:0x0060++0x00
|
|
line.long 0x00 "WFAR,Watchpoint Fault Address Register"
|
|
tree.end
|
|
width 0xB
|
|
tree.end
|
|
tree "SRC (System and Reset Controller)"
|
|
base asd:0x101e0000
|
|
width 15.
|
|
group.long 0x00++0x17
|
|
line.long 0x00 "SRC_CR,SRC System Control Register Register"
|
|
bitfld.long 0x00 30.--31. " DCLK_SOURCE ,Select one of the four possible input source of DCLK" "PLL1PHIB,PLL1PHIC,PLL2PHIA,PLL2PHIB"
|
|
bitfld.long 0x00 29. " T7ENSEL ,Timer 7 timing reference clock select" "REFCLK,MXTALCLK/8"
|
|
textline " "
|
|
bitfld.long 0x00 28. " HCLK_SOURCE ,Select one of the two possible input source for HCLK" "PLL1PHIB,PLL1PHIC"
|
|
bitfld.long 0x00 27. " T6ENSEL ,Timer 6 timing reference clock select" "REFCLK,MXTALCLK/8"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PLL1PB0 ,Select divide factor of VCO clock internal to PLL1" "Div by 3,Div by 5"
|
|
bitfld.long 0x00 25. " T5ENSEL ,Timer 5 timing reference clock select" "REFCLK,MXTALCLK/8"
|
|
textline " "
|
|
bitfld.long 0x00 24. " PLL2PB0 ,Select divide factor of VCO clock internal to PLL2" "Div by 3,Div by 5"
|
|
bitfld.long 0x00 23. " T4ENSEL ,Timer 4 timing reference clock select" "REFCLK,MXTALCLK/8"
|
|
textline " "
|
|
bitfld.long 0x00 22. " RTTCLKEN ,RTT Clock Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " T3ENSEL ,Timer 3 timing reference clock select" "REFCLK,MXTALCLK/8"
|
|
textline " "
|
|
bitfld.long 0x00 19. " T2ENSEL ,Timer 2 timing reference clock select" "REFCLK,MXTALCLK/8"
|
|
bitfld.long 0x00 17. " T1ENSEL ,Timer 1 timing reference clock select" "REFCLK,MXTALCLK/8"
|
|
textline " "
|
|
bitfld.long 0x00 15. " T0ENSEL ,Timer 0 timing reference clock select" "REFCLK,MXTALCLK/8"
|
|
bitfld.long 0x00 12. " DCLK_SYNC ,Select the DCLK source synchronous (HCLK) or asynchronous" "Asynchronous,Synchronous"
|
|
textline " "
|
|
bitfld.long 0x00 11. " FSTARTNBST ,Status of fast start bypass option" "Bypassed,Not bypassed"
|
|
bitfld.long 0x00 9. " RMAPSTAT ,Remap Status request" "Not remapped,Remapped"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RMAPCLR ,Remap Clear request" "Not cleared,Cleared"
|
|
bitfld.long 0x00 7. " BATSTA ,BATOK status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3.--6. " MODESTATUS ,Mode Status" "SLEEP,DOZE,SLOW,XTAL CTL,NORMAL,Reserved,PLL CTL,Reserved,Reserved,SW from XTAL,SW from PLL,SW to XTAL,Reserved,Reserved,SW to PLL,?..."
|
|
bitfld.long 0x00 2. " NORMAL ,NORMAL Mode Control" "Cleared,Set"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SLOW ,SLOW Mode Control" "Cleared,Set"
|
|
bitfld.long 0x00 0. " DOZE ,DOZE Mode Control" "Cleared,Set"
|
|
line.long 0x04 "SRC_IMCR,SRC System Controller Interrupt Mode Control Register"
|
|
bitfld.long 0x04 7. " PLL2IM ,PLL2 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 6. " PLL1IM ,PLL1 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 5. " ITMDPRI ,Interrupt mode priority enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " ITMDTYPE ,Interrupt mode type" "FIQ,FIQ & IRQ"
|
|
textline " "
|
|
bitfld.long 0x04 1.--3. " ITMDCR ,Interrupt mode control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 0. " ITMDEN ,Interrupt mode enable" "Disabled,Enabled"
|
|
line.long 0x08 "SRC_IMSR,SRC System Controller Interrupt Mode Status Register"
|
|
bitfld.long 0x08 2. " PLL2MIS ,PLL2 Unlock Masked Interrupt status" "Locked,Unlocked"
|
|
bitfld.long 0x08 1. " PLL1MIS ,PLL1 Unlock Masked Interrupt status" "Locked,Unlocked"
|
|
textline " "
|
|
bitfld.long 0x08 0. " ITMDSTAT ,Interrupt mode status" "Locked,Unlocked"
|
|
line.long 0x0c "SRC_XTALCR,SRC Crystal Control Register"
|
|
bitfld.long 0x0c 22. " FORCE_32KOUT ,Force enable the clock in deep sleep mode" "Disabled,Enabled"
|
|
bitfld.long 0x0c 21. " FSTART ,Fast boot by MXTALI/2 clock" "32 KHz,MXTALI/2"
|
|
textline " "
|
|
bitfld.long 0x0c 20. " XTALTIMEN ,Crystal lock Timer enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 19. " SXTALDIS ,32KHz crystal enable bit" "Enabled,Disabled"
|
|
textline " "
|
|
hexmask.long.word 0x0c 3.--18. 1. " MXTALTIME ,Main Crystal time out count"
|
|
bitfld.long 0x0c 2. " MXTALSTAT ,Main Crystal status bit" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " MXTALEN ,Main Crystal enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x0c 0. " MXTALOVER ,Crystal control override" "Disabled,Enabled"
|
|
line.long 0x10 "SRC_PLLCR,SRC PLL Control Register"
|
|
bitfld.long 0x10 30. " PLLTIMEN ,PLL lock Timer enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x10 29. " PLL2STAT ,PLL2 status bit" "Not stable,Stable"
|
|
textline " "
|
|
bitfld.long 0x10 28. " PLL2EN ,PLL2 enable bit" "Stopped,Running"
|
|
hexmask.long 0x10 3.--27. 1. " PLL1TIME ,PLL1 time out count"
|
|
textline " "
|
|
bitfld.long 0x10 2. " PLL1STAT ,PLL1 status bit" "Not stable,Stable"
|
|
bitfld.long 0x10 1. " PLL1EN ,PLL1 status bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 0. " PLL1OVER ,PLL1 control override" "Disabled,Enabled"
|
|
line.long 0x14 "SRC_PLLFR,SRC PLL Frequency Register"
|
|
hexmask.long.byte 0x14 24.--30. 1. " PLL2NMUL ,PLL2 multiply factor"
|
|
bitfld.long 0x14 16. " PLL2PDIV ,PLL2 post-divisor factor" "208 MHz/104 MHz/78 MHz/48 MHz,216 MHz/108 MHz/72 MHz/48 MHz"
|
|
textline " "
|
|
hexmask.long.byte 0x14 8.--14. 1. " PLL1NMUL ,PLL1 multiply factor"
|
|
bitfld.long 0x14 0.--2. " PLL1PDIV ,PLL1 post-divisor factor" "0,1,2,3,4,5,6,7"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "SRC_RSTSR,SRC Reset Status Register"
|
|
bitfld.long 0x00 6. " REMAP1 ,REMAP1 latched value" "Low,High"
|
|
bitfld.long 0x00 5. " REMAP0 ,REMAP0 latched value" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SLEEP ,Sleep Reset status bit" "Not generated,Generated"
|
|
bitfld.long 0x00 3. " SOFTRST ,Soft Reset status bit" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x00 2. " WDTRST ,Watchdog Reset status bit" "Not generated,Generated"
|
|
bitfld.long 0x00 0. " PORRST ,Power On Reset status bit" "Not generated,Generated"
|
|
width 15.
|
|
wgroup.long 0x24++0x07
|
|
line.long 0x00 "SRC_PCKEN0,SRC Peripheral Clock Enable Register 0"
|
|
bitfld.long 0x00 30. " PERCKEN30 ,USBPHY Amba clock (HCLKUSBPHY)" "No effect,Enabled"
|
|
bitfld.long 0x00 29. " PERCKEN29 ,AC97 Amba clock (HCLKAC97)" "No effect,Enabled"
|
|
bitfld.long 0x00 28. " PERCKEN28 ,JPEG decoder Amba clock (HCLKJPEG)" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " PERCKEN27 ,Video Input Capture Amba clock (HCLKVIP)" "No effect,Enabled"
|
|
bitfld.long 0x00 26. " PERCKEN26 ,Graphics Accelator Amba clock (HCLKGAE)" "No effect,Enabled"
|
|
bitfld.long 0x00 21. " PERCKEN21 ,MSP2 Amba clock (PCLKMSP2)" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " PERCKEN20 ,MSP1 Amba clock (PCLKMSP1)" "No effect,Enabled"
|
|
bitfld.long 0x00 19. " PERCKEN19 ,UART2 Amba clock (PCLKUART2)" "No effect,Enabled"
|
|
bitfld.long 0x00 14. " PERCKEN14 ,DDR controller Pad side clock (DCLK)" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " PERCKEN13 ,USBOTG Amba clock (HCLKUSBOTG)" "No effect,Enabled"
|
|
bitfld.long 0x00 12. " PERCKEN12 ,MSP0 Amba clock (PCLKMSP0)" "No effect,Enabled"
|
|
bitfld.long 0x00 11. " PERCKEN11 ,UART1 Amba clock (PCLKUART1)" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " PERCKEN10 ,I2C1 Amba clock (PCLKI2C1)" "No effect,Enabled"
|
|
bitfld.long 0x00 9. " PERCKEN9 ,I2C0 Amba clock (PCLKI2C0)" "No effect,Enabled"
|
|
bitfld.long 0x00 8. " PERCKEN8 ,SD/MM card interface Amba clock (PCLKSDI)" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PERCKEN7 ,UART0 Amba clock Amba clock (PCLKUART0)" "No effect,Enabled"
|
|
bitfld.long 0x00 6. " PERCKEN6 ,SSP Amba clock (PCLKSSP)" "No effect,Enabled"
|
|
bitfld.long 0x00 5. " PERCKEN5 ,IRDA Amba clock (PCLKIRDA)" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PERCKEN4 ,LCD Controller Amba clock (HCLKCLCD)" "No effect,Enabled"
|
|
bitfld.long 0x00 3. " PERCKEN3 ,DMA1 Amba clock (HCLKDMA1)" "No effect,Enabled"
|
|
bitfld.long 0x00 2. " PERCKEN2 ,SDRAM Controller Amba clock (HCLKSDRAM)" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PERCKEN1 ,Static Memory Controller Amba clock (HCLKSMC)" "No effect,Enabled"
|
|
bitfld.long 0x00 0. " PERCKEN0 ,DMA0 Amba clock (HCLKDMA0)" "No effect,Enabled"
|
|
line.long 0x04 "SRC_PCKDIS0,SRC Peripheral Clock Disable Register 0"
|
|
bitfld.long 0x04 30. " PERCKDIS30 ,USBPHY Amba clock (HCLKUSBPHY)" "No effect,Disabled"
|
|
bitfld.long 0x04 29. " PERCKDIS29 ,AC97 Amba clock (HCLKAC97)" "No effect,Disabled"
|
|
bitfld.long 0x04 28. " PERCKDIS28 ,JPEG decoder Amba clock (HCLKJPEG)" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 27. " PERCKDIS27 ,Video Input Capture Amba clock (HCLKVIP)" "No effect,Disabled"
|
|
bitfld.long 0x04 26. " PERCKDIS26 ,Graphics Accelator Amba clock (HCLKGAE)" "No effect,Disabled"
|
|
bitfld.long 0x04 21. " PERCKDIS21 ,MSP2 Amba clock (PCLKMSP2)" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 20. " PERCKDIS20 ,MSP1 Amba clock (PCLKMSP1)" "No effect,Disabled"
|
|
bitfld.long 0x04 19. " PERCKDIS19 ,UART2 Amba clock (PCLKUART2)" "No effect,Disabled"
|
|
bitfld.long 0x04 14. " PERCKDIS14 ,DDR controller Pad side clock (DCLK)" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 13. " PERCKDIS13 ,USBOTG Amba clock (HCLKUSBOTG)" "No effect,Disabled"
|
|
bitfld.long 0x04 12. " PERCKDIS12 ,MSP0 Amba clock (PCLKMSP0)" "No effect,Disabled"
|
|
bitfld.long 0x04 11. " PERCKDIS11 ,UART1 Amba clock (PCLKUART1)" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 10. " PERCKDIS10 ,I2C1 Amba clock (PCLKI2C1)" "No effect,Disabled"
|
|
bitfld.long 0x04 9. " PERCKDIS9 ,I2C0 Amba clock (PCLKI2C0)" "No effect,Disabled"
|
|
bitfld.long 0x04 8. " PERCKDIS8 ,SD/MM card interface Amba clock (PCLKSDI)" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " PERCKDIS7 ,UART0 Amba clock Amba clock (PCLKUART0)" "No effect,Disabled"
|
|
bitfld.long 0x04 6. " PERCKDIS6 ,SSP Amba clock (PCLKSSP)" "No effect,Disabled"
|
|
bitfld.long 0x04 5. " PERCKDIS5 ,IRDA Amba clock (PCLKIRDA)" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 4. " PERCKDIS4 ,LCD Controller Amba clock (HCLKCLCD)" "No effect,Disabled"
|
|
bitfld.long 0x04 3. " PERCKDIS3 ,DMA1 Amba clock (HCLKDMA1)" "No effect,Disabled"
|
|
bitfld.long 0x04 2. " PERCKDIS2 ,SDRAM Controller Amba clock (HCLKSDRAM)" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " PERCKDIS1 ,Static Memory Controller Amba clock (HCLKSMC)" "No effect,Disabled"
|
|
bitfld.long 0x04 0. " PERCKDIS0 ,DMA0 Amba clock (HCLKDMA0)" "No effect,Disabled"
|
|
rgroup.long 0x2c++0x07
|
|
line.long 0x00 "SRC_PCKENSR0,SRC Peripheral Clock Enable Status Register 0"
|
|
bitfld.long 0x00 30. " PERCKENST30 ,USBPHY Amba clock (HCLKUSBPHY)" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " PERCKENST29 ,AC97 Amba clock (HCLKAC97)" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " PERCKENST28 ,JPEG decoder Amba clock (HCLKJPEG)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " PERCKENST27 ,Video Input Capture Amba clock (HCLKVIP)" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " PERCKENST26 ,Graphics Accelator Amba clock (HCLKGAE)" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " PERCKENST21 ,MSP2 Amba clock (PCLKMSP2)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " PERCKENST20 ,MSP1 Amba clock (PCLKMSP1)" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " PERCKENST19 ,UART2 Amba clock (PCLKUART2)" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " PERCKENST14 ,DDR controller Pad side clock (DCLK)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " PERCKENST13 ,USBOTG Amba clock (HCLKUSBOTG)" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " PERCKENST12 ,MSP0 Amba clock (PCLKMSP0)" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " PERCKENST11 ,UART1 Amba clock (PCLKUART1)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " PERCKENST10 ,I2C1 Amba clock (PCLKI2C1)" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " PERCKENST9 ,I2C0 Amba clock (PCLKI2C0)" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " PERCKENST8 ,SD/MM card interface Amba clock (PCLKSDI)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PERCKENST7 ,UART0 Amba clock Amba clock (PCLKUART0)" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " PERCKENST6 ,SSP Amba clock (PCLKSSP)" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " PERCKENST5 ,IRDA Amba clock (PCLKIRDA)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PERCKENST4 ,LCD Controller Amba clock (HCLKCLCD)" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " PERCKENST3 ,DMA1 Amba clock (HCLKDMA1) (HCLKDMA1)" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " PERCKENST2 ,SDRAM Controller Amba clock (HCLKSDRAM)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PERCKENST1 ,Static Memory Controller Amba clock (HCLKSMC)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PERCKENST0 ,DMA0 Amba clock (HCLKDMA0)" "Disabled,Enabled"
|
|
line.long 0x04 "SRC_PCKSR0,SRC Peripheral Clock Status Register 0"
|
|
bitfld.long 0x04 30. " PERCK30 ,USBPHY Amba clock (HCLKUSBPHY)" "Stopped,Running"
|
|
bitfld.long 0x04 29. " PERCK29 ,AC97 Amba clock (HCLKAC97)" "Stopped,Running"
|
|
bitfld.long 0x04 28. " PERCK28 ,JPEG decoder Amba clock (HCLKJPEG)" "Stopped,Running"
|
|
textline " "
|
|
bitfld.long 0x04 27. " PERCK27 ,Video Input Capture Amba clock (HCLKVIP)" "Stopped,Running"
|
|
bitfld.long 0x04 26. " PERCK26 ,Graphics Accelator Amba clock (HCLKGAE)" "Stopped,Running"
|
|
bitfld.long 0x04 21. " PERCK21 ,MSP2 Amba clock (PCLKMSP2)" "Stopped,Running"
|
|
textline " "
|
|
bitfld.long 0x04 20. " PERCK20 ,MSP1 Amba clock 20 (PCLKMSP1)" "Stopped,Running"
|
|
bitfld.long 0x04 19. " PERCK19 ,PUART2 Amba clock (PCLKUART2)" "Stopped,Running"
|
|
bitfld.long 0x04 14. " PERCK14 ,DDR controller Pad side clock (DCLK)" "Stopped,Running"
|
|
textline " "
|
|
bitfld.long 0x04 13. " PERCK13 ,USBOTG Amba clock (HCLKUSBOTG)" "Stopped,Running"
|
|
bitfld.long 0x04 12. " PERCK12 ,MSP0 Amba clock (PCLKMSP0)" "Stopped,Running"
|
|
bitfld.long 0x04 11. " PERCK11 ,UART1 Amba clock (PCLKUART1)" "Stopped,Running"
|
|
textline " "
|
|
bitfld.long 0x04 10. " PERCK10 ,I2C1 Amba clock (PCLKI2C1)" "Stopped,Running"
|
|
bitfld.long 0x04 9. " PERCK9 ,I2C0 Amba clock (PCLKI2C0)" "Stopped,Running"
|
|
bitfld.long 0x04 8. " PERCK8 ,SD/MM card interface Amba clock (PCLKSDI)" "Stopped,Running"
|
|
textline " "
|
|
bitfld.long 0x04 7. " PERCK7 ,UART0 Amba clock Amba clock (PCLKUART0)" "Stopped,Running"
|
|
bitfld.long 0x04 6. " PERCK6 ,SSP Amba clock (PCLKSSP)" "Stopped,Running"
|
|
bitfld.long 0x04 5. " PERCK5 ,IRDA Amba clock (PCLKIRDA)" "Stopped,Running"
|
|
textline " "
|
|
bitfld.long 0x04 4. " PERCK4 ,LCD Controller Amba clock (HCLKCLCD)" "Stopped,Running"
|
|
bitfld.long 0x04 3. " PERCK3 ,DMA1 Amba clock (HCLKDMA1)" "Stopped,Running"
|
|
bitfld.long 0x04 2. " PERCK2 ,SDRAM Controller Amba clock (HCLKSDRAM)" "Stopped,Running"
|
|
textline " "
|
|
bitfld.long 0x04 1. " PERCK1 ,Static Memory Controller Amba clock (HCLKSMC)" "Stopped,Running"
|
|
bitfld.long 0x04 0. " PERCK0 ,DMA0 Amba clock (HCLKDMA0)" "Stopped,Running"
|
|
wgroup.long 0x34++0x07
|
|
line.long 0x00 "SRC_PCKEN1,SRC Peripheral Clock Enable Register 1"
|
|
bitfld.long 0x00 30. " PERCKEN62 ,Peripheral Clock Enable bit 62 (USBPHYCLK)" "No effect,Enabled"
|
|
bitfld.long 0x00 28. " PERCKEN60 ,Peripheral Clock Enable bit 60 (MSPCLK3)" "No effect,Enabled"
|
|
bitfld.long 0x00 27. " PERCKEN59 ,Peripheral Clock Enable bit 59 (PCLKMSP3)" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " PERCKEN53 ,Peripheral Clock Enable bit 53 (MSPCLK2)" "No effect,Enabled"
|
|
bitfld.long 0x00 20. " PERCKEN52 ,Peripheral Clock Enable bit 52 (MSPCLK1)" "No effect,Enabled"
|
|
bitfld.long 0x00 19. " PERCKEN51 ,Peripheral Clock Enable bit 51 (UART2CLK)" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " PERCKEN45 ,Peripheral Clock Enable bit 45 (USBOTGCLK)" "No effect,Enabled"
|
|
bitfld.long 0x00 12. " PERCKEN44 ,Peripheral Clock Enable bit 44 (MSPCLK0)" "No effect,Enabled"
|
|
bitfld.long 0x00 11. " PERCKEN43 ,Peripheral Clock Enable bit 43 (UART1CLK)" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " PERCKEN42 ,Peripheral Clock Enable bit 42 (I2C1CLK)" "No effect,Enabled"
|
|
bitfld.long 0x00 9. " PERCKEN41 ,Peripheral Clock Enable bit 41 (I2C0CLK)" "No effect,Enabled"
|
|
bitfld.long 0x00 8. " PERCKEN40 ,Peripheral Clock Enable bit 40 (SDICLK)" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PERCKEN39 ,Peripheral Clock Enable bit 39 (UART0CLK)" "No effect,Enabled"
|
|
bitfld.long 0x00 6. " PERCKEN38 ,Peripheral Clock Enable bit 38 (SSPCLK)" "No effect,Enabled"
|
|
bitfld.long 0x00 5. " PERCKEN37 ,Peripheral Clock Enable bit 37 (IRDACLK)" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PERCKEN36 ,Peripheral Clock Enable bit 36 (CLCDCLK)" "No effect,Enabled"
|
|
line.long 0x04 "SRC_PCKDIS1,SRC Peripheral Clock Disable Register 1"
|
|
bitfld.long 0x04 30. " PERCKDIS62 ,Peripheral Clock Disable bit 62 (USBPHYCLK)" "No effect,Disabled"
|
|
bitfld.long 0x04 28. " PERCKDIS60 ,Peripheral Clock Disable bit 60 (MSPCLK3)" "No effect,Disabled"
|
|
bitfld.long 0x04 27. " PERCKDIS59 ,Peripheral Clock Disable bit 59 (PCLKMSP3)" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " PERCKDIS53 ,Peripheral Clock Disable bit 53 (MSPCLK2)" "No effect,Disabled"
|
|
bitfld.long 0x04 20. " PERCKDIS52 ,Peripheral Clock Disable bit 52 (MSPCLK1)" "No effect,Disabled"
|
|
bitfld.long 0x04 19. " PERCKDIS51 ,Peripheral Clock Disable bit 51 (UART2CLK)" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 13. " PERCKDIS45 ,Peripheral Clock Disable bit 45 (USBOTGCLK)" "No effect,Disabled"
|
|
bitfld.long 0x04 12. " PERCKDIS44 ,Peripheral Clock Disable bit 44 (MSPCLK0)" "No effect,Disabled"
|
|
bitfld.long 0x04 11. " PERCKDIS43 ,Peripheral Clock Disable bit 43 (UART1CLK)" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 10. " PERCKDIS42 ,Peripheral Clock Disable bit 42 (I2C1CLK)" "No effect,Disabled"
|
|
bitfld.long 0x04 9. " PERCKDIS41 ,Peripheral Clock Disable bit 41 (I2C0CLK)" "No effect,Disabled"
|
|
bitfld.long 0x04 8. " PERCKDIS40 ,Peripheral Clock Disable bit 40 (SDICLK)" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " PERCKDIS39 ,Peripheral Clock Disable bit 39 (UART0CLK)" "No effect,Disabled"
|
|
bitfld.long 0x04 6. " PERCKDIS38 ,Peripheral Clock Disable bit 38 (SSPCLK)" "No effect,Disabled"
|
|
bitfld.long 0x04 5. " PERCKDIS37 ,Peripheral Clock Disable bit 37 (IRDACLK)" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 4. " PERCKDIS36 ,Peripheral Clock Disable bit 36 (CLCDCLK)" "No effect,Disabled"
|
|
rgroup.long 0x3c++0x07
|
|
line.long 0x00 "SRC_PCKENSR1,SRC Peripheral Enable Status Status Register 1"
|
|
bitfld.long 0x00 30. " PERCKENST62 ,Peripheral Clock Enable Status bit 62 (USBPHYCLK)" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " PERCKENST60 ,Peripheral Clock Enable Status bit 60 (MSPCLK3)" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " PERCKENST59 ,Peripheral Clock Enable Status bit 59 (PCLKMSP3)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " PERCKENST53 ,Peripheral Clock Enable Status bit 53 (MSPCLK2)" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " PERCKENST52 ,Peripheral Clock Enable Status bit 52 (MSPCLK1)" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " PERCKENST51 ,Peripheral Clock Enable Status bit 51 (UART2CLK)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " PERCKENST45 ,Peripheral Clock Enable Status bit 45 (USBOTGCLK)" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " PERCKENST44 ,Peripheral Clock Enable Status bit 44 (MSPCLK0)" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " PERCKENST43 ,Peripheral Clock Enable Status bit 43 (UART1CLK)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " PERCKENST42 ,Peripheral Clock Enable Status bit 42 (I2C1CLK)" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " PERCKENST41 ,Peripheral Clock Enable Status bit 41 (I2C0CLK)" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " PERCKENST40 ,Peripheral Clock Enable Status bit 40 (SDICLK)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PERCKENST39 ,Peripheral Clock Enable Status bit 39 (UART0CLK)" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " PERCKENST38 ,Peripheral Clock Enable Status bit 38 (SSPCLK)" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " PERCKENST37 ,Peripheral Clock Enable Status bit 37 (IRDACLK)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PERCKENST36 ,Peripheral Clock Enable Status bit 36 (CLCDCLK)" "Disabled,Enabled"
|
|
line.long 0x04 "SRC_PCKSR1,SRC Peripheral Clock Status Register 1"
|
|
bitfld.long 0x04 30. " PERCK62 ,Peripheral Clock Status bit 62 (USBPHYCLK)" "Stopped,Running"
|
|
bitfld.long 0x04 28. " PERCK60 ,Peripheral Clock Status bit 60 (MSPCLK3)" "Stopped,Running"
|
|
bitfld.long 0x04 27. " PERCK59 ,Peripheral Clock Status bit 59 (PCLKMSP3)" "Stopped,Running"
|
|
textline " "
|
|
bitfld.long 0x04 21. " PERCK53 ,Peripheral Clock Status bit 53 (MSPCLK2)" "Stopped,Running"
|
|
bitfld.long 0x04 20. " PERCK52 ,Peripheral Clock Status bit 52 (MSPCLK1)" "Stopped,Running"
|
|
bitfld.long 0x04 19. " PERCK51 ,Peripheral Clock Status bit 51 (UART2CLK)" "Stopped,Running"
|
|
textline " "
|
|
bitfld.long 0x04 13. " PERCK45 ,Peripheral Clock Status bit 45 (USBOTGCLK)" "Stopped,Running"
|
|
bitfld.long 0x04 12. " PERCK44 ,Peripheral Clock Status bit 44 (MSPCLK0)" "Stopped,Running"
|
|
bitfld.long 0x04 11. " PERCK43 ,Peripheral Clock Status bit 43 (UART1CLK)" "Stopped,Running"
|
|
textline " "
|
|
bitfld.long 0x04 10. " PERCK42 ,Peripheral Clock Status bit 42 (I2C1CLK)" "Stopped,Running"
|
|
bitfld.long 0x04 9. " PERCK41 ,Peripheral Clock Status bit 41 (I2C0CLK)" "Stopped,Running"
|
|
bitfld.long 0x04 8. " PERCK40 ,Peripheral Clock Status bit 40 (SDICLK)" "Stopped,Running"
|
|
textline " "
|
|
bitfld.long 0x04 7. " PERCK39 ,Peripheral Clock Status bit 39 (UART0CLK)" "Stopped,Running"
|
|
bitfld.long 0x04 6. " PERCK38 ,Peripheral Clock Status bit 38 (SSPCLK)" "Stopped,Running"
|
|
bitfld.long 0x04 5. " PERCK37 ,Peripheral Clock Status bit 37 (IRDACLK)" "Stopped,Running"
|
|
textline " "
|
|
bitfld.long 0x04 4. " PERCK36 ,Peripheral Clock Status bit 36 (CLCDCLK)" "Stopped,Running"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "SRC_CLKOCR,SRC Clock Output Configuration Register"
|
|
sif ((cpu()!="STA2164")&&(cpu()!="STA165"))
|
|
bitfld.long 0x00 22.--24. " CLKOSEL1 ,Off-Chip Clock CLKOUT1 Selection" "MXTALI,GPSCLK4x,HCLK,PLL2 CLK72,PLL2 CLK48,SCLK,TIMCLK,?..."
|
|
else
|
|
bitfld.long 0x00 22.--24. " CLKOSEL1 ,Off-Chip Clock CLKOUT1 Selection" "MXTALI,Reserved,HCLK,PLL2 CLK72,PLL2 CLK48,SCLK,TIMCLK,?..."
|
|
endif
|
|
bitfld.long 0x00 16.--21. " CLKODIV1 ,Off-Chip Clock CLKOUT1 Frequency Divisor" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64"
|
|
textline " "
|
|
sif ((cpu()!="STA2164")&&(cpu()!="STA165"))
|
|
bitfld.long 0x00 6.--8. " CLKOSEL0 ,Off-Chip Clock CLKOUT0 Selection" "PLL1,GPSCLK4x,HCLK,PLL2 CLK72,PLL2 CLK48,SCLK,TIMCLK,?..."
|
|
else
|
|
bitfld.long 0x00 6.--8. " CLKOSEL0 ,Off-Chip Clock CLKOUT0 Selection" "PLL1,Reserved,HCLK,PLL2 CLK72,PLL2 CLK48,SCLK,TIMCLK,?..."
|
|
endif
|
|
bitfld.long 0x00 0.--5. " CLKODIV0 ,Off-Chip Clock CLKOUT0 Frequency Divisor" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64"
|
|
wgroup.long 0x48++0x07
|
|
line.long 0x00 "SRC_PCKEN2,SRC Peripheral Clock Enable Register 2"
|
|
bitfld.long 0x00 12. " PERCKEN76 ,Peripheral Clock Enable bit 76 (PCLK_APB_REGS)" "No effect,Enabled"
|
|
textline " "
|
|
sif ((cpu()!="STA2164")&&(cpu()!="STA165"))
|
|
bitfld.long 0x00 11. " PERCKEN75 ,Peripheral Clock Enable bit 75 (GAL-GPSCLK16)" "No effect,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 10. " PERCKEN74 ,Peripheral Clock Enable bit 74 (SDICLK2)" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PERCKEN73 ,Peripheral Clock Enable bit 73 (PCLKI2C2)" "No effect,Enabled"
|
|
bitfld.long 0x00 8. " PERCKEN72 ,Peripheral Clock Enable bit 72 (UART3CLK)" "No effect,Enabled"
|
|
bitfld.long 0x00 7. " PERCKEN71 ,Peripheral Clock Enable bit 71 (PCLKUART)" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " PERCKEN70 ,Peripheral Clock Enable bit 70 (I2C2CLK)" "No effect,Enabled"
|
|
bitfld.long 0x00 5. " PERCKEN69 ,Peripheral Clock Enable bit 69 (PCLKI2C2)" "No effect,Enabled"
|
|
bitfld.long 0x00 4. " PERCKEN68 ,Peripheral Clock Enable bit 68 (SSP1CLK)" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PERCKEN67 ,Peripheral Clock Enable bit 67 (PCLKSSP1)" "No effect,Enabled"
|
|
bitfld.long 0x00 2. " PERCKEN66 ,Peripheral Clock Enable bit 66 (SDICLK1)" "No effect,Enabled"
|
|
bitfld.long 0x00 1. " PERCKEN65 ,Peripheral Clock Enable bit 65 (PCLKSDI1)" "No effect,Enabled"
|
|
sif ((cpu()!="STA2164")&&(cpu()!="STA165"))
|
|
textline " "
|
|
bitfld.long 0x00 0. " PERCKEN64 ,Peripheral Clock Enable bit 64 (GPSCLK16/GPSCLK_4X)" "No effect,Enabled"
|
|
endif
|
|
line.long 0x04 "SRC_PCKDIS2,SRC Peripheral Clock Disable Register 2"
|
|
bitfld.long 0x04 12. " PERCKDIS76 ,Peripheral Clock Disable bit 76 (PCLK_APB_REGS)" "No effect,Disabled"
|
|
textline " "
|
|
sif ((cpu()!="STA2164")&&(cpu()!="STA165"))
|
|
bitfld.long 0x04 11. " PERCKDIS75 ,Peripheral Clock Disable bit 75 (GAL-GPSCLK16)" "No effect,Disabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x04 10. " PERCKDIS74 ,Peripheral Clock Disable bit 74 (SDICLK2)" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 9. " PERCKDIS73 ,Peripheral Clock Disable bit 73 (PCLKI2C2)" "No effect,Disabled"
|
|
bitfld.long 0x04 8. " PERCKDIS72 ,Peripheral Clock Disable bit 72 (UART3CLK)" "No effect,Disabled"
|
|
bitfld.long 0x04 7. " PERCKDIS71 ,Peripheral Clock Disable bit 71 (PCLKUART)" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 6. " PERCKDIS70 ,Peripheral Clock Disable bit 70 (I2C2CLK)" "No effect,Disabled"
|
|
bitfld.long 0x04 5. " PERCKDIS69 ,Peripheral Clock Disable bit 69 (PCLKI2C2)" "No effect,Disabled"
|
|
bitfld.long 0x04 4. " PERCKDIS68 ,Peripheral Clock Disable bit 68 (SSP1CLK)" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " PERCKDIS67 ,Peripheral Clock Disable bit 67 (PCLKSSP1)" "No effect,Disabled"
|
|
bitfld.long 0x04 2. " PERCKDIS66 ,Peripheral Clock Disable bit 66 (SDICLK1)" "No effect,Disabled"
|
|
bitfld.long 0x04 1. " PERCKDIS65 ,Peripheral Clock Disable bit 65 (PCLKSDI1)" "No effect,Disabled"
|
|
sif ((cpu()!="STA2164")&&(cpu()!="STA165"))
|
|
textline " "
|
|
bitfld.long 0x04 0. " PERCKDIS64 ,Peripheral Clock Disable bit 64 (GPSCLK16/GPSCLK_4X)" "No effect,Disabled"
|
|
endif
|
|
rgroup.long 0x50++0x07
|
|
line.long 0x00 "SRC_PCKENSR2,SRC Peripheral Clock Enable Status Register 2"
|
|
bitfld.long 0x00 12. " PERCKENST76 ,Peripheral Clock Enable Status bit 76 (PCLK_APB_REGS)" "Disabled,Enabled"
|
|
textline " "
|
|
sif ((cpu()!="STA2164")&&(cpu()!="STA165"))
|
|
bitfld.long 0x00 11. " PERCKENST75 ,Peripheral Clock Enable Status bit 75 (GAL-GPSCLK16)" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 10. " PERCKENST74 ,Peripheral Clock Enable Status bit 74 (SDICLK2)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PERCKENST73 ,Peripheral Clock Enable Status bit 73 (PCLKI2C2)" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " PERCKENST72 ,Peripheral Clock Enable Status bit 72 (UART3CLK)" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " PERCKENST71 ,Peripheral Clock Enable Status bit 71 (PCLKUART)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " PERCKENST70 ,Peripheral Clock Enable Status bit 70 (I2C2CLK)" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " PERCKENST69 ,Peripheral Clock Enable Status bit 69 (PCLKI2C2)" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PERCKENST68 ,Peripheral Clock Enable Status bit 68 (SSP1CLK)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PERCKENST67 ,Peripheral Clock Enable Status bit 67 (PCLKSSP1)" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " PERCKENST66 ,Peripheral Clock Enable Status bit 66 (SDICLK1)" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " PERCKENST65 ,Peripheral Clock Enable Status bit 65 (PCLKSDI1)" "Disabled,Enabled"
|
|
sif ((cpu()!="STA2164")&&(cpu()!="STA165"))
|
|
textline " "
|
|
bitfld.long 0x00 0. " PERCKENST64 ,Peripheral Clock Enable Status bit 64 (GPSCLK16/GPSCLK_4X)" "Disabled,Enabled"
|
|
endif
|
|
line.long 0x04 "SRC_PCKSR2,SRC Peripheral Clock Status Register 2"
|
|
bitfld.long 0x04 12. " PERCK76 ,Peripheral Clock Status bit 76 (PCLK_APB_REGS)" "Stopped,Running"
|
|
textline " "
|
|
sif ((cpu()!="STA2164")&&(cpu()!="STA165"))
|
|
bitfld.long 0x04 11. " PERCK75 ,Peripheral Clock Status bit 75 (GAL-GPSCLK16)" "Stopped,Running"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x04 10. " PERCK74 ,Peripheral Clock Status bit 74 (SDICLK2)" "Stopped,Running"
|
|
textline " "
|
|
bitfld.long 0x04 9. " PERCK73 ,Peripheral Clock Status bit 73 (PCLKI2C2)" "Stopped,Running"
|
|
bitfld.long 0x04 8. " PERCK72 ,Peripheral Clock Status bit 72 (UART3CLK)" "Stopped,Running"
|
|
bitfld.long 0x04 7. " PERCK71 ,Peripheral Clock Status bit 71 (PCLKUART)" "Stopped,Running"
|
|
textline " "
|
|
bitfld.long 0x04 6. " PERCK70 ,Peripheral Clock Status bit 70 (I2C2CLK)" "Stopped,Running"
|
|
bitfld.long 0x04 5. " PERCK69 ,Peripheral Clock Status bit 69 (PCLKI2C2)" "Stopped,Running"
|
|
bitfld.long 0x04 4. " PERCK68 ,Peripheral Clock Status bit 68 (SSP1CLK)" "Stopped,Running"
|
|
textline " "
|
|
bitfld.long 0x04 3. " PERCK67 ,Peripheral Clock Status bit 67 (PCLKSSP1)" "Stopped,Running"
|
|
bitfld.long 0x04 2. " PERCK66 ,Peripheral Clock Status bit 66 (SDICLK1)" "Stopped,Running"
|
|
bitfld.long 0x04 1. " PERCK65 ,Peripheral Clock Status bit 65 (PCLKSDI1)" "Stopped,Running"
|
|
sif ((cpu()!="STA2164")&&(cpu()!="STA165"))
|
|
textline " "
|
|
bitfld.long 0x04 0. " PERCK64 ,Peripheral Clock Status bit 64 (GPSCLK16/GPSCLK_4X)" "Stopped,Running"
|
|
endif
|
|
if (((d.l(asd:0x101e0000+0x58))&0x80000)==0x0)
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "SRC_CLKDIVCR,SRC Clock Divider Control Register"
|
|
bitfld.long 0x00 28.--30. " TRACE_CLK_MUX_SEL ,Select the clock for TRACE CLOCK" "HCLK/1,HCLK/2,HCLK/4,HCLK/8,HCLK/16,?..."
|
|
bitfld.long 0x00 21. " SDMMC52_SEL[2] ,Select SDMMC2 clock" "48MHz,52MHz"
|
|
bitfld.long 0x00 20. " SDMMC52_SEL[1] ,Select SDMMC1 clock" "48MHz,52MHz"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SDMMC52_SEL[0] ,Select SDMMC0 clock" "CLK48,52MHz"
|
|
bitfld.long 0x00 18. " SDMMC0_104M_SEL ,Select SDMMC0 clock" "48MHz,104MHz"
|
|
bitfld.long 0x00 15.--16. " DCLK_DIV_SEL ,Select DCLK Clock divider" "Div by 1,Div by 2,Div by 3,Div by 4"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " SCLK_DIV_SEL ,Clock divider for HCLK/SCLK" "Div by 1,Div by 2,Div by 3,Div by 4"
|
|
bitfld.long 0x00 5.--9. " CLCDCLK_DIV_SEL ,Clock divider for CLCD CLOCK on PLL2 output" "Reserved,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
sif ((cpu()!="STA2164")&&(cpu()!="STA165"))
|
|
bitfld.long 0x00 4. " GPSCLK16SEL ,GPSCLK16 Selection" "External,Internal"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " GPSCLK4x_DIV ,GPSCLK4x Division Ration" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
else
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "SRC_CLKDIVCR,SRC Clock Divider Control Register"
|
|
bitfld.long 0x00 28.--30. " TRACE_CLK_MUX_SEL ,Select the clock for TRACE CLOCK" "HCLK/1,HCLK/2,HCLK/4,HCLK/8,HCLK/16,?..."
|
|
bitfld.long 0x00 21. " SDMMC52_SEL[2] ,Select SDMMC2 clock" "48MHz,52MHz"
|
|
bitfld.long 0x00 20. " SDMMC52_SEL[1] ,Select SDMMC1 clock" "48MHz,52MHz"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SDMMC52_SEL[0] ,Select SDMMC0 clock" "CLK48,52MHz"
|
|
bitfld.long 0x00 18. " SDMMC0_104M_SEL ,Select SDMMC0 clock" "52MHz,104MHz"
|
|
bitfld.long 0x00 15.--16. " DCLK_DIV_SEL ,Select DCLK Clock divider" "Div by 1,Div by 2,Div by 3,Div by 4"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " SCLK_DIV_SEL ,Clock divider for HCLK/SCLK" "Div by 1,Div by 2,Div by 3,Div by 4"
|
|
bitfld.long 0x00 5.--9. " CLCDCLK_DIV_SEL ,Clock divider for CLCD CLOCK on PLL2 output" "Reserved,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
sif ((cpu()!="STA2164")&&(cpu()!="STA165"))
|
|
bitfld.long 0x00 4. " GPSCLK16SEL ,GPSCLK16 Selection" "External,Internal"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " GPSCLK4x_DIV ,GPSCLK4x Division Ration" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
endif
|
|
rgroup.long 0xfe0++0x1f "SRC Peripheral Identification Registers"
|
|
line.long 0x00 "PERIPHID0,SRC Peripheral Identification Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PARTNUMBER0 ,Part number 0"
|
|
line.long 0x04 "SRC_PERIPHID1,SRC Peripheral Identification Register 1"
|
|
bitfld.long 0x04 4.--7. " DESIGNER0 ,Designer 0" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
bitfld.long 0x04 0.--3. " PARTNUMBER1 ,Part number 1" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
line.long 0x08 "SRC_PERIPHID2,SRC Peripheral Identification Register 2"
|
|
bitfld.long 0x08 4.--7. " REVISION ,Revision Number" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
bitfld.long 0x08 0.--3. " DESIGNER1 ,Designer 1" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
line.long 0x0c "SRC_PERIPHID3,SRC Peripheral Identification Register 3"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " CONFIGURATION ,Configuration"
|
|
line.long 0x10 "SRC_PCELLID0,SRC Identification Register 0"
|
|
hexmask.long.byte 0x10 0.--7. 1. " SRC_PCELLID0 ,Identification"
|
|
line.long 0x14 "SRC_PCELLID1,SRC Identification Register 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " SRC_PCELLID1 ,Identification"
|
|
line.long 0x18 "SRC_PCELLID2,SRC Identification Register 2"
|
|
hexmask.long.byte 0x18 0.--7. 1. " SRC_PCELLID2 ,Identification"
|
|
line.long 0x1c "SRC_PCELLID3,SRC Identification Register 3"
|
|
hexmask.long.byte 0x1c 0.--7. 1. " SRC_PCELLID3 ,Identification"
|
|
width 0xb
|
|
tree.end
|
|
tree "PMU (Power Management Unit)"
|
|
base asd:0x101e9000
|
|
width 15.
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "PMU_CR,PMU Control register"
|
|
bitfld.long 0x00 31. " FSMCPEN ,FSMC Pull-up enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " JTAGSEL ,JTAG Selection" "Not accessed,Accessed"
|
|
bitfld.long 0x00 22. " CLCDHIZ ,CLCD IO High Impedance enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif ((cpu()!="STA2164")&&(cpu()!="STA165"))
|
|
bitfld.long 0x00 17. " GPS_EN ,GPS Enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 16. " MSP_PEN ,MSP Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " CAN0_PEN ,CAN0 Pull-Up Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " MC_PEN ,MC0 Pull-Up Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " CANTX0_EN ,CANTX0 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " TRSTDIS ,TRST Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LVDOK ,Status of usb phy 2.5 V regulator" "Not stable,Stable"
|
|
bitfld.long 0x00 6. " IOFORCE_DDR ,DDR Controller CKEN Hold low in self-refresh" "DDR only,DDR and IOFORCE"
|
|
bitfld.long 0x00 5. " BYPASS_SELF_REFRESH ,Bypass DDR in self-refresh check" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DEEPDIS ,Deep-Sleep mode Disable bit" "Enabled,Disabled"
|
|
bitfld.long 0x00 3. " USB2.5V_PD ,Power Down bit of USB HS PHY 2.5V intenal voltage regulator" "Powered down,Not powered down"
|
|
bitfld.long 0x00 2. " IOFORCE ,IOs forced during sleep mode" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 1. " VDDOKMOD ,VDDOK Pin Mode" "Interrupt,Automatic"
|
|
bitfld.long 0x00 0. " BATOKMOD ,BATOK Pin Mode" "Interrupt,Automatic"
|
|
rgroup.long 0x04++0x3
|
|
line.long 0x00 "PMU_STA,PMU Status register"
|
|
bitfld.long 0x00 15. " SOFTSLEEP ,Software sleep status" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " VDDSLEEP ,VDD failure sleep status" "Not failed,Failed"
|
|
bitfld.long 0x00 13. " BATSLEEP ,Battery fault sleep status" "Not failed,Failed"
|
|
textline " "
|
|
bitfld.long 0x00 2. " WKUPSTA ,Wake-up Status bit" "Not triggered,Triggered"
|
|
bitfld.long 0x00 1. " VDDSTA ,VDDOK Status level" "Low,High"
|
|
bitfld.long 0x00 0. " BATSTA ,BATOK Status level" "Low,High"
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "PMU_CR2,PMU Control register 2"
|
|
bitfld.long 0x00 27. " BYPDIV1 ,Bypass DIV1" "Not Bypassed,Bypassed"
|
|
bitfld.long 0x00 26. " BYPDIV2 ,Bypass DIV2" "Not Bypassed,Bypassed"
|
|
bitfld.long 0x00 25. " BYPPLL2 ,Bypass PLL2" "Not Bypassed,Bypassed"
|
|
textline " "
|
|
bitfld.long 0x00 23.--24. " IOLVLE ,IO power level for Vddio E Groups" "1.8V,2.5V,Reserved,3.3V"
|
|
bitfld.long 0x00 21.--22. " IOLVLD ,IO power level for Vddio D Groups" "1.8V,2.5V,Reserved,3.3V"
|
|
bitfld.long 0x00 20. " IOLVLC ,IO power level for Vddio C Groups" "1.8V,2.5V"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " IOLVLB ,IO power level for Vddio B Groups" "1.8V,2.5V,Reserved,3.3V"
|
|
bitfld.long 0x00 16.--17. " IOLVLA ,IO power level for Vddio A Groups" "1.8V,2.5V,Reserved,3.3V"
|
|
hexmask.long.byte 0x00 8.--15. 1. " WKUP_TEMPO ,Wake-Up Tempo"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TEMPOEN ,Tempo Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " MSP0WR ,MSP0 signal wiring" "Pins,MSP2"
|
|
bitfld.long 0x00 4. " TCKDIR ,TCK direction when in MSP bypass" "MSPTCK1 to MSPTCK2,MSPTCK2 to MSPTCK1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TFSDIR ,TFS direction when in MSP bypass" "MSPTFS1 to MSPTFS2,MSPTFS2 to MSPTFS1"
|
|
bitfld.long 0x00 2. " MSPBYPEN ,MSP Bypass enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " REWM ,Rising Edge Wake Mask" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FEWM ,Falling Edge Wake Mask" "Masked,Enabled"
|
|
group.long 0x10++0xf
|
|
line.long 0x00 "PMU_SPR0,PMU scratch-pad register 0"
|
|
line.long 0x04 "PMU_SPR1,PMU scratch-pad register 1"
|
|
line.long 0x08 "PMU_SPR2,PMU scratch-pad register 2"
|
|
line.long 0x0c "PMU_SPR3,PMU scratch-pad register 3"
|
|
rgroup.long 0x28++0x03
|
|
line.long 0x00 "PMU_RIS,PMU raw interrupt status register"
|
|
bitfld.long 0x00 0. " PMURIS ,Raw Interrupt Status bit" "No interrupt,Interrupt"
|
|
wgroup.long 0x2c++0x03
|
|
line.long 0x00 "PMU_ICR,PMU interrupt clear register"
|
|
bitfld.long 0x00 0. " PMUIC ,Interrupt Clear bit" "No effect,Cleared"
|
|
rgroup.long 0xfe0++0x1f "PMU Peripheral Identification Registers"
|
|
line.long 0x00 "PERIPHID0,PMU Peripheral Identification Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PARTNUMBER0 ,Part number 0"
|
|
line.long 0x04 "PMU_PERIPHID1,PMU Peripheral Identification Register 1"
|
|
bitfld.long 0x04 4.--7. " DESIGNER0 ,Designer 0" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
bitfld.long 0x04 0.--3. " PARTNUMBER1 ,Part number 1" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
line.long 0x08 "PMU_PERIPHID2,PMU Peripheral Identification Register 2"
|
|
bitfld.long 0x08 4.--7. " REVISION ,Revision Number" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
bitfld.long 0x08 0.--3. " DESIGNER1 ,Designer 1" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
line.long 0x0c "PMU_PERIPHID3,PMU Peripheral Identification Register 3"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " CONFIGURATION ,Configuration"
|
|
line.long 0x10 "PMU_PCELLID0,PMU Identification Register 0"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PMU_PCELLID0 ,Identification"
|
|
line.long 0x14 "PMU_PCELLID1,PMU Identification Register 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PMU_PCELLID1 ,Identification"
|
|
line.long 0x18 "PMU_PCELLID2,PMU Identification Register 2"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PMU_PCELLID2 ,Identification"
|
|
line.long 0x1c "PMU_PCELLID3,PMU Identification Register 3"
|
|
hexmask.long.byte 0x1c 0.--7. 1. " PMU_PCELLID3 ,Identification"
|
|
width 0xb
|
|
tree.end
|
|
tree.open "DMAC (DMA Controllers)"
|
|
tree "DMAC 0"
|
|
base asd:0x10130000
|
|
width 18.
|
|
rgroup.long 0x0++0x07
|
|
line.long 0x0 "DMA_MIS,DMA Masked Interrupt Status Register"
|
|
bitfld.long 0x0 7. " IS7 ,Interrupt Status After Masking 7" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 6. " IS6 ,Interrupt Status After Masking 6" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 5. " IS5 ,Interrupt Status After Masking 5" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 4. " IS4 ,Interrupt Status After Masking 4" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 3. " IS3 ,Interrupt Status After Masking 3" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 2. " IS2 ,Interrupt Status After Masking 2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 1. " IS1 ,Interrupt Status After Masking 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 0. " IS0 ,Interrupt Status After Masking 0" "No interrupt,Interrupt"
|
|
line.long 0x4 "DMA_TCMIS,DMA Terminal Count Masked Interrupt Status Register"
|
|
bitfld.long 0x4 7. " ITCS7 ,Terminal Count Interrupt Status After Masking 7" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 6. " ITCS6 ,Terminal Count Interrupt Status After Masking 6" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 5. " ITCS5 ,Terminal Count Interrupt Status After Masking 5" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 4. " ITCS4 ,Terminal Count Interrupt Status After Masking 4" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 3. " ITCS3 ,Terminal Count Interrupt Status After Masking 3" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 2. " ITCS2 ,Terminal Count Interrupt Status After Masking 2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 1. " ITCS1 ,Terminal Count Interrupt Status After Masking 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 0. " ITCS0 ,Terminal Count Interrupt Status After Masking 0" "No interrupt,Interrupt"
|
|
wgroup.long 0x8++0x03
|
|
line.long 0x0 "DMA_TCICR,DMA Terminal Count Interrupt Clear Register ("
|
|
bitfld.long 0x0 7. " ITCC7 ,Terminal Count Interrupt Clear 7" "No effect,Clear"
|
|
bitfld.long 0x0 6. " ITCC6 ,Terminal Count Interrupt Clear 6" "No effect,Clear"
|
|
bitfld.long 0x0 5. " ITCC5 ,Terminal Count Interrupt Clear 5" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x0 4. " ITCC4 ,Terminal Count Interrupt Clear 4" "No effect,Clear"
|
|
bitfld.long 0x0 3. " ITCC3 ,Terminal Count Interrupt Clear 3" "No effect,Clear"
|
|
bitfld.long 0x0 2. " ITCC2 ,Terminal Count Interrupt Clear 2" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x0 1. " ITCC1 ,Terminal Count Interrupt Clear 1" "No effect,Clear"
|
|
bitfld.long 0x0 0. " ITCC0 ,Terminal Count Interrupt Clear 0" "No effect,Clear"
|
|
rgroup.long 0xC++0x03
|
|
line.long 0x0 "DMA_EMIS,DMA Error Masked Interrupt Status Register"
|
|
bitfld.long 0x0 7. " IES7 ,Error Interrupt Status After Masking 7" "No error,Error"
|
|
bitfld.long 0x0 6. " IES6 ,Error Interrupt Status After Masking 6" "No error,Error"
|
|
bitfld.long 0x0 5. " IES5 ,Error Interrupt Status After Masking 5" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x0 4. " IES4 ,Error Interrupt Status After Masking 4" "No error,Error"
|
|
bitfld.long 0x0 3. " IES3 ,Error Interrupt Status After Masking 3" "No error,Error"
|
|
bitfld.long 0x0 2. " IES2 ,Error Interrupt Status After Masking 2" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x0 1. " IES1 ,Error Interrupt Status After Masking 1" "No error,Error"
|
|
bitfld.long 0x0 0. " IES0 ,Error Interrupt Status After Masking 0" "No error,Error"
|
|
wgroup.long 0x10++0x03
|
|
line.long 0x0 "DMA_EICR,Error Interrupt Clear Register"
|
|
bitfld.long 0x0 7. " IEC7 ,Error Interrupt Clear 7" "No effect,Clear"
|
|
bitfld.long 0x0 6. " IEC6 ,Error Interrupt Clear 6" "No effect,Clear"
|
|
bitfld.long 0x0 5. " IEC5 ,Error Interrupt Clear 5" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x0 4. " IEC4 ,Error Interrupt Clear 4" "No effect,Clear"
|
|
bitfld.long 0x0 3. " IEC3 ,Error Interrupt Clear 3" "No effect,Clear"
|
|
bitfld.long 0x0 2. " IEC2 ,Error Interrupt Clear 2" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x0 1. " IEC1 ,Error Interrupt Clear 1" "No effect,Clear"
|
|
bitfld.long 0x0 0. " IEC0 ,Error Interrupt Clear 0" "No effect,Clear"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x0 "DMA_TCRIS,DMA Terminal Count Raw Interrupt Register"
|
|
bitfld.long 0x0 7. " RITCS7 ,Terminal Count Raw Interrupt Status 7" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 6. " RITCS6 ,Terminal Count Raw Interrupt Status 6" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 5. " RITCS5 ,Terminal Count Raw Interrupt Status 5" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 4. " RITCS4 ,Terminal Count Raw Interrupt Status 4" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 3. " RITCS3 ,Terminal Count Raw Interrupt Status 3" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 2. " RITCS2 ,Terminal Count Raw Interrupt Status 2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 1. " RITCS1 ,Terminal Count Raw Interrupt Status 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 0. " RITCS0 ,Terminal Count Raw Interrupt Status 0" "No interrupt,Interrupt"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x0 "DMA_ERIS,DMA Error Raw Interrupt Register"
|
|
bitfld.long 0x0 7. " RIES7 ,Error Raw Interrupt Status 7" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 6. " RIES6 ,Error Raw Interrupt Status 6" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 5. " RIES5 ,Error Raw Interrupt Status 5" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 4. " RIES4 ,Error Raw Interrupt Status 4" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 3. " RIES3 ,Error Raw Interrupt Status 3" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 2. " RIES2 ,Error Raw Interrupt Status 2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 1. " RIES1 ,Error Raw Interrupt Status 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 0. " RIES0 ,Error Raw Interrupt Status 0" "No interrupt,Interrupt"
|
|
rgroup.long 0x1C++0x07
|
|
line.long 0x0 "DMA_ECHSR,Enabled Channel Status Register"
|
|
bitfld.long 0x0 7. " ENCS7 ,Enabled Channel Status 7" "Disabled,Enabled"
|
|
bitfld.long 0x0 6. " ENCS6 ,Enabled Channel Status 6" "Disabled,Enabled"
|
|
bitfld.long 0x0 5. " ENCS5 ,Enabled Channel Status 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 4. " ENCS4 ,Enabled Channel Status 4" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " ENCS3 ,Enabled Channel Status 3" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " ENCS2 ,Enabled Channel Status 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 1. " ENCS1 ,Enabled Channel Status 1" "Disabled,Enabled"
|
|
bitfld.long 0x0 0. " ENCS0 ,Enabled Channel Status 0" "Disabled,Enabled"
|
|
line.long 0x4 "DMA_SBREQ,Software Burst Request Register"
|
|
bitfld.long 0x4 31. " SBR31 ,Software Burst Request for Source 31" "Not requested,Requested"
|
|
bitfld.long 0x4 30. " SBR30 ,Software Burst Request for Source 30" "Not requested,Requested"
|
|
bitfld.long 0x4 29. " SBR29 ,Software Burst Request for Source 29" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x4 28. " SBR28 ,Software Burst Request for Source 28" "Not requested,Requested"
|
|
bitfld.long 0x4 27. " SBR27 ,Software Burst Request for Source 27" "Not requested,Requested"
|
|
bitfld.long 0x4 26. " SBR26 ,Software Burst Request for Source 26" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x4 25. " SBR25 ,Software Burst Request for Source 25" "Not requested,Requested"
|
|
bitfld.long 0x4 24. " SBR24 ,Software Burst Request for Source 24" "Not requested,Requested"
|
|
bitfld.long 0x4 23. " SBR23 ,Software Burst Request for Source 23" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x4 22. " SBR22 ,Software Burst Request for Source 22" "Not requested,Requested"
|
|
bitfld.long 0x4 21. " SBR21 ,Software Burst Request for Source 21" "Not requested,Requested"
|
|
bitfld.long 0x4 20. " SBR20 ,Software Burst Request for Source 20" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x4 19. " SBR19 ,Software Burst Request for Source 19" "Not requested,Requested"
|
|
bitfld.long 0x4 18. " SBR18 ,Software Burst Request for Source 18" "Not requested,Requested"
|
|
bitfld.long 0x4 17. " SBR17 ,Software Burst Request for Source 17" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x4 16. " SBR16 ,Software Burst Request for Source 16" "Not requested,Requested"
|
|
bitfld.long 0x4 15. " SBR15 ,Software Burst Request for Source 15" "Not requested,Requested"
|
|
bitfld.long 0x4 14. " SBR14 ,Software Burst Request for Source 14" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x4 13. " SBR13 ,Software Burst Request for Source 13" "Not requested,Requested"
|
|
bitfld.long 0x4 12. " SBR12 ,Software Burst Request for Source 12" "Not requested,Requested"
|
|
bitfld.long 0x4 11. " SBR11 ,Software Burst Request for Source 11" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x4 10. " SBR10 ,Software Burst Request for Source 10" "Not requested,Requested"
|
|
bitfld.long 0x4 9. " SBR9 ,Software Burst Request for Source 9" "Not requested,Requested"
|
|
bitfld.long 0x4 8. " SBR8 ,Software Burst Request for Source 8" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x4 7. " SBR7 ,Software Burst Request for Source 7" "Not requested,Requested"
|
|
bitfld.long 0x4 6. " SBR6 ,Software Burst Request for Source 6" "Not requested,Requested"
|
|
bitfld.long 0x4 5. " SBR5 ,Software Burst Request for Source 5" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x4 4. " SBR4 ,Software Burst Request for Source 4" "Not requested,Requested"
|
|
bitfld.long 0x4 3. " SBR3 ,Software Burst Request for Source 3" "Not requested,Requested"
|
|
bitfld.long 0x4 2. " SBR2 ,Software Burst Request for Source 2" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x4 1. " SBR1 ,Software Burst Request for Source 1" "Not requested,Requested"
|
|
bitfld.long 0x4 0. " SBR0 ,Software Burst Request for Source 0" "Not requested,Requested"
|
|
group.long 0x24++0x03
|
|
line.long 0x0 "DMA_SSREQ,Software Single Request Register"
|
|
bitfld.long 0x0 31. " SSR31 ,Software Single Request for Source 31" "Not requested,Requested"
|
|
bitfld.long 0x0 30. " SSR30 ,Software Single Request for Source 30" "Not requested,Requested"
|
|
bitfld.long 0x0 29. " SSR29 ,Software Single Request for Source 29" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0 28. " SSR28 ,Software Single Request for Source 28" "Not requested,Requested"
|
|
bitfld.long 0x0 27. " SSR27 ,Software Single Request for Source 27" "Not requested,Requested"
|
|
bitfld.long 0x0 26. " SSR26 ,Software Single Request for Source 26" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0 25. " SSR25 ,Software Single Request for Source 25" "Not requested,Requested"
|
|
bitfld.long 0x0 24. " SSR24 ,Software Single Request for Source 24" "Not requested,Requested"
|
|
bitfld.long 0x0 23. " SSR23 ,Software Single Request for Source 23" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0 22. " SSR22 ,Software Single Request for Source 22" "Not requested,Requested"
|
|
bitfld.long 0x0 21. " SSR21 ,Software Single Request for Source 21" "Not requested,Requested"
|
|
bitfld.long 0x0 20. " SSR20 ,Software Single Request for Source 20" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0 19. " SSR19 ,Software Single Request for Source 19" "Not requested,Requested"
|
|
bitfld.long 0x0 18. " SSR18 ,Software Single Request for Source 18" "Not requested,Requested"
|
|
bitfld.long 0x0 17. " SSR17 ,Software Single Request for Source 17" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0 16. " SSR16 ,Software Single Request for Source 16" "Not requested,Requested"
|
|
bitfld.long 0x0 15. " SSR15 ,Software Single Request for Source 15" "Not requested,Requested"
|
|
bitfld.long 0x0 14. " SSR14 ,Software Single Request for Source 14" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0 13. " SSR13 ,Software Single Request for Source 13" "Not requested,Requested"
|
|
bitfld.long 0x0 12. " SSR12 ,Software Single Request for Source 12" "Not requested,Requested"
|
|
bitfld.long 0x0 11. " SSR11 ,Software Single Request for Source 11" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0 10. " SSR10 ,Software Single Request for Source 10" "Not requested,Requested"
|
|
bitfld.long 0x0 9. " SSR9 ,Software Single Request for Source 9" "Not requested,Requested"
|
|
bitfld.long 0x0 8. " SSR8 ,Software Single Request for Source 8" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0 7. " SSR7 ,Software Single Request for Source 7" "Not requested,Requested"
|
|
bitfld.long 0x0 6. " SSR6 ,Software Single Request for Source 6" "Not requested,Requested"
|
|
bitfld.long 0x0 5. " SSR5 ,Software Single Request for Source 5" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0 4. " SSR4 ,Software Single Request for Source 4" "Not requested,Requested"
|
|
bitfld.long 0x0 3. " SSR3 ,Software Single Request for Source 3" "Not requested,Requested"
|
|
bitfld.long 0x0 2. " SSR2 ,Software Single Request for Source 2" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0 1. " SSR1 ,Software Single Request for Source 1" "Not requested,Requested"
|
|
bitfld.long 0x0 0. " SSR0 ,Software Single Request for Source 0" "Not requested,Requested"
|
|
rgroup.long 0x28++0x07
|
|
line.long 0x0 "DMA_SLBREQ,Software Last Burst Request Register"
|
|
bitfld.long 0x0 31. " SLB31 ,Software Last Burst Request for Source 31" "Not requested,Requested"
|
|
bitfld.long 0x0 30. " SLB30 ,Software Last Burst Request for Source 30" "Not requested,Requested"
|
|
bitfld.long 0x0 29. " SLB29 ,Software Last Burst Request for Source 29" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0 28. " SLB28 ,Software Last Burst Request for Source 28" "Not requested,Requested"
|
|
bitfld.long 0x0 27. " SLB27 ,Software Last Burst Request for Source 27" "Not requested,Requested"
|
|
bitfld.long 0x0 26. " SLB26 ,Software Last Burst Request for Source 26" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0 25. " SLB25 ,Software Last Burst Request for Source 25" "Not requested,Requested"
|
|
bitfld.long 0x0 24. " SLB24 ,Software Last Burst Request for Source 24" "Not requested,Requested"
|
|
bitfld.long 0x0 23. " SLB23 ,Software Last Burst Request for Source 23" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0 22. " SLB22 ,Software Last Burst Request for Source 22" "Not requested,Requested"
|
|
bitfld.long 0x0 21. " SLB21 ,Software Last Burst Request for Source 21" "Not requested,Requested"
|
|
bitfld.long 0x0 20. " SLB20 ,Software Last Burst Request for Source 20" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0 19. " SLB19 ,Software Last Burst Request for Source 19" "Not requested,Requested"
|
|
bitfld.long 0x0 18. " SLB18 ,Software Last Burst Request for Source 18" "Not requested,Requested"
|
|
bitfld.long 0x0 17. " SLB17 ,Software Last Burst Request for Source 17" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0 16. " SLB16 ,Software Last Burst Request for Source 16" "Not requested,Requested"
|
|
bitfld.long 0x0 15. " SLB15 ,Software Last Burst Request for Source 15" "Not requested,Requested"
|
|
bitfld.long 0x0 14. " SLB14 ,Software Last Burst Request for Source 14" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0 13. " SLB13 ,Software Last Burst Request for Source 13" "Not requested,Requested"
|
|
bitfld.long 0x0 12. " SLB12 ,Software Last Burst Request for Source 12" "Not requested,Requested"
|
|
bitfld.long 0x0 11. " SLB11 ,Software Last Burst Request for Source 11" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0 10. " SLB10 ,Software Last Burst Request for Source 10" "Not requested,Requested"
|
|
bitfld.long 0x0 9. " SLB9 ,Software Last Burst Request for Source 9" "Not requested,Requested"
|
|
bitfld.long 0x0 8. " SLB8 ,Software Last Burst Request for Source 8" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0 7. " SLB7 ,Software Last Burst Request for Source 7" "Not requested,Requested"
|
|
bitfld.long 0x0 6. " SLB6 ,Software Last Burst Request for Source 6" "Not requested,Requested"
|
|
bitfld.long 0x0 5. " SLB5 ,Software Last Burst Request for Source 5" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0 4. " SLB4 ,Software Last Burst Request for Source 4" "Not requested,Requested"
|
|
bitfld.long 0x0 3. " SLB3 ,Software Last Burst Request for Source 3" "Not requested,Requested"
|
|
bitfld.long 0x0 2. " SLB2 ,Software Last Burst Request for Source 2" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0 1. " SLB1 ,Software Last Burst Request for Source 1" "Not requested,Requested"
|
|
bitfld.long 0x0 0. " SLB0 ,Software Last Burst Request for Source 0" "Not requested,Requested"
|
|
line.long 0x4 "DMAC_SLSREQ,Software Last Single Request Register"
|
|
bitfld.long 0x4 31. " SLS31 ,Software Last Single Request for Source 31" "Not requested,Requested"
|
|
bitfld.long 0x4 30. " SLS30 ,Software Last Single Request for Source 30" "Not requested,Requested"
|
|
bitfld.long 0x4 29. " SLS29 ,Software Last Single Request for Source 29" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x4 28. " SLS28 ,Software Last Single Request for Source 28" "Not requested,Requested"
|
|
bitfld.long 0x4 27. " SLS27 ,Software Last Single Request for Source 27" "Not requested,Requested"
|
|
bitfld.long 0x4 26. " SLS26 ,Software Last Single Request for Source 26" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x4 25. " SLS25 ,Software Last Single Request for Source 25" "Not requested,Requested"
|
|
bitfld.long 0x4 24. " SLS24 ,Software Last Single Request for Source 24" "Not requested,Requested"
|
|
bitfld.long 0x4 23. " SLS23 ,Software Last Single Request for Source 23" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x4 22. " SLS22 ,Software Last Single Request for Source 22" "Not requested,Requested"
|
|
bitfld.long 0x4 21. " SLS21 ,Software Last Single Request for Source 21" "Not requested,Requested"
|
|
bitfld.long 0x4 20. " SLS20 ,Software Last Single Request for Source 20" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x4 19. " SLS19 ,Software Last Single Request for Source 19" "Not requested,Requested"
|
|
bitfld.long 0x4 18. " SLS18 ,Software Last Single Request for Source 18" "Not requested,Requested"
|
|
bitfld.long 0x4 17. " SLS17 ,Software Last Single Request for Source 17" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x4 16. " SLS16 ,Software Last Single Request for Source 16" "Not requested,Requested"
|
|
bitfld.long 0x4 15. " SLS15 ,Software Last Single Request for Source 15" "Not requested,Requested"
|
|
bitfld.long 0x4 14. " SLS14 ,Software Last Single Request for Source 14" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x4 13. " SLS13 ,Software Last Single Request for Source 13" "Not requested,Requested"
|
|
bitfld.long 0x4 12. " SLS12 ,Software Last Single Request for Source 12" "Not requested,Requested"
|
|
bitfld.long 0x4 11. " SLS11 ,Software Last Single Request for Source 11" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x4 10. " SLS10 ,Software Last Single Request for Source 10" "Not requested,Requested"
|
|
bitfld.long 0x4 9. " SLS9 ,Software Last Single Request for Source 9" "Not requested,Requested"
|
|
bitfld.long 0x4 8. " SLS8 ,Software Last Single Request for Source 8" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x4 7. " SLS7 ,Software Last Single Request for Source 7" "Not requested,Requested"
|
|
bitfld.long 0x4 6. " SLS6 ,Software Last Single Request for Source 6" "Not requested,Requested"
|
|
bitfld.long 0x4 5. " SLS5 ,Software Last Single Request for Source 5" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x4 4. " SLS4 ,Software Last Single Request for Source 4" "Not requested,Requested"
|
|
bitfld.long 0x4 3. " SLS3 ,Software Last Single Request for Source 3" "Not requested,Requested"
|
|
bitfld.long 0x4 2. " SLS2 ,Software Last Single Request for Source 2" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x4 1. " SLS1 ,Software Last Single Request for Source 1" "Not requested,Requested"
|
|
bitfld.long 0x4 0. " SLS0 ,Software Last Single Request for Source 0" "Not requested,Requested"
|
|
tree "Channel 0"
|
|
group.long 0x100++0x13
|
|
line.long 0x0 "DMAC_C0SADR,Channel 0 Source Address Register"
|
|
line.long 0x4 "DMAC_C0DADR,Channel Destination Address Register 0"
|
|
line.long 0x8 "DMA_C0LLI,Channel Linked List Item Register 0"
|
|
hexmask.long 0x8 2.--31. 0x4 " LLI ,Linked List Item for Channel 0"
|
|
bitfld.long 0x8 0. " LM ,AHB master select" "Master 1,Master 2"
|
|
line.long 0xC "DMA_C0CR,Channel Control Register 0"
|
|
bitfld.long 0x0C 31. " I ,Terminal Count Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 30. " HPROT[2] ,AHB access information" "Not cacheable,Cacheable"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " HPROT[1] ,AHB access information" "Not bufferable,Bufferable"
|
|
bitfld.long 0x0c 28. " HPROT[0] ,AHB access information" "User,Privileged"
|
|
textline " "
|
|
bitfld.long 0x0C 27. " DI ,Destination Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x0C 26. " SI ,Source Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " D ,Destination AHB master select" "Master 0,Master 1"
|
|
bitfld.long 0x0c 24. " S ,Source AHB master select" "Master 0,Master 1"
|
|
textline " "
|
|
bitfld.long 0x0C 21.--23. " DWIDTH ,Destination Width" "8-bit,16-bit,32-bit,?..."
|
|
bitfld.long 0x0C 18.--20. " SWIDTH ,Source Width" "8-bit,16-bit,32-bit,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 15.--17. " DBSIZE ,Destination Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers"
|
|
bitfld.long 0x0C 12.--14. " SBSIZE ,Source Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers"
|
|
textline " "
|
|
hexmask.long.word 0x0C 0.--11. 1. " TRANSFERSIZE ,Transfer Size"
|
|
line.long 0x10 "DMAC_C0CFG,Channel Configuration Register 0"
|
|
bitfld.long 0x10 18. " H ,Halt" "Enabled,Ignored"
|
|
bitfld.long 0x10 17. " A ,Active" "No data,Data"
|
|
textline " "
|
|
bitfld.long 0x10 16. " L ,Lock" "Disabled,Enabled"
|
|
bitfld.long 0x10 15. " ITC ,Terminal Count Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 14. " IE ,Error Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x10 11.--13. " FLOWCNTRL ,Flow control and transfer type" "Memory-to-memory (DMAC),Memory-to-peripheral (DMAC),Peripheral-to-memory (DMAC),Src.-to-dest. peripheral (DMAC),Src.-to-dest. peripheral (Destination periph),Memory-to-peripheral (Peripheral),Peripheral-to-memory (Peripheral),Src.-to-dest. peripheral (Source periph)"
|
|
textline " "
|
|
sif ((cpu()!="STA2065")&&(cpu()!="STA2165"))
|
|
bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "Reserved,Reserved,Reserved,EFT3,EFT2,SD/SDIO/MMC 1,Ext. Req DREQ0,Ext. Req DREQ1,EFT0,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP0 Rx,SSP0 Tx,UART0 Rx,UART0 Tx,EFT1,USB FS CH0,USB FS CH1,USB FS CH2,USB FS CH3,USB FS CH4,MSP2 Rx,MSP2 Tx,USB FS CH5,Reserved,SRC_DMA_DRF_REQ,SRC_DMA_DRE_REQ,MSP3 Rx,MSP3 Tx,MSP1Rx,MSP1Tx"
|
|
textline " "
|
|
bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "Reserved,Reserved,Reserved,EFT3,EFT2,SD/SDIO/MMC 1,Ext. Req DREQ0,Ext. Req DREQ1,EFT0,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP0 Rx,SSP0 Tx,UART0 Rx,UART0 Tx,EFT1,USB FS CH0,USB FS CH1,USB FS CH2,USB FS CH3,USB FS CH4,MSP2 Rx,MSP2 Tx,USB FS CH5,Reserved,SRC_DMA_DRF_REQ,SRC_DMA_DRE_REQ,MSP3 Rx,MSP3 Tx,MSP1Rx,MSP1Tx"
|
|
else
|
|
bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SCIRXDMAREQ,SCITXDMAREQ,Reserved,EFT3,EFT2,SD/SDIO/MMC 1,Ext. Req DREQ0,Ext. Req DREQ1,EFT0,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP0 Rx,SSP0 Tx,UART0 Rx,UART0 Tx,EFT1,USB HS PHY CH0,USB HS PHY CH1,USB HS PHY CH2,USB HS PHY CH3,USB HS PHY CH4,MSP2 Rx,MSP2 Tx,USB HS PHY CH5,TSC_FIFO_REQ,SRC_DMA_DRF_REQ,SRC_DMA_DRE_REQ,MSP3 Rx,MSP3 Tx,MSP1Rx,MSP1Tx"
|
|
textline " "
|
|
bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SCIRXDMAREQ,SCITXDMAREQ,Reserved,EFT3,EFT2,SD/SDIO/MMC 1,Ext. Req DREQ0,Ext. Req DREQ1,EFT0,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP0 Rx,SSP0 Tx,UART0 Rx,UART0 Tx,EFT1,USB HS PHY CH0,USB HS PHY CH1,USB HS PHY CH2,USB HS PHY CH3,USB HS PHY CH4,MSP2 Rx,MSP2 Tx,USB HS PHY CH5,TSC_FIFO_REQ,SRC_DMA_DRF_REQ,SRC_DMA_DRE_REQ,MSP3 Rx,MSP3 Tx,MSP1Rx,MSP1Tx"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x10 0. " E ,Channel Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Channel 1"
|
|
group.long 0x120++0x13
|
|
line.long 0x0 "DMAC_C1SADR,Channel 1 Source Address Register"
|
|
line.long 0x4 "DMAC_C1DADR,Channel Destination Address Register 1"
|
|
line.long 0x8 "DMA_C1LLI,Channel Linked List Item Register 1"
|
|
hexmask.long 0x8 2.--31. 0x4 " LLI ,Linked List Item for Channel 1"
|
|
bitfld.long 0x8 0. " LM ,AHB master select" "Master 1,Master 2"
|
|
line.long 0xC "DMA_C1CR,Channel Control Register 1"
|
|
bitfld.long 0x0C 31. " I ,Terminal Count Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 30. " HPROT[2] ,AHB access information" "Not cacheable,Cacheable"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " HPROT[1] ,AHB access information" "Not bufferable,Bufferable"
|
|
bitfld.long 0x0c 28. " HPROT[0] ,AHB access information" "User,Privileged"
|
|
textline " "
|
|
bitfld.long 0x0C 27. " DI ,Destination Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x0C 26. " SI ,Source Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " D ,Destination AHB master select" "Master 0,Master 1"
|
|
bitfld.long 0x0c 24. " S ,Source AHB master select" "Master 0,Master 1"
|
|
textline " "
|
|
bitfld.long 0x0C 21.--23. " DWIDTH ,Destination Width" "8-bit,16-bit,32-bit,?..."
|
|
bitfld.long 0x0C 18.--20. " SWIDTH ,Source Width" "8-bit,16-bit,32-bit,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 15.--17. " DBSIZE ,Destination Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers"
|
|
bitfld.long 0x0C 12.--14. " SBSIZE ,Source Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers"
|
|
textline " "
|
|
hexmask.long.word 0x0C 0.--11. 1. " TRANSFERSIZE ,Transfer Size"
|
|
line.long 0x10 "DMAC_C1CFG,Channel Configuration Register 1"
|
|
bitfld.long 0x10 18. " H ,Halt" "Enabled,Ignored"
|
|
bitfld.long 0x10 17. " A ,Active" "No data,Data"
|
|
textline " "
|
|
bitfld.long 0x10 16. " L ,Lock" "Disabled,Enabled"
|
|
bitfld.long 0x10 15. " ITC ,Terminal Count Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 14. " IE ,Error Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x10 11.--13. " FLOWCNTRL ,Flow control and transfer type" "Memory-to-memory (DMAC),Memory-to-peripheral (DMAC),Peripheral-to-memory (DMAC),Src.-to-dest. peripheral (DMAC),Src.-to-dest. peripheral (Destination periph),Memory-to-peripheral (Peripheral),Peripheral-to-memory (Peripheral),Src.-to-dest. peripheral (Source periph)"
|
|
textline " "
|
|
sif ((cpu()!="STA2065")&&(cpu()!="STA2165"))
|
|
bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "Reserved,Reserved,Reserved,EFT3,EFT2,SD/SDIO/MMC 1,Ext. Req DREQ0,Ext. Req DREQ1,EFT0,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP0 Rx,SSP0 Tx,UART0 Rx,UART0 Tx,EFT1,USB FS CH0,USB FS CH1,USB FS CH2,USB FS CH3,USB FS CH4,MSP2 Rx,MSP2 Tx,USB FS CH5,Reserved,SRC_DMA_DRF_REQ,SRC_DMA_DRE_REQ,MSP3 Rx,MSP3 Tx,MSP1Rx,MSP1Tx"
|
|
textline " "
|
|
bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "Reserved,Reserved,Reserved,EFT3,EFT2,SD/SDIO/MMC 1,Ext. Req DREQ0,Ext. Req DREQ1,EFT0,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP0 Rx,SSP0 Tx,UART0 Rx,UART0 Tx,EFT1,USB FS CH0,USB FS CH1,USB FS CH2,USB FS CH3,USB FS CH4,MSP2 Rx,MSP2 Tx,USB FS CH5,Reserved,SRC_DMA_DRF_REQ,SRC_DMA_DRE_REQ,MSP3 Rx,MSP3 Tx,MSP1Rx,MSP1Tx"
|
|
else
|
|
bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SCIRXDMAREQ,SCITXDMAREQ,Reserved,EFT3,EFT2,SD/SDIO/MMC 1,Ext. Req DREQ0,Ext. Req DREQ1,EFT0,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP0 Rx,SSP0 Tx,UART0 Rx,UART0 Tx,EFT1,USB HS PHY CH0,USB HS PHY CH1,USB HS PHY CH2,USB HS PHY CH3,USB HS PHY CH4,MSP2 Rx,MSP2 Tx,USB HS PHY CH5,TSC_FIFO_REQ,SRC_DMA_DRF_REQ,SRC_DMA_DRE_REQ,MSP3 Rx,MSP3 Tx,MSP1Rx,MSP1Tx"
|
|
textline " "
|
|
bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SCIRXDMAREQ,SCITXDMAREQ,Reserved,EFT3,EFT2,SD/SDIO/MMC 1,Ext. Req DREQ0,Ext. Req DREQ1,EFT0,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP0 Rx,SSP0 Tx,UART0 Rx,UART0 Tx,EFT1,USB HS PHY CH0,USB HS PHY CH1,USB HS PHY CH2,USB HS PHY CH3,USB HS PHY CH4,MSP2 Rx,MSP2 Tx,USB HS PHY CH5,TSC_FIFO_REQ,SRC_DMA_DRF_REQ,SRC_DMA_DRE_REQ,MSP3 Rx,MSP3 Tx,MSP1Rx,MSP1Tx"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x10 0. " E ,Channel Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Channel 2"
|
|
group.long 0x140++0x13
|
|
line.long 0x0 "DMAC_C2SADR,Channel 2 Source Address Register"
|
|
line.long 0x4 "DMAC_C2DADR,Channel Destination Address Register 2"
|
|
line.long 0x8 "DMA_C2LLI,Channel Linked List Item Register 2"
|
|
hexmask.long 0x8 2.--31. 0x4 " LLI ,Linked List Item for Channel 2"
|
|
bitfld.long 0x8 0. " LM ,AHB master select" "Master 1,Master 2"
|
|
line.long 0xC "DMA_C2CR,Channel Control Register 2"
|
|
bitfld.long 0x0C 31. " I ,Terminal Count Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 30. " HPROT[2] ,AHB access information" "Not cacheable,Cacheable"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " HPROT[1] ,AHB access information" "Not bufferable,Bufferable"
|
|
bitfld.long 0x0c 28. " HPROT[0] ,AHB access information" "User,Privileged"
|
|
textline " "
|
|
bitfld.long 0x0C 27. " DI ,Destination Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x0C 26. " SI ,Source Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " D ,Destination AHB master select" "Master 0,Master 1"
|
|
bitfld.long 0x0c 24. " S ,Source AHB master select" "Master 0,Master 1"
|
|
textline " "
|
|
bitfld.long 0x0C 21.--23. " DWIDTH ,Destination Width" "8-bit,16-bit,32-bit,?..."
|
|
bitfld.long 0x0C 18.--20. " SWIDTH ,Source Width" "8-bit,16-bit,32-bit,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 15.--17. " DBSIZE ,Destination Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers"
|
|
bitfld.long 0x0C 12.--14. " SBSIZE ,Source Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers"
|
|
textline " "
|
|
hexmask.long.word 0x0C 0.--11. 1. " TRANSFERSIZE ,Transfer Size"
|
|
line.long 0x10 "DMAC_C2CFG,Channel Configuration Register 2"
|
|
bitfld.long 0x10 18. " H ,Halt" "Enabled,Ignored"
|
|
bitfld.long 0x10 17. " A ,Active" "No data,Data"
|
|
textline " "
|
|
bitfld.long 0x10 16. " L ,Lock" "Disabled,Enabled"
|
|
bitfld.long 0x10 15. " ITC ,Terminal Count Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 14. " IE ,Error Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x10 11.--13. " FLOWCNTRL ,Flow control and transfer type" "Memory-to-memory (DMAC),Memory-to-peripheral (DMAC),Peripheral-to-memory (DMAC),Src.-to-dest. peripheral (DMAC),Src.-to-dest. peripheral (Destination periph),Memory-to-peripheral (Peripheral),Peripheral-to-memory (Peripheral),Src.-to-dest. peripheral (Source periph)"
|
|
textline " "
|
|
sif ((cpu()!="STA2065")&&(cpu()!="STA2165"))
|
|
bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "Reserved,Reserved,Reserved,EFT3,EFT2,SD/SDIO/MMC 1,Ext. Req DREQ0,Ext. Req DREQ1,EFT0,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP0 Rx,SSP0 Tx,UART0 Rx,UART0 Tx,EFT1,USB FS CH0,USB FS CH1,USB FS CH2,USB FS CH3,USB FS CH4,MSP2 Rx,MSP2 Tx,USB FS CH5,Reserved,SRC_DMA_DRF_REQ,SRC_DMA_DRE_REQ,MSP3 Rx,MSP3 Tx,MSP1Rx,MSP1Tx"
|
|
textline " "
|
|
bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "Reserved,Reserved,Reserved,EFT3,EFT2,SD/SDIO/MMC 1,Ext. Req DREQ0,Ext. Req DREQ1,EFT0,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP0 Rx,SSP0 Tx,UART0 Rx,UART0 Tx,EFT1,USB FS CH0,USB FS CH1,USB FS CH2,USB FS CH3,USB FS CH4,MSP2 Rx,MSP2 Tx,USB FS CH5,Reserved,SRC_DMA_DRF_REQ,SRC_DMA_DRE_REQ,MSP3 Rx,MSP3 Tx,MSP1Rx,MSP1Tx"
|
|
else
|
|
bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SCIRXDMAREQ,SCITXDMAREQ,Reserved,EFT3,EFT2,SD/SDIO/MMC 1,Ext. Req DREQ0,Ext. Req DREQ1,EFT0,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP0 Rx,SSP0 Tx,UART0 Rx,UART0 Tx,EFT1,USB HS PHY CH0,USB HS PHY CH1,USB HS PHY CH2,USB HS PHY CH3,USB HS PHY CH4,MSP2 Rx,MSP2 Tx,USB HS PHY CH5,TSC_FIFO_REQ,SRC_DMA_DRF_REQ,SRC_DMA_DRE_REQ,MSP3 Rx,MSP3 Tx,MSP1Rx,MSP1Tx"
|
|
textline " "
|
|
bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SCIRXDMAREQ,SCITXDMAREQ,Reserved,EFT3,EFT2,SD/SDIO/MMC 1,Ext. Req DREQ0,Ext. Req DREQ1,EFT0,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP0 Rx,SSP0 Tx,UART0 Rx,UART0 Tx,EFT1,USB HS PHY CH0,USB HS PHY CH1,USB HS PHY CH2,USB HS PHY CH3,USB HS PHY CH4,MSP2 Rx,MSP2 Tx,USB HS PHY CH5,TSC_FIFO_REQ,SRC_DMA_DRF_REQ,SRC_DMA_DRE_REQ,MSP3 Rx,MSP3 Tx,MSP1Rx,MSP1Tx"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x10 0. " E ,Channel Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Channel 3"
|
|
group.long 0x160++0x13
|
|
line.long 0x0 "DMAC_C3SADR,Channel 3 Source Address Register"
|
|
line.long 0x4 "DMAC_C3DADR,Channel Destination Address Register 3"
|
|
line.long 0x8 "DMA_C3LLI,Channel Linked List Item Register 3"
|
|
hexmask.long 0x8 2.--31. 0x4 " LLI ,Linked List Item for Channel 3"
|
|
bitfld.long 0x8 0. " LM ,AHB master select" "Master 1,Master 2"
|
|
line.long 0xC "DMA_C3CR,Channel Control Register 3"
|
|
bitfld.long 0x0C 31. " I ,Terminal Count Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 30. " HPROT[2] ,AHB access information" "Not cacheable,Cacheable"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " HPROT[1] ,AHB access information" "Not bufferable,Bufferable"
|
|
bitfld.long 0x0c 28. " HPROT[0] ,AHB access information" "User,Privileged"
|
|
textline " "
|
|
bitfld.long 0x0C 27. " DI ,Destination Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x0C 26. " SI ,Source Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " D ,Destination AHB master select" "Master 0,Master 1"
|
|
bitfld.long 0x0c 24. " S ,Source AHB master select" "Master 0,Master 1"
|
|
textline " "
|
|
bitfld.long 0x0C 21.--23. " DWIDTH ,Destination Width" "8-bit,16-bit,32-bit,?..."
|
|
bitfld.long 0x0C 18.--20. " SWIDTH ,Source Width" "8-bit,16-bit,32-bit,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 15.--17. " DBSIZE ,Destination Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers"
|
|
bitfld.long 0x0C 12.--14. " SBSIZE ,Source Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers"
|
|
textline " "
|
|
hexmask.long.word 0x0C 0.--11. 1. " TRANSFERSIZE ,Transfer Size"
|
|
line.long 0x10 "DMAC_C3CFG,Channel Configuration Register 3"
|
|
bitfld.long 0x10 18. " H ,Halt" "Enabled,Ignored"
|
|
bitfld.long 0x10 17. " A ,Active" "No data,Data"
|
|
textline " "
|
|
bitfld.long 0x10 16. " L ,Lock" "Disabled,Enabled"
|
|
bitfld.long 0x10 15. " ITC ,Terminal Count Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 14. " IE ,Error Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x10 11.--13. " FLOWCNTRL ,Flow control and transfer type" "Memory-to-memory (DMAC),Memory-to-peripheral (DMAC),Peripheral-to-memory (DMAC),Src.-to-dest. peripheral (DMAC),Src.-to-dest. peripheral (Destination periph),Memory-to-peripheral (Peripheral),Peripheral-to-memory (Peripheral),Src.-to-dest. peripheral (Source periph)"
|
|
textline " "
|
|
sif ((cpu()!="STA2065")&&(cpu()!="STA2165"))
|
|
bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "Reserved,Reserved,Reserved,EFT3,EFT2,SD/SDIO/MMC 1,Ext. Req DREQ0,Ext. Req DREQ1,EFT0,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP0 Rx,SSP0 Tx,UART0 Rx,UART0 Tx,EFT1,USB FS CH0,USB FS CH1,USB FS CH2,USB FS CH3,USB FS CH4,MSP2 Rx,MSP2 Tx,USB FS CH5,Reserved,SRC_DMA_DRF_REQ,SRC_DMA_DRE_REQ,MSP3 Rx,MSP3 Tx,MSP1Rx,MSP1Tx"
|
|
textline " "
|
|
bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "Reserved,Reserved,Reserved,EFT3,EFT2,SD/SDIO/MMC 1,Ext. Req DREQ0,Ext. Req DREQ1,EFT0,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP0 Rx,SSP0 Tx,UART0 Rx,UART0 Tx,EFT1,USB FS CH0,USB FS CH1,USB FS CH2,USB FS CH3,USB FS CH4,MSP2 Rx,MSP2 Tx,USB FS CH5,Reserved,SRC_DMA_DRF_REQ,SRC_DMA_DRE_REQ,MSP3 Rx,MSP3 Tx,MSP1Rx,MSP1Tx"
|
|
else
|
|
bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SCIRXDMAREQ,SCITXDMAREQ,Reserved,EFT3,EFT2,SD/SDIO/MMC 1,Ext. Req DREQ0,Ext. Req DREQ1,EFT0,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP0 Rx,SSP0 Tx,UART0 Rx,UART0 Tx,EFT1,USB HS PHY CH0,USB HS PHY CH1,USB HS PHY CH2,USB HS PHY CH3,USB HS PHY CH4,MSP2 Rx,MSP2 Tx,USB HS PHY CH5,TSC_FIFO_REQ,SRC_DMA_DRF_REQ,SRC_DMA_DRE_REQ,MSP3 Rx,MSP3 Tx,MSP1Rx,MSP1Tx"
|
|
textline " "
|
|
bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SCIRXDMAREQ,SCITXDMAREQ,Reserved,EFT3,EFT2,SD/SDIO/MMC 1,Ext. Req DREQ0,Ext. Req DREQ1,EFT0,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP0 Rx,SSP0 Tx,UART0 Rx,UART0 Tx,EFT1,USB HS PHY CH0,USB HS PHY CH1,USB HS PHY CH2,USB HS PHY CH3,USB HS PHY CH4,MSP2 Rx,MSP2 Tx,USB HS PHY CH5,TSC_FIFO_REQ,SRC_DMA_DRF_REQ,SRC_DMA_DRE_REQ,MSP3 Rx,MSP3 Tx,MSP1Rx,MSP1Tx"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x10 0. " E ,Channel Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Channel 4"
|
|
group.long 0x180++0x13
|
|
line.long 0x0 "DMAC_C4SADR,Channel 4 Source Address Register"
|
|
line.long 0x4 "DMAC_C4DADR,Channel Destination Address Register 4"
|
|
line.long 0x8 "DMA_C4LLI,Channel Linked List Item Register 4"
|
|
hexmask.long 0x8 2.--31. 0x4 " LLI ,Linked List Item for Channel 4"
|
|
bitfld.long 0x8 0. " LM ,AHB master select" "Master 1,Master 2"
|
|
line.long 0xC "DMA_C4CR,Channel Control Register 4"
|
|
bitfld.long 0x0C 31. " I ,Terminal Count Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 30. " HPROT[2] ,AHB access information" "Not cacheable,Cacheable"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " HPROT[1] ,AHB access information" "Not bufferable,Bufferable"
|
|
bitfld.long 0x0c 28. " HPROT[0] ,AHB access information" "User,Privileged"
|
|
textline " "
|
|
bitfld.long 0x0C 27. " DI ,Destination Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x0C 26. " SI ,Source Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " D ,Destination AHB master select" "Master 0,Master 1"
|
|
bitfld.long 0x0c 24. " S ,Source AHB master select" "Master 0,Master 1"
|
|
textline " "
|
|
bitfld.long 0x0C 21.--23. " DWIDTH ,Destination Width" "8-bit,16-bit,32-bit,?..."
|
|
bitfld.long 0x0C 18.--20. " SWIDTH ,Source Width" "8-bit,16-bit,32-bit,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 15.--17. " DBSIZE ,Destination Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers"
|
|
bitfld.long 0x0C 12.--14. " SBSIZE ,Source Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers"
|
|
textline " "
|
|
hexmask.long.word 0x0C 0.--11. 1. " TRANSFERSIZE ,Transfer Size"
|
|
line.long 0x10 "DMAC_C4CFG,Channel Configuration Register 4"
|
|
bitfld.long 0x10 18. " H ,Halt" "Enabled,Ignored"
|
|
bitfld.long 0x10 17. " A ,Active" "No data,Data"
|
|
textline " "
|
|
bitfld.long 0x10 16. " L ,Lock" "Disabled,Enabled"
|
|
bitfld.long 0x10 15. " ITC ,Terminal Count Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 14. " IE ,Error Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x10 11.--13. " FLOWCNTRL ,Flow control and transfer type" "Memory-to-memory (DMAC),Memory-to-peripheral (DMAC),Peripheral-to-memory (DMAC),Src.-to-dest. peripheral (DMAC),Src.-to-dest. peripheral (Destination periph),Memory-to-peripheral (Peripheral),Peripheral-to-memory (Peripheral),Src.-to-dest. peripheral (Source periph)"
|
|
textline " "
|
|
sif ((cpu()!="STA2065")&&(cpu()!="STA2165"))
|
|
bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "Reserved,Reserved,Reserved,EFT3,EFT2,SD/SDIO/MMC 1,Ext. Req DREQ0,Ext. Req DREQ1,EFT0,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP0 Rx,SSP0 Tx,UART0 Rx,UART0 Tx,EFT1,USB FS CH0,USB FS CH1,USB FS CH2,USB FS CH3,USB FS CH4,MSP2 Rx,MSP2 Tx,USB FS CH5,Reserved,SRC_DMA_DRF_REQ,SRC_DMA_DRE_REQ,MSP3 Rx,MSP3 Tx,MSP1Rx,MSP1Tx"
|
|
textline " "
|
|
bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "Reserved,Reserved,Reserved,EFT3,EFT2,SD/SDIO/MMC 1,Ext. Req DREQ0,Ext. Req DREQ1,EFT0,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP0 Rx,SSP0 Tx,UART0 Rx,UART0 Tx,EFT1,USB FS CH0,USB FS CH1,USB FS CH2,USB FS CH3,USB FS CH4,MSP2 Rx,MSP2 Tx,USB FS CH5,Reserved,SRC_DMA_DRF_REQ,SRC_DMA_DRE_REQ,MSP3 Rx,MSP3 Tx,MSP1Rx,MSP1Tx"
|
|
else
|
|
bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SCIRXDMAREQ,SCITXDMAREQ,Reserved,EFT3,EFT2,SD/SDIO/MMC 1,Ext. Req DREQ0,Ext. Req DREQ1,EFT0,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP0 Rx,SSP0 Tx,UART0 Rx,UART0 Tx,EFT1,USB HS PHY CH0,USB HS PHY CH1,USB HS PHY CH2,USB HS PHY CH3,USB HS PHY CH4,MSP2 Rx,MSP2 Tx,USB HS PHY CH5,TSC_FIFO_REQ,SRC_DMA_DRF_REQ,SRC_DMA_DRE_REQ,MSP3 Rx,MSP3 Tx,MSP1Rx,MSP1Tx"
|
|
textline " "
|
|
bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SCIRXDMAREQ,SCITXDMAREQ,Reserved,EFT3,EFT2,SD/SDIO/MMC 1,Ext. Req DREQ0,Ext. Req DREQ1,EFT0,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP0 Rx,SSP0 Tx,UART0 Rx,UART0 Tx,EFT1,USB HS PHY CH0,USB HS PHY CH1,USB HS PHY CH2,USB HS PHY CH3,USB HS PHY CH4,MSP2 Rx,MSP2 Tx,USB HS PHY CH5,TSC_FIFO_REQ,SRC_DMA_DRF_REQ,SRC_DMA_DRE_REQ,MSP3 Rx,MSP3 Tx,MSP1Rx,MSP1Tx"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x10 0. " E ,Channel Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Channel 5"
|
|
group.long 0x1A0++0x13
|
|
line.long 0x0 "DMAC_C5SADR,Channel 5 Source Address Register"
|
|
line.long 0x4 "DMAC_C5DADR,Channel Destination Address Register 5"
|
|
line.long 0x8 "DMA_C5LLI,Channel Linked List Item Register 5"
|
|
hexmask.long 0x8 2.--31. 0x4 " LLI ,Linked List Item for Channel 5"
|
|
bitfld.long 0x8 0. " LM ,AHB master select" "Master 1,Master 2"
|
|
line.long 0xC "DMA_C5CR,Channel Control Register 5"
|
|
bitfld.long 0x0C 31. " I ,Terminal Count Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 30. " HPROT[2] ,AHB access information" "Not cacheable,Cacheable"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " HPROT[1] ,AHB access information" "Not bufferable,Bufferable"
|
|
bitfld.long 0x0c 28. " HPROT[0] ,AHB access information" "User,Privileged"
|
|
textline " "
|
|
bitfld.long 0x0C 27. " DI ,Destination Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x0C 26. " SI ,Source Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " D ,Destination AHB master select" "Master 0,Master 1"
|
|
bitfld.long 0x0c 24. " S ,Source AHB master select" "Master 0,Master 1"
|
|
textline " "
|
|
bitfld.long 0x0C 21.--23. " DWIDTH ,Destination Width" "8-bit,16-bit,32-bit,?..."
|
|
bitfld.long 0x0C 18.--20. " SWIDTH ,Source Width" "8-bit,16-bit,32-bit,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 15.--17. " DBSIZE ,Destination Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers"
|
|
bitfld.long 0x0C 12.--14. " SBSIZE ,Source Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers"
|
|
textline " "
|
|
hexmask.long.word 0x0C 0.--11. 1. " TRANSFERSIZE ,Transfer Size"
|
|
line.long 0x10 "DMAC_C5CFG,Channel Configuration Register 5"
|
|
bitfld.long 0x10 18. " H ,Halt" "Enabled,Ignored"
|
|
bitfld.long 0x10 17. " A ,Active" "No data,Data"
|
|
textline " "
|
|
bitfld.long 0x10 16. " L ,Lock" "Disabled,Enabled"
|
|
bitfld.long 0x10 15. " ITC ,Terminal Count Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 14. " IE ,Error Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x10 11.--13. " FLOWCNTRL ,Flow control and transfer type" "Memory-to-memory (DMAC),Memory-to-peripheral (DMAC),Peripheral-to-memory (DMAC),Src.-to-dest. peripheral (DMAC),Src.-to-dest. peripheral (Destination periph),Memory-to-peripheral (Peripheral),Peripheral-to-memory (Peripheral),Src.-to-dest. peripheral (Source periph)"
|
|
textline " "
|
|
sif ((cpu()!="STA2065")&&(cpu()!="STA2165"))
|
|
bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "Reserved,Reserved,Reserved,EFT3,EFT2,SD/SDIO/MMC 1,Ext. Req DREQ0,Ext. Req DREQ1,EFT0,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP0 Rx,SSP0 Tx,UART0 Rx,UART0 Tx,EFT1,USB FS CH0,USB FS CH1,USB FS CH2,USB FS CH3,USB FS CH4,MSP2 Rx,MSP2 Tx,USB FS CH5,Reserved,SRC_DMA_DRF_REQ,SRC_DMA_DRE_REQ,MSP3 Rx,MSP3 Tx,MSP1Rx,MSP1Tx"
|
|
textline " "
|
|
bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "Reserved,Reserved,Reserved,EFT3,EFT2,SD/SDIO/MMC 1,Ext. Req DREQ0,Ext. Req DREQ1,EFT0,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP0 Rx,SSP0 Tx,UART0 Rx,UART0 Tx,EFT1,USB FS CH0,USB FS CH1,USB FS CH2,USB FS CH3,USB FS CH4,MSP2 Rx,MSP2 Tx,USB FS CH5,Reserved,SRC_DMA_DRF_REQ,SRC_DMA_DRE_REQ,MSP3 Rx,MSP3 Tx,MSP1Rx,MSP1Tx"
|
|
else
|
|
bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SCIRXDMAREQ,SCITXDMAREQ,Reserved,EFT3,EFT2,SD/SDIO/MMC 1,Ext. Req DREQ0,Ext. Req DREQ1,EFT0,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP0 Rx,SSP0 Tx,UART0 Rx,UART0 Tx,EFT1,USB HS PHY CH0,USB HS PHY CH1,USB HS PHY CH2,USB HS PHY CH3,USB HS PHY CH4,MSP2 Rx,MSP2 Tx,USB HS PHY CH5,TSC_FIFO_REQ,SRC_DMA_DRF_REQ,SRC_DMA_DRE_REQ,MSP3 Rx,MSP3 Tx,MSP1Rx,MSP1Tx"
|
|
textline " "
|
|
bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SCIRXDMAREQ,SCITXDMAREQ,Reserved,EFT3,EFT2,SD/SDIO/MMC 1,Ext. Req DREQ0,Ext. Req DREQ1,EFT0,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP0 Rx,SSP0 Tx,UART0 Rx,UART0 Tx,EFT1,USB HS PHY CH0,USB HS PHY CH1,USB HS PHY CH2,USB HS PHY CH3,USB HS PHY CH4,MSP2 Rx,MSP2 Tx,USB HS PHY CH5,TSC_FIFO_REQ,SRC_DMA_DRF_REQ,SRC_DMA_DRE_REQ,MSP3 Rx,MSP3 Tx,MSP1Rx,MSP1Tx"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x10 0. " E ,Channel Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Channel 6"
|
|
group.long 0x1C0++0x13
|
|
line.long 0x0 "DMAC_C6SADR,Channel 6 Source Address Register"
|
|
line.long 0x4 "DMAC_C6DADR,Channel Destination Address Register 6"
|
|
line.long 0x8 "DMA_C6LLI,Channel Linked List Item Register 6"
|
|
hexmask.long 0x8 2.--31. 0x4 " LLI ,Linked List Item for Channel 6"
|
|
bitfld.long 0x8 0. " LM ,AHB master select" "Master 1,Master 2"
|
|
line.long 0xC "DMA_C6CR,Channel Control Register 6"
|
|
bitfld.long 0x0C 31. " I ,Terminal Count Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 30. " HPROT[2] ,AHB access information" "Not cacheable,Cacheable"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " HPROT[1] ,AHB access information" "Not bufferable,Bufferable"
|
|
bitfld.long 0x0c 28. " HPROT[0] ,AHB access information" "User,Privileged"
|
|
textline " "
|
|
bitfld.long 0x0C 27. " DI ,Destination Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x0C 26. " SI ,Source Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " D ,Destination AHB master select" "Master 0,Master 1"
|
|
bitfld.long 0x0c 24. " S ,Source AHB master select" "Master 0,Master 1"
|
|
textline " "
|
|
bitfld.long 0x0C 21.--23. " DWIDTH ,Destination Width" "8-bit,16-bit,32-bit,?..."
|
|
bitfld.long 0x0C 18.--20. " SWIDTH ,Source Width" "8-bit,16-bit,32-bit,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 15.--17. " DBSIZE ,Destination Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers"
|
|
bitfld.long 0x0C 12.--14. " SBSIZE ,Source Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers"
|
|
textline " "
|
|
hexmask.long.word 0x0C 0.--11. 1. " TRANSFERSIZE ,Transfer Size"
|
|
line.long 0x10 "DMAC_C6CFG,Channel Configuration Register 6"
|
|
bitfld.long 0x10 18. " H ,Halt" "Enabled,Ignored"
|
|
bitfld.long 0x10 17. " A ,Active" "No data,Data"
|
|
textline " "
|
|
bitfld.long 0x10 16. " L ,Lock" "Disabled,Enabled"
|
|
bitfld.long 0x10 15. " ITC ,Terminal Count Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 14. " IE ,Error Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x10 11.--13. " FLOWCNTRL ,Flow control and transfer type" "Memory-to-memory (DMAC),Memory-to-peripheral (DMAC),Peripheral-to-memory (DMAC),Src.-to-dest. peripheral (DMAC),Src.-to-dest. peripheral (Destination periph),Memory-to-peripheral (Peripheral),Peripheral-to-memory (Peripheral),Src.-to-dest. peripheral (Source periph)"
|
|
textline " "
|
|
sif ((cpu()!="STA2065")&&(cpu()!="STA2165"))
|
|
bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "Reserved,Reserved,Reserved,EFT3,EFT2,SD/SDIO/MMC 1,Ext. Req DREQ0,Ext. Req DREQ1,EFT0,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP0 Rx,SSP0 Tx,UART0 Rx,UART0 Tx,EFT1,USB FS CH0,USB FS CH1,USB FS CH2,USB FS CH3,USB FS CH4,MSP2 Rx,MSP2 Tx,USB FS CH5,Reserved,SRC_DMA_DRF_REQ,SRC_DMA_DRE_REQ,MSP3 Rx,MSP3 Tx,MSP1Rx,MSP1Tx"
|
|
textline " "
|
|
bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "Reserved,Reserved,Reserved,EFT3,EFT2,SD/SDIO/MMC 1,Ext. Req DREQ0,Ext. Req DREQ1,EFT0,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP0 Rx,SSP0 Tx,UART0 Rx,UART0 Tx,EFT1,USB FS CH0,USB FS CH1,USB FS CH2,USB FS CH3,USB FS CH4,MSP2 Rx,MSP2 Tx,USB FS CH5,Reserved,SRC_DMA_DRF_REQ,SRC_DMA_DRE_REQ,MSP3 Rx,MSP3 Tx,MSP1Rx,MSP1Tx"
|
|
else
|
|
bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SCIRXDMAREQ,SCITXDMAREQ,Reserved,EFT3,EFT2,SD/SDIO/MMC 1,Ext. Req DREQ0,Ext. Req DREQ1,EFT0,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP0 Rx,SSP0 Tx,UART0 Rx,UART0 Tx,EFT1,USB HS PHY CH0,USB HS PHY CH1,USB HS PHY CH2,USB HS PHY CH3,USB HS PHY CH4,MSP2 Rx,MSP2 Tx,USB HS PHY CH5,TSC_FIFO_REQ,SRC_DMA_DRF_REQ,SRC_DMA_DRE_REQ,MSP3 Rx,MSP3 Tx,MSP1Rx,MSP1Tx"
|
|
textline " "
|
|
bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SCIRXDMAREQ,SCITXDMAREQ,Reserved,EFT3,EFT2,SD/SDIO/MMC 1,Ext. Req DREQ0,Ext. Req DREQ1,EFT0,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP0 Rx,SSP0 Tx,UART0 Rx,UART0 Tx,EFT1,USB HS PHY CH0,USB HS PHY CH1,USB HS PHY CH2,USB HS PHY CH3,USB HS PHY CH4,MSP2 Rx,MSP2 Tx,USB HS PHY CH5,TSC_FIFO_REQ,SRC_DMA_DRF_REQ,SRC_DMA_DRE_REQ,MSP3 Rx,MSP3 Tx,MSP1Rx,MSP1Tx"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x10 0. " E ,Channel Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Channel 7"
|
|
group.long 0x1E0++0x13
|
|
line.long 0x0 "DMAC_C7SADR,Channel 7 Source Address Register"
|
|
line.long 0x4 "DMAC_C7DADR,Channel Destination Address Register 7"
|
|
line.long 0x8 "DMA_C7LLI,Channel Linked List Item Register 7"
|
|
hexmask.long 0x8 2.--31. 0x4 " LLI ,Linked List Item for Channel 7"
|
|
bitfld.long 0x8 0. " LM ,AHB master select" "Master 1,Master 2"
|
|
line.long 0xC "DMA_C7CR,Channel Control Register 7"
|
|
bitfld.long 0x0C 31. " I ,Terminal Count Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 30. " HPROT[2] ,AHB access information" "Not cacheable,Cacheable"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " HPROT[1] ,AHB access information" "Not bufferable,Bufferable"
|
|
bitfld.long 0x0c 28. " HPROT[0] ,AHB access information" "User,Privileged"
|
|
textline " "
|
|
bitfld.long 0x0C 27. " DI ,Destination Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x0C 26. " SI ,Source Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " D ,Destination AHB master select" "Master 0,Master 1"
|
|
bitfld.long 0x0c 24. " S ,Source AHB master select" "Master 0,Master 1"
|
|
textline " "
|
|
bitfld.long 0x0C 21.--23. " DWIDTH ,Destination Width" "8-bit,16-bit,32-bit,?..."
|
|
bitfld.long 0x0C 18.--20. " SWIDTH ,Source Width" "8-bit,16-bit,32-bit,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 15.--17. " DBSIZE ,Destination Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers"
|
|
bitfld.long 0x0C 12.--14. " SBSIZE ,Source Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers"
|
|
textline " "
|
|
hexmask.long.word 0x0C 0.--11. 1. " TRANSFERSIZE ,Transfer Size"
|
|
line.long 0x10 "DMAC_C7CFG,Channel Configuration Register 7"
|
|
bitfld.long 0x10 18. " H ,Halt" "Enabled,Ignored"
|
|
bitfld.long 0x10 17. " A ,Active" "No data,Data"
|
|
textline " "
|
|
bitfld.long 0x10 16. " L ,Lock" "Disabled,Enabled"
|
|
bitfld.long 0x10 15. " ITC ,Terminal Count Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 14. " IE ,Error Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x10 11.--13. " FLOWCNTRL ,Flow control and transfer type" "Memory-to-memory (DMAC),Memory-to-peripheral (DMAC),Peripheral-to-memory (DMAC),Src.-to-dest. peripheral (DMAC),Src.-to-dest. peripheral (Destination periph),Memory-to-peripheral (Peripheral),Peripheral-to-memory (Peripheral),Src.-to-dest. peripheral (Source periph)"
|
|
textline " "
|
|
sif ((cpu()!="STA2065")&&(cpu()!="STA2165"))
|
|
bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "Reserved,Reserved,Reserved,EFT3,EFT2,SD/SDIO/MMC 1,Ext. Req DREQ0,Ext. Req DREQ1,EFT0,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP0 Rx,SSP0 Tx,UART0 Rx,UART0 Tx,EFT1,USB FS CH0,USB FS CH1,USB FS CH2,USB FS CH3,USB FS CH4,MSP2 Rx,MSP2 Tx,USB FS CH5,Reserved,SRC_DMA_DRF_REQ,SRC_DMA_DRE_REQ,MSP3 Rx,MSP3 Tx,MSP1Rx,MSP1Tx"
|
|
textline " "
|
|
bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "Reserved,Reserved,Reserved,EFT3,EFT2,SD/SDIO/MMC 1,Ext. Req DREQ0,Ext. Req DREQ1,EFT0,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP0 Rx,SSP0 Tx,UART0 Rx,UART0 Tx,EFT1,USB FS CH0,USB FS CH1,USB FS CH2,USB FS CH3,USB FS CH4,MSP2 Rx,MSP2 Tx,USB FS CH5,Reserved,SRC_DMA_DRF_REQ,SRC_DMA_DRE_REQ,MSP3 Rx,MSP3 Tx,MSP1Rx,MSP1Tx"
|
|
else
|
|
bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "SCIRXDMAREQ,SCITXDMAREQ,Reserved,EFT3,EFT2,SD/SDIO/MMC 1,Ext. Req DREQ0,Ext. Req DREQ1,EFT0,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP0 Rx,SSP0 Tx,UART0 Rx,UART0 Tx,EFT1,USB HS PHY CH0,USB HS PHY CH1,USB HS PHY CH2,USB HS PHY CH3,USB HS PHY CH4,MSP2 Rx,MSP2 Tx,USB HS PHY CH5,TSC_FIFO_REQ,SRC_DMA_DRF_REQ,SRC_DMA_DRE_REQ,MSP3 Rx,MSP3 Tx,MSP1Rx,MSP1Tx"
|
|
textline " "
|
|
bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "SCIRXDMAREQ,SCITXDMAREQ,Reserved,EFT3,EFT2,SD/SDIO/MMC 1,Ext. Req DREQ0,Ext. Req DREQ1,EFT0,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP0 Rx,SSP0 Tx,UART0 Rx,UART0 Tx,EFT1,USB HS PHY CH0,USB HS PHY CH1,USB HS PHY CH2,USB HS PHY CH3,USB HS PHY CH4,MSP2 Rx,MSP2 Tx,USB HS PHY CH5,TSC_FIFO_REQ,SRC_DMA_DRF_REQ,SRC_DMA_DRE_REQ,MSP3 Rx,MSP3 Tx,MSP1Rx,MSP1Tx"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x10 0. " E ,Channel Enable" "Disabled,Enabled"
|
|
tree.end
|
|
rgroup.long 0xfe0++0x1f "DMAC Peripheral Identification Registers"
|
|
line.long 0x00 "PERIPHID0,DMAC Peripheral Identification Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PARTNUMBER0 ,Part number 0"
|
|
line.long 0x04 "DMAC_PERIPHID1,DMAC Peripheral Identification Register 1"
|
|
bitfld.long 0x04 4.--7. " DESIGNER0 ,Designer 0" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
bitfld.long 0x04 0.--3. " PARTNUMBER1 ,Part number 1" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
line.long 0x08 "DMAC_PERIPHID2,DMAC Peripheral Identification Register 2"
|
|
bitfld.long 0x08 4.--7. " REVISION ,Revision Number" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
bitfld.long 0x08 0.--3. " DESIGNER1 ,Designer 1" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
line.long 0x0c "DMAC_PERIPHID3,DMAC Peripheral Identification Register 3"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " CONFIGURATION ,Configuration"
|
|
line.long 0x10 "DMAC_PCELLID0,DMAC Identification Register 0"
|
|
hexmask.long.byte 0x10 0.--7. 1. " DMAC_PCELLID0 ,Identification"
|
|
line.long 0x14 "DMAC_PCELLID1,DMAC Identification Register 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " DMAC_PCELLID1 ,Identification"
|
|
line.long 0x18 "DMAC_PCELLID2,DMAC Identification Register 2"
|
|
hexmask.long.byte 0x18 0.--7. 1. " DMAC_PCELLID2 ,Identification"
|
|
line.long 0x1c "DMAC_PCELLID3,DMAC Identification Register 3"
|
|
hexmask.long.byte 0x1c 0.--7. 1. " DMAC_PCELLID3 ,Identification"
|
|
width 0xB
|
|
tree.end
|
|
tree "DMAC 1"
|
|
base asd:0x10150000
|
|
width 18.
|
|
rgroup.long 0x0++0x07
|
|
line.long 0x0 "DMA_MIS,DMA Masked Interrupt Status Register"
|
|
bitfld.long 0x0 7. " IS7 ,Interrupt Status After Masking 7" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 6. " IS6 ,Interrupt Status After Masking 6" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 5. " IS5 ,Interrupt Status After Masking 5" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 4. " IS4 ,Interrupt Status After Masking 4" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 3. " IS3 ,Interrupt Status After Masking 3" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 2. " IS2 ,Interrupt Status After Masking 2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 1. " IS1 ,Interrupt Status After Masking 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 0. " IS0 ,Interrupt Status After Masking 0" "No interrupt,Interrupt"
|
|
line.long 0x4 "DMA_TCMIS,DMA Terminal Count Masked Interrupt Status Register"
|
|
bitfld.long 0x4 7. " ITCS7 ,Terminal Count Interrupt Status After Masking 7" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 6. " ITCS6 ,Terminal Count Interrupt Status After Masking 6" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 5. " ITCS5 ,Terminal Count Interrupt Status After Masking 5" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 4. " ITCS4 ,Terminal Count Interrupt Status After Masking 4" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 3. " ITCS3 ,Terminal Count Interrupt Status After Masking 3" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 2. " ITCS2 ,Terminal Count Interrupt Status After Masking 2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x4 1. " ITCS1 ,Terminal Count Interrupt Status After Masking 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x4 0. " ITCS0 ,Terminal Count Interrupt Status After Masking 0" "No interrupt,Interrupt"
|
|
wgroup.long 0x8++0x03
|
|
line.long 0x0 "DMA_TCICR,DMA Terminal Count Interrupt Clear Register ("
|
|
bitfld.long 0x0 7. " ITCC7 ,Terminal Count Interrupt Clear 7" "No effect,Clear"
|
|
bitfld.long 0x0 6. " ITCC6 ,Terminal Count Interrupt Clear 6" "No effect,Clear"
|
|
bitfld.long 0x0 5. " ITCC5 ,Terminal Count Interrupt Clear 5" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x0 4. " ITCC4 ,Terminal Count Interrupt Clear 4" "No effect,Clear"
|
|
bitfld.long 0x0 3. " ITCC3 ,Terminal Count Interrupt Clear 3" "No effect,Clear"
|
|
bitfld.long 0x0 2. " ITCC2 ,Terminal Count Interrupt Clear 2" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x0 1. " ITCC1 ,Terminal Count Interrupt Clear 1" "No effect,Clear"
|
|
bitfld.long 0x0 0. " ITCC0 ,Terminal Count Interrupt Clear 0" "No effect,Clear"
|
|
rgroup.long 0xC++0x03
|
|
line.long 0x0 "DMA_EMIS,DMA Error Masked Interrupt Status Register"
|
|
bitfld.long 0x0 7. " IES7 ,Error Interrupt Status After Masking 7" "No error,Error"
|
|
bitfld.long 0x0 6. " IES6 ,Error Interrupt Status After Masking 6" "No error,Error"
|
|
bitfld.long 0x0 5. " IES5 ,Error Interrupt Status After Masking 5" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x0 4. " IES4 ,Error Interrupt Status After Masking 4" "No error,Error"
|
|
bitfld.long 0x0 3. " IES3 ,Error Interrupt Status After Masking 3" "No error,Error"
|
|
bitfld.long 0x0 2. " IES2 ,Error Interrupt Status After Masking 2" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x0 1. " IES1 ,Error Interrupt Status After Masking 1" "No error,Error"
|
|
bitfld.long 0x0 0. " IES0 ,Error Interrupt Status After Masking 0" "No error,Error"
|
|
wgroup.long 0x10++0x03
|
|
line.long 0x0 "DMA_EICR,Error Interrupt Clear Register"
|
|
bitfld.long 0x0 7. " IEC7 ,Error Interrupt Clear 7" "No effect,Clear"
|
|
bitfld.long 0x0 6. " IEC6 ,Error Interrupt Clear 6" "No effect,Clear"
|
|
bitfld.long 0x0 5. " IEC5 ,Error Interrupt Clear 5" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x0 4. " IEC4 ,Error Interrupt Clear 4" "No effect,Clear"
|
|
bitfld.long 0x0 3. " IEC3 ,Error Interrupt Clear 3" "No effect,Clear"
|
|
bitfld.long 0x0 2. " IEC2 ,Error Interrupt Clear 2" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x0 1. " IEC1 ,Error Interrupt Clear 1" "No effect,Clear"
|
|
bitfld.long 0x0 0. " IEC0 ,Error Interrupt Clear 0" "No effect,Clear"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x0 "DMA_TCRIS,DMA Terminal Count Raw Interrupt Register"
|
|
bitfld.long 0x0 7. " RITCS7 ,Terminal Count Raw Interrupt Status 7" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 6. " RITCS6 ,Terminal Count Raw Interrupt Status 6" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 5. " RITCS5 ,Terminal Count Raw Interrupt Status 5" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 4. " RITCS4 ,Terminal Count Raw Interrupt Status 4" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 3. " RITCS3 ,Terminal Count Raw Interrupt Status 3" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 2. " RITCS2 ,Terminal Count Raw Interrupt Status 2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 1. " RITCS1 ,Terminal Count Raw Interrupt Status 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 0. " RITCS0 ,Terminal Count Raw Interrupt Status 0" "No interrupt,Interrupt"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x0 "DMA_ERIS,DMA Error Raw Interrupt Register"
|
|
bitfld.long 0x0 7. " RIES7 ,Error Raw Interrupt Status 7" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 6. " RIES6 ,Error Raw Interrupt Status 6" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 5. " RIES5 ,Error Raw Interrupt Status 5" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 4. " RIES4 ,Error Raw Interrupt Status 4" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 3. " RIES3 ,Error Raw Interrupt Status 3" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 2. " RIES2 ,Error Raw Interrupt Status 2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0 1. " RIES1 ,Error Raw Interrupt Status 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x0 0. " RIES0 ,Error Raw Interrupt Status 0" "No interrupt,Interrupt"
|
|
rgroup.long 0x1C++0x07
|
|
line.long 0x0 "DMA_ECHSR,Enabled Channel Status Register"
|
|
bitfld.long 0x0 7. " ENCS7 ,Enabled Channel Status 7" "Disabled,Enabled"
|
|
bitfld.long 0x0 6. " ENCS6 ,Enabled Channel Status 6" "Disabled,Enabled"
|
|
bitfld.long 0x0 5. " ENCS5 ,Enabled Channel Status 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 4. " ENCS4 ,Enabled Channel Status 4" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. " ENCS3 ,Enabled Channel Status 3" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " ENCS2 ,Enabled Channel Status 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 1. " ENCS1 ,Enabled Channel Status 1" "Disabled,Enabled"
|
|
bitfld.long 0x0 0. " ENCS0 ,Enabled Channel Status 0" "Disabled,Enabled"
|
|
line.long 0x4 "DMA_SBREQ,Software Burst Request Register"
|
|
bitfld.long 0x4 31. " SBR31 ,Software Burst Request for Source 31" "Not requested,Requested"
|
|
bitfld.long 0x4 30. " SBR30 ,Software Burst Request for Source 30" "Not requested,Requested"
|
|
bitfld.long 0x4 29. " SBR29 ,Software Burst Request for Source 29" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x4 28. " SBR28 ,Software Burst Request for Source 28" "Not requested,Requested"
|
|
bitfld.long 0x4 27. " SBR27 ,Software Burst Request for Source 27" "Not requested,Requested"
|
|
bitfld.long 0x4 26. " SBR26 ,Software Burst Request for Source 26" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x4 25. " SBR25 ,Software Burst Request for Source 25" "Not requested,Requested"
|
|
bitfld.long 0x4 24. " SBR24 ,Software Burst Request for Source 24" "Not requested,Requested"
|
|
bitfld.long 0x4 23. " SBR23 ,Software Burst Request for Source 23" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x4 22. " SBR22 ,Software Burst Request for Source 22" "Not requested,Requested"
|
|
bitfld.long 0x4 21. " SBR21 ,Software Burst Request for Source 21" "Not requested,Requested"
|
|
bitfld.long 0x4 20. " SBR20 ,Software Burst Request for Source 20" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x4 19. " SBR19 ,Software Burst Request for Source 19" "Not requested,Requested"
|
|
bitfld.long 0x4 18. " SBR18 ,Software Burst Request for Source 18" "Not requested,Requested"
|
|
bitfld.long 0x4 17. " SBR17 ,Software Burst Request for Source 17" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x4 16. " SBR16 ,Software Burst Request for Source 16" "Not requested,Requested"
|
|
bitfld.long 0x4 15. " SBR15 ,Software Burst Request for Source 15" "Not requested,Requested"
|
|
bitfld.long 0x4 14. " SBR14 ,Software Burst Request for Source 14" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x4 13. " SBR13 ,Software Burst Request for Source 13" "Not requested,Requested"
|
|
bitfld.long 0x4 12. " SBR12 ,Software Burst Request for Source 12" "Not requested,Requested"
|
|
bitfld.long 0x4 11. " SBR11 ,Software Burst Request for Source 11" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x4 10. " SBR10 ,Software Burst Request for Source 10" "Not requested,Requested"
|
|
bitfld.long 0x4 9. " SBR9 ,Software Burst Request for Source 9" "Not requested,Requested"
|
|
bitfld.long 0x4 8. " SBR8 ,Software Burst Request for Source 8" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x4 7. " SBR7 ,Software Burst Request for Source 7" "Not requested,Requested"
|
|
bitfld.long 0x4 6. " SBR6 ,Software Burst Request for Source 6" "Not requested,Requested"
|
|
bitfld.long 0x4 5. " SBR5 ,Software Burst Request for Source 5" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x4 4. " SBR4 ,Software Burst Request for Source 4" "Not requested,Requested"
|
|
bitfld.long 0x4 3. " SBR3 ,Software Burst Request for Source 3" "Not requested,Requested"
|
|
bitfld.long 0x4 2. " SBR2 ,Software Burst Request for Source 2" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x4 1. " SBR1 ,Software Burst Request for Source 1" "Not requested,Requested"
|
|
bitfld.long 0x4 0. " SBR0 ,Software Burst Request for Source 0" "Not requested,Requested"
|
|
group.long 0x24++0x03
|
|
line.long 0x0 "DMA_SSREQ,Software Single Request Register"
|
|
bitfld.long 0x0 31. " SSR31 ,Software Single Request for Source 31" "Not requested,Requested"
|
|
bitfld.long 0x0 30. " SSR30 ,Software Single Request for Source 30" "Not requested,Requested"
|
|
bitfld.long 0x0 29. " SSR29 ,Software Single Request for Source 29" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0 28. " SSR28 ,Software Single Request for Source 28" "Not requested,Requested"
|
|
bitfld.long 0x0 27. " SSR27 ,Software Single Request for Source 27" "Not requested,Requested"
|
|
bitfld.long 0x0 26. " SSR26 ,Software Single Request for Source 26" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0 25. " SSR25 ,Software Single Request for Source 25" "Not requested,Requested"
|
|
bitfld.long 0x0 24. " SSR24 ,Software Single Request for Source 24" "Not requested,Requested"
|
|
bitfld.long 0x0 23. " SSR23 ,Software Single Request for Source 23" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0 22. " SSR22 ,Software Single Request for Source 22" "Not requested,Requested"
|
|
bitfld.long 0x0 21. " SSR21 ,Software Single Request for Source 21" "Not requested,Requested"
|
|
bitfld.long 0x0 20. " SSR20 ,Software Single Request for Source 20" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0 19. " SSR19 ,Software Single Request for Source 19" "Not requested,Requested"
|
|
bitfld.long 0x0 18. " SSR18 ,Software Single Request for Source 18" "Not requested,Requested"
|
|
bitfld.long 0x0 17. " SSR17 ,Software Single Request for Source 17" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0 16. " SSR16 ,Software Single Request for Source 16" "Not requested,Requested"
|
|
bitfld.long 0x0 15. " SSR15 ,Software Single Request for Source 15" "Not requested,Requested"
|
|
bitfld.long 0x0 14. " SSR14 ,Software Single Request for Source 14" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0 13. " SSR13 ,Software Single Request for Source 13" "Not requested,Requested"
|
|
bitfld.long 0x0 12. " SSR12 ,Software Single Request for Source 12" "Not requested,Requested"
|
|
bitfld.long 0x0 11. " SSR11 ,Software Single Request for Source 11" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0 10. " SSR10 ,Software Single Request for Source 10" "Not requested,Requested"
|
|
bitfld.long 0x0 9. " SSR9 ,Software Single Request for Source 9" "Not requested,Requested"
|
|
bitfld.long 0x0 8. " SSR8 ,Software Single Request for Source 8" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0 7. " SSR7 ,Software Single Request for Source 7" "Not requested,Requested"
|
|
bitfld.long 0x0 6. " SSR6 ,Software Single Request for Source 6" "Not requested,Requested"
|
|
bitfld.long 0x0 5. " SSR5 ,Software Single Request for Source 5" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0 4. " SSR4 ,Software Single Request for Source 4" "Not requested,Requested"
|
|
bitfld.long 0x0 3. " SSR3 ,Software Single Request for Source 3" "Not requested,Requested"
|
|
bitfld.long 0x0 2. " SSR2 ,Software Single Request for Source 2" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0 1. " SSR1 ,Software Single Request for Source 1" "Not requested,Requested"
|
|
bitfld.long 0x0 0. " SSR0 ,Software Single Request for Source 0" "Not requested,Requested"
|
|
rgroup.long 0x28++0x07
|
|
line.long 0x0 "DMA_SLBREQ,Software Last Burst Request Register"
|
|
bitfld.long 0x0 31. " SLB31 ,Software Last Burst Request for Source 31" "Not requested,Requested"
|
|
bitfld.long 0x0 30. " SLB30 ,Software Last Burst Request for Source 30" "Not requested,Requested"
|
|
bitfld.long 0x0 29. " SLB29 ,Software Last Burst Request for Source 29" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0 28. " SLB28 ,Software Last Burst Request for Source 28" "Not requested,Requested"
|
|
bitfld.long 0x0 27. " SLB27 ,Software Last Burst Request for Source 27" "Not requested,Requested"
|
|
bitfld.long 0x0 26. " SLB26 ,Software Last Burst Request for Source 26" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0 25. " SLB25 ,Software Last Burst Request for Source 25" "Not requested,Requested"
|
|
bitfld.long 0x0 24. " SLB24 ,Software Last Burst Request for Source 24" "Not requested,Requested"
|
|
bitfld.long 0x0 23. " SLB23 ,Software Last Burst Request for Source 23" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0 22. " SLB22 ,Software Last Burst Request for Source 22" "Not requested,Requested"
|
|
bitfld.long 0x0 21. " SLB21 ,Software Last Burst Request for Source 21" "Not requested,Requested"
|
|
bitfld.long 0x0 20. " SLB20 ,Software Last Burst Request for Source 20" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0 19. " SLB19 ,Software Last Burst Request for Source 19" "Not requested,Requested"
|
|
bitfld.long 0x0 18. " SLB18 ,Software Last Burst Request for Source 18" "Not requested,Requested"
|
|
bitfld.long 0x0 17. " SLB17 ,Software Last Burst Request for Source 17" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0 16. " SLB16 ,Software Last Burst Request for Source 16" "Not requested,Requested"
|
|
bitfld.long 0x0 15. " SLB15 ,Software Last Burst Request for Source 15" "Not requested,Requested"
|
|
bitfld.long 0x0 14. " SLB14 ,Software Last Burst Request for Source 14" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0 13. " SLB13 ,Software Last Burst Request for Source 13" "Not requested,Requested"
|
|
bitfld.long 0x0 12. " SLB12 ,Software Last Burst Request for Source 12" "Not requested,Requested"
|
|
bitfld.long 0x0 11. " SLB11 ,Software Last Burst Request for Source 11" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0 10. " SLB10 ,Software Last Burst Request for Source 10" "Not requested,Requested"
|
|
bitfld.long 0x0 9. " SLB9 ,Software Last Burst Request for Source 9" "Not requested,Requested"
|
|
bitfld.long 0x0 8. " SLB8 ,Software Last Burst Request for Source 8" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0 7. " SLB7 ,Software Last Burst Request for Source 7" "Not requested,Requested"
|
|
bitfld.long 0x0 6. " SLB6 ,Software Last Burst Request for Source 6" "Not requested,Requested"
|
|
bitfld.long 0x0 5. " SLB5 ,Software Last Burst Request for Source 5" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0 4. " SLB4 ,Software Last Burst Request for Source 4" "Not requested,Requested"
|
|
bitfld.long 0x0 3. " SLB3 ,Software Last Burst Request for Source 3" "Not requested,Requested"
|
|
bitfld.long 0x0 2. " SLB2 ,Software Last Burst Request for Source 2" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x0 1. " SLB1 ,Software Last Burst Request for Source 1" "Not requested,Requested"
|
|
bitfld.long 0x0 0. " SLB0 ,Software Last Burst Request for Source 0" "Not requested,Requested"
|
|
line.long 0x4 "DMAC_SLSREQ,Software Last Single Request Register"
|
|
bitfld.long 0x4 31. " SLS31 ,Software Last Single Request for Source 31" "Not requested,Requested"
|
|
bitfld.long 0x4 30. " SLS30 ,Software Last Single Request for Source 30" "Not requested,Requested"
|
|
bitfld.long 0x4 29. " SLS29 ,Software Last Single Request for Source 29" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x4 28. " SLS28 ,Software Last Single Request for Source 28" "Not requested,Requested"
|
|
bitfld.long 0x4 27. " SLS27 ,Software Last Single Request for Source 27" "Not requested,Requested"
|
|
bitfld.long 0x4 26. " SLS26 ,Software Last Single Request for Source 26" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x4 25. " SLS25 ,Software Last Single Request for Source 25" "Not requested,Requested"
|
|
bitfld.long 0x4 24. " SLS24 ,Software Last Single Request for Source 24" "Not requested,Requested"
|
|
bitfld.long 0x4 23. " SLS23 ,Software Last Single Request for Source 23" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x4 22. " SLS22 ,Software Last Single Request for Source 22" "Not requested,Requested"
|
|
bitfld.long 0x4 21. " SLS21 ,Software Last Single Request for Source 21" "Not requested,Requested"
|
|
bitfld.long 0x4 20. " SLS20 ,Software Last Single Request for Source 20" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x4 19. " SLS19 ,Software Last Single Request for Source 19" "Not requested,Requested"
|
|
bitfld.long 0x4 18. " SLS18 ,Software Last Single Request for Source 18" "Not requested,Requested"
|
|
bitfld.long 0x4 17. " SLS17 ,Software Last Single Request for Source 17" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x4 16. " SLS16 ,Software Last Single Request for Source 16" "Not requested,Requested"
|
|
bitfld.long 0x4 15. " SLS15 ,Software Last Single Request for Source 15" "Not requested,Requested"
|
|
bitfld.long 0x4 14. " SLS14 ,Software Last Single Request for Source 14" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x4 13. " SLS13 ,Software Last Single Request for Source 13" "Not requested,Requested"
|
|
bitfld.long 0x4 12. " SLS12 ,Software Last Single Request for Source 12" "Not requested,Requested"
|
|
bitfld.long 0x4 11. " SLS11 ,Software Last Single Request for Source 11" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x4 10. " SLS10 ,Software Last Single Request for Source 10" "Not requested,Requested"
|
|
bitfld.long 0x4 9. " SLS9 ,Software Last Single Request for Source 9" "Not requested,Requested"
|
|
bitfld.long 0x4 8. " SLS8 ,Software Last Single Request for Source 8" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x4 7. " SLS7 ,Software Last Single Request for Source 7" "Not requested,Requested"
|
|
bitfld.long 0x4 6. " SLS6 ,Software Last Single Request for Source 6" "Not requested,Requested"
|
|
bitfld.long 0x4 5. " SLS5 ,Software Last Single Request for Source 5" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x4 4. " SLS4 ,Software Last Single Request for Source 4" "Not requested,Requested"
|
|
bitfld.long 0x4 3. " SLS3 ,Software Last Single Request for Source 3" "Not requested,Requested"
|
|
bitfld.long 0x4 2. " SLS2 ,Software Last Single Request for Source 2" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x4 1. " SLS1 ,Software Last Single Request for Source 1" "Not requested,Requested"
|
|
bitfld.long 0x4 0. " SLS0 ,Software Last Single Request for Source 0" "Not requested,Requested"
|
|
tree "Channel 0"
|
|
group.long 0x100++0x13
|
|
line.long 0x0 "DMAC_C0SADR,Channel 0 Source Address Register"
|
|
line.long 0x4 "DMAC_C0DADR,Channel Destination Address Register 0"
|
|
line.long 0x8 "DMA_C0LLI,Channel Linked List Item Register 0"
|
|
hexmask.long 0x8 2.--31. 0x4 " LLI ,Linked List Item for Channel 0"
|
|
bitfld.long 0x8 0. " LM ,AHB master select" "Master 1,Master 2"
|
|
line.long 0xC "DMA_C0CR,Channel Control Register 0"
|
|
bitfld.long 0x0C 31. " I ,Terminal Count Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 30. " HPROT[2] ,AHB access information" "Not cacheable,Cacheable"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " HPROT[1] ,AHB access information" "Not bufferable,Bufferable"
|
|
bitfld.long 0x0c 28. " HPROT[0] ,AHB access information" "User,Privileged"
|
|
textline " "
|
|
bitfld.long 0x0C 27. " DI ,Destination Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x0C 26. " SI ,Source Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " D ,Destination AHB master select" "Master 0,Master 1"
|
|
bitfld.long 0x0c 24. " S ,Source AHB master select" "Master 0,Master 1"
|
|
textline " "
|
|
bitfld.long 0x0C 21.--23. " DWIDTH ,Destination Width" "8-bit,16-bit,32-bit,?..."
|
|
bitfld.long 0x0C 18.--20. " SWIDTH ,Source Width" "8-bit,16-bit,32-bit,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 15.--17. " DBSIZE ,Destination Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers"
|
|
bitfld.long 0x0C 12.--14. " SBSIZE ,Source Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers"
|
|
textline " "
|
|
hexmask.long.word 0x0C 0.--11. 1. " TRANSFERSIZE ,Transfer Size"
|
|
line.long 0x10 "DMAC_C0CFG,Channel Configuration Register 0"
|
|
bitfld.long 0x10 18. " H ,Halt" "Enabled,Ignored"
|
|
bitfld.long 0x10 17. " A ,Active" "No data,Data"
|
|
textline " "
|
|
bitfld.long 0x10 16. " L ,Lock" "Disabled,Enabled"
|
|
bitfld.long 0x10 15. " ITC ,Terminal Count Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 14. " IE ,Error Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x10 11.--13. " FLOWCNTRL ,Flow control and transfer type" "Memory-to-memory (DMAC),Memory-to-peripheral (DMAC),Peripheral-to-memory (DMAC),Src.-to-dest. peripheral (DMAC),Src.-to-dest. peripheral (Destination periph),Memory-to-peripheral (Peripheral),Peripheral-to-memory (Peripheral),Src.-to-dest. peripheral (Source periph)"
|
|
textline " "
|
|
sif ((cpu()!="STA2065")&&(cpu()!="STA2165"))
|
|
bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "Reserved,Reserved,Reserved,Reserved,I2C2 Tx/Rx,Reserved,Ext. Req DREQ0,Ext. Req DREQ1,SPDIF,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP1Rx,SSP1Tx,UART0 Rx,UART0 Tx,UART3 Rx,UART3 Tx,I2C1 Tx/Rx,I2C0 Tx/Rx,CHITF (RS),SD/SDIO/MMC 0,UART1 Rx,UART1 Tx,USB OTG Ch. 0,USB OTG Ch. 1,USB OTG Ch. 2,USB OTG Ch. 3,USB OTG Ch. 4,USB OTG Ch. 5,UART2 Rx,UART2 Tx"
|
|
textline " "
|
|
bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "Reserved,Reserved,Reserved,Reserved,I2C2 Tx/Rx,Reserved,Ext. Req DREQ0,Ext. Req DREQ1,SPDIF,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP1Rx,SSP1Tx,UART0 Rx,UART0 Tx,UART3 Rx,UART3 Tx,I2C1 Tx/Rx,I2C0 Tx/Rx,CHITF (RS),SD/SDIO/MMC 0,UART1 Rx,UART1 Tx,USB OTG Ch. 0,USB OTG Ch. 1,USB OTG Ch. 2,USB OTG Ch. 3,USB OTG Ch. 4,USB OTG Ch. 5,UART2 Rx,UART2 Tx"
|
|
else
|
|
bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "VIP (odd frame lines),VIP (even frame lines),JPEGDMACREQ_0,JPEGDMACREQ_1,I2C2 Tx/Rx,SD/SDIO/MMC2,Ext. Req DREQ0,Ext. Req DREQ1,SPDIF,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP1Rx,SSP1Tx,UART0 Rx,UART0 Tx,UART3 Rx,UART3 Tx,I2C1 Tx/Rx,I2C0 Tx/Rx,CHITF (RS),SD/SDIO/MMC 0,UART1 Rx,UART1 Tx,USB FS PHYCH0,USB FS PHYCH1,USB FS PHYCH2,USB FS PHYCH3,USB FS PHYCH4,USB FS PHYCH5,UART2 Rx,UART2 Tx"
|
|
textline " "
|
|
bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "VIP (odd frame lines),VIP (even frame lines),JPEGDMACREQ_0,JPEGDMACREQ_1,I2C2 Tx/Rx,SD/SDIO/MMC2,Ext. Req DREQ0,Ext. Req DREQ1,SPDIF,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP1Rx,SSP1Tx,UART0 Rx,UART0 Tx,UART3 Rx,UART3 Tx,I2C1 Tx/Rx,I2C0 Tx/Rx,CHITF (RS),SD/SDIO/MMC 0,UART1 Rx,UART1 Tx,USB FS PHYCH0,USB FS PHYCH1,USB FS PHYCH2,USB FS PHYCH3,USB FS PHYCH4,USB FS PHYCH5,UART2 Rx,UART2 Tx"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x10 0. " E ,Channel Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Channel 1"
|
|
group.long 0x120++0x13
|
|
line.long 0x0 "DMAC_C1SADR,Channel 1 Source Address Register"
|
|
line.long 0x4 "DMAC_C1DADR,Channel Destination Address Register 1"
|
|
line.long 0x8 "DMA_C1LLI,Channel Linked List Item Register 1"
|
|
hexmask.long 0x8 2.--31. 0x4 " LLI ,Linked List Item for Channel 1"
|
|
bitfld.long 0x8 0. " LM ,AHB master select" "Master 1,Master 2"
|
|
line.long 0xC "DMA_C1CR,Channel Control Register 1"
|
|
bitfld.long 0x0C 31. " I ,Terminal Count Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 30. " HPROT[2] ,AHB access information" "Not cacheable,Cacheable"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " HPROT[1] ,AHB access information" "Not bufferable,Bufferable"
|
|
bitfld.long 0x0c 28. " HPROT[0] ,AHB access information" "User,Privileged"
|
|
textline " "
|
|
bitfld.long 0x0C 27. " DI ,Destination Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x0C 26. " SI ,Source Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " D ,Destination AHB master select" "Master 0,Master 1"
|
|
bitfld.long 0x0c 24. " S ,Source AHB master select" "Master 0,Master 1"
|
|
textline " "
|
|
bitfld.long 0x0C 21.--23. " DWIDTH ,Destination Width" "8-bit,16-bit,32-bit,?..."
|
|
bitfld.long 0x0C 18.--20. " SWIDTH ,Source Width" "8-bit,16-bit,32-bit,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 15.--17. " DBSIZE ,Destination Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers"
|
|
bitfld.long 0x0C 12.--14. " SBSIZE ,Source Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers"
|
|
textline " "
|
|
hexmask.long.word 0x0C 0.--11. 1. " TRANSFERSIZE ,Transfer Size"
|
|
line.long 0x10 "DMAC_C1CFG,Channel Configuration Register 1"
|
|
bitfld.long 0x10 18. " H ,Halt" "Enabled,Ignored"
|
|
bitfld.long 0x10 17. " A ,Active" "No data,Data"
|
|
textline " "
|
|
bitfld.long 0x10 16. " L ,Lock" "Disabled,Enabled"
|
|
bitfld.long 0x10 15. " ITC ,Terminal Count Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 14. " IE ,Error Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x10 11.--13. " FLOWCNTRL ,Flow control and transfer type" "Memory-to-memory (DMAC),Memory-to-peripheral (DMAC),Peripheral-to-memory (DMAC),Src.-to-dest. peripheral (DMAC),Src.-to-dest. peripheral (Destination periph),Memory-to-peripheral (Peripheral),Peripheral-to-memory (Peripheral),Src.-to-dest. peripheral (Source periph)"
|
|
textline " "
|
|
sif ((cpu()!="STA2065")&&(cpu()!="STA2165"))
|
|
bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "Reserved,Reserved,Reserved,Reserved,I2C2 Tx/Rx,Reserved,Ext. Req DREQ0,Ext. Req DREQ1,SPDIF,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP1Rx,SSP1Tx,UART0 Rx,UART0 Tx,UART3 Rx,UART3 Tx,I2C1 Tx/Rx,I2C0 Tx/Rx,CHITF (RS),SD/SDIO/MMC 0,UART1 Rx,UART1 Tx,USB OTG Ch. 0,USB OTG Ch. 1,USB OTG Ch. 2,USB OTG Ch. 3,USB OTG Ch. 4,USB OTG Ch. 5,UART2 Rx,UART2 Tx"
|
|
textline " "
|
|
bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "Reserved,Reserved,Reserved,Reserved,I2C2 Tx/Rx,Reserved,Ext. Req DREQ0,Ext. Req DREQ1,SPDIF,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP1Rx,SSP1Tx,UART0 Rx,UART0 Tx,UART3 Rx,UART3 Tx,I2C1 Tx/Rx,I2C0 Tx/Rx,CHITF (RS),SD/SDIO/MMC 0,UART1 Rx,UART1 Tx,USB OTG Ch. 0,USB OTG Ch. 1,USB OTG Ch. 2,USB OTG Ch. 3,USB OTG Ch. 4,USB OTG Ch. 5,UART2 Rx,UART2 Tx"
|
|
else
|
|
bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "VIP (odd frame lines),VIP (even frame lines),JPEGDMACREQ_0,JPEGDMACREQ_1,I2C2 Tx/Rx,SD/SDIO/MMC2,Ext. Req DREQ0,Ext. Req DREQ1,SPDIF,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP1Rx,SSP1Tx,UART0 Rx,UART0 Tx,UART3 Rx,UART3 Tx,I2C1 Tx/Rx,I2C0 Tx/Rx,CHITF (RS),SD/SDIO/MMC 0,UART1 Rx,UART1 Tx,USB FS PHYCH0,USB FS PHYCH1,USB FS PHYCH2,USB FS PHYCH3,USB FS PHYCH4,USB FS PHYCH5,UART2 Rx,UART2 Tx"
|
|
textline " "
|
|
bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "VIP (odd frame lines),VIP (even frame lines),JPEGDMACREQ_0,JPEGDMACREQ_1,I2C2 Tx/Rx,SD/SDIO/MMC2,Ext. Req DREQ0,Ext. Req DREQ1,SPDIF,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP1Rx,SSP1Tx,UART0 Rx,UART0 Tx,UART3 Rx,UART3 Tx,I2C1 Tx/Rx,I2C0 Tx/Rx,CHITF (RS),SD/SDIO/MMC 0,UART1 Rx,UART1 Tx,USB FS PHYCH0,USB FS PHYCH1,USB FS PHYCH2,USB FS PHYCH3,USB FS PHYCH4,USB FS PHYCH5,UART2 Rx,UART2 Tx"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x10 0. " E ,Channel Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Channel 2"
|
|
group.long 0x140++0x13
|
|
line.long 0x0 "DMAC_C2SADR,Channel 2 Source Address Register"
|
|
line.long 0x4 "DMAC_C2DADR,Channel Destination Address Register 2"
|
|
line.long 0x8 "DMA_C2LLI,Channel Linked List Item Register 2"
|
|
hexmask.long 0x8 2.--31. 0x4 " LLI ,Linked List Item for Channel 2"
|
|
bitfld.long 0x8 0. " LM ,AHB master select" "Master 1,Master 2"
|
|
line.long 0xC "DMA_C2CR,Channel Control Register 2"
|
|
bitfld.long 0x0C 31. " I ,Terminal Count Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 30. " HPROT[2] ,AHB access information" "Not cacheable,Cacheable"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " HPROT[1] ,AHB access information" "Not bufferable,Bufferable"
|
|
bitfld.long 0x0c 28. " HPROT[0] ,AHB access information" "User,Privileged"
|
|
textline " "
|
|
bitfld.long 0x0C 27. " DI ,Destination Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x0C 26. " SI ,Source Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " D ,Destination AHB master select" "Master 0,Master 1"
|
|
bitfld.long 0x0c 24. " S ,Source AHB master select" "Master 0,Master 1"
|
|
textline " "
|
|
bitfld.long 0x0C 21.--23. " DWIDTH ,Destination Width" "8-bit,16-bit,32-bit,?..."
|
|
bitfld.long 0x0C 18.--20. " SWIDTH ,Source Width" "8-bit,16-bit,32-bit,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 15.--17. " DBSIZE ,Destination Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers"
|
|
bitfld.long 0x0C 12.--14. " SBSIZE ,Source Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers"
|
|
textline " "
|
|
hexmask.long.word 0x0C 0.--11. 1. " TRANSFERSIZE ,Transfer Size"
|
|
line.long 0x10 "DMAC_C2CFG,Channel Configuration Register 2"
|
|
bitfld.long 0x10 18. " H ,Halt" "Enabled,Ignored"
|
|
bitfld.long 0x10 17. " A ,Active" "No data,Data"
|
|
textline " "
|
|
bitfld.long 0x10 16. " L ,Lock" "Disabled,Enabled"
|
|
bitfld.long 0x10 15. " ITC ,Terminal Count Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 14. " IE ,Error Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x10 11.--13. " FLOWCNTRL ,Flow control and transfer type" "Memory-to-memory (DMAC),Memory-to-peripheral (DMAC),Peripheral-to-memory (DMAC),Src.-to-dest. peripheral (DMAC),Src.-to-dest. peripheral (Destination periph),Memory-to-peripheral (Peripheral),Peripheral-to-memory (Peripheral),Src.-to-dest. peripheral (Source periph)"
|
|
textline " "
|
|
sif ((cpu()!="STA2065")&&(cpu()!="STA2165"))
|
|
bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "Reserved,Reserved,Reserved,Reserved,I2C2 Tx/Rx,Reserved,Ext. Req DREQ0,Ext. Req DREQ1,SPDIF,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP1Rx,SSP1Tx,UART0 Rx,UART0 Tx,UART3 Rx,UART3 Tx,I2C1 Tx/Rx,I2C0 Tx/Rx,CHITF (RS),SD/SDIO/MMC 0,UART1 Rx,UART1 Tx,USB OTG Ch. 0,USB OTG Ch. 1,USB OTG Ch. 2,USB OTG Ch. 3,USB OTG Ch. 4,USB OTG Ch. 5,UART2 Rx,UART2 Tx"
|
|
textline " "
|
|
bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "Reserved,Reserved,Reserved,Reserved,I2C2 Tx/Rx,Reserved,Ext. Req DREQ0,Ext. Req DREQ1,SPDIF,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP1Rx,SSP1Tx,UART0 Rx,UART0 Tx,UART3 Rx,UART3 Tx,I2C1 Tx/Rx,I2C0 Tx/Rx,CHITF (RS),SD/SDIO/MMC 0,UART1 Rx,UART1 Tx,USB OTG Ch. 0,USB OTG Ch. 1,USB OTG Ch. 2,USB OTG Ch. 3,USB OTG Ch. 4,USB OTG Ch. 5,UART2 Rx,UART2 Tx"
|
|
else
|
|
bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "VIP (odd frame lines),VIP (even frame lines),JPEGDMACREQ_0,JPEGDMACREQ_1,I2C2 Tx/Rx,SD/SDIO/MMC2,Ext. Req DREQ0,Ext. Req DREQ1,SPDIF,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP1Rx,SSP1Tx,UART0 Rx,UART0 Tx,UART3 Rx,UART3 Tx,I2C1 Tx/Rx,I2C0 Tx/Rx,CHITF (RS),SD/SDIO/MMC 0,UART1 Rx,UART1 Tx,USB FS PHYCH0,USB FS PHYCH1,USB FS PHYCH2,USB FS PHYCH3,USB FS PHYCH4,USB FS PHYCH5,UART2 Rx,UART2 Tx"
|
|
textline " "
|
|
bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "VIP (odd frame lines),VIP (even frame lines),JPEGDMACREQ_0,JPEGDMACREQ_1,I2C2 Tx/Rx,SD/SDIO/MMC2,Ext. Req DREQ0,Ext. Req DREQ1,SPDIF,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP1Rx,SSP1Tx,UART0 Rx,UART0 Tx,UART3 Rx,UART3 Tx,I2C1 Tx/Rx,I2C0 Tx/Rx,CHITF (RS),SD/SDIO/MMC 0,UART1 Rx,UART1 Tx,USB FS PHYCH0,USB FS PHYCH1,USB FS PHYCH2,USB FS PHYCH3,USB FS PHYCH4,USB FS PHYCH5,UART2 Rx,UART2 Tx"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x10 0. " E ,Channel Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Channel 3"
|
|
group.long 0x160++0x13
|
|
line.long 0x0 "DMAC_C3SADR,Channel 3 Source Address Register"
|
|
line.long 0x4 "DMAC_C3DADR,Channel Destination Address Register 3"
|
|
line.long 0x8 "DMA_C3LLI,Channel Linked List Item Register 3"
|
|
hexmask.long 0x8 2.--31. 0x4 " LLI ,Linked List Item for Channel 3"
|
|
bitfld.long 0x8 0. " LM ,AHB master select" "Master 1,Master 2"
|
|
line.long 0xC "DMA_C3CR,Channel Control Register 3"
|
|
bitfld.long 0x0C 31. " I ,Terminal Count Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 30. " HPROT[2] ,AHB access information" "Not cacheable,Cacheable"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " HPROT[1] ,AHB access information" "Not bufferable,Bufferable"
|
|
bitfld.long 0x0c 28. " HPROT[0] ,AHB access information" "User,Privileged"
|
|
textline " "
|
|
bitfld.long 0x0C 27. " DI ,Destination Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x0C 26. " SI ,Source Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " D ,Destination AHB master select" "Master 0,Master 1"
|
|
bitfld.long 0x0c 24. " S ,Source AHB master select" "Master 0,Master 1"
|
|
textline " "
|
|
bitfld.long 0x0C 21.--23. " DWIDTH ,Destination Width" "8-bit,16-bit,32-bit,?..."
|
|
bitfld.long 0x0C 18.--20. " SWIDTH ,Source Width" "8-bit,16-bit,32-bit,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 15.--17. " DBSIZE ,Destination Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers"
|
|
bitfld.long 0x0C 12.--14. " SBSIZE ,Source Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers"
|
|
textline " "
|
|
hexmask.long.word 0x0C 0.--11. 1. " TRANSFERSIZE ,Transfer Size"
|
|
line.long 0x10 "DMAC_C3CFG,Channel Configuration Register 3"
|
|
bitfld.long 0x10 18. " H ,Halt" "Enabled,Ignored"
|
|
bitfld.long 0x10 17. " A ,Active" "No data,Data"
|
|
textline " "
|
|
bitfld.long 0x10 16. " L ,Lock" "Disabled,Enabled"
|
|
bitfld.long 0x10 15. " ITC ,Terminal Count Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 14. " IE ,Error Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x10 11.--13. " FLOWCNTRL ,Flow control and transfer type" "Memory-to-memory (DMAC),Memory-to-peripheral (DMAC),Peripheral-to-memory (DMAC),Src.-to-dest. peripheral (DMAC),Src.-to-dest. peripheral (Destination periph),Memory-to-peripheral (Peripheral),Peripheral-to-memory (Peripheral),Src.-to-dest. peripheral (Source periph)"
|
|
textline " "
|
|
sif ((cpu()!="STA2065")&&(cpu()!="STA2165"))
|
|
bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "Reserved,Reserved,Reserved,Reserved,I2C2 Tx/Rx,Reserved,Ext. Req DREQ0,Ext. Req DREQ1,SPDIF,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP1Rx,SSP1Tx,UART0 Rx,UART0 Tx,UART3 Rx,UART3 Tx,I2C1 Tx/Rx,I2C0 Tx/Rx,CHITF (RS),SD/SDIO/MMC 0,UART1 Rx,UART1 Tx,USB OTG Ch. 0,USB OTG Ch. 1,USB OTG Ch. 2,USB OTG Ch. 3,USB OTG Ch. 4,USB OTG Ch. 5,UART2 Rx,UART2 Tx"
|
|
textline " "
|
|
bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "Reserved,Reserved,Reserved,Reserved,I2C2 Tx/Rx,Reserved,Ext. Req DREQ0,Ext. Req DREQ1,SPDIF,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP1Rx,SSP1Tx,UART0 Rx,UART0 Tx,UART3 Rx,UART3 Tx,I2C1 Tx/Rx,I2C0 Tx/Rx,CHITF (RS),SD/SDIO/MMC 0,UART1 Rx,UART1 Tx,USB OTG Ch. 0,USB OTG Ch. 1,USB OTG Ch. 2,USB OTG Ch. 3,USB OTG Ch. 4,USB OTG Ch. 5,UART2 Rx,UART2 Tx"
|
|
else
|
|
bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "VIP (odd frame lines),VIP (even frame lines),JPEGDMACREQ_0,JPEGDMACREQ_1,I2C2 Tx/Rx,SD/SDIO/MMC2,Ext. Req DREQ0,Ext. Req DREQ1,SPDIF,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP1Rx,SSP1Tx,UART0 Rx,UART0 Tx,UART3 Rx,UART3 Tx,I2C1 Tx/Rx,I2C0 Tx/Rx,CHITF (RS),SD/SDIO/MMC 0,UART1 Rx,UART1 Tx,USB FS PHYCH0,USB FS PHYCH1,USB FS PHYCH2,USB FS PHYCH3,USB FS PHYCH4,USB FS PHYCH5,UART2 Rx,UART2 Tx"
|
|
textline " "
|
|
bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "VIP (odd frame lines),VIP (even frame lines),JPEGDMACREQ_0,JPEGDMACREQ_1,I2C2 Tx/Rx,SD/SDIO/MMC2,Ext. Req DREQ0,Ext. Req DREQ1,SPDIF,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP1Rx,SSP1Tx,UART0 Rx,UART0 Tx,UART3 Rx,UART3 Tx,I2C1 Tx/Rx,I2C0 Tx/Rx,CHITF (RS),SD/SDIO/MMC 0,UART1 Rx,UART1 Tx,USB FS PHYCH0,USB FS PHYCH1,USB FS PHYCH2,USB FS PHYCH3,USB FS PHYCH4,USB FS PHYCH5,UART2 Rx,UART2 Tx"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x10 0. " E ,Channel Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Channel 4"
|
|
group.long 0x180++0x13
|
|
line.long 0x0 "DMAC_C4SADR,Channel 4 Source Address Register"
|
|
line.long 0x4 "DMAC_C4DADR,Channel Destination Address Register 4"
|
|
line.long 0x8 "DMA_C4LLI,Channel Linked List Item Register 4"
|
|
hexmask.long 0x8 2.--31. 0x4 " LLI ,Linked List Item for Channel 4"
|
|
bitfld.long 0x8 0. " LM ,AHB master select" "Master 1,Master 2"
|
|
line.long 0xC "DMA_C4CR,Channel Control Register 4"
|
|
bitfld.long 0x0C 31. " I ,Terminal Count Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 30. " HPROT[2] ,AHB access information" "Not cacheable,Cacheable"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " HPROT[1] ,AHB access information" "Not bufferable,Bufferable"
|
|
bitfld.long 0x0c 28. " HPROT[0] ,AHB access information" "User,Privileged"
|
|
textline " "
|
|
bitfld.long 0x0C 27. " DI ,Destination Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x0C 26. " SI ,Source Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " D ,Destination AHB master select" "Master 0,Master 1"
|
|
bitfld.long 0x0c 24. " S ,Source AHB master select" "Master 0,Master 1"
|
|
textline " "
|
|
bitfld.long 0x0C 21.--23. " DWIDTH ,Destination Width" "8-bit,16-bit,32-bit,?..."
|
|
bitfld.long 0x0C 18.--20. " SWIDTH ,Source Width" "8-bit,16-bit,32-bit,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 15.--17. " DBSIZE ,Destination Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers"
|
|
bitfld.long 0x0C 12.--14. " SBSIZE ,Source Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers"
|
|
textline " "
|
|
hexmask.long.word 0x0C 0.--11. 1. " TRANSFERSIZE ,Transfer Size"
|
|
line.long 0x10 "DMAC_C4CFG,Channel Configuration Register 4"
|
|
bitfld.long 0x10 18. " H ,Halt" "Enabled,Ignored"
|
|
bitfld.long 0x10 17. " A ,Active" "No data,Data"
|
|
textline " "
|
|
bitfld.long 0x10 16. " L ,Lock" "Disabled,Enabled"
|
|
bitfld.long 0x10 15. " ITC ,Terminal Count Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 14. " IE ,Error Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x10 11.--13. " FLOWCNTRL ,Flow control and transfer type" "Memory-to-memory (DMAC),Memory-to-peripheral (DMAC),Peripheral-to-memory (DMAC),Src.-to-dest. peripheral (DMAC),Src.-to-dest. peripheral (Destination periph),Memory-to-peripheral (Peripheral),Peripheral-to-memory (Peripheral),Src.-to-dest. peripheral (Source periph)"
|
|
textline " "
|
|
sif ((cpu()!="STA2065")&&(cpu()!="STA2165"))
|
|
bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "Reserved,Reserved,Reserved,Reserved,I2C2 Tx/Rx,Reserved,Ext. Req DREQ0,Ext. Req DREQ1,SPDIF,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP1Rx,SSP1Tx,UART0 Rx,UART0 Tx,UART3 Rx,UART3 Tx,I2C1 Tx/Rx,I2C0 Tx/Rx,CHITF (RS),SD/SDIO/MMC 0,UART1 Rx,UART1 Tx,USB OTG Ch. 0,USB OTG Ch. 1,USB OTG Ch. 2,USB OTG Ch. 3,USB OTG Ch. 4,USB OTG Ch. 5,UART2 Rx,UART2 Tx"
|
|
textline " "
|
|
bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "Reserved,Reserved,Reserved,Reserved,I2C2 Tx/Rx,Reserved,Ext. Req DREQ0,Ext. Req DREQ1,SPDIF,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP1Rx,SSP1Tx,UART0 Rx,UART0 Tx,UART3 Rx,UART3 Tx,I2C1 Tx/Rx,I2C0 Tx/Rx,CHITF (RS),SD/SDIO/MMC 0,UART1 Rx,UART1 Tx,USB OTG Ch. 0,USB OTG Ch. 1,USB OTG Ch. 2,USB OTG Ch. 3,USB OTG Ch. 4,USB OTG Ch. 5,UART2 Rx,UART2 Tx"
|
|
else
|
|
bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "VIP (odd frame lines),VIP (even frame lines),JPEGDMACREQ_0,JPEGDMACREQ_1,I2C2 Tx/Rx,SD/SDIO/MMC2,Ext. Req DREQ0,Ext. Req DREQ1,SPDIF,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP1Rx,SSP1Tx,UART0 Rx,UART0 Tx,UART3 Rx,UART3 Tx,I2C1 Tx/Rx,I2C0 Tx/Rx,CHITF (RS),SD/SDIO/MMC 0,UART1 Rx,UART1 Tx,USB FS PHYCH0,USB FS PHYCH1,USB FS PHYCH2,USB FS PHYCH3,USB FS PHYCH4,USB FS PHYCH5,UART2 Rx,UART2 Tx"
|
|
textline " "
|
|
bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "VIP (odd frame lines),VIP (even frame lines),JPEGDMACREQ_0,JPEGDMACREQ_1,I2C2 Tx/Rx,SD/SDIO/MMC2,Ext. Req DREQ0,Ext. Req DREQ1,SPDIF,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP1Rx,SSP1Tx,UART0 Rx,UART0 Tx,UART3 Rx,UART3 Tx,I2C1 Tx/Rx,I2C0 Tx/Rx,CHITF (RS),SD/SDIO/MMC 0,UART1 Rx,UART1 Tx,USB FS PHYCH0,USB FS PHYCH1,USB FS PHYCH2,USB FS PHYCH3,USB FS PHYCH4,USB FS PHYCH5,UART2 Rx,UART2 Tx"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x10 0. " E ,Channel Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Channel 5"
|
|
group.long 0x1A0++0x13
|
|
line.long 0x0 "DMAC_C5SADR,Channel 5 Source Address Register"
|
|
line.long 0x4 "DMAC_C5DADR,Channel Destination Address Register 5"
|
|
line.long 0x8 "DMA_C5LLI,Channel Linked List Item Register 5"
|
|
hexmask.long 0x8 2.--31. 0x4 " LLI ,Linked List Item for Channel 5"
|
|
bitfld.long 0x8 0. " LM ,AHB master select" "Master 1,Master 2"
|
|
line.long 0xC "DMA_C5CR,Channel Control Register 5"
|
|
bitfld.long 0x0C 31. " I ,Terminal Count Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 30. " HPROT[2] ,AHB access information" "Not cacheable,Cacheable"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " HPROT[1] ,AHB access information" "Not bufferable,Bufferable"
|
|
bitfld.long 0x0c 28. " HPROT[0] ,AHB access information" "User,Privileged"
|
|
textline " "
|
|
bitfld.long 0x0C 27. " DI ,Destination Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x0C 26. " SI ,Source Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " D ,Destination AHB master select" "Master 0,Master 1"
|
|
bitfld.long 0x0c 24. " S ,Source AHB master select" "Master 0,Master 1"
|
|
textline " "
|
|
bitfld.long 0x0C 21.--23. " DWIDTH ,Destination Width" "8-bit,16-bit,32-bit,?..."
|
|
bitfld.long 0x0C 18.--20. " SWIDTH ,Source Width" "8-bit,16-bit,32-bit,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 15.--17. " DBSIZE ,Destination Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers"
|
|
bitfld.long 0x0C 12.--14. " SBSIZE ,Source Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers"
|
|
textline " "
|
|
hexmask.long.word 0x0C 0.--11. 1. " TRANSFERSIZE ,Transfer Size"
|
|
line.long 0x10 "DMAC_C5CFG,Channel Configuration Register 5"
|
|
bitfld.long 0x10 18. " H ,Halt" "Enabled,Ignored"
|
|
bitfld.long 0x10 17. " A ,Active" "No data,Data"
|
|
textline " "
|
|
bitfld.long 0x10 16. " L ,Lock" "Disabled,Enabled"
|
|
bitfld.long 0x10 15. " ITC ,Terminal Count Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 14. " IE ,Error Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x10 11.--13. " FLOWCNTRL ,Flow control and transfer type" "Memory-to-memory (DMAC),Memory-to-peripheral (DMAC),Peripheral-to-memory (DMAC),Src.-to-dest. peripheral (DMAC),Src.-to-dest. peripheral (Destination periph),Memory-to-peripheral (Peripheral),Peripheral-to-memory (Peripheral),Src.-to-dest. peripheral (Source periph)"
|
|
textline " "
|
|
sif ((cpu()!="STA2065")&&(cpu()!="STA2165"))
|
|
bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "Reserved,Reserved,Reserved,Reserved,I2C2 Tx/Rx,Reserved,Ext. Req DREQ0,Ext. Req DREQ1,SPDIF,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP1Rx,SSP1Tx,UART0 Rx,UART0 Tx,UART3 Rx,UART3 Tx,I2C1 Tx/Rx,I2C0 Tx/Rx,CHITF (RS),SD/SDIO/MMC 0,UART1 Rx,UART1 Tx,USB OTG Ch. 0,USB OTG Ch. 1,USB OTG Ch. 2,USB OTG Ch. 3,USB OTG Ch. 4,USB OTG Ch. 5,UART2 Rx,UART2 Tx"
|
|
textline " "
|
|
bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "Reserved,Reserved,Reserved,Reserved,I2C2 Tx/Rx,Reserved,Ext. Req DREQ0,Ext. Req DREQ1,SPDIF,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP1Rx,SSP1Tx,UART0 Rx,UART0 Tx,UART3 Rx,UART3 Tx,I2C1 Tx/Rx,I2C0 Tx/Rx,CHITF (RS),SD/SDIO/MMC 0,UART1 Rx,UART1 Tx,USB OTG Ch. 0,USB OTG Ch. 1,USB OTG Ch. 2,USB OTG Ch. 3,USB OTG Ch. 4,USB OTG Ch. 5,UART2 Rx,UART2 Tx"
|
|
else
|
|
bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "VIP (odd frame lines),VIP (even frame lines),JPEGDMACREQ_0,JPEGDMACREQ_1,I2C2 Tx/Rx,SD/SDIO/MMC2,Ext. Req DREQ0,Ext. Req DREQ1,SPDIF,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP1Rx,SSP1Tx,UART0 Rx,UART0 Tx,UART3 Rx,UART3 Tx,I2C1 Tx/Rx,I2C0 Tx/Rx,CHITF (RS),SD/SDIO/MMC 0,UART1 Rx,UART1 Tx,USB FS PHYCH0,USB FS PHYCH1,USB FS PHYCH2,USB FS PHYCH3,USB FS PHYCH4,USB FS PHYCH5,UART2 Rx,UART2 Tx"
|
|
textline " "
|
|
bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "VIP (odd frame lines),VIP (even frame lines),JPEGDMACREQ_0,JPEGDMACREQ_1,I2C2 Tx/Rx,SD/SDIO/MMC2,Ext. Req DREQ0,Ext. Req DREQ1,SPDIF,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP1Rx,SSP1Tx,UART0 Rx,UART0 Tx,UART3 Rx,UART3 Tx,I2C1 Tx/Rx,I2C0 Tx/Rx,CHITF (RS),SD/SDIO/MMC 0,UART1 Rx,UART1 Tx,USB FS PHYCH0,USB FS PHYCH1,USB FS PHYCH2,USB FS PHYCH3,USB FS PHYCH4,USB FS PHYCH5,UART2 Rx,UART2 Tx"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x10 0. " E ,Channel Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Channel 6"
|
|
group.long 0x1C0++0x13
|
|
line.long 0x0 "DMAC_C6SADR,Channel 6 Source Address Register"
|
|
line.long 0x4 "DMAC_C6DADR,Channel Destination Address Register 6"
|
|
line.long 0x8 "DMA_C6LLI,Channel Linked List Item Register 6"
|
|
hexmask.long 0x8 2.--31. 0x4 " LLI ,Linked List Item for Channel 6"
|
|
bitfld.long 0x8 0. " LM ,AHB master select" "Master 1,Master 2"
|
|
line.long 0xC "DMA_C6CR,Channel Control Register 6"
|
|
bitfld.long 0x0C 31. " I ,Terminal Count Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 30. " HPROT[2] ,AHB access information" "Not cacheable,Cacheable"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " HPROT[1] ,AHB access information" "Not bufferable,Bufferable"
|
|
bitfld.long 0x0c 28. " HPROT[0] ,AHB access information" "User,Privileged"
|
|
textline " "
|
|
bitfld.long 0x0C 27. " DI ,Destination Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x0C 26. " SI ,Source Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " D ,Destination AHB master select" "Master 0,Master 1"
|
|
bitfld.long 0x0c 24. " S ,Source AHB master select" "Master 0,Master 1"
|
|
textline " "
|
|
bitfld.long 0x0C 21.--23. " DWIDTH ,Destination Width" "8-bit,16-bit,32-bit,?..."
|
|
bitfld.long 0x0C 18.--20. " SWIDTH ,Source Width" "8-bit,16-bit,32-bit,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 15.--17. " DBSIZE ,Destination Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers"
|
|
bitfld.long 0x0C 12.--14. " SBSIZE ,Source Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers"
|
|
textline " "
|
|
hexmask.long.word 0x0C 0.--11. 1. " TRANSFERSIZE ,Transfer Size"
|
|
line.long 0x10 "DMAC_C6CFG,Channel Configuration Register 6"
|
|
bitfld.long 0x10 18. " H ,Halt" "Enabled,Ignored"
|
|
bitfld.long 0x10 17. " A ,Active" "No data,Data"
|
|
textline " "
|
|
bitfld.long 0x10 16. " L ,Lock" "Disabled,Enabled"
|
|
bitfld.long 0x10 15. " ITC ,Terminal Count Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 14. " IE ,Error Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x10 11.--13. " FLOWCNTRL ,Flow control and transfer type" "Memory-to-memory (DMAC),Memory-to-peripheral (DMAC),Peripheral-to-memory (DMAC),Src.-to-dest. peripheral (DMAC),Src.-to-dest. peripheral (Destination periph),Memory-to-peripheral (Peripheral),Peripheral-to-memory (Peripheral),Src.-to-dest. peripheral (Source periph)"
|
|
textline " "
|
|
sif ((cpu()!="STA2065")&&(cpu()!="STA2165"))
|
|
bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "Reserved,Reserved,Reserved,Reserved,I2C2 Tx/Rx,Reserved,Ext. Req DREQ0,Ext. Req DREQ1,SPDIF,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP1Rx,SSP1Tx,UART0 Rx,UART0 Tx,UART3 Rx,UART3 Tx,I2C1 Tx/Rx,I2C0 Tx/Rx,CHITF (RS),SD/SDIO/MMC 0,UART1 Rx,UART1 Tx,USB OTG Ch. 0,USB OTG Ch. 1,USB OTG Ch. 2,USB OTG Ch. 3,USB OTG Ch. 4,USB OTG Ch. 5,UART2 Rx,UART2 Tx"
|
|
textline " "
|
|
bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "Reserved,Reserved,Reserved,Reserved,I2C2 Tx/Rx,Reserved,Ext. Req DREQ0,Ext. Req DREQ1,SPDIF,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP1Rx,SSP1Tx,UART0 Rx,UART0 Tx,UART3 Rx,UART3 Tx,I2C1 Tx/Rx,I2C0 Tx/Rx,CHITF (RS),SD/SDIO/MMC 0,UART1 Rx,UART1 Tx,USB OTG Ch. 0,USB OTG Ch. 1,USB OTG Ch. 2,USB OTG Ch. 3,USB OTG Ch. 4,USB OTG Ch. 5,UART2 Rx,UART2 Tx"
|
|
else
|
|
bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "VIP (odd frame lines),VIP (even frame lines),JPEGDMACREQ_0,JPEGDMACREQ_1,I2C2 Tx/Rx,SD/SDIO/MMC2,Ext. Req DREQ0,Ext. Req DREQ1,SPDIF,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP1Rx,SSP1Tx,UART0 Rx,UART0 Tx,UART3 Rx,UART3 Tx,I2C1 Tx/Rx,I2C0 Tx/Rx,CHITF (RS),SD/SDIO/MMC 0,UART1 Rx,UART1 Tx,USB FS PHYCH0,USB FS PHYCH1,USB FS PHYCH2,USB FS PHYCH3,USB FS PHYCH4,USB FS PHYCH5,UART2 Rx,UART2 Tx"
|
|
textline " "
|
|
bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "VIP (odd frame lines),VIP (even frame lines),JPEGDMACREQ_0,JPEGDMACREQ_1,I2C2 Tx/Rx,SD/SDIO/MMC2,Ext. Req DREQ0,Ext. Req DREQ1,SPDIF,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP1Rx,SSP1Tx,UART0 Rx,UART0 Tx,UART3 Rx,UART3 Tx,I2C1 Tx/Rx,I2C0 Tx/Rx,CHITF (RS),SD/SDIO/MMC 0,UART1 Rx,UART1 Tx,USB FS PHYCH0,USB FS PHYCH1,USB FS PHYCH2,USB FS PHYCH3,USB FS PHYCH4,USB FS PHYCH5,UART2 Rx,UART2 Tx"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x10 0. " E ,Channel Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Channel 7"
|
|
group.long 0x1E0++0x13
|
|
line.long 0x0 "DMAC_C7SADR,Channel 7 Source Address Register"
|
|
line.long 0x4 "DMAC_C7DADR,Channel Destination Address Register 7"
|
|
line.long 0x8 "DMA_C7LLI,Channel Linked List Item Register 7"
|
|
hexmask.long 0x8 2.--31. 0x4 " LLI ,Linked List Item for Channel 7"
|
|
bitfld.long 0x8 0. " LM ,AHB master select" "Master 1,Master 2"
|
|
line.long 0xC "DMA_C7CR,Channel Control Register 7"
|
|
bitfld.long 0x0C 31. " I ,Terminal Count Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0c 30. " HPROT[2] ,AHB access information" "Not cacheable,Cacheable"
|
|
textline " "
|
|
bitfld.long 0x0c 29. " HPROT[1] ,AHB access information" "Not bufferable,Bufferable"
|
|
bitfld.long 0x0c 28. " HPROT[0] ,AHB access information" "User,Privileged"
|
|
textline " "
|
|
bitfld.long 0x0C 27. " DI ,Destination Increment" "Not incremented,Incremented"
|
|
bitfld.long 0x0C 26. " SI ,Source Increment" "Not incremented,Incremented"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " D ,Destination AHB master select" "Master 0,Master 1"
|
|
bitfld.long 0x0c 24. " S ,Source AHB master select" "Master 0,Master 1"
|
|
textline " "
|
|
bitfld.long 0x0C 21.--23. " DWIDTH ,Destination Width" "8-bit,16-bit,32-bit,?..."
|
|
bitfld.long 0x0C 18.--20. " SWIDTH ,Source Width" "8-bit,16-bit,32-bit,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 15.--17. " DBSIZE ,Destination Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers"
|
|
bitfld.long 0x0C 12.--14. " SBSIZE ,Source Burst Size" "1 transfer,4 transfers,8 transfers,16 transfers,32 transfers,64 transfers,128 transfers,256 transfers"
|
|
textline " "
|
|
hexmask.long.word 0x0C 0.--11. 1. " TRANSFERSIZE ,Transfer Size"
|
|
line.long 0x10 "DMAC_C7CFG,Channel Configuration Register 7"
|
|
bitfld.long 0x10 18. " H ,Halt" "Enabled,Ignored"
|
|
bitfld.long 0x10 17. " A ,Active" "No data,Data"
|
|
textline " "
|
|
bitfld.long 0x10 16. " L ,Lock" "Disabled,Enabled"
|
|
bitfld.long 0x10 15. " ITC ,Terminal Count Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 14. " IE ,Error Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x10 11.--13. " FLOWCNTRL ,Flow control and transfer type" "Memory-to-memory (DMAC),Memory-to-peripheral (DMAC),Peripheral-to-memory (DMAC),Src.-to-dest. peripheral (DMAC),Src.-to-dest. peripheral (Destination periph),Memory-to-peripheral (Peripheral),Peripheral-to-memory (Peripheral),Src.-to-dest. peripheral (Source periph)"
|
|
textline " "
|
|
sif ((cpu()!="STA2065")&&(cpu()!="STA2165"))
|
|
bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "Reserved,Reserved,Reserved,Reserved,I2C2 Tx/Rx,Reserved,Ext. Req DREQ0,Ext. Req DREQ1,SPDIF,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP1Rx,SSP1Tx,UART0 Rx,UART0 Tx,UART3 Rx,UART3 Tx,I2C1 Tx/Rx,I2C0 Tx/Rx,CHITF (RS),SD/SDIO/MMC 0,UART1 Rx,UART1 Tx,USB OTG Ch. 0,USB OTG Ch. 1,USB OTG Ch. 2,USB OTG Ch. 3,USB OTG Ch. 4,USB OTG Ch. 5,UART2 Rx,UART2 Tx"
|
|
textline " "
|
|
bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "Reserved,Reserved,Reserved,Reserved,I2C2 Tx/Rx,Reserved,Ext. Req DREQ0,Ext. Req DREQ1,SPDIF,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP1Rx,SSP1Tx,UART0 Rx,UART0 Tx,UART3 Rx,UART3 Tx,I2C1 Tx/Rx,I2C0 Tx/Rx,CHITF (RS),SD/SDIO/MMC 0,UART1 Rx,UART1 Tx,USB OTG Ch. 0,USB OTG Ch. 1,USB OTG Ch. 2,USB OTG Ch. 3,USB OTG Ch. 4,USB OTG Ch. 5,UART2 Rx,UART2 Tx"
|
|
else
|
|
bitfld.long 0x10 6.--10. " DESTPERIPHERAL ,Destination peripheral" "VIP (odd frame lines),VIP (even frame lines),JPEGDMACREQ_0,JPEGDMACREQ_1,I2C2 Tx/Rx,SD/SDIO/MMC2,Ext. Req DREQ0,Ext. Req DREQ1,SPDIF,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP1Rx,SSP1Tx,UART0 Rx,UART0 Tx,UART3 Rx,UART3 Tx,I2C1 Tx/Rx,I2C0 Tx/Rx,CHITF (RS),SD/SDIO/MMC 0,UART1 Rx,UART1 Tx,USB FS PHYCH0,USB FS PHYCH1,USB FS PHYCH2,USB FS PHYCH3,USB FS PHYCH4,USB FS PHYCH5,UART2 Rx,UART2 Tx"
|
|
textline " "
|
|
bitfld.long 0x10 1.--5. " SRCPERIPHERAL ,Source peripheral" "VIP (odd frame lines),VIP (even frame lines),JPEGDMACREQ_0,JPEGDMACREQ_1,I2C2 Tx/Rx,SD/SDIO/MMC2,Ext. Req DREQ0,Ext. Req DREQ1,SPDIF,IrDA(SIR/MIR/FIR) Tx/Rx,MSP0 Rx,MSP0 Tx,SSP1Rx,SSP1Tx,UART0 Rx,UART0 Tx,UART3 Rx,UART3 Tx,I2C1 Tx/Rx,I2C0 Tx/Rx,CHITF (RS),SD/SDIO/MMC 0,UART1 Rx,UART1 Tx,USB FS PHYCH0,USB FS PHYCH1,USB FS PHYCH2,USB FS PHYCH3,USB FS PHYCH4,USB FS PHYCH5,UART2 Rx,UART2 Tx"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x10 0. " E ,Channel Enable" "Disabled,Enabled"
|
|
tree.end
|
|
rgroup.long 0xfe0++0x1f "DMAC Peripheral Identification Registers"
|
|
line.long 0x00 "PERIPHID0,DMAC Peripheral Identification Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PARTNUMBER0 ,Part number 0"
|
|
line.long 0x04 "DMAC_PERIPHID1,DMAC Peripheral Identification Register 1"
|
|
bitfld.long 0x04 4.--7. " DESIGNER0 ,Designer 0" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
bitfld.long 0x04 0.--3. " PARTNUMBER1 ,Part number 1" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
line.long 0x08 "DMAC_PERIPHID2,DMAC Peripheral Identification Register 2"
|
|
bitfld.long 0x08 4.--7. " REVISION ,Revision Number" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
bitfld.long 0x08 0.--3. " DESIGNER1 ,Designer 1" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
line.long 0x0c "DMAC_PERIPHID3,DMAC Peripheral Identification Register 3"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " CONFIGURATION ,Configuration"
|
|
line.long 0x10 "DMAC_PCELLID0,DMAC Identification Register 0"
|
|
hexmask.long.byte 0x10 0.--7. 1. " DMAC_PCELLID0 ,Identification"
|
|
line.long 0x14 "DMAC_PCELLID1,DMAC Identification Register 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " DMAC_PCELLID1 ,Identification"
|
|
line.long 0x18 "DMAC_PCELLID2,DMAC Identification Register 2"
|
|
hexmask.long.byte 0x18 0.--7. 1. " DMAC_PCELLID2 ,Identification"
|
|
line.long 0x1c "DMAC_PCELLID3,DMAC Identification Register 3"
|
|
hexmask.long.byte 0x1c 0.--7. 1. " DMAC_PCELLID3 ,Identification"
|
|
width 0xB
|
|
tree.end
|
|
tree.end
|
|
tree "VIC (Vectored Interrupt Controller)"
|
|
base asd:0x10140000
|
|
width 12.
|
|
tree "Primary"
|
|
rgroup.long 0x00++0x0b "VIC Interrupt Control Registers"
|
|
line.long 0x00 "VIC_IRQSR0,IRQ Interrupt Status Register 0"
|
|
bitfld.long 0x00 31. " IRQS[31] ,IRQ Status 31 (MSP2 Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 30. " IRQS[30] ,IRQ Status 30 (UART3 Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 29. " IRQS[29] ,IRQ Status 29 (SD/MMC1Combined interrupt9)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS[28] ,IRQ Status 28 (UART2 Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 23. " IRQS[22] ,IRQ Status 23 (USB OTG HS Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 22. " IRQS[22] ,IRQ Status 22 (SD/SDIO/MMC 0 Combined interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 21. " IRQS[21] ,IRQ Status 21 (I2C1 Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 20. " IRQS[20] ,IRQ Status 20 (I2C0 Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 19. " IRQS[19] ,IRQ Status 19 (MSP0 Combined interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 18. " IRQS[18] ,IRQ Status 18 (IrDA [SIR,MIR,FIR] Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 17. " IRQS[17] ,IRQ Status 17 (UART1 Combined interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16. " IRQS[16] ,IRQ Status 16 (Power Failure Combined Interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 15. " IRQS[15] ,IRQ Status 15 (DMA 0 Combined interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 14. " IRQS[14] ,IRQ Status 14 (CLCD Combined interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 13. " IRQS[13] ,IRQ Status 13 (DMA1 Combined Interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 12. " IRQS[12] ,IRQ Status 12 (UART0 Combined interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 11. " IRQS[11] ,IRQ Status 11 (SSP0 Combined interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 10. " IRQS[10] ,IRQ Status 10 (RTC / RTT Combined interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 9. " IRQS[9] ,IRQ Status 9 (GPIO3 Combined interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " IRQS[8] ,IRQ Status 8 (GPIO2 Combined interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 7. " IRQS[7] ,IRQ Status 7 (GPIO1 Combined interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 6. " IRQS[6] ,IRQ Status 6 (GPIO0 Combined interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " IRQS[5] ,IRQ Status 5 (MTU1 (Timers 4 to 7) Combined interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " IRQS[4] ,IRQ Status 4 (MTU0 (Timers 1 to 3) Combined interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " IRQS[3] ,IRQ Status 3 (EFT1 Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " IRQS[2] ,IRQ Status 2 (EFT0 Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " IRQS[1] ,IRQ Status 1 (Software Interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 0. " IRQS[0] ,IRQ Status 0 (Watchdog interrupt)" "No interrupt,Interrupt"
|
|
line.long 0x04 "VIC_FIQSR0,FIQ Interrupt Status Register 0"
|
|
bitfld.long 0x04 31. " FIQS[31] ,FIQ Status 31 (MSP2 Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 30. " FIQS[30] ,FIQ Status 30 (UART3 Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 29. " FIQS[29] ,FIQ Status 29 (SD/MMC1Combined interrupt9)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 28. " FIQS[28] ,FIQ Status 28 (UART2 Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 23. " FIQS[23] ,FIQ Status 23 (USB OTG HS Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 22. " FIQS[22] ,FIQ Status 22 (SD/SDIO/MMC 0 Combined interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 21. " FIQS[21] ,FIQ Status 21 (I2C1 Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 20. " FIQS[20] ,FIQ Status 20 (I2C0 Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 19. " FIQS[19] ,FIQ Status 19 (MSP0 Combined interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 18. " FIQS[18] ,FIQ Status 18 (IrDA [SIR,MIR,FIR] Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 17. " FIQS[17] ,FIQ Status 17 (UART1 Combined interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 16. " FIQS[16] ,FIQ Status 16 (Power Failure Combined Interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 15. " FIQS[15] ,FIQ Status 15 (DMA 0 Combined interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 14. " FIQS[14] ,FIQ Status 14 (CLCD Combined interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 13. " FIQS[13] ,FIQ Status 13 (DMA1 Combined Interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 12. " FIQS[12] ,FIQ Status 12 (UART0 Combined interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 11. " FIQS[11] ,FIQ Status 11 (SSP0 Combined interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 10. " FIQS[10] ,FIQ Status 10 (RTC / RTT Combined interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 9. " FIQS[9] ,FIQ Status 9 (GPIO3 Combined interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 8. " FIQS[8] ,FIQ Status 8 (GPIO2 Combined interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 7. " FIQS[7] ,FIQ Status 7 (GPIO1 Combined interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 6. " FIQS[6] ,FIQ Status 6 (GPIO0 Combined interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 5. " FIQS[5] ,FIQ Status 5 (MTU1 (Timers 4 to 7) Combined interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 4. " FIQS[4] ,FIQ Status 4 (MTU0 (Timers 1 to 3) Combined interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 3. " FIQS[3] ,FIQ Status 3 (EFT1 Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 2. " FIQS[2] ,FIQ Status 2 (EFT0 Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 1. " FIQS[1] ,FIQ Status 1 (Software Interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 0. " FIQS[0] ,FIQ Status 0 (Watchdog interrupt)" "No interrupt,Interrupt"
|
|
line.long 0x08 "VIC_RIS0,Raw Interrupt Status Register"
|
|
bitfld.long 0x08 31. " RIS[31] ,Raw Interrupt Status 31 (MSP2 Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 30. " RIS[30] ,Raw Interrupt Status 30 (UART3 Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 29. " RIS[29] ,Raw Interrupt Status 29 (SD/MMC1Combined interrupt9)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 28. " RIS[28] ,Raw Interrupt Status 28 (UART2 Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 23. " RIS[23] ,Raw Interrupt Status 23 (USB OTG HS Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 22. " RIS[22] ,Raw Interrupt Status 22 (SD/SDIO/MMC 0 Combined interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 21. " RIS[21] ,Raw Interrupt Status 21 (I2C1 Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 20. " RIS[20] ,Raw Interrupt Status 20 (I2C0 Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 19. " RIS[19] ,Raw Interrupt Status 19 (MSP0 Combined interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 18. " RIS[18] ,Raw Interrupt Status 18 (IrDA [SIR,MIR,FIR] Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 17. " RIS[17] ,Raw Interrupt Status 17 (UART1 Combined interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 16. " RIS[16] ,Raw Interrupt Status 16 (Power Failure Combined Interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 15. " RIS[15] ,Raw Interrupt Status 15 (DMA 0 Combined interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 14. " RIS[14] ,Raw Interrupt Status 14 (CLCD Combined interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 13. " RIS[13] ,Raw Interrupt Status 13 (DMA1 Combined Interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 12. " RIS[12] ,Raw Interrupt Status 12 (UART0 Combined interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 11. " RIS[11] ,Raw Interrupt Status 11 (SSP0 Combined interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 10. " RIS[10] ,Raw Interrupt Status 10 (RTC / RTT Combined interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 9. " RIS[9] ,Raw Interrupt Status 9 (GPIO3 Combined interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 8. " RIS[8] ,Raw Interrupt Status 8 (GPIO2 Combined interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 7. " RIS[7] ,Raw Interrupt Status 7 (GPIO1 Combined interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 6. " RIS[6] ,Raw Interrupt Status 6 (GPIO0 Combined interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 5. " RIS[5] ,Raw Interrupt Status 5 (MTU1 (Timers 4 to 7) Combined interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 4. " RIS[4] ,Raw Interrupt Status 4 (MTU0 (Timers 1 to 3) Combined interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 3. " RIS[3] ,Raw Interrupt Status 3 (EFT1 Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 2. " RIS[2] ,Raw Interrupt Status 2 (EFT0 Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 1. " RIS[1] ,Raw Interrupt Status 1 (Software Interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 0. " RIS[0] ,Raw Interrupt Status 0 (Watchdog interrupt)" "No interrupt,Interrupt"
|
|
group.long 0x0c++0x07
|
|
line.long 0x00 "VIC_ISEL0,Interrupt Select Register 0"
|
|
bitfld.long 0x00 31. " ISEL[31] ,Interrupt Select 31 (MSP2 Combined Interrupt)" "IRQ,FIQ"
|
|
bitfld.long 0x00 30. " ISEL[30] ,Interrupt Select 30 (UART3 Combined Interrupt)" "IRQ,FIQ"
|
|
bitfld.long 0x00 29. " ISEL[29] ,Interrupt Select 29 (SD/MMC1Combined interrupt9)" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ISEL[28] ,Interrupt Select 28 (UART2 Combined Interrupt)" "IRQ,FIQ"
|
|
bitfld.long 0x00 23. " ISEL[23] ,Interrupt Select 23 (USB OTG HS Combined Interrupt)" "IRQ,FIQ"
|
|
bitfld.long 0x00 22. " ISEL[22] ,Interrupt Select 22 (SD/SDIO/MMC 0 Combined interrupt)" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ISEL[21] ,Interrupt Select 21 (I2C1 Combined Interrupt)" "IRQ,FIQ"
|
|
bitfld.long 0x00 20. " ISEL[20] ,Interrupt Select 20 (I2C0 Combined Interrupt)" "IRQ,FIQ"
|
|
bitfld.long 0x00 19. " ISEL[19] ,Interrupt Select 19 (MSP0 Combined interrupt)" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 18. " ISEL[18] ,Interrupt Select 18 (IrDA [SIR,MIR,FIR] Combined Interrupt)" "IRQ,FIQ"
|
|
bitfld.long 0x00 17. " ISEL[17] ,Interrupt Select 17 (UART1 Combined interrupt)" "IRQ,FIQ"
|
|
bitfld.long 0x00 16. " ISEL[16] ,Interrupt Select 16 (Power Failure Combined Interrupt)" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 15. " ISEL[15] ,Interrupt Select 15 (DMA 0 Combined interrupt)" "IRQ,FIQ"
|
|
bitfld.long 0x00 14. " ISEL[14] ,Interrupt Select 14 (CLCD Combined interrupt)" "IRQ,FIQ"
|
|
bitfld.long 0x00 13. " ISEL[13] ,Interrupt Select 13 (DMA1 Combined Interrupt)" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 12. " ISEL[12] ,Interrupt Select 12 (UART0 Combined interrupt)" "IRQ,FIQ"
|
|
bitfld.long 0x00 11. " ISEL[11] ,Interrupt Select 11 (SSP0 Combined interrupt)" "IRQ,FIQ"
|
|
bitfld.long 0x00 10. " ISEL[10] ,Interrupt Select 10 (RTC / RTT Combined interrupt)" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ISEL[9] ,Interrupt Select 9 (GPIO3 Combined interrupt)" "IRQ,FIQ"
|
|
bitfld.long 0x00 8. " ISEL[8] ,Interrupt Select 8 (GPIO2 Combined interrupt)" "IRQ,FIQ"
|
|
bitfld.long 0x00 7. " ISEL[7] ,Interrupt Select 7 (GPIO1 Combined interrupt)" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ISEL[6] ,Interrupt Select 6 (GPIO0 Combined interrupt)" "IRQ,FIQ"
|
|
bitfld.long 0x00 5. " ISEL[5] ,Interrupt Select 5 (MTU1 (Timers 4 to 7) Combined interrupt)" "IRQ,FIQ"
|
|
bitfld.long 0x00 4. " ISEL[4] ,Interrupt Select 4 (MTU0 (Timers 1 to 3) Combined interrupt)" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ISEL[3] ,Interrupt Select 3 (EFT1 Combined Interrupt)" "IRQ,FIQ"
|
|
bitfld.long 0x00 2. " ISEL[2] ,Interrupt Select 2 (EFT0 Combined Interrupt)" "IRQ,FIQ"
|
|
bitfld.long 0x00 1. " ISEL[1] ,Interrupt Select 1 (Software Interrupt)" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ISEL[0] ,Interrupt Select 0 (Watchdog interrupt)" "IRQ,FIQ"
|
|
line.long 0x04 "VIC_IENS0,Interrupt Enable Register 0"
|
|
bitfld.long 0x04 31. " IENS[31] ,Interrupt Enable 31 (MSP2 Combined Interrupt)" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " IENS[30] ,Interrupt Enable 30 (UART3 Combined Interrupt)" "Disabled,Enabled"
|
|
bitfld.long 0x04 29. " IENS[29] ,Interrupt Enable 29 (SD/MMC1Combined interrupt9)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 28. " IENS[28] ,Interrupt Enable 28 (UART2 Combined Interrupt)" "Disabled,Enabled"
|
|
bitfld.long 0x04 23. " IENS[23] ,Interrupt Enable 23 (USB OTG HS Combined Interrupt)" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " IENS[22] ,Interrupt Enable 22 (SD/SDIO/MMC 0 Combined interrupt)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " IENS[21] ,Interrupt Enable 21 (I2C1 Combined Interrupt)" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " IENS[20] ,Interrupt Enable 20 (I2C0 Combined Interrupt)" "Disabled,Enabled"
|
|
bitfld.long 0x04 19. " IENS[19] ,Interrupt Enable 19 (MSP0 Combined interrupt)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 18. " IENS[18] ,Interrupt Enable 18 (IrDA [SIR,MIR,FIR] Combined Interrupt)" "Disabled,Enabled"
|
|
bitfld.long 0x04 17. " IENS[17] ,Interrupt Enable 17 (UART1 Combined interrupt)" "Disabled,Enabled"
|
|
bitfld.long 0x04 16. " IENS[16] ,Interrupt Enable 16 (Power Failure Combined Interrupt)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 15. " IENS[15] ,Interrupt Enable 15 (DMA 0 Combined interrupt)" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " IENS[14] ,Interrupt Enable 14 (CLCD Combined interrupt)" "Disabled,Enabled"
|
|
bitfld.long 0x04 13. " IENS[13] ,Interrupt Enable 13 (DMA1 Combined Interrupt)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 12. " IENS[12] ,Interrupt Enable 12 (UART0 Combined interrupt)" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " IENS[11] ,Interrupt Enable 11 (SSP0 Combined interrupt)" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " IENS[10] ,Interrupt Enable 10 (RTC / RTT Combined interrupt)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 9. " IENS[9] ,Interrupt Enable 9 (GPIO3 Combined interrupt)" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " IENS[8] ,Interrupt Enable 8 (GPIO2 Combined interrupt)" "Disabled,Enabled"
|
|
bitfld.long 0x04 7. " IENS[7] ,Interrupt Enable 7 (GPIO1 Combined interrupt)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 6. " IENS[6] ,Interrupt Enable 6 (GPIO0 Combined interrupt)" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " IENS[5] ,Interrupt Enable 5 (MTU1 (Timers 4 to 7) Combined interrupt)" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " IENS[4] ,Interrupt Enable 4 (MTU0 (Timers 1 to 3) Combined interrupt)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " IENS[3] ,Interrupt Enable 3 (EFT1 Combined Interrupt)" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " IENS[2] ,Interrupt Enable 2 (EFT0 Combined Interrupt)" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " IENS[1] ,Interrupt Enable 1 (Software Interrupt)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 0. " IENS[0] ,Interrupt Enable 0 (Watchdog interrupt)" "Disabled,Enabled"
|
|
wgroup.long 0x14++0x03
|
|
line.long 0x00 "VIC_IENC0,Interrupt Enable Clear Register 0"
|
|
bitfld.long 0x00 31. " IENC[31] ,Interrupt Enable Clear 31 (MSP2 Combined Interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 30. " IENC[30] ,Interrupt Enable Clear 30 (UART3 Combined Interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 29. " IENC[29] ,Interrupt Enable Clear 29 (SD/MMC1Combined interrupt9)" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IENC[28] ,Interrupt Enable Clear 28 (UART2 Combined Interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 23. " IENC[23] ,Interrupt Enable Clear 23 (USB OTG HS Combined Interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 22. " IENC[22] ,Interrupt Enable Clear 22 (SD/SDIO/MMC 0 Combined interrupt)" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 21. " IENC[21] ,Interrupt Enable Clear 21 (I2C1 Combined Interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 20. " IENC[20] ,Interrupt Enable Clear 20 (I2C0 Combined Interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 19. " IENC[19] ,Interrupt Enable Clear 19 (MSP0 Combined interrupt)" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 18. " IENC[18] ,Interrupt Enable Clear 18 (IrDA [SIR,MIR,FIR] Combined Interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 17. " IENC[17] ,Interrupt Enable Clear 17 (UART1 Combined interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 16. " IENC[16] ,Interrupt Enable Clear 16 (Power Failure Combined Interrupt)" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 15. " IENC[15] ,Interrupt Enable Clear 15 (DMA 0 Combined interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 14. " IENC[14] ,Interrupt Enable Clear 14 (CLCD Combined interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 13. " IENC[13] ,Interrupt Enable Clear 13 (DMA1 Combined Interrupt)" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 12. " IENC[12] ,Interrupt Enable Clear 12 (UART0 Combined interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 11. " IENC[11] ,Interrupt Enable Clear 11 (SSP0 Combined interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 10. " IENC[10] ,Interrupt Enable Clear 10 (RTC / RTT Combined interrupt)" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 9. " IENC[9] ,Interrupt Enable Clear 9 (GPIO3 Combined interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 8. " IENC[8] ,Interrupt Enable Clear 8 (GPIO2 Combined interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 7. " IENC[7] ,Interrupt Enable Clear 7 (GPIO1 Combined interrupt)" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6. " IENC[6] ,Interrupt Enable Clear 6 (GPIO0 Combined interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 5. " IENC[5] ,Interrupt Enable Clear 5 (MTU1 (Timers 4 to 7) Combined interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 4. " IENC[4] ,Interrupt Enable Clear 4 (MTU0 (Timers 1 to 3) Combined interrupt)" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " IENC[3] ,Interrupt Enable Clear 3 (EFT1 Combined Interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 2. " IENC[2] ,Interrupt Enable Clear 2 (EFT0 Combined Interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 1. " IENC[1] ,Interrupt Enable Clear 1 (Software Interrupt)" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 0. " IENC[0] ,Interrupt Enable Clear 0 (Watchdog interrupt)" "No effect,Clear"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "VIC_SWISR0,Software Interrupt Set Register 0"
|
|
bitfld.long 0x00 31. " SWIS[31] ,Software Interrupt 31 (MSP2 Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 30. " SWIS[30] ,Software Interrupt 30 (UART3 Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 29. " SWIS[29] ,Software Interrupt 29 (SD/MMC1Combined interrupt9)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 28. " SWIS[28] ,Software Interrupt 28 (UART2 Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 23. " SWIS[23] ,Software Interrupt 23 (USB OTG HS Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 22. " SWIS[22] ,Software Interrupt 22 (SD/SDIO/MMC 0 Combined interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SWIS[21] ,Software Interrupt 21 (I2C1 Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 20. " SWIS[20] ,Software Interrupt 20 (I2C0 Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 19. " SWIS[19] ,Software Interrupt 19 (MSP0 Combined interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 18. " SWIS[18] ,Software Interrupt 18 (IrDA [SIR,MIR,FIR] Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 17. " SWIS[17] ,Software Interrupt 17 (UART1 Combined interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 16. " SWIS[16] ,Software Interrupt 16 (Power Failure Combined Interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SWIS[15] ,Software Interrupt 15 (DMA 0 Combined interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 14. " SWIS[14] ,Software Interrupt 14 (CLCD Combined interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 13. " SWIS[13] ,Software Interrupt 13 (DMA1 Combined Interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SWIS[12] ,Software Interrupt 12 (UART0 Combined interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 11. " SWIS[11] ,Software Interrupt 11 (SSP0 Combined interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 10. " SWIS[10] ,Software Interrupt 10 (RTC / RTT Combined interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 9. " SWIS[9] ,Software Interrupt 9 (GPIO3 Combined interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " SWIS[8] ,Software Interrupt 8 (GPIO2 Combined interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 7. " SWIS[7] ,Software Interrupt 7 (GPIO1 Combined interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 6. " SWIS[6] ,Software Interrupt 6 (GPIO0 Combined interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " SWIS[5] ,Software Interrupt 5 (MTU1 (Timers 4 to 7) Combined interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " SWIS[4] ,Software Interrupt 4 (MTU0 (Timers 1 to 3) Combined interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SWIS[3] ,Software Interrupt 3 (EFT1 Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " SWIS[2] ,Software Interrupt 2 (EFT0 Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " SWIS[1] ,Software Interrupt 1 (Software Interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SWIS[0] ,Software Interrupt 0 (Watchdog interrupt)" "No interrupt,Interrupt"
|
|
wgroup.long 0x1c++0x03
|
|
line.long 0x00 "VIC_SWICR0,Software Interrupt Clear Register 0"
|
|
bitfld.long 0x00 31. " SWIC[31] ,Software Interrupt Clear 31 (MSP2 Combined Interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 30. " SWIC[30] ,Software Interrupt Clear 30 (UART3 Combined Interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 29. " SWIC[29] ,Software Interrupt Clear 29 (SD/MMC1Combined interrupt9)" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 28. " SWIC[28] ,Software Interrupt Clear 28 (UART2 Combined Interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 23. " SWIC[23] ,Software Interrupt Clear 23 (USB OTG HS Combined Interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 22. " SWIC[22] ,Software Interrupt Clear 22 (SD/SDIO/MMC 0 Combined interrupt)" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SWIC[21] ,Software Interrupt Clear 21 (I2C1 Combined Interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 20. " SWIC[20] ,Software Interrupt Clear 20 (I2C0 Combined Interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 19. " SWIC[19] ,Software Interrupt Clear 19 (MSP0 Combined interrupt)" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 18. " SWIC[18] ,Software Interrupt Clear 18 (IrDA [SIR,MIR,FIR] Combined Interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 17. " SWIC[17] ,Software Interrupt Clear 17 (UART1 Combined interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 16. " SWIC[16] ,Software Interrupt Clear 16 (Power Failure Combined Interrupt)" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SWIC[15] ,Software Interrupt Clear 15 (DMA 0 Combined interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 14. " SWIC[14] ,Software Interrupt Clear 14 (CLCD Combined interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 13. " SWIC[13] ,Software Interrupt Clear 13 (DMA1 Combined Interrupt)" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SWIC[12] ,Software Interrupt Clear 12 (UART0 Combined interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 11. " SWIC[11] ,Software Interrupt Clear 11 (SSP0 Combined interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 10. " SWIC[10] ,Software Interrupt Clear 10 (RTC / RTT Combined interrupt)" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 9. " SWIC[9] ,Software Interrupt Clear 9 (GPIO3 Combined interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 8. " SWIC[8] ,Software Interrupt Clear 8 (GPIO2 Combined interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 7. " SWIC[7] ,Software Interrupt Clear 7 (GPIO1 Combined interrupt)" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6. " SWIC[6] ,Software Interrupt Clear 6 (GPIO0 Combined interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 5. " SWIC[5] ,Software Interrupt Clear 5 (MTU1 (Timers 4 to 7) Combined interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 4. " SWIC[4] ,Software Interrupt Clear 4 (MTU0 (Timers 1 to 3) Combined interrupt)" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SWIC[3] ,Software Interrupt Clear 3 (EFT1 Combined Interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 2. " SWIC[2] ,Software Interrupt Clear 2 (EFT0 Combined Interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 1. " SWIC[1] ,Software Interrupt Clear 1 (Software Interrupt)" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SWIC[0] ,Software Interrupt Clear 0 (Watchdog interrupt)" "No effect,Clear"
|
|
tree.end
|
|
width 15.
|
|
tree "Secondary"
|
|
rgroup.long 0x20++0x0b "VIC Interrupt Control Registers"
|
|
line.long 0x00 "VIC_IRQSR1,IRQ Interrupt Status Register 1"
|
|
bitfld.long 0x00 30. " IRQS[62] ,IRQ Status 62 (MSP1 Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 29. " IRQS[61] ,IRQ Status 61 (MSP3 Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 28. " IRQS[60] ,IRQ Status 60 (USB-PHY HS Combined Interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 26. " IRQS[58] ,IRQ Status 58 (SGA IT)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 24. " IRQS[56] ,IRQ Status 56 (TSC_INT)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 22. " IRQS[54] ,IRQ Status 54 (AC97 Combined Interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 21. " IRQS[53] ,IRQ Status 53 (JPEGINTR)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 20. " IRQS[52] ,IRQ Status 52 (VIPFRM_VSYNC_INTR)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 19. " IRQS[51] ,IRQ Status 51 (VIPLINEINTR)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 18. " IRQS[50] ,IRQ Status 50 (DDR2)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 17. " IRQS[49] ,IRQ Status 49 (SCIINTR (Smart Card Interrupt))" "No interrupt,Interrupt"
|
|
sif ((cpu()!="STA2164")&&(cpu()!="STA165"))
|
|
bitfld.long 0x00 16. " IRQS[48] ,IRQ Status 48 (GALGPS Interrupt Request to MST from ARM966 (GPS_MBX966_IT))" "No interrupt,Interrupt"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 15. " IRQS[47] ,IRQ Status 47 (GPIO4 Combined interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 14. " IRQS[46] ,IRQ Status 46 (SD/MMC2 Combined interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 13. " IRQS[45] ,IRQ Status 45 (EFT3 Combined Interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 12. " IRQS[44] ,IRQ Status 44 (EFT2 Combined Interrupt)" "No interrupt,Interrupt"
|
|
sif ((cpu()!="STA2164")&&(cpu()!="STA165"))
|
|
bitfld.long 0x00 11. " IRQS[43] ,IRQ Status 43 (GALGPS HW Reset from ARM9 to ARM11 (GPS_RHW_WDT))" "No interrupt,Interrupt"
|
|
endif
|
|
bitfld.long 0x00 10. " IRQS[42] ,IRQ Status 42 (I2C2 Combined interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 9. " IRQS[41] ,IRQ Status 41 (CAN1 Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " IRQS[40] ,IRQ Status 40 (CAN0 Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 7. " IRQS[39] ,IRQ Status 39 (SaRaC Int 2 (SaRaC_INT_LOCK))" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 6. " IRQS[38] ,IRQ Status 38 (SaRaC Int 1 (SaRaC_INT_UFL))" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " IRQS[37] ,IRQ Status 37 (SaRaC Int 0 (SaRaC_INT_OFL))" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " IRQS[36] ,IRQ Status 36 (SaRaC Combined Interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " IRQS[35] ,IRQ Status 35 (C3 Int. 2 (IREQ_TATI))" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " IRQS[34] ,IRQ Status 34 (C3 Int. 1(IREQ_C3_FORMATOR))" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " IRQS[33] ,IRQ Status 33 (C3 Int. 0 (SPDIF_RX_INT))" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 0. " IRQS[32] ,IRQ Status 32 (SSP1 Combined Interrupt)" "No interrupt,Interrupt"
|
|
line.long 0x04 "VIC_FIQSR1,FIQ Interrupt Status Register 1"
|
|
bitfld.long 0x04 30. " FIQS[62] ,FIQ Status 62 (MSP1 Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 29. " FIQS[61] ,FIQ Status 61 (MSP3 Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 28. " FIQS[60] ,FIQ Status 60 (USB-PHY HS Combined Interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 26. " FIQS[58] ,FIQ Status 58 (SGA IT)" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 24. " FIQS[56] ,FIQ Status 56 (TSC_INT)" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 22. " FIQS[54] ,FIQ Status 54 (AC97 Combined Interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 21. " FIQS[53] ,FIQ Status 53 (JPEGINTR)" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 20. " FIQS[52] ,FIQ Status 52 (VIPFRM_VSYNC_INTR)" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 19. " FIQS[51] ,FIQ Status 51 (VIPLINEINTR)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 18. " FIQS[50] ,FIQ Status 50 (DDR2)" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 17. " FIQS[49] ,FIQ Status 49 (SCIINTR (Smart Card Interrupt))" "No interrupt,Interrupt"
|
|
sif ((cpu()!="STA2164")&&(cpu()!="STA165"))
|
|
bitfld.long 0x04 16. " FIQS[48] ,FIQ Status 48 (GALGPS Interrupt Request to MST from ARM966 (GPS_MBX966_IT))" "No interrupt,Interrupt"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x04 15. " FIQS[47] ,FIQ Status 47 (GPIO4 Combined interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 14. " FIQS[46] ,FIQ Status 46 (SD/MMC2 Combined interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 13. " FIQS[45] ,FIQ Status 45 (EFT3 Combined Interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 12. " FIQS[44] ,FIQ Status 44 (EFT2 Combined Interrupt)" "No interrupt,Interrupt"
|
|
sif ((cpu()!="STA2164")&&(cpu()!="STA165"))
|
|
bitfld.long 0x04 11. " FIQS[43] ,FIQ Status 43 (GALGPS HW Reset from ARM9 to ARM11 (GPS_RHW_WDT))" "No interrupt,Interrupt"
|
|
endif
|
|
bitfld.long 0x04 10. " FIQS[42] ,FIQ Status 42 (I2C2 Combined interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 9. " FIQS[41] ,FIQ Status 41 (CAN1 Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 8. " FIQS[40] ,FIQ Status 40 (CAN0 Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 7. " FIQS[39] ,FIQ Status 39 (SaRaC Int 2 (SaRaC_INT_LOCK))" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 6. " FIQS[38] ,FIQ Status 38 (SaRaC Int 1 (SaRaC_INT_UFL))" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 5. " FIQS[37] ,FIQ Status 37 (SaRaC Int 0 (SaRaC_INT_OFL))" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 4. " FIQS[36] ,FIQ Status 36 (SaRaC Combined Interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 3. " FIQS[35] ,FIQ Status 35 (C3 Int. 2 (IREQ_TATI))" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 2. " FIQS[34] ,FIQ Status 34 (C3 Int. 1(IREQ_C3_FORMATOR))" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 1. " FIQS[33] ,FIQ Status 33 (C3 Int. 0 (SPDIF_RX_INT))" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 0. " FIQS[32] ,FIQ Status 32 (SSP1 Combined Interrupt)" "No interrupt,Interrupt"
|
|
line.long 0x08 "VIC_RIS1,Raw Interrupt Status Register"
|
|
bitfld.long 0x08 30. " RIS[62] ,Raw Interrupt Status 62 (MSP1 Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 29. " RIS[61] ,Raw Interrupt Status 61 (MSP3 Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 28. " RIS[60] ,Raw Interrupt Status 60 (USB-PHY HS Combined Interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 26. " RIS[58] ,Raw Interrupt Status 58 (SGA IT)" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 24. " RIS[56] ,Raw Interrupt Status 56 (TSC_INT)" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 22. " RIS[54] ,Raw Interrupt Status 54 (AC97 Combined Interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 21. " RIS[53] ,Raw Interrupt Status 53 (JPEGINTR)" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 20. " RIS[52] ,Raw Interrupt Status 52 (VIPFRM_VSYNC_INTR)" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 19. " RIS[51] ,Raw Interrupt Status 51 (VIPLINEINTR)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 18. " RIS[50] ,Raw Interrupt Status 50 (DDR2)" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 17. " RIS[49] ,Raw Interrupt Status 49 (SCIINTR (Smart Card Interrupt))" "No interrupt,Interrupt"
|
|
sif ((cpu()!="STA2164")&&(cpu()!="STA165"))
|
|
bitfld.long 0x08 16. " RIS[48] ,Raw Interrupt Status 48 (GALGPS Interrupt Request to MST from ARM966 (GPS_MBX966_IT))" "No interrupt,Interrupt"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x08 15. " RIS[47] ,Raw Interrupt Status 47 (GPIO4 Combined interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 14. " RIS[46] ,Raw Interrupt Status 46 (SD/MMC2 Combined interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 13. " RIS[45] ,Raw Interrupt Status 45 (EFT3 Combined Interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 12. " RIS[44] ,Raw Interrupt Status 44 (EFT2 Combined Interrupt)" "No interrupt,Interrupt"
|
|
sif ((cpu()!="STA2164")&&(cpu()!="STA165"))
|
|
bitfld.long 0x08 11. " RIS[43] ,Raw Interrupt Status 43 (GALGPS HW Reset from ARM9 to ARM11 (GPS_RHW_WDT))" "No interrupt,Interrupt"
|
|
endif
|
|
bitfld.long 0x08 10. " RIS[42] ,Raw Interrupt Status 42 (I2C2 Combined interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 9. " RIS[41] ,Raw Interrupt Status 41 (CAN1 Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 8. " RIS[40] ,Raw Interrupt Status 40 (CAN0 Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 7. " RIS[39] ,Raw Interrupt Status 39 (SaRaC Int 2 (SaRaC_INT_LOCK))" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 6. " RIS[38] ,Raw Interrupt Status 38 (SaRaC Int 1 (SaRaC_INT_UFL))" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 5. " RIS[37] ,Raw Interrupt Status 37 (SaRaC Int 0 (SaRaC_INT_OFL))" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 4. " RIS[36] ,Raw Interrupt Status 36 (SaRaC Combined Interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 3. " RIS[35] ,Raw Interrupt Status 35 (C3 Int. 2 (IREQ_TATI))" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 2. " RIS[34] ,Raw Interrupt Status 34 (C3 Int. 1(IREQ_C3_FORMATOR))" "No interrupt,Interrupt"
|
|
bitfld.long 0x08 1. " RIS[33] ,Raw Interrupt Status 33 (C3 Int. 0 (SPDIF_RX_INT))" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x08 0. " RIS[32] ,Raw Interrupt Status 32 (SSP1 Combined Interrupt)" "No interrupt,Interrupt"
|
|
group.long 0x2c++0x07
|
|
line.long 0x00 "VIC_ISEL1,Interrupt Select Register 1"
|
|
bitfld.long 0x00 30. " ISEL[62] ,Interrupt Select 62 (MSP1 Combined Interrupt)" "IRQ,FIQ"
|
|
bitfld.long 0x00 29. " ISEL[61] ,Interrupt Select 61 (MSP3 Combined Interrupt)" "IRQ,FIQ"
|
|
bitfld.long 0x00 28. " ISEL[60] ,Interrupt Select 60 (USB-PHY HS Combined Interrupt)" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 26. " ISEL[58] ,Interrupt Select 58 (SGA IT)" "IRQ,FIQ"
|
|
bitfld.long 0x00 24. " ISEL[56] ,Interrupt Select 56 (TSC_INT)" "IRQ,FIQ"
|
|
bitfld.long 0x00 22. " ISEL[54] ,Interrupt Select 54 (AC97 Combined Interrupt)" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ISEL[53] ,Interrupt Select 53 (JPEGINTR)" "IRQ,FIQ"
|
|
bitfld.long 0x00 20. " ISEL[52] ,Interrupt Select 52 (VIPFRM_VSYNC_INTR)" "IRQ,FIQ"
|
|
bitfld.long 0x00 19. " ISEL[51] ,Interrupt Select 51 (VIPLINEINTR)" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 18. " ISEL[50] ,Interrupt Select 50 (DDR2)" "IRQ,FIQ"
|
|
bitfld.long 0x00 17. " ISEL[49] ,Interrupt Select 49 (SCIINTR (Smart Card Interrupt))" "IRQ,FIQ"
|
|
sif ((cpu()!="STA2164")&&(cpu()!="STA165"))
|
|
bitfld.long 0x00 16. " ISEL[48] ,Interrupt Select 48 (GALGPS Interrupt Request to MST from ARM966 (GPS_MBX966_IT))" "IRQ,FIQ"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 15. " ISEL[47] ,Interrupt Select 47 (GPIO4 Combined interrupt)" "IRQ,FIQ"
|
|
bitfld.long 0x00 14. " ISEL[46] ,Interrupt Select 46 (SD/MMC2 Combined interrupt)" "IRQ,FIQ"
|
|
bitfld.long 0x00 13. " ISEL[45] ,Interrupt Select 45 (EFT3 Combined Interrupt)" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 12. " ISEL[44] ,Interrupt Select 44 (EFT2 Combined Interrupt)" "IRQ,FIQ"
|
|
sif ((cpu()!="STA2164")&&(cpu()!="STA165"))
|
|
bitfld.long 0x00 11. " ISEL[43] ,Interrupt Select 43 (GALGPS HW Reset from ARM9 to ARM11 (GPS_RHW_WDT))" "IRQ,FIQ"
|
|
endif
|
|
bitfld.long 0x00 10. " ISEL[42] ,Interrupt Select 42 (I2C2 Combined interrupt)" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ISEL[41] ,Interrupt Select 41 (CAN1 Combined Interrupt)" "IRQ,FIQ"
|
|
bitfld.long 0x00 8. " ISEL[40] ,Interrupt Select 40 (CAN0 Combined Interrupt)" "IRQ,FIQ"
|
|
bitfld.long 0x00 7. " ISEL[39] ,Interrupt Select 39 (SaRaC Int 2 (SaRaC_INT_LOCK))" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ISEL[38] ,Interrupt Select 38 (SaRaC Int 1 (SaRaC_INT_UFL))" "IRQ,FIQ"
|
|
bitfld.long 0x00 5. " ISEL[37] ,Interrupt Select 37 (SaRaC Int 0 (SaRaC_INT_OFL))" "IRQ,FIQ"
|
|
bitfld.long 0x00 4. " ISEL[36] ,Interrupt Select 36 (SaRaC Combined Interrupt)" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ISEL[35] ,Interrupt Select 35 (C3 Int. 2 (IREQ_TATI))" "IRQ,FIQ"
|
|
bitfld.long 0x00 2. " ISEL[34] ,Interrupt Select 34 (C3 Int. 1(IREQ_C3_FORMATOR))" "IRQ,FIQ"
|
|
bitfld.long 0x00 1. " ISEL[33] ,Interrupt Select 33 (C3 Int. 0 (SPDIF_RX_INT))" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ISEL[32] ,Interrupt Select 32 (SSP1 Combined Interrupt)" "IRQ,FIQ"
|
|
line.long 0x04 "VIC_IENS1,Interrupt Enable Register 1"
|
|
bitfld.long 0x04 30. " IENS[62] ,Interrupt Enable 62 (MSP1 Combined Interrupt)" "Disabled,Enabled"
|
|
bitfld.long 0x04 29. " IENS[61] ,Interrupt Enable 61 (MSP3 Combined Interrupt)" "Disabled,Enabled"
|
|
bitfld.long 0x04 28. " IENS[60] ,Interrupt Enable 60 (USB-PHY HS Combined Interrupt)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 26. " IENS[58] ,Interrupt Enable 58 (SGA IT)" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " IENS[56] ,Interrupt Enable 56 (TSC_INT)" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " IENS[54] ,Interrupt Enable 54 (AC97 Combined Interrupt)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " IENS[53] ,Interrupt Enable 53 (JPEGINTR)" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " IENS[52] ,Interrupt Enable 52 (VIPFRM_VSYNC_INTR)" "Disabled,Enabled"
|
|
bitfld.long 0x04 19. " IENS[51] ,Interrupt Enable 51 (VIPLINEINTR)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 18. " IENS[50] ,Interrupt Enable 50 (DDR2)" "Disabled,Enabled"
|
|
bitfld.long 0x04 17. " IENS[49] ,Interrupt Enable 49 (SCIINTR (Smart Card Interrupt))" "Disabled,Enabled"
|
|
sif ((cpu()!="STA2164")&&(cpu()!="STA165"))
|
|
bitfld.long 0x04 16. " IENS[48] ,Interrupt Enable 48 (GALGPS Interrupt Request to MST from ARM966 (GPS_MBX966_IT))" "Disabled,Enabled"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x04 15. " IENS[47] ,Interrupt Enable 47 (GPIO4 Combined interrupt)" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " IENS[46] ,Interrupt Enable 46 (SD/MMC2 Combined interrupt)" "Disabled,Enabled"
|
|
bitfld.long 0x04 13. " IENS[45] ,Interrupt Enable 45 (EFT3 Combined Interrupt)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 12. " IENS[44] ,Interrupt Enable 44 (EFT2 Combined Interrupt)" "Disabled,Enabled"
|
|
sif ((cpu()!="STA2164")&&(cpu()!="STA165"))
|
|
bitfld.long 0x04 11. " IENS[43] ,Interrupt Enable 43 (GALGPS HW Reset from ARM9 to ARM11 (GPS_RHW_WDT))" "Disabled,Enabled"
|
|
endif
|
|
bitfld.long 0x04 10. " IENS[42] ,Interrupt Enable 42 (I2C2 Combined interrupt)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 9. " IENS[41] ,Interrupt Enable 41 (CAN1 Combined Interrupt)" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " IENS[40] ,Interrupt Enable 40 (CAN0 Combined Interrupt)" "Disabled,Enabled"
|
|
bitfld.long 0x04 7. " IENS[39] ,Interrupt Enable 39 (SaRaC Int 2 (SaRaC_INT_LOCK))" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 6. " IENS[38] ,Interrupt Enable 38 (SaRaC Int 1 (SaRaC_INT_UFL))" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " IENS[37] ,Interrupt Enable 37 (SaRaC Int 0 (SaRaC_INT_OFL))" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " IENS[36] ,Interrupt Enable 36 (SaRaC Combined Interrupt)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " IENS[35] ,Interrupt Enable 35 (C3 Int. 2 (IREQ_TATI))" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " IENS[34] ,Interrupt Enable 34 (C3 Int. 1(IREQ_C3_FORMATOR))" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " IENS[33] ,Interrupt Enable 33 (C3 Int. 0 (SPDIF_RX_INT))" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 0. " IENS[32] ,Interrupt Enable 32 (SSP1 Combined Interrupt)" "Disabled,Enabled"
|
|
wgroup.long 0x34++0x03
|
|
line.long 0x00 "VIC_IENC1,Interrupt Enable Clear Register 1"
|
|
bitfld.long 0x00 30. " IENC[62] ,Interrupt Enable Clear 62 (MSP1 Combined Interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 29. " IENC[61] ,Interrupt Enable Clear 61 (MSP3 Combined Interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 28. " IENC[60] ,Interrupt Enable Clear 60 (USB-PHY HS Combined Interrupt)" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 26. " IENC[58] ,Interrupt Enable Clear 58 (SGA IT)" "No effect,Clear"
|
|
bitfld.long 0x00 24. " IENC[56] ,Interrupt Enable Clear 56 (TSC_INT)" "No effect,Clear"
|
|
bitfld.long 0x00 22. " IENC[54] ,Interrupt Enable Clear 54 (AC97 Combined Interrupt)" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 21. " IENC[53] ,Interrupt Enable Clear 53 (JPEGINTR)" "No effect,Clear"
|
|
bitfld.long 0x00 20. " IENC[52] ,Interrupt Enable Clear 52 (VIPFRM_VSYNC_INTR)" "No effect,Clear"
|
|
bitfld.long 0x00 19. " IENC[51] ,Interrupt Enable Clear 51 (VIPLINEINTR)" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 18. " IENC[50] ,Interrupt Enable Clear 50 (DDR2)" "No effect,Clear"
|
|
bitfld.long 0x00 17. " IENC[49] ,Interrupt Enable Clear 49 (SCIINTR (Smart Card Interrupt))" "No effect,Clear"
|
|
sif ((cpu()!="STA2164")&&(cpu()!="STA165"))
|
|
bitfld.long 0x00 16. " IENC[48] ,Interrupt Enable Clear 48 (GALGPS Interrupt Request to MST from ARM966 (GPS_MBX966_IT))" "No effect,Clear"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 15. " IENC[47] ,Interrupt Enable Clear 47 (GPIO4 Combined interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 14. " IENC[46] ,Interrupt Enable Clear 46 (SD/MMC2 Combined interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 13. " IENC[45] ,Interrupt Enable Clear 45 (EFT3 Combined Interrupt)" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 12. " IENC[44] ,Interrupt Enable Clear 44 (EFT2 Combined Interrupt)" "No effect,Clear"
|
|
sif ((cpu()!="STA2164")&&(cpu()!="STA165"))
|
|
bitfld.long 0x00 11. " IENC[43] ,Interrupt Enable Clear 43 (GALGPS HW Reset from ARM9 to ARM11 (GPS_RHW_WDT))" "No effect,Clear"
|
|
endif
|
|
bitfld.long 0x00 10. " IENC[42] ,Interrupt Enable Clear 42 (I2C2 Combined interrupt)" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 9. " IENC[41] ,Interrupt Enable Clear 41 (CAN1 Combined Interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 8. " IENC[40] ,Interrupt Enable Clear 40 (CAN0 Combined Interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 7. " IENC[39] ,Interrupt Enable Clear 39 (SaRaC Int 2 (SaRaC_INT_LOCK))" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6. " IENC[38] ,Interrupt Enable Clear 38 (SaRaC Int 1 (SaRaC_INT_UFL))" "No effect,Clear"
|
|
bitfld.long 0x00 5. " IENC[37] ,Interrupt Enable Clear 37 (SaRaC Int 0 (SaRaC_INT_OFL))" "No effect,Clear"
|
|
bitfld.long 0x00 4. " IENC[36] ,Interrupt Enable Clear 36 (SaRaC Combined Interrupt)" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " IENC[35] ,Interrupt Enable Clear 35 (C3 Int. 2 (IREQ_TATI))" "No effect,Clear"
|
|
bitfld.long 0x00 2. " IENC[34] ,Interrupt Enable Clear 34 (C3 Int. 1(IREQ_C3_FORMATOR))" "No effect,Clear"
|
|
bitfld.long 0x00 1. " IENC[33] ,Interrupt Enable Clear 33 (C3 Int. 0 (SPDIF_RX_INT))" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 0. " IENC[32] ,Interrupt Enable Clear 32 (SSP1 Combined Interrupt)" "No effect,Clear"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "VIC_SWISR1,Software Interrupt Set Register 1"
|
|
bitfld.long 0x00 30. " SWIS[62] ,Software Interrupt 62 (MSP1 Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 29. " SWIS[61] ,Software Interrupt 61 (MSP3 Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 28. " SWIS[60] ,Software Interrupt 60 (USB-PHY HS Combined Interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SWIS[58] ,Software Interrupt 58 (SGA IT)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 24. " SWIS[56] ,Software Interrupt 56 (TSC_INT)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 22. " SWIS[54] ,Software Interrupt 54 (AC97 Combined Interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SWIS[53] ,Software Interrupt 53 (JPEGINTR)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 20. " SWIS[52] ,Software Interrupt 52 (VIPFRM_VSYNC_INTR)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 19. " SWIS[51] ,Software Interrupt 51 (VIPLINEINTR)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 18. " SWIS[50] ,Software Interrupt 50 (DDR2)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 17. " SWIS[49] ,Software Interrupt 49 (SCIINTR (Smart Card Interrupt))" "No interrupt,Interrupt"
|
|
sif ((cpu()!="STA2164")&&(cpu()!="STA165"))
|
|
bitfld.long 0x00 16. " SWIS[48] ,Software Interrupt 48 (GALGPS Interrupt Request to MST from ARM966 (GPS_MBX966_IT))" "No interrupt,Interrupt"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 15. " SWIS[47] ,Software Interrupt 47 (GPIO4 Combined interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 14. " SWIS[46] ,Software Interrupt 46 (SD/MMC2 Combined interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 13. " SWIS[45] ,Software Interrupt 45 (EFT3 Combined Interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SWIS[44] ,Software Interrupt 44 (EFT2 Combined Interrupt)" "No interrupt,Interrupt"
|
|
sif ((cpu()!="STA2164")&&(cpu()!="STA165"))
|
|
bitfld.long 0x00 11. " SWIS[43] ,Software Interrupt 43 (GALGPS HW Reset from ARM9 to ARM11 (GPS_RHW_WDT))" "No interrupt,Interrupt"
|
|
endif
|
|
bitfld.long 0x00 10. " SWIS[42] ,Software Interrupt 42 (I2C2 Combined interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 9. " SWIS[41] ,Software Interrupt 41 (CAN1 Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " SWIS[40] ,Software Interrupt 40 (CAN0 Combined Interrupt)" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 7. " SWIS[39] ,Software Interrupt 39 (SaRaC Int 2 (SaRaC_INT_LOCK))" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 6. " SWIS[38] ,Software Interrupt 38 (SaRaC Int 1 (SaRaC_INT_UFL))" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " SWIS[37] ,Software Interrupt 37 (SaRaC Int 0 (SaRaC_INT_OFL))" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " SWIS[36] ,Software Interrupt 36 (SaRaC Combined Interrupt)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SWIS[35] ,Software Interrupt 35 (C3 Int. 2 (IREQ_TATI))" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " SWIS[34] ,Software Interrupt 34 (C3 Int. 1(IREQ_C3_FORMATOR))" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " SWIS[33] ,Software Interrupt 33 (C3 Int. 0 (SPDIF_RX_INT))" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SWIS[32] ,Software Interrupt 32 (SSP1 Combined Interrupt)" "No interrupt,Interrupt"
|
|
wgroup.long 0x3c++0x03
|
|
line.long 0x00 "VIC_SWICR1,Software Interrupt Clear Register 1"
|
|
bitfld.long 0x00 30. " SWIC[62] ,Software Interrupt Clear 62 (MSP1 Combined Interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 29. " SWIC[61] ,Software Interrupt Clear 61 (MSP3 Combined Interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 28. " SWIC[60] ,Software Interrupt Clear 60 (USB-PHY HS Combined Interrupt)" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 26. " SWIC[58] ,Software Interrupt Clear 58 (SGA IT)" "No effect,Clear"
|
|
bitfld.long 0x00 24. " SWIC[56] ,Software Interrupt Clear 56 (TSC_INT)" "No effect,Clear"
|
|
bitfld.long 0x00 22. " SWIC[54] ,Software Interrupt Clear 54 (AC97 Combined Interrupt)" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SWIC[53] ,Software Interrupt Clear 53 (JPEGINTR)" "No effect,Clear"
|
|
bitfld.long 0x00 20. " SWIC[52] ,Software Interrupt Clear 52 (VIPFRM_VSYNC_INTR)" "No effect,Clear"
|
|
bitfld.long 0x00 19. " SWIC[51] ,Software Interrupt Clear 51 (VIPLINEINTR)" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 18. " SWIC[50] ,Software Interrupt Clear 50 (DDR2)" "No effect,Clear"
|
|
bitfld.long 0x00 17. " SWIC[49] ,Software Interrupt Clear 49 (SCIINTR (Smart Card Interrupt))" "No effect,Clear"
|
|
sif ((cpu()!="STA2164")&&(cpu()!="STA165"))
|
|
bitfld.long 0x00 16. " SWIC[48] ,Software Interrupt Clear 48 (GALGPS Interrupt Request to MST from ARM966 (GPS_MBX966_IT))" "No effect,Clear"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 15. " SWIC[47] ,Software Interrupt Clear 47 (GPIO4 Combined interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 14. " SWIC[46] ,Software Interrupt Clear 46 (SD/MMC2 Combined interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 13. " SWIC[45] ,Software Interrupt Clear 45 (EFT3 Combined Interrupt)" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 12. " SWIC[44] ,Software Interrupt Clear 44 (EFT2 Combined Interrupt)" "No effect,Clear"
|
|
sif ((cpu()!="STA2164")&&(cpu()!="STA165"))
|
|
bitfld.long 0x00 11. " SWIC[43] ,Software Interrupt Clear 43 (GALGPS HW Reset from ARM9 to ARM11 (GPS_RHW_WDT))" "No effect,Clear"
|
|
endif
|
|
bitfld.long 0x00 10. " SWIC[42] ,Software Interrupt Clear 42 (I2C2 Combined interrupt)" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 9. " SWIC[41] ,Software Interrupt Clear 41 (CAN1 Combined Interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 8. " SWIC[40] ,Software Interrupt Clear 40 (CAN0 Combined Interrupt)" "No effect,Clear"
|
|
bitfld.long 0x00 7. " SWIC[39] ,Software Interrupt Clear 39 (SaRaC Int 2 (SaRaC_INT_LOCK))" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6. " SWIC[38] ,Software Interrupt Clear 38 (SaRaC Int 1 (SaRaC_INT_UFL))" "No effect,Clear"
|
|
bitfld.long 0x00 5. " SWIC[37] ,Software Interrupt Clear 37 (SaRaC Int 0 (SaRaC_INT_OFL))" "No effect,Clear"
|
|
bitfld.long 0x00 4. " SWIC[36] ,Software Interrupt Clear 36 (SaRaC Combined Interrupt)" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SWIC[35] ,Software Interrupt Clear 35 (C3 Int. 2 (IREQ_TATI))" "No effect,Clear"
|
|
bitfld.long 0x00 2. " SWIC[34] ,Software Interrupt Clear 34 (C3 Int. 1(IREQ_C3_FORMATOR))" "No effect,Clear"
|
|
bitfld.long 0x00 1. " SWIC[33] ,Software Interrupt Clear 33 (C3 Int. 0 (SPDIF_RX_INT))" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SWIC[32] ,Software Interrupt Clear 32 (SSP1 Combined Interrupt)" "No effect,Clear"
|
|
tree.end
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "VIC_PER,VIC Protection Enable Register"
|
|
bitfld.long 0x00 0. " PROT ,Enable/disable protected register access" "Disabled,Enabled"
|
|
width 16.
|
|
group.long 0x50++0x07 "VIC Vector Address Registers"
|
|
line.long 0x00 "VIC_VAR,ISR Vector Address Register"
|
|
line.long 0x04 "VIC_DVAR,ISR Default Vector Address Register"
|
|
group.long 0x100++0x3f
|
|
line.long 0x0 "VIC_VAR0,Vector Address Register 0"
|
|
line.long 0x4 "VIC_VAR1,Vector Address Register 1"
|
|
line.long 0x8 "VIC_VAR2,Vector Address Register 2"
|
|
line.long 0xC "VIC_VAR3,Vector Address Register 3"
|
|
line.long 0x10 "VIC_VAR4,Vector Address Register 4"
|
|
line.long 0x14 "VIC_VAR5,Vector Address Register 5"
|
|
line.long 0x18 "VIC_VAR6,Vector Address Register 6"
|
|
line.long 0x1C "VIC_VAR7,Vector Address Register 7"
|
|
line.long 0x20 "VIC_VAR8,Vector Address Register 8"
|
|
line.long 0x24 "VIC_VAR9,Vector Address Register 9"
|
|
line.long 0x28 "VIC_VAR10,Vector Address Register 10"
|
|
line.long 0x2C "VIC_VAR11,Vector Address Register 11"
|
|
line.long 0x30 "VIC_VAR12,Vector Address Register 12"
|
|
line.long 0x34 "VIC_VAR13,Vector Address Register 13"
|
|
line.long 0x38 "VIC_VAR14,Vector Address Register 14"
|
|
line.long 0x3C "VIC_VAR15,Vector Address Register 15"
|
|
group.long 0x200++0x3f "VIC Interrupt Vector Control Registers"
|
|
line.long 0x0 "VIC_VCR0 ,Vector Control Register 0 "
|
|
bitfld.long 0x0 6. " E0 ,Enable vector interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x0 0.--5. " INTSOURCE0 ,Interrupt Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x4 "VIC_VCR1 ,Vector Control Register 1 "
|
|
bitfld.long 0x4 6. " E1 ,Enable vector interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x4 0.--5. " INTSOURCE1 ,Interrupt Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x8 "VIC_VCR2 ,Vector Control Register 2 "
|
|
bitfld.long 0x8 6. " E2 ,Enable vector interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x8 0.--5. " INTSOURCE2 ,Interrupt Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0xC "VIC_VCR3 ,Vector Control Register 3 "
|
|
bitfld.long 0xC 6. " E3 ,Enable vector interrupt" "Disabled,Enabled"
|
|
bitfld.long 0xC 0.--5. " INTSOURCE3 ,Interrupt Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x10 "VIC_VCR4 ,Vector Control Register 4 "
|
|
bitfld.long 0x10 6. " E4 ,Enable vector interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x10 0.--5. " INTSOURCE4 ,Interrupt Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x14 "VIC_VCR5 ,Vector Control Register 5 "
|
|
bitfld.long 0x14 6. " E5 ,Enable vector interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x14 0.--5. " INTSOURCE5 ,Interrupt Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x18 "VIC_VCR6 ,Vector Control Register 6 "
|
|
bitfld.long 0x18 6. " E6 ,Enable vector interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x18 0.--5. " INTSOURCE6 ,Interrupt Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x1C "VIC_VCR7 ,Vector Control Register 7 "
|
|
bitfld.long 0x1C 6. " E7 ,Enable vector interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x1C 0.--5. " INTSOURCE7 ,Interrupt Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x20 "VIC_VCR8 ,Vector Control Register 8 "
|
|
bitfld.long 0x20 6. " E8 ,Enable vector interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x20 0.--5. " INTSOURCE8 ,Interrupt Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x24 "VIC_VCR9 ,Vector Control Register 9 "
|
|
bitfld.long 0x24 6. " E9 ,Enable vector interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x24 0.--5. " INTSOURCE9 ,Interrupt Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x28 "VIC_VCR10,Vector Control Register 10"
|
|
bitfld.long 0x28 6. " E10 ,Enable vector interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x28 0.--5. " INTSOURCE10 ,Interrupt Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x2C "VIC_VCR11,Vector Control Register 11"
|
|
bitfld.long 0x2C 6. " E11 ,Enable vector interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x2C 0.--5. " INTSOURCE11 ,Interrupt Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x30 "VIC_VCR12,Vector Control Register 12"
|
|
bitfld.long 0x30 6. " E12 ,Enable vector interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x30 0.--5. " INTSOURCE12 ,Interrupt Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x34 "VIC_VCR13,Vector Control Register 13"
|
|
bitfld.long 0x34 6. " E13 ,Enable vector interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x34 0.--5. " INTSOURCE13 ,Interrupt Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x38 "VIC_VCR14,Vector Control Register 14"
|
|
bitfld.long 0x38 6. " E14 ,Enable vector interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x38 0.--5. " INTSOURCE14 ,Interrupt Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x3C "VIC_VCR15,Vector Control Register 15"
|
|
bitfld.long 0x3C 6. " E15 ,Enable vector interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x3C 0.--5. " INTSOURCE15 ,Interrupt Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
rgroup.long 0xfe0++0x1f "VIC Peripheral Identification Registers"
|
|
line.long 0x00 "PERIPHID0,VIC Peripheral Identification Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PARTNUMBER0 ,Part number 0"
|
|
line.long 0x04 "VIC_PERIPHID1,VIC Peripheral Identification Register 1"
|
|
bitfld.long 0x04 4.--7. " DESIGNER0 ,Designer 0" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
bitfld.long 0x04 0.--3. " PARTNUMBER1 ,Part number 1" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
line.long 0x08 "VIC_PERIPHID2,VIC Peripheral Identification Register 2"
|
|
bitfld.long 0x08 4.--7. " REVISION ,Revision Number" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
bitfld.long 0x08 0.--3. " DESIGNER1 ,Designer 1" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
|
|
line.long 0x0c "VIC_PERIPHID3,VIC Peripheral Identification Register 3"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " CONFIGURATION ,Configuration"
|
|
line.long 0x10 "VIC_PCELLID0,VIC Identification Register 0"
|
|
hexmask.long.byte 0x10 0.--7. 1. " VIC_PCELLID0 ,Identification"
|
|
line.long 0x14 "VIC_PCELLID1,VIC Identification Register 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " VIC_PCELLID1 ,Identification"
|
|
line.long 0x18 "VIC_PCELLID2,VIC Identification Register 2"
|
|
hexmask.long.byte 0x18 0.--7. 1. " VIC_PCELLID2 ,Identification"
|
|
line.long 0x1c "VIC_PCELLID3,VIC Identification Register 3"
|
|
hexmask.long.byte 0x1c 0.--7. 1. " VIC_PCELLID3 ,Identification"
|
|
width 0xb
|
|
tree.end
|
|
tree.open "GPIO (General Purpose I/Os)"
|
|
tree "GPIO 0"
|
|
base asd:0x101E4000
|
|
width 15.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "GPIO_DAT,GPIO 0 Data Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " GPDAT31_set/clr ,GPIO31 Data" "Low,High"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " GPDAT30_set/clr ,GPIO30 Data" "Low,High"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " GPDAT29_set/clr ,GPIO29 Data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " GPDAT28_set/clr ,GPIO28 Data" "Low,High"
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " GPDAT27_set/clr ,GPIO27 Data" "Low,High"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " GPDAT26_set/clr ,GPIO26 Data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " GPDAT25_set/clr ,GPIO25 Data" "Low,High"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " GPDAT24_set/clr ,GPIO24 Data" "Low,High"
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " GPDAT23_set/clr ,GPIO23 Data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " GPDAT22_set/clr ,GPIO22 Data" "Low,High"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " GPDAT21_set/clr ,GPIO21 Data" "Low,High"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " GPDAT20_set/clr ,GPIO20 Data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " GPDAT19_set/clr ,GPIO19 Data" "Low,High"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " GPDAT18_set/clr ,GPIO18 Data" "Low,High"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " GPDAT17_set/clr ,GPIO17 Data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " GPDAT16_set/clr ,GPIO16 Data" "Low,High"
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " GPDAT15_set/clr ,GPIO15 Data" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " GPDAT14_set/clr ,GPIO14 Data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " GPDAT13_set/clr ,GPIO13 Data" "Low,High"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " GPDAT12_set/clr ,GPIO12 Data" "Low,High"
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " GPDAT11_set/clr ,GPIO11 Data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " GPDAT10_set/clr ,GPIO10 Data" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " GPDAT9_set/clr ,GPIO9 Data" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " GPDAT8_set/clr ,GPIO8 Data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " GPDAT7_set/clr ,GPIO7 Data" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " GPDAT6_set/clr ,GPIO6 Data" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " GPDAT5_set/clr ,GPIO5 Data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " GPDAT4_set/clr ,GPIO4 Data" "Low,High"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " GPDAT3_set/clr ,GPIO3 Data" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " GPDAT2_set/clr ,GPIO2 Data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " GPDAT1_set/clr ,GPIO1 Data" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " GPDAT0_set/clr ,GPIO0 Data" "Low,High"
|
|
width 15.
|
|
group.long 0x0c++0x03
|
|
line.long 0x00 "GPIO_PDIS,GPIO 0 Pull Disable Register"
|
|
bitfld.long 0x00 31. " PDIS31 ,GPIO31 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 30. " PDIS30 ,GPIO30 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 29. " PDIS29 ,GPIO29 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 28. " PDIS28 ,GPIO28 Pull-up or Pull-down Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 27. " PDIS27 ,GPIO27 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 26. " PDIS26 ,GPIO26 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 25. " PDIS25 ,GPIO25 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 24. " PDIS24 ,GPIO24 Pull-up or Pull-down Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 23. " PDIS23 ,GPIO23 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 22. " PDIS22 ,GPIO22 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 21. " PDIS21 ,GPIO21 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 20. " PDIS20 ,GPIO20 Pull-up or Pull-down Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PDIS19 ,GPIO19 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 18. " PDIS18 ,GPIO18 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 17. " PDIS17 ,GPIO17 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 16. " PDIS16 ,GPIO16 Pull-up or Pull-down Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 15. " PDIS15 ,GPIO15 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 14. " PDIS14 ,GPIO14 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 13. " PDIS13 ,GPIO13 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 12. " PDIS12 ,GPIO12 Pull-up or Pull-down Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PDIS11 ,GPIO11 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 10. " PDIS10 ,GPIO10 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 9. " PDIS9 ,GPIO9 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 8. " PDIS8 ,GPIO8 Pull-up or Pull-down Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PDIS7 ,GPIO7 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 6. " PDIS6 ,GPIO6 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 5. " PDIS5 ,GPIO5 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 4. " PDIS4 ,GPIO4 Pull-up or Pull-down Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PDIS3 ,GPIO3 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 2. " PDIS2 ,GPIO2 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 1. " PDIS1 ,GPIO1 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 0. " PDIS0 ,GPIO0 Pull-up or Pull-down Disable" "No,Yes"
|
|
width 15.
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "GPIO_DIR,GPIO 0 Direction Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " GPIO_DIR31_set/clr ,GPIO31 Direction" "Input,Output"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " GPIO_DIR30_set/clr ,GPIO30 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " GPIO_DIR29_set/clr ,GPIO29 Direction" "Input,Output"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " GPIO_DIR28_set/clr ,GPIO28 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " GPIO_DIR27_set/clr ,GPIO27 Direction" "Input,Output"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " GPIO_DIR26_set/clr ,GPIO26 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " GPIO_DIR25_set/clr ,GPIO25 Direction" "Input,Output"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " GPIO_DIR24_set/clr ,GPIO24 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " GPIO_DIR23_set/clr ,GPIO23 Direction" "Input,Output"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " GPIO_DIR22_set/clr ,GPIO22 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " GPIO_DIR21_set/clr ,GPIO21 Direction" "Input,Output"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " GPIO_DIR20_set/clr ,GPIO20 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " GPIO_DIR19_set/clr ,GPIO19 Direction" "Input,Output"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " GPIO_DIR18_set/clr ,GPIO18 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " GPIO_DIR17_set/clr ,GPIO17 Direction" "Input,Output"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " GPIO_DIR16_set/clr ,GPIO16 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " GPIO_DIR15_set/clr ,GPIO15 Direction" "Input,Output"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " GPIO_DIR14_set/clr ,GPIO14 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " GPIO_DIR13_set/clr ,GPIO13 Direction" "Input,Output"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " GPIO_DIR12_set/clr ,GPIO12 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " GPIO_DIR11_set/clr ,GPIO11 Direction" "Input,Output"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " GPIO_DIR10_set/clr ,GPIO10 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " GPIO_DIR9_set/clr ,GPIO9 Direction" "Input,Output"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " GPIO_DIR8_set/clr ,GPIO8 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " GPIO_DIR7_set/clr ,GPIO7 Direction" "Input,Output"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " GPIO_DIR6_set/clr ,GPIO6 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " GPIO_DIR5_set/clr ,GPIO5 Direction" "Input,Output"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " GPIO_DIR4_set/clr ,GPIO4 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " GPIO_DIR3_set/clr ,GPIO3 Direction" "Input,Output"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " GPIO_DIR2_set/clr ,GPIO2 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " GPIO_DIR1_set/clr ,GPIO1 Direction" "Input,Output"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " GPIO_DIR0_set/clr ,GPIO0 Direction" "Input,Output"
|
|
width 15.
|
|
group.long 0x1c++0x03
|
|
line.long 0x00 "GPIO_SLPM,GPIO 0 Sleep Mode Register"
|
|
bitfld.long 0x00 31. " SLPM31 ,GPIO31 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " SLPM30 ,GPIO30 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " SLPM29 ,GPIO29 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " SLPM28 ,GPIO28 Sleep Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " SLPM27 ,GPIO27 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " SLPM26 ,GPIO26 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " SLPM25 ,GPIO25 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " SLPM24 ,GPIO24 Sleep Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " SLPM23 ,GPIO23 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " SLPM22 ,GPIO22 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " SLPM21 ,GPIO21 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " SLPM20 ,GPIO20 Sleep Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SLPM19 ,GPIO19 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " SLPM18 ,GPIO18 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " SLPM17 ,GPIO17 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " SLPM16 ,GPIO16 Sleep Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SLPM15 ,GPIO15 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " SLPM14 ,GPIO14 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " SLPM13 ,GPIO13 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " SLPM12 ,GPIO12 Sleep Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SLPM11 ,GPIO11 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " SLPM10 ,GPIO10 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " SLPM9 ,GPIO9 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " SLPM8 ,GPIO8 Sleep Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SLPM7 ,GPIO7 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " SLPM6 ,GPIO6 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SLPM5 ,GPIO5 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " SLPM4 ,GPIO4 Sleep Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SLPM3 ,GPIO3 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " SLPM2 ,GPIO2 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " SLPM1 ,GPIO1 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " SLPM0 ,GPIO0 Sleep Mode" "Disabled,Enabled"
|
|
width 15.
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "GPIO_AFSLA,GPIO 0 Alternate Function Select A"
|
|
bitfld.long 0x00 31. " GPAFSA31 ,GPIO31 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 30. " GPAFSA30 ,GPIO30 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 29. " GPAFSA29 ,GPIO29 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 28. " GPAFSA28 ,GPIO28 Alternate Function Select A" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 27. " GPAFSA27 ,GPIO27 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 26. " GPAFSA26 ,GPIO26 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 25. " GPAFSA25 ,GPIO25 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 24. " GPAFSA24 ,GPIO24 Alternate Function Select A" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 23. " GPAFSA23 ,GPIO23 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 22. " GPAFSA22 ,GPIO22 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 21. " GPAFSA21 ,GPIO21 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 20. " GPAFSA20 ,GPIO20 Alternate Function Select A" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GPAFSA19 ,GPIO19 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 18. " GPAFSA18 ,GPIO18 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 17. " GPAFSA17 ,GPIO17 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 16. " GPAFSA16 ,GPIO16 Alternate Function Select A" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " GPAFSA15 ,GPIO15 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 14. " GPAFSA14 ,GPIO14 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 13. " GPAFSA13 ,GPIO13 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 12. " GPAFSA12 ,GPIO12 Alternate Function Select A" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " GPAFSA11 ,GPIO11 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 10. " GPAFSA10 ,GPIO10 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 9. " GPAFSA9 ,GPIO9 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 8. " GPAFSA8 ,GPIO8 Alternate Function Select A" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GPAFSA7 ,GPIO7 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 6. " GPAFSA6 ,GPIO6 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 5. " GPAFSA5 ,GPIO5 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 4. " GPAFSA4 ,GPIO4 Alternate Function Select A" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GPAFSA3 ,GPIO3 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 2. " GPAFSA2 ,GPIO2 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 1. " GPAFSA1 ,GPIO1 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 0. " GPAFSA0 ,GPIO0 Alternate Function Select A" "Low,High"
|
|
line.long 0x04 "GPIO_AFSLB,GPIO 0 Alternate Function Select B"
|
|
bitfld.long 0x04 31. " GPAFBA31 ,GPIO31 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 30. " GPAFBA30 ,GPIO30 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 29. " GPAFBA29 ,GPIO29 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 28. " GPAFBA28 ,GPIO28 Alternate Function Select B" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 27. " GPAFBA27 ,GPIO27 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 26. " GPAFBA26 ,GPIO26 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 25. " GPAFBA25 ,GPIO25 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 24. " GPAFBA24 ,GPIO24 Alternate Function Select B" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 23. " GPAFBA23 ,GPIO23 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 22. " GPAFBA22 ,GPIO22 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 21. " GPAFBA21 ,GPIO21 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 20. " GPAFBA20 ,GPIO20 Alternate Function Select B" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 19. " GPAFBA19 ,GPIO19 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 18. " GPAFBA18 ,GPIO18 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 17. " GPAFBA17 ,GPIO17 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 16. " GPAFBA16 ,GPIO16 Alternate Function Select B" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 15. " GPAFBA15 ,GPIO15 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 14. " GPAFBA14 ,GPIO14 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 13. " GPAFBA13 ,GPIO13 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 12. " GPAFBA12 ,GPIO12 Alternate Function Select B" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 11. " GPAFBA11 ,GPIO11 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 10. " GPAFBA10 ,GPIO10 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 9. " GPAFBA9 ,GPIO9 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 8. " GPAFBA8 ,GPIO8 Alternate Function Select B" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 7. " GPAFBA7 ,GPIO7 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 6. " GPAFBA6 ,GPIO6 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 5. " GPAFBA5 ,GPIO5 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 4. " GPAFBA4 ,GPIO4 Alternate Function Select B" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 3. " GPAFBA3 ,GPIO3 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 2. " GPAFBA2 ,GPIO2 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 1. " GPAFBA1 ,GPIO1 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 0. " GPAFBA0 ,GPIO0 Alternate Function Select B" "Low,High"
|
|
width 15.
|
|
group.long 0x40++0x07
|
|
line.long 0x00 "GPIO_RIMSC,GPIO 0 Rising Edge Interrupt Mask Set Clear Register"
|
|
bitfld.long 0x00 31. " GPRIM31 ,GPIO31 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 30. " GPRIM30 ,GPIO30 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 29. " GPRIM29 ,GPIO29 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GPRIM28 ,GPIO28 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 27. " GPRIM27 ,GPIO27 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 26. " GPRIM26 ,GPIO26 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GPRIM25 ,GPIO25 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 24. " GPRIM24 ,GPIO24 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 23. " GPRIM23 ,GPIO23 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GPRIM22 ,GPIO22 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 21. " GPRIM21 ,GPIO21 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 20. " GPRIM20 ,GPIO20 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GPRIM19 ,GPIO19 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 18. " GPRIM18 ,GPIO18 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 17. " GPRIM17 ,GPIO17 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GPRIM16 ,GPIO16 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 15. " GPRIM15 ,GPIO15 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 14. " GPRIM14 ,GPIO14 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GPRIM13 ,GPIO13 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 12. " GPRIM12 ,GPIO12 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 11. " GPRIM11 ,GPIO11 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GPRIM10 ,GPIO10 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 9. " GPRIM9 ,GPIO9 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 8. " GPRIM8 ,GPIO8 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GPRIM7 ,GPIO7 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 6. " GPRIM6 ,GPIO6 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 5. " GPRIM5 ,GPIO5 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GPRIM4 ,GPIO4 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 3. " GPRIM3 ,GPIO3 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " GPRIM2 ,GPIO2 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GPRIM1 ,GPIO1 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 0. " GPRIM0 ,GPIO0 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
line.long 0x04 "GPIO_FIMSC,GPIO 0 Falling Edge Interrupt Mask Set Clear Register"
|
|
bitfld.long 0x04 31. " GPFIM31 ,GPIO31 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 30. " GPFIM30 ,GPIO30 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 29. " GPFIM29 ,GPIO29 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 28. " GPFIM28 ,GPIO28 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 27. " GPFIM27 ,GPIO27 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 26. " GPFIM26 ,GPIO26 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 25. " GPFIM25 ,GPIO25 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 24. " GPFIM24 ,GPIO24 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 23. " GPFIM23 ,GPIO23 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 22. " GPFIM22 ,GPIO22 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 21. " GPFIM21 ,GPIO21 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 20. " GPFIM20 ,GPIO20 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 19. " GPFIM19 ,GPIO19 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 18. " GPFIM18 ,GPIO18 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 17. " GPFIM17 ,GPIO17 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 16. " GPFIM16 ,GPIO16 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 15. " GPFIM15 ,GPIO15 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 14. " GPFIM14 ,GPIO14 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 13. " GPFIM13 ,GPIO13 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 12. " GPFIM12 ,GPIO12 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 11. " GPFIM11 ,GPIO11 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 10. " GPFIM10 ,GPIO10 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 9. " GPFIM9 ,GPIO9 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 8. " GPFIM8 ,GPIO8 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 7. " GPFIM7 ,GPIO7 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 6. " GPFIM6 ,GPIO6 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 5. " GPFIM5 ,GPIO5 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 4. " GPFIM4 ,GPIO4 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 3. " GPFIM3 ,GPIO3 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 2. " GPFIM2 ,GPIO2 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 1. " GPFIM1 ,GPIO1 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 0. " GPFIM0 ,GPIO0 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
width 15.
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "GPIO_IS,GPIO 0 Interrupt Status Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x04 31. " GPIS31_set/clr ,GPIO31 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x04 30. " GPIS30_set/clr ,GPIO30 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x00 29. 0x04 29. " GPIS29_set/clr ,GPIO29 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x04 28. " GPIS28_set/clr ,GPIO28 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x00 27. 0x04 27. " GPIS27_set/clr ,GPIO27 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x04 26. " GPIS26_set/clr ,GPIO26 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x04 25. " GPIS25_set/clr ,GPIO25 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x04 24. " GPIS24_set/clr ,GPIO24 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x00 23. 0x04 23. " GPIS23_set/clr ,GPIO23 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x04 22. " GPIS22_set/clr ,GPIO22 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x00 21. 0x04 21. " GPIS21_set/clr ,GPIO21 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x04 20. " GPIS20_set/clr ,GPIO20 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x04 19. " GPIS19_set/clr ,GPIO19 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x04 18. " GPIS18_set/clr ,GPIO18 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x00 17. 0x04 17. " GPIS17_set/clr ,GPIO17 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x04 16. " GPIS16_set/clr ,GPIO16 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x00 15. 0x04 15. " GPIS15_set/clr ,GPIO15 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x04 14. " GPIS14_set/clr ,GPIO14 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x04 13. " GPIS13_set/clr ,GPIO13 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x04 12. " GPIS12_set/clr ,GPIO12 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x00 11. 0x04 11. " GPIS11_set/clr ,GPIO11 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x04 10. " GPIS10_set/clr ,GPIO10 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x00 9. 0x04 9. " GPIS9_set/clr ,GPIO9 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x04 8. " GPIS8_set/clr ,GPIO8 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x04 7. " GPIS7_set/clr ,GPIO7 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x04 6. " GPIS6_set/clr ,GPIO6 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x00 5. 0x04 5. " GPIS5_set/clr ,GPIO5 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x04 4. " GPIS4_set/clr ,GPIO4 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x00 3. 0x04 3. " GPIS3_set/clr ,GPIO3 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x04 2. " GPIS2_set/clr ,GPIO2 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " GPIS1_set/clr ,GPIO1 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " GPIS0_set/clr ,GPIO0 Interrupt Status" "No interrupt,Interrupt"
|
|
width 15.
|
|
rgroup.long 0xfe0++0x0f
|
|
line.long 0x00 "GPIOPeriphID0,GPIO 0 Peripheral Identification Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PARTNUMBER0 ,Part Number 0"
|
|
line.long 0x04 "GPIOPeriphID1,GPIO 0 Peripheral Identification Register 1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " DESIGNER0 ,Designer 0"
|
|
hexmask.long.byte 0x04 0.--3. 1. " PARTNUMBER1 ,Part Number 1"
|
|
line.long 0x08 "GPIOPeriphID2,GPIO 0 Peripheral Identification Register 2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " REVISION ,Revision"
|
|
hexmask.long.byte 0x08 0.--3. 1. " DESIGNER1 ,Designer 1"
|
|
line.long 0x0c "GPIOPeriphID3,GPIO 0 Peripheral Identification Register 3"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " CONFIGURATION ,Configuration"
|
|
rgroup.long 0xff0++0x0f
|
|
line.long 0x00 "GPIOPCellID0,GPIO 0 PCell Identification Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GPIOPCELLID0 ,GPIO PCell Identification 0"
|
|
line.long 0x04 "GPIOPCellID1,GPIO 0 PCell Identification Register 1"
|
|
hexmask.long.byte 0x04 0.--7. 1. " GPIOPCELLID1 ,GPIO PCell Identification 1"
|
|
line.long 0x08 "GPIOPCellID2,GPIO 0 PCell Identification Register 2"
|
|
hexmask.long.byte 0x08 0.--7. 1. " GPIOPCELLID2 ,GPIO PCell Identification 2"
|
|
line.long 0x0c "GPIOPCellID3,GPIO 0 PCell Identification Register 3"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " GPIOPCELLID3 ,GPIO PCell Identification 3"
|
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width 0xb
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tree.end
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tree "GPIO 1"
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base asd:0x101E5000
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width 15.
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group.long 0x00++0x03
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line.long 0x00 "GPIO_DAT,GPIO 1 Data Register"
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setclrfld.long 0x00 31. 0x04 31. 0x08 31. " GPDAT31_set/clr ,GPIO31 Data" "Low,High"
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setclrfld.long 0x00 30. 0x04 30. 0x08 30. " GPDAT30_set/clr ,GPIO30 Data" "Low,High"
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setclrfld.long 0x00 29. 0x04 29. 0x08 29. " GPDAT29_set/clr ,GPIO29 Data" "Low,High"
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textline " "
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setclrfld.long 0x00 28. 0x04 28. 0x08 28. " GPDAT28_set/clr ,GPIO28 Data" "Low,High"
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setclrfld.long 0x00 27. 0x04 27. 0x08 27. " GPDAT27_set/clr ,GPIO27 Data" "Low,High"
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setclrfld.long 0x00 26. 0x04 26. 0x08 26. " GPDAT26_set/clr ,GPIO26 Data" "Low,High"
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textline " "
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setclrfld.long 0x00 25. 0x04 25. 0x08 25. " GPDAT25_set/clr ,GPIO25 Data" "Low,High"
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setclrfld.long 0x00 24. 0x04 24. 0x08 24. " GPDAT24_set/clr ,GPIO24 Data" "Low,High"
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setclrfld.long 0x00 23. 0x04 23. 0x08 23. " GPDAT23_set/clr ,GPIO23 Data" "Low,High"
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textline " "
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setclrfld.long 0x00 22. 0x04 22. 0x08 22. " GPDAT22_set/clr ,GPIO22 Data" "Low,High"
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setclrfld.long 0x00 21. 0x04 21. 0x08 21. " GPDAT21_set/clr ,GPIO21 Data" "Low,High"
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setclrfld.long 0x00 20. 0x04 20. 0x08 20. " GPDAT20_set/clr ,GPIO20 Data" "Low,High"
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textline " "
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setclrfld.long 0x00 19. 0x04 19. 0x08 19. " GPDAT19_set/clr ,GPIO19 Data" "Low,High"
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setclrfld.long 0x00 18. 0x04 18. 0x08 18. " GPDAT18_set/clr ,GPIO18 Data" "Low,High"
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setclrfld.long 0x00 17. 0x04 17. 0x08 17. " GPDAT17_set/clr ,GPIO17 Data" "Low,High"
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textline " "
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setclrfld.long 0x00 16. 0x04 16. 0x08 16. " GPDAT16_set/clr ,GPIO16 Data" "Low,High"
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setclrfld.long 0x00 15. 0x04 15. 0x08 15. " GPDAT15_set/clr ,GPIO15 Data" "Low,High"
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setclrfld.long 0x00 14. 0x04 14. 0x08 14. " GPDAT14_set/clr ,GPIO14 Data" "Low,High"
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textline " "
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setclrfld.long 0x00 13. 0x04 13. 0x08 13. " GPDAT13_set/clr ,GPIO13 Data" "Low,High"
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setclrfld.long 0x00 12. 0x04 12. 0x08 12. " GPDAT12_set/clr ,GPIO12 Data" "Low,High"
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setclrfld.long 0x00 11. 0x04 11. 0x08 11. " GPDAT11_set/clr ,GPIO11 Data" "Low,High"
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textline " "
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setclrfld.long 0x00 10. 0x04 10. 0x08 10. " GPDAT10_set/clr ,GPIO10 Data" "Low,High"
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setclrfld.long 0x00 9. 0x04 9. 0x08 9. " GPDAT9_set/clr ,GPIO9 Data" "Low,High"
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setclrfld.long 0x00 8. 0x04 8. 0x08 8. " GPDAT8_set/clr ,GPIO8 Data" "Low,High"
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textline " "
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setclrfld.long 0x00 7. 0x04 7. 0x08 7. " GPDAT7_set/clr ,GPIO7 Data" "Low,High"
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setclrfld.long 0x00 6. 0x04 6. 0x08 6. " GPDAT6_set/clr ,GPIO6 Data" "Low,High"
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setclrfld.long 0x00 5. 0x04 5. 0x08 5. " GPDAT5_set/clr ,GPIO5 Data" "Low,High"
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textline " "
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setclrfld.long 0x00 4. 0x04 4. 0x08 4. " GPDAT4_set/clr ,GPIO4 Data" "Low,High"
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setclrfld.long 0x00 3. 0x04 3. 0x08 3. " GPDAT3_set/clr ,GPIO3 Data" "Low,High"
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setclrfld.long 0x00 2. 0x04 2. 0x08 2. " GPDAT2_set/clr ,GPIO2 Data" "Low,High"
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textline " "
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setclrfld.long 0x00 1. 0x04 1. 0x08 1. " GPDAT1_set/clr ,GPIO1 Data" "Low,High"
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setclrfld.long 0x00 0. 0x04 0. 0x08 0. " GPDAT0_set/clr ,GPIO0 Data" "Low,High"
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width 15.
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group.long 0x0c++0x03
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line.long 0x00 "GPIO_PDIS,GPIO 1 Pull Disable Register"
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bitfld.long 0x00 31. " PDIS31 ,GPIO31 Pull-up or Pull-down Disable" "No,Yes"
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bitfld.long 0x00 30. " PDIS30 ,GPIO30 Pull-up or Pull-down Disable" "No,Yes"
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bitfld.long 0x00 29. " PDIS29 ,GPIO29 Pull-up or Pull-down Disable" "No,Yes"
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bitfld.long 0x00 28. " PDIS28 ,GPIO28 Pull-up or Pull-down Disable" "No,Yes"
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textline " "
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bitfld.long 0x00 27. " PDIS27 ,GPIO27 Pull-up or Pull-down Disable" "No,Yes"
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bitfld.long 0x00 26. " PDIS26 ,GPIO26 Pull-up or Pull-down Disable" "No,Yes"
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bitfld.long 0x00 25. " PDIS25 ,GPIO25 Pull-up or Pull-down Disable" "No,Yes"
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bitfld.long 0x00 24. " PDIS24 ,GPIO24 Pull-up or Pull-down Disable" "No,Yes"
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textline " "
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bitfld.long 0x00 23. " PDIS23 ,GPIO23 Pull-up or Pull-down Disable" "No,Yes"
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bitfld.long 0x00 22. " PDIS22 ,GPIO22 Pull-up or Pull-down Disable" "No,Yes"
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bitfld.long 0x00 21. " PDIS21 ,GPIO21 Pull-up or Pull-down Disable" "No,Yes"
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bitfld.long 0x00 20. " PDIS20 ,GPIO20 Pull-up or Pull-down Disable" "No,Yes"
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textline " "
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bitfld.long 0x00 19. " PDIS19 ,GPIO19 Pull-up or Pull-down Disable" "No,Yes"
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bitfld.long 0x00 18. " PDIS18 ,GPIO18 Pull-up or Pull-down Disable" "No,Yes"
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bitfld.long 0x00 17. " PDIS17 ,GPIO17 Pull-up or Pull-down Disable" "No,Yes"
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bitfld.long 0x00 16. " PDIS16 ,GPIO16 Pull-up or Pull-down Disable" "No,Yes"
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textline " "
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bitfld.long 0x00 15. " PDIS15 ,GPIO15 Pull-up or Pull-down Disable" "No,Yes"
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bitfld.long 0x00 14. " PDIS14 ,GPIO14 Pull-up or Pull-down Disable" "No,Yes"
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bitfld.long 0x00 13. " PDIS13 ,GPIO13 Pull-up or Pull-down Disable" "No,Yes"
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bitfld.long 0x00 12. " PDIS12 ,GPIO12 Pull-up or Pull-down Disable" "No,Yes"
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textline " "
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bitfld.long 0x00 11. " PDIS11 ,GPIO11 Pull-up or Pull-down Disable" "No,Yes"
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bitfld.long 0x00 10. " PDIS10 ,GPIO10 Pull-up or Pull-down Disable" "No,Yes"
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bitfld.long 0x00 9. " PDIS9 ,GPIO9 Pull-up or Pull-down Disable" "No,Yes"
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bitfld.long 0x00 8. " PDIS8 ,GPIO8 Pull-up or Pull-down Disable" "No,Yes"
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textline " "
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bitfld.long 0x00 7. " PDIS7 ,GPIO7 Pull-up or Pull-down Disable" "No,Yes"
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bitfld.long 0x00 6. " PDIS6 ,GPIO6 Pull-up or Pull-down Disable" "No,Yes"
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bitfld.long 0x00 5. " PDIS5 ,GPIO5 Pull-up or Pull-down Disable" "No,Yes"
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bitfld.long 0x00 4. " PDIS4 ,GPIO4 Pull-up or Pull-down Disable" "No,Yes"
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textline " "
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bitfld.long 0x00 3. " PDIS3 ,GPIO3 Pull-up or Pull-down Disable" "No,Yes"
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bitfld.long 0x00 2. " PDIS2 ,GPIO2 Pull-up or Pull-down Disable" "No,Yes"
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bitfld.long 0x00 1. " PDIS1 ,GPIO1 Pull-up or Pull-down Disable" "No,Yes"
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bitfld.long 0x00 0. " PDIS0 ,GPIO0 Pull-up or Pull-down Disable" "No,Yes"
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width 15.
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group.long 0x10++0x03
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line.long 0x00 "GPIO_DIR,GPIO 1 Direction Register"
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setclrfld.long 0x00 31. 0x04 31. 0x08 31. " GPIO_DIR31_set/clr ,GPIO31 Direction" "Input,Output"
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setclrfld.long 0x00 30. 0x04 30. 0x08 30. " GPIO_DIR30_set/clr ,GPIO30 Direction" "Input,Output"
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textline " "
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setclrfld.long 0x00 29. 0x04 29. 0x08 29. " GPIO_DIR29_set/clr ,GPIO29 Direction" "Input,Output"
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setclrfld.long 0x00 28. 0x04 28. 0x08 28. " GPIO_DIR28_set/clr ,GPIO28 Direction" "Input,Output"
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textline " "
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setclrfld.long 0x00 27. 0x04 27. 0x08 27. " GPIO_DIR27_set/clr ,GPIO27 Direction" "Input,Output"
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setclrfld.long 0x00 26. 0x04 26. 0x08 26. " GPIO_DIR26_set/clr ,GPIO26 Direction" "Input,Output"
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textline " "
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setclrfld.long 0x00 25. 0x04 25. 0x08 25. " GPIO_DIR25_set/clr ,GPIO25 Direction" "Input,Output"
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setclrfld.long 0x00 24. 0x04 24. 0x08 24. " GPIO_DIR24_set/clr ,GPIO24 Direction" "Input,Output"
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textline " "
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setclrfld.long 0x00 23. 0x04 23. 0x08 23. " GPIO_DIR23_set/clr ,GPIO23 Direction" "Input,Output"
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setclrfld.long 0x00 22. 0x04 22. 0x08 22. " GPIO_DIR22_set/clr ,GPIO22 Direction" "Input,Output"
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textline " "
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setclrfld.long 0x00 21. 0x04 21. 0x08 21. " GPIO_DIR21_set/clr ,GPIO21 Direction" "Input,Output"
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setclrfld.long 0x00 20. 0x04 20. 0x08 20. " GPIO_DIR20_set/clr ,GPIO20 Direction" "Input,Output"
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textline " "
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setclrfld.long 0x00 19. 0x04 19. 0x08 19. " GPIO_DIR19_set/clr ,GPIO19 Direction" "Input,Output"
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setclrfld.long 0x00 18. 0x04 18. 0x08 18. " GPIO_DIR18_set/clr ,GPIO18 Direction" "Input,Output"
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textline " "
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setclrfld.long 0x00 17. 0x04 17. 0x08 17. " GPIO_DIR17_set/clr ,GPIO17 Direction" "Input,Output"
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setclrfld.long 0x00 16. 0x04 16. 0x08 16. " GPIO_DIR16_set/clr ,GPIO16 Direction" "Input,Output"
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textline " "
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setclrfld.long 0x00 15. 0x04 15. 0x08 15. " GPIO_DIR15_set/clr ,GPIO15 Direction" "Input,Output"
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setclrfld.long 0x00 14. 0x04 14. 0x08 14. " GPIO_DIR14_set/clr ,GPIO14 Direction" "Input,Output"
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textline " "
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setclrfld.long 0x00 13. 0x04 13. 0x08 13. " GPIO_DIR13_set/clr ,GPIO13 Direction" "Input,Output"
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setclrfld.long 0x00 12. 0x04 12. 0x08 12. " GPIO_DIR12_set/clr ,GPIO12 Direction" "Input,Output"
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textline " "
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setclrfld.long 0x00 11. 0x04 11. 0x08 11. " GPIO_DIR11_set/clr ,GPIO11 Direction" "Input,Output"
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setclrfld.long 0x00 10. 0x04 10. 0x08 10. " GPIO_DIR10_set/clr ,GPIO10 Direction" "Input,Output"
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textline " "
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setclrfld.long 0x00 9. 0x04 9. 0x08 9. " GPIO_DIR9_set/clr ,GPIO9 Direction" "Input,Output"
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setclrfld.long 0x00 8. 0x04 8. 0x08 8. " GPIO_DIR8_set/clr ,GPIO8 Direction" "Input,Output"
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textline " "
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setclrfld.long 0x00 7. 0x04 7. 0x08 7. " GPIO_DIR7_set/clr ,GPIO7 Direction" "Input,Output"
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setclrfld.long 0x00 6. 0x04 6. 0x08 6. " GPIO_DIR6_set/clr ,GPIO6 Direction" "Input,Output"
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textline " "
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setclrfld.long 0x00 5. 0x04 5. 0x08 5. " GPIO_DIR5_set/clr ,GPIO5 Direction" "Input,Output"
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setclrfld.long 0x00 4. 0x04 4. 0x08 4. " GPIO_DIR4_set/clr ,GPIO4 Direction" "Input,Output"
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textline " "
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setclrfld.long 0x00 3. 0x04 3. 0x08 3. " GPIO_DIR3_set/clr ,GPIO3 Direction" "Input,Output"
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setclrfld.long 0x00 2. 0x04 2. 0x08 2. " GPIO_DIR2_set/clr ,GPIO2 Direction" "Input,Output"
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textline " "
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setclrfld.long 0x00 1. 0x04 1. 0x08 1. " GPIO_DIR1_set/clr ,GPIO1 Direction" "Input,Output"
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setclrfld.long 0x00 0. 0x04 0. 0x08 0. " GPIO_DIR0_set/clr ,GPIO0 Direction" "Input,Output"
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width 15.
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group.long 0x1c++0x03
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line.long 0x00 "GPIO_SLPM,GPIO 1 Sleep Mode Register"
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bitfld.long 0x00 31. " SLPM31 ,GPIO31 Sleep Mode" "Disabled,Enabled"
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bitfld.long 0x00 30. " SLPM30 ,GPIO30 Sleep Mode" "Disabled,Enabled"
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bitfld.long 0x00 29. " SLPM29 ,GPIO29 Sleep Mode" "Disabled,Enabled"
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bitfld.long 0x00 28. " SLPM28 ,GPIO28 Sleep Mode" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 27. " SLPM27 ,GPIO27 Sleep Mode" "Disabled,Enabled"
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bitfld.long 0x00 26. " SLPM26 ,GPIO26 Sleep Mode" "Disabled,Enabled"
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bitfld.long 0x00 25. " SLPM25 ,GPIO25 Sleep Mode" "Disabled,Enabled"
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bitfld.long 0x00 24. " SLPM24 ,GPIO24 Sleep Mode" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SLPM23 ,GPIO23 Sleep Mode" "Disabled,Enabled"
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bitfld.long 0x00 22. " SLPM22 ,GPIO22 Sleep Mode" "Disabled,Enabled"
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bitfld.long 0x00 21. " SLPM21 ,GPIO21 Sleep Mode" "Disabled,Enabled"
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bitfld.long 0x00 20. " SLPM20 ,GPIO20 Sleep Mode" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 19. " SLPM19 ,GPIO19 Sleep Mode" "Disabled,Enabled"
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bitfld.long 0x00 18. " SLPM18 ,GPIO18 Sleep Mode" "Disabled,Enabled"
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bitfld.long 0x00 17. " SLPM17 ,GPIO17 Sleep Mode" "Disabled,Enabled"
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bitfld.long 0x00 16. " SLPM16 ,GPIO16 Sleep Mode" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 15. " SLPM15 ,GPIO15 Sleep Mode" "Disabled,Enabled"
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bitfld.long 0x00 14. " SLPM14 ,GPIO14 Sleep Mode" "Disabled,Enabled"
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bitfld.long 0x00 13. " SLPM13 ,GPIO13 Sleep Mode" "Disabled,Enabled"
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bitfld.long 0x00 12. " SLPM12 ,GPIO12 Sleep Mode" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 11. " SLPM11 ,GPIO11 Sleep Mode" "Disabled,Enabled"
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bitfld.long 0x00 10. " SLPM10 ,GPIO10 Sleep Mode" "Disabled,Enabled"
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bitfld.long 0x00 9. " SLPM9 ,GPIO9 Sleep Mode" "Disabled,Enabled"
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bitfld.long 0x00 8. " SLPM8 ,GPIO8 Sleep Mode" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 7. " SLPM7 ,GPIO7 Sleep Mode" "Disabled,Enabled"
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bitfld.long 0x00 6. " SLPM6 ,GPIO6 Sleep Mode" "Disabled,Enabled"
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bitfld.long 0x00 5. " SLPM5 ,GPIO5 Sleep Mode" "Disabled,Enabled"
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bitfld.long 0x00 4. " SLPM4 ,GPIO4 Sleep Mode" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SLPM3 ,GPIO3 Sleep Mode" "Disabled,Enabled"
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bitfld.long 0x00 2. " SLPM2 ,GPIO2 Sleep Mode" "Disabled,Enabled"
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bitfld.long 0x00 1. " SLPM1 ,GPIO1 Sleep Mode" "Disabled,Enabled"
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bitfld.long 0x00 0. " SLPM0 ,GPIO0 Sleep Mode" "Disabled,Enabled"
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width 15.
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|
group.long 0x20++0x07
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line.long 0x00 "GPIO_AFSLA,GPIO 1 Alternate Function Select A"
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bitfld.long 0x00 31. " GPAFSA31 ,GPIO31 Alternate Function Select A" "Low,High"
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bitfld.long 0x00 30. " GPAFSA30 ,GPIO30 Alternate Function Select A" "Low,High"
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bitfld.long 0x00 29. " GPAFSA29 ,GPIO29 Alternate Function Select A" "Low,High"
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bitfld.long 0x00 28. " GPAFSA28 ,GPIO28 Alternate Function Select A" "Low,High"
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textline " "
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bitfld.long 0x00 27. " GPAFSA27 ,GPIO27 Alternate Function Select A" "Low,High"
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bitfld.long 0x00 26. " GPAFSA26 ,GPIO26 Alternate Function Select A" "Low,High"
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bitfld.long 0x00 25. " GPAFSA25 ,GPIO25 Alternate Function Select A" "Low,High"
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|
bitfld.long 0x00 24. " GPAFSA24 ,GPIO24 Alternate Function Select A" "Low,High"
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|
textline " "
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bitfld.long 0x00 23. " GPAFSA23 ,GPIO23 Alternate Function Select A" "Low,High"
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|
bitfld.long 0x00 22. " GPAFSA22 ,GPIO22 Alternate Function Select A" "Low,High"
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|
bitfld.long 0x00 21. " GPAFSA21 ,GPIO21 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 20. " GPAFSA20 ,GPIO20 Alternate Function Select A" "Low,High"
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|
textline " "
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bitfld.long 0x00 19. " GPAFSA19 ,GPIO19 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 18. " GPAFSA18 ,GPIO18 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 17. " GPAFSA17 ,GPIO17 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 16. " GPAFSA16 ,GPIO16 Alternate Function Select A" "Low,High"
|
|
textline " "
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|
bitfld.long 0x00 15. " GPAFSA15 ,GPIO15 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 14. " GPAFSA14 ,GPIO14 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 13. " GPAFSA13 ,GPIO13 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 12. " GPAFSA12 ,GPIO12 Alternate Function Select A" "Low,High"
|
|
textline " "
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|
bitfld.long 0x00 11. " GPAFSA11 ,GPIO11 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 10. " GPAFSA10 ,GPIO10 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 9. " GPAFSA9 ,GPIO9 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 8. " GPAFSA8 ,GPIO8 Alternate Function Select A" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GPAFSA7 ,GPIO7 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 6. " GPAFSA6 ,GPIO6 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 5. " GPAFSA5 ,GPIO5 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 4. " GPAFSA4 ,GPIO4 Alternate Function Select A" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GPAFSA3 ,GPIO3 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 2. " GPAFSA2 ,GPIO2 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 1. " GPAFSA1 ,GPIO1 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 0. " GPAFSA0 ,GPIO0 Alternate Function Select A" "Low,High"
|
|
line.long 0x04 "GPIO_AFSLB,GPIO 1 Alternate Function Select B"
|
|
bitfld.long 0x04 31. " GPAFBA31 ,GPIO31 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 30. " GPAFBA30 ,GPIO30 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 29. " GPAFBA29 ,GPIO29 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 28. " GPAFBA28 ,GPIO28 Alternate Function Select B" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 27. " GPAFBA27 ,GPIO27 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 26. " GPAFBA26 ,GPIO26 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 25. " GPAFBA25 ,GPIO25 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 24. " GPAFBA24 ,GPIO24 Alternate Function Select B" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 23. " GPAFBA23 ,GPIO23 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 22. " GPAFBA22 ,GPIO22 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 21. " GPAFBA21 ,GPIO21 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 20. " GPAFBA20 ,GPIO20 Alternate Function Select B" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 19. " GPAFBA19 ,GPIO19 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 18. " GPAFBA18 ,GPIO18 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 17. " GPAFBA17 ,GPIO17 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 16. " GPAFBA16 ,GPIO16 Alternate Function Select B" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 15. " GPAFBA15 ,GPIO15 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 14. " GPAFBA14 ,GPIO14 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 13. " GPAFBA13 ,GPIO13 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 12. " GPAFBA12 ,GPIO12 Alternate Function Select B" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 11. " GPAFBA11 ,GPIO11 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 10. " GPAFBA10 ,GPIO10 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 9. " GPAFBA9 ,GPIO9 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 8. " GPAFBA8 ,GPIO8 Alternate Function Select B" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 7. " GPAFBA7 ,GPIO7 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 6. " GPAFBA6 ,GPIO6 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 5. " GPAFBA5 ,GPIO5 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 4. " GPAFBA4 ,GPIO4 Alternate Function Select B" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 3. " GPAFBA3 ,GPIO3 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 2. " GPAFBA2 ,GPIO2 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 1. " GPAFBA1 ,GPIO1 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 0. " GPAFBA0 ,GPIO0 Alternate Function Select B" "Low,High"
|
|
width 15.
|
|
group.long 0x40++0x07
|
|
line.long 0x00 "GPIO_RIMSC,GPIO 1 Rising Edge Interrupt Mask Set Clear Register"
|
|
bitfld.long 0x00 31. " GPRIM31 ,GPIO31 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 30. " GPRIM30 ,GPIO30 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 29. " GPRIM29 ,GPIO29 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GPRIM28 ,GPIO28 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 27. " GPRIM27 ,GPIO27 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 26. " GPRIM26 ,GPIO26 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GPRIM25 ,GPIO25 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 24. " GPRIM24 ,GPIO24 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 23. " GPRIM23 ,GPIO23 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GPRIM22 ,GPIO22 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 21. " GPRIM21 ,GPIO21 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 20. " GPRIM20 ,GPIO20 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GPRIM19 ,GPIO19 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 18. " GPRIM18 ,GPIO18 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 17. " GPRIM17 ,GPIO17 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GPRIM16 ,GPIO16 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 15. " GPRIM15 ,GPIO15 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 14. " GPRIM14 ,GPIO14 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GPRIM13 ,GPIO13 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 12. " GPRIM12 ,GPIO12 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 11. " GPRIM11 ,GPIO11 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GPRIM10 ,GPIO10 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 9. " GPRIM9 ,GPIO9 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 8. " GPRIM8 ,GPIO8 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GPRIM7 ,GPIO7 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 6. " GPRIM6 ,GPIO6 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 5. " GPRIM5 ,GPIO5 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GPRIM4 ,GPIO4 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 3. " GPRIM3 ,GPIO3 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " GPRIM2 ,GPIO2 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GPRIM1 ,GPIO1 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 0. " GPRIM0 ,GPIO0 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
line.long 0x04 "GPIO_FIMSC,GPIO 1 Falling Edge Interrupt Mask Set Clear Register"
|
|
bitfld.long 0x04 31. " GPFIM31 ,GPIO31 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 30. " GPFIM30 ,GPIO30 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 29. " GPFIM29 ,GPIO29 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 28. " GPFIM28 ,GPIO28 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 27. " GPFIM27 ,GPIO27 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 26. " GPFIM26 ,GPIO26 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 25. " GPFIM25 ,GPIO25 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 24. " GPFIM24 ,GPIO24 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 23. " GPFIM23 ,GPIO23 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 22. " GPFIM22 ,GPIO22 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 21. " GPFIM21 ,GPIO21 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 20. " GPFIM20 ,GPIO20 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 19. " GPFIM19 ,GPIO19 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 18. " GPFIM18 ,GPIO18 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 17. " GPFIM17 ,GPIO17 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 16. " GPFIM16 ,GPIO16 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 15. " GPFIM15 ,GPIO15 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 14. " GPFIM14 ,GPIO14 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 13. " GPFIM13 ,GPIO13 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 12. " GPFIM12 ,GPIO12 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 11. " GPFIM11 ,GPIO11 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 10. " GPFIM10 ,GPIO10 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 9. " GPFIM9 ,GPIO9 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 8. " GPFIM8 ,GPIO8 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 7. " GPFIM7 ,GPIO7 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 6. " GPFIM6 ,GPIO6 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 5. " GPFIM5 ,GPIO5 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 4. " GPFIM4 ,GPIO4 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 3. " GPFIM3 ,GPIO3 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 2. " GPFIM2 ,GPIO2 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 1. " GPFIM1 ,GPIO1 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 0. " GPFIM0 ,GPIO0 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
width 15.
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "GPIO_IS,GPIO 1 Interrupt Status Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x04 31. " GPIS31_set/clr ,GPIO31 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x04 30. " GPIS30_set/clr ,GPIO30 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x00 29. 0x04 29. " GPIS29_set/clr ,GPIO29 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x04 28. " GPIS28_set/clr ,GPIO28 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x00 27. 0x04 27. " GPIS27_set/clr ,GPIO27 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x04 26. " GPIS26_set/clr ,GPIO26 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x04 25. " GPIS25_set/clr ,GPIO25 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x04 24. " GPIS24_set/clr ,GPIO24 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x00 23. 0x04 23. " GPIS23_set/clr ,GPIO23 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x04 22. " GPIS22_set/clr ,GPIO22 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x00 21. 0x04 21. " GPIS21_set/clr ,GPIO21 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x04 20. " GPIS20_set/clr ,GPIO20 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x04 19. " GPIS19_set/clr ,GPIO19 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x04 18. " GPIS18_set/clr ,GPIO18 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x00 17. 0x04 17. " GPIS17_set/clr ,GPIO17 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x04 16. " GPIS16_set/clr ,GPIO16 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x00 15. 0x04 15. " GPIS15_set/clr ,GPIO15 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x04 14. " GPIS14_set/clr ,GPIO14 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x04 13. " GPIS13_set/clr ,GPIO13 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x04 12. " GPIS12_set/clr ,GPIO12 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x00 11. 0x04 11. " GPIS11_set/clr ,GPIO11 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x04 10. " GPIS10_set/clr ,GPIO10 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x00 9. 0x04 9. " GPIS9_set/clr ,GPIO9 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x04 8. " GPIS8_set/clr ,GPIO8 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x04 7. " GPIS7_set/clr ,GPIO7 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x04 6. " GPIS6_set/clr ,GPIO6 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x00 5. 0x04 5. " GPIS5_set/clr ,GPIO5 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x04 4. " GPIS4_set/clr ,GPIO4 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x00 3. 0x04 3. " GPIS3_set/clr ,GPIO3 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x04 2. " GPIS2_set/clr ,GPIO2 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " GPIS1_set/clr ,GPIO1 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " GPIS0_set/clr ,GPIO0 Interrupt Status" "No interrupt,Interrupt"
|
|
width 15.
|
|
rgroup.long 0xfe0++0x0f
|
|
line.long 0x00 "GPIOPeriphID0,GPIO 1 Peripheral Identification Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PARTNUMBER0 ,Part Number 0"
|
|
line.long 0x04 "GPIOPeriphID1,GPIO 1 Peripheral Identification Register 1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " DESIGNER0 ,Designer 0"
|
|
hexmask.long.byte 0x04 0.--3. 1. " PARTNUMBER1 ,Part Number 1"
|
|
line.long 0x08 "GPIOPeriphID2,GPIO 1 Peripheral Identification Register 2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " REVISION ,Revision"
|
|
hexmask.long.byte 0x08 0.--3. 1. " DESIGNER1 ,Designer 1"
|
|
line.long 0x0c "GPIOPeriphID3,GPIO 1 Peripheral Identification Register 3"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " CONFIGURATION ,Configuration"
|
|
rgroup.long 0xff0++0x0f
|
|
line.long 0x00 "GPIOPCellID0,GPIO 1 PCell Identification Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GPIOPCELLID0 ,GPIO PCell Identification 0"
|
|
line.long 0x04 "GPIOPCellID1,GPIO 1 PCell Identification Register 1"
|
|
hexmask.long.byte 0x04 0.--7. 1. " GPIOPCELLID1 ,GPIO PCell Identification 1"
|
|
line.long 0x08 "GPIOPCellID2,GPIO 1 PCell Identification Register 2"
|
|
hexmask.long.byte 0x08 0.--7. 1. " GPIOPCELLID2 ,GPIO PCell Identification 2"
|
|
line.long 0x0c "GPIOPCellID3,GPIO 1 PCell Identification Register 3"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " GPIOPCELLID3 ,GPIO PCell Identification 3"
|
|
width 0xb
|
|
tree.end
|
|
tree "GPIO 2"
|
|
base asd:0x101E6000
|
|
width 15.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "GPIO_DAT,GPIO 2 Data Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " GPDAT31_set/clr ,GPIO31 Data" "Low,High"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " GPDAT30_set/clr ,GPIO30 Data" "Low,High"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " GPDAT29_set/clr ,GPIO29 Data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " GPDAT28_set/clr ,GPIO28 Data" "Low,High"
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " GPDAT27_set/clr ,GPIO27 Data" "Low,High"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " GPDAT26_set/clr ,GPIO26 Data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " GPDAT25_set/clr ,GPIO25 Data" "Low,High"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " GPDAT24_set/clr ,GPIO24 Data" "Low,High"
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " GPDAT23_set/clr ,GPIO23 Data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " GPDAT22_set/clr ,GPIO22 Data" "Low,High"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " GPDAT21_set/clr ,GPIO21 Data" "Low,High"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " GPDAT20_set/clr ,GPIO20 Data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " GPDAT19_set/clr ,GPIO19 Data" "Low,High"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " GPDAT18_set/clr ,GPIO18 Data" "Low,High"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " GPDAT17_set/clr ,GPIO17 Data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " GPDAT16_set/clr ,GPIO16 Data" "Low,High"
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " GPDAT15_set/clr ,GPIO15 Data" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " GPDAT14_set/clr ,GPIO14 Data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " GPDAT13_set/clr ,GPIO13 Data" "Low,High"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " GPDAT12_set/clr ,GPIO12 Data" "Low,High"
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " GPDAT11_set/clr ,GPIO11 Data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " GPDAT10_set/clr ,GPIO10 Data" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " GPDAT9_set/clr ,GPIO9 Data" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " GPDAT8_set/clr ,GPIO8 Data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " GPDAT7_set/clr ,GPIO7 Data" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " GPDAT6_set/clr ,GPIO6 Data" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " GPDAT5_set/clr ,GPIO5 Data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " GPDAT4_set/clr ,GPIO4 Data" "Low,High"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " GPDAT3_set/clr ,GPIO3 Data" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " GPDAT2_set/clr ,GPIO2 Data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " GPDAT1_set/clr ,GPIO1 Data" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " GPDAT0_set/clr ,GPIO0 Data" "Low,High"
|
|
width 15.
|
|
group.long 0x0c++0x03
|
|
line.long 0x00 "GPIO_PDIS,GPIO 2 Pull Disable Register"
|
|
bitfld.long 0x00 31. " PDIS31 ,GPIO31 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 30. " PDIS30 ,GPIO30 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 29. " PDIS29 ,GPIO29 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 28. " PDIS28 ,GPIO28 Pull-up or Pull-down Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 27. " PDIS27 ,GPIO27 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 26. " PDIS26 ,GPIO26 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 25. " PDIS25 ,GPIO25 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 24. " PDIS24 ,GPIO24 Pull-up or Pull-down Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 23. " PDIS23 ,GPIO23 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 22. " PDIS22 ,GPIO22 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 21. " PDIS21 ,GPIO21 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 20. " PDIS20 ,GPIO20 Pull-up or Pull-down Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PDIS19 ,GPIO19 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 18. " PDIS18 ,GPIO18 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 17. " PDIS17 ,GPIO17 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 16. " PDIS16 ,GPIO16 Pull-up or Pull-down Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 15. " PDIS15 ,GPIO15 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 14. " PDIS14 ,GPIO14 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 13. " PDIS13 ,GPIO13 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 12. " PDIS12 ,GPIO12 Pull-up or Pull-down Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PDIS11 ,GPIO11 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 10. " PDIS10 ,GPIO10 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 9. " PDIS9 ,GPIO9 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 8. " PDIS8 ,GPIO8 Pull-up or Pull-down Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PDIS7 ,GPIO7 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 6. " PDIS6 ,GPIO6 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 5. " PDIS5 ,GPIO5 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 4. " PDIS4 ,GPIO4 Pull-up or Pull-down Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PDIS3 ,GPIO3 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 2. " PDIS2 ,GPIO2 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 1. " PDIS1 ,GPIO1 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 0. " PDIS0 ,GPIO0 Pull-up or Pull-down Disable" "No,Yes"
|
|
width 15.
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "GPIO_DIR,GPIO 2 Direction Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " GPIO_DIR31_set/clr ,GPIO31 Direction" "Input,Output"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " GPIO_DIR30_set/clr ,GPIO30 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " GPIO_DIR29_set/clr ,GPIO29 Direction" "Input,Output"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " GPIO_DIR28_set/clr ,GPIO28 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " GPIO_DIR27_set/clr ,GPIO27 Direction" "Input,Output"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " GPIO_DIR26_set/clr ,GPIO26 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " GPIO_DIR25_set/clr ,GPIO25 Direction" "Input,Output"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " GPIO_DIR24_set/clr ,GPIO24 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " GPIO_DIR23_set/clr ,GPIO23 Direction" "Input,Output"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " GPIO_DIR22_set/clr ,GPIO22 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " GPIO_DIR21_set/clr ,GPIO21 Direction" "Input,Output"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " GPIO_DIR20_set/clr ,GPIO20 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " GPIO_DIR19_set/clr ,GPIO19 Direction" "Input,Output"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " GPIO_DIR18_set/clr ,GPIO18 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " GPIO_DIR17_set/clr ,GPIO17 Direction" "Input,Output"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " GPIO_DIR16_set/clr ,GPIO16 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " GPIO_DIR15_set/clr ,GPIO15 Direction" "Input,Output"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " GPIO_DIR14_set/clr ,GPIO14 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " GPIO_DIR13_set/clr ,GPIO13 Direction" "Input,Output"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " GPIO_DIR12_set/clr ,GPIO12 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " GPIO_DIR11_set/clr ,GPIO11 Direction" "Input,Output"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " GPIO_DIR10_set/clr ,GPIO10 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " GPIO_DIR9_set/clr ,GPIO9 Direction" "Input,Output"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " GPIO_DIR8_set/clr ,GPIO8 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " GPIO_DIR7_set/clr ,GPIO7 Direction" "Input,Output"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " GPIO_DIR6_set/clr ,GPIO6 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " GPIO_DIR5_set/clr ,GPIO5 Direction" "Input,Output"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " GPIO_DIR4_set/clr ,GPIO4 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " GPIO_DIR3_set/clr ,GPIO3 Direction" "Input,Output"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " GPIO_DIR2_set/clr ,GPIO2 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " GPIO_DIR1_set/clr ,GPIO1 Direction" "Input,Output"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " GPIO_DIR0_set/clr ,GPIO0 Direction" "Input,Output"
|
|
width 15.
|
|
group.long 0x1c++0x03
|
|
line.long 0x00 "GPIO_SLPM,GPIO 2 Sleep Mode Register"
|
|
bitfld.long 0x00 31. " SLPM31 ,GPIO31 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " SLPM30 ,GPIO30 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " SLPM29 ,GPIO29 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " SLPM28 ,GPIO28 Sleep Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " SLPM27 ,GPIO27 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " SLPM26 ,GPIO26 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " SLPM25 ,GPIO25 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " SLPM24 ,GPIO24 Sleep Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " SLPM23 ,GPIO23 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " SLPM22 ,GPIO22 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " SLPM21 ,GPIO21 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " SLPM20 ,GPIO20 Sleep Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SLPM19 ,GPIO19 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " SLPM18 ,GPIO18 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " SLPM17 ,GPIO17 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " SLPM16 ,GPIO16 Sleep Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SLPM15 ,GPIO15 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " SLPM14 ,GPIO14 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " SLPM13 ,GPIO13 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " SLPM12 ,GPIO12 Sleep Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SLPM11 ,GPIO11 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " SLPM10 ,GPIO10 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " SLPM9 ,GPIO9 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " SLPM8 ,GPIO8 Sleep Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SLPM7 ,GPIO7 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " SLPM6 ,GPIO6 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SLPM5 ,GPIO5 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " SLPM4 ,GPIO4 Sleep Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SLPM3 ,GPIO3 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " SLPM2 ,GPIO2 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " SLPM1 ,GPIO1 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " SLPM0 ,GPIO0 Sleep Mode" "Disabled,Enabled"
|
|
width 15.
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "GPIO_AFSLA,GPIO 2 Alternate Function Select A"
|
|
bitfld.long 0x00 31. " GPAFSA31 ,GPIO31 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 30. " GPAFSA30 ,GPIO30 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 29. " GPAFSA29 ,GPIO29 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 28. " GPAFSA28 ,GPIO28 Alternate Function Select A" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 27. " GPAFSA27 ,GPIO27 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 26. " GPAFSA26 ,GPIO26 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 25. " GPAFSA25 ,GPIO25 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 24. " GPAFSA24 ,GPIO24 Alternate Function Select A" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 23. " GPAFSA23 ,GPIO23 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 22. " GPAFSA22 ,GPIO22 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 21. " GPAFSA21 ,GPIO21 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 20. " GPAFSA20 ,GPIO20 Alternate Function Select A" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GPAFSA19 ,GPIO19 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 18. " GPAFSA18 ,GPIO18 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 17. " GPAFSA17 ,GPIO17 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 16. " GPAFSA16 ,GPIO16 Alternate Function Select A" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " GPAFSA15 ,GPIO15 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 14. " GPAFSA14 ,GPIO14 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 13. " GPAFSA13 ,GPIO13 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 12. " GPAFSA12 ,GPIO12 Alternate Function Select A" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " GPAFSA11 ,GPIO11 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 10. " GPAFSA10 ,GPIO10 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 9. " GPAFSA9 ,GPIO9 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 8. " GPAFSA8 ,GPIO8 Alternate Function Select A" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GPAFSA7 ,GPIO7 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 6. " GPAFSA6 ,GPIO6 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 5. " GPAFSA5 ,GPIO5 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 4. " GPAFSA4 ,GPIO4 Alternate Function Select A" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GPAFSA3 ,GPIO3 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 2. " GPAFSA2 ,GPIO2 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 1. " GPAFSA1 ,GPIO1 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 0. " GPAFSA0 ,GPIO0 Alternate Function Select A" "Low,High"
|
|
line.long 0x04 "GPIO_AFSLB,GPIO 2 Alternate Function Select B"
|
|
bitfld.long 0x04 31. " GPAFBA31 ,GPIO31 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 30. " GPAFBA30 ,GPIO30 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 29. " GPAFBA29 ,GPIO29 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 28. " GPAFBA28 ,GPIO28 Alternate Function Select B" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 27. " GPAFBA27 ,GPIO27 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 26. " GPAFBA26 ,GPIO26 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 25. " GPAFBA25 ,GPIO25 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 24. " GPAFBA24 ,GPIO24 Alternate Function Select B" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 23. " GPAFBA23 ,GPIO23 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 22. " GPAFBA22 ,GPIO22 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 21. " GPAFBA21 ,GPIO21 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 20. " GPAFBA20 ,GPIO20 Alternate Function Select B" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 19. " GPAFBA19 ,GPIO19 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 18. " GPAFBA18 ,GPIO18 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 17. " GPAFBA17 ,GPIO17 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 16. " GPAFBA16 ,GPIO16 Alternate Function Select B" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 15. " GPAFBA15 ,GPIO15 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 14. " GPAFBA14 ,GPIO14 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 13. " GPAFBA13 ,GPIO13 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 12. " GPAFBA12 ,GPIO12 Alternate Function Select B" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 11. " GPAFBA11 ,GPIO11 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 10. " GPAFBA10 ,GPIO10 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 9. " GPAFBA9 ,GPIO9 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 8. " GPAFBA8 ,GPIO8 Alternate Function Select B" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 7. " GPAFBA7 ,GPIO7 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 6. " GPAFBA6 ,GPIO6 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 5. " GPAFBA5 ,GPIO5 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 4. " GPAFBA4 ,GPIO4 Alternate Function Select B" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 3. " GPAFBA3 ,GPIO3 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 2. " GPAFBA2 ,GPIO2 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 1. " GPAFBA1 ,GPIO1 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 0. " GPAFBA0 ,GPIO0 Alternate Function Select B" "Low,High"
|
|
width 15.
|
|
group.long 0x40++0x07
|
|
line.long 0x00 "GPIO_RIMSC,GPIO 2 Rising Edge Interrupt Mask Set Clear Register"
|
|
bitfld.long 0x00 31. " GPRIM31 ,GPIO31 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 30. " GPRIM30 ,GPIO30 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 29. " GPRIM29 ,GPIO29 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GPRIM28 ,GPIO28 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 27. " GPRIM27 ,GPIO27 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 26. " GPRIM26 ,GPIO26 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GPRIM25 ,GPIO25 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 24. " GPRIM24 ,GPIO24 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 23. " GPRIM23 ,GPIO23 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GPRIM22 ,GPIO22 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 21. " GPRIM21 ,GPIO21 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 20. " GPRIM20 ,GPIO20 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GPRIM19 ,GPIO19 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 18. " GPRIM18 ,GPIO18 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 17. " GPRIM17 ,GPIO17 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GPRIM16 ,GPIO16 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 15. " GPRIM15 ,GPIO15 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 14. " GPRIM14 ,GPIO14 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GPRIM13 ,GPIO13 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 12. " GPRIM12 ,GPIO12 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 11. " GPRIM11 ,GPIO11 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GPRIM10 ,GPIO10 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 9. " GPRIM9 ,GPIO9 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 8. " GPRIM8 ,GPIO8 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GPRIM7 ,GPIO7 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 6. " GPRIM6 ,GPIO6 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 5. " GPRIM5 ,GPIO5 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GPRIM4 ,GPIO4 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 3. " GPRIM3 ,GPIO3 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " GPRIM2 ,GPIO2 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GPRIM1 ,GPIO1 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 0. " GPRIM0 ,GPIO0 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
line.long 0x04 "GPIO_FIMSC,GPIO 2 Falling Edge Interrupt Mask Set Clear Register"
|
|
bitfld.long 0x04 31. " GPFIM31 ,GPIO31 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 30. " GPFIM30 ,GPIO30 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 29. " GPFIM29 ,GPIO29 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 28. " GPFIM28 ,GPIO28 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 27. " GPFIM27 ,GPIO27 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 26. " GPFIM26 ,GPIO26 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 25. " GPFIM25 ,GPIO25 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 24. " GPFIM24 ,GPIO24 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 23. " GPFIM23 ,GPIO23 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 22. " GPFIM22 ,GPIO22 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 21. " GPFIM21 ,GPIO21 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 20. " GPFIM20 ,GPIO20 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 19. " GPFIM19 ,GPIO19 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 18. " GPFIM18 ,GPIO18 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 17. " GPFIM17 ,GPIO17 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 16. " GPFIM16 ,GPIO16 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 15. " GPFIM15 ,GPIO15 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 14. " GPFIM14 ,GPIO14 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 13. " GPFIM13 ,GPIO13 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 12. " GPFIM12 ,GPIO12 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 11. " GPFIM11 ,GPIO11 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 10. " GPFIM10 ,GPIO10 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 9. " GPFIM9 ,GPIO9 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 8. " GPFIM8 ,GPIO8 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 7. " GPFIM7 ,GPIO7 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 6. " GPFIM6 ,GPIO6 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 5. " GPFIM5 ,GPIO5 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 4. " GPFIM4 ,GPIO4 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 3. " GPFIM3 ,GPIO3 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 2. " GPFIM2 ,GPIO2 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 1. " GPFIM1 ,GPIO1 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 0. " GPFIM0 ,GPIO0 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
width 15.
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "GPIO_IS,GPIO 2 Interrupt Status Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x04 31. " GPIS31_set/clr ,GPIO31 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x04 30. " GPIS30_set/clr ,GPIO30 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x00 29. 0x04 29. " GPIS29_set/clr ,GPIO29 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x04 28. " GPIS28_set/clr ,GPIO28 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x00 27. 0x04 27. " GPIS27_set/clr ,GPIO27 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x04 26. " GPIS26_set/clr ,GPIO26 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x04 25. " GPIS25_set/clr ,GPIO25 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x04 24. " GPIS24_set/clr ,GPIO24 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x00 23. 0x04 23. " GPIS23_set/clr ,GPIO23 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x04 22. " GPIS22_set/clr ,GPIO22 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x00 21. 0x04 21. " GPIS21_set/clr ,GPIO21 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x04 20. " GPIS20_set/clr ,GPIO20 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x04 19. " GPIS19_set/clr ,GPIO19 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x04 18. " GPIS18_set/clr ,GPIO18 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x00 17. 0x04 17. " GPIS17_set/clr ,GPIO17 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x04 16. " GPIS16_set/clr ,GPIO16 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x00 15. 0x04 15. " GPIS15_set/clr ,GPIO15 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x04 14. " GPIS14_set/clr ,GPIO14 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x04 13. " GPIS13_set/clr ,GPIO13 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x04 12. " GPIS12_set/clr ,GPIO12 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x00 11. 0x04 11. " GPIS11_set/clr ,GPIO11 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x04 10. " GPIS10_set/clr ,GPIO10 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x00 9. 0x04 9. " GPIS9_set/clr ,GPIO9 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x04 8. " GPIS8_set/clr ,GPIO8 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x04 7. " GPIS7_set/clr ,GPIO7 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x04 6. " GPIS6_set/clr ,GPIO6 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x00 5. 0x04 5. " GPIS5_set/clr ,GPIO5 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x04 4. " GPIS4_set/clr ,GPIO4 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x00 3. 0x04 3. " GPIS3_set/clr ,GPIO3 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x04 2. " GPIS2_set/clr ,GPIO2 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " GPIS1_set/clr ,GPIO1 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " GPIS0_set/clr ,GPIO0 Interrupt Status" "No interrupt,Interrupt"
|
|
width 15.
|
|
rgroup.long 0xfe0++0x0f
|
|
line.long 0x00 "GPIOPeriphID0,GPIO 2 Peripheral Identification Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PARTNUMBER0 ,Part Number 0"
|
|
line.long 0x04 "GPIOPeriphID1,GPIO 2 Peripheral Identification Register 1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " DESIGNER0 ,Designer 0"
|
|
hexmask.long.byte 0x04 0.--3. 1. " PARTNUMBER1 ,Part Number 1"
|
|
line.long 0x08 "GPIOPeriphID2,GPIO 2 Peripheral Identification Register 2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " REVISION ,Revision"
|
|
hexmask.long.byte 0x08 0.--3. 1. " DESIGNER1 ,Designer 1"
|
|
line.long 0x0c "GPIOPeriphID3,GPIO 2 Peripheral Identification Register 3"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " CONFIGURATION ,Configuration"
|
|
rgroup.long 0xff0++0x0f
|
|
line.long 0x00 "GPIOPCellID0,GPIO 2 PCell Identification Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GPIOPCELLID0 ,GPIO PCell Identification 0"
|
|
line.long 0x04 "GPIOPCellID1,GPIO 2 PCell Identification Register 1"
|
|
hexmask.long.byte 0x04 0.--7. 1. " GPIOPCELLID1 ,GPIO PCell Identification 1"
|
|
line.long 0x08 "GPIOPCellID2,GPIO 2 PCell Identification Register 2"
|
|
hexmask.long.byte 0x08 0.--7. 1. " GPIOPCELLID2 ,GPIO PCell Identification 2"
|
|
line.long 0x0c "GPIOPCellID3,GPIO 2 PCell Identification Register 3"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " GPIOPCELLID3 ,GPIO PCell Identification 3"
|
|
width 0xb
|
|
tree.end
|
|
tree "GPIO 3"
|
|
base asd:0x101E7000
|
|
width 15.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "GPIO_DAT,GPIO 3 Data Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " GPDAT31_set/clr ,GPIO31 Data" "Low,High"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " GPDAT30_set/clr ,GPIO30 Data" "Low,High"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " GPDAT29_set/clr ,GPIO29 Data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " GPDAT28_set/clr ,GPIO28 Data" "Low,High"
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " GPDAT27_set/clr ,GPIO27 Data" "Low,High"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " GPDAT26_set/clr ,GPIO26 Data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " GPDAT25_set/clr ,GPIO25 Data" "Low,High"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " GPDAT24_set/clr ,GPIO24 Data" "Low,High"
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " GPDAT23_set/clr ,GPIO23 Data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " GPDAT22_set/clr ,GPIO22 Data" "Low,High"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " GPDAT21_set/clr ,GPIO21 Data" "Low,High"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " GPDAT20_set/clr ,GPIO20 Data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " GPDAT19_set/clr ,GPIO19 Data" "Low,High"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " GPDAT18_set/clr ,GPIO18 Data" "Low,High"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " GPDAT17_set/clr ,GPIO17 Data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " GPDAT16_set/clr ,GPIO16 Data" "Low,High"
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " GPDAT15_set/clr ,GPIO15 Data" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " GPDAT14_set/clr ,GPIO14 Data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " GPDAT13_set/clr ,GPIO13 Data" "Low,High"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " GPDAT12_set/clr ,GPIO12 Data" "Low,High"
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " GPDAT11_set/clr ,GPIO11 Data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " GPDAT10_set/clr ,GPIO10 Data" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " GPDAT9_set/clr ,GPIO9 Data" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " GPDAT8_set/clr ,GPIO8 Data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " GPDAT7_set/clr ,GPIO7 Data" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " GPDAT6_set/clr ,GPIO6 Data" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " GPDAT5_set/clr ,GPIO5 Data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " GPDAT4_set/clr ,GPIO4 Data" "Low,High"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " GPDAT3_set/clr ,GPIO3 Data" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " GPDAT2_set/clr ,GPIO2 Data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " GPDAT1_set/clr ,GPIO1 Data" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " GPDAT0_set/clr ,GPIO0 Data" "Low,High"
|
|
width 15.
|
|
group.long 0x0c++0x03
|
|
line.long 0x00 "GPIO_PDIS,GPIO 3 Pull Disable Register"
|
|
bitfld.long 0x00 31. " PDIS31 ,GPIO31 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 30. " PDIS30 ,GPIO30 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 29. " PDIS29 ,GPIO29 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 28. " PDIS28 ,GPIO28 Pull-up or Pull-down Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 27. " PDIS27 ,GPIO27 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 26. " PDIS26 ,GPIO26 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 25. " PDIS25 ,GPIO25 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 24. " PDIS24 ,GPIO24 Pull-up or Pull-down Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 23. " PDIS23 ,GPIO23 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 22. " PDIS22 ,GPIO22 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 21. " PDIS21 ,GPIO21 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 20. " PDIS20 ,GPIO20 Pull-up or Pull-down Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PDIS19 ,GPIO19 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 18. " PDIS18 ,GPIO18 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 17. " PDIS17 ,GPIO17 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 16. " PDIS16 ,GPIO16 Pull-up or Pull-down Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 15. " PDIS15 ,GPIO15 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 14. " PDIS14 ,GPIO14 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 13. " PDIS13 ,GPIO13 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 12. " PDIS12 ,GPIO12 Pull-up or Pull-down Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PDIS11 ,GPIO11 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 10. " PDIS10 ,GPIO10 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 9. " PDIS9 ,GPIO9 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 8. " PDIS8 ,GPIO8 Pull-up or Pull-down Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PDIS7 ,GPIO7 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 6. " PDIS6 ,GPIO6 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 5. " PDIS5 ,GPIO5 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 4. " PDIS4 ,GPIO4 Pull-up or Pull-down Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PDIS3 ,GPIO3 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 2. " PDIS2 ,GPIO2 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 1. " PDIS1 ,GPIO1 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 0. " PDIS0 ,GPIO0 Pull-up or Pull-down Disable" "No,Yes"
|
|
width 15.
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "GPIO_DIR,GPIO 3 Direction Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " GPIO_DIR31_set/clr ,GPIO31 Direction" "Input,Output"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " GPIO_DIR30_set/clr ,GPIO30 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " GPIO_DIR29_set/clr ,GPIO29 Direction" "Input,Output"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " GPIO_DIR28_set/clr ,GPIO28 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " GPIO_DIR27_set/clr ,GPIO27 Direction" "Input,Output"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " GPIO_DIR26_set/clr ,GPIO26 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " GPIO_DIR25_set/clr ,GPIO25 Direction" "Input,Output"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " GPIO_DIR24_set/clr ,GPIO24 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " GPIO_DIR23_set/clr ,GPIO23 Direction" "Input,Output"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " GPIO_DIR22_set/clr ,GPIO22 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " GPIO_DIR21_set/clr ,GPIO21 Direction" "Input,Output"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " GPIO_DIR20_set/clr ,GPIO20 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " GPIO_DIR19_set/clr ,GPIO19 Direction" "Input,Output"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " GPIO_DIR18_set/clr ,GPIO18 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " GPIO_DIR17_set/clr ,GPIO17 Direction" "Input,Output"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " GPIO_DIR16_set/clr ,GPIO16 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " GPIO_DIR15_set/clr ,GPIO15 Direction" "Input,Output"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " GPIO_DIR14_set/clr ,GPIO14 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " GPIO_DIR13_set/clr ,GPIO13 Direction" "Input,Output"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " GPIO_DIR12_set/clr ,GPIO12 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " GPIO_DIR11_set/clr ,GPIO11 Direction" "Input,Output"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " GPIO_DIR10_set/clr ,GPIO10 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " GPIO_DIR9_set/clr ,GPIO9 Direction" "Input,Output"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " GPIO_DIR8_set/clr ,GPIO8 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " GPIO_DIR7_set/clr ,GPIO7 Direction" "Input,Output"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " GPIO_DIR6_set/clr ,GPIO6 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " GPIO_DIR5_set/clr ,GPIO5 Direction" "Input,Output"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " GPIO_DIR4_set/clr ,GPIO4 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " GPIO_DIR3_set/clr ,GPIO3 Direction" "Input,Output"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " GPIO_DIR2_set/clr ,GPIO2 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " GPIO_DIR1_set/clr ,GPIO1 Direction" "Input,Output"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " GPIO_DIR0_set/clr ,GPIO0 Direction" "Input,Output"
|
|
width 15.
|
|
group.long 0x1c++0x03
|
|
line.long 0x00 "GPIO_SLPM,GPIO 3 Sleep Mode Register"
|
|
bitfld.long 0x00 31. " SLPM31 ,GPIO31 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " SLPM30 ,GPIO30 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " SLPM29 ,GPIO29 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " SLPM28 ,GPIO28 Sleep Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " SLPM27 ,GPIO27 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " SLPM26 ,GPIO26 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " SLPM25 ,GPIO25 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " SLPM24 ,GPIO24 Sleep Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " SLPM23 ,GPIO23 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " SLPM22 ,GPIO22 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " SLPM21 ,GPIO21 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " SLPM20 ,GPIO20 Sleep Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SLPM19 ,GPIO19 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " SLPM18 ,GPIO18 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " SLPM17 ,GPIO17 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " SLPM16 ,GPIO16 Sleep Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SLPM15 ,GPIO15 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " SLPM14 ,GPIO14 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " SLPM13 ,GPIO13 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " SLPM12 ,GPIO12 Sleep Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SLPM11 ,GPIO11 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " SLPM10 ,GPIO10 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " SLPM9 ,GPIO9 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " SLPM8 ,GPIO8 Sleep Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SLPM7 ,GPIO7 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " SLPM6 ,GPIO6 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SLPM5 ,GPIO5 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " SLPM4 ,GPIO4 Sleep Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SLPM3 ,GPIO3 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " SLPM2 ,GPIO2 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " SLPM1 ,GPIO1 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " SLPM0 ,GPIO0 Sleep Mode" "Disabled,Enabled"
|
|
width 15.
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "GPIO_AFSLA,GPIO 3 Alternate Function Select A"
|
|
bitfld.long 0x00 31. " GPAFSA31 ,GPIO31 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 30. " GPAFSA30 ,GPIO30 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 29. " GPAFSA29 ,GPIO29 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 28. " GPAFSA28 ,GPIO28 Alternate Function Select A" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 27. " GPAFSA27 ,GPIO27 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 26. " GPAFSA26 ,GPIO26 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 25. " GPAFSA25 ,GPIO25 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 24. " GPAFSA24 ,GPIO24 Alternate Function Select A" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 23. " GPAFSA23 ,GPIO23 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 22. " GPAFSA22 ,GPIO22 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 21. " GPAFSA21 ,GPIO21 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 20. " GPAFSA20 ,GPIO20 Alternate Function Select A" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GPAFSA19 ,GPIO19 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 18. " GPAFSA18 ,GPIO18 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 17. " GPAFSA17 ,GPIO17 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 16. " GPAFSA16 ,GPIO16 Alternate Function Select A" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " GPAFSA15 ,GPIO15 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 14. " GPAFSA14 ,GPIO14 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 13. " GPAFSA13 ,GPIO13 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 12. " GPAFSA12 ,GPIO12 Alternate Function Select A" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " GPAFSA11 ,GPIO11 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 10. " GPAFSA10 ,GPIO10 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 9. " GPAFSA9 ,GPIO9 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 8. " GPAFSA8 ,GPIO8 Alternate Function Select A" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GPAFSA7 ,GPIO7 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 6. " GPAFSA6 ,GPIO6 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 5. " GPAFSA5 ,GPIO5 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 4. " GPAFSA4 ,GPIO4 Alternate Function Select A" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GPAFSA3 ,GPIO3 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 2. " GPAFSA2 ,GPIO2 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 1. " GPAFSA1 ,GPIO1 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 0. " GPAFSA0 ,GPIO0 Alternate Function Select A" "Low,High"
|
|
line.long 0x04 "GPIO_AFSLB,GPIO 3 Alternate Function Select B"
|
|
bitfld.long 0x04 31. " GPAFBA31 ,GPIO31 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 30. " GPAFBA30 ,GPIO30 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 29. " GPAFBA29 ,GPIO29 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 28. " GPAFBA28 ,GPIO28 Alternate Function Select B" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 27. " GPAFBA27 ,GPIO27 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 26. " GPAFBA26 ,GPIO26 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 25. " GPAFBA25 ,GPIO25 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 24. " GPAFBA24 ,GPIO24 Alternate Function Select B" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 23. " GPAFBA23 ,GPIO23 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 22. " GPAFBA22 ,GPIO22 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 21. " GPAFBA21 ,GPIO21 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 20. " GPAFBA20 ,GPIO20 Alternate Function Select B" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 19. " GPAFBA19 ,GPIO19 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 18. " GPAFBA18 ,GPIO18 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 17. " GPAFBA17 ,GPIO17 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 16. " GPAFBA16 ,GPIO16 Alternate Function Select B" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 15. " GPAFBA15 ,GPIO15 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 14. " GPAFBA14 ,GPIO14 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 13. " GPAFBA13 ,GPIO13 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 12. " GPAFBA12 ,GPIO12 Alternate Function Select B" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 11. " GPAFBA11 ,GPIO11 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 10. " GPAFBA10 ,GPIO10 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 9. " GPAFBA9 ,GPIO9 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 8. " GPAFBA8 ,GPIO8 Alternate Function Select B" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 7. " GPAFBA7 ,GPIO7 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 6. " GPAFBA6 ,GPIO6 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 5. " GPAFBA5 ,GPIO5 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 4. " GPAFBA4 ,GPIO4 Alternate Function Select B" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 3. " GPAFBA3 ,GPIO3 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 2. " GPAFBA2 ,GPIO2 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 1. " GPAFBA1 ,GPIO1 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 0. " GPAFBA0 ,GPIO0 Alternate Function Select B" "Low,High"
|
|
width 15.
|
|
group.long 0x40++0x07
|
|
line.long 0x00 "GPIO_RIMSC,GPIO 3 Rising Edge Interrupt Mask Set Clear Register"
|
|
bitfld.long 0x00 31. " GPRIM31 ,GPIO31 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 30. " GPRIM30 ,GPIO30 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 29. " GPRIM29 ,GPIO29 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GPRIM28 ,GPIO28 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 27. " GPRIM27 ,GPIO27 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 26. " GPRIM26 ,GPIO26 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GPRIM25 ,GPIO25 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 24. " GPRIM24 ,GPIO24 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 23. " GPRIM23 ,GPIO23 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GPRIM22 ,GPIO22 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 21. " GPRIM21 ,GPIO21 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 20. " GPRIM20 ,GPIO20 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GPRIM19 ,GPIO19 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 18. " GPRIM18 ,GPIO18 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 17. " GPRIM17 ,GPIO17 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GPRIM16 ,GPIO16 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 15. " GPRIM15 ,GPIO15 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 14. " GPRIM14 ,GPIO14 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GPRIM13 ,GPIO13 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 12. " GPRIM12 ,GPIO12 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 11. " GPRIM11 ,GPIO11 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GPRIM10 ,GPIO10 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 9. " GPRIM9 ,GPIO9 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 8. " GPRIM8 ,GPIO8 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GPRIM7 ,GPIO7 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 6. " GPRIM6 ,GPIO6 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 5. " GPRIM5 ,GPIO5 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GPRIM4 ,GPIO4 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 3. " GPRIM3 ,GPIO3 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " GPRIM2 ,GPIO2 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GPRIM1 ,GPIO1 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 0. " GPRIM0 ,GPIO0 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
line.long 0x04 "GPIO_FIMSC,GPIO 3 Falling Edge Interrupt Mask Set Clear Register"
|
|
bitfld.long 0x04 31. " GPFIM31 ,GPIO31 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 30. " GPFIM30 ,GPIO30 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 29. " GPFIM29 ,GPIO29 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 28. " GPFIM28 ,GPIO28 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 27. " GPFIM27 ,GPIO27 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 26. " GPFIM26 ,GPIO26 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 25. " GPFIM25 ,GPIO25 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 24. " GPFIM24 ,GPIO24 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 23. " GPFIM23 ,GPIO23 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 22. " GPFIM22 ,GPIO22 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 21. " GPFIM21 ,GPIO21 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 20. " GPFIM20 ,GPIO20 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 19. " GPFIM19 ,GPIO19 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 18. " GPFIM18 ,GPIO18 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 17. " GPFIM17 ,GPIO17 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 16. " GPFIM16 ,GPIO16 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 15. " GPFIM15 ,GPIO15 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 14. " GPFIM14 ,GPIO14 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 13. " GPFIM13 ,GPIO13 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 12. " GPFIM12 ,GPIO12 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 11. " GPFIM11 ,GPIO11 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 10. " GPFIM10 ,GPIO10 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 9. " GPFIM9 ,GPIO9 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 8. " GPFIM8 ,GPIO8 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 7. " GPFIM7 ,GPIO7 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 6. " GPFIM6 ,GPIO6 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 5. " GPFIM5 ,GPIO5 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 4. " GPFIM4 ,GPIO4 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 3. " GPFIM3 ,GPIO3 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 2. " GPFIM2 ,GPIO2 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 1. " GPFIM1 ,GPIO1 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 0. " GPFIM0 ,GPIO0 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
width 15.
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "GPIO_IS,GPIO 3 Interrupt Status Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x04 31. " GPIS31_set/clr ,GPIO31 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x04 30. " GPIS30_set/clr ,GPIO30 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x00 29. 0x04 29. " GPIS29_set/clr ,GPIO29 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x04 28. " GPIS28_set/clr ,GPIO28 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x00 27. 0x04 27. " GPIS27_set/clr ,GPIO27 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x04 26. " GPIS26_set/clr ,GPIO26 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x04 25. " GPIS25_set/clr ,GPIO25 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x04 24. " GPIS24_set/clr ,GPIO24 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x00 23. 0x04 23. " GPIS23_set/clr ,GPIO23 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x04 22. " GPIS22_set/clr ,GPIO22 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x00 21. 0x04 21. " GPIS21_set/clr ,GPIO21 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x04 20. " GPIS20_set/clr ,GPIO20 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x04 19. " GPIS19_set/clr ,GPIO19 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x04 18. " GPIS18_set/clr ,GPIO18 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x00 17. 0x04 17. " GPIS17_set/clr ,GPIO17 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x04 16. " GPIS16_set/clr ,GPIO16 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x00 15. 0x04 15. " GPIS15_set/clr ,GPIO15 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x04 14. " GPIS14_set/clr ,GPIO14 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x04 13. " GPIS13_set/clr ,GPIO13 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x04 12. " GPIS12_set/clr ,GPIO12 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x00 11. 0x04 11. " GPIS11_set/clr ,GPIO11 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x04 10. " GPIS10_set/clr ,GPIO10 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x00 9. 0x04 9. " GPIS9_set/clr ,GPIO9 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x04 8. " GPIS8_set/clr ,GPIO8 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x04 7. " GPIS7_set/clr ,GPIO7 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x04 6. " GPIS6_set/clr ,GPIO6 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x00 5. 0x04 5. " GPIS5_set/clr ,GPIO5 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x04 4. " GPIS4_set/clr ,GPIO4 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x00 3. 0x04 3. " GPIS3_set/clr ,GPIO3 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x04 2. " GPIS2_set/clr ,GPIO2 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " GPIS1_set/clr ,GPIO1 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " GPIS0_set/clr ,GPIO0 Interrupt Status" "No interrupt,Interrupt"
|
|
width 15.
|
|
rgroup.long 0xfe0++0x0f
|
|
line.long 0x00 "GPIOPeriphID0,GPIO 3 Peripheral Identification Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PARTNUMBER0 ,Part Number 0"
|
|
line.long 0x04 "GPIOPeriphID1,GPIO 3 Peripheral Identification Register 1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " DESIGNER0 ,Designer 0"
|
|
hexmask.long.byte 0x04 0.--3. 1. " PARTNUMBER1 ,Part Number 1"
|
|
line.long 0x08 "GPIOPeriphID2,GPIO 3 Peripheral Identification Register 2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " REVISION ,Revision"
|
|
hexmask.long.byte 0x08 0.--3. 1. " DESIGNER1 ,Designer 1"
|
|
line.long 0x0c "GPIOPeriphID3,GPIO 3 Peripheral Identification Register 3"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " CONFIGURATION ,Configuration"
|
|
rgroup.long 0xff0++0x0f
|
|
line.long 0x00 "GPIOPCellID0,GPIO 3 PCell Identification Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GPIOPCELLID0 ,GPIO PCell Identification 0"
|
|
line.long 0x04 "GPIOPCellID1,GPIO 3 PCell Identification Register 1"
|
|
hexmask.long.byte 0x04 0.--7. 1. " GPIOPCELLID1 ,GPIO PCell Identification 1"
|
|
line.long 0x08 "GPIOPCellID2,GPIO 3 PCell Identification Register 2"
|
|
hexmask.long.byte 0x08 0.--7. 1. " GPIOPCELLID2 ,GPIO PCell Identification 2"
|
|
line.long 0x0c "GPIOPCellID3,GPIO 3 PCell Identification Register 3"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " GPIOPCELLID3 ,GPIO PCell Identification 3"
|
|
width 0xb
|
|
tree.end
|
|
tree "GPIO 4"
|
|
base asd:0x101EA000
|
|
width 15.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "GPIO_DAT,GPIO 4 Data Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " GPDAT31_set/clr ,GPIO31 Data" "Low,High"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " GPDAT30_set/clr ,GPIO30 Data" "Low,High"
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " GPDAT29_set/clr ,GPIO29 Data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " GPDAT28_set/clr ,GPIO28 Data" "Low,High"
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " GPDAT27_set/clr ,GPIO27 Data" "Low,High"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " GPDAT26_set/clr ,GPIO26 Data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " GPDAT25_set/clr ,GPIO25 Data" "Low,High"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " GPDAT24_set/clr ,GPIO24 Data" "Low,High"
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " GPDAT23_set/clr ,GPIO23 Data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " GPDAT22_set/clr ,GPIO22 Data" "Low,High"
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " GPDAT21_set/clr ,GPIO21 Data" "Low,High"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " GPDAT20_set/clr ,GPIO20 Data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " GPDAT19_set/clr ,GPIO19 Data" "Low,High"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " GPDAT18_set/clr ,GPIO18 Data" "Low,High"
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " GPDAT17_set/clr ,GPIO17 Data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " GPDAT16_set/clr ,GPIO16 Data" "Low,High"
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " GPDAT15_set/clr ,GPIO15 Data" "Low,High"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " GPDAT14_set/clr ,GPIO14 Data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " GPDAT13_set/clr ,GPIO13 Data" "Low,High"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " GPDAT12_set/clr ,GPIO12 Data" "Low,High"
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " GPDAT11_set/clr ,GPIO11 Data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " GPDAT10_set/clr ,GPIO10 Data" "Low,High"
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " GPDAT9_set/clr ,GPIO9 Data" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " GPDAT8_set/clr ,GPIO8 Data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " GPDAT7_set/clr ,GPIO7 Data" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " GPDAT6_set/clr ,GPIO6 Data" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " GPDAT5_set/clr ,GPIO5 Data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " GPDAT4_set/clr ,GPIO4 Data" "Low,High"
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " GPDAT3_set/clr ,GPIO3 Data" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " GPDAT2_set/clr ,GPIO2 Data" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " GPDAT1_set/clr ,GPIO1 Data" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " GPDAT0_set/clr ,GPIO0 Data" "Low,High"
|
|
width 15.
|
|
group.long 0x0c++0x03
|
|
line.long 0x00 "GPIO_PDIS,GPIO 4 Pull Disable Register"
|
|
bitfld.long 0x00 31. " PDIS31 ,GPIO31 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 30. " PDIS30 ,GPIO30 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 29. " PDIS29 ,GPIO29 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 28. " PDIS28 ,GPIO28 Pull-up or Pull-down Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 27. " PDIS27 ,GPIO27 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 26. " PDIS26 ,GPIO26 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 25. " PDIS25 ,GPIO25 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 24. " PDIS24 ,GPIO24 Pull-up or Pull-down Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 23. " PDIS23 ,GPIO23 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 22. " PDIS22 ,GPIO22 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 21. " PDIS21 ,GPIO21 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 20. " PDIS20 ,GPIO20 Pull-up or Pull-down Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PDIS19 ,GPIO19 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 18. " PDIS18 ,GPIO18 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 17. " PDIS17 ,GPIO17 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 16. " PDIS16 ,GPIO16 Pull-up or Pull-down Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 15. " PDIS15 ,GPIO15 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 14. " PDIS14 ,GPIO14 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 13. " PDIS13 ,GPIO13 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 12. " PDIS12 ,GPIO12 Pull-up or Pull-down Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PDIS11 ,GPIO11 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 10. " PDIS10 ,GPIO10 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 9. " PDIS9 ,GPIO9 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 8. " PDIS8 ,GPIO8 Pull-up or Pull-down Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PDIS7 ,GPIO7 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 6. " PDIS6 ,GPIO6 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 5. " PDIS5 ,GPIO5 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 4. " PDIS4 ,GPIO4 Pull-up or Pull-down Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PDIS3 ,GPIO3 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 2. " PDIS2 ,GPIO2 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 1. " PDIS1 ,GPIO1 Pull-up or Pull-down Disable" "No,Yes"
|
|
bitfld.long 0x00 0. " PDIS0 ,GPIO0 Pull-up or Pull-down Disable" "No,Yes"
|
|
width 15.
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "GPIO_DIR,GPIO 4 Direction Register"
|
|
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " GPIO_DIR31_set/clr ,GPIO31 Direction" "Input,Output"
|
|
setclrfld.long 0x00 30. 0x04 30. 0x08 30. " GPIO_DIR30_set/clr ,GPIO30 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " GPIO_DIR29_set/clr ,GPIO29 Direction" "Input,Output"
|
|
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " GPIO_DIR28_set/clr ,GPIO28 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x04 27. 0x08 27. " GPIO_DIR27_set/clr ,GPIO27 Direction" "Input,Output"
|
|
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " GPIO_DIR26_set/clr ,GPIO26 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " GPIO_DIR25_set/clr ,GPIO25 Direction" "Input,Output"
|
|
setclrfld.long 0x00 24. 0x04 24. 0x08 24. " GPIO_DIR24_set/clr ,GPIO24 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " GPIO_DIR23_set/clr ,GPIO23 Direction" "Input,Output"
|
|
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " GPIO_DIR22_set/clr ,GPIO22 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " GPIO_DIR21_set/clr ,GPIO21 Direction" "Input,Output"
|
|
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " GPIO_DIR20_set/clr ,GPIO20 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " GPIO_DIR19_set/clr ,GPIO19 Direction" "Input,Output"
|
|
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " GPIO_DIR18_set/clr ,GPIO18 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " GPIO_DIR17_set/clr ,GPIO17 Direction" "Input,Output"
|
|
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " GPIO_DIR16_set/clr ,GPIO16 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " GPIO_DIR15_set/clr ,GPIO15 Direction" "Input,Output"
|
|
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " GPIO_DIR14_set/clr ,GPIO14 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " GPIO_DIR13_set/clr ,GPIO13 Direction" "Input,Output"
|
|
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " GPIO_DIR12_set/clr ,GPIO12 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " GPIO_DIR11_set/clr ,GPIO11 Direction" "Input,Output"
|
|
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " GPIO_DIR10_set/clr ,GPIO10 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " GPIO_DIR9_set/clr ,GPIO9 Direction" "Input,Output"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " GPIO_DIR8_set/clr ,GPIO8 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " GPIO_DIR7_set/clr ,GPIO7 Direction" "Input,Output"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " GPIO_DIR6_set/clr ,GPIO6 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " GPIO_DIR5_set/clr ,GPIO5 Direction" "Input,Output"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " GPIO_DIR4_set/clr ,GPIO4 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " GPIO_DIR3_set/clr ,GPIO3 Direction" "Input,Output"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " GPIO_DIR2_set/clr ,GPIO2 Direction" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " GPIO_DIR1_set/clr ,GPIO1 Direction" "Input,Output"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " GPIO_DIR0_set/clr ,GPIO0 Direction" "Input,Output"
|
|
width 15.
|
|
group.long 0x1c++0x03
|
|
line.long 0x00 "GPIO_SLPM,GPIO 4 Sleep Mode Register"
|
|
bitfld.long 0x00 31. " SLPM31 ,GPIO31 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " SLPM30 ,GPIO30 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " SLPM29 ,GPIO29 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " SLPM28 ,GPIO28 Sleep Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " SLPM27 ,GPIO27 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " SLPM26 ,GPIO26 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " SLPM25 ,GPIO25 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " SLPM24 ,GPIO24 Sleep Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " SLPM23 ,GPIO23 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " SLPM22 ,GPIO22 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " SLPM21 ,GPIO21 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " SLPM20 ,GPIO20 Sleep Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SLPM19 ,GPIO19 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " SLPM18 ,GPIO18 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " SLPM17 ,GPIO17 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " SLPM16 ,GPIO16 Sleep Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SLPM15 ,GPIO15 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " SLPM14 ,GPIO14 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " SLPM13 ,GPIO13 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " SLPM12 ,GPIO12 Sleep Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SLPM11 ,GPIO11 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " SLPM10 ,GPIO10 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " SLPM9 ,GPIO9 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " SLPM8 ,GPIO8 Sleep Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SLPM7 ,GPIO7 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " SLPM6 ,GPIO6 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SLPM5 ,GPIO5 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " SLPM4 ,GPIO4 Sleep Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SLPM3 ,GPIO3 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " SLPM2 ,GPIO2 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " SLPM1 ,GPIO1 Sleep Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " SLPM0 ,GPIO0 Sleep Mode" "Disabled,Enabled"
|
|
width 15.
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "GPIO_AFSLA,GPIO 4 Alternate Function Select A"
|
|
bitfld.long 0x00 31. " GPAFSA31 ,GPIO31 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 30. " GPAFSA30 ,GPIO30 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 29. " GPAFSA29 ,GPIO29 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 28. " GPAFSA28 ,GPIO28 Alternate Function Select A" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 27. " GPAFSA27 ,GPIO27 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 26. " GPAFSA26 ,GPIO26 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 25. " GPAFSA25 ,GPIO25 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 24. " GPAFSA24 ,GPIO24 Alternate Function Select A" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 23. " GPAFSA23 ,GPIO23 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 22. " GPAFSA22 ,GPIO22 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 21. " GPAFSA21 ,GPIO21 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 20. " GPAFSA20 ,GPIO20 Alternate Function Select A" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GPAFSA19 ,GPIO19 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 18. " GPAFSA18 ,GPIO18 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 17. " GPAFSA17 ,GPIO17 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 16. " GPAFSA16 ,GPIO16 Alternate Function Select A" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " GPAFSA15 ,GPIO15 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 14. " GPAFSA14 ,GPIO14 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 13. " GPAFSA13 ,GPIO13 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 12. " GPAFSA12 ,GPIO12 Alternate Function Select A" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " GPAFSA11 ,GPIO11 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 10. " GPAFSA10 ,GPIO10 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 9. " GPAFSA9 ,GPIO9 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 8. " GPAFSA8 ,GPIO8 Alternate Function Select A" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GPAFSA7 ,GPIO7 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 6. " GPAFSA6 ,GPIO6 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 5. " GPAFSA5 ,GPIO5 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 4. " GPAFSA4 ,GPIO4 Alternate Function Select A" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GPAFSA3 ,GPIO3 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 2. " GPAFSA2 ,GPIO2 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 1. " GPAFSA1 ,GPIO1 Alternate Function Select A" "Low,High"
|
|
bitfld.long 0x00 0. " GPAFSA0 ,GPIO0 Alternate Function Select A" "Low,High"
|
|
line.long 0x04 "GPIO_AFSLB,GPIO 4 Alternate Function Select B"
|
|
bitfld.long 0x04 31. " GPAFBA31 ,GPIO31 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 30. " GPAFBA30 ,GPIO30 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 29. " GPAFBA29 ,GPIO29 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 28. " GPAFBA28 ,GPIO28 Alternate Function Select B" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 27. " GPAFBA27 ,GPIO27 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 26. " GPAFBA26 ,GPIO26 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 25. " GPAFBA25 ,GPIO25 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 24. " GPAFBA24 ,GPIO24 Alternate Function Select B" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 23. " GPAFBA23 ,GPIO23 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 22. " GPAFBA22 ,GPIO22 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 21. " GPAFBA21 ,GPIO21 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 20. " GPAFBA20 ,GPIO20 Alternate Function Select B" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 19. " GPAFBA19 ,GPIO19 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 18. " GPAFBA18 ,GPIO18 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 17. " GPAFBA17 ,GPIO17 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 16. " GPAFBA16 ,GPIO16 Alternate Function Select B" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 15. " GPAFBA15 ,GPIO15 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 14. " GPAFBA14 ,GPIO14 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 13. " GPAFBA13 ,GPIO13 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 12. " GPAFBA12 ,GPIO12 Alternate Function Select B" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 11. " GPAFBA11 ,GPIO11 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 10. " GPAFBA10 ,GPIO10 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 9. " GPAFBA9 ,GPIO9 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 8. " GPAFBA8 ,GPIO8 Alternate Function Select B" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 7. " GPAFBA7 ,GPIO7 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 6. " GPAFBA6 ,GPIO6 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 5. " GPAFBA5 ,GPIO5 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 4. " GPAFBA4 ,GPIO4 Alternate Function Select B" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 3. " GPAFBA3 ,GPIO3 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 2. " GPAFBA2 ,GPIO2 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 1. " GPAFBA1 ,GPIO1 Alternate Function Select B" "Low,High"
|
|
bitfld.long 0x04 0. " GPAFBA0 ,GPIO0 Alternate Function Select B" "Low,High"
|
|
width 15.
|
|
group.long 0x40++0x07
|
|
line.long 0x00 "GPIO_RIMSC,GPIO 4 Rising Edge Interrupt Mask Set Clear Register"
|
|
bitfld.long 0x00 31. " GPRIM31 ,GPIO31 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 30. " GPRIM30 ,GPIO30 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 29. " GPRIM29 ,GPIO29 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GPRIM28 ,GPIO28 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 27. " GPRIM27 ,GPIO27 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 26. " GPRIM26 ,GPIO26 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GPRIM25 ,GPIO25 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 24. " GPRIM24 ,GPIO24 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 23. " GPRIM23 ,GPIO23 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GPRIM22 ,GPIO22 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 21. " GPRIM21 ,GPIO21 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 20. " GPRIM20 ,GPIO20 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GPRIM19 ,GPIO19 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 18. " GPRIM18 ,GPIO18 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 17. " GPRIM17 ,GPIO17 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GPRIM16 ,GPIO16 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 15. " GPRIM15 ,GPIO15 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 14. " GPRIM14 ,GPIO14 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GPRIM13 ,GPIO13 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 12. " GPRIM12 ,GPIO12 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 11. " GPRIM11 ,GPIO11 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GPRIM10 ,GPIO10 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 9. " GPRIM9 ,GPIO9 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 8. " GPRIM8 ,GPIO8 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GPRIM7 ,GPIO7 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 6. " GPRIM6 ,GPIO6 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 5. " GPRIM5 ,GPIO5 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GPRIM4 ,GPIO4 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 3. " GPRIM3 ,GPIO3 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " GPRIM2 ,GPIO2 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GPRIM1 ,GPIO1 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 0. " GPRIM0 ,GPIO0 Rising-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
line.long 0x04 "GPIO_FIMSC,GPIO 4 Falling Edge Interrupt Mask Set Clear Register"
|
|
bitfld.long 0x04 31. " GPFIM31 ,GPIO31 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 30. " GPFIM30 ,GPIO30 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 29. " GPFIM29 ,GPIO29 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 28. " GPFIM28 ,GPIO28 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 27. " GPFIM27 ,GPIO27 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 26. " GPFIM26 ,GPIO26 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 25. " GPFIM25 ,GPIO25 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 24. " GPFIM24 ,GPIO24 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 23. " GPFIM23 ,GPIO23 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 22. " GPFIM22 ,GPIO22 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 21. " GPFIM21 ,GPIO21 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 20. " GPFIM20 ,GPIO20 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 19. " GPFIM19 ,GPIO19 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 18. " GPFIM18 ,GPIO18 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 17. " GPFIM17 ,GPIO17 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 16. " GPFIM16 ,GPIO16 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 15. " GPFIM15 ,GPIO15 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 14. " GPFIM14 ,GPIO14 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 13. " GPFIM13 ,GPIO13 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 12. " GPFIM12 ,GPIO12 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 11. " GPFIM11 ,GPIO11 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 10. " GPFIM10 ,GPIO10 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 9. " GPFIM9 ,GPIO9 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 8. " GPFIM8 ,GPIO8 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 7. " GPFIM7 ,GPIO7 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 6. " GPFIM6 ,GPIO6 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 5. " GPFIM5 ,GPIO5 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 4. " GPFIM4 ,GPIO4 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 3. " GPFIM3 ,GPIO3 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 2. " GPFIM2 ,GPIO2 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 1. " GPFIM1 ,GPIO1 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x04 0. " GPFIM0 ,GPIO0 Falling-Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
width 15.
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "GPIO_IS,GPIO 4 Interrupt Status Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x04 31. " GPIS31_set/clr ,GPIO31 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x04 30. " GPIS30_set/clr ,GPIO30 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x00 29. 0x04 29. " GPIS29_set/clr ,GPIO29 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x04 28. " GPIS28_set/clr ,GPIO28 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x00 27. 0x04 27. " GPIS27_set/clr ,GPIO27 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x04 26. " GPIS26_set/clr ,GPIO26 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x04 25. " GPIS25_set/clr ,GPIO25 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x04 24. " GPIS24_set/clr ,GPIO24 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x00 23. 0x04 23. " GPIS23_set/clr ,GPIO23 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x04 22. " GPIS22_set/clr ,GPIO22 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x00 21. 0x04 21. " GPIS21_set/clr ,GPIO21 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x04 20. " GPIS20_set/clr ,GPIO20 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x04 19. " GPIS19_set/clr ,GPIO19 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x04 18. " GPIS18_set/clr ,GPIO18 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x00 17. 0x04 17. " GPIS17_set/clr ,GPIO17 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x04 16. " GPIS16_set/clr ,GPIO16 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x00 15. 0x04 15. " GPIS15_set/clr ,GPIO15 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x04 14. " GPIS14_set/clr ,GPIO14 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x04 13. " GPIS13_set/clr ,GPIO13 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x04 12. " GPIS12_set/clr ,GPIO12 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x00 11. 0x04 11. " GPIS11_set/clr ,GPIO11 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x04 10. " GPIS10_set/clr ,GPIO10 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x00 9. 0x04 9. " GPIS9_set/clr ,GPIO9 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x04 8. " GPIS8_set/clr ,GPIO8 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x04 7. " GPIS7_set/clr ,GPIO7 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x04 6. " GPIS6_set/clr ,GPIO6 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x00 5. 0x04 5. " GPIS5_set/clr ,GPIO5 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x04 4. " GPIS4_set/clr ,GPIO4 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x00 3. 0x04 3. " GPIS3_set/clr ,GPIO3 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x04 2. " GPIS2_set/clr ,GPIO2 Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " GPIS1_set/clr ,GPIO1 Interrupt Status" "No interrupt,Interrupt"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " GPIS0_set/clr ,GPIO0 Interrupt Status" "No interrupt,Interrupt"
|
|
width 15.
|
|
rgroup.long 0xfe0++0x0f
|
|
line.long 0x00 "GPIOPeriphID0,GPIO 4 Peripheral Identification Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PARTNUMBER0 ,Part Number 0"
|
|
line.long 0x04 "GPIOPeriphID1,GPIO 4 Peripheral Identification Register 1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " DESIGNER0 ,Designer 0"
|
|
hexmask.long.byte 0x04 0.--3. 1. " PARTNUMBER1 ,Part Number 1"
|
|
line.long 0x08 "GPIOPeriphID2,GPIO 4 Peripheral Identification Register 2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " REVISION ,Revision"
|
|
hexmask.long.byte 0x08 0.--3. 1. " DESIGNER1 ,Designer 1"
|
|
line.long 0x0c "GPIOPeriphID3,GPIO 4 Peripheral Identification Register 3"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " CONFIGURATION ,Configuration"
|
|
rgroup.long 0xff0++0x0f
|
|
line.long 0x00 "GPIOPCellID0,GPIO 4 PCell Identification Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " GPIOPCELLID0 ,GPIO PCell Identification 0"
|
|
line.long 0x04 "GPIOPCellID1,GPIO 4 PCell Identification Register 1"
|
|
hexmask.long.byte 0x04 0.--7. 1. " GPIOPCELLID1 ,GPIO PCell Identification 1"
|
|
line.long 0x08 "GPIOPCellID2,GPIO 4 PCell Identification Register 2"
|
|
hexmask.long.byte 0x08 0.--7. 1. " GPIOPCELLID2 ,GPIO PCell Identification 2"
|
|
line.long 0x0c "GPIOPCellID3,GPIO 4 PCell Identification Register 3"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " GPIOPCELLID3 ,GPIO PCell Identification 3"
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree "RTC/RTT/PWL registers"
|
|
base asd:0x101E8000
|
|
width 0x10
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "RTC_MR,RTC Match Register"
|
|
group.long 0x0C++0x07
|
|
line.long 0x00 "RTC_TCR,RTC Trim and Control Register"
|
|
bitfld.long 0x00 26. " RTCEN ,Counter enable" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 16.--25. 1. " CKDEL ,Trim delete count"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " CKDIV ,Clock divider factor"
|
|
line.long 0x04 "RTC_IMSC,RTC Interrupt Mask Register"
|
|
sif (!cpuis("STA1385-CA7")&&!cpuis("STA1385-CM3")&&!cpuis("STA1295-CA7")&&!cpuis("STA1295-CM3"))
|
|
bitfld.long 0x04 1. " RTTIMSC ,RTT interrupt enable" "Not masked,Masked"
|
|
endif
|
|
bitfld.long 0x04 0. " RTCIMSC ,RTC interrupt enable" "Not masked,Masked"
|
|
rgroup.long 0x14++0x07
|
|
line.long 0x00 "RTC_RIS,RTC Raw Interrupt Status Register"
|
|
sif (!cpuis("STA1385-CA7")&&!cpuis("STA1385-CM3")&&!cpuis("STA1295-CA7")&&!cpuis("STA1295-CM3"))
|
|
bitfld.long 0x00 1. " RTTRIS ,RTT raw interrupt status" "No interrupt,Interrupt"
|
|
endif
|
|
bitfld.long 0x00 0. " RTCRIS ,RTC raw interrupt status" "No interrupt,Interrupt"
|
|
line.long 0x04 "RTC_MIS,RTC Masked Interrupt Status Register"
|
|
sif (!cpuis("STA1385-CA7")&&!cpuis("STA1385-CM3")&&!cpuis("STA1295-CA7")&&!cpuis("STA1295-CM3"))
|
|
bitfld.long 0x04 1. " RTTMIS ,RTT masked interrupt status" "No interrupt,Interrupt"
|
|
endif
|
|
bitfld.long 0x04 0. " RTCMIS ,RTC masked interrupt status" "No interrupt,Interrupt"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "RTC_ICR,RTC Interrupt Clear Register"
|
|
sif (!cpuis("STA1385-CA7")&&!cpuis("STA1385-CM3")&&!cpuis("STA1295-CA7")&&!cpuis("STA1295-CM3"))
|
|
bitfld.long 0x00 1. " RTTIC ,RTT interrupt clear register" "No effect,Cleared"
|
|
endif
|
|
bitfld.long 0x00 0. " RTCIC ,RTC interrupt clear register" "No effect,Cleared"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "RTC_CCR,RTC Counter Control Register"
|
|
bitfld.long 0x00 4. " LOAD_COUNTER ,Counters load" "No effect,Loaded"
|
|
bitfld.long 0x00 3. " COUNT_DIS ,Counter stop" "Running,Stopped"
|
|
group.long 0x90++0x07
|
|
line.long 0x00 "RTC_DRI,RTC Data Register"
|
|
line.long 0x04 "RTC_DRF,RTC Data Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " RTC_CFV ,RTC current fractional value"
|
|
newline
|
|
width 14.
|
|
rgroup.long 0xFE0++0x01F
|
|
line.long 0x00 "RTCPERIPHID0,RTC Peripheral Identification Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PARTNUMBER0 ,Part number 0 (0x31)"
|
|
line.long 0x04 "RTCPERIPHID1,RTC Peripheral Identification Register 1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " DESIGNER0 ,Designer 0 (0x00)"
|
|
hexmask.long.byte 0x04 0.--3. 1. " PARTNUMBER1 ,Part number 1 (0x00)"
|
|
line.long 0x08 "RTCPERIPHID2,RTC Peripheral Identification Register 2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " REVISION ,Revision (0x01)"
|
|
hexmask.long.byte 0x08 0.--3. 1. " DESIGNER1 ,Designer 1 (0x08)"
|
|
line.long 0x0C "RTCPERIPHID3,RTC Peripheral Identification Register 3"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " CONFIGURATION ,Configuration (0x00)"
|
|
line.long 0x10 "RTCPCELLID0,RTC PCell Identification Register 0"
|
|
hexmask.long.byte 0x10 0.--7. 1. " RTCPCELLID0 ,RTC PCell ID0 (0x0D)"
|
|
line.long 0x14 "RTCPCELLID1,RTC PCell Identification Register 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " RTCPCELLID1 ,RTC PCell ID1 (0xF0)"
|
|
line.long 0x18 "RTCPCELLID2,RTC PCell Identification Register 2"
|
|
hexmask.long.byte 0x18 0.--7. 1. " RTCPCELLID2 ,RTC PCell ID2 (0x05)"
|
|
line.long 0x1C "RTCPCELLID3,RTC PCell Identification Register 3"
|
|
hexmask.long.byte 0x1c 0.--7. 1. " RTCPCELLID3 ,RTC PCell ID3 (0xB1)"
|
|
width 0xb
|
|
tree "RTT (Real Time Timer)"
|
|
width 11.
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "RTT_DR,RTT Data Register"
|
|
group.long 0x24++0x07
|
|
line.long 0x00 "RTT_LR,RTT Load Register"
|
|
line.long 0x04 "RTT_CR,RTT Control Register"
|
|
bitfld.long 0x04 1. " RTTEN ,RTT Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " RTTOS ,Timer x One Shot Count" "Periodic,One-shot"
|
|
width 0xb
|
|
tree.end
|
|
tree "PWL (Pulse Width Light Modulator)"
|
|
width 11.
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "PWL_CR,PWL Control Register"
|
|
bitfld.long 0x00 8. " PWLVL ,PWL Enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PWLVL ,PWL Level"
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree "SECR (Secure Control Registers)"
|
|
base asd:0x101ef0000
|
|
width 0x0a
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "SECR_CR,SECR Control Register"
|
|
bitfld.long 0x00 4. " DATA_READY ,Data Ready Status" "Not ready,Ready"
|
|
bitfld.long 0x00 3. " SFRDIS ,Secure Mode Read Access Disable" "No,Yes"
|
|
bitfld.long 0x00 2. " REMAPEN ,REMAP Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OPENDEV ,Open Device" "Secure,Open"
|
|
bitfld.long 0x00 0. " OTP_DISABLE ,OTP Disable Status" "No,Yes"
|
|
rgroup.long 0x10++0x17
|
|
line.long 0x0 "SECR_VR0,SECR Value 0 Registers"
|
|
line.long 0x4 "SECR_VR1,SECR Value 1 Registers"
|
|
line.long 0x8 "SECR_VR2,SECR Value 2 Registers"
|
|
line.long 0xC "SECR_VR3,SECR Value 3 Registers"
|
|
line.long 0x10 "SECR_VR4,SECR Value 4 Registers"
|
|
line.long 0x14 "SECR_VR5,SECR Value 5 Registers"
|
|
width 0x0b
|
|
tree.end
|
|
tree "AHB-APB Registers"
|
|
base asd:0x10180000
|
|
width 10.
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "BSR,Bridge Status Register"
|
|
bitfld.long 0x00 8. " PUR ,Peripheral Under Reset" "Not attempted,Attempted"
|
|
bitfld.long 0x00 7. " PCO ,Peripheral Clock Off" "Not attempted,Attempted"
|
|
bitfld.long 0x00 6. " PDA ,PPeripheral Denied Access" "Not denied,Denied"
|
|
textline " "
|
|
bitfld.long 0x00 4. " OUTM ,Out of memory" "Not attempted,Attempted"
|
|
bitfld.long 0x00 0. " ERROR ,Error" "Normal,Error"
|
|
rgroup.long 0x08++0x3
|
|
line.long 0x00 "PAER,Peripheral Address Register"
|
|
bitfld.long 0x00 24. " nRW ,Access Type" "Read,Write"
|
|
hexmask.long 0x00 0.--23. 1. " PERIPHERAL_ADDRESS[23:0] ,Peripheral address"
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "PWAC,Peripheral Write Access Control register"
|
|
bitfld.long 0x00 13. " SCI_WAC ,SCI Write Access" "Not allowed,Allowed"
|
|
bitfld.long 0x00 12. " TSC_WAC ,TSC Write Access" "Not allowed,Allowed"
|
|
bitfld.long 0x00 11. " EFT3_WAC ,EFT3 Write Access" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 10. " EFT2_WAC ,EFT2 Write Access" "Not allowed,Allowed"
|
|
bitfld.long 0x00 9. " CHITF_WAC ,CHITF Write Access" "Not allowed,Allowed"
|
|
bitfld.long 0x00 8. " SARAC_WAC ,SARAC Write Access" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BD_WAC ,BD Write Access" "Not allowed,Allowed"
|
|
bitfld.long 0x00 6. " C3_WAC ,C3 Write Accesse" "Not allowed,Allowed"
|
|
bitfld.long 0x00 5. " SPDIF_WAC ,SPDIF Write Access" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CAN1_WAC ,CAN1 Write Access" "Not allowed,Allowed"
|
|
bitfld.long 0x00 3. " CAN0_WAC ,CAN0 Write Access" "Not allowed,Allowed"
|
|
bitfld.long 0x00 2. " EFT1_WAC ,EFT1 Write Access" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EFT0_WAC ,EFT0 Write Access" "Not allowed,Allowed"
|
|
group.long 0x40++0x3
|
|
line.long 0x00 "PRAC,Peripheral Read Access Control register"
|
|
bitfld.long 0x00 13. " SCI_RAC ,SCI Read Access" "Not allowed,Allowed"
|
|
bitfld.long 0x00 12. " TSC_RAC ,TSC Read Access" "Not allowed,Allowed"
|
|
bitfld.long 0x00 11. " EFT3_RAC ,EFT3 Read Access" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 10. " EFT2_RAC ,EFT2 Read Access" "Not allowed,Allowed"
|
|
bitfld.long 0x00 9. " CHITF_RAC ,CHITF Read Access" "Not allowed,Allowed"
|
|
bitfld.long 0x00 8. " SARAC_RAC ,SARAC Read Access" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BD_RAC ,BD Read Access" "Not allowed,Allowed"
|
|
bitfld.long 0x00 6. " C3_RAC ,C3 Read Access" "Not allowed,Allowed"
|
|
bitfld.long 0x00 5. " SPDIF_RAC ,SPDIF Read Access" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CAN1_RAC ,CAN1 Read Access" "Not allowed,Allowed"
|
|
bitfld.long 0x00 3. " CAN0_RAC ,CAN0 Read Access" "Not allowed,Allowed"
|
|
bitfld.long 0x00 2. " EFT1_RAC ,EFT1 Read Access" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EFT0_RAC ,EFT0 Read Access" "Not allowed,Allowed"
|
|
group.long 0x60++0x3
|
|
line.long 0x00 "PCG,Peripheral Clock Gating Register"
|
|
bitfld.long 0x00 13. " SCI_CG ,SCI clocked" "Gated off,Clocked"
|
|
bitfld.long 0x00 12. " TSC_CG ,TSC clocked" "Gated off,Clocked"
|
|
bitfld.long 0x00 11. " EFT3_CG ,EFT3 clocked" "Gated off,Clocked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " EFT2_CG ,EFT2 clocked" "Gated off,Clocked"
|
|
bitfld.long 0x00 9. " CHITF_CG ,CHITF clocked" "Gated off,Clocked"
|
|
bitfld.long 0x00 8. " SARAC_CG ,SARAC clocked" "Gated off,Clocked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BD_CG ,BD clocked" "Gated off,Clocked"
|
|
bitfld.long 0x00 6. " C3_CG ,C3 clocked" "Gated off,Clocked"
|
|
bitfld.long 0x00 5. " SPDIF_CG ,SPDIF clocked" "Gated off,Clocked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CAN1_CG ,CAN1 clocked" "Gated off,Clocked"
|
|
bitfld.long 0x00 3. " CAN0_CG ,CAN0 clocked" "Gated off,Clocked"
|
|
bitfld.long 0x00 2. " EFT1_CG ,EFT1 clocked" "Gated off,Clocked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EFT0_CG ,EFT0 clocked" "Gated off,Clocked"
|
|
group.long 0x80++0x3
|
|
line.long 0x00 "PUR,Peripheral Under Reset Register"
|
|
bitfld.long 0x00 13. " SCI_UR ,SCI Reset" "No reset,Reset"
|
|
bitfld.long 0x00 12. " TSC_UR ,TSC Reset" "No reset,Reset"
|
|
bitfld.long 0x00 11. " EFT3_UR ,EFT3 Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 10. " EFT2_UR ,EFT2 Reset" "No reset,Reset"
|
|
bitfld.long 0x00 9. " CHITF_UR ,CHITF Reset" "No reset,Reset"
|
|
bitfld.long 0x00 8. " SARAC_UR ,SARAC Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BD_UR ,BD Reset" "No reset,Reset"
|
|
bitfld.long 0x00 6. " C3_UR ,C3 Reset" "No reset,Reset"
|
|
bitfld.long 0x00 5. " SPDIF_UR ,SPDIF Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CAN1_UR ,CAN1 Reset" "No reset,Reset"
|
|
bitfld.long 0x00 3. " CAN0_UR ,CAN0 Reset" "No reset,Reset"
|
|
bitfld.long 0x00 2. " EFT1_UR ,EFT1 Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EFT0_UR ,EFT0 Reset" "No reset,Reset"
|
|
group.long 0xa0++0x3
|
|
line.long 0x00 "EMU_PCG,Emulator Peripheral Clock Gating Register"
|
|
bitfld.long 0x00 13. " SCI_ECG ,SCI Clock gating emulated" "Gated off,PCG12"
|
|
bitfld.long 0x00 12. " TSC_ECG ,TSC Clock gating emulated" "Gated off,PCG11"
|
|
bitfld.long 0x00 11. " EFT3_ECG ,EFT3 Clock gating emulated" "Gated off,PCG10"
|
|
textline " "
|
|
bitfld.long 0x00 10. " EFT2_ECG ,EFT2 Clock gating emulated" "Gated off,PCG9"
|
|
bitfld.long 0x00 9. " CHITF_ECG ,CHITF Clock gating emulated" "Gated off,PCG8"
|
|
bitfld.long 0x00 8. " SARAC_ECG ,SARAC Clock gating emulated" "Gated off,PCG7"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BD_ECG ,BD Clock gating emulated" "Gated off,PCG6"
|
|
bitfld.long 0x00 6. " C3_ECG ,C3 Clock gating emulated" "Gated off,PCG5"
|
|
bitfld.long 0x00 5. " SPDIF_ECG ,SPDIF Clock gating emulated" "Gated off,PCG4"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CAN1_ECG ,CAN1 Clock gating emulated" "Gated off,PCG3"
|
|
bitfld.long 0x00 3. " CAN0_ECG ,CAN0 Clock gating emulated" "Gated off,PCG2"
|
|
bitfld.long 0x00 2. " EFT1_ECG ,EFT1 Clock gating emulated" "Gated off,PCG1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EFT0_ECG ,EFT0 Clock gating emulated" "Gated off,PCG0"
|
|
width 0xb
|
|
tree.end
|
|
tree "IrDA Interface"
|
|
base asd:0x101FA000
|
|
width 15.
|
|
group.long 0x00++0x0b
|
|
line.long 0x00 "IRDA_CR,IRDA register descriptions"
|
|
bitfld.long 0x00 0. " RUN ,Enable Fast IRDA Controller" "Disabled,Enabled"
|
|
line.long 0x04 "IRDA_CFR,IRDA configuration register"
|
|
bitfld.long 0x04 21. " SIPEN ,Automatic SIP Generation Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " TXPOL ,Polarity of TX pulses" "Active Low,Active High"
|
|
bitfld.long 0x04 19. " RXPOL ,Polarity of RX pulses" "Active Low,Active High"
|
|
textline " "
|
|
bitfld.long 0x04 16.--18. " BS ,Burst Size" "1 word,2 words,4 words,?..."
|
|
hexmask.long.word 0x04 0.--12. 1. " RATV ,Reception Abort Timer Value"
|
|
line.long 0x08 "RDA_PAR,IRDA parameter register"
|
|
hexmask.long.word 0x08 16.--27. 1. " MNRB ,Maximum Number of Received Bytes"
|
|
bitfld.long 0x08 2.--7. " ABF ,Number of Additional Beginning Flags" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,?..."
|
|
bitfld.long 0x08 0.--1. " MODE ,Infrared Mode" "SIR,MIR,FIR,?..."
|
|
if (((data.long(asd:0x101FA000))&0x1)==0x00)
|
|
group.long 0x0c++0x03
|
|
line.long 0x00 "IRDA_DVR,IRDA divider register"
|
|
hexmask.long.word 0x00 16.--26. 1. " DEC ,Decrement value of the fractional divider"
|
|
hexmask.long.byte 0x00 8.--15. 1. " INC ,Increment value of the fractional divider"
|
|
hexmask.long.byte 0x00 0.--7. 1. " N ,N+1 is the denominator of the integer divider"
|
|
else
|
|
rgroup.long 0x0c++0x03
|
|
line.long 0x00 "IRDA_DVR,IRDA divider register"
|
|
hexmask.long.word 0x00 16.--26. 1. " DEC ,Decrement value of the fractional divider"
|
|
hexmask.long.byte 0x00 8.--15. 1. " INC ,Increment value of the fractional divider"
|
|
hexmask.long.byte 0x00 0.--7. 1. " N ,N+1 is the denominator of the integer divider"
|
|
endif
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "IRDA_SR,IRDA status register"
|
|
bitfld.long 0x00 1. " TXS ,Transmission State" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RXS ,Reception State" "Disabled,Enabled"
|
|
wgroup.long 0x14++0x03
|
|
line.long 0x00 "IRDA_TFS,IRDA transmission frame size register"
|
|
hexmask.long.word 0x00 0.--11. 1. " TFS ,Transmission Frame Size"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "IRDA_RFS,IRDA reception frame size register"
|
|
hexmask.long.word 0x00 0.--11. 1. " RFS ,Reception Frame Size"
|
|
wgroup.long 0x1c++0x03
|
|
line.long 0x00 "IRDA_TXB,IRDA data register"
|
|
rgroup.long 0x20++0x03
|
|
line.long 0x00 "IRDA_RXB,IRDA reception buffer register"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "IRDA_IMSC,IRDA interrupt mask set/clear register"
|
|
bitfld.long 0x00 7. " FDIM ,Frame Detected Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 6. " FIIM ,Frame Invalid Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 5. " SDIM ,Signal Detected Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " FTIM ,Frame Detected Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 3. " BREQIM ,BREQ Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " LBREQIM ,LBREQ Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SREQIM ,SREQ Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 0. " LSREQIM ,LSREQ Interrupt Mask" "Masked,Not masked"
|
|
rgroup.long 0x28++0x07
|
|
line.long 0x00 "IRDA_RIS,IRDA raw interrupt status register"
|
|
bitfld.long 0x00 7. " FDRIS ,Frame Detected Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. " FIRIS ,Frame Invalid Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " SDRIS ,SDRIS: Signal Detected Raw Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 4. " FTRIS ,Frame Transmitted Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " BREQRIS ,Receive Frame Sync Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " LBREQRIS ,LBREQ Raw Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SREQRIS ,SREQ Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " LSREQRIS ,LSREQ Raw Interrupt Status" "No interrupt,Interrupt"
|
|
line.long 0x04 "IRDA_MIS,IRDA masked interrupt status register"
|
|
bitfld.long 0x04 7. " FDMIS ,Frame Detected Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 6. " FIMIS ,Frame Invalid Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 5. " SDMIS ,Signal Detected Masked Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 4. " FTMIS ,Frame Transmitted Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 3. " BREQMIS ,Receive Frame Sync Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 2. " LBREQMI ,LBREQ Masked Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SREQMIS ,SREQ Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 0. " LSREQMIS ,LSREQ Masked Interrupt Status" "No interrupt,Interrupt"
|
|
group.long 0x30++0x0b
|
|
line.long 0x00 "IRDA_ICR,IRDA interrupt clear register"
|
|
bitfld.long 0x00 7. " FDIC ,Frame Detected Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 6. " FIIC ,Frame Invalid Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 5. " SDIC ,Signal Detected Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 4. " FTIC ,Frame Transmitted Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 3. " BREQIC ,Receive Frame Sync Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 2. " LBREQIC ,LBREQ Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SREQIC ,SREQ Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 0. " LSREQIC ,LSREQ Interrupt Clear" "No effect,Cleared"
|
|
line.long 0x04 "IRDA_ISR,IRDA interrupt set register"
|
|
bitfld.long 0x04 7. " FDIS ,Frame Detected Interrupt Set" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " FIIS ,Frame Invalid Interrupt Set" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " SDIS ,Signal Detected Interrupt Set" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 4. " FTIS ,Frame Transmitted Interrupt Set" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " BREQIS ,Receive Frame Sync Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " LBREQIS ,LBREQ Interrupt Set" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SREQIS ,SREQ Interrupt Set" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " LSREQIS ,LSREQ Interrupt Set" "Disabled,Enabled"
|
|
line.long 0x08 "IRDA_DMACR,IRDA DMA control register"
|
|
bitfld.long 0x08 3. " BREQEN ,Burst Request DMA Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " LBREQEN ,Last Burst Request DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 1. " SREQEN ,Single Request DMA Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " LSREQEN ,Last Single Request DMA Enable" "Disabled,Enabled"
|
|
width 15.
|
|
rgroup.long 0xfe0++0x1f
|
|
line.long 0x00 "IRDAPERIPHID0,IRDA peripheral identification register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PARTNUMBER0 ,Part Number 0"
|
|
line.long 0x04 "IRDAPERIPHID1,IRDA peripheral identification register 1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " DESIGNER0 ,Designer 0"
|
|
hexmask.long.byte 0x04 0.--3. 1. " PARTNUMBER1 ,Part Number 1"
|
|
line.long 0x08 "IRDAPERIPHID2,IRDA peripheral identification register 2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " REVISION ,Revision"
|
|
hexmask.long.byte 0x08 0.--3. 1. " DESIGNER1 ,Designer 1"
|
|
line.long 0x0c "IRDAPERIPHID3,IRDA peripheral identification register 3"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " CONFIGURATION ,Configuration"
|
|
line.long 0x10 "IRDAPCELLID0,IRDA PCell identification register 0"
|
|
hexmask.long.byte 0x10 0.--7. 1. " IRDAPCELLID0 ,IRDA PCell ID 0"
|
|
line.long 0x14 "IRDAPCELLID1,IRDA PCell identification register 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " IRDAPCELLID1 ,IRDA PCell ID 1"
|
|
line.long 0x18 "IRDAPCELLID2,IRDA PCell identification register 2"
|
|
hexmask.long.byte 0x18 0.--7. 1. " IRDAPCELLID2 ,IRDA PCell ID 2"
|
|
line.long 0x1c "IRDAPCELLID3,IRDA PCell identification register 3"
|
|
hexmask.long.byte 0x1c 0.--7. 1. " IRDAPCELLID3 ,IRDA PCell ID 3"
|
|
width 0xb
|
|
tree.end
|
|
tree.open "EFT (Extended Function Timer)"
|
|
tree "EFT 0"
|
|
base asd:0x10181000
|
|
width 11.
|
|
rgroup.word 0x00++0x01
|
|
line.word 0x00 "TIM0_ICAR,Input Capture A Register"
|
|
rgroup.word 0x04++0x01
|
|
line.word 0x00 "TIM0_ICBR,Input Capture B Register"
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "TIM0_OCAR,Output Compare A Register"
|
|
group.word 0x0c++0x01
|
|
line.word 0x00 "TIM0_OCBR,Output Compare B Register"
|
|
rgroup.word 0x10++1
|
|
line.word 0x00 "TIM0_CNTR,Couter Register"
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "TIM0_CR1,Control Register 1"
|
|
bitfld.word 0x00 15. " EN ,Timer Interrupt Enable" "Stopped,Enabled"
|
|
bitfld.word 0x00 14. " PWMI ,Pulse Width Modulation Input" "Not Active,Active"
|
|
bitfld.word 0x00 12.--13. " DMAS0-DMAS1 ,DMA source select" "ICAPA,OCMPA,ICAPB,OCMPB"
|
|
textline " "
|
|
bitfld.word 0x00 11. " FOLVB ,Forced Output Compare B" "No Effect,Enabled"
|
|
bitfld.word 0x00 10. " FOLVA ,Forced Output Compare A" "No Effect,Enabled"
|
|
bitfld.word 0x00 9. " OLVLB ,Output Level B" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 8. " OLVLA ,Output Level A" "Low,High"
|
|
bitfld.word 0x00 7. " OCBE ,Output Compare B Enable" "I/O,OCB"
|
|
bitfld.word 0x00 6. " OCAE ,Output Compare A Enable" "I/O,OCA"
|
|
textline " "
|
|
bitfld.word 0x00 5. " OPM ,One Pulse Mode" "Not Active,Active"
|
|
bitfld.word 0x00 4. " PWM ,Pulse Width Modulation" "Not Active,Active"
|
|
bitfld.word 0x00 3. " IEDGB ,Input Edge B" "Falling edge,Rising edge"
|
|
textline " "
|
|
bitfld.word 0x00 2. " IEDGA ,Input Edge A" "Falling edge,Rising edge"
|
|
bitfld.word 0x00 1. " EXEDG ,External Clock Edge" "Falling edge,Rising edge"
|
|
bitfld.word 0x00 0. " ECKEN ,External Clock Enable" "Internal,External"
|
|
group.word 0x18++0x01
|
|
line.word 0x00 "TIM0_CR2,Control Register 2"
|
|
bitfld.word 0x00 15. " ICAIE ,Input Capture A Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " OCAIE ,Output Compare A Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " TOIE ,Timer Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 12. " ICBIE ,Input Capture B Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " OCBIE ,Output Compare B Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " DMAIE ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.word.byte 0x00 0.--7. 1. " CC[7:0] ,Prescaler Division Factor"
|
|
hgroup.word 0x1c++0x01
|
|
hide.word 0x00 "TIM0_SR,Status Register"
|
|
in
|
|
width 0xb
|
|
tree.end
|
|
tree "EFT 1"
|
|
base asd:0x10182000
|
|
width 11.
|
|
rgroup.word 0x00++0x01
|
|
line.word 0x00 "TIM1_ICAR,Input Capture A Register"
|
|
rgroup.word 0x04++0x01
|
|
line.word 0x00 "TIM1_ICBR,Input Capture B Register"
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "TIM1_OCAR,Output Compare A Register"
|
|
group.word 0x0c++0x01
|
|
line.word 0x00 "TIM1_OCBR,Output Compare B Register"
|
|
rgroup.word 0x10++1
|
|
line.word 0x00 "TIM1_CNTR,Couter Register"
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "TIM1_CR1,Control Register 1"
|
|
bitfld.word 0x00 15. " EN ,Timer Interrupt Enable" "Stopped,Enabled"
|
|
bitfld.word 0x00 14. " PWMI ,Pulse Width Modulation Input" "Not Active,Active"
|
|
bitfld.word 0x00 12.--13. " DMAS0-DMAS1 ,DMA source select" "ICAPA,OCMPA,ICAPB,OCMPB"
|
|
textline " "
|
|
bitfld.word 0x00 11. " FOLVB ,Forced Output Compare B" "No Effect,Enabled"
|
|
bitfld.word 0x00 10. " FOLVA ,Forced Output Compare A" "No Effect,Enabled"
|
|
bitfld.word 0x00 9. " OLVLB ,Output Level B" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 8. " OLVLA ,Output Level A" "Low,High"
|
|
bitfld.word 0x00 7. " OCBE ,Output Compare B Enable" "I/O,OCB"
|
|
bitfld.word 0x00 6. " OCAE ,Output Compare A Enable" "I/O,OCA"
|
|
textline " "
|
|
bitfld.word 0x00 5. " OPM ,One Pulse Mode" "Not Active,Active"
|
|
bitfld.word 0x00 4. " PWM ,Pulse Width Modulation" "Not Active,Active"
|
|
bitfld.word 0x00 3. " IEDGB ,Input Edge B" "Falling edge,Rising edge"
|
|
textline " "
|
|
bitfld.word 0x00 2. " IEDGA ,Input Edge A" "Falling edge,Rising edge"
|
|
bitfld.word 0x00 1. " EXEDG ,External Clock Edge" "Falling edge,Rising edge"
|
|
bitfld.word 0x00 0. " ECKEN ,External Clock Enable" "Internal,External"
|
|
group.word 0x18++0x01
|
|
line.word 0x00 "TIM1_CR2,Control Register 2"
|
|
bitfld.word 0x00 15. " ICAIE ,Input Capture A Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " OCAIE ,Output Compare A Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " TOIE ,Timer Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 12. " ICBIE ,Input Capture B Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " OCBIE ,Output Compare B Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " DMAIE ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.word.byte 0x00 0.--7. 1. " CC[7:0] ,Prescaler Division Factor"
|
|
hgroup.word 0x1c++0x01
|
|
hide.word 0x00 "TIM1_SR,Status Register"
|
|
in
|
|
width 0xb
|
|
tree.end
|
|
tree "EFT 2"
|
|
base asd:0x1018A000
|
|
width 11.
|
|
rgroup.word 0x00++0x01
|
|
line.word 0x00 "TIM2_ICAR,Input Capture A Register"
|
|
rgroup.word 0x04++0x01
|
|
line.word 0x00 "TIM2_ICBR,Input Capture B Register"
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "TIM2_OCAR,Output Compare A Register"
|
|
group.word 0x0c++0x01
|
|
line.word 0x00 "TIM2_OCBR,Output Compare B Register"
|
|
rgroup.word 0x10++1
|
|
line.word 0x00 "TIM2_CNTR,Couter Register"
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "TIM2_CR1,Control Register 1"
|
|
bitfld.word 0x00 15. " EN ,Timer Interrupt Enable" "Stopped,Enabled"
|
|
bitfld.word 0x00 14. " PWMI ,Pulse Width Modulation Input" "Not Active,Active"
|
|
bitfld.word 0x00 12.--13. " DMAS0-DMAS1 ,DMA source select" "ICAPA,OCMPA,ICAPB,OCMPB"
|
|
textline " "
|
|
bitfld.word 0x00 11. " FOLVB ,Forced Output Compare B" "No Effect,Enabled"
|
|
bitfld.word 0x00 10. " FOLVA ,Forced Output Compare A" "No Effect,Enabled"
|
|
bitfld.word 0x00 9. " OLVLB ,Output Level B" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 8. " OLVLA ,Output Level A" "Low,High"
|
|
bitfld.word 0x00 7. " OCBE ,Output Compare B Enable" "I/O,OCB"
|
|
bitfld.word 0x00 6. " OCAE ,Output Compare A Enable" "I/O,OCA"
|
|
textline " "
|
|
bitfld.word 0x00 5. " OPM ,One Pulse Mode" "Not Active,Active"
|
|
bitfld.word 0x00 4. " PWM ,Pulse Width Modulation" "Not Active,Active"
|
|
bitfld.word 0x00 3. " IEDGB ,Input Edge B" "Falling edge,Rising edge"
|
|
textline " "
|
|
bitfld.word 0x00 2. " IEDGA ,Input Edge A" "Falling edge,Rising edge"
|
|
bitfld.word 0x00 1. " EXEDG ,External Clock Edge" "Falling edge,Rising edge"
|
|
bitfld.word 0x00 0. " ECKEN ,External Clock Enable" "Internal,External"
|
|
group.word 0x18++0x01
|
|
line.word 0x00 "TIM2_CR2,Control Register 2"
|
|
bitfld.word 0x00 15. " ICAIE ,Input Capture A Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " OCAIE ,Output Compare A Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " TOIE ,Timer Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 12. " ICBIE ,Input Capture B Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " OCBIE ,Output Compare B Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " DMAIE ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.word.byte 0x00 0.--7. 1. " CC[7:0] ,Prescaler Division Factor"
|
|
hgroup.word 0x1c++0x01
|
|
hide.word 0x00 "TIM2_SR,Status Register"
|
|
in
|
|
width 0xb
|
|
tree.end
|
|
tree "EFT 3"
|
|
base asd:0x1018B000
|
|
width 11.
|
|
rgroup.word 0x00++0x01
|
|
line.word 0x00 "TIM3_ICAR,Input Capture A Register"
|
|
rgroup.word 0x04++0x01
|
|
line.word 0x00 "TIM3_ICBR,Input Capture B Register"
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "TIM3_OCAR,Output Compare A Register"
|
|
group.word 0x0c++0x01
|
|
line.word 0x00 "TIM3_OCBR,Output Compare B Register"
|
|
rgroup.word 0x10++1
|
|
line.word 0x00 "TIM3_CNTR,Couter Register"
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "TIM3_CR1,Control Register 1"
|
|
bitfld.word 0x00 15. " EN ,Timer Interrupt Enable" "Stopped,Enabled"
|
|
bitfld.word 0x00 14. " PWMI ,Pulse Width Modulation Input" "Not Active,Active"
|
|
bitfld.word 0x00 12.--13. " DMAS0-DMAS1 ,DMA source select" "ICAPA,OCMPA,ICAPB,OCMPB"
|
|
textline " "
|
|
bitfld.word 0x00 11. " FOLVB ,Forced Output Compare B" "No Effect,Enabled"
|
|
bitfld.word 0x00 10. " FOLVA ,Forced Output Compare A" "No Effect,Enabled"
|
|
bitfld.word 0x00 9. " OLVLB ,Output Level B" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 8. " OLVLA ,Output Level A" "Low,High"
|
|
bitfld.word 0x00 7. " OCBE ,Output Compare B Enable" "I/O,OCB"
|
|
bitfld.word 0x00 6. " OCAE ,Output Compare A Enable" "I/O,OCA"
|
|
textline " "
|
|
bitfld.word 0x00 5. " OPM ,One Pulse Mode" "Not Active,Active"
|
|
bitfld.word 0x00 4. " PWM ,Pulse Width Modulation" "Not Active,Active"
|
|
bitfld.word 0x00 3. " IEDGB ,Input Edge B" "Falling edge,Rising edge"
|
|
textline " "
|
|
bitfld.word 0x00 2. " IEDGA ,Input Edge A" "Falling edge,Rising edge"
|
|
bitfld.word 0x00 1. " EXEDG ,External Clock Edge" "Falling edge,Rising edge"
|
|
bitfld.word 0x00 0. " ECKEN ,External Clock Enable" "Internal,External"
|
|
group.word 0x18++0x01
|
|
line.word 0x00 "TIM3_CR2,Control Register 2"
|
|
bitfld.word 0x00 15. " ICAIE ,Input Capture A Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " OCAIE ,Output Compare A Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " TOIE ,Timer Overflow Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 12. " ICBIE ,Input Capture B Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " OCBIE ,Output Compare B Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " DMAIE ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.word.byte 0x00 0.--7. 1. " CC[7:0] ,Prescaler Division Factor"
|
|
hgroup.word 0x1c++0x01
|
|
hide.word 0x00 "TIM3_SR,Status Register"
|
|
in
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree.open "MTU0 and MTU1 (Multi Timer Units 0/1)"
|
|
tree "MTU0"
|
|
base asd:0x101E2000
|
|
width 13.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "MTU0_IMSC,MTU0 Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x00 3. " T3IM ,Timer 3 Interrupt Mask" "Cleared,Masked"
|
|
bitfld.long 0x00 2. " T2IM ,Timer 2 Interrupt Mask" "Cleared,Masked"
|
|
bitfld.long 0x00 1. " T1IM ,Timer 1 Interrupt Mask" "Cleared,Masked"
|
|
bitfld.long 0x00 0. " T0IM ,Timer 0 Interrupt Mask" "Cleared,Masked"
|
|
rgroup.long 0x04++0x07
|
|
line.long 0x00 "MTU0_RIS,MTU0 Raw Interrupt Status Register"
|
|
bitfld.long 0x00 3. " T3RIS ,Timer 3 Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " T2RIS ,Timer 2 Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " T1RIS ,Timer 1 Raw Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 0. " T0RIS ,Timer 0 Raw Interrupt Status" "No interrupt,Interrupt"
|
|
line.long 0x04 "MTU0_MIS,MTU0 Masked Interrupt Status Register"
|
|
bitfld.long 0x04 3. " T3MIS ,Timer 3 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 2. " T2MIS ,Timer 2 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 1. " T1MIS ,Timer 1 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 0. " T0MIS ,Timer 0 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
group.long 0x0c++0x03
|
|
line.long 0x00 "MTU0_ICR,MTU0 Interrupt Clear Register"
|
|
bitfld.long 0x00 3. " T3ICR ,Timer 3 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 2. " T2ICR ,Timer 2 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 1. " T1ICR ,Timer 1 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 0. " T0ICR ,Timer 0 Interrupt Clear" "No effect,Cleared"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "MTU0_T0LR,MTU0 Timer 0 Load Register"
|
|
rgroup.long (0x10+0x04)++0x03
|
|
line.long 0x00 "MTU0_T0VAL,MTU0 Timer 0 Value Register"
|
|
group.long (0x10+0x08)++0x07
|
|
line.long 0x00 "MTU0_T0CR,MTU0 Timer 0 Control Register"
|
|
bitfld.long 0x00 7. " T0EN ,Timer 0 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " T0MOD ,Timer 0 Mode" "Free-running,Periodic"
|
|
bitfld.long 0x00 2.--3. " T0PRE ,Timer 0 Prescaler" "/1,/16,/256,?..."
|
|
bitfld.long 0x00 1. " T0SZ ,Timer 0 Size" "16-bit,32-bit"
|
|
textline " "
|
|
bitfld.long 0x00 0. " T0OS ,Timer 0 One Shot Count" "Wrapping,One-shot"
|
|
line.long 0x04 "MTU0_T0BGLR,MTU0 Timer 0 Background Load Register"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "MTU0_T1LR,MTU0 Timer 1 Load Register"
|
|
rgroup.long (0x20+0x04)++0x03
|
|
line.long 0x00 "MTU0_T1VAL,MTU0 Timer 1 Value Register"
|
|
group.long (0x20+0x08)++0x07
|
|
line.long 0x00 "MTU0_T1CR,MTU0 Timer 1 Control Register"
|
|
bitfld.long 0x00 7. " T1EN ,Timer 1 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " T1MOD ,Timer 1 Mode" "Free-running,Periodic"
|
|
bitfld.long 0x00 2.--3. " T1PRE ,Timer 1 Prescaler" "/1,/16,/256,?..."
|
|
bitfld.long 0x00 1. " T1SZ ,Timer 1 Size" "16-bit,32-bit"
|
|
textline " "
|
|
bitfld.long 0x00 0. " T1OS ,Timer 1 One Shot Count" "Wrapping,One-shot"
|
|
line.long 0x04 "MTU0_T1BGLR,MTU0 Timer 1 Background Load Register"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "MTU0_T2LR,MTU0 Timer 2 Load Register"
|
|
rgroup.long (0x30+0x04)++0x03
|
|
line.long 0x00 "MTU0_T2VAL,MTU0 Timer 2 Value Register"
|
|
group.long (0x30+0x08)++0x07
|
|
line.long 0x00 "MTU0_T2CR,MTU0 Timer 2 Control Register"
|
|
bitfld.long 0x00 7. " T2EN ,Timer 2 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " T2MOD ,Timer 2 Mode" "Free-running,Periodic"
|
|
bitfld.long 0x00 2.--3. " T2PRE ,Timer 2 Prescaler" "/1,/16,/256,?..."
|
|
bitfld.long 0x00 1. " T2SZ ,Timer 2 Size" "16-bit,32-bit"
|
|
textline " "
|
|
bitfld.long 0x00 0. " T2OS ,Timer 2 One Shot Count" "Wrapping,One-shot"
|
|
line.long 0x04 "MTU0_T2BGLR,MTU0 Timer 2 Background Load Register"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "MTU0_T3LR,MTU0 Timer 3 Load Register"
|
|
rgroup.long (0x40+0x04)++0x03
|
|
line.long 0x00 "MTU0_T3VAL,MTU0 Timer 3 Value Register"
|
|
group.long (0x40+0x08)++0x07
|
|
line.long 0x00 "MTU0_T3CR,MTU0 Timer 3 Control Register"
|
|
bitfld.long 0x00 7. " T3EN ,Timer 3 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " T3MOD ,Timer 3 Mode" "Free-running,Periodic"
|
|
bitfld.long 0x00 2.--3. " T3PRE ,Timer 3 Prescaler" "/1,/16,/256,?..."
|
|
bitfld.long 0x00 1. " T3SZ ,Timer 3 Size" "16-bit,32-bit"
|
|
textline " "
|
|
bitfld.long 0x00 0. " T3OS ,Timer 3 One Shot Count" "Wrapping,One-shot"
|
|
line.long 0x04 "MTU0_T3BGLR,MTU0 Timer 3 Background Load Register"
|
|
width 15.
|
|
rgroup.long 0xfe0++0x01f
|
|
line.long 0x00 "MTU0PERIPHID0,MTU0 Peripheral Identification Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PN0 ,Part Number 0 (0x04)"
|
|
line.long 0x04 "MTU0PERIPHID1,MTU0 Peripheral Identification Register 1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " D0 ,Designer 0 (0x00)"
|
|
hexmask.long.byte 0x04 0.--3. 1. " PN1 ,Part Number 1 (0x8)"
|
|
line.long 0x08 "MTU0PERIPHID2,MTU0 Peripheral Identification Register 2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " REV ,Revision (0x00)"
|
|
hexmask.long.byte 0x08 0.--3. 1. " D1 ,Designer 1 (0x08)"
|
|
line.long 0x0c "MTU0PERIPHID3,MTU0 Peripheral Identification Register 3"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " CONF ,Configuration (0x04)"
|
|
line.long 0x10 "MTU0PCELLID0,MTU0 PCell Identification Register 0"
|
|
hexmask.long.byte 0x10 0.--7. 1. " MTU0PCELLID0 ,MTU0 PCell ID0 (0x0D)"
|
|
line.long 0x14 "MTU0PCELLID1,MTU0 PCell Identification Register 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " MTU0PCELLID1 ,MTU0 PCell ID1 (0xF0)"
|
|
line.long 0x18 "MTU0PCELLID2,MTU0 PCell Identification Register 2"
|
|
hexmask.long.byte 0x18 0.--7. 1. " MTU0PCELLID2 ,MTU0 PCell ID2 (0x05)"
|
|
line.long 0x1c "MTU0PCELLID3,MTU0 PCell Identification Register 3"
|
|
hexmask.long.byte 0x1c 0.--7. 1. " MTU0PCELLID3 ,MTU0 PCell ID3 (0xB1)"
|
|
width 0xb
|
|
tree.end
|
|
tree "MTU1"
|
|
base asd:0x101E3000
|
|
width 13.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "MTU1_IMSC,MTU1 Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x00 3. " T3IM ,Timer 3 Interrupt Mask" "Cleared,Masked"
|
|
bitfld.long 0x00 2. " T2IM ,Timer 2 Interrupt Mask" "Cleared,Masked"
|
|
bitfld.long 0x00 1. " T1IM ,Timer 1 Interrupt Mask" "Cleared,Masked"
|
|
bitfld.long 0x00 0. " T0IM ,Timer 0 Interrupt Mask" "Cleared,Masked"
|
|
rgroup.long 0x04++0x07
|
|
line.long 0x00 "MTU1_RIS,MTU1 Raw Interrupt Status Register"
|
|
bitfld.long 0x00 3. " T3RIS ,Timer 3 Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " T2RIS ,Timer 2 Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " T1RIS ,Timer 1 Raw Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 0. " T0RIS ,Timer 0 Raw Interrupt Status" "No interrupt,Interrupt"
|
|
line.long 0x04 "MTU1_MIS,MTU1 Masked Interrupt Status Register"
|
|
bitfld.long 0x04 3. " T3MIS ,Timer 3 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 2. " T2MIS ,Timer 2 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 1. " T1MIS ,Timer 1 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 0. " T0MIS ,Timer 0 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
group.long 0x0c++0x03
|
|
line.long 0x00 "MTU1_ICR,MTU1 Interrupt Clear Register"
|
|
bitfld.long 0x00 3. " T3ICR ,Timer 3 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 2. " T2ICR ,Timer 2 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 1. " T1ICR ,Timer 1 Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 0. " T0ICR ,Timer 0 Interrupt Clear" "No effect,Cleared"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "MTU1_T0LR,MTU1 Timer 0 Load Register"
|
|
rgroup.long (0x10+0x04)++0x03
|
|
line.long 0x00 "MTU1_T0VAL,MTU1 Timer 0 Value Register"
|
|
group.long (0x10+0x08)++0x07
|
|
line.long 0x00 "MTU1_T0CR,MTU1 Timer 0 Control Register"
|
|
bitfld.long 0x00 7. " T0EN ,Timer 0 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " T0MOD ,Timer 0 Mode" "Free-running,Periodic"
|
|
bitfld.long 0x00 2.--3. " T0PRE ,Timer 0 Prescaler" "/1,/16,/256,?..."
|
|
bitfld.long 0x00 1. " T0SZ ,Timer 0 Size" "16-bit,32-bit"
|
|
textline " "
|
|
bitfld.long 0x00 0. " T0OS ,Timer 0 One Shot Count" "Wrapping,One-shot"
|
|
line.long 0x04 "MTU1_T0BGLR,MTU1 Timer 0 Background Load Register"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "MTU1_T1LR,MTU1 Timer 1 Load Register"
|
|
rgroup.long (0x20+0x04)++0x03
|
|
line.long 0x00 "MTU1_T1VAL,MTU1 Timer 1 Value Register"
|
|
group.long (0x20+0x08)++0x07
|
|
line.long 0x00 "MTU1_T1CR,MTU1 Timer 1 Control Register"
|
|
bitfld.long 0x00 7. " T1EN ,Timer 1 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " T1MOD ,Timer 1 Mode" "Free-running,Periodic"
|
|
bitfld.long 0x00 2.--3. " T1PRE ,Timer 1 Prescaler" "/1,/16,/256,?..."
|
|
bitfld.long 0x00 1. " T1SZ ,Timer 1 Size" "16-bit,32-bit"
|
|
textline " "
|
|
bitfld.long 0x00 0. " T1OS ,Timer 1 One Shot Count" "Wrapping,One-shot"
|
|
line.long 0x04 "MTU1_T1BGLR,MTU1 Timer 1 Background Load Register"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "MTU1_T2LR,MTU1 Timer 2 Load Register"
|
|
rgroup.long (0x30+0x04)++0x03
|
|
line.long 0x00 "MTU1_T2VAL,MTU1 Timer 2 Value Register"
|
|
group.long (0x30+0x08)++0x07
|
|
line.long 0x00 "MTU1_T2CR,MTU1 Timer 2 Control Register"
|
|
bitfld.long 0x00 7. " T2EN ,Timer 2 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " T2MOD ,Timer 2 Mode" "Free-running,Periodic"
|
|
bitfld.long 0x00 2.--3. " T2PRE ,Timer 2 Prescaler" "/1,/16,/256,?..."
|
|
bitfld.long 0x00 1. " T2SZ ,Timer 2 Size" "16-bit,32-bit"
|
|
textline " "
|
|
bitfld.long 0x00 0. " T2OS ,Timer 2 One Shot Count" "Wrapping,One-shot"
|
|
line.long 0x04 "MTU1_T2BGLR,MTU1 Timer 2 Background Load Register"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "MTU1_T3LR,MTU1 Timer 3 Load Register"
|
|
rgroup.long (0x40+0x04)++0x03
|
|
line.long 0x00 "MTU1_T3VAL,MTU1 Timer 3 Value Register"
|
|
group.long (0x40+0x08)++0x07
|
|
line.long 0x00 "MTU1_T3CR,MTU1 Timer 3 Control Register"
|
|
bitfld.long 0x00 7. " T3EN ,Timer 3 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " T3MOD ,Timer 3 Mode" "Free-running,Periodic"
|
|
bitfld.long 0x00 2.--3. " T3PRE ,Timer 3 Prescaler" "/1,/16,/256,?..."
|
|
bitfld.long 0x00 1. " T3SZ ,Timer 3 Size" "16-bit,32-bit"
|
|
textline " "
|
|
bitfld.long 0x00 0. " T3OS ,Timer 3 One Shot Count" "Wrapping,One-shot"
|
|
line.long 0x04 "MTU1_T3BGLR,MTU1 Timer 3 Background Load Register"
|
|
width 15.
|
|
rgroup.long 0xfe0++0x01f
|
|
line.long 0x00 "MTU1PERIPHID0,MTU1 Peripheral Identification Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PN0 ,Part Number 0 (0x04)"
|
|
line.long 0x04 "MTU1PERIPHID1,MTU1 Peripheral Identification Register 1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " D0 ,Designer 0 (0x00)"
|
|
hexmask.long.byte 0x04 0.--3. 1. " PN1 ,Part Number 1 (0x8)"
|
|
line.long 0x08 "MTU1PERIPHID2,MTU1 Peripheral Identification Register 2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " REV ,Revision (0x00)"
|
|
hexmask.long.byte 0x08 0.--3. 1. " D1 ,Designer 1 (0x08)"
|
|
line.long 0x0c "MTU1PERIPHID3,MTU1 Peripheral Identification Register 3"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " CONF ,Configuration (0x04)"
|
|
line.long 0x10 "MTU1PCELLID0,MTU1 PCell Identification Register 0"
|
|
hexmask.long.byte 0x10 0.--7. 1. " MTU1PCELLID0 ,MTU1 PCell ID0 (0x0D)"
|
|
line.long 0x14 "MTU1PCELLID1,MTU1 PCell Identification Register 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " MTU1PCELLID1 ,MTU1 PCell ID1 (0xF0)"
|
|
line.long 0x18 "MTU1PCELLID2,MTU1 PCell Identification Register 2"
|
|
hexmask.long.byte 0x18 0.--7. 1. " MTU1PCELLID2 ,MTU1 PCell ID2 (0x05)"
|
|
line.long 0x1c "MTU1PCELLID3,MTU1 PCell Identification Register 3"
|
|
hexmask.long.byte 0x1c 0.--7. 1. " MTU1PCELLID3 ,MTU1 PCell ID3 (0xB1)"
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree "WDT (Watchdog Timer)"
|
|
base asd:0x101E1000
|
|
width 10.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "WDT_LR,Watchdog Load Register"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "WDT_VAL,Watchdog Value Register"
|
|
group.long 0x08++0x07
|
|
line.long 0x00 "WDT_CR,Watchdog Control Register"
|
|
bitfld.long 0x00 1. " RESEN ,Watchdog Reset Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " INTEN ,Watchdog Interrupt Enable" "Disabled,Enabled"
|
|
line.long 0x04 "WDT_ICR,Watchdog Interrupt Clear Register"
|
|
rgroup.long 0x10++0x07
|
|
line.long 0x00 "WDT_RIS,Watchdog Raw Interrupt Status Register"
|
|
bitfld.long 0x00 0. " WDTRIS ,Watchdog Raw Interrupt Status" "No interrupt,Interrupt"
|
|
line.long 0x04 "WDT_MIS,Watchdog Masked Interrupt Status Register"
|
|
bitfld.long 0x04 0. " WDTMIS ,Watchdog Masked Interrupt Status" "No interrupt,Interrupt"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "WDT_LOCK,Watchdog Lock Register"
|
|
width 14.
|
|
rgroup.long 0xfe0++0x01f
|
|
line.long 0x00 "WDTPERIPHID0,WDT Peripheral Identification Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PN0 ,Part Number 0 (0x05)"
|
|
line.long 0x04 "WDTPERIPHID1,WDT Peripheral Identification Register 1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " D0 ,Designer 0 (0x1)"
|
|
hexmask.long.byte 0x04 0.--3. 1. " PN1 ,Part Number 1 (0x8)"
|
|
line.long 0x08 "WDTPERIPHID2,WDT Peripheral Identification Register 2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " REV ,Revision (0x00)"
|
|
hexmask.long.byte 0x08 0.--3. 1. " D1 ,Designer 1 (0x4)"
|
|
line.long 0x0c "WDTPERIPHID3,WDT Peripheral Identification Register 3"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " CONF ,Configuration (0x00)"
|
|
line.long 0x10 "WDTPCELLID0,WDT PCell Identification Register 0"
|
|
hexmask.long.byte 0x10 0.--7. 1. " WDTPCELLID0 ,WDT PCell ID0 (0x0D)"
|
|
line.long 0x14 "WDTPCELLID1,WDT PCell Identification Register 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " WDTPCELLID1 ,WDT PCell ID1 (0xF0)"
|
|
line.long 0x18 "WDTPCELLID2,WDT PCell Identification Register 2"
|
|
hexmask.long.byte 0x18 0.--7. 1. " WDTPCELLID2 ,WDT PCell ID2 (0x05)"
|
|
line.long 0x1c "WDTPCELLID3,WDT PCell Identification Register 3"
|
|
hexmask.long.byte 0x1c 0.--7. 1. " WDTPCELLID3 ,WDT PCell ID3 (0xB1)"
|
|
width 0xb
|
|
tree.end
|
|
sif ((cpu()=="STA2065")||(cpu()=="STA2165"))
|
|
tree "FSMC (Flexible Static Memory Controller)"
|
|
base asd:0x10100000
|
|
width 15.
|
|
group.long 0x0++0x07
|
|
line.long 0x00 "FSMC_BCR0,SRAM/NOR-Flash chip-select control registers 0"
|
|
bitfld.long 0x00 13. " WAITEN ,Wait enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " WREN ,Write enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " WAITCFG ,Wait timing configuration" "1 data cycle before wait-state,During wait-state"
|
|
bitfld.long 0x00 10. " WRAPMOD ,Wrapped burst mode support" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " WAITPOL ,Wait signal polarity bit" "Low,High"
|
|
bitfld.long 0x00 8. " BURSTEN ,Burst enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FWPRLVL ,Flash write protection pin level" "Low,High"
|
|
bitfld.long 0x00 6. " FRSTLVL ,Flash reset pin level" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " MWID ,Memory data bus width" "8 bits,16 bits,?..."
|
|
bitfld.long 0x00 2.--3. " MTYP ,Memory type" "SRAM/ROM,Reserved,NOR Flash,?..."
|
|
textline " "
|
|
bitfld.long 0x00 1. " MUXEN ,Address/data multiplexing enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " MBKEN ,Memory chip-select enable bit" "Disabled,Enabled"
|
|
line.long 0x04 "FSMC_BTR0,SRAM/NOR-Flash chip-select timing registers 0"
|
|
bitfld.long 0x04 24.--27. " DATLAT ,Data latency" "2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles"
|
|
bitfld.long 0x04 20.--23. " CLKDIV ,Clock divide ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
textline " "
|
|
bitfld.long 0x04 16.--19. " BUSTURN ,Bus turn-around phase duration" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
hexmask.long.byte 0x04 8.--15. 1. " DATAST ,Data-phase duration"
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " ADDHLD ,Address-hold phase duration" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
bitfld.long 0x04 0.--3. " ADDSET ,Address setup phase duration" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
group.long 0x8++0x07
|
|
line.long 0x00 "FSMC_BCR1,SRAM/NOR-Flash chip-select control registers 1"
|
|
bitfld.long 0x00 13. " WAITEN ,Wait enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " WREN ,Write enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " WAITCFG ,Wait timing configuration" "1 data cycle before wait-state,During wait-state"
|
|
bitfld.long 0x00 10. " WRAPMOD ,Wrapped burst mode support" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " WAITPOL ,Wait signal polarity bit" "Low,High"
|
|
bitfld.long 0x00 8. " BURSTEN ,Burst enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FWPRLVL ,Flash write protection pin level" "Low,High"
|
|
bitfld.long 0x00 6. " FRSTLVL ,Flash reset pin level" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " MWID ,Memory data bus width" "8 bits,16 bits,?..."
|
|
bitfld.long 0x00 2.--3. " MTYP ,Memory type" "SRAM/ROM,Reserved,NOR Flash,?..."
|
|
textline " "
|
|
bitfld.long 0x00 1. " MUXEN ,Address/data multiplexing enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " MBKEN ,Memory chip-select enable bit" "Disabled,Enabled"
|
|
line.long 0x04 "FSMC_BTR1,SRAM/NOR-Flash chip-select timing registers 1"
|
|
bitfld.long 0x04 24.--27. " DATLAT ,Data latency" "2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles"
|
|
bitfld.long 0x04 20.--23. " CLKDIV ,Clock divide ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
textline " "
|
|
bitfld.long 0x04 16.--19. " BUSTURN ,Bus turn-around phase duration" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
hexmask.long.byte 0x04 8.--15. 1. " DATAST ,Data-phase duration"
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " ADDHLD ,Address-hold phase duration" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
bitfld.long 0x04 0.--3. " ADDSET ,Address setup phase duration" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "FSMC_BCR2,SRAM/NOR-Flash chip-select control registers 2"
|
|
bitfld.long 0x00 13. " WAITEN ,Wait enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " WREN ,Write enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " WAITCFG ,Wait timing configuration" "1 data cycle before wait-state,During wait-state"
|
|
bitfld.long 0x00 10. " WRAPMOD ,Wrapped burst mode support" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " WAITPOL ,Wait signal polarity bit" "Low,High"
|
|
bitfld.long 0x00 8. " BURSTEN ,Burst enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FWPRLVL ,Flash write protection pin level" "Low,High"
|
|
bitfld.long 0x00 6. " FRSTLVL ,Flash reset pin level" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " MWID ,Memory data bus width" "8 bits,16 bits,?..."
|
|
bitfld.long 0x00 2.--3. " MTYP ,Memory type" "SRAM/ROM,Reserved,NOR Flash,?..."
|
|
textline " "
|
|
bitfld.long 0x00 1. " MUXEN ,Address/data multiplexing enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " MBKEN ,Memory chip-select enable bit" "Disabled,Enabled"
|
|
line.long 0x04 "FSMC_BTR2,SRAM/NOR-Flash chip-select timing registers 2"
|
|
bitfld.long 0x04 24.--27. " DATLAT ,Data latency" "2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles"
|
|
bitfld.long 0x04 20.--23. " CLKDIV ,Clock divide ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
textline " "
|
|
bitfld.long 0x04 16.--19. " BUSTURN ,Bus turn-around phase duration" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
hexmask.long.byte 0x04 8.--15. 1. " DATAST ,Data-phase duration"
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " ADDHLD ,Address-hold phase duration" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
bitfld.long 0x04 0.--3. " ADDSET ,Address setup phase duration" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles"
|
|
width 15.
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "FSMC_PCR0,PC-Card/NAND-Flash control register 0"
|
|
bitfld.long 0x00 8. " ADLOW ,Address low bit delivery" "Direct mapping,Low address bit"
|
|
bitfld.long 0x00 7. " ECCPLEN ,ECC page length" "512 bytes,256 bytes"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ECCEN ,ECC computation logic enable bit" "Disabled&Reset,Enabled"
|
|
bitfld.long 0x00 4.--5. " PWID ,NAND-Flash data bus width" "8 bits,16 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x00 3. " PTYP ,Memory type" "PC-Card/CompactFlash/CF+ or PCMCIA,NAND-Flash"
|
|
bitfld.long 0x00 2. " PBKEN ,PC-Card/NAND-Flash chip-select enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PWAITEN ,Wait feature enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PRSTLVL ,PC-Card reset pin level" "Low,High"
|
|
group.long (0x40+0x08)++0x0b
|
|
line.long 0x00 "FSMC_PMEM0,Common memory space timing register 0"
|
|
hexmask.long.byte 0x00 24.--31. 1. " MEMHIZ0 ,Common memory 0 data bus HiZ time"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MEMHOLD0 ,Common memory 0 hold time"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " MEMWAIT0 ,Common memory 0 wait time"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MEMSET0 ,Common memory 0 set up time"
|
|
line.long 0x04 "FSMC_PATT0,Attribute memory space timing registers 0"
|
|
hexmask.long.byte 0x04 24.--31. 1. " ATTHIZ0 ,Attribute memory 0 data bus HiZ time"
|
|
hexmask.long.byte 0x04 16.--23. 1. " ATTHOLD0 ,Attribute memory 0 hold time"
|
|
textline " "
|
|
hexmask.long.byte 0x04 8.--15. 1. " ATTWAIT0 ,Attribute memory 0 wait time"
|
|
hexmask.long.byte 0x04 0.--7. 1. " ATTSET0 ,Attribute memory 0 set up time"
|
|
line.long 0x08 "FSMC_PIO0,I/O space timing registers 0"
|
|
hexmask.long.byte 0x08 24.--31. 1. " IOHIZ0 ,I/O 0 data bus HiZ time"
|
|
hexmask.long.byte 0x08 16.--23. 1. " IOHOLD0 ,I/O 0 hold time"
|
|
textline " "
|
|
hexmask.long.byte 0x08 8.--15. 1. " IOWAIT0 ,I/O 0 wait time"
|
|
hexmask.long.byte 0x08 0.--7. 1. " IOSET0 ,I/O 0 set up time"
|
|
hgroup.long (0x40+0x14)++0x03
|
|
hide.long 0x00 "FSMC_ECCR0,ECC result registers 0"
|
|
in
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "FSMC_PCR1,PC-Card/NAND-Flash control register 1"
|
|
bitfld.long 0x00 8. " ADLOW ,Address low bit delivery" "Direct mapping,Low address bit"
|
|
bitfld.long 0x00 7. " ECCPLEN ,ECC page length" "512 bytes,256 bytes"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ECCEN ,ECC computation logic enable bit" "Disabled&Reset,Enabled"
|
|
bitfld.long 0x00 4.--5. " PWID ,NAND-Flash data bus width" "8 bits,16 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x00 3. " PTYP ,Memory type" "PC-Card/CompactFlash/CF+ or PCMCIA,NAND-Flash"
|
|
bitfld.long 0x00 2. " PBKEN ,PC-Card/NAND-Flash chip-select enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PWAITEN ,Wait feature enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PRSTLVL ,PC-Card reset pin level" "Low,High"
|
|
group.long (0x60+0x08)++0x0b
|
|
line.long 0x00 "FSMC_PMEM1,Common memory space timing register 1"
|
|
hexmask.long.byte 0x00 24.--31. 1. " MEMHIZ1 ,Common memory 1 data bus HiZ time"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MEMHOLD1 ,Common memory 1 hold time"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " MEMWAIT1 ,Common memory 1 wait time"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MEMSET1 ,Common memory 1 set up time"
|
|
line.long 0x04 "FSMC_PATT1,Attribute memory space timing registers 1"
|
|
hexmask.long.byte 0x04 24.--31. 1. " ATTHIZ1 ,Attribute memory 1 data bus HiZ time"
|
|
hexmask.long.byte 0x04 16.--23. 1. " ATTHOLD1 ,Attribute memory 1 hold time"
|
|
textline " "
|
|
hexmask.long.byte 0x04 8.--15. 1. " ATTWAIT1 ,Attribute memory 1 wait time"
|
|
hexmask.long.byte 0x04 0.--7. 1. " ATTSET1 ,Attribute memory 1 set up time"
|
|
line.long 0x08 "FSMC_PIO1,I/O space timing registers 1"
|
|
hexmask.long.byte 0x08 24.--31. 1. " IOHIZ1 ,I/O 1 data bus HiZ time"
|
|
hexmask.long.byte 0x08 16.--23. 1. " IOHOLD1 ,I/O 1 hold time"
|
|
textline " "
|
|
hexmask.long.byte 0x08 8.--15. 1. " IOWAIT1 ,I/O 1 wait time"
|
|
hexmask.long.byte 0x08 0.--7. 1. " IOSET1 ,I/O 1 set up time"
|
|
hgroup.long (0x60+0x14)++0x03
|
|
hide.long 0x00 "FSMC_ECCR1,ECC result registers 1"
|
|
in
|
|
width 15.
|
|
rgroup.long 0xfe0++0x1f
|
|
line.long 0x00 "FSMCPERIPHID0,FSMC peripheral identification register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PARTNUMBER0 ,Part Number 0"
|
|
line.long 0x04 "FSMCPERIPHID1,FSMC peripheral identification register 1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " DESIGNER0 ,Designer 0"
|
|
hexmask.long.byte 0x04 0.--3. 1. " PARTNUMBER1 ,Part Number 1"
|
|
line.long 0x08 "FSMCPERIPHID2,FSMC peripheral identification register 2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " REVISION ,Revision"
|
|
hexmask.long.byte 0x08 0.--3. 1. " DESIGNER1 ,Designer 1"
|
|
line.long 0x0c "FSMCPERIPHID3,FSMC peripheral identification register 3"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " CONFIGURATION ,Configuration"
|
|
line.long 0x10 "FSMCPCELLID0,FSMC PCell identification register 0"
|
|
hexmask.long.byte 0x10 0.--7. 1. " FSMCPCELLID0 ,FSMC PCell Identification 0"
|
|
line.long 0x14 "FSMCPCELLID1,FSMC PCell identification register 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " FSMCPCELLID1 ,FSMC PCell Identification 1"
|
|
line.long 0x18 "FSMCPCELLID2,FSMC PCell identification register 2"
|
|
hexmask.long.byte 0x18 0.--7. 1. " FSMCPCELLID2 ,FSMC PCell Identification 2"
|
|
line.long 0x1C "FSMCPCELLID3,FSMC PCell identification register 3"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " FSMCPCELLID3 ,FSMC PCell Identification 3"
|
|
width 0xb
|
|
tree.end
|
|
endif
|
|
tree.open "SDI (SD-Card Host Interface)"
|
|
tree "SDI0"
|
|
base asd:0x101F6000
|
|
width 13.
|
|
group.long 0x00++0x0f
|
|
line.long 0x00 "SDI_PWR,SDI Power Control Register"
|
|
bitfld.long 0x00 9. " RSTNEN ,HW reset enable for eMMC4.4" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " DAT74DIREN ,SDIDAT31DIR Feedback Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FBCLKEN ,Feedback Clock Enable" "SDICLK,SDIFBCLK"
|
|
bitfld.long 0x00 6. " OPD ,SDICMD Output Control" "Push-Pull,Open-Drain"
|
|
textline " "
|
|
bitfld.long 0x00 5. " DAT31DIREN ,SDIDAT31DIR Feedback Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " DAT0DIREN ,SDIDAT0DIR Feedback Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CMDDIREN ,SDICMDDIR Feedback Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DAT2DIREN ,SDIDAT2DIR Feedback Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " PWRCTRL ,Power Supply Control" "Off,Reserved,Reserved,On"
|
|
line.long 0x04 "SDI_CLKCR,SDI Clock Control Register"
|
|
bitfld.long 0x04 15. " CLKOUT_INV ,SDICLK inversion enable" "Inverted,Not inverted"
|
|
bitfld.long 0x04 14. " HWFC_EN ,HW Flow Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 13. " NEGEDGE ,SDICLK dephasing selection" "Falling edge,Rising edge"
|
|
bitfld.long 0x04 11.--12. " WIDBUS ,Wide Bus Mode Enable" "SDIDAT[0],SDIDAT[3:0],SDIDAT[7:0],?..."
|
|
textline " "
|
|
bitfld.long 0x04 10. " BYPASS ,Clock Divider Bypass enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " PWRSAV ,Power Saving configuration" "Always,When active"
|
|
textline " "
|
|
hexmask.long.byte 0x04 0.--7. 1. " CLKDIV ,Clock Divide factor"
|
|
line.long 0x08 "SDI_ARG,SDI Argument Register"
|
|
line.long 0x0c "SDI_CMD,SDI Command Register"
|
|
bitfld.long 0x0c 15. " CBOOTMODEEN ,Enable CPSM Boot Mode" "Disabled,Enabled"
|
|
bitfld.long 0x0C 14. " CE-ATA_CMD ,CE-ATA command" "Not transferred,Transferred"
|
|
textline " "
|
|
bitfld.long 0x0C 13. " NIEN ,Not Interrupt ENABLE" "No,Yes"
|
|
bitfld.long 0x0C 12. " ENCMD_COMPL ,Enable CMD completion" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 11. " SDIO_SUSPEND ,SDIO Suspend Command" "Not suspended,Suspended"
|
|
bitfld.long 0x0C 10. " CPSMEN ,Command Path State Machine (CPSM) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 9. " WAITPEND ,CPSM Waits for ends of data transfer" "Disabled,Enabled"
|
|
bitfld.long 0x0C 8. " WAITINT ,CPSM Waits for Interrupt Request" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " LONGRESP ,Long Response configuration" "Short,Long"
|
|
bitfld.long 0x0C 6. " WAITRESP ,CPSM Waits for a Response" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 0.--5. " CMDINDEX ,Command Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "SDI_RESPCMD,SDI Command Response Register"
|
|
bitfld.long 0x00 0.--5. " RESPCMD ,Response Command Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
if (((data.long(asd:0x101F6000+0x0c))&0x80)==0x00)
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "SDI_RESP0,SDI Response Registers 0"
|
|
else
|
|
rgroup.long 0x14++0x0f
|
|
line.long 0x0 "SDI_RESP0,SDI Response Registers 0"
|
|
line.long 0x4 "SDI_RESP1,SDI Response Registers 1"
|
|
line.long 0x8 "SDI_RESP2,SDI Response Registers 2"
|
|
line.long 0xC "SDI_RESP3,SDI Response Registers 3"
|
|
endif
|
|
group.long 0x24++0x0b
|
|
line.long 0x00 "SDI_DTIMER,SDI Data Timer Register"
|
|
line.long 0x04 "SDI_DLEN,SDI Data Length Register"
|
|
hexmask.long 0x04 0.--24. 1. " DATALENGTH ,Data Length Value"
|
|
line.long 0x08 "SDI_DCTRL,SDI Data Control Register"
|
|
bitfld.long 0x08 15. " DDR_MODE ,Enable DDR mode" "Disabled,Enabled"
|
|
bitfld.long 0x08 14. " BUSYMODE ,Enable card busy detection on DAT[0] line" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 13. " DBOOTMODEEN ,Enable DPSM Boot Mode" "Disabled,Enabled"
|
|
bitfld.long 0x08 12. " DMAREQCTL ,DMA Requests Control" "SREQ,LBREQ"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SDIOEN ,SDIO Enable functions" "Disabled,Enabled"
|
|
bitfld.long 0x08 10. " RWMOD ,Read Wait Mode" "SDIDAT[2],SDICLK"
|
|
textline " "
|
|
bitfld.long 0x08 9. " RWSTOP ,Read Wait Stop" "Not stopped,Stopped"
|
|
bitfld.long 0x08 8. " RWSTART ,Read Wait Start" "Not started,Started"
|
|
textline " "
|
|
bitfld.long 0x08 4.--7. " DBLOCKSIZE ,Data Block Size" "1 byte,2 bytes,4 bytes,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1024 bytes,2048 bytes,4096 bytes,8192 bytes,16384 bytes,?..."
|
|
bitfld.long 0x08 3. " DMAEN ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 2. " DTMODE ,Data Transfer Mode selection" "Block,Stream"
|
|
bitfld.long 0x08 1. " DTDIR ,Data Transfer Direction selection" "controller -> card,card -> controller"
|
|
textline " "
|
|
bitfld.long 0x08 0. " DTEN ,Data Transfer Enabled" "Disabled,Enabled"
|
|
rgroup.long 0x30++0x03
|
|
line.long 0x00 "SDI_DCOUNT,SDI Data Counter Register"
|
|
hexmask.long 0x00 0.--24. 1. " DATACOUNT ,Data Count Value"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "SDI_STA,SDI Status Register"
|
|
bitfld.long 0x00 28. " RSTNEND ,SDIRSTN is de-asserted" "Asserted,De-asserted"
|
|
bitfld.long 0x00 27. " BOOTACKTIMEOUT ,Boot Acknowledge Timeout" "No timeout,Timeout"
|
|
textline " "
|
|
bitfld.long 0x00 26. " BOOTACKERR ,Boot Acknowledge valid" "Not valid,Valid"
|
|
bitfld.long 0x00 25. " BOOTMODE ,Boot Mode" "Not entered,Entered"
|
|
textline " "
|
|
bitfld.long 0x00 24. " CARDBUSY ,Card busy" "Not busy,Busy"
|
|
bitfld.long 0x00 23. " CEATAEND ,CE-ATA command completion signal received" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x00 22. " SDIOIT ,SDIO Interrupt received" "Not received,Received"
|
|
bitfld.long 0x00 21. " RXDAVL ,Data available in receive FIFO" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 20. " TXDAVL ,Data available in transmit FIFO" "Not available,Available"
|
|
bitfld.long 0x00 19. " RXFIFOE ,Receive FIFO Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 18. " TXFIFOE ,Transmit FIFO Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 17. " RXFIFOF ,Receive FIFO Full" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 16. " TXFIFOF ,Transmit FIFO Full" "Not full,Full"
|
|
bitfld.long 0x00 15. " RXFIFOBR ,Receive FIFO Burst Readable" "Not Readable,Readable"
|
|
textline " "
|
|
bitfld.long 0x00 14. " TXFIFOBW ,Transmit FIFO Burst Writable" "Not Writable,Writable"
|
|
bitfld.long 0x00 13. " RXACT ,Data receive in progress" "Completed,In progress"
|
|
textline " "
|
|
bitfld.long 0x00 12. " TXACT ,Data transmit in progress" "Completed,In progress"
|
|
bitfld.long 0x00 11. " CMDACT ,Command transfer in progress" "Completed,In progress"
|
|
textline " "
|
|
bitfld.long 0x00 10. " DBCKEND ,Data Block sent/received" "CRC not passed,CRC passed"
|
|
bitfld.long 0x00 9. " STBITERR ,Start Bit not detected on all data signals in wide bus mode" "Detected,Not detected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " DATAEND ,Data End " "No End,End"
|
|
bitfld.long 0x00 7. " CMDSENT ,Command Sent" "Not sent,Sent"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CMDREND ,Command Response received" "Not received,Received"
|
|
bitfld.long 0x00 5. " RXOVERR ,Received FIFO Overrun error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TXUNDERR ,Transmit FIFO Underrun error" "No error,Error"
|
|
bitfld.long 0x00 3. " DTIMEOUT ,Data Time-out" "No time-out,Time-out"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CTIMEOUT ,Command Response Time-out" "No response,Response"
|
|
bitfld.long 0x00 1. " DCRCFAIL ,Data block sent/received" "CRC ok,CRC failed"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CCRCFAIL ,Command Response received" "CRC ok,CRC failed"
|
|
width 13.
|
|
wgroup.long 0x38++0x03
|
|
line.long 0x00 "SDI_ICR,SDI Interrupt Clear Register"
|
|
bitfld.long 0x00 28. " RSTNENDC ,RSTNEND flag Clear" "No effect,Clear"
|
|
bitfld.long 0x00 27. " BOOTACKTIMEOUTC ,BootTimeout flag Clear" "No effect,Clear"
|
|
bitfld.long 0x00 26. " BOOTACKERRC ,BootAckErr flag Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 24. " BUSYENDC ,BUSYEND clear bit" "No effect,Clear"
|
|
bitfld.long 0x00 23. " CEATAENDC ,CEATAEND flag Clear" "No effect,Clear"
|
|
bitfld.long 0x00 22. " SDIOITC ,SDIOIT flag Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 10. " DBCKENDC ,DBCKEND flag Clear" "No effect,Clear"
|
|
bitfld.long 0x00 9. " STBITERRC ,STBITERR flag Clear" "No effect,Clear"
|
|
bitfld.long 0x00 8. " DATAENDC ,DATAENDC flag Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CMDSENTC ,CMDSENT flag Clear" "No effect,Clear"
|
|
bitfld.long 0x00 6. " CMDRENDC ,CMDREND flag Clear" "No effect,Clear"
|
|
bitfld.long 0x00 5. " RXOVERRC ,RXOVERR flag Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TXUNDERRC ,TXUNDERR flag Clear" "No effect,Clear"
|
|
bitfld.long 0x00 3. " DTIMEOUTC ,DTIMEOUT flag Clear" "No effect,Clear"
|
|
bitfld.long 0x00 2. " CTIMEOUTC ,CTIMEOUT flag Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DCRCFAIL ,DCRCFAIL flag Clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CCRCFAIL ,CCRCFAIL flag Clear" "No effect,Clear"
|
|
group.long 0x3c++0x03
|
|
line.long 0x00 "SDI_MASK,SDI Mask Register"
|
|
bitfld.long 0x00 28. " MASK28 ,SDIRSTN is de-asserted mask" "Masked,Not masked"
|
|
bitfld.long 0x00 27. " MASK27 ,Boot Acknowledge Timeout mask" "Masked,Not masked"
|
|
bitfld.long 0x00 26. " MASK26 ,Boot Acknowledge is not valid mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " MASK25 ,Boot Mode mask" "Masked,Not masked"
|
|
bitfld.long 0x00 24. " MASK24 ,Card busy mask" "Masked,Not masked"
|
|
bitfld.long 0x00 23. " MASK23 ,CE-ATA command completion signal received mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " MASK22 ,SDIO Interrupt received mask" "Masked,Not masked"
|
|
bitfld.long 0x00 21. " MASK21 ,Data available in receive FIFO mask" "Masked,Not masked"
|
|
bitfld.long 0x00 20. " MASK20 ,Data available in transmit FIFO mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " MASK19 ,Receive FIFO Empty mask" "Masked,Not masked"
|
|
bitfld.long 0x00 18. " MASK18 ,Transmit FIFO Empty mask" "Masked,Not masked"
|
|
bitfld.long 0x00 17. " MASK17 ,Receive FIFO Full mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " MASK16 ,Transmit FIFO Full mask" "Masked,Not masked"
|
|
bitfld.long 0x00 15. " MASK15 ,Receive FIFO Burst Readable mask" "Masked,Not masked"
|
|
bitfld.long 0x00 14. " MASK14 ,Transmit FIFO Burst Writable mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " MASK13 ,Data receive in progress mask" "Masked,Not masked"
|
|
bitfld.long 0x00 12. " MASK12 ,Data transmit in progress mask" "Masked,Not masked"
|
|
bitfld.long 0x00 11. " MASK11 ,Command transfer in progress mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " MASK10 ,Data Block sent/received mask" "Masked,Not masked"
|
|
bitfld.long 0x00 9. " MASK9 ,Start Bit not detected on all data signals in wide bus mode mask" "Masked,Not masked"
|
|
bitfld.long 0x00 8. " MASK8 ,Data End mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " MASK7 ,Command Sent mask" "Masked,Not masked"
|
|
bitfld.long 0x00 6. " MASK6 ,Command Response received mask" "Masked,Not masked"
|
|
bitfld.long 0x00 5. " MASK5 ,Received FIFO Overrun error mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MASK4 ,Transmit FIFO Underrun error mask" "Masked,Not masked"
|
|
bitfld.long 0x00 3. " MASK3 ,Data Time-out mask" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " MASK2 ,Command Response Time-out mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " MASK1 ,Data block sent/received mask" "Masked,Not masked"
|
|
bitfld.long 0x00 0. " MASK0 ,Command Response received mask" "Masked,Not masked"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "SDI_CSEL,SDI Card Select Register"
|
|
bitfld.long 0x00 0.--3. " SDCARD ,Secure digital memory card address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x48++0x03
|
|
line.long 0x00 "SDI_FIFOCNT,SDI FIFO Counter Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " DATACOUNT ,Remaining number of words to be written to or read from the FIFO"
|
|
group.long 0x80++0x3f
|
|
line.long 0x0 "SDI_FIFO0,SDI Data FIFO Register 0"
|
|
line.long 0x4 "SDI_FIFO1,SDI Data FIFO Register 1"
|
|
line.long 0x8 "SDI_FIFO2,SDI Data FIFO Register 2"
|
|
line.long 0xC "SDI_FIFO3,SDI Data FIFO Register 3"
|
|
line.long 0x10 "SDI_FIFO4,SDI Data FIFO Register 4"
|
|
line.long 0x14 "SDI_FIFO5,SDI Data FIFO Register 5"
|
|
line.long 0x18 "SDI_FIFO6,SDI Data FIFO Register 6"
|
|
line.long 0x1C "SDI_FIFO7,SDI Data FIFO Register 7"
|
|
line.long 0x20 "SDI_FIFO8,SDI Data FIFO Register 8"
|
|
line.long 0x24 "SDI_FIFO9,SDI Data FIFO Register 9"
|
|
line.long 0x28 "SDI_FIFO10,SDI Data FIFO Register 10"
|
|
line.long 0x2C "SDI_FIFO11,SDI Data FIFO Register 11"
|
|
line.long 0x30 "SDI_FIFO12,SDI Data FIFO Register 12"
|
|
line.long 0x34 "SDI_FIFO13,SDI Data FIFO Register 13"
|
|
line.long 0x38 "SDI_FIFO14,SDI Data FIFO Register 14"
|
|
line.long 0x3C "SDI_FIFO15,SDI Data FIFO Register 15"
|
|
group.long 0xc0++0x07
|
|
line.long 0x00 "SDI_DBTIMER,SDI Boot Acknowledge Timer Register"
|
|
line.long 0x04 "SDI_TRSCA,SDI TRSCA Timer Register"
|
|
width 14.
|
|
rgroup.long 0xfe0++0x01f
|
|
line.long 0x00 "SDIPERIPHID0,SDI Peripheral Identification Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PN0 ,Part Number 0 (0x80)"
|
|
line.long 0x04 "SDIPERIPHID1,SDI Peripheral Identification Register 1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " D0 ,Designer 0 (0x00)"
|
|
hexmask.long.byte 0x04 0.--3. 1. " PN1 ,Part Number 1 (0x01)"
|
|
line.long 0x08 "SDIPERIPHID2,SDI Peripheral Identification Register 2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " REV ,Revision (0x04)"
|
|
hexmask.long.byte 0x08 0.--3. 1. " D1 ,Designer 1 (0x08)"
|
|
line.long 0x0c "SDIPERIPHID3,SDI Peripheral Identification Register 3"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " CONF ,Configuration (0x00)"
|
|
line.long 0x10 "SDIPCELLID0,SDI PCell Identification Register 0"
|
|
hexmask.long.byte 0x10 0.--7. 1. " SDIPCELLID0 ,SDI PCell ID0 (0x0D)"
|
|
line.long 0x14 "SDIPCELLID1,SDI PCell Identification Register 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " SDIPCELLID1 ,SDI PCell ID1 (0xF0)"
|
|
line.long 0x18 "SDIPCELLID2,SDI PCell Identification Register 2"
|
|
hexmask.long.byte 0x18 0.--7. 1. " SDIPCELLID2 ,SDI PCell ID2 (0x05)"
|
|
line.long 0x1c "SDIPCELLID3,SDI PCell Identification Register 3"
|
|
hexmask.long.byte 0x1c 0.--7. 1. " SDIPCELLID3 ,SDI PCell ID3 (0xB1)"
|
|
width 0xb
|
|
tree.end
|
|
tree "SDI1"
|
|
base asd:0x101F5000
|
|
width 13.
|
|
group.long 0x00++0x0f
|
|
line.long 0x00 "SDI_PWR,SDI Power Control Register"
|
|
bitfld.long 0x00 9. " RSTNEN ,HW reset enable for eMMC4.4" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " DAT74DIREN ,SDIDAT31DIR Feedback Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FBCLKEN ,Feedback Clock Enable" "SDICLK,SDIFBCLK"
|
|
bitfld.long 0x00 6. " OPD ,SDICMD Output Control" "Push-Pull,Open-Drain"
|
|
textline " "
|
|
bitfld.long 0x00 5. " DAT31DIREN ,SDIDAT31DIR Feedback Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " DAT0DIREN ,SDIDAT0DIR Feedback Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CMDDIREN ,SDICMDDIR Feedback Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DAT2DIREN ,SDIDAT2DIR Feedback Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " PWRCTRL ,Power Supply Control" "Off,Reserved,Reserved,On"
|
|
line.long 0x04 "SDI_CLKCR,SDI Clock Control Register"
|
|
bitfld.long 0x04 15. " CLKOUT_INV ,SDICLK inversion enable" "Inverted,Not inverted"
|
|
bitfld.long 0x04 14. " HWFC_EN ,HW Flow Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 13. " NEGEDGE ,SDICLK dephasing selection" "Falling edge,Rising edge"
|
|
bitfld.long 0x04 11.--12. " WIDBUS ,Wide Bus Mode Enable" "SDIDAT[0],SDIDAT[3:0],SDIDAT[7:0],?..."
|
|
textline " "
|
|
bitfld.long 0x04 10. " BYPASS ,Clock Divider Bypass enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " PWRSAV ,Power Saving configuration" "Always,When active"
|
|
textline " "
|
|
hexmask.long.byte 0x04 0.--7. 1. " CLKDIV ,Clock Divide factor"
|
|
line.long 0x08 "SDI_ARG,SDI Argument Register"
|
|
line.long 0x0c "SDI_CMD,SDI Command Register"
|
|
bitfld.long 0x0c 15. " CBOOTMODEEN ,Enable CPSM Boot Mode" "Disabled,Enabled"
|
|
bitfld.long 0x0C 14. " CE-ATA_CMD ,CE-ATA command" "Not transferred,Transferred"
|
|
textline " "
|
|
bitfld.long 0x0C 13. " NIEN ,Not Interrupt ENABLE" "No,Yes"
|
|
bitfld.long 0x0C 12. " ENCMD_COMPL ,Enable CMD completion" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 11. " SDIO_SUSPEND ,SDIO Suspend Command" "Not suspended,Suspended"
|
|
bitfld.long 0x0C 10. " CPSMEN ,Command Path State Machine (CPSM) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 9. " WAITPEND ,CPSM Waits for ends of data transfer" "Disabled,Enabled"
|
|
bitfld.long 0x0C 8. " WAITINT ,CPSM Waits for Interrupt Request" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " LONGRESP ,Long Response configuration" "Short,Long"
|
|
bitfld.long 0x0C 6. " WAITRESP ,CPSM Waits for a Response" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 0.--5. " CMDINDEX ,Command Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "SDI_RESPCMD,SDI Command Response Register"
|
|
bitfld.long 0x00 0.--5. " RESPCMD ,Response Command Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
if (((data.long(asd:0x101F5000+0x0c))&0x80)==0x00)
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "SDI_RESP0,SDI Response Registers 0"
|
|
else
|
|
rgroup.long 0x14++0x0f
|
|
line.long 0x0 "SDI_RESP0,SDI Response Registers 0"
|
|
line.long 0x4 "SDI_RESP1,SDI Response Registers 1"
|
|
line.long 0x8 "SDI_RESP2,SDI Response Registers 2"
|
|
line.long 0xC "SDI_RESP3,SDI Response Registers 3"
|
|
endif
|
|
group.long 0x24++0x0b
|
|
line.long 0x00 "SDI_DTIMER,SDI Data Timer Register"
|
|
line.long 0x04 "SDI_DLEN,SDI Data Length Register"
|
|
hexmask.long 0x04 0.--24. 1. " DATALENGTH ,Data Length Value"
|
|
line.long 0x08 "SDI_DCTRL,SDI Data Control Register"
|
|
bitfld.long 0x08 15. " DDR_MODE ,Enable DDR mode" "Disabled,Enabled"
|
|
bitfld.long 0x08 14. " BUSYMODE ,Enable card busy detection on DAT[0] line" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 13. " DBOOTMODEEN ,Enable DPSM Boot Mode" "Disabled,Enabled"
|
|
bitfld.long 0x08 12. " DMAREQCTL ,DMA Requests Control" "SREQ,LBREQ"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SDIOEN ,SDIO Enable functions" "Disabled,Enabled"
|
|
bitfld.long 0x08 10. " RWMOD ,Read Wait Mode" "SDIDAT[2],SDICLK"
|
|
textline " "
|
|
bitfld.long 0x08 9. " RWSTOP ,Read Wait Stop" "Not stopped,Stopped"
|
|
bitfld.long 0x08 8. " RWSTART ,Read Wait Start" "Not started,Started"
|
|
textline " "
|
|
bitfld.long 0x08 4.--7. " DBLOCKSIZE ,Data Block Size" "1 byte,2 bytes,4 bytes,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1024 bytes,2048 bytes,4096 bytes,8192 bytes,16384 bytes,?..."
|
|
bitfld.long 0x08 3. " DMAEN ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 2. " DTMODE ,Data Transfer Mode selection" "Block,Stream"
|
|
bitfld.long 0x08 1. " DTDIR ,Data Transfer Direction selection" "controller -> card,card -> controller"
|
|
textline " "
|
|
bitfld.long 0x08 0. " DTEN ,Data Transfer Enabled" "Disabled,Enabled"
|
|
rgroup.long 0x30++0x03
|
|
line.long 0x00 "SDI_DCOUNT,SDI Data Counter Register"
|
|
hexmask.long 0x00 0.--24. 1. " DATACOUNT ,Data Count Value"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "SDI_STA,SDI Status Register"
|
|
bitfld.long 0x00 28. " RSTNEND ,SDIRSTN is de-asserted" "Asserted,De-asserted"
|
|
bitfld.long 0x00 27. " BOOTACKTIMEOUT ,Boot Acknowledge Timeout" "No timeout,Timeout"
|
|
textline " "
|
|
bitfld.long 0x00 26. " BOOTACKERR ,Boot Acknowledge valid" "Not valid,Valid"
|
|
bitfld.long 0x00 25. " BOOTMODE ,Boot Mode" "Not entered,Entered"
|
|
textline " "
|
|
bitfld.long 0x00 24. " CARDBUSY ,Card busy" "Not busy,Busy"
|
|
bitfld.long 0x00 23. " CEATAEND ,CE-ATA command completion signal received" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x00 22. " SDIOIT ,SDIO Interrupt received" "Not received,Received"
|
|
bitfld.long 0x00 21. " RXDAVL ,Data available in receive FIFO" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 20. " TXDAVL ,Data available in transmit FIFO" "Not available,Available"
|
|
bitfld.long 0x00 19. " RXFIFOE ,Receive FIFO Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 18. " TXFIFOE ,Transmit FIFO Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 17. " RXFIFOF ,Receive FIFO Full" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 16. " TXFIFOF ,Transmit FIFO Full" "Not full,Full"
|
|
bitfld.long 0x00 15. " RXFIFOBR ,Receive FIFO Burst Readable" "Not Readable,Readable"
|
|
textline " "
|
|
bitfld.long 0x00 14. " TXFIFOBW ,Transmit FIFO Burst Writable" "Not Writable,Writable"
|
|
bitfld.long 0x00 13. " RXACT ,Data receive in progress" "Completed,In progress"
|
|
textline " "
|
|
bitfld.long 0x00 12. " TXACT ,Data transmit in progress" "Completed,In progress"
|
|
bitfld.long 0x00 11. " CMDACT ,Command transfer in progress" "Completed,In progress"
|
|
textline " "
|
|
bitfld.long 0x00 10. " DBCKEND ,Data Block sent/received" "CRC not passed,CRC passed"
|
|
bitfld.long 0x00 9. " STBITERR ,Start Bit not detected on all data signals in wide bus mode" "Detected,Not detected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " DATAEND ,Data End " "No End,End"
|
|
bitfld.long 0x00 7. " CMDSENT ,Command Sent" "Not sent,Sent"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CMDREND ,Command Response received" "Not received,Received"
|
|
bitfld.long 0x00 5. " RXOVERR ,Received FIFO Overrun error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TXUNDERR ,Transmit FIFO Underrun error" "No error,Error"
|
|
bitfld.long 0x00 3. " DTIMEOUT ,Data Time-out" "No time-out,Time-out"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CTIMEOUT ,Command Response Time-out" "No response,Response"
|
|
bitfld.long 0x00 1. " DCRCFAIL ,Data block sent/received" "CRC ok,CRC failed"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CCRCFAIL ,Command Response received" "CRC ok,CRC failed"
|
|
width 13.
|
|
wgroup.long 0x38++0x03
|
|
line.long 0x00 "SDI_ICR,SDI Interrupt Clear Register"
|
|
bitfld.long 0x00 28. " RSTNENDC ,RSTNEND flag Clear" "No effect,Clear"
|
|
bitfld.long 0x00 27. " BOOTACKTIMEOUTC ,BootTimeout flag Clear" "No effect,Clear"
|
|
bitfld.long 0x00 26. " BOOTACKERRC ,BootAckErr flag Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 24. " BUSYENDC ,BUSYEND clear bit" "No effect,Clear"
|
|
bitfld.long 0x00 23. " CEATAENDC ,CEATAEND flag Clear" "No effect,Clear"
|
|
bitfld.long 0x00 22. " SDIOITC ,SDIOIT flag Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 10. " DBCKENDC ,DBCKEND flag Clear" "No effect,Clear"
|
|
bitfld.long 0x00 9. " STBITERRC ,STBITERR flag Clear" "No effect,Clear"
|
|
bitfld.long 0x00 8. " DATAENDC ,DATAENDC flag Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CMDSENTC ,CMDSENT flag Clear" "No effect,Clear"
|
|
bitfld.long 0x00 6. " CMDRENDC ,CMDREND flag Clear" "No effect,Clear"
|
|
bitfld.long 0x00 5. " RXOVERRC ,RXOVERR flag Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TXUNDERRC ,TXUNDERR flag Clear" "No effect,Clear"
|
|
bitfld.long 0x00 3. " DTIMEOUTC ,DTIMEOUT flag Clear" "No effect,Clear"
|
|
bitfld.long 0x00 2. " CTIMEOUTC ,CTIMEOUT flag Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DCRCFAIL ,DCRCFAIL flag Clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CCRCFAIL ,CCRCFAIL flag Clear" "No effect,Clear"
|
|
group.long 0x3c++0x03
|
|
line.long 0x00 "SDI_MASK,SDI Mask Register"
|
|
bitfld.long 0x00 28. " MASK28 ,SDIRSTN is de-asserted mask" "Masked,Not masked"
|
|
bitfld.long 0x00 27. " MASK27 ,Boot Acknowledge Timeout mask" "Masked,Not masked"
|
|
bitfld.long 0x00 26. " MASK26 ,Boot Acknowledge is not valid mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " MASK25 ,Boot Mode mask" "Masked,Not masked"
|
|
bitfld.long 0x00 24. " MASK24 ,Card busy mask" "Masked,Not masked"
|
|
bitfld.long 0x00 23. " MASK23 ,CE-ATA command completion signal received mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " MASK22 ,SDIO Interrupt received mask" "Masked,Not masked"
|
|
bitfld.long 0x00 21. " MASK21 ,Data available in receive FIFO mask" "Masked,Not masked"
|
|
bitfld.long 0x00 20. " MASK20 ,Data available in transmit FIFO mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " MASK19 ,Receive FIFO Empty mask" "Masked,Not masked"
|
|
bitfld.long 0x00 18. " MASK18 ,Transmit FIFO Empty mask" "Masked,Not masked"
|
|
bitfld.long 0x00 17. " MASK17 ,Receive FIFO Full mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " MASK16 ,Transmit FIFO Full mask" "Masked,Not masked"
|
|
bitfld.long 0x00 15. " MASK15 ,Receive FIFO Burst Readable mask" "Masked,Not masked"
|
|
bitfld.long 0x00 14. " MASK14 ,Transmit FIFO Burst Writable mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " MASK13 ,Data receive in progress mask" "Masked,Not masked"
|
|
bitfld.long 0x00 12. " MASK12 ,Data transmit in progress mask" "Masked,Not masked"
|
|
bitfld.long 0x00 11. " MASK11 ,Command transfer in progress mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " MASK10 ,Data Block sent/received mask" "Masked,Not masked"
|
|
bitfld.long 0x00 9. " MASK9 ,Start Bit not detected on all data signals in wide bus mode mask" "Masked,Not masked"
|
|
bitfld.long 0x00 8. " MASK8 ,Data End mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " MASK7 ,Command Sent mask" "Masked,Not masked"
|
|
bitfld.long 0x00 6. " MASK6 ,Command Response received mask" "Masked,Not masked"
|
|
bitfld.long 0x00 5. " MASK5 ,Received FIFO Overrun error mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MASK4 ,Transmit FIFO Underrun error mask" "Masked,Not masked"
|
|
bitfld.long 0x00 3. " MASK3 ,Data Time-out mask" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " MASK2 ,Command Response Time-out mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " MASK1 ,Data block sent/received mask" "Masked,Not masked"
|
|
bitfld.long 0x00 0. " MASK0 ,Command Response received mask" "Masked,Not masked"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "SDI_CSEL,SDI Card Select Register"
|
|
bitfld.long 0x00 0.--3. " SDCARD ,Secure digital memory card address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x48++0x03
|
|
line.long 0x00 "SDI_FIFOCNT,SDI FIFO Counter Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " DATACOUNT ,Remaining number of words to be written to or read from the FIFO"
|
|
group.long 0x80++0x3f
|
|
line.long 0x0 "SDI_FIFO0,SDI Data FIFO Register 0"
|
|
line.long 0x4 "SDI_FIFO1,SDI Data FIFO Register 1"
|
|
line.long 0x8 "SDI_FIFO2,SDI Data FIFO Register 2"
|
|
line.long 0xC "SDI_FIFO3,SDI Data FIFO Register 3"
|
|
line.long 0x10 "SDI_FIFO4,SDI Data FIFO Register 4"
|
|
line.long 0x14 "SDI_FIFO5,SDI Data FIFO Register 5"
|
|
line.long 0x18 "SDI_FIFO6,SDI Data FIFO Register 6"
|
|
line.long 0x1C "SDI_FIFO7,SDI Data FIFO Register 7"
|
|
line.long 0x20 "SDI_FIFO8,SDI Data FIFO Register 8"
|
|
line.long 0x24 "SDI_FIFO9,SDI Data FIFO Register 9"
|
|
line.long 0x28 "SDI_FIFO10,SDI Data FIFO Register 10"
|
|
line.long 0x2C "SDI_FIFO11,SDI Data FIFO Register 11"
|
|
line.long 0x30 "SDI_FIFO12,SDI Data FIFO Register 12"
|
|
line.long 0x34 "SDI_FIFO13,SDI Data FIFO Register 13"
|
|
line.long 0x38 "SDI_FIFO14,SDI Data FIFO Register 14"
|
|
line.long 0x3C "SDI_FIFO15,SDI Data FIFO Register 15"
|
|
group.long 0xc0++0x07
|
|
line.long 0x00 "SDI_DBTIMER,SDI Boot Acknowledge Timer Register"
|
|
line.long 0x04 "SDI_TRSCA,SDI TRSCA Timer Register"
|
|
width 14.
|
|
rgroup.long 0xfe0++0x01f
|
|
line.long 0x00 "SDIPERIPHID0,SDI Peripheral Identification Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PN0 ,Part Number 0 (0x80)"
|
|
line.long 0x04 "SDIPERIPHID1,SDI Peripheral Identification Register 1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " D0 ,Designer 0 (0x00)"
|
|
hexmask.long.byte 0x04 0.--3. 1. " PN1 ,Part Number 1 (0x01)"
|
|
line.long 0x08 "SDIPERIPHID2,SDI Peripheral Identification Register 2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " REV ,Revision (0x04)"
|
|
hexmask.long.byte 0x08 0.--3. 1. " D1 ,Designer 1 (0x08)"
|
|
line.long 0x0c "SDIPERIPHID3,SDI Peripheral Identification Register 3"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " CONF ,Configuration (0x00)"
|
|
line.long 0x10 "SDIPCELLID0,SDI PCell Identification Register 0"
|
|
hexmask.long.byte 0x10 0.--7. 1. " SDIPCELLID0 ,SDI PCell ID0 (0x0D)"
|
|
line.long 0x14 "SDIPCELLID1,SDI PCell Identification Register 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " SDIPCELLID1 ,SDI PCell ID1 (0xF0)"
|
|
line.long 0x18 "SDIPCELLID2,SDI PCell Identification Register 2"
|
|
hexmask.long.byte 0x18 0.--7. 1. " SDIPCELLID2 ,SDI PCell ID2 (0x05)"
|
|
line.long 0x1c "SDIPCELLID3,SDI PCell Identification Register 3"
|
|
hexmask.long.byte 0x1c 0.--7. 1. " SDIPCELLID3 ,SDI PCell ID3 (0xB1)"
|
|
width 0xb
|
|
tree.end
|
|
sif ((cpu()=="STA2065")||(cpu()=="STA2165"))
|
|
tree "SDI2"
|
|
base asd:0x101C1000
|
|
width 13.
|
|
group.long 0x00++0x0f
|
|
line.long 0x00 "SDI_PWR,SDI Power Control Register"
|
|
bitfld.long 0x00 9. " RSTNEN ,HW reset enable for eMMC4.4" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " DAT74DIREN ,SDIDAT31DIR Feedback Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FBCLKEN ,Feedback Clock Enable" "SDICLK,SDIFBCLK"
|
|
bitfld.long 0x00 6. " OPD ,SDICMD Output Control" "Push-Pull,Open-Drain"
|
|
textline " "
|
|
bitfld.long 0x00 5. " DAT31DIREN ,SDIDAT31DIR Feedback Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " DAT0DIREN ,SDIDAT0DIR Feedback Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CMDDIREN ,SDICMDDIR Feedback Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DAT2DIREN ,SDIDAT2DIR Feedback Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " PWRCTRL ,Power Supply Control" "Off,Reserved,Reserved,On"
|
|
line.long 0x04 "SDI_CLKCR,SDI Clock Control Register"
|
|
bitfld.long 0x04 15. " CLKOUT_INV ,SDICLK inversion enable" "Inverted,Not inverted"
|
|
bitfld.long 0x04 14. " HWFC_EN ,HW Flow Control Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 13. " NEGEDGE ,SDICLK dephasing selection" "Falling edge,Rising edge"
|
|
bitfld.long 0x04 11.--12. " WIDBUS ,Wide Bus Mode Enable" "SDIDAT[0],SDIDAT[3:0],SDIDAT[7:0],?..."
|
|
textline " "
|
|
bitfld.long 0x04 10. " BYPASS ,Clock Divider Bypass enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " PWRSAV ,Power Saving configuration" "Always,When active"
|
|
textline " "
|
|
hexmask.long.byte 0x04 0.--7. 1. " CLKDIV ,Clock Divide factor"
|
|
line.long 0x08 "SDI_ARG,SDI Argument Register"
|
|
line.long 0x0c "SDI_CMD,SDI Command Register"
|
|
bitfld.long 0x0c 15. " CBOOTMODEEN ,Enable CPSM Boot Mode" "Disabled,Enabled"
|
|
bitfld.long 0x0C 14. " CE-ATA_CMD ,CE-ATA command" "Not transferred,Transferred"
|
|
textline " "
|
|
bitfld.long 0x0C 13. " NIEN ,Not Interrupt ENABLE" "No,Yes"
|
|
bitfld.long 0x0C 12. " ENCMD_COMPL ,Enable CMD completion" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 11. " SDIO_SUSPEND ,SDIO Suspend Command" "Not suspended,Suspended"
|
|
bitfld.long 0x0C 10. " CPSMEN ,Command Path State Machine (CPSM) Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 9. " WAITPEND ,CPSM Waits for ends of data transfer" "Disabled,Enabled"
|
|
bitfld.long 0x0C 8. " WAITINT ,CPSM Waits for Interrupt Request" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " LONGRESP ,Long Response configuration" "Short,Long"
|
|
bitfld.long 0x0C 6. " WAITRESP ,CPSM Waits for a Response" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 0.--5. " CMDINDEX ,Command Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "SDI_RESPCMD,SDI Command Response Register"
|
|
bitfld.long 0x00 0.--5. " RESPCMD ,Response Command Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
if (((data.long(asd:0x101C1000+0x0c))&0x80)==0x00)
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "SDI_RESP0,SDI Response Registers 0"
|
|
else
|
|
rgroup.long 0x14++0x0f
|
|
line.long 0x0 "SDI_RESP0,SDI Response Registers 0"
|
|
line.long 0x4 "SDI_RESP1,SDI Response Registers 1"
|
|
line.long 0x8 "SDI_RESP2,SDI Response Registers 2"
|
|
line.long 0xC "SDI_RESP3,SDI Response Registers 3"
|
|
endif
|
|
group.long 0x24++0x0b
|
|
line.long 0x00 "SDI_DTIMER,SDI Data Timer Register"
|
|
line.long 0x04 "SDI_DLEN,SDI Data Length Register"
|
|
hexmask.long 0x04 0.--24. 1. " DATALENGTH ,Data Length Value"
|
|
line.long 0x08 "SDI_DCTRL,SDI Data Control Register"
|
|
bitfld.long 0x08 15. " DDR_MODE ,Enable DDR mode" "Disabled,Enabled"
|
|
bitfld.long 0x08 14. " BUSYMODE ,Enable card busy detection on DAT[0] line" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 13. " DBOOTMODEEN ,Enable DPSM Boot Mode" "Disabled,Enabled"
|
|
bitfld.long 0x08 12. " DMAREQCTL ,DMA Requests Control" "SREQ,LBREQ"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SDIOEN ,SDIO Enable functions" "Disabled,Enabled"
|
|
bitfld.long 0x08 10. " RWMOD ,Read Wait Mode" "SDIDAT[2],SDICLK"
|
|
textline " "
|
|
bitfld.long 0x08 9. " RWSTOP ,Read Wait Stop" "Not stopped,Stopped"
|
|
bitfld.long 0x08 8. " RWSTART ,Read Wait Start" "Not started,Started"
|
|
textline " "
|
|
bitfld.long 0x08 4.--7. " DBLOCKSIZE ,Data Block Size" "1 byte,2 bytes,4 bytes,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1024 bytes,2048 bytes,4096 bytes,8192 bytes,16384 bytes,?..."
|
|
bitfld.long 0x08 3. " DMAEN ,DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 2. " DTMODE ,Data Transfer Mode selection" "Block,Stream"
|
|
bitfld.long 0x08 1. " DTDIR ,Data Transfer Direction selection" "controller -> card,card -> controller"
|
|
textline " "
|
|
bitfld.long 0x08 0. " DTEN ,Data Transfer Enabled" "Disabled,Enabled"
|
|
rgroup.long 0x30++0x03
|
|
line.long 0x00 "SDI_DCOUNT,SDI Data Counter Register"
|
|
hexmask.long 0x00 0.--24. 1. " DATACOUNT ,Data Count Value"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "SDI_STA,SDI Status Register"
|
|
bitfld.long 0x00 28. " RSTNEND ,SDIRSTN is de-asserted" "Asserted,De-asserted"
|
|
bitfld.long 0x00 27. " BOOTACKTIMEOUT ,Boot Acknowledge Timeout" "No timeout,Timeout"
|
|
textline " "
|
|
bitfld.long 0x00 26. " BOOTACKERR ,Boot Acknowledge valid" "Not valid,Valid"
|
|
bitfld.long 0x00 25. " BOOTMODE ,Boot Mode" "Not entered,Entered"
|
|
textline " "
|
|
bitfld.long 0x00 24. " CARDBUSY ,Card busy" "Not busy,Busy"
|
|
bitfld.long 0x00 23. " CEATAEND ,CE-ATA command completion signal received" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x00 22. " SDIOIT ,SDIO Interrupt received" "Not received,Received"
|
|
bitfld.long 0x00 21. " RXDAVL ,Data available in receive FIFO" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 20. " TXDAVL ,Data available in transmit FIFO" "Not available,Available"
|
|
bitfld.long 0x00 19. " RXFIFOE ,Receive FIFO Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 18. " TXFIFOE ,Transmit FIFO Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 17. " RXFIFOF ,Receive FIFO Full" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 16. " TXFIFOF ,Transmit FIFO Full" "Not full,Full"
|
|
bitfld.long 0x00 15. " RXFIFOBR ,Receive FIFO Burst Readable" "Not Readable,Readable"
|
|
textline " "
|
|
bitfld.long 0x00 14. " TXFIFOBW ,Transmit FIFO Burst Writable" "Not Writable,Writable"
|
|
bitfld.long 0x00 13. " RXACT ,Data receive in progress" "Completed,In progress"
|
|
textline " "
|
|
bitfld.long 0x00 12. " TXACT ,Data transmit in progress" "Completed,In progress"
|
|
bitfld.long 0x00 11. " CMDACT ,Command transfer in progress" "Completed,In progress"
|
|
textline " "
|
|
bitfld.long 0x00 10. " DBCKEND ,Data Block sent/received" "CRC not passed,CRC passed"
|
|
bitfld.long 0x00 9. " STBITERR ,Start Bit not detected on all data signals in wide bus mode" "Detected,Not detected"
|
|
textline " "
|
|
bitfld.long 0x00 8. " DATAEND ,Data End " "No End,End"
|
|
bitfld.long 0x00 7. " CMDSENT ,Command Sent" "Not sent,Sent"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CMDREND ,Command Response received" "Not received,Received"
|
|
bitfld.long 0x00 5. " RXOVERR ,Received FIFO Overrun error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TXUNDERR ,Transmit FIFO Underrun error" "No error,Error"
|
|
bitfld.long 0x00 3. " DTIMEOUT ,Data Time-out" "No time-out,Time-out"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CTIMEOUT ,Command Response Time-out" "No response,Response"
|
|
bitfld.long 0x00 1. " DCRCFAIL ,Data block sent/received" "CRC ok,CRC failed"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CCRCFAIL ,Command Response received" "CRC ok,CRC failed"
|
|
width 13.
|
|
wgroup.long 0x38++0x03
|
|
line.long 0x00 "SDI_ICR,SDI Interrupt Clear Register"
|
|
bitfld.long 0x00 28. " RSTNENDC ,RSTNEND flag Clear" "No effect,Clear"
|
|
bitfld.long 0x00 27. " BOOTACKTIMEOUTC ,BootTimeout flag Clear" "No effect,Clear"
|
|
bitfld.long 0x00 26. " BOOTACKERRC ,BootAckErr flag Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 24. " BUSYENDC ,BUSYEND clear bit" "No effect,Clear"
|
|
bitfld.long 0x00 23. " CEATAENDC ,CEATAEND flag Clear" "No effect,Clear"
|
|
bitfld.long 0x00 22. " SDIOITC ,SDIOIT flag Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 10. " DBCKENDC ,DBCKEND flag Clear" "No effect,Clear"
|
|
bitfld.long 0x00 9. " STBITERRC ,STBITERR flag Clear" "No effect,Clear"
|
|
bitfld.long 0x00 8. " DATAENDC ,DATAENDC flag Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CMDSENTC ,CMDSENT flag Clear" "No effect,Clear"
|
|
bitfld.long 0x00 6. " CMDRENDC ,CMDREND flag Clear" "No effect,Clear"
|
|
bitfld.long 0x00 5. " RXOVERRC ,RXOVERR flag Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TXUNDERRC ,TXUNDERR flag Clear" "No effect,Clear"
|
|
bitfld.long 0x00 3. " DTIMEOUTC ,DTIMEOUT flag Clear" "No effect,Clear"
|
|
bitfld.long 0x00 2. " CTIMEOUTC ,CTIMEOUT flag Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DCRCFAIL ,DCRCFAIL flag Clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CCRCFAIL ,CCRCFAIL flag Clear" "No effect,Clear"
|
|
group.long 0x3c++0x03
|
|
line.long 0x00 "SDI_MASK,SDI Mask Register"
|
|
bitfld.long 0x00 28. " MASK28 ,SDIRSTN is de-asserted mask" "Masked,Not masked"
|
|
bitfld.long 0x00 27. " MASK27 ,Boot Acknowledge Timeout mask" "Masked,Not masked"
|
|
bitfld.long 0x00 26. " MASK26 ,Boot Acknowledge is not valid mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " MASK25 ,Boot Mode mask" "Masked,Not masked"
|
|
bitfld.long 0x00 24. " MASK24 ,Card busy mask" "Masked,Not masked"
|
|
bitfld.long 0x00 23. " MASK23 ,CE-ATA command completion signal received mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " MASK22 ,SDIO Interrupt received mask" "Masked,Not masked"
|
|
bitfld.long 0x00 21. " MASK21 ,Data available in receive FIFO mask" "Masked,Not masked"
|
|
bitfld.long 0x00 20. " MASK20 ,Data available in transmit FIFO mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " MASK19 ,Receive FIFO Empty mask" "Masked,Not masked"
|
|
bitfld.long 0x00 18. " MASK18 ,Transmit FIFO Empty mask" "Masked,Not masked"
|
|
bitfld.long 0x00 17. " MASK17 ,Receive FIFO Full mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " MASK16 ,Transmit FIFO Full mask" "Masked,Not masked"
|
|
bitfld.long 0x00 15. " MASK15 ,Receive FIFO Burst Readable mask" "Masked,Not masked"
|
|
bitfld.long 0x00 14. " MASK14 ,Transmit FIFO Burst Writable mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " MASK13 ,Data receive in progress mask" "Masked,Not masked"
|
|
bitfld.long 0x00 12. " MASK12 ,Data transmit in progress mask" "Masked,Not masked"
|
|
bitfld.long 0x00 11. " MASK11 ,Command transfer in progress mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " MASK10 ,Data Block sent/received mask" "Masked,Not masked"
|
|
bitfld.long 0x00 9. " MASK9 ,Start Bit not detected on all data signals in wide bus mode mask" "Masked,Not masked"
|
|
bitfld.long 0x00 8. " MASK8 ,Data End mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " MASK7 ,Command Sent mask" "Masked,Not masked"
|
|
bitfld.long 0x00 6. " MASK6 ,Command Response received mask" "Masked,Not masked"
|
|
bitfld.long 0x00 5. " MASK5 ,Received FIFO Overrun error mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MASK4 ,Transmit FIFO Underrun error mask" "Masked,Not masked"
|
|
bitfld.long 0x00 3. " MASK3 ,Data Time-out mask" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " MASK2 ,Command Response Time-out mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " MASK1 ,Data block sent/received mask" "Masked,Not masked"
|
|
bitfld.long 0x00 0. " MASK0 ,Command Response received mask" "Masked,Not masked"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "SDI_CSEL,SDI Card Select Register"
|
|
bitfld.long 0x00 0.--3. " SDCARD ,Secure digital memory card address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x48++0x03
|
|
line.long 0x00 "SDI_FIFOCNT,SDI FIFO Counter Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " DATACOUNT ,Remaining number of words to be written to or read from the FIFO"
|
|
group.long 0x80++0x3f
|
|
line.long 0x0 "SDI_FIFO0,SDI Data FIFO Register 0"
|
|
line.long 0x4 "SDI_FIFO1,SDI Data FIFO Register 1"
|
|
line.long 0x8 "SDI_FIFO2,SDI Data FIFO Register 2"
|
|
line.long 0xC "SDI_FIFO3,SDI Data FIFO Register 3"
|
|
line.long 0x10 "SDI_FIFO4,SDI Data FIFO Register 4"
|
|
line.long 0x14 "SDI_FIFO5,SDI Data FIFO Register 5"
|
|
line.long 0x18 "SDI_FIFO6,SDI Data FIFO Register 6"
|
|
line.long 0x1C "SDI_FIFO7,SDI Data FIFO Register 7"
|
|
line.long 0x20 "SDI_FIFO8,SDI Data FIFO Register 8"
|
|
line.long 0x24 "SDI_FIFO9,SDI Data FIFO Register 9"
|
|
line.long 0x28 "SDI_FIFO10,SDI Data FIFO Register 10"
|
|
line.long 0x2C "SDI_FIFO11,SDI Data FIFO Register 11"
|
|
line.long 0x30 "SDI_FIFO12,SDI Data FIFO Register 12"
|
|
line.long 0x34 "SDI_FIFO13,SDI Data FIFO Register 13"
|
|
line.long 0x38 "SDI_FIFO14,SDI Data FIFO Register 14"
|
|
line.long 0x3C "SDI_FIFO15,SDI Data FIFO Register 15"
|
|
group.long 0xc0++0x07
|
|
line.long 0x00 "SDI_DBTIMER,SDI Boot Acknowledge Timer Register"
|
|
line.long 0x04 "SDI_TRSCA,SDI TRSCA Timer Register"
|
|
width 14.
|
|
rgroup.long 0xfe0++0x01f
|
|
line.long 0x00 "SDIPERIPHID0,SDI Peripheral Identification Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PN0 ,Part Number 0 (0x80)"
|
|
line.long 0x04 "SDIPERIPHID1,SDI Peripheral Identification Register 1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " D0 ,Designer 0 (0x00)"
|
|
hexmask.long.byte 0x04 0.--3. 1. " PN1 ,Part Number 1 (0x01)"
|
|
line.long 0x08 "SDIPERIPHID2,SDI Peripheral Identification Register 2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " REV ,Revision (0x04)"
|
|
hexmask.long.byte 0x08 0.--3. 1. " D1 ,Designer 1 (0x08)"
|
|
line.long 0x0c "SDIPERIPHID3,SDI Peripheral Identification Register 3"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " CONF ,Configuration (0x00)"
|
|
line.long 0x10 "SDIPCELLID0,SDI PCell Identification Register 0"
|
|
hexmask.long.byte 0x10 0.--7. 1. " SDIPCELLID0 ,SDI PCell ID0 (0x0D)"
|
|
line.long 0x14 "SDIPCELLID1,SDI PCell Identification Register 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " SDIPCELLID1 ,SDI PCell ID1 (0xF0)"
|
|
line.long 0x18 "SDIPCELLID2,SDI PCell Identification Register 2"
|
|
hexmask.long.byte 0x18 0.--7. 1. " SDIPCELLID2 ,SDI PCell ID2 (0x05)"
|
|
line.long 0x1c "SDIPCELLID3,SDI PCell Identification Register 3"
|
|
hexmask.long.byte 0x1c 0.--7. 1. " SDIPCELLID3 ,SDI PCell ID3 (0xB1)"
|
|
width 0xb
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
sif ((cpu()=="STA2065")||(cpu()=="STA2165"))
|
|
tree "SCI (Smart Card Interface)"
|
|
base asd:0x1018D000
|
|
width 15.
|
|
group.word 0x00++0x01
|
|
line.word 0x00 "SCIDATA,SCI Data Register"
|
|
bitfld.word 0x00 8. " PARITY ,Parity error flag" "No error,Error"
|
|
hexmask.word.byte 0x00 0.--7. 1. " DATA ,Eight data bits"
|
|
group.word 0x04++0x01
|
|
line.word 0x00 "SCICR0,SCI Control Register 0"
|
|
bitfld.word 0x00 7. " CLKVAL ,Inactive state of the card clock" "Low,Hihg"
|
|
bitfld.word 0x00 6. " CLKDIS ,Stop and start the clock" "Started,Stopped"
|
|
bitfld.word 0x00 5. " RXNAK ,Enables character receipt handshaking" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 4. " RXPARITY ,Receive parity setting" "Even,Odd"
|
|
bitfld.word 0x00 3. " TXNAK ,Enables character transmission handshaking" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " TXPARITY ,Transmit parity setting" "Even,Odd"
|
|
textline " "
|
|
bitfld.word 0x00 1. " ORDER ,Ordering of the data bits" "Direct,Inverse"
|
|
bitfld.word 0x00 0. " SENSE ,Inverts sense of input/output line for data and parity bits" "Direct,Inverse"
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "SCICR1,SCI Control Register 1"
|
|
bitfld.word 0x00 6. " SYNCCARD ,Card mode of operation select" "Asynchronous,Synchronous"
|
|
bitfld.word 0x00 5. " EXDBNCE ,External debounce" "Not bypassed,Bypassed"
|
|
bitfld.word 0x00 4. " BGTEN ,Block guard timer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " CLKZI ,SCICLK output configuration" "Buffer output,Open drain"
|
|
bitfld.word 0x00 2. " MODE ,Interface direction of communication control" "Receive,Transmit"
|
|
bitfld.word 0x00 1. " BLKEN ,Block timeout enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " ATRDEN ,ATR duration timeout enable" "Disabled,Enabled"
|
|
wgroup.word 0x0c++0x01
|
|
line.word 0x00 "SCICR2,SCI Control Register 2"
|
|
bitfld.word 0x00 2. " WRESET ,Warm reset" "No effect,Reset"
|
|
bitfld.word 0x00 1. " FINISH ,Deactivate the card" "No effect,Deactivate"
|
|
bitfld.word 0x00 0. " STARTUP ,Activation of the card" "No effect,Activatione"
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "SCICLKICC,SCI Clock Frequency Divider Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " CLKICC ,Smart Card clock frequency"
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "SCIVALUE,SCI Clock Frequency Divider Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " VALUE ,Number of SCIBAUD cycles per etu"
|
|
group.word 0x18++0x01
|
|
line.word 0x00 "SCIBAUD,SCI Baud Rate Clock Register"
|
|
group.word 0x1c++0x01
|
|
line.word 0x00 "SCITIDE,SCI Transmit and Receive Tide Register"
|
|
bitfld.word 0x00 4.--7. " RXTIDE ,Trigger point for SCIRXTIDEINTR" "0,1,2,3,4,5,6,7,?..."
|
|
bitfld.word 0x00 0.--3. " TXTIDE ,Trigger point for SCITXTIDEINTR" "0,1,2,3,4,5,6,7,?..."
|
|
group.word 0x20++0x01
|
|
line.word 0x00 "SCIDMACR,SCI DMA Control Register"
|
|
bitfld.word 0x00 1. " TXDMAE ,Transmit DMA Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " RXDMAE ,Receive DMA Enable" "Disabled,Enabled"
|
|
group.word 0x24++0x01
|
|
line.word 0x00 "SCISTABLE,SCI Stable (Debounce) Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " STABLE ,Stores the debounce time"
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "SCIATIME,SCI Activation Event Time Register"
|
|
group.word 0x2c++0x01
|
|
line.word 0x00 "SCIDTIME,SCI Deactivation Event Time Register"
|
|
group.word 0x30++0x01
|
|
line.word 0x00 "SCIATRSTIME,SCI ATR Start Time Register"
|
|
group.word 0x34++0x01
|
|
line.word 0x00 "SCIATRDTIME,SCI ATR Duration Time Register"
|
|
group.word 0x38++0x01
|
|
line.word 0x00 "SCISTOPTIME,SCI Clock Stop Time Register"
|
|
hexmask.word 0x00 0.--11. 1. " STOPTIME ,STOPTIME"
|
|
group.word 0x3c++0x01
|
|
line.word 0x00 "SCISTARTTIME,SCI Clock Start Time Register"
|
|
hexmask.word 0x00 0.--11. 1. " STARTTIME ,STARTTIME"
|
|
group.word 0x40++0x01
|
|
line.word 0x00 "SCIRETRY,SCI Transmit and Receive Retry Register"
|
|
bitfld.word 0x00 3.--5. " RXRETRY ,Maximum number of retries to receive" "0,1,2,3,?..."
|
|
bitfld.word 0x00 0.--2. " TXRETRY ,Maximum number of times that a character is retransmitted" "0,1,2,3,?..."
|
|
group.word 0x44++0x01
|
|
line.word 0x00 "SCICHTIMELS,SCI Character Timeout Register"
|
|
group.word 0x48++0x01
|
|
line.word 0x00 "SCICHTIMEMS,SCI Character Timeout Register"
|
|
group.word 0x4c++0x01
|
|
line.word 0x00 "SCIBLKTIMELS,SCI Block Timeout Register"
|
|
group.word 0x50++0x01
|
|
line.word 0x00 "SCIBLKTIMEMS,SCI Block Timeout Register"
|
|
group.word 0x54++0x01
|
|
line.word 0x00 "SCICHGUARD,SCI Character Time Guard Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " SCICHGUARD ,Minimum duration between the leading edges"
|
|
group.word 0x58++0x01
|
|
line.word 0x00 "SCIBLKGUARD,SCI Block Guard Time Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " BLOCKGUARD ,Minimum time in etus between the leading edges"
|
|
group.word 0x5c++0x01
|
|
line.word 0x00 "SCIRXTIME,SCI Receive Read Timeout Register"
|
|
rgroup.word 0x60++0x01
|
|
line.word 0x00 "SCIFIFOSTATUS,SCI FIFO Status Register"
|
|
bitfld.word 0x00 3. " RXFE ,RXFIFO empty status" "Not empty,Empty"
|
|
bitfld.word 0x00 2. " RXFF ,RXFIFO full status" "Not full,Full"
|
|
bitfld.word 0x00 1. " TXFE ,TXFIFO empty status" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.word 0x00 0. " TXFF ,TXFIFO full status" "Not full,Full"
|
|
group.word 0x64++0x01
|
|
line.word 0x00 "SCITXCOUNT,SCI Transmit FIFO Count Register"
|
|
bitfld.word 0x00 0.--3. " TXCOUNT ,Transmit FIFO Count" "0,1,2,3,4,5,6,7,?..."
|
|
group.word 0x68++0x01
|
|
line.word 0x00 "SCIRXCOUNT,SCI Receive FIFO Count Register"
|
|
bitfld.word 0x00 0.--3. " RXCOUNT ,Receive FIFO Count" "0,1,2,3,4,5,6,7,?..."
|
|
group.word 0x6c++0x01
|
|
line.word 0x00 "SCIIMSC,SCI Interrupt Mask Set or Clear Register"
|
|
bitfld.word 0x00 14. " TXTIDEIM ,Transmit tide interrupt mask" "Masked,Not masked"
|
|
bitfld.word 0x00 13. " RXTIDEIM ,Receive tide interrupt mask" "Masked,Not masked"
|
|
bitfld.word 0x00 12. " CLKACTIM ,Card clock active interrupt mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.word 0x00 11. " CLKSTPIM ,Card clock stopped interrupt mask" "Masked,Not masked"
|
|
bitfld.word 0x00 10. " RORIM ,Receive overrun interrupt mask" "Masked,Not masked"
|
|
bitfld.word 0x00 9. " RTOUTIM ,Read time out interrupt mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.word 0x00 8. " CHTOUTIM ,Character time out interrupt mask" "Masked,Not masked"
|
|
bitfld.word 0x00 7. " BLKTOUTIM ,Block time out interrupt mask" "Masked,Not masked"
|
|
bitfld.word 0x00 6. " ATRDTOUTIM ,Answer To Reset duration time out interrupt mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.word 0x00 5. " ATRSTOUTIM ,Answer To Reset start time out interrupt mask" "Masked,Not masked"
|
|
bitfld.word 0x00 4. " TXERRIM ,Transmit Error interrupt mask" "Masked,Not masked"
|
|
bitfld.word 0x00 3. " CARDDNIM ,Card down interrupt mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.word 0x00 2. " CARDUPIM ,Card up interrupt mask" "Masked,Not masked"
|
|
bitfld.word 0x00 1. " CARDOUTIM ,Card out interrupt mask" "Masked,Not masked"
|
|
bitfld.word 0x00 0. " CARDINIM ,Card inserted interrupt mask" "Masked,Not masked"
|
|
rgroup.word 0x70++0x01
|
|
line.word 0x00 "SCIRIS,SCI Raw Interrupt Status Register"
|
|
bitfld.word 0x00 14. " TXTIDERIS ,Transmit tide raw interrupt status" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 13. " RXTIDERIS ,Receive tide raw interrupt status" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 12. " CLKACTRIS ,Card clock active raw interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.word 0x00 11. " CLKSTPRIS ,Card clock stopped raw interrupt status" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 10. " RORRIS ,Receive overrun raw interrupt status" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 9. " RTOUTRIS ,Read time out raw interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.word 0x00 8. " CHTOUTRIS ,Character time out raw interrupt status" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 7. " BLKTOUTRIS ,Block time out raw interrupt status" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 6. " ATRDTOUTRIS ,Answer To Reset duration time out raw interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.word 0x00 5. " ATRSTOUTRIS ,Answer To Reset start time out raw interrupt status" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 4. " TXERRRIS ,Transmit Error raw interrupt status" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 3. " CARDDNRIS ,Card down raw interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.word 0x00 2. " CARDUPRIS ,Card up raw interrupt status" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 1. " CARDOUTRIS ,Card out raw interrupt status" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 0. " CARDINRIS ,Card inserted raw interrupt status" "No interrupt,Interrupt"
|
|
rgroup.word 0x74++0x01
|
|
line.word 0x00 "SCIMIS,SCI Masked Interrupt Status Register"
|
|
bitfld.word 0x00 14. " TXTIDEMIS ,Transmit tide masked interrupt status" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 13. " RXTIDEMIS ,Receive tide masked interrupt status" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 12. " CLKACTMIS ,Card clock active masked interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.word 0x00 11. " CLKSTPMIS ,Card clock stopped masked interrupt status" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 10. " RORMIS ,Receive overrun masked interrupt status" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 9. " RTOUTMIS ,Read time out masked interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.word 0x00 8. " CHTOUTMIS ,Character time out masked interrupt status" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 7. " BLKTOUTMIS ,Block time out masked interrupt status" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 6. " ATRDTOUTMIS ,Answer To Reset duration time out masked interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.word 0x00 5. " ATRSTOUTMIS ,Answer To Reset start time out masked interrupt status" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 4. " TXERRMIS ,Transmit Error masked interrupt status" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 3. " CARDDNMIS ,Card down masked interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.word 0x00 2. " CARDUPMIS ,Card up masked interrupt status" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 1. " CARDOUTMIS ,Card out masked interrupt status" "No interrupt,Interrupt"
|
|
bitfld.word 0x00 0. " CARDINMIS ,Card inserted masked interrupt status" "No interrupt,Interrupt"
|
|
wgroup.word 0x78++0x01
|
|
line.word 0x00 "SCIICR,SCI Interrupt Clear Register"
|
|
bitfld.word 0x00 12. " CLKACTIC ,Card clock active interrupt clear" "No effect,Clear"
|
|
bitfld.word 0x00 11. " CLKSTPIC ,Card clock stopped interrupt clear" "No effect,Clear"
|
|
bitfld.word 0x00 10. " RORIC ,Receive overrun interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x00 9. " RTOUTIC ,Read time out interrupt clear" "No effect,Clear"
|
|
bitfld.word 0x00 8. " CHTOUTIC ,Character time out interrupt clear" "No effect,Clear"
|
|
bitfld.word 0x00 7. " BLKTOUTIC ,Block time out interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x00 6. " ATRDTOUTIC ,Answer To Reset duration time out interrupt clear" "No effect,Clear"
|
|
bitfld.word 0x00 5. " ATRSTOUTIC ,Answer To Reset start time out interrupt clear" "No effect,Clear"
|
|
bitfld.word 0x00 4. " TXERRIC ,Transmit Error interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x00 3. " CARDDNIC ,Card down interrupt clear" "No effect,Clear"
|
|
bitfld.word 0x00 2. " CARDUPIC ,Card up interrupt clear" "No effect,Clear"
|
|
bitfld.word 0x00 1. " CARDOUTIC ,Card out interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x00 0. " CARDINIC ,Card inserted interrupt clear" "No effect,Clear"
|
|
group.word 0x7c++0x01
|
|
line.word 0x00 "SCISYNCACT,SCI Synchronous Card Activation Control Register"
|
|
bitfld.word 0x00 10. " CARDPRESENT ,Smart Card is present" "Not present,Present"
|
|
bitfld.word 0x00 9. " NSCIDATAEN ,Tristate control for external off-chip buffer for data" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " NSCIDATAOUTEN ,Tristate output buffer control for data" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 7. " SCICLKOUT ,Smart Card clock outpu" "Disabled,Disabled"
|
|
bitfld.word 0x00 6. " NSCICLKEN ,Tristate control for external off-chip buffer for clock" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " NSCICLKOUTEN ,Tristate output buffer control for clock" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 4. " FCB ,Function code bit" "0,1"
|
|
bitfld.word 0x00 3. " DATAEN ,Enable Smart Card data" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " CLKEN ,Enable Smart Card clock" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. " CRESET ,Controls Smart Card reset signal" "No reset,Reset"
|
|
bitfld.word 0x00 0. " POWER ,Controls Smart Card VCC" "Disabled,Enabled"
|
|
if (((data.word(asd:(0x1018D000+0x08)))&0x40)==0x40)
|
|
group.word 0x80++0x01
|
|
line.word 0x00 "SCISYNCTX,SCI Synchronous Transmit Clock and Data Registers"
|
|
bitfld.word 0x00 5. " WFCB ,Drive SCIFCB signal with WFCB" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " WRST ,Drive nSCICARDRST signal with WRST" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " WCLKEN ,SCICLKEN line force" "LOW,?..."
|
|
textline " "
|
|
bitfld.word 0x00 2. " WDATAEN ,SCIDATAEN line force" "LOW,?..."
|
|
bitfld.word 0x00 1. " WCLK ,Smart Card clock is drive" "0,1"
|
|
bitfld.word 0x00 0. " WDATA ,Input/output line force" "LOW,?..."
|
|
else
|
|
hgroup.word 0x80++0x01
|
|
hide.word 0x00 "SCISYNCTX,SCI Synchronous Transmit Clock and Data Registers"
|
|
endif
|
|
rgroup.word 0x84++0x01
|
|
line.word 0x00 "SCISYNCRX,SCI Synchronous Receive Clock and Data Register"
|
|
bitfld.word 0x00 1. " RCLK ,Raw value of the clock" "Low,High"
|
|
bitfld.word 0x00 0. " RDATA ,Raw value of the input/output line" "Low,High"
|
|
rgroup.word 0xFE0++0x01
|
|
line.word 0x00 "SCIPeriphID0,SCI Peripheral Identification Register 0"
|
|
hexmask.word.byte 0x00 0.--7. 1. " PARTNUMBER0 ,Part Number 0"
|
|
rgroup.word 0xFE4++0x01
|
|
line.word 0x00 "SCIPeriphID1,SCI Peripheral Identification Register 1"
|
|
bitfld.word 0x00 4.--7. " DESIGNER0 ,Designer 0" "0,1,2,3,4,5,6,7,?..."
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|
bitfld.word 0x00 0.--3. " PARTNUMBER1 ,Part Number 1" "0,1,2,3,4,5,6,7,?..."
|
|
rgroup.word 0xFE8++0x01
|
|
line.word 0x00 "SCIPeriphID2,SCI Peripheral Identification Register 2"
|
|
bitfld.word 0x00 4.--7. " REVISION ,Revision" "0,1,2,3,4,5,6,7,?..."
|
|
bitfld.word 0x00 0.--3. " DESIGNER1 ,Designer 1" "0,1,2,3,4,5,6,7,?..."
|
|
rgroup.word 0xFEC++0x01
|
|
line.word 0x00 "SCIPeriphID3,SCI Peripheral Identification Register 3"
|
|
hexmask.word.byte 0x00 0.--7. 1. " CONFIGURATION ,Configuration"
|
|
rgroup.word 0xFF0++0x01
|
|
line.word 0x00 "SCIPCellID0,SCI PrimeCell Identification Register 0"
|
|
hexmask.word.byte 0x00 0.--7. 1. " SCIPCELLID0 ,SCIPCellID 0"
|
|
rgroup.word 0xFF4++0x01
|
|
line.word 0x00 "SCIPCellID1,SCI PrimeCell Identification Register 1"
|
|
hexmask.word.byte 0x00 0.--7. 1. " SCIPCELLID1 ,SCIPCellID 1"
|
|
rgroup.word 0xFF8++0x01
|
|
line.word 0x00 "SCIPCellID2,SCI PrimeCell Identification Register 2"
|
|
hexmask.word.byte 0x00 0.--7. 1. " SCIPCELLID2 ,SCIPCellID 2"
|
|
rgroup.word 0xFFC++0x01
|
|
line.word 0x00 "SCIPCellID3,SCI PrimeCell Identification Register 3"
|
|
hexmask.word.byte 0x00 0.--7. 1. " SCIPCELLID3 ,SCIPCellID 3"
|
|
width 12.
|
|
tree.end
|
|
endif
|
|
tree "DDR MC (DDR Memory Controller)"
|
|
base asd:0x10110000
|
|
width 13.
|
|
group.long 0x00++0xbf
|
|
line.long 0x00 "DDR_CTL_00,DDR Control Register 00"
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|
bitfld.long 0x00 24. " AREFRESH ,Auto Refresh" "No effect,Refresh"
|
|
bitfld.long 0x00 16. " AP ,Auto Pre-charge" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ADDR_CM_EN ,Enable address collision detection for cmd queue placement logic" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ACTIVE_AGING ,Enable command aging in the command queue" "Disabled,Enabled"
|
|
line.long 0x04 "DDR_CTL_01,DDR Control Register 01"
|
|
bitfld.long 0x04 24. " BIST_ADDR_CHECK ,Enable address checking with BIST operation" "Disabled,Enabled"
|
|
bitfld.long 0x04 16. " BIG_ENDIAN_EN ,Set byte ordering as little endian or big endian" "Little,Big"
|
|
textline " "
|
|
bitfld.long 0x04 8. " BANK_SPLIT_EN ,Enable bank splitting for cmd queue placement logic" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " AUTO_REFRESH_MODE ,Define auto-refresh" "Next burst,Next cmd"
|
|
line.long 0x08 "DDR_CTL_02,DDR Control Register 02"
|
|
bitfld.long 0x08 24. " DLLLOCKREG ,Status of DLL lock" "No locked,Locked"
|
|
bitfld.long 0x08 16. " CONCURRENTAP ,Allow controller to issue cmds to other banks while a bank is in auto pre-charge" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 8. " BIST_GO ,Initiate a BIST operation" "No effect,Initiate"
|
|
bitfld.long 0x08 0. " BIST_DATA_CHECK ,Enable data checking with BIST operation" "Disabled,Enabled"
|
|
line.long 0x0c "DDR_CTL_03,DDR Control Register 03"
|
|
bitfld.long 0x0c 24. " EIGHT_BANK_MODE ,Number of banks on the DRAM(s)" "Disabled,Enabled"
|
|
bitfld.long 0x0c 16. " DRIVE_DQ_DQS ,DQ/DQS output enable behavior when controller is idle" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 8. " DQS_N_EN ,DQS pin mode" "Single-ended,Differential"
|
|
bitfld.long 0x0c 0. " DLL_BYPASS_MODE ,Enable the DLL bypass feature of the controller" "Disabled,Enabled"
|
|
line.long 0x10 "DDR_CTL_04,DDR Control Register 04"
|
|
bitfld.long 0x10 24. " INTRPTREADA ,Allow the controller to interrupt a combined read with auto pre-charge cmd with another read cmd" "Disabled,Enabled"
|
|
bitfld.long 0x10 16. " INTRPTAPBURST ,Allow the controller to interrupt an auto pre-charge cmd with another cmd" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 8. " FAST_WRITE ,Define when write cmds are issued to DRAM devices" "Disabled,Enabled"
|
|
bitfld.long 0x10 0. " EN_QUICK_SREFRESH ,Allow user to interrupt memory initialization to enter self-refresh mode" "Disabled,Enabled"
|
|
line.long 0x14 "DDR_CTL_05,DDR Control Register 05"
|
|
bitfld.long 0x14 24. " ODT_ALT_EN ,Enable use of non-DFI odt_alt signal" "Disabled,Enabled"
|
|
bitfld.long 0x14 16. " ODT_ADD_TURN_CLK_EN ,Enable extra turnaround clock" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 8. " NO_CMD_INIT ,Disable DRAM cmds until TDLL has expired during initialization" "Enabled,Disabled"
|
|
bitfld.long 0x14 0. " INTRPTWRITEA ,Allow the controller to interrupt a combined write cmd with auto pre-charge with another write cmd" "Disabled,Enabled"
|
|
line.long 0x18 "DDR_CTL_06,DDR Control Register 06"
|
|
bitfld.long 0x18 24. " PWRUP_SREFRESH_EXIT ,Allow powerup via self-refresh instead of full memory initialization" "Disabled,Enabled"
|
|
bitfld.long 0x18 16. " PRIORITY_EN ,Enable priority for cmd queue placement logic" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 8. " POWER_DOWN ,Disable clock enable and set DRAMs in power-down state" "No power down,Power down"
|
|
bitfld.long 0x18 0. " PLACEMENT_EN ,Enable placement logic for cmd queue" "Disabled,Enabled"
|
|
line.long 0x1c "DDR_CTL_07,DDR Control Register 07"
|
|
bitfld.long 0x1c 24. " RW_SAME_EN ,Enable read/write grouping for cmd queue placement logic" "Disabled,Enabled"
|
|
bitfld.long 0x1c 16. " REG_DIMM_ENABLE ,Enable registered DIMM operation of the controller" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1c 8. " REDUC ,Enable the half datapath feature of the controller" "Disabled,Enabled"
|
|
bitfld.long 0x1c 0. " RD2RD_TURNN ,Add an extra turn around clock for back to back reads to different chip selects" "Disabled,Enabled"
|
|
line.long 0x20 "DDR_CTL_08,DDR Control Register 08"
|
|
bitfld.long 0x20 24. " TRAS_LOCKOUT ,Allow the controller to execute auto precharge cmds" "Disabled,Enabled"
|
|
bitfld.long 0x20 16. " SWAP_EN ,Enable registered DIMM operation of the controller" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 8. " START ,Initiate cmd processing in the controller" "Not initiated,Initiated"
|
|
bitfld.long 0x20 0. " SREFRESH ,Place DRAMs in self-refresh mode" "Disabled,Enabled"
|
|
line.long 0x24 "DDR_CTL_09,DDR Control Register 09"
|
|
bitfld.long 0x24 24. " WRITE_MODEREG ,Write mode register data to the DRAMs" "No effect,Write"
|
|
bitfld.long 0x24 16. " WRITEINTERP ,Allow controller to interrupt a write burst to the DRAMs with a read cmd" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x24 8. " WEIGHTED_ROUND_ROBIN_LATENCY_CONTROL ,Free-running or limited WRR latency counters" "Free-running,Limited"
|
|
textline " "
|
|
bitfld.long 0x24 0. " TREF_ENABLE ,Issue auto-refresh cmds to the DRAMs every TREF cycles" "Disabled,Enabled"
|
|
line.long 0x28 "DDR_CTL_10,DDR Control Register 10"
|
|
bitfld.long 0x28 24.--25. " AHB3_FIFO_TYPE_REG ,Clock domain relativity between port 3 and DDR core" "Asynchronous,2:1 Port:Core Pseudo-Sync,1:2 Port:Core Pseudo-Sync,Synchronous"
|
|
bitfld.long 0x28 16.--17. " AHB2_FIFO_TYPE_REG ,Clock domain relativity between port 2 and DDR core" "Asynchronous,2:1 Port:Core Pseudo-Sync,1:2 Port:Core Pseudo-Sync,Synchronous"
|
|
textline " "
|
|
bitfld.long 0x28 8.--9. " AHB1_FIFO_TYPE_REG ,Clock domain relativity between port 1 and DDR core" "Asynchronous,2:1 Port:Core Pseudo-Sync,1:2 Port:Core Pseudo-Sync,Synchronous"
|
|
bitfld.long 0x28 0.--1. " AHB0_FIFO_TYPE_REG ,Clock domain relativity between port 0 and DDR core" "Asynchronous,2:1 Port:Core Pseudo-Sync,1:2 Port:Core Pseudo-Sync,Synchronous"
|
|
line.long 0x2c "DDR_CTL_11,DDR Control Register 11"
|
|
bitfld.long 0x2c 24.--25. " CS_MAP ,Active chip selects" "0,1,2,3"
|
|
bitfld.long 0x2c 16.--17. " BIST_RESULT ,BIST operation status" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x2c 8.--9. " AHB5_FIFO_TYPE_REG ,Clock domain relativity between port 5 and DDR core" "Asynchronous,2:1 Port:Core Pseudo-Sync,1:2 Port:Core Pseudo-Sync,Synchronous"
|
|
bitfld.long 0x2c 0.--1. " AHB4_FIFO_TYPE_REG ,Clock domain relativity between port 4 and DDR core" "Asynchronous,2:1 Port:Core Pseudo-Sync,1:2 Port:Core Pseudo-Sync,Synchronous"
|
|
line.long 0x30 "DDR_CTL_12,DDR Control Register 12"
|
|
bitfld.long 0x30 24.--25. " ODT_RD_MAP_CS0 ,Determines which chip(s) will have termination when a read occurs on chip 0" "0,1,2,3"
|
|
bitfld.long 0x30 16.--17. " MAX_CS_REG ,Maximum number of chip selects available" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x30 8.--9. " LOWPOWER_REFRESH_EN ,Enable refreshes while in low power mode" "0,1,2,3"
|
|
bitfld.long 0x30 0.--1. " DRAM_CLK_DISABLE ,Set value for the dfi_dram_clk_disable signal" "0,1,2,3"
|
|
line.long 0x34 "DDR_CTL_13,DDR Control Register 13"
|
|
bitfld.long 0x34 24.--25. " OUT_OF_RANGE_TYPE ,Type of cmd that caused an Out-of-Range interrupt" "0,1,2,3"
|
|
bitfld.long 0x34 16.--17. " ODT_WR_MAP_CS1 ,Determines which chip(s) will have termination when a write occurs on chip 1" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x34 8.--9. " ODT_WR_MAP_CS0 ,Determines which chip(s) will have termination when a write occurs on chip 0" "0,1,2,3"
|
|
bitfld.long 0x34 0.--1. " ODT_RD_MAP_CS1 ,Determines which chip(s) will have termination when a read occurs on chip 1" "0,1,2,3"
|
|
line.long 0x38 "DDR_CTL_14,DDR Control Register 14"
|
|
bitfld.long 0x38 24.--26. " AHB0_R_PRIORITY ,Priority of read cmds from port 0" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x38 16.--18. " AHB0_PORT_ORDERING ,Reassigned port order for port 0" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x38 8.--10. " ADDR_PINS ,Difference between number of addr pins available and number being used" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x38 0.--1. " RTT_0 ,On-Die termination resistance setting for all DRAM devices" "0,1,2,3"
|
|
line.long 0x3c "DDR_CTL_15,DDR Control Register 15"
|
|
bitfld.long 0x3c 24.--26. " AHB1_W_PRIORITY ,Priority of write cmds from port 1" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x3c 16.--18. " AHB1_R_PRIORITY ,Priority of read cmds from port 1" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x3c 8.--10. " AHB1_PORT_ORDERING ,Reassigned port order for port 1" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x3c 0.--2. " AHB0_W_PRIORITY ,Priority of write cmds from port 0" "0,1,2,3,4,5,6,7"
|
|
line.long 0x40 "DDR_CTL_16,DDR Control Register 16"
|
|
bitfld.long 0x40 24.--26. " AHB3_PORT_ORDERING ,Reassigned port order for port 3" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x40 16.--18. " AHB2_W_PRIORITY ,Priority of write cmds from port 2" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x40 8.--10. " AHB2_R_PRIORITY ,Priority of read cmds from port 2" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x40 0.--2. " AHB2_PORT_ORDERING ,Reassigned port order for port 2" "0,1,2,3,4,5,6,7"
|
|
line.long 0x44 "DDR_CTL_17,DDR Control Register 17"
|
|
bitfld.long 0x44 24.--26. " AHB4_R_PRIORITY ,Priority of read cmds from port 4" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x44 16.--18. " AHB4_PORT_ORDERING ,Reassigned port order for port 4" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x44 8.--10. " AHB3_W_PRIORITY ,Priority of write cmds from port 3" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x44 0.--2. " AHB3_R_PRIORITY ,Priority of read cmds from port 3" "0,1,2,3,4,5,6,7"
|
|
line.long 0x48 "DDR_CTL_18,DDR Control Register 18"
|
|
bitfld.long 0x48 24.--26. " AHB5_W_PRIORITY ,Priority of write cmds from port 5" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x48 16.--18. " AHB5_R_PRIORITY ,Priority of read cmds from port 5" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x48 8.--10. " AHB5_PORT_ORDERING ,Reassigned port order for port 5" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x48 0.--2. " AHB4_W_PRIORITY ,Priority of write cmds from port 4" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4c "DDR_CTL_19,DDR Control Register 19"
|
|
bitfld.long 0x4c 24.--26. " OUT_OF_RANGE_SOURCE_ID ,Source ID of cmd that caused an Out-of-Range interrupt" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4c 16.--18. " COLUMN_SIZE ,Difference between number of column pins available and number being used" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x4c 8.--10. " CKE_DELAY ,Additional cycles to delay CKE for status reporting" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4c 0.--2. " CASLAT ,Encoded CAS latency sent to DRAMs during initialization" "0,1,2,3,4,5,6,7"
|
|
line.long 0x50 "DDR_CTL_20,DDR Control Register 20"
|
|
bitfld.long 0x50 24.--26. " TRRD ,DRAM TRRD parameter in cycles" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x50 16.--18. " TDFI_DRAM_CLK_DISABLE ,Delay from DFI clock disable to memory clock disable" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x50 8.--10. " TCKE ,Minimum CKE pulse width" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x50 0.--2. " Q_FULLNESS ,Quantity that determines cmd queue full" "0,1,2,3,4,5,6,7"
|
|
line.long 0x54 "DDR_CTL_21,DDR Control Register 21"
|
|
bitfld.long 0x54 24.--26. " WEIGHTED_ROUND_ROBIN_WEIGHT_SHARING ,Per-port pair shared arbitration for WRR" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x54 16.--18. " W2R_SAMECS_DLY ,Additional clocks of delay to insert between writes and reads to the same chip select" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x54 8.--10. " W2R_DIFFCS_DLY ,Additional clocks of delay to insert between writes and reads to different chip selects" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x54 0.--2. " TRTP ,DRAM TRTP parameter in cycles" "0,1,2,3,4,5,6,7"
|
|
width 13.
|
|
line.long 0x58 "DDR_CTL_22,DDR Control Register 22"
|
|
bitfld.long 0x58 24.--27. " AHB0_PRIORITY3_RELATIVE_PRIORITY ,Relative priority of priority 3 cmds from port 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x58 16.--19. " AHB0_PRIORITY2_RELATIVE_PRIORITY ,Relative priority of priority 2 cmds from port 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x58 8.--11. " AHB0_PRIORITY1_RELATIVE_PRIORITY ,Relative priority of priority 1 cmds from port 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x58 0.--3. " AHB0_PRIORITY0_RELATIVE_PRIORITY ,Relative priority of priority 0 cmds from port 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x5c "DDR_CTL_23,DDR Control Register 23"
|
|
bitfld.long 0x5c 24.--27. " AHB0_PRIORITY7_RELATIVE_PRIORITY ,Relative priority of priority 7 cmds from port 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x5c 16.--19. " AHB0_PRIORITY6_RELATIVE_PRIORITY ,Relative priority of priority 6 cmds from port 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x5c 8.--11. " AHB0_PRIORITY5_RELATIVE_PRIORITY ,Relative priority of priority 5 cmds from port 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x5c 0.--3. " AHB0_PRIORITY4_RELATIVE_PRIORITY ,Relative priority of priority 4 cmds from port 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x60 "DDR_CTL_24,DDR Control Register 24"
|
|
bitfld.long 0x60 24.--27. " AHB1_PRIORITY3_RELATIVE_PRIORITY ,Relative priority of priority 3 cmds from port 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x60 16.--19. " AHB1_PRIORITY2_RELATIVE_PRIORITY ,Relative priority of priority 2 cmds from port 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x60 8.--11. " AHB1_PRIORITY1_RELATIVE_PRIORITY ,Relative priority of priority 1 cmds from port 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x60 0.--3. " AHB1_PRIORITY0_RELATIVE_PRIORITY ,Relative priority of priority 0 cmds from port 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x64 "DDR_CTL_25,DDR Control Register 25"
|
|
bitfld.long 0x64 24.--27. " AHB1_PRIORITY7_RELATIVE_PRIORITY ,Relative priority of priority 7 cmds from port 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x64 16.--19. " AHB1_PRIORITY6_RELATIVE_PRIORITY ,Relative priority of priority 6 cmds from port 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x64 8.--11. " AHB1_PRIORITY5_RELATIVE_PRIORITY ,Relative priority of priority 5 cmds from port 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x64 0.--3. " AHB1_PRIORITY4_RELATIVE_PRIORITY ,Relative priority of priority 4 cmds from port 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x68 "DDR_CTL_26,DDR Control Register 26"
|
|
bitfld.long 0x68 24.--27. " AHB2_PRIORITY3_RELATIVE_PRIORITY ,Relative priority of priority 3 cmds from port 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x68 16.--19. " AHB2_PRIORITY2_RELATIVE_PRIORITY ,Relative priority of priority 2 cmds from port 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x68 8.--11. " AHB2_PRIORITY1_RELATIVE_PRIORITY ,Relative priority of priority 1 cmds from port 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x68 0.--3. " AHB2_PRIORITY0_RELATIVE_PRIORITY ,Relative priority of priority 0 cmds from port 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x6c "DDR_CTL_27,DDR Control Register 27"
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bitfld.long 0x6c 24.--27. " AHB2_PRIORITY7_RELATIVE_PRIORITY ,Relative priority of priority 7 cmds from port 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x6c 16.--19. " AHB2_PRIORITY6_RELATIVE_PRIORITY ,Relative priority of priority 6 cmds from port 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x6c 8.--11. " AHB2_PRIORITY5_RELATIVE_PRIORITY ,Relative priority of priority 5 cmds from port 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x6c 0.--3. " AHB2_PRIORITY4_RELATIVE_PRIORITY ,Relative priority of priority 4 cmds from port 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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line.long 0x70 "DDR_CTL_28,DDR Control Register 28"
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bitfld.long 0x70 24.--27. " AHB3_PRIORITY3_RELATIVE_PRIORITY ,Relative priority of priority 3 cmds from port 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x70 16.--19. " AHB3_PRIORITY2_RELATIVE_PRIORITY ,Relative priority of priority 2 cmds from port 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x70 8.--11. " AHB3_PRIORITY1_RELATIVE_PRIORITY ,Relative priority of priority 1 cmds from port 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x70 0.--3. " AHB3_PRIORITY0_RELATIVE_PRIORITY ,Relative priority of priority 0 cmds from port 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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line.long 0x74 "DDR_CTL_29,DDR Control Register 29"
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bitfld.long 0x74 24.--27. " AHB3_PRIORITY7_RELATIVE_PRIORITY ,Relative priority of priority 7 cmds from port 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x74 16.--19. " AHB3_PRIORITY6_RELATIVE_PRIORITY ,Relative priority of priority 6 cmds from port 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x74 8.--11. " AHB3_PRIORITY5_RELATIVE_PRIORITY ,Relative priority of priority 5 cmds from port 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x74 0.--3. " AHB3_PRIORITY4_RELATIVE_PRIORITY ,Relative priority of priority 4 cmds from port 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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line.long 0x78 "DDR_CTL_30,DDR Control Register 30"
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bitfld.long 0x78 24.--27. " AHB4_PRIORITY3_RELATIVE_PRIORITY ,Relative priority of priority 3 cmds from port 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x78 16.--19. " AHB4_PRIORITY2_RELATIVE_PRIORITY ,Relative priority of priority 2 cmds from port 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x78 8.--11. " AHB4_PRIORITY1_RELATIVE_PRIORITY ,Relative priority of priority 1 cmds from port 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x78 0.--3. " AHB4_PRIORITY0_RELATIVE_PRIORITY ,Relative priority of priority 0 cmds from port 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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line.long 0x7c "DDR_CTL_31,DDR Control Register 31"
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bitfld.long 0x7c 24.--27. " AHB4_PRIORITY7_RELATIVE_PRIORITY ,Relative priority of priority 7 cmds from port 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x7c 16.--19. " AHB4_PRIORITY6_RELATIVE_PRIORITY ,Relative priority of priority 6 cmds from port 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x7c 8.--11. " AHB4_PRIORITY5_RELATIVE_PRIORITY ,Relative priority of priority 5 cmds from port 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x7c 0.--3. " AHB4_PRIORITY4_RELATIVE_PRIORITY ,Relative priority of priority 4 cmds from port 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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line.long 0x80 "DDR_CTL_32,DDR Control Register 32"
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bitfld.long 0x80 24.--27. " AHB5_PRIORITY3_RELATIVE_PRIORITY ,Relative priority of priority 3 cmds from port 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x80 16.--19. " AHB5_PRIORITY2_RELATIVE_PRIORITY ,Relative priority of priority 2 cmds from port 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x80 8.--11. " AHB5_PRIORITY1_RELATIVE_PRIORITY ,Relative priority of priority 1 cmds from port 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x80 0.--3. " AHB3_PRIORITY0_RELATIVE_PRIORITY ,Relative priority of priority 0 cmds from port 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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line.long 0x84 "DDR_CTL_33,DDR Control Register 33"
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bitfld.long 0x84 24.--27. " AHB5_PRIORITY7_RELATIVE_PRIORITY ,Relative priority of priority 7 cmds from port 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x84 16.--19. " AHB5_PRIORITY6_RELATIVE_PRIORITY ,Relative priority of priority 6 cmds from port 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x84 8.--11. " AHB5_PRIORITY5_RELATIVE_PRIORITY ,Relative priority of priority 5 cmds from port 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x84 0.--3. " AHB5_PRIORITY4_RELATIVE_PRIORITY ,Relative priority of priority 4 cmds from port 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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width 13.
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line.long 0x88 "DDR_CTL_34,DDR Control Register 34"
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bitfld.long 0x88 24.--27. " DRAM_CLASS ,Mode of operation of the controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x88 16.--19. " CASLAT_LIN_GATE ,Adjusts data capture gate open by half cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x88 8.--11. " CASLAT_LIN ,Latency from read cmd send to data receive from/to controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x88 0.--3. " APREBIT ,Location of the auto pre-charge bit in the DRAM address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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line.long 0x8c "DDR_CTL_35,DDR Control Register 35"
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bitfld.long 0x8c 24.--27. " TDFI_CTRLUPD_MIN ,DFI tCTRLUPD_MIN timing parameter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x8c 16.--19. " RDLAT_ADJ ,Adjustment value for PHY read timing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x8c 8.--11. " MAX_COL_REG ,Maximum width of column address in DRAMs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x8c 0.--3. " INITAREF ,Number of autorefresh cmds to execute during DRAM initialization" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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line.long 0x90 "DDR_CTL_36,DDR Control Register 36"
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bitfld.long 0x90 24.--27. " TDFI_PHY_WRLAT ,DFI tPHY_WRLAT timing parameter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x90 16.--19. " TDFI_PHY_RDLAT ,tPHY_RDLAT timing parameter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x90 8.--11. " TDFI_DRAM_CLK_ENABLE ,Delay from DFI clock enable to memory clock enable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x90 0.--3. " TDFI_CTRL_DELAY ,Delay from DFI command to memory command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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line.long 0x94 "DDR_CTL_37,DDR Control Register 37"
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bitfld.long 0x94 24.--27. " TRP ,DRAM TRP parameter in cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x94 16.--19. " TDFI_RDDATA_EN_BASE ,DFI base value for the tRDDATA_EN timing parameter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x94 8.--11. " TDFI_RDDATA_EN ,DFI tRDDATA_EN timing parameter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x94 0.--3. " TDFI_PHY_WRLAT_BASE ,DFI base value for the tPHY_WRLAT timing parameter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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line.long 0x98 "DDR_CTL_38,DDR Control Register 38"
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bitfld.long 0x98 24.--27. " WRR_PARAM_VALUE_ERR ,Errors/warnings related to the WRR parameters" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x98 16.--19. " WRLAT_ADJ ,Adjustment value for PHY write timing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x98 8.--11. " WRLAT ,DRAM WRLAT parameter in cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x98 0.--3. " TWTR ,DRAM TWTR parameter in cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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line.long 0x9c "DDR_CTL_39,DDR Control Register 39"
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bitfld.long 0x9c 24.--27. " MAX_ROW_REG ,Maximum width of memory address bus" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x9c 16.--19. " LOWPOWER_CONTROL ,Entry into the low power modes control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x9c 8.--11. " LOWPOWER_AUTO_ENABLE ,Automatic entry into the low power mode on idle enable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x9c 0.--3. " ADDR_SPACE ,Number of address bits to check during BIST operation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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line.long 0xa0 "DDR_CTL_40,DDR Control Register 40"
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bitfld.long 0xa0 24.--28. " TFAW ,DRAM TFAW parameter in cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0xa0 16.--20. " TDAL ,DRAM TDAL parameter in cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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textline " "
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bitfld.long 0xa0 8.--12. " OCD_ADJUST_PUP_CS_0 ,OCD pull-up adjust setting for DRAMs for chip select 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0xa0 0.--4. " OCD_ADJUST_PDN_CS_0 ,OCD pull-down adjust setting for DRAMs for chip select 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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line.long 0xa4 "DDR_CTL_41,DDR Control Register 41"
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hexmask.long.byte 0xa4 24.--29. 1. " AGE_COUNT ,Initial value of master aging-rate counter for cmd aging"
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bitfld.long 0xa4 16.--20. " TWR_INT ,DRAM TWR parameter in cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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textline " "
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bitfld.long 0xa4 8.--12. " TRC ,DRAM TRC parameter in cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0xa4 0.--4. " TMRD ,DRAM TMRD parameter in cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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line.long 0xa8 "DDR_CTL_42,DDR Control Register 42"
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hexmask.long.byte 0xa8 24.--31. 1. " TRAS_MIN ,DRAM TRAS_MIN parameter in cycles"
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hexmask.long.byte 0xa8 16.--23. 1. " TMOD ,Number of clock cycles after MRS command and before any other command"
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textline " "
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hexmask.long.byte 0xa8 8.--15. 1. " DLL_RST_ADJ_DLY ,Minimum number of cycles after setting master delay in DLL until reset is released"
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hexmask.long.byte 0xa8 0.--5. 1. " COMMAND_AGE_COUNT ,Initial value of individual cmd aging counters for cmd aging"
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line.long 0xac "DDR_CTL_43,DDR Control Register 43"
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hexmask.long.word 0xac 16.--24. 1. " INT_ACK ,Clear mask of the INT_STATUS parameter"
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hexmask.long.byte 0xac 8.--15. 1. " TRFC ,DRAM TRFC parameter in cycles"
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textline " "
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hexmask.long.byte 0xac 0.--7. 1. " TRCD_INT ,DRAM TRCD parameter in cycles"
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line.long 0xb0 "DDR_CTL_44,DDR Control Register 44"
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hexmask.long.word 0xb0 16.--25. 1. " AHB1_PRIORITY_RELAX ,Counter value to trigger priority relax on port 1"
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hexmask.long.word 0xb0 0.--9. 1. " AHB0_PRIORITY_RELAX ,Counter value to trigger priority relax on port 0"
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line.long 0xb4 "DDR_CTL_45,DDR Control Register 45"
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hexmask.long.word 0xb4 16.--25. 1. " AHB3_PRIORITY_RELAX ,Counter value to trigger priority relax on port 3"
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hexmask.long.word 0xb4 0.--9. 1. " AHB2_PRIORITY_RELAX ,Counter value to trigger priority relax on port 2"
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line.long 0xb8 "DDR_CTL_46,DDR Control Register 46"
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hexmask.long.word 0xb8 16.--25. 1. " AHB5_PRIORITY_RELAX ,Counter value to trigger priority relax on port 5"
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hexmask.long.word 0xb8 0.--9. 1. " AHB4_PRIORITY_RELAX ,Counter value to trigger priority relax on port 4"
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line.long 0xbc "DDR_CTL_47,DDR Control Register 47"
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hexmask.long.word 0xbc 16.--25. 1. " INT_MASK ,Mask for controller_int signals from the INT_STATUS parameter"
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hexmask.long.word 0xbc 0.--9. 1. " DLL_LOCK ,Number of delay elements in master DLL lock"
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rgroup.long 0xc0++0x03
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line.long 0x00 "DDR_CTL_48,DDR Control Register 48"
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hexmask.long.word 0x00 16.--25. 1. " OUT_OF_RANGE_LENGTH ,Length of cmd that caused an Out-of-Range interrupt"
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hexmask.long.word 0x00 0.--9. 1. " INT_STATUS ,Status of interrupt features in the controller"
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group.long 0xc4++0x17
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line.long 0x00 "DDR_CTL_49,DDR Control Register 49"
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hexmask.long.word 0x00 16.--26. 1. " AHB0_WRCNT ,Number of bytes for an INCR WRITE cmd on port 0"
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hexmask.long.word 0x00 0.--10. 1. " AHB0_RDCNT ,Number of bytes for an INCR READ cmd on port 0"
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line.long 0x04 "DDR_CTL_50,DDR Control Register 50"
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hexmask.long.word 0x04 16.--26. 1. " AHB1_WRCNT ,Number of bytes for an INCR WRITE cmd on port 1"
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hexmask.long.word 0x04 0.--10. 1. " AHB1_RDCNT ,Number of bytes for an INCR READ cmd on port 1"
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line.long 0x08 "DDR_CTL_51,DDR Control Register 51"
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hexmask.long.word 0x08 16.--26. 1. " AHB2_WRCNT ,Number of bytes for an INCR WRITE cmd on port 2"
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hexmask.long.word 0x08 0.--10. 1. " AHB2_RDCNT ,Number of bytes for an INCR READ cmd on port 2"
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line.long 0x0c "DDR_CTL_52,DDR Control Register 52"
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hexmask.long.word 0x0c 16.--26. 1. " AHB3_WRCNT ,Number of bytes for an INCR WRITE cmd on port 3"
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hexmask.long.word 0x0c 0.--10. 1. " AHB3_RDCNT ,Number of bytes for an INCR READ cmd on port 3"
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line.long 0x10 "DDR_CTL_53,DDR Control Register 53"
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hexmask.long.word 0x10 16.--26. 1. " AHB4_WRCNT ,Number of bytes for an INCR WRITE cmd on port 4"
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hexmask.long.word 0x10 0.--10. 1. " AHB4_RDCNT ,Number of bytes for an INCR READ cmd on port 4"
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line.long 0x14 "DDR_CTL_54,DDR Control Register 54"
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hexmask.long.word 0x14 16.--26. 1. " AHB5_WRCNT ,Number of bytes for an INCR WRITE cmd on port 5"
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hexmask.long.word 0x14 0.--10. 1. " AHB5_RDCNT ,Number of bytes for an INCR READ cmd on port 5"
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rgroup.long 0xdc++0x03
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line.long 0x00 "DDR_CTL_55,DDR Control Register 55"
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hexmask.long.word 0x00 16.--29. 1. " TDFI_PHYUPD_RESP ,DFI tPHYUPD_RESP timing parameter"
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hexmask.long.word 0x00 0.--13. 1. " TDFI_CTRLUPD_MAX ,DFI tCTRLUPD_MAX timing parameter"
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width 13.
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group.long 0xe0++0x2b
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line.long 0x00 "DDR_CTL_56,DDR Control Register 56"
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hexmask.long.word 0x00 16.--29. 1. " TREF ,DRAM TREF parameter in cycles"
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textline " "
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hexmask.long.word 0x00 0.--13. 1. " TDFI_PHYUPD_TYPE0 ,DFI tPHYUPD_TYPE0 timing parameter"
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line.long 0x04 "DDR_CTL_57,DDR Control Register 57"
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hexmask.long.word 0x04 16.--31. 1. " EMRS1_DATA_0 ,Data to program into memory mode register 1 for chip select 0"
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textline " "
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hexmask.long.word 0x04 0.--15. 1. " DLL_RST_DELAY ,Minimum number of cycles required for DLL reset"
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line.long 0x08 "DDR_CTL_58,DDR Control Register 58"
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hexmask.long.word 0x08 16.--31. 1. " EMRS2_DATA_0 ,Data to program into memory mode register 2 for chip select 0"
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textline " "
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hexmask.long.word 0x08 0.--15. 1. " EMRS1_DATA_1 ,Data to program into memory mode register 1 for chip select 1"
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line.long 0x0c "DDR_CTL_59,DDR Control Register 59"
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hexmask.long.word 0x0c 16.--31. 1. " EMRS3_DATA_0 ,Data to program into memory mode register 3 for chip select 0"
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textline " "
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hexmask.long.word 0x0c 0.--15. 1. " EMRS2_DATA_1 ,Data to program into memory mode register 2 for chip select 1"
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line.long 0x10 "DDR_CTL_60,DDR Control Register 60"
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hexmask.long.word 0x10 16.--31. 1. " LOWPOWER_EXTERNAL_CNT ,Counts idle cycles to self-refresh with memory clock gating"
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textline " "
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hexmask.long.word 0x10 0.--15. 1. " EMRS3_DATA_1 ,Data to program into memory mode register 3 for chip select 1"
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line.long 0x14 "DDR_CTL_61,DDR Control Register 61"
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hexmask.long.word 0x14 16.--31. 1. " LOWPOWER_POWER_DOWN_CNT ,Counts idle cycles to memory powerdown"
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textline " "
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hexmask.long.word 0x14 0.--15. 1. " LOWPOWER_INTERNAL_CNT ,Counts idle cycles to self-refresh with memory and controller clk gating"
|
|
line.long 0x18 "DDR_CTL_62,DDR Control Register 62"
|
|
hexmask.long.word 0x18 16.--31. 1. " LOWPOWER_SELF_REFRESH_CNT ,Counts idle cycles to memory self-refresh"
|
|
textline " "
|
|
hexmask.long.word 0x18 0.--15. 1. " LOWPOWER_REFRESH_HOLD ,Re-Sync counter for DLL in Clock Gate Mode"
|
|
line.long 0x1c "DDR_CTL_63,DDR Control Register 63"
|
|
hexmask.long.word 0x1c 16.--31. 1. " MRS_DATA_1 ,MRS data to program to memory mode register 0 for chip select 1"
|
|
textline " "
|
|
hexmask.long.word 0x1c 0.--15. 1. " MRS_DATA_0 ,MRS data to program to memory mode register 0 for chip select 0"
|
|
width 13.
|
|
line.long 0x20 "DDR_CTL_64,DDR Control Register 64"
|
|
hexmask.long.word 0x20 16.--29. 1. " TDLL ,DRAM TDLL parameter in cycles"
|
|
hexmask.long.word 0x20 0.--13. 1. " TCPD ,DRAM TCPD parameter in cycles"
|
|
line.long 0x24 "DDR_CTL_65,DDR Control Register 65"
|
|
hexmask.long.word 0x24 16.--31. 1. " TRAS_MAX ,DRAM TRAS_MAX parameter in cycles"
|
|
hexmask.long.word 0x24 0.--15. 1. " TPDEX ,DRAM TPDEX parameter in cycles"
|
|
line.long 0x28 "DDR_CTL_66,DDR Control Register 66"
|
|
hexmask.long.word 0x28 16.--31. 1. " TXSR ,DRAM TXSR parameter in cycles"
|
|
hexmask.long.word 0x28 0.--15. 1. " TXSNR ,DRAM TXSNR parameter in cycles"
|
|
rgroup.long 0x10c++0x03
|
|
line.long 0x00 "DDR_CTL_67,DDR Control Register 67"
|
|
hexmask.long.word 0x00 0.--15. 1. " VERSION ,Controller version number"
|
|
group.long 0x110++0x7
|
|
line.long 0x00 "DDR_CTL_68,DDR Control Register 68"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " TINIT ,DRAM TINIT parameter in cycles"
|
|
line.long 0x04 "DDR_CTL_69,DDR Control Register 69"
|
|
rgroup.long 0x118++0x03
|
|
line.long 0x00 "DDR_CTL_70,DDR Control Register 70"
|
|
group.long 0x11C++0x27
|
|
line.long 0x00 "DDR_CTL_71,DDR Control Register 71"
|
|
line.long 0x04 "DDR_CTL_72,DDR Control Register 72"
|
|
line.long 0x08 "DDR_CTL_73,DDR Control Register 73"
|
|
line.long 0x0C "DDR_CTL_74,DDR Control Register 74"
|
|
line.long 0x10 "DDR_CTL_75,DDR Control Register 75"
|
|
line.long 0x14 "DDR_CTL_76,DDR Control Register 76"
|
|
line.long 0x18 "DDR_CTL_77,DDR Control Register 77"
|
|
line.long 0x1C "DDR_CTL_78,DDR Control Register 78"
|
|
line.long 0x20 "DDR_CTL_79,DDR Control Register 79"
|
|
line.long 0x24 "DDR_CTL_80,DDR Control Register 80"
|
|
rgroup.long 0x144++0x13
|
|
line.long 0x00 "DDR_CTL_81,DDR Control Register 81"
|
|
line.long 0x04 "DDR_CTL_82,DDR Control Register 82"
|
|
line.long 0x08 "DDR_CTL_83,DDR Control Register 83"
|
|
line.long 0x0c "DDR_CTL_84,DDR Control Register 84"
|
|
line.long 0x10 "DDR_CTL_85,DDR Control Register 85"
|
|
width 13.
|
|
group.long 0x158++0x27
|
|
line.long 0x00 "DDR_CTL_86,DDR Control Register 86"
|
|
bitfld.long 0x00 28. " ODT_EN_DIS ,Disable odt_en signal of upper 16 bit group interface" "Yes,No"
|
|
bitfld.long 0x00 27. " ENZI_H ,ENZI of higher 16bit interface group control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 26. " ENZI_L ,ENZI of lower 16bit interface group control" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " PDN2V5_CK ,nPullDOWN for CK PAD" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24. " PU2V5_CK ,PullUP for CK PAD" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " MODEZI2V5_CK ,Input buffer type for CK PAD" "Differential,Digital"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ODTB_CK ,ODT B for CK PAD" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ODTA_CK ,ODT A for CK PAD" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " PDN2V5_DQS ,nPullDOWN for DQS PAD" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " PU2V5_DQS ,PullUP for DQS PAD" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MODEZI2V5_DQS ,Input buffer type for DQS PAD" "Differential,Digital"
|
|
bitfld.long 0x00 17. " ODTB_DQS ,ODT B for DQS PAD" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ODTA_DQS ,ODT A for DQS PAD" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " PDN2V5_DQM ,nPullDOWN for DQM PAD" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " PU2V5_DQM ,PullUP for DQM PAD" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " MODEZI2V5_DQM ,Input buffer type for DQM PAD" "Pseudo-Differential,Pure Digital"
|
|
textline " "
|
|
bitfld.long 0x00 12. " ODTB_DQM ,ODT B for DQM PAD" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " ODTA_DQM ,ODT A for DQM PAD" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " PDN2V5_DQ ,nPullDOWN for DQ PAD" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " PU2V5_DQ ,PullUP for DQ PAD" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " MODEZI2V5_DQ ,Input buffer type for DQ PAD" "Pseudo-Differential,Pure Digital"
|
|
bitfld.long 0x00 7. " ODTB_DQ ,ODT B for DQ PAD" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ODTA_DQ ,ODT A for DQ PAD" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " ODTB_CMD ,ODT B for CMD PAD" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ODTA_CMD ,ODT A for CMD PAD" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " ZOUTPROGA ,Buffer weak impedence" "Weak Mode,Strong mode"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PROGB2V5 ,Buffer speed B" "0,1"
|
|
bitfld.long 0x00 1. " PROGA2V5 ,Buffer speed A" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DDR2V5_MODE_SEL ,nDDR2 mode selection" "Normal,Mobile"
|
|
line.long 0x04 "DDR_CTL_87,DDR Control Register 87"
|
|
line.long 0x08 "DDR_CTL_88,DDR Control Register 88"
|
|
line.long 0x0c "DDR_CTL_89,DDR Control Register 89"
|
|
line.long 0x10 "DDR_CTL_90,DDR Control Register 90"
|
|
line.long 0x14 "DDR_CTL_91,DDR Control Register 91"
|
|
line.long 0x18 "DDR_CTL_92,DDR Control Register 92"
|
|
line.long 0x1c "DDR_CTL_93,DDR Control Register 93"
|
|
line.long 0x20 "DDR_CTL_94,DDR Control Register 94"
|
|
line.long 0x24 "DDR_CTL_95,DDR Control Register 95"
|
|
rgroup.long 0x180++0x0f
|
|
line.long 0x00 "DDR_CTL_96,DDR Control Register 96"
|
|
line.long 0x04 "DDR_CTL_97,DDR Control Register 97"
|
|
line.long 0x08 "DDR_CTL_98,DDR Control Register 98"
|
|
line.long 0x0c "DDR_CTL_99,DDR Control Register 99"
|
|
group.long 0x180++0x03
|
|
line.long 0x00 "DDR_CTL_100,DDR Control Register 100"
|
|
width 13.
|
|
rgroup.long 0x194++0x36f
|
|
line.long 0x00 "DDR_CTL_101,DDR Control Register 101"
|
|
line.long 0x04 "DDR_CTL_102,DDR Control Register 102"
|
|
line.long 0x08 "DDR_CTL_103,DDR Control Register 103"
|
|
line.long 0x0c "DDR_CTL_104,DDR Control Register 104"
|
|
line.long 0x10 "DDR_CTL_105,DDR Control Register 105"
|
|
line.long 0x14 "DDR_CTL_106,DDR Control Register 106"
|
|
line.long 0x18 "DDR_CTL_107,DDR Control Register 107"
|
|
line.long 0x1c "DDR_CTL_108,DDR Control Register 108"
|
|
line.long 0x20 "DDR_CTL_109,DDR Control Register 109"
|
|
line.long 0x24 "DDR_CTL_110,DDR Control Register 110"
|
|
line.long 0x28 "DDR_CTL_111,DDR Control Register 111"
|
|
line.long 0x2c "DDR_CTL_112,DDR Control Register 112"
|
|
line.long 0x30 "DDR_CTL_113,DDR Control Register 113"
|
|
line.long 0x34 "DDR_CTL_114,DDR Control Register 114"
|
|
line.long 0x38 "DDR_CTL_115,DDR Control Register 115"
|
|
line.long 0x3c "DDR_CTL_116,DDR Control Register 116"
|
|
line.long 0x40 "DDR_CTL_117,DDR Control Register 117"
|
|
line.long 0x44 "DDR_CTL_118,DDR Control Register 118"
|
|
line.long 0x48 "DDR_CTL_119,DDR Control Register 119"
|
|
line.long 0x4c "DDR_CTL_120,DDR Control Register 120"
|
|
line.long 0x50 "DDR_CTL_121,DDR Control Register 121"
|
|
line.long 0x54 "DDR_CTL_122,DDR Control Register 122"
|
|
hexmask.long.tbyte 0x54 0.--20. 1. " DLL_OBS_REG_1_0 ,Reports master DLL info for delay line 0"
|
|
line.long 0x58 "DDR_CTL_123,DDR Control Register 123"
|
|
line.long 0x5c "DDR_CTL_124,DDR Control Register 124"
|
|
line.long 0x60 "DDR_CTL_125,DDR Control Register 125"
|
|
line.long 0x64 "DDR_CTL_126,DDR Control Register 126"
|
|
line.long 0x68 "DDR_CTL_127,DDR Control Register 127"
|
|
line.long 0x6c "DDR_CTL_128,DDR Control Register 128"
|
|
line.long 0x70 "DDR_CTL_129,DDR Control Register 129"
|
|
line.long 0x74 "DDR_CTL_130,DDR Control Register 130"
|
|
line.long 0x78 "DDR_CTL_131,DDR Control Register 131"
|
|
line.long 0x7c "DDR_CTL_132,DDR Control Register 132"
|
|
line.long 0x80 "DDR_CTL_133,DDR Control Register 133"
|
|
line.long 0x84 "DDR_CTL_134,DDR Control Register 134"
|
|
line.long 0x88 "DDR_CTL_135,DDR Control Register 135"
|
|
line.long 0x8c "DDR_CTL_136,DDR Control Register 136"
|
|
line.long 0x90 "DDR_CTL_137,DDR Control Register 137"
|
|
line.long 0x94 "DDR_CTL_138,DDR Control Register 138"
|
|
line.long 0x98 "DDR_CTL_139,DDR Control Register 139"
|
|
line.long 0x9c "DDR_CTL_140,DDR Control Register 140"
|
|
hexmask.long.tbyte 0x9c 0.--20. 1. " DLL_OBS_REG_1_1 ,Reports master DLL info for delay line 1"
|
|
line.long 0xa0 "DDR_CTL_141,DDR Control Register 141"
|
|
line.long 0xa4 "DDR_CTL_142,DDR Control Register 142"
|
|
line.long 0xa8 "DDR_CTL_143,DDR Control Register 143"
|
|
line.long 0xac "DDR_CTL_144,DDR Control Register 144"
|
|
line.long 0xb0 "DDR_CTL_145,DDR Control Register 145"
|
|
line.long 0xb4 "DDR_CTL_146,DDR Control Register 146"
|
|
line.long 0xb8 "DDR_CTL_147,DDR Control Register 147"
|
|
line.long 0xbc "DDR_CTL_148,DDR Control Register 148"
|
|
line.long 0xc0 "DDR_CTL_149,DDR Control Register 149"
|
|
line.long 0xc4 "DDR_CTL_150,DDR Control Register 150"
|
|
line.long 0xc8 "DDR_CTL_151,DDR Control Register 151"
|
|
line.long 0xcc "DDR_CTL_152,DDR Control Register 152"
|
|
line.long 0xd0 "DDR_CTL_153,DDR Control Register 153"
|
|
line.long 0xd4 "DDR_CTL_154,DDR Control Register 154"
|
|
line.long 0xd8 "DDR_CTL_155,DDR Control Register 155"
|
|
line.long 0xdc "DDR_CTL_156,DDR Control Register 156"
|
|
line.long 0xe0 "DDR_CTL_157,DDR Control Register 157"
|
|
line.long 0xe4 "DDR_CTL_158,DDR Control Register 158"
|
|
hexmask.long.tbyte 0xe4 0.--20. 1. " DLL_OBS_REG_1_2 ,Reports master DLL info for delay line 2"
|
|
line.long 0xe8 "DDR_CTL_159,DDR Control Register 159"
|
|
line.long 0xec "DDR_CTL_160,DDR Control Register 160"
|
|
line.long 0xf0 "DDR_CTL_161,DDR Control Register 161"
|
|
line.long 0xf4 "DDR_CTL_162,DDR Control Register 162"
|
|
line.long 0xf8 "DDR_CTL_163,DDR Control Register 163"
|
|
line.long 0xfc "DDR_CTL_164,DDR Control Register 164"
|
|
line.long 0x100 "DDR_CTL_165,DDR Control Register 165"
|
|
line.long 0x104 "DDR_CTL_166,DDR Control Register 166"
|
|
line.long 0x108 "DDR_CTL_167,DDR Control Register 167"
|
|
line.long 0x10c "DDR_CTL_168,DDR Control Register 168"
|
|
line.long 0x110 "DDR_CTL_169,DDR Control Register 169"
|
|
line.long 0x114 "DDR_CTL_170,DDR Control Register 170"
|
|
line.long 0x118 "DDR_CTL_171,DDR Control Register 171"
|
|
line.long 0x11c "DDR_CTL_172,DDR Control Register 172"
|
|
line.long 0x120 "DDR_CTL_173,DDR Control Register 173"
|
|
line.long 0x124 "DDR_CTL_174,DDR Control Register 174"
|
|
line.long 0x128 "DDR_CTL_175,DDR Control Register 175"
|
|
line.long 0x12c "DDR_CTL_176,DDR Control Register 176"
|
|
hexmask.long.tbyte 0x12c 0.--20. 1. " DLL_OBS_REG_1_3 ,Reports master DLL info for delay line 3"
|
|
line.long 0x130 "DDR_CTL_177,DDR Control Register 177"
|
|
line.long 0x134 "DDR_CTL_178,DDR Control Register 178"
|
|
line.long 0x138 "DDR_CTL_179,DDR Control Register 179"
|
|
line.long 0x13c "DDR_CTL_180,DDR Control Register 180"
|
|
line.long 0x140 "DDR_CTL_181,DDR Control Register 181"
|
|
line.long 0x144 "DDR_CTL_182,DDR Control Register 182"
|
|
line.long 0x148 "DDR_CTL_183,DDR Control Register 183"
|
|
line.long 0x14c "DDR_CTL_184,DDR Control Register 184"
|
|
line.long 0x150 "DDR_CTL_185,DDR Control Register 185"
|
|
line.long 0x154 "DDR_CTL_186,DDR Control Register 186"
|
|
line.long 0x158 "DDR_CTL_187,DDR Control Register 187"
|
|
line.long 0x15c "DDR_CTL_188,DDR Control Register 188"
|
|
line.long 0x160 "DDR_CTL_189,DDR Control Register 189"
|
|
line.long 0x164 "DDR_CTL_190,DDR Control Register 190"
|
|
line.long 0x168 "DDR_CTL_191,DDR Control Register 191"
|
|
line.long 0x16c "DDR_CTL_192,DDR Control Register 192"
|
|
line.long 0x170 "DDR_CTL_193,DDR Control Register 193"
|
|
line.long 0x174 "DDR_CTL_194,DDR Control Register 194"
|
|
hexmask.long.tbyte 0x174 0.--20. 1. " DLL_OBS_REG_2_0 ,Reports the read DQS delay value for data slice 0"
|
|
line.long 0x178 "DDR_CTL_195,DDR Control Register 195"
|
|
line.long 0x17c "DDR_CTL_196,DDR Control Register 196"
|
|
line.long 0x180 "DDR_CTL_197,DDR Control Register 197"
|
|
line.long 0x184 "DDR_CTL_198,DDR Control Register 198"
|
|
line.long 0x188 "DDR_CTL_199,DDR Control Register 199"
|
|
line.long 0x18c "DDR_CTL_200,DDR Control Register 200"
|
|
line.long 0x190 "DDR_CTL_201,DDR Control Register 201"
|
|
line.long 0x194 "DDR_CTL_202,DDR Control Register 202"
|
|
line.long 0x198 "DDR_CTL_203,DDR Control Register 203"
|
|
line.long 0x19c "DDR_CTL_204,DDR Control Register 204"
|
|
line.long 0x1a0 "DDR_CTL_205,DDR Control Register 205"
|
|
line.long 0x1a4 "DDR_CTL_206,DDR Control Register 206"
|
|
line.long 0x1a8 "DDR_CTL_207,DDR Control Register 207"
|
|
line.long 0x1ac "DDR_CTL_208,DDR Control Register 208"
|
|
line.long 0x1b0 "DDR_CTL_209,DDR Control Register 209"
|
|
line.long 0x1b4 "DDR_CTL_210,DDR Control Register 210"
|
|
line.long 0x1b8 "DDR_CTL_211,DDR Control Register 211"
|
|
line.long 0x1bc "DDR_CTL_212,DDR Control Register 212"
|
|
hexmask.long.tbyte 0x1bc 0.--20. 1. " DLL_OBS_REG_2_1 ,Reports the read DQS delay value for data slice 1"
|
|
line.long 0x1c0 "DDR_CTL_213,DDR Control Register 213"
|
|
line.long 0x1c4 "DDR_CTL_214,DDR Control Register 214"
|
|
line.long 0x1c8 "DDR_CTL_215,DDR Control Register 215"
|
|
line.long 0x1cc "DDR_CTL_216,DDR Control Register 216"
|
|
line.long 0x1d0 "DDR_CTL_217,DDR Control Register 217"
|
|
line.long 0x1d4 "DDR_CTL_218,DDR Control Register 218"
|
|
line.long 0x1d8 "DDR_CTL_219,DDR Control Register 219"
|
|
line.long 0x1dc "DDR_CTL_220,DDR Control Register 220"
|
|
line.long 0x1e0 "DDR_CTL_221,DDR Control Register 221"
|
|
line.long 0x1e4 "DDR_CTL_222,DDR Control Register 222"
|
|
line.long 0x1e8 "DDR_CTL_223,DDR Control Register 223"
|
|
line.long 0x1ec "DDR_CTL_224,DDR Control Register 224"
|
|
line.long 0x1f0 "DDR_CTL_225,DDR Control Register 225"
|
|
line.long 0x1f4 "DDR_CTL_226,DDR Control Register 226"
|
|
line.long 0x1f8 "DDR_CTL_227,DDR Control Register 227"
|
|
line.long 0x1fc "DDR_CTL_228,DDR Control Register 228"
|
|
line.long 0x200 "DDR_CTL_229,DDR Control Register 229"
|
|
line.long 0x204 "DDR_CTL_230,DDR Control Register 230"
|
|
hexmask.long.tbyte 0x204 0.--20. 1. " DLL_OBS_REG_2_2 ,Reports the read DQS delay value for data slice 2"
|
|
line.long 0x208 "DDR_CTL_231,DDR Control Register 231"
|
|
line.long 0x20c "DDR_CTL_232,DDR Control Register 232"
|
|
line.long 0x210 "DDR_CTL_233,DDR Control Register 233"
|
|
line.long 0x214 "DDR_CTL_234,DDR Control Register 234"
|
|
line.long 0x218 "DDR_CTL_235,DDR Control Register 235"
|
|
line.long 0x21c "DDR_CTL_236,DDR Control Register 236"
|
|
line.long 0x220 "DDR_CTL_237,DDR Control Register 237"
|
|
line.long 0x224 "DDR_CTL_238,DDR Control Register 238"
|
|
line.long 0x228 "DDR_CTL_239,DDR Control Register 239"
|
|
line.long 0x22c "DDR_CTL_240,DDR Control Register 240"
|
|
line.long 0x230 "DDR_CTL_241,DDR Control Register 241"
|
|
line.long 0x234 "DDR_CTL_242,DDR Control Register 243"
|
|
line.long 0x238 "DDR_CTL_243,DDR Control Register 243"
|
|
line.long 0x23c "DDR_CTL_244,DDR Control Register 244"
|
|
line.long 0x240 "DDR_CTL_245,DDR Control Register 245"
|
|
line.long 0x244 "DDR_CTL_246,DDR Control Register 246"
|
|
line.long 0x248 "DDR_CTL_247,DDR Control Register 247"
|
|
line.long 0x24c "DDR_CTL_248,DDR Control Register 248"
|
|
hexmask.long.tbyte 0x24c 0.--20. 1. " DLL_OBS_REG_2_3 ,Reports the read DQS delay value for data slice 3"
|
|
line.long 0x250 "DDR_CTL_249,DDR Control Register 249"
|
|
line.long 0x254 "DDR_CTL_250,DDR Control Register 250"
|
|
line.long 0x258 "DDR_CTL_251,DDR Control Register 251"
|
|
line.long 0x25c "DDR_CTL_252,DDR Control Register 252"
|
|
line.long 0x260 "DDR_CTL_253,DDR Control Register 253"
|
|
line.long 0x264 "DDR_CTL_254,DDR Control Register 254"
|
|
line.long 0x268 "DDR_CTL_255,DDR Control Register 255"
|
|
line.long 0x26c "DDR_CTL_256,DDR Control Register 256"
|
|
line.long 0x270 "DDR_CTL_257,DDR Control Register 257"
|
|
line.long 0x274 "DDR_CTL_258,DDR Control Register 258"
|
|
line.long 0x278 "DDR_CTL_259,DDR Control Register 259"
|
|
line.long 0x27c "DDR_CTL_260,DDR Control Register 260"
|
|
line.long 0x280 "DDR_CTL_261,DDR Control Register 261"
|
|
line.long 0x284 "DDR_CTL_262,DDR Control Register 262"
|
|
line.long 0x288 "DDR_CTL_263,DDR Control Register 263"
|
|
line.long 0x28c "DDR_CTL_264,DDR Control Register 264"
|
|
line.long 0x290 "DDR_CTL_265,DDR Control Register 265"
|
|
line.long 0x294 "DDR_CTL_266,DDR Control Register 266"
|
|
hexmask.long.tbyte 0x294 0.--20. 1. " DLL_OBS_REG_3_0 ,Reports the clk_wr delay value for data slice 0"
|
|
line.long 0x298 "DDR_CTL_267,DDR Control Register 267"
|
|
line.long 0x29c "DDR_CTL_268,DDR Control Register 268"
|
|
line.long 0x2a0 "DDR_CTL_269,DDR Control Register 269"
|
|
line.long 0x2a4 "DDR_CTL_270,DDR Control Register 270"
|
|
line.long 0x2a8 "DDR_CTL_271,DDR Control Register 271"
|
|
line.long 0x2ac "DDR_CTL_272,DDR Control Register 272"
|
|
line.long 0x2b0 "DDR_CTL_273,DDR Control Register 273"
|
|
line.long 0x2b4 "DDR_CTL_274,DDR Control Register 274"
|
|
line.long 0x2b8 "DDR_CTL_275,DDR Control Register 275"
|
|
line.long 0x2bc "DDR_CTL_276,DDR Control Register 276"
|
|
line.long 0x2c0 "DDR_CTL_277,DDR Control Register 277"
|
|
line.long 0x2c4 "DDR_CTL_278,DDR Control Register 278"
|
|
line.long 0x2c8 "DDR_CTL_279,DDR Control Register 279"
|
|
line.long 0x2cc "DDR_CTL_280,DDR Control Register 280"
|
|
line.long 0x2d0 "DDR_CTL_281,DDR Control Register 281"
|
|
line.long 0x2d4 "DDR_CTL_282,DDR Control Register 282"
|
|
line.long 0x2d8 "DDR_CTL_283,DDR Control Register 283"
|
|
line.long 0x2dc "DDR_CTL_284,DDR Control Register 284"
|
|
hexmask.long.tbyte 0x2dc 0.--20. 1. " DLL_OBS_REG_3_1 ,Reports the clk_wr delay value for data slice 1"
|
|
line.long 0x2e0 "DDR_CTL_285,DDR Control Register 285"
|
|
line.long 0x2e4 "DDR_CTL_286,DDR Control Register 286"
|
|
line.long 0x2e8 "DDR_CTL_287,DDR Control Register 287"
|
|
line.long 0x2ec "DDR_CTL_288,DDR Control Register 288"
|
|
line.long 0x2f0 "DDR_CTL_289,DDR Control Register 289"
|
|
line.long 0x2f4 "DDR_CTL_290,DDR Control Register 290"
|
|
line.long 0x2f8 "DDR_CTL_291,DDR Control Register 291"
|
|
line.long 0x2fc "DDR_CTL_292,DDR Control Register 292"
|
|
line.long 0x300 "DDR_CTL_293,DDR Control Register 293"
|
|
line.long 0x304 "DDR_CTL_294,DDR Control Register 294"
|
|
line.long 0x308 "DDR_CTL_295,DDR Control Register 295"
|
|
line.long 0x30c "DDR_CTL_296,DDR Control Register 296"
|
|
line.long 0x310 "DDR_CTL_297,DDR Control Register 297"
|
|
line.long 0x314 "DDR_CTL_298,DDR Control Register 298"
|
|
line.long 0x318 "DDR_CTL_299,DDR Control Register 299"
|
|
line.long 0x31c "DDR_CTL_300,DDR Control Register 300"
|
|
line.long 0x320 "DDR_CTL_301,DDR Control Register 301"
|
|
line.long 0x324 "DDR_CTL_302,DDR Control Register 302"
|
|
hexmask.long.tbyte 0x324 0.--20. 1. " DLL_OBS_REG_3_2 ,Reports the clk_wr delay value for data slice 2"
|
|
line.long 0x328 "DDR_CTL_303,DDR Control Register 303"
|
|
line.long 0x32c "DDR_CTL_304,DDR Control Register 304"
|
|
line.long 0x330 "DDR_CTL_305,DDR Control Register 305"
|
|
line.long 0x334 "DDR_CTL_306,DDR Control Register 306"
|
|
line.long 0x338 "DDR_CTL_307,DDR Control Register 307"
|
|
line.long 0x33c "DDR_CTL_308,DDR Control Register 308"
|
|
line.long 0x340 "DDR_CTL_309,DDR Control Register 309"
|
|
line.long 0x344 "DDR_CTL_310,DDR Control Register 310"
|
|
line.long 0x348 "DDR_CTL_311,DDR Control Register 311"
|
|
line.long 0x34c "DDR_CTL_312,DDR Control Register 312"
|
|
line.long 0x350 "DDR_CTL_313,DDR Control Register 313"
|
|
line.long 0x354 "DDR_CTL_314,DDR Control Register 314"
|
|
line.long 0x358 "DDR_CTL_315,DDR Control Register 315"
|
|
line.long 0x35c "DDR_CTL_316,DDR Control Register 316"
|
|
line.long 0x360 "DDR_CTL_317,DDR Control Register 317"
|
|
line.long 0x364 "DDR_CTL_318,DDR Control Register 318"
|
|
line.long 0x368 "DDR_CTL_319,DDR Control Register 319"
|
|
line.long 0x36c "DDR_CTL_320,DDR Control Register 320"
|
|
hexmask.long.tbyte 0x36c 0.--20. 1. " DLL_OBS_REG_3_3 ,Reports the clk_wr delay value for data slice 3"
|
|
width 12.
|
|
tree.end
|
|
tree "C3F (C3 Formator)"
|
|
base asd:0x10186000
|
|
width 22.
|
|
if (((data.long(asd:0x10186000+0x04))&0x10000)==0x00)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "C3_FORMATOR_DATA,C3 Formator Data Register"
|
|
bitfld.long 0x00 18. " CD_S0S1_OUT ,Subcode syncho" "Not active,Active"
|
|
bitfld.long 0x00 17. " CD_FRAME_START_OUT ,Frame clock" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CD_FLAG ,C2 flags" "Low,High"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CD_SUBCODE_OUT ,Subcode byte for every frame"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CD_DATA ,Cd data byte"
|
|
else
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "C3_FORMATOR_DATA,C3 Formator Data Register"
|
|
endif
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "C3_FORMATOR_CNTL,C3 Formator Control Register"
|
|
bitfld.long 0x00 21. " FOFL_INT_EN ,Fifo interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " BD_INPUT_SEL ,BD input select" "C3_formator,Bypassed"
|
|
textline " "
|
|
bitfld.long 0x00 19. " FIFO_RESET ,fifo reset" "No reset,Reset"
|
|
bitfld.long 0x00 18. " SPDIF_SEL ,SPDIF select" "APB,PCLV"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SWAPPING_REQ ,Swapping request" "Not swapped,Swapped"
|
|
bitfld.long 0x00 16. " NO_SUBCODE ,Stereo samples/specific format expected" "Specific format,Stereo samples"
|
|
textline " "
|
|
bitfld.long 0x00 6.--9. " FIFO_CNT ,Occupied spaces in fifo" "0,1,2,3,4,5,6,7,8,?..."
|
|
bitfld.long 0x00 5. " FIFO_OVERFLOW ,Overflow error condtion" "No overflow,Overflow"
|
|
textline " "
|
|
bitfld.long 0x00 4. " FIFO_FULL ,Fifo full" "Not full,Full"
|
|
bitfld.long 0x00 3. " FIFO_NOTEMPTY ,Fifo notempty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " CURR_STATE ,Internal state machine's state" "0,1,2,3,4,5,6,7"
|
|
width 0xb
|
|
tree.end
|
|
tree "CHITF (Channel Interface)"
|
|
base asd:0x10189000
|
|
width 12.
|
|
hgroup.long 0x00++0x03
|
|
hide.long 0x00 "CIF_RDDATA,CIF Read Data Register"
|
|
in
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CIF_CONF,CIF Configuration Register"
|
|
bitfld.long 0x00 4.--8. " RD_FIFO_CNT ,Occupied spaces in fifo_i" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 3. " RD_FIFO_RST ,fifo_i reset bit" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 1.--2. " RD_BURST_LEN ,length of read burst" "1,4,8,16"
|
|
bitfld.long 0x00 0. " RD_ENABLE ,Enable DMA read request" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
tree.open "BD (Block Decoder)"
|
|
base asd:0x10187000
|
|
width 14.
|
|
tree "CD-ROM BD Registers"
|
|
rgroup.byte 0x00++0x00
|
|
line.byte 0x00 "BD_STATUS,Block Decoder Status Register"
|
|
bitfld.byte 0x00 7. " TRANSFER ,Target address found" "Not found,Found"
|
|
bitfld.byte 0x00 6. " END_OF_TRANSFER ,Transfer end" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " WRAP ,Vuffer block pointer wraps" "Not wrapped,Wrapped"
|
|
bitfld.byte 0x00 0.--3. " ERROR_CODE ,Error code" "No error,LBA,SYNC,Length,Block indicator,RS,CRC,RSPC,Irrelevant data,Lost block,Illegal operation,Type change,Type mismatch,Buffer_full,?..."
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "BD_CTRL1,Block Decoder Control Register 1"
|
|
bitfld.byte 0x00 7. " SECURE_SYNC ,Secure sync" "Low,High"
|
|
bitfld.byte 0x00 6. " SECURE_SUBCODE ,Audio; lead-in and lead-out detection check" "Not checked,Checked"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " SECURE_MODE ,CD-ROM mode check" "Not checked,Checked"
|
|
bitfld.byte 0x00 0. " AUTO_XA ,Automatic CD-XA format detection" "Not detected,Detected"
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "BD_CTRL2,Block Decoder Control Register 2"
|
|
bitfld.byte 0x00 6.--7. " BLOCK_SIZE ,Output block size" "Reserved,2.5 kB,3.0 kB,?..."
|
|
bitfld.byte 0x00 4.--5. " TBR_MAX ,Suspicious blocks maximum" "2,4,8,14"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " SEND_LINKS ,Enables buffering of link blocks in a packet CD" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " PACKET_DISC ,Packet disc" "Not read,Read"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " FW_STOP ,Interrupt current transfer at the end of the current block" "Not stopped,Stopped"
|
|
bitfld.byte 0x00 0. " FW_START ,Initiate a transfer at the beginning of the next block" "Not started,Started"
|
|
group.byte 0x0c++0x00
|
|
line.byte 0x00 "BD_TSFR_CTRL,Block Decoder Transfer Control Register"
|
|
bitfld.byte 0x00 7. " SECURE_FORM ,Higher level of security applu to the form detection" "Not applied,Applied"
|
|
bitfld.byte 0x00 6. " AUTO_FORM ,Forces XA mode and enables auto form detection" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " AUTO_MODE ,Enables Auto CD-ROM mode detection" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " AUTO_DATA ,Enables auto CDDA / CD-ROM detection" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--3. " DATA_TYPE ,Forces the type of data to be read" "Reserved,Reserved,CD-ROM mode 1,Reserved,CD-ROM mode 2,CD-XA form1,CD-XA form2,CD-raw mode,CDDA,?..."
|
|
group.byte 0x10++0x00
|
|
line.byte 0x00 "BD_ERR_CTRL,Block Decoder Error Control Register"
|
|
bitfld.byte 0x00 4. " EDC_CHECK ,Current transfer is interrupt when an EDC check fails" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 3. " C3_CHECK ,Current transfer interrupt when a block is found uncorrectable by the RSPC" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " ECC_CHECK ,Current transfer interrupt when a block contains more than the maximum C2 flags count allowed" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 1. " TYPE_CHECK ,Current transfer interrupt on a type change error or a type mismatch error" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " ALLOW_ALL_ERRORS ,Allow all errors" "Not allowed,Allowed"
|
|
group.byte 0x14++0x00
|
|
line.byte 0x00 "BD_C3_CTRL1,Block Decoder RSPC Control Register 1"
|
|
bitfld.byte 0x00 4.--6. " MAX_C2_FLAGS ,maximum C2 flag" "1,16,32,128,256,512,1024,2047"
|
|
bitfld.byte 0x00 3. " COR_TIL_NOERR ,Perform RSPC passes until no error is detected" "Not performed,Performed"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " COR_TIL_NOFLAG ,Perform RSPC passes until no CW is found uncorrectable" "Not performed,Performed"
|
|
bitfld.byte 0x00 1. " RY_SNG_ERR ,Single error correction perform" "Not performed,Performed"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " DBL_ERR_COR ,Double error correction perform" "Not performed,Performed"
|
|
group.byte 0x18++0x00
|
|
line.byte 0x00 "BD_C3_CTRL2,Block Decoder RSPC Control Register 2"
|
|
bitfld.byte 0x00 6. " NO_ECC ,Disables the RSPC correction" "No,Yes"
|
|
bitfld.byte 0x00 5. " NO_ECC_EDC_OK ,Disables the RSPC correction when the EDC check passed" "No,Yes"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--3. " MAX_PASS ,Maximum count of P or Q passes performed by the RSPC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.byte 0x1c++0x00
|
|
line.byte 0x00 "BD_IT_CTRL,Block Decoder Interrupt Control Register"
|
|
bitfld.byte 0x00 4. " CLR_IT ,Clear pending interrupts" "Not cleared,Cleared"
|
|
bitfld.byte 0x00 2. " BLK_IT_EN ,Block interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " STOP_IT_EN ,Stop interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " START_IT_EN ,Start interrupt enable" "Disabled,Enabled"
|
|
group.byte 0x20++0x00
|
|
line.byte 0x00 "START_LBA_H,START LBA MSB Register"
|
|
group.byte 0x24++0x00
|
|
line.byte 0x00 "START_LBA_M,START LBA Intermediate Byte Register"
|
|
group.byte 0x28++0x00
|
|
line.byte 0x00 "START_LBA_L,START LBA LSB Register"
|
|
group.byte 0x2c++0x00
|
|
line.byte 0x00 "STOP_LBA_H,STOP LBA MSB Register"
|
|
group.byte 0x30++0x00
|
|
line.byte 0x00 "STOP_LBA_M,STOP LBA Intermediate Byte Register"
|
|
group.byte 0x34++0x00
|
|
line.byte 0x00 "STOP_LBA_L,STOP LBA LSB Register"
|
|
tree.end
|
|
width 25.
|
|
tree "Data Filter Registers"
|
|
rgroup.byte 0x80++0x00
|
|
line.byte 0x00 "DF_LAST_BLOCK_CNT,Data Filter Last Block Count Register"
|
|
rgroup.byte 0x84++0x00
|
|
line.byte 0x00 "DF_LAST_VALID_BLOCK_CNT,Data Filter Last Valid Block Count Register"
|
|
group.byte 0x88++0x00
|
|
line.byte 0x00 "DF_TOP_BLOCK_CNT,Data Filter Top Block Count Register"
|
|
group.byte 0x8c++0x00
|
|
line.byte 0x00 "DF_CTRL,Data Filter Control Register"
|
|
bitfld.byte 0x00 3. " INTERLEAVE ,Allow interleaving of Bytes and corresponding C2 flags within a sample word" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.byte 0x00 1.--2. " OUTPUT_BLOCK_SIZE ,Output Block Size" "2352 Bytes of User Data,2.5 KBytes,2856 Bytes,?..."
|
|
textline " "
|
|
bitfld.byte 0x00 0. " INPUT_BLOCK_SIZE ,Input Block Size" "2.5 KBytes,3.0 KBytes"
|
|
tree.end
|
|
width 0xb
|
|
tree.end
|
|
tree "SaRaC (Sample Rate Converter)"
|
|
base asd:0x10188000
|
|
width 12.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "SARAC_CS,SaRaC Control/Status Register"
|
|
bitfld.long 0x00 30.--31. " OFSM ,Output FSM state" "SARACDOL[15:0],SARACDOL[31:16],SARACDOR[15:0],SARACDOR[31:16]"
|
|
textline " "
|
|
bitfld.long 0x00 28.--29. " IFSM ,Input FSM state" "SaRaCDIL[15:0],SaRaCDIL[31:16],SaRaCDIR[15:0],SaRaCDIR[31:16]"
|
|
textline " "
|
|
bitfld.long 0x00 27. " OFSM_RST ,Output FSM reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 26. " IFSM_RST ,Input FSM reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IEUFL ,Interrupt Enable UFL" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24. " IEOFL ,Interrupt Enable OFL" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " RLL_LOCK ,DRLL Lock indicator" "Not locked,Going to be locked (good quality),Going to be locked (good quality),Locked (best quality)"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DEDRE ,DMA Enable DRE" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " DEDRF ,DMA Enable DRF" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " UFCL ,Underflow Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 18. " DRE ,Data Register Empty" "Previous sample,New sample"
|
|
textline " "
|
|
bitfld.long 0x00 17. " UFL ,Data Underflow" "No underflow,Underflow"
|
|
textline " "
|
|
bitfld.long 0x00 16. " OFCL ,Overflow Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 15. " DRF ,Data Register Full" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 14. " OFL ,Data Overflow" "No overflow,Overflow"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IEDRE ,Interrupt Enable for DRE" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " IEDRF ,Interrupt Enable for DRF" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " LPF_SEL ,Up-Downsampling Selector" "DIRECT,DOWN,UPx2,UPx4"
|
|
textline " "
|
|
bitfld.long 0x00 8. " DITHER_EN ,DRLL dither enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SWAP ,Used to SWAP LEFT & RIGHT Channel" "Not swapped,Swapped"
|
|
textline " "
|
|
bitfld.long 0x00 6. " LOCK ,DRLL lock interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 5. " LOCKCL ,DRLL lock interrupt clear" "No effect,Cleared"
|
|
textline " "
|
|
sif ((cpu()=="STA2065")||(cpu()=="STA2165"))
|
|
bitfld.long 0x00 2.--4. " FSINSEL ,Input Sample Rate Selector" "Disabled,Fsin_ext1,Fsin_ext2,Fsin_ext3,Fsin_ext4,Fsin_ext5,Disabled,Internal"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " FSOUTSEL ,Output Sample Rate Selector" "Ext1,Ext2,Ext3,Ext4"
|
|
else
|
|
bitfld.long 0x00 4. " IELOCK ,Interrupt enable for LOCK" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " FSINSEL ,Input Sample Rate Selector" "Fsin_timer,Fsin_ext1,Fsin_ext2,Fsin_ext3 (SPDIF LR)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FSOUTSEL ,Output Sample Rate Selector" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ENABLE ,Sample Rate Converter enable" "Disabled,Enabled"
|
|
endif
|
|
group.word 0x04++0x01
|
|
line.word 0x00 "SARAC_DIV,SaRaC Divider Register"
|
|
hexmask.word 0x00 2.--15. 1. " SARAC_DIV ,Prescaler factor used to generate the input sample rate"
|
|
rgroup.word 0x08++0x01
|
|
line.word 0x00 "SARAC_DOF,SaRaC Data Output FIFO Register"
|
|
rgroup.long 0x0c++0x03
|
|
line.long 0x00 "SARACDO_LR,SRC Data Output Left & Right Register"
|
|
wgroup.word 0x10++0x01
|
|
line.word 0x00 "SARAC_DIF,SaRaC Data Input FIFO Register"
|
|
wgroup.long 0x14++0x03
|
|
line.long 0x00 "SARACDI_LR,SaRaC Data Input Left & Right Register"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "SARAC_DOL,SaRaC Data Output Left Register"
|
|
hexmask.long.tbyte 0x00 10.--31. 1. " SARAC_DOL ,Contains the left channel output sample"
|
|
rgroup.long 0x1c++0x03
|
|
line.long 0x00 "SARAC_DOR,SaRaC Data Output Right Register"
|
|
hexmask.long.tbyte 0x00 10.--31. 1. " SARAC_DOR ,Contains the right channel output sample"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "SARAC_DIL,SaRaC Data Input Left Register"
|
|
hexmask.long.tbyte 0x00 12.--31. 1. " SARAC_DIL ,Provide the left channel input sample"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "SARAC_DIR,SaRaC Data Input Right Register"
|
|
hexmask.long.tbyte 0x00 12.--31. 1. " SARAC_DIR ,Provide the right channel input sample"
|
|
rgroup.long 0x28++0x0b
|
|
line.long 0x00 "SARAC_TEST,SaRaC Test Register"
|
|
bitfld.long 0x00 4. " FSINOUT_TEST ,Selects output sample rate frequency" "OUT_SAMPLE_RATE,INPUT_SAMPLE_RATE"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " DRLL_THRESHOLD ,Set DRLL threshold value from 0 to 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "SARAC_RATIO,SaRaC DRLL Ratio"
|
|
line.long 0x08 "SaRaC_DIFF,SaRaC DRLL Diff"
|
|
hexmask.long.word 0x08 0.--13. 1. " DRLL_DIFF ,access to the DRLL diff signal"
|
|
width 0xb
|
|
tree.end
|
|
sif ((cpu()=="STA2065")||(cpu()=="STA2165"))
|
|
tree "VIP (Video Input Port)"
|
|
base asd:0xA0060000
|
|
width 15.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "VIP_CTRL,VIP Control Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " A[7:0] ,Alpha value"
|
|
bitfld.long 0x00 23. " INTL_EN ,Odd/even field detection" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " SGA_TFR_EN ,Direct transfer to SGA" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19.--21. " DMA_BURST_SIZE ,DMA burst size" "1,4,8,16,32,64,128,256"
|
|
bitfld.long 0x00 18. " WAIT_STATE_EN ,Wait state" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CROP_SEL ,Crop Select" "Not selected,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " EAV_SEL ,End of active video select" "Symbol,Any"
|
|
bitfld.long 0x00 12. " EMBT ,Embedded synchro type" "CSI,ITU656"
|
|
bitfld.long 0x00 8.--11. " TRANS[3:0] ,Received data type and the transformation to do before storage (Input/Output)" "Disabled,YUV (CbYCrY)/YUV (CbYCrY) - No swap,YUV (CbYCrY)/YUV (CrYCbY) - Swap Cr/Cb,RGB888 packed (RGB)/RGB888a (RGBa) - No swap,RGB888 packed (RGB)/RGB888a (BGRa) - Swap B/R,RGB888 packed (RGB)/RGB888a (aBGR) - Swap B/R,RGB888 packed (RGB)/RGB888a (aRGB) - No swap,RGB565 (RGB)/RGB565 (BGR) - Swap B/R,RGB565 (RGB)/RGB565 (RGB) - No swap,RGB888 Packed (RGB)/RGB888 Packed (RGB) - No swap,JPEG/JPEG - No swap,Reserved,Reserved,Reserved,Reserved,Color Filler Mode"
|
|
textline " "
|
|
bitfld.long 0x00 7. " VS_POL ,Informs about the active state of the vertical synchro signal" "Low,High"
|
|
bitfld.long 0x00 6. " HS_POL ,Informs about the active state of the horizontal synchro signal" "Low,High"
|
|
bitfld.long 0x00 5. " PCK_POL ,Informs about the active edge of the pixel clock" "Between rising/latched on falling,Between falling/latched on rising"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EMB ,Informs whether the useful data is recognized thanks to HSYNC and VSYNC signals or embedded codes" "HSYNC/VSYNC,Embedded codes"
|
|
bitfld.long 0x00 0.--3. " CAPT[3:0] ,VIP capture modes" "No capture,Photo/1,Photo/2,Photo/3,Photo/4,Photo/8,Photo/16,Photo/32,Video/all,Video/2,Video/4,Video/8,Video/16,Video/32,Video/64,Video/128"
|
|
if (((d.l(asd:0xA0060000))&0x1000)==0x1000)
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "VIP_EFECR,VIP Even Field Embedded Codes Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " VBSE ,Start of Active Video; Blanking Area (F=0, V=1, H=0)"
|
|
hexmask.long.byte 0x00 16.--23. 1. " VBEE ,End of Active Video; Blanking Area (F=0, V=1, H=1)"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " SAVE ,Start of Active Video; Active Area (F=0, V=0, H=0)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " EAVE ,End of Active Video; Active Area (F=0, V=0, H=1)"
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "VIP_EFECR,VIP Even Field Embedded Codes Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " FS ,Frame start"
|
|
hexmask.long.byte 0x00 16.--23. 1. " FE ,Frame end"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " LS ,Line start"
|
|
hexmask.long.byte 0x00 0.--7. 1. " LE ,Line end"
|
|
endif
|
|
group.long 0x08++0x0F
|
|
line.long 0x00 "VIP_CSTARTPR,VIP Crop Start Point Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " CR_V ,Line number after which pixels will be stored"
|
|
hexmask.long.word 0x00 0.--15. 1. " CR_H ,Pixel position after which each line will be stored"
|
|
line.long 0x04 "VIP_CSTOPR,VIP Crop Stop Point Register"
|
|
hexmask.long.word 0x04 16.--31. 1. " CR_V ,Line number after which pixels will be stored"
|
|
hexmask.long.word 0x04 0.--15. 1. " CR_H ,Pixel position after which each line will be stored"
|
|
line.long 0x08 "VIP_MASK,VIP Interrupt & DMA Mask Register"
|
|
bitfld.long 0x08 15. " MASK_BREQ ,BREQ and SREQ are sent simultaneously to the DMA controller" "Not masked,Masked"
|
|
bitfld.long 0x08 14. " MASK_SREQ ,BREQ and SREQ are sent simultaneously to the DMA controller" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 12. " DMADUAL ,DMADual" "No effect,Separated"
|
|
bitfld.long 0x08 11. " DMACAMI ,Mask of DMA request" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 6. " ITCAMV ,ITCAMV mask of request" "Masked,Not masked"
|
|
bitfld.long 0x08 5. " ITCAMF ,ITCAMF mask of request" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x08 4. " ITCAML ,ITCAML mask of request" "Masked,Not masked"
|
|
line.long 0x0C "VIP_STA,VIP Interrupt Status Register"
|
|
bitfld.long 0x0C 23. " R_DMACAML ,Raw DMA request status form the VIP" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 18. " ITCAMV_RAW ,Raw vsync interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " ITCAMF_RAW ,Raw end of frame interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 16. " ITCAML_RAW ,Raw end of line interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0C 13.--14. " FRAME_SIG ,Frame status" "Reserved,Odd,Even,?..."
|
|
bitfld.long 0x0C 12. " FRAME_TFR ,Active frame report" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0C 11. " DMACAMI ,DMA request status from the VIP" "No interrupt,Interrupt"
|
|
eventfld.long 0x0C 6. " ITCAMV ,Vsync interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x0C 5. " ITCAMF ,End of Frame interrupt status" "No interrupt,Interrupt"
|
|
eventfld.long 0x0C 4. " ITCAML ,End of line interrupt status" "No interrupt,Interrupt"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "VIP_DMAPR,VIP DMA Pointer Register"
|
|
hexmask.long.word 0x00 0.--10. 1. " DMAP ,DMA Pointer"
|
|
if (((d.l(asd:0xA0060000))&0x1000)==0x1000)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "VIP_OFECR,VIP Odd Field Embedded Codes Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " VBSE ,Start of Active Video; Blanking Area (F=1, V=1, H=0)"
|
|
hexmask.long.byte 0x00 16.--23. 1. " VBEE ,End of Active Video; Blanking Area (F=1, V=1, H=1)"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " SAVE ,Start of Active Video; Active Area (F=1, V=0, H=0)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " EAVE ,End of Active Video; Active Area (F=1, V=0, H=1)"
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "VIP_OFECR,VIP Odd Field Embedded Codes Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " FS ,Frame start"
|
|
hexmask.long.byte 0x00 16.--23. 1. " FE ,Frame end"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " LS ,Line start"
|
|
hexmask.long.byte 0x00 0.--7. 1. " LE ,Line end"
|
|
endif
|
|
width 0xB
|
|
tree.end
|
|
endif
|
|
tree.open "JPEG Decoder"
|
|
base asd:0xA0040000
|
|
width 20.
|
|
tree "JPEG Codec Core Registers"
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "JPEGREG0,JPEG Register 0"
|
|
bitfld.word 0x00 0.--1. " STARTSTOP ,SCAN RATE type in Enhanced mode" "Stopped,Started,Started,Started"
|
|
group.long 0x04++0x0b
|
|
line.long 0x00 "JPEGREG1,JPEG Register 1"
|
|
hexmask.long.word 0x00 16.--31. 1. " YSIZ ,Number of lines"
|
|
bitfld.long 0x00 8. " HDR ,Header processing enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6.--7. " NS ,Number of components for scan header marker segment" "1,2,3,4"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " COLSPCTYPE ,Number of quantization tables in the output stream" "Grayscale,YUV,RGB,CMYK"
|
|
bitfld.long 0x00 2. " RE ,Restart marker processing enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " NF ,Number of color components" "0,1,2,3"
|
|
line.long 0x04 "JPEGREG2,JPEG Register 2"
|
|
hexmask.long 0x04 0.--25. 1. " NMCU ,Number of minimum coded units to be coded"
|
|
line.long 0x08 "JPEGREG3,JPEG Register 3"
|
|
hexmask.long.word 0x08 16.--31. 1. " XSIZ ,Number of pixels per line"
|
|
hexmask.long.word 0x08 0.--15. 1. " NRST ,Number of MCU's between two restart markers"
|
|
group.word 0x10++0x0F
|
|
line.word 0x00 "JPEGREG4,JPEG Register 4"
|
|
bitfld.word 0x00 12.--15. " H0 ,Horizontal sampling factor for component 0" "Reserved,1,2,3,4,?..."
|
|
bitfld.word 0x00 8.--11. " V0 ,Vertical sampling factor for component 0" "Reserved,1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.word 0x00 4.--7. " NBLOCK0 ,Number of data units for component 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x00 2.--3. " QT0 ,Quantization table used for componentt 0" "0,1,2,3"
|
|
textline " "
|
|
bitfld.word 0x00 1. " HA0 ,AC Huffman table used for component 0" "Not used,Used"
|
|
bitfld.word 0x00 0. " HD0 ,DC Huffman table used for component 0" "Not used,Used"
|
|
line.word 0x04 "JPEGREG5,JPEG Register 5"
|
|
bitfld.word 0x04 12.--15. " H1 ,Horizontal sampling factor for component 1" "Reserved,1,2,3,4,?..."
|
|
bitfld.word 0x04 8.--11. " V1 ,Vertical sampling factor for component 1" "Reserved,1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.word 0x04 4.--7. " NBLOCK1 ,Number of data units for component 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x04 2.--3. " QT1 ,Quantization table used for componentt 1" "0,1,2,3"
|
|
textline " "
|
|
bitfld.word 0x04 1. " HA1 ,AC Huffman table used for component 1" "Not used,Used"
|
|
bitfld.word 0x04 0. " HD1 ,DC Huffman table used for component 1" "Not used,Used"
|
|
line.word 0x08 "JPEGREG6,JPEG Register 6"
|
|
bitfld.word 0x08 12.--15. " H2 ,Horizontal sampling factor for component 2" "Reserved,1,2,3,4,?..."
|
|
bitfld.word 0x08 8.--11. " V2 ,Vertical sampling factor for component 2" "Reserved,1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.word 0x08 4.--7. " NBLOCK2 ,Number of data units for component 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x08 2.--3. " QT2 ,Quantization table used for componentt 2" "0,1,2,3"
|
|
textline " "
|
|
bitfld.word 0x08 1. " HA2 ,AC Huffman table used for component 2" "Not used,Used"
|
|
bitfld.word 0x08 0. " HD2 ,DC Huffman table used for component 2" "Not used,Used"
|
|
line.word 0x0C "JPEGREG7,JPEG Register 7"
|
|
bitfld.word 0x0C 12.--15. " H3 ,Horizontal sampling factor for component 3" "Reserved,1,2,3,4,?..."
|
|
bitfld.word 0x0C 8.--11. " V3 ,Vertical sampling factor for component 3" "Reserved,1,2,3,4,?..."
|
|
textline " "
|
|
bitfld.word 0x0C 4.--7. " NBLOCK3 ,Number of data units for component 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x0C 2.--3. " QT3 ,Quantization table used for componentt 3" "0,1,2,3"
|
|
textline " "
|
|
bitfld.word 0x0C 1. " HA3 ,AC Huffman table used for component 3" "Not used,Used"
|
|
bitfld.word 0x0C 0. " HD3 ,DC Huffman table used for component 3" "Not used,Used"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "JPEGCONTROLSTAT,JPEG Control Status Register"
|
|
bitfld.long 0x00 31. " EOC ,End of conversion" "Not end,End"
|
|
bitfld.long 0x00 30. " SCR ,Synchronous core reset" "No reset,Reset"
|
|
hexmask.long.word 0x00 3.--17. 1. " LLI , Number of LLI"
|
|
textline " "
|
|
bitfld.long 0x00 1.--2. " BNV ,Number of bytes not valid in last word" "1,2,3,4"
|
|
bitfld.long 0x00 0. " IB ,Interrupt bit" "Cleared,?..."
|
|
rgroup.long 0x204++0x07
|
|
line.long 0x00 "JPEGBFRXTOJPEG,JPEG bytes from rx to jpeg register"
|
|
line.long 0x04 "JPEGBFJPEGTOTX,JPEG bytes from jpeg to tx register"
|
|
group.long 0x20c++0x03
|
|
line.long 0x00 "JPEGBURSTCOUNTBEINT,JPEG Burst count before int Register"
|
|
bitfld.long 0x00 31. " BCE ,Burst count enable" "Disabled,Enabled"
|
|
hexmask.long 0x00 0.--30. 1. " NBX ,Numbers of burst transfers sent by TX fifo"
|
|
tree.end
|
|
tree "JPEG FIFO Registers"
|
|
hgroup.long 0x400++0x3
|
|
hide.long 0x00 "JPEGFIFOIN,JPEG Fifo In Register"
|
|
in
|
|
hgroup.long 0x600++0x3
|
|
hide.long 0x00 "JPEGFIFOOUT,JPEG Fifo Out Register"
|
|
in
|
|
tree.end
|
|
tree "JPEG Decoder Internal Memories"
|
|
group.byte 0x800++0x00
|
|
line.byte 0x00 "JPEGQMEM,Quantization Table Memory"
|
|
button "QMEM" "d asd:(0xA0040000+0x800)--asd:(0xA0040000+0xa55) /byte"
|
|
group.byte 0xC00++0x03
|
|
line.byte 0x00 "JPEGHUFFMIN,HuffMin Table Memory"
|
|
button "HUFFMIN" "d asd:(0xA0040000+0xC00)--asd:(0xA0040000+0xc03) /byte"
|
|
group.byte 0x1000++0x00
|
|
line.byte 0x00 "JPEGHUFFBASE,HuffBase Table Memory"
|
|
button "HUFFBASE" "d asd:(0xA0040000+0x1000)--asd:(0xA0040000+0x1063) /byte"
|
|
group.long 0x1400++0x03
|
|
line.long 0x00 "JPEGHUFFSYMB,HuffSymb Table Memory"
|
|
button "HUFFSYMB" "d asd:(0xA0040000+0x1400)--asd:(0xA0040000+0x1735) /byte"
|
|
tree.end
|
|
width 0xB
|
|
tree.end
|
|
tree "SGA-V3 (Smart Graphic Accelerator)"
|
|
base asd:0x101C2000
|
|
width 15.
|
|
wgroup.long 0x00++0x03
|
|
line.long 0x00 "SGA_INSTR,SGA Instruction Register"
|
|
group.long 0x04++0x7
|
|
line.long 0x00 "SGA_GCR,SGA Global Configuration Register"
|
|
bitfld.long 0x00 3. " INTCMOD1 ,Interrupt Clear Mode select" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " HCLKGEN ,HCLK Clock Gating Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FCLKGEN ,FCLK Clock Gating Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " INTCMOD ,Interrupt Clear Mode Select" "Disabled,Enabled"
|
|
line.long 0x04 "SGA_CTCMD,SGA Controller Command Register"
|
|
bitfld.long 0x04 8. " GRST ,Global Reset" "Disabled,Enabled"
|
|
bitfld.long 0x04 7. " AFRUN ,AutoFetch Run" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " AFSTOP ,AutoFetch Stop" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 5. " IFLUSH ,Instruction Flush" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " IRESUME ,Instruction Resume" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " IHALT ,Instruction Halt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 2. " GRESUME ,Global Resume" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " GHALT ,Global Halt" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " GINIT ,Global Initialisation" "Disabled,Enabled"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "SGA_CTSTAT,SGA Controller Status Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " RESETCNT ,Restart Counter"
|
|
bitfld.long 0x00 6. " TPCEMPTY ,Total Pipe and Cache Empty" "No,Yes"
|
|
bitfld.long 0x00 5. " TPEMPTY ,Total Pipe Empty" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PXPEMPTY ,Pixel Pipe Empty" "No,Yes"
|
|
bitfld.long 0x00 3. " IFEMPTY ,Instruction FIFO Empty" "No,Yes"
|
|
bitfld.long 0x00 2. " AFSTAT ,Autofetch Mode Status" "Disabled,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IPEN ,Instruction Processing Enable Status" "Low,High"
|
|
bitfld.long 0x00 0. " GEN ,Global Enable Status" "Low,High"
|
|
if (((d.l(asd:0x101C2000+0x04))&0x01)==0x01)
|
|
rgroup.long 0x10++0x07
|
|
line.long 0x00 "SGA_RIS,SGA Raw Interrupt Status Register"
|
|
bitfld.long 0x00 31. " GEN25RIS ,Instruction SendInt25 Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 30. " GEN24RIS ,Instruction SendInt24 Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 29. " GEN23RIS ,Instruction SendInt23 Raw Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GEN22RIS ,Instruction SendInt22 Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 27. " GEN21RIS ,Instruction SendInt21 Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 26. " GEN20RIS ,Instruction SendInt20 Raw Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GEN19RIS ,Instruction SendInt19 Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 24. " GEN18RIS ,Instruction SendInt18 Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 23. " GEN17RIS ,Instruction SendInt17 Raw Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GEN16RIS ,Instruction SendInt16 Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 21. " GEN15RIS ,Instruction SendInt15 Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 20. " GEN14RIS ,Instruction SendInt14 Raw Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GEN13RIS ,Instruction SendInt13 Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 18. " GEN12RIS ,Instruction SendInt12 Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 17. " GEN11RIS ,Instruction SendInt11 Raw Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GEN10RIS ,Instruction SendInt10 Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 15. " GEN9RIS ,Instruction SendInt9 Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 14. " GEN8RIS ,Instruction SendInt8 Raw Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GEN7RIS ,Instruction SendInt7 Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. " GEN6RIS ,Instruction SendInt6 Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 11. " GEN5RIS ,Instruction SendInt5 Raw Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GEN4RIS ,Instruction SendInt4 Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 9. " GEN3RIS ,Instruction SendInt3 Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " GEN2RIS ,Instruction SendInt2 Raw Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRESUM1RIS ,Instruction Resume 1 Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. " IRESUM0RIS ,Instruction Resume 0 Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " AHBERIS ,AHB Error Raw Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 4. " HANGRIS ,Hanging Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " IFIFOOVRIS ,Instruction FIFO Overrun Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " IFIFOERIS ,Instruction FIFO Empty Raw Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GEN1RIS ,Instruction SendInt1 Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " GEN0RIS ,Instruction SendInt0 Raw Interrupt Status" "No interrupt,Interrupt"
|
|
line.long 0x04 "SGA_MIS,SGA Masked Interrupt Status Register"
|
|
bitfld.long 0x04 31. " GEN25MIS ,Instruction SendInt25 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 30. " GEN24MIS ,Instruction SendInt24 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 29. " GEN23MIS ,Instruction SendInt23 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 28. " GEN22MIS ,Instruction SendInt22 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 27. " GEN21MIS ,Instruction SendInt21 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 26. " GEN20MIS ,Instruction SendInt20 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 25. " GEN19MIS ,Instruction SendInt19 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 24. " GEN18MIS ,Instruction SendInt18 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 23. " GEN17MIS ,Instruction SendInt17 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 22. " GEN16MIS ,Instruction SendInt16 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 21. " GEN15MIS ,Instruction SendInt15 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 20. " GEN14MIS ,Instruction SendInt14 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 19. " GEN13MIS ,Instruction SendInt13 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 18. " GEN12MIS ,Instruction SendInt12 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 17. " GEN11MIS ,Instruction SendInt11 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 16. " GEN10MIS ,Instruction SendInt10 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 15. " GEN9MIS ,Instruction SendInt9 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 14. " GEN8MIS ,Instruction SendInt8 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 13. " GEN7MIS ,Instruction SendInt7 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 12. " GEN6MIS ,Instruction SendInt6 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 11. " GEN5MIS ,Instruction SendInt5 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 10. " GEN4MIS ,Instruction SendInt4 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 9. " GEN3MIS ,Instruction SendInt3 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 8. " GEN2MIS ,Instruction SendInt2 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 7. " IRESUM1MIS ,Instruction Resume 1 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 6. " IRESUM0MIS ,Instruction Resume 0 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 5. " AHBEMIS ,AHB Error Masked Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 4. " HANGMIS ,Hanging Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 3. " IFIFOOVMIS ,Instruction FIFO Overrun Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 2. " IFIFOEMIS ,Instruction FIFO Empty Masked Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 1. " GEN1MIS ,Instruction SendInt1 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 0. " GEN0MIS ,Instruction SendInt0 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
else
|
|
hgroup.long 0x10++0x07
|
|
hide.long 0x00 "SGA_RIS,SGA Raw Interrupt Status Register"
|
|
in
|
|
hide.long 0x04 "SGA_MIS,SGA Masked Interrupt Status Register"
|
|
in
|
|
endif
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "SGA_IMSC,SGA Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x00 31. " GEN25IM ,Instruction SendInt25 Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " GEN24IM ,Instruction SendInt24 Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " GEN23IM ,Instruction SendInt23 Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GEN22IM ,Instruction SendInt22 Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " GEN21IM ,Instruction SendInt21 Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " GEN20IM ,Instruction SendInt20 Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GEN19IM ,Instruction SendInt19 Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " GEN18IM ,Instruction SendInt18 Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " GEN17IM ,Instruction SendInt17 Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GEN16IM ,Instruction SendInt16 Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " GEN15IM ,Instruction SendInt15 Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " GEN14IM ,Instruction SendInt14 Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GEN13IM ,Instruction SendInt13 Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " GEN12IM ,Instruction SendInt12 Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " GEN11IM ,Instruction SendInt11 Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GEN10IM ,Instruction SendInt10 Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " GEN9IM ,Instruction SendInt9 Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " GEN8IM ,Instruction SendInt8 Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GEN7IM ,Instruction SendInt7 Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " GEN6IM ,Instruction SendInt6 Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " GEN5IM ,Instruction SendInt5 Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GEN4IM ,Instruction SendInt4 Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " GEN3IM ,Instruction SendInt3 Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " GEN2IM ,Instruction SendInt2 Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRESUM1IM ,Instruction Resume 1 Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " IRESUM0IM ,Instruction Resume 0 Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " AHBEIM ,AHB Error Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " HANGIM ,Hanging Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " IFIFOOVIM ,Instruction FIFO Overrun Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " IFIFOEIM ,Instruction FIFO Empty Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GEN1IM ,Instruction SendInt1 Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " GEN0IM ,Instruction SendInt0 Interrupt Mask" "Not masked,Masked"
|
|
wgroup.long 0x1C++0x03
|
|
line.long 0x00 "SGA_ICR,SGA Interrupt Clear Register"
|
|
bitfld.long 0x00 31. " GEN25IC ,Instruction SendInt25 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 30. " GEN24IC ,Instruction SendInt24 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 29. " GEN23IC ,Instruction SendInt23 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GEN22IC ,Instruction SendInt22 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 27. " GEN21IC ,Instruction SendInt21 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 26. " GEN20IC ,Instruction SendInt20 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GEN19IC ,Instruction SendInt19 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 24. " GEN18IC ,Instruction SendInt18 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 23. " GEN17IC ,Instruction SendInt17 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GEN16IC ,Instruction SendInt16 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 21. " GEN15IC ,Instruction SendInt15 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 20. " GEN14IC ,Instruction SendInt14 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GEN13IC ,Instruction SendInt13 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 18. " GEN12IC ,Instruction SendInt12 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 17. " GEN11IC ,Instruction SendInt11 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GEN10IC ,Instruction SendInt10 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 15. " GEN9IC ,Instruction SendInt9 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 14. " GEN8IC ,Instruction SendInt8 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GEN7IC ,Instruction SendInt7 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 12. " GEN6IC ,Instruction SendInt6 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 11. " GEN5IC ,Instruction SendInt5 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GEN4IC ,Instruction SendInt4 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 9. " GEN3IC ,Instruction SendInt3 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 8. " GEN2IC ,Instruction SendInt2 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRESUM1IC ,Instruction Resume 1 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 6. " IRESUM0IC ,Instruction Resume 0 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 5. " AHBEIM ,AHB Error Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 4. " HANGIM ,Hanging Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 3. " IFIFOOVIC ,Instruction FIFO Overrun Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 2. " IFIFOEIC ,Instruction FIFO Empty Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GEN1IC ,Instruction SendInt1 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " GEN0IC ,Instruction SendInt0 Interrupt Clear" "No effect,Clear"
|
|
rgroup.long 0x24++0x0B
|
|
line.long 0x00 "SGA_CIPR,SGA Current Instruction Pointer Register"
|
|
line.long 0x04 "SGA_CGCR,SGA Current Goto Counter Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " CGC ,Current GOT Counter"
|
|
line.long 0x08 "SGA_DBGR,SGA Debug Register"
|
|
bitfld.long 0x08 31. " TRIOPE ,Triangle Operator Empty" "Not empty,Empty"
|
|
bitfld.long 0x08 30. " SCIOPE ,Scissor Operator Empty" "Not empty,Empty"
|
|
bitfld.long 0x08 29. " SEGOPE ,Segmentation Operator Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x08 28. " ADDFRMIN ,Address Operator Frame-In Empty" "Not empty,Empty"
|
|
bitfld.long 0x08 27. " CACHFRMIN ,Cache Frame-In Empty" "Not empty,Empty"
|
|
bitfld.long 0x08 26. " DEPACFRM ,DePacker Operator Frame Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x08 25. " DEPTST ,Depth Test Empty" "Not empty,Empty"
|
|
bitfld.long 0x08 24. " FFIFOWR ,FifoFrm Write Empty" "Not empty,Empty"
|
|
bitfld.long 0x08 23. " FFIFORD ,FifoFrm Read Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x08 22. " TEXSER ,Texture Serialiser Empty" "Not empty,Empty"
|
|
bitfld.long 0x08 21. " XYROT ,XYRotation Operator Empty" "Not empty,Empty"
|
|
bitfld.long 0x08 20. " XYMOD ,XYModulo Operator Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ADDTEX ,Address Operator Texture Empty" "Not empty,Empty"
|
|
bitfld.long 0x08 18. " CACHTEX ,Cache Texture Empty Flow" "Not empty,Empty"
|
|
bitfld.long 0x08 17. " DEPACTEX ,DePacker Texture Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x08 16. " PIXSER ,Pixel Serialiser Operator Empty" "Not empty,Empty"
|
|
bitfld.long 0x08 15. " TRSPOP ,Transparency Operator Empty" "Not empty,Empty"
|
|
bitfld.long 0x08 14. " PIXBIL ,Pixel Bilinear Operator Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x08 13. " COLCONV ,Color Conversion Empty" "Not empty,Empty"
|
|
bitfld.long 0x08 12. " SFIFOWRE ,Source FIFO Write Empty" "Not empty,Empty"
|
|
bitfld.long 0x08 11. " PIXOP ,PixelOperator Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x08 10. " DFIFORDE ,Destination FIFO Read Empty" "Not empty,Empty"
|
|
bitfld.long 0x08 9. " ADDFRMOUT ,Address Operator Frame-Out Empty" "Not empty,Empty"
|
|
bitfld.long 0x08 8. " CACFRMOUT ,Cache Frame-Out Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x08 7. " CACHBNK0 ,Cache Bank 0 Empty" "Not empty,Empty"
|
|
bitfld.long 0x08 6. " CACHBNK1 ,Cache Bank 1 Empty" "Not empty,Empty"
|
|
bitfld.long 0x08 5. " CACHBNK2 ,Cache Bank 2 Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x08 4. " SDMAFSME ,Source DMAFSM Flows Empty" "Not empty,Empty"
|
|
bitfld.long 0x08 3. " DDMAFSME ,Destination DMAFSM Flows Empty" "Not empty,Empty"
|
|
bitfld.long 0x08 2. " AHBME ,AHB Master Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x08 1. " SPIPE ,Source Pipe Empty" "Not empty,Empty"
|
|
bitfld.long 0x08 0. " TPIPE ,Total Pipe Empty" "Not empty,Empty"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "SGA_GITR,SGA Get Instruction Test Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " GET31_Set/Clr ,Instruction TestRegister 31 status" "Low,High"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " GET30_Set/Clr ,Instruction TestRegister 30 status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " GET29_Set/Clr ,Instruction TestRegister 29 status" "Low,High"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " GET28_Set/Clr ,Instruction TestRegister 28 status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " GET27_Set/Clr ,Instruction TestRegister 27 status" "Low,High"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " GET26_Set/Clr ,Instruction TestRegister 26 status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " GET25_Set/Clr ,Instruction TestRegister 25 status" "Low,High"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " GET24_Set/Clr ,Instruction TestRegister 24 status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " GET23_Set/Clr ,Instruction TestRegister 23 status" "Low,High"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " GET22_Set/Clr ,Instruction TestRegister 22 status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " GET21_Set/Clr ,Instruction TestRegister 21 status" "Low,High"
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " GET20_Set/Clr ,Instruction TestRegister 20 status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " GET19_Set/Clr ,Instruction TestRegister 19 status" "Low,High"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " GET18_Set/Clr ,Instruction TestRegister 18 status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " GET17_Set/Clr ,Instruction TestRegister 17 status" "Low,High"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " GET16_Set/Clr ,Instruction TestRegister 16 status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " GET15_Set/Clr ,Instruction TestRegister 15 status" "Low,High"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " GET14_Set/Clr ,Instruction TestRegister 14 status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " GET13_Set/Clr ,Instruction TestRegister 13 status" "Low,High"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " GET12_Set/Clr ,Instruction TestRegister 12 status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " GET11_Set/Clr ,Instruction TestRegister 11 status" "Low,High"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " GET10_Set/Clr ,Instruction TestRegister 10 status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " GET9_Set/Clr ,Instruction TestRegister 9 status" "Low,High"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " GET8_Set/Clr ,Instruction TestRegister 8 status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " GET7_Set/Clr ,Instruction TestRegister 7 status" "Low,High"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " GET6_Set/Clr ,Instruction TestRegister 6 status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " GET5_Set/Clr ,Instruction TestRegister 5 status" "Low,High"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " GET4_Set/Clr ,Instruction TestRegister 4 status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " GET3_Set/Clr ,Instruction TestRegister 3 status" "Low,High"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " GET2_Set/Clr ,Instruction TestRegister 2 status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " GET1_Set/Clr ,Instruction TestRegister 1 status" "Low,High"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " GET0_Set/Clr ,Instruction TestRegister 0 status" "Low,High"
|
|
rgroup.long 0x3C++0x1F
|
|
line.long 0x00 "SGA_STTR,SGA Statistics on Triangle Requests"
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " ATR ,Amount of Triange Requested"
|
|
line.long 0x04 "SGA_STFR,SGA Statistics on Fragment Raw Requests"
|
|
hexmask.long 0x04 0.--25. 1. " ARFR ,Amount of Raw Fragment Requested"
|
|
line.long 0x08 "SGA_STFZ,SGA Statistics on Fragment DepthPassed Requests"
|
|
hexmask.long 0x08 0.--25. 1. " ADPFR ,Amount of DepthPassed Fragment requested"
|
|
line.long 0x0C "SGA_STTX,SGA Statistics on Texture Cache Requests"
|
|
hexmask.long 0x0C 0.--27. 1. " ATCR ,Amount of Texture Cache Requests"
|
|
line.long 0x10 "SGA_STFMRF,SGA Statistics on FrameBuffer Cache Refills"
|
|
hexmask.long.tbyte 0x10 0.--23. 1. " AFBCR ,Amount of FrameBuffer Cache Refills"
|
|
line.long 0x14 "SGA_STTXRF,SGA Statistics on Texture Cache Refills"
|
|
hexmask.long.tbyte 0x14 0.--23. 1. " ATCR ,Amount of Texture Cache Refills"
|
|
line.long 0x18 "SGA_STINRF,SGA Statistics on Instruction Refills"
|
|
hexmask.long.tbyte 0x18 0.--23. 1. " AIR ,Amount of Instruction Refills"
|
|
line.long 0x1C "SGA_STCK,SGA Statistics on Clock Cycles"
|
|
hexmask.long 0x1C 0.--27. 1. " ACC ,Amount of Clock Cycles"
|
|
if (((d.l(asd:0x101C2000+0x04))&0x08)==0x08)
|
|
rgroup.long 0x5C++0x03
|
|
line.long 0x00 "SGA_MIS1,SGA Masked Interrupt1 Status Register"
|
|
bitfld.long 0x00 31. " GEN25MIS ,Instruction SendInt25 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 30. " GEN24MIS1 ,Instruction SendInt24 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 29. " GEN23MIS1 ,Instruction SendInt23 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GEN22MIS1 ,Instruction SendInt22 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 27. " GEN21MIS1 ,Instruction SendInt21 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 26. " GEN20MIS1 ,Instruction SendInt20 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GEN19MIS1 ,Instruction SendInt19 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 24. " GEN18MIS1 ,Instruction SendInt18 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 23. " GEN17MIS1 ,Instruction SendInt17 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GEN16MIS1 ,Instruction SendInt16 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 21. " GEN15MIS1 ,Instruction SendInt15 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 20. " GEN14MIS1 ,Instruction SendInt14 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GEN13MIS1 ,Instruction SendInt13 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 18. " GEN12MIS1 ,Instruction SendInt12 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 17. " GEN11MIS1 ,Instruction SendInt11 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GEN10MIS1 ,Instruction SendInt10 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 15. " GEN9MIS1 ,Instruction SendInt9 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 14. " GEN8MIS1 ,Instruction SendInt8 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GEN7MIS1 ,Instruction SendInt7 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. " GEN6MIS1 ,Instruction SendInt6 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 11. " GEN5MIS1 ,Instruction SendInt5 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GEN4MIS1 ,Instruction SendInt4 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 9. " GEN3MIS1 ,Instruction SendInt3 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " GEN2MIS1 ,Instruction SendInt2 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRESUM1MIS1 ,Instruction Resume 1 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. " RESUM0MIS1 ,Instruction Resume 0 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " AHBEMIS1 ,AHB Error Masked Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 4. " HANGMIS1 ,Hanging Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " IFIFOOVMIS1 ,Instruction FIFO Overrun Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " IFIFOEMIS1 ,Instruction FIFO Empty Masked Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GEN1MIS1 ,Instruction SendInt1 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " GEN0MIS1 ,Instruction SendInt0 Masked Interrupt Status" "No interrupt,Interrupt"
|
|
else
|
|
hgroup.long 0x5C++0x03
|
|
hide.long 0x00 "SGA_MIS1,SGA Masked Interrupt1 Status Register"
|
|
in
|
|
endif
|
|
rgroup.long 0x60++0x03
|
|
line.long 0x00 "SGA_IMSC1,SGA Interrupt1 Mask Set/Clear Register"
|
|
bitfld.long 0x00 31. " GEN25IM1 ,Instruction SendInt25 Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " GEN24IM1 ,Instruction SendInt24 Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " GEN23IM1 ,Instruction SendInt23 Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GEN22IM1 ,Instruction SendInt22 Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " GEN21IM1 ,Instruction SendInt21 Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " GEN20IM1 ,Instruction SendInt20 Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GEN19IM1 ,Instruction SendInt19 Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " GEN18IM1 ,Instruction SendInt18 Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " GEN17IM1 ,Instruction SendInt17 Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GEN16IM1 ,Instruction SendInt16 Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " GEN15IM1 ,Instruction SendInt15 Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " GEN14IM1 ,Instruction SendInt14 Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GEN13IM1 ,Instruction SendInt13 Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " GEN12IM1 ,Instruction SendInt12 Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " GEN11IM1 ,Instruction SendInt11 Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GEN10IM1 ,Instruction SendInt10 Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " GEN9IM1 ,Instruction SendInt9 Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " GEN8IM1 ,Instruction SendInt8 Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GEN7IM1 ,Instruction SendInt7 Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " GEN6IM1 ,Instruction SendInt6 Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " GEN5IM1 ,Instruction SendInt5 Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GEN4IM1 ,Instruction SendInt4 Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " GEN3IM1 ,Instruction SendInt3 Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " GEN2IM1 ,Instruction SendInt2 Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRESUM1IM1 ,Instruction Resume 1 Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " RESUM0IM1 ,Instruction Resume 0 Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " AHBEIM1 ,AHB Error Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " HANGIM1 ,Hanging Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " IFIFOOVIM1 ,Instruction FIFO Overrun Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " IFIFOEIM1 ,Instruction FIFO Empty Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GEN1IM1 ,Instruction SendInt1 Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " GEN0IM1 ,Instruction SendInt0 Interrupt Mask" "Not masked,Masked"
|
|
width 16.
|
|
rgroup.long 0x7e0++0x01f
|
|
line.long 0x00 "SGAPERIPHID0,SGA Peripheral Identification Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PN0 ,Part Number 0 (0x02)"
|
|
line.long 0x04 "SGAPERIPHID1,SGA Peripheral Identification Register 1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " D0 ,Designer 0 (0x06)"
|
|
hexmask.long.byte 0x04 0.--3. 1. " PN1 ,Part Number 1 (0x02)"
|
|
line.long 0x08 "SGAPERIPHID2,SGA Peripheral Identification Register 2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " REV ,Revision (0x02)"
|
|
hexmask.long.byte 0x08 0.--3. 1. " D1 ,Designer 1 (0x0D)"
|
|
line.long 0x0c "SGAPERIPHID3,SGA Peripheral Identification Register 3"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " CONF ,Configuration (0x00)"
|
|
line.long 0x10 "SGAPCELLID0,SGA PCell Identification Register 0"
|
|
hexmask.long.byte 0x10 0.--7. 1. " SGAPCELLID0 ,SGA PCell ID0 (0x0D)"
|
|
line.long 0x14 "SGAPCELLID1,SGA PCell Identification Register 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " SGAPCELLID1 ,SGA PCell ID1 (0xF0)"
|
|
line.long 0x18 "SGAPCELLID2,SGA PCell Identification Register 2"
|
|
hexmask.long.byte 0x18 0.--7. 1. " SGAPCELLID2 ,SGA PCell ID2 (0x05)"
|
|
line.long 0x1c "SGAPCELLID3,SGA PCell Identification Register 3"
|
|
hexmask.long.byte 0x1c 0.--7. 1. " SGAPCELLID3 ,SGA PCell ID3 (0xB1)"
|
|
width 0xb
|
|
tree.end
|
|
tree "LCDC (LCD Controller)"
|
|
base asd:0x10120000
|
|
width 15.
|
|
group.long 0x00++0x1b
|
|
line.long 0x00 "LCD_TIM0,LCDC Timing Register 0"
|
|
hexmask.long.byte 0x00 24.--31. 1. " HBP ,Horizontal Back Porch"
|
|
hexmask.long.byte 0x00 16.--23. 1. " HFP ,Horizontal Front Porch"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " HSW ,Horizontal Synchronization pulse Width"
|
|
hexmask.long.byte 0x00 2.--7. 1. " PPL ,Pixels-Per-Line"
|
|
line.long 0x04 "LCD_TIM1,LCDC Timing Register 1"
|
|
hexmask.long.byte 0x04 24.--31. 1. " VBP ,Vertical Back Porch"
|
|
hexmask.long.byte 0x04 16.--23. 1. " VFP ,Vertical Front Porch"
|
|
textline " "
|
|
bitfld.long 0x04 10.--15. " VSW ,Vertical Synchronization pulse Width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hexmask.long.word 0x04 0.--9. 1. " LPP ,Line-Per-Panel"
|
|
line.long 0x08 "LCD_TIM2,LCDC Timing Register 2"
|
|
bitfld.long 0x08 27.--31. " PCD_HI ,Panel Clock divisor, upper five bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x08 26. " BCD ,Bypass pixel Clock divider" "Not bypassed,Bypassed"
|
|
textline " "
|
|
hexmask.long.word 0x08 16.--25. 1. " CPL ,Clock Per Line"
|
|
bitfld.long 0x08 14. " IOE ,Invert Output enable" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x08 13. " IPC ,Invert panel clock" "Rising edge,Falling edge"
|
|
bitfld.long 0x08 12. " IHS ,Invert Horizontal synchronization" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x08 11. " IVS ,Invert Vertical synchronization" "Active high,Active low"
|
|
bitfld.long 0x08 6.--10. " ACB ,AC bias pin frequency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x08 5. " CLKSEL ,Clock selection" "48 MHz,72 MHz"
|
|
bitfld.long 0x08 0.--4. " PCD_LO ,Panel Clock divisor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x0c "LCD_TIM3,LCDC Timing Register 3"
|
|
bitfld.long 0x0C 28.--31. " REVDEL ,REV Delay" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x0C 25. " INVCLK ,Invert CLocK" "Inverted,Not inverted"
|
|
textline " "
|
|
hexmask.long.word 0x0C 16.--24. 1. " CLSDEL2 ,CLS Delay 2"
|
|
bitfld.long 0x0C 12.--15. " LPDEL ,LP delay" "No delay,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
textline " "
|
|
bitfld.long 0x0C 8.--10. " CLSDEL ,CLS Delay" "No delay,2,3,4,5,6,7,?..."
|
|
hexmask.long.byte 0x0C 0.--7. 1. " SPLDEL ,SPL Delay"
|
|
line.long 0x10 "LCD_UPBASE,LCDC Upper Panel Base Address Register"
|
|
hexmask.long 0x10 2.--31. 0x4 " LCDUPBASE ,LCD Upper Panel Base address"
|
|
line.long 0x14 "LCD_LPBASE,LCDC Lower Panel Base Address Register"
|
|
hexmask.long 0x14 2.--31. 0x4 " LCDLPBASE ,LCD Lower Panel Base address"
|
|
line.long 0x18 "LCD_IMSC,LCDC Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x18 4. " MBERIM ,AHB master error interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x18 3. " VCMPIM ,Vertical compare interrupt mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x18 2. " LNBUIM ,Next base update interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x18 1. " FUIM ,FIFO underflow interrupt mask" "Masked,Not masked"
|
|
if (((data.long(asd:0x10120000+0x1c))&0x0e)==0x08)
|
|
group.long 0x1c++0x03
|
|
line.long 0x00 "LCD_CR,LCDC Control Register"
|
|
bitfld.long 0x00 21. " CEAEN ,Color Enhancement Algorithm (16-bpp to 18-bpp) Enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 19.--20. " CDWID ,CLCD data bus width selection" "12 bits,16 bits,18 bits,24 bits"
|
|
textline " "
|
|
bitfld.long 0x00 17.--18. " 1XBPP ,12, 15, or 16 bits per pixel selection" "4:4:4,5:5:5,5:6:5,?..."
|
|
bitfld.long 0x00 16. " WMLVL ,LCD DMA FIFO Watermark level" "4 or more,8 or more"
|
|
textline " "
|
|
bitfld.long 0x00 15. " HRTFT ,HR-TFT panel selection" "Normal TFT,HR-TFT/AD-TFT"
|
|
bitfld.long 0x00 14. " FRMEN ,Frame Modulation enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " LCDVCOMP ,Interrupt generation events" "Vertical synchronization,Back porch,Active video,Front porch"
|
|
bitfld.long 0x00 11. " LCDPWR ,LCD power enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " BEPO ,Big-endian pixel ordering within a byte" "Little-endian,Big-endian"
|
|
bitfld.long 0x00 9. " BEBO ,Big-endian byte order" "Little-endian,Big-endian"
|
|
textline " "
|
|
bitfld.long 0x00 8. " BGR ,RGB/BGR format selection" "RGB normal output,BGR red/blue swapped"
|
|
bitfld.long 0x00 7. " LCDDUAL ,STN single/dual panel selection" "Single,Dual"
|
|
textline " "
|
|
bitfld.long 0x00 6. " STNMWD ,STN Monochrome interface Width" "4-bit,8-bit"
|
|
bitfld.long 0x00 5. " STNTFT ,STN or TFT panel selection" "STN,TFT"
|
|
textline " "
|
|
bitfld.long 0x00 4. " STNBW ,STN panel monochrome selection (Black and White)" "Color,Monochrome"
|
|
bitfld.long 0x00 1.--3. " LCDBPP ,LCD bits per pixel selection" "1 bpp,2 bpp,4 bpp,8 bpp,12/15/16 bpp,24 bpp,24 bpp,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0. " LCDEN ,LCD controller enable (CLLPHS, CLPCK, CLFPVS, CLACDE, CLPS, CLDPL/R, CLREV)" "Disabled,Enabled"
|
|
else
|
|
group.long 0x1c++0x03
|
|
line.long 0x00 "LCD_CR,LCDC Control Register"
|
|
bitfld.long 0x00 21. " CEAEN ,Color Enhancement Algorithm (16-bpp to 18-bpp) Enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 19.--20. " CDWID ,CLCD data bus width selection" "12 bits,16 bits,18 bits,24 bits"
|
|
textline " "
|
|
bitfld.long 0x00 16. " WMLVL ,LCD DMA FIFO Watermark level" "4 or more,8 or more"
|
|
textline " "
|
|
bitfld.long 0x00 15. " HRTFT ,HR-TFT panel selection" "Normal TFT,HR-TFT/AD-TFT"
|
|
bitfld.long 0x00 14. " FRMEN ,Frame Modulation enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " LCDVCOMP ,Interrupt generation events" "Vertical synchronization,Back porch,Active video,Front porch"
|
|
bitfld.long 0x00 11. " LCDPWR ,LCD power enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " BEPO ,Big-endian pixel ordering within a byte" "Little-endian,Big-endian"
|
|
bitfld.long 0x00 9. " BEBO ,Big-endian byte order" "Little-endian,Big-endian"
|
|
textline " "
|
|
bitfld.long 0x00 8. " BGR ,RGB/BGR format selection" "RGB normal output,BGR red/blue swapped"
|
|
bitfld.long 0x00 7. " LCDDUAL ,STN single/dual panel selection" "Single,Dual"
|
|
textline " "
|
|
bitfld.long 0x00 6. " STNMWD ,STN Monochrome interface Width" "4-bit,8-bit"
|
|
bitfld.long 0x00 5. " STNTFT ,STN or TFT panel selection" "STN,TFT"
|
|
textline " "
|
|
bitfld.long 0x00 4. " STNBW ,STN panel monochrome selection (Black and White)" "Color,Monochrome"
|
|
bitfld.long 0x00 1.--3. " LCDBPP ,LCD bits per pixel selection" "1 bpp,2 bpp,4 bpp,8 bpp,12/15/16 bpp,24 bpp,24 bpp,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0. " LCDEN ,LCD controller enable (CLLPHS, CLPCK, CLFPVS, CLACDE, CLPS, CLDPL/R, CLREV)" "Disabled,Enabled"
|
|
endif
|
|
width 15.
|
|
group.long 0x20++0x0f
|
|
line.long 0x00 "LCD_RIS,LCDC Raw Interrupt Status Register"
|
|
bitfld.long 0x00 4. " MERRIS ,AMBA AHB master bus error status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " VCMPRIS ,Vertical compare status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LNBURIS ,LCD next address base update" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " FURIS ,FIFO underflow" "No interrupt,Interrupt"
|
|
line.long 0x04 "LCD_MIS,LCDC Masked Interrupt Status Register"
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|
bitfld.long 0x04 4. " MERMIS ,AHB master error interrupt status bit" "No interrupt,Interrupt"
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|
bitfld.long 0x04 3. " VCMPMIS ,Vertical compare interrupt status bit" "No interrupt,Interrupt"
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|
textline " "
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|
bitfld.long 0x04 2. " LNBUMIS ,LCD next base update interrupt status bit" "No interrupt,Interrupt"
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|
bitfld.long 0x04 1. " FUMIS ,FIFO underflow interrupt status bit" "No interrupt,Interrupt"
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|
line.long 0x08 "LCD_UPCURR,LCDC Upper Panel Current Address Register"
|
|
line.long 0x0c "LCD_LPCUR,LCDC Lower Panel Current Address Register"
|
|
width 15.
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "LCD_PAL0,LCDC Palette Registers"
|
|
bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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|
bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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|
bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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|
bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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|
bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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|
bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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|
group.long 0x204++0x03
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|
line.long 0x00 "LCD_PAL1,LCDC Palette Registers"
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|
bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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|
bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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|
bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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|
bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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|
bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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|
bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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|
group.long 0x208++0x03
|
|
line.long 0x00 "LCD_PAL2,LCDC Palette Registers"
|
|
bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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|
bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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|
bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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|
bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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|
bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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|
bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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|
group.long 0x20C++0x03
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|
line.long 0x00 "LCD_PAL3,LCDC Palette Registers"
|
|
bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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|
bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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|
bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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|
bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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|
bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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|
bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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|
group.long 0x210++0x03
|
|
line.long 0x00 "LCD_PAL4,LCDC Palette Registers"
|
|
bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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|
bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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|
bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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|
bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x214++0x03
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|
line.long 0x00 "LCD_PAL5,LCDC Palette Registers"
|
|
bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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|
bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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|
bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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|
bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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|
bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x218++0x03
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line.long 0x00 "LCD_PAL6,LCDC Palette Registers"
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|
bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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|
bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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|
group.long 0x21C++0x03
|
|
line.long 0x00 "LCD_PAL7,LCDC Palette Registers"
|
|
bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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|
bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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|
bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x220++0x03
|
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line.long 0x00 "LCD_PAL8,LCDC Palette Registers"
|
|
bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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|
bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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|
bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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|
bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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|
group.long 0x224++0x03
|
|
line.long 0x00 "LCD_PAL9,LCDC Palette Registers"
|
|
bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x228++0x03
|
|
line.long 0x00 "LCD_PAL10,LCDC Palette Registers"
|
|
bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x22C++0x03
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line.long 0x00 "LCD_PAL11,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x230++0x03
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line.long 0x00 "LCD_PAL12,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x234++0x03
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line.long 0x00 "LCD_PAL13,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x238++0x03
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line.long 0x00 "LCD_PAL14,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x23C++0x03
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line.long 0x00 "LCD_PAL15,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x240++0x03
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line.long 0x00 "LCD_PAL16,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x244++0x03
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line.long 0x00 "LCD_PAL17,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x248++0x03
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line.long 0x00 "LCD_PAL18,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x24C++0x03
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line.long 0x00 "LCD_PAL19,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x250++0x03
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line.long 0x00 "LCD_PAL20,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x254++0x03
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line.long 0x00 "LCD_PAL21,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x258++0x03
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line.long 0x00 "LCD_PAL22,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x25C++0x03
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line.long 0x00 "LCD_PAL23,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x260++0x03
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line.long 0x00 "LCD_PAL24,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x264++0x03
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line.long 0x00 "LCD_PAL25,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x268++0x03
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line.long 0x00 "LCD_PAL26,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x26C++0x03
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line.long 0x00 "LCD_PAL27,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x270++0x03
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line.long 0x00 "LCD_PAL28,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x274++0x03
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line.long 0x00 "LCD_PAL29,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x278++0x03
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line.long 0x00 "LCD_PAL30,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x27C++0x03
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line.long 0x00 "LCD_PAL31,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x280++0x03
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line.long 0x00 "LCD_PAL32,LCDC Palette Registers"
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|
bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x284++0x03
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line.long 0x00 "LCD_PAL33,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x288++0x03
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line.long 0x00 "LCD_PAL34,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x28C++0x03
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line.long 0x00 "LCD_PAL35,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x290++0x03
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line.long 0x00 "LCD_PAL36,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x294++0x03
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line.long 0x00 "LCD_PAL37,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x298++0x03
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line.long 0x00 "LCD_PAL38,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x29C++0x03
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line.long 0x00 "LCD_PAL39,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x2A0++0x03
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line.long 0x00 "LCD_PAL40,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x2A4++0x03
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line.long 0x00 "LCD_PAL41,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x2A8++0x03
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line.long 0x00 "LCD_PAL42,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x2AC++0x03
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line.long 0x00 "LCD_PAL43,LCDC Palette Registers"
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|
bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x2B0++0x03
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line.long 0x00 "LCD_PAL44,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x2B4++0x03
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line.long 0x00 "LCD_PAL45,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x2B8++0x03
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line.long 0x00 "LCD_PAL46,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x2BC++0x03
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line.long 0x00 "LCD_PAL47,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x2C0++0x03
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line.long 0x00 "LCD_PAL48,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x2C4++0x03
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line.long 0x00 "LCD_PAL49,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x2C8++0x03
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line.long 0x00 "LCD_PAL50,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x2CC++0x03
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line.long 0x00 "LCD_PAL51,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x2D0++0x03
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line.long 0x00 "LCD_PAL52,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x2D4++0x03
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line.long 0x00 "LCD_PAL53,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x2D8++0x03
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line.long 0x00 "LCD_PAL54,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x2DC++0x03
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line.long 0x00 "LCD_PAL55,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x2E0++0x03
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line.long 0x00 "LCD_PAL56,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x2E4++0x03
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line.long 0x00 "LCD_PAL57,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x2E8++0x03
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line.long 0x00 "LCD_PAL58,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x2EC++0x03
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line.long 0x00 "LCD_PAL59,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x2F0++0x03
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line.long 0x00 "LCD_PAL60,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x2F4++0x03
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line.long 0x00 "LCD_PAL61,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x2F8++0x03
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line.long 0x00 "LCD_PAL62,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x2FC++0x03
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line.long 0x00 "LCD_PAL63,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x300++0x03
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line.long 0x00 "LCD_PAL64,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x304++0x03
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line.long 0x00 "LCD_PAL65,LCDC Palette Registers"
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|
bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x308++0x03
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line.long 0x00 "LCD_PAL66,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x30C++0x03
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line.long 0x00 "LCD_PAL67,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x310++0x03
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line.long 0x00 "LCD_PAL68,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x314++0x03
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line.long 0x00 "LCD_PAL69,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x318++0x03
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line.long 0x00 "LCD_PAL70,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x31C++0x03
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line.long 0x00 "LCD_PAL71,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x320++0x03
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line.long 0x00 "LCD_PAL72,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x324++0x03
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line.long 0x00 "LCD_PAL73,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x328++0x03
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line.long 0x00 "LCD_PAL74,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x32C++0x03
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line.long 0x00 "LCD_PAL75,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x330++0x03
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|
line.long 0x00 "LCD_PAL76,LCDC Palette Registers"
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|
bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x334++0x03
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line.long 0x00 "LCD_PAL77,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x338++0x03
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line.long 0x00 "LCD_PAL78,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x33C++0x03
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line.long 0x00 "LCD_PAL79,LCDC Palette Registers"
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|
bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x340++0x03
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line.long 0x00 "LCD_PAL80,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x344++0x03
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line.long 0x00 "LCD_PAL81,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x348++0x03
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line.long 0x00 "LCD_PAL82,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x34C++0x03
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line.long 0x00 "LCD_PAL83,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x350++0x03
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line.long 0x00 "LCD_PAL84,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x354++0x03
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line.long 0x00 "LCD_PAL85,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x358++0x03
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line.long 0x00 "LCD_PAL86,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x35C++0x03
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line.long 0x00 "LCD_PAL87,LCDC Palette Registers"
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|
bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x360++0x03
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line.long 0x00 "LCD_PAL88,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x364++0x03
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line.long 0x00 "LCD_PAL89,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x368++0x03
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line.long 0x00 "LCD_PAL90,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x36C++0x03
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line.long 0x00 "LCD_PAL91,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x370++0x03
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line.long 0x00 "LCD_PAL92,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x374++0x03
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line.long 0x00 "LCD_PAL93,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x378++0x03
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line.long 0x00 "LCD_PAL94,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x37C++0x03
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line.long 0x00 "LCD_PAL95,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x380++0x03
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line.long 0x00 "LCD_PAL96,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x384++0x03
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line.long 0x00 "LCD_PAL97,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x388++0x03
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line.long 0x00 "LCD_PAL98,LCDC Palette Registers"
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|
bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x38C++0x03
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line.long 0x00 "LCD_PAL99,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x390++0x03
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line.long 0x00 "LCD_PAL100,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x394++0x03
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line.long 0x00 "LCD_PAL101,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x398++0x03
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line.long 0x00 "LCD_PAL102,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x39C++0x03
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line.long 0x00 "LCD_PAL103,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x3A0++0x03
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line.long 0x00 "LCD_PAL104,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x3A4++0x03
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line.long 0x00 "LCD_PAL105,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x3A8++0x03
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line.long 0x00 "LCD_PAL106,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x3AC++0x03
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line.long 0x00 "LCD_PAL107,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x3B0++0x03
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line.long 0x00 "LCD_PAL108,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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|
group.long 0x3B4++0x03
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line.long 0x00 "LCD_PAL109,LCDC Palette Registers"
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|
bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x3B8++0x03
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line.long 0x00 "LCD_PAL110,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x3BC++0x03
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line.long 0x00 "LCD_PAL111,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x3C0++0x03
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line.long 0x00 "LCD_PAL112,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x3C4++0x03
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line.long 0x00 "LCD_PAL113,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x3C8++0x03
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line.long 0x00 "LCD_PAL114,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x3CC++0x03
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line.long 0x00 "LCD_PAL115,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x3D0++0x03
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line.long 0x00 "LCD_PAL116,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x3D4++0x03
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line.long 0x00 "LCD_PAL117,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x3D8++0x03
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line.long 0x00 "LCD_PAL118,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x3DC++0x03
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line.long 0x00 "LCD_PAL119,LCDC Palette Registers"
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bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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group.long 0x3E0++0x03
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line.long 0x00 "LCD_PAL120,LCDC Palette Registers"
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|
bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x3E4++0x03
|
|
line.long 0x00 "LCD_PAL121,LCDC Palette Registers"
|
|
bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x3E8++0x03
|
|
line.long 0x00 "LCD_PAL122,LCDC Palette Registers"
|
|
bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x3EC++0x03
|
|
line.long 0x00 "LCD_PAL123,LCDC Palette Registers"
|
|
bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x3F0++0x03
|
|
line.long 0x00 "LCD_PAL124,LCDC Palette Registers"
|
|
bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x3F4++0x03
|
|
line.long 0x00 "LCD_PAL125,LCDC Palette Registers"
|
|
bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x3F8++0x03
|
|
line.long 0x00 "LCD_PAL126,LCDC Palette Registers"
|
|
bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x3FC++0x03
|
|
line.long 0x00 "LCD_PAL127,LCDC Palette Registers"
|
|
bitfld.long 0x00 27.--31. " R1 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 21.--26. " G1 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 16.--20. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 11.--15. " R0 ,Red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 5.--10. " G0 ,Green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--4. " B1 ,Blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
width 15.
|
|
rgroup.long 0xfe0++0x1f
|
|
line.long 0x00 "LCDCPERIPHID0,LCDC Peripheral Identification Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PARTNUMBER0 ,Part Number 0"
|
|
line.long 0x04 "LCDCPERIPHID1,LCDC Peripheral Identification Register 1"
|
|
bitfld.long 0x04 4.--7. " DESIGNER0 ,Designer 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 0.--3. " PARTNUMBER1 ,Part Number 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x08 "LCDCPERIPHID2,LCDC Peripheral Identification Register 2"
|
|
bitfld.long 0x08 4.--7. " REVISION ,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x08 0.--3. " DESIGNER1 ,Designer 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x0c "LCDCPCELLID3,LCDC Primecell Identification Register 3"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " CONFIGURATION ,Configuration"
|
|
line.long 0x10 "LCDCPCELLID0,LCDC Primecell Identification Register 0"
|
|
hexmask.long.byte 0x10 0.--7. 1. " LCDCPCELLID0 ,LCDC Primcell Identification 0"
|
|
line.long 0x14 "LCDCPCELLID1,LCDC Primecell Identification Register 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " LCDCPCELLID1 ,LCDC Primcell Identification 1"
|
|
line.long 0x18 "LCDCPCELLID2,LCDC Primecell Identification Register 2"
|
|
hexmask.long.byte 0x18 0.--7. 1. " LCDCPCELLID2 ,LCDC Primcell Identification 2"
|
|
line.long 0x1c "LCDCPCELLID3,LCDC Primecell Identification Register 3"
|
|
hexmask.long.byte 0x1c 0.--7. 1. " LCDCPCELLID3 ,LCDC Primcell Identification 3"
|
|
width 0xb
|
|
tree.end
|
|
sif ((cpu()=="STA2065")||(cpu()=="STA2165"))
|
|
tree "High-Speed USB On-The-Go with Embedded FS PHY"
|
|
base asd:0x10170000
|
|
width 14.
|
|
if (((data.byte(asd:0x10170000+0x60))&0x04)==0x04)
|
|
hgroup.byte 0x00++0x00 "Common Registers"
|
|
hide.byte 0x00 "OTG_FADDR,OTG Function Address Register"
|
|
group.byte 0x01++0x00
|
|
line.byte 0x00 "OTG_PWR,OTG Power Register"
|
|
bitfld.byte 0x00 5. " HS_EN ,HS Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " HS_MD ,HS Mode" "Normal,Full-speed"
|
|
bitfld.byte 0x00 3. " RST ,Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " RSM ,Resume" "No resume,Resume"
|
|
bitfld.byte 0x00 1. " SUSP ,Suspend Mode" "Normal,Suspend"
|
|
bitfld.byte 0x00 0. " SUSPM ,Enable Suspend M" "Disabled,Enabled"
|
|
else
|
|
group.byte 0x00++0x01 "Common Registers"
|
|
line.byte 0x00 "OTG_FADDR,OTG Function Address Register"
|
|
hexmask.byte 0x00 0.--6. 1. " FUNC_ADDR ,Function Address"
|
|
line.byte 0x01 "OTG_PWR,OTG Power Register"
|
|
bitfld.byte 0x01 7. " ISO_UP ,ISO Update" "Not updated,Updated"
|
|
bitfld.byte 0x01 6. " SFCN ,Soft Connect" "Disabled,Enabled"
|
|
bitfld.byte 0x01 5. " HS_EN ,HS Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x01 4. " HS_MD ,HS Mode" "Normal,High-speed"
|
|
bitfld.byte 0x01 3. " RST ,Reset" "No reset,Reset"
|
|
bitfld.byte 0x01 2. " RSM ,Resume" "No resume,Resume"
|
|
textline " "
|
|
bitfld.byte 0x01 1. " SUSP ,Suspend Mode" "Normal,Suspend"
|
|
bitfld.byte 0x01 0. " SUSPM ,Enable Suspend M" "Disabled,Enabled"
|
|
endif
|
|
hgroup.word 0x02++0x01
|
|
hide.word 0x00 "OTG_INTTX,OTG Tx Interrupt Register"
|
|
in
|
|
hgroup.word 0x04++0x01
|
|
hide.word 0x00 "OTG_INTRX,OTG Rx Interrupt Register"
|
|
in
|
|
group.word 0x06++0x03
|
|
line.word 0x00 "OTG_INTTXEN,OTG Tx Interrupt Enable Register"
|
|
bitfld.word 0x00 7. " EP[7] ,EP 7 Tx Interrupt Mask" "Masked,Enabled"
|
|
bitfld.word 0x00 6. " EP[6] ,EP 6 Tx Interrupt Mask" "Masked,Enabled"
|
|
bitfld.word 0x00 5. " EP[5] ,EP 5 Tx Interrupt Mask" "Masked,Enabled"
|
|
bitfld.word 0x00 4. " EP[4] ,EP 4 Tx Interrupt Mask" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " EP[3] ,EP 3 Tx Interrupt Mask" "Masked,Enabled"
|
|
bitfld.word 0x00 2. " EP[2] ,EP 2 Tx Interrupt Mask" "Masked,Enabled"
|
|
bitfld.word 0x00 1. " EP[1] ,EP 1 Tx Interrupt Mask" "Masked,Enabled"
|
|
bitfld.word 0x00 0. " EP[0] ,EP 0 Tx Interrupt Mask" "Masked,Enabled"
|
|
line.word 0x02 "OTG_INTRXEN,OTG Rx Interrupt Enable Register"
|
|
bitfld.word 0x02 7. " EP[7] ,EP 7 Rx Interrupt Mask" "Masked,Enabled"
|
|
bitfld.word 0x02 6. " EP[6] ,EP 6 Rx Interrupt Mask" "Masked,Enabled"
|
|
bitfld.word 0x02 5. " EP[5] ,EP 5 Rx Interrupt Mask" "Masked,Enabled"
|
|
bitfld.word 0x02 4. " EP[4] ,EP 4 Rx Interrupt Mask" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.word 0x02 3. " EP[3] ,EP 3 Rx Interrupt Mask" "Masked,Enabled"
|
|
bitfld.word 0x02 2. " EP[2] ,EP 2 Rx Interrupt Mask" "Masked,Enabled"
|
|
bitfld.word 0x02 1. " EP[1] ,EP 1 Rx Interrupt Mask" "Masked,Enabled"
|
|
if (((data.byte(asd:0x10170000+0x60))&0x84)==0x04)
|
|
rgroup.byte 0x0a++0x00
|
|
line.byte 0x00 "OTG_INTUSB,Common USB Interrupt Register"
|
|
bitfld.byte 0x00 6. " SREQ ,Session Request" "Not requested,Requested"
|
|
bitfld.byte 0x00 5. " DISCON ,Disconnect" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " CONN ,Connect" "Not connected,Connected"
|
|
bitfld.byte 0x00 3. " SOF ,Start of Frame" "Not started,Started"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " RST ,Babble" "Not detected,Detected"
|
|
bitfld.byte 0x00 1. " RES ,Resume" "No resume,Resume"
|
|
elif (((data.byte(asd:0x10170000+0x60))&0x84)==0x84)
|
|
rgroup.byte 0x0a++0x00
|
|
line.byte 0x00 "OTG_INTUSB,Common USB Interrupt Register"
|
|
bitfld.byte 0x00 5. " DISCON ,Disconnect" "Connected,Disconnected"
|
|
bitfld.byte 0x00 4. " CONN ,Connect" "Disconnected,Connected"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " SOF ,Start of Frame" "Not started,Started"
|
|
bitfld.byte 0x00 2. " RST ,Babble" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " RES ,Resume" "No resume,Resume"
|
|
elif (((data.byte(asd:0x10170000+0x60))&0x84)==0x00)
|
|
rgroup.byte 0x0a++0x00
|
|
line.byte 0x00 "OTG_INTUSB,Common USB Interrupt Register"
|
|
bitfld.byte 0x00 7. " VBE ,VBUS Error" "No error,Error"
|
|
bitfld.byte 0x00 6. " SREQ ,Session Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " DISCON ,Disconnect" "Not ended,Ended"
|
|
bitfld.byte 0x00 3. " SOF ,Start of Frame" "Not started,Started"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " RST ,Reset" "No reset,Reset"
|
|
bitfld.byte 0x00 1. " RES ,Resume" "No resume,Resume"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
else
|
|
rgroup.byte 0x0a++0x00
|
|
line.byte 0x00 "OTG_INTUSB,Common USB Interrupt Register"
|
|
bitfld.byte 0x00 7. " VBE ,VBUS Error" "No error,Error"
|
|
bitfld.byte 0x00 5. " DISCON ,Disconnect" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " SOF ,Start of Frame" "Not started,Started"
|
|
bitfld.byte 0x00 2. " RST ,Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " RES ,Resume" "No resume,Resume"
|
|
bitfld.byte 0x00 0. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
endif
|
|
group.byte 0x0b++0x00
|
|
line.byte 0x00 "OTG_INTUSBEN,Common USB Interrupt Enable Register"
|
|
bitfld.byte 0x00 7. " VBEN ,VBUS Error Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " SREQN ,Session Request Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " DSCEN ,Disconnect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " CONEN ,Connect Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " SOFEN ,Start of Frame Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " RSTEN ,Reset/Babble Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " RESEN ,Resume Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " SSPEN ,Suspend Enable" "Disabled,Enabled"
|
|
rgroup.word 0x0c++0x01
|
|
line.word 0x00 "OTG_FMNO,OTG Frame Number Register"
|
|
hexmask.word 0x00 0.--10. 1. " FMNO ,Frame Number"
|
|
group.byte 0x0e++0x01
|
|
line.byte 0x00 "OTG_INDX,OTG Index Register"
|
|
bitfld.byte 0x00 0.--3. " EPNO ,Endpoint Number" "Ep 0,Ep 1,Ep 2,Ep 3,Ep 4,Ep 5,Ep 6,Ep 7,?..."
|
|
line.byte 0x01 "USB_TM,USB Test Mode Register"
|
|
bitfld.byte 0x01 7. " FRH ,Force Host" "Not forced,Forced"
|
|
bitfld.byte 0x01 6. " FIFOA ,FIFO Access" "Not transferred,Transferred"
|
|
textline " "
|
|
bitfld.byte 0x01 5. " FFS ,Force Full-Speed" "Not forced,Forced"
|
|
bitfld.byte 0x01 4. " FHS ,Force High-Speed" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.byte 0x01 3. " TSTPKT ,Test Packet" "Disabled,Enabled"
|
|
bitfld.byte 0x01 2. " TSTK ,Test K-state" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x01 1. " TSTJ ,Test J-state" "Disabled,Enabled"
|
|
bitfld.byte 0x01 0. " TSTNAK ,Test SE0/NAK" "Disabled,Enabled"
|
|
if (((data.byte(asd:0x10170000+0x0e))&0x0f)==(0x01||0x02||0x03||0x04||0x05||0x06||0x07))
|
|
group.word 0x10++0x01 "Indexed Registers"
|
|
line.word 0x00 "OTG_TXMAXP,OTG Tx Max Packet Size Register"
|
|
bitfld.word 0x00 11.--15. " MULT ,Multiplier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.word 0x00 0.--10. 1. " MAXP ,Maximum Payload Transmitted"
|
|
else
|
|
hgroup.word 0x10++0x01 "Indexed Registers"
|
|
hide.word 0x00 "OTG_TXMAXP,OTG Tx Max Packet Size Register"
|
|
endif
|
|
if (((data.byte(asd:0x10170000+0x60))&0x04)==0x04)&&(((data.byte(asd:0x10170000+0x0e))&0x0f)==0x00)
|
|
group.word 0x12++0x01
|
|
line.word 0x00 "OTG_CSR0,OTG EP0 Control and Status Register"
|
|
bitfld.word 0x00 11. " DPNG ,Disable Ping" "No,Yes"
|
|
bitfld.word 0x00 10. " DWE ,Data Toggle Write Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " DT ,Data Toggle" "Low,High"
|
|
bitfld.word 0x00 8. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 7. " NAK ,NAK Timeout" "Not halted,Halted"
|
|
bitfld.word 0x00 6. " STPK ,Status Packet" "Not performed,Performed"
|
|
textline " "
|
|
bitfld.word 0x00 5. " RPK ,Request Packet" "Not requested,Requested"
|
|
bitfld.word 0x00 4. " ERR ,Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 3. " STP ,Setup Packet" "Not sent,Sent"
|
|
bitfld.word 0x00 2. " RXS ,Receive Stall" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 1. " TRDY ,Tx Packet Ready" "Not ready,Ready"
|
|
bitfld.word 0x00 0. " RRDY ,Rx Packet Ready" "Not ready,Ready"
|
|
elif (((data.byte(asd:0x10170000+0x60))&0x04)==0x00)&&(((data.byte(asd:0x10170000+0x0e))&0x0f)==0x00)
|
|
group.word 0x12++0x01
|
|
line.word 0x00 "OTG_CSR0,OTG EP0 Control and Status Register"
|
|
bitfld.word 0x00 8. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
bitfld.word 0x00 7. " SSE ,Serviced Setup End" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 6. " SRDY ,Serviced Rx Packet Ready" "No effect,Cleared"
|
|
bitfld.word 0x00 5. " SND ,Send Stall" "Not terminated,Terminated"
|
|
textline " "
|
|
bitfld.word 0x00 4. " STE ,Setup End" "Not ended,Ended"
|
|
bitfld.word 0x00 3. " DE ,Data End" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.word 0x00 2. " SNT ,Sent Stall" "Not transmitted,Transmitted"
|
|
bitfld.word 0x00 1. " TRDY ,Tx Packet Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.word 0x00 0. " RRDY ,Rx Packet Ready" "Not ready,Ready"
|
|
elif (((data.byte(asd:0x10170000+0x60))&0x04)==0x04)&&(((data.byte(asd:0x10170000+0x0e))&0x0f)==(0x01||0x02||0x03||0x04||0x05||0x06||0x07))
|
|
group.word 0x12++0x01
|
|
line.word 0x00 "OTG_TXCSR,OTG Tx Control and Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 13. " MD ,Mode" "Rx,Tx"
|
|
textline " "
|
|
bitfld.word 0x00 12. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " FDT ,Force Data Toggle" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.word 0x00 10. " DRM ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 9. " DWE ,Data Toggle Write Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " DT ,Data Toggle" "Low,High"
|
|
bitfld.word 0x00 7. " NAK ,NAK Timeout" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.word 0x00 6. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 5. " RXS ,Rx Stall" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 4. " STP ,Setup Packet" "Not sent,Sent"
|
|
bitfld.word 0x00 3. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 2. " ERR ,Error" "No error,Error"
|
|
bitfld.word 0x00 1. " FNE ,FIFO Not Empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.word 0x00 0. " TRDY ,Tx Packet Ready" "Not ready,Ready"
|
|
elif (((data.byte(asd:0x10170000+0x60))&0x04)==0x00)&&(((data.byte(asd:0x10170000+0x0e))&0x0f)==(0x01||0x02||0x03||0x04||0x05||0x06||0x07))
|
|
group.word 0x12++0x01
|
|
line.word 0x00 "OTG_TXCSR,OTG Tx Control and Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ISO ,Isochronous Transfers" "Bulk/Interrupt,Isochronous"
|
|
textline " "
|
|
bitfld.word 0x00 13. " MD ,Mode" "Rx,Tx"
|
|
bitfld.word 0x00 12. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 11. " FDT ,Force Data Toggle" "Not forced,Forced"
|
|
bitfld.word 0x00 10. " DRM ,DMA Request Mode" "Mode 0,Mode 1"
|
|
textline " "
|
|
bitfld.word 0x00 7. " ITX ,Incomplete" "Not incomplete,Incomplete"
|
|
bitfld.word 0x00 6. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 5. " STS ,Sent Stall" "Not transmitted,Transmitted"
|
|
bitfld.word 0x00 4. " SDS ,Send Stall" "Not issued,Issued"
|
|
textline " "
|
|
bitfld.word 0x00 3. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
bitfld.word 0x00 2. " UND ,Underrun" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FNE ,FIFO Not Empty" "Empty,Not empty"
|
|
bitfld.word 0x00 0. " TRDY ,Tx Packet Ready" "Not ready,Ready"
|
|
else
|
|
hgroup.word 0x12++0x01
|
|
hide.word 0x00 "OTG_TXCSR,OTG Tx Control and Status Register"
|
|
endif
|
|
if (((data.byte(asd:0x10170000+0x0e))&0x0f)==(0x01||0x02||0x03||0x04||0x05||0x06||0x07))
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "OTG_RXMAXP,OTG Rx Max Packet Size Register"
|
|
bitfld.word 0x00 11.--15. " MULT ,Multiplier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.word 0x00 0.--10. 1. " MAXP ,Maximum Payload Transmitted"
|
|
else
|
|
hgroup.word 0x14++0x01
|
|
hide.word 0x00 "OTG_RXMAXP,OTG Rx Max Packet Size Register"
|
|
endif
|
|
if (((data.byte(asd:0x10170000+0x60))&0x04)==0x04)&&(((data.byte(asd:0x10170000+0x0e))&0x0f)==(0x01||0x02||0x03||0x04||0x05||0x06||0x07))
|
|
group.word 0x16++0x01
|
|
line.word 0x00 "OTG_RXCSR,OTG Rx Control/Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ARQ ,Auto Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 13. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " DNY ,Disable NYET" "No,Yes"
|
|
textline " "
|
|
bitfld.word 0x00 11. " DMD ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 10. " DWE ,Data Toggle Write Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " DT ,Data Toggle" "Low,High"
|
|
bitfld.word 0x00 8. " IRX ,Incomp Rx" "Not incomplete,Incomplete"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 6. " RS ,Rx Stall" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 5. " RPK ,Request Packet" "Not requested,Requested"
|
|
bitfld.word 0x00 4. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 3. " DER ,Data Error/NAK Timeout" "No error,Error"
|
|
bitfld.word 0x00 2. " ER ,Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FFUL ,FIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 0. " RRDY ,Rx Packet Ready" "Not ready,Ready"
|
|
elif (((data.byte(asd:0x10170000+0x60))&0x04)==0x00)&&(((data.byte(asd:0x10170000+0x0e))&0x0f)==(0x01||0x02||0x03||0x04||0x05||0x06||0x07))
|
|
group.word 0x16++0x01
|
|
line.word 0x00 "OTG_RXCSR,OTG Rx Control/Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ISO ,ISO" "Bulk/Interrupt,Isochronous"
|
|
textline " "
|
|
bitfld.word 0x00 13. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " DNY ,Disable NYET" "No,Yes"
|
|
textline " "
|
|
bitfld.word 0x00 11. " DMD ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 8. " IRX ,Incomp Rx" "Not incomplete,Incomplete"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 6. " SNT ,Sent Stall" "Not transmitted,Transmitted"
|
|
textline " "
|
|
bitfld.word 0x00 5. " SND ,Send Stall" "Not issued,Issued"
|
|
bitfld.word 0x00 4. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 3. " FFUL ,FIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 2. " ERR ,Data Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " OR ,Overrun" "Not overrun,Overrun"
|
|
bitfld.word 0x00 0. " RRDY ,Rx Packet Ready" "Not ready,Ready"
|
|
else
|
|
hgroup.word 0x16++0x01
|
|
hide.word 0x00 "OTG_RXCSR,OTG Rx Control/Status Register"
|
|
endif
|
|
if (((data.word(asd:0x10170000+0x16))&0x01)==0x01)&&(((data.byte(asd:0x10170000+0x0e))&0x0f)==(0x01||0x02||0x03||0x04||0x05||0x06||0x07))
|
|
rgroup.word 0x18++0x01
|
|
line.word 0x00 "OTG_RXCNT,OTG Rx Bytes Received Counter"
|
|
hexmask.word 0x00 0.--12. 1. " RXCNT ,Endpoint Rx Count"
|
|
elif (((data.byte(asd:0x10170000+0x0e))&0x0f)==0x00)
|
|
rgroup.word 0x18++0x01
|
|
line.word 0x00 "OTG_COUNT0,OTG EP0 Bytes Received Counter"
|
|
hexmask.word.byte 0x00 0.--6. 1. " RXCNT0 ,EP0 Bytes Received"
|
|
else
|
|
hgroup.word 0x18++0x01
|
|
hide.word 0x00 "OTG_RXCNT,OTG Rx Bytes Received Counter"
|
|
endif
|
|
if (((data.byte(asd:0x10170000+0x60))&0x04)==0x04)&&(((data.byte(asd:0x10170000+0x0e))&0x0f)==(0x01||0x02||0x03||0x04||0x05||0x06||0x07))
|
|
group.byte 0x1a++0x03
|
|
line.byte 0x00 "OTG_TXTYPE,OTG Tx Transaction Control Register"
|
|
bitfld.byte 0x00 6.--7. " SPEED ,Operating Speed" "Reserved,High,Full,Low"
|
|
bitfld.byte 0x00 4.--5. " PROT ,Protocol" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--3. " EP ,Target Endpoint Number" "Ep 0,Ep 1,Ep 2,Ep 3,Ep 4,Ep 5,Ep 6,Ep 7,?..."
|
|
line.byte 0x01 "OTG_TXINTV,OTG Tx Polling Interval Register"
|
|
line.byte 0x02 "OTG_RXTYPE,OTG Rx Transaction Control Register"
|
|
bitfld.byte 0x02 6.--7. " SPEED ,Operating Speed" "Reserved,High,Full,Low"
|
|
bitfld.byte 0x02 4.--5. " PROT ,Protocol" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x02 0.--3. " EP ,Target Endpoint Number" "Ep 0,Ep 1,Ep 2,Ep 3,Ep 4,Ep 5,Ep 6,Ep 7,?..."
|
|
line.byte 0x03 "OTG_RXINTV,OTG Rx Polling Interval Register"
|
|
elif (((data.byte(asd:0x10170000+0x60))&0x04)==0x04)&&(((data.byte(asd:0x10170000+0x0e))&0x0f)==0x00)
|
|
group.byte 0x1a++0x01
|
|
line.byte 0x00 "OTG_TYPE0,OTG EP0 Speed Control Register"
|
|
bitfld.byte 0x00 6.--7. " SPEED ,Operating Speed" "Reserved,High,Full,Low"
|
|
line.byte 0x01 "OTG_NAKLIMIT0,OTG EP0 NAK Response Register"
|
|
hexmask.byte 0x01 0.--4. 1. " NAKLIMIT ,Frames to NAK"
|
|
hgroup.byte 0x1c++0x00
|
|
hide.byte 0x00 "OTG_RXTYPE,OTG Rx Transaction Control Register"
|
|
hgroup.byte 0x1d++0x00
|
|
hide.byte 0x00 "OTG_RXINTV,OTG Rx Polling Interval Register"
|
|
else
|
|
hgroup.byte 0x1a++0x00
|
|
hide.byte 0x00 "OTG_TXTYPE,OTG Tx Transaction Control Register"
|
|
hgroup.byte 0x1b++0x00
|
|
hide.byte 0x00 "OTG_TXINTV,OTG Tx Polling Interval Register"
|
|
hgroup.byte 0x1c++0x00
|
|
hide.byte 0x00 "OTG_RXTYPE,OTG Rx Transaction Control Register"
|
|
hgroup.byte 0x1d++0x00
|
|
hide.byte 0x00 "OTG_RXINTV,OTG Rx Polling Interval Register"
|
|
endif
|
|
if (((data.byte(asd:0x10170000+0x0e))&0x0f)==0x00)
|
|
rgroup.byte 0x1f++0x00
|
|
line.byte 0x00 "OTG_CFD,OTG Core Configuration Register"
|
|
bitfld.byte 0x00 7. " MPRXE ,Bulk Pkt Amalgamation" "Not selected,Selected"
|
|
bitfld.byte 0x00 6. " MPTXE ,Bulk Pkt Splitting" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " BE ,Big Endian" "Not selected,Selected"
|
|
bitfld.byte 0x00 4. " HBRXE ,High-Bandwith ISO Support" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " HBTXE ,High-Bandwith ISO Support" "Not selected,Selected"
|
|
bitfld.byte 0x00 2. " DYNF ,Dynamic FIFO Sizing" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " SC ,Soft Connect" "Not selected,Selected"
|
|
bitfld.byte 0x00 0. " UDI ,UTMI Data Width" "8 bits,16 bits"
|
|
else
|
|
hgroup.byte 0x1f++0x00
|
|
hide.byte 0x00 "OTG_CFD,OTG Core Configuration Register"
|
|
endif
|
|
tree "FIFOS"
|
|
hgroup.long 0x20++0x03
|
|
hide.long 0x00 "FIFO_0,Fifo for Endpoint 0"
|
|
in
|
|
hgroup.long 0x24++0x03
|
|
hide.long 0x00 "FIFO_1,Fifo for Endpoint 1"
|
|
in
|
|
hgroup.long 0x28++0x03
|
|
hide.long 0x00 "FIFO_2,Fifo for Endpoint 2"
|
|
in
|
|
hgroup.long 0x2c++0x03
|
|
hide.long 0x00 "FIFO_3,Fifo for Endpoint 3"
|
|
in
|
|
hgroup.long 0x30++0x03
|
|
hide.long 0x00 "FIFO_4,Fifo for Endpoint 4"
|
|
in
|
|
hgroup.long 0x34++0x03
|
|
hide.long 0x00 "FIFO_5,Fifo for Endpoint 5"
|
|
in
|
|
hgroup.long 0x38++0x03
|
|
hide.long 0x00 "FIFO_6,Fifo for Endpoint 6"
|
|
in
|
|
hgroup.long 0x3c++0x03
|
|
hide.long 0x00 "FIFO_7,Fifo for Endpoint 7"
|
|
in
|
|
tree.end
|
|
if (((data.byte(asd:0x10170000+0x60))&0x84)==0x04)
|
|
group.byte 0x60++0x00 "Dynamic Fifo Control Registers"
|
|
line.byte 0x00 "OTG_DEVCTL,OTG Device Control Register"
|
|
bitfld.byte 0x00 7. " BDEV ,B-Device" "A-Device,B-Device"
|
|
bitfld.byte 0x00 6. " FSDEV ,Full Speed" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " LSDEV ,Low Speed" "Not detected,Detected"
|
|
bitfld.byte 0x00 3.--4. " VBUS ,BUS" "Below SessionEnd,Above SessionEnd/below AValid,Above AValid/below VBusValid,Above VBusValid"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " HOST ,Host Mode" "Device,Host"
|
|
bitfld.byte 0x00 0. " SESS ,Session" "Ended,Started"
|
|
elif (((data.byte(asd:0x10170000+0x60))&0x84)==0x84)
|
|
group.byte 0x60++0x00 "Dynamic Fifo Control Registers"
|
|
line.byte 0x00 "OTG_DEVCTL,OTG Device Control Register"
|
|
bitfld.byte 0x00 7. " BDEV ,B-Device" "A-Device,B-Device"
|
|
bitfld.byte 0x00 6. " FFSDEV ,Full Speed" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " LSDEV ,Low Speed" "Not detected,Detected"
|
|
bitfld.byte 0x00 3.--4. " VBUS ,BUS" "Below SessionEnd,Above SessionEnd/below AValid,Above AValid/below VBusValid,Above VBusValid"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " HOST ,Host Mode" "Device,Host"
|
|
bitfld.byte 0x00 1. " HREQ ,Host Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " SESS ,Session" "Ended,Started"
|
|
elif (((data.byte(asd:0x10170000+0x60))&0x84)==0x00)
|
|
group.byte 0x60++0x00 "Dynamic Fifo Control Registers"
|
|
line.byte 0x00 "OTG_DEVCTL,OTG Device Control Register"
|
|
bitfld.byte 0x00 7. " BDEV ,B-Device" "A-Device,B-Device"
|
|
bitfld.byte 0x00 3.--4. " VBUS ,BUS" "Below SessionEnd,Above SessionEnd/below AValid,Above AValid/below VBusValid,Above VBusValid"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " HOST ,Host Mode" "Device,Host"
|
|
bitfld.byte 0x00 0. " SESS ,Session" "Ended,Started"
|
|
else
|
|
group.byte 0x60++0x00 "Dynamic Fifo Control Registers"
|
|
line.byte 0x00 "OTG_DEVCTL,OTG Device Control Register"
|
|
bitfld.byte 0x00 7. " BDEV ,B-Device" "A-Device,B-Device"
|
|
bitfld.byte 0x00 3.--4. " VBUS ,BUS" "Below SessionEnd,Above SessionEnd/below AValid,Above AValid/below VBusValid,Above VBusValid"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " HOST ,Host Mode" "Device,Host"
|
|
bitfld.byte 0x00 1. " HREQ ,Host Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " SESS ,Session" "Ended,Started"
|
|
endif
|
|
group.byte 0x62++0x01
|
|
line.byte 0x00 "OTG_TXFSZ,OTG Tx FIFO Size Register"
|
|
bitfld.byte 0x00 4. " DPB ,Double Packet Buffering" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0.--3. " TXSIZE ,Endpoint Tx FIFO Size" "8,16,32,64,128,256,512,1024,2048,4096,?..."
|
|
line.byte 0x01 "OTG_RXFSZ,OTG Rx FIFO Size Register"
|
|
bitfld.byte 0x01 4. " DPB ,Double Packet Buffering" "Disabled,Enabled"
|
|
bitfld.byte 0x01 0.--3. " RXSIZE ,Endpoint Rx FIFO Size" "8,16,32,64,128,256,512,1024,2048,4096,?..."
|
|
group.word 0x64++0x03
|
|
line.word 0x00 "OTG_TXFA,OTG Tx FIFO Address Register"
|
|
hexmask.word 0x00 0.--12. 1. " AD ,FIFO Start Address"
|
|
line.word 0x02 "OTG_RXFA,OTG Rx FIFO Address Register"
|
|
hexmask.word 0x02 0.--12. 1. " AD ,FIFO Start Address"
|
|
if (((data.byte(asd:0x10170000+0x60))&0x04)==0x04)
|
|
wgroup.long 0x68++0x03
|
|
line.long 0x00 "OTG_VCNTL,OTG VControl Register"
|
|
else
|
|
hgroup.long 0x68++0x03
|
|
hide.long 0x00 "OTG_VCNTL,OTG VControl Register"
|
|
endif
|
|
rgroup.word 0x6c++0x01
|
|
line.word 0x00 "OTG_HWVER,OTG Hardware Version Number Register"
|
|
hexmask.word.byte 0x00 10.--14. 1. " VMAJ ,Major Version number"
|
|
hexmask.word 0x00 0.--9. 1. " VMIN ,Minor Version number"
|
|
group.byte 0x70++0x02 "ULPI Registers"
|
|
line.byte 0x00 "OTG_UVBCTRL,OTG ULPI VBUS Control Register"
|
|
bitfld.byte 0x00 1. " EXTVI ,Use External VBUS Indicator" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " EXTVB ,Use External VBUS" "Disabled,Enabled"
|
|
line.byte 0x01 "OTG_UCKIT,OTG ULPI CarKit Control Register"
|
|
bitfld.byte 0x01 5. " CKAE ,CarKit Active End" "Not cleared,Cleared"
|
|
bitfld.byte 0x01 4. " RXCMD ,Rx CMD Event" "Not latched,Latched"
|
|
bitfld.byte 0x01 3. " CANCK ,Cancel CarKit" "Not aborted,Aborted"
|
|
textline " "
|
|
bitfld.byte 0x01 2. " ALTINT ,ALT INT Event" "Not occurred,Occurred"
|
|
bitfld.byte 0x01 1. " CKACT ,CarKit Active" "Disabled,Enabled"
|
|
bitfld.byte 0x01 0. " DISU ,Disable UTMI" "No,Yes"
|
|
line.byte 0x02 "OTG_UINTMASK,OTG ULPI INT Mask Register"
|
|
bitfld.byte 0x02 3. " RXCMD_IE ,Rx CMD Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x02 2. " AEND_IE ,Active End Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x02 1. " ALTINT_IE ,ALT INT Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x02 0. " REGINT_IE ,REG INT Interrupt Enable" "Disabled,Enabled"
|
|
rgroup.byte 0x73++0x00
|
|
line.byte 0x00 "OTG_UINTSRC,OTG ULPI INT Source Register"
|
|
bitfld.byte 0x00 3. " RXCMD ,Rx CMD Interrupt" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 2. " AENDI ,Active End Interrupt" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 1. " ALTINTI ,ALT INT Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " REGINTI ,REG INT Interrupt" "No interrupt,Interrupt"
|
|
group.byte 0x74++0x02
|
|
line.byte 0x00 "OTG_UREGDATA,OTG ULPI Reg Data Register"
|
|
line.byte 0x01 "OTG_UREGADDR,OTG ULPI Reg Address Register"
|
|
line.byte 0x02 "OTG_UREGCTRL,OTG ULPI Reg Control Register"
|
|
bitfld.byte 0x02 2. " URW ,ULPI Read/Write" "Write,Read"
|
|
bitfld.byte 0x02 1. " REGCMP ,Register Access Complete" "Not completed,Completed"
|
|
bitfld.byte 0x02 0. " REGREQ ,Register Access Request" "Not requested,Requested"
|
|
if (((data.byte(asd:0x10170000+0x71))&0x20)==0x20)
|
|
group.byte 0x77++0x00
|
|
line.byte 0x00 "OTG_URAWDATA,OTG ULPI Raw Data Register"
|
|
bitfld.byte 0x00 7. " ALTINT ,ALTINT Event" "Not asserted,Asserted"
|
|
bitfld.byte 0x00 6. " ID ,ID Status" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 4.--5. " RXEVEN ,Encoded UTMI Event signals(RxActive/RxError/HostDiscon)" "0/0/0,1/0/0,1/1/0,-/-/1"
|
|
bitfld.byte 0x00 2.--3. " VBUSSTATE ,Encoded VBUS Voltage state" "VBUS < VB_SESS_END,VB_SESS_END <= VBUS < VB_SESS_VLD,VB_SESS_VLD <= VBUS < VA_VBUS_VLD,VA_VBUS_VLD <= VBUS"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--1. " LINESTATE ,UTMI+ LineState signals" "SE0,J-state,K-state,SE1"
|
|
else
|
|
group.byte 0x77++0x00
|
|
line.byte 0x00 "OTG_URAWDATA,OTG ULPI Raw Data Register"
|
|
bitfld.byte 0x00 3. " D3 ,DATA3 (Active high interrupt indication)" "Low,High"
|
|
bitfld.byte 0x00 2. " D2 ,DATA2 (Single-ended zero)" "Low,High"
|
|
bitfld.byte 0x00 1. " D1 ,DATA1 (Differential data)" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " D0 ,DATA0 (Active high transmit enable)" "Low,High"
|
|
endif
|
|
rgroup.byte 0x78++0x01 "Additional Configuration Registers"
|
|
line.byte 0x00 "OTG_EPINFO,OTG EP Info Register"
|
|
bitfld.byte 0x00 4.--7. " RX_EP ,The Number of Receive Endpoints" "EP 0,EP 1,EP 2,EP 3,EP 4,EP 5,EP 6,EP 7,?..."
|
|
bitfld.byte 0x00 0.--3. " TX_EP ,The Number of Transmit Endpoints" "EP 0,EP 1,EP 2,EP 3,EP 4,EP 5,EP 6,EP 7,?..."
|
|
line.byte 0x01 "OTG_RAMINFO,OTG RAM Info Register"
|
|
bitfld.byte 0x01 4.--7. " DMA_CH ,The Number of DMA Channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.byte 0x01 0.--3. " RAM_BITS ,The width of the RAM Data bus" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.byte 0x7a++0x04
|
|
line.byte 0x00 "OTG_LINKINFO,OTG Link Info Register"
|
|
bitfld.byte 0x00 4.--7. " WTCON ,Connect/Disconnect Delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.byte 0x00 0.--3. " WTID ,ID Pullup Delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.byte 0x01 "OTG_VPLEN,OTG VPLEN Register"
|
|
line.byte 0x02 "OTG_HSEOF1,OTG HS Time Buffer Register"
|
|
line.byte 0x03 "OTG_FSEOF1,OTG FS Time Buffer Register"
|
|
line.byte 0x04 "OTG_LSEOF1,OTG LS Time Buffer Register"
|
|
group.byte 0x7F++0x00
|
|
line.byte 0x00 "OTG_SOFT_RST,OTG Soft Reset Register"
|
|
bitfld.byte 0x00 1. " NRSTX ,NRSTOX signal assertion" "Not asserted,Asserted"
|
|
bitfld.byte 0x00 0. " NRST ,NRSTO signal assertion" "Not asserted,Asserted"
|
|
if (((data.byte(asd:0x10170000+0x60))&0x04)==0x04)
|
|
group.byte 0x80++0x00 "Target Address Registers"
|
|
line.byte 0x00 "OTG_TX0FAD,OTG Tx Function Address Register 0"
|
|
hexmask.byte 0x00 0.--6. 1. " ADTF ,Address of Target Function"
|
|
group.byte (0x80+0x02)++0x01
|
|
line.byte 0x00 "OTG_TX0HAD,OTG Tx Hub Address Register 0"
|
|
bitfld.byte 0x00 7. " MLT ,Multiple Translators" "Single,Multiple"
|
|
hexmask.byte 0x00 0.--6. 1. " HUBAD ,Hub Address"
|
|
line.byte 0x01 "OTG_TX0HP,OTG Tx Hub Port Register 0"
|
|
hexmask.byte 0x01 0.--6. 1. " HUBPORT ,HUB port number"
|
|
group.byte (0x80+0x04)++0x00
|
|
line.byte 0x00 "OTG_RX0FAD,OTG Rx Function Address Register 0"
|
|
hexmask.byte 0x00 0.--6. 1. " ADTF ,Address of Target Function"
|
|
group.byte (0x80+0x06)++0x01
|
|
line.byte 0x00 "OTG_RX0HAD,OTG Rx Hub Address Register 0"
|
|
bitfld.byte 0x00 7. " MLT ,Multiple Translators" "Single,Multiple"
|
|
hexmask.byte 0x00 0.--6. 1. " HUBAD ,Hub Address"
|
|
line.byte 0x01 "OTG_RX0HP,OTG Rx Hub Port Register 0"
|
|
hexmask.byte 0x01 0.--6. 1. " HUBPORT ,HUB port number"
|
|
group.byte 0x88++0x00
|
|
line.byte 0x00 "OTG_TX1FAD,OTG Tx Function Address Register 1"
|
|
hexmask.byte 0x00 0.--6. 1. " ADTF ,Address of Target Function"
|
|
group.byte (0x88+0x02)++0x01
|
|
line.byte 0x00 "OTG_TX1HAD,OTG Tx Hub Address Register 1"
|
|
bitfld.byte 0x00 7. " MLT ,Multiple Translators" "Single,Multiple"
|
|
hexmask.byte 0x00 0.--6. 1. " HUBAD ,Hub Address"
|
|
line.byte 0x01 "OTG_TX1HP,OTG Tx Hub Port Register 1"
|
|
hexmask.byte 0x01 0.--6. 1. " HUBPORT ,HUB port number"
|
|
group.byte (0x88+0x04)++0x00
|
|
line.byte 0x00 "OTG_RX1FAD,OTG Rx Function Address Register 1"
|
|
hexmask.byte 0x00 0.--6. 1. " ADTF ,Address of Target Function"
|
|
group.byte (0x88+0x06)++0x01
|
|
line.byte 0x00 "OTG_RX1HAD,OTG Rx Hub Address Register 1"
|
|
bitfld.byte 0x00 7. " MLT ,Multiple Translators" "Single,Multiple"
|
|
hexmask.byte 0x00 0.--6. 1. " HUBAD ,Hub Address"
|
|
line.byte 0x01 "OTG_RX1HP,OTG Rx Hub Port Register 1"
|
|
hexmask.byte 0x01 0.--6. 1. " HUBPORT ,HUB port number"
|
|
group.byte 0x90++0x00
|
|
line.byte 0x00 "OTG_TX2FAD,OTG Tx Function Address Register 2"
|
|
hexmask.byte 0x00 0.--6. 1. " ADTF ,Address of Target Function"
|
|
group.byte (0x90+0x02)++0x01
|
|
line.byte 0x00 "OTG_TX2HAD,OTG Tx Hub Address Register 2"
|
|
bitfld.byte 0x00 7. " MLT ,Multiple Translators" "Single,Multiple"
|
|
hexmask.byte 0x00 0.--6. 1. " HUBAD ,Hub Address"
|
|
line.byte 0x01 "OTG_TX2HP,OTG Tx Hub Port Register 2"
|
|
hexmask.byte 0x01 0.--6. 1. " HUBPORT ,HUB port number"
|
|
group.byte (0x90+0x04)++0x00
|
|
line.byte 0x00 "OTG_RX2FAD,OTG Rx Function Address Register 2"
|
|
hexmask.byte 0x00 0.--6. 1. " ADTF ,Address of Target Function"
|
|
group.byte (0x90+0x06)++0x01
|
|
line.byte 0x00 "OTG_RX2HAD,OTG Rx Hub Address Register 2"
|
|
bitfld.byte 0x00 7. " MLT ,Multiple Translators" "Single,Multiple"
|
|
hexmask.byte 0x00 0.--6. 1. " HUBAD ,Hub Address"
|
|
line.byte 0x01 "OTG_RX2HP,OTG Rx Hub Port Register 2"
|
|
hexmask.byte 0x01 0.--6. 1. " HUBPORT ,HUB port number"
|
|
group.byte 0x98++0x00
|
|
line.byte 0x00 "OTG_TX3FAD,OTG Tx Function Address Register 3"
|
|
hexmask.byte 0x00 0.--6. 1. " ADTF ,Address of Target Function"
|
|
group.byte (0x98+0x02)++0x01
|
|
line.byte 0x00 "OTG_TX3HAD,OTG Tx Hub Address Register 3"
|
|
bitfld.byte 0x00 7. " MLT ,Multiple Translators" "Single,Multiple"
|
|
hexmask.byte 0x00 0.--6. 1. " HUBAD ,Hub Address"
|
|
line.byte 0x01 "OTG_TX3HP,OTG Tx Hub Port Register 3"
|
|
hexmask.byte 0x01 0.--6. 1. " HUBPORT ,HUB port number"
|
|
group.byte (0x98+0x04)++0x00
|
|
line.byte 0x00 "OTG_RX3FAD,OTG Rx Function Address Register 3"
|
|
hexmask.byte 0x00 0.--6. 1. " ADTF ,Address of Target Function"
|
|
group.byte (0x98+0x06)++0x01
|
|
line.byte 0x00 "OTG_RX3HAD,OTG Rx Hub Address Register 3"
|
|
bitfld.byte 0x00 7. " MLT ,Multiple Translators" "Single,Multiple"
|
|
hexmask.byte 0x00 0.--6. 1. " HUBAD ,Hub Address"
|
|
line.byte 0x01 "OTG_RX3HP,OTG Rx Hub Port Register 3"
|
|
hexmask.byte 0x01 0.--6. 1. " HUBPORT ,HUB port number"
|
|
group.byte 0xA0++0x00
|
|
line.byte 0x00 "OTG_TX4FAD,OTG Tx Function Address Register 4"
|
|
hexmask.byte 0x00 0.--6. 1. " ADTF ,Address of Target Function"
|
|
group.byte (0xA0+0x02)++0x01
|
|
line.byte 0x00 "OTG_TX4HAD,OTG Tx Hub Address Register 4"
|
|
bitfld.byte 0x00 7. " MLT ,Multiple Translators" "Single,Multiple"
|
|
hexmask.byte 0x00 0.--6. 1. " HUBAD ,Hub Address"
|
|
line.byte 0x01 "OTG_TX4HP,OTG Tx Hub Port Register 4"
|
|
hexmask.byte 0x01 0.--6. 1. " HUBPORT ,HUB port number"
|
|
group.byte (0xA0+0x04)++0x00
|
|
line.byte 0x00 "OTG_RX4FAD,OTG Rx Function Address Register 4"
|
|
hexmask.byte 0x00 0.--6. 1. " ADTF ,Address of Target Function"
|
|
group.byte (0xA0+0x06)++0x01
|
|
line.byte 0x00 "OTG_RX4HAD,OTG Rx Hub Address Register 4"
|
|
bitfld.byte 0x00 7. " MLT ,Multiple Translators" "Single,Multiple"
|
|
hexmask.byte 0x00 0.--6. 1. " HUBAD ,Hub Address"
|
|
line.byte 0x01 "OTG_RX4HP,OTG Rx Hub Port Register 4"
|
|
hexmask.byte 0x01 0.--6. 1. " HUBPORT ,HUB port number"
|
|
group.byte 0xA8++0x00
|
|
line.byte 0x00 "OTG_TX5FAD,OTG Tx Function Address Register 5"
|
|
hexmask.byte 0x00 0.--6. 1. " ADTF ,Address of Target Function"
|
|
group.byte (0xA8+0x02)++0x01
|
|
line.byte 0x00 "OTG_TX5HAD,OTG Tx Hub Address Register 5"
|
|
bitfld.byte 0x00 7. " MLT ,Multiple Translators" "Single,Multiple"
|
|
hexmask.byte 0x00 0.--6. 1. " HUBAD ,Hub Address"
|
|
line.byte 0x01 "OTG_TX5HP,OTG Tx Hub Port Register 5"
|
|
hexmask.byte 0x01 0.--6. 1. " HUBPORT ,HUB port number"
|
|
group.byte (0xA8+0x04)++0x00
|
|
line.byte 0x00 "OTG_RX5FAD,OTG Rx Function Address Register 5"
|
|
hexmask.byte 0x00 0.--6. 1. " ADTF ,Address of Target Function"
|
|
group.byte (0xA8+0x06)++0x01
|
|
line.byte 0x00 "OTG_RX5HAD,OTG Rx Hub Address Register 5"
|
|
bitfld.byte 0x00 7. " MLT ,Multiple Translators" "Single,Multiple"
|
|
hexmask.byte 0x00 0.--6. 1. " HUBAD ,Hub Address"
|
|
line.byte 0x01 "OTG_RX5HP,OTG Rx Hub Port Register 5"
|
|
hexmask.byte 0x01 0.--6. 1. " HUBPORT ,HUB port number"
|
|
group.byte 0xB0++0x00
|
|
line.byte 0x00 "OTG_TX6FAD,OTG Tx Function Address Register 6"
|
|
hexmask.byte 0x00 0.--6. 1. " ADTF ,Address of Target Function"
|
|
group.byte (0xB0+0x02)++0x01
|
|
line.byte 0x00 "OTG_TX6HAD,OTG Tx Hub Address Register 6"
|
|
bitfld.byte 0x00 7. " MLT ,Multiple Translators" "Single,Multiple"
|
|
hexmask.byte 0x00 0.--6. 1. " HUBAD ,Hub Address"
|
|
line.byte 0x01 "OTG_TX6HP,OTG Tx Hub Port Register 6"
|
|
hexmask.byte 0x01 0.--6. 1. " HUBPORT ,HUB port number"
|
|
group.byte (0xB0+0x04)++0x00
|
|
line.byte 0x00 "OTG_RX6FAD,OTG Rx Function Address Register 6"
|
|
hexmask.byte 0x00 0.--6. 1. " ADTF ,Address of Target Function"
|
|
group.byte (0xB0+0x06)++0x01
|
|
line.byte 0x00 "OTG_RX6HAD,OTG Rx Hub Address Register 6"
|
|
bitfld.byte 0x00 7. " MLT ,Multiple Translators" "Single,Multiple"
|
|
hexmask.byte 0x00 0.--6. 1. " HUBAD ,Hub Address"
|
|
line.byte 0x01 "OTG_RX6HP,OTG Rx Hub Port Register 6"
|
|
hexmask.byte 0x01 0.--6. 1. " HUBPORT ,HUB port number"
|
|
group.byte 0xB8++0x00
|
|
line.byte 0x00 "OTG_TX7FAD,OTG Tx Function Address Register 7"
|
|
hexmask.byte 0x00 0.--6. 1. " ADTF ,Address of Target Function"
|
|
group.byte (0xB8+0x02)++0x01
|
|
line.byte 0x00 "OTG_TX7HAD,OTG Tx Hub Address Register 7"
|
|
bitfld.byte 0x00 7. " MLT ,Multiple Translators" "Single,Multiple"
|
|
hexmask.byte 0x00 0.--6. 1. " HUBAD ,Hub Address"
|
|
line.byte 0x01 "OTG_TX7HP,OTG Tx Hub Port Register 7"
|
|
hexmask.byte 0x01 0.--6. 1. " HUBPORT ,HUB port number"
|
|
group.byte (0xB8+0x04)++0x00
|
|
line.byte 0x00 "OTG_RX7FAD,OTG Rx Function Address Register 7"
|
|
hexmask.byte 0x00 0.--6. 1. " ADTF ,Address of Target Function"
|
|
group.byte (0xB8+0x06)++0x01
|
|
line.byte 0x00 "OTG_RX7HAD,OTG Rx Hub Address Register 7"
|
|
bitfld.byte 0x00 7. " MLT ,Multiple Translators" "Single,Multiple"
|
|
hexmask.byte 0x00 0.--6. 1. " HUBAD ,Hub Address"
|
|
line.byte 0x01 "OTG_RX7HP,OTG Rx Hub Port Register 7"
|
|
hexmask.byte 0x01 0.--6. 1. " HUBPORT ,HUB port number"
|
|
else
|
|
hgroup.byte 0x80++0x00 "Target Address Registers"
|
|
hide.byte 0x00 "OTG_TX0FAD,OTG Tx Function Address Register 0"
|
|
hgroup.byte (0x80+0x02)++0x01
|
|
hide.byte 0x00 "OTG_TX0HAD,OTG Tx Hub Address Register 0"
|
|
hide.byte 0x01 "OTG_TX0HP,OTG Tx Hub Port Register 0"
|
|
hgroup.byte (0x80+0x04)++0x00
|
|
hide.byte 0x00 "OTG_RX0FAD,OTG Rx Function Address Register 0"
|
|
hgroup.byte (0x80+0x06)++0x01
|
|
hide.byte 0x00 "OTG_RX0HAD,OTG Rx Hub Address Register 0"
|
|
hide.byte 0x01 "OTG_TX0HP,OTG Tx Hub Port Register 0"
|
|
hgroup.byte 0x88++0x00
|
|
hide.byte 0x00 "OTG_TX1FAD,OTG Tx Function Address Register 1"
|
|
hgroup.byte (0x88+0x02)++0x01
|
|
hide.byte 0x00 "OTG_TX1HAD,OTG Tx Hub Address Register 1"
|
|
hide.byte 0x01 "OTG_TX1HP,OTG Tx Hub Port Register 1"
|
|
hgroup.byte (0x88+0x04)++0x00
|
|
hide.byte 0x00 "OTG_RX1FAD,OTG Rx Function Address Register 1"
|
|
hgroup.byte (0x88+0x06)++0x01
|
|
hide.byte 0x00 "OTG_RX1HAD,OTG Rx Hub Address Register 1"
|
|
hide.byte 0x01 "OTG_TX1HP,OTG Tx Hub Port Register 1"
|
|
hgroup.byte 0x90++0x00
|
|
hide.byte 0x00 "OTG_TX2FAD,OTG Tx Function Address Register 2"
|
|
hgroup.byte (0x90+0x02)++0x01
|
|
hide.byte 0x00 "OTG_TX2HAD,OTG Tx Hub Address Register 2"
|
|
hide.byte 0x01 "OTG_TX2HP,OTG Tx Hub Port Register 2"
|
|
hgroup.byte (0x90+0x04)++0x00
|
|
hide.byte 0x00 "OTG_RX2FAD,OTG Rx Function Address Register 2"
|
|
hgroup.byte (0x90+0x06)++0x01
|
|
hide.byte 0x00 "OTG_RX2HAD,OTG Rx Hub Address Register 2"
|
|
hide.byte 0x01 "OTG_TX2HP,OTG Tx Hub Port Register 2"
|
|
hgroup.byte 0x98++0x00
|
|
hide.byte 0x00 "OTG_TX3FAD,OTG Tx Function Address Register 3"
|
|
hgroup.byte (0x98+0x02)++0x01
|
|
hide.byte 0x00 "OTG_TX3HAD,OTG Tx Hub Address Register 3"
|
|
hide.byte 0x01 "OTG_TX3HP,OTG Tx Hub Port Register 3"
|
|
hgroup.byte (0x98+0x04)++0x00
|
|
hide.byte 0x00 "OTG_RX3FAD,OTG Rx Function Address Register 3"
|
|
hgroup.byte (0x98+0x06)++0x01
|
|
hide.byte 0x00 "OTG_RX3HAD,OTG Rx Hub Address Register 3"
|
|
hide.byte 0x01 "OTG_TX3HP,OTG Tx Hub Port Register 3"
|
|
hgroup.byte 0xA0++0x00
|
|
hide.byte 0x00 "OTG_TX4FAD,OTG Tx Function Address Register 4"
|
|
hgroup.byte (0xA0+0x02)++0x01
|
|
hide.byte 0x00 "OTG_TX4HAD,OTG Tx Hub Address Register 4"
|
|
hide.byte 0x01 "OTG_TX4HP,OTG Tx Hub Port Register 4"
|
|
hgroup.byte (0xA0+0x04)++0x00
|
|
hide.byte 0x00 "OTG_RX4FAD,OTG Rx Function Address Register 4"
|
|
hgroup.byte (0xA0+0x06)++0x01
|
|
hide.byte 0x00 "OTG_RX4HAD,OTG Rx Hub Address Register 4"
|
|
hide.byte 0x01 "OTG_TX4HP,OTG Tx Hub Port Register 4"
|
|
hgroup.byte 0xA8++0x00
|
|
hide.byte 0x00 "OTG_TX5FAD,OTG Tx Function Address Register 5"
|
|
hgroup.byte (0xA8+0x02)++0x01
|
|
hide.byte 0x00 "OTG_TX5HAD,OTG Tx Hub Address Register 5"
|
|
hide.byte 0x01 "OTG_TX5HP,OTG Tx Hub Port Register 5"
|
|
hgroup.byte (0xA8+0x04)++0x00
|
|
hide.byte 0x00 "OTG_RX5FAD,OTG Rx Function Address Register 5"
|
|
hgroup.byte (0xA8+0x06)++0x01
|
|
hide.byte 0x00 "OTG_RX5HAD,OTG Rx Hub Address Register 5"
|
|
hide.byte 0x01 "OTG_TX5HP,OTG Tx Hub Port Register 5"
|
|
hgroup.byte 0xB0++0x00
|
|
hide.byte 0x00 "OTG_TX6FAD,OTG Tx Function Address Register 6"
|
|
hgroup.byte (0xB0+0x02)++0x01
|
|
hide.byte 0x00 "OTG_TX6HAD,OTG Tx Hub Address Register 6"
|
|
hide.byte 0x01 "OTG_TX6HP,OTG Tx Hub Port Register 6"
|
|
hgroup.byte (0xB0+0x04)++0x00
|
|
hide.byte 0x00 "OTG_RX6FAD,OTG Rx Function Address Register 6"
|
|
hgroup.byte (0xB0+0x06)++0x01
|
|
hide.byte 0x00 "OTG_RX6HAD,OTG Rx Hub Address Register 6"
|
|
hide.byte 0x01 "OTG_TX6HP,OTG Tx Hub Port Register 6"
|
|
hgroup.byte 0xB8++0x00
|
|
hide.byte 0x00 "OTG_TX7FAD,OTG Tx Function Address Register 7"
|
|
hgroup.byte (0xB8+0x02)++0x01
|
|
hide.byte 0x00 "OTG_TX7HAD,OTG Tx Hub Address Register 7"
|
|
hide.byte 0x01 "OTG_TX7HP,OTG Tx Hub Port Register 7"
|
|
hgroup.byte (0xB8+0x04)++0x00
|
|
hide.byte 0x00 "OTG_RX7FAD,OTG Rx Function Address Register 7"
|
|
hgroup.byte (0xB8+0x06)++0x01
|
|
hide.byte 0x00 "OTG_RX7HAD,OTG Rx Hub Address Register 7"
|
|
hide.byte 0x01 "OTG_TX7HP,OTG Tx Hub Port Register 7"
|
|
endif
|
|
tree "Endpoint 0-7 Registers"
|
|
if (((data.byte(asd:0x10170000+0x60))&0x04)==0x04)
|
|
group.word 0x102++0x01 "Endpoint 0 Registers"
|
|
line.word 0x00 "OTG_CSR0,OTG EP0 Control and Status Register"
|
|
bitfld.word 0x00 11. " DPNG ,Disable Ping" "No,Yes"
|
|
bitfld.word 0x00 10. " DWE ,Data Toggle Write Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " DT ,Data Toggle" "Low,High"
|
|
bitfld.word 0x00 8. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 7. " NAK ,NAK Timeout" "Not halted,Halted"
|
|
bitfld.word 0x00 6. " STPK ,Status Packet" "Not performed,Performed"
|
|
textline " "
|
|
bitfld.word 0x00 5. " RPK ,Request Packet" "Not requested,Requested"
|
|
bitfld.word 0x00 4. " ERR ,Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 3. " STP ,Setup Packet" "Not sent,Sent"
|
|
bitfld.word 0x00 2. " RXS ,Receive Stall" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 1. " TRDY ,Tx Packet Ready" "Not ready,Ready"
|
|
bitfld.word 0x00 0. " RRDY ,Rx Packet Ready" "Not ready,Ready"
|
|
else
|
|
group.word 0x102++0x01 "Endpoint 0 Registers"
|
|
line.word 0x00 "OTG_CSR0,OTG EP0 Control and Status Register"
|
|
bitfld.word 0x00 8. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
bitfld.word 0x00 7. " SSE ,Serviced Setup End" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 6. " SRDY ,Serviced Rx Packet Ready" "No effect,Cleared"
|
|
bitfld.word 0x00 5. " SND ,Send Stall" "Not terminated,Terminated"
|
|
textline " "
|
|
bitfld.word 0x00 4. " STE ,Setup End" "Not ended,Ended"
|
|
bitfld.word 0x00 3. " DE ,Data End" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.word 0x00 2. " SNT ,Sent Stall" "Not transmitted,Transmitted"
|
|
bitfld.word 0x00 1. " TRDY ,Tx Packet Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.word 0x00 0. " RRDY ,Rx Packet Ready" "Not ready,Ready"
|
|
endif
|
|
rgroup.word 0x108++0x01
|
|
line.word 0x00 "OTG_COUNT0,OTG EP0 Bytes Received Counter"
|
|
hexmask.word.byte 0x00 0.--6. 1. " RXCNT0 ,EP0 Bytes Received"
|
|
if (((data.byte(asd:0x10170000+0x60))&0x04)==0x04)
|
|
group.byte 0x10a++0x01
|
|
line.byte 0x00 "OTG_TYPE0,OTG EP0 Speed Control Register"
|
|
bitfld.byte 0x00 6.--7. " SPEED ,Operating Speed" "Reserved,High,Full,Low"
|
|
line.byte 0x01 "OTG_NAKLIMIT0,OTG EP0 NAK Response Register"
|
|
hexmask.byte 0x01 0.--4. 1. " NAKLIMIT ,Frames to NAK"
|
|
else
|
|
hgroup.byte 0x10a++0x01
|
|
hide.byte 0x00 "OTG_TYPE0,OTG EP0 Speed Control Register"
|
|
hide.byte 0x01 "OTG_NAKLIMIT0,OTG EP0 NAK Response Register"
|
|
endif
|
|
rgroup.byte 0x10f++0x00
|
|
line.byte 0x00 "OTG_CFD,OTG Core Configuration Register"
|
|
bitfld.byte 0x00 7. " MPRXE ,Bulk Pkt Amalgamation" "Not selected,Selected"
|
|
bitfld.byte 0x00 6. " MPTXE ,Bulk Pkt Splitting" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " BE ,Big Endian" "Not selected,Selected"
|
|
bitfld.byte 0x00 4. " HBRXE ,High-Bandwith ISO Support" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " HBTXE ,High-Bandwith ISO Support" "Not selected,Selected"
|
|
bitfld.byte 0x00 2. " DYNF ,Dynamic FIFO Sizing" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " SC ,Soft Connect" "Not selected,Selected"
|
|
bitfld.byte 0x00 0. " UDI ,UTMI Data Width" "8 bits,16 bits"
|
|
group.word 0x110++0x01 "Endpoint 1 Registers"
|
|
line.word 0x00 "OTG_TXMAXP,OTG Tx Max Packet Size Register"
|
|
bitfld.word 0x00 11.--15. " MULT ,Multiplier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.word 0x00 0.--10. 1. " MAXP ,Maximum Payload Transmitted"
|
|
if (((data.byte(asd:0x10170000+0x60))&0x04)==0x04)
|
|
group.word (0x110+0x02)++0x01
|
|
line.word 0x00 "OTG_TXCSR,OTG Tx Control and Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 13. " MD ,Mode" "Rx,Tx"
|
|
textline " "
|
|
bitfld.word 0x00 12. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " FDT ,Force Data Toggle" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.word 0x00 10. " DRM ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 9. " DWE ,Data Toggle Write Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " DT ,Data Toggle" "Low,High"
|
|
bitfld.word 0x00 7. " NAK ,NAK Timeout" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.word 0x00 6. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 5. " RXS ,Rx Stall" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 4. " STP ,Setup Packet" "Not sent,Sent"
|
|
bitfld.word 0x00 3. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 2. " ERR ,Error" "No error,Error"
|
|
bitfld.word 0x00 1. " FNE ,FIFO Not Empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.word 0x00 0. " TRDY ,Tx Packet Ready" "Not ready,Ready"
|
|
else
|
|
group.word (0x110+0x02)++0x01
|
|
line.word 0x00 "OTG_TXCSR,OTG Tx Control and Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ISO ,Isochronous Transfers" "Bulk/Interrupt,Isochronous"
|
|
textline " "
|
|
bitfld.word 0x00 13. " MD ,Mode" "Rx,Tx"
|
|
bitfld.word 0x00 12. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 11. " FDT ,Force Data Toggle" "Not forced,Forced"
|
|
bitfld.word 0x00 10. " DRM ,DMA Request Mode" "Mode 0,Mode 1"
|
|
textline " "
|
|
bitfld.word 0x00 7. " ITX ,Incomplete" "Not incomplete,Incomplete"
|
|
bitfld.word 0x00 6. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 5. " STS ,Sent Stall" "Not transmitted,Transmitted"
|
|
bitfld.word 0x00 4. " SDS ,Send Stall" "Not issued,Issued"
|
|
textline " "
|
|
bitfld.word 0x00 3. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
bitfld.word 0x00 2. " UND ,Underrun" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FNE ,FIFO Not Empty" "Empty,Not empty"
|
|
bitfld.word 0x00 0. " TRDY ,Tx Packet Ready" "Not ready,Ready"
|
|
endif
|
|
group.word (0x110+0x04)++0x01
|
|
line.word 0x00 "OTG_RXMAXP,OTG Rx Max Packet Size Register"
|
|
bitfld.word 0x00 11.--15. " MULT ,Multiplier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.word 0x00 0.--10. 1. " MAXP ,Maximum Payload Transmitted"
|
|
if (((data.byte(asd:0x10170000+0x60))&0x04)==0x04)
|
|
group.word (0x110+0x06)++0x01
|
|
line.word 0x00 "OTG_RXCSR,OTG Rx Control/Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ARQ ,Auto Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 13. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " DNY ,Disable NYET" "No,Yes"
|
|
textline " "
|
|
bitfld.word 0x00 11. " DMD ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 10. " DWE ,Data Toggle Write Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " DT ,Data Toggle" "Low,High"
|
|
bitfld.word 0x00 8. " IRX ,Incomp Rx" "Not incomplete,Incomplete"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 6. " RS ,Rx Stall" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 5. " RPK ,Request Packet" "Not requested,Requested"
|
|
bitfld.word 0x00 4. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 3. " DER ,Data Error/NAK Timeout" "No error,Error"
|
|
bitfld.word 0x00 2. " ER ,Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FFUL ,FIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 0. " RRDY ,Rx Packet Ready" "Not ready,Ready"
|
|
else
|
|
group.word (0x110+0x06)++0x01
|
|
line.word 0x00 "OTG_RXCSR,OTG Rx Control/Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ISO ,ISO" "Bulk/Interrupt,Isochronous"
|
|
textline " "
|
|
bitfld.word 0x00 13. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " DNY ,Disable NYET" "No,Yes"
|
|
textline " "
|
|
bitfld.word 0x00 11. " DMD ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 8. " IRX ,Incomp Rx" "Not incomplete,Incomplete"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 6. " SNT ,Sent Stall" "Not transmitted,Transmitted"
|
|
textline " "
|
|
bitfld.word 0x00 5. " SND ,Send Stall" "Not issued,Issued"
|
|
bitfld.word 0x00 4. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 3. " FFUL ,FIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 2. " ERR ,Data Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " OR ,Overrun" "Not overrun,Overrun"
|
|
bitfld.word 0x00 0. " RRDY ,Rx Packet Ready" "Not ready,Ready"
|
|
endif
|
|
if (((data.word(asd:0x10170000+0x110+0x06))&0x01)==0x01)
|
|
rgroup.word (0x110+0x08)++0x01
|
|
line.word 0x00 "OTG_RXCNT,OTG Rx Bytes Received Counter"
|
|
hexmask.word 0x00 0.--12. 1. " RXCNT ,Endpoint Rx Count"
|
|
else
|
|
hgroup.word (0x110+0x08)++0x01
|
|
hide.word 0x00 "OTG_RXCNT,OTG Rx Bytes Received Counter"
|
|
endif
|
|
if (((data.byte(asd:0x10170000+0x60))&0x04)==0x04)
|
|
group.byte (0x110+0x0a)++0x03
|
|
line.byte 0x00 "OTG_TXTYPE,OTG Tx Transaction Control Register"
|
|
bitfld.byte 0x00 6.--7. " SPEED ,Operating Speed" "Reserved,High,Full,Low"
|
|
bitfld.byte 0x00 4.--5. " PROT ,Protocol" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--3. " EP ,Target Endpoint Number" "Ep 0,Ep 1,Ep 2,Ep 3,Ep 4,Ep 5,Ep 6,Ep 7,?..."
|
|
line.byte 0x01 "OTG_TXINTV,OTG Tx Polling Interval Register"
|
|
line.byte 0x02 "OTG_RXTYPE,OTG Rx Transaction Control Register"
|
|
bitfld.byte 0x02 6.--7. " SPEED ,Operating Speed" "Reserved,High,Full,Low"
|
|
bitfld.byte 0x02 4.--5. " PROT ,Protocol" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x02 0.--3. " EP ,Target Endpoint Number" "Ep 0,Ep 1,Ep 2,Ep 3,Ep 4,Ep 5,Ep 6,Ep 7,?..."
|
|
line.byte 0x03 "OTG_RXINTV,OTG Rx Polling Interval Register"
|
|
else
|
|
hgroup.byte (0x110+0x0a)++0x03
|
|
hide.byte 0x00 "OTG_TXTYPE,OTG Tx Transaction Control Register"
|
|
hide.byte 0x01 "OTG_TXINTV,OTG Tx Polling Interval Register"
|
|
hide.byte 0x02 "OTG_RXTYPE,OTG Rx Transaction Control Register"
|
|
hide.byte 0x03 "OTG_RXINTV,OTG Rx Polling Interval Register"
|
|
endif
|
|
group.word 0x120++0x01 "Endpoint 2 Registers"
|
|
line.word 0x00 "OTG_TXMAXP,OTG Tx Max Packet Size Register"
|
|
bitfld.word 0x00 11.--15. " MULT ,Multiplier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.word 0x00 0.--10. 1. " MAXP ,Maximum Payload Transmitted"
|
|
if (((data.byte(asd:0x10170000+0x60))&0x04)==0x04)
|
|
group.word (0x120+0x02)++0x01
|
|
line.word 0x00 "OTG_TXCSR,OTG Tx Control and Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 13. " MD ,Mode" "Rx,Tx"
|
|
textline " "
|
|
bitfld.word 0x00 12. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " FDT ,Force Data Toggle" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.word 0x00 10. " DRM ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 9. " DWE ,Data Toggle Write Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " DT ,Data Toggle" "Low,High"
|
|
bitfld.word 0x00 7. " NAK ,NAK Timeout" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.word 0x00 6. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 5. " RXS ,Rx Stall" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 4. " STP ,Setup Packet" "Not sent,Sent"
|
|
bitfld.word 0x00 3. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 2. " ERR ,Error" "No error,Error"
|
|
bitfld.word 0x00 1. " FNE ,FIFO Not Empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.word 0x00 0. " TRDY ,Tx Packet Ready" "Not ready,Ready"
|
|
else
|
|
group.word (0x120+0x02)++0x01
|
|
line.word 0x00 "OTG_TXCSR,OTG Tx Control and Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ISO ,Isochronous Transfers" "Bulk/Interrupt,Isochronous"
|
|
textline " "
|
|
bitfld.word 0x00 13. " MD ,Mode" "Rx,Tx"
|
|
bitfld.word 0x00 12. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 11. " FDT ,Force Data Toggle" "Not forced,Forced"
|
|
bitfld.word 0x00 10. " DRM ,DMA Request Mode" "Mode 0,Mode 1"
|
|
textline " "
|
|
bitfld.word 0x00 7. " ITX ,Incomplete" "Not incomplete,Incomplete"
|
|
bitfld.word 0x00 6. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 5. " STS ,Sent Stall" "Not transmitted,Transmitted"
|
|
bitfld.word 0x00 4. " SDS ,Send Stall" "Not issued,Issued"
|
|
textline " "
|
|
bitfld.word 0x00 3. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
bitfld.word 0x00 2. " UND ,Underrun" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FNE ,FIFO Not Empty" "Empty,Not empty"
|
|
bitfld.word 0x00 0. " TRDY ,Tx Packet Ready" "Not ready,Ready"
|
|
endif
|
|
group.word (0x120+0x04)++0x01
|
|
line.word 0x00 "OTG_RXMAXP,OTG Rx Max Packet Size Register"
|
|
bitfld.word 0x00 11.--15. " MULT ,Multiplier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.word 0x00 0.--10. 1. " MAXP ,Maximum Payload Transmitted"
|
|
if (((data.byte(asd:0x10170000+0x60))&0x04)==0x04)
|
|
group.word (0x120+0x06)++0x01
|
|
line.word 0x00 "OTG_RXCSR,OTG Rx Control/Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ARQ ,Auto Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 13. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " DNY ,Disable NYET" "No,Yes"
|
|
textline " "
|
|
bitfld.word 0x00 11. " DMD ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 10. " DWE ,Data Toggle Write Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " DT ,Data Toggle" "Low,High"
|
|
bitfld.word 0x00 8. " IRX ,Incomp Rx" "Not incomplete,Incomplete"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 6. " RS ,Rx Stall" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 5. " RPK ,Request Packet" "Not requested,Requested"
|
|
bitfld.word 0x00 4. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 3. " DER ,Data Error/NAK Timeout" "No error,Error"
|
|
bitfld.word 0x00 2. " ER ,Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FFUL ,FIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 0. " RRDY ,Rx Packet Ready" "Not ready,Ready"
|
|
else
|
|
group.word (0x120+0x06)++0x01
|
|
line.word 0x00 "OTG_RXCSR,OTG Rx Control/Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ISO ,ISO" "Bulk/Interrupt,Isochronous"
|
|
textline " "
|
|
bitfld.word 0x00 13. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " DNY ,Disable NYET" "No,Yes"
|
|
textline " "
|
|
bitfld.word 0x00 11. " DMD ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 8. " IRX ,Incomp Rx" "Not incomplete,Incomplete"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 6. " SNT ,Sent Stall" "Not transmitted,Transmitted"
|
|
textline " "
|
|
bitfld.word 0x00 5. " SND ,Send Stall" "Not issued,Issued"
|
|
bitfld.word 0x00 4. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 3. " FFUL ,FIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 2. " ERR ,Data Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " OR ,Overrun" "Not overrun,Overrun"
|
|
bitfld.word 0x00 0. " RRDY ,Rx Packet Ready" "Not ready,Ready"
|
|
endif
|
|
if (((data.word(asd:0x10170000+0x120+0x06))&0x01)==0x01)
|
|
rgroup.word (0x120+0x08)++0x01
|
|
line.word 0x00 "OTG_RXCNT,OTG Rx Bytes Received Counter"
|
|
hexmask.word 0x00 0.--12. 1. " RXCNT ,Endpoint Rx Count"
|
|
else
|
|
hgroup.word (0x120+0x08)++0x01
|
|
hide.word 0x00 "OTG_RXCNT,OTG Rx Bytes Received Counter"
|
|
endif
|
|
if (((data.byte(asd:0x10170000+0x60))&0x04)==0x04)
|
|
group.byte (0x120+0x0a)++0x03
|
|
line.byte 0x00 "OTG_TXTYPE,OTG Tx Transaction Control Register"
|
|
bitfld.byte 0x00 6.--7. " SPEED ,Operating Speed" "Reserved,High,Full,Low"
|
|
bitfld.byte 0x00 4.--5. " PROT ,Protocol" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--3. " EP ,Target Endpoint Number" "Ep 0,Ep 1,Ep 2,Ep 3,Ep 4,Ep 5,Ep 6,Ep 7,?..."
|
|
line.byte 0x01 "OTG_TXINTV,OTG Tx Polling Interval Register"
|
|
line.byte 0x02 "OTG_RXTYPE,OTG Rx Transaction Control Register"
|
|
bitfld.byte 0x02 6.--7. " SPEED ,Operating Speed" "Reserved,High,Full,Low"
|
|
bitfld.byte 0x02 4.--5. " PROT ,Protocol" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x02 0.--3. " EP ,Target Endpoint Number" "Ep 0,Ep 1,Ep 2,Ep 3,Ep 4,Ep 5,Ep 6,Ep 7,?..."
|
|
line.byte 0x03 "OTG_RXINTV,OTG Rx Polling Interval Register"
|
|
else
|
|
hgroup.byte (0x120+0x0a)++0x03
|
|
hide.byte 0x00 "OTG_TXTYPE,OTG Tx Transaction Control Register"
|
|
hide.byte 0x01 "OTG_TXINTV,OTG Tx Polling Interval Register"
|
|
hide.byte 0x02 "OTG_RXTYPE,OTG Rx Transaction Control Register"
|
|
hide.byte 0x03 "OTG_RXINTV,OTG Rx Polling Interval Register"
|
|
endif
|
|
group.word 0x130++0x01 "Endpoint 3 Registers"
|
|
line.word 0x00 "OTG_TXMAXP,OTG Tx Max Packet Size Register"
|
|
bitfld.word 0x00 11.--15. " MULT ,Multiplier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.word 0x00 0.--10. 1. " MAXP ,Maximum Payload Transmitted"
|
|
if (((data.byte(asd:0x10170000+0x60))&0x04)==0x04)
|
|
group.word (0x130+0x02)++0x01
|
|
line.word 0x00 "OTG_TXCSR,OTG Tx Control and Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 13. " MD ,Mode" "Rx,Tx"
|
|
textline " "
|
|
bitfld.word 0x00 12. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " FDT ,Force Data Toggle" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.word 0x00 10. " DRM ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 9. " DWE ,Data Toggle Write Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " DT ,Data Toggle" "Low,High"
|
|
bitfld.word 0x00 7. " NAK ,NAK Timeout" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.word 0x00 6. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 5. " RXS ,Rx Stall" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 4. " STP ,Setup Packet" "Not sent,Sent"
|
|
bitfld.word 0x00 3. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 2. " ERR ,Error" "No error,Error"
|
|
bitfld.word 0x00 1. " FNE ,FIFO Not Empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.word 0x00 0. " TRDY ,Tx Packet Ready" "Not ready,Ready"
|
|
else
|
|
group.word (0x130+0x02)++0x01
|
|
line.word 0x00 "OTG_TXCSR,OTG Tx Control and Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ISO ,Isochronous Transfers" "Bulk/Interrupt,Isochronous"
|
|
textline " "
|
|
bitfld.word 0x00 13. " MD ,Mode" "Rx,Tx"
|
|
bitfld.word 0x00 12. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 11. " FDT ,Force Data Toggle" "Not forced,Forced"
|
|
bitfld.word 0x00 10. " DRM ,DMA Request Mode" "Mode 0,Mode 1"
|
|
textline " "
|
|
bitfld.word 0x00 7. " ITX ,Incomplete" "Not incomplete,Incomplete"
|
|
bitfld.word 0x00 6. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 5. " STS ,Sent Stall" "Not transmitted,Transmitted"
|
|
bitfld.word 0x00 4. " SDS ,Send Stall" "Not issued,Issued"
|
|
textline " "
|
|
bitfld.word 0x00 3. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
bitfld.word 0x00 2. " UND ,Underrun" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FNE ,FIFO Not Empty" "Empty,Not empty"
|
|
bitfld.word 0x00 0. " TRDY ,Tx Packet Ready" "Not ready,Ready"
|
|
endif
|
|
group.word (0x130+0x04)++0x01
|
|
line.word 0x00 "OTG_RXMAXP,OTG Rx Max Packet Size Register"
|
|
bitfld.word 0x00 11.--15. " MULT ,Multiplier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.word 0x00 0.--10. 1. " MAXP ,Maximum Payload Transmitted"
|
|
if (((data.byte(asd:0x10170000+0x60))&0x04)==0x04)
|
|
group.word (0x130+0x06)++0x01
|
|
line.word 0x00 "OTG_RXCSR,OTG Rx Control/Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ARQ ,Auto Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 13. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " DNY ,Disable NYET" "No,Yes"
|
|
textline " "
|
|
bitfld.word 0x00 11. " DMD ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 10. " DWE ,Data Toggle Write Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " DT ,Data Toggle" "Low,High"
|
|
bitfld.word 0x00 8. " IRX ,Incomp Rx" "Not incomplete,Incomplete"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 6. " RS ,Rx Stall" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 5. " RPK ,Request Packet" "Not requested,Requested"
|
|
bitfld.word 0x00 4. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 3. " DER ,Data Error/NAK Timeout" "No error,Error"
|
|
bitfld.word 0x00 2. " ER ,Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FFUL ,FIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 0. " RRDY ,Rx Packet Ready" "Not ready,Ready"
|
|
else
|
|
group.word (0x130+0x06)++0x01
|
|
line.word 0x00 "OTG_RXCSR,OTG Rx Control/Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ISO ,ISO" "Bulk/Interrupt,Isochronous"
|
|
textline " "
|
|
bitfld.word 0x00 13. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " DNY ,Disable NYET" "No,Yes"
|
|
textline " "
|
|
bitfld.word 0x00 11. " DMD ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 8. " IRX ,Incomp Rx" "Not incomplete,Incomplete"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 6. " SNT ,Sent Stall" "Not transmitted,Transmitted"
|
|
textline " "
|
|
bitfld.word 0x00 5. " SND ,Send Stall" "Not issued,Issued"
|
|
bitfld.word 0x00 4. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 3. " FFUL ,FIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 2. " ERR ,Data Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " OR ,Overrun" "Not overrun,Overrun"
|
|
bitfld.word 0x00 0. " RRDY ,Rx Packet Ready" "Not ready,Ready"
|
|
endif
|
|
if (((data.word(asd:0x10170000+0x130+0x06))&0x01)==0x01)
|
|
rgroup.word (0x130+0x08)++0x01
|
|
line.word 0x00 "OTG_RXCNT,OTG Rx Bytes Received Counter"
|
|
hexmask.word 0x00 0.--12. 1. " RXCNT ,Endpoint Rx Count"
|
|
else
|
|
hgroup.word (0x130+0x08)++0x01
|
|
hide.word 0x00 "OTG_RXCNT,OTG Rx Bytes Received Counter"
|
|
endif
|
|
if (((data.byte(asd:0x10170000+0x60))&0x04)==0x04)
|
|
group.byte (0x130+0x0a)++0x03
|
|
line.byte 0x00 "OTG_TXTYPE,OTG Tx Transaction Control Register"
|
|
bitfld.byte 0x00 6.--7. " SPEED ,Operating Speed" "Reserved,High,Full,Low"
|
|
bitfld.byte 0x00 4.--5. " PROT ,Protocol" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--3. " EP ,Target Endpoint Number" "Ep 0,Ep 1,Ep 2,Ep 3,Ep 4,Ep 5,Ep 6,Ep 7,?..."
|
|
line.byte 0x01 "OTG_TXINTV,OTG Tx Polling Interval Register"
|
|
line.byte 0x02 "OTG_RXTYPE,OTG Rx Transaction Control Register"
|
|
bitfld.byte 0x02 6.--7. " SPEED ,Operating Speed" "Reserved,High,Full,Low"
|
|
bitfld.byte 0x02 4.--5. " PROT ,Protocol" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x02 0.--3. " EP ,Target Endpoint Number" "Ep 0,Ep 1,Ep 2,Ep 3,Ep 4,Ep 5,Ep 6,Ep 7,?..."
|
|
line.byte 0x03 "OTG_RXINTV,OTG Rx Polling Interval Register"
|
|
else
|
|
hgroup.byte (0x130+0x0a)++0x03
|
|
hide.byte 0x00 "OTG_TXTYPE,OTG Tx Transaction Control Register"
|
|
hide.byte 0x01 "OTG_TXINTV,OTG Tx Polling Interval Register"
|
|
hide.byte 0x02 "OTG_RXTYPE,OTG Rx Transaction Control Register"
|
|
hide.byte 0x03 "OTG_RXINTV,OTG Rx Polling Interval Register"
|
|
endif
|
|
group.word 0x140++0x01 "Endpoint 4 Registers"
|
|
line.word 0x00 "OTG_TXMAXP,OTG Tx Max Packet Size Register"
|
|
bitfld.word 0x00 11.--15. " MULT ,Multiplier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.word 0x00 0.--10. 1. " MAXP ,Maximum Payload Transmitted"
|
|
if (((data.byte(asd:0x10170000+0x60))&0x04)==0x04)
|
|
group.word (0x140+0x02)++0x01
|
|
line.word 0x00 "OTG_TXCSR,OTG Tx Control and Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 13. " MD ,Mode" "Rx,Tx"
|
|
textline " "
|
|
bitfld.word 0x00 12. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " FDT ,Force Data Toggle" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.word 0x00 10. " DRM ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 9. " DWE ,Data Toggle Write Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " DT ,Data Toggle" "Low,High"
|
|
bitfld.word 0x00 7. " NAK ,NAK Timeout" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.word 0x00 6. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 5. " RXS ,Rx Stall" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 4. " STP ,Setup Packet" "Not sent,Sent"
|
|
bitfld.word 0x00 3. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 2. " ERR ,Error" "No error,Error"
|
|
bitfld.word 0x00 1. " FNE ,FIFO Not Empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.word 0x00 0. " TRDY ,Tx Packet Ready" "Not ready,Ready"
|
|
else
|
|
group.word (0x140+0x02)++0x01
|
|
line.word 0x00 "OTG_TXCSR,OTG Tx Control and Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ISO ,Isochronous Transfers" "Bulk/Interrupt,Isochronous"
|
|
textline " "
|
|
bitfld.word 0x00 13. " MD ,Mode" "Rx,Tx"
|
|
bitfld.word 0x00 12. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 11. " FDT ,Force Data Toggle" "Not forced,Forced"
|
|
bitfld.word 0x00 10. " DRM ,DMA Request Mode" "Mode 0,Mode 1"
|
|
textline " "
|
|
bitfld.word 0x00 7. " ITX ,Incomplete" "Not incomplete,Incomplete"
|
|
bitfld.word 0x00 6. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 5. " STS ,Sent Stall" "Not transmitted,Transmitted"
|
|
bitfld.word 0x00 4. " SDS ,Send Stall" "Not issued,Issued"
|
|
textline " "
|
|
bitfld.word 0x00 3. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
bitfld.word 0x00 2. " UND ,Underrun" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FNE ,FIFO Not Empty" "Empty,Not empty"
|
|
bitfld.word 0x00 0. " TRDY ,Tx Packet Ready" "Not ready,Ready"
|
|
endif
|
|
group.word (0x140+0x04)++0x01
|
|
line.word 0x00 "OTG_RXMAXP,OTG Rx Max Packet Size Register"
|
|
bitfld.word 0x00 11.--15. " MULT ,Multiplier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.word 0x00 0.--10. 1. " MAXP ,Maximum Payload Transmitted"
|
|
if (((data.byte(asd:0x10170000+0x60))&0x04)==0x04)
|
|
group.word (0x140+0x06)++0x01
|
|
line.word 0x00 "OTG_RXCSR,OTG Rx Control/Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ARQ ,Auto Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 13. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " DNY ,Disable NYET" "No,Yes"
|
|
textline " "
|
|
bitfld.word 0x00 11. " DMD ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 10. " DWE ,Data Toggle Write Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " DT ,Data Toggle" "Low,High"
|
|
bitfld.word 0x00 8. " IRX ,Incomp Rx" "Not incomplete,Incomplete"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 6. " RS ,Rx Stall" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 5. " RPK ,Request Packet" "Not requested,Requested"
|
|
bitfld.word 0x00 4. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 3. " DER ,Data Error/NAK Timeout" "No error,Error"
|
|
bitfld.word 0x00 2. " ER ,Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FFUL ,FIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 0. " RRDY ,Rx Packet Ready" "Not ready,Ready"
|
|
else
|
|
group.word (0x140+0x06)++0x01
|
|
line.word 0x00 "OTG_RXCSR,OTG Rx Control/Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ISO ,ISO" "Bulk/Interrupt,Isochronous"
|
|
textline " "
|
|
bitfld.word 0x00 13. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " DNY ,Disable NYET" "No,Yes"
|
|
textline " "
|
|
bitfld.word 0x00 11. " DMD ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 8. " IRX ,Incomp Rx" "Not incomplete,Incomplete"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 6. " SNT ,Sent Stall" "Not transmitted,Transmitted"
|
|
textline " "
|
|
bitfld.word 0x00 5. " SND ,Send Stall" "Not issued,Issued"
|
|
bitfld.word 0x00 4. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 3. " FFUL ,FIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 2. " ERR ,Data Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " OR ,Overrun" "Not overrun,Overrun"
|
|
bitfld.word 0x00 0. " RRDY ,Rx Packet Ready" "Not ready,Ready"
|
|
endif
|
|
if (((data.word(asd:0x10170000+0x140+0x06))&0x01)==0x01)
|
|
rgroup.word (0x140+0x08)++0x01
|
|
line.word 0x00 "OTG_RXCNT,OTG Rx Bytes Received Counter"
|
|
hexmask.word 0x00 0.--12. 1. " RXCNT ,Endpoint Rx Count"
|
|
else
|
|
hgroup.word (0x140+0x08)++0x01
|
|
hide.word 0x00 "OTG_RXCNT,OTG Rx Bytes Received Counter"
|
|
endif
|
|
if (((data.byte(asd:0x10170000+0x60))&0x04)==0x04)
|
|
group.byte (0x140+0x0a)++0x03
|
|
line.byte 0x00 "OTG_TXTYPE,OTG Tx Transaction Control Register"
|
|
bitfld.byte 0x00 6.--7. " SPEED ,Operating Speed" "Reserved,High,Full,Low"
|
|
bitfld.byte 0x00 4.--5. " PROT ,Protocol" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--3. " EP ,Target Endpoint Number" "Ep 0,Ep 1,Ep 2,Ep 3,Ep 4,Ep 5,Ep 6,Ep 7,?..."
|
|
line.byte 0x01 "OTG_TXINTV,OTG Tx Polling Interval Register"
|
|
line.byte 0x02 "OTG_RXTYPE,OTG Rx Transaction Control Register"
|
|
bitfld.byte 0x02 6.--7. " SPEED ,Operating Speed" "Reserved,High,Full,Low"
|
|
bitfld.byte 0x02 4.--5. " PROT ,Protocol" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x02 0.--3. " EP ,Target Endpoint Number" "Ep 0,Ep 1,Ep 2,Ep 3,Ep 4,Ep 5,Ep 6,Ep 7,?..."
|
|
line.byte 0x03 "OTG_RXINTV,OTG Rx Polling Interval Register"
|
|
else
|
|
hgroup.byte (0x140+0x0a)++0x03
|
|
hide.byte 0x00 "OTG_TXTYPE,OTG Tx Transaction Control Register"
|
|
hide.byte 0x01 "OTG_TXINTV,OTG Tx Polling Interval Register"
|
|
hide.byte 0x02 "OTG_RXTYPE,OTG Rx Transaction Control Register"
|
|
hide.byte 0x03 "OTG_RXINTV,OTG Rx Polling Interval Register"
|
|
endif
|
|
group.word 0x150++0x01 "Endpoint 5 Registers"
|
|
line.word 0x00 "OTG_TXMAXP,OTG Tx Max Packet Size Register"
|
|
bitfld.word 0x00 11.--15. " MULT ,Multiplier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.word 0x00 0.--10. 1. " MAXP ,Maximum Payload Transmitted"
|
|
if (((data.byte(asd:0x10170000+0x60))&0x04)==0x04)
|
|
group.word (0x150+0x02)++0x01
|
|
line.word 0x00 "OTG_TXCSR,OTG Tx Control and Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 13. " MD ,Mode" "Rx,Tx"
|
|
textline " "
|
|
bitfld.word 0x00 12. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " FDT ,Force Data Toggle" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.word 0x00 10. " DRM ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 9. " DWE ,Data Toggle Write Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " DT ,Data Toggle" "Low,High"
|
|
bitfld.word 0x00 7. " NAK ,NAK Timeout" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.word 0x00 6. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 5. " RXS ,Rx Stall" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 4. " STP ,Setup Packet" "Not sent,Sent"
|
|
bitfld.word 0x00 3. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 2. " ERR ,Error" "No error,Error"
|
|
bitfld.word 0x00 1. " FNE ,FIFO Not Empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.word 0x00 0. " TRDY ,Tx Packet Ready" "Not ready,Ready"
|
|
else
|
|
group.word (0x150+0x02)++0x01
|
|
line.word 0x00 "OTG_TXCSR,OTG Tx Control and Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ISO ,Isochronous Transfers" "Bulk/Interrupt,Isochronous"
|
|
textline " "
|
|
bitfld.word 0x00 13. " MD ,Mode" "Rx,Tx"
|
|
bitfld.word 0x00 12. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 11. " FDT ,Force Data Toggle" "Not forced,Forced"
|
|
bitfld.word 0x00 10. " DRM ,DMA Request Mode" "Mode 0,Mode 1"
|
|
textline " "
|
|
bitfld.word 0x00 7. " ITX ,Incomplete" "Not incomplete,Incomplete"
|
|
bitfld.word 0x00 6. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 5. " STS ,Sent Stall" "Not transmitted,Transmitted"
|
|
bitfld.word 0x00 4. " SDS ,Send Stall" "Not issued,Issued"
|
|
textline " "
|
|
bitfld.word 0x00 3. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
bitfld.word 0x00 2. " UND ,Underrun" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FNE ,FIFO Not Empty" "Empty,Not empty"
|
|
bitfld.word 0x00 0. " TRDY ,Tx Packet Ready" "Not ready,Ready"
|
|
endif
|
|
group.word (0x150+0x04)++0x01
|
|
line.word 0x00 "OTG_RXMAXP,OTG Rx Max Packet Size Register"
|
|
bitfld.word 0x00 11.--15. " MULT ,Multiplier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.word 0x00 0.--10. 1. " MAXP ,Maximum Payload Transmitted"
|
|
if (((data.byte(asd:0x10170000+0x60))&0x04)==0x04)
|
|
group.word (0x150+0x06)++0x01
|
|
line.word 0x00 "OTG_RXCSR,OTG Rx Control/Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ARQ ,Auto Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 13. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " DNY ,Disable NYET" "No,Yes"
|
|
textline " "
|
|
bitfld.word 0x00 11. " DMD ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 10. " DWE ,Data Toggle Write Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " DT ,Data Toggle" "Low,High"
|
|
bitfld.word 0x00 8. " IRX ,Incomp Rx" "Not incomplete,Incomplete"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 6. " RS ,Rx Stall" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 5. " RPK ,Request Packet" "Not requested,Requested"
|
|
bitfld.word 0x00 4. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 3. " DER ,Data Error/NAK Timeout" "No error,Error"
|
|
bitfld.word 0x00 2. " ER ,Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FFUL ,FIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 0. " RRDY ,Rx Packet Ready" "Not ready,Ready"
|
|
else
|
|
group.word (0x150+0x06)++0x01
|
|
line.word 0x00 "OTG_RXCSR,OTG Rx Control/Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ISO ,ISO" "Bulk/Interrupt,Isochronous"
|
|
textline " "
|
|
bitfld.word 0x00 13. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " DNY ,Disable NYET" "No,Yes"
|
|
textline " "
|
|
bitfld.word 0x00 11. " DMD ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 8. " IRX ,Incomp Rx" "Not incomplete,Incomplete"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 6. " SNT ,Sent Stall" "Not transmitted,Transmitted"
|
|
textline " "
|
|
bitfld.word 0x00 5. " SND ,Send Stall" "Not issued,Issued"
|
|
bitfld.word 0x00 4. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 3. " FFUL ,FIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 2. " ERR ,Data Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " OR ,Overrun" "Not overrun,Overrun"
|
|
bitfld.word 0x00 0. " RRDY ,Rx Packet Ready" "Not ready,Ready"
|
|
endif
|
|
if (((data.word(asd:0x10170000+0x150+0x06))&0x01)==0x01)
|
|
rgroup.word (0x150+0x08)++0x01
|
|
line.word 0x00 "OTG_RXCNT,OTG Rx Bytes Received Counter"
|
|
hexmask.word 0x00 0.--12. 1. " RXCNT ,Endpoint Rx Count"
|
|
else
|
|
hgroup.word (0x150+0x08)++0x01
|
|
hide.word 0x00 "OTG_RXCNT,OTG Rx Bytes Received Counter"
|
|
endif
|
|
if (((data.byte(asd:0x10170000+0x60))&0x04)==0x04)
|
|
group.byte (0x150+0x0a)++0x03
|
|
line.byte 0x00 "OTG_TXTYPE,OTG Tx Transaction Control Register"
|
|
bitfld.byte 0x00 6.--7. " SPEED ,Operating Speed" "Reserved,High,Full,Low"
|
|
bitfld.byte 0x00 4.--5. " PROT ,Protocol" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--3. " EP ,Target Endpoint Number" "Ep 0,Ep 1,Ep 2,Ep 3,Ep 4,Ep 5,Ep 6,Ep 7,?..."
|
|
line.byte 0x01 "OTG_TXINTV,OTG Tx Polling Interval Register"
|
|
line.byte 0x02 "OTG_RXTYPE,OTG Rx Transaction Control Register"
|
|
bitfld.byte 0x02 6.--7. " SPEED ,Operating Speed" "Reserved,High,Full,Low"
|
|
bitfld.byte 0x02 4.--5. " PROT ,Protocol" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x02 0.--3. " EP ,Target Endpoint Number" "Ep 0,Ep 1,Ep 2,Ep 3,Ep 4,Ep 5,Ep 6,Ep 7,?..."
|
|
line.byte 0x03 "OTG_RXINTV,OTG Rx Polling Interval Register"
|
|
else
|
|
hgroup.byte (0x150+0x0a)++0x03
|
|
hide.byte 0x00 "OTG_TXTYPE,OTG Tx Transaction Control Register"
|
|
hide.byte 0x01 "OTG_TXINTV,OTG Tx Polling Interval Register"
|
|
hide.byte 0x02 "OTG_RXTYPE,OTG Rx Transaction Control Register"
|
|
hide.byte 0x03 "OTG_RXINTV,OTG Rx Polling Interval Register"
|
|
endif
|
|
group.word 0x160++0x01 "Endpoint 6 Registers"
|
|
line.word 0x00 "OTG_TXMAXP,OTG Tx Max Packet Size Register"
|
|
bitfld.word 0x00 11.--15. " MULT ,Multiplier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.word 0x00 0.--10. 1. " MAXP ,Maximum Payload Transmitted"
|
|
if (((data.byte(asd:0x10170000+0x60))&0x04)==0x04)
|
|
group.word (0x160+0x02)++0x01
|
|
line.word 0x00 "OTG_TXCSR,OTG Tx Control and Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 13. " MD ,Mode" "Rx,Tx"
|
|
textline " "
|
|
bitfld.word 0x00 12. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " FDT ,Force Data Toggle" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.word 0x00 10. " DRM ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 9. " DWE ,Data Toggle Write Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " DT ,Data Toggle" "Low,High"
|
|
bitfld.word 0x00 7. " NAK ,NAK Timeout" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.word 0x00 6. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 5. " RXS ,Rx Stall" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 4. " STP ,Setup Packet" "Not sent,Sent"
|
|
bitfld.word 0x00 3. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 2. " ERR ,Error" "No error,Error"
|
|
bitfld.word 0x00 1. " FNE ,FIFO Not Empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.word 0x00 0. " TRDY ,Tx Packet Ready" "Not ready,Ready"
|
|
else
|
|
group.word (0x160+0x02)++0x01
|
|
line.word 0x00 "OTG_TXCSR,OTG Tx Control and Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ISO ,Isochronous Transfers" "Bulk/Interrupt,Isochronous"
|
|
textline " "
|
|
bitfld.word 0x00 13. " MD ,Mode" "Rx,Tx"
|
|
bitfld.word 0x00 12. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 11. " FDT ,Force Data Toggle" "Not forced,Forced"
|
|
bitfld.word 0x00 10. " DRM ,DMA Request Mode" "Mode 0,Mode 1"
|
|
textline " "
|
|
bitfld.word 0x00 7. " ITX ,Incomplete" "Not incomplete,Incomplete"
|
|
bitfld.word 0x00 6. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 5. " STS ,Sent Stall" "Not transmitted,Transmitted"
|
|
bitfld.word 0x00 4. " SDS ,Send Stall" "Not issued,Issued"
|
|
textline " "
|
|
bitfld.word 0x00 3. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
bitfld.word 0x00 2. " UND ,Underrun" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FNE ,FIFO Not Empty" "Empty,Not empty"
|
|
bitfld.word 0x00 0. " TRDY ,Tx Packet Ready" "Not ready,Ready"
|
|
endif
|
|
group.word (0x160+0x04)++0x01
|
|
line.word 0x00 "OTG_RXMAXP,OTG Rx Max Packet Size Register"
|
|
bitfld.word 0x00 11.--15. " MULT ,Multiplier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.word 0x00 0.--10. 1. " MAXP ,Maximum Payload Transmitted"
|
|
if (((data.byte(asd:0x10170000+0x60))&0x04)==0x04)
|
|
group.word (0x160+0x06)++0x01
|
|
line.word 0x00 "OTG_RXCSR,OTG Rx Control/Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ARQ ,Auto Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 13. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " DNY ,Disable NYET" "No,Yes"
|
|
textline " "
|
|
bitfld.word 0x00 11. " DMD ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 10. " DWE ,Data Toggle Write Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " DT ,Data Toggle" "Low,High"
|
|
bitfld.word 0x00 8. " IRX ,Incomp Rx" "Not incomplete,Incomplete"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 6. " RS ,Rx Stall" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 5. " RPK ,Request Packet" "Not requested,Requested"
|
|
bitfld.word 0x00 4. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 3. " DER ,Data Error/NAK Timeout" "No error,Error"
|
|
bitfld.word 0x00 2. " ER ,Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FFUL ,FIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 0. " RRDY ,Rx Packet Ready" "Not ready,Ready"
|
|
else
|
|
group.word (0x160+0x06)++0x01
|
|
line.word 0x00 "OTG_RXCSR,OTG Rx Control/Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ISO ,ISO" "Bulk/Interrupt,Isochronous"
|
|
textline " "
|
|
bitfld.word 0x00 13. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " DNY ,Disable NYET" "No,Yes"
|
|
textline " "
|
|
bitfld.word 0x00 11. " DMD ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 8. " IRX ,Incomp Rx" "Not incomplete,Incomplete"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 6. " SNT ,Sent Stall" "Not transmitted,Transmitted"
|
|
textline " "
|
|
bitfld.word 0x00 5. " SND ,Send Stall" "Not issued,Issued"
|
|
bitfld.word 0x00 4. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 3. " FFUL ,FIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 2. " ERR ,Data Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " OR ,Overrun" "Not overrun,Overrun"
|
|
bitfld.word 0x00 0. " RRDY ,Rx Packet Ready" "Not ready,Ready"
|
|
endif
|
|
if (((data.word(asd:0x10170000+0x160+0x06))&0x01)==0x01)
|
|
rgroup.word (0x160+0x08)++0x01
|
|
line.word 0x00 "OTG_RXCNT,OTG Rx Bytes Received Counter"
|
|
hexmask.word 0x00 0.--12. 1. " RXCNT ,Endpoint Rx Count"
|
|
else
|
|
hgroup.word (0x160+0x08)++0x01
|
|
hide.word 0x00 "OTG_RXCNT,OTG Rx Bytes Received Counter"
|
|
endif
|
|
if (((data.byte(asd:0x10170000+0x60))&0x04)==0x04)
|
|
group.byte (0x160+0x0a)++0x03
|
|
line.byte 0x00 "OTG_TXTYPE,OTG Tx Transaction Control Register"
|
|
bitfld.byte 0x00 6.--7. " SPEED ,Operating Speed" "Reserved,High,Full,Low"
|
|
bitfld.byte 0x00 4.--5. " PROT ,Protocol" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--3. " EP ,Target Endpoint Number" "Ep 0,Ep 1,Ep 2,Ep 3,Ep 4,Ep 5,Ep 6,Ep 7,?..."
|
|
line.byte 0x01 "OTG_TXINTV,OTG Tx Polling Interval Register"
|
|
line.byte 0x02 "OTG_RXTYPE,OTG Rx Transaction Control Register"
|
|
bitfld.byte 0x02 6.--7. " SPEED ,Operating Speed" "Reserved,High,Full,Low"
|
|
bitfld.byte 0x02 4.--5. " PROT ,Protocol" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x02 0.--3. " EP ,Target Endpoint Number" "Ep 0,Ep 1,Ep 2,Ep 3,Ep 4,Ep 5,Ep 6,Ep 7,?..."
|
|
line.byte 0x03 "OTG_RXINTV,OTG Rx Polling Interval Register"
|
|
else
|
|
hgroup.byte (0x160+0x0a)++0x03
|
|
hide.byte 0x00 "OTG_TXTYPE,OTG Tx Transaction Control Register"
|
|
hide.byte 0x01 "OTG_TXINTV,OTG Tx Polling Interval Register"
|
|
hide.byte 0x02 "OTG_RXTYPE,OTG Rx Transaction Control Register"
|
|
hide.byte 0x03 "OTG_RXINTV,OTG Rx Polling Interval Register"
|
|
endif
|
|
group.word 0x170++0x01 "Endpoint 7 Registers"
|
|
line.word 0x00 "OTG_TXMAXP,OTG Tx Max Packet Size Register"
|
|
bitfld.word 0x00 11.--15. " MULT ,Multiplier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.word 0x00 0.--10. 1. " MAXP ,Maximum Payload Transmitted"
|
|
if (((data.byte(asd:0x10170000+0x60))&0x04)==0x04)
|
|
group.word (0x170+0x02)++0x01
|
|
line.word 0x00 "OTG_TXCSR,OTG Tx Control and Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 13. " MD ,Mode" "Rx,Tx"
|
|
textline " "
|
|
bitfld.word 0x00 12. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " FDT ,Force Data Toggle" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.word 0x00 10. " DRM ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 9. " DWE ,Data Toggle Write Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " DT ,Data Toggle" "Low,High"
|
|
bitfld.word 0x00 7. " NAK ,NAK Timeout" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.word 0x00 6. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 5. " RXS ,Rx Stall" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 4. " STP ,Setup Packet" "Not sent,Sent"
|
|
bitfld.word 0x00 3. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 2. " ERR ,Error" "No error,Error"
|
|
bitfld.word 0x00 1. " FNE ,FIFO Not Empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.word 0x00 0. " TRDY ,Tx Packet Ready" "Not ready,Ready"
|
|
else
|
|
group.word (0x170+0x02)++0x01
|
|
line.word 0x00 "OTG_TXCSR,OTG Tx Control and Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ISO ,Isochronous Transfers" "Bulk/Interrupt,Isochronous"
|
|
textline " "
|
|
bitfld.word 0x00 13. " MD ,Mode" "Rx,Tx"
|
|
bitfld.word 0x00 12. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 11. " FDT ,Force Data Toggle" "Not forced,Forced"
|
|
bitfld.word 0x00 10. " DRM ,DMA Request Mode" "Mode 0,Mode 1"
|
|
textline " "
|
|
bitfld.word 0x00 7. " ITX ,Incomplete" "Not incomplete,Incomplete"
|
|
bitfld.word 0x00 6. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 5. " STS ,Sent Stall" "Not transmitted,Transmitted"
|
|
bitfld.word 0x00 4. " SDS ,Send Stall" "Not issued,Issued"
|
|
textline " "
|
|
bitfld.word 0x00 3. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
bitfld.word 0x00 2. " UND ,Underrun" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FNE ,FIFO Not Empty" "Empty,Not empty"
|
|
bitfld.word 0x00 0. " TRDY ,Tx Packet Ready" "Not ready,Ready"
|
|
endif
|
|
group.word (0x170+0x04)++0x01
|
|
line.word 0x00 "OTG_RXMAXP,OTG Rx Max Packet Size Register"
|
|
bitfld.word 0x00 11.--15. " MULT ,Multiplier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.word 0x00 0.--10. 1. " MAXP ,Maximum Payload Transmitted"
|
|
if (((data.byte(asd:0x10170000+0x60))&0x04)==0x04)
|
|
group.word (0x170+0x06)++0x01
|
|
line.word 0x00 "OTG_RXCSR,OTG Rx Control/Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ARQ ,Auto Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 13. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " DNY ,Disable NYET" "No,Yes"
|
|
textline " "
|
|
bitfld.word 0x00 11. " DMD ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 10. " DWE ,Data Toggle Write Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " DT ,Data Toggle" "Low,High"
|
|
bitfld.word 0x00 8. " IRX ,Incomp Rx" "Not incomplete,Incomplete"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 6. " RS ,Rx Stall" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 5. " RPK ,Request Packet" "Not requested,Requested"
|
|
bitfld.word 0x00 4. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 3. " DER ,Data Error/NAK Timeout" "No error,Error"
|
|
bitfld.word 0x00 2. " ER ,Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FFUL ,FIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 0. " RRDY ,Rx Packet Ready" "Not ready,Ready"
|
|
else
|
|
group.word (0x170+0x06)++0x01
|
|
line.word 0x00 "OTG_RXCSR,OTG Rx Control/Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ISO ,ISO" "Bulk/Interrupt,Isochronous"
|
|
textline " "
|
|
bitfld.word 0x00 13. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " DNY ,Disable NYET" "No,Yes"
|
|
textline " "
|
|
bitfld.word 0x00 11. " DMD ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 8. " IRX ,Incomp Rx" "Not incomplete,Incomplete"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 6. " SNT ,Sent Stall" "Not transmitted,Transmitted"
|
|
textline " "
|
|
bitfld.word 0x00 5. " SND ,Send Stall" "Not issued,Issued"
|
|
bitfld.word 0x00 4. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 3. " FFUL ,FIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 2. " ERR ,Data Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " OR ,Overrun" "Not overrun,Overrun"
|
|
bitfld.word 0x00 0. " RRDY ,Rx Packet Ready" "Not ready,Ready"
|
|
endif
|
|
if (((data.word(asd:0x10170000+0x170+0x06))&0x01)==0x01)
|
|
rgroup.word (0x170+0x08)++0x01
|
|
line.word 0x00 "OTG_RXCNT,OTG Rx Bytes Received Counter"
|
|
hexmask.word 0x00 0.--12. 1. " RXCNT ,Endpoint Rx Count"
|
|
else
|
|
hgroup.word (0x170+0x08)++0x01
|
|
hide.word 0x00 "OTG_RXCNT,OTG Rx Bytes Received Counter"
|
|
endif
|
|
if (((data.byte(asd:0x10170000+0x60))&0x04)==0x04)
|
|
group.byte (0x170+0x0a)++0x03
|
|
line.byte 0x00 "OTG_TXTYPE,OTG Tx Transaction Control Register"
|
|
bitfld.byte 0x00 6.--7. " SPEED ,Operating Speed" "Reserved,High,Full,Low"
|
|
bitfld.byte 0x00 4.--5. " PROT ,Protocol" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--3. " EP ,Target Endpoint Number" "Ep 0,Ep 1,Ep 2,Ep 3,Ep 4,Ep 5,Ep 6,Ep 7,?..."
|
|
line.byte 0x01 "OTG_TXINTV,OTG Tx Polling Interval Register"
|
|
line.byte 0x02 "OTG_RXTYPE,OTG Rx Transaction Control Register"
|
|
bitfld.byte 0x02 6.--7. " SPEED ,Operating Speed" "Reserved,High,Full,Low"
|
|
bitfld.byte 0x02 4.--5. " PROT ,Protocol" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x02 0.--3. " EP ,Target Endpoint Number" "Ep 0,Ep 1,Ep 2,Ep 3,Ep 4,Ep 5,Ep 6,Ep 7,?..."
|
|
line.byte 0x03 "OTG_RXINTV,OTG Rx Polling Interval Register"
|
|
else
|
|
hgroup.byte (0x170+0x0a)++0x03
|
|
hide.byte 0x00 "OTG_TXTYPE,OTG Tx Transaction Control Register"
|
|
hide.byte 0x01 "OTG_TXINTV,OTG Tx Polling Interval Register"
|
|
hide.byte 0x02 "OTG_RXTYPE,OTG Rx Transaction Control Register"
|
|
hide.byte 0x03 "OTG_RXINTV,OTG Rx Polling Interval Register"
|
|
endif
|
|
tree.end
|
|
width 12.
|
|
group.long 0x200++0x03 "Top-level Control and Status Registers"
|
|
line.long 0x00 "OTG_DMASEL,OTG DMA Selector Register"
|
|
bitfld.long 0x00 25.--29. " DMASEL_5 ,DMA Selector 5" "EP1 Tx,EP2 Tx,EP3 Tx,EP4 Tx,EP5 Tx,EP6 Tx,EP7 Tx,EP1 Rx,EP2 Rx,EP3 Rx,EP4 Rx,EP5 Rx,EP6 Rx,EP7 Rx,?..."
|
|
bitfld.long 0x00 20.--24. " DMASEL_4 ,DMA Selector 4" "EP1 Tx,EP2 Tx,EP3 Tx,EP4 Tx,EP5 Tx,EP6 Tx,EP7 Tx,EP1 Rx,EP2 Rx,EP3 Rx,EP4 Rx,EP5 Rx,EP6 Rx,EP7 Rx,?..."
|
|
bitfld.long 0x00 15.--19. " DMASEL_3 ,DMA Selector 3" "EP1 Tx,EP2 Tx,EP3 Tx,EP4 Tx,EP5 Tx,EP6 Tx,EP7 Tx,EP1 Rx,EP2 Rx,EP3 Rx,EP4 Rx,EP5 Rx,EP6 Rx,EP7 Rx,?..."
|
|
textline " "
|
|
bitfld.long 0x00 10.--14. " DMASEL_2 ,DMA Selector 2" "EP1 Tx,EP2 Tx,EP3 Tx,EP4 Tx,EP5 Tx,EP6 Tx,EP7 Tx,EP1 Rx,EP2 Rx,EP3 Rx,EP4 Rx,EP5 Rx,EP6 Rx,EP7 Rx,?..."
|
|
bitfld.long 0x00 5.--9. " DMASEL_1 ,DMA Selector 1" "EP1 Tx,EP2 Tx,EP3 Tx,EP4 Tx,EP5 Tx,EP6 Tx,EP7 Tx,EP1 Rx,EP2 Rx,EP3 Rx,EP4 Rx,EP5 Rx,EP6 Rx,EP7 Rx,?..."
|
|
bitfld.long 0x00 0.--4. " DMASEL_0 ,DMA Selector 0" "EP1 Tx,EP2 Tx,EP3 Tx,EP4 Tx,EP5 Tx,EP6 Tx,EP7 Tx,EP1 Rx,EP2 Rx,EP3 Rx,EP4 Rx,EP5 Rx,EP6 Rx,EP7 Rx,?..."
|
|
group.word 0x204++0x01
|
|
line.word 0x00 "OTG_TOPCTRL,OTG Top Control Register"
|
|
bitfld.word 0x00 10. " IDDQ ,USBFS- PHY IDDQ mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " VBUSVALID ,VBus above VBusValid threshold" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " AVALID ,VBus above VBus A-device session threshold" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " TM_I2C ,Testmode input to speed up clock for RTL testing" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " TM_OTG ,Test Mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " VBUSLO ,VBUSLO Control" "Below,Above"
|
|
textline " "
|
|
bitfld.word 0x00 4. " HOSTDEV ,Host/Device" "Device,Host"
|
|
bitfld.word 0x00 3. " I2C_OFF ,I2C OFF switch" "On,Off"
|
|
textline " "
|
|
bitfld.word 0x00 2. " XCLK_GATE_ON ,XCLK Gate" "Off,On"
|
|
bitfld.word 0x00 1. " ENABLE_DDR ,Double data rate mode support" "Not active,Active"
|
|
textline " "
|
|
bitfld.word 0x00 0. " MODE_ULPI ,Active Transceiver Interface" "OTG FS,ULPI"
|
|
width 20.
|
|
tree "Extended Registers"
|
|
if (((data.byte(asd:0x10170000+0x60))&0x04)==0x04)
|
|
group.word 0x304++0x01
|
|
line.word 0x00 "OTG_RQPKTCNT[1],OTG Request Packet Count Register for Endpoint 1"
|
|
else
|
|
hgroup.word 0x304++0x01
|
|
hide.word 0x00 "OTG_RQPKTCNT[1],OTG Request Packet Count Register for Endpoint 1"
|
|
endif
|
|
if (((data.byte(asd:0x10170000+0x60))&0x04)==0x04)
|
|
group.word 0x308++0x01
|
|
line.word 0x00 "OTG_RQPKTCNT[2],OTG Request Packet Count Register for Endpoint 2"
|
|
else
|
|
hgroup.word 0x308++0x01
|
|
hide.word 0x00 "OTG_RQPKTCNT[2],OTG Request Packet Count Register for Endpoint 2"
|
|
endif
|
|
if (((data.byte(asd:0x10170000+0x60))&0x04)==0x04)
|
|
group.word 0x30C++0x01
|
|
line.word 0x00 "OTG_RQPKTCNT[3],OTG Request Packet Count Register for Endpoint 3"
|
|
else
|
|
hgroup.word 0x30C++0x01
|
|
hide.word 0x00 "OTG_RQPKTCNT[3],OTG Request Packet Count Register for Endpoint 3"
|
|
endif
|
|
if (((data.byte(asd:0x10170000+0x60))&0x04)==0x04)
|
|
group.word 0x310++0x01
|
|
line.word 0x00 "OTG_RQPKTCNT[4],OTG Request Packet Count Register for Endpoint 4"
|
|
else
|
|
hgroup.word 0x310++0x01
|
|
hide.word 0x00 "OTG_RQPKTCNT[4],OTG Request Packet Count Register for Endpoint 4"
|
|
endif
|
|
if (((data.byte(asd:0x10170000+0x60))&0x04)==0x04)
|
|
group.word 0x314++0x01
|
|
line.word 0x00 "OTG_RQPKTCNT[5],OTG Request Packet Count Register for Endpoint 5"
|
|
else
|
|
hgroup.word 0x314++0x01
|
|
hide.word 0x00 "OTG_RQPKTCNT[5],OTG Request Packet Count Register for Endpoint 5"
|
|
endif
|
|
if (((data.byte(asd:0x10170000+0x60))&0x04)==0x04)
|
|
group.word 0x318++0x01
|
|
line.word 0x00 "OTG_RQPKTCNT[6],OTG Request Packet Count Register for Endpoint 6"
|
|
else
|
|
hgroup.word 0x318++0x01
|
|
hide.word 0x00 "OTG_RQPKTCNT[6],OTG Request Packet Count Register for Endpoint 6"
|
|
endif
|
|
if (((data.byte(asd:0x10170000+0x60))&0x04)==0x04)
|
|
group.word 0x31C++0x01
|
|
line.word 0x00 "OTG_RQPKTCNT[7],OTG Request Packet Count Register for Endpoint 7"
|
|
else
|
|
hgroup.word 0x31C++0x01
|
|
hide.word 0x00 "OTG_RQPKTCNT[7],OTG Request Packet Count Register for Endpoint 7"
|
|
endif
|
|
if (((data.byte(asd:0x10170000+0x60))&0x04)==0x04)
|
|
group.word 0x320++0x01
|
|
line.word 0x00 "OTG_RQPKTCNT[8],OTG Request Packet Count Register for Endpoint 8"
|
|
else
|
|
hgroup.word 0x320++0x01
|
|
hide.word 0x00 "OTG_RQPKTCNT[8],OTG Request Packet Count Register for Endpoint 8"
|
|
endif
|
|
if (((data.byte(asd:0x10170000+0x60))&0x04)==0x04)
|
|
group.word 0x324++0x01
|
|
line.word 0x00 "OTG_RQPKTCNT[9],OTG Request Packet Count Register for Endpoint 9"
|
|
else
|
|
hgroup.word 0x324++0x01
|
|
hide.word 0x00 "OTG_RQPKTCNT[9],OTG Request Packet Count Register for Endpoint 9"
|
|
endif
|
|
if (((data.byte(asd:0x10170000+0x60))&0x04)==0x04)
|
|
group.word 0x328++0x01
|
|
line.word 0x00 "OTG_RQPKTCNT[10],OTG Request Packet Count Register for Endpoint 10"
|
|
else
|
|
hgroup.word 0x328++0x01
|
|
hide.word 0x00 "OTG_RQPKTCNT[10],OTG Request Packet Count Register for Endpoint 10"
|
|
endif
|
|
if (((data.byte(asd:0x10170000+0x60))&0x04)==0x04)
|
|
group.word 0x32C++0x01
|
|
line.word 0x00 "OTG_RQPKTCNT[11],OTG Request Packet Count Register for Endpoint 11"
|
|
else
|
|
hgroup.word 0x32C++0x01
|
|
hide.word 0x00 "OTG_RQPKTCNT[11],OTG Request Packet Count Register for Endpoint 11"
|
|
endif
|
|
if (((data.byte(asd:0x10170000+0x60))&0x04)==0x04)
|
|
group.word 0x330++0x01
|
|
line.word 0x00 "OTG_RQPKTCNT[12],OTG Request Packet Count Register for Endpoint 12"
|
|
else
|
|
hgroup.word 0x330++0x01
|
|
hide.word 0x00 "OTG_RQPKTCNT[12],OTG Request Packet Count Register for Endpoint 12"
|
|
endif
|
|
if (((data.byte(asd:0x10170000+0x60))&0x04)==0x04)
|
|
group.word 0x334++0x01
|
|
line.word 0x00 "OTG_RQPKTCNT[13],OTG Request Packet Count Register for Endpoint 13"
|
|
else
|
|
hgroup.word 0x334++0x01
|
|
hide.word 0x00 "OTG_RQPKTCNT[13],OTG Request Packet Count Register for Endpoint 13"
|
|
endif
|
|
if (((data.byte(asd:0x10170000+0x60))&0x04)==0x04)
|
|
group.word 0x338++0x01
|
|
line.word 0x00 "OTG_RQPKTCNT[14],OTG Request Packet Count Register for Endpoint 14"
|
|
else
|
|
hgroup.word 0x338++0x01
|
|
hide.word 0x00 "OTG_RQPKTCNT[14],OTG Request Packet Count Register for Endpoint 14"
|
|
endif
|
|
if (((data.byte(asd:0x10170000+0x60))&0x04)==0x04)
|
|
group.word 0x33C++0x01
|
|
line.word 0x00 "OTG_RQPKTCNT[15],OTG Request Packet Count Register for Endpoint 15"
|
|
else
|
|
hgroup.word 0x33C++0x01
|
|
hide.word 0x00 "OTG_RQPKTCNT[15],OTG Request Packet Count Register for Endpoint 15"
|
|
endif
|
|
group.word 0x340++0x07
|
|
line.word 0x00 "OTG_RXDPKTBUFDIS,OTG Double Packet Buffer Disable Rx Register"
|
|
bitfld.word 0x00 15. " EP15_RXDIS ,Rx Double Packet Buffer Disable for Endpoint 15" "Not asserted,Asserted"
|
|
bitfld.word 0x00 14. " EP14_RXDIS ,Rx Double Packet Buffer Disable for Endpoint 14" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.word 0x00 13. " EP13_RXDIS ,Rx Double Packet Buffer Disable for Endpoint 13" "Not asserted,Asserted"
|
|
bitfld.word 0x00 12. " EP12_RXDIS ,Rx Double Packet Buffer Disable for Endpoint 12" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.word 0x00 11. " EP11_RXDIS ,Rx Double Packet Buffer Disable for Endpoint 11" "Not asserted,Asserted"
|
|
bitfld.word 0x00 10. " EP10_RXDIS ,Rx Double Packet Buffer Disable for Endpoint 10" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.word 0x00 9. " EP9_RXDIS ,Rx Double Packet Buffer Disable for Endpoint 9" "Not asserted,Asserted"
|
|
bitfld.word 0x00 8. " EP8_RXDIS ,Rx Double Packet Buffer Disable for Endpoint 8" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.word 0x00 7. " EP7_RXDIS ,Rx Double Packet Buffer Disable for Endpoint 7" "Not asserted,Asserted"
|
|
bitfld.word 0x00 6. " EP6_RXDIS ,Rx Double Packet Buffer Disable for Endpoint 6" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.word 0x00 5. " EP5_RXDIS ,Rx Double Packet Buffer Disable for Endpoint 5" "Not asserted,Asserted"
|
|
bitfld.word 0x00 4. " EP4_RXDIS ,Rx Double Packet Buffer Disable for Endpoint 4" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.word 0x00 3. " EP3_RXDIS ,Rx Double Packet Buffer Disable for Endpoint 3" "Not asserted,Asserted"
|
|
bitfld.word 0x00 2. " EP2_RXDIS ,Rx Double Packet Buffer Disable for Endpoint 2" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.word 0x00 1. " EP1_RXDIS ,Rx Double Packet Buffer Disable for Endpoint 1" "Not asserted,Asserted"
|
|
line.word 0x02 "OTG_TXDPKTBUFDIS,OTG Double Packet Buffer Disable Tx Register"
|
|
bitfld.word 0x02 15. " EP15_TXDIS ,Tx Double Packet Buffer Disable for Endpoint 15" "Not asserted,Asserted"
|
|
bitfld.word 0x02 14. " EP14_TXDIS ,Tx Double Packet Buffer Disable for Endpoint 14" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.word 0x02 13. " EP13_TXDIS ,Tx Double Packet Buffer Disable for Endpoint 13" "Not asserted,Asserted"
|
|
bitfld.word 0x02 12. " EP12_TXDIS ,Tx Double Packet Buffer Disable for Endpoint 12" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.word 0x02 11. " EP11_TXDIS ,Tx Double Packet Buffer Disable for Endpoint 11" "Not asserted,Asserted"
|
|
bitfld.word 0x02 10. " EP10_TXDIS ,Tx Double Packet Buffer Disable for Endpoint 10" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.word 0x02 9. " EP9_TXDIS ,Tx Double Packet Buffer Disable for Endpoint 9" "Not asserted,Asserted"
|
|
bitfld.word 0x02 8. " EP8_TXDIS ,Tx Double Packet Buffer Disable for Endpoint 8" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.word 0x02 7. " EP7_TXDIS ,Tx Double Packet Buffer Disable for Endpoint 7" "Not asserted,Asserted"
|
|
bitfld.word 0x02 6. " EP6_TXDIS ,Tx Double Packet Buffer Disable for Endpoint 6" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.word 0x02 5. " EP5_TXDIS ,Tx Double Packet Buffer Disable for Endpoint 5" "Not asserted,Asserted"
|
|
bitfld.word 0x02 4. " EP4_TXDIS ,Tx Double Packet Buffer Disable for Endpoint 4" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.word 0x02 3. " EP3_TXDIS ,Tx Double Packet Buffer Disable for Endpoint 3" "Not asserted,Asserted"
|
|
bitfld.word 0x02 2. " EP2_TXDIS ,Tx Double Packet Buffer Disable for Endpoint 2" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.word 0x02 1. " EP1_TXDIS ,Tx Double Packet Buffer Disable for Endpoint 1" "Not asserted,Asserted"
|
|
line.word 0x04 "OTG_CTUCH,OTG Chirp Time-out Register"
|
|
line.word 0x06 "OTG_CTHSRTN,OTG High-Speed Resume Signaling Register"
|
|
tree.end
|
|
width 0xb
|
|
tree.end
|
|
endif
|
|
tree "High-Speed USB On-The-Go with Embedded HS PHY"
|
|
base asd:0x10200000
|
|
width 14.
|
|
if (((data.byte(asd:0x10200000+0x60))&0x04)==0x04)
|
|
hgroup.byte 0x00++0x00 "Common Registers"
|
|
hide.byte 0x00 "OTG_FADDR,OTG Function Address Register"
|
|
group.byte 0x01++0x00
|
|
line.byte 0x00 "OTG_PWR,OTG Power Register"
|
|
bitfld.byte 0x00 5. " HS_EN ,HS Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " HS_MD ,HS Mode" "Normal,Full-speed"
|
|
bitfld.byte 0x00 3. " RST ,Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " RSM ,Resume" "No resume,Resume"
|
|
bitfld.byte 0x00 1. " SUSP ,Suspend Mode" "Normal,Suspend"
|
|
bitfld.byte 0x00 0. " SUSPM ,Enable Suspend M" "Disabled,Enabled"
|
|
else
|
|
group.byte 0x00++0x01 "Common Registers"
|
|
line.byte 0x00 "OTG_FADDR,OTG Function Address Register"
|
|
hexmask.byte 0x00 0.--6. 1. " FUNC_ADDR ,Function Address"
|
|
line.byte 0x01 "OTG_PWR,OTG Power Register"
|
|
bitfld.byte 0x01 7. " ISO_UP ,ISO Update" "Not updated,Updated"
|
|
bitfld.byte 0x01 6. " SFCN ,Soft Connect" "Disabled,Enabled"
|
|
bitfld.byte 0x01 5. " HS_EN ,HS Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x01 4. " HS_MD ,HS Mode" "Normal,High-speed"
|
|
bitfld.byte 0x01 3. " RST ,Reset" "No reset,Reset"
|
|
bitfld.byte 0x01 2. " RSM ,Resume" "No resume,Resume"
|
|
textline " "
|
|
bitfld.byte 0x01 1. " SUSP ,Suspend Mode" "Normal,Suspend"
|
|
bitfld.byte 0x01 0. " SUSPM ,Enable Suspend M" "Disabled,Enabled"
|
|
endif
|
|
hgroup.word 0x02++0x01
|
|
hide.word 0x00 "OTG_INTTX,OTG Tx Interrupt Register"
|
|
in
|
|
hgroup.word 0x04++0x01
|
|
hide.word 0x00 "OTG_INTRX,OTG Rx Interrupt Register"
|
|
in
|
|
group.word 0x06++0x03
|
|
line.word 0x00 "OTG_INTTXEN,OTG Tx Interrupt Enable Register"
|
|
bitfld.word 0x00 7. " EP[7] ,EP 7 Tx Interrupt Mask" "Masked,Enabled"
|
|
bitfld.word 0x00 6. " EP[6] ,EP 6 Tx Interrupt Mask" "Masked,Enabled"
|
|
bitfld.word 0x00 5. " EP[5] ,EP 5 Tx Interrupt Mask" "Masked,Enabled"
|
|
bitfld.word 0x00 4. " EP[4] ,EP 4 Tx Interrupt Mask" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " EP[3] ,EP 3 Tx Interrupt Mask" "Masked,Enabled"
|
|
bitfld.word 0x00 2. " EP[2] ,EP 2 Tx Interrupt Mask" "Masked,Enabled"
|
|
bitfld.word 0x00 1. " EP[1] ,EP 1 Tx Interrupt Mask" "Masked,Enabled"
|
|
bitfld.word 0x00 0. " EP[0] ,EP 0 Tx Interrupt Mask" "Masked,Enabled"
|
|
line.word 0x02 "OTG_INTRXEN,OTG Rx Interrupt Enable Register"
|
|
bitfld.word 0x02 7. " EP[7] ,EP 7 Rx Interrupt Mask" "Masked,Enabled"
|
|
bitfld.word 0x02 6. " EP[6] ,EP 6 Rx Interrupt Mask" "Masked,Enabled"
|
|
bitfld.word 0x02 5. " EP[5] ,EP 5 Rx Interrupt Mask" "Masked,Enabled"
|
|
bitfld.word 0x02 4. " EP[4] ,EP 4 Rx Interrupt Mask" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.word 0x02 3. " EP[3] ,EP 3 Rx Interrupt Mask" "Masked,Enabled"
|
|
bitfld.word 0x02 2. " EP[2] ,EP 2 Rx Interrupt Mask" "Masked,Enabled"
|
|
bitfld.word 0x02 1. " EP[1] ,EP 1 Rx Interrupt Mask" "Masked,Enabled"
|
|
if (((data.byte(asd:0x10200000+0x60))&0x84)==0x04)
|
|
rgroup.byte 0x0a++0x00
|
|
line.byte 0x00 "OTG_INTUSB,Common USB Interrupt Register"
|
|
bitfld.byte 0x00 6. " SREQ ,Session Request" "Not requested,Requested"
|
|
bitfld.byte 0x00 5. " DISCON ,Disconnect" "Connected,Disconnected"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " CONN ,Connect" "Not connected,Connected"
|
|
bitfld.byte 0x00 3. " SOF ,Start of Frame" "Not started,Started"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " RST ,Babble" "Not detected,Detected"
|
|
bitfld.byte 0x00 1. " RES ,Resume" "No resume,Resume"
|
|
elif (((data.byte(asd:0x10200000+0x60))&0x84)==0x84)
|
|
rgroup.byte 0x0a++0x00
|
|
line.byte 0x00 "OTG_INTUSB,Common USB Interrupt Register"
|
|
bitfld.byte 0x00 5. " DISCON ,Disconnect" "Connected,Disconnected"
|
|
bitfld.byte 0x00 4. " CONN ,Connect" "Disconnected,Connected"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " SOF ,Start of Frame" "Not started,Started"
|
|
bitfld.byte 0x00 2. " RST ,Babble" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " RES ,Resume" "No resume,Resume"
|
|
elif (((data.byte(asd:0x10200000+0x60))&0x84)==0x00)
|
|
rgroup.byte 0x0a++0x00
|
|
line.byte 0x00 "OTG_INTUSB,Common USB Interrupt Register"
|
|
bitfld.byte 0x00 7. " VBE ,VBUS Error" "No error,Error"
|
|
bitfld.byte 0x00 6. " SREQ ,Session Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " DISCON ,Disconnect" "Not ended,Ended"
|
|
bitfld.byte 0x00 3. " SOF ,Start of Frame" "Not started,Started"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " RST ,Reset" "No reset,Reset"
|
|
bitfld.byte 0x00 1. " RES ,Resume" "No resume,Resume"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
else
|
|
rgroup.byte 0x0a++0x00
|
|
line.byte 0x00 "OTG_INTUSB,Common USB Interrupt Register"
|
|
bitfld.byte 0x00 7. " VBE ,VBUS Error" "No error,Error"
|
|
bitfld.byte 0x00 5. " DISCON ,Disconnect" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " SOF ,Start of Frame" "Not started,Started"
|
|
bitfld.byte 0x00 2. " RST ,Reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " RES ,Resume" "No resume,Resume"
|
|
bitfld.byte 0x00 0. " SUSP ,Suspend" "Not suspended,Suspended"
|
|
endif
|
|
group.byte 0x0b++0x00
|
|
line.byte 0x00 "OTG_INTUSBEN,Common USB Interrupt Enable Register"
|
|
bitfld.byte 0x00 7. " VBEN ,VBUS Error Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " SREQN ,Session Request Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " DSCEN ,Disconnect Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " CONEN ,Connect Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " SOFEN ,Start of Frame Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " RSTEN ,Reset/Babble Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " RESEN ,Resume Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " SSPEN ,Suspend Enable" "Disabled,Enabled"
|
|
rgroup.word 0x0c++0x01
|
|
line.word 0x00 "OTG_FMNO,OTG Frame Number Register"
|
|
hexmask.word 0x00 0.--10. 1. " FMNO ,Frame Number"
|
|
group.byte 0x0e++0x01
|
|
line.byte 0x00 "OTG_INDX,OTG Index Register"
|
|
bitfld.byte 0x00 0.--3. " EPNO ,Endpoint Number" "Ep 0,Ep 1,Ep 2,Ep 3,Ep 4,Ep 5,Ep 6,Ep 7,?..."
|
|
line.byte 0x01 "USB_TM,USB Test Mode Register"
|
|
bitfld.byte 0x01 7. " FRH ,Force Host" "Not forced,Forced"
|
|
bitfld.byte 0x01 6. " FIFOA ,FIFO Access" "Not transferred,Transferred"
|
|
textline " "
|
|
bitfld.byte 0x01 5. " FFS ,Force Full-Speed" "Not forced,Forced"
|
|
bitfld.byte 0x01 4. " FHS ,Force High-Speed" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.byte 0x01 3. " TSTPKT ,Test Packet" "Disabled,Enabled"
|
|
bitfld.byte 0x01 2. " TSTK ,Test K-state" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x01 1. " TSTJ ,Test J-state" "Disabled,Enabled"
|
|
bitfld.byte 0x01 0. " TSTNAK ,Test SE0/NAK" "Disabled,Enabled"
|
|
if (((data.byte(asd:0x10200000+0x0e))&0x0f)==(0x01||0x02||0x03||0x04||0x05||0x06||0x07))
|
|
group.word 0x10++0x01 "Indexed Registers"
|
|
line.word 0x00 "OTG_TXMAXP,OTG Tx Max Packet Size Register"
|
|
bitfld.word 0x00 11.--15. " MULT ,Multiplier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.word 0x00 0.--10. 1. " MAXP ,Maximum Payload Transmitted"
|
|
else
|
|
hgroup.word 0x10++0x01 "Indexed Registers"
|
|
hide.word 0x00 "OTG_TXMAXP,OTG Tx Max Packet Size Register"
|
|
endif
|
|
if (((data.byte(asd:0x10200000+0x60))&0x04)==0x04)&&(((data.byte(asd:0x10200000+0x0e))&0x0f)==0x00)
|
|
group.word 0x12++0x01
|
|
line.word 0x00 "OTG_CSR0,OTG EP0 Control and Status Register"
|
|
bitfld.word 0x00 11. " DPNG ,Disable Ping" "No,Yes"
|
|
bitfld.word 0x00 10. " DWE ,Data Toggle Write Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " DT ,Data Toggle" "Low,High"
|
|
bitfld.word 0x00 8. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 7. " NAK ,NAK Timeout" "Not halted,Halted"
|
|
bitfld.word 0x00 6. " STPK ,Status Packet" "Not performed,Performed"
|
|
textline " "
|
|
bitfld.word 0x00 5. " RPK ,Request Packet" "Not requested,Requested"
|
|
bitfld.word 0x00 4. " ERR ,Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 3. " STP ,Setup Packet" "Not sent,Sent"
|
|
bitfld.word 0x00 2. " RXS ,Receive Stall" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 1. " TRDY ,Tx Packet Ready" "Not ready,Ready"
|
|
bitfld.word 0x00 0. " RRDY ,Rx Packet Ready" "Not ready,Ready"
|
|
elif (((data.byte(asd:0x10200000+0x60))&0x04)==0x00)&&(((data.byte(asd:0x10200000+0x0e))&0x0f)==0x00)
|
|
group.word 0x12++0x01
|
|
line.word 0x00 "OTG_CSR0,OTG EP0 Control and Status Register"
|
|
bitfld.word 0x00 8. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
bitfld.word 0x00 7. " SSE ,Serviced Setup End" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 6. " SRDY ,Serviced Rx Packet Ready" "No effect,Cleared"
|
|
bitfld.word 0x00 5. " SND ,Send Stall" "Not terminated,Terminated"
|
|
textline " "
|
|
bitfld.word 0x00 4. " STE ,Setup End" "Not ended,Ended"
|
|
bitfld.word 0x00 3. " DE ,Data End" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.word 0x00 2. " SNT ,Sent Stall" "Not transmitted,Transmitted"
|
|
bitfld.word 0x00 1. " TRDY ,Tx Packet Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.word 0x00 0. " RRDY ,Rx Packet Ready" "Not ready,Ready"
|
|
elif (((data.byte(asd:0x10200000+0x60))&0x04)==0x04)&&(((data.byte(asd:0x10200000+0x0e))&0x0f)==(0x01||0x02||0x03||0x04||0x05||0x06||0x07))
|
|
group.word 0x12++0x01
|
|
line.word 0x00 "OTG_TXCSR,OTG Tx Control and Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 13. " MD ,Mode" "Rx,Tx"
|
|
textline " "
|
|
bitfld.word 0x00 12. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " FDT ,Force Data Toggle" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.word 0x00 10. " DRM ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 9. " DWE ,Data Toggle Write Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " DT ,Data Toggle" "Low,High"
|
|
bitfld.word 0x00 7. " NAK ,NAK Timeout" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.word 0x00 6. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 5. " RXS ,Rx Stall" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 4. " STP ,Setup Packet" "Not sent,Sent"
|
|
bitfld.word 0x00 3. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 2. " ERR ,Error" "No error,Error"
|
|
bitfld.word 0x00 1. " FNE ,FIFO Not Empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.word 0x00 0. " TRDY ,Tx Packet Ready" "Not ready,Ready"
|
|
elif (((data.byte(asd:0x10200000+0x60))&0x04)==0x00)&&(((data.byte(asd:0x10200000+0x0e))&0x0f)==(0x01||0x02||0x03||0x04||0x05||0x06||0x07))
|
|
group.word 0x12++0x01
|
|
line.word 0x00 "OTG_TXCSR,OTG Tx Control and Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ISO ,Isochronous Transfers" "Bulk/Interrupt,Isochronous"
|
|
textline " "
|
|
bitfld.word 0x00 13. " MD ,Mode" "Rx,Tx"
|
|
bitfld.word 0x00 12. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 11. " FDT ,Force Data Toggle" "Not forced,Forced"
|
|
bitfld.word 0x00 10. " DRM ,DMA Request Mode" "Mode 0,Mode 1"
|
|
textline " "
|
|
bitfld.word 0x00 7. " ITX ,Incomplete" "Not incomplete,Incomplete"
|
|
bitfld.word 0x00 6. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 5. " STS ,Sent Stall" "Not transmitted,Transmitted"
|
|
bitfld.word 0x00 4. " SDS ,Send Stall" "Not issued,Issued"
|
|
textline " "
|
|
bitfld.word 0x00 3. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
bitfld.word 0x00 2. " UND ,Underrun" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FNE ,FIFO Not Empty" "Empty,Not empty"
|
|
bitfld.word 0x00 0. " TRDY ,Tx Packet Ready" "Not ready,Ready"
|
|
else
|
|
hgroup.word 0x12++0x01
|
|
hide.word 0x00 "OTG_TXCSR,OTG Tx Control and Status Register"
|
|
endif
|
|
if (((data.byte(asd:0x10200000+0x0e))&0x0f)==(0x01||0x02||0x03||0x04||0x05||0x06||0x07))
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "OTG_RXMAXP,OTG Rx Max Packet Size Register"
|
|
bitfld.word 0x00 11.--15. " MULT ,Multiplier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.word 0x00 0.--10. 1. " MAXP ,Maximum Payload Transmitted"
|
|
else
|
|
hgroup.word 0x14++0x01
|
|
hide.word 0x00 "OTG_RXMAXP,OTG Rx Max Packet Size Register"
|
|
endif
|
|
if (((data.byte(asd:0x10200000+0x60))&0x04)==0x04)&&(((data.byte(asd:0x10200000+0x0e))&0x0f)==(0x01||0x02||0x03||0x04||0x05||0x06||0x07))
|
|
group.word 0x16++0x01
|
|
line.word 0x00 "OTG_RXCSR,OTG Rx Control/Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ARQ ,Auto Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 13. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " DNY ,Disable NYET" "No,Yes"
|
|
textline " "
|
|
bitfld.word 0x00 11. " DMD ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 10. " DWE ,Data Toggle Write Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " DT ,Data Toggle" "Low,High"
|
|
bitfld.word 0x00 8. " IRX ,Incomp Rx" "Not incomplete,Incomplete"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 6. " RS ,Rx Stall" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 5. " RPK ,Request Packet" "Not requested,Requested"
|
|
bitfld.word 0x00 4. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 3. " DER ,Data Error/NAK Timeout" "No error,Error"
|
|
bitfld.word 0x00 2. " ER ,Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FFUL ,FIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 0. " RRDY ,Rx Packet Ready" "Not ready,Ready"
|
|
elif (((data.byte(asd:0x10200000+0x60))&0x04)==0x00)&&(((data.byte(asd:0x10200000+0x0e))&0x0f)==(0x01||0x02||0x03||0x04||0x05||0x06||0x07))
|
|
group.word 0x16++0x01
|
|
line.word 0x00 "OTG_RXCSR,OTG Rx Control/Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ISO ,ISO" "Bulk/Interrupt,Isochronous"
|
|
textline " "
|
|
bitfld.word 0x00 13. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " DNY ,Disable NYET" "No,Yes"
|
|
textline " "
|
|
bitfld.word 0x00 11. " DMD ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 8. " IRX ,Incomp Rx" "Not incomplete,Incomplete"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 6. " SNT ,Sent Stall" "Not transmitted,Transmitted"
|
|
textline " "
|
|
bitfld.word 0x00 5. " SND ,Send Stall" "Not issued,Issued"
|
|
bitfld.word 0x00 4. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 3. " FFUL ,FIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 2. " ERR ,Data Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " OR ,Overrun" "Not overrun,Overrun"
|
|
bitfld.word 0x00 0. " RRDY ,Rx Packet Ready" "Not ready,Ready"
|
|
else
|
|
hgroup.word 0x16++0x01
|
|
hide.word 0x00 "OTG_RXCSR,OTG Rx Control/Status Register"
|
|
endif
|
|
if (((data.word(asd:0x10200000+0x16))&0x01)==0x01)&&(((data.byte(asd:0x10200000+0x0e))&0x0f)==(0x01||0x02||0x03||0x04||0x05||0x06||0x07))
|
|
rgroup.word 0x18++0x01
|
|
line.word 0x00 "OTG_RXCNT,OTG Rx Bytes Received Counter"
|
|
hexmask.word 0x00 0.--12. 1. " RXCNT ,Endpoint Rx Count"
|
|
elif (((data.byte(asd:0x10200000+0x0e))&0x0f)==0x00)
|
|
rgroup.word 0x18++0x01
|
|
line.word 0x00 "OTG_COUNT0,OTG EP0 Bytes Received Counter"
|
|
hexmask.word.byte 0x00 0.--6. 1. " RXCNT0 ,EP0 Bytes Received"
|
|
else
|
|
hgroup.word 0x18++0x01
|
|
hide.word 0x00 "OTG_RXCNT,OTG Rx Bytes Received Counter"
|
|
endif
|
|
if (((data.byte(asd:0x10200000+0x60))&0x04)==0x04)&&(((data.byte(asd:0x10200000+0x0e))&0x0f)==(0x01||0x02||0x03||0x04||0x05||0x06||0x07))
|
|
group.byte 0x1a++0x03
|
|
line.byte 0x00 "OTG_TXTYPE,OTG Tx Transaction Control Register"
|
|
bitfld.byte 0x00 6.--7. " SPEED ,Operating Speed" "Reserved,High,Full,Low"
|
|
bitfld.byte 0x00 4.--5. " PROT ,Protocol" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--3. " EP ,Target Endpoint Number" "Ep 0,Ep 1,Ep 2,Ep 3,Ep 4,Ep 5,Ep 6,Ep 7,?..."
|
|
line.byte 0x01 "OTG_TXINTV,OTG Tx Polling Interval Register"
|
|
line.byte 0x02 "OTG_RXTYPE,OTG Rx Transaction Control Register"
|
|
bitfld.byte 0x02 6.--7. " SPEED ,Operating Speed" "Reserved,High,Full,Low"
|
|
bitfld.byte 0x02 4.--5. " PROT ,Protocol" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x02 0.--3. " EP ,Target Endpoint Number" "Ep 0,Ep 1,Ep 2,Ep 3,Ep 4,Ep 5,Ep 6,Ep 7,?..."
|
|
line.byte 0x03 "OTG_RXINTV,OTG Rx Polling Interval Register"
|
|
elif (((data.byte(asd:0x10200000+0x60))&0x04)==0x04)&&(((data.byte(asd:0x10200000+0x0e))&0x0f)==0x00)
|
|
group.byte 0x1a++0x01
|
|
line.byte 0x00 "OTG_TYPE0,OTG EP0 Speed Control Register"
|
|
bitfld.byte 0x00 6.--7. " SPEED ,Operating Speed" "Reserved,High,Full,Low"
|
|
line.byte 0x01 "OTG_NAKLIMIT0,OTG EP0 NAK Response Register"
|
|
hexmask.byte 0x01 0.--4. 1. " NAKLIMIT ,Frames to NAK"
|
|
hgroup.byte 0x1c++0x00
|
|
hide.byte 0x00 "OTG_RXTYPE,OTG Rx Transaction Control Register"
|
|
hgroup.byte 0x1d++0x00
|
|
hide.byte 0x00 "OTG_RXINTV,OTG Rx Polling Interval Register"
|
|
else
|
|
hgroup.byte 0x1a++0x00
|
|
hide.byte 0x00 "OTG_TXTYPE,OTG Tx Transaction Control Register"
|
|
hgroup.byte 0x1b++0x00
|
|
hide.byte 0x00 "OTG_TXINTV,OTG Tx Polling Interval Register"
|
|
hgroup.byte 0x1c++0x00
|
|
hide.byte 0x00 "OTG_RXTYPE,OTG Rx Transaction Control Register"
|
|
hgroup.byte 0x1d++0x00
|
|
hide.byte 0x00 "OTG_RXINTV,OTG Rx Polling Interval Register"
|
|
endif
|
|
if (((data.byte(asd:0x10200000+0x0e))&0x0f)==0x00)
|
|
rgroup.byte 0x1f++0x00
|
|
line.byte 0x00 "OTG_CFD,OTG Core Configuration Register"
|
|
bitfld.byte 0x00 7. " MPRXE ,Bulk Pkt Amalgamation" "Not selected,Selected"
|
|
bitfld.byte 0x00 6. " MPTXE ,Bulk Pkt Splitting" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " BE ,Big Endian" "Not selected,Selected"
|
|
bitfld.byte 0x00 4. " HBRXE ,High-Bandwith ISO Support" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " HBTXE ,High-Bandwith ISO Support" "Not selected,Selected"
|
|
bitfld.byte 0x00 2. " DYNF ,Dynamic FIFO Sizing" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " SC ,Soft Connect" "Not selected,Selected"
|
|
bitfld.byte 0x00 0. " UDI ,UTMI Data Width" "8 bits,16 bits"
|
|
else
|
|
hgroup.byte 0x1f++0x00
|
|
hide.byte 0x00 "OTG_CFD,OTG Core Configuration Register"
|
|
endif
|
|
tree "FIFOS"
|
|
hgroup.long 0x20++0x03
|
|
hide.long 0x00 "FIFO_0,Fifo for Endpoint 0"
|
|
in
|
|
hgroup.long 0x24++0x03
|
|
hide.long 0x00 "FIFO_1,Fifo for Endpoint 1"
|
|
in
|
|
hgroup.long 0x28++0x03
|
|
hide.long 0x00 "FIFO_2,Fifo for Endpoint 2"
|
|
in
|
|
hgroup.long 0x2c++0x03
|
|
hide.long 0x00 "FIFO_3,Fifo for Endpoint 3"
|
|
in
|
|
hgroup.long 0x30++0x03
|
|
hide.long 0x00 "FIFO_4,Fifo for Endpoint 4"
|
|
in
|
|
hgroup.long 0x34++0x03
|
|
hide.long 0x00 "FIFO_5,Fifo for Endpoint 5"
|
|
in
|
|
hgroup.long 0x38++0x03
|
|
hide.long 0x00 "FIFO_6,Fifo for Endpoint 6"
|
|
in
|
|
hgroup.long 0x3c++0x03
|
|
hide.long 0x00 "FIFO_7,Fifo for Endpoint 7"
|
|
in
|
|
tree.end
|
|
if (((data.byte(asd:0x10200000+0x60))&0x84)==0x04)
|
|
group.byte 0x60++0x00 "Dynamic Fifo Control Registers"
|
|
line.byte 0x00 "OTG_DEVCTL,OTG Device Control Register"
|
|
bitfld.byte 0x00 7. " BDEV ,B-Device" "A-Device,B-Device"
|
|
bitfld.byte 0x00 6. " FSDEV ,Full Speed" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " LSDEV ,Low Speed" "Not detected,Detected"
|
|
bitfld.byte 0x00 3.--4. " VBUS ,BUS" "Below SessionEnd,Above SessionEnd/below AValid,Above AValid/below VBusValid,Above VBusValid"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " HOST ,Host Mode" "Device,Host"
|
|
bitfld.byte 0x00 0. " SESS ,Session" "Ended,Started"
|
|
elif (((data.byte(asd:0x10200000+0x60))&0x84)==0x84)
|
|
group.byte 0x60++0x00 "Dynamic Fifo Control Registers"
|
|
line.byte 0x00 "OTG_DEVCTL,OTG Device Control Register"
|
|
bitfld.byte 0x00 7. " BDEV ,B-Device" "A-Device,B-Device"
|
|
bitfld.byte 0x00 6. " FFSDEV ,Full Speed" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " LSDEV ,Low Speed" "Not detected,Detected"
|
|
bitfld.byte 0x00 3.--4. " VBUS ,BUS" "Below SessionEnd,Above SessionEnd/below AValid,Above AValid/below VBusValid,Above VBusValid"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " HOST ,Host Mode" "Device,Host"
|
|
bitfld.byte 0x00 1. " HREQ ,Host Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " SESS ,Session" "Ended,Started"
|
|
elif (((data.byte(asd:0x10200000+0x60))&0x84)==0x00)
|
|
group.byte 0x60++0x00 "Dynamic Fifo Control Registers"
|
|
line.byte 0x00 "OTG_DEVCTL,OTG Device Control Register"
|
|
bitfld.byte 0x00 7. " BDEV ,B-Device" "A-Device,B-Device"
|
|
bitfld.byte 0x00 3.--4. " VBUS ,BUS" "Below SessionEnd,Above SessionEnd/below AValid,Above AValid/below VBusValid,Above VBusValid"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " HOST ,Host Mode" "Device,Host"
|
|
bitfld.byte 0x00 0. " SESS ,Session" "Ended,Started"
|
|
else
|
|
group.byte 0x60++0x00 "Dynamic Fifo Control Registers"
|
|
line.byte 0x00 "OTG_DEVCTL,OTG Device Control Register"
|
|
bitfld.byte 0x00 7. " BDEV ,B-Device" "A-Device,B-Device"
|
|
bitfld.byte 0x00 3.--4. " VBUS ,BUS" "Below SessionEnd,Above SessionEnd/below AValid,Above AValid/below VBusValid,Above VBusValid"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " HOST ,Host Mode" "Device,Host"
|
|
bitfld.byte 0x00 1. " HREQ ,Host Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " SESS ,Session" "Ended,Started"
|
|
endif
|
|
group.byte 0x62++0x01
|
|
line.byte 0x00 "OTG_TXFSZ,OTG Tx FIFO Size Register"
|
|
bitfld.byte 0x00 4. " DPB ,Double Packet Buffering" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0.--3. " TXSIZE ,Endpoint Tx FIFO Size" "8,16,32,64,128,256,512,1024,2048,4096,?..."
|
|
line.byte 0x01 "OTG_RXFSZ,OTG Rx FIFO Size Register"
|
|
bitfld.byte 0x01 4. " DPB ,Double Packet Buffering" "Disabled,Enabled"
|
|
bitfld.byte 0x01 0.--3. " RXSIZE ,Endpoint Rx FIFO Size" "8,16,32,64,128,256,512,1024,2048,4096,?..."
|
|
group.word 0x64++0x03
|
|
line.word 0x00 "OTG_TXFA,OTG Tx FIFO Address Register"
|
|
hexmask.word 0x00 0.--12. 1. " AD ,FIFO Start Address"
|
|
line.word 0x02 "OTG_RXFA,OTG Rx FIFO Address Register"
|
|
hexmask.word 0x02 0.--12. 1. " AD ,FIFO Start Address"
|
|
if (((data.byte(asd:0x10200000+0x60))&0x04)==0x04)
|
|
wgroup.long 0x68++0x03
|
|
line.long 0x00 "OTG_VCNTL,OTG VControl Register"
|
|
else
|
|
hgroup.long 0x68++0x03
|
|
hide.long 0x00 "OTG_VCNTL,OTG VControl Register"
|
|
endif
|
|
rgroup.word 0x6c++0x01
|
|
line.word 0x00 "OTG_HWVER,OTG Hardware Version Number Register"
|
|
hexmask.word.byte 0x00 10.--14. 1. " VMAJ ,Major Version number"
|
|
hexmask.word 0x00 0.--9. 1. " VMIN ,Minor Version number"
|
|
rgroup.byte 0x78++0x01 "Additional Configuration Registers"
|
|
line.byte 0x00 "OTG_EPINFO,OTG EP Info Register"
|
|
bitfld.byte 0x00 4.--7. " RX_EP ,The Number of Receive Endpoints" "EP 0,EP 1,EP 2,EP 3,EP 4,EP 5,EP 6,EP 7,?..."
|
|
bitfld.byte 0x00 0.--3. " TX_EP ,The Number of Transmit Endpoints" "EP 0,EP 1,EP 2,EP 3,EP 4,EP 5,EP 6,EP 7,?..."
|
|
line.byte 0x01 "OTG_RAMINFO,OTG RAM Info Register"
|
|
bitfld.byte 0x01 4.--7. " DMA_CH ,The Number of DMA Channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.byte 0x01 0.--3. " RAM_BITS ,The width of the RAM Data bus" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.byte 0x7a++0x04
|
|
line.byte 0x00 "OTG_LINKINFO,OTG Link Info Register"
|
|
bitfld.byte 0x00 4.--7. " WTCON ,Connect/Disconnect Delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.byte 0x00 0.--3. " WTID ,ID Pullup Delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.byte 0x01 "OTG_VPLEN,OTG VPLEN Register"
|
|
line.byte 0x02 "OTG_HSEOF1,OTG HS Time Buffer Register"
|
|
line.byte 0x03 "OTG_FSEOF1,OTG FS Time Buffer Register"
|
|
line.byte 0x04 "OTG_LSEOF1,OTG LS Time Buffer Register"
|
|
if (((data.byte(asd:0x10200000+0x60))&0x04)==0x04)
|
|
group.byte 0x80++0x00 "Target Address Registers"
|
|
line.byte 0x00 "OTG_TX0FAD,OTG Tx Function Address Register 0"
|
|
hexmask.byte 0x00 0.--6. 1. " ADTF ,Address of Target Function"
|
|
group.byte (0x80+0x02)++0x01
|
|
line.byte 0x00 "OTG_TX0HAD,OTG Tx Hub Address Register 0"
|
|
bitfld.byte 0x00 7. " MLT ,Multiple Translators" "Single,Multiple"
|
|
hexmask.byte 0x00 0.--6. 1. " HUBAD ,Hub Address"
|
|
line.byte 0x01 "OTG_TX0HP,OTG Tx Hub Port Register 0"
|
|
hexmask.byte 0x01 0.--6. 1. " HUBPORT ,HUB port number"
|
|
group.byte (0x80+0x04)++0x00
|
|
line.byte 0x00 "OTG_RX0FAD,OTG Rx Function Address Register 0"
|
|
hexmask.byte 0x00 0.--6. 1. " ADTF ,Address of Target Function"
|
|
group.byte (0x80+0x06)++0x01
|
|
line.byte 0x00 "OTG_RX0HAD,OTG Rx Hub Address Register 0"
|
|
bitfld.byte 0x00 7. " MLT ,Multiple Translators" "Single,Multiple"
|
|
hexmask.byte 0x00 0.--6. 1. " HUBAD ,Hub Address"
|
|
line.byte 0x01 "OTG_RX0HP,OTG Rx Hub Port Register 0"
|
|
hexmask.byte 0x01 0.--6. 1. " HUBPORT ,HUB port number"
|
|
group.byte 0x88++0x00
|
|
line.byte 0x00 "OTG_TX1FAD,OTG Tx Function Address Register 1"
|
|
hexmask.byte 0x00 0.--6. 1. " ADTF ,Address of Target Function"
|
|
group.byte (0x88+0x02)++0x01
|
|
line.byte 0x00 "OTG_TX1HAD,OTG Tx Hub Address Register 1"
|
|
bitfld.byte 0x00 7. " MLT ,Multiple Translators" "Single,Multiple"
|
|
hexmask.byte 0x00 0.--6. 1. " HUBAD ,Hub Address"
|
|
line.byte 0x01 "OTG_TX1HP,OTG Tx Hub Port Register 1"
|
|
hexmask.byte 0x01 0.--6. 1. " HUBPORT ,HUB port number"
|
|
group.byte (0x88+0x04)++0x00
|
|
line.byte 0x00 "OTG_RX1FAD,OTG Rx Function Address Register 1"
|
|
hexmask.byte 0x00 0.--6. 1. " ADTF ,Address of Target Function"
|
|
group.byte (0x88+0x06)++0x01
|
|
line.byte 0x00 "OTG_RX1HAD,OTG Rx Hub Address Register 1"
|
|
bitfld.byte 0x00 7. " MLT ,Multiple Translators" "Single,Multiple"
|
|
hexmask.byte 0x00 0.--6. 1. " HUBAD ,Hub Address"
|
|
line.byte 0x01 "OTG_RX1HP,OTG Rx Hub Port Register 1"
|
|
hexmask.byte 0x01 0.--6. 1. " HUBPORT ,HUB port number"
|
|
group.byte 0x90++0x00
|
|
line.byte 0x00 "OTG_TX2FAD,OTG Tx Function Address Register 2"
|
|
hexmask.byte 0x00 0.--6. 1. " ADTF ,Address of Target Function"
|
|
group.byte (0x90+0x02)++0x01
|
|
line.byte 0x00 "OTG_TX2HAD,OTG Tx Hub Address Register 2"
|
|
bitfld.byte 0x00 7. " MLT ,Multiple Translators" "Single,Multiple"
|
|
hexmask.byte 0x00 0.--6. 1. " HUBAD ,Hub Address"
|
|
line.byte 0x01 "OTG_TX2HP,OTG Tx Hub Port Register 2"
|
|
hexmask.byte 0x01 0.--6. 1. " HUBPORT ,HUB port number"
|
|
group.byte (0x90+0x04)++0x00
|
|
line.byte 0x00 "OTG_RX2FAD,OTG Rx Function Address Register 2"
|
|
hexmask.byte 0x00 0.--6. 1. " ADTF ,Address of Target Function"
|
|
group.byte (0x90+0x06)++0x01
|
|
line.byte 0x00 "OTG_RX2HAD,OTG Rx Hub Address Register 2"
|
|
bitfld.byte 0x00 7. " MLT ,Multiple Translators" "Single,Multiple"
|
|
hexmask.byte 0x00 0.--6. 1. " HUBAD ,Hub Address"
|
|
line.byte 0x01 "OTG_RX2HP,OTG Rx Hub Port Register 2"
|
|
hexmask.byte 0x01 0.--6. 1. " HUBPORT ,HUB port number"
|
|
group.byte 0x98++0x00
|
|
line.byte 0x00 "OTG_TX3FAD,OTG Tx Function Address Register 3"
|
|
hexmask.byte 0x00 0.--6. 1. " ADTF ,Address of Target Function"
|
|
group.byte (0x98+0x02)++0x01
|
|
line.byte 0x00 "OTG_TX3HAD,OTG Tx Hub Address Register 3"
|
|
bitfld.byte 0x00 7. " MLT ,Multiple Translators" "Single,Multiple"
|
|
hexmask.byte 0x00 0.--6. 1. " HUBAD ,Hub Address"
|
|
line.byte 0x01 "OTG_TX3HP,OTG Tx Hub Port Register 3"
|
|
hexmask.byte 0x01 0.--6. 1. " HUBPORT ,HUB port number"
|
|
group.byte (0x98+0x04)++0x00
|
|
line.byte 0x00 "OTG_RX3FAD,OTG Rx Function Address Register 3"
|
|
hexmask.byte 0x00 0.--6. 1. " ADTF ,Address of Target Function"
|
|
group.byte (0x98+0x06)++0x01
|
|
line.byte 0x00 "OTG_RX3HAD,OTG Rx Hub Address Register 3"
|
|
bitfld.byte 0x00 7. " MLT ,Multiple Translators" "Single,Multiple"
|
|
hexmask.byte 0x00 0.--6. 1. " HUBAD ,Hub Address"
|
|
line.byte 0x01 "OTG_RX3HP,OTG Rx Hub Port Register 3"
|
|
hexmask.byte 0x01 0.--6. 1. " HUBPORT ,HUB port number"
|
|
group.byte 0xA0++0x00
|
|
line.byte 0x00 "OTG_TX4FAD,OTG Tx Function Address Register 4"
|
|
hexmask.byte 0x00 0.--6. 1. " ADTF ,Address of Target Function"
|
|
group.byte (0xA0+0x02)++0x01
|
|
line.byte 0x00 "OTG_TX4HAD,OTG Tx Hub Address Register 4"
|
|
bitfld.byte 0x00 7. " MLT ,Multiple Translators" "Single,Multiple"
|
|
hexmask.byte 0x00 0.--6. 1. " HUBAD ,Hub Address"
|
|
line.byte 0x01 "OTG_TX4HP,OTG Tx Hub Port Register 4"
|
|
hexmask.byte 0x01 0.--6. 1. " HUBPORT ,HUB port number"
|
|
group.byte (0xA0+0x04)++0x00
|
|
line.byte 0x00 "OTG_RX4FAD,OTG Rx Function Address Register 4"
|
|
hexmask.byte 0x00 0.--6. 1. " ADTF ,Address of Target Function"
|
|
group.byte (0xA0+0x06)++0x01
|
|
line.byte 0x00 "OTG_RX4HAD,OTG Rx Hub Address Register 4"
|
|
bitfld.byte 0x00 7. " MLT ,Multiple Translators" "Single,Multiple"
|
|
hexmask.byte 0x00 0.--6. 1. " HUBAD ,Hub Address"
|
|
line.byte 0x01 "OTG_RX4HP,OTG Rx Hub Port Register 4"
|
|
hexmask.byte 0x01 0.--6. 1. " HUBPORT ,HUB port number"
|
|
group.byte 0xA8++0x00
|
|
line.byte 0x00 "OTG_TX5FAD,OTG Tx Function Address Register 5"
|
|
hexmask.byte 0x00 0.--6. 1. " ADTF ,Address of Target Function"
|
|
group.byte (0xA8+0x02)++0x01
|
|
line.byte 0x00 "OTG_TX5HAD,OTG Tx Hub Address Register 5"
|
|
bitfld.byte 0x00 7. " MLT ,Multiple Translators" "Single,Multiple"
|
|
hexmask.byte 0x00 0.--6. 1. " HUBAD ,Hub Address"
|
|
line.byte 0x01 "OTG_TX5HP,OTG Tx Hub Port Register 5"
|
|
hexmask.byte 0x01 0.--6. 1. " HUBPORT ,HUB port number"
|
|
group.byte (0xA8+0x04)++0x00
|
|
line.byte 0x00 "OTG_RX5FAD,OTG Rx Function Address Register 5"
|
|
hexmask.byte 0x00 0.--6. 1. " ADTF ,Address of Target Function"
|
|
group.byte (0xA8+0x06)++0x01
|
|
line.byte 0x00 "OTG_RX5HAD,OTG Rx Hub Address Register 5"
|
|
bitfld.byte 0x00 7. " MLT ,Multiple Translators" "Single,Multiple"
|
|
hexmask.byte 0x00 0.--6. 1. " HUBAD ,Hub Address"
|
|
line.byte 0x01 "OTG_RX5HP,OTG Rx Hub Port Register 5"
|
|
hexmask.byte 0x01 0.--6. 1. " HUBPORT ,HUB port number"
|
|
group.byte 0xB0++0x00
|
|
line.byte 0x00 "OTG_TX6FAD,OTG Tx Function Address Register 6"
|
|
hexmask.byte 0x00 0.--6. 1. " ADTF ,Address of Target Function"
|
|
group.byte (0xB0+0x02)++0x01
|
|
line.byte 0x00 "OTG_TX6HAD,OTG Tx Hub Address Register 6"
|
|
bitfld.byte 0x00 7. " MLT ,Multiple Translators" "Single,Multiple"
|
|
hexmask.byte 0x00 0.--6. 1. " HUBAD ,Hub Address"
|
|
line.byte 0x01 "OTG_TX6HP,OTG Tx Hub Port Register 6"
|
|
hexmask.byte 0x01 0.--6. 1. " HUBPORT ,HUB port number"
|
|
group.byte (0xB0+0x04)++0x00
|
|
line.byte 0x00 "OTG_RX6FAD,OTG Rx Function Address Register 6"
|
|
hexmask.byte 0x00 0.--6. 1. " ADTF ,Address of Target Function"
|
|
group.byte (0xB0+0x06)++0x01
|
|
line.byte 0x00 "OTG_RX6HAD,OTG Rx Hub Address Register 6"
|
|
bitfld.byte 0x00 7. " MLT ,Multiple Translators" "Single,Multiple"
|
|
hexmask.byte 0x00 0.--6. 1. " HUBAD ,Hub Address"
|
|
line.byte 0x01 "OTG_RX6HP,OTG Rx Hub Port Register 6"
|
|
hexmask.byte 0x01 0.--6. 1. " HUBPORT ,HUB port number"
|
|
group.byte 0xB8++0x00
|
|
line.byte 0x00 "OTG_TX7FAD,OTG Tx Function Address Register 7"
|
|
hexmask.byte 0x00 0.--6. 1. " ADTF ,Address of Target Function"
|
|
group.byte (0xB8+0x02)++0x01
|
|
line.byte 0x00 "OTG_TX7HAD,OTG Tx Hub Address Register 7"
|
|
bitfld.byte 0x00 7. " MLT ,Multiple Translators" "Single,Multiple"
|
|
hexmask.byte 0x00 0.--6. 1. " HUBAD ,Hub Address"
|
|
line.byte 0x01 "OTG_TX7HP,OTG Tx Hub Port Register 7"
|
|
hexmask.byte 0x01 0.--6. 1. " HUBPORT ,HUB port number"
|
|
group.byte (0xB8+0x04)++0x00
|
|
line.byte 0x00 "OTG_RX7FAD,OTG Rx Function Address Register 7"
|
|
hexmask.byte 0x00 0.--6. 1. " ADTF ,Address of Target Function"
|
|
group.byte (0xB8+0x06)++0x01
|
|
line.byte 0x00 "OTG_RX7HAD,OTG Rx Hub Address Register 7"
|
|
bitfld.byte 0x00 7. " MLT ,Multiple Translators" "Single,Multiple"
|
|
hexmask.byte 0x00 0.--6. 1. " HUBAD ,Hub Address"
|
|
line.byte 0x01 "OTG_RX7HP,OTG Rx Hub Port Register 7"
|
|
hexmask.byte 0x01 0.--6. 1. " HUBPORT ,HUB port number"
|
|
else
|
|
hgroup.byte 0x80++0x00 "Target Address Registers"
|
|
hide.byte 0x00 "OTG_TX0FAD,OTG Tx Function Address Register 0"
|
|
hgroup.byte (0x80+0x02)++0x01
|
|
hide.byte 0x00 "OTG_TX0HAD,OTG Tx Hub Address Register 0"
|
|
hide.byte 0x01 "OTG_TX0HP,OTG Tx Hub Port Register 0"
|
|
hgroup.byte (0x80+0x04)++0x00
|
|
hide.byte 0x00 "OTG_RX0FAD,OTG Rx Function Address Register 0"
|
|
hgroup.byte (0x80+0x06)++0x01
|
|
hide.byte 0x00 "OTG_RX0HAD,OTG Rx Hub Address Register 0"
|
|
hide.byte 0x01 "OTG_TX0HP,OTG Tx Hub Port Register 0"
|
|
hgroup.byte 0x88++0x00
|
|
hide.byte 0x00 "OTG_TX1FAD,OTG Tx Function Address Register 1"
|
|
hgroup.byte (0x88+0x02)++0x01
|
|
hide.byte 0x00 "OTG_TX1HAD,OTG Tx Hub Address Register 1"
|
|
hide.byte 0x01 "OTG_TX1HP,OTG Tx Hub Port Register 1"
|
|
hgroup.byte (0x88+0x04)++0x00
|
|
hide.byte 0x00 "OTG_RX1FAD,OTG Rx Function Address Register 1"
|
|
hgroup.byte (0x88+0x06)++0x01
|
|
hide.byte 0x00 "OTG_RX1HAD,OTG Rx Hub Address Register 1"
|
|
hide.byte 0x01 "OTG_TX1HP,OTG Tx Hub Port Register 1"
|
|
hgroup.byte 0x90++0x00
|
|
hide.byte 0x00 "OTG_TX2FAD,OTG Tx Function Address Register 2"
|
|
hgroup.byte (0x90+0x02)++0x01
|
|
hide.byte 0x00 "OTG_TX2HAD,OTG Tx Hub Address Register 2"
|
|
hide.byte 0x01 "OTG_TX2HP,OTG Tx Hub Port Register 2"
|
|
hgroup.byte (0x90+0x04)++0x00
|
|
hide.byte 0x00 "OTG_RX2FAD,OTG Rx Function Address Register 2"
|
|
hgroup.byte (0x90+0x06)++0x01
|
|
hide.byte 0x00 "OTG_RX2HAD,OTG Rx Hub Address Register 2"
|
|
hide.byte 0x01 "OTG_TX2HP,OTG Tx Hub Port Register 2"
|
|
hgroup.byte 0x98++0x00
|
|
hide.byte 0x00 "OTG_TX3FAD,OTG Tx Function Address Register 3"
|
|
hgroup.byte (0x98+0x02)++0x01
|
|
hide.byte 0x00 "OTG_TX3HAD,OTG Tx Hub Address Register 3"
|
|
hide.byte 0x01 "OTG_TX3HP,OTG Tx Hub Port Register 3"
|
|
hgroup.byte (0x98+0x04)++0x00
|
|
hide.byte 0x00 "OTG_RX3FAD,OTG Rx Function Address Register 3"
|
|
hgroup.byte (0x98+0x06)++0x01
|
|
hide.byte 0x00 "OTG_RX3HAD,OTG Rx Hub Address Register 3"
|
|
hide.byte 0x01 "OTG_TX3HP,OTG Tx Hub Port Register 3"
|
|
hgroup.byte 0xA0++0x00
|
|
hide.byte 0x00 "OTG_TX4FAD,OTG Tx Function Address Register 4"
|
|
hgroup.byte (0xA0+0x02)++0x01
|
|
hide.byte 0x00 "OTG_TX4HAD,OTG Tx Hub Address Register 4"
|
|
hide.byte 0x01 "OTG_TX4HP,OTG Tx Hub Port Register 4"
|
|
hgroup.byte (0xA0+0x04)++0x00
|
|
hide.byte 0x00 "OTG_RX4FAD,OTG Rx Function Address Register 4"
|
|
hgroup.byte (0xA0+0x06)++0x01
|
|
hide.byte 0x00 "OTG_RX4HAD,OTG Rx Hub Address Register 4"
|
|
hide.byte 0x01 "OTG_TX4HP,OTG Tx Hub Port Register 4"
|
|
hgroup.byte 0xA8++0x00
|
|
hide.byte 0x00 "OTG_TX5FAD,OTG Tx Function Address Register 5"
|
|
hgroup.byte (0xA8+0x02)++0x01
|
|
hide.byte 0x00 "OTG_TX5HAD,OTG Tx Hub Address Register 5"
|
|
hide.byte 0x01 "OTG_TX5HP,OTG Tx Hub Port Register 5"
|
|
hgroup.byte (0xA8+0x04)++0x00
|
|
hide.byte 0x00 "OTG_RX5FAD,OTG Rx Function Address Register 5"
|
|
hgroup.byte (0xA8+0x06)++0x01
|
|
hide.byte 0x00 "OTG_RX5HAD,OTG Rx Hub Address Register 5"
|
|
hide.byte 0x01 "OTG_TX5HP,OTG Tx Hub Port Register 5"
|
|
hgroup.byte 0xB0++0x00
|
|
hide.byte 0x00 "OTG_TX6FAD,OTG Tx Function Address Register 6"
|
|
hgroup.byte (0xB0+0x02)++0x01
|
|
hide.byte 0x00 "OTG_TX6HAD,OTG Tx Hub Address Register 6"
|
|
hide.byte 0x01 "OTG_TX6HP,OTG Tx Hub Port Register 6"
|
|
hgroup.byte (0xB0+0x04)++0x00
|
|
hide.byte 0x00 "OTG_RX6FAD,OTG Rx Function Address Register 6"
|
|
hgroup.byte (0xB0+0x06)++0x01
|
|
hide.byte 0x00 "OTG_RX6HAD,OTG Rx Hub Address Register 6"
|
|
hide.byte 0x01 "OTG_TX6HP,OTG Tx Hub Port Register 6"
|
|
hgroup.byte 0xB8++0x00
|
|
hide.byte 0x00 "OTG_TX7FAD,OTG Tx Function Address Register 7"
|
|
hgroup.byte (0xB8+0x02)++0x01
|
|
hide.byte 0x00 "OTG_TX7HAD,OTG Tx Hub Address Register 7"
|
|
hide.byte 0x01 "OTG_TX7HP,OTG Tx Hub Port Register 7"
|
|
hgroup.byte (0xB8+0x04)++0x00
|
|
hide.byte 0x00 "OTG_RX7FAD,OTG Rx Function Address Register 7"
|
|
hgroup.byte (0xB8+0x06)++0x01
|
|
hide.byte 0x00 "OTG_RX7HAD,OTG Rx Hub Address Register 7"
|
|
hide.byte 0x01 "OTG_TX7HP,OTG Tx Hub Port Register 7"
|
|
endif
|
|
tree "Endpoint 0-7 Registers"
|
|
if (((data.byte(asd:0x10200000+0x60))&0x04)==0x04)
|
|
group.word 0x102++0x01 "Endpoint 0 Registers"
|
|
line.word 0x00 "OTG_CSR0,OTG EP0 Control and Status Register"
|
|
bitfld.word 0x00 11. " DPNG ,Disable Ping" "No,Yes"
|
|
bitfld.word 0x00 10. " DWE ,Data Toggle Write Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " DT ,Data Toggle" "Low,High"
|
|
bitfld.word 0x00 8. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 7. " NAK ,NAK Timeout" "Not halted,Halted"
|
|
bitfld.word 0x00 6. " STPK ,Status Packet" "Not performed,Performed"
|
|
textline " "
|
|
bitfld.word 0x00 5. " RPK ,Request Packet" "Not requested,Requested"
|
|
bitfld.word 0x00 4. " ERR ,Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 3. " STP ,Setup Packet" "Not sent,Sent"
|
|
bitfld.word 0x00 2. " RXS ,Receive Stall" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 1. " TRDY ,Tx Packet Ready" "Not ready,Ready"
|
|
bitfld.word 0x00 0. " RRDY ,Rx Packet Ready" "Not ready,Ready"
|
|
else
|
|
group.word 0x102++0x01 "Endpoint 0 Registers"
|
|
line.word 0x00 "OTG_CSR0,OTG EP0 Control and Status Register"
|
|
bitfld.word 0x00 8. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
bitfld.word 0x00 7. " SSE ,Serviced Setup End" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 6. " SRDY ,Serviced Rx Packet Ready" "No effect,Cleared"
|
|
bitfld.word 0x00 5. " SND ,Send Stall" "Not terminated,Terminated"
|
|
textline " "
|
|
bitfld.word 0x00 4. " STE ,Setup End" "Not ended,Ended"
|
|
bitfld.word 0x00 3. " DE ,Data End" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.word 0x00 2. " SNT ,Sent Stall" "Not transmitted,Transmitted"
|
|
bitfld.word 0x00 1. " TRDY ,Tx Packet Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.word 0x00 0. " RRDY ,Rx Packet Ready" "Not ready,Ready"
|
|
endif
|
|
rgroup.word 0x108++0x01
|
|
line.word 0x00 "OTG_COUNT0,OTG EP0 Bytes Received Counter"
|
|
hexmask.word.byte 0x00 0.--6. 1. " RXCNT0 ,EP0 Bytes Received"
|
|
if (((data.byte(asd:0x10200000+0x60))&0x04)==0x04)
|
|
group.byte 0x10a++0x01
|
|
line.byte 0x00 "OTG_TYPE0,OTG EP0 Speed Control Register"
|
|
bitfld.byte 0x00 6.--7. " SPEED ,Operating Speed" "Reserved,High,Full,Low"
|
|
line.byte 0x01 "OTG_NAKLIMIT0,OTG EP0 NAK Response Register"
|
|
hexmask.byte 0x01 0.--4. 1. " NAKLIMIT ,Frames to NAK"
|
|
else
|
|
hgroup.byte 0x10a++0x01
|
|
hide.byte 0x00 "OTG_TYPE0,OTG EP0 Speed Control Register"
|
|
hide.byte 0x01 "OTG_NAKLIMIT0,OTG EP0 NAK Response Register"
|
|
endif
|
|
rgroup.byte 0x10f++0x00
|
|
line.byte 0x00 "OTG_CFD,OTG Core Configuration Register"
|
|
bitfld.byte 0x00 7. " MPRXE ,Bulk Pkt Amalgamation" "Not selected,Selected"
|
|
bitfld.byte 0x00 6. " MPTXE ,Bulk Pkt Splitting" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " BE ,Big Endian" "Not selected,Selected"
|
|
bitfld.byte 0x00 4. " HBRXE ,High-Bandwith ISO Support" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " HBTXE ,High-Bandwith ISO Support" "Not selected,Selected"
|
|
bitfld.byte 0x00 2. " DYNF ,Dynamic FIFO Sizing" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " SC ,Soft Connect" "Not selected,Selected"
|
|
bitfld.byte 0x00 0. " UDI ,UTMI Data Width" "8 bits,16 bits"
|
|
group.word 0x110++0x01 "Endpoint 1 Registers"
|
|
line.word 0x00 "OTG_TXMAXP,OTG Tx Max Packet Size Register"
|
|
bitfld.word 0x00 11.--15. " MULT ,Multiplier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.word 0x00 0.--10. 1. " MAXP ,Maximum Payload Transmitted"
|
|
if (((data.byte(asd:0x10200000+0x60))&0x04)==0x04)
|
|
group.word (0x110+0x02)++0x01
|
|
line.word 0x00 "OTG_TXCSR,OTG Tx Control and Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 13. " MD ,Mode" "Rx,Tx"
|
|
textline " "
|
|
bitfld.word 0x00 12. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " FDT ,Force Data Toggle" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.word 0x00 10. " DRM ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 9. " DWE ,Data Toggle Write Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " DT ,Data Toggle" "Low,High"
|
|
bitfld.word 0x00 7. " NAK ,NAK Timeout" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.word 0x00 6. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 5. " RXS ,Rx Stall" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 4. " STP ,Setup Packet" "Not sent,Sent"
|
|
bitfld.word 0x00 3. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 2. " ERR ,Error" "No error,Error"
|
|
bitfld.word 0x00 1. " FNE ,FIFO Not Empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.word 0x00 0. " TRDY ,Tx Packet Ready" "Not ready,Ready"
|
|
else
|
|
group.word (0x110+0x02)++0x01
|
|
line.word 0x00 "OTG_TXCSR,OTG Tx Control and Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ISO ,Isochronous Transfers" "Bulk/Interrupt,Isochronous"
|
|
textline " "
|
|
bitfld.word 0x00 13. " MD ,Mode" "Rx,Tx"
|
|
bitfld.word 0x00 12. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 11. " FDT ,Force Data Toggle" "Not forced,Forced"
|
|
bitfld.word 0x00 10. " DRM ,DMA Request Mode" "Mode 0,Mode 1"
|
|
textline " "
|
|
bitfld.word 0x00 7. " ITX ,Incomplete" "Not incomplete,Incomplete"
|
|
bitfld.word 0x00 6. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 5. " STS ,Sent Stall" "Not transmitted,Transmitted"
|
|
bitfld.word 0x00 4. " SDS ,Send Stall" "Not issued,Issued"
|
|
textline " "
|
|
bitfld.word 0x00 3. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
bitfld.word 0x00 2. " UND ,Underrun" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FNE ,FIFO Not Empty" "Empty,Not empty"
|
|
bitfld.word 0x00 0. " TRDY ,Tx Packet Ready" "Not ready,Ready"
|
|
endif
|
|
group.word (0x110+0x04)++0x01
|
|
line.word 0x00 "OTG_RXMAXP,OTG Rx Max Packet Size Register"
|
|
bitfld.word 0x00 11.--15. " MULT ,Multiplier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.word 0x00 0.--10. 1. " MAXP ,Maximum Payload Transmitted"
|
|
if (((data.byte(asd:0x10200000+0x60))&0x04)==0x04)
|
|
group.word (0x110+0x06)++0x01
|
|
line.word 0x00 "OTG_RXCSR,OTG Rx Control/Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ARQ ,Auto Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 13. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " DNY ,Disable NYET" "No,Yes"
|
|
textline " "
|
|
bitfld.word 0x00 11. " DMD ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 10. " DWE ,Data Toggle Write Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " DT ,Data Toggle" "Low,High"
|
|
bitfld.word 0x00 8. " IRX ,Incomp Rx" "Not incomplete,Incomplete"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 6. " RS ,Rx Stall" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 5. " RPK ,Request Packet" "Not requested,Requested"
|
|
bitfld.word 0x00 4. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 3. " DER ,Data Error/NAK Timeout" "No error,Error"
|
|
bitfld.word 0x00 2. " ER ,Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FFUL ,FIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 0. " RRDY ,Rx Packet Ready" "Not ready,Ready"
|
|
else
|
|
group.word (0x110+0x06)++0x01
|
|
line.word 0x00 "OTG_RXCSR,OTG Rx Control/Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ISO ,ISO" "Bulk/Interrupt,Isochronous"
|
|
textline " "
|
|
bitfld.word 0x00 13. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " DNY ,Disable NYET" "No,Yes"
|
|
textline " "
|
|
bitfld.word 0x00 11. " DMD ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 8. " IRX ,Incomp Rx" "Not incomplete,Incomplete"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 6. " SNT ,Sent Stall" "Not transmitted,Transmitted"
|
|
textline " "
|
|
bitfld.word 0x00 5. " SND ,Send Stall" "Not issued,Issued"
|
|
bitfld.word 0x00 4. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 3. " FFUL ,FIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 2. " ERR ,Data Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " OR ,Overrun" "Not overrun,Overrun"
|
|
bitfld.word 0x00 0. " RRDY ,Rx Packet Ready" "Not ready,Ready"
|
|
endif
|
|
if (((data.word(asd:0x10200000+0x110+0x06))&0x01)==0x01)
|
|
rgroup.word (0x110+0x08)++0x01
|
|
line.word 0x00 "OTG_RXCNT,OTG Rx Bytes Received Counter"
|
|
hexmask.word 0x00 0.--12. 1. " RXCNT ,Endpoint Rx Count"
|
|
else
|
|
hgroup.word (0x110+0x08)++0x01
|
|
hide.word 0x00 "OTG_RXCNT,OTG Rx Bytes Received Counter"
|
|
endif
|
|
if (((data.byte(asd:0x10200000+0x60))&0x04)==0x04)
|
|
group.byte (0x110+0x0a)++0x03
|
|
line.byte 0x00 "OTG_TXTYPE,OTG Tx Transaction Control Register"
|
|
bitfld.byte 0x00 6.--7. " SPEED ,Operating Speed" "Reserved,High,Full,Low"
|
|
bitfld.byte 0x00 4.--5. " PROT ,Protocol" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--3. " EP ,Target Endpoint Number" "Ep 0,Ep 1,Ep 2,Ep 3,Ep 4,Ep 5,Ep 6,Ep 7,?..."
|
|
line.byte 0x01 "OTG_TXINTV,OTG Tx Polling Interval Register"
|
|
line.byte 0x02 "OTG_RXTYPE,OTG Rx Transaction Control Register"
|
|
bitfld.byte 0x02 6.--7. " SPEED ,Operating Speed" "Reserved,High,Full,Low"
|
|
bitfld.byte 0x02 4.--5. " PROT ,Protocol" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x02 0.--3. " EP ,Target Endpoint Number" "Ep 0,Ep 1,Ep 2,Ep 3,Ep 4,Ep 5,Ep 6,Ep 7,?..."
|
|
line.byte 0x03 "OTG_RXINTV,OTG Rx Polling Interval Register"
|
|
else
|
|
hgroup.byte (0x110+0x0a)++0x03
|
|
hide.byte 0x00 "OTG_TXTYPE,OTG Tx Transaction Control Register"
|
|
hide.byte 0x01 "OTG_TXINTV,OTG Tx Polling Interval Register"
|
|
hide.byte 0x02 "OTG_RXTYPE,OTG Rx Transaction Control Register"
|
|
hide.byte 0x03 "OTG_RXINTV,OTG Rx Polling Interval Register"
|
|
endif
|
|
group.word 0x120++0x01 "Endpoint 2 Registers"
|
|
line.word 0x00 "OTG_TXMAXP,OTG Tx Max Packet Size Register"
|
|
bitfld.word 0x00 11.--15. " MULT ,Multiplier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.word 0x00 0.--10. 1. " MAXP ,Maximum Payload Transmitted"
|
|
if (((data.byte(asd:0x10200000+0x60))&0x04)==0x04)
|
|
group.word (0x120+0x02)++0x01
|
|
line.word 0x00 "OTG_TXCSR,OTG Tx Control and Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 13. " MD ,Mode" "Rx,Tx"
|
|
textline " "
|
|
bitfld.word 0x00 12. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " FDT ,Force Data Toggle" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.word 0x00 10. " DRM ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 9. " DWE ,Data Toggle Write Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " DT ,Data Toggle" "Low,High"
|
|
bitfld.word 0x00 7. " NAK ,NAK Timeout" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.word 0x00 6. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 5. " RXS ,Rx Stall" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 4. " STP ,Setup Packet" "Not sent,Sent"
|
|
bitfld.word 0x00 3. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 2. " ERR ,Error" "No error,Error"
|
|
bitfld.word 0x00 1. " FNE ,FIFO Not Empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.word 0x00 0. " TRDY ,Tx Packet Ready" "Not ready,Ready"
|
|
else
|
|
group.word (0x120+0x02)++0x01
|
|
line.word 0x00 "OTG_TXCSR,OTG Tx Control and Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ISO ,Isochronous Transfers" "Bulk/Interrupt,Isochronous"
|
|
textline " "
|
|
bitfld.word 0x00 13. " MD ,Mode" "Rx,Tx"
|
|
bitfld.word 0x00 12. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 11. " FDT ,Force Data Toggle" "Not forced,Forced"
|
|
bitfld.word 0x00 10. " DRM ,DMA Request Mode" "Mode 0,Mode 1"
|
|
textline " "
|
|
bitfld.word 0x00 7. " ITX ,Incomplete" "Not incomplete,Incomplete"
|
|
bitfld.word 0x00 6. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 5. " STS ,Sent Stall" "Not transmitted,Transmitted"
|
|
bitfld.word 0x00 4. " SDS ,Send Stall" "Not issued,Issued"
|
|
textline " "
|
|
bitfld.word 0x00 3. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
bitfld.word 0x00 2. " UND ,Underrun" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FNE ,FIFO Not Empty" "Empty,Not empty"
|
|
bitfld.word 0x00 0. " TRDY ,Tx Packet Ready" "Not ready,Ready"
|
|
endif
|
|
group.word (0x120+0x04)++0x01
|
|
line.word 0x00 "OTG_RXMAXP,OTG Rx Max Packet Size Register"
|
|
bitfld.word 0x00 11.--15. " MULT ,Multiplier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.word 0x00 0.--10. 1. " MAXP ,Maximum Payload Transmitted"
|
|
if (((data.byte(asd:0x10200000+0x60))&0x04)==0x04)
|
|
group.word (0x120+0x06)++0x01
|
|
line.word 0x00 "OTG_RXCSR,OTG Rx Control/Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ARQ ,Auto Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 13. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " DNY ,Disable NYET" "No,Yes"
|
|
textline " "
|
|
bitfld.word 0x00 11. " DMD ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 10. " DWE ,Data Toggle Write Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " DT ,Data Toggle" "Low,High"
|
|
bitfld.word 0x00 8. " IRX ,Incomp Rx" "Not incomplete,Incomplete"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 6. " RS ,Rx Stall" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 5. " RPK ,Request Packet" "Not requested,Requested"
|
|
bitfld.word 0x00 4. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 3. " DER ,Data Error/NAK Timeout" "No error,Error"
|
|
bitfld.word 0x00 2. " ER ,Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FFUL ,FIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 0. " RRDY ,Rx Packet Ready" "Not ready,Ready"
|
|
else
|
|
group.word (0x120+0x06)++0x01
|
|
line.word 0x00 "OTG_RXCSR,OTG Rx Control/Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ISO ,ISO" "Bulk/Interrupt,Isochronous"
|
|
textline " "
|
|
bitfld.word 0x00 13. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " DNY ,Disable NYET" "No,Yes"
|
|
textline " "
|
|
bitfld.word 0x00 11. " DMD ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 8. " IRX ,Incomp Rx" "Not incomplete,Incomplete"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 6. " SNT ,Sent Stall" "Not transmitted,Transmitted"
|
|
textline " "
|
|
bitfld.word 0x00 5. " SND ,Send Stall" "Not issued,Issued"
|
|
bitfld.word 0x00 4. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 3. " FFUL ,FIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 2. " ERR ,Data Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " OR ,Overrun" "Not overrun,Overrun"
|
|
bitfld.word 0x00 0. " RRDY ,Rx Packet Ready" "Not ready,Ready"
|
|
endif
|
|
if (((data.word(asd:0x10200000+0x120+0x06))&0x01)==0x01)
|
|
rgroup.word (0x120+0x08)++0x01
|
|
line.word 0x00 "OTG_RXCNT,OTG Rx Bytes Received Counter"
|
|
hexmask.word 0x00 0.--12. 1. " RXCNT ,Endpoint Rx Count"
|
|
else
|
|
hgroup.word (0x120+0x08)++0x01
|
|
hide.word 0x00 "OTG_RXCNT,OTG Rx Bytes Received Counter"
|
|
endif
|
|
if (((data.byte(asd:0x10200000+0x60))&0x04)==0x04)
|
|
group.byte (0x120+0x0a)++0x03
|
|
line.byte 0x00 "OTG_TXTYPE,OTG Tx Transaction Control Register"
|
|
bitfld.byte 0x00 6.--7. " SPEED ,Operating Speed" "Reserved,High,Full,Low"
|
|
bitfld.byte 0x00 4.--5. " PROT ,Protocol" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--3. " EP ,Target Endpoint Number" "Ep 0,Ep 1,Ep 2,Ep 3,Ep 4,Ep 5,Ep 6,Ep 7,?..."
|
|
line.byte 0x01 "OTG_TXINTV,OTG Tx Polling Interval Register"
|
|
line.byte 0x02 "OTG_RXTYPE,OTG Rx Transaction Control Register"
|
|
bitfld.byte 0x02 6.--7. " SPEED ,Operating Speed" "Reserved,High,Full,Low"
|
|
bitfld.byte 0x02 4.--5. " PROT ,Protocol" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x02 0.--3. " EP ,Target Endpoint Number" "Ep 0,Ep 1,Ep 2,Ep 3,Ep 4,Ep 5,Ep 6,Ep 7,?..."
|
|
line.byte 0x03 "OTG_RXINTV,OTG Rx Polling Interval Register"
|
|
else
|
|
hgroup.byte (0x120+0x0a)++0x03
|
|
hide.byte 0x00 "OTG_TXTYPE,OTG Tx Transaction Control Register"
|
|
hide.byte 0x01 "OTG_TXINTV,OTG Tx Polling Interval Register"
|
|
hide.byte 0x02 "OTG_RXTYPE,OTG Rx Transaction Control Register"
|
|
hide.byte 0x03 "OTG_RXINTV,OTG Rx Polling Interval Register"
|
|
endif
|
|
group.word 0x130++0x01 "Endpoint 3 Registers"
|
|
line.word 0x00 "OTG_TXMAXP,OTG Tx Max Packet Size Register"
|
|
bitfld.word 0x00 11.--15. " MULT ,Multiplier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.word 0x00 0.--10. 1. " MAXP ,Maximum Payload Transmitted"
|
|
if (((data.byte(asd:0x10200000+0x60))&0x04)==0x04)
|
|
group.word (0x130+0x02)++0x01
|
|
line.word 0x00 "OTG_TXCSR,OTG Tx Control and Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 13. " MD ,Mode" "Rx,Tx"
|
|
textline " "
|
|
bitfld.word 0x00 12. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " FDT ,Force Data Toggle" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.word 0x00 10. " DRM ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 9. " DWE ,Data Toggle Write Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " DT ,Data Toggle" "Low,High"
|
|
bitfld.word 0x00 7. " NAK ,NAK Timeout" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.word 0x00 6. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 5. " RXS ,Rx Stall" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 4. " STP ,Setup Packet" "Not sent,Sent"
|
|
bitfld.word 0x00 3. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 2. " ERR ,Error" "No error,Error"
|
|
bitfld.word 0x00 1. " FNE ,FIFO Not Empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.word 0x00 0. " TRDY ,Tx Packet Ready" "Not ready,Ready"
|
|
else
|
|
group.word (0x130+0x02)++0x01
|
|
line.word 0x00 "OTG_TXCSR,OTG Tx Control and Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ISO ,Isochronous Transfers" "Bulk/Interrupt,Isochronous"
|
|
textline " "
|
|
bitfld.word 0x00 13. " MD ,Mode" "Rx,Tx"
|
|
bitfld.word 0x00 12. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 11. " FDT ,Force Data Toggle" "Not forced,Forced"
|
|
bitfld.word 0x00 10. " DRM ,DMA Request Mode" "Mode 0,Mode 1"
|
|
textline " "
|
|
bitfld.word 0x00 7. " ITX ,Incomplete" "Not incomplete,Incomplete"
|
|
bitfld.word 0x00 6. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 5. " STS ,Sent Stall" "Not transmitted,Transmitted"
|
|
bitfld.word 0x00 4. " SDS ,Send Stall" "Not issued,Issued"
|
|
textline " "
|
|
bitfld.word 0x00 3. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
bitfld.word 0x00 2. " UND ,Underrun" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FNE ,FIFO Not Empty" "Empty,Not empty"
|
|
bitfld.word 0x00 0. " TRDY ,Tx Packet Ready" "Not ready,Ready"
|
|
endif
|
|
group.word (0x130+0x04)++0x01
|
|
line.word 0x00 "OTG_RXMAXP,OTG Rx Max Packet Size Register"
|
|
bitfld.word 0x00 11.--15. " MULT ,Multiplier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.word 0x00 0.--10. 1. " MAXP ,Maximum Payload Transmitted"
|
|
if (((data.byte(asd:0x10200000+0x60))&0x04)==0x04)
|
|
group.word (0x130+0x06)++0x01
|
|
line.word 0x00 "OTG_RXCSR,OTG Rx Control/Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ARQ ,Auto Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 13. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " DNY ,Disable NYET" "No,Yes"
|
|
textline " "
|
|
bitfld.word 0x00 11. " DMD ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 10. " DWE ,Data Toggle Write Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " DT ,Data Toggle" "Low,High"
|
|
bitfld.word 0x00 8. " IRX ,Incomp Rx" "Not incomplete,Incomplete"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 6. " RS ,Rx Stall" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 5. " RPK ,Request Packet" "Not requested,Requested"
|
|
bitfld.word 0x00 4. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 3. " DER ,Data Error/NAK Timeout" "No error,Error"
|
|
bitfld.word 0x00 2. " ER ,Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FFUL ,FIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 0. " RRDY ,Rx Packet Ready" "Not ready,Ready"
|
|
else
|
|
group.word (0x130+0x06)++0x01
|
|
line.word 0x00 "OTG_RXCSR,OTG Rx Control/Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ISO ,ISO" "Bulk/Interrupt,Isochronous"
|
|
textline " "
|
|
bitfld.word 0x00 13. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " DNY ,Disable NYET" "No,Yes"
|
|
textline " "
|
|
bitfld.word 0x00 11. " DMD ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 8. " IRX ,Incomp Rx" "Not incomplete,Incomplete"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 6. " SNT ,Sent Stall" "Not transmitted,Transmitted"
|
|
textline " "
|
|
bitfld.word 0x00 5. " SND ,Send Stall" "Not issued,Issued"
|
|
bitfld.word 0x00 4. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 3. " FFUL ,FIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 2. " ERR ,Data Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " OR ,Overrun" "Not overrun,Overrun"
|
|
bitfld.word 0x00 0. " RRDY ,Rx Packet Ready" "Not ready,Ready"
|
|
endif
|
|
if (((data.word(asd:0x10200000+0x130+0x06))&0x01)==0x01)
|
|
rgroup.word (0x130+0x08)++0x01
|
|
line.word 0x00 "OTG_RXCNT,OTG Rx Bytes Received Counter"
|
|
hexmask.word 0x00 0.--12. 1. " RXCNT ,Endpoint Rx Count"
|
|
else
|
|
hgroup.word (0x130+0x08)++0x01
|
|
hide.word 0x00 "OTG_RXCNT,OTG Rx Bytes Received Counter"
|
|
endif
|
|
if (((data.byte(asd:0x10200000+0x60))&0x04)==0x04)
|
|
group.byte (0x130+0x0a)++0x03
|
|
line.byte 0x00 "OTG_TXTYPE,OTG Tx Transaction Control Register"
|
|
bitfld.byte 0x00 6.--7. " SPEED ,Operating Speed" "Reserved,High,Full,Low"
|
|
bitfld.byte 0x00 4.--5. " PROT ,Protocol" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--3. " EP ,Target Endpoint Number" "Ep 0,Ep 1,Ep 2,Ep 3,Ep 4,Ep 5,Ep 6,Ep 7,?..."
|
|
line.byte 0x01 "OTG_TXINTV,OTG Tx Polling Interval Register"
|
|
line.byte 0x02 "OTG_RXTYPE,OTG Rx Transaction Control Register"
|
|
bitfld.byte 0x02 6.--7. " SPEED ,Operating Speed" "Reserved,High,Full,Low"
|
|
bitfld.byte 0x02 4.--5. " PROT ,Protocol" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x02 0.--3. " EP ,Target Endpoint Number" "Ep 0,Ep 1,Ep 2,Ep 3,Ep 4,Ep 5,Ep 6,Ep 7,?..."
|
|
line.byte 0x03 "OTG_RXINTV,OTG Rx Polling Interval Register"
|
|
else
|
|
hgroup.byte (0x130+0x0a)++0x03
|
|
hide.byte 0x00 "OTG_TXTYPE,OTG Tx Transaction Control Register"
|
|
hide.byte 0x01 "OTG_TXINTV,OTG Tx Polling Interval Register"
|
|
hide.byte 0x02 "OTG_RXTYPE,OTG Rx Transaction Control Register"
|
|
hide.byte 0x03 "OTG_RXINTV,OTG Rx Polling Interval Register"
|
|
endif
|
|
group.word 0x140++0x01 "Endpoint 4 Registers"
|
|
line.word 0x00 "OTG_TXMAXP,OTG Tx Max Packet Size Register"
|
|
bitfld.word 0x00 11.--15. " MULT ,Multiplier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.word 0x00 0.--10. 1. " MAXP ,Maximum Payload Transmitted"
|
|
if (((data.byte(asd:0x10200000+0x60))&0x04)==0x04)
|
|
group.word (0x140+0x02)++0x01
|
|
line.word 0x00 "OTG_TXCSR,OTG Tx Control and Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 13. " MD ,Mode" "Rx,Tx"
|
|
textline " "
|
|
bitfld.word 0x00 12. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " FDT ,Force Data Toggle" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.word 0x00 10. " DRM ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 9. " DWE ,Data Toggle Write Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " DT ,Data Toggle" "Low,High"
|
|
bitfld.word 0x00 7. " NAK ,NAK Timeout" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.word 0x00 6. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 5. " RXS ,Rx Stall" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 4. " STP ,Setup Packet" "Not sent,Sent"
|
|
bitfld.word 0x00 3. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 2. " ERR ,Error" "No error,Error"
|
|
bitfld.word 0x00 1. " FNE ,FIFO Not Empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.word 0x00 0. " TRDY ,Tx Packet Ready" "Not ready,Ready"
|
|
else
|
|
group.word (0x140+0x02)++0x01
|
|
line.word 0x00 "OTG_TXCSR,OTG Tx Control and Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ISO ,Isochronous Transfers" "Bulk/Interrupt,Isochronous"
|
|
textline " "
|
|
bitfld.word 0x00 13. " MD ,Mode" "Rx,Tx"
|
|
bitfld.word 0x00 12. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 11. " FDT ,Force Data Toggle" "Not forced,Forced"
|
|
bitfld.word 0x00 10. " DRM ,DMA Request Mode" "Mode 0,Mode 1"
|
|
textline " "
|
|
bitfld.word 0x00 7. " ITX ,Incomplete" "Not incomplete,Incomplete"
|
|
bitfld.word 0x00 6. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 5. " STS ,Sent Stall" "Not transmitted,Transmitted"
|
|
bitfld.word 0x00 4. " SDS ,Send Stall" "Not issued,Issued"
|
|
textline " "
|
|
bitfld.word 0x00 3. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
bitfld.word 0x00 2. " UND ,Underrun" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FNE ,FIFO Not Empty" "Empty,Not empty"
|
|
bitfld.word 0x00 0. " TRDY ,Tx Packet Ready" "Not ready,Ready"
|
|
endif
|
|
group.word (0x140+0x04)++0x01
|
|
line.word 0x00 "OTG_RXMAXP,OTG Rx Max Packet Size Register"
|
|
bitfld.word 0x00 11.--15. " MULT ,Multiplier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.word 0x00 0.--10. 1. " MAXP ,Maximum Payload Transmitted"
|
|
if (((data.byte(asd:0x10200000+0x60))&0x04)==0x04)
|
|
group.word (0x140+0x06)++0x01
|
|
line.word 0x00 "OTG_RXCSR,OTG Rx Control/Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ARQ ,Auto Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 13. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " DNY ,Disable NYET" "No,Yes"
|
|
textline " "
|
|
bitfld.word 0x00 11. " DMD ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 10. " DWE ,Data Toggle Write Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " DT ,Data Toggle" "Low,High"
|
|
bitfld.word 0x00 8. " IRX ,Incomp Rx" "Not incomplete,Incomplete"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 6. " RS ,Rx Stall" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 5. " RPK ,Request Packet" "Not requested,Requested"
|
|
bitfld.word 0x00 4. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 3. " DER ,Data Error/NAK Timeout" "No error,Error"
|
|
bitfld.word 0x00 2. " ER ,Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FFUL ,FIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 0. " RRDY ,Rx Packet Ready" "Not ready,Ready"
|
|
else
|
|
group.word (0x140+0x06)++0x01
|
|
line.word 0x00 "OTG_RXCSR,OTG Rx Control/Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ISO ,ISO" "Bulk/Interrupt,Isochronous"
|
|
textline " "
|
|
bitfld.word 0x00 13. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " DNY ,Disable NYET" "No,Yes"
|
|
textline " "
|
|
bitfld.word 0x00 11. " DMD ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 8. " IRX ,Incomp Rx" "Not incomplete,Incomplete"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 6. " SNT ,Sent Stall" "Not transmitted,Transmitted"
|
|
textline " "
|
|
bitfld.word 0x00 5. " SND ,Send Stall" "Not issued,Issued"
|
|
bitfld.word 0x00 4. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 3. " FFUL ,FIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 2. " ERR ,Data Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " OR ,Overrun" "Not overrun,Overrun"
|
|
bitfld.word 0x00 0. " RRDY ,Rx Packet Ready" "Not ready,Ready"
|
|
endif
|
|
if (((data.word(asd:0x10200000+0x140+0x06))&0x01)==0x01)
|
|
rgroup.word (0x140+0x08)++0x01
|
|
line.word 0x00 "OTG_RXCNT,OTG Rx Bytes Received Counter"
|
|
hexmask.word 0x00 0.--12. 1. " RXCNT ,Endpoint Rx Count"
|
|
else
|
|
hgroup.word (0x140+0x08)++0x01
|
|
hide.word 0x00 "OTG_RXCNT,OTG Rx Bytes Received Counter"
|
|
endif
|
|
if (((data.byte(asd:0x10200000+0x60))&0x04)==0x04)
|
|
group.byte (0x140+0x0a)++0x03
|
|
line.byte 0x00 "OTG_TXTYPE,OTG Tx Transaction Control Register"
|
|
bitfld.byte 0x00 6.--7. " SPEED ,Operating Speed" "Reserved,High,Full,Low"
|
|
bitfld.byte 0x00 4.--5. " PROT ,Protocol" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--3. " EP ,Target Endpoint Number" "Ep 0,Ep 1,Ep 2,Ep 3,Ep 4,Ep 5,Ep 6,Ep 7,?..."
|
|
line.byte 0x01 "OTG_TXINTV,OTG Tx Polling Interval Register"
|
|
line.byte 0x02 "OTG_RXTYPE,OTG Rx Transaction Control Register"
|
|
bitfld.byte 0x02 6.--7. " SPEED ,Operating Speed" "Reserved,High,Full,Low"
|
|
bitfld.byte 0x02 4.--5. " PROT ,Protocol" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x02 0.--3. " EP ,Target Endpoint Number" "Ep 0,Ep 1,Ep 2,Ep 3,Ep 4,Ep 5,Ep 6,Ep 7,?..."
|
|
line.byte 0x03 "OTG_RXINTV,OTG Rx Polling Interval Register"
|
|
else
|
|
hgroup.byte (0x140+0x0a)++0x03
|
|
hide.byte 0x00 "OTG_TXTYPE,OTG Tx Transaction Control Register"
|
|
hide.byte 0x01 "OTG_TXINTV,OTG Tx Polling Interval Register"
|
|
hide.byte 0x02 "OTG_RXTYPE,OTG Rx Transaction Control Register"
|
|
hide.byte 0x03 "OTG_RXINTV,OTG Rx Polling Interval Register"
|
|
endif
|
|
group.word 0x150++0x01 "Endpoint 5 Registers"
|
|
line.word 0x00 "OTG_TXMAXP,OTG Tx Max Packet Size Register"
|
|
bitfld.word 0x00 11.--15. " MULT ,Multiplier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.word 0x00 0.--10. 1. " MAXP ,Maximum Payload Transmitted"
|
|
if (((data.byte(asd:0x10200000+0x60))&0x04)==0x04)
|
|
group.word (0x150+0x02)++0x01
|
|
line.word 0x00 "OTG_TXCSR,OTG Tx Control and Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 13. " MD ,Mode" "Rx,Tx"
|
|
textline " "
|
|
bitfld.word 0x00 12. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " FDT ,Force Data Toggle" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.word 0x00 10. " DRM ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 9. " DWE ,Data Toggle Write Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " DT ,Data Toggle" "Low,High"
|
|
bitfld.word 0x00 7. " NAK ,NAK Timeout" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.word 0x00 6. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 5. " RXS ,Rx Stall" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 4. " STP ,Setup Packet" "Not sent,Sent"
|
|
bitfld.word 0x00 3. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 2. " ERR ,Error" "No error,Error"
|
|
bitfld.word 0x00 1. " FNE ,FIFO Not Empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.word 0x00 0. " TRDY ,Tx Packet Ready" "Not ready,Ready"
|
|
else
|
|
group.word (0x150+0x02)++0x01
|
|
line.word 0x00 "OTG_TXCSR,OTG Tx Control and Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ISO ,Isochronous Transfers" "Bulk/Interrupt,Isochronous"
|
|
textline " "
|
|
bitfld.word 0x00 13. " MD ,Mode" "Rx,Tx"
|
|
bitfld.word 0x00 12. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 11. " FDT ,Force Data Toggle" "Not forced,Forced"
|
|
bitfld.word 0x00 10. " DRM ,DMA Request Mode" "Mode 0,Mode 1"
|
|
textline " "
|
|
bitfld.word 0x00 7. " ITX ,Incomplete" "Not incomplete,Incomplete"
|
|
bitfld.word 0x00 6. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 5. " STS ,Sent Stall" "Not transmitted,Transmitted"
|
|
bitfld.word 0x00 4. " SDS ,Send Stall" "Not issued,Issued"
|
|
textline " "
|
|
bitfld.word 0x00 3. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
bitfld.word 0x00 2. " UND ,Underrun" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FNE ,FIFO Not Empty" "Empty,Not empty"
|
|
bitfld.word 0x00 0. " TRDY ,Tx Packet Ready" "Not ready,Ready"
|
|
endif
|
|
group.word (0x150+0x04)++0x01
|
|
line.word 0x00 "OTG_RXMAXP,OTG Rx Max Packet Size Register"
|
|
bitfld.word 0x00 11.--15. " MULT ,Multiplier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.word 0x00 0.--10. 1. " MAXP ,Maximum Payload Transmitted"
|
|
if (((data.byte(asd:0x10200000+0x60))&0x04)==0x04)
|
|
group.word (0x150+0x06)++0x01
|
|
line.word 0x00 "OTG_RXCSR,OTG Rx Control/Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ARQ ,Auto Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 13. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " DNY ,Disable NYET" "No,Yes"
|
|
textline " "
|
|
bitfld.word 0x00 11. " DMD ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 10. " DWE ,Data Toggle Write Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " DT ,Data Toggle" "Low,High"
|
|
bitfld.word 0x00 8. " IRX ,Incomp Rx" "Not incomplete,Incomplete"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 6. " RS ,Rx Stall" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 5. " RPK ,Request Packet" "Not requested,Requested"
|
|
bitfld.word 0x00 4. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 3. " DER ,Data Error/NAK Timeout" "No error,Error"
|
|
bitfld.word 0x00 2. " ER ,Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FFUL ,FIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 0. " RRDY ,Rx Packet Ready" "Not ready,Ready"
|
|
else
|
|
group.word (0x150+0x06)++0x01
|
|
line.word 0x00 "OTG_RXCSR,OTG Rx Control/Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ISO ,ISO" "Bulk/Interrupt,Isochronous"
|
|
textline " "
|
|
bitfld.word 0x00 13. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " DNY ,Disable NYET" "No,Yes"
|
|
textline " "
|
|
bitfld.word 0x00 11. " DMD ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 8. " IRX ,Incomp Rx" "Not incomplete,Incomplete"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 6. " SNT ,Sent Stall" "Not transmitted,Transmitted"
|
|
textline " "
|
|
bitfld.word 0x00 5. " SND ,Send Stall" "Not issued,Issued"
|
|
bitfld.word 0x00 4. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 3. " FFUL ,FIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 2. " ERR ,Data Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " OR ,Overrun" "Not overrun,Overrun"
|
|
bitfld.word 0x00 0. " RRDY ,Rx Packet Ready" "Not ready,Ready"
|
|
endif
|
|
if (((data.word(asd:0x10200000+0x150+0x06))&0x01)==0x01)
|
|
rgroup.word (0x150+0x08)++0x01
|
|
line.word 0x00 "OTG_RXCNT,OTG Rx Bytes Received Counter"
|
|
hexmask.word 0x00 0.--12. 1. " RXCNT ,Endpoint Rx Count"
|
|
else
|
|
hgroup.word (0x150+0x08)++0x01
|
|
hide.word 0x00 "OTG_RXCNT,OTG Rx Bytes Received Counter"
|
|
endif
|
|
if (((data.byte(asd:0x10200000+0x60))&0x04)==0x04)
|
|
group.byte (0x150+0x0a)++0x03
|
|
line.byte 0x00 "OTG_TXTYPE,OTG Tx Transaction Control Register"
|
|
bitfld.byte 0x00 6.--7. " SPEED ,Operating Speed" "Reserved,High,Full,Low"
|
|
bitfld.byte 0x00 4.--5. " PROT ,Protocol" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--3. " EP ,Target Endpoint Number" "Ep 0,Ep 1,Ep 2,Ep 3,Ep 4,Ep 5,Ep 6,Ep 7,?..."
|
|
line.byte 0x01 "OTG_TXINTV,OTG Tx Polling Interval Register"
|
|
line.byte 0x02 "OTG_RXTYPE,OTG Rx Transaction Control Register"
|
|
bitfld.byte 0x02 6.--7. " SPEED ,Operating Speed" "Reserved,High,Full,Low"
|
|
bitfld.byte 0x02 4.--5. " PROT ,Protocol" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x02 0.--3. " EP ,Target Endpoint Number" "Ep 0,Ep 1,Ep 2,Ep 3,Ep 4,Ep 5,Ep 6,Ep 7,?..."
|
|
line.byte 0x03 "OTG_RXINTV,OTG Rx Polling Interval Register"
|
|
else
|
|
hgroup.byte (0x150+0x0a)++0x03
|
|
hide.byte 0x00 "OTG_TXTYPE,OTG Tx Transaction Control Register"
|
|
hide.byte 0x01 "OTG_TXINTV,OTG Tx Polling Interval Register"
|
|
hide.byte 0x02 "OTG_RXTYPE,OTG Rx Transaction Control Register"
|
|
hide.byte 0x03 "OTG_RXINTV,OTG Rx Polling Interval Register"
|
|
endif
|
|
group.word 0x160++0x01 "Endpoint 6 Registers"
|
|
line.word 0x00 "OTG_TXMAXP,OTG Tx Max Packet Size Register"
|
|
bitfld.word 0x00 11.--15. " MULT ,Multiplier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.word 0x00 0.--10. 1. " MAXP ,Maximum Payload Transmitted"
|
|
if (((data.byte(asd:0x10200000+0x60))&0x04)==0x04)
|
|
group.word (0x160+0x02)++0x01
|
|
line.word 0x00 "OTG_TXCSR,OTG Tx Control and Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 13. " MD ,Mode" "Rx,Tx"
|
|
textline " "
|
|
bitfld.word 0x00 12. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " FDT ,Force Data Toggle" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.word 0x00 10. " DRM ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 9. " DWE ,Data Toggle Write Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " DT ,Data Toggle" "Low,High"
|
|
bitfld.word 0x00 7. " NAK ,NAK Timeout" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.word 0x00 6. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 5. " RXS ,Rx Stall" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 4. " STP ,Setup Packet" "Not sent,Sent"
|
|
bitfld.word 0x00 3. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 2. " ERR ,Error" "No error,Error"
|
|
bitfld.word 0x00 1. " FNE ,FIFO Not Empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.word 0x00 0. " TRDY ,Tx Packet Ready" "Not ready,Ready"
|
|
else
|
|
group.word (0x160+0x02)++0x01
|
|
line.word 0x00 "OTG_TXCSR,OTG Tx Control and Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ISO ,Isochronous Transfers" "Bulk/Interrupt,Isochronous"
|
|
textline " "
|
|
bitfld.word 0x00 13. " MD ,Mode" "Rx,Tx"
|
|
bitfld.word 0x00 12. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 11. " FDT ,Force Data Toggle" "Not forced,Forced"
|
|
bitfld.word 0x00 10. " DRM ,DMA Request Mode" "Mode 0,Mode 1"
|
|
textline " "
|
|
bitfld.word 0x00 7. " ITX ,Incomplete" "Not incomplete,Incomplete"
|
|
bitfld.word 0x00 6. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 5. " STS ,Sent Stall" "Not transmitted,Transmitted"
|
|
bitfld.word 0x00 4. " SDS ,Send Stall" "Not issued,Issued"
|
|
textline " "
|
|
bitfld.word 0x00 3. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
bitfld.word 0x00 2. " UND ,Underrun" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FNE ,FIFO Not Empty" "Empty,Not empty"
|
|
bitfld.word 0x00 0. " TRDY ,Tx Packet Ready" "Not ready,Ready"
|
|
endif
|
|
group.word (0x160+0x04)++0x01
|
|
line.word 0x00 "OTG_RXMAXP,OTG Rx Max Packet Size Register"
|
|
bitfld.word 0x00 11.--15. " MULT ,Multiplier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.word 0x00 0.--10. 1. " MAXP ,Maximum Payload Transmitted"
|
|
if (((data.byte(asd:0x10200000+0x60))&0x04)==0x04)
|
|
group.word (0x160+0x06)++0x01
|
|
line.word 0x00 "OTG_RXCSR,OTG Rx Control/Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ARQ ,Auto Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 13. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " DNY ,Disable NYET" "No,Yes"
|
|
textline " "
|
|
bitfld.word 0x00 11. " DMD ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 10. " DWE ,Data Toggle Write Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " DT ,Data Toggle" "Low,High"
|
|
bitfld.word 0x00 8. " IRX ,Incomp Rx" "Not incomplete,Incomplete"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 6. " RS ,Rx Stall" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 5. " RPK ,Request Packet" "Not requested,Requested"
|
|
bitfld.word 0x00 4. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 3. " DER ,Data Error/NAK Timeout" "No error,Error"
|
|
bitfld.word 0x00 2. " ER ,Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FFUL ,FIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 0. " RRDY ,Rx Packet Ready" "Not ready,Ready"
|
|
else
|
|
group.word (0x160+0x06)++0x01
|
|
line.word 0x00 "OTG_RXCSR,OTG Rx Control/Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ISO ,ISO" "Bulk/Interrupt,Isochronous"
|
|
textline " "
|
|
bitfld.word 0x00 13. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " DNY ,Disable NYET" "No,Yes"
|
|
textline " "
|
|
bitfld.word 0x00 11. " DMD ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 8. " IRX ,Incomp Rx" "Not incomplete,Incomplete"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 6. " SNT ,Sent Stall" "Not transmitted,Transmitted"
|
|
textline " "
|
|
bitfld.word 0x00 5. " SND ,Send Stall" "Not issued,Issued"
|
|
bitfld.word 0x00 4. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 3. " FFUL ,FIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 2. " ERR ,Data Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " OR ,Overrun" "Not overrun,Overrun"
|
|
bitfld.word 0x00 0. " RRDY ,Rx Packet Ready" "Not ready,Ready"
|
|
endif
|
|
if (((data.word(asd:0x10200000+0x160+0x06))&0x01)==0x01)
|
|
rgroup.word (0x160+0x08)++0x01
|
|
line.word 0x00 "OTG_RXCNT,OTG Rx Bytes Received Counter"
|
|
hexmask.word 0x00 0.--12. 1. " RXCNT ,Endpoint Rx Count"
|
|
else
|
|
hgroup.word (0x160+0x08)++0x01
|
|
hide.word 0x00 "OTG_RXCNT,OTG Rx Bytes Received Counter"
|
|
endif
|
|
if (((data.byte(asd:0x10200000+0x60))&0x04)==0x04)
|
|
group.byte (0x160+0x0a)++0x03
|
|
line.byte 0x00 "OTG_TXTYPE,OTG Tx Transaction Control Register"
|
|
bitfld.byte 0x00 6.--7. " SPEED ,Operating Speed" "Reserved,High,Full,Low"
|
|
bitfld.byte 0x00 4.--5. " PROT ,Protocol" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--3. " EP ,Target Endpoint Number" "Ep 0,Ep 1,Ep 2,Ep 3,Ep 4,Ep 5,Ep 6,Ep 7,?..."
|
|
line.byte 0x01 "OTG_TXINTV,OTG Tx Polling Interval Register"
|
|
line.byte 0x02 "OTG_RXTYPE,OTG Rx Transaction Control Register"
|
|
bitfld.byte 0x02 6.--7. " SPEED ,Operating Speed" "Reserved,High,Full,Low"
|
|
bitfld.byte 0x02 4.--5. " PROT ,Protocol" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x02 0.--3. " EP ,Target Endpoint Number" "Ep 0,Ep 1,Ep 2,Ep 3,Ep 4,Ep 5,Ep 6,Ep 7,?..."
|
|
line.byte 0x03 "OTG_RXINTV,OTG Rx Polling Interval Register"
|
|
else
|
|
hgroup.byte (0x160+0x0a)++0x03
|
|
hide.byte 0x00 "OTG_TXTYPE,OTG Tx Transaction Control Register"
|
|
hide.byte 0x01 "OTG_TXINTV,OTG Tx Polling Interval Register"
|
|
hide.byte 0x02 "OTG_RXTYPE,OTG Rx Transaction Control Register"
|
|
hide.byte 0x03 "OTG_RXINTV,OTG Rx Polling Interval Register"
|
|
endif
|
|
group.word 0x170++0x01 "Endpoint 7 Registers"
|
|
line.word 0x00 "OTG_TXMAXP,OTG Tx Max Packet Size Register"
|
|
bitfld.word 0x00 11.--15. " MULT ,Multiplier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.word 0x00 0.--10. 1. " MAXP ,Maximum Payload Transmitted"
|
|
if (((data.byte(asd:0x10200000+0x60))&0x04)==0x04)
|
|
group.word (0x170+0x02)++0x01
|
|
line.word 0x00 "OTG_TXCSR,OTG Tx Control and Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 13. " MD ,Mode" "Rx,Tx"
|
|
textline " "
|
|
bitfld.word 0x00 12. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " FDT ,Force Data Toggle" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.word 0x00 10. " DRM ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 9. " DWE ,Data Toggle Write Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " DT ,Data Toggle" "Low,High"
|
|
bitfld.word 0x00 7. " NAK ,NAK Timeout" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.word 0x00 6. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 5. " RXS ,Rx Stall" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 4. " STP ,Setup Packet" "Not sent,Sent"
|
|
bitfld.word 0x00 3. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 2. " ERR ,Error" "No error,Error"
|
|
bitfld.word 0x00 1. " FNE ,FIFO Not Empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.word 0x00 0. " TRDY ,Tx Packet Ready" "Not ready,Ready"
|
|
else
|
|
group.word (0x170+0x02)++0x01
|
|
line.word 0x00 "OTG_TXCSR,OTG Tx Control and Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ISO ,Isochronous Transfers" "Bulk/Interrupt,Isochronous"
|
|
textline " "
|
|
bitfld.word 0x00 13. " MD ,Mode" "Rx,Tx"
|
|
bitfld.word 0x00 12. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 11. " FDT ,Force Data Toggle" "Not forced,Forced"
|
|
bitfld.word 0x00 10. " DRM ,DMA Request Mode" "Mode 0,Mode 1"
|
|
textline " "
|
|
bitfld.word 0x00 7. " ITX ,Incomplete" "Not incomplete,Incomplete"
|
|
bitfld.word 0x00 6. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 5. " STS ,Sent Stall" "Not transmitted,Transmitted"
|
|
bitfld.word 0x00 4. " SDS ,Send Stall" "Not issued,Issued"
|
|
textline " "
|
|
bitfld.word 0x00 3. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
bitfld.word 0x00 2. " UND ,Underrun" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FNE ,FIFO Not Empty" "Empty,Not empty"
|
|
bitfld.word 0x00 0. " TRDY ,Tx Packet Ready" "Not ready,Ready"
|
|
endif
|
|
group.word (0x170+0x04)++0x01
|
|
line.word 0x00 "OTG_RXMAXP,OTG Rx Max Packet Size Register"
|
|
bitfld.word 0x00 11.--15. " MULT ,Multiplier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.word 0x00 0.--10. 1. " MAXP ,Maximum Payload Transmitted"
|
|
if (((data.byte(asd:0x10200000+0x60))&0x04)==0x04)
|
|
group.word (0x170+0x06)++0x01
|
|
line.word 0x00 "OTG_RXCSR,OTG Rx Control/Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ARQ ,Auto Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 13. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " DNY ,Disable NYET" "No,Yes"
|
|
textline " "
|
|
bitfld.word 0x00 11. " DMD ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 10. " DWE ,Data Toggle Write Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " DT ,Data Toggle" "Low,High"
|
|
bitfld.word 0x00 8. " IRX ,Incomp Rx" "Not incomplete,Incomplete"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 6. " RS ,Rx Stall" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 5. " RPK ,Request Packet" "Not requested,Requested"
|
|
bitfld.word 0x00 4. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 3. " DER ,Data Error/NAK Timeout" "No error,Error"
|
|
bitfld.word 0x00 2. " ER ,Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FFUL ,FIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 0. " RRDY ,Rx Packet Ready" "Not ready,Ready"
|
|
else
|
|
group.word (0x170+0x06)++0x01
|
|
line.word 0x00 "OTG_RXCSR,OTG Rx Control/Status Register"
|
|
bitfld.word 0x00 15. " ASET ,Auto Set" "Not set,Set"
|
|
bitfld.word 0x00 14. " ISO ,ISO" "Bulk/Interrupt,Isochronous"
|
|
textline " "
|
|
bitfld.word 0x00 13. " DMR ,DMA Request Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " DNY ,Disable NYET" "No,Yes"
|
|
textline " "
|
|
bitfld.word 0x00 11. " DMD ,DMA Request Mode" "Mode 0,Mode 1"
|
|
bitfld.word 0x00 8. " IRX ,Incomp Rx" "Not incomplete,Incomplete"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CLR ,Clear Data Toggle" "No effect,Cleared"
|
|
bitfld.word 0x00 6. " SNT ,Sent Stall" "Not transmitted,Transmitted"
|
|
textline " "
|
|
bitfld.word 0x00 5. " SND ,Send Stall" "Not issued,Issued"
|
|
bitfld.word 0x00 4. " FF ,Flush FIFO" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 3. " FFUL ,FIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 2. " ERR ,Data Error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " OR ,Overrun" "Not overrun,Overrun"
|
|
bitfld.word 0x00 0. " RRDY ,Rx Packet Ready" "Not ready,Ready"
|
|
endif
|
|
if (((data.word(asd:0x10200000+0x170+0x06))&0x01)==0x01)
|
|
rgroup.word (0x170+0x08)++0x01
|
|
line.word 0x00 "OTG_RXCNT,OTG Rx Bytes Received Counter"
|
|
hexmask.word 0x00 0.--12. 1. " RXCNT ,Endpoint Rx Count"
|
|
else
|
|
hgroup.word (0x170+0x08)++0x01
|
|
hide.word 0x00 "OTG_RXCNT,OTG Rx Bytes Received Counter"
|
|
endif
|
|
if (((data.byte(asd:0x10200000+0x60))&0x04)==0x04)
|
|
group.byte (0x170+0x0a)++0x03
|
|
line.byte 0x00 "OTG_TXTYPE,OTG Tx Transaction Control Register"
|
|
bitfld.byte 0x00 6.--7. " SPEED ,Operating Speed" "Reserved,High,Full,Low"
|
|
bitfld.byte 0x00 4.--5. " PROT ,Protocol" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--3. " EP ,Target Endpoint Number" "Ep 0,Ep 1,Ep 2,Ep 3,Ep 4,Ep 5,Ep 6,Ep 7,?..."
|
|
line.byte 0x01 "OTG_TXINTV,OTG Tx Polling Interval Register"
|
|
line.byte 0x02 "OTG_RXTYPE,OTG Rx Transaction Control Register"
|
|
bitfld.byte 0x02 6.--7. " SPEED ,Operating Speed" "Reserved,High,Full,Low"
|
|
bitfld.byte 0x02 4.--5. " PROT ,Protocol" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x02 0.--3. " EP ,Target Endpoint Number" "Ep 0,Ep 1,Ep 2,Ep 3,Ep 4,Ep 5,Ep 6,Ep 7,?..."
|
|
line.byte 0x03 "OTG_RXINTV,OTG Rx Polling Interval Register"
|
|
else
|
|
hgroup.byte (0x170+0x0a)++0x03
|
|
hide.byte 0x00 "OTG_TXTYPE,OTG Tx Transaction Control Register"
|
|
hide.byte 0x01 "OTG_TXINTV,OTG Tx Polling Interval Register"
|
|
hide.byte 0x02 "OTG_RXTYPE,OTG Rx Transaction Control Register"
|
|
hide.byte 0x03 "OTG_RXINTV,OTG Rx Polling Interval Register"
|
|
endif
|
|
tree.end
|
|
width 12.
|
|
group.long 0x200++0x03 "Top-level Control and Status Registers"
|
|
line.long 0x00 "OTG_DMASEL,OTG DMA Selector Register"
|
|
bitfld.long 0x00 25.--29. " DMASEL_5 ,DMA Selector 5" "EP1 Tx,EP2 Tx,EP3 Tx,EP4 Tx,EP5 Tx,EP6 Tx,EP7 Tx,EP1 Rx,EP2 Rx,EP3 Rx,EP4 Rx,EP5 Rx,EP6 Rx,EP7 Rx,?..."
|
|
bitfld.long 0x00 20.--24. " DMASEL_4 ,DMA Selector 4" "EP1 Tx,EP2 Tx,EP3 Tx,EP4 Tx,EP5 Tx,EP6 Tx,EP7 Tx,EP1 Rx,EP2 Rx,EP3 Rx,EP4 Rx,EP5 Rx,EP6 Rx,EP7 Rx,?..."
|
|
bitfld.long 0x00 15.--19. " DMASEL_3 ,DMA Selector 3" "EP1 Tx,EP2 Tx,EP3 Tx,EP4 Tx,EP5 Tx,EP6 Tx,EP7 Tx,EP1 Rx,EP2 Rx,EP3 Rx,EP4 Rx,EP5 Rx,EP6 Rx,EP7 Rx,?..."
|
|
textline " "
|
|
bitfld.long 0x00 10.--14. " DMASEL_2 ,DMA Selector 2" "EP1 Tx,EP2 Tx,EP3 Tx,EP4 Tx,EP5 Tx,EP6 Tx,EP7 Tx,EP1 Rx,EP2 Rx,EP3 Rx,EP4 Rx,EP5 Rx,EP6 Rx,EP7 Rx,?..."
|
|
bitfld.long 0x00 5.--9. " DMASEL_1 ,DMA Selector 1" "EP1 Tx,EP2 Tx,EP3 Tx,EP4 Tx,EP5 Tx,EP6 Tx,EP7 Tx,EP1 Rx,EP2 Rx,EP3 Rx,EP4 Rx,EP5 Rx,EP6 Rx,EP7 Rx,?..."
|
|
bitfld.long 0x00 0.--4. " DMASEL_0 ,DMA Selector 0" "EP1 Tx,EP2 Tx,EP3 Tx,EP4 Tx,EP5 Tx,EP6 Tx,EP7 Tx,EP1 Rx,EP2 Rx,EP3 Rx,EP4 Rx,EP5 Rx,EP6 Rx,EP7 Rx,?..."
|
|
if (((data.long(asd:0x10200000+0x204))&0x4000)==0x4000)
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "OTG_TOPCTRL,OTG Top Control Register"
|
|
bitfld.long 0x00 17. " BVALID ,B-Device Session Valid Indicator" "Not valid,Valid"
|
|
bitfld.long 0x00 15.--16. " UARTSEL ,UART over USB UART Selection" "UART0,UART1,UART2,UART3"
|
|
textline " "
|
|
bitfld.long 0x00 14. " UARTEN ,UART over USB Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " UMODSEL ,UART over USB Mode Select" "DP = UART Rx|DM = UART Tx - CarKit standard,DP = /UART Tx|DM = /UART Rx - non standard"
|
|
textline " "
|
|
bitfld.long 0x00 12. " VBUSVLDEXT ,External VBUS Valid Indicator" "Not valid,Valid"
|
|
bitfld.long 0x00 11. " VBUSVLDEXTSEL ,External VBUS Valid Select" "Internal Session Valid comparator,VBUSVLDEXT input"
|
|
textline " "
|
|
bitfld.long 0x00 10. " OTGDISABLE ,OTG Block Disable" "No,Yes"
|
|
bitfld.long 0x00 9. " TXBITSTUFFEN ,Transmit Bit-Stuffing Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " COMMONONN ,Common block power down control" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " PORTRESET ,Per-port reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 6. " FSXCVROWNER ,UTMI or serial interface select" "UTMI+,TXENABLEN/FSDATAEXT/FSSE0EXT"
|
|
bitfld.long 0x00 4.--5. " REFCLKSEL ,Reference clock select for frequency block" "Crystal,2.5-V clock,CLKCORE,CLKCORE"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " REFCLKDIV ,Reference clock frequency divider" "12 MHz,24 MHz,48 MHz,?..."
|
|
bitfld.long 0x00 1. " PH_RESET ,PHY reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 0. " XCLK_GATING ,XClk Gating" "Disabled,Enabled"
|
|
else
|
|
group.long 0x204++0x03
|
|
line.long 0x00 "OTG_TOPCTRL,OTG Top Control Register"
|
|
bitfld.long 0x00 17. " BVALID ,B-Device Session Valid Indicator" "Not valid,Valid"
|
|
bitfld.long 0x00 15.--16. " UARTSEL ,UART over USB UART Selection" "UART0,UART1,UART2,UART3"
|
|
textline " "
|
|
bitfld.long 0x00 14. " UARTEN ,UART over USB Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " USBOTGTM1 ,USB OTG Test Mode" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 12. " VBUSVLDEXT ,External VBUS Valid Indicator" "Not valid,Valid"
|
|
bitfld.long 0x00 11. " VBUSVLDEXTSEL ,External VBUS Valid Select" "Internal Session Valid comparator,VBUSVLDEXT input"
|
|
textline " "
|
|
bitfld.long 0x00 10. " OTGDISABLE ,OTG Block Disable" "No,Yes"
|
|
bitfld.long 0x00 9. " TXBITSTUFFEN ,Transmit Bit-Stuffing Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " COMMONONN ,Common block power down control" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " PORTRESET ,Per-port reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 6. " FSXCVROWNER ,UTMI or serial interface select" "UTMI+,TXENABLEN/FSDATAEXT/FSSE0EXT"
|
|
bitfld.long 0x00 4.--5. " REFCLKSEL ,Reference clock select for frequency block" "Crystal,2.5-V clock,CLKCORE,CLKCORE"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " REFCLKDIV ,Reference clock frequency divider" "12 MHz,24 MHz,48 MHz,?..."
|
|
bitfld.long 0x00 1. " PH_RESET ,PHY reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 0. " XCLK_GATING ,XClk Gating" "Disabled,Enabled"
|
|
endif
|
|
width 20.
|
|
group.long 0x208++0x07
|
|
line.long 0x00 "USBTESTCNTL,USB Test Control and Status Register"
|
|
bitfld.long 0x00 18. " VATESTENB ,Analog test enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " TESTCLK0 ,Clocking Signal for TESTDATAIN[7:0]" "Low,High"
|
|
textline " "
|
|
hexmask.long.byte 0x00 9.--16. 1. " TESTDATAIN0 ,TESTDATA write bus"
|
|
textline " "
|
|
bitfld.long 0x00 5.--8. " TESTADDR0 ,Test Interface register address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TESTDATAOUTSEL ,Test Data Out Select" "Internally generated signals,Test register contents"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " TESTDATAOUT0 ,Test data read bus" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "USBTUNECNTL,USB Tune Control Register"
|
|
bitfld.long 0x04 19.--21. " COMPDISTUNE0 ,Disconnect Threshold Adjustment" "- 6%,- 4.5%,- 3%,- 1.5%,Default,+ 1.5%,+ 3%,+ 4.5%"
|
|
bitfld.long 0x04 16.--18. " OTGTUNE ,VBUS Valid Threshold Adjustment" "- 12%,- 9%,- 6%,- 3%,Default,+ 3%,+ 6%,+ 9%"
|
|
textline " "
|
|
bitfld.long 0x04 12.--14. " SQRXTUNE0 ,Squelch Threshold Adjustment" "+ 15%,+ 10%,+ 5%,Default,- 5%,- 10%,- 15%,- 20%"
|
|
bitfld.long 0x04 8.--11. " TXFSLSTUNE0 ,FS/ LS Source Impedence Adjustment" "+ 5%,+ 2.5%,Reserved,Default,Reserved,Reserved,Reserved,- 2.5%,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,- 5%"
|
|
textline " "
|
|
bitfld.long 0x04 7. " TXPREEMPHASISTINE0 ,HS Transmitter Pre-Emphasis Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " TXRISETUNE0 ,HS Transmitter Rise/ Fall Time Adjustment" "Default,- 8%"
|
|
textline " "
|
|
bitfld.long 0x04 2.--5. " TXVREFTUNE0 ,HS DC Voltage Level Adjustment" "-10%,-8.75%,-7.5%,-6.25%,-5%,-3.75%,-2.5%,-1.25%,Default,+ 1.25%,+ 2.5%,+ 3.75%,+ 5%,+ 6.25%,+ 7.5%,+ 8.75%"
|
|
bitfld.long 0x04 0.--1. " TXHSXVTUNE0 ,Transmitter High Speed Crossover Adjustment" "Reserved,- 15 mV,+15 mV,Default"
|
|
tree "Extended Registers"
|
|
if (((data.byte(asd:0x10200000+0x60))&0x04)==0x04)
|
|
group.word 0x304++0x01
|
|
line.word 0x00 "OTG_RQPKTCNT[1],OTG Request Packet Count Register for Endpoint 1"
|
|
else
|
|
hgroup.word 0x304++0x01
|
|
hide.word 0x00 "OTG_RQPKTCNT[1],OTG Request Packet Count Register for Endpoint 1"
|
|
endif
|
|
if (((data.byte(asd:0x10200000+0x60))&0x04)==0x04)
|
|
group.word 0x308++0x01
|
|
line.word 0x00 "OTG_RQPKTCNT[2],OTG Request Packet Count Register for Endpoint 2"
|
|
else
|
|
hgroup.word 0x308++0x01
|
|
hide.word 0x00 "OTG_RQPKTCNT[2],OTG Request Packet Count Register for Endpoint 2"
|
|
endif
|
|
if (((data.byte(asd:0x10200000+0x60))&0x04)==0x04)
|
|
group.word 0x30C++0x01
|
|
line.word 0x00 "OTG_RQPKTCNT[3],OTG Request Packet Count Register for Endpoint 3"
|
|
else
|
|
hgroup.word 0x30C++0x01
|
|
hide.word 0x00 "OTG_RQPKTCNT[3],OTG Request Packet Count Register for Endpoint 3"
|
|
endif
|
|
if (((data.byte(asd:0x10200000+0x60))&0x04)==0x04)
|
|
group.word 0x310++0x01
|
|
line.word 0x00 "OTG_RQPKTCNT[4],OTG Request Packet Count Register for Endpoint 4"
|
|
else
|
|
hgroup.word 0x310++0x01
|
|
hide.word 0x00 "OTG_RQPKTCNT[4],OTG Request Packet Count Register for Endpoint 4"
|
|
endif
|
|
if (((data.byte(asd:0x10200000+0x60))&0x04)==0x04)
|
|
group.word 0x314++0x01
|
|
line.word 0x00 "OTG_RQPKTCNT[5],OTG Request Packet Count Register for Endpoint 5"
|
|
else
|
|
hgroup.word 0x314++0x01
|
|
hide.word 0x00 "OTG_RQPKTCNT[5],OTG Request Packet Count Register for Endpoint 5"
|
|
endif
|
|
if (((data.byte(asd:0x10200000+0x60))&0x04)==0x04)
|
|
group.word 0x318++0x01
|
|
line.word 0x00 "OTG_RQPKTCNT[6],OTG Request Packet Count Register for Endpoint 6"
|
|
else
|
|
hgroup.word 0x318++0x01
|
|
hide.word 0x00 "OTG_RQPKTCNT[6],OTG Request Packet Count Register for Endpoint 6"
|
|
endif
|
|
if (((data.byte(asd:0x10200000+0x60))&0x04)==0x04)
|
|
group.word 0x31C++0x01
|
|
line.word 0x00 "OTG_RQPKTCNT[7],OTG Request Packet Count Register for Endpoint 7"
|
|
else
|
|
hgroup.word 0x31C++0x01
|
|
hide.word 0x00 "OTG_RQPKTCNT[7],OTG Request Packet Count Register for Endpoint 7"
|
|
endif
|
|
if (((data.byte(asd:0x10200000+0x60))&0x04)==0x04)
|
|
group.word 0x320++0x01
|
|
line.word 0x00 "OTG_RQPKTCNT[8],OTG Request Packet Count Register for Endpoint 8"
|
|
else
|
|
hgroup.word 0x320++0x01
|
|
hide.word 0x00 "OTG_RQPKTCNT[8],OTG Request Packet Count Register for Endpoint 8"
|
|
endif
|
|
if (((data.byte(asd:0x10200000+0x60))&0x04)==0x04)
|
|
group.word 0x324++0x01
|
|
line.word 0x00 "OTG_RQPKTCNT[9],OTG Request Packet Count Register for Endpoint 9"
|
|
else
|
|
hgroup.word 0x324++0x01
|
|
hide.word 0x00 "OTG_RQPKTCNT[9],OTG Request Packet Count Register for Endpoint 9"
|
|
endif
|
|
if (((data.byte(asd:0x10200000+0x60))&0x04)==0x04)
|
|
group.word 0x328++0x01
|
|
line.word 0x00 "OTG_RQPKTCNT[10],OTG Request Packet Count Register for Endpoint 10"
|
|
else
|
|
hgroup.word 0x328++0x01
|
|
hide.word 0x00 "OTG_RQPKTCNT[10],OTG Request Packet Count Register for Endpoint 10"
|
|
endif
|
|
if (((data.byte(asd:0x10200000+0x60))&0x04)==0x04)
|
|
group.word 0x32C++0x01
|
|
line.word 0x00 "OTG_RQPKTCNT[11],OTG Request Packet Count Register for Endpoint 11"
|
|
else
|
|
hgroup.word 0x32C++0x01
|
|
hide.word 0x00 "OTG_RQPKTCNT[11],OTG Request Packet Count Register for Endpoint 11"
|
|
endif
|
|
if (((data.byte(asd:0x10200000+0x60))&0x04)==0x04)
|
|
group.word 0x330++0x01
|
|
line.word 0x00 "OTG_RQPKTCNT[12],OTG Request Packet Count Register for Endpoint 12"
|
|
else
|
|
hgroup.word 0x330++0x01
|
|
hide.word 0x00 "OTG_RQPKTCNT[12],OTG Request Packet Count Register for Endpoint 12"
|
|
endif
|
|
if (((data.byte(asd:0x10200000+0x60))&0x04)==0x04)
|
|
group.word 0x334++0x01
|
|
line.word 0x00 "OTG_RQPKTCNT[13],OTG Request Packet Count Register for Endpoint 13"
|
|
else
|
|
hgroup.word 0x334++0x01
|
|
hide.word 0x00 "OTG_RQPKTCNT[13],OTG Request Packet Count Register for Endpoint 13"
|
|
endif
|
|
if (((data.byte(asd:0x10200000+0x60))&0x04)==0x04)
|
|
group.word 0x338++0x01
|
|
line.word 0x00 "OTG_RQPKTCNT[14],OTG Request Packet Count Register for Endpoint 14"
|
|
else
|
|
hgroup.word 0x338++0x01
|
|
hide.word 0x00 "OTG_RQPKTCNT[14],OTG Request Packet Count Register for Endpoint 14"
|
|
endif
|
|
if (((data.byte(asd:0x10200000+0x60))&0x04)==0x04)
|
|
group.word 0x33C++0x01
|
|
line.word 0x00 "OTG_RQPKTCNT[15],OTG Request Packet Count Register for Endpoint 15"
|
|
else
|
|
hgroup.word 0x33C++0x01
|
|
hide.word 0x00 "OTG_RQPKTCNT[15],OTG Request Packet Count Register for Endpoint 15"
|
|
endif
|
|
group.word 0x340++0x07
|
|
line.word 0x00 "OTG_RXDPKTBUFDIS,OTG Double Packet Buffer Disable Rx Register"
|
|
bitfld.word 0x00 15. " EP15_RXDIS ,Rx Double Packet Buffer Disable for Endpoint 15" "Not asserted,Asserted"
|
|
bitfld.word 0x00 14. " EP14_RXDIS ,Rx Double Packet Buffer Disable for Endpoint 14" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.word 0x00 13. " EP13_RXDIS ,Rx Double Packet Buffer Disable for Endpoint 13" "Not asserted,Asserted"
|
|
bitfld.word 0x00 12. " EP12_RXDIS ,Rx Double Packet Buffer Disable for Endpoint 12" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.word 0x00 11. " EP11_RXDIS ,Rx Double Packet Buffer Disable for Endpoint 11" "Not asserted,Asserted"
|
|
bitfld.word 0x00 10. " EP10_RXDIS ,Rx Double Packet Buffer Disable for Endpoint 10" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.word 0x00 9. " EP9_RXDIS ,Rx Double Packet Buffer Disable for Endpoint 9" "Not asserted,Asserted"
|
|
bitfld.word 0x00 8. " EP8_RXDIS ,Rx Double Packet Buffer Disable for Endpoint 8" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.word 0x00 7. " EP7_RXDIS ,Rx Double Packet Buffer Disable for Endpoint 7" "Not asserted,Asserted"
|
|
bitfld.word 0x00 6. " EP6_RXDIS ,Rx Double Packet Buffer Disable for Endpoint 6" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.word 0x00 5. " EP5_RXDIS ,Rx Double Packet Buffer Disable for Endpoint 5" "Not asserted,Asserted"
|
|
bitfld.word 0x00 4. " EP4_RXDIS ,Rx Double Packet Buffer Disable for Endpoint 4" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.word 0x00 3. " EP3_RXDIS ,Rx Double Packet Buffer Disable for Endpoint 3" "Not asserted,Asserted"
|
|
bitfld.word 0x00 2. " EP2_RXDIS ,Rx Double Packet Buffer Disable for Endpoint 2" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.word 0x00 1. " EP1_RXDIS ,Rx Double Packet Buffer Disable for Endpoint 1" "Not asserted,Asserted"
|
|
line.word 0x02 "OTG_TXDPKTBUFDIS,OTG Double Packet Buffer Disable Tx Register"
|
|
bitfld.word 0x02 15. " EP15_TXDIS ,Tx Double Packet Buffer Disable for Endpoint 15" "Not asserted,Asserted"
|
|
bitfld.word 0x02 14. " EP14_TXDIS ,Tx Double Packet Buffer Disable for Endpoint 14" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.word 0x02 13. " EP13_TXDIS ,Tx Double Packet Buffer Disable for Endpoint 13" "Not asserted,Asserted"
|
|
bitfld.word 0x02 12. " EP12_TXDIS ,Tx Double Packet Buffer Disable for Endpoint 12" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.word 0x02 11. " EP11_TXDIS ,Tx Double Packet Buffer Disable for Endpoint 11" "Not asserted,Asserted"
|
|
bitfld.word 0x02 10. " EP10_TXDIS ,Tx Double Packet Buffer Disable for Endpoint 10" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.word 0x02 9. " EP9_TXDIS ,Tx Double Packet Buffer Disable for Endpoint 9" "Not asserted,Asserted"
|
|
bitfld.word 0x02 8. " EP8_TXDIS ,Tx Double Packet Buffer Disable for Endpoint 8" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.word 0x02 7. " EP7_TXDIS ,Tx Double Packet Buffer Disable for Endpoint 7" "Not asserted,Asserted"
|
|
bitfld.word 0x02 6. " EP6_TXDIS ,Tx Double Packet Buffer Disable for Endpoint 6" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.word 0x02 5. " EP5_TXDIS ,Tx Double Packet Buffer Disable for Endpoint 5" "Not asserted,Asserted"
|
|
bitfld.word 0x02 4. " EP4_TXDIS ,Tx Double Packet Buffer Disable for Endpoint 4" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.word 0x02 3. " EP3_TXDIS ,Tx Double Packet Buffer Disable for Endpoint 3" "Not asserted,Asserted"
|
|
bitfld.word 0x02 2. " EP2_TXDIS ,Tx Double Packet Buffer Disable for Endpoint 2" "Not asserted,Asserted"
|
|
textline " "
|
|
bitfld.word 0x02 1. " EP1_TXDIS ,Tx Double Packet Buffer Disable for Endpoint 1" "Not asserted,Asserted"
|
|
line.word 0x04 "OTG_CTUCH,OTG Chirp Time-out Register"
|
|
line.word 0x06 "OTG_CTHSRTN,OTG High-Speed Resume Signaling Register"
|
|
tree.end
|
|
width 0xb
|
|
tree.end
|
|
tree.open "UART (Asynchronous Serial Ports)"
|
|
tree "UART0"
|
|
base asd:0x101FD000
|
|
width 23.
|
|
hgroup.long 0x00++0x03
|
|
hide.long 0x00 "UART0_DR,UART0 Data Register"
|
|
in
|
|
group.long 0x04++0x0B
|
|
line.long 0x00 "UART0_RSR/ECR,UART0 Receive Status/Error Clear Register"
|
|
eventfld.long 0x00 3. " OE ,Overrun Error" "No error,Error"
|
|
eventfld.long 0x00 2. " BE ,Break Error" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 1. " PE ,Parity Error" "No error,Error"
|
|
eventfld.long 0x00 0. " FE ,Framing Error" "No error,Error"
|
|
line.long 0x04 "UART0_DMAWM,UART0 DMA Watermark Register"
|
|
bitfld.long 0x04 3.--5. " RXDMAWM ,Receive DMA Watermark" "1/64,1/32,1/16,1/8,1/4,1/2,3/4,?..."
|
|
bitfld.long 0x04 0.--2. " TXDMAWM ,Transmit DMA Watermark" "1/64,1/32,1/16,1/8,1/4,1/2,3/4,?..."
|
|
line.long 0x08 "UART0_TIMEOUT,UART0 Timeout Register"
|
|
hexmask.long.tbyte 0x08 0.--21. 1. " N ,Timeoiut Period Configuration"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "UART0_FR,UART0 Flag Register"
|
|
bitfld.long 0x00 13. " RTXDIS ,Remote Transmitter Disabled" "No,Yes"
|
|
bitfld.long 0x00 9. " DCTS ,Delta Clear To Send" "Not changed,Changed"
|
|
bitfld.long 0x00 7. " TXFE ,Transmit FIFO Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RXFF ,Receive FIFO Full" "Not full,Full"
|
|
bitfld.long 0x00 5. " TXFF ,Transmit FIFO Full" "Not full,Full"
|
|
bitfld.long 0x00 4. " RXFE ,Receive FIFO Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BUSY ,UARTx Busy" "Not busy,Busy"
|
|
bitfld.long 0x00 0. " CTS ,Clear To Send" "Not cleared,Cleared"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "UART0_LCRH_RX,UART0 Receive Line Control Register"
|
|
bitfld.long 0x00 7. " SPS_RX ,RX Stick parity select" "Disabled,Enabled"
|
|
bitfld.long 0x00 5.--6. " WLEN_RX ,RX Word length" "5,6,7,8"
|
|
bitfld.long 0x00 4. " FEN_RX ,RX Enable FIFOs" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STP2_RX ,RX Two stop bits select" "1,2"
|
|
bitfld.long 0x00 2. " EPS_RX ,RX even parity select" "Odd,Even"
|
|
bitfld.long 0x00 1. " PEN_RX ,RX parity enable" "Disabled,Enabled"
|
|
group.long 0x24++0x17
|
|
line.long 0x00 "UART0_IBRD,UART0 Integer Baud Rate Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " DIVINT ,Baud Rate Integer"
|
|
line.long 0x04 "UART0_FBRD,UART0 Fractional Baud Rate Register"
|
|
hexmask.long.byte 0x04 0.--5. 1. " DIVFRAC ,Baud Rate Fraction"
|
|
line.long 0x08 "UART0_LCRH_TX,UART0 Transmit Line Control Register"
|
|
bitfld.long 0x08 7. " SPS_TX ,TX Stick Parity Select" "Disabled,Enabled"
|
|
bitfld.long 0x08 5.--6. " WLEN_TX ,TX Word Length" "5,6,7,8"
|
|
bitfld.long 0x08 4. " FEN_TX ,TX Enable FIFOs" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 3. " STP2_TX ,TX Two Stop Bits Select" "1,2"
|
|
bitfld.long 0x08 2. " EPS_TX ,TX Even Parity Select" "Odd,Even"
|
|
bitfld.long 0x08 1. " PEN_TX ,TX Parity Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 0. " BRK ,TX Send Break" "Normal,Break"
|
|
line.long 0x0c "UART0_CR,UART0 Control Register"
|
|
bitfld.long 0x0C 15. " CTSEN ,CTS Hardware Flow Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 14. " RTSEN ,RTS Hardware Flow Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 11. " RTS ,Request To Send" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " DTR ,Data Transmit Ready" "High,Low"
|
|
bitfld.long 0x0C 9. " RXE ,Receive Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 8. " TXE ,Transmit Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " LBE ,Loop Back Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 3. " OVSFACT ,UART Oversampling Factor" "16,8"
|
|
bitfld.long 0x0C 0. " UARTEN ,UART Enable" "Disabled,Enabled"
|
|
line.long 0x10 "UART0_IFLS,UART0 Interrupt FIFO Level Select Register"
|
|
bitfld.long 0x10 3.--5. " RXIFLSEL ,Receive Interrupt FIFO Level Select" "1/64,1/32,1/16,1/8,1/4,1/2,3/4,?..."
|
|
bitfld.long 0x10 0.--2. " TXIFLSEL ,Transmit Interrupt FIFO Level Select" "1/64,1/32,1/16,1/8,1/4,1/2,3/4,?..."
|
|
line.long 0x14 "UART0_IMSC,UART0 Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x14 12. " TXFEIM ,TX FIFO Empty Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x14 11. " XOFFIM ,XOFF Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x14 10. " OEIM ,Overrun Error Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x14 9. " BEIM ,Break Error Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x14 8. " PEIM ,Parity Error Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x14 7. " FEIM ,Framing Error Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x14 6. " RTIM ,Receive Timeout Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x14 5. " TXIM ,Transmit Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x14 4. " RXIM ,Receive Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x14 1. " CTSMI ,Clear To Send Modem Interrupt Mask" "Not masked,Masked"
|
|
rgroup.long 0x3c++0x07
|
|
line.long 0x00 "UART0_RIS,UART0 Raw Interrupt Register"
|
|
bitfld.long 0x00 12. " TXFERIS ,TX FIFO Empty Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 11. " XOFFRIS ,Xoff Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 10. " OERIS ,Overrun Error Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 9. " BERIS ,Break Error Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " PERIS ,Parity Error Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 7. " FERIS ,Framing Error Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RTRIS ,Receive Timeout Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " TXRIS ,Transmit Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " RXRIS ,Receive Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CTSRMIS ,Clear To Send Modem Interrupt Status" "No interrupt,Interrupt"
|
|
line.long 0x04 "UART0_MIS,UART0 Masked Interrupt Register"
|
|
bitfld.long 0x04 12. " TXFEMIS ,TX FIFO Empty Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 11. " XOFFMIS ,XOFF Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 10. " OEMIS ,Overrun Error Masked Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 9. " BEMIS ,Break Error Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 8. " PEMIS ,Parity Error Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 7. " FEMIS ,Framing Error Masked Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 6. " RTMIS ,Receive Timeout Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 5. " TXMIS ,Transmit Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 4. " RXMIS ,Receive Masked Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 1. " CTSRMIS ,Clear To Send Modem Masked Interrupt Status" "No interrupt,Interrupt"
|
|
group.long 0x44++0x07
|
|
line.long 0x00 "UART0_ICR,UART0 Interrupt Clear Register"
|
|
bitfld.long 0x00 12. " TXFEIC ,TX FIFO Empty Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 11. " XOFFIC ,XOFF Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 10. " OEIC ,Overrun Error Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 9. " BEIC ,Break Error Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 8. " PEIC ,Parity Error Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 7. " FEIC ,Framing Error Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 5. " TXIC ,Transmit Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 4. " RXIC ,Receive Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CTSRIC ,Clear To Send Modem Interrupt Clear" "No effect,Clear"
|
|
line.long 0x04 "UART0_DMACR,UART0 DMA Control Register"
|
|
bitfld.long 0x04 2. " DMAONERR ,DMA On Error" "Low,High"
|
|
bitfld.long 0x04 1. " TXDMAE ,Transmit DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 0. " RXDMAE ,Receive DMA Enable" "Disabled,Enabled"
|
|
group.long 0x50++0x13
|
|
line.long 0x00 "UART0_XFCR,UART0 XON/XOFF Control Register"
|
|
textline " "
|
|
bitfld.long 0x00 6. " SPECHR ,Special Character detection" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " XONANY ,Xon-any" "Must match,Any"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " SFTMOD ,Software Transmit Flow Control Mode" "Disabled,Xon1/Xoff1,Xon2/Xoff2,Xon1&Xon2/Xoff1&Xoff2"
|
|
bitfld.long 0x00 1.--2. " SFRFMOD ,Software Receive Flow Control Mode" "Disabled,Xon1/Xoff1,Xon2/Xoff2,Xon1&Xon2/Xoff1&Xoff2"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SFEN ,Software Flow control Enable" "Disabled,Enabled"
|
|
line.long 0x04 "UART0_XON1,UART0 XON1 Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " XON1 ,Xon1 character used in the software flow control"
|
|
line.long 0x08 "UART0_XON2,UART0 XON2 Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " XON2 ,Xon1 character used in the software flow control"
|
|
line.long 0x0c "UART0_XOFF1,UART0 XOFF1 Register"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " XOFF1 ,Xoff1 character used in the software flow control"
|
|
line.long 0x10 "UART0_XOFF2,UART0 XOFF2 Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. " XOFF2 ,Xoff2 character used in the software flow control"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "UART0_ABCR,UART0 Autobaud Control Register"
|
|
bitfld.long 0x00 2. " UPDATEN ,Autobaud Update Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " RESTART ,Autobaud Restart Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ACFGEN ,AutoConfig Enable" "Disabled,Enabled"
|
|
if (((d.l(asd:0x101FD000+0x104))&0x1100)==0x1100)
|
|
rgroup.long 0x104++0x07
|
|
line.long 0x00 "UART0_ABSR,UART0 Autobaud Status Register"
|
|
bitfld.long 0x00 12. " ACDONE ,AutoConfig Complete Status" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BAUDERR ,Invalid Baudrate Status" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " CMDERR ,Bad Command Sequence Detected" "Not detected,Character (at) OK,Character (a/) OK,Invalid character"
|
|
textline " "
|
|
bitfld.long 0x00 8. " VALFMT ,Valid Format Detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 3.--7. " BYTE1S ,Byte 1 Status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " BYTE2S ,Byte 2 Status" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "UART0_ABFMT,UART0 Autobaud Format Register"
|
|
bitfld.long 0x04 5.--6. " WLEN ,Word Length" "Reserved,Reserved,7,8"
|
|
textline " "
|
|
bitfld.long 0x04 4. " FEN ,FIFO Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " STP2 ,Two Stop Bits select" "1,2"
|
|
textline " "
|
|
bitfld.long 0x04 2. " EPS ,Even Parity Select" "Odd,Even"
|
|
textline " "
|
|
bitfld.long 0x04 1. " PEN ,Parity Enable" "Disabled,Enabled"
|
|
elif (((d.l(asd:0x101FD000+0x104))&0x1100)==0x1000)
|
|
rgroup.long 0x104++0x07
|
|
line.long 0x00 "UART0_ABSR,UART0 Autobaud Status Register"
|
|
bitfld.long 0x00 12. " ACDONE ,AutoConfig Complete Status" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BAUDERR ,Invalid Baudrate Status" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " CMDERR ,Bad Command Sequence Detected" "Not detected,Character (at) OK,Character (a/) OK,Invalid character"
|
|
textline " "
|
|
bitfld.long 0x00 8. " VALFMT ,Valid Format Detected" "Not detected,Detected"
|
|
line.long 0x04 "UART0_ABFMT,UART0 Autobaud Format Register"
|
|
bitfld.long 0x04 4. " FEN ,FIFO Enable" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x104++0x07
|
|
line.long 0x00 "UART0_ABSR,UART0 Autobaud Status Register"
|
|
bitfld.long 0x00 12. " ACDONE ,AutoConfig Complete Status" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 8. " VALFMT ,Valid Format Detected" "Not detected,Detected"
|
|
line.long 0x04 "UART0_ABFMT,UART0 Autobaud Format Register"
|
|
bitfld.long 0x04 4. " FEN ,FIFO Enable" "Disabled,Enabled"
|
|
endif
|
|
rgroup.long 0x150++0x0b
|
|
line.long 0x00 "UART0_ABDR,UART0 Autobaud Divisor Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " AUTOBAUDBDR ,AutoBaud Divisor value"
|
|
line.long 0x04 "UART0_ABDFR,UART0 Autobaud Divisor Fraction Register"
|
|
hexmask.long.byte 0x04 0.--5. 1. " AUTOBAUDBDFR ,AutoBaud Divisor Fraction value"
|
|
line.long 0x08 "UART0_ABMR,UART0 Autobaud Measurement Register"
|
|
hexmask.long.tbyte 0x08 0.--19. 1. " AUTOBAUDBMR ,AutoBaud Measurement value"
|
|
group.long 0x15c++0x03
|
|
line.long 0x00 "UART0_ABIMSC,UART0 Autobaud Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x00 1. " ABDONEIM ,Autobaud Done Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " ABERRIM ,Autobaud Error Interrupt Mask" "Not masked,Masked"
|
|
rgroup.long 0x160++0x07
|
|
line.long 0x00 "UART0_ABRIS,UART0 Autobaud Raw Interrupt Register"
|
|
bitfld.long 0x00 1. " ABDONERIS ,Overrun Error Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " ABERRRIS ,Break Error Interrupt Status" "No interrupt,Interrupt"
|
|
line.long 0x04 "UART0_ABMIS,UART0 Autobaud Masked Interrupt Register"
|
|
bitfld.long 0x04 1. " ABDONEMIS ,Autobaud Done Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 0. " ABERRMIS ,Autobaud Error Masked Interrupt Status" "No interrupt,Interrupt"
|
|
group.long 0x168++0x03
|
|
line.long 0x00 "UART0_ABICR,UART0 Autobaud Interrupt Clear Register"
|
|
bitfld.long 0x00 1. " ABDONEIC ,Autobaud Done Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " ABERRIC ,Autobaud Error Interrupt Clear" "No effect,Clear"
|
|
rgroup.long 0xfd8++0x7
|
|
line.long 0x00 "UART0_ID_PRODUCT_H_XY,UARTx Identification Product Register"
|
|
hexmask.long.byte 0x00 10.--17. 1. " PRODUCT_ID ,Revision number"
|
|
bitfld.long 0x00 8.--9. " H ,Integration Number" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " X ,UART Product Identification" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " Y ,UART Product Identification" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "UART0_ID_PROVIDER,UART0 Identification Provider Register"
|
|
hexmask.long.word 0x04 0.--13. 1. " PROVIDER_ID ,Provider Identification"
|
|
rgroup.long 0xfe0++0x01f
|
|
line.long 0x00 "UART0_PERIPHID0,UART0 Peripheral Identification Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PN0 ,Part Number 0 (0x02)"
|
|
line.long 0x04 "UART0_PERIPHID1,UART0 Peripheral Identification Register 1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " D0 ,Designer 0 (0x00)"
|
|
hexmask.long.byte 0x04 0.--3. 1. " PN1 ,Part Number 1 (0x08)"
|
|
line.long 0x08 "UART0_PERIPHID2,UART0 Peripheral Identification Register 2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " REV ,Revision (0x02)"
|
|
hexmask.long.byte 0x08 0.--3. 1. " D1 ,Designer 1 (0x08)"
|
|
line.long 0x0c "UART0_PERIPHID3,UART0 Peripheral Identification Register 3"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " CONF ,Configuration (0x00)"
|
|
line.long 0x10 "UART0_PCELLID0,UART0 PCell Identification Register 0"
|
|
hexmask.long.byte 0x10 0.--7. 1. " UART0PCELLID0 ,UART0 PCell ID0 (0x0D)"
|
|
line.long 0x14 "UART0_PCELLID1,UART0 PCell Identification Register 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " UART0PCELLID1 ,UART0 PCell ID1 (0xF0)"
|
|
line.long 0x18 "UART0_PCELLID2,UART0 PCell Identification Register 2"
|
|
hexmask.long.byte 0x18 0.--7. 1. " UART0PCELLID2 ,UART0 PCell ID2 (0x05)"
|
|
line.long 0x1c "UART0_PCELLID3,UART0 PCell Identification Register 3"
|
|
hexmask.long.byte 0x1c 0.--7. 1. " UART0PCELLID3 ,UART0 PCell ID3 (0xB1)"
|
|
width 0xb
|
|
tree.end
|
|
tree "UART1"
|
|
base asd:0x101FB000
|
|
width 23.
|
|
hgroup.long 0x00++0x03
|
|
hide.long 0x00 "UART1_DR,UART1 Data Register"
|
|
in
|
|
group.long 0x04++0x0B
|
|
line.long 0x00 "UART1_RSR/ECR,UART1 Receive Status/Error Clear Register"
|
|
eventfld.long 0x00 3. " OE ,Overrun Error" "No error,Error"
|
|
eventfld.long 0x00 2. " BE ,Break Error" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 1. " PE ,Parity Error" "No error,Error"
|
|
eventfld.long 0x00 0. " FE ,Framing Error" "No error,Error"
|
|
line.long 0x04 "UART1_DMAWM,UART1 DMA Watermark Register"
|
|
bitfld.long 0x04 3.--5. " RXDMAWM ,Receive DMA Watermark" "1/64,1/32,1/16,1/8,1/4,1/2,3/4,?..."
|
|
bitfld.long 0x04 0.--2. " TXDMAWM ,Transmit DMA Watermark" "1/64,1/32,1/16,1/8,1/4,1/2,3/4,?..."
|
|
line.long 0x08 "UART1_TIMEOUT,UART1 Timeout Register"
|
|
hexmask.long.tbyte 0x08 0.--21. 1. " N ,Timeoiut Period Configuration"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "UART1_FR,UART1 Flag Register"
|
|
bitfld.long 0x00 13. " RTXDIS ,Remote Transmitter Disabled" "No,Yes"
|
|
bitfld.long 0x00 9. " DCTS ,Delta Clear To Send" "Not changed,Changed"
|
|
bitfld.long 0x00 7. " TXFE ,Transmit FIFO Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RXFF ,Receive FIFO Full" "Not full,Full"
|
|
bitfld.long 0x00 5. " TXFF ,Transmit FIFO Full" "Not full,Full"
|
|
bitfld.long 0x00 4. " RXFE ,Receive FIFO Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BUSY ,UARTx Busy" "Not busy,Busy"
|
|
bitfld.long 0x00 0. " CTS ,Clear To Send" "Not cleared,Cleared"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "UART1_LCRH_RX,UART1 Receive Line Control Register"
|
|
bitfld.long 0x00 7. " SPS_RX ,RX Stick parity select" "Disabled,Enabled"
|
|
bitfld.long 0x00 5.--6. " WLEN_RX ,RX Word length" "5,6,7,8"
|
|
bitfld.long 0x00 4. " FEN_RX ,RX Enable FIFOs" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STP2_RX ,RX Two stop bits select" "1,2"
|
|
bitfld.long 0x00 2. " EPS_RX ,RX even parity select" "Odd,Even"
|
|
bitfld.long 0x00 1. " PEN_RX ,RX parity enable" "Disabled,Enabled"
|
|
group.long 0x24++0x17
|
|
line.long 0x00 "UART1_IBRD,UART1 Integer Baud Rate Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " DIVINT ,Baud Rate Integer"
|
|
line.long 0x04 "UART1_FBRD,UART1 Fractional Baud Rate Register"
|
|
hexmask.long.byte 0x04 0.--5. 1. " DIVFRAC ,Baud Rate Fraction"
|
|
line.long 0x08 "UART1_LCRH_TX,UART1 Transmit Line Control Register"
|
|
bitfld.long 0x08 7. " SPS_TX ,TX Stick Parity Select" "Disabled,Enabled"
|
|
bitfld.long 0x08 5.--6. " WLEN_TX ,TX Word Length" "5,6,7,8"
|
|
bitfld.long 0x08 4. " FEN_TX ,TX Enable FIFOs" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 3. " STP2_TX ,TX Two Stop Bits Select" "1,2"
|
|
bitfld.long 0x08 2. " EPS_TX ,TX Even Parity Select" "Odd,Even"
|
|
bitfld.long 0x08 1. " PEN_TX ,TX Parity Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 0. " BRK ,TX Send Break" "Normal,Break"
|
|
line.long 0x0c "UART1_CR,UART1 Control Register"
|
|
bitfld.long 0x0C 15. " CTSEN ,CTS Hardware Flow Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 14. " RTSEN ,RTS Hardware Flow Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 11. " RTS ,Request To Send" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " DTR ,Data Transmit Ready" "High,Low"
|
|
bitfld.long 0x0C 9. " RXE ,Receive Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 8. " TXE ,Transmit Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " LBE ,Loop Back Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 3. " OVSFACT ,UART Oversampling Factor" "16,8"
|
|
bitfld.long 0x0C 0. " UARTEN ,UART Enable" "Disabled,Enabled"
|
|
line.long 0x10 "UART1_IFLS,UART1 Interrupt FIFO Level Select Register"
|
|
bitfld.long 0x10 3.--5. " RXIFLSEL ,Receive Interrupt FIFO Level Select" "1/64,1/32,1/16,1/8,1/4,1/2,3/4,?..."
|
|
bitfld.long 0x10 0.--2. " TXIFLSEL ,Transmit Interrupt FIFO Level Select" "1/64,1/32,1/16,1/8,1/4,1/2,3/4,?..."
|
|
line.long 0x14 "UART1_IMSC,UART1 Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x14 12. " TXFEIM ,TX FIFO Empty Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x14 11. " XOFFIM ,XOFF Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x14 10. " OEIM ,Overrun Error Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x14 9. " BEIM ,Break Error Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x14 8. " PEIM ,Parity Error Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x14 7. " FEIM ,Framing Error Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x14 6. " RTIM ,Receive Timeout Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x14 5. " TXIM ,Transmit Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x14 4. " RXIM ,Receive Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x14 1. " CTSMI ,Clear To Send Modem Interrupt Mask" "Not masked,Masked"
|
|
rgroup.long 0x3c++0x07
|
|
line.long 0x00 "UART1_RIS,UART1 Raw Interrupt Register"
|
|
bitfld.long 0x00 12. " TXFERIS ,TX FIFO Empty Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 11. " XOFFRIS ,Xoff Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 10. " OERIS ,Overrun Error Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 9. " BERIS ,Break Error Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " PERIS ,Parity Error Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 7. " FERIS ,Framing Error Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RTRIS ,Receive Timeout Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " TXRIS ,Transmit Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " RXRIS ,Receive Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CTSRMIS ,Clear To Send Modem Interrupt Status" "No interrupt,Interrupt"
|
|
line.long 0x04 "UART1_MIS,UART1 Masked Interrupt Register"
|
|
bitfld.long 0x04 12. " TXFEMIS ,TX FIFO Empty Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 11. " XOFFMIS ,XOFF Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 10. " OEMIS ,Overrun Error Masked Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 9. " BEMIS ,Break Error Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 8. " PEMIS ,Parity Error Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 7. " FEMIS ,Framing Error Masked Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 6. " RTMIS ,Receive Timeout Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 5. " TXMIS ,Transmit Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 4. " RXMIS ,Receive Masked Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 1. " CTSRMIS ,Clear To Send Modem Masked Interrupt Status" "No interrupt,Interrupt"
|
|
group.long 0x44++0x07
|
|
line.long 0x00 "UART1_ICR,UART1 Interrupt Clear Register"
|
|
bitfld.long 0x00 12. " TXFEIC ,TX FIFO Empty Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 11. " XOFFIC ,XOFF Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 10. " OEIC ,Overrun Error Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 9. " BEIC ,Break Error Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 8. " PEIC ,Parity Error Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 7. " FEIC ,Framing Error Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 5. " TXIC ,Transmit Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 4. " RXIC ,Receive Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CTSRIC ,Clear To Send Modem Interrupt Clear" "No effect,Clear"
|
|
line.long 0x04 "UART1_DMACR,UART1 DMA Control Register"
|
|
bitfld.long 0x04 2. " DMAONERR ,DMA On Error" "Low,High"
|
|
bitfld.long 0x04 1. " TXDMAE ,Transmit DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 0. " RXDMAE ,Receive DMA Enable" "Disabled,Enabled"
|
|
group.long 0x50++0x13
|
|
line.long 0x00 "UART1_XFCR,UART1 XON/XOFF Control Register"
|
|
textline " "
|
|
bitfld.long 0x00 6. " SPECHR ,Special Character detection" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " XONANY ,Xon-any" "Must match,Any"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " SFTMOD ,Software Transmit Flow Control Mode" "Disabled,Xon1/Xoff1,Xon2/Xoff2,Xon1&Xon2/Xoff1&Xoff2"
|
|
bitfld.long 0x00 1.--2. " SFRFMOD ,Software Receive Flow Control Mode" "Disabled,Xon1/Xoff1,Xon2/Xoff2,Xon1&Xon2/Xoff1&Xoff2"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SFEN ,Software Flow control Enable" "Disabled,Enabled"
|
|
line.long 0x04 "UART1_XON1,UART1 XON1 Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " XON1 ,Xon1 character used in the software flow control"
|
|
line.long 0x08 "UART1_XON2,UART1 XON2 Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " XON2 ,Xon1 character used in the software flow control"
|
|
line.long 0x0c "UART1_XOFF1,UART1 XOFF1 Register"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " XOFF1 ,Xoff1 character used in the software flow control"
|
|
line.long 0x10 "UART1_XOFF2,UART1 XOFF2 Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. " XOFF2 ,Xoff2 character used in the software flow control"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "UART1_ABCR,UART1 Autobaud Control Register"
|
|
bitfld.long 0x00 2. " UPDATEN ,Autobaud Update Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " RESTART ,Autobaud Restart Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ACFGEN ,AutoConfig Enable" "Disabled,Enabled"
|
|
if (((d.l(asd:0x101FB000+0x104))&0x1100)==0x1100)
|
|
rgroup.long 0x104++0x07
|
|
line.long 0x00 "UART1_ABSR,UART1 Autobaud Status Register"
|
|
bitfld.long 0x00 12. " ACDONE ,AutoConfig Complete Status" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BAUDERR ,Invalid Baudrate Status" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " CMDERR ,Bad Command Sequence Detected" "Not detected,Character (at) OK,Character (a/) OK,Invalid character"
|
|
textline " "
|
|
bitfld.long 0x00 8. " VALFMT ,Valid Format Detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 3.--7. " BYTE1S ,Byte 1 Status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " BYTE2S ,Byte 2 Status" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "UART1_ABFMT,UART1 Autobaud Format Register"
|
|
bitfld.long 0x04 5.--6. " WLEN ,Word Length" "Reserved,Reserved,7,8"
|
|
textline " "
|
|
bitfld.long 0x04 4. " FEN ,FIFO Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " STP2 ,Two Stop Bits select" "1,2"
|
|
textline " "
|
|
bitfld.long 0x04 2. " EPS ,Even Parity Select" "Odd,Even"
|
|
textline " "
|
|
bitfld.long 0x04 1. " PEN ,Parity Enable" "Disabled,Enabled"
|
|
elif (((d.l(asd:0x101FB000+0x104))&0x1100)==0x1000)
|
|
rgroup.long 0x104++0x07
|
|
line.long 0x00 "UART1_ABSR,UART1 Autobaud Status Register"
|
|
bitfld.long 0x00 12. " ACDONE ,AutoConfig Complete Status" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BAUDERR ,Invalid Baudrate Status" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " CMDERR ,Bad Command Sequence Detected" "Not detected,Character (at) OK,Character (a/) OK,Invalid character"
|
|
textline " "
|
|
bitfld.long 0x00 8. " VALFMT ,Valid Format Detected" "Not detected,Detected"
|
|
line.long 0x04 "UART1_ABFMT,UART1 Autobaud Format Register"
|
|
bitfld.long 0x04 4. " FEN ,FIFO Enable" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x104++0x07
|
|
line.long 0x00 "UART1_ABSR,UART1 Autobaud Status Register"
|
|
bitfld.long 0x00 12. " ACDONE ,AutoConfig Complete Status" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 8. " VALFMT ,Valid Format Detected" "Not detected,Detected"
|
|
line.long 0x04 "UART1_ABFMT,UART1 Autobaud Format Register"
|
|
bitfld.long 0x04 4. " FEN ,FIFO Enable" "Disabled,Enabled"
|
|
endif
|
|
rgroup.long 0x150++0x0b
|
|
line.long 0x00 "UART1_ABDR,UART1 Autobaud Divisor Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " AUTOBAUDBDR ,AutoBaud Divisor value"
|
|
line.long 0x04 "UART1_ABDFR,UART1 Autobaud Divisor Fraction Register"
|
|
hexmask.long.byte 0x04 0.--5. 1. " AUTOBAUDBDFR ,AutoBaud Divisor Fraction value"
|
|
line.long 0x08 "UART1_ABMR,UART1 Autobaud Measurement Register"
|
|
hexmask.long.tbyte 0x08 0.--19. 1. " AUTOBAUDBMR ,AutoBaud Measurement value"
|
|
group.long 0x15c++0x03
|
|
line.long 0x00 "UART1_ABIMSC,UART1 Autobaud Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x00 1. " ABDONEIM ,Autobaud Done Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " ABERRIM ,Autobaud Error Interrupt Mask" "Not masked,Masked"
|
|
rgroup.long 0x160++0x07
|
|
line.long 0x00 "UART1_ABRIS,UART1 Autobaud Raw Interrupt Register"
|
|
bitfld.long 0x00 1. " ABDONERIS ,Overrun Error Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " ABERRRIS ,Break Error Interrupt Status" "No interrupt,Interrupt"
|
|
line.long 0x04 "UART1_ABMIS,UART1 Autobaud Masked Interrupt Register"
|
|
bitfld.long 0x04 1. " ABDONEMIS ,Autobaud Done Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 0. " ABERRMIS ,Autobaud Error Masked Interrupt Status" "No interrupt,Interrupt"
|
|
group.long 0x168++0x03
|
|
line.long 0x00 "UART1_ABICR,UART1 Autobaud Interrupt Clear Register"
|
|
bitfld.long 0x00 1. " ABDONEIC ,Autobaud Done Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " ABERRIC ,Autobaud Error Interrupt Clear" "No effect,Clear"
|
|
rgroup.long 0xfd8++0x7
|
|
line.long 0x00 "UART1_ID_PRODUCT_H_XY,UARTx Identification Product Register"
|
|
hexmask.long.byte 0x00 10.--17. 1. " PRODUCT_ID ,Revision number"
|
|
bitfld.long 0x00 8.--9. " H ,Integration Number" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " X ,UART Product Identification" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " Y ,UART Product Identification" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "UART1_ID_PROVIDER,UART1 Identification Provider Register"
|
|
hexmask.long.word 0x04 0.--13. 1. " PROVIDER_ID ,Provider Identification"
|
|
rgroup.long 0xfe0++0x01f
|
|
line.long 0x00 "UART1_PERIPHID0,UART1 Peripheral Identification Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PN0 ,Part Number 0 (0x02)"
|
|
line.long 0x04 "UART1_PERIPHID1,UART1 Peripheral Identification Register 1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " D0 ,Designer 0 (0x00)"
|
|
hexmask.long.byte 0x04 0.--3. 1. " PN1 ,Part Number 1 (0x08)"
|
|
line.long 0x08 "UART1_PERIPHID2,UART1 Peripheral Identification Register 2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " REV ,Revision (0x02)"
|
|
hexmask.long.byte 0x08 0.--3. 1. " D1 ,Designer 1 (0x08)"
|
|
line.long 0x0c "UART1_PERIPHID3,UART1 Peripheral Identification Register 3"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " CONF ,Configuration (0x00)"
|
|
line.long 0x10 "UART1_PCELLID0,UART1 PCell Identification Register 0"
|
|
hexmask.long.byte 0x10 0.--7. 1. " UART1PCELLID0 ,UART1 PCell ID0 (0x0D)"
|
|
line.long 0x14 "UART1_PCELLID1,UART1 PCell Identification Register 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " UART1PCELLID1 ,UART1 PCell ID1 (0xF0)"
|
|
line.long 0x18 "UART1_PCELLID2,UART1 PCell Identification Register 2"
|
|
hexmask.long.byte 0x18 0.--7. 1. " UART1PCELLID2 ,UART1 PCell ID2 (0x05)"
|
|
line.long 0x1c "UART1_PCELLID3,UART1 PCell Identification Register 3"
|
|
hexmask.long.byte 0x1c 0.--7. 1. " UART1PCELLID3 ,UART1 PCell ID3 (0xB1)"
|
|
width 0xb
|
|
tree.end
|
|
tree "UART2"
|
|
base asd:0x101F2000
|
|
width 23.
|
|
hgroup.long 0x00++0x03
|
|
hide.long 0x00 "UART2_DR,UART2 Data Register"
|
|
in
|
|
group.long 0x04++0x0B
|
|
line.long 0x00 "UART2_RSR/ECR,UART2 Receive Status/Error Clear Register"
|
|
eventfld.long 0x00 3. " OE ,Overrun Error" "No error,Error"
|
|
eventfld.long 0x00 2. " BE ,Break Error" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 1. " PE ,Parity Error" "No error,Error"
|
|
eventfld.long 0x00 0. " FE ,Framing Error" "No error,Error"
|
|
line.long 0x04 "UART2_DMAWM,UART2 DMA Watermark Register"
|
|
bitfld.long 0x04 3.--5. " RXDMAWM ,Receive DMA Watermark" "1/64,1/32,1/16,1/8,1/4,1/2,3/4,?..."
|
|
bitfld.long 0x04 0.--2. " TXDMAWM ,Transmit DMA Watermark" "1/64,1/32,1/16,1/8,1/4,1/2,3/4,?..."
|
|
line.long 0x08 "UART2_TIMEOUT,UART2 Timeout Register"
|
|
hexmask.long.tbyte 0x08 0.--21. 1. " N ,Timeoiut Period Configuration"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "UART2_FR,UART2 Flag Register"
|
|
bitfld.long 0x00 13. " RTXDIS ,Remote Transmitter Disabled" "No,Yes"
|
|
bitfld.long 0x00 9. " DCTS ,Delta Clear To Send" "Not changed,Changed"
|
|
bitfld.long 0x00 7. " TXFE ,Transmit FIFO Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RXFF ,Receive FIFO Full" "Not full,Full"
|
|
bitfld.long 0x00 5. " TXFF ,Transmit FIFO Full" "Not full,Full"
|
|
bitfld.long 0x00 4. " RXFE ,Receive FIFO Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BUSY ,UARTx Busy" "Not busy,Busy"
|
|
bitfld.long 0x00 0. " CTS ,Clear To Send" "Not cleared,Cleared"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "UART2_LCRH_RX,UART2 Receive Line Control Register"
|
|
bitfld.long 0x00 7. " SPS_RX ,RX Stick parity select" "Disabled,Enabled"
|
|
bitfld.long 0x00 5.--6. " WLEN_RX ,RX Word length" "5,6,7,8"
|
|
bitfld.long 0x00 4. " FEN_RX ,RX Enable FIFOs" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STP2_RX ,RX Two stop bits select" "1,2"
|
|
bitfld.long 0x00 2. " EPS_RX ,RX even parity select" "Odd,Even"
|
|
bitfld.long 0x00 1. " PEN_RX ,RX parity enable" "Disabled,Enabled"
|
|
group.long 0x24++0x17
|
|
line.long 0x00 "UART2_IBRD,UART2 Integer Baud Rate Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " DIVINT ,Baud Rate Integer"
|
|
line.long 0x04 "UART2_FBRD,UART2 Fractional Baud Rate Register"
|
|
hexmask.long.byte 0x04 0.--5. 1. " DIVFRAC ,Baud Rate Fraction"
|
|
line.long 0x08 "UART2_LCRH_TX,UART2 Transmit Line Control Register"
|
|
bitfld.long 0x08 7. " SPS_TX ,TX Stick Parity Select" "Disabled,Enabled"
|
|
bitfld.long 0x08 5.--6. " WLEN_TX ,TX Word Length" "5,6,7,8"
|
|
bitfld.long 0x08 4. " FEN_TX ,TX Enable FIFOs" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 3. " STP2_TX ,TX Two Stop Bits Select" "1,2"
|
|
bitfld.long 0x08 2. " EPS_TX ,TX Even Parity Select" "Odd,Even"
|
|
bitfld.long 0x08 1. " PEN_TX ,TX Parity Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 0. " BRK ,TX Send Break" "Normal,Break"
|
|
line.long 0x0c "UART2_CR,UART2 Control Register"
|
|
bitfld.long 0x0C 15. " CTSEN ,CTS Hardware Flow Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 14. " RTSEN ,RTS Hardware Flow Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 11. " RTS ,Request To Send" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " DTR ,Data Transmit Ready" "High,Low"
|
|
bitfld.long 0x0C 9. " RXE ,Receive Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 8. " TXE ,Transmit Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " LBE ,Loop Back Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 3. " OVSFACT ,UART Oversampling Factor" "16,8"
|
|
bitfld.long 0x0C 0. " UARTEN ,UART Enable" "Disabled,Enabled"
|
|
line.long 0x10 "UART2_IFLS,UART2 Interrupt FIFO Level Select Register"
|
|
bitfld.long 0x10 3.--5. " RXIFLSEL ,Receive Interrupt FIFO Level Select" "1/64,1/32,1/16,1/8,1/4,1/2,3/4,?..."
|
|
bitfld.long 0x10 0.--2. " TXIFLSEL ,Transmit Interrupt FIFO Level Select" "1/64,1/32,1/16,1/8,1/4,1/2,3/4,?..."
|
|
line.long 0x14 "UART2_IMSC,UART2 Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x14 12. " TXFEIM ,TX FIFO Empty Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x14 11. " XOFFIM ,XOFF Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x14 10. " OEIM ,Overrun Error Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x14 9. " BEIM ,Break Error Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x14 8. " PEIM ,Parity Error Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x14 7. " FEIM ,Framing Error Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x14 6. " RTIM ,Receive Timeout Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x14 5. " TXIM ,Transmit Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x14 4. " RXIM ,Receive Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x14 1. " CTSMI ,Clear To Send Modem Interrupt Mask" "Not masked,Masked"
|
|
rgroup.long 0x3c++0x07
|
|
line.long 0x00 "UART2_RIS,UART2 Raw Interrupt Register"
|
|
bitfld.long 0x00 12. " TXFERIS ,TX FIFO Empty Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 11. " XOFFRIS ,Xoff Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 10. " OERIS ,Overrun Error Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 9. " BERIS ,Break Error Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " PERIS ,Parity Error Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 7. " FERIS ,Framing Error Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RTRIS ,Receive Timeout Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " TXRIS ,Transmit Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " RXRIS ,Receive Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CTSRMIS ,Clear To Send Modem Interrupt Status" "No interrupt,Interrupt"
|
|
line.long 0x04 "UART2_MIS,UART2 Masked Interrupt Register"
|
|
bitfld.long 0x04 12. " TXFEMIS ,TX FIFO Empty Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 11. " XOFFMIS ,XOFF Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 10. " OEMIS ,Overrun Error Masked Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 9. " BEMIS ,Break Error Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 8. " PEMIS ,Parity Error Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 7. " FEMIS ,Framing Error Masked Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 6. " RTMIS ,Receive Timeout Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 5. " TXMIS ,Transmit Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 4. " RXMIS ,Receive Masked Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 1. " CTSRMIS ,Clear To Send Modem Masked Interrupt Status" "No interrupt,Interrupt"
|
|
group.long 0x44++0x07
|
|
line.long 0x00 "UART2_ICR,UART2 Interrupt Clear Register"
|
|
bitfld.long 0x00 12. " TXFEIC ,TX FIFO Empty Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 11. " XOFFIC ,XOFF Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 10. " OEIC ,Overrun Error Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 9. " BEIC ,Break Error Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 8. " PEIC ,Parity Error Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 7. " FEIC ,Framing Error Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 5. " TXIC ,Transmit Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 4. " RXIC ,Receive Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CTSRIC ,Clear To Send Modem Interrupt Clear" "No effect,Clear"
|
|
line.long 0x04 "UART2_DMACR,UART2 DMA Control Register"
|
|
bitfld.long 0x04 2. " DMAONERR ,DMA On Error" "Low,High"
|
|
bitfld.long 0x04 1. " TXDMAE ,Transmit DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 0. " RXDMAE ,Receive DMA Enable" "Disabled,Enabled"
|
|
group.long 0x50++0x13
|
|
line.long 0x00 "UART2_XFCR,UART2 XON/XOFF Control Register"
|
|
textline " "
|
|
bitfld.long 0x00 6. " SPECHR ,Special Character detection" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " XONANY ,Xon-any" "Must match,Any"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " SFTMOD ,Software Transmit Flow Control Mode" "Disabled,Xon1/Xoff1,Xon2/Xoff2,Xon1&Xon2/Xoff1&Xoff2"
|
|
bitfld.long 0x00 1.--2. " SFRFMOD ,Software Receive Flow Control Mode" "Disabled,Xon1/Xoff1,Xon2/Xoff2,Xon1&Xon2/Xoff1&Xoff2"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SFEN ,Software Flow control Enable" "Disabled,Enabled"
|
|
line.long 0x04 "UART2_XON1,UART2 XON1 Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " XON1 ,Xon1 character used in the software flow control"
|
|
line.long 0x08 "UART2_XON2,UART2 XON2 Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " XON2 ,Xon1 character used in the software flow control"
|
|
line.long 0x0c "UART2_XOFF1,UART2 XOFF1 Register"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " XOFF1 ,Xoff1 character used in the software flow control"
|
|
line.long 0x10 "UART2_XOFF2,UART2 XOFF2 Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. " XOFF2 ,Xoff2 character used in the software flow control"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "UART2_ABCR,UART2 Autobaud Control Register"
|
|
bitfld.long 0x00 2. " UPDATEN ,Autobaud Update Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " RESTART ,Autobaud Restart Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ACFGEN ,AutoConfig Enable" "Disabled,Enabled"
|
|
if (((d.l(asd:0x101F2000+0x104))&0x1100)==0x1100)
|
|
rgroup.long 0x104++0x07
|
|
line.long 0x00 "UART2_ABSR,UART2 Autobaud Status Register"
|
|
bitfld.long 0x00 12. " ACDONE ,AutoConfig Complete Status" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BAUDERR ,Invalid Baudrate Status" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " CMDERR ,Bad Command Sequence Detected" "Not detected,Character (at) OK,Character (a/) OK,Invalid character"
|
|
textline " "
|
|
bitfld.long 0x00 8. " VALFMT ,Valid Format Detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 3.--7. " BYTE1S ,Byte 1 Status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " BYTE2S ,Byte 2 Status" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "UART2_ABFMT,UART2 Autobaud Format Register"
|
|
bitfld.long 0x04 5.--6. " WLEN ,Word Length" "Reserved,Reserved,7,8"
|
|
textline " "
|
|
bitfld.long 0x04 4. " FEN ,FIFO Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " STP2 ,Two Stop Bits select" "1,2"
|
|
textline " "
|
|
bitfld.long 0x04 2. " EPS ,Even Parity Select" "Odd,Even"
|
|
textline " "
|
|
bitfld.long 0x04 1. " PEN ,Parity Enable" "Disabled,Enabled"
|
|
elif (((d.l(asd:0x101F2000+0x104))&0x1100)==0x1000)
|
|
rgroup.long 0x104++0x07
|
|
line.long 0x00 "UART2_ABSR,UART2 Autobaud Status Register"
|
|
bitfld.long 0x00 12. " ACDONE ,AutoConfig Complete Status" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BAUDERR ,Invalid Baudrate Status" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " CMDERR ,Bad Command Sequence Detected" "Not detected,Character (at) OK,Character (a/) OK,Invalid character"
|
|
textline " "
|
|
bitfld.long 0x00 8. " VALFMT ,Valid Format Detected" "Not detected,Detected"
|
|
line.long 0x04 "UART2_ABFMT,UART2 Autobaud Format Register"
|
|
bitfld.long 0x04 4. " FEN ,FIFO Enable" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x104++0x07
|
|
line.long 0x00 "UART2_ABSR,UART2 Autobaud Status Register"
|
|
bitfld.long 0x00 12. " ACDONE ,AutoConfig Complete Status" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 8. " VALFMT ,Valid Format Detected" "Not detected,Detected"
|
|
line.long 0x04 "UART2_ABFMT,UART2 Autobaud Format Register"
|
|
bitfld.long 0x04 4. " FEN ,FIFO Enable" "Disabled,Enabled"
|
|
endif
|
|
rgroup.long 0x150++0x0b
|
|
line.long 0x00 "UART2_ABDR,UART2 Autobaud Divisor Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " AUTOBAUDBDR ,AutoBaud Divisor value"
|
|
line.long 0x04 "UART2_ABDFR,UART2 Autobaud Divisor Fraction Register"
|
|
hexmask.long.byte 0x04 0.--5. 1. " AUTOBAUDBDFR ,AutoBaud Divisor Fraction value"
|
|
line.long 0x08 "UART2_ABMR,UART2 Autobaud Measurement Register"
|
|
hexmask.long.tbyte 0x08 0.--19. 1. " AUTOBAUDBMR ,AutoBaud Measurement value"
|
|
group.long 0x15c++0x03
|
|
line.long 0x00 "UART2_ABIMSC,UART2 Autobaud Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x00 1. " ABDONEIM ,Autobaud Done Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " ABERRIM ,Autobaud Error Interrupt Mask" "Not masked,Masked"
|
|
rgroup.long 0x160++0x07
|
|
line.long 0x00 "UART2_ABRIS,UART2 Autobaud Raw Interrupt Register"
|
|
bitfld.long 0x00 1. " ABDONERIS ,Overrun Error Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " ABERRRIS ,Break Error Interrupt Status" "No interrupt,Interrupt"
|
|
line.long 0x04 "UART2_ABMIS,UART2 Autobaud Masked Interrupt Register"
|
|
bitfld.long 0x04 1. " ABDONEMIS ,Autobaud Done Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 0. " ABERRMIS ,Autobaud Error Masked Interrupt Status" "No interrupt,Interrupt"
|
|
group.long 0x168++0x03
|
|
line.long 0x00 "UART2_ABICR,UART2 Autobaud Interrupt Clear Register"
|
|
bitfld.long 0x00 1. " ABDONEIC ,Autobaud Done Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " ABERRIC ,Autobaud Error Interrupt Clear" "No effect,Clear"
|
|
rgroup.long 0xfd8++0x7
|
|
line.long 0x00 "UART2_ID_PRODUCT_H_XY,UARTx Identification Product Register"
|
|
hexmask.long.byte 0x00 10.--17. 1. " PRODUCT_ID ,Revision number"
|
|
bitfld.long 0x00 8.--9. " H ,Integration Number" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " X ,UART Product Identification" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " Y ,UART Product Identification" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "UART2_ID_PROVIDER,UART2 Identification Provider Register"
|
|
hexmask.long.word 0x04 0.--13. 1. " PROVIDER_ID ,Provider Identification"
|
|
rgroup.long 0xfe0++0x01f
|
|
line.long 0x00 "UART2_PERIPHID0,UART2 Peripheral Identification Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PN0 ,Part Number 0 (0x02)"
|
|
line.long 0x04 "UART2_PERIPHID1,UART2 Peripheral Identification Register 1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " D0 ,Designer 0 (0x00)"
|
|
hexmask.long.byte 0x04 0.--3. 1. " PN1 ,Part Number 1 (0x08)"
|
|
line.long 0x08 "UART2_PERIPHID2,UART2 Peripheral Identification Register 2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " REV ,Revision (0x02)"
|
|
hexmask.long.byte 0x08 0.--3. 1. " D1 ,Designer 1 (0x08)"
|
|
line.long 0x0c "UART2_PERIPHID3,UART2 Peripheral Identification Register 3"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " CONF ,Configuration (0x00)"
|
|
line.long 0x10 "UART2_PCELLID0,UART2 PCell Identification Register 0"
|
|
hexmask.long.byte 0x10 0.--7. 1. " UART2PCELLID0 ,UART2 PCell ID0 (0x0D)"
|
|
line.long 0x14 "UART2_PCELLID1,UART2 PCell Identification Register 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " UART2PCELLID1 ,UART2 PCell ID1 (0xF0)"
|
|
line.long 0x18 "UART2_PCELLID2,UART2 PCell Identification Register 2"
|
|
hexmask.long.byte 0x18 0.--7. 1. " UART2PCELLID2 ,UART2 PCell ID2 (0x05)"
|
|
line.long 0x1c "UART2_PCELLID3,UART2 PCell Identification Register 3"
|
|
hexmask.long.byte 0x1c 0.--7. 1. " UART2PCELLID3 ,UART2 PCell ID3 (0xB1)"
|
|
width 0xb
|
|
tree.end
|
|
tree "UART3"
|
|
base asd:0x101FE000
|
|
width 23.
|
|
hgroup.long 0x00++0x03
|
|
hide.long 0x00 "UART3_DR,UART3 Data Register"
|
|
in
|
|
group.long 0x04++0x0B
|
|
line.long 0x00 "UART3_RSR/ECR,UART3 Receive Status/Error Clear Register"
|
|
eventfld.long 0x00 3. " OE ,Overrun Error" "No error,Error"
|
|
eventfld.long 0x00 2. " BE ,Break Error" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 1. " PE ,Parity Error" "No error,Error"
|
|
eventfld.long 0x00 0. " FE ,Framing Error" "No error,Error"
|
|
line.long 0x04 "UART3_DMAWM,UART3 DMA Watermark Register"
|
|
bitfld.long 0x04 3.--5. " RXDMAWM ,Receive DMA Watermark" "1/64,1/32,1/16,1/8,1/4,1/2,3/4,?..."
|
|
bitfld.long 0x04 0.--2. " TXDMAWM ,Transmit DMA Watermark" "1/64,1/32,1/16,1/8,1/4,1/2,3/4,?..."
|
|
line.long 0x08 "UART3_TIMEOUT,UART3 Timeout Register"
|
|
hexmask.long.tbyte 0x08 0.--21. 1. " N ,Timeoiut Period Configuration"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "UART3_FR,UART3 Flag Register"
|
|
bitfld.long 0x00 13. " RTXDIS ,Remote Transmitter Disabled" "No,Yes"
|
|
bitfld.long 0x00 9. " DCTS ,Delta Clear To Send" "Not changed,Changed"
|
|
bitfld.long 0x00 7. " TXFE ,Transmit FIFO Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RXFF ,Receive FIFO Full" "Not full,Full"
|
|
bitfld.long 0x00 5. " TXFF ,Transmit FIFO Full" "Not full,Full"
|
|
bitfld.long 0x00 4. " RXFE ,Receive FIFO Empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BUSY ,UARTx Busy" "Not busy,Busy"
|
|
bitfld.long 0x00 0. " CTS ,Clear To Send" "Not cleared,Cleared"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "UART3_LCRH_RX,UART3 Receive Line Control Register"
|
|
bitfld.long 0x00 7. " SPS_RX ,RX Stick parity select" "Disabled,Enabled"
|
|
bitfld.long 0x00 5.--6. " WLEN_RX ,RX Word length" "5,6,7,8"
|
|
bitfld.long 0x00 4. " FEN_RX ,RX Enable FIFOs" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " STP2_RX ,RX Two stop bits select" "1,2"
|
|
bitfld.long 0x00 2. " EPS_RX ,RX even parity select" "Odd,Even"
|
|
bitfld.long 0x00 1. " PEN_RX ,RX parity enable" "Disabled,Enabled"
|
|
group.long 0x24++0x17
|
|
line.long 0x00 "UART3_IBRD,UART3 Integer Baud Rate Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " DIVINT ,Baud Rate Integer"
|
|
line.long 0x04 "UART3_FBRD,UART3 Fractional Baud Rate Register"
|
|
hexmask.long.byte 0x04 0.--5. 1. " DIVFRAC ,Baud Rate Fraction"
|
|
line.long 0x08 "UART3_LCRH_TX,UART3 Transmit Line Control Register"
|
|
bitfld.long 0x08 7. " SPS_TX ,TX Stick Parity Select" "Disabled,Enabled"
|
|
bitfld.long 0x08 5.--6. " WLEN_TX ,TX Word Length" "5,6,7,8"
|
|
bitfld.long 0x08 4. " FEN_TX ,TX Enable FIFOs" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 3. " STP2_TX ,TX Two Stop Bits Select" "1,2"
|
|
bitfld.long 0x08 2. " EPS_TX ,TX Even Parity Select" "Odd,Even"
|
|
bitfld.long 0x08 1. " PEN_TX ,TX Parity Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 0. " BRK ,TX Send Break" "Normal,Break"
|
|
line.long 0x0c "UART3_CR,UART3 Control Register"
|
|
bitfld.long 0x0C 15. " CTSEN ,CTS Hardware Flow Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 14. " RTSEN ,RTS Hardware Flow Control Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 11. " RTS ,Request To Send" "High,Low"
|
|
textline " "
|
|
bitfld.long 0x0C 10. " DTR ,Data Transmit Ready" "High,Low"
|
|
bitfld.long 0x0C 9. " RXE ,Receive Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 8. " TXE ,Transmit Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " LBE ,Loop Back Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 3. " OVSFACT ,UART Oversampling Factor" "16,8"
|
|
bitfld.long 0x0C 0. " UARTEN ,UART Enable" "Disabled,Enabled"
|
|
line.long 0x10 "UART3_IFLS,UART3 Interrupt FIFO Level Select Register"
|
|
bitfld.long 0x10 3.--5. " RXIFLSEL ,Receive Interrupt FIFO Level Select" "1/64,1/32,1/16,1/8,1/4,1/2,3/4,?..."
|
|
bitfld.long 0x10 0.--2. " TXIFLSEL ,Transmit Interrupt FIFO Level Select" "1/64,1/32,1/16,1/8,1/4,1/2,3/4,?..."
|
|
line.long 0x14 "UART3_IMSC,UART3 Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x14 12. " TXFEIM ,TX FIFO Empty Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x14 11. " XOFFIM ,XOFF Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x14 10. " OEIM ,Overrun Error Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x14 9. " BEIM ,Break Error Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x14 8. " PEIM ,Parity Error Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x14 7. " FEIM ,Framing Error Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x14 6. " RTIM ,Receive Timeout Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x14 5. " TXIM ,Transmit Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x14 4. " RXIM ,Receive Interrupt Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x14 1. " CTSMI ,Clear To Send Modem Interrupt Mask" "Not masked,Masked"
|
|
rgroup.long 0x3c++0x07
|
|
line.long 0x00 "UART3_RIS,UART3 Raw Interrupt Register"
|
|
bitfld.long 0x00 12. " TXFERIS ,TX FIFO Empty Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 11. " XOFFRIS ,Xoff Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 10. " OERIS ,Overrun Error Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 9. " BERIS ,Break Error Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " PERIS ,Parity Error Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 7. " FERIS ,Framing Error Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RTRIS ,Receive Timeout Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " TXRIS ,Transmit Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " RXRIS ,Receive Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CTSRMIS ,Clear To Send Modem Interrupt Status" "No interrupt,Interrupt"
|
|
line.long 0x04 "UART3_MIS,UART3 Masked Interrupt Register"
|
|
bitfld.long 0x04 12. " TXFEMIS ,TX FIFO Empty Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 11. " XOFFMIS ,XOFF Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 10. " OEMIS ,Overrun Error Masked Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 9. " BEMIS ,Break Error Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 8. " PEMIS ,Parity Error Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 7. " FEMIS ,Framing Error Masked Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 6. " RTMIS ,Receive Timeout Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 5. " TXMIS ,Transmit Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 4. " RXMIS ,Receive Masked Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 1. " CTSRMIS ,Clear To Send Modem Masked Interrupt Status" "No interrupt,Interrupt"
|
|
group.long 0x44++0x07
|
|
line.long 0x00 "UART3_ICR,UART3 Interrupt Clear Register"
|
|
bitfld.long 0x00 12. " TXFEIC ,TX FIFO Empty Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 11. " XOFFIC ,XOFF Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 10. " OEIC ,Overrun Error Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 9. " BEIC ,Break Error Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 8. " PEIC ,Parity Error Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 7. " FEIC ,Framing Error Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 5. " TXIC ,Transmit Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 4. " RXIC ,Receive Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CTSRIC ,Clear To Send Modem Interrupt Clear" "No effect,Clear"
|
|
line.long 0x04 "UART3_DMACR,UART3 DMA Control Register"
|
|
bitfld.long 0x04 2. " DMAONERR ,DMA On Error" "Low,High"
|
|
bitfld.long 0x04 1. " TXDMAE ,Transmit DMA Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 0. " RXDMAE ,Receive DMA Enable" "Disabled,Enabled"
|
|
group.long 0x50++0x13
|
|
line.long 0x00 "UART3_XFCR,UART3 XON/XOFF Control Register"
|
|
textline " "
|
|
bitfld.long 0x00 6. " SPECHR ,Special Character detection" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " XONANY ,Xon-any" "Must match,Any"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " SFTMOD ,Software Transmit Flow Control Mode" "Disabled,Xon1/Xoff1,Xon2/Xoff2,Xon1&Xon2/Xoff1&Xoff2"
|
|
bitfld.long 0x00 1.--2. " SFRFMOD ,Software Receive Flow Control Mode" "Disabled,Xon1/Xoff1,Xon2/Xoff2,Xon1&Xon2/Xoff1&Xoff2"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SFEN ,Software Flow control Enable" "Disabled,Enabled"
|
|
line.long 0x04 "UART3_XON1,UART3 XON1 Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " XON1 ,Xon1 character used in the software flow control"
|
|
line.long 0x08 "UART3_XON2,UART3 XON2 Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " XON2 ,Xon1 character used in the software flow control"
|
|
line.long 0x0c "UART3_XOFF1,UART3 XOFF1 Register"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " XOFF1 ,Xoff1 character used in the software flow control"
|
|
line.long 0x10 "UART3_XOFF2,UART3 XOFF2 Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. " XOFF2 ,Xoff2 character used in the software flow control"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "UART3_ABCR,UART3 Autobaud Control Register"
|
|
bitfld.long 0x00 2. " UPDATEN ,Autobaud Update Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " RESTART ,Autobaud Restart Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ACFGEN ,AutoConfig Enable" "Disabled,Enabled"
|
|
if (((d.l(asd:0x101FE000+0x104))&0x1100)==0x1100)
|
|
rgroup.long 0x104++0x07
|
|
line.long 0x00 "UART3_ABSR,UART3 Autobaud Status Register"
|
|
bitfld.long 0x00 12. " ACDONE ,AutoConfig Complete Status" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BAUDERR ,Invalid Baudrate Status" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " CMDERR ,Bad Command Sequence Detected" "Not detected,Character (at) OK,Character (a/) OK,Invalid character"
|
|
textline " "
|
|
bitfld.long 0x00 8. " VALFMT ,Valid Format Detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 3.--7. " BYTE1S ,Byte 1 Status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " BYTE2S ,Byte 2 Status" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "UART3_ABFMT,UART3 Autobaud Format Register"
|
|
bitfld.long 0x04 5.--6. " WLEN ,Word Length" "Reserved,Reserved,7,8"
|
|
textline " "
|
|
bitfld.long 0x04 4. " FEN ,FIFO Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " STP2 ,Two Stop Bits select" "1,2"
|
|
textline " "
|
|
bitfld.long 0x04 2. " EPS ,Even Parity Select" "Odd,Even"
|
|
textline " "
|
|
bitfld.long 0x04 1. " PEN ,Parity Enable" "Disabled,Enabled"
|
|
elif (((d.l(asd:0x101FE000+0x104))&0x1100)==0x1000)
|
|
rgroup.long 0x104++0x07
|
|
line.long 0x00 "UART3_ABSR,UART3 Autobaud Status Register"
|
|
bitfld.long 0x00 12. " ACDONE ,AutoConfig Complete Status" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 11. " BAUDERR ,Invalid Baudrate Status" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 9.--10. " CMDERR ,Bad Command Sequence Detected" "Not detected,Character (at) OK,Character (a/) OK,Invalid character"
|
|
textline " "
|
|
bitfld.long 0x00 8. " VALFMT ,Valid Format Detected" "Not detected,Detected"
|
|
line.long 0x04 "UART3_ABFMT,UART3 Autobaud Format Register"
|
|
bitfld.long 0x04 4. " FEN ,FIFO Enable" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x104++0x07
|
|
line.long 0x00 "UART3_ABSR,UART3 Autobaud Status Register"
|
|
bitfld.long 0x00 12. " ACDONE ,AutoConfig Complete Status" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 8. " VALFMT ,Valid Format Detected" "Not detected,Detected"
|
|
line.long 0x04 "UART3_ABFMT,UART3 Autobaud Format Register"
|
|
bitfld.long 0x04 4. " FEN ,FIFO Enable" "Disabled,Enabled"
|
|
endif
|
|
rgroup.long 0x150++0x0b
|
|
line.long 0x00 "UART3_ABDR,UART3 Autobaud Divisor Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " AUTOBAUDBDR ,AutoBaud Divisor value"
|
|
line.long 0x04 "UART3_ABDFR,UART3 Autobaud Divisor Fraction Register"
|
|
hexmask.long.byte 0x04 0.--5. 1. " AUTOBAUDBDFR ,AutoBaud Divisor Fraction value"
|
|
line.long 0x08 "UART3_ABMR,UART3 Autobaud Measurement Register"
|
|
hexmask.long.tbyte 0x08 0.--19. 1. " AUTOBAUDBMR ,AutoBaud Measurement value"
|
|
group.long 0x15c++0x03
|
|
line.long 0x00 "UART3_ABIMSC,UART3 Autobaud Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x00 1. " ABDONEIM ,Autobaud Done Interrupt Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " ABERRIM ,Autobaud Error Interrupt Mask" "Not masked,Masked"
|
|
rgroup.long 0x160++0x07
|
|
line.long 0x00 "UART3_ABRIS,UART3 Autobaud Raw Interrupt Register"
|
|
bitfld.long 0x00 1. " ABDONERIS ,Overrun Error Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " ABERRRIS ,Break Error Interrupt Status" "No interrupt,Interrupt"
|
|
line.long 0x04 "UART3_ABMIS,UART3 Autobaud Masked Interrupt Register"
|
|
bitfld.long 0x04 1. " ABDONEMIS ,Autobaud Done Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 0. " ABERRMIS ,Autobaud Error Masked Interrupt Status" "No interrupt,Interrupt"
|
|
group.long 0x168++0x03
|
|
line.long 0x00 "UART3_ABICR,UART3 Autobaud Interrupt Clear Register"
|
|
bitfld.long 0x00 1. " ABDONEIC ,Autobaud Done Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " ABERRIC ,Autobaud Error Interrupt Clear" "No effect,Clear"
|
|
rgroup.long 0xfd8++0x7
|
|
line.long 0x00 "UART3_ID_PRODUCT_H_XY,UARTx Identification Product Register"
|
|
hexmask.long.byte 0x00 10.--17. 1. " PRODUCT_ID ,Revision number"
|
|
bitfld.long 0x00 8.--9. " H ,Integration Number" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " X ,UART Product Identification" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " Y ,UART Product Identification" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "UART3_ID_PROVIDER,UART3 Identification Provider Register"
|
|
hexmask.long.word 0x04 0.--13. 1. " PROVIDER_ID ,Provider Identification"
|
|
rgroup.long 0xfe0++0x01f
|
|
line.long 0x00 "UART3_PERIPHID0,UART3 Peripheral Identification Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PN0 ,Part Number 0 (0x02)"
|
|
line.long 0x04 "UART3_PERIPHID1,UART3 Peripheral Identification Register 1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " D0 ,Designer 0 (0x00)"
|
|
hexmask.long.byte 0x04 0.--3. 1. " PN1 ,Part Number 1 (0x08)"
|
|
line.long 0x08 "UART3_PERIPHID2,UART3 Peripheral Identification Register 2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " REV ,Revision (0x02)"
|
|
hexmask.long.byte 0x08 0.--3. 1. " D1 ,Designer 1 (0x08)"
|
|
line.long 0x0c "UART3_PERIPHID3,UART3 Peripheral Identification Register 3"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " CONF ,Configuration (0x00)"
|
|
line.long 0x10 "UART3_PCELLID0,UART3 PCell Identification Register 0"
|
|
hexmask.long.byte 0x10 0.--7. 1. " UART3PCELLID0 ,UART3 PCell ID0 (0x0D)"
|
|
line.long 0x14 "UART3_PCELLID1,UART3 PCell Identification Register 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " UART3PCELLID1 ,UART3 PCell ID1 (0xF0)"
|
|
line.long 0x18 "UART3_PCELLID2,UART3 PCell Identification Register 2"
|
|
hexmask.long.byte 0x18 0.--7. 1. " UART3PCELLID2 ,UART3 PCell ID2 (0x05)"
|
|
line.long 0x1c "UART3_PCELLID3,UART3 PCell Identification Register 3"
|
|
hexmask.long.byte 0x1c 0.--7. 1. " UART3PCELLID3 ,UART3 PCell ID3 (0xB1)"
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree.open "I2C HS controller"
|
|
tree "I2C 0"
|
|
base asd:0x101F8000
|
|
width 11.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "I2C_CR,I2C 0 Control Register"
|
|
sif ((cpu()=="STA2065")||(cpu()=="STA2165"))
|
|
bitfld.long 0x00 15. " FS ,Force stop" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 13.--14. " FON ,Filtering On" "No filters,Filter 1,Filter 2,Filter 4"
|
|
bitfld.long 0x00 12. " LM ,Loopback Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " DMA_SLE ,DMA Synchronization Logic Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " DMA_RX_EN ,DMA Rx Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DMA_TX_EN ,DMA Tx Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " FRX ,Flush receive" "Completed,Started & in progress"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FTX ,Flush Transmit" "Completed,Started & in progress"
|
|
bitfld.long 0x00 6. " SGCM ,Slave General Call Mode" "Transparent,Direct"
|
|
textline " "
|
|
sif ((cpu()=="STA2065")||(cpu()=="STA2165"))
|
|
bitfld.long 0x00 4.--5. " SM ,Speed Mode" "Standard,Fast,High,Fast plus"
|
|
bitfld.long 0x00 3. " SAM ,Slave Addressing Mode" "7-bit,10-bit"
|
|
else
|
|
bitfld.long 0x00 4.--5. " SM ,Speed Mode" "Standard,Fast,High,?..."
|
|
bitfld.long 0x00 3. " SAM ,Slave Addressing Mode" "7-bit,10-bit"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 1.--2. " OM ,Operating Mode" "Slave,Master,Master/Slave,?..."
|
|
bitfld.long 0x00 0. " PE ,Peripheral Enable" "Disabled,Enabled"
|
|
if (((d.l(d:0x101F8000))&0x8)==0x0)
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "I2C_SCR,I2C 0 Slave Control Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " SLSU ,Slave Data Setup Time"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SA7 ,Slave Address 7-bit"
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "I2C_SCR,I2C 0 Slave Control Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " SLSU ,Slave Data Setup Time"
|
|
hexmask.long.word 0x00 0.--9. 1. " SA10 ,Slave Address 10-bit"
|
|
endif
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "I2C_HSMCR,I2C 0 High-Speed Master Code Register"
|
|
bitfld.long 0x00 0.--2. " MC ,Master Code" "0,1,2,3,4,5,6,7"
|
|
width 11.
|
|
if (((d.l(d:0x101F8000+0x0c))&0x3000)==0x2000)
|
|
group.long 0x0c++0x03
|
|
line.long 0x00 "I2C_MCR,I2C 0 Master Control Register"
|
|
hexmask.long.word 0x00 15.--25. 1. " LENGTH ,Transaction length"
|
|
bitfld.long 0x00 14. " P ,Stop Condition" "Not stopped,Stopped"
|
|
bitfld.long 0x00 12.--13. " AM ,Address type" "General call command,7-bit,10-bit,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11. " SB ,Extended address" "Not applied,Pre-fixed"
|
|
hexmask.long.word 0x00 1.--10. 0x2 " A10 ,Address"
|
|
textline " "
|
|
bitfld.long 0x00 0. " 0P ,Operation" "Write,Read"
|
|
elif (((d.l(d:0x101F8000+0x0c))&0x3000)==0x3000)
|
|
group.long 0x0c++0x03
|
|
line.long 0x00 "I2C_MCR,I2C 0 Master Control Register"
|
|
hexmask.long.word 0x00 15.--25. 1. " LENGTH ,Transaction length"
|
|
bitfld.long 0x00 14. " P ,Stop Condition" "Not stopped,Stopped"
|
|
bitfld.long 0x00 12.--13. " AM ,Address type" "General call command,7-bit,10-bit,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11. " SB ,Extended address" "Not applied,Pre-fixed"
|
|
textline " "
|
|
bitfld.long 0x00 0. " 0P ,Operation" "Write,Read"
|
|
else
|
|
group.long 0x0c++0x03
|
|
line.long 0x00 "I2C_MCR,I2C 0 Master Control Register"
|
|
hexmask.long.word 0x00 15.--25. 1. " LENGTH ,Transaction length"
|
|
bitfld.long 0x00 14. " P ,Stop Condition" "Not stopped,Stopped"
|
|
bitfld.long 0x00 12.--13. " AM ,Address type" "General call command,7-bit,10-bit,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11. " SB ,Extended address" "Not applied,Pre-fixed"
|
|
hexmask.long.byte 0x00 1.--7. 0x2 " A7 ,Address"
|
|
textline " "
|
|
bitfld.long 0x00 0. " 0P ,Operation" "Write,Read"
|
|
endif
|
|
wgroup.long 0x10++0x03
|
|
line.long 0x00 "I2C_TFR,I2C 0 Transmit FIFO Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TDATA ,Transmission Data"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "I2C_SR,I2C 0 Status Register"
|
|
hexmask.long.word 0x00 9.--19. 1. " LENGTH ,Transfer length"
|
|
bitfld.long 0x00 7.--8. " TYPE ,Receive type" "FRAME,GCALL,HW_GCALL,?..."
|
|
bitfld.long 0x00 4.--6. " CAUSE ,Abort Cause" "NACK_ADDR,NACK_DATA,ACK_MCODE,ARB_LOST,BERR_START,BERR_STOP,OVFL,?..."
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " STATUS ,Controller status" "NOP,ON_GOING,OK,ABORT"
|
|
bitfld.long 0x00 0.--1. " OP ,Operation" "MW,MR,RFS,WTS"
|
|
hgroup.long 0x18++0x03
|
|
hide.long 0x00 "I2C_RFR,I2C 0 Receive FIFO Register"
|
|
in
|
|
width 11.
|
|
group.long 0x1c++0x13
|
|
line.long 0x00 "I2C_TFTR,I2C 0 Transmit FIFO Threshold Register"
|
|
sif ((cpu()=="STA2065")||(cpu()=="STA2165"))
|
|
bitfld.long 0x00 0.--3. " THRESHOLD_TX ,Threshold Tx" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
else
|
|
hexmask.long.word 0x00 0.--9. 1. " THRESHOLD_TX ,Threshold Tx"
|
|
endif
|
|
line.long 0x04 "I2C_RFTR,I2C 0 Receive FIFO Threshold Register"
|
|
sif ((cpu()=="STA2065")||(cpu()=="STA2165"))
|
|
bitfld.long 0x04 0.--3. " THRESHOLD_RX ,Threshold Rx" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
else
|
|
hexmask.long.word 0x04 0.--9. 1. " THRESHOLD_RX ,Threshold Rx"
|
|
endif
|
|
line.long 0x08 "I2C_DMAR,I2C 0 DMA Register"
|
|
bitfld.long 0x08 11. " BURST_TX ,Burst Tx" "Single,Burst"
|
|
bitfld.long 0x08 8.--10. " DBSIZE_TX ,Destination Burst Size Tx" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x08 3. " BURST_RX ,Burst Rx" "Single,Burst"
|
|
textline " "
|
|
bitfld.long 0x08 0.--2. " SBSIZE_RX ,Source Burst Size Rx" "0,1,2,3,4,5,6,7"
|
|
line.long 0x0c "I2C_BRCR,I2C 0 Baud Rate Counter Register"
|
|
hexmask.long.word 0x0c 16.--31. 1. " BRCNT1 ,Baud Rate Counter 1"
|
|
hexmask.long.word 0x0c 0.--15. 1. " BRCNT2 ,Baud Rate Counter 2"
|
|
line.long 0x10 "I2C_IMSCR,I2C 0 Interrupt Mask Set/Clear Register"
|
|
sif ((cpu()=="STA2065")||(cpu()=="STA2165"))
|
|
bitfld.long 0x10 28. " MTDWSM ,Master Transaction Done Without Stop Mask" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x10 25. " BERRM ,Bus Error Mask" "Disabled,Enabled"
|
|
bitfld.long 0x10 24. " MALM ,Master Arbitration Lost Mask" "Disabled,Enabled"
|
|
bitfld.long 0x10 20. " STDM ,Slave Transaction Done Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 19. " MTDM ,Master Transaction Done Mask" "Disabled,Enabled"
|
|
bitfld.long 0x10 18. " WTSRM ,Write-to-Slave Request Mask" "Disabled,Enabled"
|
|
bitfld.long 0x10 17. " RFSEM ,Read-from-Slave Empty Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 16. " RFSRM ,Read-from-Slave Request Mask" "Disabled,Enabled"
|
|
bitfld.long 0x10 6. " RXFFM ,Rx Fifo Full Mask" "Disabled,Enabled"
|
|
bitfld.long 0x10 5. " RXFNFM ,Rx Fifo Nearly Full Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 4. " RXFEM ,Rx Fifo Empty Mask" "Disabled,Enabled"
|
|
bitfld.long 0x10 3. " TXFOVRM ,Tx Fifo Overrun Mask" "Disabled,Enabled"
|
|
bitfld.long 0x10 2. " TXFFM ,Tx Fifo Full Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 1. " TXFNEM ,Tx Fifo Nearly Empty Mask" "Disabled,Enabled"
|
|
bitfld.long 0x10 0. " TXFEM ,Tx Fifo Empty Mask" "Disabled,Enabled"
|
|
width 11.
|
|
rgroup.long 0x30++0x0b
|
|
line.long 0x00 "I2C_RISR,I2C 0 Raw Interrupt Status Register"
|
|
sif ((cpu()=="STA2065")||(cpu()=="STA2165"))
|
|
bitfld.long 0x00 28. " MTDWS ,Master Transaction Done Without Stop" "No interrupt,Interrupt"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 25. " BERR ,Bus Error" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 24. " MAL ,Master Arbitration Lost" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 20. " STD ,Slave Transaction Done" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 19. " MTD ,Master Transaction Done" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 18. " WTSR ,Write-to-Slave Request" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 17. " RFSE ,Read-from-Slave Empty" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RFSR ,Read-from-Slave Request" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. " RXFF ,Rx Fifo Full" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " RXFNF ,Rx Fifo Nearly Full" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RXFE ,Rx Fifo Empty" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " TXFOVR ,Tx Fifo Overrun" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " TXFF ,Tx Fifo Full" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TXFNE ,Tx Fifo Nearly Empty" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " TXFE ,Tx Fifo Empty" "No interrupt,Interrupt"
|
|
line.long 0x04 "I2C_MISR,I2C 0 Masked Interrupt Status Register"
|
|
sif ((cpu()=="STA2065")||(cpu()=="STA2165"))
|
|
bitfld.long 0x04 28. " MTDWSMIS ,Master Transaction Done Without Stop masked interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x04 25. " BERRMIS ,Bus Error masked interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 24. " MALMIS ,Master Arbitration Lost masked interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 20. " STDMIS ,Slave Transaction Done masked interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 19. " MTDMIS ,Master Transaction Done masked interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 18. " WTSRMIS ,Write-to-Slave Request masked interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 17. " RFSEMIS ,Read-from-Slave Empty masked interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 16. " RFSRMIS ,Read-from-Slave Request masked interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 6. " RXFFMIS ,Rx Fifo Full masked interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 5. " RXFNFMIS ,Rx Fifo Nearly Full masked interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 4. " RXFEMIS ,Rx Fifo Empty masked interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 3. " TXFOVRMIS ,Tx Fifo Overrun masked interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 2. " TXFFMIS ,Tx Fifo Full masked interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 1. " TXFNEMIS ,Tx Fifo Nearly Empty masked interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 0. " TXFEMIS ,Tx Fifo Empty masked interrupt" "No interrupt,Interrupt"
|
|
line.long 0x08 "I2C_ICR,I2C 0 Interrupt Clear Register"
|
|
sif ((cpu()=="STA2065")||(cpu()=="STA2165"))
|
|
bitfld.long 0x08 28. " MTDWSIC ,Master Transaction Done Without Stop interrupt clear" "No effect,Cleared"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x08 25. " BERRIC ,Bus Error interrupt clear" "No effect,Cleared"
|
|
bitfld.long 0x08 24. " MALIC ,Master Arbitration Lost interrupt clear" "No effect,Cleared"
|
|
bitfld.long 0x08 20. " STDIC ,Slave Transaction Done interrupt clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 19. " MTDIC ,Master Transaction Done interrupt clear" "No effect,Cleared"
|
|
bitfld.long 0x08 18. " WTSRIC ,Write-to-Slave Request interrupt clear" "No effect,Cleared"
|
|
bitfld.long 0x08 17. " RFSEIC ,Read-from-Slave Empty interrupt clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 16. " RFSRIC ,Read-from-Slave Request interrupt clear" "No effect,Cleared"
|
|
bitfld.long 0x08 3. " TXFOVRIC ,Tx FIFO overrun interrupt clear" "No effect,Cleared"
|
|
sif ((cpu()=="STA2065")||(cpu()=="STA2165"))
|
|
textline ""
|
|
width 20.
|
|
group.long 0x4C++0x13
|
|
line.long 0x00 "I2C_THDDAT,I2C 0 Hold Time Data Register"
|
|
hexmask.long.word 0x00 0.--8. 1. " I2C_THDDAT ,Hold time data value"
|
|
line.long 0x04 "I2C_THDSTA_FST_STD,I2C 0 Hold Time Start Condition F/S Register"
|
|
hexmask.long.word 0x04 16.--24. 1. " I2C_THDSTA_FST ,Hold time for (repeated) Start Condition (Fast mode)"
|
|
hexmask.long.word 0x04 0.--8. 1. " I2C_THDSTA_STD ,Hold Time for (repeated) Start Condition (Standard mode)"
|
|
line.long 0x08 "I2C_THDSTA_FMP_HS,I2C 0 Hold Time Start Condition FMP/HS Register"
|
|
hexmask.long.word 0x08 16.--24. 1. " I2C_THDSTA_HS ,Hold time start condition value (High Speed Mode)"
|
|
hexmask.long.word 0x08 0.--8. 1. " I2C_THDSTA_FMP ,Hold time start condition value (Fast Mode Plus)"
|
|
line.long 0x0C "I2C_TSUSTA_FST_STD,I2C 0 Setup Time Start Condition F/S Register"
|
|
hexmask.long.word 0x0C 16.--24. 1. " I2C_TSUSTA_FST ,Setup Time for Start Condition (Fast mode)"
|
|
hexmask.long.word 0x0C 0.--8. 1. " I2C_TSUSTA_STD ,Setup Time for Start Condition (Standard mode)"
|
|
line.long 0x10 "I2C_TSUSTA_FMP_HS,I2C 0 Setup Time Start Condition FMP/HS Register"
|
|
hexmask.long.word 0x10 16.--24. 1. " I2C_TSUSTA_HS ,Setup Time for repeated Start Condition (High Speed mode)"
|
|
hexmask.long.word 0x10 0.--8. 1. " I2C_TSUSTA_FMP ,Setup Time for repeated Start Condition (Fast Plus mode)"
|
|
rgroup.long 0xfe0++0x01f
|
|
line.long 0x00 "I2C_PERIPHID0,I2C 0 Peripheral Identification Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PN0 ,Part Number 0 (0x24)"
|
|
line.long 0x04 "I2C_PERIPHID1,I2C 0 Peripheral Identification Register 1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " D0 ,Designer 0 (0x80)"
|
|
hexmask.long.byte 0x04 0.--3. 1. " PN1 ,Part Number 1 (0x24)"
|
|
line.long 0x08 "I2C_PERIPHID2,I2C 0 Peripheral Identification Register 2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " REV ,Revision (0x03)"
|
|
hexmask.long.byte 0x08 0.--3. 1. " D1 ,Designer 1 (0x08)"
|
|
line.long 0x0c "I2C_PERIPHID3,I2C 0 Peripheral Identification Register 3"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " CONF ,Configuration (0x00)"
|
|
line.long 0x10 "I2C_PCELLID0,I2C 0 PCell Identification Register 0"
|
|
hexmask.long.byte 0x10 0.--7. 1. " I2CPCELLID0 ,I2C PCell ID0 (0x0D)"
|
|
line.long 0x14 "I2C_PCELLID1,I2C 0 PCell Identification Register 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " I2CPCELLID1 ,I2C PCell ID1 (0xF0)"
|
|
line.long 0x18 "I2C_PCELLID2,I2C 0 PCell Identification Register 2"
|
|
hexmask.long.byte 0x18 0.--7. 1. " I2CPCELLID2 ,I2C PCell ID2 (0x05)"
|
|
line.long 0x1c "I2C_PCELLID3,I2C 0 PCell Identification Register 3"
|
|
hexmask.long.byte 0x1c 0.--7. 1. " I2CPCELLID3 ,I2C PCell ID3 (0xB1)"
|
|
endif
|
|
width 0xb
|
|
tree.end
|
|
tree "I2C 1"
|
|
base asd:0x101F7000
|
|
width 11.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "I2C_CR,I2C 1 Control Register"
|
|
sif ((cpu()=="STA2065")||(cpu()=="STA2165"))
|
|
bitfld.long 0x00 15. " FS ,Force stop" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 13.--14. " FON ,Filtering On" "No filters,Filter 1,Filter 2,Filter 4"
|
|
bitfld.long 0x00 12. " LM ,Loopback Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " DMA_SLE ,DMA Synchronization Logic Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " DMA_RX_EN ,DMA Rx Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DMA_TX_EN ,DMA Tx Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " FRX ,Flush receive" "Completed,Started & in progress"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FTX ,Flush Transmit" "Completed,Started & in progress"
|
|
bitfld.long 0x00 6. " SGCM ,Slave General Call Mode" "Transparent,Direct"
|
|
textline " "
|
|
sif ((cpu()=="STA2065")||(cpu()=="STA2165"))
|
|
bitfld.long 0x00 4.--5. " SM ,Speed Mode" "Standard,Fast,High,Fast plus"
|
|
bitfld.long 0x00 3. " SAM ,Slave Addressing Mode" "7-bit,10-bit"
|
|
else
|
|
bitfld.long 0x00 4.--5. " SM ,Speed Mode" "Standard,Fast,High,?..."
|
|
bitfld.long 0x00 3. " SAM ,Slave Addressing Mode" "7-bit,10-bit"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 1.--2. " OM ,Operating Mode" "Slave,Master,Master/Slave,?..."
|
|
bitfld.long 0x00 0. " PE ,Peripheral Enable" "Disabled,Enabled"
|
|
if (((d.l(d:0x101F7000))&0x8)==0x0)
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "I2C_SCR,I2C 1 Slave Control Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " SLSU ,Slave Data Setup Time"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SA7 ,Slave Address 7-bit"
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "I2C_SCR,I2C 1 Slave Control Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " SLSU ,Slave Data Setup Time"
|
|
hexmask.long.word 0x00 0.--9. 1. " SA10 ,Slave Address 10-bit"
|
|
endif
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "I2C_HSMCR,I2C 1 High-Speed Master Code Register"
|
|
bitfld.long 0x00 0.--2. " MC ,Master Code" "0,1,2,3,4,5,6,7"
|
|
width 11.
|
|
if (((d.l(d:0x101F7000+0x0c))&0x3000)==0x2000)
|
|
group.long 0x0c++0x03
|
|
line.long 0x00 "I2C_MCR,I2C 1 Master Control Register"
|
|
hexmask.long.word 0x00 15.--25. 1. " LENGTH ,Transaction length"
|
|
bitfld.long 0x00 14. " P ,Stop Condition" "Not stopped,Stopped"
|
|
bitfld.long 0x00 12.--13. " AM ,Address type" "General call command,7-bit,10-bit,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11. " SB ,Extended address" "Not applied,Pre-fixed"
|
|
hexmask.long.word 0x00 1.--10. 0x2 " A10 ,Address"
|
|
textline " "
|
|
bitfld.long 0x00 0. " 0P ,Operation" "Write,Read"
|
|
elif (((d.l(d:0x101F7000+0x0c))&0x3000)==0x3000)
|
|
group.long 0x0c++0x03
|
|
line.long 0x00 "I2C_MCR,I2C 1 Master Control Register"
|
|
hexmask.long.word 0x00 15.--25. 1. " LENGTH ,Transaction length"
|
|
bitfld.long 0x00 14. " P ,Stop Condition" "Not stopped,Stopped"
|
|
bitfld.long 0x00 12.--13. " AM ,Address type" "General call command,7-bit,10-bit,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11. " SB ,Extended address" "Not applied,Pre-fixed"
|
|
textline " "
|
|
bitfld.long 0x00 0. " 0P ,Operation" "Write,Read"
|
|
else
|
|
group.long 0x0c++0x03
|
|
line.long 0x00 "I2C_MCR,I2C 1 Master Control Register"
|
|
hexmask.long.word 0x00 15.--25. 1. " LENGTH ,Transaction length"
|
|
bitfld.long 0x00 14. " P ,Stop Condition" "Not stopped,Stopped"
|
|
bitfld.long 0x00 12.--13. " AM ,Address type" "General call command,7-bit,10-bit,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11. " SB ,Extended address" "Not applied,Pre-fixed"
|
|
hexmask.long.byte 0x00 1.--7. 0x2 " A7 ,Address"
|
|
textline " "
|
|
bitfld.long 0x00 0. " 0P ,Operation" "Write,Read"
|
|
endif
|
|
wgroup.long 0x10++0x03
|
|
line.long 0x00 "I2C_TFR,I2C 1 Transmit FIFO Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TDATA ,Transmission Data"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "I2C_SR,I2C 1 Status Register"
|
|
hexmask.long.word 0x00 9.--19. 1. " LENGTH ,Transfer length"
|
|
bitfld.long 0x00 7.--8. " TYPE ,Receive type" "FRAME,GCALL,HW_GCALL,?..."
|
|
bitfld.long 0x00 4.--6. " CAUSE ,Abort Cause" "NACK_ADDR,NACK_DATA,ACK_MCODE,ARB_LOST,BERR_START,BERR_STOP,OVFL,?..."
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " STATUS ,Controller status" "NOP,ON_GOING,OK,ABORT"
|
|
bitfld.long 0x00 0.--1. " OP ,Operation" "MW,MR,RFS,WTS"
|
|
hgroup.long 0x18++0x03
|
|
hide.long 0x00 "I2C_RFR,I2C 1 Receive FIFO Register"
|
|
in
|
|
width 11.
|
|
group.long 0x1c++0x13
|
|
line.long 0x00 "I2C_TFTR,I2C 1 Transmit FIFO Threshold Register"
|
|
sif ((cpu()=="STA2065")||(cpu()=="STA2165"))
|
|
bitfld.long 0x00 0.--3. " THRESHOLD_TX ,Threshold Tx" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
else
|
|
hexmask.long.word 0x00 0.--9. 1. " THRESHOLD_TX ,Threshold Tx"
|
|
endif
|
|
line.long 0x04 "I2C_RFTR,I2C 1 Receive FIFO Threshold Register"
|
|
sif ((cpu()=="STA2065")||(cpu()=="STA2165"))
|
|
bitfld.long 0x04 0.--3. " THRESHOLD_RX ,Threshold Rx" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
else
|
|
hexmask.long.word 0x04 0.--9. 1. " THRESHOLD_RX ,Threshold Rx"
|
|
endif
|
|
line.long 0x08 "I2C_DMAR,I2C 1 DMA Register"
|
|
bitfld.long 0x08 11. " BURST_TX ,Burst Tx" "Single,Burst"
|
|
bitfld.long 0x08 8.--10. " DBSIZE_TX ,Destination Burst Size Tx" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x08 3. " BURST_RX ,Burst Rx" "Single,Burst"
|
|
textline " "
|
|
bitfld.long 0x08 0.--2. " SBSIZE_RX ,Source Burst Size Rx" "0,1,2,3,4,5,6,7"
|
|
line.long 0x0c "I2C_BRCR,I2C 1 Baud Rate Counter Register"
|
|
hexmask.long.word 0x0c 16.--31. 1. " BRCNT1 ,Baud Rate Counter 1"
|
|
hexmask.long.word 0x0c 0.--15. 1. " BRCNT2 ,Baud Rate Counter 2"
|
|
line.long 0x10 "I2C_IMSCR,I2C 1 Interrupt Mask Set/Clear Register"
|
|
sif ((cpu()=="STA2065")||(cpu()=="STA2165"))
|
|
bitfld.long 0x10 28. " MTDWSM ,Master Transaction Done Without Stop Mask" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x10 25. " BERRM ,Bus Error Mask" "Disabled,Enabled"
|
|
bitfld.long 0x10 24. " MALM ,Master Arbitration Lost Mask" "Disabled,Enabled"
|
|
bitfld.long 0x10 20. " STDM ,Slave Transaction Done Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 19. " MTDM ,Master Transaction Done Mask" "Disabled,Enabled"
|
|
bitfld.long 0x10 18. " WTSRM ,Write-to-Slave Request Mask" "Disabled,Enabled"
|
|
bitfld.long 0x10 17. " RFSEM ,Read-from-Slave Empty Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 16. " RFSRM ,Read-from-Slave Request Mask" "Disabled,Enabled"
|
|
bitfld.long 0x10 6. " RXFFM ,Rx Fifo Full Mask" "Disabled,Enabled"
|
|
bitfld.long 0x10 5. " RXFNFM ,Rx Fifo Nearly Full Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 4. " RXFEM ,Rx Fifo Empty Mask" "Disabled,Enabled"
|
|
bitfld.long 0x10 3. " TXFOVRM ,Tx Fifo Overrun Mask" "Disabled,Enabled"
|
|
bitfld.long 0x10 2. " TXFFM ,Tx Fifo Full Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 1. " TXFNEM ,Tx Fifo Nearly Empty Mask" "Disabled,Enabled"
|
|
bitfld.long 0x10 0. " TXFEM ,Tx Fifo Empty Mask" "Disabled,Enabled"
|
|
width 11.
|
|
rgroup.long 0x30++0x0b
|
|
line.long 0x00 "I2C_RISR,I2C 1 Raw Interrupt Status Register"
|
|
sif ((cpu()=="STA2065")||(cpu()=="STA2165"))
|
|
bitfld.long 0x00 28. " MTDWS ,Master Transaction Done Without Stop" "No interrupt,Interrupt"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 25. " BERR ,Bus Error" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 24. " MAL ,Master Arbitration Lost" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 20. " STD ,Slave Transaction Done" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 19. " MTD ,Master Transaction Done" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 18. " WTSR ,Write-to-Slave Request" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 17. " RFSE ,Read-from-Slave Empty" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RFSR ,Read-from-Slave Request" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. " RXFF ,Rx Fifo Full" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " RXFNF ,Rx Fifo Nearly Full" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RXFE ,Rx Fifo Empty" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " TXFOVR ,Tx Fifo Overrun" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " TXFF ,Tx Fifo Full" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TXFNE ,Tx Fifo Nearly Empty" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " TXFE ,Tx Fifo Empty" "No interrupt,Interrupt"
|
|
line.long 0x04 "I2C_MISR,I2C 1 Masked Interrupt Status Register"
|
|
sif ((cpu()=="STA2065")||(cpu()=="STA2165"))
|
|
bitfld.long 0x04 28. " MTDWSMIS ,Master Transaction Done Without Stop masked interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x04 25. " BERRMIS ,Bus Error masked interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 24. " MALMIS ,Master Arbitration Lost masked interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 20. " STDMIS ,Slave Transaction Done masked interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 19. " MTDMIS ,Master Transaction Done masked interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 18. " WTSRMIS ,Write-to-Slave Request masked interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 17. " RFSEMIS ,Read-from-Slave Empty masked interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 16. " RFSRMIS ,Read-from-Slave Request masked interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 6. " RXFFMIS ,Rx Fifo Full masked interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 5. " RXFNFMIS ,Rx Fifo Nearly Full masked interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 4. " RXFEMIS ,Rx Fifo Empty masked interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 3. " TXFOVRMIS ,Tx Fifo Overrun masked interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 2. " TXFFMIS ,Tx Fifo Full masked interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 1. " TXFNEMIS ,Tx Fifo Nearly Empty masked interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 0. " TXFEMIS ,Tx Fifo Empty masked interrupt" "No interrupt,Interrupt"
|
|
line.long 0x08 "I2C_ICR,I2C 1 Interrupt Clear Register"
|
|
sif ((cpu()=="STA2065")||(cpu()=="STA2165"))
|
|
bitfld.long 0x08 28. " MTDWSIC ,Master Transaction Done Without Stop interrupt clear" "No effect,Cleared"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x08 25. " BERRIC ,Bus Error interrupt clear" "No effect,Cleared"
|
|
bitfld.long 0x08 24. " MALIC ,Master Arbitration Lost interrupt clear" "No effect,Cleared"
|
|
bitfld.long 0x08 20. " STDIC ,Slave Transaction Done interrupt clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 19. " MTDIC ,Master Transaction Done interrupt clear" "No effect,Cleared"
|
|
bitfld.long 0x08 18. " WTSRIC ,Write-to-Slave Request interrupt clear" "No effect,Cleared"
|
|
bitfld.long 0x08 17. " RFSEIC ,Read-from-Slave Empty interrupt clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 16. " RFSRIC ,Read-from-Slave Request interrupt clear" "No effect,Cleared"
|
|
bitfld.long 0x08 3. " TXFOVRIC ,Tx FIFO overrun interrupt clear" "No effect,Cleared"
|
|
sif ((cpu()=="STA2065")||(cpu()=="STA2165"))
|
|
textline ""
|
|
width 20.
|
|
group.long 0x4C++0x13
|
|
line.long 0x00 "I2C_THDDAT,I2C 1 Hold Time Data Register"
|
|
hexmask.long.word 0x00 0.--8. 1. " I2C_THDDAT ,Hold time data value"
|
|
line.long 0x04 "I2C_THDSTA_FST_STD,I2C 1 Hold Time Start Condition F/S Register"
|
|
hexmask.long.word 0x04 16.--24. 1. " I2C_THDSTA_FST ,Hold time for (repeated) Start Condition (Fast mode)"
|
|
hexmask.long.word 0x04 0.--8. 1. " I2C_THDSTA_STD ,Hold Time for (repeated) Start Condition (Standard mode)"
|
|
line.long 0x08 "I2C_THDSTA_FMP_HS,I2C 1 Hold Time Start Condition FMP/HS Register"
|
|
hexmask.long.word 0x08 16.--24. 1. " I2C_THDSTA_HS ,Hold time start condition value (High Speed Mode)"
|
|
hexmask.long.word 0x08 0.--8. 1. " I2C_THDSTA_FMP ,Hold time start condition value (Fast Mode Plus)"
|
|
line.long 0x0C "I2C_TSUSTA_FST_STD,I2C 1 Setup Time Start Condition F/S Register"
|
|
hexmask.long.word 0x0C 16.--24. 1. " I2C_TSUSTA_FST ,Setup Time for Start Condition (Fast mode)"
|
|
hexmask.long.word 0x0C 0.--8. 1. " I2C_TSUSTA_STD ,Setup Time for Start Condition (Standard mode)"
|
|
line.long 0x10 "I2C_TSUSTA_FMP_HS,I2C 1 Setup Time Start Condition FMP/HS Register"
|
|
hexmask.long.word 0x10 16.--24. 1. " I2C_TSUSTA_HS ,Setup Time for repeated Start Condition (High Speed mode)"
|
|
hexmask.long.word 0x10 0.--8. 1. " I2C_TSUSTA_FMP ,Setup Time for repeated Start Condition (Fast Plus mode)"
|
|
rgroup.long 0xfe0++0x01f
|
|
line.long 0x00 "I2C_PERIPHID0,I2C 1 Peripheral Identification Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PN0 ,Part Number 0 (0x24)"
|
|
line.long 0x04 "I2C_PERIPHID1,I2C 1 Peripheral Identification Register 1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " D0 ,Designer 0 (0x80)"
|
|
hexmask.long.byte 0x04 0.--3. 1. " PN1 ,Part Number 1 (0x24)"
|
|
line.long 0x08 "I2C_PERIPHID2,I2C 1 Peripheral Identification Register 2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " REV ,Revision (0x03)"
|
|
hexmask.long.byte 0x08 0.--3. 1. " D1 ,Designer 1 (0x08)"
|
|
line.long 0x0c "I2C_PERIPHID3,I2C 1 Peripheral Identification Register 3"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " CONF ,Configuration (0x00)"
|
|
line.long 0x10 "I2C_PCELLID0,I2C 1 PCell Identification Register 0"
|
|
hexmask.long.byte 0x10 0.--7. 1. " I2CPCELLID0 ,I2C PCell ID0 (0x0D)"
|
|
line.long 0x14 "I2C_PCELLID1,I2C 1 PCell Identification Register 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " I2CPCELLID1 ,I2C PCell ID1 (0xF0)"
|
|
line.long 0x18 "I2C_PCELLID2,I2C 1 PCell Identification Register 2"
|
|
hexmask.long.byte 0x18 0.--7. 1. " I2CPCELLID2 ,I2C PCell ID2 (0x05)"
|
|
line.long 0x1c "I2C_PCELLID3,I2C 1 PCell Identification Register 3"
|
|
hexmask.long.byte 0x1c 0.--7. 1. " I2CPCELLID3 ,I2C PCell ID3 (0xB1)"
|
|
endif
|
|
width 0xb
|
|
tree.end
|
|
tree "I2C 2"
|
|
base asd:0x101F3000
|
|
width 11.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "I2C_CR,I2C 2 Control Register"
|
|
sif ((cpu()=="STA2065")||(cpu()=="STA2165"))
|
|
bitfld.long 0x00 15. " FS ,Force stop" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 13.--14. " FON ,Filtering On" "No filters,Filter 1,Filter 2,Filter 4"
|
|
bitfld.long 0x00 12. " LM ,Loopback Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " DMA_SLE ,DMA Synchronization Logic Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " DMA_RX_EN ,DMA Rx Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DMA_TX_EN ,DMA Tx Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " FRX ,Flush receive" "Completed,Started & in progress"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FTX ,Flush Transmit" "Completed,Started & in progress"
|
|
bitfld.long 0x00 6. " SGCM ,Slave General Call Mode" "Transparent,Direct"
|
|
textline " "
|
|
sif ((cpu()=="STA2065")||(cpu()=="STA2165"))
|
|
bitfld.long 0x00 4.--5. " SM ,Speed Mode" "Standard,Fast,High,Fast plus"
|
|
bitfld.long 0x00 3. " SAM ,Slave Addressing Mode" "7-bit,10-bit"
|
|
else
|
|
bitfld.long 0x00 4.--5. " SM ,Speed Mode" "Standard,Fast,High,?..."
|
|
bitfld.long 0x00 3. " SAM ,Slave Addressing Mode" "7-bit,10-bit"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 1.--2. " OM ,Operating Mode" "Slave,Master,Master/Slave,?..."
|
|
bitfld.long 0x00 0. " PE ,Peripheral Enable" "Disabled,Enabled"
|
|
if (((d.l(d:0x101F3000))&0x8)==0x0)
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "I2C_SCR,I2C 2 Slave Control Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " SLSU ,Slave Data Setup Time"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SA7 ,Slave Address 7-bit"
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "I2C_SCR,I2C 2 Slave Control Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " SLSU ,Slave Data Setup Time"
|
|
hexmask.long.word 0x00 0.--9. 1. " SA10 ,Slave Address 10-bit"
|
|
endif
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "I2C_HSMCR,I2C 2 High-Speed Master Code Register"
|
|
bitfld.long 0x00 0.--2. " MC ,Master Code" "0,1,2,3,4,5,6,7"
|
|
width 11.
|
|
if (((d.l(d:0x101F3000+0x0c))&0x3000)==0x2000)
|
|
group.long 0x0c++0x03
|
|
line.long 0x00 "I2C_MCR,I2C 2 Master Control Register"
|
|
hexmask.long.word 0x00 15.--25. 1. " LENGTH ,Transaction length"
|
|
bitfld.long 0x00 14. " P ,Stop Condition" "Not stopped,Stopped"
|
|
bitfld.long 0x00 12.--13. " AM ,Address type" "General call command,7-bit,10-bit,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11. " SB ,Extended address" "Not applied,Pre-fixed"
|
|
hexmask.long.word 0x00 1.--10. 0x2 " A10 ,Address"
|
|
textline " "
|
|
bitfld.long 0x00 0. " 0P ,Operation" "Write,Read"
|
|
elif (((d.l(d:0x101F3000+0x0c))&0x3000)==0x3000)
|
|
group.long 0x0c++0x03
|
|
line.long 0x00 "I2C_MCR,I2C 2 Master Control Register"
|
|
hexmask.long.word 0x00 15.--25. 1. " LENGTH ,Transaction length"
|
|
bitfld.long 0x00 14. " P ,Stop Condition" "Not stopped,Stopped"
|
|
bitfld.long 0x00 12.--13. " AM ,Address type" "General call command,7-bit,10-bit,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11. " SB ,Extended address" "Not applied,Pre-fixed"
|
|
textline " "
|
|
bitfld.long 0x00 0. " 0P ,Operation" "Write,Read"
|
|
else
|
|
group.long 0x0c++0x03
|
|
line.long 0x00 "I2C_MCR,I2C 2 Master Control Register"
|
|
hexmask.long.word 0x00 15.--25. 1. " LENGTH ,Transaction length"
|
|
bitfld.long 0x00 14. " P ,Stop Condition" "Not stopped,Stopped"
|
|
bitfld.long 0x00 12.--13. " AM ,Address type" "General call command,7-bit,10-bit,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11. " SB ,Extended address" "Not applied,Pre-fixed"
|
|
hexmask.long.byte 0x00 1.--7. 0x2 " A7 ,Address"
|
|
textline " "
|
|
bitfld.long 0x00 0. " 0P ,Operation" "Write,Read"
|
|
endif
|
|
wgroup.long 0x10++0x03
|
|
line.long 0x00 "I2C_TFR,I2C 2 Transmit FIFO Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TDATA ,Transmission Data"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "I2C_SR,I2C 2 Status Register"
|
|
hexmask.long.word 0x00 9.--19. 1. " LENGTH ,Transfer length"
|
|
bitfld.long 0x00 7.--8. " TYPE ,Receive type" "FRAME,GCALL,HW_GCALL,?..."
|
|
bitfld.long 0x00 4.--6. " CAUSE ,Abort Cause" "NACK_ADDR,NACK_DATA,ACK_MCODE,ARB_LOST,BERR_START,BERR_STOP,OVFL,?..."
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " STATUS ,Controller status" "NOP,ON_GOING,OK,ABORT"
|
|
bitfld.long 0x00 0.--1. " OP ,Operation" "MW,MR,RFS,WTS"
|
|
hgroup.long 0x18++0x03
|
|
hide.long 0x00 "I2C_RFR,I2C 2 Receive FIFO Register"
|
|
in
|
|
width 11.
|
|
group.long 0x1c++0x13
|
|
line.long 0x00 "I2C_TFTR,I2C 2 Transmit FIFO Threshold Register"
|
|
sif ((cpu()=="STA2065")||(cpu()=="STA2165"))
|
|
bitfld.long 0x00 0.--3. " THRESHOLD_TX ,Threshold Tx" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
else
|
|
hexmask.long.word 0x00 0.--9. 1. " THRESHOLD_TX ,Threshold Tx"
|
|
endif
|
|
line.long 0x04 "I2C_RFTR,I2C 2 Receive FIFO Threshold Register"
|
|
sif ((cpu()=="STA2065")||(cpu()=="STA2165"))
|
|
bitfld.long 0x04 0.--3. " THRESHOLD_RX ,Threshold Rx" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
else
|
|
hexmask.long.word 0x04 0.--9. 1. " THRESHOLD_RX ,Threshold Rx"
|
|
endif
|
|
line.long 0x08 "I2C_DMAR,I2C 2 DMA Register"
|
|
bitfld.long 0x08 11. " BURST_TX ,Burst Tx" "Single,Burst"
|
|
bitfld.long 0x08 8.--10. " DBSIZE_TX ,Destination Burst Size Tx" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x08 3. " BURST_RX ,Burst Rx" "Single,Burst"
|
|
textline " "
|
|
bitfld.long 0x08 0.--2. " SBSIZE_RX ,Source Burst Size Rx" "0,1,2,3,4,5,6,7"
|
|
line.long 0x0c "I2C_BRCR,I2C 2 Baud Rate Counter Register"
|
|
hexmask.long.word 0x0c 16.--31. 1. " BRCNT1 ,Baud Rate Counter 1"
|
|
hexmask.long.word 0x0c 0.--15. 1. " BRCNT2 ,Baud Rate Counter 2"
|
|
line.long 0x10 "I2C_IMSCR,I2C 2 Interrupt Mask Set/Clear Register"
|
|
sif ((cpu()=="STA2065")||(cpu()=="STA2165"))
|
|
bitfld.long 0x10 28. " MTDWSM ,Master Transaction Done Without Stop Mask" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x10 25. " BERRM ,Bus Error Mask" "Disabled,Enabled"
|
|
bitfld.long 0x10 24. " MALM ,Master Arbitration Lost Mask" "Disabled,Enabled"
|
|
bitfld.long 0x10 20. " STDM ,Slave Transaction Done Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 19. " MTDM ,Master Transaction Done Mask" "Disabled,Enabled"
|
|
bitfld.long 0x10 18. " WTSRM ,Write-to-Slave Request Mask" "Disabled,Enabled"
|
|
bitfld.long 0x10 17. " RFSEM ,Read-from-Slave Empty Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 16. " RFSRM ,Read-from-Slave Request Mask" "Disabled,Enabled"
|
|
bitfld.long 0x10 6. " RXFFM ,Rx Fifo Full Mask" "Disabled,Enabled"
|
|
bitfld.long 0x10 5. " RXFNFM ,Rx Fifo Nearly Full Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 4. " RXFEM ,Rx Fifo Empty Mask" "Disabled,Enabled"
|
|
bitfld.long 0x10 3. " TXFOVRM ,Tx Fifo Overrun Mask" "Disabled,Enabled"
|
|
bitfld.long 0x10 2. " TXFFM ,Tx Fifo Full Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 1. " TXFNEM ,Tx Fifo Nearly Empty Mask" "Disabled,Enabled"
|
|
bitfld.long 0x10 0. " TXFEM ,Tx Fifo Empty Mask" "Disabled,Enabled"
|
|
width 11.
|
|
rgroup.long 0x30++0x0b
|
|
line.long 0x00 "I2C_RISR,I2C 2 Raw Interrupt Status Register"
|
|
sif ((cpu()=="STA2065")||(cpu()=="STA2165"))
|
|
bitfld.long 0x00 28. " MTDWS ,Master Transaction Done Without Stop" "No interrupt,Interrupt"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 25. " BERR ,Bus Error" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 24. " MAL ,Master Arbitration Lost" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 20. " STD ,Slave Transaction Done" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 19. " MTD ,Master Transaction Done" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 18. " WTSR ,Write-to-Slave Request" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 17. " RFSE ,Read-from-Slave Empty" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RFSR ,Read-from-Slave Request" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. " RXFF ,Rx Fifo Full" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " RXFNF ,Rx Fifo Nearly Full" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RXFE ,Rx Fifo Empty" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " TXFOVR ,Tx Fifo Overrun" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " TXFF ,Tx Fifo Full" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TXFNE ,Tx Fifo Nearly Empty" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " TXFE ,Tx Fifo Empty" "No interrupt,Interrupt"
|
|
line.long 0x04 "I2C_MISR,I2C 2 Masked Interrupt Status Register"
|
|
sif ((cpu()=="STA2065")||(cpu()=="STA2165"))
|
|
bitfld.long 0x04 28. " MTDWSMIS ,Master Transaction Done Without Stop masked interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x04 25. " BERRMIS ,Bus Error masked interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 24. " MALMIS ,Master Arbitration Lost masked interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 20. " STDMIS ,Slave Transaction Done masked interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 19. " MTDMIS ,Master Transaction Done masked interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 18. " WTSRMIS ,Write-to-Slave Request masked interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 17. " RFSEMIS ,Read-from-Slave Empty masked interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 16. " RFSRMIS ,Read-from-Slave Request masked interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 6. " RXFFMIS ,Rx Fifo Full masked interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 5. " RXFNFMIS ,Rx Fifo Nearly Full masked interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 4. " RXFEMIS ,Rx Fifo Empty masked interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 3. " TXFOVRMIS ,Tx Fifo Overrun masked interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 2. " TXFFMIS ,Tx Fifo Full masked interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 1. " TXFNEMIS ,Tx Fifo Nearly Empty masked interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 0. " TXFEMIS ,Tx Fifo Empty masked interrupt" "No interrupt,Interrupt"
|
|
line.long 0x08 "I2C_ICR,I2C 2 Interrupt Clear Register"
|
|
sif ((cpu()=="STA2065")||(cpu()=="STA2165"))
|
|
bitfld.long 0x08 28. " MTDWSIC ,Master Transaction Done Without Stop interrupt clear" "No effect,Cleared"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x08 25. " BERRIC ,Bus Error interrupt clear" "No effect,Cleared"
|
|
bitfld.long 0x08 24. " MALIC ,Master Arbitration Lost interrupt clear" "No effect,Cleared"
|
|
bitfld.long 0x08 20. " STDIC ,Slave Transaction Done interrupt clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 19. " MTDIC ,Master Transaction Done interrupt clear" "No effect,Cleared"
|
|
bitfld.long 0x08 18. " WTSRIC ,Write-to-Slave Request interrupt clear" "No effect,Cleared"
|
|
bitfld.long 0x08 17. " RFSEIC ,Read-from-Slave Empty interrupt clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 16. " RFSRIC ,Read-from-Slave Request interrupt clear" "No effect,Cleared"
|
|
bitfld.long 0x08 3. " TXFOVRIC ,Tx FIFO overrun interrupt clear" "No effect,Cleared"
|
|
sif ((cpu()=="STA2065")||(cpu()=="STA2165"))
|
|
textline ""
|
|
width 20.
|
|
group.long 0x4C++0x13
|
|
line.long 0x00 "I2C_THDDAT,I2C 2 Hold Time Data Register"
|
|
hexmask.long.word 0x00 0.--8. 1. " I2C_THDDAT ,Hold time data value"
|
|
line.long 0x04 "I2C_THDSTA_FST_STD,I2C 2 Hold Time Start Condition F/S Register"
|
|
hexmask.long.word 0x04 16.--24. 1. " I2C_THDSTA_FST ,Hold time for (repeated) Start Condition (Fast mode)"
|
|
hexmask.long.word 0x04 0.--8. 1. " I2C_THDSTA_STD ,Hold Time for (repeated) Start Condition (Standard mode)"
|
|
line.long 0x08 "I2C_THDSTA_FMP_HS,I2C 2 Hold Time Start Condition FMP/HS Register"
|
|
hexmask.long.word 0x08 16.--24. 1. " I2C_THDSTA_HS ,Hold time start condition value (High Speed Mode)"
|
|
hexmask.long.word 0x08 0.--8. 1. " I2C_THDSTA_FMP ,Hold time start condition value (Fast Mode Plus)"
|
|
line.long 0x0C "I2C_TSUSTA_FST_STD,I2C 2 Setup Time Start Condition F/S Register"
|
|
hexmask.long.word 0x0C 16.--24. 1. " I2C_TSUSTA_FST ,Setup Time for Start Condition (Fast mode)"
|
|
hexmask.long.word 0x0C 0.--8. 1. " I2C_TSUSTA_STD ,Setup Time for Start Condition (Standard mode)"
|
|
line.long 0x10 "I2C_TSUSTA_FMP_HS,I2C 2 Setup Time Start Condition FMP/HS Register"
|
|
hexmask.long.word 0x10 16.--24. 1. " I2C_TSUSTA_HS ,Setup Time for repeated Start Condition (High Speed mode)"
|
|
hexmask.long.word 0x10 0.--8. 1. " I2C_TSUSTA_FMP ,Setup Time for repeated Start Condition (Fast Plus mode)"
|
|
rgroup.long 0xfe0++0x01f
|
|
line.long 0x00 "I2C_PERIPHID0,I2C 2 Peripheral Identification Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PN0 ,Part Number 0 (0x24)"
|
|
line.long 0x04 "I2C_PERIPHID1,I2C 2 Peripheral Identification Register 1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " D0 ,Designer 0 (0x80)"
|
|
hexmask.long.byte 0x04 0.--3. 1. " PN1 ,Part Number 1 (0x24)"
|
|
line.long 0x08 "I2C_PERIPHID2,I2C 2 Peripheral Identification Register 2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " REV ,Revision (0x03)"
|
|
hexmask.long.byte 0x08 0.--3. 1. " D1 ,Designer 1 (0x08)"
|
|
line.long 0x0c "I2C_PERIPHID3,I2C 2 Peripheral Identification Register 3"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " CONF ,Configuration (0x00)"
|
|
line.long 0x10 "I2C_PCELLID0,I2C 2 PCell Identification Register 0"
|
|
hexmask.long.byte 0x10 0.--7. 1. " I2CPCELLID0 ,I2C PCell ID0 (0x0D)"
|
|
line.long 0x14 "I2C_PCELLID1,I2C 2 PCell Identification Register 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " I2CPCELLID1 ,I2C PCell ID1 (0xF0)"
|
|
line.long 0x18 "I2C_PCELLID2,I2C 2 PCell Identification Register 2"
|
|
hexmask.long.byte 0x18 0.--7. 1. " I2CPCELLID2 ,I2C PCell ID2 (0x05)"
|
|
line.long 0x1c "I2C_PCELLID3,I2C 2 PCell Identification Register 3"
|
|
hexmask.long.byte 0x1c 0.--7. 1. " I2CPCELLID3 ,I2C PCell ID3 (0xB1)"
|
|
endif
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree.open "MSP (Multichannel Serial Port)"
|
|
tree "MSP0"
|
|
base asd:0x101F9000
|
|
width 10.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "MSP_DR,MSP Data Register"
|
|
if (((data.long(asd:0x101F9000+0x04))&0x600080)==(0x400000||0x600000))
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "MSP_GCR,MSP Global Configuration Register"
|
|
bitfld.long 0x00 23. " SPIBME ,SPI Burst Mode Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21.--22. " SPICKML ,SPI Clock Modes" "Normal,Normal,Zero delay SPI,Half cycle delay SPI"
|
|
textline " "
|
|
bitfld.long 0x00 20. " FGEN ,Frame Generator Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " SCKSEL ,Sample Rate Generator Clock Selection" "Internal clk,Internal clk,MSPSCK & free-running,MSPSCK & resynchronized"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SCKPOL ,Sample Rate Generator Clock Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SGEN ,Sample Rate Generator Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " TXDDL ,Transmit Data Extra Delay" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 14. " TCKSEL ,Transmit Clock Selection" "External SPI master,Internal sample rate generator/MSP is SPI Master"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TCKPOL ,Transmit Clock Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 11.--12. " TFSSEL ,Transmit Frame Synchronization Selection" "External source,External source,Frame Generator logic; each time MSP_TDR copied to MSP_TSR,Frame Generator logic with period & width"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TFSPOL ,Transmit Frame Synchronization Polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TFFEN ,Transmit FIFO Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " TXEN ,Transmitter Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LBM ,Loopback Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RCKSEL ,Receive Clock Selection" "External source on MSPRCK,Sample Rate Generator & delivered on MSPRCK"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RCKPOL ,Receive Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RFSSEL ,Receive Frame Synchronization Selection" "External source,Frame Generator logic"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DCM ,Direct Companding Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RFSPOL ,Receive Frame Synchronization Polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RFFEN ,Receive FIFO Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXEN ,Receiver Enable" "Disabled,Enabled"
|
|
elif (((data.long(asd:0x101F9000+0x04))&0x600080)==(0x400080||0x600080))
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "MSP_GCR,MSP Global Configuration Register"
|
|
bitfld.long 0x00 23. " SPIBME ,SPI Burst Mode Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21.--22. " SPICKML ,SPI Clock Modes" "Normal,Normal,Zero delay SPI,Half cycle delay SPI"
|
|
textline " "
|
|
bitfld.long 0x00 20. " FGEN ,Frame Generator Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " SCKSEL ,Sample Rate Generator Clock Selection" "Internal clk,Internal clk,MSPSCK & free-running,MSPSCK & resynchronized"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SCKPOL ,Sample Rate Generator Clock Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SGEN ,Sample Rate Generator Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " TXDDL ,Transmit Data Extra Delay" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 14. " TCKSEL ,Transmit Clock Selection" "External SPI master,Internal sample rate generator/MSP is SPI Master"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TCKPOL ,Transmit Clock Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 11.--12. " TFSSEL ,Transmit Frame Synchronization Selection" "External source,External source,Frame Generator logic; each time MSP_TDR copied to MSP_TSR,Frame Generator logic with period & width"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TFSPOL ,Transmit Frame Synchronization Polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TFFEN ,Transmit FIFO Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " TXEN ,Transmitter Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LBM ,Loopback Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RCKSEL ,Receive Clock Selection" "Transmit Clock,Transmit Clock & delivered on RCK"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RCKPOL ,Receive Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RFSSEL ,Receive Frame Synchronization Selection" "External source,Frame Generator logic"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DCM ,Direct Companding Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RFSPOL ,Receive Frame Synchronization Polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RFFEN ,Receive FIFO Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXEN ,Receiver Enable" "Disabled,Enabled"
|
|
elif (((data.long(asd:0x101F9000+0x04))&0x600080)==(0x000000||0x200000))
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "MSP_GCR,MSP Global Configuration Register"
|
|
bitfld.long 0x00 23. " SPIBME ,SPI Burst Mode Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21.--22. " SPICKML ,SPI Clock Modes" "Normal,Normal,Zero delay SPI,Half cycle delay SPI"
|
|
textline " "
|
|
bitfld.long 0x00 20. " FGEN ,Frame Generator Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " SCKSEL ,Sample Rate Generator Clock Selection" "Internal clk,Internal clk,MSPSCK & free-running,MSPSCK & resynchronized"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SCKPOL ,Sample Rate Generator Clock Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SGEN ,Sample Rate Generator Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " TXDDL ,Transmit Data Extra Delay" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 14. " TCKSEL ,Transmit Clock Selection" "External source on MSPTCK,Internal sample rate generator"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TCKPOL ,Transmit Clock Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 11.--12. " TFSSEL ,Transmit Frame Synchronization Selection" "External source,External source,Frame Generator logic; each time MSP_TDR copied to MSP_TSR,Frame Generator logic with period & width"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TFSPOL ,Transmit Frame Synchronization Polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TFFEN ,Transmit FIFO Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " TXEN ,Transmitter Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LBM ,Loopback Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RCKSEL ,Receive Clock Selection" "External source on MSPRCK,Sample Rate Generator & delivered on MSPRCK"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RCKPOL ,Receive Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RFSSEL ,Receive Frame Synchronization Selection" "External source,Frame Generator logic"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DCM ,Direct Companding Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RFSPOL ,Receive Frame Synchronization Polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RFFEN ,Receive FIFO Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXEN ,Receiver Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "MSP_GCR,MSP Global Configuration Register"
|
|
bitfld.long 0x00 23. " SPIBME ,SPI Burst Mode Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21.--22. " SPICKML ,SPI Clock Modes" "Normal,Normal,Zero delay SPI,Half cycle delay SPI"
|
|
textline " "
|
|
bitfld.long 0x00 20. " FGEN ,Frame Generator Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " SCKSEL ,Sample Rate Generator Clock Selection" "Internal clk,Internal clk,MSPSCK & free-running,MSPSCK & resynchronized"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SCKPOL ,Sample Rate Generator Clock Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SGEN ,Sample Rate Generator Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " TXDDL ,Transmit Data Extra Delay" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 14. " TCKSEL ,Transmit Clock Selection" "External source on MSPTCK,Internal sample rate generator"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TCKPOL ,Transmit Clock Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 11.--12. " TFSSEL ,Transmit Frame Synchronization Selection" "External source,External source,Frame Generator logic; each time MSP_TDR copied to MSP_TSR,Frame Generator logic with period & width"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TFSPOL ,Transmit Frame Synchronization Polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TFFEN ,Transmit FIFO Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " TXEN ,Transmitter Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LBM ,Loopback Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RCKSEL ,Receive Clock Selection" "Transmit Clock,Transmit Clock & delivered on RCK"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RCKPOL ,Receive Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RFSSEL ,Receive Frame Synchronization Selection" "External source,Frame Generator logic"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DCM ,Direct Companding Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RFSPOL ,Receive Frame Synchronization Polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RFFEN ,Receive FIFO Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXEN ,Receiver Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x08++0x0b
|
|
line.long 0x00 "MSP_TCF,MSP Transmit Configuration Register"
|
|
bitfld.long 0x00 28.--29. " TBSWAP ,Transmit Halfword Swapping" "Not swapped,Little-big endian byte swap in a word,Little-big endian byte swap in each halfwords,Halfword swap"
|
|
textline " "
|
|
bitfld.long 0x00 27. " TP2EN ,Transmit Phase 2 Enable" "Single,Dual"
|
|
textline " "
|
|
bitfld.long 0x00 26. " TP2SM ,Transmit Phase 2 Start Mode" "End of Phase 1,TFS trans. to opposite edge that started Phase 1"
|
|
textline " "
|
|
hexmask.long.byte 0x00 19.--25. 1. " TP2FLEN ,Transmit Phase 2 Frame Length"
|
|
bitfld.long 0x00 16.--18. " TP2ELEN ,Transmit Phase 2 Element Length" "8-bit,10-bit,12-bit,14-bit,16-bit,20-bit,24-bit,32-bit"
|
|
bitfld.long 0x00 15. " TFSIG ,Transmit Frame Sync Ignore" "Not ignored,Ignored"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " TDDLY ,Transmit Data Delay" "0 bits,1 bit,2 bits,3 bits"
|
|
bitfld.long 0x00 12. " TENDN ,Transmit Bit Endian Format" "MSBit-first,LSBit-first"
|
|
bitfld.long 0x00 10.--11. " TDTY ,Transmit Data Type" "Disabled,Disabled,Enabled/u-law,Enabled/A-law"
|
|
textline " "
|
|
hexmask.long.byte 0x00 3.--9. 1. " TP1FLEN ,Transmit Phase 1 Frame Length"
|
|
bitfld.long 0x00 0.--2. " TP1ELEN ,Transmit Phase 1 Element Length" "8-bit,10-bit,12-bit,14-bit,16-bit,20-bit,24-bit,32-bit"
|
|
line.long 0x04 "MSP_RCF,MSP Receive Configuration Register"
|
|
bitfld.long 0x04 28.--29. " RBSWAP ,Receive Halfword Swapping" "Not swapped,Little-big endian byte swap in a word,Little-big endian byte swap in each halfwords,Halfword swap"
|
|
textline " "
|
|
bitfld.long 0x04 27. " RP2EN ,Receive Phase 2 Enable" "Single,Dual"
|
|
textline " "
|
|
bitfld.long 0x04 26. " RP2SM ,Receive Phase 2 Start Mode" "End of Phase 1,RFS trans. to opposite edge that started Phase 1"
|
|
textline " "
|
|
hexmask.long.byte 0x04 19.--25. 1. " RP2FLEN ,Receive Phase 2 Frame Length"
|
|
bitfld.long 0x04 16.--18. " RP2ELEN ,Receive Phase 2 Element Length" "8-bit,10-bit,12-bit,14-bit,16-bit,20-bit,24-bit,32-bit"
|
|
bitfld.long 0x04 15. " RFSIG ,Receive Frame Sync Ignore" "Not ignored,Ignored"
|
|
textline " "
|
|
bitfld.long 0x04 13.--14. " RDDLY ,Receive Data Delay" "0 bits,1 bit,2 bits,3 bits"
|
|
bitfld.long 0x04 12. " RENDN ,Receive Bit Endian Format" "MSBit-first,LSBit-first"
|
|
bitfld.long 0x04 10.--11. " RDTYP ,Receive Data Type" "Disabled,Disabled,Enabled/u-law,Enabled/A-law"
|
|
textline " "
|
|
hexmask.long.byte 0x04 3.--9. 1. " RRP1FLEN ,Receive Phase 1 Frame Length"
|
|
bitfld.long 0x04 0.--2. " RP1ELEN ,Receive Phase 1 Element Length" "8-bit,10-bit,12-bit,14-bit,16-bit,20-bit,24-bit,32-bit"
|
|
line.long 0x08 "MSP_SRG,MSP Sample Rate Generator Register"
|
|
hexmask.long.word 0x08 16.--28. 1. " FRPER ,Frame Period"
|
|
bitfld.long 0x08 10.--15. " FRWID ,Frame Width" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64"
|
|
hexmask.long.word 0x08 0.--9. 1. " SCKDIV ,Sample Rate Generator Clock Divide factor"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "MSP_FLR,MSP Flag Register"
|
|
bitfld.long 0x00 5. " TFU ,Transmit FIFO Full flag" "Not full,Full"
|
|
bitfld.long 0x00 4. " TFE ,Transmit FIFO Empty flag" "Not empty,Empty"
|
|
bitfld.long 0x00 3. " TBUSY ,Transmit Busy flag" "Not busy,Busy"
|
|
bitfld.long 0x00 2. " RFU ,Receive FIFO Full flag" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RFE ,Receive FIFO Empty flag" "Not empty,Empty"
|
|
bitfld.long 0x00 0. " RBUSY ,Receiver Busy flag" "Not busy,Busy"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "MSP_DMACR,MSP DMA Control Register"
|
|
bitfld.long 0x00 1. " TDMAE ,Transmit DMA Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RDMAE ,Receive DMA Enable" "Disabled,Enabled"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "MSP_IMSC,MSP Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x00 9. " TFOIM ,Transmit FIFO not full interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 8. " RFOIM ,Receive FIFO not empty interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 7. " TFSIM ,Transmit Frame Sync interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 6. " TSEIM ,Transmit Frame Synchronization Error interrupt mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TUEIM ,Transmit Underrun Error interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 4. " TXIM ,Transmit interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 3. " RFSIM ,Receive Frame Sync interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " RSEIM ,Receive Frame Synchronization Error interrupt mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ROEIM ,Receive Overrun Error interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 0. " RXIM ,Receive Interrupt mask" "Masked,Not masked"
|
|
rgroup.long 0x24++0x07
|
|
line.long 0x00 "MSP_RIS,MSP Raw Interrupt Status Register"
|
|
bitfld.long 0x00 9. " TFORIS ,Transmit FIFO not full Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " RFORIS ,Receive FIFO not empty Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 7. " TFSRIS ,Transmit Frame Sync Raw Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TSERIS ,Transmit Frame Synchronization Error Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " TUERIS ,Transmit Underrun Error Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " TXRIS ,Transmit FIFO service Raw Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RFSRIS ,Receive Frame Sync Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " RSERIS ,Receive Frame Synchronization Error Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " ROERIS ,Receive Overrun Error Raw Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXRIS ,Receive FIFO service Raw Interrupt Status" "No interrupt,Interrupt"
|
|
line.long 0x04 "MSP_MIS,MSP Masked Interrupt Status Register"
|
|
bitfld.long 0x04 9. " TFOMIS ,Transmit FIFO not full Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 8. " RFOMIS ,Receive FIFO not empty Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 7. " TFSMIS ,Transmit Frame Sync Masked Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 6. " TSEMIS ,Transmit Frame Synchronization Error Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 5. " TUEMIS ,Transmit Underrun Error Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 4. " TXMIS ,Transmit FIFO service Masked Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 3. " RFSMIS ,Receive Frame Sync Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 2. " RSEMIS ,Receive Frame Synchronization Error Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 1. " ROEMIS ,Receive Overrun Error Masked Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 0. " RXMIS ,Receive FIFO service Masked Interrupt Status" "No interrupt,Interrupt"
|
|
group.long 0x2c++0x07
|
|
line.long 0x00 "MSP_ICR,MSP Interrupt Clear Register"
|
|
bitfld.long 0x00 7. " TFSIC ,Transmit Frame Sync Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 6. " TSEIC ,Transmit Frame Synchronization Error Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 5. " TUEIC ,Transmit Underrun Error Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RFSIC ,Receive Frame Sync Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 2. " RSEIC ,Receive Frame Synchronization Error Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 1. " ROEIC ,Receive Overrun Error Interrupt Clear" "No effect,Cleared"
|
|
line.long 0x04 "MSP_MCR,Multichannel Control Register"
|
|
bitfld.long 0x04 6.--7. " TMCSF ,Transmit Multichannel Current Subframe" "0,1,2,3"
|
|
bitfld.long 0x04 5. " TMCEN ,Transmit Multichannel Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 3.--4. " RMCMP ,Receive Multichannel Comparison Mode" "Disabled,Disabled,Enabled/FALSE,Enabled/TRUE"
|
|
textline " "
|
|
bitfld.long 0x04 1.--2. " RMCSF ,Receive Multichannel Current Subframe" "0,1,2,3"
|
|
bitfld.long 0x04 0. " RMCEN ,Receive Multichannel Mode Enable" "Disabled,Enabled"
|
|
if (((data.long(asd:0x101F9000+0x30))&0x18)==(0x10||0x18))
|
|
group.long 0x34++0x07
|
|
line.long 0x00 "MSP_RCV,Receive Compare Value Register"
|
|
bitfld.long 0x00 31. " RCV[31] ,Receive Compare Value bit 31" "Low,High"
|
|
bitfld.long 0x00 30. " RCV[30] ,Receive Compare Value bit 30" "Low,High"
|
|
bitfld.long 0x00 29. " RCV[29] ,Receive Compare Value bit 29" "Low,High"
|
|
bitfld.long 0x00 28. " RCV[28] ,Receive Compare Value bit 28" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RCV[27] ,Receive Compare Value bit 27" "Low,High"
|
|
bitfld.long 0x00 26. " RCV[26] ,Receive Compare Value bit 26" "Low,High"
|
|
bitfld.long 0x00 25. " RCV[25] ,Receive Compare Value bit 25" "Low,High"
|
|
bitfld.long 0x00 24. " RCV[24] ,Receive Compare Value bit 24" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RCV[23] ,Receive Compare Value bit 23" "Low,High"
|
|
bitfld.long 0x00 22. " RCV[22] ,Receive Compare Value bit 22" "Low,High"
|
|
bitfld.long 0x00 21. " RCV[21] ,Receive Compare Value bit 21" "Low,High"
|
|
bitfld.long 0x00 20. " RCV[20] ,Receive Compare Value bit 20" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " RCV[19] ,Receive Compare Value bit 19" "Low,High"
|
|
bitfld.long 0x00 18. " RCV[18] ,Receive Compare Value bit 18" "Low,High"
|
|
bitfld.long 0x00 17. " RCV[17] ,Receive Compare Value bit 17" "Low,High"
|
|
bitfld.long 0x00 16. " RCV[16] ,Receive Compare Value bit 16" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RCV[15] ,Receive Compare Value bit 15" "Low,High"
|
|
bitfld.long 0x00 14. " RCV[14] ,Receive Compare Value bit 14" "Low,High"
|
|
bitfld.long 0x00 13. " RCV[13] ,Receive Compare Value bit 13" "Low,High"
|
|
bitfld.long 0x00 12. " RCV[12] ,Receive Compare Value bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RCV[11] ,Receive Compare Value bit 11" "Low,High"
|
|
bitfld.long 0x00 10. " RCV[10] ,Receive Compare Value bit 10" "Low,High"
|
|
bitfld.long 0x00 9. " RCV[09] ,Receive Compare Value bit 9" "Low,High"
|
|
bitfld.long 0x00 8. " RCV[08] ,Receive Compare Value bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RCV[07] ,Receive Compare Value bit 7" "Low,High"
|
|
bitfld.long 0x00 6. " RCV[06] ,Receive Compare Value bit 6" "Low,High"
|
|
bitfld.long 0x00 5. " RCV[05] ,Receive Compare Value bit 5" "Low,High"
|
|
bitfld.long 0x00 4. " RCV[04] ,Receive Compare Value bit 4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RCV[03] ,Receive Compare Value bit 3" "Low,High"
|
|
bitfld.long 0x00 2. " RCV[02] ,Receive Compare Value bit 2" "Low,High"
|
|
bitfld.long 0x00 1. " RCV[01] ,Receive Compare Value bit 1" "Low,High"
|
|
bitfld.long 0x00 0. " RCV[00] ,Receive Compare Value bit 0" "Low,High"
|
|
line.long 0x04 "MSP_RCM,Receive Compare Mask Register"
|
|
bitfld.long 0x04 31. " RCM[31] ,Receive Compare Mask bit 31" "Low,High"
|
|
bitfld.long 0x04 30. " RCM[30] ,Receive Compare Mask bit 30" "Low,High"
|
|
bitfld.long 0x04 29. " RCM[29] ,Receive Compare Mask bit 29" "Low,High"
|
|
bitfld.long 0x04 28. " RCM[28] ,Receive Compare Mask bit 28" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 27. " RCM[27] ,Receive Compare Mask bit 27" "Low,High"
|
|
bitfld.long 0x04 26. " RCM[26] ,Receive Compare Mask bit 26" "Low,High"
|
|
bitfld.long 0x04 25. " RCM[25] ,Receive Compare Mask bit 25" "Low,High"
|
|
bitfld.long 0x04 24. " RCM[24] ,Receive Compare Mask bit 24" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 23. " RCM[23] ,Receive Compare Mask bit 23" "Low,High"
|
|
bitfld.long 0x04 22. " RCM[22] ,Receive Compare Mask bit 22" "Low,High"
|
|
bitfld.long 0x04 21. " RCM[21] ,Receive Compare Mask bit 21" "Low,High"
|
|
bitfld.long 0x04 20. " RCM[20] ,Receive Compare Mask bit 20" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 19. " RCM[19] ,Receive Compare Mask bit 19" "Low,High"
|
|
bitfld.long 0x04 18. " RCM[18] ,Receive Compare Mask bit 18" "Low,High"
|
|
bitfld.long 0x04 17. " RCM[17] ,Receive Compare Mask bit 17" "Low,High"
|
|
bitfld.long 0x04 16. " RCM[16] ,Receive Compare Mask bit 16" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 15. " RCM[15] ,Receive Compare Mask bit 15" "Low,High"
|
|
bitfld.long 0x04 14. " RCM[14] ,Receive Compare Mask bit 14" "Low,High"
|
|
bitfld.long 0x04 13. " RCM[13] ,Receive Compare Mask bit 13" "Low,High"
|
|
bitfld.long 0x04 12. " RCM[12] ,Receive Compare Mask bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 11. " RCM[11] ,Receive Compare Mask bit 11" "Low,High"
|
|
bitfld.long 0x04 10. " RCM[10] ,Receive Compare Mask bit 10" "Low,High"
|
|
bitfld.long 0x04 9. " RCM[09] ,Receive Compare Mask bit 9" "Low,High"
|
|
bitfld.long 0x04 8. " RCM[08] ,Receive Compare Mask bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 7. " RCM[07] ,Receive Compare Mask bit 7" "Low,High"
|
|
bitfld.long 0x04 6. " RCM[06] ,Receive Compare Mask bit 6" "Low,High"
|
|
bitfld.long 0x04 5. " RCM[05] ,Receive Compare Mask bit 5" "Low,High"
|
|
bitfld.long 0x04 4. " RCM[04] ,Receive Compare Mask bit 4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 3. " RCM[03] ,Receive Compare Mask bit 3" "Low,High"
|
|
bitfld.long 0x04 2. " RCM[02] ,Receive Compare Mask bit 2" "Low,High"
|
|
bitfld.long 0x04 1. " RCM[01] ,Receive Compare Mask bit 1" "Low,High"
|
|
bitfld.long 0x04 0. " RCM[00] ,Receive Compare Mask bit 0" "Low,High"
|
|
else
|
|
hgroup.long 0x34++0x07
|
|
hide.long 0x00 "MSP_RCV,Receive Compare Value Register"
|
|
hide.long 0x04 "MSP_RCM,Receive Compare Mask Register"
|
|
endif
|
|
if (((data.long(asd:0x101F9000+0x30))&0x20)==0x00)
|
|
hgroup.long 0x40++0x0f
|
|
hide.long 0x00 "MSP_TCE0,Transmit Channel Enable Register 0"
|
|
hide.long 0x04 "MSP_TCE1,Transmit Channel Enable Register 1"
|
|
hide.long 0x08 "MSP_TCE2,Transmit Channel Enable Register 2"
|
|
hide.long 0x0c "MSP_TCE3,Transmit Channel Enable Register 3"
|
|
else
|
|
group.long 0x40++0x0f
|
|
line.long 0x00 "MSP_TCE0,Transmit Channel Enable Register 0"
|
|
bitfld.long 0x00 31. " TCE[31] ,Transmit Channel Enable 31" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TCE[30] ,Transmit Channel Enable 30" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " TCE[29] ,Transmit Channel Enable 29" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " TCE[28] ,Transmit Channel Enable 28" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " TCE[27] ,Transmit Channel Enable 27" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " TCE[26] ,Transmit Channel Enable 26" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " TCE[25] ,Transmit Channel Enable 25" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " TCE[24] ,Transmit Channel Enable 24" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " TCE[23] ,Transmit Channel Enable 23" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " TCE[22] ,Transmit Channel Enable 22" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " TCE[21] ,Transmit Channel Enable 21" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCE[20] ,Transmit Channel Enable 20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " TCE[19] ,Transmit Channel Enable 19" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " TCE[18] ,Transmit Channel Enable 18" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " TCE[17] ,Transmit Channel Enable 17" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " TCE[16] ,Transmit Channel Enable 16" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " TCE[15] ,Transmit Channel Enable 15" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " TCE[14] ,Transmit Channel Enable 14" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TCE[13] ,Transmit Channel Enable 13" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " TCE[12] ,Transmit Channel Enable 12" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " TCE[11] ,Transmit Channel Enable 11" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TCE[10] ,Transmit Channel Enable 10" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " TCE[09] ,Transmit Channel Enable 9" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " TCE[08] ,Transmit Channel Enable 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TCE[07] ,Transmit Channel Enable 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TCE[06] ,Transmit Channel Enable 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " TCE[05] ,Transmit Channel Enable 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TCE[04] ,Transmit Channel Enable 4" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " TCE[03] ,Transmit Channel Enable 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TCE[02] ,Transmit Channel Enable 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TCE[01] ,Transmit Channel Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TCE[00] ,Transmit Channel Enable 0" "Disabled,Enabled"
|
|
line.long 0x04 "MSP_TCE1,Transmit Channel Enable Register 1"
|
|
bitfld.long 0x04 31. " TCE[63] ,Transmit Channel Enable 63" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " TCE[62] ,Transmit Channel Enable 62" "Disabled,Enabled"
|
|
bitfld.long 0x04 29. " TCE[61] ,Transmit Channel Enable 61" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 28. " TCE[60] ,Transmit Channel Enable 60" "Disabled,Enabled"
|
|
bitfld.long 0x04 27. " TCE[59] ,Transmit Channel Enable 59" "Disabled,Enabled"
|
|
bitfld.long 0x04 26. " TCE[58] ,Transmit Channel Enable 58" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 25. " TCE[57] ,Transmit Channel Enable 57" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " TCE[56] ,Transmit Channel Enable 56" "Disabled,Enabled"
|
|
bitfld.long 0x04 23. " TCE[55] ,Transmit Channel Enable 55" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 22. " TCE[54] ,Transmit Channel Enable 54" "Disabled,Enabled"
|
|
bitfld.long 0x04 21. " TCE[53] ,Transmit Channel Enable 53" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " TCE[52] ,Transmit Channel Enable 52" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " TCE[51] ,Transmit Channel Enable 51" "Disabled,Enabled"
|
|
bitfld.long 0x04 18. " TCE[50] ,Transmit Channel Enable 50" "Disabled,Enabled"
|
|
bitfld.long 0x04 17. " TCE[49] ,Transmit Channel Enable 49" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 16. " TCE[48] ,Transmit Channel Enable 48" "Disabled,Enabled"
|
|
bitfld.long 0x04 15. " TCE[47] ,Transmit Channel Enable 47" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " TCE[46] ,Transmit Channel Enable 46" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 13. " TCE[45] ,Transmit Channel Enable 45" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " TCE[44] ,Transmit Channel Enable 44" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " TCE[43] ,Transmit Channel Enable 43" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 10. " TCE[42] ,Transmit Channel Enable 42" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " TCE[41] ,Transmit Channel Enable 41" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " TCE[40] ,Transmit Channel Enable 40" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " TCE[39] ,Transmit Channel Enable 39" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " TCE[38] ,Transmit Channel Enable 38" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " TCE[37] ,Transmit Channel Enable 37" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 4. " TCE[36] ,Transmit Channel Enable 36" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " TCE[35] ,Transmit Channel Enable 35" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " TCE[34] ,Transmit Channel Enable 34" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " TCE[33] ,Transmit Channel Enable 33" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " TCE[32] ,Transmit Channel Enable 32" "Disabled,Enabled"
|
|
line.long 0x08 "MSP_TCE2,Transmit Channel Enable Register 2"
|
|
bitfld.long 0x08 31. " TCE[95] ,Transmit Channel Enable 95" "Disabled,Enabled"
|
|
bitfld.long 0x08 30. " TCE[94] ,Transmit Channel Enable 94" "Disabled,Enabled"
|
|
bitfld.long 0x08 29. " TCE[93] ,Transmit Channel Enable 93" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 28. " TCE[92] ,Transmit Channel Enable 92" "Disabled,Enabled"
|
|
bitfld.long 0x08 27. " TCE[91] ,Transmit Channel Enable 91" "Disabled,Enabled"
|
|
bitfld.long 0x08 26. " TCE[90] ,Transmit Channel Enable 90" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 25. " TCE[89] ,Transmit Channel Enable 89" "Disabled,Enabled"
|
|
bitfld.long 0x08 24. " TCE[88] ,Transmit Channel Enable 88" "Disabled,Enabled"
|
|
bitfld.long 0x08 23. " TCE[87] ,Transmit Channel Enable 87" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 22. " TCE[86] ,Transmit Channel Enable 86" "Disabled,Enabled"
|
|
bitfld.long 0x08 21. " TCE[85] ,Transmit Channel Enable 85" "Disabled,Enabled"
|
|
bitfld.long 0x08 20. " TCE[84] ,Transmit Channel Enable 84" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 19. " TCE[83] ,Transmit Channel Enable 83" "Disabled,Enabled"
|
|
bitfld.long 0x08 18. " TCE[82] ,Transmit Channel Enable 82" "Disabled,Enabled"
|
|
bitfld.long 0x08 17. " TCE[81] ,Transmit Channel Enable 81" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 16. " TCE[80] ,Transmit Channel Enable 80" "Disabled,Enabled"
|
|
bitfld.long 0x08 15. " TCE[79] ,Transmit Channel Enable 79" "Disabled,Enabled"
|
|
bitfld.long 0x08 14. " TCE[78] ,Transmit Channel Enable 78" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 13. " TCE[77] ,Transmit Channel Enable 77" "Disabled,Enabled"
|
|
bitfld.long 0x08 12. " TCE[76] ,Transmit Channel Enable 76" "Disabled,Enabled"
|
|
bitfld.long 0x08 11. " TCE[75] ,Transmit Channel Enable 75" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 10. " TCE[74] ,Transmit Channel Enable 74" "Disabled,Enabled"
|
|
bitfld.long 0x08 9. " TCE[73] ,Transmit Channel Enable 73" "Disabled,Enabled"
|
|
bitfld.long 0x08 8. " TCE[72] ,Transmit Channel Enable 72" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 7. " TCE[71] ,Transmit Channel Enable 71" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " TCE[70] ,Transmit Channel Enable 70" "Disabled,Enabled"
|
|
bitfld.long 0x08 5. " TCE[69] ,Transmit Channel Enable 69" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 4. " TCE[68] ,Transmit Channel Enable 68" "Disabled,Enabled"
|
|
bitfld.long 0x08 3. " TCE[67] ,Transmit Channel Enable 67" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " TCE[66] ,Transmit Channel Enable 66" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 1. " TCE[65] ,Transmit Channel Enable 65" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " TCE[64] ,Transmit Channel Enable 64" "Disabled,Enabled"
|
|
line.long 0x0c "MSP_TCE3,Transmit Channel Enable Register 3"
|
|
bitfld.long 0x0c 31. " TCE[127] ,Transmit Channel Enable 127" "Disabled,Enabled"
|
|
bitfld.long 0x0c 30. " TCE[126] ,Transmit Channel Enable 126" "Disabled,Enabled"
|
|
bitfld.long 0x0c 29. " TCE[125] ,Transmit Channel Enable 125" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 28. " TCE[124] ,Transmit Channel Enable 124" "Disabled,Enabled"
|
|
bitfld.long 0x0c 27. " TCE[123] ,Transmit Channel Enable 123" "Disabled,Enabled"
|
|
bitfld.long 0x0c 26. " TCE[122] ,Transmit Channel Enable 122" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " TCE[121] ,Transmit Channel Enable 121" "Disabled,Enabled"
|
|
bitfld.long 0x0c 24. " TCE[120] ,Transmit Channel Enable 120" "Disabled,Enabled"
|
|
bitfld.long 0x0c 23. " TCE[119] ,Transmit Channel Enable 119" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 22. " TCE[118] ,Transmit Channel Enable 118" "Disabled,Enabled"
|
|
bitfld.long 0x0c 21. " TCE[117] ,Transmit Channel Enable 117" "Disabled,Enabled"
|
|
bitfld.long 0x0c 20. " TCE[116] ,Transmit Channel Enable 116" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " TCE[115] ,Transmit Channel Enable 115" "Disabled,Enabled"
|
|
bitfld.long 0x0c 18. " TCE[114] ,Transmit Channel Enable 114" "Disabled,Enabled"
|
|
bitfld.long 0x0c 17. " TCE[113] ,Transmit Channel Enable 113" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 16. " TCE[112] ,Transmit Channel Enable 112" "Disabled,Enabled"
|
|
bitfld.long 0x0c 15. " TCE[111] ,Transmit Channel Enable 111" "Disabled,Enabled"
|
|
bitfld.long 0x0c 14. " TCE[110] ,Transmit Channel Enable 110" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " TCE[109] ,Transmit Channel Enable 109" "Disabled,Enabled"
|
|
bitfld.long 0x0c 12. " TCE[108] ,Transmit Channel Enable 108" "Disabled,Enabled"
|
|
bitfld.long 0x0c 11. " TCE[107] ,Transmit Channel Enable 107" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 10. " TCE[106] ,Transmit Channel Enable 106" "Disabled,Enabled"
|
|
bitfld.long 0x0c 9. " TCE[105] ,Transmit Channel Enable 105" "Disabled,Enabled"
|
|
bitfld.long 0x0c 8. " TCE[104] ,Transmit Channel Enable 104" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " TCE[103] ,Transmit Channel Enable 103" "Disabled,Enabled"
|
|
bitfld.long 0x0c 6. " TCE[102] ,Transmit Channel Enable 102" "Disabled,Enabled"
|
|
bitfld.long 0x0c 5. " TCE[101] ,Transmit Channel Enable 101" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 4. " TCE[100] ,Transmit Channel Enable 100" "Disabled,Enabled"
|
|
bitfld.long 0x0c 3. " TCE[99] ,Transmit Channel Enable 99" "Disabled,Enabled"
|
|
bitfld.long 0x0c 2. " TCE[98] ,Transmit Channel Enable 98" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " TCE[97] ,Transmit Channel Enable 97" "Disabled,Enabled"
|
|
bitfld.long 0x0c 0. " TCE[96] ,Transmit Channel Enable 96" "Disabled,Enabled"
|
|
endif
|
|
if (((data.long(asd:0x101F9000+0x30))&0x01)==0x00)
|
|
group.long 0x60++0x0f
|
|
hide.long 0x00 "MSP_RCE0,Receive Channel Enable Register 0"
|
|
hide.long 0x04 "MSP_RCE1,Receive Channel Enable Register 1"
|
|
hide.long 0x08 "MSP_RCE2,Receive Channel Enable Register 2"
|
|
hide.long 0x0c "MSP_RCE3,Receive Channel Enable Register 3"
|
|
else
|
|
group.long 0x60++0x0f
|
|
line.long 0x00 "MSP_RCE0,Receive Channel Enable Register 0"
|
|
bitfld.long 0x00 31. " RCE[31] ,Receive Channel Enable 31" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " RCE[30] ,Receive Channel Enable 30" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " RCE[29] ,Receive Channel Enable 29" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " RCE[28] ,Receive Channel Enable 28" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " RCE[27] ,Receive Channel Enable 27" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " RCE[26] ,Receive Channel Enable 26" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " RCE[25] ,Receive Channel Enable 25" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " RCE[24] ,Receive Channel Enable 24" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " RCE[23] ,Receive Channel Enable 23" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " RCE[22] ,Receive Channel Enable 22" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RCE[21] ,Receive Channel Enable 21" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " RCE[20] ,Receive Channel Enable 20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " RCE[19] ,Receive Channel Enable 19" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " RCE[18] ,Receive Channel Enable 18" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " RCE[17] ,Receive Channel Enable 17" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RCE[16] ,Receive Channel Enable 16" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " RCE[15] ,Receive Channel Enable 15" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " RCE[14] ,Receive Channel Enable 14" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RCE[13] ,Receive Channel Enable 13" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " RCE[12] ,Receive Channel Enable 12" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " RCE[11] ,Receive Channel Enable 11" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RCE[10] ,Receive Channel Enable 10" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " RCE[09] ,Receive Channel Enable 9" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " RCE[08] ,Receive Channel Enable 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RCE[07] ,Receive Channel Enable 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " RCE[06] ,Receive Channel Enable 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " RCE[05] ,Receive Channel Enable 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RCE[04] ,Receive Channel Enable 4" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " RCE[03] ,Receive Channel Enable 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " RCE[02] ,Receive Channel Enable 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RCE[01] ,Receive Channel Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RCE[00] ,Receive Channel Enable 0" "Disabled,Enabled"
|
|
line.long 0x04 "MSP_RCE1,Receive Channel Enable Register 1"
|
|
bitfld.long 0x04 31. " RCE[63] ,Receive Channel Enable 63" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " RCE[62] ,Receive Channel Enable 62" "Disabled,Enabled"
|
|
bitfld.long 0x04 29. " RCE[61] ,Receive Channel Enable 61" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 28. " RCE[60] ,Receive Channel Enable 60" "Disabled,Enabled"
|
|
bitfld.long 0x04 27. " RCE[59] ,Receive Channel Enable 59" "Disabled,Enabled"
|
|
bitfld.long 0x04 26. " RCE[58] ,Receive Channel Enable 58" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 25. " RCE[57] ,Receive Channel Enable 57" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " RCE[56] ,Receive Channel Enable 56" "Disabled,Enabled"
|
|
bitfld.long 0x04 23. " RCE[55] ,Receive Channel Enable 55" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 22. " RCE[54] ,Receive Channel Enable 54" "Disabled,Enabled"
|
|
bitfld.long 0x04 21. " RCE[53] ,Receive Channel Enable 53" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " RCE[52] ,Receive Channel Enable 52" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " RCE[51] ,Receive Channel Enable 51" "Disabled,Enabled"
|
|
bitfld.long 0x04 18. " RCE[50] ,Receive Channel Enable 50" "Disabled,Enabled"
|
|
bitfld.long 0x04 17. " RCE[49] ,Receive Channel Enable 49" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 16. " RCE[48] ,Receive Channel Enable 48" "Disabled,Enabled"
|
|
bitfld.long 0x04 15. " RCE[47] ,Receive Channel Enable 47" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " RCE[46] ,Receive Channel Enable 46" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 13. " RCE[45] ,Receive Channel Enable 45" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " RCE[44] ,Receive Channel Enable 44" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " RCE[43] ,Receive Channel Enable 43" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 10. " RCE[42] ,Receive Channel Enable 42" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " RCE[41] ,Receive Channel Enable 41" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " RCE[40] ,Receive Channel Enable 40" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " RCE[39] ,Receive Channel Enable 39" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " RCE[38] ,Receive Channel Enable 38" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " RCE[37] ,Receive Channel Enable 37" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 4. " RCE[36] ,Receive Channel Enable 36" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " RCE[35] ,Receive Channel Enable 35" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " RCE[34] ,Receive Channel Enable 34" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " RCE[33] ,Receive Channel Enable 33" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " RCE[32] ,Receive Channel Enable 32" "Disabled,Enabled"
|
|
line.long 0x08 "MSP_RCE2,Receive Channel Enable Register 2"
|
|
bitfld.long 0x08 31. " RCE[95] ,Receive Channel Enable 95" "Disabled,Enabled"
|
|
bitfld.long 0x08 30. " RCE[94] ,Receive Channel Enable 94" "Disabled,Enabled"
|
|
bitfld.long 0x08 29. " RCE[93] ,Receive Channel Enable 93" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 28. " RCE[92] ,Receive Channel Enable 92" "Disabled,Enabled"
|
|
bitfld.long 0x08 27. " RCE[91] ,Receive Channel Enable 91" "Disabled,Enabled"
|
|
bitfld.long 0x08 26. " RCE[90] ,Receive Channel Enable 90" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 25. " RCE[89] ,Receive Channel Enable 89" "Disabled,Enabled"
|
|
bitfld.long 0x08 24. " RCE[88] ,Receive Channel Enable 88" "Disabled,Enabled"
|
|
bitfld.long 0x08 23. " RCE[87] ,Receive Channel Enable 87" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 22. " RCE[86] ,Receive Channel Enable 86" "Disabled,Enabled"
|
|
bitfld.long 0x08 21. " RCE[85] ,Receive Channel Enable 85" "Disabled,Enabled"
|
|
bitfld.long 0x08 20. " RCE[84] ,Receive Channel Enable 84" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 19. " RCE[83] ,Receive Channel Enable 83" "Disabled,Enabled"
|
|
bitfld.long 0x08 18. " RCE[82] ,Receive Channel Enable 82" "Disabled,Enabled"
|
|
bitfld.long 0x08 17. " RCE[81] ,Receive Channel Enable 81" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 16. " RCE[80] ,Receive Channel Enable 80" "Disabled,Enabled"
|
|
bitfld.long 0x08 15. " RCE[79] ,Receive Channel Enable 79" "Disabled,Enabled"
|
|
bitfld.long 0x08 14. " RCE[78] ,Receive Channel Enable 78" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 13. " RCE[77] ,Receive Channel Enable 77" "Disabled,Enabled"
|
|
bitfld.long 0x08 12. " RCE[76] ,Receive Channel Enable 76" "Disabled,Enabled"
|
|
bitfld.long 0x08 11. " RCE[75] ,Receive Channel Enable 75" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 10. " RCE[74] ,Receive Channel Enable 74" "Disabled,Enabled"
|
|
bitfld.long 0x08 9. " RCE[73] ,Receive Channel Enable 73" "Disabled,Enabled"
|
|
bitfld.long 0x08 8. " RCE[72] ,Receive Channel Enable 72" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 7. " RCE[71] ,Receive Channel Enable 71" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " RCE[70] ,Receive Channel Enable 70" "Disabled,Enabled"
|
|
bitfld.long 0x08 5. " RCE[69] ,Receive Channel Enable 69" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 4. " RCE[68] ,Receive Channel Enable 68" "Disabled,Enabled"
|
|
bitfld.long 0x08 3. " RCE[67] ,Receive Channel Enable 67" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " RCE[66] ,Receive Channel Enable 66" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 1. " RCE[65] ,Receive Channel Enable 65" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " RCE[64] ,Receive Channel Enable 64" "Disabled,Enabled"
|
|
line.long 0x0c "MSP_RCE3,Receive Channel Enable Register 3"
|
|
bitfld.long 0x0c 31. " RCE[127] ,Receive Channel Enable 127" "Disabled,Enabled"
|
|
bitfld.long 0x0c 30. " RCE[126] ,Receive Channel Enable 126" "Disabled,Enabled"
|
|
bitfld.long 0x0c 29. " RCE[125] ,Receive Channel Enable 125" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 28. " RCE[124] ,Receive Channel Enable 124" "Disabled,Enabled"
|
|
bitfld.long 0x0c 27. " RCE[123] ,Receive Channel Enable 123" "Disabled,Enabled"
|
|
bitfld.long 0x0c 26. " RCE[122] ,Receive Channel Enable 122" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " RCE[121] ,Receive Channel Enable 121" "Disabled,Enabled"
|
|
bitfld.long 0x0c 24. " RCE[120] ,Receive Channel Enable 120" "Disabled,Enabled"
|
|
bitfld.long 0x0c 23. " RCE[119] ,Receive Channel Enable 119" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 22. " RCE[118] ,Receive Channel Enable 118" "Disabled,Enabled"
|
|
bitfld.long 0x0c 21. " RCE[117] ,Receive Channel Enable 117" "Disabled,Enabled"
|
|
bitfld.long 0x0c 20. " RCE[116] ,Receive Channel Enable 116" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " RCE[115] ,Receive Channel Enable 115" "Disabled,Enabled"
|
|
bitfld.long 0x0c 18. " RCE[114] ,Receive Channel Enable 114" "Disabled,Enabled"
|
|
bitfld.long 0x0c 17. " RCE[113] ,Receive Channel Enable 113" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 16. " RCE[112] ,Receive Channel Enable 112" "Disabled,Enabled"
|
|
bitfld.long 0x0c 15. " RCE[111] ,Receive Channel Enable 111" "Disabled,Enabled"
|
|
bitfld.long 0x0c 14. " RCE[110] ,Receive Channel Enable 110" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " RCE[109] ,Receive Channel Enable 109" "Disabled,Enabled"
|
|
bitfld.long 0x0c 12. " RCE[108] ,Receive Channel Enable 108" "Disabled,Enabled"
|
|
bitfld.long 0x0c 11. " RCE[107] ,Receive Channel Enable 107" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 10. " RCE[106] ,Receive Channel Enable 106" "Disabled,Enabled"
|
|
bitfld.long 0x0c 9. " RCE[105] ,Receive Channel Enable 105" "Disabled,Enabled"
|
|
bitfld.long 0x0c 8. " RCE[104] ,Receive Channel Enable 104" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " RCE[103] ,Receive Channel Enable 103" "Disabled,Enabled"
|
|
bitfld.long 0x0c 6. " RCE[102] ,Receive Channel Enable 102" "Disabled,Enabled"
|
|
bitfld.long 0x0c 5. " RCE[101] ,Receive Channel Enable 101" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 4. " RCE[100] ,Receive Channel Enable 100" "Disabled,Enabled"
|
|
bitfld.long 0x0c 3. " RCE[99] ,Receive Channel Enable 99" "Disabled,Enabled"
|
|
bitfld.long 0x0c 2. " RCE[98] ,Receive Channel Enable 98" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " RCE[97] ,Receive Channel Enable 97" "Disabled,Enabled"
|
|
bitfld.long 0x0c 0. " RCE[96] ,Receive Channel Enable 96" "Disabled,Enabled"
|
|
endif
|
|
sif ((cpu()=="STA2065")||(cpu()=="STA2165"))
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "MSP_IODLY,MSP Input/Output Delay Lines Control Register"
|
|
bitfld.long 0x00 24.--26. " SCKDLY ,MSPSCK delay line" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 20.--22. " RDXDLY ,MSPRDX delay line" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--18. " RFSDLY ,MSPRFS delay line" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " RCKDLY ,MSPRCK delay line" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--10. " TDXDLY ,MSPTDX delay line" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 4.--6. " TFSDLY ,MSPTFS delay line" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " TCKDLY ,MSPTCK delay line" "0,1,2,3,4,5,6,7"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "MSP_ITCR,MSP Test Control Register"
|
|
bitfld.long 0x00 1. " TESTFIFO ,FIFO test enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ITEN ,Integration test enable bit" "Normal,Enabled"
|
|
group.long 0x84++0x07
|
|
line.long 0x00 "MSP_ITIP,MSP Integration Test Input Register"
|
|
bitfld.long 0x00 7. " MTDMAC ,Transmit DMA clear input value" "Low,High"
|
|
bitfld.long 0x00 6. " MRDMAC ,Receive DMA clear input value" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " MSCKI ,MSPSCK input value" "Low,High"
|
|
bitfld.long 0x00 4. " MTCKI ,MSPTCK input value" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MTFSI ,MSPTFS input value" "Low,High"
|
|
bitfld.long 0x00 2. " MRCKI ,MSPRCK input value" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " MRFSI ,MSPRFS input value" "Low,High"
|
|
bitfld.long 0x00 0. " MRXDI ,MSPRXD input value" "Low,High"
|
|
line.long 0x04 "MSP_ITOP,MSP Integration Test Output Register"
|
|
bitfld.long 0x04 22. " MTFOINTR ,MSPTFOINTR value" "0,1"
|
|
bitfld.long 0x04 21. " MRFOINTR ,MSPRFOINTR value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 20. " MTDMASREQ ,Transmit DMA single request value" "0,1"
|
|
bitfld.long 0x04 19. " MTDMABREQ ,Transmit DMA Burst Request value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 18. " MRDMASREQ ,Receive DMA Single Request value" "0,1"
|
|
bitfld.long 0x04 17. " MRDMABREQ ,Receive DMA Burst Request value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 16. " MINTR ,MSPINTR value" "0,1"
|
|
bitfld.long 0x04 15. " MTFSINTR ,MSPTFSINTR value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 14. " MTEINTR ,MSPTEINTR value" "0,1"
|
|
bitfld.long 0x04 13. " MTXINTR ,MSPTXINTR value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 12. " MRFSINTR ,MSPRFSINTR value" "0,1"
|
|
bitfld.long 0x04 11. " MREINTR ,MSPREINTR value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 10. " MRXINTR ,MSPRXINTR value" "0,1"
|
|
bitfld.long 0x04 9. " MTCKOEN ,MSPTCK output enable value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 8. " MTFSOEN ,MSPTFS output enable value" "0,1"
|
|
bitfld.long 0x04 7. " MRCKOEN ,MSPRCK output enable value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 6. " MRFSOEN ,MSPRFS output enable value" "0,1"
|
|
bitfld.long 0x04 5. " MTXDOEN ,MSPTXD output enable value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 4. " MTCKO ,MSPTCK output value" "0,1"
|
|
bitfld.long 0x04 3. " MTFSO ,MSPTFS output value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 2. " MRCKO ,MSPRCK output value" "0,1"
|
|
bitfld.long 0x04 1. " MRFSO ,MSPRFS output value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 0. " MTXDO ,MSPTXD output value" "0,1"
|
|
if (((d.l(asd:(0x101F9000+0x80)))&0x2)==0x2)
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "MSP_TSTDR,MSP Test Data Register"
|
|
else
|
|
hgroup.long 0x8C++0x03
|
|
hide.long 0x00 "MSP_TSTDR,MSP Test Data Register"
|
|
endif
|
|
endif
|
|
width 14.
|
|
rgroup.long 0xfe0++0x01f
|
|
line.long 0x00 "MSPPERIPHID0,MSP Peripheral Identification Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PN0 ,Part Number 0 (0x21)"
|
|
line.long 0x04 "MSPPERIPHID1,MSP Peripheral Identification Register 1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " D0 ,Designer 0 (0x00)"
|
|
hexmask.long.byte 0x04 0.--3. 1. " PN1 ,Part Number 1 (0x00)"
|
|
line.long 0x08 "MSPPERIPHID2,MSP Peripheral Identification Register 2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " REV ,Revision (0x02)"
|
|
hexmask.long.byte 0x08 0.--3. 1. " D1 ,Designer 1 (0x08)"
|
|
line.long 0x0c "MSPPERIPHID3,MSP Peripheral Identification Register 3"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " CONF ,Configuration (0x00)"
|
|
line.long 0x10 "MSPPCELLID0,MSP PCell Identification Register 0"
|
|
hexmask.long.byte 0x10 0.--7. 1. " MSPPCELLID0 ,MSP PCell ID0 (0x0D)"
|
|
line.long 0x14 "MSPPCELLID1,MSP PCell Identification Register 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " MSPPCELLID1 ,MSP PCell ID1 (0xF0)"
|
|
line.long 0x18 "MSPPCELLID2,MSP PCell Identification Register 2"
|
|
hexmask.long.byte 0x18 0.--7. 1. " MSPPCELLID2 ,MSP PCell ID2 (0x05)"
|
|
line.long 0x1c "MSPPCELLID3,MSP PCell Identification Register 3"
|
|
hexmask.long.byte 0x1c 0.--7. 1. " MSPPCELLID3 ,MSP PCell ID3 (0xB1)"
|
|
width 0xb
|
|
tree.end
|
|
tree "MSP1"
|
|
base asd:0x101F1000
|
|
width 10.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "MSP_DR,MSP Data Register"
|
|
if (((data.long(asd:0x101F1000+0x04))&0x600080)==(0x400000||0x600000))
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "MSP_GCR,MSP Global Configuration Register"
|
|
bitfld.long 0x00 23. " SPIBME ,SPI Burst Mode Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21.--22. " SPICKML ,SPI Clock Modes" "Normal,Normal,Zero delay SPI,Half cycle delay SPI"
|
|
textline " "
|
|
bitfld.long 0x00 20. " FGEN ,Frame Generator Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " SCKSEL ,Sample Rate Generator Clock Selection" "Internal clk,Internal clk,MSPSCK & free-running,MSPSCK & resynchronized"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SCKPOL ,Sample Rate Generator Clock Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SGEN ,Sample Rate Generator Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " TXDDL ,Transmit Data Extra Delay" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 14. " TCKSEL ,Transmit Clock Selection" "External SPI master,Internal sample rate generator/MSP is SPI Master"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TCKPOL ,Transmit Clock Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 11.--12. " TFSSEL ,Transmit Frame Synchronization Selection" "External source,External source,Frame Generator logic; each time MSP_TDR copied to MSP_TSR,Frame Generator logic with period & width"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TFSPOL ,Transmit Frame Synchronization Polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TFFEN ,Transmit FIFO Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " TXEN ,Transmitter Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LBM ,Loopback Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RCKSEL ,Receive Clock Selection" "External source on MSPRCK,Sample Rate Generator & delivered on MSPRCK"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RCKPOL ,Receive Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RFSSEL ,Receive Frame Synchronization Selection" "External source,Frame Generator logic"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DCM ,Direct Companding Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RFSPOL ,Receive Frame Synchronization Polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RFFEN ,Receive FIFO Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXEN ,Receiver Enable" "Disabled,Enabled"
|
|
elif (((data.long(asd:0x101F1000+0x04))&0x600080)==(0x400080||0x600080))
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "MSP_GCR,MSP Global Configuration Register"
|
|
bitfld.long 0x00 23. " SPIBME ,SPI Burst Mode Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21.--22. " SPICKML ,SPI Clock Modes" "Normal,Normal,Zero delay SPI,Half cycle delay SPI"
|
|
textline " "
|
|
bitfld.long 0x00 20. " FGEN ,Frame Generator Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " SCKSEL ,Sample Rate Generator Clock Selection" "Internal clk,Internal clk,MSPSCK & free-running,MSPSCK & resynchronized"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SCKPOL ,Sample Rate Generator Clock Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SGEN ,Sample Rate Generator Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " TXDDL ,Transmit Data Extra Delay" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 14. " TCKSEL ,Transmit Clock Selection" "External SPI master,Internal sample rate generator/MSP is SPI Master"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TCKPOL ,Transmit Clock Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 11.--12. " TFSSEL ,Transmit Frame Synchronization Selection" "External source,External source,Frame Generator logic; each time MSP_TDR copied to MSP_TSR,Frame Generator logic with period & width"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TFSPOL ,Transmit Frame Synchronization Polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TFFEN ,Transmit FIFO Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " TXEN ,Transmitter Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LBM ,Loopback Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RCKSEL ,Receive Clock Selection" "Transmit Clock,Transmit Clock & delivered on RCK"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RCKPOL ,Receive Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RFSSEL ,Receive Frame Synchronization Selection" "External source,Frame Generator logic"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DCM ,Direct Companding Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RFSPOL ,Receive Frame Synchronization Polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RFFEN ,Receive FIFO Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXEN ,Receiver Enable" "Disabled,Enabled"
|
|
elif (((data.long(asd:0x101F1000+0x04))&0x600080)==(0x000000||0x200000))
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "MSP_GCR,MSP Global Configuration Register"
|
|
bitfld.long 0x00 23. " SPIBME ,SPI Burst Mode Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21.--22. " SPICKML ,SPI Clock Modes" "Normal,Normal,Zero delay SPI,Half cycle delay SPI"
|
|
textline " "
|
|
bitfld.long 0x00 20. " FGEN ,Frame Generator Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " SCKSEL ,Sample Rate Generator Clock Selection" "Internal clk,Internal clk,MSPSCK & free-running,MSPSCK & resynchronized"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SCKPOL ,Sample Rate Generator Clock Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SGEN ,Sample Rate Generator Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " TXDDL ,Transmit Data Extra Delay" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 14. " TCKSEL ,Transmit Clock Selection" "External source on MSPTCK,Internal sample rate generator"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TCKPOL ,Transmit Clock Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 11.--12. " TFSSEL ,Transmit Frame Synchronization Selection" "External source,External source,Frame Generator logic; each time MSP_TDR copied to MSP_TSR,Frame Generator logic with period & width"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TFSPOL ,Transmit Frame Synchronization Polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TFFEN ,Transmit FIFO Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " TXEN ,Transmitter Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LBM ,Loopback Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RCKSEL ,Receive Clock Selection" "External source on MSPRCK,Sample Rate Generator & delivered on MSPRCK"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RCKPOL ,Receive Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RFSSEL ,Receive Frame Synchronization Selection" "External source,Frame Generator logic"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DCM ,Direct Companding Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RFSPOL ,Receive Frame Synchronization Polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RFFEN ,Receive FIFO Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXEN ,Receiver Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "MSP_GCR,MSP Global Configuration Register"
|
|
bitfld.long 0x00 23. " SPIBME ,SPI Burst Mode Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21.--22. " SPICKML ,SPI Clock Modes" "Normal,Normal,Zero delay SPI,Half cycle delay SPI"
|
|
textline " "
|
|
bitfld.long 0x00 20. " FGEN ,Frame Generator Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " SCKSEL ,Sample Rate Generator Clock Selection" "Internal clk,Internal clk,MSPSCK & free-running,MSPSCK & resynchronized"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SCKPOL ,Sample Rate Generator Clock Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SGEN ,Sample Rate Generator Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " TXDDL ,Transmit Data Extra Delay" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 14. " TCKSEL ,Transmit Clock Selection" "External source on MSPTCK,Internal sample rate generator"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TCKPOL ,Transmit Clock Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 11.--12. " TFSSEL ,Transmit Frame Synchronization Selection" "External source,External source,Frame Generator logic; each time MSP_TDR copied to MSP_TSR,Frame Generator logic with period & width"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TFSPOL ,Transmit Frame Synchronization Polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TFFEN ,Transmit FIFO Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " TXEN ,Transmitter Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LBM ,Loopback Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RCKSEL ,Receive Clock Selection" "Transmit Clock,Transmit Clock & delivered on RCK"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RCKPOL ,Receive Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RFSSEL ,Receive Frame Synchronization Selection" "External source,Frame Generator logic"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DCM ,Direct Companding Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RFSPOL ,Receive Frame Synchronization Polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RFFEN ,Receive FIFO Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXEN ,Receiver Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x08++0x0b
|
|
line.long 0x00 "MSP_TCF,MSP Transmit Configuration Register"
|
|
bitfld.long 0x00 28.--29. " TBSWAP ,Transmit Halfword Swapping" "Not swapped,Little-big endian byte swap in a word,Little-big endian byte swap in each halfwords,Halfword swap"
|
|
textline " "
|
|
bitfld.long 0x00 27. " TP2EN ,Transmit Phase 2 Enable" "Single,Dual"
|
|
textline " "
|
|
bitfld.long 0x00 26. " TP2SM ,Transmit Phase 2 Start Mode" "End of Phase 1,TFS trans. to opposite edge that started Phase 1"
|
|
textline " "
|
|
hexmask.long.byte 0x00 19.--25. 1. " TP2FLEN ,Transmit Phase 2 Frame Length"
|
|
bitfld.long 0x00 16.--18. " TP2ELEN ,Transmit Phase 2 Element Length" "8-bit,10-bit,12-bit,14-bit,16-bit,20-bit,24-bit,32-bit"
|
|
bitfld.long 0x00 15. " TFSIG ,Transmit Frame Sync Ignore" "Not ignored,Ignored"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " TDDLY ,Transmit Data Delay" "0 bits,1 bit,2 bits,3 bits"
|
|
bitfld.long 0x00 12. " TENDN ,Transmit Bit Endian Format" "MSBit-first,LSBit-first"
|
|
bitfld.long 0x00 10.--11. " TDTY ,Transmit Data Type" "Disabled,Disabled,Enabled/u-law,Enabled/A-law"
|
|
textline " "
|
|
hexmask.long.byte 0x00 3.--9. 1. " TP1FLEN ,Transmit Phase 1 Frame Length"
|
|
bitfld.long 0x00 0.--2. " TP1ELEN ,Transmit Phase 1 Element Length" "8-bit,10-bit,12-bit,14-bit,16-bit,20-bit,24-bit,32-bit"
|
|
line.long 0x04 "MSP_RCF,MSP Receive Configuration Register"
|
|
bitfld.long 0x04 28.--29. " RBSWAP ,Receive Halfword Swapping" "Not swapped,Little-big endian byte swap in a word,Little-big endian byte swap in each halfwords,Halfword swap"
|
|
textline " "
|
|
bitfld.long 0x04 27. " RP2EN ,Receive Phase 2 Enable" "Single,Dual"
|
|
textline " "
|
|
bitfld.long 0x04 26. " RP2SM ,Receive Phase 2 Start Mode" "End of Phase 1,RFS trans. to opposite edge that started Phase 1"
|
|
textline " "
|
|
hexmask.long.byte 0x04 19.--25. 1. " RP2FLEN ,Receive Phase 2 Frame Length"
|
|
bitfld.long 0x04 16.--18. " RP2ELEN ,Receive Phase 2 Element Length" "8-bit,10-bit,12-bit,14-bit,16-bit,20-bit,24-bit,32-bit"
|
|
bitfld.long 0x04 15. " RFSIG ,Receive Frame Sync Ignore" "Not ignored,Ignored"
|
|
textline " "
|
|
bitfld.long 0x04 13.--14. " RDDLY ,Receive Data Delay" "0 bits,1 bit,2 bits,3 bits"
|
|
bitfld.long 0x04 12. " RENDN ,Receive Bit Endian Format" "MSBit-first,LSBit-first"
|
|
bitfld.long 0x04 10.--11. " RDTYP ,Receive Data Type" "Disabled,Disabled,Enabled/u-law,Enabled/A-law"
|
|
textline " "
|
|
hexmask.long.byte 0x04 3.--9. 1. " RRP1FLEN ,Receive Phase 1 Frame Length"
|
|
bitfld.long 0x04 0.--2. " RP1ELEN ,Receive Phase 1 Element Length" "8-bit,10-bit,12-bit,14-bit,16-bit,20-bit,24-bit,32-bit"
|
|
line.long 0x08 "MSP_SRG,MSP Sample Rate Generator Register"
|
|
hexmask.long.word 0x08 16.--28. 1. " FRPER ,Frame Period"
|
|
bitfld.long 0x08 10.--15. " FRWID ,Frame Width" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64"
|
|
hexmask.long.word 0x08 0.--9. 1. " SCKDIV ,Sample Rate Generator Clock Divide factor"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "MSP_FLR,MSP Flag Register"
|
|
bitfld.long 0x00 5. " TFU ,Transmit FIFO Full flag" "Not full,Full"
|
|
bitfld.long 0x00 4. " TFE ,Transmit FIFO Empty flag" "Not empty,Empty"
|
|
bitfld.long 0x00 3. " TBUSY ,Transmit Busy flag" "Not busy,Busy"
|
|
bitfld.long 0x00 2. " RFU ,Receive FIFO Full flag" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RFE ,Receive FIFO Empty flag" "Not empty,Empty"
|
|
bitfld.long 0x00 0. " RBUSY ,Receiver Busy flag" "Not busy,Busy"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "MSP_DMACR,MSP DMA Control Register"
|
|
bitfld.long 0x00 1. " TDMAE ,Transmit DMA Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RDMAE ,Receive DMA Enable" "Disabled,Enabled"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "MSP_IMSC,MSP Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x00 9. " TFOIM ,Transmit FIFO not full interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 8. " RFOIM ,Receive FIFO not empty interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 7. " TFSIM ,Transmit Frame Sync interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 6. " TSEIM ,Transmit Frame Synchronization Error interrupt mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TUEIM ,Transmit Underrun Error interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 4. " TXIM ,Transmit interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 3. " RFSIM ,Receive Frame Sync interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " RSEIM ,Receive Frame Synchronization Error interrupt mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ROEIM ,Receive Overrun Error interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 0. " RXIM ,Receive Interrupt mask" "Masked,Not masked"
|
|
rgroup.long 0x24++0x07
|
|
line.long 0x00 "MSP_RIS,MSP Raw Interrupt Status Register"
|
|
bitfld.long 0x00 9. " TFORIS ,Transmit FIFO not full Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " RFORIS ,Receive FIFO not empty Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 7. " TFSRIS ,Transmit Frame Sync Raw Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TSERIS ,Transmit Frame Synchronization Error Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " TUERIS ,Transmit Underrun Error Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " TXRIS ,Transmit FIFO service Raw Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RFSRIS ,Receive Frame Sync Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " RSERIS ,Receive Frame Synchronization Error Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " ROERIS ,Receive Overrun Error Raw Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXRIS ,Receive FIFO service Raw Interrupt Status" "No interrupt,Interrupt"
|
|
line.long 0x04 "MSP_MIS,MSP Masked Interrupt Status Register"
|
|
bitfld.long 0x04 9. " TFOMIS ,Transmit FIFO not full Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 8. " RFOMIS ,Receive FIFO not empty Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 7. " TFSMIS ,Transmit Frame Sync Masked Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 6. " TSEMIS ,Transmit Frame Synchronization Error Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 5. " TUEMIS ,Transmit Underrun Error Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 4. " TXMIS ,Transmit FIFO service Masked Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 3. " RFSMIS ,Receive Frame Sync Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 2. " RSEMIS ,Receive Frame Synchronization Error Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 1. " ROEMIS ,Receive Overrun Error Masked Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 0. " RXMIS ,Receive FIFO service Masked Interrupt Status" "No interrupt,Interrupt"
|
|
group.long 0x2c++0x07
|
|
line.long 0x00 "MSP_ICR,MSP Interrupt Clear Register"
|
|
bitfld.long 0x00 7. " TFSIC ,Transmit Frame Sync Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 6. " TSEIC ,Transmit Frame Synchronization Error Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 5. " TUEIC ,Transmit Underrun Error Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RFSIC ,Receive Frame Sync Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 2. " RSEIC ,Receive Frame Synchronization Error Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 1. " ROEIC ,Receive Overrun Error Interrupt Clear" "No effect,Cleared"
|
|
line.long 0x04 "MSP_MCR,Multichannel Control Register"
|
|
bitfld.long 0x04 6.--7. " TMCSF ,Transmit Multichannel Current Subframe" "0,1,2,3"
|
|
bitfld.long 0x04 5. " TMCEN ,Transmit Multichannel Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 3.--4. " RMCMP ,Receive Multichannel Comparison Mode" "Disabled,Disabled,Enabled/FALSE,Enabled/TRUE"
|
|
textline " "
|
|
bitfld.long 0x04 1.--2. " RMCSF ,Receive Multichannel Current Subframe" "0,1,2,3"
|
|
bitfld.long 0x04 0. " RMCEN ,Receive Multichannel Mode Enable" "Disabled,Enabled"
|
|
if (((data.long(asd:0x101F1000+0x30))&0x18)==(0x10||0x18))
|
|
group.long 0x34++0x07
|
|
line.long 0x00 "MSP_RCV,Receive Compare Value Register"
|
|
bitfld.long 0x00 31. " RCV[31] ,Receive Compare Value bit 31" "Low,High"
|
|
bitfld.long 0x00 30. " RCV[30] ,Receive Compare Value bit 30" "Low,High"
|
|
bitfld.long 0x00 29. " RCV[29] ,Receive Compare Value bit 29" "Low,High"
|
|
bitfld.long 0x00 28. " RCV[28] ,Receive Compare Value bit 28" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RCV[27] ,Receive Compare Value bit 27" "Low,High"
|
|
bitfld.long 0x00 26. " RCV[26] ,Receive Compare Value bit 26" "Low,High"
|
|
bitfld.long 0x00 25. " RCV[25] ,Receive Compare Value bit 25" "Low,High"
|
|
bitfld.long 0x00 24. " RCV[24] ,Receive Compare Value bit 24" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RCV[23] ,Receive Compare Value bit 23" "Low,High"
|
|
bitfld.long 0x00 22. " RCV[22] ,Receive Compare Value bit 22" "Low,High"
|
|
bitfld.long 0x00 21. " RCV[21] ,Receive Compare Value bit 21" "Low,High"
|
|
bitfld.long 0x00 20. " RCV[20] ,Receive Compare Value bit 20" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " RCV[19] ,Receive Compare Value bit 19" "Low,High"
|
|
bitfld.long 0x00 18. " RCV[18] ,Receive Compare Value bit 18" "Low,High"
|
|
bitfld.long 0x00 17. " RCV[17] ,Receive Compare Value bit 17" "Low,High"
|
|
bitfld.long 0x00 16. " RCV[16] ,Receive Compare Value bit 16" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RCV[15] ,Receive Compare Value bit 15" "Low,High"
|
|
bitfld.long 0x00 14. " RCV[14] ,Receive Compare Value bit 14" "Low,High"
|
|
bitfld.long 0x00 13. " RCV[13] ,Receive Compare Value bit 13" "Low,High"
|
|
bitfld.long 0x00 12. " RCV[12] ,Receive Compare Value bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RCV[11] ,Receive Compare Value bit 11" "Low,High"
|
|
bitfld.long 0x00 10. " RCV[10] ,Receive Compare Value bit 10" "Low,High"
|
|
bitfld.long 0x00 9. " RCV[09] ,Receive Compare Value bit 9" "Low,High"
|
|
bitfld.long 0x00 8. " RCV[08] ,Receive Compare Value bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RCV[07] ,Receive Compare Value bit 7" "Low,High"
|
|
bitfld.long 0x00 6. " RCV[06] ,Receive Compare Value bit 6" "Low,High"
|
|
bitfld.long 0x00 5. " RCV[05] ,Receive Compare Value bit 5" "Low,High"
|
|
bitfld.long 0x00 4. " RCV[04] ,Receive Compare Value bit 4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RCV[03] ,Receive Compare Value bit 3" "Low,High"
|
|
bitfld.long 0x00 2. " RCV[02] ,Receive Compare Value bit 2" "Low,High"
|
|
bitfld.long 0x00 1. " RCV[01] ,Receive Compare Value bit 1" "Low,High"
|
|
bitfld.long 0x00 0. " RCV[00] ,Receive Compare Value bit 0" "Low,High"
|
|
line.long 0x04 "MSP_RCM,Receive Compare Mask Register"
|
|
bitfld.long 0x04 31. " RCM[31] ,Receive Compare Mask bit 31" "Low,High"
|
|
bitfld.long 0x04 30. " RCM[30] ,Receive Compare Mask bit 30" "Low,High"
|
|
bitfld.long 0x04 29. " RCM[29] ,Receive Compare Mask bit 29" "Low,High"
|
|
bitfld.long 0x04 28. " RCM[28] ,Receive Compare Mask bit 28" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 27. " RCM[27] ,Receive Compare Mask bit 27" "Low,High"
|
|
bitfld.long 0x04 26. " RCM[26] ,Receive Compare Mask bit 26" "Low,High"
|
|
bitfld.long 0x04 25. " RCM[25] ,Receive Compare Mask bit 25" "Low,High"
|
|
bitfld.long 0x04 24. " RCM[24] ,Receive Compare Mask bit 24" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 23. " RCM[23] ,Receive Compare Mask bit 23" "Low,High"
|
|
bitfld.long 0x04 22. " RCM[22] ,Receive Compare Mask bit 22" "Low,High"
|
|
bitfld.long 0x04 21. " RCM[21] ,Receive Compare Mask bit 21" "Low,High"
|
|
bitfld.long 0x04 20. " RCM[20] ,Receive Compare Mask bit 20" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 19. " RCM[19] ,Receive Compare Mask bit 19" "Low,High"
|
|
bitfld.long 0x04 18. " RCM[18] ,Receive Compare Mask bit 18" "Low,High"
|
|
bitfld.long 0x04 17. " RCM[17] ,Receive Compare Mask bit 17" "Low,High"
|
|
bitfld.long 0x04 16. " RCM[16] ,Receive Compare Mask bit 16" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 15. " RCM[15] ,Receive Compare Mask bit 15" "Low,High"
|
|
bitfld.long 0x04 14. " RCM[14] ,Receive Compare Mask bit 14" "Low,High"
|
|
bitfld.long 0x04 13. " RCM[13] ,Receive Compare Mask bit 13" "Low,High"
|
|
bitfld.long 0x04 12. " RCM[12] ,Receive Compare Mask bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 11. " RCM[11] ,Receive Compare Mask bit 11" "Low,High"
|
|
bitfld.long 0x04 10. " RCM[10] ,Receive Compare Mask bit 10" "Low,High"
|
|
bitfld.long 0x04 9. " RCM[09] ,Receive Compare Mask bit 9" "Low,High"
|
|
bitfld.long 0x04 8. " RCM[08] ,Receive Compare Mask bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 7. " RCM[07] ,Receive Compare Mask bit 7" "Low,High"
|
|
bitfld.long 0x04 6. " RCM[06] ,Receive Compare Mask bit 6" "Low,High"
|
|
bitfld.long 0x04 5. " RCM[05] ,Receive Compare Mask bit 5" "Low,High"
|
|
bitfld.long 0x04 4. " RCM[04] ,Receive Compare Mask bit 4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 3. " RCM[03] ,Receive Compare Mask bit 3" "Low,High"
|
|
bitfld.long 0x04 2. " RCM[02] ,Receive Compare Mask bit 2" "Low,High"
|
|
bitfld.long 0x04 1. " RCM[01] ,Receive Compare Mask bit 1" "Low,High"
|
|
bitfld.long 0x04 0. " RCM[00] ,Receive Compare Mask bit 0" "Low,High"
|
|
else
|
|
hgroup.long 0x34++0x07
|
|
hide.long 0x00 "MSP_RCV,Receive Compare Value Register"
|
|
hide.long 0x04 "MSP_RCM,Receive Compare Mask Register"
|
|
endif
|
|
if (((data.long(asd:0x101F1000+0x30))&0x20)==0x00)
|
|
hgroup.long 0x40++0x0f
|
|
hide.long 0x00 "MSP_TCE0,Transmit Channel Enable Register 0"
|
|
hide.long 0x04 "MSP_TCE1,Transmit Channel Enable Register 1"
|
|
hide.long 0x08 "MSP_TCE2,Transmit Channel Enable Register 2"
|
|
hide.long 0x0c "MSP_TCE3,Transmit Channel Enable Register 3"
|
|
else
|
|
group.long 0x40++0x0f
|
|
line.long 0x00 "MSP_TCE0,Transmit Channel Enable Register 0"
|
|
bitfld.long 0x00 31. " TCE[31] ,Transmit Channel Enable 31" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TCE[30] ,Transmit Channel Enable 30" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " TCE[29] ,Transmit Channel Enable 29" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " TCE[28] ,Transmit Channel Enable 28" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " TCE[27] ,Transmit Channel Enable 27" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " TCE[26] ,Transmit Channel Enable 26" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " TCE[25] ,Transmit Channel Enable 25" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " TCE[24] ,Transmit Channel Enable 24" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " TCE[23] ,Transmit Channel Enable 23" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " TCE[22] ,Transmit Channel Enable 22" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " TCE[21] ,Transmit Channel Enable 21" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCE[20] ,Transmit Channel Enable 20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " TCE[19] ,Transmit Channel Enable 19" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " TCE[18] ,Transmit Channel Enable 18" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " TCE[17] ,Transmit Channel Enable 17" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " TCE[16] ,Transmit Channel Enable 16" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " TCE[15] ,Transmit Channel Enable 15" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " TCE[14] ,Transmit Channel Enable 14" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TCE[13] ,Transmit Channel Enable 13" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " TCE[12] ,Transmit Channel Enable 12" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " TCE[11] ,Transmit Channel Enable 11" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TCE[10] ,Transmit Channel Enable 10" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " TCE[09] ,Transmit Channel Enable 9" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " TCE[08] ,Transmit Channel Enable 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TCE[07] ,Transmit Channel Enable 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TCE[06] ,Transmit Channel Enable 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " TCE[05] ,Transmit Channel Enable 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TCE[04] ,Transmit Channel Enable 4" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " TCE[03] ,Transmit Channel Enable 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TCE[02] ,Transmit Channel Enable 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TCE[01] ,Transmit Channel Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TCE[00] ,Transmit Channel Enable 0" "Disabled,Enabled"
|
|
line.long 0x04 "MSP_TCE1,Transmit Channel Enable Register 1"
|
|
bitfld.long 0x04 31. " TCE[63] ,Transmit Channel Enable 63" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " TCE[62] ,Transmit Channel Enable 62" "Disabled,Enabled"
|
|
bitfld.long 0x04 29. " TCE[61] ,Transmit Channel Enable 61" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 28. " TCE[60] ,Transmit Channel Enable 60" "Disabled,Enabled"
|
|
bitfld.long 0x04 27. " TCE[59] ,Transmit Channel Enable 59" "Disabled,Enabled"
|
|
bitfld.long 0x04 26. " TCE[58] ,Transmit Channel Enable 58" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 25. " TCE[57] ,Transmit Channel Enable 57" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " TCE[56] ,Transmit Channel Enable 56" "Disabled,Enabled"
|
|
bitfld.long 0x04 23. " TCE[55] ,Transmit Channel Enable 55" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 22. " TCE[54] ,Transmit Channel Enable 54" "Disabled,Enabled"
|
|
bitfld.long 0x04 21. " TCE[53] ,Transmit Channel Enable 53" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " TCE[52] ,Transmit Channel Enable 52" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " TCE[51] ,Transmit Channel Enable 51" "Disabled,Enabled"
|
|
bitfld.long 0x04 18. " TCE[50] ,Transmit Channel Enable 50" "Disabled,Enabled"
|
|
bitfld.long 0x04 17. " TCE[49] ,Transmit Channel Enable 49" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 16. " TCE[48] ,Transmit Channel Enable 48" "Disabled,Enabled"
|
|
bitfld.long 0x04 15. " TCE[47] ,Transmit Channel Enable 47" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " TCE[46] ,Transmit Channel Enable 46" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 13. " TCE[45] ,Transmit Channel Enable 45" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " TCE[44] ,Transmit Channel Enable 44" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " TCE[43] ,Transmit Channel Enable 43" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 10. " TCE[42] ,Transmit Channel Enable 42" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " TCE[41] ,Transmit Channel Enable 41" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " TCE[40] ,Transmit Channel Enable 40" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " TCE[39] ,Transmit Channel Enable 39" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " TCE[38] ,Transmit Channel Enable 38" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " TCE[37] ,Transmit Channel Enable 37" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 4. " TCE[36] ,Transmit Channel Enable 36" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " TCE[35] ,Transmit Channel Enable 35" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " TCE[34] ,Transmit Channel Enable 34" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " TCE[33] ,Transmit Channel Enable 33" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " TCE[32] ,Transmit Channel Enable 32" "Disabled,Enabled"
|
|
line.long 0x08 "MSP_TCE2,Transmit Channel Enable Register 2"
|
|
bitfld.long 0x08 31. " TCE[95] ,Transmit Channel Enable 95" "Disabled,Enabled"
|
|
bitfld.long 0x08 30. " TCE[94] ,Transmit Channel Enable 94" "Disabled,Enabled"
|
|
bitfld.long 0x08 29. " TCE[93] ,Transmit Channel Enable 93" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 28. " TCE[92] ,Transmit Channel Enable 92" "Disabled,Enabled"
|
|
bitfld.long 0x08 27. " TCE[91] ,Transmit Channel Enable 91" "Disabled,Enabled"
|
|
bitfld.long 0x08 26. " TCE[90] ,Transmit Channel Enable 90" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 25. " TCE[89] ,Transmit Channel Enable 89" "Disabled,Enabled"
|
|
bitfld.long 0x08 24. " TCE[88] ,Transmit Channel Enable 88" "Disabled,Enabled"
|
|
bitfld.long 0x08 23. " TCE[87] ,Transmit Channel Enable 87" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 22. " TCE[86] ,Transmit Channel Enable 86" "Disabled,Enabled"
|
|
bitfld.long 0x08 21. " TCE[85] ,Transmit Channel Enable 85" "Disabled,Enabled"
|
|
bitfld.long 0x08 20. " TCE[84] ,Transmit Channel Enable 84" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 19. " TCE[83] ,Transmit Channel Enable 83" "Disabled,Enabled"
|
|
bitfld.long 0x08 18. " TCE[82] ,Transmit Channel Enable 82" "Disabled,Enabled"
|
|
bitfld.long 0x08 17. " TCE[81] ,Transmit Channel Enable 81" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 16. " TCE[80] ,Transmit Channel Enable 80" "Disabled,Enabled"
|
|
bitfld.long 0x08 15. " TCE[79] ,Transmit Channel Enable 79" "Disabled,Enabled"
|
|
bitfld.long 0x08 14. " TCE[78] ,Transmit Channel Enable 78" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 13. " TCE[77] ,Transmit Channel Enable 77" "Disabled,Enabled"
|
|
bitfld.long 0x08 12. " TCE[76] ,Transmit Channel Enable 76" "Disabled,Enabled"
|
|
bitfld.long 0x08 11. " TCE[75] ,Transmit Channel Enable 75" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 10. " TCE[74] ,Transmit Channel Enable 74" "Disabled,Enabled"
|
|
bitfld.long 0x08 9. " TCE[73] ,Transmit Channel Enable 73" "Disabled,Enabled"
|
|
bitfld.long 0x08 8. " TCE[72] ,Transmit Channel Enable 72" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 7. " TCE[71] ,Transmit Channel Enable 71" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " TCE[70] ,Transmit Channel Enable 70" "Disabled,Enabled"
|
|
bitfld.long 0x08 5. " TCE[69] ,Transmit Channel Enable 69" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 4. " TCE[68] ,Transmit Channel Enable 68" "Disabled,Enabled"
|
|
bitfld.long 0x08 3. " TCE[67] ,Transmit Channel Enable 67" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " TCE[66] ,Transmit Channel Enable 66" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 1. " TCE[65] ,Transmit Channel Enable 65" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " TCE[64] ,Transmit Channel Enable 64" "Disabled,Enabled"
|
|
line.long 0x0c "MSP_TCE3,Transmit Channel Enable Register 3"
|
|
bitfld.long 0x0c 31. " TCE[127] ,Transmit Channel Enable 127" "Disabled,Enabled"
|
|
bitfld.long 0x0c 30. " TCE[126] ,Transmit Channel Enable 126" "Disabled,Enabled"
|
|
bitfld.long 0x0c 29. " TCE[125] ,Transmit Channel Enable 125" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 28. " TCE[124] ,Transmit Channel Enable 124" "Disabled,Enabled"
|
|
bitfld.long 0x0c 27. " TCE[123] ,Transmit Channel Enable 123" "Disabled,Enabled"
|
|
bitfld.long 0x0c 26. " TCE[122] ,Transmit Channel Enable 122" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " TCE[121] ,Transmit Channel Enable 121" "Disabled,Enabled"
|
|
bitfld.long 0x0c 24. " TCE[120] ,Transmit Channel Enable 120" "Disabled,Enabled"
|
|
bitfld.long 0x0c 23. " TCE[119] ,Transmit Channel Enable 119" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 22. " TCE[118] ,Transmit Channel Enable 118" "Disabled,Enabled"
|
|
bitfld.long 0x0c 21. " TCE[117] ,Transmit Channel Enable 117" "Disabled,Enabled"
|
|
bitfld.long 0x0c 20. " TCE[116] ,Transmit Channel Enable 116" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " TCE[115] ,Transmit Channel Enable 115" "Disabled,Enabled"
|
|
bitfld.long 0x0c 18. " TCE[114] ,Transmit Channel Enable 114" "Disabled,Enabled"
|
|
bitfld.long 0x0c 17. " TCE[113] ,Transmit Channel Enable 113" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 16. " TCE[112] ,Transmit Channel Enable 112" "Disabled,Enabled"
|
|
bitfld.long 0x0c 15. " TCE[111] ,Transmit Channel Enable 111" "Disabled,Enabled"
|
|
bitfld.long 0x0c 14. " TCE[110] ,Transmit Channel Enable 110" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " TCE[109] ,Transmit Channel Enable 109" "Disabled,Enabled"
|
|
bitfld.long 0x0c 12. " TCE[108] ,Transmit Channel Enable 108" "Disabled,Enabled"
|
|
bitfld.long 0x0c 11. " TCE[107] ,Transmit Channel Enable 107" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 10. " TCE[106] ,Transmit Channel Enable 106" "Disabled,Enabled"
|
|
bitfld.long 0x0c 9. " TCE[105] ,Transmit Channel Enable 105" "Disabled,Enabled"
|
|
bitfld.long 0x0c 8. " TCE[104] ,Transmit Channel Enable 104" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " TCE[103] ,Transmit Channel Enable 103" "Disabled,Enabled"
|
|
bitfld.long 0x0c 6. " TCE[102] ,Transmit Channel Enable 102" "Disabled,Enabled"
|
|
bitfld.long 0x0c 5. " TCE[101] ,Transmit Channel Enable 101" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 4. " TCE[100] ,Transmit Channel Enable 100" "Disabled,Enabled"
|
|
bitfld.long 0x0c 3. " TCE[99] ,Transmit Channel Enable 99" "Disabled,Enabled"
|
|
bitfld.long 0x0c 2. " TCE[98] ,Transmit Channel Enable 98" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " TCE[97] ,Transmit Channel Enable 97" "Disabled,Enabled"
|
|
bitfld.long 0x0c 0. " TCE[96] ,Transmit Channel Enable 96" "Disabled,Enabled"
|
|
endif
|
|
if (((data.long(asd:0x101F1000+0x30))&0x01)==0x00)
|
|
group.long 0x60++0x0f
|
|
hide.long 0x00 "MSP_RCE0,Receive Channel Enable Register 0"
|
|
hide.long 0x04 "MSP_RCE1,Receive Channel Enable Register 1"
|
|
hide.long 0x08 "MSP_RCE2,Receive Channel Enable Register 2"
|
|
hide.long 0x0c "MSP_RCE3,Receive Channel Enable Register 3"
|
|
else
|
|
group.long 0x60++0x0f
|
|
line.long 0x00 "MSP_RCE0,Receive Channel Enable Register 0"
|
|
bitfld.long 0x00 31. " RCE[31] ,Receive Channel Enable 31" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " RCE[30] ,Receive Channel Enable 30" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " RCE[29] ,Receive Channel Enable 29" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " RCE[28] ,Receive Channel Enable 28" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " RCE[27] ,Receive Channel Enable 27" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " RCE[26] ,Receive Channel Enable 26" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " RCE[25] ,Receive Channel Enable 25" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " RCE[24] ,Receive Channel Enable 24" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " RCE[23] ,Receive Channel Enable 23" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " RCE[22] ,Receive Channel Enable 22" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RCE[21] ,Receive Channel Enable 21" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " RCE[20] ,Receive Channel Enable 20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " RCE[19] ,Receive Channel Enable 19" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " RCE[18] ,Receive Channel Enable 18" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " RCE[17] ,Receive Channel Enable 17" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RCE[16] ,Receive Channel Enable 16" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " RCE[15] ,Receive Channel Enable 15" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " RCE[14] ,Receive Channel Enable 14" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RCE[13] ,Receive Channel Enable 13" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " RCE[12] ,Receive Channel Enable 12" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " RCE[11] ,Receive Channel Enable 11" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RCE[10] ,Receive Channel Enable 10" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " RCE[09] ,Receive Channel Enable 9" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " RCE[08] ,Receive Channel Enable 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RCE[07] ,Receive Channel Enable 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " RCE[06] ,Receive Channel Enable 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " RCE[05] ,Receive Channel Enable 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RCE[04] ,Receive Channel Enable 4" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " RCE[03] ,Receive Channel Enable 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " RCE[02] ,Receive Channel Enable 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RCE[01] ,Receive Channel Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RCE[00] ,Receive Channel Enable 0" "Disabled,Enabled"
|
|
line.long 0x04 "MSP_RCE1,Receive Channel Enable Register 1"
|
|
bitfld.long 0x04 31. " RCE[63] ,Receive Channel Enable 63" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " RCE[62] ,Receive Channel Enable 62" "Disabled,Enabled"
|
|
bitfld.long 0x04 29. " RCE[61] ,Receive Channel Enable 61" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 28. " RCE[60] ,Receive Channel Enable 60" "Disabled,Enabled"
|
|
bitfld.long 0x04 27. " RCE[59] ,Receive Channel Enable 59" "Disabled,Enabled"
|
|
bitfld.long 0x04 26. " RCE[58] ,Receive Channel Enable 58" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 25. " RCE[57] ,Receive Channel Enable 57" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " RCE[56] ,Receive Channel Enable 56" "Disabled,Enabled"
|
|
bitfld.long 0x04 23. " RCE[55] ,Receive Channel Enable 55" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 22. " RCE[54] ,Receive Channel Enable 54" "Disabled,Enabled"
|
|
bitfld.long 0x04 21. " RCE[53] ,Receive Channel Enable 53" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " RCE[52] ,Receive Channel Enable 52" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " RCE[51] ,Receive Channel Enable 51" "Disabled,Enabled"
|
|
bitfld.long 0x04 18. " RCE[50] ,Receive Channel Enable 50" "Disabled,Enabled"
|
|
bitfld.long 0x04 17. " RCE[49] ,Receive Channel Enable 49" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 16. " RCE[48] ,Receive Channel Enable 48" "Disabled,Enabled"
|
|
bitfld.long 0x04 15. " RCE[47] ,Receive Channel Enable 47" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " RCE[46] ,Receive Channel Enable 46" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 13. " RCE[45] ,Receive Channel Enable 45" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " RCE[44] ,Receive Channel Enable 44" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " RCE[43] ,Receive Channel Enable 43" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 10. " RCE[42] ,Receive Channel Enable 42" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " RCE[41] ,Receive Channel Enable 41" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " RCE[40] ,Receive Channel Enable 40" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " RCE[39] ,Receive Channel Enable 39" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " RCE[38] ,Receive Channel Enable 38" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " RCE[37] ,Receive Channel Enable 37" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 4. " RCE[36] ,Receive Channel Enable 36" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " RCE[35] ,Receive Channel Enable 35" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " RCE[34] ,Receive Channel Enable 34" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " RCE[33] ,Receive Channel Enable 33" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " RCE[32] ,Receive Channel Enable 32" "Disabled,Enabled"
|
|
line.long 0x08 "MSP_RCE2,Receive Channel Enable Register 2"
|
|
bitfld.long 0x08 31. " RCE[95] ,Receive Channel Enable 95" "Disabled,Enabled"
|
|
bitfld.long 0x08 30. " RCE[94] ,Receive Channel Enable 94" "Disabled,Enabled"
|
|
bitfld.long 0x08 29. " RCE[93] ,Receive Channel Enable 93" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 28. " RCE[92] ,Receive Channel Enable 92" "Disabled,Enabled"
|
|
bitfld.long 0x08 27. " RCE[91] ,Receive Channel Enable 91" "Disabled,Enabled"
|
|
bitfld.long 0x08 26. " RCE[90] ,Receive Channel Enable 90" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 25. " RCE[89] ,Receive Channel Enable 89" "Disabled,Enabled"
|
|
bitfld.long 0x08 24. " RCE[88] ,Receive Channel Enable 88" "Disabled,Enabled"
|
|
bitfld.long 0x08 23. " RCE[87] ,Receive Channel Enable 87" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 22. " RCE[86] ,Receive Channel Enable 86" "Disabled,Enabled"
|
|
bitfld.long 0x08 21. " RCE[85] ,Receive Channel Enable 85" "Disabled,Enabled"
|
|
bitfld.long 0x08 20. " RCE[84] ,Receive Channel Enable 84" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 19. " RCE[83] ,Receive Channel Enable 83" "Disabled,Enabled"
|
|
bitfld.long 0x08 18. " RCE[82] ,Receive Channel Enable 82" "Disabled,Enabled"
|
|
bitfld.long 0x08 17. " RCE[81] ,Receive Channel Enable 81" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 16. " RCE[80] ,Receive Channel Enable 80" "Disabled,Enabled"
|
|
bitfld.long 0x08 15. " RCE[79] ,Receive Channel Enable 79" "Disabled,Enabled"
|
|
bitfld.long 0x08 14. " RCE[78] ,Receive Channel Enable 78" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 13. " RCE[77] ,Receive Channel Enable 77" "Disabled,Enabled"
|
|
bitfld.long 0x08 12. " RCE[76] ,Receive Channel Enable 76" "Disabled,Enabled"
|
|
bitfld.long 0x08 11. " RCE[75] ,Receive Channel Enable 75" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 10. " RCE[74] ,Receive Channel Enable 74" "Disabled,Enabled"
|
|
bitfld.long 0x08 9. " RCE[73] ,Receive Channel Enable 73" "Disabled,Enabled"
|
|
bitfld.long 0x08 8. " RCE[72] ,Receive Channel Enable 72" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 7. " RCE[71] ,Receive Channel Enable 71" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " RCE[70] ,Receive Channel Enable 70" "Disabled,Enabled"
|
|
bitfld.long 0x08 5. " RCE[69] ,Receive Channel Enable 69" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 4. " RCE[68] ,Receive Channel Enable 68" "Disabled,Enabled"
|
|
bitfld.long 0x08 3. " RCE[67] ,Receive Channel Enable 67" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " RCE[66] ,Receive Channel Enable 66" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 1. " RCE[65] ,Receive Channel Enable 65" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " RCE[64] ,Receive Channel Enable 64" "Disabled,Enabled"
|
|
line.long 0x0c "MSP_RCE3,Receive Channel Enable Register 3"
|
|
bitfld.long 0x0c 31. " RCE[127] ,Receive Channel Enable 127" "Disabled,Enabled"
|
|
bitfld.long 0x0c 30. " RCE[126] ,Receive Channel Enable 126" "Disabled,Enabled"
|
|
bitfld.long 0x0c 29. " RCE[125] ,Receive Channel Enable 125" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 28. " RCE[124] ,Receive Channel Enable 124" "Disabled,Enabled"
|
|
bitfld.long 0x0c 27. " RCE[123] ,Receive Channel Enable 123" "Disabled,Enabled"
|
|
bitfld.long 0x0c 26. " RCE[122] ,Receive Channel Enable 122" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " RCE[121] ,Receive Channel Enable 121" "Disabled,Enabled"
|
|
bitfld.long 0x0c 24. " RCE[120] ,Receive Channel Enable 120" "Disabled,Enabled"
|
|
bitfld.long 0x0c 23. " RCE[119] ,Receive Channel Enable 119" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 22. " RCE[118] ,Receive Channel Enable 118" "Disabled,Enabled"
|
|
bitfld.long 0x0c 21. " RCE[117] ,Receive Channel Enable 117" "Disabled,Enabled"
|
|
bitfld.long 0x0c 20. " RCE[116] ,Receive Channel Enable 116" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " RCE[115] ,Receive Channel Enable 115" "Disabled,Enabled"
|
|
bitfld.long 0x0c 18. " RCE[114] ,Receive Channel Enable 114" "Disabled,Enabled"
|
|
bitfld.long 0x0c 17. " RCE[113] ,Receive Channel Enable 113" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 16. " RCE[112] ,Receive Channel Enable 112" "Disabled,Enabled"
|
|
bitfld.long 0x0c 15. " RCE[111] ,Receive Channel Enable 111" "Disabled,Enabled"
|
|
bitfld.long 0x0c 14. " RCE[110] ,Receive Channel Enable 110" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " RCE[109] ,Receive Channel Enable 109" "Disabled,Enabled"
|
|
bitfld.long 0x0c 12. " RCE[108] ,Receive Channel Enable 108" "Disabled,Enabled"
|
|
bitfld.long 0x0c 11. " RCE[107] ,Receive Channel Enable 107" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 10. " RCE[106] ,Receive Channel Enable 106" "Disabled,Enabled"
|
|
bitfld.long 0x0c 9. " RCE[105] ,Receive Channel Enable 105" "Disabled,Enabled"
|
|
bitfld.long 0x0c 8. " RCE[104] ,Receive Channel Enable 104" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " RCE[103] ,Receive Channel Enable 103" "Disabled,Enabled"
|
|
bitfld.long 0x0c 6. " RCE[102] ,Receive Channel Enable 102" "Disabled,Enabled"
|
|
bitfld.long 0x0c 5. " RCE[101] ,Receive Channel Enable 101" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 4. " RCE[100] ,Receive Channel Enable 100" "Disabled,Enabled"
|
|
bitfld.long 0x0c 3. " RCE[99] ,Receive Channel Enable 99" "Disabled,Enabled"
|
|
bitfld.long 0x0c 2. " RCE[98] ,Receive Channel Enable 98" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " RCE[97] ,Receive Channel Enable 97" "Disabled,Enabled"
|
|
bitfld.long 0x0c 0. " RCE[96] ,Receive Channel Enable 96" "Disabled,Enabled"
|
|
endif
|
|
sif ((cpu()=="STA2065")||(cpu()=="STA2165"))
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "MSP_IODLY,MSP Input/Output Delay Lines Control Register"
|
|
bitfld.long 0x00 24.--26. " SCKDLY ,MSPSCK delay line" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 20.--22. " RDXDLY ,MSPRDX delay line" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--18. " RFSDLY ,MSPRFS delay line" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " RCKDLY ,MSPRCK delay line" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--10. " TDXDLY ,MSPTDX delay line" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 4.--6. " TFSDLY ,MSPTFS delay line" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " TCKDLY ,MSPTCK delay line" "0,1,2,3,4,5,6,7"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "MSP_ITCR,MSP Test Control Register"
|
|
bitfld.long 0x00 1. " TESTFIFO ,FIFO test enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ITEN ,Integration test enable bit" "Normal,Enabled"
|
|
group.long 0x84++0x07
|
|
line.long 0x00 "MSP_ITIP,MSP Integration Test Input Register"
|
|
bitfld.long 0x00 7. " MTDMAC ,Transmit DMA clear input value" "Low,High"
|
|
bitfld.long 0x00 6. " MRDMAC ,Receive DMA clear input value" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " MSCKI ,MSPSCK input value" "Low,High"
|
|
bitfld.long 0x00 4. " MTCKI ,MSPTCK input value" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MTFSI ,MSPTFS input value" "Low,High"
|
|
bitfld.long 0x00 2. " MRCKI ,MSPRCK input value" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " MRFSI ,MSPRFS input value" "Low,High"
|
|
bitfld.long 0x00 0. " MRXDI ,MSPRXD input value" "Low,High"
|
|
line.long 0x04 "MSP_ITOP,MSP Integration Test Output Register"
|
|
bitfld.long 0x04 22. " MTFOINTR ,MSPTFOINTR value" "0,1"
|
|
bitfld.long 0x04 21. " MRFOINTR ,MSPRFOINTR value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 20. " MTDMASREQ ,Transmit DMA single request value" "0,1"
|
|
bitfld.long 0x04 19. " MTDMABREQ ,Transmit DMA Burst Request value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 18. " MRDMASREQ ,Receive DMA Single Request value" "0,1"
|
|
bitfld.long 0x04 17. " MRDMABREQ ,Receive DMA Burst Request value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 16. " MINTR ,MSPINTR value" "0,1"
|
|
bitfld.long 0x04 15. " MTFSINTR ,MSPTFSINTR value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 14. " MTEINTR ,MSPTEINTR value" "0,1"
|
|
bitfld.long 0x04 13. " MTXINTR ,MSPTXINTR value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 12. " MRFSINTR ,MSPRFSINTR value" "0,1"
|
|
bitfld.long 0x04 11. " MREINTR ,MSPREINTR value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 10. " MRXINTR ,MSPRXINTR value" "0,1"
|
|
bitfld.long 0x04 9. " MTCKOEN ,MSPTCK output enable value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 8. " MTFSOEN ,MSPTFS output enable value" "0,1"
|
|
bitfld.long 0x04 7. " MRCKOEN ,MSPRCK output enable value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 6. " MRFSOEN ,MSPRFS output enable value" "0,1"
|
|
bitfld.long 0x04 5. " MTXDOEN ,MSPTXD output enable value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 4. " MTCKO ,MSPTCK output value" "0,1"
|
|
bitfld.long 0x04 3. " MTFSO ,MSPTFS output value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 2. " MRCKO ,MSPRCK output value" "0,1"
|
|
bitfld.long 0x04 1. " MRFSO ,MSPRFS output value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 0. " MTXDO ,MSPTXD output value" "0,1"
|
|
if (((d.l(asd:(0x101F1000+0x80)))&0x2)==0x2)
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "MSP_TSTDR,MSP Test Data Register"
|
|
else
|
|
hgroup.long 0x8C++0x03
|
|
hide.long 0x00 "MSP_TSTDR,MSP Test Data Register"
|
|
endif
|
|
endif
|
|
width 14.
|
|
rgroup.long 0xfe0++0x01f
|
|
line.long 0x00 "MSPPERIPHID0,MSP Peripheral Identification Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PN0 ,Part Number 0 (0x21)"
|
|
line.long 0x04 "MSPPERIPHID1,MSP Peripheral Identification Register 1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " D0 ,Designer 0 (0x00)"
|
|
hexmask.long.byte 0x04 0.--3. 1. " PN1 ,Part Number 1 (0x00)"
|
|
line.long 0x08 "MSPPERIPHID2,MSP Peripheral Identification Register 2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " REV ,Revision (0x02)"
|
|
hexmask.long.byte 0x08 0.--3. 1. " D1 ,Designer 1 (0x08)"
|
|
line.long 0x0c "MSPPERIPHID3,MSP Peripheral Identification Register 3"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " CONF ,Configuration (0x00)"
|
|
line.long 0x10 "MSPPCELLID0,MSP PCell Identification Register 0"
|
|
hexmask.long.byte 0x10 0.--7. 1. " MSPPCELLID0 ,MSP PCell ID0 (0x0D)"
|
|
line.long 0x14 "MSPPCELLID1,MSP PCell Identification Register 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " MSPPCELLID1 ,MSP PCell ID1 (0xF0)"
|
|
line.long 0x18 "MSPPCELLID2,MSP PCell Identification Register 2"
|
|
hexmask.long.byte 0x18 0.--7. 1. " MSPPCELLID2 ,MSP PCell ID2 (0x05)"
|
|
line.long 0x1c "MSPPCELLID3,MSP PCell Identification Register 3"
|
|
hexmask.long.byte 0x1c 0.--7. 1. " MSPPCELLID3 ,MSP PCell ID3 (0xB1)"
|
|
width 0xb
|
|
tree.end
|
|
tree "MSP2"
|
|
base asd:0x101F0000
|
|
width 10.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "MSP_DR,MSP Data Register"
|
|
if (((data.long(asd:0x101F0000+0x04))&0x600080)==(0x400000||0x600000))
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "MSP_GCR,MSP Global Configuration Register"
|
|
bitfld.long 0x00 23. " SPIBME ,SPI Burst Mode Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21.--22. " SPICKML ,SPI Clock Modes" "Normal,Normal,Zero delay SPI,Half cycle delay SPI"
|
|
textline " "
|
|
bitfld.long 0x00 20. " FGEN ,Frame Generator Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " SCKSEL ,Sample Rate Generator Clock Selection" "Internal clk,Internal clk,MSPSCK & free-running,MSPSCK & resynchronized"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SCKPOL ,Sample Rate Generator Clock Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SGEN ,Sample Rate Generator Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " TXDDL ,Transmit Data Extra Delay" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 14. " TCKSEL ,Transmit Clock Selection" "External SPI master,Internal sample rate generator/MSP is SPI Master"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TCKPOL ,Transmit Clock Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 11.--12. " TFSSEL ,Transmit Frame Synchronization Selection" "External source,External source,Frame Generator logic; each time MSP_TDR copied to MSP_TSR,Frame Generator logic with period & width"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TFSPOL ,Transmit Frame Synchronization Polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TFFEN ,Transmit FIFO Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " TXEN ,Transmitter Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LBM ,Loopback Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RCKSEL ,Receive Clock Selection" "External source on MSPRCK,Sample Rate Generator & delivered on MSPRCK"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RCKPOL ,Receive Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RFSSEL ,Receive Frame Synchronization Selection" "External source,Frame Generator logic"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DCM ,Direct Companding Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RFSPOL ,Receive Frame Synchronization Polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RFFEN ,Receive FIFO Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXEN ,Receiver Enable" "Disabled,Enabled"
|
|
elif (((data.long(asd:0x101F0000+0x04))&0x600080)==(0x400080||0x600080))
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "MSP_GCR,MSP Global Configuration Register"
|
|
bitfld.long 0x00 23. " SPIBME ,SPI Burst Mode Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21.--22. " SPICKML ,SPI Clock Modes" "Normal,Normal,Zero delay SPI,Half cycle delay SPI"
|
|
textline " "
|
|
bitfld.long 0x00 20. " FGEN ,Frame Generator Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " SCKSEL ,Sample Rate Generator Clock Selection" "Internal clk,Internal clk,MSPSCK & free-running,MSPSCK & resynchronized"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SCKPOL ,Sample Rate Generator Clock Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SGEN ,Sample Rate Generator Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " TXDDL ,Transmit Data Extra Delay" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 14. " TCKSEL ,Transmit Clock Selection" "External SPI master,Internal sample rate generator/MSP is SPI Master"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TCKPOL ,Transmit Clock Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 11.--12. " TFSSEL ,Transmit Frame Synchronization Selection" "External source,External source,Frame Generator logic; each time MSP_TDR copied to MSP_TSR,Frame Generator logic with period & width"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TFSPOL ,Transmit Frame Synchronization Polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TFFEN ,Transmit FIFO Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " TXEN ,Transmitter Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LBM ,Loopback Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RCKSEL ,Receive Clock Selection" "Transmit Clock,Transmit Clock & delivered on RCK"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RCKPOL ,Receive Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RFSSEL ,Receive Frame Synchronization Selection" "External source,Frame Generator logic"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DCM ,Direct Companding Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RFSPOL ,Receive Frame Synchronization Polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RFFEN ,Receive FIFO Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXEN ,Receiver Enable" "Disabled,Enabled"
|
|
elif (((data.long(asd:0x101F0000+0x04))&0x600080)==(0x000000||0x200000))
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "MSP_GCR,MSP Global Configuration Register"
|
|
bitfld.long 0x00 23. " SPIBME ,SPI Burst Mode Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21.--22. " SPICKML ,SPI Clock Modes" "Normal,Normal,Zero delay SPI,Half cycle delay SPI"
|
|
textline " "
|
|
bitfld.long 0x00 20. " FGEN ,Frame Generator Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " SCKSEL ,Sample Rate Generator Clock Selection" "Internal clk,Internal clk,MSPSCK & free-running,MSPSCK & resynchronized"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SCKPOL ,Sample Rate Generator Clock Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SGEN ,Sample Rate Generator Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " TXDDL ,Transmit Data Extra Delay" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 14. " TCKSEL ,Transmit Clock Selection" "External source on MSPTCK,Internal sample rate generator"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TCKPOL ,Transmit Clock Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 11.--12. " TFSSEL ,Transmit Frame Synchronization Selection" "External source,External source,Frame Generator logic; each time MSP_TDR copied to MSP_TSR,Frame Generator logic with period & width"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TFSPOL ,Transmit Frame Synchronization Polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TFFEN ,Transmit FIFO Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " TXEN ,Transmitter Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LBM ,Loopback Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RCKSEL ,Receive Clock Selection" "External source on MSPRCK,Sample Rate Generator & delivered on MSPRCK"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RCKPOL ,Receive Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RFSSEL ,Receive Frame Synchronization Selection" "External source,Frame Generator logic"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DCM ,Direct Companding Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RFSPOL ,Receive Frame Synchronization Polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RFFEN ,Receive FIFO Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXEN ,Receiver Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "MSP_GCR,MSP Global Configuration Register"
|
|
bitfld.long 0x00 23. " SPIBME ,SPI Burst Mode Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21.--22. " SPICKML ,SPI Clock Modes" "Normal,Normal,Zero delay SPI,Half cycle delay SPI"
|
|
textline " "
|
|
bitfld.long 0x00 20. " FGEN ,Frame Generator Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " SCKSEL ,Sample Rate Generator Clock Selection" "Internal clk,Internal clk,MSPSCK & free-running,MSPSCK & resynchronized"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SCKPOL ,Sample Rate Generator Clock Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SGEN ,Sample Rate Generator Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " TXDDL ,Transmit Data Extra Delay" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 14. " TCKSEL ,Transmit Clock Selection" "External source on MSPTCK,Internal sample rate generator"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TCKPOL ,Transmit Clock Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 11.--12. " TFSSEL ,Transmit Frame Synchronization Selection" "External source,External source,Frame Generator logic; each time MSP_TDR copied to MSP_TSR,Frame Generator logic with period & width"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TFSPOL ,Transmit Frame Synchronization Polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TFFEN ,Transmit FIFO Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " TXEN ,Transmitter Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LBM ,Loopback Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RCKSEL ,Receive Clock Selection" "Transmit Clock,Transmit Clock & delivered on RCK"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RCKPOL ,Receive Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RFSSEL ,Receive Frame Synchronization Selection" "External source,Frame Generator logic"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DCM ,Direct Companding Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RFSPOL ,Receive Frame Synchronization Polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RFFEN ,Receive FIFO Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXEN ,Receiver Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x08++0x0b
|
|
line.long 0x00 "MSP_TCF,MSP Transmit Configuration Register"
|
|
bitfld.long 0x00 28.--29. " TBSWAP ,Transmit Halfword Swapping" "Not swapped,Little-big endian byte swap in a word,Little-big endian byte swap in each halfwords,Halfword swap"
|
|
textline " "
|
|
bitfld.long 0x00 27. " TP2EN ,Transmit Phase 2 Enable" "Single,Dual"
|
|
textline " "
|
|
bitfld.long 0x00 26. " TP2SM ,Transmit Phase 2 Start Mode" "End of Phase 1,TFS trans. to opposite edge that started Phase 1"
|
|
textline " "
|
|
hexmask.long.byte 0x00 19.--25. 1. " TP2FLEN ,Transmit Phase 2 Frame Length"
|
|
bitfld.long 0x00 16.--18. " TP2ELEN ,Transmit Phase 2 Element Length" "8-bit,10-bit,12-bit,14-bit,16-bit,20-bit,24-bit,32-bit"
|
|
bitfld.long 0x00 15. " TFSIG ,Transmit Frame Sync Ignore" "Not ignored,Ignored"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " TDDLY ,Transmit Data Delay" "0 bits,1 bit,2 bits,3 bits"
|
|
bitfld.long 0x00 12. " TENDN ,Transmit Bit Endian Format" "MSBit-first,LSBit-first"
|
|
bitfld.long 0x00 10.--11. " TDTY ,Transmit Data Type" "Disabled,Disabled,Enabled/u-law,Enabled/A-law"
|
|
textline " "
|
|
hexmask.long.byte 0x00 3.--9. 1. " TP1FLEN ,Transmit Phase 1 Frame Length"
|
|
bitfld.long 0x00 0.--2. " TP1ELEN ,Transmit Phase 1 Element Length" "8-bit,10-bit,12-bit,14-bit,16-bit,20-bit,24-bit,32-bit"
|
|
line.long 0x04 "MSP_RCF,MSP Receive Configuration Register"
|
|
bitfld.long 0x04 28.--29. " RBSWAP ,Receive Halfword Swapping" "Not swapped,Little-big endian byte swap in a word,Little-big endian byte swap in each halfwords,Halfword swap"
|
|
textline " "
|
|
bitfld.long 0x04 27. " RP2EN ,Receive Phase 2 Enable" "Single,Dual"
|
|
textline " "
|
|
bitfld.long 0x04 26. " RP2SM ,Receive Phase 2 Start Mode" "End of Phase 1,RFS trans. to opposite edge that started Phase 1"
|
|
textline " "
|
|
hexmask.long.byte 0x04 19.--25. 1. " RP2FLEN ,Receive Phase 2 Frame Length"
|
|
bitfld.long 0x04 16.--18. " RP2ELEN ,Receive Phase 2 Element Length" "8-bit,10-bit,12-bit,14-bit,16-bit,20-bit,24-bit,32-bit"
|
|
bitfld.long 0x04 15. " RFSIG ,Receive Frame Sync Ignore" "Not ignored,Ignored"
|
|
textline " "
|
|
bitfld.long 0x04 13.--14. " RDDLY ,Receive Data Delay" "0 bits,1 bit,2 bits,3 bits"
|
|
bitfld.long 0x04 12. " RENDN ,Receive Bit Endian Format" "MSBit-first,LSBit-first"
|
|
bitfld.long 0x04 10.--11. " RDTYP ,Receive Data Type" "Disabled,Disabled,Enabled/u-law,Enabled/A-law"
|
|
textline " "
|
|
hexmask.long.byte 0x04 3.--9. 1. " RRP1FLEN ,Receive Phase 1 Frame Length"
|
|
bitfld.long 0x04 0.--2. " RP1ELEN ,Receive Phase 1 Element Length" "8-bit,10-bit,12-bit,14-bit,16-bit,20-bit,24-bit,32-bit"
|
|
line.long 0x08 "MSP_SRG,MSP Sample Rate Generator Register"
|
|
hexmask.long.word 0x08 16.--28. 1. " FRPER ,Frame Period"
|
|
bitfld.long 0x08 10.--15. " FRWID ,Frame Width" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64"
|
|
hexmask.long.word 0x08 0.--9. 1. " SCKDIV ,Sample Rate Generator Clock Divide factor"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "MSP_FLR,MSP Flag Register"
|
|
bitfld.long 0x00 5. " TFU ,Transmit FIFO Full flag" "Not full,Full"
|
|
bitfld.long 0x00 4. " TFE ,Transmit FIFO Empty flag" "Not empty,Empty"
|
|
bitfld.long 0x00 3. " TBUSY ,Transmit Busy flag" "Not busy,Busy"
|
|
bitfld.long 0x00 2. " RFU ,Receive FIFO Full flag" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RFE ,Receive FIFO Empty flag" "Not empty,Empty"
|
|
bitfld.long 0x00 0. " RBUSY ,Receiver Busy flag" "Not busy,Busy"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "MSP_DMACR,MSP DMA Control Register"
|
|
bitfld.long 0x00 1. " TDMAE ,Transmit DMA Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RDMAE ,Receive DMA Enable" "Disabled,Enabled"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "MSP_IMSC,MSP Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x00 9. " TFOIM ,Transmit FIFO not full interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 8. " RFOIM ,Receive FIFO not empty interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 7. " TFSIM ,Transmit Frame Sync interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 6. " TSEIM ,Transmit Frame Synchronization Error interrupt mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TUEIM ,Transmit Underrun Error interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 4. " TXIM ,Transmit interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 3. " RFSIM ,Receive Frame Sync interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " RSEIM ,Receive Frame Synchronization Error interrupt mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ROEIM ,Receive Overrun Error interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 0. " RXIM ,Receive Interrupt mask" "Masked,Not masked"
|
|
rgroup.long 0x24++0x07
|
|
line.long 0x00 "MSP_RIS,MSP Raw Interrupt Status Register"
|
|
bitfld.long 0x00 9. " TFORIS ,Transmit FIFO not full Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " RFORIS ,Receive FIFO not empty Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 7. " TFSRIS ,Transmit Frame Sync Raw Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TSERIS ,Transmit Frame Synchronization Error Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " TUERIS ,Transmit Underrun Error Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " TXRIS ,Transmit FIFO service Raw Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RFSRIS ,Receive Frame Sync Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " RSERIS ,Receive Frame Synchronization Error Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " ROERIS ,Receive Overrun Error Raw Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXRIS ,Receive FIFO service Raw Interrupt Status" "No interrupt,Interrupt"
|
|
line.long 0x04 "MSP_MIS,MSP Masked Interrupt Status Register"
|
|
bitfld.long 0x04 9. " TFOMIS ,Transmit FIFO not full Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 8. " RFOMIS ,Receive FIFO not empty Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 7. " TFSMIS ,Transmit Frame Sync Masked Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 6. " TSEMIS ,Transmit Frame Synchronization Error Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 5. " TUEMIS ,Transmit Underrun Error Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 4. " TXMIS ,Transmit FIFO service Masked Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 3. " RFSMIS ,Receive Frame Sync Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 2. " RSEMIS ,Receive Frame Synchronization Error Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 1. " ROEMIS ,Receive Overrun Error Masked Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 0. " RXMIS ,Receive FIFO service Masked Interrupt Status" "No interrupt,Interrupt"
|
|
group.long 0x2c++0x07
|
|
line.long 0x00 "MSP_ICR,MSP Interrupt Clear Register"
|
|
bitfld.long 0x00 7. " TFSIC ,Transmit Frame Sync Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 6. " TSEIC ,Transmit Frame Synchronization Error Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 5. " TUEIC ,Transmit Underrun Error Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RFSIC ,Receive Frame Sync Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 2. " RSEIC ,Receive Frame Synchronization Error Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 1. " ROEIC ,Receive Overrun Error Interrupt Clear" "No effect,Cleared"
|
|
line.long 0x04 "MSP_MCR,Multichannel Control Register"
|
|
bitfld.long 0x04 6.--7. " TMCSF ,Transmit Multichannel Current Subframe" "0,1,2,3"
|
|
bitfld.long 0x04 5. " TMCEN ,Transmit Multichannel Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 3.--4. " RMCMP ,Receive Multichannel Comparison Mode" "Disabled,Disabled,Enabled/FALSE,Enabled/TRUE"
|
|
textline " "
|
|
bitfld.long 0x04 1.--2. " RMCSF ,Receive Multichannel Current Subframe" "0,1,2,3"
|
|
bitfld.long 0x04 0. " RMCEN ,Receive Multichannel Mode Enable" "Disabled,Enabled"
|
|
if (((data.long(asd:0x101F0000+0x30))&0x18)==(0x10||0x18))
|
|
group.long 0x34++0x07
|
|
line.long 0x00 "MSP_RCV,Receive Compare Value Register"
|
|
bitfld.long 0x00 31. " RCV[31] ,Receive Compare Value bit 31" "Low,High"
|
|
bitfld.long 0x00 30. " RCV[30] ,Receive Compare Value bit 30" "Low,High"
|
|
bitfld.long 0x00 29. " RCV[29] ,Receive Compare Value bit 29" "Low,High"
|
|
bitfld.long 0x00 28. " RCV[28] ,Receive Compare Value bit 28" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RCV[27] ,Receive Compare Value bit 27" "Low,High"
|
|
bitfld.long 0x00 26. " RCV[26] ,Receive Compare Value bit 26" "Low,High"
|
|
bitfld.long 0x00 25. " RCV[25] ,Receive Compare Value bit 25" "Low,High"
|
|
bitfld.long 0x00 24. " RCV[24] ,Receive Compare Value bit 24" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RCV[23] ,Receive Compare Value bit 23" "Low,High"
|
|
bitfld.long 0x00 22. " RCV[22] ,Receive Compare Value bit 22" "Low,High"
|
|
bitfld.long 0x00 21. " RCV[21] ,Receive Compare Value bit 21" "Low,High"
|
|
bitfld.long 0x00 20. " RCV[20] ,Receive Compare Value bit 20" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " RCV[19] ,Receive Compare Value bit 19" "Low,High"
|
|
bitfld.long 0x00 18. " RCV[18] ,Receive Compare Value bit 18" "Low,High"
|
|
bitfld.long 0x00 17. " RCV[17] ,Receive Compare Value bit 17" "Low,High"
|
|
bitfld.long 0x00 16. " RCV[16] ,Receive Compare Value bit 16" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RCV[15] ,Receive Compare Value bit 15" "Low,High"
|
|
bitfld.long 0x00 14. " RCV[14] ,Receive Compare Value bit 14" "Low,High"
|
|
bitfld.long 0x00 13. " RCV[13] ,Receive Compare Value bit 13" "Low,High"
|
|
bitfld.long 0x00 12. " RCV[12] ,Receive Compare Value bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RCV[11] ,Receive Compare Value bit 11" "Low,High"
|
|
bitfld.long 0x00 10. " RCV[10] ,Receive Compare Value bit 10" "Low,High"
|
|
bitfld.long 0x00 9. " RCV[09] ,Receive Compare Value bit 9" "Low,High"
|
|
bitfld.long 0x00 8. " RCV[08] ,Receive Compare Value bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RCV[07] ,Receive Compare Value bit 7" "Low,High"
|
|
bitfld.long 0x00 6. " RCV[06] ,Receive Compare Value bit 6" "Low,High"
|
|
bitfld.long 0x00 5. " RCV[05] ,Receive Compare Value bit 5" "Low,High"
|
|
bitfld.long 0x00 4. " RCV[04] ,Receive Compare Value bit 4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RCV[03] ,Receive Compare Value bit 3" "Low,High"
|
|
bitfld.long 0x00 2. " RCV[02] ,Receive Compare Value bit 2" "Low,High"
|
|
bitfld.long 0x00 1. " RCV[01] ,Receive Compare Value bit 1" "Low,High"
|
|
bitfld.long 0x00 0. " RCV[00] ,Receive Compare Value bit 0" "Low,High"
|
|
line.long 0x04 "MSP_RCM,Receive Compare Mask Register"
|
|
bitfld.long 0x04 31. " RCM[31] ,Receive Compare Mask bit 31" "Low,High"
|
|
bitfld.long 0x04 30. " RCM[30] ,Receive Compare Mask bit 30" "Low,High"
|
|
bitfld.long 0x04 29. " RCM[29] ,Receive Compare Mask bit 29" "Low,High"
|
|
bitfld.long 0x04 28. " RCM[28] ,Receive Compare Mask bit 28" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 27. " RCM[27] ,Receive Compare Mask bit 27" "Low,High"
|
|
bitfld.long 0x04 26. " RCM[26] ,Receive Compare Mask bit 26" "Low,High"
|
|
bitfld.long 0x04 25. " RCM[25] ,Receive Compare Mask bit 25" "Low,High"
|
|
bitfld.long 0x04 24. " RCM[24] ,Receive Compare Mask bit 24" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 23. " RCM[23] ,Receive Compare Mask bit 23" "Low,High"
|
|
bitfld.long 0x04 22. " RCM[22] ,Receive Compare Mask bit 22" "Low,High"
|
|
bitfld.long 0x04 21. " RCM[21] ,Receive Compare Mask bit 21" "Low,High"
|
|
bitfld.long 0x04 20. " RCM[20] ,Receive Compare Mask bit 20" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 19. " RCM[19] ,Receive Compare Mask bit 19" "Low,High"
|
|
bitfld.long 0x04 18. " RCM[18] ,Receive Compare Mask bit 18" "Low,High"
|
|
bitfld.long 0x04 17. " RCM[17] ,Receive Compare Mask bit 17" "Low,High"
|
|
bitfld.long 0x04 16. " RCM[16] ,Receive Compare Mask bit 16" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 15. " RCM[15] ,Receive Compare Mask bit 15" "Low,High"
|
|
bitfld.long 0x04 14. " RCM[14] ,Receive Compare Mask bit 14" "Low,High"
|
|
bitfld.long 0x04 13. " RCM[13] ,Receive Compare Mask bit 13" "Low,High"
|
|
bitfld.long 0x04 12. " RCM[12] ,Receive Compare Mask bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 11. " RCM[11] ,Receive Compare Mask bit 11" "Low,High"
|
|
bitfld.long 0x04 10. " RCM[10] ,Receive Compare Mask bit 10" "Low,High"
|
|
bitfld.long 0x04 9. " RCM[09] ,Receive Compare Mask bit 9" "Low,High"
|
|
bitfld.long 0x04 8. " RCM[08] ,Receive Compare Mask bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 7. " RCM[07] ,Receive Compare Mask bit 7" "Low,High"
|
|
bitfld.long 0x04 6. " RCM[06] ,Receive Compare Mask bit 6" "Low,High"
|
|
bitfld.long 0x04 5. " RCM[05] ,Receive Compare Mask bit 5" "Low,High"
|
|
bitfld.long 0x04 4. " RCM[04] ,Receive Compare Mask bit 4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 3. " RCM[03] ,Receive Compare Mask bit 3" "Low,High"
|
|
bitfld.long 0x04 2. " RCM[02] ,Receive Compare Mask bit 2" "Low,High"
|
|
bitfld.long 0x04 1. " RCM[01] ,Receive Compare Mask bit 1" "Low,High"
|
|
bitfld.long 0x04 0. " RCM[00] ,Receive Compare Mask bit 0" "Low,High"
|
|
else
|
|
hgroup.long 0x34++0x07
|
|
hide.long 0x00 "MSP_RCV,Receive Compare Value Register"
|
|
hide.long 0x04 "MSP_RCM,Receive Compare Mask Register"
|
|
endif
|
|
if (((data.long(asd:0x101F0000+0x30))&0x20)==0x00)
|
|
hgroup.long 0x40++0x0f
|
|
hide.long 0x00 "MSP_TCE0,Transmit Channel Enable Register 0"
|
|
hide.long 0x04 "MSP_TCE1,Transmit Channel Enable Register 1"
|
|
hide.long 0x08 "MSP_TCE2,Transmit Channel Enable Register 2"
|
|
hide.long 0x0c "MSP_TCE3,Transmit Channel Enable Register 3"
|
|
else
|
|
group.long 0x40++0x0f
|
|
line.long 0x00 "MSP_TCE0,Transmit Channel Enable Register 0"
|
|
bitfld.long 0x00 31. " TCE[31] ,Transmit Channel Enable 31" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TCE[30] ,Transmit Channel Enable 30" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " TCE[29] ,Transmit Channel Enable 29" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " TCE[28] ,Transmit Channel Enable 28" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " TCE[27] ,Transmit Channel Enable 27" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " TCE[26] ,Transmit Channel Enable 26" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " TCE[25] ,Transmit Channel Enable 25" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " TCE[24] ,Transmit Channel Enable 24" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " TCE[23] ,Transmit Channel Enable 23" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " TCE[22] ,Transmit Channel Enable 22" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " TCE[21] ,Transmit Channel Enable 21" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCE[20] ,Transmit Channel Enable 20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " TCE[19] ,Transmit Channel Enable 19" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " TCE[18] ,Transmit Channel Enable 18" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " TCE[17] ,Transmit Channel Enable 17" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " TCE[16] ,Transmit Channel Enable 16" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " TCE[15] ,Transmit Channel Enable 15" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " TCE[14] ,Transmit Channel Enable 14" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TCE[13] ,Transmit Channel Enable 13" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " TCE[12] ,Transmit Channel Enable 12" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " TCE[11] ,Transmit Channel Enable 11" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TCE[10] ,Transmit Channel Enable 10" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " TCE[09] ,Transmit Channel Enable 9" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " TCE[08] ,Transmit Channel Enable 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TCE[07] ,Transmit Channel Enable 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TCE[06] ,Transmit Channel Enable 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " TCE[05] ,Transmit Channel Enable 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TCE[04] ,Transmit Channel Enable 4" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " TCE[03] ,Transmit Channel Enable 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TCE[02] ,Transmit Channel Enable 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TCE[01] ,Transmit Channel Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TCE[00] ,Transmit Channel Enable 0" "Disabled,Enabled"
|
|
line.long 0x04 "MSP_TCE1,Transmit Channel Enable Register 1"
|
|
bitfld.long 0x04 31. " TCE[63] ,Transmit Channel Enable 63" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " TCE[62] ,Transmit Channel Enable 62" "Disabled,Enabled"
|
|
bitfld.long 0x04 29. " TCE[61] ,Transmit Channel Enable 61" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 28. " TCE[60] ,Transmit Channel Enable 60" "Disabled,Enabled"
|
|
bitfld.long 0x04 27. " TCE[59] ,Transmit Channel Enable 59" "Disabled,Enabled"
|
|
bitfld.long 0x04 26. " TCE[58] ,Transmit Channel Enable 58" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 25. " TCE[57] ,Transmit Channel Enable 57" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " TCE[56] ,Transmit Channel Enable 56" "Disabled,Enabled"
|
|
bitfld.long 0x04 23. " TCE[55] ,Transmit Channel Enable 55" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 22. " TCE[54] ,Transmit Channel Enable 54" "Disabled,Enabled"
|
|
bitfld.long 0x04 21. " TCE[53] ,Transmit Channel Enable 53" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " TCE[52] ,Transmit Channel Enable 52" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " TCE[51] ,Transmit Channel Enable 51" "Disabled,Enabled"
|
|
bitfld.long 0x04 18. " TCE[50] ,Transmit Channel Enable 50" "Disabled,Enabled"
|
|
bitfld.long 0x04 17. " TCE[49] ,Transmit Channel Enable 49" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 16. " TCE[48] ,Transmit Channel Enable 48" "Disabled,Enabled"
|
|
bitfld.long 0x04 15. " TCE[47] ,Transmit Channel Enable 47" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " TCE[46] ,Transmit Channel Enable 46" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 13. " TCE[45] ,Transmit Channel Enable 45" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " TCE[44] ,Transmit Channel Enable 44" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " TCE[43] ,Transmit Channel Enable 43" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 10. " TCE[42] ,Transmit Channel Enable 42" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " TCE[41] ,Transmit Channel Enable 41" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " TCE[40] ,Transmit Channel Enable 40" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " TCE[39] ,Transmit Channel Enable 39" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " TCE[38] ,Transmit Channel Enable 38" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " TCE[37] ,Transmit Channel Enable 37" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 4. " TCE[36] ,Transmit Channel Enable 36" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " TCE[35] ,Transmit Channel Enable 35" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " TCE[34] ,Transmit Channel Enable 34" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " TCE[33] ,Transmit Channel Enable 33" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " TCE[32] ,Transmit Channel Enable 32" "Disabled,Enabled"
|
|
line.long 0x08 "MSP_TCE2,Transmit Channel Enable Register 2"
|
|
bitfld.long 0x08 31. " TCE[95] ,Transmit Channel Enable 95" "Disabled,Enabled"
|
|
bitfld.long 0x08 30. " TCE[94] ,Transmit Channel Enable 94" "Disabled,Enabled"
|
|
bitfld.long 0x08 29. " TCE[93] ,Transmit Channel Enable 93" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 28. " TCE[92] ,Transmit Channel Enable 92" "Disabled,Enabled"
|
|
bitfld.long 0x08 27. " TCE[91] ,Transmit Channel Enable 91" "Disabled,Enabled"
|
|
bitfld.long 0x08 26. " TCE[90] ,Transmit Channel Enable 90" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 25. " TCE[89] ,Transmit Channel Enable 89" "Disabled,Enabled"
|
|
bitfld.long 0x08 24. " TCE[88] ,Transmit Channel Enable 88" "Disabled,Enabled"
|
|
bitfld.long 0x08 23. " TCE[87] ,Transmit Channel Enable 87" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 22. " TCE[86] ,Transmit Channel Enable 86" "Disabled,Enabled"
|
|
bitfld.long 0x08 21. " TCE[85] ,Transmit Channel Enable 85" "Disabled,Enabled"
|
|
bitfld.long 0x08 20. " TCE[84] ,Transmit Channel Enable 84" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 19. " TCE[83] ,Transmit Channel Enable 83" "Disabled,Enabled"
|
|
bitfld.long 0x08 18. " TCE[82] ,Transmit Channel Enable 82" "Disabled,Enabled"
|
|
bitfld.long 0x08 17. " TCE[81] ,Transmit Channel Enable 81" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 16. " TCE[80] ,Transmit Channel Enable 80" "Disabled,Enabled"
|
|
bitfld.long 0x08 15. " TCE[79] ,Transmit Channel Enable 79" "Disabled,Enabled"
|
|
bitfld.long 0x08 14. " TCE[78] ,Transmit Channel Enable 78" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 13. " TCE[77] ,Transmit Channel Enable 77" "Disabled,Enabled"
|
|
bitfld.long 0x08 12. " TCE[76] ,Transmit Channel Enable 76" "Disabled,Enabled"
|
|
bitfld.long 0x08 11. " TCE[75] ,Transmit Channel Enable 75" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 10. " TCE[74] ,Transmit Channel Enable 74" "Disabled,Enabled"
|
|
bitfld.long 0x08 9. " TCE[73] ,Transmit Channel Enable 73" "Disabled,Enabled"
|
|
bitfld.long 0x08 8. " TCE[72] ,Transmit Channel Enable 72" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 7. " TCE[71] ,Transmit Channel Enable 71" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " TCE[70] ,Transmit Channel Enable 70" "Disabled,Enabled"
|
|
bitfld.long 0x08 5. " TCE[69] ,Transmit Channel Enable 69" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 4. " TCE[68] ,Transmit Channel Enable 68" "Disabled,Enabled"
|
|
bitfld.long 0x08 3. " TCE[67] ,Transmit Channel Enable 67" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " TCE[66] ,Transmit Channel Enable 66" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 1. " TCE[65] ,Transmit Channel Enable 65" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " TCE[64] ,Transmit Channel Enable 64" "Disabled,Enabled"
|
|
line.long 0x0c "MSP_TCE3,Transmit Channel Enable Register 3"
|
|
bitfld.long 0x0c 31. " TCE[127] ,Transmit Channel Enable 127" "Disabled,Enabled"
|
|
bitfld.long 0x0c 30. " TCE[126] ,Transmit Channel Enable 126" "Disabled,Enabled"
|
|
bitfld.long 0x0c 29. " TCE[125] ,Transmit Channel Enable 125" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 28. " TCE[124] ,Transmit Channel Enable 124" "Disabled,Enabled"
|
|
bitfld.long 0x0c 27. " TCE[123] ,Transmit Channel Enable 123" "Disabled,Enabled"
|
|
bitfld.long 0x0c 26. " TCE[122] ,Transmit Channel Enable 122" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " TCE[121] ,Transmit Channel Enable 121" "Disabled,Enabled"
|
|
bitfld.long 0x0c 24. " TCE[120] ,Transmit Channel Enable 120" "Disabled,Enabled"
|
|
bitfld.long 0x0c 23. " TCE[119] ,Transmit Channel Enable 119" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 22. " TCE[118] ,Transmit Channel Enable 118" "Disabled,Enabled"
|
|
bitfld.long 0x0c 21. " TCE[117] ,Transmit Channel Enable 117" "Disabled,Enabled"
|
|
bitfld.long 0x0c 20. " TCE[116] ,Transmit Channel Enable 116" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " TCE[115] ,Transmit Channel Enable 115" "Disabled,Enabled"
|
|
bitfld.long 0x0c 18. " TCE[114] ,Transmit Channel Enable 114" "Disabled,Enabled"
|
|
bitfld.long 0x0c 17. " TCE[113] ,Transmit Channel Enable 113" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 16. " TCE[112] ,Transmit Channel Enable 112" "Disabled,Enabled"
|
|
bitfld.long 0x0c 15. " TCE[111] ,Transmit Channel Enable 111" "Disabled,Enabled"
|
|
bitfld.long 0x0c 14. " TCE[110] ,Transmit Channel Enable 110" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " TCE[109] ,Transmit Channel Enable 109" "Disabled,Enabled"
|
|
bitfld.long 0x0c 12. " TCE[108] ,Transmit Channel Enable 108" "Disabled,Enabled"
|
|
bitfld.long 0x0c 11. " TCE[107] ,Transmit Channel Enable 107" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 10. " TCE[106] ,Transmit Channel Enable 106" "Disabled,Enabled"
|
|
bitfld.long 0x0c 9. " TCE[105] ,Transmit Channel Enable 105" "Disabled,Enabled"
|
|
bitfld.long 0x0c 8. " TCE[104] ,Transmit Channel Enable 104" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " TCE[103] ,Transmit Channel Enable 103" "Disabled,Enabled"
|
|
bitfld.long 0x0c 6. " TCE[102] ,Transmit Channel Enable 102" "Disabled,Enabled"
|
|
bitfld.long 0x0c 5. " TCE[101] ,Transmit Channel Enable 101" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 4. " TCE[100] ,Transmit Channel Enable 100" "Disabled,Enabled"
|
|
bitfld.long 0x0c 3. " TCE[99] ,Transmit Channel Enable 99" "Disabled,Enabled"
|
|
bitfld.long 0x0c 2. " TCE[98] ,Transmit Channel Enable 98" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " TCE[97] ,Transmit Channel Enable 97" "Disabled,Enabled"
|
|
bitfld.long 0x0c 0. " TCE[96] ,Transmit Channel Enable 96" "Disabled,Enabled"
|
|
endif
|
|
if (((data.long(asd:0x101F0000+0x30))&0x01)==0x00)
|
|
group.long 0x60++0x0f
|
|
hide.long 0x00 "MSP_RCE0,Receive Channel Enable Register 0"
|
|
hide.long 0x04 "MSP_RCE1,Receive Channel Enable Register 1"
|
|
hide.long 0x08 "MSP_RCE2,Receive Channel Enable Register 2"
|
|
hide.long 0x0c "MSP_RCE3,Receive Channel Enable Register 3"
|
|
else
|
|
group.long 0x60++0x0f
|
|
line.long 0x00 "MSP_RCE0,Receive Channel Enable Register 0"
|
|
bitfld.long 0x00 31. " RCE[31] ,Receive Channel Enable 31" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " RCE[30] ,Receive Channel Enable 30" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " RCE[29] ,Receive Channel Enable 29" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " RCE[28] ,Receive Channel Enable 28" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " RCE[27] ,Receive Channel Enable 27" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " RCE[26] ,Receive Channel Enable 26" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " RCE[25] ,Receive Channel Enable 25" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " RCE[24] ,Receive Channel Enable 24" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " RCE[23] ,Receive Channel Enable 23" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " RCE[22] ,Receive Channel Enable 22" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RCE[21] ,Receive Channel Enable 21" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " RCE[20] ,Receive Channel Enable 20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " RCE[19] ,Receive Channel Enable 19" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " RCE[18] ,Receive Channel Enable 18" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " RCE[17] ,Receive Channel Enable 17" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RCE[16] ,Receive Channel Enable 16" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " RCE[15] ,Receive Channel Enable 15" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " RCE[14] ,Receive Channel Enable 14" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RCE[13] ,Receive Channel Enable 13" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " RCE[12] ,Receive Channel Enable 12" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " RCE[11] ,Receive Channel Enable 11" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RCE[10] ,Receive Channel Enable 10" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " RCE[09] ,Receive Channel Enable 9" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " RCE[08] ,Receive Channel Enable 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RCE[07] ,Receive Channel Enable 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " RCE[06] ,Receive Channel Enable 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " RCE[05] ,Receive Channel Enable 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RCE[04] ,Receive Channel Enable 4" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " RCE[03] ,Receive Channel Enable 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " RCE[02] ,Receive Channel Enable 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RCE[01] ,Receive Channel Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RCE[00] ,Receive Channel Enable 0" "Disabled,Enabled"
|
|
line.long 0x04 "MSP_RCE1,Receive Channel Enable Register 1"
|
|
bitfld.long 0x04 31. " RCE[63] ,Receive Channel Enable 63" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " RCE[62] ,Receive Channel Enable 62" "Disabled,Enabled"
|
|
bitfld.long 0x04 29. " RCE[61] ,Receive Channel Enable 61" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 28. " RCE[60] ,Receive Channel Enable 60" "Disabled,Enabled"
|
|
bitfld.long 0x04 27. " RCE[59] ,Receive Channel Enable 59" "Disabled,Enabled"
|
|
bitfld.long 0x04 26. " RCE[58] ,Receive Channel Enable 58" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 25. " RCE[57] ,Receive Channel Enable 57" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " RCE[56] ,Receive Channel Enable 56" "Disabled,Enabled"
|
|
bitfld.long 0x04 23. " RCE[55] ,Receive Channel Enable 55" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 22. " RCE[54] ,Receive Channel Enable 54" "Disabled,Enabled"
|
|
bitfld.long 0x04 21. " RCE[53] ,Receive Channel Enable 53" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " RCE[52] ,Receive Channel Enable 52" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " RCE[51] ,Receive Channel Enable 51" "Disabled,Enabled"
|
|
bitfld.long 0x04 18. " RCE[50] ,Receive Channel Enable 50" "Disabled,Enabled"
|
|
bitfld.long 0x04 17. " RCE[49] ,Receive Channel Enable 49" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 16. " RCE[48] ,Receive Channel Enable 48" "Disabled,Enabled"
|
|
bitfld.long 0x04 15. " RCE[47] ,Receive Channel Enable 47" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " RCE[46] ,Receive Channel Enable 46" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 13. " RCE[45] ,Receive Channel Enable 45" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " RCE[44] ,Receive Channel Enable 44" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " RCE[43] ,Receive Channel Enable 43" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 10. " RCE[42] ,Receive Channel Enable 42" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " RCE[41] ,Receive Channel Enable 41" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " RCE[40] ,Receive Channel Enable 40" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " RCE[39] ,Receive Channel Enable 39" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " RCE[38] ,Receive Channel Enable 38" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " RCE[37] ,Receive Channel Enable 37" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 4. " RCE[36] ,Receive Channel Enable 36" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " RCE[35] ,Receive Channel Enable 35" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " RCE[34] ,Receive Channel Enable 34" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " RCE[33] ,Receive Channel Enable 33" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " RCE[32] ,Receive Channel Enable 32" "Disabled,Enabled"
|
|
line.long 0x08 "MSP_RCE2,Receive Channel Enable Register 2"
|
|
bitfld.long 0x08 31. " RCE[95] ,Receive Channel Enable 95" "Disabled,Enabled"
|
|
bitfld.long 0x08 30. " RCE[94] ,Receive Channel Enable 94" "Disabled,Enabled"
|
|
bitfld.long 0x08 29. " RCE[93] ,Receive Channel Enable 93" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 28. " RCE[92] ,Receive Channel Enable 92" "Disabled,Enabled"
|
|
bitfld.long 0x08 27. " RCE[91] ,Receive Channel Enable 91" "Disabled,Enabled"
|
|
bitfld.long 0x08 26. " RCE[90] ,Receive Channel Enable 90" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 25. " RCE[89] ,Receive Channel Enable 89" "Disabled,Enabled"
|
|
bitfld.long 0x08 24. " RCE[88] ,Receive Channel Enable 88" "Disabled,Enabled"
|
|
bitfld.long 0x08 23. " RCE[87] ,Receive Channel Enable 87" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 22. " RCE[86] ,Receive Channel Enable 86" "Disabled,Enabled"
|
|
bitfld.long 0x08 21. " RCE[85] ,Receive Channel Enable 85" "Disabled,Enabled"
|
|
bitfld.long 0x08 20. " RCE[84] ,Receive Channel Enable 84" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 19. " RCE[83] ,Receive Channel Enable 83" "Disabled,Enabled"
|
|
bitfld.long 0x08 18. " RCE[82] ,Receive Channel Enable 82" "Disabled,Enabled"
|
|
bitfld.long 0x08 17. " RCE[81] ,Receive Channel Enable 81" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 16. " RCE[80] ,Receive Channel Enable 80" "Disabled,Enabled"
|
|
bitfld.long 0x08 15. " RCE[79] ,Receive Channel Enable 79" "Disabled,Enabled"
|
|
bitfld.long 0x08 14. " RCE[78] ,Receive Channel Enable 78" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 13. " RCE[77] ,Receive Channel Enable 77" "Disabled,Enabled"
|
|
bitfld.long 0x08 12. " RCE[76] ,Receive Channel Enable 76" "Disabled,Enabled"
|
|
bitfld.long 0x08 11. " RCE[75] ,Receive Channel Enable 75" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 10. " RCE[74] ,Receive Channel Enable 74" "Disabled,Enabled"
|
|
bitfld.long 0x08 9. " RCE[73] ,Receive Channel Enable 73" "Disabled,Enabled"
|
|
bitfld.long 0x08 8. " RCE[72] ,Receive Channel Enable 72" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 7. " RCE[71] ,Receive Channel Enable 71" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " RCE[70] ,Receive Channel Enable 70" "Disabled,Enabled"
|
|
bitfld.long 0x08 5. " RCE[69] ,Receive Channel Enable 69" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 4. " RCE[68] ,Receive Channel Enable 68" "Disabled,Enabled"
|
|
bitfld.long 0x08 3. " RCE[67] ,Receive Channel Enable 67" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " RCE[66] ,Receive Channel Enable 66" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 1. " RCE[65] ,Receive Channel Enable 65" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " RCE[64] ,Receive Channel Enable 64" "Disabled,Enabled"
|
|
line.long 0x0c "MSP_RCE3,Receive Channel Enable Register 3"
|
|
bitfld.long 0x0c 31. " RCE[127] ,Receive Channel Enable 127" "Disabled,Enabled"
|
|
bitfld.long 0x0c 30. " RCE[126] ,Receive Channel Enable 126" "Disabled,Enabled"
|
|
bitfld.long 0x0c 29. " RCE[125] ,Receive Channel Enable 125" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 28. " RCE[124] ,Receive Channel Enable 124" "Disabled,Enabled"
|
|
bitfld.long 0x0c 27. " RCE[123] ,Receive Channel Enable 123" "Disabled,Enabled"
|
|
bitfld.long 0x0c 26. " RCE[122] ,Receive Channel Enable 122" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " RCE[121] ,Receive Channel Enable 121" "Disabled,Enabled"
|
|
bitfld.long 0x0c 24. " RCE[120] ,Receive Channel Enable 120" "Disabled,Enabled"
|
|
bitfld.long 0x0c 23. " RCE[119] ,Receive Channel Enable 119" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 22. " RCE[118] ,Receive Channel Enable 118" "Disabled,Enabled"
|
|
bitfld.long 0x0c 21. " RCE[117] ,Receive Channel Enable 117" "Disabled,Enabled"
|
|
bitfld.long 0x0c 20. " RCE[116] ,Receive Channel Enable 116" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " RCE[115] ,Receive Channel Enable 115" "Disabled,Enabled"
|
|
bitfld.long 0x0c 18. " RCE[114] ,Receive Channel Enable 114" "Disabled,Enabled"
|
|
bitfld.long 0x0c 17. " RCE[113] ,Receive Channel Enable 113" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 16. " RCE[112] ,Receive Channel Enable 112" "Disabled,Enabled"
|
|
bitfld.long 0x0c 15. " RCE[111] ,Receive Channel Enable 111" "Disabled,Enabled"
|
|
bitfld.long 0x0c 14. " RCE[110] ,Receive Channel Enable 110" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " RCE[109] ,Receive Channel Enable 109" "Disabled,Enabled"
|
|
bitfld.long 0x0c 12. " RCE[108] ,Receive Channel Enable 108" "Disabled,Enabled"
|
|
bitfld.long 0x0c 11. " RCE[107] ,Receive Channel Enable 107" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 10. " RCE[106] ,Receive Channel Enable 106" "Disabled,Enabled"
|
|
bitfld.long 0x0c 9. " RCE[105] ,Receive Channel Enable 105" "Disabled,Enabled"
|
|
bitfld.long 0x0c 8. " RCE[104] ,Receive Channel Enable 104" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " RCE[103] ,Receive Channel Enable 103" "Disabled,Enabled"
|
|
bitfld.long 0x0c 6. " RCE[102] ,Receive Channel Enable 102" "Disabled,Enabled"
|
|
bitfld.long 0x0c 5. " RCE[101] ,Receive Channel Enable 101" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 4. " RCE[100] ,Receive Channel Enable 100" "Disabled,Enabled"
|
|
bitfld.long 0x0c 3. " RCE[99] ,Receive Channel Enable 99" "Disabled,Enabled"
|
|
bitfld.long 0x0c 2. " RCE[98] ,Receive Channel Enable 98" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " RCE[97] ,Receive Channel Enable 97" "Disabled,Enabled"
|
|
bitfld.long 0x0c 0. " RCE[96] ,Receive Channel Enable 96" "Disabled,Enabled"
|
|
endif
|
|
sif ((cpu()=="STA2065")||(cpu()=="STA2165"))
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "MSP_IODLY,MSP Input/Output Delay Lines Control Register"
|
|
bitfld.long 0x00 24.--26. " SCKDLY ,MSPSCK delay line" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 20.--22. " RDXDLY ,MSPRDX delay line" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--18. " RFSDLY ,MSPRFS delay line" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " RCKDLY ,MSPRCK delay line" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--10. " TDXDLY ,MSPTDX delay line" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 4.--6. " TFSDLY ,MSPTFS delay line" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " TCKDLY ,MSPTCK delay line" "0,1,2,3,4,5,6,7"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "MSP_ITCR,MSP Test Control Register"
|
|
bitfld.long 0x00 1. " TESTFIFO ,FIFO test enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ITEN ,Integration test enable bit" "Normal,Enabled"
|
|
group.long 0x84++0x07
|
|
line.long 0x00 "MSP_ITIP,MSP Integration Test Input Register"
|
|
bitfld.long 0x00 7. " MTDMAC ,Transmit DMA clear input value" "Low,High"
|
|
bitfld.long 0x00 6. " MRDMAC ,Receive DMA clear input value" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " MSCKI ,MSPSCK input value" "Low,High"
|
|
bitfld.long 0x00 4. " MTCKI ,MSPTCK input value" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MTFSI ,MSPTFS input value" "Low,High"
|
|
bitfld.long 0x00 2. " MRCKI ,MSPRCK input value" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " MRFSI ,MSPRFS input value" "Low,High"
|
|
bitfld.long 0x00 0. " MRXDI ,MSPRXD input value" "Low,High"
|
|
line.long 0x04 "MSP_ITOP,MSP Integration Test Output Register"
|
|
bitfld.long 0x04 22. " MTFOINTR ,MSPTFOINTR value" "0,1"
|
|
bitfld.long 0x04 21. " MRFOINTR ,MSPRFOINTR value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 20. " MTDMASREQ ,Transmit DMA single request value" "0,1"
|
|
bitfld.long 0x04 19. " MTDMABREQ ,Transmit DMA Burst Request value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 18. " MRDMASREQ ,Receive DMA Single Request value" "0,1"
|
|
bitfld.long 0x04 17. " MRDMABREQ ,Receive DMA Burst Request value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 16. " MINTR ,MSPINTR value" "0,1"
|
|
bitfld.long 0x04 15. " MTFSINTR ,MSPTFSINTR value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 14. " MTEINTR ,MSPTEINTR value" "0,1"
|
|
bitfld.long 0x04 13. " MTXINTR ,MSPTXINTR value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 12. " MRFSINTR ,MSPRFSINTR value" "0,1"
|
|
bitfld.long 0x04 11. " MREINTR ,MSPREINTR value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 10. " MRXINTR ,MSPRXINTR value" "0,1"
|
|
bitfld.long 0x04 9. " MTCKOEN ,MSPTCK output enable value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 8. " MTFSOEN ,MSPTFS output enable value" "0,1"
|
|
bitfld.long 0x04 7. " MRCKOEN ,MSPRCK output enable value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 6. " MRFSOEN ,MSPRFS output enable value" "0,1"
|
|
bitfld.long 0x04 5. " MTXDOEN ,MSPTXD output enable value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 4. " MTCKO ,MSPTCK output value" "0,1"
|
|
bitfld.long 0x04 3. " MTFSO ,MSPTFS output value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 2. " MRCKO ,MSPRCK output value" "0,1"
|
|
bitfld.long 0x04 1. " MRFSO ,MSPRFS output value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 0. " MTXDO ,MSPTXD output value" "0,1"
|
|
if (((d.l(asd:(0x101F0000+0x80)))&0x2)==0x2)
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "MSP_TSTDR,MSP Test Data Register"
|
|
else
|
|
hgroup.long 0x8C++0x03
|
|
hide.long 0x00 "MSP_TSTDR,MSP Test Data Register"
|
|
endif
|
|
endif
|
|
width 14.
|
|
rgroup.long 0xfe0++0x01f
|
|
line.long 0x00 "MSPPERIPHID0,MSP Peripheral Identification Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PN0 ,Part Number 0 (0x21)"
|
|
line.long 0x04 "MSPPERIPHID1,MSP Peripheral Identification Register 1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " D0 ,Designer 0 (0x00)"
|
|
hexmask.long.byte 0x04 0.--3. 1. " PN1 ,Part Number 1 (0x00)"
|
|
line.long 0x08 "MSPPERIPHID2,MSP Peripheral Identification Register 2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " REV ,Revision (0x02)"
|
|
hexmask.long.byte 0x08 0.--3. 1. " D1 ,Designer 1 (0x08)"
|
|
line.long 0x0c "MSPPERIPHID3,MSP Peripheral Identification Register 3"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " CONF ,Configuration (0x00)"
|
|
line.long 0x10 "MSPPCELLID0,MSP PCell Identification Register 0"
|
|
hexmask.long.byte 0x10 0.--7. 1. " MSPPCELLID0 ,MSP PCell ID0 (0x0D)"
|
|
line.long 0x14 "MSPPCELLID1,MSP PCell Identification Register 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " MSPPCELLID1 ,MSP PCell ID1 (0xF0)"
|
|
line.long 0x18 "MSPPCELLID2,MSP PCell Identification Register 2"
|
|
hexmask.long.byte 0x18 0.--7. 1. " MSPPCELLID2 ,MSP PCell ID2 (0x05)"
|
|
line.long 0x1c "MSPPCELLID3,MSP PCell Identification Register 3"
|
|
hexmask.long.byte 0x1c 0.--7. 1. " MSPPCELLID3 ,MSP PCell ID3 (0xB1)"
|
|
width 0xb
|
|
tree.end
|
|
tree "MSP3"
|
|
base asd:0x101C0000
|
|
width 10.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "MSP_DR,MSP Data Register"
|
|
if (((data.long(asd:0x101C0000+0x04))&0x600080)==(0x400000||0x600000))
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "MSP_GCR,MSP Global Configuration Register"
|
|
bitfld.long 0x00 23. " SPIBME ,SPI Burst Mode Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21.--22. " SPICKML ,SPI Clock Modes" "Normal,Normal,Zero delay SPI,Half cycle delay SPI"
|
|
textline " "
|
|
bitfld.long 0x00 20. " FGEN ,Frame Generator Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " SCKSEL ,Sample Rate Generator Clock Selection" "Internal clk,Internal clk,MSPSCK & free-running,MSPSCK & resynchronized"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SCKPOL ,Sample Rate Generator Clock Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SGEN ,Sample Rate Generator Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " TXDDL ,Transmit Data Extra Delay" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 14. " TCKSEL ,Transmit Clock Selection" "External SPI master,Internal sample rate generator/MSP is SPI Master"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TCKPOL ,Transmit Clock Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 11.--12. " TFSSEL ,Transmit Frame Synchronization Selection" "External source,External source,Frame Generator logic; each time MSP_TDR copied to MSP_TSR,Frame Generator logic with period & width"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TFSPOL ,Transmit Frame Synchronization Polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TFFEN ,Transmit FIFO Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " TXEN ,Transmitter Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LBM ,Loopback Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RCKSEL ,Receive Clock Selection" "External source on MSPRCK,Sample Rate Generator & delivered on MSPRCK"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RCKPOL ,Receive Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RFSSEL ,Receive Frame Synchronization Selection" "External source,Frame Generator logic"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DCM ,Direct Companding Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RFSPOL ,Receive Frame Synchronization Polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RFFEN ,Receive FIFO Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXEN ,Receiver Enable" "Disabled,Enabled"
|
|
elif (((data.long(asd:0x101C0000+0x04))&0x600080)==(0x400080||0x600080))
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "MSP_GCR,MSP Global Configuration Register"
|
|
bitfld.long 0x00 23. " SPIBME ,SPI Burst Mode Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21.--22. " SPICKML ,SPI Clock Modes" "Normal,Normal,Zero delay SPI,Half cycle delay SPI"
|
|
textline " "
|
|
bitfld.long 0x00 20. " FGEN ,Frame Generator Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " SCKSEL ,Sample Rate Generator Clock Selection" "Internal clk,Internal clk,MSPSCK & free-running,MSPSCK & resynchronized"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SCKPOL ,Sample Rate Generator Clock Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SGEN ,Sample Rate Generator Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " TXDDL ,Transmit Data Extra Delay" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 14. " TCKSEL ,Transmit Clock Selection" "External SPI master,Internal sample rate generator/MSP is SPI Master"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TCKPOL ,Transmit Clock Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 11.--12. " TFSSEL ,Transmit Frame Synchronization Selection" "External source,External source,Frame Generator logic; each time MSP_TDR copied to MSP_TSR,Frame Generator logic with period & width"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TFSPOL ,Transmit Frame Synchronization Polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TFFEN ,Transmit FIFO Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " TXEN ,Transmitter Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LBM ,Loopback Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RCKSEL ,Receive Clock Selection" "Transmit Clock,Transmit Clock & delivered on RCK"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RCKPOL ,Receive Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RFSSEL ,Receive Frame Synchronization Selection" "External source,Frame Generator logic"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DCM ,Direct Companding Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RFSPOL ,Receive Frame Synchronization Polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RFFEN ,Receive FIFO Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXEN ,Receiver Enable" "Disabled,Enabled"
|
|
elif (((data.long(asd:0x101C0000+0x04))&0x600080)==(0x000000||0x200000))
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "MSP_GCR,MSP Global Configuration Register"
|
|
bitfld.long 0x00 23. " SPIBME ,SPI Burst Mode Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21.--22. " SPICKML ,SPI Clock Modes" "Normal,Normal,Zero delay SPI,Half cycle delay SPI"
|
|
textline " "
|
|
bitfld.long 0x00 20. " FGEN ,Frame Generator Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " SCKSEL ,Sample Rate Generator Clock Selection" "Internal clk,Internal clk,MSPSCK & free-running,MSPSCK & resynchronized"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SCKPOL ,Sample Rate Generator Clock Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SGEN ,Sample Rate Generator Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " TXDDL ,Transmit Data Extra Delay" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 14. " TCKSEL ,Transmit Clock Selection" "External source on MSPTCK,Internal sample rate generator"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TCKPOL ,Transmit Clock Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 11.--12. " TFSSEL ,Transmit Frame Synchronization Selection" "External source,External source,Frame Generator logic; each time MSP_TDR copied to MSP_TSR,Frame Generator logic with period & width"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TFSPOL ,Transmit Frame Synchronization Polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TFFEN ,Transmit FIFO Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " TXEN ,Transmitter Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LBM ,Loopback Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RCKSEL ,Receive Clock Selection" "External source on MSPRCK,Sample Rate Generator & delivered on MSPRCK"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RCKPOL ,Receive Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RFSSEL ,Receive Frame Synchronization Selection" "External source,Frame Generator logic"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DCM ,Direct Companding Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RFSPOL ,Receive Frame Synchronization Polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RFFEN ,Receive FIFO Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXEN ,Receiver Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "MSP_GCR,MSP Global Configuration Register"
|
|
bitfld.long 0x00 23. " SPIBME ,SPI Burst Mode Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21.--22. " SPICKML ,SPI Clock Modes" "Normal,Normal,Zero delay SPI,Half cycle delay SPI"
|
|
textline " "
|
|
bitfld.long 0x00 20. " FGEN ,Frame Generator Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " SCKSEL ,Sample Rate Generator Clock Selection" "Internal clk,Internal clk,MSPSCK & free-running,MSPSCK & resynchronized"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SCKPOL ,Sample Rate Generator Clock Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SGEN ,Sample Rate Generator Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " TXDDL ,Transmit Data Extra Delay" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 14. " TCKSEL ,Transmit Clock Selection" "External source on MSPTCK,Internal sample rate generator"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TCKPOL ,Transmit Clock Polarity" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 11.--12. " TFSSEL ,Transmit Frame Synchronization Selection" "External source,External source,Frame Generator logic; each time MSP_TDR copied to MSP_TSR,Frame Generator logic with period & width"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TFSPOL ,Transmit Frame Synchronization Polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TFFEN ,Transmit FIFO Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " TXEN ,Transmitter Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LBM ,Loopback Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RCKSEL ,Receive Clock Selection" "Transmit Clock,Transmit Clock & delivered on RCK"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RCKPOL ,Receive Clock Polarity" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RFSSEL ,Receive Frame Synchronization Selection" "External source,Frame Generator logic"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DCM ,Direct Companding Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RFSPOL ,Receive Frame Synchronization Polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RFFEN ,Receive FIFO Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXEN ,Receiver Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x08++0x0b
|
|
line.long 0x00 "MSP_TCF,MSP Transmit Configuration Register"
|
|
bitfld.long 0x00 28.--29. " TBSWAP ,Transmit Halfword Swapping" "Not swapped,Little-big endian byte swap in a word,Little-big endian byte swap in each halfwords,Halfword swap"
|
|
textline " "
|
|
bitfld.long 0x00 27. " TP2EN ,Transmit Phase 2 Enable" "Single,Dual"
|
|
textline " "
|
|
bitfld.long 0x00 26. " TP2SM ,Transmit Phase 2 Start Mode" "End of Phase 1,TFS trans. to opposite edge that started Phase 1"
|
|
textline " "
|
|
hexmask.long.byte 0x00 19.--25. 1. " TP2FLEN ,Transmit Phase 2 Frame Length"
|
|
bitfld.long 0x00 16.--18. " TP2ELEN ,Transmit Phase 2 Element Length" "8-bit,10-bit,12-bit,14-bit,16-bit,20-bit,24-bit,32-bit"
|
|
bitfld.long 0x00 15. " TFSIG ,Transmit Frame Sync Ignore" "Not ignored,Ignored"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " TDDLY ,Transmit Data Delay" "0 bits,1 bit,2 bits,3 bits"
|
|
bitfld.long 0x00 12. " TENDN ,Transmit Bit Endian Format" "MSBit-first,LSBit-first"
|
|
bitfld.long 0x00 10.--11. " TDTY ,Transmit Data Type" "Disabled,Disabled,Enabled/u-law,Enabled/A-law"
|
|
textline " "
|
|
hexmask.long.byte 0x00 3.--9. 1. " TP1FLEN ,Transmit Phase 1 Frame Length"
|
|
bitfld.long 0x00 0.--2. " TP1ELEN ,Transmit Phase 1 Element Length" "8-bit,10-bit,12-bit,14-bit,16-bit,20-bit,24-bit,32-bit"
|
|
line.long 0x04 "MSP_RCF,MSP Receive Configuration Register"
|
|
bitfld.long 0x04 28.--29. " RBSWAP ,Receive Halfword Swapping" "Not swapped,Little-big endian byte swap in a word,Little-big endian byte swap in each halfwords,Halfword swap"
|
|
textline " "
|
|
bitfld.long 0x04 27. " RP2EN ,Receive Phase 2 Enable" "Single,Dual"
|
|
textline " "
|
|
bitfld.long 0x04 26. " RP2SM ,Receive Phase 2 Start Mode" "End of Phase 1,RFS trans. to opposite edge that started Phase 1"
|
|
textline " "
|
|
hexmask.long.byte 0x04 19.--25. 1. " RP2FLEN ,Receive Phase 2 Frame Length"
|
|
bitfld.long 0x04 16.--18. " RP2ELEN ,Receive Phase 2 Element Length" "8-bit,10-bit,12-bit,14-bit,16-bit,20-bit,24-bit,32-bit"
|
|
bitfld.long 0x04 15. " RFSIG ,Receive Frame Sync Ignore" "Not ignored,Ignored"
|
|
textline " "
|
|
bitfld.long 0x04 13.--14. " RDDLY ,Receive Data Delay" "0 bits,1 bit,2 bits,3 bits"
|
|
bitfld.long 0x04 12. " RENDN ,Receive Bit Endian Format" "MSBit-first,LSBit-first"
|
|
bitfld.long 0x04 10.--11. " RDTYP ,Receive Data Type" "Disabled,Disabled,Enabled/u-law,Enabled/A-law"
|
|
textline " "
|
|
hexmask.long.byte 0x04 3.--9. 1. " RRP1FLEN ,Receive Phase 1 Frame Length"
|
|
bitfld.long 0x04 0.--2. " RP1ELEN ,Receive Phase 1 Element Length" "8-bit,10-bit,12-bit,14-bit,16-bit,20-bit,24-bit,32-bit"
|
|
line.long 0x08 "MSP_SRG,MSP Sample Rate Generator Register"
|
|
hexmask.long.word 0x08 16.--28. 1. " FRPER ,Frame Period"
|
|
bitfld.long 0x08 10.--15. " FRWID ,Frame Width" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64"
|
|
hexmask.long.word 0x08 0.--9. 1. " SCKDIV ,Sample Rate Generator Clock Divide factor"
|
|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "MSP_FLR,MSP Flag Register"
|
|
bitfld.long 0x00 5. " TFU ,Transmit FIFO Full flag" "Not full,Full"
|
|
bitfld.long 0x00 4. " TFE ,Transmit FIFO Empty flag" "Not empty,Empty"
|
|
bitfld.long 0x00 3. " TBUSY ,Transmit Busy flag" "Not busy,Busy"
|
|
bitfld.long 0x00 2. " RFU ,Receive FIFO Full flag" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RFE ,Receive FIFO Empty flag" "Not empty,Empty"
|
|
bitfld.long 0x00 0. " RBUSY ,Receiver Busy flag" "Not busy,Busy"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "MSP_DMACR,MSP DMA Control Register"
|
|
bitfld.long 0x00 1. " TDMAE ,Transmit DMA Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RDMAE ,Receive DMA Enable" "Disabled,Enabled"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "MSP_IMSC,MSP Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x00 9. " TFOIM ,Transmit FIFO not full interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 8. " RFOIM ,Receive FIFO not empty interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 7. " TFSIM ,Transmit Frame Sync interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 6. " TSEIM ,Transmit Frame Synchronization Error interrupt mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TUEIM ,Transmit Underrun Error interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 4. " TXIM ,Transmit interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 3. " RFSIM ,Receive Frame Sync interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " RSEIM ,Receive Frame Synchronization Error interrupt mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ROEIM ,Receive Overrun Error interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 0. " RXIM ,Receive Interrupt mask" "Masked,Not masked"
|
|
rgroup.long 0x24++0x07
|
|
line.long 0x00 "MSP_RIS,MSP Raw Interrupt Status Register"
|
|
bitfld.long 0x00 9. " TFORIS ,Transmit FIFO not full Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " RFORIS ,Receive FIFO not empty Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 7. " TFSRIS ,Transmit Frame Sync Raw Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TSERIS ,Transmit Frame Synchronization Error Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " TUERIS ,Transmit Underrun Error Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " TXRIS ,Transmit FIFO service Raw Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RFSRIS ,Receive Frame Sync Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " RSERIS ,Receive Frame Synchronization Error Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " ROERIS ,Receive Overrun Error Raw Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXRIS ,Receive FIFO service Raw Interrupt Status" "No interrupt,Interrupt"
|
|
line.long 0x04 "MSP_MIS,MSP Masked Interrupt Status Register"
|
|
bitfld.long 0x04 9. " TFOMIS ,Transmit FIFO not full Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 8. " RFOMIS ,Receive FIFO not empty Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 7. " TFSMIS ,Transmit Frame Sync Masked Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 6. " TSEMIS ,Transmit Frame Synchronization Error Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 5. " TUEMIS ,Transmit Underrun Error Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 4. " TXMIS ,Transmit FIFO service Masked Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 3. " RFSMIS ,Receive Frame Sync Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 2. " RSEMIS ,Receive Frame Synchronization Error Masked Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 1. " ROEMIS ,Receive Overrun Error Masked Interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 0. " RXMIS ,Receive FIFO service Masked Interrupt Status" "No interrupt,Interrupt"
|
|
group.long 0x2c++0x07
|
|
line.long 0x00 "MSP_ICR,MSP Interrupt Clear Register"
|
|
bitfld.long 0x00 7. " TFSIC ,Transmit Frame Sync Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 6. " TSEIC ,Transmit Frame Synchronization Error Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 5. " TUEIC ,Transmit Underrun Error Interrupt Clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RFSIC ,Receive Frame Sync Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 2. " RSEIC ,Receive Frame Synchronization Error Interrupt Clear" "No effect,Cleared"
|
|
bitfld.long 0x00 1. " ROEIC ,Receive Overrun Error Interrupt Clear" "No effect,Cleared"
|
|
line.long 0x04 "MSP_MCR,Multichannel Control Register"
|
|
bitfld.long 0x04 6.--7. " TMCSF ,Transmit Multichannel Current Subframe" "0,1,2,3"
|
|
bitfld.long 0x04 5. " TMCEN ,Transmit Multichannel Mode Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 3.--4. " RMCMP ,Receive Multichannel Comparison Mode" "Disabled,Disabled,Enabled/FALSE,Enabled/TRUE"
|
|
textline " "
|
|
bitfld.long 0x04 1.--2. " RMCSF ,Receive Multichannel Current Subframe" "0,1,2,3"
|
|
bitfld.long 0x04 0. " RMCEN ,Receive Multichannel Mode Enable" "Disabled,Enabled"
|
|
if (((data.long(asd:0x101C0000+0x30))&0x18)==(0x10||0x18))
|
|
group.long 0x34++0x07
|
|
line.long 0x00 "MSP_RCV,Receive Compare Value Register"
|
|
bitfld.long 0x00 31. " RCV[31] ,Receive Compare Value bit 31" "Low,High"
|
|
bitfld.long 0x00 30. " RCV[30] ,Receive Compare Value bit 30" "Low,High"
|
|
bitfld.long 0x00 29. " RCV[29] ,Receive Compare Value bit 29" "Low,High"
|
|
bitfld.long 0x00 28. " RCV[28] ,Receive Compare Value bit 28" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 27. " RCV[27] ,Receive Compare Value bit 27" "Low,High"
|
|
bitfld.long 0x00 26. " RCV[26] ,Receive Compare Value bit 26" "Low,High"
|
|
bitfld.long 0x00 25. " RCV[25] ,Receive Compare Value bit 25" "Low,High"
|
|
bitfld.long 0x00 24. " RCV[24] ,Receive Compare Value bit 24" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 23. " RCV[23] ,Receive Compare Value bit 23" "Low,High"
|
|
bitfld.long 0x00 22. " RCV[22] ,Receive Compare Value bit 22" "Low,High"
|
|
bitfld.long 0x00 21. " RCV[21] ,Receive Compare Value bit 21" "Low,High"
|
|
bitfld.long 0x00 20. " RCV[20] ,Receive Compare Value bit 20" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " RCV[19] ,Receive Compare Value bit 19" "Low,High"
|
|
bitfld.long 0x00 18. " RCV[18] ,Receive Compare Value bit 18" "Low,High"
|
|
bitfld.long 0x00 17. " RCV[17] ,Receive Compare Value bit 17" "Low,High"
|
|
bitfld.long 0x00 16. " RCV[16] ,Receive Compare Value bit 16" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " RCV[15] ,Receive Compare Value bit 15" "Low,High"
|
|
bitfld.long 0x00 14. " RCV[14] ,Receive Compare Value bit 14" "Low,High"
|
|
bitfld.long 0x00 13. " RCV[13] ,Receive Compare Value bit 13" "Low,High"
|
|
bitfld.long 0x00 12. " RCV[12] ,Receive Compare Value bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " RCV[11] ,Receive Compare Value bit 11" "Low,High"
|
|
bitfld.long 0x00 10. " RCV[10] ,Receive Compare Value bit 10" "Low,High"
|
|
bitfld.long 0x00 9. " RCV[09] ,Receive Compare Value bit 9" "Low,High"
|
|
bitfld.long 0x00 8. " RCV[08] ,Receive Compare Value bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RCV[07] ,Receive Compare Value bit 7" "Low,High"
|
|
bitfld.long 0x00 6. " RCV[06] ,Receive Compare Value bit 6" "Low,High"
|
|
bitfld.long 0x00 5. " RCV[05] ,Receive Compare Value bit 5" "Low,High"
|
|
bitfld.long 0x00 4. " RCV[04] ,Receive Compare Value bit 4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RCV[03] ,Receive Compare Value bit 3" "Low,High"
|
|
bitfld.long 0x00 2. " RCV[02] ,Receive Compare Value bit 2" "Low,High"
|
|
bitfld.long 0x00 1. " RCV[01] ,Receive Compare Value bit 1" "Low,High"
|
|
bitfld.long 0x00 0. " RCV[00] ,Receive Compare Value bit 0" "Low,High"
|
|
line.long 0x04 "MSP_RCM,Receive Compare Mask Register"
|
|
bitfld.long 0x04 31. " RCM[31] ,Receive Compare Mask bit 31" "Low,High"
|
|
bitfld.long 0x04 30. " RCM[30] ,Receive Compare Mask bit 30" "Low,High"
|
|
bitfld.long 0x04 29. " RCM[29] ,Receive Compare Mask bit 29" "Low,High"
|
|
bitfld.long 0x04 28. " RCM[28] ,Receive Compare Mask bit 28" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 27. " RCM[27] ,Receive Compare Mask bit 27" "Low,High"
|
|
bitfld.long 0x04 26. " RCM[26] ,Receive Compare Mask bit 26" "Low,High"
|
|
bitfld.long 0x04 25. " RCM[25] ,Receive Compare Mask bit 25" "Low,High"
|
|
bitfld.long 0x04 24. " RCM[24] ,Receive Compare Mask bit 24" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 23. " RCM[23] ,Receive Compare Mask bit 23" "Low,High"
|
|
bitfld.long 0x04 22. " RCM[22] ,Receive Compare Mask bit 22" "Low,High"
|
|
bitfld.long 0x04 21. " RCM[21] ,Receive Compare Mask bit 21" "Low,High"
|
|
bitfld.long 0x04 20. " RCM[20] ,Receive Compare Mask bit 20" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 19. " RCM[19] ,Receive Compare Mask bit 19" "Low,High"
|
|
bitfld.long 0x04 18. " RCM[18] ,Receive Compare Mask bit 18" "Low,High"
|
|
bitfld.long 0x04 17. " RCM[17] ,Receive Compare Mask bit 17" "Low,High"
|
|
bitfld.long 0x04 16. " RCM[16] ,Receive Compare Mask bit 16" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 15. " RCM[15] ,Receive Compare Mask bit 15" "Low,High"
|
|
bitfld.long 0x04 14. " RCM[14] ,Receive Compare Mask bit 14" "Low,High"
|
|
bitfld.long 0x04 13. " RCM[13] ,Receive Compare Mask bit 13" "Low,High"
|
|
bitfld.long 0x04 12. " RCM[12] ,Receive Compare Mask bit 12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 11. " RCM[11] ,Receive Compare Mask bit 11" "Low,High"
|
|
bitfld.long 0x04 10. " RCM[10] ,Receive Compare Mask bit 10" "Low,High"
|
|
bitfld.long 0x04 9. " RCM[09] ,Receive Compare Mask bit 9" "Low,High"
|
|
bitfld.long 0x04 8. " RCM[08] ,Receive Compare Mask bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 7. " RCM[07] ,Receive Compare Mask bit 7" "Low,High"
|
|
bitfld.long 0x04 6. " RCM[06] ,Receive Compare Mask bit 6" "Low,High"
|
|
bitfld.long 0x04 5. " RCM[05] ,Receive Compare Mask bit 5" "Low,High"
|
|
bitfld.long 0x04 4. " RCM[04] ,Receive Compare Mask bit 4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 3. " RCM[03] ,Receive Compare Mask bit 3" "Low,High"
|
|
bitfld.long 0x04 2. " RCM[02] ,Receive Compare Mask bit 2" "Low,High"
|
|
bitfld.long 0x04 1. " RCM[01] ,Receive Compare Mask bit 1" "Low,High"
|
|
bitfld.long 0x04 0. " RCM[00] ,Receive Compare Mask bit 0" "Low,High"
|
|
else
|
|
hgroup.long 0x34++0x07
|
|
hide.long 0x00 "MSP_RCV,Receive Compare Value Register"
|
|
hide.long 0x04 "MSP_RCM,Receive Compare Mask Register"
|
|
endif
|
|
if (((data.long(asd:0x101C0000+0x30))&0x20)==0x00)
|
|
hgroup.long 0x40++0x0f
|
|
hide.long 0x00 "MSP_TCE0,Transmit Channel Enable Register 0"
|
|
hide.long 0x04 "MSP_TCE1,Transmit Channel Enable Register 1"
|
|
hide.long 0x08 "MSP_TCE2,Transmit Channel Enable Register 2"
|
|
hide.long 0x0c "MSP_TCE3,Transmit Channel Enable Register 3"
|
|
else
|
|
group.long 0x40++0x0f
|
|
line.long 0x00 "MSP_TCE0,Transmit Channel Enable Register 0"
|
|
bitfld.long 0x00 31. " TCE[31] ,Transmit Channel Enable 31" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " TCE[30] ,Transmit Channel Enable 30" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " TCE[29] ,Transmit Channel Enable 29" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " TCE[28] ,Transmit Channel Enable 28" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " TCE[27] ,Transmit Channel Enable 27" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " TCE[26] ,Transmit Channel Enable 26" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " TCE[25] ,Transmit Channel Enable 25" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " TCE[24] ,Transmit Channel Enable 24" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " TCE[23] ,Transmit Channel Enable 23" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " TCE[22] ,Transmit Channel Enable 22" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " TCE[21] ,Transmit Channel Enable 21" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCE[20] ,Transmit Channel Enable 20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " TCE[19] ,Transmit Channel Enable 19" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " TCE[18] ,Transmit Channel Enable 18" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " TCE[17] ,Transmit Channel Enable 17" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " TCE[16] ,Transmit Channel Enable 16" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " TCE[15] ,Transmit Channel Enable 15" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " TCE[14] ,Transmit Channel Enable 14" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " TCE[13] ,Transmit Channel Enable 13" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " TCE[12] ,Transmit Channel Enable 12" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " TCE[11] ,Transmit Channel Enable 11" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TCE[10] ,Transmit Channel Enable 10" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " TCE[09] ,Transmit Channel Enable 9" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " TCE[08] ,Transmit Channel Enable 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TCE[07] ,Transmit Channel Enable 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " TCE[06] ,Transmit Channel Enable 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " TCE[05] ,Transmit Channel Enable 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TCE[04] ,Transmit Channel Enable 4" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " TCE[03] ,Transmit Channel Enable 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TCE[02] ,Transmit Channel Enable 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TCE[01] ,Transmit Channel Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TCE[00] ,Transmit Channel Enable 0" "Disabled,Enabled"
|
|
line.long 0x04 "MSP_TCE1,Transmit Channel Enable Register 1"
|
|
bitfld.long 0x04 31. " TCE[63] ,Transmit Channel Enable 63" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " TCE[62] ,Transmit Channel Enable 62" "Disabled,Enabled"
|
|
bitfld.long 0x04 29. " TCE[61] ,Transmit Channel Enable 61" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 28. " TCE[60] ,Transmit Channel Enable 60" "Disabled,Enabled"
|
|
bitfld.long 0x04 27. " TCE[59] ,Transmit Channel Enable 59" "Disabled,Enabled"
|
|
bitfld.long 0x04 26. " TCE[58] ,Transmit Channel Enable 58" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 25. " TCE[57] ,Transmit Channel Enable 57" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " TCE[56] ,Transmit Channel Enable 56" "Disabled,Enabled"
|
|
bitfld.long 0x04 23. " TCE[55] ,Transmit Channel Enable 55" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 22. " TCE[54] ,Transmit Channel Enable 54" "Disabled,Enabled"
|
|
bitfld.long 0x04 21. " TCE[53] ,Transmit Channel Enable 53" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " TCE[52] ,Transmit Channel Enable 52" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " TCE[51] ,Transmit Channel Enable 51" "Disabled,Enabled"
|
|
bitfld.long 0x04 18. " TCE[50] ,Transmit Channel Enable 50" "Disabled,Enabled"
|
|
bitfld.long 0x04 17. " TCE[49] ,Transmit Channel Enable 49" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 16. " TCE[48] ,Transmit Channel Enable 48" "Disabled,Enabled"
|
|
bitfld.long 0x04 15. " TCE[47] ,Transmit Channel Enable 47" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " TCE[46] ,Transmit Channel Enable 46" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 13. " TCE[45] ,Transmit Channel Enable 45" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " TCE[44] ,Transmit Channel Enable 44" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " TCE[43] ,Transmit Channel Enable 43" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 10. " TCE[42] ,Transmit Channel Enable 42" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " TCE[41] ,Transmit Channel Enable 41" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " TCE[40] ,Transmit Channel Enable 40" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " TCE[39] ,Transmit Channel Enable 39" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " TCE[38] ,Transmit Channel Enable 38" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " TCE[37] ,Transmit Channel Enable 37" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 4. " TCE[36] ,Transmit Channel Enable 36" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " TCE[35] ,Transmit Channel Enable 35" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " TCE[34] ,Transmit Channel Enable 34" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " TCE[33] ,Transmit Channel Enable 33" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " TCE[32] ,Transmit Channel Enable 32" "Disabled,Enabled"
|
|
line.long 0x08 "MSP_TCE2,Transmit Channel Enable Register 2"
|
|
bitfld.long 0x08 31. " TCE[95] ,Transmit Channel Enable 95" "Disabled,Enabled"
|
|
bitfld.long 0x08 30. " TCE[94] ,Transmit Channel Enable 94" "Disabled,Enabled"
|
|
bitfld.long 0x08 29. " TCE[93] ,Transmit Channel Enable 93" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 28. " TCE[92] ,Transmit Channel Enable 92" "Disabled,Enabled"
|
|
bitfld.long 0x08 27. " TCE[91] ,Transmit Channel Enable 91" "Disabled,Enabled"
|
|
bitfld.long 0x08 26. " TCE[90] ,Transmit Channel Enable 90" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 25. " TCE[89] ,Transmit Channel Enable 89" "Disabled,Enabled"
|
|
bitfld.long 0x08 24. " TCE[88] ,Transmit Channel Enable 88" "Disabled,Enabled"
|
|
bitfld.long 0x08 23. " TCE[87] ,Transmit Channel Enable 87" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 22. " TCE[86] ,Transmit Channel Enable 86" "Disabled,Enabled"
|
|
bitfld.long 0x08 21. " TCE[85] ,Transmit Channel Enable 85" "Disabled,Enabled"
|
|
bitfld.long 0x08 20. " TCE[84] ,Transmit Channel Enable 84" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 19. " TCE[83] ,Transmit Channel Enable 83" "Disabled,Enabled"
|
|
bitfld.long 0x08 18. " TCE[82] ,Transmit Channel Enable 82" "Disabled,Enabled"
|
|
bitfld.long 0x08 17. " TCE[81] ,Transmit Channel Enable 81" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 16. " TCE[80] ,Transmit Channel Enable 80" "Disabled,Enabled"
|
|
bitfld.long 0x08 15. " TCE[79] ,Transmit Channel Enable 79" "Disabled,Enabled"
|
|
bitfld.long 0x08 14. " TCE[78] ,Transmit Channel Enable 78" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 13. " TCE[77] ,Transmit Channel Enable 77" "Disabled,Enabled"
|
|
bitfld.long 0x08 12. " TCE[76] ,Transmit Channel Enable 76" "Disabled,Enabled"
|
|
bitfld.long 0x08 11. " TCE[75] ,Transmit Channel Enable 75" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 10. " TCE[74] ,Transmit Channel Enable 74" "Disabled,Enabled"
|
|
bitfld.long 0x08 9. " TCE[73] ,Transmit Channel Enable 73" "Disabled,Enabled"
|
|
bitfld.long 0x08 8. " TCE[72] ,Transmit Channel Enable 72" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 7. " TCE[71] ,Transmit Channel Enable 71" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " TCE[70] ,Transmit Channel Enable 70" "Disabled,Enabled"
|
|
bitfld.long 0x08 5. " TCE[69] ,Transmit Channel Enable 69" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 4. " TCE[68] ,Transmit Channel Enable 68" "Disabled,Enabled"
|
|
bitfld.long 0x08 3. " TCE[67] ,Transmit Channel Enable 67" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " TCE[66] ,Transmit Channel Enable 66" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 1. " TCE[65] ,Transmit Channel Enable 65" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " TCE[64] ,Transmit Channel Enable 64" "Disabled,Enabled"
|
|
line.long 0x0c "MSP_TCE3,Transmit Channel Enable Register 3"
|
|
bitfld.long 0x0c 31. " TCE[127] ,Transmit Channel Enable 127" "Disabled,Enabled"
|
|
bitfld.long 0x0c 30. " TCE[126] ,Transmit Channel Enable 126" "Disabled,Enabled"
|
|
bitfld.long 0x0c 29. " TCE[125] ,Transmit Channel Enable 125" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 28. " TCE[124] ,Transmit Channel Enable 124" "Disabled,Enabled"
|
|
bitfld.long 0x0c 27. " TCE[123] ,Transmit Channel Enable 123" "Disabled,Enabled"
|
|
bitfld.long 0x0c 26. " TCE[122] ,Transmit Channel Enable 122" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " TCE[121] ,Transmit Channel Enable 121" "Disabled,Enabled"
|
|
bitfld.long 0x0c 24. " TCE[120] ,Transmit Channel Enable 120" "Disabled,Enabled"
|
|
bitfld.long 0x0c 23. " TCE[119] ,Transmit Channel Enable 119" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 22. " TCE[118] ,Transmit Channel Enable 118" "Disabled,Enabled"
|
|
bitfld.long 0x0c 21. " TCE[117] ,Transmit Channel Enable 117" "Disabled,Enabled"
|
|
bitfld.long 0x0c 20. " TCE[116] ,Transmit Channel Enable 116" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " TCE[115] ,Transmit Channel Enable 115" "Disabled,Enabled"
|
|
bitfld.long 0x0c 18. " TCE[114] ,Transmit Channel Enable 114" "Disabled,Enabled"
|
|
bitfld.long 0x0c 17. " TCE[113] ,Transmit Channel Enable 113" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 16. " TCE[112] ,Transmit Channel Enable 112" "Disabled,Enabled"
|
|
bitfld.long 0x0c 15. " TCE[111] ,Transmit Channel Enable 111" "Disabled,Enabled"
|
|
bitfld.long 0x0c 14. " TCE[110] ,Transmit Channel Enable 110" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " TCE[109] ,Transmit Channel Enable 109" "Disabled,Enabled"
|
|
bitfld.long 0x0c 12. " TCE[108] ,Transmit Channel Enable 108" "Disabled,Enabled"
|
|
bitfld.long 0x0c 11. " TCE[107] ,Transmit Channel Enable 107" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 10. " TCE[106] ,Transmit Channel Enable 106" "Disabled,Enabled"
|
|
bitfld.long 0x0c 9. " TCE[105] ,Transmit Channel Enable 105" "Disabled,Enabled"
|
|
bitfld.long 0x0c 8. " TCE[104] ,Transmit Channel Enable 104" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " TCE[103] ,Transmit Channel Enable 103" "Disabled,Enabled"
|
|
bitfld.long 0x0c 6. " TCE[102] ,Transmit Channel Enable 102" "Disabled,Enabled"
|
|
bitfld.long 0x0c 5. " TCE[101] ,Transmit Channel Enable 101" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 4. " TCE[100] ,Transmit Channel Enable 100" "Disabled,Enabled"
|
|
bitfld.long 0x0c 3. " TCE[99] ,Transmit Channel Enable 99" "Disabled,Enabled"
|
|
bitfld.long 0x0c 2. " TCE[98] ,Transmit Channel Enable 98" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " TCE[97] ,Transmit Channel Enable 97" "Disabled,Enabled"
|
|
bitfld.long 0x0c 0. " TCE[96] ,Transmit Channel Enable 96" "Disabled,Enabled"
|
|
endif
|
|
if (((data.long(asd:0x101C0000+0x30))&0x01)==0x00)
|
|
group.long 0x60++0x0f
|
|
hide.long 0x00 "MSP_RCE0,Receive Channel Enable Register 0"
|
|
hide.long 0x04 "MSP_RCE1,Receive Channel Enable Register 1"
|
|
hide.long 0x08 "MSP_RCE2,Receive Channel Enable Register 2"
|
|
hide.long 0x0c "MSP_RCE3,Receive Channel Enable Register 3"
|
|
else
|
|
group.long 0x60++0x0f
|
|
line.long 0x00 "MSP_RCE0,Receive Channel Enable Register 0"
|
|
bitfld.long 0x00 31. " RCE[31] ,Receive Channel Enable 31" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " RCE[30] ,Receive Channel Enable 30" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " RCE[29] ,Receive Channel Enable 29" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " RCE[28] ,Receive Channel Enable 28" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " RCE[27] ,Receive Channel Enable 27" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " RCE[26] ,Receive Channel Enable 26" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " RCE[25] ,Receive Channel Enable 25" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " RCE[24] ,Receive Channel Enable 24" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " RCE[23] ,Receive Channel Enable 23" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " RCE[22] ,Receive Channel Enable 22" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " RCE[21] ,Receive Channel Enable 21" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " RCE[20] ,Receive Channel Enable 20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " RCE[19] ,Receive Channel Enable 19" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " RCE[18] ,Receive Channel Enable 18" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " RCE[17] ,Receive Channel Enable 17" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " RCE[16] ,Receive Channel Enable 16" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " RCE[15] ,Receive Channel Enable 15" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " RCE[14] ,Receive Channel Enable 14" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " RCE[13] ,Receive Channel Enable 13" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " RCE[12] ,Receive Channel Enable 12" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " RCE[11] ,Receive Channel Enable 11" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " RCE[10] ,Receive Channel Enable 10" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " RCE[09] ,Receive Channel Enable 9" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " RCE[08] ,Receive Channel Enable 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RCE[07] ,Receive Channel Enable 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " RCE[06] ,Receive Channel Enable 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " RCE[05] ,Receive Channel Enable 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RCE[04] ,Receive Channel Enable 4" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " RCE[03] ,Receive Channel Enable 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " RCE[02] ,Receive Channel Enable 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RCE[01] ,Receive Channel Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RCE[00] ,Receive Channel Enable 0" "Disabled,Enabled"
|
|
line.long 0x04 "MSP_RCE1,Receive Channel Enable Register 1"
|
|
bitfld.long 0x04 31. " RCE[63] ,Receive Channel Enable 63" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " RCE[62] ,Receive Channel Enable 62" "Disabled,Enabled"
|
|
bitfld.long 0x04 29. " RCE[61] ,Receive Channel Enable 61" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 28. " RCE[60] ,Receive Channel Enable 60" "Disabled,Enabled"
|
|
bitfld.long 0x04 27. " RCE[59] ,Receive Channel Enable 59" "Disabled,Enabled"
|
|
bitfld.long 0x04 26. " RCE[58] ,Receive Channel Enable 58" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 25. " RCE[57] ,Receive Channel Enable 57" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " RCE[56] ,Receive Channel Enable 56" "Disabled,Enabled"
|
|
bitfld.long 0x04 23. " RCE[55] ,Receive Channel Enable 55" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 22. " RCE[54] ,Receive Channel Enable 54" "Disabled,Enabled"
|
|
bitfld.long 0x04 21. " RCE[53] ,Receive Channel Enable 53" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " RCE[52] ,Receive Channel Enable 52" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " RCE[51] ,Receive Channel Enable 51" "Disabled,Enabled"
|
|
bitfld.long 0x04 18. " RCE[50] ,Receive Channel Enable 50" "Disabled,Enabled"
|
|
bitfld.long 0x04 17. " RCE[49] ,Receive Channel Enable 49" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 16. " RCE[48] ,Receive Channel Enable 48" "Disabled,Enabled"
|
|
bitfld.long 0x04 15. " RCE[47] ,Receive Channel Enable 47" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " RCE[46] ,Receive Channel Enable 46" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 13. " RCE[45] ,Receive Channel Enable 45" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " RCE[44] ,Receive Channel Enable 44" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " RCE[43] ,Receive Channel Enable 43" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 10. " RCE[42] ,Receive Channel Enable 42" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " RCE[41] ,Receive Channel Enable 41" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " RCE[40] ,Receive Channel Enable 40" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " RCE[39] ,Receive Channel Enable 39" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " RCE[38] ,Receive Channel Enable 38" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " RCE[37] ,Receive Channel Enable 37" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 4. " RCE[36] ,Receive Channel Enable 36" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " RCE[35] ,Receive Channel Enable 35" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " RCE[34] ,Receive Channel Enable 34" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " RCE[33] ,Receive Channel Enable 33" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " RCE[32] ,Receive Channel Enable 32" "Disabled,Enabled"
|
|
line.long 0x08 "MSP_RCE2,Receive Channel Enable Register 2"
|
|
bitfld.long 0x08 31. " RCE[95] ,Receive Channel Enable 95" "Disabled,Enabled"
|
|
bitfld.long 0x08 30. " RCE[94] ,Receive Channel Enable 94" "Disabled,Enabled"
|
|
bitfld.long 0x08 29. " RCE[93] ,Receive Channel Enable 93" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 28. " RCE[92] ,Receive Channel Enable 92" "Disabled,Enabled"
|
|
bitfld.long 0x08 27. " RCE[91] ,Receive Channel Enable 91" "Disabled,Enabled"
|
|
bitfld.long 0x08 26. " RCE[90] ,Receive Channel Enable 90" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 25. " RCE[89] ,Receive Channel Enable 89" "Disabled,Enabled"
|
|
bitfld.long 0x08 24. " RCE[88] ,Receive Channel Enable 88" "Disabled,Enabled"
|
|
bitfld.long 0x08 23. " RCE[87] ,Receive Channel Enable 87" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 22. " RCE[86] ,Receive Channel Enable 86" "Disabled,Enabled"
|
|
bitfld.long 0x08 21. " RCE[85] ,Receive Channel Enable 85" "Disabled,Enabled"
|
|
bitfld.long 0x08 20. " RCE[84] ,Receive Channel Enable 84" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 19. " RCE[83] ,Receive Channel Enable 83" "Disabled,Enabled"
|
|
bitfld.long 0x08 18. " RCE[82] ,Receive Channel Enable 82" "Disabled,Enabled"
|
|
bitfld.long 0x08 17. " RCE[81] ,Receive Channel Enable 81" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 16. " RCE[80] ,Receive Channel Enable 80" "Disabled,Enabled"
|
|
bitfld.long 0x08 15. " RCE[79] ,Receive Channel Enable 79" "Disabled,Enabled"
|
|
bitfld.long 0x08 14. " RCE[78] ,Receive Channel Enable 78" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 13. " RCE[77] ,Receive Channel Enable 77" "Disabled,Enabled"
|
|
bitfld.long 0x08 12. " RCE[76] ,Receive Channel Enable 76" "Disabled,Enabled"
|
|
bitfld.long 0x08 11. " RCE[75] ,Receive Channel Enable 75" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 10. " RCE[74] ,Receive Channel Enable 74" "Disabled,Enabled"
|
|
bitfld.long 0x08 9. " RCE[73] ,Receive Channel Enable 73" "Disabled,Enabled"
|
|
bitfld.long 0x08 8. " RCE[72] ,Receive Channel Enable 72" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 7. " RCE[71] ,Receive Channel Enable 71" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " RCE[70] ,Receive Channel Enable 70" "Disabled,Enabled"
|
|
bitfld.long 0x08 5. " RCE[69] ,Receive Channel Enable 69" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 4. " RCE[68] ,Receive Channel Enable 68" "Disabled,Enabled"
|
|
bitfld.long 0x08 3. " RCE[67] ,Receive Channel Enable 67" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " RCE[66] ,Receive Channel Enable 66" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 1. " RCE[65] ,Receive Channel Enable 65" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " RCE[64] ,Receive Channel Enable 64" "Disabled,Enabled"
|
|
line.long 0x0c "MSP_RCE3,Receive Channel Enable Register 3"
|
|
bitfld.long 0x0c 31. " RCE[127] ,Receive Channel Enable 127" "Disabled,Enabled"
|
|
bitfld.long 0x0c 30. " RCE[126] ,Receive Channel Enable 126" "Disabled,Enabled"
|
|
bitfld.long 0x0c 29. " RCE[125] ,Receive Channel Enable 125" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 28. " RCE[124] ,Receive Channel Enable 124" "Disabled,Enabled"
|
|
bitfld.long 0x0c 27. " RCE[123] ,Receive Channel Enable 123" "Disabled,Enabled"
|
|
bitfld.long 0x0c 26. " RCE[122] ,Receive Channel Enable 122" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " RCE[121] ,Receive Channel Enable 121" "Disabled,Enabled"
|
|
bitfld.long 0x0c 24. " RCE[120] ,Receive Channel Enable 120" "Disabled,Enabled"
|
|
bitfld.long 0x0c 23. " RCE[119] ,Receive Channel Enable 119" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 22. " RCE[118] ,Receive Channel Enable 118" "Disabled,Enabled"
|
|
bitfld.long 0x0c 21. " RCE[117] ,Receive Channel Enable 117" "Disabled,Enabled"
|
|
bitfld.long 0x0c 20. " RCE[116] ,Receive Channel Enable 116" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " RCE[115] ,Receive Channel Enable 115" "Disabled,Enabled"
|
|
bitfld.long 0x0c 18. " RCE[114] ,Receive Channel Enable 114" "Disabled,Enabled"
|
|
bitfld.long 0x0c 17. " RCE[113] ,Receive Channel Enable 113" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 16. " RCE[112] ,Receive Channel Enable 112" "Disabled,Enabled"
|
|
bitfld.long 0x0c 15. " RCE[111] ,Receive Channel Enable 111" "Disabled,Enabled"
|
|
bitfld.long 0x0c 14. " RCE[110] ,Receive Channel Enable 110" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " RCE[109] ,Receive Channel Enable 109" "Disabled,Enabled"
|
|
bitfld.long 0x0c 12. " RCE[108] ,Receive Channel Enable 108" "Disabled,Enabled"
|
|
bitfld.long 0x0c 11. " RCE[107] ,Receive Channel Enable 107" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 10. " RCE[106] ,Receive Channel Enable 106" "Disabled,Enabled"
|
|
bitfld.long 0x0c 9. " RCE[105] ,Receive Channel Enable 105" "Disabled,Enabled"
|
|
bitfld.long 0x0c 8. " RCE[104] ,Receive Channel Enable 104" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " RCE[103] ,Receive Channel Enable 103" "Disabled,Enabled"
|
|
bitfld.long 0x0c 6. " RCE[102] ,Receive Channel Enable 102" "Disabled,Enabled"
|
|
bitfld.long 0x0c 5. " RCE[101] ,Receive Channel Enable 101" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 4. " RCE[100] ,Receive Channel Enable 100" "Disabled,Enabled"
|
|
bitfld.long 0x0c 3. " RCE[99] ,Receive Channel Enable 99" "Disabled,Enabled"
|
|
bitfld.long 0x0c 2. " RCE[98] ,Receive Channel Enable 98" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " RCE[97] ,Receive Channel Enable 97" "Disabled,Enabled"
|
|
bitfld.long 0x0c 0. " RCE[96] ,Receive Channel Enable 96" "Disabled,Enabled"
|
|
endif
|
|
sif ((cpu()=="STA2065")||(cpu()=="STA2165"))
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "MSP_IODLY,MSP Input/Output Delay Lines Control Register"
|
|
bitfld.long 0x00 24.--26. " SCKDLY ,MSPSCK delay line" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 20.--22. " RDXDLY ,MSPRDX delay line" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--18. " RFSDLY ,MSPRFS delay line" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " RCKDLY ,MSPRCK delay line" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--10. " TDXDLY ,MSPTDX delay line" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 4.--6. " TFSDLY ,MSPTFS delay line" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " TCKDLY ,MSPTCK delay line" "0,1,2,3,4,5,6,7"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "MSP_ITCR,MSP Test Control Register"
|
|
bitfld.long 0x00 1. " TESTFIFO ,FIFO test enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ITEN ,Integration test enable bit" "Normal,Enabled"
|
|
group.long 0x84++0x07
|
|
line.long 0x00 "MSP_ITIP,MSP Integration Test Input Register"
|
|
bitfld.long 0x00 7. " MTDMAC ,Transmit DMA clear input value" "Low,High"
|
|
bitfld.long 0x00 6. " MRDMAC ,Receive DMA clear input value" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " MSCKI ,MSPSCK input value" "Low,High"
|
|
bitfld.long 0x00 4. " MTCKI ,MSPTCK input value" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " MTFSI ,MSPTFS input value" "Low,High"
|
|
bitfld.long 0x00 2. " MRCKI ,MSPRCK input value" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " MRFSI ,MSPRFS input value" "Low,High"
|
|
bitfld.long 0x00 0. " MRXDI ,MSPRXD input value" "Low,High"
|
|
line.long 0x04 "MSP_ITOP,MSP Integration Test Output Register"
|
|
bitfld.long 0x04 22. " MTFOINTR ,MSPTFOINTR value" "0,1"
|
|
bitfld.long 0x04 21. " MRFOINTR ,MSPRFOINTR value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 20. " MTDMASREQ ,Transmit DMA single request value" "0,1"
|
|
bitfld.long 0x04 19. " MTDMABREQ ,Transmit DMA Burst Request value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 18. " MRDMASREQ ,Receive DMA Single Request value" "0,1"
|
|
bitfld.long 0x04 17. " MRDMABREQ ,Receive DMA Burst Request value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 16. " MINTR ,MSPINTR value" "0,1"
|
|
bitfld.long 0x04 15. " MTFSINTR ,MSPTFSINTR value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 14. " MTEINTR ,MSPTEINTR value" "0,1"
|
|
bitfld.long 0x04 13. " MTXINTR ,MSPTXINTR value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 12. " MRFSINTR ,MSPRFSINTR value" "0,1"
|
|
bitfld.long 0x04 11. " MREINTR ,MSPREINTR value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 10. " MRXINTR ,MSPRXINTR value" "0,1"
|
|
bitfld.long 0x04 9. " MTCKOEN ,MSPTCK output enable value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 8. " MTFSOEN ,MSPTFS output enable value" "0,1"
|
|
bitfld.long 0x04 7. " MRCKOEN ,MSPRCK output enable value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 6. " MRFSOEN ,MSPRFS output enable value" "0,1"
|
|
bitfld.long 0x04 5. " MTXDOEN ,MSPTXD output enable value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 4. " MTCKO ,MSPTCK output value" "0,1"
|
|
bitfld.long 0x04 3. " MTFSO ,MSPTFS output value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 2. " MRCKO ,MSPRCK output value" "0,1"
|
|
bitfld.long 0x04 1. " MRFSO ,MSPRFS output value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x04 0. " MTXDO ,MSPTXD output value" "0,1"
|
|
if (((d.l(asd:(0x101C0000+0x80)))&0x2)==0x2)
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "MSP_TSTDR,MSP Test Data Register"
|
|
else
|
|
hgroup.long 0x8C++0x03
|
|
hide.long 0x00 "MSP_TSTDR,MSP Test Data Register"
|
|
endif
|
|
endif
|
|
width 14.
|
|
rgroup.long 0xfe0++0x01f
|
|
line.long 0x00 "MSPPERIPHID0,MSP Peripheral Identification Register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PN0 ,Part Number 0 (0x21)"
|
|
line.long 0x04 "MSPPERIPHID1,MSP Peripheral Identification Register 1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " D0 ,Designer 0 (0x00)"
|
|
hexmask.long.byte 0x04 0.--3. 1. " PN1 ,Part Number 1 (0x00)"
|
|
line.long 0x08 "MSPPERIPHID2,MSP Peripheral Identification Register 2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " REV ,Revision (0x02)"
|
|
hexmask.long.byte 0x08 0.--3. 1. " D1 ,Designer 1 (0x08)"
|
|
line.long 0x0c "MSPPERIPHID3,MSP Peripheral Identification Register 3"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " CONF ,Configuration (0x00)"
|
|
line.long 0x10 "MSPPCELLID0,MSP PCell Identification Register 0"
|
|
hexmask.long.byte 0x10 0.--7. 1. " MSPPCELLID0 ,MSP PCell ID0 (0x0D)"
|
|
line.long 0x14 "MSPPCELLID1,MSP PCell Identification Register 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " MSPPCELLID1 ,MSP PCell ID1 (0xF0)"
|
|
line.long 0x18 "MSPPCELLID2,MSP PCell Identification Register 2"
|
|
hexmask.long.byte 0x18 0.--7. 1. " MSPPCELLID2 ,MSP PCell ID2 (0x05)"
|
|
line.long 0x1c "MSPPCELLID3,MSP PCell Identification Register 3"
|
|
hexmask.long.byte 0x1c 0.--7. 1. " MSPPCELLID3 ,MSP PCell ID3 (0xB1)"
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree.open "SSP (Synchronous Serial Port)"
|
|
tree "SSP 0"
|
|
base asd:0x101FC000
|
|
width 14.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "SSP_CR0,SSP 0 control register 0"
|
|
bitfld.long 0x00 21.--22. " FRF ,Frame format" "Motorola SPI,TI synchronous serial,National MicroWire,Unidirectional"
|
|
bitfld.long 0x00 16.--20. " CSS ,Command size select" "Reserved,Reserved,Reserved,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit,17-bit,18-bit,19-bit,20-bit,21-bit,22-bit,23-bit,24-bit,25-bit,26-bit,27-bit,28-bit,29-bit,30-bit,31-bit,32-bit"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " SCR ,Serial clock rate"
|
|
bitfld.long 0x00 7. " SPH ,Motorola SPI clock phase" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 6. " SPO ,SSPCLK clock polarity" "Low,High"
|
|
bitfld.long 0x00 5. " HALFDUP ,Half-duplex mode" "Full-duplex,Half-duplex"
|
|
textline " "
|
|
bitfld.long 0x00 0.--4. " DSS ,Data size select" "Reserved,Reserved,Reserved,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit,17-bit,18-bit,19-bit,20-bit,21-bit,22-bit,23-bit,24-bit,25-bit,26-bit,27-bit,28-bit,29-bit,30-bit,31-bit,32-bit"
|
|
if (((data.long(asd:0x101FC000+0x04))&0x04)==0x04)
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "SSP_CR1,SSP 0 control register 1"
|
|
bitfld.long 0x00 10.--12. " TXIFLSEL ,Transmit interrupt FIFO level select" ">=1/32 empty,>=1/8 empty,>=1/4 empty,>=1/2 empty,?..."
|
|
bitfld.long 0x00 7.--9. " RXIFLSEL ,Receive interrupt FIFO level select" ">=1/32 full,>=1/8 full,>=1/4 full,>=1/2 full,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6. " MWAIT ,Microwire wait state bit enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " TENDN ,Transmit EndianFormat" "MSB,LSB"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RENDN ,Receive Endian Format" "MSB,LSB"
|
|
bitfld.long 0x00 3. " SOD ,Slave-mode output disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 2. " MS ,Master or slave mode select" "Master,Slave"
|
|
bitfld.long 0x00 1. " SSE ,SSP enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LBM ,Loop back mode" "Disabled,Enabled"
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "SSP_CR1,SSP 0 control register 1"
|
|
bitfld.long 0x00 10.--12. " TXIFLSEL ,Transmit interrupt FIFO level select" ">=1/32 empty,>=1/8 empty,>=1/4 empty,>=1/2 empty,?..."
|
|
bitfld.long 0x00 7.--9. " RXIFLSEL ,Receive interrupt FIFO level select" ">=1/32 full,>=1/8 full,>=1/4 full,>=1/2 full,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6. " MWAIT ,Microwire wait state bit enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " TENDN ,Transmit EndianFormat" "MSB,LSB"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RENDN ,Receive Endian Format" "MSB,LSB"
|
|
textline " "
|
|
bitfld.long 0x00 2. " MS ,Master or slave mode select" "Master,Slave"
|
|
bitfld.long 0x00 1. " SSE ,SSP enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LBM ,Loop back mode" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SSP_DR,SSP 0 data register"
|
|
width 14.
|
|
rgroup.long 0x0c++0x03
|
|
line.long 0x00 "SSP_SR,SSP 0 status register"
|
|
bitfld.long 0x00 4. " BSY ,SSP busy flag" "Idle,Busy"
|
|
bitfld.long 0x00 3. " RFF ,Receive FIFO full" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RNE ,Receive FIFO not empty" "Empty,Not empty"
|
|
bitfld.long 0x00 1. " TNF ,Transmit FIFO not full" "Full,Not full"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TFE ,Transmit FIFO empty" "Not empty,Empty"
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "SSP_CPSR,SSP 0 clock prescale register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPSDVSR ,Clock prescale divisor"
|
|
line.long 0x04 "SSP_IMSC,SSP 0 interrupt mask set/clear register"
|
|
bitfld.long 0x04 3. " TXIM ,Transmit interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x04 2. " RXIM ,Receive interrupt mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 1. " RTIM ,Receive time out interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x04 0. " RORIM ,Receive overrun interrupt mask" "Masked,Not masked"
|
|
rgroup.long 0x18++0x07
|
|
line.long 0x00 "SSP_RIS,SSP 0 raw interrupt status register"
|
|
bitfld.long 0x00 3. " TXRIS ,Transmit raw interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " RXRIS ,Receive raw interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RTRIS ,Receive timeout raw interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " RORRIS ,Receive overrun raw interrupt status" "No interrupt,Interrupt"
|
|
line.long 0x04 "SSP_MIS,SSP 0 masked interrupt status register"
|
|
bitfld.long 0x04 3. " TXMIS ,Transmit masked interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 2. " RXMIS ,Receive masked interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 1. " RTMIS ,Receive time out masked interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 0. " RORMIS ,Receive overrun masked interrupt status" "No interrupt,Interrupt"
|
|
wgroup.long 0x20++0x03
|
|
line.long 0x00 "SSP_ICR,SSP 0 interrupt clear register"
|
|
bitfld.long 0x00 1. " RTIC ,Receive time out clear interrupt bit" "Not clear,Clear"
|
|
bitfld.long 0x00 0. " RORIC ,Receive overrun raw clear interrupt bit" "Not clear,Clear"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "SSP_DMACR,SSP 0 DMA control register"
|
|
bitfld.long 0x00 1. " TXDMAE ,Transmit DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RXDMAE ,Receive DMA enable" "Disabled,Enabled"
|
|
width 14.
|
|
rgroup.long 0xfe0++0x1f
|
|
line.long 0x00 "SSPPERIPHID0,SSP 0 peripheral identification register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PARTNUMBER0 ,Part Number 0"
|
|
line.long 0x04 "SSPPERIPHID1,SSP 0 peripheral identification register 1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " DESIGNER0 ,Designer 0"
|
|
hexmask.long.byte 0x04 0.--3. 1. " PARTNUMBER1 ,Part Number 1"
|
|
line.long 0x08 "SSPPERIPHID2,SSP 0 peripheral identification register 2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " REVISION ,Revision"
|
|
hexmask.long.byte 0x08 0.--3. 1. " DESIGNER1 ,Designer 1"
|
|
line.long 0x0c "SSPPERIPHID3,SSP 0 peripheral identification register 3"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " CONFIGURATION ,Configuration"
|
|
line.long 0x10 "SSPPCELLID0,SSP 0 PCell identification register 0"
|
|
hexmask.long.byte 0x10 0.--7. 1. " SSPPCELLID0 ,SSP PCell ID 0"
|
|
line.long 0x14 "SSPPCELLID1,SSP 0 PCell identification register 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " SSPPCELLID1 ,SSP PCell ID 1"
|
|
line.long 0x18 "SSPPCELLID2,SSP 0 PCell identification register 2"
|
|
hexmask.long.byte 0x18 0.--7. 1. " SSPPCELLID2 ,SSP PCell ID 2"
|
|
line.long 0x1c "SSPPCELLID3,SSP 0 PCell identification register 3"
|
|
hexmask.long.byte 0x1c 0.--7. 1. " SSPPCELLID3 ,SSP PCell ID 3"
|
|
width 0xb
|
|
tree.end
|
|
tree "SSP 1"
|
|
base asd:0x101F4000
|
|
width 14.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "SSP_CR0,SSP 1 control register 0"
|
|
bitfld.long 0x00 21.--22. " FRF ,Frame format" "Motorola SPI,TI synchronous serial,National MicroWire,Unidirectional"
|
|
bitfld.long 0x00 16.--20. " CSS ,Command size select" "Reserved,Reserved,Reserved,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit,17-bit,18-bit,19-bit,20-bit,21-bit,22-bit,23-bit,24-bit,25-bit,26-bit,27-bit,28-bit,29-bit,30-bit,31-bit,32-bit"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " SCR ,Serial clock rate"
|
|
bitfld.long 0x00 7. " SPH ,Motorola SPI clock phase" "Rising,Falling"
|
|
textline " "
|
|
bitfld.long 0x00 6. " SPO ,SSPCLK clock polarity" "Low,High"
|
|
bitfld.long 0x00 5. " HALFDUP ,Half-duplex mode" "Full-duplex,Half-duplex"
|
|
textline " "
|
|
bitfld.long 0x00 0.--4. " DSS ,Data size select" "Reserved,Reserved,Reserved,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit,17-bit,18-bit,19-bit,20-bit,21-bit,22-bit,23-bit,24-bit,25-bit,26-bit,27-bit,28-bit,29-bit,30-bit,31-bit,32-bit"
|
|
if (((data.long(asd:0x101F4000+0x04))&0x04)==0x04)
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "SSP_CR1,SSP 1 control register 1"
|
|
bitfld.long 0x00 10.--12. " TXIFLSEL ,Transmit interrupt FIFO level select" ">=1/32 empty,>=1/8 empty,>=1/4 empty,>=1/2 empty,?..."
|
|
bitfld.long 0x00 7.--9. " RXIFLSEL ,Receive interrupt FIFO level select" ">=1/32 full,>=1/8 full,>=1/4 full,>=1/2 full,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6. " MWAIT ,Microwire wait state bit enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " TENDN ,Transmit EndianFormat" "MSB,LSB"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RENDN ,Receive Endian Format" "MSB,LSB"
|
|
bitfld.long 0x00 3. " SOD ,Slave-mode output disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 2. " MS ,Master or slave mode select" "Master,Slave"
|
|
bitfld.long 0x00 1. " SSE ,SSP enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LBM ,Loop back mode" "Disabled,Enabled"
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "SSP_CR1,SSP 1 control register 1"
|
|
bitfld.long 0x00 10.--12. " TXIFLSEL ,Transmit interrupt FIFO level select" ">=1/32 empty,>=1/8 empty,>=1/4 empty,>=1/2 empty,?..."
|
|
bitfld.long 0x00 7.--9. " RXIFLSEL ,Receive interrupt FIFO level select" ">=1/32 full,>=1/8 full,>=1/4 full,>=1/2 full,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6. " MWAIT ,Microwire wait state bit enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " TENDN ,Transmit EndianFormat" "MSB,LSB"
|
|
textline " "
|
|
bitfld.long 0x00 4. " RENDN ,Receive Endian Format" "MSB,LSB"
|
|
textline " "
|
|
bitfld.long 0x00 2. " MS ,Master or slave mode select" "Master,Slave"
|
|
bitfld.long 0x00 1. " SSE ,SSP enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LBM ,Loop back mode" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SSP_DR,SSP 1 data register"
|
|
width 14.
|
|
rgroup.long 0x0c++0x03
|
|
line.long 0x00 "SSP_SR,SSP 1 status register"
|
|
bitfld.long 0x00 4. " BSY ,SSP busy flag" "Idle,Busy"
|
|
bitfld.long 0x00 3. " RFF ,Receive FIFO full" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RNE ,Receive FIFO not empty" "Empty,Not empty"
|
|
bitfld.long 0x00 1. " TNF ,Transmit FIFO not full" "Full,Not full"
|
|
textline " "
|
|
bitfld.long 0x00 0. " TFE ,Transmit FIFO empty" "Not empty,Empty"
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "SSP_CPSR,SSP 1 clock prescale register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPSDVSR ,Clock prescale divisor"
|
|
line.long 0x04 "SSP_IMSC,SSP 1 interrupt mask set/clear register"
|
|
bitfld.long 0x04 3. " TXIM ,Transmit interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x04 2. " RXIM ,Receive interrupt mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 1. " RTIM ,Receive time out interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x04 0. " RORIM ,Receive overrun interrupt mask" "Masked,Not masked"
|
|
rgroup.long 0x18++0x07
|
|
line.long 0x00 "SSP_RIS,SSP 1 raw interrupt status register"
|
|
bitfld.long 0x00 3. " TXRIS ,Transmit raw interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " RXRIS ,Receive raw interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RTRIS ,Receive timeout raw interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " RORRIS ,Receive overrun raw interrupt status" "No interrupt,Interrupt"
|
|
line.long 0x04 "SSP_MIS,SSP 1 masked interrupt status register"
|
|
bitfld.long 0x04 3. " TXMIS ,Transmit masked interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 2. " RXMIS ,Receive masked interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x04 1. " RTMIS ,Receive time out masked interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x04 0. " RORMIS ,Receive overrun masked interrupt status" "No interrupt,Interrupt"
|
|
wgroup.long 0x20++0x03
|
|
line.long 0x00 "SSP_ICR,SSP 1 interrupt clear register"
|
|
bitfld.long 0x00 1. " RTIC ,Receive time out clear interrupt bit" "Not clear,Clear"
|
|
bitfld.long 0x00 0. " RORIC ,Receive overrun raw clear interrupt bit" "Not clear,Clear"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "SSP_DMACR,SSP 1 DMA control register"
|
|
bitfld.long 0x00 1. " TXDMAE ,Transmit DMA enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RXDMAE ,Receive DMA enable" "Disabled,Enabled"
|
|
width 14.
|
|
rgroup.long 0xfe0++0x1f
|
|
line.long 0x00 "SSPPERIPHID0,SSP 1 peripheral identification register 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PARTNUMBER0 ,Part Number 0"
|
|
line.long 0x04 "SSPPERIPHID1,SSP 1 peripheral identification register 1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " DESIGNER0 ,Designer 0"
|
|
hexmask.long.byte 0x04 0.--3. 1. " PARTNUMBER1 ,Part Number 1"
|
|
line.long 0x08 "SSPPERIPHID2,SSP 1 peripheral identification register 2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " REVISION ,Revision"
|
|
hexmask.long.byte 0x08 0.--3. 1. " DESIGNER1 ,Designer 1"
|
|
line.long 0x0c "SSPPERIPHID3,SSP 1 peripheral identification register 3"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " CONFIGURATION ,Configuration"
|
|
line.long 0x10 "SSPPCELLID0,SSP 1 PCell identification register 0"
|
|
hexmask.long.byte 0x10 0.--7. 1. " SSPPCELLID0 ,SSP PCell ID 0"
|
|
line.long 0x14 "SSPPCELLID1,SSP 1 PCell identification register 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " SSPPCELLID1 ,SSP PCell ID 1"
|
|
line.long 0x18 "SSPPCELLID2,SSP 1 PCell identification register 2"
|
|
hexmask.long.byte 0x18 0.--7. 1. " SSPPCELLID2 ,SSP PCell ID 2"
|
|
line.long 0x1c "SSPPCELLID3,SSP 1 PCell identification register 3"
|
|
hexmask.long.byte 0x1c 0.--7. 1. " SSPPCELLID3 ,SSP PCell ID 3"
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree "SPDIF (Sony/Philips Digital Interface)"
|
|
base asd:0x10185000
|
|
width 17.
|
|
rgroup.long 0x00++0x07
|
|
line.long 0x00 "SPDIF_OUT,SPDIF OUT Register"
|
|
bitfld.long 0x00 19. " ACK_FROM_SPDIF ,ACKNOWLEDGEMENT from SPDIF" "Not acknowledged,Acknowledged"
|
|
textline " "
|
|
bitfld.long 0x00 18. " EF_FRAME_CLOCK ,EFM FRAME Synchro Clock" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 17. " EFM_SUBCODE_SYNCHRO ,Frame Synchronization Clock" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " C2_FLAG ,C2 Flag" "Low,High"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " EFM_SUBCODE_DATA ,EFM SUBCODE DATA"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CD_RAW_DATA ,CD Data"
|
|
line.long 0x04 "SPDIF_OUT,SPDIF Rx OUT Register"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SPDIF_CTRL_STAT,SPDIF Control and Status Register"
|
|
sif ((cpu()=="STA2065")||(cpu()=="STA2165"))
|
|
bitfld.long 0x00 24. " CNTL_SPDIF_LR_DATA ,Control SPDIF left/right data" "Left/right,Stereo"
|
|
textline " "
|
|
endif
|
|
eventfld.long 0x00 23. " SPDIF_UNLOCK_FLAG ,SPDIF UNLOCK FLAG" "Locked,Unlocked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " SPDIF_SOFT_RESETn ,External reset from S/W" "Reset,No reset"
|
|
textline " "
|
|
bitfld.long 0x00 13. " NO_SUBCODE ,No Sub code" "No effect,0"
|
|
textline " "
|
|
bitfld.long 0x00 12. " EFM_SUBCODE_SYNCRO ,EFM SUBCODE SYNCRO" "W V U T S R Q P,P Q R S T U V W"
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " DATA_MODE ,DATA MODE" "DATA recorded,MS Bit Swapped,?..."
|
|
textline " "
|
|
eventfld.long 0x00 8. " SPDIF_RX_LOCK ,SPDIF Rx lock" "Not locked,Locked"
|
|
textline " "
|
|
eventfld.long 0x00 7. " BLOCK_BOUNDARY_LOCK ,Block Boundary receive" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x00 6. " SUBCOD_FIFO_EMPTY_STATUS ,SPDIF SUBCODE FIFO Empty Flag" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SUBCOD_FIFO_OVERFLOW_STATUS ,SPDIF SUBCODE FIFO OVERFLOW Flag" "No overflow,Overflow"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SUBCODE_FIFO_FULL_FLAG ,SPDIF SUBCODE FIFO Full Flag" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DATA_FIFO_EMPTY_FLAG ,SPDIF DATA FIFO Empty Flag" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 2. " DATA_FIFO_OVERFLOW_FLAG ,SPDIF DATA FIFO OVERFLOW Flag" "No overflow,Overflow"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DATA_FIFO_FULL_FLAG ,SPDIF DATA FIFO Full Flag" "Not full,Full"
|
|
textline " "
|
|
eventfld.long 0x00 0. " SPDIF_INT_STATUS ,Status of SPDIF Rx data interrupt" "No interrupt,Interrupt"
|
|
hgroup.long 0x0c++0x03
|
|
hide.long 0x00 "SPDIF_RAW_DATA,SPDIF Rx RAW DATA"
|
|
in
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "SPDIF_MASK,SPDIF MASK Register"
|
|
bitfld.long 0x00 9. " SPDIF_UNLOCK_FLAG ,Enables the interrupt when SPDIF UNLOCKs" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SPDIF_LOCK_FLAG ,Enables the SPDIF LOCK and UNLOCK conditions" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " BLOCK_BOUNDARY_LOCK_MASK ,Enables the interrupt when block boundary is received" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " SUBCOD_FIFO_OVERFLOW_FLAG_MASK ,Enables SPDIF SUBCODE FIFO OVERFLOW interrupt" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SUBCODE_FIFO_EMPTY_FLAG_MASK ,Enables SPDIF SUBCODE FIFO Empty interrupt" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SUBCODE_FIFO_FULL_FLAG_MASK ,Enables SPDIF SUBCODE FIFO Full interrupt" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DATA_FIFO_EMPTY_FLAG_MASK ,Enables SPDIF DATA FIFO Empty interrupt" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " DATA_FIFO_OVERFLOW_FLAG_MASK ,Enables SPDIF DATA FIFO Overflow interrupt" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DATA_FIFO_FULL_FLAG_MASK ,Enables SPDIF DATA FIFO Full interrupt" "Masked,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SPDIF_RX_INT_MASK ,Enables SPDIF RX Interrupt" "Masked,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
tree "AC97"
|
|
base asd:0x101CD000
|
|
width 18.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CORE_STATUS,AC97 Core Status Register"
|
|
bitfld.long 0x00 31. " AC_LINK_RESET_STATUS ,AC-link reset status" "No reset,Reset"
|
|
bitfld.long 0x00 30. " AC_LINK_SUS_STATUS ,AC-link suspended status" "Suspended,Active"
|
|
textline " "
|
|
bitfld.long 0x00 29. " AC_LINK_RESUME ,AC-link resume" "Not resumed,Resumed"
|
|
bitfld.long 0x00 28. " AC97_CODEC_ACTIVE ,AC97 CODEC active status" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 27. " AHB_MASTER_DMA_EN ,AHB master DMA enable" "Disabled,Enabled"
|
|
wgroup.long 0x04++0x07
|
|
line.long 0x00 "CODEC_READ,CODEC Register Access Read Request"
|
|
hexmask.long.byte 0x00 0.--6. 1. " CODEC_REG_ADDR ,CODEC Register address"
|
|
line.long 0x04 "CODEC_WRITE,CODEC Register Access Write Request"
|
|
hexmask.long.word 0x04 16.--31. 1. " CODEC_REG_DATA ,CODEC Register data"
|
|
hexmask.long.byte 0x04 0.--6. 1. " CODEC_REG_ADDR ,CODEC Register address"
|
|
group.long 0x0C++0x23
|
|
line.long 0x00 "CODEC_STATUS,CODEC Access Status, Data and Address Register"
|
|
bitfld.long 0x00 31. " REG_RD_WR_IN_PROGRESS ,CODEC register read or write in progress" "Ready,Pending"
|
|
bitfld.long 0x00 30. " CODEC_REG_DATA_RDY ,CODEC register read data ready" "Not ready,Ready"
|
|
textline " "
|
|
hexmask.long.byte 0x00 16.--22. 1. " CODEC_REG_ADDR_ECHO ,CODEC register address echo"
|
|
hexmask.long.word 0x00 0.--15. 1. " CODEC_REG_DATA ,CODEC Register data"
|
|
line.long 0x04 "INT_MASK,Interrupt Mask Register"
|
|
bitfld.long 0x04 27. " PCM_IN_MIC ,PCM In Microphone (slot 6)" "Disabled,Enabled"
|
|
bitfld.long 0x04 26. " PCM_IN_RT ,PCM In Right (slot 4)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 25. " PCM_IN_LFT ,PCM In Left (slot 3)" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " PCM_OUT_DBRATE_AUDIO_CTR ,PCM Out Double Rate Audio Center n+1 (slot 12)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " PCM_OUT_DBRATE_AUDIO_RT ,PCM Out Double Rate Audio Right n+1 (slot 11)" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " PCM_OUT_DBRATE_AUDIO_LFT ,PCM Out Double Rate Audio Left n+1 (slot 10)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 21. " PCM_OUT_LFE ,PCM Out LFE (slot 9)" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PCM_OUT_SRND_RT ,PCM Out Surround Right (slot 8)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " PCM_OUT_SRND_LFT ,PCM Out Surround Left (slot 7)" "Disabled,Enabled"
|
|
bitfld.long 0x04 18. " PCM_OUT_CTR ,PCM Out Center (slot 6)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 17. " PCM_OUT_RT ,PCM Out Right (slot 4)" "Disabled,Enabled"
|
|
bitfld.long 0x04 16. " PCM_OUT_LFT ,PCM Out Left (slot 3)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 11. " PCM_IN_MIC ,PCM In Microphone (slot 6)" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " PCM_IN_RT ,PCM In Right (slot 4)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 9. " PCM_IN_LFT ,PCM In Left (slot 3)" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " PCM_OUT_DBRATE_AUDIO_CTR ,PCM Out Double Rate Audio Center n+1 (slot 12)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " PCM_OUT_DBRATE_AUDIO_RT ,PCM Out Double Rate Audio Right n+1 (slot 11)" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " PCM_OUT_DBRATE_AUDIO_LFT ,PCM Out Double Rate Audio Left n+1 (slot 10)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 5. " PCM_OUT_LFE ,PCM Out LFE (slot 9)" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " PCM_OUT_SRND_RT ,PCM Out Surround Right (slot 8)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " PCM_OUT_SRND_LFT ,PCM Out Surround Left (slot 7)" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " PCM_OUT_CTR ,PCM Out Center (slot 6)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " PCM_OUT_RT ,PCM Out Right (slot 4)" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " PCM_OUT_LFT ,PCM Out Left (slot 3)" "Disabled,Enabled"
|
|
line.long 0x08 "INT_SOURCE,Interrupt Source/Clear Register"
|
|
bitfld.long 0x08 31. " MASTER_BUSS_ACCESS_ERROR ,Master Buss Access Error" "Disabled,Enabled"
|
|
bitfld.long 0x08 27. " WRAP_PCM_IN_MIC ,Wrap PCM In Microphone (slot 6)" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 26. " WRAP_PCM_IN_RT ,Wrap PCM In Right (slot 4)" "No effect,Cleared"
|
|
bitfld.long 0x08 25. " WRAP_PCM_IN_LFT ,Wrap PCM In Left (slot 3)" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 24. " WRAP_PCM_OUT_DBRATE_AUDIO_CTR ,Wrap PCM Out Double Rate Audio Center n+1 (slot 12)" "No effect,Cleared"
|
|
bitfld.long 0x08 23. " WRAP_PCM_OUT_DBRATE_AUDIO_RT ,Wrap PCM Out Double Rate Audio Right n+1 (slot 11)" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 22. " WRAP_PCM_OUT_DBRATE_AUDIO_LFT ,Wrap PCM Out Double Rate Audio Left n+1 (slot 10)" "No effect,Cleared"
|
|
bitfld.long 0x08 21. " WRAP_PCM_OUT_LFE ,Wrap PCM Out LFE (slot 9)" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 20. " WRAP_PCM_OUT_SRND_RT ,Wrap PCM Out Surround Right (slot 8)" "No effect,Cleared"
|
|
bitfld.long 0x08 19. " WRAP_PCM_OUT_SRND_LFT ,Wrap PCM Out Surround Left (slot 7)" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 18. " WRAP_PCM_OUT_CTR ,Wrap PCM Out Center (slot 6)" "No effect,Cleared"
|
|
bitfld.long 0x08 17. " WRAP_PCM_OUT_RT ,Wrap PCM Out Right (slot 4)" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 16. " WRAP_PCM_OUT_LFT ,Wrap PCM Out Left (slot 3)" "No effect,Cleared"
|
|
bitfld.long 0x08 11. " OFFSET_PCM_IN_MIC ,Offset PCM In Microphone (slot 6)" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 10. " OFFSET_PCM_IN_RT ,Offset PCM In Right (slot 4)" "No effect,Cleared"
|
|
bitfld.long 0x08 9. " OFFSET_PCM_IN_LFT ,Offset PCM In Left (slot 3)" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 8. " OFFSET_PCM_OUT_DBRATE_AUDIO_CTR ,Offset PCM Out Double Rate Audio Center n+1 (slot 12)" "No effect,Cleared"
|
|
bitfld.long 0x08 7. " OFFSET_PCM_OUT_DBRATE_AUDIO_RT ,Offset PCM Out Double Rate Audio Right n+1 (slot 11)" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 6. " OFFSET_PCM_OUT_DBRATE_AUDIO_LFT ,Offset PCM Out Double Rate Audio Left n+1 (slot 10)" "No effect,Cleared"
|
|
bitfld.long 0x08 5. " OFFSET_PCM_OUT_LFE ,Offset PCM Out LFE (slot 9)" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 4. " OFFSET_PCM_OUT_SRND_RT ,Offset PCM Out Surround Right (slot 8)" "No effect,Cleared"
|
|
bitfld.long 0x08 3. " OFFSET_PCM_OUT_SRND_LFT ,Offset PCM Out Surround Left (slot 7)" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 2. " OFFSET_PCM_OUT_CTR ,Offset PCM Out Center (slot 6)" "No effect,Cleared"
|
|
bitfld.long 0x08 1. " OFFSET_PCM_OUT_RT ,Offset PCM Out Right (slot 4)" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x08 0. " OFFSET_PCM_OUT_LFT ,Offset PCM Out Left (slot 3)" "No effect,Cleared"
|
|
line.long 0x0C "INT_DMA_MASK,Interrupt DMA Mask Register"
|
|
bitfld.long 0x0C 11. " PCM_IN_MIC ,PCM In Microphone (slot 6)" "Not masked,Masked"
|
|
bitfld.long 0x0C 10. " PCM_IN_RT ,PCM In Right (slot 4)" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x0C 9. " PCM_IN_LFT ,PCM In Left (slot 3)" "Not masked,Masked"
|
|
bitfld.long 0x0C 8. " PCM_OUT_DBRATE_AUDIO_CTR ,PCM Out Double Rate Audio Center n+1 (slot 12)" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " PCM_OUT_DBRATE_AUDIO_RT ,PCM Out Double Rate Audio Right n+1 (slot 11)" "Not masked,Masked"
|
|
bitfld.long 0x0C 6. " PCM_OUT_DBRATE_AUDIO_LFT ,PCM Out Double Rate Audio Left n+1 (slot 10)" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x0C 5. " PCM_OUT_LFE ,PCM Out LFE (slot 9)" "Not masked,Masked"
|
|
bitfld.long 0x0C 4. " PCM_OUT_SRND_RT ,PCM Out Surround Right (slot 8)" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x0C 3. " PCM_OUT_SRND_LFT ,PCM Out Surround Left (slot 7)" "Not masked,Masked"
|
|
bitfld.long 0x0C 2. " PCM_OUT_CTR ,PCM Out Center (slot 6)" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " PCM_OUT_RT ,PCM Out Right (slot 4)" "Not masked,Masked"
|
|
bitfld.long 0x0C 0. " PCM_OUT_LFT ,PCM Out Left (slot 3)" "Not masked,Masked"
|
|
line.long 0x10 "INT_DMA_TRIGGER,Interrupt DMA Trigger Register"
|
|
bitfld.long 0x10 11. " PCM_IN_MIC ,PCM In Microphone (slot 6)" "Not triggered,Triggered"
|
|
bitfld.long 0x10 10. " PCM_IN_RT ,PCM In Right (slot 4)" "Not triggered,Triggered"
|
|
textline " "
|
|
bitfld.long 0x10 9. " PCM_IN_LFT ,PCM In Left (slot 3)" "Not triggered,Triggered"
|
|
bitfld.long 0x10 8. " PCM_OUT_DBRATE_AUDIO_CTR ,PCM Out Double Rate Audio Center n+1 (slot 12)" "Not triggered,Triggered"
|
|
textline " "
|
|
bitfld.long 0x10 7. " PCM_OUT_DBRATE_AUDIO_RT ,PCM Out Double Rate Audio Right n+1 (slot 11)" "Not triggered,Triggered"
|
|
bitfld.long 0x10 6. " PCM_OUT_DBRATE_AUDIO_LFT ,PCM Out Double Rate Audio Left n+1 (slot 10)" "Not triggered,Triggered"
|
|
textline " "
|
|
bitfld.long 0x10 5. " PCM_OUT_LFE ,PCM Out LFE (slot 9)" "Not triggered,Triggered"
|
|
bitfld.long 0x10 4. " PCM_OUT_SRND_RT ,PCM Out Surround Right (slot 8)" "Not triggered,Triggered"
|
|
textline " "
|
|
bitfld.long 0x10 3. " PCM_OUT_SRND_LFT ,PCM Out Surround Left (slot 7)" "Not triggered,Triggered"
|
|
bitfld.long 0x10 2. " PCM_OUT_CTR ,PCM Out Center (slot 6)" "Not triggered,Triggered"
|
|
textline " "
|
|
bitfld.long 0x10 1. " PCM_OUT_RT ,PCM Out Right (slot 4)" "Not triggered,Triggered"
|
|
bitfld.long 0x10 0. " PCM_OUT_LFT ,PCM Out Left (slot 3)" "Not triggered,Triggered"
|
|
line.long 0x14 "AUDIO_ENABLE,Output/Input Audio Channel Enable Register"
|
|
bitfld.long 0x14 11. " PCM_IN_MIC ,PCM In Microphone (slot 6)" "Disabled,Enabled"
|
|
bitfld.long 0x14 10. " PCM_IN_RT ,PCM In Right (slot 4)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 9. " PCM_IN_LFT ,PCM In Left (slot 3)" "Disabled,Enabled"
|
|
bitfld.long 0x14 8. " PCM_OUT_DBRATE_AUDIO_CTR ,PCM Out Double Rate Audio Center n+1 (slot 12)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 7. " PCM_OUT_DBRATE_AUDIO_RT ,PCM Out Double Rate Audio Right n+1 (slot 11)" "Disabled,Enabled"
|
|
bitfld.long 0x14 6. " PCM_OUT_DBRATE_AUDIO_LFT ,PCM Out Double Rate Audio Left n+1 (slot 10)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 5. " PCM_OUT_LFE ,PCM Out LFE (slot 9)" "Disabled,Enabled"
|
|
bitfld.long 0x14 4. " PCM_OUT_SRND_RT ,PCM Out Surround Right (slot 8)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 3. " PCM_OUT_SRND_LFT ,PCM Out Surround Left (slot 7)" "Disabled,Enabled"
|
|
bitfld.long 0x14 2. " PCM_OUT_CTR ,PCM Out Center (slot 6)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 1. " PCM_OUT_RT ,PCM Out Right (slot 4)" "Disabled,Enabled"
|
|
bitfld.long 0x14 0. " PCM_OUT_LFT ,PCM Out Left (slot 3)" "Disabled,Enabled"
|
|
line.long 0x18 "COLD_CNT,Cold Counter Register"
|
|
hexmask.long.byte 0x18 0.--7. 1. " CRC ,Cold reset counter"
|
|
line.long 0x1C "WARM_CNT,Warm Counter Register"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " WRC ,Warm reset counter"
|
|
line.long 0x20 "SUSPEND_CNT,Suspend Counter Register"
|
|
hexmask.long.byte 0x20 0.--7. 1. " SDC ,Suspend detect counter"
|
|
rgroup.long 0x30++0x03
|
|
line.long 0x00 "REV_READ,Revision Read Register"
|
|
width 11.
|
|
tree.end
|
|
tree.open "CAN (Controller Area Network)"
|
|
sif ((cpu()=="STA2065")||(cpu()=="STA2165"))
|
|
tree "CAN 0"
|
|
base asd:0x10183000
|
|
width 10.
|
|
tree "Protocol Related Registers"
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "CAN_CR,CAN Control Register"
|
|
bitfld.word 0x00 7. " TEST ,Test Mode Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " CCE ,Configuration Change Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " DAR ,Disable Automatic Re-transmission" "No,Yes"
|
|
bitfld.word 0x00 3. " EIE ,Error Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " SIE ,Status Chaneg Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " IE ,Module Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " INIT ,Initializaion" "Normal,Initialization"
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "CAN_SR,Status Register"
|
|
bitfld.word 0x00 7. " BOFF ,Busoff Status" "No busoff,Busoff"
|
|
bitfld.word 0x00 6. " EWARN ,Warning Status" "No warning,Warning"
|
|
bitfld.word 0x00 5. " EPASS ,Error Passive" "Active,Passive"
|
|
textline " "
|
|
bitfld.word 0x00 4. " RXOK ,Received a Message Successfully" "Not received,Received"
|
|
bitfld.word 0x00 3. " TXOK ,Transmitted a Message Successfully" "Not transmitted,Transmitted"
|
|
bitfld.word 0x00 0.--2. " LEC ,Last Error Code" "No error,Stuff Error,Form error,AckError,Bit1Error,Bit0Error,CRCError,Unused"
|
|
rgroup.word 0x08++0x1
|
|
line.word 0x00 "CAN_ERR,Error Counter"
|
|
bitfld.word 0x00 15. " RP ,Receive Error Pasive" "Not rechaed,Reached"
|
|
hexmask.word.byte 0x00 8.--14. 1. " REC ,Receive Error Counter"
|
|
hexmask.word.byte 0x00 0.--7. 1. " TEC ,Transmmit Error Counter"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "CAN_BTR,Bit Timing Register"
|
|
bitfld.word 0x00 12.--14. " TSEG2 ,Time Segment After Sample Point" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x00 8.--11. " TSEG1 ,Time Segment Before Sample Point Minus Sync_Seg" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x00 6.--7. " SJW ,(Re)Synchronization Jump Width" "0,1,2,3"
|
|
textline " "
|
|
bitfld.word 0x00 0.--5. " BRP ,Baud Rate Prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
sif (cpuis("STR91*"))
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "CAN_TEST,Test Register"
|
|
bitfld.word 0x00 7. " RX ,Current Value of CAN_RX Pin" "Dominant,Recessive"
|
|
bitfld.word 0x00 5.--6. " TX ,CAN_TX Pin Control" "CAN Core,CAN_TX monitored,CAN_TX dominant,CAN_TX recessive"
|
|
bitfld.word 0x00 4. " LBACK ,Loop Back Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " SILENT ,Silent Mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " BASIC ,Basic Mode" "Disabled,Enabled"
|
|
endif
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "CAN_BRPR,BRP Extension Register"
|
|
bitfld.word 0x00 0.--3. " BRPE ,Baud Rate Prescaler Extension" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
tree.end
|
|
tree "Message Interface Registers"
|
|
width 14.
|
|
group.word 0x20++0x1 "MIF1"
|
|
line.word 0x00 "CAN_IF1_CRR,IF1 Command Request Register"
|
|
bitfld.word 0x00 15. " BUSY ,Busy Flag" "Idle,Busy"
|
|
bitfld.word 0x00 0.--5. " MESSAGE_NUMBER ,Message Number" "0(Interpreted as 32),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33(Interpreted as 1),34(Interpreted as 2),35(Interpreted as 3),36(Interpreted as 4),37(Interpreted as 5),38(Interpreted as 6),39(Interpreted as 7),40(Interpreted as 8),41(Interpreted as 9),42(Interpreted as 10),43(Interpreted as 11),44(Interpreted as 12),45(Interpreted as 13),46(Interpreted as 14),47(Interpreted as 15),48(Interpreted as 16),49(Interpreted as 17),50(Interpreted as 18),51(Interpreted as 19),52(Interpreted as 20),53(Interpreted as 21),54(Interpreted as 22),55(Interpreted as 23),56(Interpreted as 24),57(Interpreted as 25),58(Interpreted as 26),59(Interpreted as 27),60(Interpreted as 28),61(Interpreted as 29),62(Interpreted as 30),63(Interpreted as 31)"
|
|
if (((d.w(asd:(0x10183000+0x20+0x4)))&0x80)==0x80)
|
|
group.word (0x20+0x4)++0x1
|
|
line.word 0x00 "CAN_IF1_CMR,IF1 Command Mask Register"
|
|
bitfld.word 0x00 7. " WR/RD ,Write / Read" "Read,Write"
|
|
bitfld.word 0x00 6. " MASK ,Access Mask Bits" "Unchanged,Transfer Mask+MDir+MXtd"
|
|
textline " "
|
|
bitfld.word 0x00 5. " ARB ,Access Arbitration Bits" "Unchanged,Transfer Id+Dir+Xtd+MsgVal"
|
|
textline " "
|
|
bitfld.word 0x00 4. " CONTROL ,Access Control Bits" "Unchanged,Transfer control"
|
|
bitfld.word 0x00 3. " CLRINTPND ,Clear Interrupt Pending" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 2. " TXRQST ,Access Transmission Request" "No requested,Requested"
|
|
bitfld.word 0x00 1. " DATA_A ,Data A Access Data Bytes 3:0" "Unchanged,Transfered"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DATA_B ,Data B Access Data Bytes 7:4" "Unchanged,Transfered"
|
|
else
|
|
group.word (0x20+0x4)++0x1
|
|
line.word 0x00 "CAN_IF1_CMR,IF1 Command Mask Register"
|
|
bitfld.word 0x00 7. " WR/RD ,Write / Read" "Read,Write"
|
|
bitfld.word 0x00 6. " MASK ,Access Mask Bits" "Unchanged,Transfer Mask+MDir+MXtd"
|
|
textline " "
|
|
bitfld.word 0x00 5. " ARB ,Access Arbitration Bits" "Unchanged,Transfer Id+Dir+Xtd+MsgVal"
|
|
textline " "
|
|
bitfld.word 0x00 4. " CONTROL ,Access Control Bits" "Unchanged,Transfer control"
|
|
bitfld.word 0x00 3. " CLRINTPND ,Clear Interrupt Pending" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 2. " NEWDAT ,Clear NewDat Bit" "Unchanged,Cleared"
|
|
bitfld.word 0x00 1. " DATA_A ,Data A Access Data Bytes 3:0" "Unchanged,Transfered"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DATA_B ,AData B Access Data Bytes 7:4" "Unchanged,Transfered"
|
|
endif
|
|
group.word (0x20+0x8)++0x1
|
|
line.word 0x00 "CAN_IF1_M1R,IF1 Mask 1 Register"
|
|
bitfld.word 0x00 15. " MSK[15:0] ,Mask Bit 15" "0,1"
|
|
bitfld.word 0x00 14. ",Mask Bit 14" "0,1"
|
|
bitfld.word 0x00 13. ",Mask Bit 13" "0,1"
|
|
bitfld.word 0x00 12. ",Mask Bit 12" "0,1"
|
|
bitfld.word 0x00 11. ",Mask Bit 11" "0,1"
|
|
bitfld.word 0x00 10. ",Mask Bit 10" "0,1"
|
|
bitfld.word 0x00 9. ",Mask Bit 9" "0,1"
|
|
bitfld.word 0x00 8. ",Mask Bit 8" "0,1"
|
|
bitfld.word 0x00 7. ",Mask Bit 7" "0,1"
|
|
bitfld.word 0x00 6. ",Mask Bit 6" "0,1"
|
|
bitfld.word 0x00 5. ",Mask Bit 5" "0,1"
|
|
bitfld.word 0x00 4. ",Mask Bit 4" "0,1"
|
|
bitfld.word 0x00 3. ",Mask Bit 3" "0,1"
|
|
bitfld.word 0x00 2. ",Mask Bit 2" "0,1"
|
|
bitfld.word 0x00 1. ",Mask Bit 1" "0,1"
|
|
bitfld.word 0x00 0. ",Mask Bit 0" "0,1"
|
|
group.word (0x20+0xc)++0x1
|
|
line.word 0x00 "CAN_IF1_M2R,IF1 Mask 2 Register"
|
|
bitfld.word 0x00 15. " MXTD ,Mask Extended Identifier" "Not used,Used"
|
|
bitfld.word 0x00 14. " MDIR ,Mask Message Direction" "Not used,Used"
|
|
textline " "
|
|
bitfld.word 0x00 12. " MSK[28:16] ,Mask Bit 28" "0,1"
|
|
bitfld.word 0x00 11. ",Mask Bit 27" "0,1"
|
|
bitfld.word 0x00 10. ",Mask Bit 26" "0,1"
|
|
bitfld.word 0x00 9. ",Mask Bit 25" "0,1"
|
|
bitfld.word 0x00 8. ",Mask Bit 24" "0,1"
|
|
bitfld.word 0x00 7. ",Mask Bit 23" "0,1"
|
|
bitfld.word 0x00 6. ",Mask Bit 22" "0,1"
|
|
bitfld.word 0x00 5. ",Mask Bit 21" "0,1"
|
|
bitfld.word 0x00 4. ",Mask Bit 20" "0,1"
|
|
bitfld.word 0x00 3. ",Mask Bit 19" "0,1"
|
|
bitfld.word 0x00 2. ",Mask Bit 18" "0,1"
|
|
bitfld.word 0x00 1. ",Mask Bit 17" "0,1"
|
|
bitfld.word 0x00 0. ",Mask Bit 16" "0,1"
|
|
group.word (0x20+0x10)++0x1
|
|
line.word 0x00 "CAN_IF1_A1R,IF1 Message Arbitration 1 Register"
|
|
group.word (0x20+0x14)++0x1
|
|
line.word 0x00 "CAN_IF1_A2R,IF1 Message Arbitration 2 Register"
|
|
bitfld.word 0x00 15. " MSGVAL ,Message Valid" "Ignored,Considered"
|
|
bitfld.word 0x00 14. " XTD ,Extended Identifier" "Standard,Extended"
|
|
bitfld.word 0x00 13. " DIR ,Message Direction" "Received,Transmit"
|
|
textline " "
|
|
hexmask.word 0x00 0.--12. 1. " ID[28:16] ,Message Identifier"
|
|
group.word (0x20+0x18)++0x1
|
|
line.word 0x00 "CAN_IF1_MCR,IF1 Message Control Register"
|
|
bitfld.word 0x00 15. " NEWDAT ,New data" "No new data,New data"
|
|
bitfld.word 0x00 14. " MSGLST ,Message Lost" "Not lost,Lost"
|
|
bitfld.word 0x00 13. " INDPND ,Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 12. " UMASK ,Use Acceptance Mask" "Ignored,Used"
|
|
bitfld.word 0x00 11. " TXIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " RXIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " RMTEN ,Remote Enable" "Unchanged,Set"
|
|
bitfld.word 0x00 8. " TXRQST ,Transmit Request" "Not requested,Requested"
|
|
bitfld.word 0x00 7. " EOB ,End of Buffer" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.word 0x00 0.--3. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
group.word (0x20+0x1c)++0x1
|
|
line.word 0x00 "CAN_IF1_DA1R,IF1 Data A Register 1"
|
|
hexmask.word.byte 0x00 8.--15. 1. " DATA1 ,Data 1"
|
|
hexmask.word.byte 0x00 0.--7. 1. " DATA0 ,Data 0"
|
|
group.word (0x20+0x20)++0x1
|
|
line.word 0x00 "CAN_IF1_DA2R,IF1 Data A Register 2"
|
|
hexmask.word.byte 0x00 8.--15. 1. " DATA3 ,Data 3"
|
|
hexmask.word.byte 0x00 0.--7. 1. " DATA2 ,Data 2"
|
|
group.word (0x20+0x24)++0x1
|
|
line.word 0x00 "CAN_IF1_DB1R,IF1 Data B Register 1"
|
|
hexmask.word.byte 0x00 8.--15. 1. " DATA5 ,Data 5"
|
|
hexmask.word.byte 0x00 0.--7. 1. " DATA4 ,Data 4"
|
|
group.word (0x20+0x28)++0x1
|
|
line.word 0x00 "CAN_IF1_DB2R,IF1 Data B Register 2"
|
|
hexmask.word.byte 0x00 8.--15. 1. " DATA7 ,Data 7"
|
|
hexmask.word.byte 0x00 0.--7. 1. " DATA6 ,Data 6"
|
|
group.word 0x80++0x1 "MIF2"
|
|
line.word 0x00 "CAN_IF2_CRR,IF2 Command Request Register"
|
|
bitfld.word 0x00 15. " BUSY ,Busy Flag" "Idle,Busy"
|
|
bitfld.word 0x00 0.--5. " MESSAGE_NUMBER ,Message Number" "0(Interpreted as 32),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33(Interpreted as 1),34(Interpreted as 2),35(Interpreted as 3),36(Interpreted as 4),37(Interpreted as 5),38(Interpreted as 6),39(Interpreted as 7),40(Interpreted as 8),41(Interpreted as 9),42(Interpreted as 10),43(Interpreted as 11),44(Interpreted as 12),45(Interpreted as 13),46(Interpreted as 14),47(Interpreted as 15),48(Interpreted as 16),49(Interpreted as 17),50(Interpreted as 18),51(Interpreted as 19),52(Interpreted as 20),53(Interpreted as 21),54(Interpreted as 22),55(Interpreted as 23),56(Interpreted as 24),57(Interpreted as 25),58(Interpreted as 26),59(Interpreted as 27),60(Interpreted as 28),61(Interpreted as 29),62(Interpreted as 30),63(Interpreted as 31)"
|
|
if (((d.w(asd:(0x10183000+0x80+0x4)))&0x80)==0x80)
|
|
group.word (0x80+0x4)++0x1
|
|
line.word 0x00 "CAN_IF2_CMR,IF2 Command Mask Register"
|
|
bitfld.word 0x00 7. " WR/RD ,Write / Read" "Read,Write"
|
|
bitfld.word 0x00 6. " MASK ,Access Mask Bits" "Unchanged,Transfer Mask+MDir+MXtd"
|
|
textline " "
|
|
bitfld.word 0x00 5. " ARB ,Access Arbitration Bits" "Unchanged,Transfer Id+Dir+Xtd+MsgVal"
|
|
textline " "
|
|
bitfld.word 0x00 4. " CONTROL ,Access Control Bits" "Unchanged,Transfer control"
|
|
bitfld.word 0x00 3. " CLRINTPND ,Clear Interrupt Pending" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 2. " TXRQST ,Access Transmission Request" "No requested,Requested"
|
|
bitfld.word 0x00 1. " DATA_A ,Data A Access Data Bytes 3:0" "Unchanged,Transfered"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DATA_B ,Data B Access Data Bytes 7:4" "Unchanged,Transfered"
|
|
else
|
|
group.word (0x80+0x4)++0x1
|
|
line.word 0x00 "CAN_IF2_CMR,IF2 Command Mask Register"
|
|
bitfld.word 0x00 7. " WR/RD ,Write / Read" "Read,Write"
|
|
bitfld.word 0x00 6. " MASK ,Access Mask Bits" "Unchanged,Transfer Mask+MDir+MXtd"
|
|
textline " "
|
|
bitfld.word 0x00 5. " ARB ,Access Arbitration Bits" "Unchanged,Transfer Id+Dir+Xtd+MsgVal"
|
|
textline " "
|
|
bitfld.word 0x00 4. " CONTROL ,Access Control Bits" "Unchanged,Transfer control"
|
|
bitfld.word 0x00 3. " CLRINTPND ,Clear Interrupt Pending" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 2. " NEWDAT ,Clear NewDat Bit" "Unchanged,Cleared"
|
|
bitfld.word 0x00 1. " DATA_A ,Data A Access Data Bytes 3:0" "Unchanged,Transfered"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DATA_B ,AData B Access Data Bytes 7:4" "Unchanged,Transfered"
|
|
endif
|
|
group.word (0x80+0x8)++0x1
|
|
line.word 0x00 "CAN_IF2_M1R,IF2 Mask 1 Register"
|
|
bitfld.word 0x00 15. " MSK[15:0] ,Mask Bit 15" "0,1"
|
|
bitfld.word 0x00 14. ",Mask Bit 14" "0,1"
|
|
bitfld.word 0x00 13. ",Mask Bit 13" "0,1"
|
|
bitfld.word 0x00 12. ",Mask Bit 12" "0,1"
|
|
bitfld.word 0x00 11. ",Mask Bit 11" "0,1"
|
|
bitfld.word 0x00 10. ",Mask Bit 10" "0,1"
|
|
bitfld.word 0x00 9. ",Mask Bit 9" "0,1"
|
|
bitfld.word 0x00 8. ",Mask Bit 8" "0,1"
|
|
bitfld.word 0x00 7. ",Mask Bit 7" "0,1"
|
|
bitfld.word 0x00 6. ",Mask Bit 6" "0,1"
|
|
bitfld.word 0x00 5. ",Mask Bit 5" "0,1"
|
|
bitfld.word 0x00 4. ",Mask Bit 4" "0,1"
|
|
bitfld.word 0x00 3. ",Mask Bit 3" "0,1"
|
|
bitfld.word 0x00 2. ",Mask Bit 2" "0,1"
|
|
bitfld.word 0x00 1. ",Mask Bit 1" "0,1"
|
|
bitfld.word 0x00 0. ",Mask Bit 0" "0,1"
|
|
group.word (0x80+0xc)++0x1
|
|
line.word 0x00 "CAN_IF2_M2R,IF2 Mask 2 Register"
|
|
bitfld.word 0x00 15. " MXTD ,Mask Extended Identifier" "Not used,Used"
|
|
bitfld.word 0x00 14. " MDIR ,Mask Message Direction" "Not used,Used"
|
|
textline " "
|
|
bitfld.word 0x00 12. " MSK[28:16] ,Mask Bit 28" "0,1"
|
|
bitfld.word 0x00 11. ",Mask Bit 27" "0,1"
|
|
bitfld.word 0x00 10. ",Mask Bit 26" "0,1"
|
|
bitfld.word 0x00 9. ",Mask Bit 25" "0,1"
|
|
bitfld.word 0x00 8. ",Mask Bit 24" "0,1"
|
|
bitfld.word 0x00 7. ",Mask Bit 23" "0,1"
|
|
bitfld.word 0x00 6. ",Mask Bit 22" "0,1"
|
|
bitfld.word 0x00 5. ",Mask Bit 21" "0,1"
|
|
bitfld.word 0x00 4. ",Mask Bit 20" "0,1"
|
|
bitfld.word 0x00 3. ",Mask Bit 19" "0,1"
|
|
bitfld.word 0x00 2. ",Mask Bit 18" "0,1"
|
|
bitfld.word 0x00 1. ",Mask Bit 17" "0,1"
|
|
bitfld.word 0x00 0. ",Mask Bit 16" "0,1"
|
|
group.word (0x80+0x10)++0x1
|
|
line.word 0x00 "CAN_IF2_A1R,IF2 Message Arbitration 1 Register"
|
|
group.word (0x80+0x14)++0x1
|
|
line.word 0x00 "CAN_IF2_A2R,IF2 Message Arbitration 2 Register"
|
|
bitfld.word 0x00 15. " MSGVAL ,Message Valid" "Ignored,Considered"
|
|
bitfld.word 0x00 14. " XTD ,Extended Identifier" "Standard,Extended"
|
|
bitfld.word 0x00 13. " DIR ,Message Direction" "Received,Transmit"
|
|
textline " "
|
|
hexmask.word 0x00 0.--12. 1. " ID[28:16] ,Message Identifier"
|
|
group.word (0x80+0x18)++0x1
|
|
line.word 0x00 "CAN_IF2_MCR,IF2 Message Control Register"
|
|
bitfld.word 0x00 15. " NEWDAT ,New data" "No new data,New data"
|
|
bitfld.word 0x00 14. " MSGLST ,Message Lost" "Not lost,Lost"
|
|
bitfld.word 0x00 13. " INDPND ,Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 12. " UMASK ,Use Acceptance Mask" "Ignored,Used"
|
|
bitfld.word 0x00 11. " TXIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " RXIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " RMTEN ,Remote Enable" "Unchanged,Set"
|
|
bitfld.word 0x00 8. " TXRQST ,Transmit Request" "Not requested,Requested"
|
|
bitfld.word 0x00 7. " EOB ,End of Buffer" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.word 0x00 0.--3. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
group.word (0x80+0x1c)++0x1
|
|
line.word 0x00 "CAN_IF2_DA1R,IF2 Data A Register 1"
|
|
hexmask.word.byte 0x00 8.--15. 1. " DATA1 ,Data 1"
|
|
hexmask.word.byte 0x00 0.--7. 1. " DATA0 ,Data 0"
|
|
group.word (0x80+0x20)++0x1
|
|
line.word 0x00 "CAN_IF2_DA2R,IF2 Data A Register 2"
|
|
hexmask.word.byte 0x00 8.--15. 1. " DATA3 ,Data 3"
|
|
hexmask.word.byte 0x00 0.--7. 1. " DATA2 ,Data 2"
|
|
group.word (0x80+0x24)++0x1
|
|
line.word 0x00 "CAN_IF2_DB1R,IF2 Data B Register 1"
|
|
hexmask.word.byte 0x00 8.--15. 1. " DATA5 ,Data 5"
|
|
hexmask.word.byte 0x00 0.--7. 1. " DATA4 ,Data 4"
|
|
group.word (0x80+0x28)++0x1
|
|
line.word 0x00 "CAN_IF2_DB2R,IF2 Data B Register 2"
|
|
hexmask.word.byte 0x00 8.--15. 1. " DATA7 ,Data 7"
|
|
hexmask.word.byte 0x00 0.--7. 1. " DATA6 ,Data 6"
|
|
tree.end
|
|
tree "Message Handler Registers"
|
|
width 11.
|
|
rgroup.word 0x10++0x1
|
|
line.word 0x00 "CAN_IDR, Interrupt Identifier Register"
|
|
rgroup.word 0x100++0x1
|
|
line.word 0x00 "CAN_TXR1R,Transmission Request Register 1"
|
|
bitfld.word 0x00 15. " TXRQST16 ,Transmission Request 16" "Not requested,Requested"
|
|
bitfld.word 0x00 14. " TXRQST15 ,Transmission Request 15" "Not requested,Requested"
|
|
bitfld.word 0x00 13. " TXRQST14 ,Transmission Request 14" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 12. " TXRQST13 ,Transmission Request 13" "Not requested,Requested"
|
|
bitfld.word 0x00 11. " TXRQST12 ,Transmission Request 12" "Not requested,Requested"
|
|
bitfld.word 0x00 10. " TXRQST11 ,Transmission Request 11" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 9. " TXRQST10 ,Transmission Request 10" "Not requested,Requested"
|
|
bitfld.word 0x00 8. " TXRQST9 ,Transmission Request 9" "Not requested,Requested"
|
|
bitfld.word 0x00 7. " TXRQST8 ,Transmission Request 8" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 6. " TXRQST7 ,Transmission Request 7" "Not requested,Requested"
|
|
bitfld.word 0x00 5. " TXRQST6 ,Transmission Request 6" "Not requested,Requested"
|
|
bitfld.word 0x00 4. " TXRQST5 ,Transmission Request 5" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 3. " TXRQST4 ,Transmission Request 4" "Not requested,Requested"
|
|
bitfld.word 0x00 2. " TXRQST3 ,Transmission Request 3" "Not requested,Requested"
|
|
bitfld.word 0x00 1. " TXRQST2 ,Transmission Request 2" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 0. " TXRQST1 ,Transmission Request 1" "Not requested,Requested"
|
|
rgroup.word 0x104++0x1
|
|
line.word 0x00 "CAN_TXR2R,Transmission Request Register 2"
|
|
bitfld.word 0x00 15. " TXRQST32 ,Transmission Request 32" "Not requested,Requested"
|
|
bitfld.word 0x00 14. " TXRQST31 ,Transmission Request 31" "Not requested,Requested"
|
|
bitfld.word 0x00 13. " TXRQST30 ,Transmission Request 30" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 12. " TXRQST29 ,Transmission Request 29" "Not requested,Requested"
|
|
bitfld.word 0x00 11. " TXRQST28 ,Transmission Request 28" "Not requested,Requested"
|
|
bitfld.word 0x00 10. " TXRQST27 ,Transmission Request 27" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 9. " TXRQST26 ,Transmission Request 26" "Not requested,Requested"
|
|
bitfld.word 0x00 8. " TXRQST25 ,Transmission Request 25" "Not requested,Requested"
|
|
bitfld.word 0x00 7. " TXRQST24 ,Transmission Request 24" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 6. " TXRQST23 ,Transmission Request 23" "Not requested,Requested"
|
|
bitfld.word 0x00 5. " TXRQST22 ,Transmission Request 22" "Not requested,Requested"
|
|
bitfld.word 0x00 4. " TXRQST21 ,Transmission Request 21" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 3. " TXRQST20 ,Transmission Request 20" "Not requested,Requested"
|
|
bitfld.word 0x00 2. " TXRQST19 ,Transmission Request 19" "Not requested,Requested"
|
|
bitfld.word 0x00 1. " TXRQST18 ,Transmission Request 18" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 0. " TXRQST17 ,Transmission Request 17" "Not requested,Requested"
|
|
rgroup.word 0x120++0x1
|
|
line.word 0x00 "CAN_ND1R,New Data Register 1"
|
|
bitfld.word 0x00 15. " NEWDAT16 ,New Data 16" "Not occurred,Occurred"
|
|
bitfld.word 0x00 14. " NEWDAT15 ,New Data 15" "Not occurred,Occurred"
|
|
bitfld.word 0x00 13. " NEWDAT14 ,New Data 14" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 12. " NEWDAT13 ,New Data 13" "Not occurred,Occurred"
|
|
bitfld.word 0x00 11. " NEWDAT12 ,New Data 12" "Not occurred,Occurred"
|
|
bitfld.word 0x00 10. " NEWDAT11 ,New Data 11" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 9. " NEWDAT10 ,New Data 10" "Not occurred,Occurred"
|
|
bitfld.word 0x00 8. " NEWDAT9 ,New Data 9" "Not occurred,Occurred"
|
|
bitfld.word 0x00 7. " NEWDAT8 ,New Data 8" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 6. " NEWDAT7 ,New Data 7" "Not occurred,Occurred"
|
|
bitfld.word 0x00 5. " NEWDAT6 ,New Data 6" "Not occurred,Occurred"
|
|
bitfld.word 0x00 4. " NEWDAT5 ,New Data 5" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 3. " NEWDAT4 ,New Data 4" "Not occurred,Occurred"
|
|
bitfld.word 0x00 2. " NEWDAT3 ,New Data 3" "Not occurred,Occurred"
|
|
bitfld.word 0x00 1. " NEWDAT2 ,New Data 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 0. " NEWDAT1 ,New Data 1" "Not occurred,Occurred"
|
|
rgroup.word 0x124++0x1
|
|
line.word 0x00 "CAN_ND2R,New Data Register 2"
|
|
bitfld.word 0x00 15. " NEWDAT32 ,New Data 32" "Not occurred,Occurred"
|
|
bitfld.word 0x00 14. " NEWDAT31 ,New Data 31" "Not occurred,Occurred"
|
|
bitfld.word 0x00 13. " NEWDAT30 ,New Data 30" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 12. " NEWDAT29 ,New Data 29" "Not occurred,Occurred"
|
|
bitfld.word 0x00 11. " NEWDAT28 ,New Data 28" "Not occurred,Occurred"
|
|
bitfld.word 0x00 10. " NEWDAT27 ,New Data 27" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 9. " NEWDAT26 ,New Data 26" "Not occurred,Occurred"
|
|
bitfld.word 0x00 8. " NEWDAT25 ,New Data 25" "Not occurred,Occurred"
|
|
bitfld.word 0x00 7. " NEWDAT24 ,New Data 24" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 6. " NEWDAT23 ,New Data 23" "Not occurred,Occurred"
|
|
bitfld.word 0x00 5. " NEWDAT22 ,New Data 22" "Not occurred,Occurred"
|
|
bitfld.word 0x00 4. " NEWDAT21 ,New Data 21" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 3. " NEWDAT20 ,New Data 20" "Not occurred,Occurred"
|
|
bitfld.word 0x00 2. " NEWDAT19 ,New Data 19" "Not occurred,Occurred"
|
|
bitfld.word 0x00 1. " NEWDAT18 ,New Data 18" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 0. " NEWDAT17 ,New Data 17" "Not occurred,Occurred"
|
|
rgroup.word 0x140++0x1
|
|
line.word 0x00 "CAN_IP1R,Interrupt Pending Register 1"
|
|
bitfld.word 0x00 15. " INTPND16 ,Interrupt 16 Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 14. " INTPND15 ,Interrupt 15 Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 13. " INTPND14 ,Interrupt 14 Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 12. " INTPND13 ,Interrupt 13 Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 11. " INTPND12 ,Interrupt 12 Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 10. " INTPND11 ,Interrupt 11 Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 9. " INTPND10 ,Interrupt 10 Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 8. " INTPND9 ,Interrupt 9 Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 7. " INTPND8 ,Interrupt 8 Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 6. " INTPND7 ,Interrupt 7 Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 5. " INTPND6 ,Interrupt 6 Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 4. " INTPND5 ,Interrupt 5 Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 3. " INTPND4 ,Interrupt 4 Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 2. " INTPND3 ,Interrupt 3 Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 1. " INTPND2 ,Interrupt 2 Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 0. " INTPND1 ,Interrupt 1 Pending" "Not pending,Pending"
|
|
rgroup.word 0x144++0x1
|
|
line.word 0x00 "CAN_IP2R,Interrupt Pending Register 2"
|
|
bitfld.word 0x00 15. " INTPND32 ,Interrupt 32 Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 14. " INTPND31 ,Interrupt 31 Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 13. " INTPND30 ,Interrupt 30 Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 12. " INTPND29 ,Interrupt 29 Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 11. " INTPND28 ,Interrupt 28 Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 10. " INTPND27 ,Interrupt 27 Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 9. " INTPND26 ,Interrupt 26 Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 8. " INTPND25 ,Interrupt 25 Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 7. " INTPND24 ,Interrupt 24 Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 6. " INTPND23 ,Interrupt 23 Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 5. " INTPND22 ,Interrupt 22 Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 4. " INTPND21 ,Interrupt 21 Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 3. " INTPND20 ,Interrupt 20 Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 2. " INTPND19 ,Interrupt 19 Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 1. " INTPND18 ,Interrupt 18 Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 0. " INTPND17 ,Interrupt 17 Pending" "Not pending,Pending"
|
|
rgroup.word 0x160++0x1
|
|
line.word 0x00 "CAN_MV1R,Message Valid Register 1"
|
|
bitfld.word 0x00 15. " MSGVAL16 ,Message 16 Valid" "Ignored,Considered"
|
|
bitfld.word 0x00 14. " MSGVAL15 ,Message 15 Valid" "Ignored,Considered"
|
|
bitfld.word 0x00 13. " MSGVAL14 ,Message 14 Valid" "Ignored,Considered"
|
|
textline " "
|
|
bitfld.word 0x00 12. " MSGVAL13 ,Message 13 Valid" "Ignored,Considered"
|
|
bitfld.word 0x00 11. " MSGVAL12 ,Message 12 Valid" "Ignored,Considered"
|
|
bitfld.word 0x00 10. " MSGVAL11 ,Message 11 Valid" "Ignored,Considered"
|
|
textline " "
|
|
bitfld.word 0x00 9. " MSGVAL10 ,Message 10 Valid" "Ignored,Considered"
|
|
bitfld.word 0x00 8. " MSGVAL9 ,Message 9 Valid" "Ignored,Considered"
|
|
bitfld.word 0x00 7. " MSGVAL8 ,Message 8 Valid" "Ignored,Considered"
|
|
textline " "
|
|
bitfld.word 0x00 6. " MSGVAL7 ,Message 7 Valid" "Ignored,Considered"
|
|
bitfld.word 0x00 5. " MSGVAL6 ,Message 6 Valid" "Ignored,Considered"
|
|
bitfld.word 0x00 4. " MSGVAL5 ,Message 5 Valid" "Ignored,Considered"
|
|
textline " "
|
|
bitfld.word 0x00 3. " MSGVAL4 ,Message 4 Valid" "Ignored,Considered"
|
|
bitfld.word 0x00 2. " MSGVAL3 ,Message 3 Valid" "Ignored,Considered"
|
|
bitfld.word 0x00 1. " MSGVAL2 ,Message 2 Valid" "Ignored,Considered"
|
|
textline " "
|
|
bitfld.word 0x00 0. " MSGVAL1 ,Message 1 Valid" "Ignored,Considered"
|
|
rgroup.word 0x164++0x1
|
|
line.word 0x00 "CAN_MV2R,Message Valid Register 2"
|
|
bitfld.word 0x00 15. " MSGVAL32 ,Message 32 Valid" "Ignored,Considered"
|
|
bitfld.word 0x00 14. " MSGVAL31 ,Message 31 Valid" "Ignored,Considered"
|
|
bitfld.word 0x00 13. " MSGVAL30 ,Message 30 Valid" "Ignored,Considered"
|
|
textline " "
|
|
bitfld.word 0x00 12. " MSGVAL29 ,Message 29 Valid" "Ignored,Considered"
|
|
bitfld.word 0x00 11. " MSGVAL28 ,Message 28 Valid" "Ignored,Considered"
|
|
bitfld.word 0x00 10. " MSGVAL27 ,Message 27 Valid" "Ignored,Considered"
|
|
textline " "
|
|
bitfld.word 0x00 9. " MSGVAL26 ,Message 26 Valid" "Ignored,Considered"
|
|
bitfld.word 0x00 8. " MSGVAL25 ,Message 25 Valid" "Ignored,Considered"
|
|
bitfld.word 0x00 7. " MSGVAL24 ,Message 24 Valid" "Ignored,Considered"
|
|
textline " "
|
|
bitfld.word 0x00 6. " MSGVAL23 ,Message 23 Valid" "Ignored,Considered"
|
|
bitfld.word 0x00 5. " MSGVAL22 ,Message 22 Valid" "Ignored,Considered"
|
|
bitfld.word 0x00 4. " MSGVAL21 ,Message 21 Valid" "Ignored,Considered"
|
|
textline " "
|
|
bitfld.word 0x00 3. " MSGVAL20 ,Message 20 Valid" "Ignored,Considered"
|
|
bitfld.word 0x00 2. " MSGVAL19 ,Message 19 Valid" "Ignored,Considered"
|
|
bitfld.word 0x00 1. " MSGVAL18 ,Message 18 Valid" "Ignored,Considered"
|
|
textline " "
|
|
bitfld.word 0x00 0. " MSGVAL17 ,Message 17 Valid" "Ignored,Considered"
|
|
tree.end
|
|
width 0xb
|
|
tree.end
|
|
endif
|
|
tree "CAN 1"
|
|
base asd:0x10184000
|
|
width 10.
|
|
tree "Protocol Related Registers"
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "CAN_CR,CAN Control Register"
|
|
bitfld.word 0x00 7. " TEST ,Test Mode Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " CCE ,Configuration Change Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " DAR ,Disable Automatic Re-transmission" "No,Yes"
|
|
bitfld.word 0x00 3. " EIE ,Error Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " SIE ,Status Chaneg Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " IE ,Module Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " INIT ,Initializaion" "Normal,Initialization"
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "CAN_SR,Status Register"
|
|
bitfld.word 0x00 7. " BOFF ,Busoff Status" "No busoff,Busoff"
|
|
bitfld.word 0x00 6. " EWARN ,Warning Status" "No warning,Warning"
|
|
bitfld.word 0x00 5. " EPASS ,Error Passive" "Active,Passive"
|
|
textline " "
|
|
bitfld.word 0x00 4. " RXOK ,Received a Message Successfully" "Not received,Received"
|
|
bitfld.word 0x00 3. " TXOK ,Transmitted a Message Successfully" "Not transmitted,Transmitted"
|
|
bitfld.word 0x00 0.--2. " LEC ,Last Error Code" "No error,Stuff Error,Form error,AckError,Bit1Error,Bit0Error,CRCError,Unused"
|
|
rgroup.word 0x08++0x1
|
|
line.word 0x00 "CAN_ERR,Error Counter"
|
|
bitfld.word 0x00 15. " RP ,Receive Error Pasive" "Not rechaed,Reached"
|
|
hexmask.word.byte 0x00 8.--14. 1. " REC ,Receive Error Counter"
|
|
hexmask.word.byte 0x00 0.--7. 1. " TEC ,Transmmit Error Counter"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "CAN_BTR,Bit Timing Register"
|
|
bitfld.word 0x00 12.--14. " TSEG2 ,Time Segment After Sample Point" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x00 8.--11. " TSEG1 ,Time Segment Before Sample Point Minus Sync_Seg" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x00 6.--7. " SJW ,(Re)Synchronization Jump Width" "0,1,2,3"
|
|
textline " "
|
|
bitfld.word 0x00 0.--5. " BRP ,Baud Rate Prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
sif (cpuis("STR91*"))
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "CAN_TEST,Test Register"
|
|
bitfld.word 0x00 7. " RX ,Current Value of CAN_RX Pin" "Dominant,Recessive"
|
|
bitfld.word 0x00 5.--6. " TX ,CAN_TX Pin Control" "CAN Core,CAN_TX monitored,CAN_TX dominant,CAN_TX recessive"
|
|
bitfld.word 0x00 4. " LBACK ,Loop Back Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " SILENT ,Silent Mode" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " BASIC ,Basic Mode" "Disabled,Enabled"
|
|
endif
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "CAN_BRPR,BRP Extension Register"
|
|
bitfld.word 0x00 0.--3. " BRPE ,Baud Rate Prescaler Extension" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
tree.end
|
|
tree "Message Interface Registers"
|
|
width 14.
|
|
group.word 0x20++0x1 "MIF1"
|
|
line.word 0x00 "CAN_IF1_CRR,IF1 Command Request Register"
|
|
bitfld.word 0x00 15. " BUSY ,Busy Flag" "Idle,Busy"
|
|
bitfld.word 0x00 0.--5. " MESSAGE_NUMBER ,Message Number" "0(Interpreted as 32),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33(Interpreted as 1),34(Interpreted as 2),35(Interpreted as 3),36(Interpreted as 4),37(Interpreted as 5),38(Interpreted as 6),39(Interpreted as 7),40(Interpreted as 8),41(Interpreted as 9),42(Interpreted as 10),43(Interpreted as 11),44(Interpreted as 12),45(Interpreted as 13),46(Interpreted as 14),47(Interpreted as 15),48(Interpreted as 16),49(Interpreted as 17),50(Interpreted as 18),51(Interpreted as 19),52(Interpreted as 20),53(Interpreted as 21),54(Interpreted as 22),55(Interpreted as 23),56(Interpreted as 24),57(Interpreted as 25),58(Interpreted as 26),59(Interpreted as 27),60(Interpreted as 28),61(Interpreted as 29),62(Interpreted as 30),63(Interpreted as 31)"
|
|
if (((d.w(asd:(0x10184000+0x20+0x4)))&0x80)==0x80)
|
|
group.word (0x20+0x4)++0x1
|
|
line.word 0x00 "CAN_IF1_CMR,IF1 Command Mask Register"
|
|
bitfld.word 0x00 7. " WR/RD ,Write / Read" "Read,Write"
|
|
bitfld.word 0x00 6. " MASK ,Access Mask Bits" "Unchanged,Transfer Mask+MDir+MXtd"
|
|
textline " "
|
|
bitfld.word 0x00 5. " ARB ,Access Arbitration Bits" "Unchanged,Transfer Id+Dir+Xtd+MsgVal"
|
|
textline " "
|
|
bitfld.word 0x00 4. " CONTROL ,Access Control Bits" "Unchanged,Transfer control"
|
|
bitfld.word 0x00 3. " CLRINTPND ,Clear Interrupt Pending" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 2. " TXRQST ,Access Transmission Request" "No requested,Requested"
|
|
bitfld.word 0x00 1. " DATA_A ,Data A Access Data Bytes 3:0" "Unchanged,Transfered"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DATA_B ,Data B Access Data Bytes 7:4" "Unchanged,Transfered"
|
|
else
|
|
group.word (0x20+0x4)++0x1
|
|
line.word 0x00 "CAN_IF1_CMR,IF1 Command Mask Register"
|
|
bitfld.word 0x00 7. " WR/RD ,Write / Read" "Read,Write"
|
|
bitfld.word 0x00 6. " MASK ,Access Mask Bits" "Unchanged,Transfer Mask+MDir+MXtd"
|
|
textline " "
|
|
bitfld.word 0x00 5. " ARB ,Access Arbitration Bits" "Unchanged,Transfer Id+Dir+Xtd+MsgVal"
|
|
textline " "
|
|
bitfld.word 0x00 4. " CONTROL ,Access Control Bits" "Unchanged,Transfer control"
|
|
bitfld.word 0x00 3. " CLRINTPND ,Clear Interrupt Pending" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 2. " NEWDAT ,Clear NewDat Bit" "Unchanged,Cleared"
|
|
bitfld.word 0x00 1. " DATA_A ,Data A Access Data Bytes 3:0" "Unchanged,Transfered"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DATA_B ,AData B Access Data Bytes 7:4" "Unchanged,Transfered"
|
|
endif
|
|
group.word (0x20+0x8)++0x1
|
|
line.word 0x00 "CAN_IF1_M1R,IF1 Mask 1 Register"
|
|
bitfld.word 0x00 15. " MSK[15:0] ,Mask Bit 15" "0,1"
|
|
bitfld.word 0x00 14. ",Mask Bit 14" "0,1"
|
|
bitfld.word 0x00 13. ",Mask Bit 13" "0,1"
|
|
bitfld.word 0x00 12. ",Mask Bit 12" "0,1"
|
|
bitfld.word 0x00 11. ",Mask Bit 11" "0,1"
|
|
bitfld.word 0x00 10. ",Mask Bit 10" "0,1"
|
|
bitfld.word 0x00 9. ",Mask Bit 9" "0,1"
|
|
bitfld.word 0x00 8. ",Mask Bit 8" "0,1"
|
|
bitfld.word 0x00 7. ",Mask Bit 7" "0,1"
|
|
bitfld.word 0x00 6. ",Mask Bit 6" "0,1"
|
|
bitfld.word 0x00 5. ",Mask Bit 5" "0,1"
|
|
bitfld.word 0x00 4. ",Mask Bit 4" "0,1"
|
|
bitfld.word 0x00 3. ",Mask Bit 3" "0,1"
|
|
bitfld.word 0x00 2. ",Mask Bit 2" "0,1"
|
|
bitfld.word 0x00 1. ",Mask Bit 1" "0,1"
|
|
bitfld.word 0x00 0. ",Mask Bit 0" "0,1"
|
|
group.word (0x20+0xc)++0x1
|
|
line.word 0x00 "CAN_IF1_M2R,IF1 Mask 2 Register"
|
|
bitfld.word 0x00 15. " MXTD ,Mask Extended Identifier" "Not used,Used"
|
|
bitfld.word 0x00 14. " MDIR ,Mask Message Direction" "Not used,Used"
|
|
textline " "
|
|
bitfld.word 0x00 12. " MSK[28:16] ,Mask Bit 28" "0,1"
|
|
bitfld.word 0x00 11. ",Mask Bit 27" "0,1"
|
|
bitfld.word 0x00 10. ",Mask Bit 26" "0,1"
|
|
bitfld.word 0x00 9. ",Mask Bit 25" "0,1"
|
|
bitfld.word 0x00 8. ",Mask Bit 24" "0,1"
|
|
bitfld.word 0x00 7. ",Mask Bit 23" "0,1"
|
|
bitfld.word 0x00 6. ",Mask Bit 22" "0,1"
|
|
bitfld.word 0x00 5. ",Mask Bit 21" "0,1"
|
|
bitfld.word 0x00 4. ",Mask Bit 20" "0,1"
|
|
bitfld.word 0x00 3. ",Mask Bit 19" "0,1"
|
|
bitfld.word 0x00 2. ",Mask Bit 18" "0,1"
|
|
bitfld.word 0x00 1. ",Mask Bit 17" "0,1"
|
|
bitfld.word 0x00 0. ",Mask Bit 16" "0,1"
|
|
group.word (0x20+0x10)++0x1
|
|
line.word 0x00 "CAN_IF1_A1R,IF1 Message Arbitration 1 Register"
|
|
group.word (0x20+0x14)++0x1
|
|
line.word 0x00 "CAN_IF1_A2R,IF1 Message Arbitration 2 Register"
|
|
bitfld.word 0x00 15. " MSGVAL ,Message Valid" "Ignored,Considered"
|
|
bitfld.word 0x00 14. " XTD ,Extended Identifier" "Standard,Extended"
|
|
bitfld.word 0x00 13. " DIR ,Message Direction" "Received,Transmit"
|
|
textline " "
|
|
hexmask.word 0x00 0.--12. 1. " ID[28:16] ,Message Identifier"
|
|
group.word (0x20+0x18)++0x1
|
|
line.word 0x00 "CAN_IF1_MCR,IF1 Message Control Register"
|
|
bitfld.word 0x00 15. " NEWDAT ,New data" "No new data,New data"
|
|
bitfld.word 0x00 14. " MSGLST ,Message Lost" "Not lost,Lost"
|
|
bitfld.word 0x00 13. " INDPND ,Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 12. " UMASK ,Use Acceptance Mask" "Ignored,Used"
|
|
bitfld.word 0x00 11. " TXIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " RXIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " RMTEN ,Remote Enable" "Unchanged,Set"
|
|
bitfld.word 0x00 8. " TXRQST ,Transmit Request" "Not requested,Requested"
|
|
bitfld.word 0x00 7. " EOB ,End of Buffer" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.word 0x00 0.--3. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
group.word (0x20+0x1c)++0x1
|
|
line.word 0x00 "CAN_IF1_DA1R,IF1 Data A Register 1"
|
|
hexmask.word.byte 0x00 8.--15. 1. " DATA1 ,Data 1"
|
|
hexmask.word.byte 0x00 0.--7. 1. " DATA0 ,Data 0"
|
|
group.word (0x20+0x20)++0x1
|
|
line.word 0x00 "CAN_IF1_DA2R,IF1 Data A Register 2"
|
|
hexmask.word.byte 0x00 8.--15. 1. " DATA3 ,Data 3"
|
|
hexmask.word.byte 0x00 0.--7. 1. " DATA2 ,Data 2"
|
|
group.word (0x20+0x24)++0x1
|
|
line.word 0x00 "CAN_IF1_DB1R,IF1 Data B Register 1"
|
|
hexmask.word.byte 0x00 8.--15. 1. " DATA5 ,Data 5"
|
|
hexmask.word.byte 0x00 0.--7. 1. " DATA4 ,Data 4"
|
|
group.word (0x20+0x28)++0x1
|
|
line.word 0x00 "CAN_IF1_DB2R,IF1 Data B Register 2"
|
|
hexmask.word.byte 0x00 8.--15. 1. " DATA7 ,Data 7"
|
|
hexmask.word.byte 0x00 0.--7. 1. " DATA6 ,Data 6"
|
|
group.word 0x80++0x1 "MIF2"
|
|
line.word 0x00 "CAN_IF2_CRR,IF2 Command Request Register"
|
|
bitfld.word 0x00 15. " BUSY ,Busy Flag" "Idle,Busy"
|
|
bitfld.word 0x00 0.--5. " MESSAGE_NUMBER ,Message Number" "0(Interpreted as 32),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33(Interpreted as 1),34(Interpreted as 2),35(Interpreted as 3),36(Interpreted as 4),37(Interpreted as 5),38(Interpreted as 6),39(Interpreted as 7),40(Interpreted as 8),41(Interpreted as 9),42(Interpreted as 10),43(Interpreted as 11),44(Interpreted as 12),45(Interpreted as 13),46(Interpreted as 14),47(Interpreted as 15),48(Interpreted as 16),49(Interpreted as 17),50(Interpreted as 18),51(Interpreted as 19),52(Interpreted as 20),53(Interpreted as 21),54(Interpreted as 22),55(Interpreted as 23),56(Interpreted as 24),57(Interpreted as 25),58(Interpreted as 26),59(Interpreted as 27),60(Interpreted as 28),61(Interpreted as 29),62(Interpreted as 30),63(Interpreted as 31)"
|
|
if (((d.w(asd:(0x10184000+0x80+0x4)))&0x80)==0x80)
|
|
group.word (0x80+0x4)++0x1
|
|
line.word 0x00 "CAN_IF2_CMR,IF2 Command Mask Register"
|
|
bitfld.word 0x00 7. " WR/RD ,Write / Read" "Read,Write"
|
|
bitfld.word 0x00 6. " MASK ,Access Mask Bits" "Unchanged,Transfer Mask+MDir+MXtd"
|
|
textline " "
|
|
bitfld.word 0x00 5. " ARB ,Access Arbitration Bits" "Unchanged,Transfer Id+Dir+Xtd+MsgVal"
|
|
textline " "
|
|
bitfld.word 0x00 4. " CONTROL ,Access Control Bits" "Unchanged,Transfer control"
|
|
bitfld.word 0x00 3. " CLRINTPND ,Clear Interrupt Pending" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 2. " TXRQST ,Access Transmission Request" "No requested,Requested"
|
|
bitfld.word 0x00 1. " DATA_A ,Data A Access Data Bytes 3:0" "Unchanged,Transfered"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DATA_B ,Data B Access Data Bytes 7:4" "Unchanged,Transfered"
|
|
else
|
|
group.word (0x80+0x4)++0x1
|
|
line.word 0x00 "CAN_IF2_CMR,IF2 Command Mask Register"
|
|
bitfld.word 0x00 7. " WR/RD ,Write / Read" "Read,Write"
|
|
bitfld.word 0x00 6. " MASK ,Access Mask Bits" "Unchanged,Transfer Mask+MDir+MXtd"
|
|
textline " "
|
|
bitfld.word 0x00 5. " ARB ,Access Arbitration Bits" "Unchanged,Transfer Id+Dir+Xtd+MsgVal"
|
|
textline " "
|
|
bitfld.word 0x00 4. " CONTROL ,Access Control Bits" "Unchanged,Transfer control"
|
|
bitfld.word 0x00 3. " CLRINTPND ,Clear Interrupt Pending" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 2. " NEWDAT ,Clear NewDat Bit" "Unchanged,Cleared"
|
|
bitfld.word 0x00 1. " DATA_A ,Data A Access Data Bytes 3:0" "Unchanged,Transfered"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DATA_B ,AData B Access Data Bytes 7:4" "Unchanged,Transfered"
|
|
endif
|
|
group.word (0x80+0x8)++0x1
|
|
line.word 0x00 "CAN_IF2_M1R,IF2 Mask 1 Register"
|
|
bitfld.word 0x00 15. " MSK[15:0] ,Mask Bit 15" "0,1"
|
|
bitfld.word 0x00 14. ",Mask Bit 14" "0,1"
|
|
bitfld.word 0x00 13. ",Mask Bit 13" "0,1"
|
|
bitfld.word 0x00 12. ",Mask Bit 12" "0,1"
|
|
bitfld.word 0x00 11. ",Mask Bit 11" "0,1"
|
|
bitfld.word 0x00 10. ",Mask Bit 10" "0,1"
|
|
bitfld.word 0x00 9. ",Mask Bit 9" "0,1"
|
|
bitfld.word 0x00 8. ",Mask Bit 8" "0,1"
|
|
bitfld.word 0x00 7. ",Mask Bit 7" "0,1"
|
|
bitfld.word 0x00 6. ",Mask Bit 6" "0,1"
|
|
bitfld.word 0x00 5. ",Mask Bit 5" "0,1"
|
|
bitfld.word 0x00 4. ",Mask Bit 4" "0,1"
|
|
bitfld.word 0x00 3. ",Mask Bit 3" "0,1"
|
|
bitfld.word 0x00 2. ",Mask Bit 2" "0,1"
|
|
bitfld.word 0x00 1. ",Mask Bit 1" "0,1"
|
|
bitfld.word 0x00 0. ",Mask Bit 0" "0,1"
|
|
group.word (0x80+0xc)++0x1
|
|
line.word 0x00 "CAN_IF2_M2R,IF2 Mask 2 Register"
|
|
bitfld.word 0x00 15. " MXTD ,Mask Extended Identifier" "Not used,Used"
|
|
bitfld.word 0x00 14. " MDIR ,Mask Message Direction" "Not used,Used"
|
|
textline " "
|
|
bitfld.word 0x00 12. " MSK[28:16] ,Mask Bit 28" "0,1"
|
|
bitfld.word 0x00 11. ",Mask Bit 27" "0,1"
|
|
bitfld.word 0x00 10. ",Mask Bit 26" "0,1"
|
|
bitfld.word 0x00 9. ",Mask Bit 25" "0,1"
|
|
bitfld.word 0x00 8. ",Mask Bit 24" "0,1"
|
|
bitfld.word 0x00 7. ",Mask Bit 23" "0,1"
|
|
bitfld.word 0x00 6. ",Mask Bit 22" "0,1"
|
|
bitfld.word 0x00 5. ",Mask Bit 21" "0,1"
|
|
bitfld.word 0x00 4. ",Mask Bit 20" "0,1"
|
|
bitfld.word 0x00 3. ",Mask Bit 19" "0,1"
|
|
bitfld.word 0x00 2. ",Mask Bit 18" "0,1"
|
|
bitfld.word 0x00 1. ",Mask Bit 17" "0,1"
|
|
bitfld.word 0x00 0. ",Mask Bit 16" "0,1"
|
|
group.word (0x80+0x10)++0x1
|
|
line.word 0x00 "CAN_IF2_A1R,IF2 Message Arbitration 1 Register"
|
|
group.word (0x80+0x14)++0x1
|
|
line.word 0x00 "CAN_IF2_A2R,IF2 Message Arbitration 2 Register"
|
|
bitfld.word 0x00 15. " MSGVAL ,Message Valid" "Ignored,Considered"
|
|
bitfld.word 0x00 14. " XTD ,Extended Identifier" "Standard,Extended"
|
|
bitfld.word 0x00 13. " DIR ,Message Direction" "Received,Transmit"
|
|
textline " "
|
|
hexmask.word 0x00 0.--12. 1. " ID[28:16] ,Message Identifier"
|
|
group.word (0x80+0x18)++0x1
|
|
line.word 0x00 "CAN_IF2_MCR,IF2 Message Control Register"
|
|
bitfld.word 0x00 15. " NEWDAT ,New data" "No new data,New data"
|
|
bitfld.word 0x00 14. " MSGLST ,Message Lost" "Not lost,Lost"
|
|
bitfld.word 0x00 13. " INDPND ,Interrupt Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 12. " UMASK ,Use Acceptance Mask" "Ignored,Used"
|
|
bitfld.word 0x00 11. " TXIE ,Transmit Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " RXIE ,Receive Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " RMTEN ,Remote Enable" "Unchanged,Set"
|
|
bitfld.word 0x00 8. " TXRQST ,Transmit Request" "Not requested,Requested"
|
|
bitfld.word 0x00 7. " EOB ,End of Buffer" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.word 0x00 0.--3. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
group.word (0x80+0x1c)++0x1
|
|
line.word 0x00 "CAN_IF2_DA1R,IF2 Data A Register 1"
|
|
hexmask.word.byte 0x00 8.--15. 1. " DATA1 ,Data 1"
|
|
hexmask.word.byte 0x00 0.--7. 1. " DATA0 ,Data 0"
|
|
group.word (0x80+0x20)++0x1
|
|
line.word 0x00 "CAN_IF2_DA2R,IF2 Data A Register 2"
|
|
hexmask.word.byte 0x00 8.--15. 1. " DATA3 ,Data 3"
|
|
hexmask.word.byte 0x00 0.--7. 1. " DATA2 ,Data 2"
|
|
group.word (0x80+0x24)++0x1
|
|
line.word 0x00 "CAN_IF2_DB1R,IF2 Data B Register 1"
|
|
hexmask.word.byte 0x00 8.--15. 1. " DATA5 ,Data 5"
|
|
hexmask.word.byte 0x00 0.--7. 1. " DATA4 ,Data 4"
|
|
group.word (0x80+0x28)++0x1
|
|
line.word 0x00 "CAN_IF2_DB2R,IF2 Data B Register 2"
|
|
hexmask.word.byte 0x00 8.--15. 1. " DATA7 ,Data 7"
|
|
hexmask.word.byte 0x00 0.--7. 1. " DATA6 ,Data 6"
|
|
tree.end
|
|
tree "Message Handler Registers"
|
|
width 11.
|
|
rgroup.word 0x10++0x1
|
|
line.word 0x00 "CAN_IDR, Interrupt Identifier Register"
|
|
rgroup.word 0x100++0x1
|
|
line.word 0x00 "CAN_TXR1R,Transmission Request Register 1"
|
|
bitfld.word 0x00 15. " TXRQST16 ,Transmission Request 16" "Not requested,Requested"
|
|
bitfld.word 0x00 14. " TXRQST15 ,Transmission Request 15" "Not requested,Requested"
|
|
bitfld.word 0x00 13. " TXRQST14 ,Transmission Request 14" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 12. " TXRQST13 ,Transmission Request 13" "Not requested,Requested"
|
|
bitfld.word 0x00 11. " TXRQST12 ,Transmission Request 12" "Not requested,Requested"
|
|
bitfld.word 0x00 10. " TXRQST11 ,Transmission Request 11" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 9. " TXRQST10 ,Transmission Request 10" "Not requested,Requested"
|
|
bitfld.word 0x00 8. " TXRQST9 ,Transmission Request 9" "Not requested,Requested"
|
|
bitfld.word 0x00 7. " TXRQST8 ,Transmission Request 8" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 6. " TXRQST7 ,Transmission Request 7" "Not requested,Requested"
|
|
bitfld.word 0x00 5. " TXRQST6 ,Transmission Request 6" "Not requested,Requested"
|
|
bitfld.word 0x00 4. " TXRQST5 ,Transmission Request 5" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 3. " TXRQST4 ,Transmission Request 4" "Not requested,Requested"
|
|
bitfld.word 0x00 2. " TXRQST3 ,Transmission Request 3" "Not requested,Requested"
|
|
bitfld.word 0x00 1. " TXRQST2 ,Transmission Request 2" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 0. " TXRQST1 ,Transmission Request 1" "Not requested,Requested"
|
|
rgroup.word 0x104++0x1
|
|
line.word 0x00 "CAN_TXR2R,Transmission Request Register 2"
|
|
bitfld.word 0x00 15. " TXRQST32 ,Transmission Request 32" "Not requested,Requested"
|
|
bitfld.word 0x00 14. " TXRQST31 ,Transmission Request 31" "Not requested,Requested"
|
|
bitfld.word 0x00 13. " TXRQST30 ,Transmission Request 30" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 12. " TXRQST29 ,Transmission Request 29" "Not requested,Requested"
|
|
bitfld.word 0x00 11. " TXRQST28 ,Transmission Request 28" "Not requested,Requested"
|
|
bitfld.word 0x00 10. " TXRQST27 ,Transmission Request 27" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 9. " TXRQST26 ,Transmission Request 26" "Not requested,Requested"
|
|
bitfld.word 0x00 8. " TXRQST25 ,Transmission Request 25" "Not requested,Requested"
|
|
bitfld.word 0x00 7. " TXRQST24 ,Transmission Request 24" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 6. " TXRQST23 ,Transmission Request 23" "Not requested,Requested"
|
|
bitfld.word 0x00 5. " TXRQST22 ,Transmission Request 22" "Not requested,Requested"
|
|
bitfld.word 0x00 4. " TXRQST21 ,Transmission Request 21" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 3. " TXRQST20 ,Transmission Request 20" "Not requested,Requested"
|
|
bitfld.word 0x00 2. " TXRQST19 ,Transmission Request 19" "Not requested,Requested"
|
|
bitfld.word 0x00 1. " TXRQST18 ,Transmission Request 18" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 0. " TXRQST17 ,Transmission Request 17" "Not requested,Requested"
|
|
rgroup.word 0x120++0x1
|
|
line.word 0x00 "CAN_ND1R,New Data Register 1"
|
|
bitfld.word 0x00 15. " NEWDAT16 ,New Data 16" "Not occurred,Occurred"
|
|
bitfld.word 0x00 14. " NEWDAT15 ,New Data 15" "Not occurred,Occurred"
|
|
bitfld.word 0x00 13. " NEWDAT14 ,New Data 14" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 12. " NEWDAT13 ,New Data 13" "Not occurred,Occurred"
|
|
bitfld.word 0x00 11. " NEWDAT12 ,New Data 12" "Not occurred,Occurred"
|
|
bitfld.word 0x00 10. " NEWDAT11 ,New Data 11" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 9. " NEWDAT10 ,New Data 10" "Not occurred,Occurred"
|
|
bitfld.word 0x00 8. " NEWDAT9 ,New Data 9" "Not occurred,Occurred"
|
|
bitfld.word 0x00 7. " NEWDAT8 ,New Data 8" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 6. " NEWDAT7 ,New Data 7" "Not occurred,Occurred"
|
|
bitfld.word 0x00 5. " NEWDAT6 ,New Data 6" "Not occurred,Occurred"
|
|
bitfld.word 0x00 4. " NEWDAT5 ,New Data 5" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 3. " NEWDAT4 ,New Data 4" "Not occurred,Occurred"
|
|
bitfld.word 0x00 2. " NEWDAT3 ,New Data 3" "Not occurred,Occurred"
|
|
bitfld.word 0x00 1. " NEWDAT2 ,New Data 2" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 0. " NEWDAT1 ,New Data 1" "Not occurred,Occurred"
|
|
rgroup.word 0x124++0x1
|
|
line.word 0x00 "CAN_ND2R,New Data Register 2"
|
|
bitfld.word 0x00 15. " NEWDAT32 ,New Data 32" "Not occurred,Occurred"
|
|
bitfld.word 0x00 14. " NEWDAT31 ,New Data 31" "Not occurred,Occurred"
|
|
bitfld.word 0x00 13. " NEWDAT30 ,New Data 30" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 12. " NEWDAT29 ,New Data 29" "Not occurred,Occurred"
|
|
bitfld.word 0x00 11. " NEWDAT28 ,New Data 28" "Not occurred,Occurred"
|
|
bitfld.word 0x00 10. " NEWDAT27 ,New Data 27" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 9. " NEWDAT26 ,New Data 26" "Not occurred,Occurred"
|
|
bitfld.word 0x00 8. " NEWDAT25 ,New Data 25" "Not occurred,Occurred"
|
|
bitfld.word 0x00 7. " NEWDAT24 ,New Data 24" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 6. " NEWDAT23 ,New Data 23" "Not occurred,Occurred"
|
|
bitfld.word 0x00 5. " NEWDAT22 ,New Data 22" "Not occurred,Occurred"
|
|
bitfld.word 0x00 4. " NEWDAT21 ,New Data 21" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 3. " NEWDAT20 ,New Data 20" "Not occurred,Occurred"
|
|
bitfld.word 0x00 2. " NEWDAT19 ,New Data 19" "Not occurred,Occurred"
|
|
bitfld.word 0x00 1. " NEWDAT18 ,New Data 18" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.word 0x00 0. " NEWDAT17 ,New Data 17" "Not occurred,Occurred"
|
|
rgroup.word 0x140++0x1
|
|
line.word 0x00 "CAN_IP1R,Interrupt Pending Register 1"
|
|
bitfld.word 0x00 15. " INTPND16 ,Interrupt 16 Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 14. " INTPND15 ,Interrupt 15 Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 13. " INTPND14 ,Interrupt 14 Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 12. " INTPND13 ,Interrupt 13 Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 11. " INTPND12 ,Interrupt 12 Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 10. " INTPND11 ,Interrupt 11 Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 9. " INTPND10 ,Interrupt 10 Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 8. " INTPND9 ,Interrupt 9 Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 7. " INTPND8 ,Interrupt 8 Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 6. " INTPND7 ,Interrupt 7 Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 5. " INTPND6 ,Interrupt 6 Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 4. " INTPND5 ,Interrupt 5 Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 3. " INTPND4 ,Interrupt 4 Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 2. " INTPND3 ,Interrupt 3 Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 1. " INTPND2 ,Interrupt 2 Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 0. " INTPND1 ,Interrupt 1 Pending" "Not pending,Pending"
|
|
rgroup.word 0x144++0x1
|
|
line.word 0x00 "CAN_IP2R,Interrupt Pending Register 2"
|
|
bitfld.word 0x00 15. " INTPND32 ,Interrupt 32 Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 14. " INTPND31 ,Interrupt 31 Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 13. " INTPND30 ,Interrupt 30 Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 12. " INTPND29 ,Interrupt 29 Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 11. " INTPND28 ,Interrupt 28 Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 10. " INTPND27 ,Interrupt 27 Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 9. " INTPND26 ,Interrupt 26 Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 8. " INTPND25 ,Interrupt 25 Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 7. " INTPND24 ,Interrupt 24 Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 6. " INTPND23 ,Interrupt 23 Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 5. " INTPND22 ,Interrupt 22 Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 4. " INTPND21 ,Interrupt 21 Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 3. " INTPND20 ,Interrupt 20 Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 2. " INTPND19 ,Interrupt 19 Pending" "Not pending,Pending"
|
|
bitfld.word 0x00 1. " INTPND18 ,Interrupt 18 Pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.word 0x00 0. " INTPND17 ,Interrupt 17 Pending" "Not pending,Pending"
|
|
rgroup.word 0x160++0x1
|
|
line.word 0x00 "CAN_MV1R,Message Valid Register 1"
|
|
bitfld.word 0x00 15. " MSGVAL16 ,Message 16 Valid" "Ignored,Considered"
|
|
bitfld.word 0x00 14. " MSGVAL15 ,Message 15 Valid" "Ignored,Considered"
|
|
bitfld.word 0x00 13. " MSGVAL14 ,Message 14 Valid" "Ignored,Considered"
|
|
textline " "
|
|
bitfld.word 0x00 12. " MSGVAL13 ,Message 13 Valid" "Ignored,Considered"
|
|
bitfld.word 0x00 11. " MSGVAL12 ,Message 12 Valid" "Ignored,Considered"
|
|
bitfld.word 0x00 10. " MSGVAL11 ,Message 11 Valid" "Ignored,Considered"
|
|
textline " "
|
|
bitfld.word 0x00 9. " MSGVAL10 ,Message 10 Valid" "Ignored,Considered"
|
|
bitfld.word 0x00 8. " MSGVAL9 ,Message 9 Valid" "Ignored,Considered"
|
|
bitfld.word 0x00 7. " MSGVAL8 ,Message 8 Valid" "Ignored,Considered"
|
|
textline " "
|
|
bitfld.word 0x00 6. " MSGVAL7 ,Message 7 Valid" "Ignored,Considered"
|
|
bitfld.word 0x00 5. " MSGVAL6 ,Message 6 Valid" "Ignored,Considered"
|
|
bitfld.word 0x00 4. " MSGVAL5 ,Message 5 Valid" "Ignored,Considered"
|
|
textline " "
|
|
bitfld.word 0x00 3. " MSGVAL4 ,Message 4 Valid" "Ignored,Considered"
|
|
bitfld.word 0x00 2. " MSGVAL3 ,Message 3 Valid" "Ignored,Considered"
|
|
bitfld.word 0x00 1. " MSGVAL2 ,Message 2 Valid" "Ignored,Considered"
|
|
textline " "
|
|
bitfld.word 0x00 0. " MSGVAL1 ,Message 1 Valid" "Ignored,Considered"
|
|
rgroup.word 0x164++0x1
|
|
line.word 0x00 "CAN_MV2R,Message Valid Register 2"
|
|
bitfld.word 0x00 15. " MSGVAL32 ,Message 32 Valid" "Ignored,Considered"
|
|
bitfld.word 0x00 14. " MSGVAL31 ,Message 31 Valid" "Ignored,Considered"
|
|
bitfld.word 0x00 13. " MSGVAL30 ,Message 30 Valid" "Ignored,Considered"
|
|
textline " "
|
|
bitfld.word 0x00 12. " MSGVAL29 ,Message 29 Valid" "Ignored,Considered"
|
|
bitfld.word 0x00 11. " MSGVAL28 ,Message 28 Valid" "Ignored,Considered"
|
|
bitfld.word 0x00 10. " MSGVAL27 ,Message 27 Valid" "Ignored,Considered"
|
|
textline " "
|
|
bitfld.word 0x00 9. " MSGVAL26 ,Message 26 Valid" "Ignored,Considered"
|
|
bitfld.word 0x00 8. " MSGVAL25 ,Message 25 Valid" "Ignored,Considered"
|
|
bitfld.word 0x00 7. " MSGVAL24 ,Message 24 Valid" "Ignored,Considered"
|
|
textline " "
|
|
bitfld.word 0x00 6. " MSGVAL23 ,Message 23 Valid" "Ignored,Considered"
|
|
bitfld.word 0x00 5. " MSGVAL22 ,Message 22 Valid" "Ignored,Considered"
|
|
bitfld.word 0x00 4. " MSGVAL21 ,Message 21 Valid" "Ignored,Considered"
|
|
textline " "
|
|
bitfld.word 0x00 3. " MSGVAL20 ,Message 20 Valid" "Ignored,Considered"
|
|
bitfld.word 0x00 2. " MSGVAL19 ,Message 19 Valid" "Ignored,Considered"
|
|
bitfld.word 0x00 1. " MSGVAL18 ,Message 18 Valid" "Ignored,Considered"
|
|
textline " "
|
|
bitfld.word 0x00 0. " MSGVAL17 ,Message 17 Valid" "Ignored,Considered"
|
|
tree.end
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree "TSC (Touch Screen Controller)"
|
|
base asd:0x1018C000
|
|
width 15.
|
|
rgroup.long 0x00++0x7 "System ID and Control Registers"
|
|
line.long 0x00 "CHIP_ID,CHIP ID Register"
|
|
line.long 0x04 "VERSION_ID,VERSION ID Register"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "SYSCON,System Control Register"
|
|
bitfld.long 0x00 1. " TSC_CLK_GATING ,TSC clock gating" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ADC_CLK_GATING ,ADC clock gating" "Disabled,Enabled"
|
|
group.long 0x20++0x17 "Interrupt Control and DMA Registers"
|
|
line.long 0x00 "DMAREG,DMA Request Enable Register"
|
|
bitfld.long 0x00 0. " DMA_EN ,DMA request enable" "Disabled,Enabled"
|
|
line.long 0x04 "ICR,Interrupt Control Register"
|
|
bitfld.long 0x04 0. " IC0 ,Global interrupt mask" "Not masked,Masked"
|
|
line.long 0x08 "IER,Interrupt Enable Mask Register"
|
|
bitfld.long 0x08 6. " IE5 ,ADC interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x08 4. " IE4 ,FIFO Empty interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x08 3. " IE3 ,FIFO Full interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x08 2. " IE2 ,FIFO Overflow interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x08 1. " IE1 ,FIFO threshold interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x08 0. " IE0 ,Touch detect interrupt mask" "Not masked,Masked"
|
|
line.long 0x0C "ISR,Interrupt Status Register"
|
|
bitfld.long 0x0C 6. " IS5 ,ADC interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 4. " IS4 ,FIFO Emptyinterrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 3. " IS3 ,FIFO Full interrupt status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x0C 2. " IS2 ,FIFO Overflow interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 1. " IS1 ,FIFO threshold interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x0C 0. " IS0 ,Touch detect interrupt status" "No interrupt,Interrupt"
|
|
line.long 0x10 "IEADCR,Interrupt Enable ADC Mask Register"
|
|
bitfld.long 0x10 7. " IEA7 ,Interrupt enable ADC mask 7" "Not masked,Masked"
|
|
bitfld.long 0x10 6. " IEA6 ,Interrupt enable ADC mask 6" "Not masked,Masked"
|
|
bitfld.long 0x10 5. " IEA5 ,Interrupt enable ADC mask 5" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x10 4. " IEA4 ,Interrupt enable ADC mask 4" "Not masked,Masked"
|
|
bitfld.long 0x10 3. " IEA3 ,Interrupt enable ADC mask 3" "Not masked,Masked"
|
|
bitfld.long 0x10 2. " IEA2 ,Interrupt enable ADC mask 2" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x10 1. " IEA1 ,Interrupt enable ADC mask 1" "Not masked,Masked"
|
|
bitfld.long 0x10 0. " IEA0 ,Interrupt enable ADC mask 0" "Not masked,Masked"
|
|
line.long 0x14 "ISADCR,Interrupt Status ADC Register"
|
|
bitfld.long 0x14 7. " ISA7 ,Interrupt status ADC 7" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 6. " ISA6 ,Interrupt status ADC 6" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 5. " ISA5 ,Interrupt status ADC 5" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x14 4. " ISA4 ,Interrupt status ADC 4" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 3. " ISA3 ,Interrupt status ADC 3" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 2. " ISA2 ,Interrupt status ADC 2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ISA1 ,Interrupt status ADC 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x14 0. " ISA0 ,Interrupt status ADC 0" "No interrupt,Interrupt"
|
|
group.long 0x40++0xB "ADC Control Registers"
|
|
line.long 0x00 "ADCCTRL1,ADC Control Register 1"
|
|
bitfld.long 0x00 2. " RAFSEL_STATUS ,ADC Reference selection status" "External,Internal"
|
|
bitfld.long 0x00 1. " RAFSEL ,ADC Reference selection" "External,Internal"
|
|
bitfld.long 0x00 0. " ADC_EN_STATUS ,Status if ADC IP" "Idle,Active"
|
|
line.long 0x04 "ADCCTRL2,ADC Control Register 2"
|
|
bitfld.long 0x04 0.--1. " FREQ ,ADC Clock frequency divider" "By 6,By 12,By 6,By 6"
|
|
line.long 0x08 "ADC_CAPTURE,ADC Capture Register"
|
|
bitfld.long 0x08 7. " CH7 ,ADC Channel 7 data capture" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " CH6 ,ADC Channel 6 data capture" "Disabled,Enabled"
|
|
bitfld.long 0x08 5. " CH5 ,ADC Channel 5 data capture" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 4. " CH4 ,ADC Channel 4 data capture" "Disabled,Enabled"
|
|
bitfld.long 0x08 3. " CH3 ,ADC Channel 3 data capture" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " CH2 ,ADC Channel 2 data capture" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 1. " CH1 ,ADC Channel 1 data capture" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " CH0 ,ADC Channel 0 data capture" "Disabled,Enabled"
|
|
rgroup.long 0x80++0x1F
|
|
line.long 0x0 "ADCDATA0,ADC Data Register 0"
|
|
hexmask.long.word 0x0 0.--9. 1. " DATA ,ADC Channel data"
|
|
line.long 0x4 "ADCDATA1,ADC Data Register 1"
|
|
hexmask.long.word 0x4 0.--9. 1. " DATA ,ADC Channel data"
|
|
line.long 0x8 "ADCDATA2,ADC Data Register 2"
|
|
hexmask.long.word 0x8 0.--9. 1. " DATA ,ADC Channel data"
|
|
line.long 0xC "ADCDATA3,ADC Data Register 3"
|
|
hexmask.long.word 0xC 0.--9. 1. " DATA ,ADC Channel data"
|
|
line.long 0x10 "ADCDATA4,ADC Data Register 4"
|
|
hexmask.long.word 0x10 0.--9. 1. " DATA ,ADC Channel data"
|
|
line.long 0x14 "ADCDATA5,ADC Data Register 5"
|
|
hexmask.long.word 0x14 0.--9. 1. " DATA ,ADC Channel data"
|
|
line.long 0x18 "ADCDATA6,ADC Data Register 6"
|
|
hexmask.long.word 0x18 0.--9. 1. " DATA ,ADC Channel data"
|
|
line.long 0x1C "ADCDATA7,ADC Data Register 7"
|
|
hexmask.long.word 0x1C 0.--9. 1. " DATA ,ADC Channel data"
|
|
group.long 0xC0++0x1F "TSC Registers"
|
|
line.long 0x00 "TSCCTRL,Touch Screen Control Register"
|
|
bitfld.long 0x00 7. " TOUCHDETECT ,Touch detection status" "Not touched,Touched"
|
|
bitfld.long 0x00 4.--6. " WDWTRACKIDX ,Window tracking index" "No tracking,4,8,16,32,64,92,127"
|
|
textline " "
|
|
bitfld.long 0x00 1.--3. " OPMODE ,Touch screen operating mode" "X/Y/Z acquired,X/Y acquired,X acquired,Y acquired,Z acquired,X/Y/Z acquired,X/Y/Z acquired,X/Y/Z acquired"
|
|
bitfld.long 0x00 0. " EN ,Touch screen controller enable" "Disabled,Enabled"
|
|
line.long 0x04 "TSCCONGFIG,Touch Screen Configuration Register"
|
|
bitfld.long 0x04 6.--7. " AVECTRL ,Averaging control" "1 sample,2 samples,4 samples,8 samples"
|
|
bitfld.long 0x04 3.--5. " TDETDLY ,Touch detect delay" "10us,50us,100us,500us,1ms,5ms,10ms,50ms"
|
|
textline " "
|
|
bitfld.long 0x04 0.--2. " PANELVOLT ,Panel voltage settling time" "10us,100us,500us,1ms,5ms,10ms,50ms,100ms"
|
|
line.long 0x08 "TSCWDWTRX,Tracking Window Top Right X-coordinate Register"
|
|
hexmask.long.word 0x08 0.--11. 1. " D[11:0] ,TSC Window top right X coordinate"
|
|
line.long 0x0C "TSCWDWTRY,Tracking Window Top Right Y-coordinate Register"
|
|
hexmask.long.word 0x0C 0.--11. 1. " D[11:0] ,TSC Window top right Y coordinate"
|
|
line.long 0x10 "TSCWDWBLX,Tracking Window Bottom Left X-coordinate Register"
|
|
hexmask.long.word 0x10 0.--11. 1. " D[11:0] ,TSC Window bottom left X coordinate"
|
|
line.long 0x14 "TSCWDWBLY,Tracking Window Bottom Left Y-coordinate Register"
|
|
hexmask.long.word 0x14 0.--11. 1. " D[11:0] ,TSC Window bottom left Y coordinate"
|
|
line.long 0x18 "TSCFIFOTHRES,Touch Screen FIFO Threshold Value Register"
|
|
hexmask.long.byte 0x18 0.--6. 1. " TSCFIFOTHRES ,Touch screen FIFO threshold value"
|
|
line.long 0x1C "TSCFIFOCTRLSTS,Touch Screen FIFO Control and Status Register"
|
|
bitfld.long 0x1C 7. " FIFO_OF ,FIFO Overflow status" "No overflow,Overflow"
|
|
bitfld.long 0x1C 6. " FIFO_FULL ,FIFO Full status" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x1C 5. " FIFO_EMPTY ,FIFO Empty status" "Not empty,Empty"
|
|
bitfld.long 0x1C 4. " FIFO_THRES_TRIG ,FIFO Threshold trigger" "Below,Beyond"
|
|
textline " "
|
|
bitfld.long 0x1C 0. " FIFO_RESET ,FIFO Reset" "No reset,Reset"
|
|
rgroup.long 0xE0++0x13
|
|
line.long 0x00 "TSCFIFOSZ,Touch Screen Current FIFO Size Register"
|
|
hexmask.long.byte 0x00 0.--6. 1. " TSCFIFOSZ ,Current size of FIFO being filled with data"
|
|
line.long 0x04 "TSCDATAX,Touch Screen X-coordinate Register"
|
|
hexmask.long.word 0x04 0.--11. 1. " D[11:0] ,TSC Data for X coordinate"
|
|
line.long 0x08 "TSCDATAY,Touch Screen Y-coordinate Register"
|
|
hexmask.long.word 0x08 0.--11. 1. " D[11:0] ,TSC Data for Y coordinate"
|
|
line.long 0x0C "TSCDATAZ,Touch Screen Z-coordinate Register"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " D[7:0] ,TSC Data for Z coordinate"
|
|
line.long 0x10 "TSCDATAXYZ,Touch Screen X, Y, Z-coordinate Register"
|
|
hexmask.long.word 0x10 20.--31. 1. " D[31:20] ,X coordinate"
|
|
textline " "
|
|
hexmask.long.word 0x10 8.--19. 1. " D[19:8] ,Y coordinate"
|
|
textline " "
|
|
hexmask.long.byte 0x10 0.--7. 1. " D[7:0] ,Z coordinate"
|
|
group.long 0xF4++0x03
|
|
line.long 0x00 "TSCFRACTIONZ,Touch Screen Z Value Fraction Control Register"
|
|
bitfld.long 0x00 0.--2. " FRACTIONZ ,Data Z fractional control" "Frac 0/Int 8,Frac 1/Int 7,Frac 2/Int 6,Frac 3/Int 5,Frac 4/Int 4,Frac 5/Int 3,Frac 6/Int 2,Frac 7/Int 1"
|
|
group.long 0xFC++0x03
|
|
line.long 0x00 "TSCIDRIVE,Touch Screen I Drive Register"
|
|
bitfld.long 0x00 3. " RATIO_B ,IO supply ratio of B pad" "2mA,8mA"
|
|
bitfld.long 0x00 2. " RATIO_A ,IO supply ratio of A pad" "2mA,8mA"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DRVSRC ,Drive source" "A only,Both"
|
|
bitfld.long 0x00 0. " DRVSNK ,Drive sink" "A only,Both"
|
|
width 11.
|
|
tree.end
|
|
sif ((cpu()=="STA2065")||(cpu()=="STA2165"))
|
|
tree "ARM9 Interrupt Selection"
|
|
base asd:0x101C3000
|
|
width 21.
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "ARM9INTMASK,Mask Register Set/Clear"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " IRQ31_Set/Clr ,MSP1 Combined Interrupt" "Not masked,Masked"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " IRQ30_Set/Clr ,MSP3 Combined Interrupt" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " IRQ29_Set/Clr ,SGA IT" "Not masked,Masked"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " IRQ28_Set/Clr ,TSC_INT" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " IRQ27_Set/Clr ,AC97 Combined Interrupt" "Not masked,Masked"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " IRQ26_Set/Clr ,SCIINTR (Smart Card Interrupt)" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " IRQ25_Set/Clr ,GPIO4 Combined interrupt" "Not masked,Masked"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " IRQ24_Set/Clr ,SD/MMC2 Combined interrupt" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " IRQ23_Set/Clr ,I2C2 Combined interrupt" "Not masked,Masked"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " IRQ22_Set/Clr ,CAN1 Combined Interrupt" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " IRQ21_Set/Clr ,CAN0 Combined Interrupt" "Not masked,Masked"
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " IRQ20_Set/Clr ,SaRaC Combined Interrupt (SaRaC_INT_DRF, SaRaC_INT_DRF)" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " IRQ19_Set/Clr ,C3 Interrupt 2 (IREQ_TATI)" "Not masked,Masked"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " IRQ18_Set/Clr ,C3 Interrupt 1(IREQ_C3_FORMATOR)" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " IRQ17_Set/Clr ,C3 Interrupt 0 (SPDIF_RX_INT)" "Not masked,Masked"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " IRQ16_Set/Clr ,SSP1 Combined Interrupt" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " IRQ15_Set/Clr ,MSP2 Combined Interrupt" "Not masked,Masked"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " IRQ14_Set/Clr ,UART3 Combined Interrupt" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " IRQ13_Set/Clr ,SD/MMC1Combined interrupt" "Not masked,Masked"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " IRQ12_Set/Clr ,UART2 Combined Interrupt" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " IRQ11_Set/Clr ,SD/SDIO/MMC 0 Combined interrupt" "Not masked,Masked"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " IRQ10_Set/Clr ,I2C1 Combined Interrupt" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " IRQ9_Set/Clr ,I2C0 Combined Interrupt" "Not masked,Masked"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " IRQ8_Set/Clr ,MSP0 Combined interrupt" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " IRQ7_Set/Clr ,UART1 Combined interrupt" "Not masked,Masked"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " IRQ6_Set/Clr ,UART0 Combined interrupt" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " IRQ5_Set/Clr ,SSP0 Combined interrupt" "Not masked,Masked"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " IRQ4_Set/Clr ,GPIO3 Combined interrupt" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " IRQ3_Set/Clr ,GPIO2 Combined interrupt" "Not masked,Masked"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " IRQ2_Set/Clr ,GPIO1 Combined interrupt" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " IRQ1_Set/Clr ,GPIO0 Combined interrupt" "Not masked,Masked"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " IRQ0_Set/Clr ,EFT0 Combined Interrupt" "Not masked,Masked"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "ARM9INTPEND,PEND Register"
|
|
bitfld.long 0x00 31. " IRQ31 ,MSP1 Combined Interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 30. " IRQ30 ,MSP3 Combined Interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 29. " IRQ29 ,SGA IT pending" "Not pending,Pending"
|
|
bitfld.long 0x00 28. " IRQ28 ,TSC_INT pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 27. " IRQ27 ,AC97 Combined Interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 26. " IRQ26 ,SCIINTR (Smart Card Interrupt) pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQ25 ,GPIO4 Combined Interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " IRQ24 ,SD/MMC2 Combined Interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 23. " IRQ23 ,I2C2 Combined Interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 22. " IRQ22 ,CAN1 Combined Interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 21. " IRQ21 ,CAN0 Combined Interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 20. " IRQ20 ,SaRaC Combined Interrupt (SaRaC_INT_DRF, SaRaC_INT_DRF) pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQ19 ,C3 Interrupt 2 (IREQ_TATI) pending" "Not pending,Pending"
|
|
bitfld.long 0x00 18. " IRQ18 ,C3 Interrupt 1(IREQ_C3_FORMATOR) pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 17. " IRQ17 ,C3 Interrupt 0 (SPDIF_RX_INT) pending" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " IRQ16 ,SSP1 Combined Interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 15. " IRQ15 ,MSP2 Combined Interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 14. " IRQ14 ,UART3 Combined Interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQ13 ,SD/MMC1Combined Interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 12. " IRQ12 ,UART2 Combined Interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 11. " IRQ11 ,SD/SDIO/MMC 0 Combined Interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 10. " IRQ10 ,I2C1 Combined Interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 9. " IRQ9 ,I2C0 Combined Interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 8. " IRQ8 ,MSP0 Combined Interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQ7 ,UART1 Combined Interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 6. " IRQ6 ,UART0 Combined Interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 5. " IRQ5 ,SSP0 Combined Interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " IRQ4 ,GPIO3 Combined Interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 3. " IRQ3 ,GPIO2 Combined Interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 2. " IRQ2 ,GPIO1 Combined Interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQ1 ,GPIO0 Combined Interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 0. " IRQ0 ,EFT0 Combined Interrupt pending" "Not pending,Pending"
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "ARM9INTROUTE[0:15],Route register for interrupt 0 to 15"
|
|
bitfld.long 0x00 30.--31. " INT15 ,Route for interrupt 15" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
bitfld.long 0x00 28.--29. " INT14 ,Route for interrupt 14" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " INT13 ,Route for interrupt 13" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
bitfld.long 0x00 24.--25. " INT12 ,Route for interrupt 12" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " INT11 ,Route for interrupt 11" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
bitfld.long 0x00 20.--21. " INT10 ,Route for interrupt 10" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " INT9 ,Route for interrupt 9" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
bitfld.long 0x00 16.--17. " INT8 ,Route for interrupt 8" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " INT7 ,Route for interrupt 7" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
bitfld.long 0x00 12.--13. " INT6 ,Route for interrupt 6" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " INT5 ,Route for interrupt 5" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
bitfld.long 0x00 8.--9. " INT4 ,Route for interrupt 4" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " INT3 ,Route for interrupt 3" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
bitfld.long 0x00 4.--5. " INT2 ,Route for interrupt 2" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " INT1 ,Route for interrupt 1" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
bitfld.long 0x00 0.--1. " INT0 ,Route for interrupt 0" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
line.long 0x04 "ARM9INTROUTE[16:31],Route register for interrupt 16 to 31"
|
|
bitfld.long 0x04 30.--31. " INT31 ,Route for interrupt 31" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
bitfld.long 0x04 28.--29. " INT30 ,Route for interrupt 30" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
textline " "
|
|
bitfld.long 0x04 26.--27. " INT29 ,Route for interrupt 29" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
bitfld.long 0x04 24.--25. " INT28 ,Route for interrupt 28" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
textline " "
|
|
bitfld.long 0x04 22.--23. " INT27 ,Route for interrupt 27" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
bitfld.long 0x04 20.--21. " INT26 ,Route for interrupt 26" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
textline " "
|
|
bitfld.long 0x04 18.--19. " INT25 ,Route for interrupt 25" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
bitfld.long 0x04 16.--17. " INT24 ,Route for interrupt 24" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
textline " "
|
|
bitfld.long 0x04 14.--15. " INT23 ,Route for interrupt 23" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
bitfld.long 0x04 12.--13. " INT22 ,Route for interrupt 22" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
textline " "
|
|
bitfld.long 0x04 10.--11. " INT21 ,Route for interrupt 21" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
bitfld.long 0x04 8.--9. " INT20 ,Route for interrupt 20" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
textline " "
|
|
bitfld.long 0x04 6.--7. " INT19 ,Route for interrupt 19" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
bitfld.long 0x04 4.--5. " INT18 ,Route for interrupt 18" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
textline " "
|
|
bitfld.long 0x04 2.--3. " INT17 ,Route for interrupt 17" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
bitfld.long 0x04 0.--1. " INT16 ,Route for interrupt 16" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
rgroup.long 0x20++0x0F
|
|
line.long 0x0 "ARM9INTIRQ0PENDING,PENDING interrupt on IRQ0"
|
|
bitfld.long 0x0 31. " IRQ31 ,MSP1 Combined Interrupt pending on IRQ0" "Not pending,Pending"
|
|
bitfld.long 0x0 30. " IRQ30 ,MSP3 Combined Interrupt pending on IRQ0" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0 29. " IRQ29 ,SGA IT pending on IRQ0" "Not pending,Pending"
|
|
bitfld.long 0x0 28. " IRQ28 ,TSC_INT pending on IRQ0" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0 27. " IRQ27 ,AC97 Combined Interrupt pending on IRQ0" "Not pending,Pending"
|
|
bitfld.long 0x0 26. " IRQ26 ,SCIINTR (Smart Card Interrupt) pending on IRQ0" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0 25. " IRQ25 ,GPIO4 Combined Interrupt pending on IRQ0" "Not pending,Pending"
|
|
bitfld.long 0x0 24. " IRQ24 ,SD/MMC2 Combined Interrupt pending on IRQ0" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0 23. " IRQ23 ,I2C2 Combined Interrupt pending on IRQ0" "Not pending,Pending"
|
|
bitfld.long 0x0 22. " IRQ22 ,CAN1 Combined Interrupt pending on IRQ0" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0 21. " IRQ21 ,CAN0 Combined Interrupt pending on IRQ0" "Not pending,Pending"
|
|
bitfld.long 0x0 20. " IRQ20 ,SaRaC Combined Interrupt (SaRaC_INT_DRF, SaRaC_INT_DRF) pending on IRQ0" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0 19. " IRQ19 ,C3 Interrupt 2 (IREQ_TATI) pending on IRQ0" "Not pending,Pending"
|
|
bitfld.long 0x0 18. " IRQ18 ,C3 Interrupt 1(IREQ_C3_FORMATOR) pending on IRQ0" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0 17. " IRQ17 ,C3 Interrupt 0 (SPDIF_RX_INT) pending on IRQ0" "Not pending,Pending"
|
|
bitfld.long 0x0 16. " IRQ16 ,SSP1 Combined Interrupt pending on IRQ0" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0 15. " IRQ15 ,MSP2 Combined Interrupt pending on IRQ0" "Not pending,Pending"
|
|
bitfld.long 0x0 14. " IRQ14 ,UART3 Combined Interrupt pending on IRQ0" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0 13. " IRQ13 ,SD/MMC1Combined Interrupt pending on IRQ0" "Not pending,Pending"
|
|
bitfld.long 0x0 12. " IRQ12 ,UART2 Combined Interrupt pending on IRQ0" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0 11. " IRQ11 ,SD/SDIO/MMC 0 Combined Interrupt pending on IRQ0" "Not pending,Pending"
|
|
bitfld.long 0x0 10. " IRQ10 ,I2C1 Combined Interrupt pending on IRQ0" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0 9. " IRQ9 ,I2C0 Combined Interrupt pending on IRQ0" "Not pending,Pending"
|
|
bitfld.long 0x0 8. " IRQ8 ,MSP0 Combined Interrupt pending on IRQ0" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0 7. " IRQ7 ,UART1 Combined Interrupt pending on IRQ0" "Not pending,Pending"
|
|
bitfld.long 0x0 6. " IRQ6 ,UART0 Combined Interrupt pending on IRQ0" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0 5. " IRQ5 ,SSP0 Combined Interrupt pending on IRQ0" "Not pending,Pending"
|
|
bitfld.long 0x0 4. " IRQ4 ,GPIO3 Combined Interrupt pending on IRQ0" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0 3. " IRQ3 ,GPIO2 Combined Interrupt pending on IRQ0" "Not pending,Pending"
|
|
bitfld.long 0x0 2. " IRQ2 ,GPIO1 Combined Interrupt pending on IRQ0" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x0 1. " IRQ1 ,GPIO0 Combined Interrupt pending on IRQ0" "Not pending,Pending"
|
|
bitfld.long 0x0 0. " IRQ0 ,EFT0 Combined Interrupt pending on IRQ0" "Not pending,Pending"
|
|
line.long 0x4 "ARM9INTIRQ1PENDING,PENDING interrupt on IRQ1"
|
|
bitfld.long 0x4 31. " IRQ31 ,MSP1 Combined Interrupt pending on IRQ1" "Not pending,Pending"
|
|
bitfld.long 0x4 30. " IRQ30 ,MSP3 Combined Interrupt pending on IRQ1" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x4 29. " IRQ29 ,SGA IT pending on IRQ1" "Not pending,Pending"
|
|
bitfld.long 0x4 28. " IRQ28 ,TSC_INT pending on IRQ1" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x4 27. " IRQ27 ,AC97 Combined Interrupt pending on IRQ1" "Not pending,Pending"
|
|
bitfld.long 0x4 26. " IRQ26 ,SCIINTR (Smart Card Interrupt) pending on IRQ1" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x4 25. " IRQ25 ,GPIO4 Combined Interrupt pending on IRQ1" "Not pending,Pending"
|
|
bitfld.long 0x4 24. " IRQ24 ,SD/MMC2 Combined Interrupt pending on IRQ1" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x4 23. " IRQ23 ,I2C2 Combined Interrupt pending on IRQ1" "Not pending,Pending"
|
|
bitfld.long 0x4 22. " IRQ22 ,CAN1 Combined Interrupt pending on IRQ1" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x4 21. " IRQ21 ,CAN0 Combined Interrupt pending on IRQ1" "Not pending,Pending"
|
|
bitfld.long 0x4 20. " IRQ20 ,SaRaC Combined Interrupt (SaRaC_INT_DRF, SaRaC_INT_DRF) pending on IRQ1" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x4 19. " IRQ19 ,C3 Interrupt 2 (IREQ_TATI) pending on IRQ1" "Not pending,Pending"
|
|
bitfld.long 0x4 18. " IRQ18 ,C3 Interrupt 1(IREQ_C3_FORMATOR) pending on IRQ1" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x4 17. " IRQ17 ,C3 Interrupt 0 (SPDIF_RX_INT) pending on IRQ1" "Not pending,Pending"
|
|
bitfld.long 0x4 16. " IRQ16 ,SSP1 Combined Interrupt pending on IRQ1" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x4 15. " IRQ15 ,MSP2 Combined Interrupt pending on IRQ1" "Not pending,Pending"
|
|
bitfld.long 0x4 14. " IRQ14 ,UART3 Combined Interrupt pending on IRQ1" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x4 13. " IRQ13 ,SD/MMC1Combined Interrupt pending on IRQ1" "Not pending,Pending"
|
|
bitfld.long 0x4 12. " IRQ12 ,UART2 Combined Interrupt pending on IRQ1" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x4 11. " IRQ11 ,SD/SDIO/MMC 0 Combined Interrupt pending on IRQ1" "Not pending,Pending"
|
|
bitfld.long 0x4 10. " IRQ10 ,I2C1 Combined Interrupt pending on IRQ1" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x4 9. " IRQ9 ,I2C0 Combined Interrupt pending on IRQ1" "Not pending,Pending"
|
|
bitfld.long 0x4 8. " IRQ8 ,MSP0 Combined Interrupt pending on IRQ1" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x4 7. " IRQ7 ,UART1 Combined Interrupt pending on IRQ1" "Not pending,Pending"
|
|
bitfld.long 0x4 6. " IRQ6 ,UART0 Combined Interrupt pending on IRQ1" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x4 5. " IRQ5 ,SSP0 Combined Interrupt pending on IRQ1" "Not pending,Pending"
|
|
bitfld.long 0x4 4. " IRQ4 ,GPIO3 Combined Interrupt pending on IRQ1" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x4 3. " IRQ3 ,GPIO2 Combined Interrupt pending on IRQ1" "Not pending,Pending"
|
|
bitfld.long 0x4 2. " IRQ2 ,GPIO1 Combined Interrupt pending on IRQ1" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x4 1. " IRQ1 ,GPIO0 Combined Interrupt pending on IRQ1" "Not pending,Pending"
|
|
bitfld.long 0x4 0. " IRQ0 ,EFT0 Combined Interrupt pending on IRQ1" "Not pending,Pending"
|
|
line.long 0x8 "ARM9INTIRQ2PENDING,PENDING interrupt on IRQ2"
|
|
bitfld.long 0x8 31. " IRQ31 ,MSP1 Combined Interrupt pending on IRQ2" "Not pending,Pending"
|
|
bitfld.long 0x8 30. " IRQ30 ,MSP3 Combined Interrupt pending on IRQ2" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x8 29. " IRQ29 ,SGA IT pending on IRQ2" "Not pending,Pending"
|
|
bitfld.long 0x8 28. " IRQ28 ,TSC_INT pending on IRQ2" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x8 27. " IRQ27 ,AC97 Combined Interrupt pending on IRQ2" "Not pending,Pending"
|
|
bitfld.long 0x8 26. " IRQ26 ,SCIINTR (Smart Card Interrupt) pending on IRQ2" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x8 25. " IRQ25 ,GPIO4 Combined Interrupt pending on IRQ2" "Not pending,Pending"
|
|
bitfld.long 0x8 24. " IRQ24 ,SD/MMC2 Combined Interrupt pending on IRQ2" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x8 23. " IRQ23 ,I2C2 Combined Interrupt pending on IRQ2" "Not pending,Pending"
|
|
bitfld.long 0x8 22. " IRQ22 ,CAN1 Combined Interrupt pending on IRQ2" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x8 21. " IRQ21 ,CAN0 Combined Interrupt pending on IRQ2" "Not pending,Pending"
|
|
bitfld.long 0x8 20. " IRQ20 ,SaRaC Combined Interrupt (SaRaC_INT_DRF, SaRaC_INT_DRF) pending on IRQ2" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x8 19. " IRQ19 ,C3 Interrupt 2 (IREQ_TATI) pending on IRQ2" "Not pending,Pending"
|
|
bitfld.long 0x8 18. " IRQ18 ,C3 Interrupt 1(IREQ_C3_FORMATOR) pending on IRQ2" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x8 17. " IRQ17 ,C3 Interrupt 0 (SPDIF_RX_INT) pending on IRQ2" "Not pending,Pending"
|
|
bitfld.long 0x8 16. " IRQ16 ,SSP1 Combined Interrupt pending on IRQ2" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x8 15. " IRQ15 ,MSP2 Combined Interrupt pending on IRQ2" "Not pending,Pending"
|
|
bitfld.long 0x8 14. " IRQ14 ,UART3 Combined Interrupt pending on IRQ2" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x8 13. " IRQ13 ,SD/MMC1Combined Interrupt pending on IRQ2" "Not pending,Pending"
|
|
bitfld.long 0x8 12. " IRQ12 ,UART2 Combined Interrupt pending on IRQ2" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x8 11. " IRQ11 ,SD/SDIO/MMC 0 Combined Interrupt pending on IRQ2" "Not pending,Pending"
|
|
bitfld.long 0x8 10. " IRQ10 ,I2C1 Combined Interrupt pending on IRQ2" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x8 9. " IRQ9 ,I2C0 Combined Interrupt pending on IRQ2" "Not pending,Pending"
|
|
bitfld.long 0x8 8. " IRQ8 ,MSP0 Combined Interrupt pending on IRQ2" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x8 7. " IRQ7 ,UART1 Combined Interrupt pending on IRQ2" "Not pending,Pending"
|
|
bitfld.long 0x8 6. " IRQ6 ,UART0 Combined Interrupt pending on IRQ2" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x8 5. " IRQ5 ,SSP0 Combined Interrupt pending on IRQ2" "Not pending,Pending"
|
|
bitfld.long 0x8 4. " IRQ4 ,GPIO3 Combined Interrupt pending on IRQ2" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x8 3. " IRQ3 ,GPIO2 Combined Interrupt pending on IRQ2" "Not pending,Pending"
|
|
bitfld.long 0x8 2. " IRQ2 ,GPIO1 Combined Interrupt pending on IRQ2" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x8 1. " IRQ1 ,GPIO0 Combined Interrupt pending on IRQ2" "Not pending,Pending"
|
|
bitfld.long 0x8 0. " IRQ0 ,EFT0 Combined Interrupt pending on IRQ2" "Not pending,Pending"
|
|
line.long 0xC "ARM9INTIRQ3PENDING,PENDING interrupt on IRQ3"
|
|
bitfld.long 0xC 31. " IRQ31 ,MSP1 Combined Interrupt pending on IRQ3" "Not pending,Pending"
|
|
bitfld.long 0xC 30. " IRQ30 ,MSP3 Combined Interrupt pending on IRQ3" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0xC 29. " IRQ29 ,SGA IT pending on IRQ3" "Not pending,Pending"
|
|
bitfld.long 0xC 28. " IRQ28 ,TSC_INT pending on IRQ3" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0xC 27. " IRQ27 ,AC97 Combined Interrupt pending on IRQ3" "Not pending,Pending"
|
|
bitfld.long 0xC 26. " IRQ26 ,SCIINTR (Smart Card Interrupt) pending on IRQ3" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0xC 25. " IRQ25 ,GPIO4 Combined Interrupt pending on IRQ3" "Not pending,Pending"
|
|
bitfld.long 0xC 24. " IRQ24 ,SD/MMC2 Combined Interrupt pending on IRQ3" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0xC 23. " IRQ23 ,I2C2 Combined Interrupt pending on IRQ3" "Not pending,Pending"
|
|
bitfld.long 0xC 22. " IRQ22 ,CAN1 Combined Interrupt pending on IRQ3" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0xC 21. " IRQ21 ,CAN0 Combined Interrupt pending on IRQ3" "Not pending,Pending"
|
|
bitfld.long 0xC 20. " IRQ20 ,SaRaC Combined Interrupt (SaRaC_INT_DRF, SaRaC_INT_DRF) pending on IRQ3" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0xC 19. " IRQ19 ,C3 Interrupt 2 (IREQ_TATI) pending on IRQ3" "Not pending,Pending"
|
|
bitfld.long 0xC 18. " IRQ18 ,C3 Interrupt 1(IREQ_C3_FORMATOR) pending on IRQ3" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0xC 17. " IRQ17 ,C3 Interrupt 0 (SPDIF_RX_INT) pending on IRQ3" "Not pending,Pending"
|
|
bitfld.long 0xC 16. " IRQ16 ,SSP1 Combined Interrupt pending on IRQ3" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0xC 15. " IRQ15 ,MSP2 Combined Interrupt pending on IRQ3" "Not pending,Pending"
|
|
bitfld.long 0xC 14. " IRQ14 ,UART3 Combined Interrupt pending on IRQ3" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0xC 13. " IRQ13 ,SD/MMC1Combined Interrupt pending on IRQ3" "Not pending,Pending"
|
|
bitfld.long 0xC 12. " IRQ12 ,UART2 Combined Interrupt pending on IRQ3" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0xC 11. " IRQ11 ,SD/SDIO/MMC 0 Combined Interrupt pending on IRQ3" "Not pending,Pending"
|
|
bitfld.long 0xC 10. " IRQ10 ,I2C1 Combined Interrupt pending on IRQ3" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0xC 9. " IRQ9 ,I2C0 Combined Interrupt pending on IRQ3" "Not pending,Pending"
|
|
bitfld.long 0xC 8. " IRQ8 ,MSP0 Combined Interrupt pending on IRQ3" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0xC 7. " IRQ7 ,UART1 Combined Interrupt pending on IRQ3" "Not pending,Pending"
|
|
bitfld.long 0xC 6. " IRQ6 ,UART0 Combined Interrupt pending on IRQ3" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0xC 5. " IRQ5 ,SSP0 Combined Interrupt pending on IRQ3" "Not pending,Pending"
|
|
bitfld.long 0xC 4. " IRQ4 ,GPIO3 Combined Interrupt pending on IRQ3" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0xC 3. " IRQ3 ,GPIO2 Combined Interrupt pending on IRQ3" "Not pending,Pending"
|
|
bitfld.long 0xC 2. " IRQ2 ,GPIO1 Combined Interrupt pending on IRQ3" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0xC 1. " IRQ1 ,GPIO0 Combined Interrupt pending on IRQ3" "Not pending,Pending"
|
|
bitfld.long 0xC 0. " IRQ0 ,EFT0 Combined Interrupt pending on IRQ3" "Not pending,Pending"
|
|
tree "Route registers"
|
|
group.long 0x80++0x7F
|
|
line.long 0x0 "ARM9INTRROUTE0 ,Route register for interrupt 0 "
|
|
bitfld.long 0x0 0.--1. " INT0 ,Route for interrupt 0 " "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
line.long 0x4 "ARM9INTRROUTE1 ,Route register for interrupt 1 "
|
|
bitfld.long 0x4 0.--1. " INT1 ,Route for interrupt 1 " "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
line.long 0x8 "ARM9INTRROUTE2 ,Route register for interrupt 2 "
|
|
bitfld.long 0x8 0.--1. " INT2 ,Route for interrupt 2 " "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
line.long 0xC "ARM9INTRROUTE3 ,Route register for interrupt 3 "
|
|
bitfld.long 0xC 0.--1. " INT3 ,Route for interrupt 3 " "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
line.long 0x10 "ARM9INTRROUTE4 ,Route register for interrupt 4 "
|
|
bitfld.long 0x10 0.--1. " INT4 ,Route for interrupt 4 " "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
line.long 0x14 "ARM9INTRROUTE5 ,Route register for interrupt 5 "
|
|
bitfld.long 0x14 0.--1. " INT5 ,Route for interrupt 5 " "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
line.long 0x18 "ARM9INTRROUTE6 ,Route register for interrupt 6 "
|
|
bitfld.long 0x18 0.--1. " INT6 ,Route for interrupt 6 " "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
line.long 0x1C "ARM9INTRROUTE7 ,Route register for interrupt 7 "
|
|
bitfld.long 0x1C 0.--1. " INT7 ,Route for interrupt 7 " "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
line.long 0x20 "ARM9INTRROUTE8 ,Route register for interrupt 8 "
|
|
bitfld.long 0x20 0.--1. " INT8 ,Route for interrupt 8 " "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
line.long 0x24 "ARM9INTRROUTE9 ,Route register for interrupt 9 "
|
|
bitfld.long 0x24 0.--1. " INT9 ,Route for interrupt 9 " "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
line.long 0x28 "ARM9INTRROUTE10,Route register for interrupt 10"
|
|
bitfld.long 0x28 0.--1. " INT10 ,Route for interrupt 10" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
line.long 0x2C "ARM9INTRROUTE11,Route register for interrupt 11"
|
|
bitfld.long 0x2C 0.--1. " INT11 ,Route for interrupt 11" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
line.long 0x30 "ARM9INTRROUTE12,Route register for interrupt 12"
|
|
bitfld.long 0x30 0.--1. " INT12 ,Route for interrupt 12" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
line.long 0x34 "ARM9INTRROUTE13,Route register for interrupt 13"
|
|
bitfld.long 0x34 0.--1. " INT13 ,Route for interrupt 13" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
line.long 0x38 "ARM9INTRROUTE14,Route register for interrupt 14"
|
|
bitfld.long 0x38 0.--1. " INT14 ,Route for interrupt 14" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
line.long 0x3C "ARM9INTRROUTE15,Route register for interrupt 15"
|
|
bitfld.long 0x3C 0.--1. " INT15 ,Route for interrupt 15" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
line.long 0x40 "ARM9INTRROUTE16,Route register for interrupt 16"
|
|
bitfld.long 0x40 0.--1. " INT16 ,Route for interrupt 16" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
line.long 0x44 "ARM9INTRROUTE17,Route register for interrupt 17"
|
|
bitfld.long 0x44 0.--1. " INT17 ,Route for interrupt 17" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
line.long 0x48 "ARM9INTRROUTE18,Route register for interrupt 18"
|
|
bitfld.long 0x48 0.--1. " INT18 ,Route for interrupt 18" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
line.long 0x4C "ARM9INTRROUTE19,Route register for interrupt 19"
|
|
bitfld.long 0x4C 0.--1. " INT19 ,Route for interrupt 19" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
line.long 0x50 "ARM9INTRROUTE20,Route register for interrupt 20"
|
|
bitfld.long 0x50 0.--1. " INT20 ,Route for interrupt 20" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
line.long 0x54 "ARM9INTRROUTE21,Route register for interrupt 21"
|
|
bitfld.long 0x54 0.--1. " INT21 ,Route for interrupt 21" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
line.long 0x58 "ARM9INTRROUTE22,Route register for interrupt 22"
|
|
bitfld.long 0x58 0.--1. " INT22 ,Route for interrupt 22" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
line.long 0x5C "ARM9INTRROUTE23,Route register for interrupt 23"
|
|
bitfld.long 0x5C 0.--1. " INT23 ,Route for interrupt 23" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
line.long 0x60 "ARM9INTRROUTE24,Route register for interrupt 24"
|
|
bitfld.long 0x60 0.--1. " INT24 ,Route for interrupt 24" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
line.long 0x64 "ARM9INTRROUTE25,Route register for interrupt 25"
|
|
bitfld.long 0x64 0.--1. " INT25 ,Route for interrupt 25" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
line.long 0x68 "ARM9INTRROUTE26,Route register for interrupt 26"
|
|
bitfld.long 0x68 0.--1. " INT26 ,Route for interrupt 26" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
line.long 0x6C "ARM9INTRROUTE27,Route register for interrupt 27"
|
|
bitfld.long 0x6C 0.--1. " INT27 ,Route for interrupt 27" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
line.long 0x70 "ARM9INTRROUTE28,Route register for interrupt 28"
|
|
bitfld.long 0x70 0.--1. " INT28 ,Route for interrupt 28" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
line.long 0x74 "ARM9INTRROUTE29,Route register for interrupt 29"
|
|
bitfld.long 0x74 0.--1. " INT29 ,Route for interrupt 29" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
line.long 0x78 "ARM9INTRROUTE30,Route register for interrupt 30"
|
|
bitfld.long 0x78 0.--1. " INT30 ,Route for interrupt 30" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
line.long 0x7C "ARM9INTRROUTE31,Route register for interrupt 31"
|
|
bitfld.long 0x7C 0.--1. " INT31 ,Route for interrupt 31" "IRQ0,IRQ1,IRQ2,IRQ3"
|
|
tree.end
|
|
width 11.
|
|
tree.end
|
|
endif
|
|
tree "ASIC APB registers"
|
|
base asd:0x101ED000
|
|
width 15.
|
|
group.long 0x00++0x13
|
|
line.long 0x00 "IO_DRIVE,IO Drive Register"
|
|
bitfld.long 0x00 31. " I2C0_HS_SUPPORT ,High speed operation support 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " I2C1_HS_SUPPORT ,High speed operation support 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " I2C2_HS_SUPPORT ,High speed operation support 2" "Disabled,Enabled"
|
|
textline " "
|
|
sif ((cpu()=="STA2065")||(cpu()=="STA2165"))
|
|
bitfld.long 0x00 23. " ULPISL ,ULPI slew level" "Nominal,Fast"
|
|
bitfld.long 0x00 22. " MSP1SL ,MSP1 slew level" "Nominal,Fast"
|
|
bitfld.long 0x00 21. " MSP0SL ,MSP0 slew level" "Nominal,Fast"
|
|
else
|
|
bitfld.long 0x00 21. " MSP0SL ,MSP0 slew level" "Nominal,Fast"
|
|
endif
|
|
textline " "
|
|
sif ((cpu()=="STA2065")||(cpu()=="STA2165"))
|
|
bitfld.long 0x00 20. " MMC2SL ,MMC2 slew level" "Nominal,Fast"
|
|
bitfld.long 0x00 19. " MMC1SL ,MMC1 slew level" "Nominal,Fast"
|
|
else
|
|
bitfld.long 0x00 19. " MMC1SL ,MMC1 slew level" "Nominal,Fast"
|
|
endif
|
|
bitfld.long 0x00 18. " MMC0SL ,MMC0 slew level" "Nominal,Fast"
|
|
textline " "
|
|
sif ((cpu()=="STA2065")||(cpu()=="STA2165"))
|
|
bitfld.long 0x00 17. " FSMCSL ,FSMC slew level" "Nominal,Fast"
|
|
bitfld.long 0x00 16. " LCDSL ,LCD slew level" "Nominal,Fast"
|
|
bitfld.long 0x00 14.--15. " ULPIDRV[1:0] ,ULPI output drive" "4mA,8mA,6mA,10mA"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " MSP1DRV[1:0] ,MSP1 output drive" "4mA,8mA,6mA,10mA"
|
|
bitfld.long 0x00 10.--11. " MSP0DRV1[1:0] ,MSP0 output drive" "4mA,8mA,6mA,10mA"
|
|
bitfld.long 0x00 8.--9. " MMC2DRV1[1:0] ,MMC2 output drive" "4mA,8mA,6mA,10mA"
|
|
else
|
|
bitfld.long 0x00 16. " LCDSL ,LCD slew level" "Nominal,Fast"
|
|
bitfld.long 0x00 10.--11. " MSP0DRV1[1:0] ,MSP0 output drive" "4mA,8mA,6mA,10mA"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " MMC1DRV1[1:0] ,MMC1 output drive" "4mA,8mA,6mA,10mA"
|
|
bitfld.long 0x00 4.--5. " MMC0DRV1[1:0] ,MMC0 output drive" "4mA,8mA,6mA,10mA"
|
|
sif ((cpu()=="STA2065")||(cpu()=="STA2165"))
|
|
bitfld.long 0x00 2.--3. " FSMCDRV1[1:0] ,FSMC output drive" "4mA,8mA,6mA,10mA"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " LCDDRV1[1:0] ,LCD output drive" "4mA,8mA,6mA,10mA"
|
|
line.long 0x04 "COMP_CTRL,Compensation Control Register"
|
|
bitfld.long 0x04 15. " COMPFRZTSC ,IO ring TSC compensation frozen" "Not frozen,Frozen"
|
|
bitfld.long 0x04 14. " COMPFRZE ,IO ring E compensation frozen" "Not frozen,Frozen"
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bitfld.long 0x04 13. " COMPFRZD ,IO ring D compensation frozen" "Not frozen,Frozen"
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textline " "
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bitfld.long 0x04 12. " COMPFRZC ,IO ring C compensation frozen" "Not frozen,Frozen"
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bitfld.long 0x04 11. " COMPFRZB ,IO ring B compensation frozen" "Not frozen,Frozen"
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bitfld.long 0x04 10. " COMPFRZA ,IO ring A compensation frozen" "Not frozen,Frozen"
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textline " "
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bitfld.long 0x04 5. " COMPTYPTSC ,IO ring TSC compensation typical" "Not forced,Forced"
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bitfld.long 0x04 4. " COMPTYPE ,IO ring E compensation typical" "Not forced,Forced"
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bitfld.long 0x04 3. " COMPTYPD ,IO ring D compensation typical" "Not forced,Forced"
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textline " "
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bitfld.long 0x04 2. " COMPTYPC ,IO ring C compensation typical" "Not forced,Forced"
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bitfld.long 0x04 1. " COMPTYPB ,IO ring B compensation typical" "Not forced,Forced"
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bitfld.long 0x04 0. " COMPTYPA ,IO ring A compensation typical" "Not forced,Forced"
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|
line.long 0x08 "COMP_STATUS1,Compensation Status Register 1"
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hexmask.long.byte 0x08 25.--31. 1. " NASRC_D ,Binary Encoded value of PVT condition delivered by the compensation cell for the IO ring D"
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hexmask.long.byte 0x08 16.--22. 1. " NASRC_C ,Binary Encoded value of PVT condition delivered by the compensation cell for the IO ring C"
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textline " "
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hexmask.long.byte 0x08 9.--15. 1. " NASRC_B ,Binary Encoded value of PVT condition delivered by the compensation cell for the IO ring B"
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|
hexmask.long.byte 0x08 0.--6. 1. " NASRC_A ,Binary Encoded value of PVT condition delivered by the compensation cell for the IO ring A"
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|
line.long 0x0C "COMP_STATUS2,Compensation Status Register 2"
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bitfld.long 0x0C 31. " COMPOKTSC ,IO ring TSC compensation OK" "Not stable,Stable"
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|
bitfld.long 0x0C 30. " COMPOKE ,IO ring E compensation OK" "Not stable,Stable"
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|
textline " "
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bitfld.long 0x0C 29. " COMPOKD ,IO ring D compensation OK" "Not stable,Stable"
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|
bitfld.long 0x0C 28. " COMPOKC ,IO ring C compensation OK" "Not stable,Stable"
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|
textline " "
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bitfld.long 0x0C 27. " COMPOKB ,IO ring B compensation OK" "Not stable,Stable"
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|
bitfld.long 0x0C 26. " COMPOKA ,IO ring A compensation OK" "Not stable,Stable"
|
|
textline " "
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|
hexmask.long.byte 0x0C 9.--15. 1. " NASRC_TSC ,Binary Encoded value of PVT condition delivered by the compensation cell for the TSC pads"
|
|
hexmask.long.byte 0x0C 0.--6. 1. " NASRC_E ,Binary Encoded value of PVT condition delivered by the compensation cell for the IO ring E"
|
|
line.long 0x10 "DDR2_PAD_CTRL,DDR2 Pad Control Register"
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|
bitfld.long 0x10 0. " DDR2_VREFSSTL_USEPAD ,DDR VREFSSTL use" "Not used,Used"
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|
rgroup.long 0x14++0x03
|
|
line.long 0x00 "DDR2_STATUS,DDR2 Status Register"
|
|
bitfld.long 0x00 9. " CKE_STATUS ,CKE status" "Normal,High"
|
|
bitfld.long 0x00 8. " Q_ALMOST_FULL ,Indicates if CMQ queue has reache threshold" "Normal,Reached"
|
|
textline " "
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bitfld.long 0x00 7. " REFRESH_IN_PROGRESS ,Refresh in progress" "Normal,Yes"
|
|
bitfld.long 0x00 6. " CONTROLLER_BUSY ,Controller busy" "Not processing,Processing"
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|
textline " "
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bitfld.long 0x00 5. " PORT_BUSY[5] ,Port 5 is one hot encoded" "Not processing,Processing"
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bitfld.long 0x00 4. " PORT_BUSY[4] ,Port 4 is one hot encoded" "Not processing,Processing"
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|
textline " "
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bitfld.long 0x00 3. " PORT_BUSY[3] ,Port 3 is one hot encoded" "Not processing,Processing"
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bitfld.long 0x00 2. " PORT_BUSY[2] ,Port 2 is one hot encoded" "Not processing,Processing"
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textline " "
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bitfld.long 0x00 1. " PORT_BUSY[1] ,Port 1 is one hot encoded" "Not processing,Processing"
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|
bitfld.long 0x00 0. " PORT_BUSY[0] ,Port 0 is one hot encoded" "Not processing,Processing"
|
|
group.long 0x18++0x07
|
|
line.long 0x00 "ARM9_INTR_SEL,ARM9 Interrupt Select Register"
|
|
bitfld.long 0x00 6. " ARM9_INTR_ENABLE ,ARM9 interrupt enable" "Disabled,Enabled"
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|
bitfld.long 0x00 0.--5. " ARM9_INTR_SEL ,ARM9 interrupt source selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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|
line.long 0x04 "ARM11_ETM_RUN,ARM11 ETM Run Register"
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|
bitfld.long 0x04 1. " ARM9_DBG_REQ_ENABLE ,ARM9 dbg request to ARM11" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " ARM11_ETM_RUN ,ETM Trace clock" "Disabled,Enabled"
|
|
width 11.
|
|
tree.end
|
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textline ""
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