16193 lines
1.1 MiB
16193 lines
1.1 MiB
; --------------------------------------------------------------------------------
|
|
; @Title: S3FMXXX On-Chip Peripherals
|
|
; @Props: Released
|
|
; @Author: MPI, PSS
|
|
; @Changelog: 2011-07-29
|
|
; @Manufacturer: SAMSUNG - Samsung Semiconductor
|
|
; @Doc: S3FM02G_UM_REV0.00 (2010-09-13) .pdf; 869012um_s3fm02g_rev10.pdf
|
|
; 888552ds_s3fm02g_rev10.pdf
|
|
; @Core: Cortex-M3
|
|
; @Copyright: (C) 1989-2016 Lauterbach GmbH, licensed for use with TRACE32(R) only
|
|
; --------------------------------------------------------------------------------
|
|
; $Id: pers3fmxxx.per 17736 2024-04-08 09:26:07Z kwisniewski $
|
|
|
|
width 0xb
|
|
tree.close "Core Registers (Cortex-M3)"
|
|
AUTOINDENT.PUSH
|
|
AUTOINDENT.OFF
|
|
tree "System Control"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 11.
|
|
group 0x10--0x1b
|
|
line.long 0x00 "SYST_CSR,SysTick Control and Status Register"
|
|
bitfld.long 0x00 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted"
|
|
bitfld.long 0x00 2. " CLKSOURCE ,Clock Source" "External,Core"
|
|
bitfld.long 0x00 1. " TICKINT ,SysTick Handler" "Not SysTick,SysTick"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ENABLE ,Counter Enable" "Disabled,Enabled"
|
|
;group 0x14++0x03
|
|
line.long 0x04 "SYST_RVR,SysTick Reload Value Register"
|
|
hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0"
|
|
;group 0x18++0x03
|
|
line.long 0x08 "SYST_CVR,SysTick Current Value Register"
|
|
hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Current Value"
|
|
rgroup 0x1c++0x03
|
|
line.long 0x00 "SYST_CALIB,SysTick Calibration Value Register"
|
|
bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented"
|
|
bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing"
|
|
textline " "
|
|
rgroup 0xd00++0x03
|
|
line.long 0x00 "CPUID,CPU ID Base Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Implementer Code"
|
|
bitfld.long 0x00 20.--23. " VARIANT ,Implementation Defined Variant Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. " CONSTANT ,Constant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
hexmask.long.word 0x00 4.--15. 1. " PARTNO ,Number of Processor"
|
|
bitfld.long 0x00 0.--3. " REVISION ,Implementation Defined Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group 0xd04--0xd17
|
|
line.long 0x00 "ICSR,Interrupt Control State Register"
|
|
bitfld.long 0x00 31. " NMIPENDSET ,Set Pending NMI Bit" "Not set,Set"
|
|
bitfld.long 0x00 28. " PENDSVSET ,Set Pending pendSV Bit" "Not set,Set"
|
|
bitfld.long 0x00 27. " PENDSVCLR ,Clear Pending pendSV Bit" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PENDSTSET ,Set Pending SysTick Bit" "Not set,Set"
|
|
bitfld.long 0x00 25. " PENDSTCLR ,Clear Pending SysTick Bit" "Not cleared,Cleared"
|
|
bitfld.long 0x00 23. " ISRPREEMPT ,Use Only at Debug Time" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ISRPENDING ,Interrupt Pending Flag" "Not pending,Pending"
|
|
hexmask.long.word 0x00 12.--21. 1. " VECTPENDING ,Pending ISR Number Field"
|
|
bitfld.long 0x00 11. " RETTOBASE ,Interrupt Exception" "Active,Not active"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,Active ISR Number Field"
|
|
;group 0xd08++0x03
|
|
line.long 0x04 "VTOR,Vector Table Offset Register"
|
|
bitfld.long 0x04 29. " TBLBASE ,Table Base" "Code,RAM"
|
|
hexmask.long.tbyte 0x04 7.--28. 1. " TBLOFF ,Vector Table Base Offset Field"
|
|
;group 0xd0c++0x03
|
|
line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register"
|
|
hexmask.long.word 0x08 16.--31. 1. " VECTKEY ,Register Key"
|
|
rbitfld.long 0x08 15. " ENDIANESS ,Data endianness Bit" "Little,Big"
|
|
bitfld.long 0x08 8.--10. " PRIGROUP ,Interrupt Priority Grouping Field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
|
|
textline " "
|
|
bitfld.long 0x08 2. " SYSRESETREQ ,System Reset Request" "Not requested,Requested"
|
|
bitfld.long 0x08 1. " VECTCLRACTIVE ,Clear Active Vector Bit" "Not cleared,Cleared all"
|
|
bitfld.long 0x08 0. " VECTRESET ,System Reset" "No reset,Reset"
|
|
;group 0xd10++0x03
|
|
line.long 0x0c "SCR,System Control Register"
|
|
bitfld.long 0x0c 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
|
|
bitfld.long 0x0c 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
|
|
;group 0xd14++0x03
|
|
line.long 0x10 "CCR,Configuration Control Register"
|
|
bitfld.long 0x10 9. " STKALIGN ,8-byte Stack Frame Alignment" "4-byte,8-byte"
|
|
bitfld.long 0x10 8. " BFHFNMIGN ,Enable NMI, Hard Fault and FAULTMASK to Ignore Bus Fault" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 4. " DIV_0_TRP ,Trap Divide by Zero" "Disabled,Enabled"
|
|
bitfld.long 0x10 3. " UNALIGN_TRP ,Trap for Unaligned Access" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 1. " USERSETMPEND ,Enable User Access to the Software Trigger Exception Register" "Disabled,Enabled"
|
|
bitfld.long 0x10 0. " NONEBASETHRDENA ,Control Entry to Thread Mode" "Only from last exception,Any level"
|
|
group 0xd18--0xd23
|
|
line.long 0x00 "SHPR1,SSystem Handler Priority Register 1"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PRI_7 ,Priority of System Handler 7"
|
|
hexmask.long.byte 0x00 16.--23. 1. " PRI_6 ,Priority of system handler 6(UsageFault)"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PRI_5 ,Priority of system handler 5(BusFault)"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRI_4 ,Priority of system handler 4(MemManage)"
|
|
line.long 0x04 "SHPR2,System Handler Priority Register 2"
|
|
hexmask.long.byte 0x04 24.--31. 1. " PRI_11 ,Priority of system handler 11(SVCall)"
|
|
hexmask.long.byte 0x04 16.--23. 1. " PRI_10 ,Priority of System Handler 10"
|
|
hexmask.long.byte 0x04 8.--15. 1. " PRI_9 ,Priority of System Handler 9"
|
|
textline " "
|
|
hexmask.long.byte 0x04 0.--7. 1. " PRI_8 ,Priority of System Handler 8"
|
|
line.long 0x08 "SHPR3,System Handler Priority Register 3"
|
|
hexmask.long.byte 0x08 24.--31. 1. " PRI_15 ,Priority of System Handler 15(SysTick)"
|
|
hexmask.long.byte 0x08 16.--23. 1. " PRI_14 ,Priority of System Handler 14(PendSV)"
|
|
hexmask.long.byte 0x08 8.--15. 1. " PRI_13 ,Priority of System Handler 13"
|
|
textline " "
|
|
hexmask.long.byte 0x08 0.--7. 1. " PRI_12 ,Priority of System Handler 12(DebugMonitor)"
|
|
group 0xd24++0x3
|
|
line.long 0x00 "SHCSR,System Handler Control and State Register"
|
|
bitfld.long 0x00 18. " USGFAULTENA ,USGFAULTENA" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " BUSFAULTENA ,BUSFAULTENA" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " MEMFAULTENA ,MEMFAULTENA" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SVCALLPENDED ,SVCall is Pended Started" "Not replaced,Replaced"
|
|
bitfld.long 0x00 14. " BUSFAULTPENDED ,BusFault is Pended Started" "Not replaced,Replaced"
|
|
bitfld.long 0x00 13. " MEMFAULTPENDED ,MemManage is Pended Started" "Not replaced,Replaced"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SYSTICKACT ,SysTick is Active" "Not active,Active"
|
|
bitfld.long 0x00 10. " PENDSVACT ,PendSV is Active" "Not active,Active"
|
|
bitfld.long 0x00 8. " MONITORACT ,Monitor is Active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SVCALLACT ,SVCall is Active" "Not active,Active"
|
|
bitfld.long 0x00 3. " USGFAULTACT ,UsageFault is Active" "Not active,Active"
|
|
bitfld.long 0x00 1. " BUSFAULTACT ,BusFault is Active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 0. " MEMFAULTACT ,MemManage is Active" "Not active,Active"
|
|
group 0xd28--0xd3b
|
|
line.byte 0x0 "MMFSR,Memory Manage Fault Status Register"
|
|
bitfld.byte 0x0 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid"
|
|
bitfld.byte 0x0 4. " MSTKERR ,Stacking Access Violations" "No error,Error"
|
|
bitfld.byte 0x0 3. " MUNSTKERR ,Unstack Access Violations" "No error,Error"
|
|
textline " "
|
|
bitfld.byte 0x0 1. " DACCVIOL ,Data Access Violation" "No error,Error"
|
|
bitfld.byte 0x0 0. " IACCVIOL ,Instruction Access Violation" "No error,Error"
|
|
;group 0xd29++0x00
|
|
line.byte 0x01 "BFSR,Bus Fault Status Register"
|
|
bitfld.byte 0x01 7. " BFARVALID ,Address Valid" "Not valid,Valid"
|
|
bitfld.byte 0x01 4. " STKERR ,Stacking from Exception has Caused Bus Faults" "No error,Error"
|
|
bitfld.byte 0x01 3. " UNSTKERR ,Unstack from Exception Return has Caused Bus Faults" "No error,Error"
|
|
textline " "
|
|
bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise Data Bus Error" "No error,Error"
|
|
bitfld.byte 0x01 1. " PRECISERR ,Precise Data Bus Error Return" "No error,Error"
|
|
bitfld.byte 0x01 0. " IBUSERR ,Instruction Bus Error Flag" "No error,Error"
|
|
;group 0xd2a++0x01
|
|
line.word 0x02 "USAFAULT,Usage Fault Status Register"
|
|
bitfld.word 0x02 9. " DIVBYZERO ,Illegal PC Load" "No error,Error"
|
|
bitfld.word 0x02 8. " UNALIGNED ,Illegal Unaligned Access" "No error,Error"
|
|
bitfld.word 0x02 3. " NOCP ,Attempt to use a coprocessor instruction" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x02 2. " INVPC ,Attempt to Load EXC_RETURN into PC Illegally" "No error,Error"
|
|
bitfld.word 0x02 1. " INVSTATE , Invalid Combination of EPSR and Instruction" "No error,Error"
|
|
bitfld.word 0x02 0. " UNDEFINSTR ,Illegal Processor State" "No error,Error"
|
|
;group 0xd2c++0x03
|
|
line.long 0x04 "HFSR,Hard Fault Status Register"
|
|
bitfld.long 0x04 31. " DEBUGEVT ,This Bit is Set if There is a Fault Related to Debug" "No error,Error"
|
|
bitfld.long 0x04 30. " FORCED ,Hard Fault Activated" "No error,Error"
|
|
bitfld.long 0x04 1. " VECTTBL ,Bus Fault" "No error,Error"
|
|
;group 0xd30++0x03
|
|
line.long 0x08 "DFSR,Debug Fault Status Register"
|
|
bitfld.long 0x08 4. " EXTERNAL ,External Debug Request Flag" "Not asserted,Asserted"
|
|
bitfld.long 0x08 3. " VCATCH ,Vector Catch Flag" "Not occurred,Occurred"
|
|
bitfld.long 0x08 2. " DWTTRAP ,Data Watchpoint and Trace (DWT) Flag" "Not matched,Matched"
|
|
textline " "
|
|
bitfld.long 0x08 1. " BKPT ,BKPT Flag" "Not executed,Executed"
|
|
bitfld.long 0x08 0. " HALTED ,Halt Request Flag" "Not requested,Requested"
|
|
;group 0xd34++0x03
|
|
line.long 0xc "MMFAR,Memory Manage Fault Address Register"
|
|
;group 0xd38++0x03
|
|
line.long 0x10 "BFAR,Bus Fault Address Register"
|
|
wgroup 0xf00++0x03
|
|
line.long 0x00 "STIR,Software Trigger Interrupt Register"
|
|
hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be triggered"
|
|
tree "Feature Registers"
|
|
width 10.
|
|
rgroup.long 0xD40++0x0B
|
|
line.long 0x00 "ID_PFR0,Processor Feature Register 0"
|
|
bitfld.long 0x00 4.--7. " STATE1 ,Thumb instruction set support" ",,,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..."
|
|
line.long 0x04 "ID_PFR1,Processor Feature Register 1"
|
|
bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..."
|
|
line.long 0x08 "ID_DFR0,Debug Feature Register 0"
|
|
bitfld.long 0x08 20.--23. " DBGMOD ,Support for memory-mapped debug model for M profile processors" "Not supported,Supported,?..."
|
|
hgroup.long 0xD4C++0x03
|
|
hide.long 0x00 "ID_AFR0,Auxiliary Feature Register 0"
|
|
rgroup.long 0xD50++0x03
|
|
line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0"
|
|
bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,ACTLR only,?..."
|
|
bitfld.long 0x00 16.--19. " TCMSUP ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "Level 1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,,,,,,,,,,,,,,,Ignored"
|
|
bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,PMSAv7,?..."
|
|
hgroup.long 0xD54++0x03
|
|
hide.long 0x00 "ID_MMFR1,Memory Model Feature Register 1"
|
|
rgroup.long 0xD58++0x03
|
|
line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2"
|
|
bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..."
|
|
rgroup.long 0xD60++0x13
|
|
line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0"
|
|
bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..."
|
|
bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..."
|
|
bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,CDP/LDC/MCR/STC,CDP2/LDC2/MCR2/STC2,MCRR/MRRC,MCRR2/MRRC2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..."
|
|
bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..."
|
|
bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..."
|
|
line.long 0x04 "ID_ISAR1,Instruction Set Attributes Register 1"
|
|
bitfld.long 0x04 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..."
|
|
bitfld.long 0x04 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..."
|
|
bitfld.long 0x04 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..."
|
|
textline " "
|
|
bitfld.long 0x04 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Supported,Supported,?..."
|
|
line.long 0x08 "ID_ISAR2,Instruction Set Attributes Register 2"
|
|
bitfld.long 0x08 24.--27. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..."
|
|
bitfld.long 0x08 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..."
|
|
bitfld.long 0x08 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,Supported,Supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x08 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MLA,MLA/MLS,?..."
|
|
bitfld.long 0x08 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..."
|
|
bitfld.long 0x08 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,LDRD/STRD,?..."
|
|
line.long 0x0C "ID_ISAR3,Instruction Set Attributes Register 3"
|
|
bitfld.long 0x0C 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..."
|
|
bitfld.long 0x0C 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..."
|
|
bitfld.long 0x0C 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x0C 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..."
|
|
bitfld.long 0x0C 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB,?..."
|
|
line.long 0x10 "ID_ISAR4,Instruction Set Attributes Register 4"
|
|
bitfld.long 0x10 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,?..."
|
|
bitfld.long 0x10 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x10 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,DMB/DSB/ISB,?..."
|
|
textline " "
|
|
bitfld.long 0x10 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..."
|
|
bitfld.long 0x10 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,Shift LSL 0-3,,Shift other,?..."
|
|
bitfld.long 0x10 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,LDRBT/LDRT/STRBT/STRT/LDRHT/LDRSBT/LDRSHTSTRHT,?..."
|
|
tree.end
|
|
tree "CoreSight Identification Registers"
|
|
width 6.
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0c "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0c "CID3,Component ID3"
|
|
tree.end
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Memory Protection Unit"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 15.
|
|
rgroup.long 0xD90++0x03
|
|
line.long 0x00 "MPU_TYPE,MPU Type Register"
|
|
bitfld.long 0x00 16.--23. " IREGION ,Instruction region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,Supported"
|
|
group.long 0xD94++0x03
|
|
line.long 0x00 "MPU_CTRL,MPU Control Register"
|
|
bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled"
|
|
group.long 0xD98++0x03
|
|
line.long 0x00 "MPU_RNR,MPU Region Number Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR"
|
|
tree.close "MPU regions"
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0
|
|
group.long 0xD9C++0x03 "Region 0"
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 0 (not implemented)"
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1
|
|
group.long 0xD9C++0x03 "Region 1"
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 1 (not implemented)"
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2
|
|
group.long 0xD9C++0x03 "Region 2"
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 2 (not implemented)"
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3
|
|
group.long 0xD9C++0x03 "Region 3"
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 3 (not implemented)"
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4
|
|
group.long 0xD9C++0x03 "Region 4"
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 4 (not implemented)"
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5
|
|
group.long 0xD9C++0x03 "Region 5"
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 5 (not implemented)"
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6
|
|
group.long 0xD9C++0x03 "Region 6"
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 6 (not implemented)"
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7
|
|
group.long 0xD9C++0x03 "Region 7"
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 7 (not implemented)"
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8
|
|
group.long 0xD9C++0x03 "Region 8"
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 8 (not implemented)"
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9
|
|
group.long 0xD9C++0x03 "Region 9"
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 9 (not implemented)"
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA
|
|
group.long 0xD9C++0x03 "Region 10"
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 10 (not implemented)"
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB
|
|
group.long 0xD9C++0x03 "Region 11"
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 11 (not implemented)"
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC
|
|
group.long 0xD9C++0x03 "Region 12"
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 12 (not implemented)"
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD
|
|
group.long 0xD9C++0x03 "Region 13"
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 13 (not implemented)"
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE
|
|
group.long 0xD9C++0x03 "Region 14"
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 14 (not implemented)"
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF
|
|
group.long 0xD9C++0x03 "Region 15"
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 15 (not implemented)"
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Nested Vectored Interrupt Controller"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 6.
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "ICTR,Interrupt Controller Type Register"
|
|
bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,33-64,65-96,97-128,129-160,161-192,193-224,225-240,?..."
|
|
tree "Interrupt Enable Registers"
|
|
width 23.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x100++0x7
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x100++0x0B
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x100++0x0F
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x100++0x13
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x100++0x17
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x100++0x1B
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x100++0x1F
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x100++0x1F
|
|
hide.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Pending Registers"
|
|
width 23.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x200++0x07
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x200++0x0B
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x200++0x0F
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x200++0x13
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x200++0x17
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x200++0x1B
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x200++0x1F
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x200++0x1F
|
|
hide.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Active Bit Registers"
|
|
width 9.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
rgroup.long 0x300++0x03
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
rgroup.long 0x300++0x07
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
rgroup.long 0x300++0x0B
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
rgroup.long 0x300++0x0F
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
rgroup.long 0x300++0x13
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
rgroup.long 0x300++0x17
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
rgroup.long 0x300++0x1B
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
rgroup.long 0x300++0x1F
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x1c "ACTIVE8,Active Bit Register 8"
|
|
bitfld.long 0x1c 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1c 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1c 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x300++0x1F
|
|
hide.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
hide.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
hide.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
hide.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
hide.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
hide.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
hide.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
hide.long 0x1c "ACTIVE8,Active Bit Register 8"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Priority Registers"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x400++0x1F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x400++0x3F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x400++0x5F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x400++0x7F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x400++0x9F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x400++0xBF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x400++0xDF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
line.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x400++0xEF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
line.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
line.long 0xE0 "IPR56,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority"
|
|
hexmask.long.byte 0xE0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority"
|
|
hexmask.long.byte 0xE0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority"
|
|
hexmask.long.byte 0xE0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority"
|
|
line.long 0xE4 "IPR57,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority"
|
|
hexmask.long.byte 0xE4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority"
|
|
hexmask.long.byte 0xE4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority"
|
|
hexmask.long.byte 0xE4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority"
|
|
line.long 0xE8 "IPR58,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority"
|
|
hexmask.long.byte 0xE8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority"
|
|
hexmask.long.byte 0xE8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority"
|
|
hexmask.long.byte 0xE8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority"
|
|
line.long 0xEC "IPR59,Interrupt Priority Register"
|
|
hexmask.long.byte 0xEC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority"
|
|
hexmask.long.byte 0xEC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority"
|
|
hexmask.long.byte 0xEC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority"
|
|
hexmask.long.byte 0xEC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority"
|
|
else
|
|
hgroup.long 0x400++0xEF
|
|
hide.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hide.long 0xC "IPR3,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hide.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hide.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hide.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hide.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hide.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hide.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hide.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hide.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hide.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hide.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hide.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hide.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hide.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hide.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hide.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hide.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hide.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hide.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hide.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hide.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hide.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hide.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hide.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hide.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hide.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hide.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hide.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hide.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hide.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hide.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hide.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hide.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hide.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hide.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hide.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hide.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hide.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hide.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hide.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hide.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hide.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hide.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hide.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hide.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hide.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hide.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hide.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hide.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hide.long 0xE0 "IPR56,Interrupt Priority Register"
|
|
hide.long 0xE4 "IPR57,Interrupt Priority Register"
|
|
hide.long 0xE8 "IPR58,Interrupt Priority Register"
|
|
hide.long 0xEC "IPR59,Interrupt Priority Register"
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Debug"
|
|
tree "Core Debug"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 7.
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x20001)==0x20000)
|
|
group 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core running and Lockup/Debug Key" "Not running,Running"
|
|
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core is sleeping/Debug Key" "Not sleeping,Sleeping"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register Read/Write on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x20001)==0x20001)
|
|
group 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core running and Lockup/Debug Key" "Not running,Running"
|
|
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core is sleeping/Debug Key" "Not sleeping,Sleeping"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register Read/Write on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 5. " C_SNAPSTALL ,Halting debug to gain control of the core" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " C_STEP ,Core Step" "No step,Step"
|
|
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x20001)==0x0)
|
|
group 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core running and Lockup/Debug Key" "Not running,Running"
|
|
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core is sleeping/Debug Key" "Not sleeping,Sleeping"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register Read/Write on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x20001)==0x00001)
|
|
group 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core running and Lockup/Debug Key" "Not running,Running"
|
|
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core is sleeping/Debug Key" "Not sleeping,Sleeping"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register Read/Write on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 2. " C_STEP ,Core Step" "No step,Step"
|
|
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
endif
|
|
wgroup 0xDF4++0x03
|
|
line.long 0x00 "DCRSR,Debug Core Register Selector Register"
|
|
bitfld.long 0x00 16. " REGWNR ,Register Read/Write" "Read,Write"
|
|
bitfld.long 0x00 0.--4. " REGSEL ,Register Selection" "R0,R1,R2,R3,R4,R5,R6,R7,R8,R9,R10,R11,R12,R13,R14,R15,xPSR/ Flags,MSP,PSP,RAZ/WI,CONTROL/FAULTMASK/BASEPRI/PRIMASK,?..."
|
|
group 0xDF8++0x03
|
|
line.long 0x00 "DCRDR,Debug Core Register Data Register"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000)
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step"
|
|
textline " "
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Flash Patch and Breakpoint Unit (FPB)"
|
|
sif COMPonent.AVAILABLE("FPB")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))
|
|
width 10.
|
|
group 0x00--0x27
|
|
line.long 0x00 "FP_CTRL,Flash Patch Control Register"
|
|
bitfld.long 0x00 8.--11. " NUM_LIT ,Number of Literal Slots Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " NUM_CODE ,Number of Code Slots Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1. " KEY ,Key Field" "Low,High"
|
|
bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled"
|
|
;group 0x04++0x03
|
|
line.long 0x04 "FP_REMAP,Flash Patch Remap Register"
|
|
hexmask.long.tbyte 0x04 5.--28. 1. " REMAP ,Remap Base Address Field"
|
|
;group 0x08++0x03
|
|
line.long 0x8 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
bitfld.long 0x8 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x8 2.--28. 1. " COMP ,Comparison Address"
|
|
bitfld.long 0x8 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
line.long 0xC "FP_COMP1,Flash Patch Comparator Register 1"
|
|
bitfld.long 0xC 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0xC 2.--28. 1. " COMP ,Comparison Address"
|
|
bitfld.long 0xC 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
line.long 0x10 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
bitfld.long 0x10 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x10 2.--28. 1. " COMP ,Comparison Address"
|
|
bitfld.long 0x10 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
line.long 0x14 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
bitfld.long 0x14 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x14 2.--28. 1. " COMP ,Comparison Address"
|
|
bitfld.long 0x14 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
line.long 0x18 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
bitfld.long 0x18 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x18 2.--28. 1. " COMP ,Comparison Address"
|
|
bitfld.long 0x18 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
line.long 0x1C "FP_COMP5,Flash Patch Comparator Register 5"
|
|
bitfld.long 0x1C 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x1C 2.--28. 1. " COMP ,Comparison Address"
|
|
bitfld.long 0x1C 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
line.long 0x20 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
bitfld.long 0x20 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x20 2.--28. 1. " COMP ,Comparison Address"
|
|
bitfld.long 0x20 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
line.long 0x24 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
bitfld.long 0x24 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x24 2.--28. 1. " COMP ,Comparison Address"
|
|
bitfld.long 0x24 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
tree "Coresight Management Registers"
|
|
rgroup 0xfd0--0xfff
|
|
line.long 0x00 "PID4,Peripheral ID4"
|
|
line.long 0x04 "PID5,Peripheral ID5"
|
|
line.long 0x08 "PID6,Peripheral ID6"
|
|
line.long 0x0c "PID7,Peripheral ID7"
|
|
line.long 0x10 "PID0,Peripheral ID0"
|
|
line.long 0x14 "PID1,Peripheral ID1"
|
|
line.long 0x18 "PID2,Peripheral ID2"
|
|
line.long 0x1c "PID3,Peripheral ID3"
|
|
line.long 0x20 "CID0,Component ID0"
|
|
line.long 0x24 "CID1,Component ID1"
|
|
line.long 0x28 "CID2,Component ID2"
|
|
line.long 0x2c "CID3,Component ID3"
|
|
tree.end
|
|
else
|
|
newline
|
|
textline "FPB component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Data Watchpoint and Trace Unit (DWT)"
|
|
sif COMPonent.AVAILABLE("DWT")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
|
|
width 15.
|
|
group 0x00--0x1B
|
|
line.long 0x00 "DWT_CTRL,DWT Control Register"
|
|
bitfld.long 0x00 28.--31. " NUMCOMP ,Number of Comparators Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 22. " CYCEVTENA ,Enables Cycle Count Event" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " FOLDEVTENA ,Enables Folded Instruction Count Event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " LSUEVTENA ,Enables LSU Count Event" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " SLEEPEVTENA ,Enables Sleep Count Event" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " EXCEVTENA ,Enables Interrupt Overhead Event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " CPIEVTENA ,Enables CPI Count Event" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " EXCTRCENA ,Enables Interrupt Event Tracing" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " PCSAMPLEENA ,Enables PC Sampling Event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " SYNCTAP ,Feed Synchronization Pulse to the ITM SYNCEN Control" "Disabled,24,26,28"
|
|
bitfld.long 0x00 9. " CYCTAP ,Selects a Tap on the DWT_CYCCNT Register" "Bit 6,Bit 10"
|
|
bitfld.long 0x00 5.--8. " POSTCNT ,Post-Scalar Counter for CYCTAP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 1.--4. " POSTPRESET ,Reload Value for POSTCNT Post-Scalar Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0. " CYCCNTENA ,Enable the DWT_CYCCNT Counter" "Disabled,Enabled"
|
|
;group 0x04++0x03
|
|
line.long 0x04 "DWT_CYCCNT,Cycle Count register"
|
|
;group 0x08++0x03
|
|
line.long 0x08 "DWT_CPICNT,DWT CPI Count Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " CPICNT ,The base CPI counter"
|
|
;group 0x0c++0x03
|
|
line.long 0x0c "DWT_EXCCNT,DWT Exception Overhead Count Register"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " EXCCNT ,The exception overhead counter"
|
|
;group 0x10++0x03
|
|
line.long 0x10 "DWT_SLEEPCNT,DWT Sleep Count Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. " SLEEPCNT ,Sleep Counter"
|
|
;group 0x14++0x03
|
|
line.long 0x14 "DWT_LSUCNT,DWT LSU Count Register"
|
|
hexmask.long.byte 0x14 0.--7. 1. " LSUCNT ,Load-store counter"
|
|
;group 0x18++0x03
|
|
line.long 0x18 "DWT_FOLDCNT,DWT Fold Count Register"
|
|
hexmask.long.byte 0x18 0.--7. 1. " FOLDCNT ,Folded-instruction counter"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "DWT_MASK0,DWT Mask Registers 0"
|
|
bitfld.long 0x00 0.--3. " MASK ,Mask on Data Address when Matching Against COMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "DWT_MASK1,DWT Mask Registers 1"
|
|
bitfld.long 0x00 0.--3. " MASK ,Mask on Data Address when Matching Against COMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "DWT_MASK2,DWT Mask Registers 2"
|
|
bitfld.long 0x00 0.--3. " MASK ,Mask on Data Address when Matching Against COMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "DWT_MASK3,DWT Mask Registers 3"
|
|
bitfld.long 0x00 0.--3. " MASK ,Mask on Data Address when Matching Against COMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x20)==0x00)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res"
|
|
bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
|
|
bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Sample and emit PC through ITM,Emit data through ITM,Sample PC and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
|
|
else
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res"
|
|
bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
|
|
bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Emit address offset through ITM,Emit data and address offset through ITM,Emit address offset and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
|
|
endif
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x38))&0x20)==0x00)
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res"
|
|
bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
|
|
bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Sample and emit PC through ITM,Emit data through ITM,Sample PC and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
|
|
else
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res"
|
|
bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
|
|
bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Emit address offset through ITM,Emit data and address offset through ITM,Emit address offset and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
|
|
endif
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x48))&0x20)==0x00)
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res"
|
|
bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
|
|
bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Sample and emit PC through ITM,Emit data through ITM,Sample PC and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
|
|
else
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res"
|
|
bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
|
|
bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Emit address offset through ITM,Emit data and address offset through ITM,Emit address offset and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
|
|
endif
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x58))&0x20)==0x00)
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res"
|
|
bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
|
|
bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Sample and emit PC through ITM,Emit data through ITM,Sample PC and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
|
|
else
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res"
|
|
bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
|
|
bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Emit address offset through ITM,Emit data and address offset through ITM,Emit address offset and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
|
|
endif
|
|
tree "Coresight Management Registers"
|
|
rgroup 0xfd0--0xfff
|
|
line.long 0x00 "PID4,Peripheral ID4"
|
|
line.long 0x04 "PID5,Peripheral ID5"
|
|
line.long 0x08 "PID6,Peripheral ID6"
|
|
line.long 0x0c "PID7,Peripheral ID7"
|
|
line.long 0x10 "PID0,Peripheral ID1"
|
|
line.long 0x14 "PID1,Peripheral ID2"
|
|
line.long 0x18 "PID2,Peripheral ID3"
|
|
line.long 0x1c "PID3,Peripheral ID4"
|
|
line.long 0x20 "CID0,Component ID0"
|
|
line.long 0x24 "CID1,Component ID1"
|
|
line.long 0x28 "CID2,Component ID2"
|
|
line.long 0x2c "CID3,Component ID3"
|
|
tree.end
|
|
else
|
|
newline
|
|
textline "DWT component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
AUTOINDENT.POP
|
|
tree.end
|
|
config 16. 8.
|
|
tree.open "Analog to Digital Converter (ADC)"
|
|
tree "ADC0"
|
|
base ad:0x40040000
|
|
width 11.
|
|
rgroup.long 0x000++0x03
|
|
line.long 0x00 "ADC_IDR,ADC ID Register"
|
|
hexmask.long 0x00 0.--25. 1. " IDCODE[25:0] ,ID Code"
|
|
group.long 0x004++0x03
|
|
line.long 0x00 "ADC_CEDR,ADC Clock Enable/Disable Register"
|
|
bitfld.long 0x00 31. " DBGEN ,Debug enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CLKEN ,ADC Clock Enable/Disable" "Disabled,Enabled"
|
|
wgroup.long 0x008++0x03
|
|
line.long 0x00 "ADC_SRR,ADC Software Reset Register"
|
|
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
|
|
wgroup.long 0x00c++0x03
|
|
line.long 0x00 "ADC_CSR,ADC Control Set Register"
|
|
bitfld.long 0x00 10. " STOP1 ,ADC Conversion Stop in continuous conversion" "No effect,Stop"
|
|
bitfld.long 0x00 9. " START1 ,ADC01 Conversion Start" "No effect,Start"
|
|
bitfld.long 0x00 8. " ADCEN1 ,ADC01 Enable" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 2. " STOP0 ,ADC Conversion Stop in continuous conversion" "No effect,Stop"
|
|
bitfld.long 0x00 1. " START0 ,ADC00 Conversion Start" "No effect,Start"
|
|
bitfld.long 0x00 0. " ADCEN0 ,ADC00 Enable" "No effect,Enable"
|
|
wgroup.long 0x010++0x03
|
|
line.long 0x00 "ADC_CCR,ADC Control Clear Register"
|
|
bitfld.long 0x00 8. " ADCEN1 ,ADC01 Disable Control" "No effect,Disable"
|
|
bitfld.long 0x00 0. " ADCEN0 ,ADC00 Disable Control" "No effect,Disable"
|
|
group.long 0x014++0x03
|
|
line.long 0x00 "ADC_CDR,ADC Clock Divider Register"
|
|
bitfld.long 0x00 0.--5. " CDIV ,ADC Clock Divider Selection Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x018++0x03
|
|
line.long 0x00 "ADC_MR,ADC Mode Register"
|
|
bitfld.long 0x00 29.--31. " CCNT1[2:0] ,Conversion Count Field" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x00 28. " CMODE1 ,Conversion Mode Control" "One shot,Continuous"
|
|
bitfld.long 0x00 26. " EICR1 ,External/Internal Calibration Reference" "External,Internal"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICRV1 ,Internal Calibration Reference (Voltage) Value" "1/4AVDD,3/4AVDD"
|
|
bitfld.long 0x00 24. " CALEN1 ,Calibration Enable/Disable Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 21.--23. " CCNT0[2:0] ,Conversion Count Field" "1,2,3,4,5,6,7,8"
|
|
textline " "
|
|
bitfld.long 0x00 20. " CMODE0 ,Conversion Mode Control" "Continuous,One shot"
|
|
bitfld.long 0x00 18. " EICR0 ,External/Internal Calibration Reference" "External,Internal"
|
|
bitfld.long 0x00 17. " ICRV0 ,Internal Calibration Reference (Voltage) Value" "1/4AVDD,3/4AVDD"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CALEN0 ,Calibration Enable/Disable Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 13.--15. " TRIG1 ,ADC Start Trigger Signal Selection" "Software,ADTRG-Rising,ADTRG-Falling,ADTRG-Both,TCx,IMC0,IMC1,?..."
|
|
bitfld.long 0x00 5.--7. " TRIG0 ,ADC Start Trigger Signal Selection" "Software,ADTRG-Rising,ADTRG-Falling,ADTRG-Both,TCx,IMC0,IMC1,?..."
|
|
group.long 0x01c++0x03
|
|
line.long 0x00 "ADC_CCSR0,ADC Conversion Channel Sequence Register"
|
|
bitfld.long 0x00 28.--31. " ICNUM7[3:0] ,Analog Input Channel Number Selection Field" "AIN 00 with OP amp,AIN 01,AIN 02,AIN 03,AIN 04,AIN 05,AIN 06,AIN 07,AIN 08,AIN 09 with OP amp,AIN 0A with OP amp,AIN 09 with OB amp,?..."
|
|
bitfld.long 0x00 24.--27. " ICNUM6[3:0] ,Analog Input Channel Number Selection Field" "AIN 00 with OP amp,AIN 01,AIN 02,AIN 03,AIN 04,AIN 05,AIN 06,AIN 07,AIN 08,AIN 09 with OP amp,AIN 0A with OP amp,AIN 09 with OB amp,?..."
|
|
bitfld.long 0x00 20.--23. " ICNUM5[3:0] ,Analog Input Channel Number Selection Field" "AIN 00 with OP amp,AIN 01,AIN 02,AIN 03,AIN 04,AIN 05,AIN 06,AIN 07,AIN 08,AIN 09 with OP amp,AIN 0A with OP amp,AIN 09 with OB amp,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " ICNUM4[3:0] ,Analog Input Channel Number Selection Field" "AIN 00 with OP amp,AIN 01,AIN 02,AIN 03,AIN 04,AIN 05,AIN 06,AIN 07,AIN 08,AIN 09 with OP amp,AIN 0A with OP amp,AIN 09 with OB amp,?..."
|
|
bitfld.long 0x00 12.--15. " ICNUM3[3:0] ,Analog Input Channel Number Selection Field" "AIN 00 with OP amp,AIN 01,AIN 02,AIN 03,AIN 04,AIN 05,AIN 06,AIN 07,AIN 08,AIN 09 with OP amp,AIN 0A with OP amp,AIN 09 with OB amp,?..."
|
|
bitfld.long 0x00 8.--11. " ICNUM2[3:0] ,Analog Input Channel Number Selection Field" "AIN 00 with OP amp,AIN 01,AIN 02,AIN 03,AIN 04,AIN 05,AIN 06,AIN 07,AIN 08,AIN 09 with OP amp,AIN 0A with OP amp,AIN 09 with OB amp,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " ICNUM1[3:0] ,Analog Input Channel Number Selection Field" "AIN 00 with OP amp,AIN 01,AIN 02,AIN 03,AIN 04,AIN 05,AIN 06,AIN 07,AIN 08,AIN 09 with OP amp,AIN 0A with OP amp,AIN 09 with OB amp,?..."
|
|
bitfld.long 0x00 0.--3. " ICNUM0[3:0] ,Analog Input Channel Number Selection Field" "AIN 00 with OP amp,AIN 01,AIN 02,AIN 03,AIN 04,AIN 05,AIN 06,AIN 07,AIN 08,AIN 09 with OP amp,AIN 0A with OP amp,AIN 09 with OB amp,?..."
|
|
group.long 0x020++0x03
|
|
line.long 0x00 "ADC_CCSR1,ADC Conversion Channel Sequence Register"
|
|
bitfld.long 0x00 28.--31. " ICNUM7[3:0] ,Analog Input Channel Number Selection Field" "AIN 00 with OP amp,AIN 01,AIN 02,AIN 03,AIN 04,AIN 05,AIN 06,AIN 07,AIN 08,AIN 09 with OP amp,AIN 0A with OP amp,AIN 09 with OB amp,?..."
|
|
bitfld.long 0x00 24.--27. " ICNUM6[3:0] ,Analog Input Channel Number Selection Field" "AIN 00 with OP amp,AIN 01,AIN 02,AIN 03,AIN 04,AIN 05,AIN 06,AIN 07,AIN 08,AIN 09 with OP amp,AIN 0A with OP amp,AIN 09 with OB amp,?..."
|
|
bitfld.long 0x00 20.--23. " ICNUM5[3:0] ,Analog Input Channel Number Selection Field" "AIN 00 with OP amp,AIN 01,AIN 02,AIN 03,AIN 04,AIN 05,AIN 06,AIN 07,AIN 08,AIN 09 with OP amp,AIN 0A with OP amp,AIN 09 with OB amp,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " ICNUM4[3:0] ,Analog Input Channel Number Selection Field" "AIN 00 with OP amp,AIN 01,AIN 02,AIN 03,AIN 04,AIN 05,AIN 06,AIN 07,AIN 08,AIN 09 with OP amp,AIN 0A with OP amp,AIN 09 with OB amp,?..."
|
|
bitfld.long 0x00 12.--15. " ICNUM3[3:0] ,Analog Input Channel Number Selection Field" "AIN 00 with OP amp,AIN 01,AIN 02,AIN 03,AIN 04,AIN 05,AIN 06,AIN 07,AIN 08,AIN 09 with OP amp,AIN 0A with OP amp,AIN 09 with OB amp,?..."
|
|
bitfld.long 0x00 8.--11. " ICNUM2[3:0] ,Analog Input Channel Number Selection Field" "AIN 00 with OP amp,AIN 01,AIN 02,AIN 03,AIN 04,AIN 05,AIN 06,AIN 07,AIN 08,AIN 09 with OP amp,AIN 0A with OP amp,AIN 09 with OB amp,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " ICNUM1[3:0] ,Analog Input Channel Number Selection Field" "AIN 00 with OP amp,AIN 01,AIN 02,AIN 03,AIN 04,AIN 05,AIN 06,AIN 07,AIN 08,AIN 09 with OP amp,AIN 0A with OP amp,AIN 09 with OB amp,?..."
|
|
bitfld.long 0x00 0.--3. " ICNUM0[3:0] ,Analog Input Channel Number Selection Field" "AIN 00 with OP amp,AIN 01,AIN 02,AIN 03,AIN 04,AIN 05,AIN 06,AIN 07,AIN 08,AIN 09 with OP amp,AIN 0A with OP amp,AIN 09 with OB amp,?..."
|
|
rgroup.long 0x024++0x03
|
|
line.long 0x00 "ADC_SR,ADC Status Register"
|
|
bitfld.long 0x00 11. " CTCVS1 ,Continuous mode status" "One shot,Continuous mode"
|
|
bitfld.long 0x00 10. " ADCEN1 ,ADC Enable / Disable Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " BUSY1 ,ADC Status monitoring" "Not conversion operating,On conversion operating"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ADCSTABLE1 ,ADC Stabilization Status" "Not stabilized,Stabilized"
|
|
bitfld.long 0x00 3. " CTCVS0 ,Continuous mode status" "One shot,Continuous mode"
|
|
bitfld.long 0x00 2. " ADCEN0 ,ADC Enable / Disable Status" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " BUSY0 ,ADC Status monitoring" "Not conversion operating,On conversion operating"
|
|
bitfld.long 0x00 0. " ADCSTABLE0 ,ADC Stabilization Status" "Not stabilized,Stabilized"
|
|
group.long 0x028++0x03
|
|
line.long 0x00 "ADC_IMSCR,ADC Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x00 9. " OVR1 ,Overrun Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 8. " EOC1 ,End of Conversion Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 1. " OVR0 ,Overrun Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EOC0 ,End of Conversion Interrupt Mask" "Masked,Not masked"
|
|
rgroup.long 0x02c++0x03
|
|
line.long 0x00 "ADC_RISR,ADC Raw Interrupt Status Register"
|
|
bitfld.long 0x00 9. " OVR1 ,Overrun Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " EOC1 ,End of Conversion Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " OVR0 ,Overrun Raw Interrupt Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EOC0 ,End of Conversion Raw Interrupt Status" "No interrupt,Interrupt"
|
|
rgroup.long 0x030++0x03
|
|
line.long 0x00 "ADC_MISR,ADC Masked Interrupt Status Register"
|
|
bitfld.long 0x00 9. " OVR1 ,Overrun Masked Interrupt State" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. " EOC1 ,End of Conversion Masked Interrupt State" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " OVR0 ,Overrun Masked Interrupt State" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EOC0 ,End of Conversion Masked Interrupt State" "No interrupt,Interrupt"
|
|
wgroup.long 0x034++0x03
|
|
line.long 0x00 "ADC_ICR,ADC Interrupt Clear Register"
|
|
bitfld.long 0x00 9. " OVR1 ,Overrun interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 8. " EOC1 ,End of conversion interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 1. " OVR0 ,Overrun interrupt" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EOC0 ,End of conversion interrupt" "No effect,Clear"
|
|
rgroup.long 0x038++0x03
|
|
line.long 0x00 "ADC_CRR0,ADC Conversion Result Register"
|
|
hexmask.long.word 0x00 0.--11. 1. " DATA ,Conversion Result Data of ADC"
|
|
rgroup.long 0x03c++0x03
|
|
line.long 0x00 "ADC_CRR1,ADC Conversion Result Register"
|
|
hexmask.long.word 0x00 0.--11. 1. " DATA ,Conversion Result Data of ADC"
|
|
group.long 0x040++0x03
|
|
line.long 0x00 "ADC_GCR0,ADC Gain Calibration Register"
|
|
hexmask.long.word 0x00 0.--13. 1. " GCC_FRAC ,ADC Gain Calibration Constant Value"
|
|
group.long 0x044++0x03
|
|
line.long 0x00 "ADC_OCR0,ADC Offset Calibration Register"
|
|
hexmask.long.word 0x00 0.--13. 1. " ADCOCC ,ADC Offset Calibration Constant Value"
|
|
group.long 0x048++0x03
|
|
line.long 0x00 "ADC_GCR1,ADC Gain Calibration Register"
|
|
hexmask.long.word 0x00 0.--13. 1. " GCC_FRAC ,ADC Gain Calibration Constant Value"
|
|
group.long 0x04c++0x03
|
|
line.long 0x00 "ADC_OCR1,ADC Offset Calibration Register"
|
|
hexmask.long.word 0x00 0.--13. 1. " ADCOCC ,ADC Offset Calibration Constant Value"
|
|
group.long 0x050++0x03
|
|
line.long 0x00 "ADC_DMACR,ADC DMA Control Register"
|
|
bitfld.long 0x00 1. " DMAE1 ,DMA for ADC Enable/Disable Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " DMAE0 ,DMA for ADC Enable/Disable Control" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
tree "ADC1"
|
|
base ad:0x40041000
|
|
width 11.
|
|
rgroup.long 0x000++0x03
|
|
line.long 0x00 "ADC_IDR,ADC ID Register"
|
|
hexmask.long 0x00 0.--25. 1. " IDCODE[25:0] ,Identification Register"
|
|
group.long 0x004++0x03
|
|
line.long 0x00 "ADC_CEDR,ADC Clock Enable/Disable Register"
|
|
bitfld.long 0x00 31. " DBGEN ,Debug enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CLKEN ,ADC Clock Enable/Disable" "Disabled,Enabled"
|
|
wgroup.long 0x008++0x03
|
|
line.long 0x00 "ADC_SRR,ADC Software Reset Register"
|
|
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
|
|
wgroup.long 0x00c++0x03
|
|
line.long 0x00 "ADC_CSR,ADC Control Set Register"
|
|
bitfld.long 0x00 2. " STOP ,ADC Conversion Stop in continuous conversion" "No effect,Stop"
|
|
bitfld.long 0x00 1. " START ,ADC Conversion Start" "No effect,Start"
|
|
bitfld.long 0x00 0. " ADCEN ,ADC Enable" "No effect,Enable"
|
|
wgroup.long 0x010++0x03
|
|
line.long 0x00 "ADC_CCR,ADC Control Clear Register"
|
|
bitfld.long 0x00 0. " ADCEN ,ADC Disable Control" "No effect,Disable"
|
|
group.long 0x014++0x03
|
|
line.long 0x00 "ADC_CDR,ADC Clock Divider Register"
|
|
bitfld.long 0x00 0.--5. " CDIV ,ADC Clock Divider Selection Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x018++0x03
|
|
line.long 0x00 "ADC_MR,ADC Mode Register"
|
|
bitfld.long 0x00 29.--31. " CCNT[2:0] ,Conversion Count Field" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x00 28. " CMODE ,Conversion Mode Control" "One shot,Continuous"
|
|
bitfld.long 0x00 26. " EICR1 ,External/Internal Calibration Reference" "External,Internal"
|
|
textline " "
|
|
bitfld.long 0x00 24. " CALEN ,Calibration Enable/Disable Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 5.--7. " TRIG[2:0] ,ADC Start Trigger Signal Selection" "Software,ADTRG-Rising,ADTRG-Falling,ADTRG-Both,TMCx,?..."
|
|
group.long 0x01c++0x03
|
|
line.long 0x00 "ADC_CCSR,ADC Conversion Channel Sequence Register"
|
|
bitfld.long 0x00 28.--30. " ICNUM7[2:0] ,Analog Input Channel Number Selection Field" "AIN 10,AIN 11,AIN 12,AIN 13,AIN 14,AIN 15,AIN 16,AIN 17"
|
|
bitfld.long 0x00 24.--26. " ICNUM6[2:0] ,Analog Input Channel Number Selection Field" "AIN 10,AIN 11,AIN 12,AIN 13,AIN 14,AIN 15,AIN 16,AIN 17"
|
|
bitfld.long 0x00 20.--22. " ICNUM5[2:0] ,Analog Input Channel Number Selection Field" "AIN 10,AIN 11,AIN 12,AIN 13,AIN 14,AIN 15,AIN 16,AIN 17"
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " ICNUM4[2:0] ,Analog Input Channel Number Selection Field" "AIN 10,AIN 11,AIN 12,AIN 13,AIN 14,AIN 15,AIN 16,AIN 17"
|
|
bitfld.long 0x00 12.--14. " ICNUM3[2:0] ,Analog Input Channel Number Selection Field" "AIN 10,AIN 11,AIN 12,AIN 13,AIN 14,AIN 15,AIN 16,AIN 17"
|
|
bitfld.long 0x00 8.--10. " ICNUM2[2:0] ,Analog Input Channel Number Selection Field" "AIN 10,AIN 11,AIN 12,AIN 13,AIN 14,AIN 15,AIN 16,AIN 17"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " ICNUM1[2:0] ,Analog Input Channel Number Selection Field" "AIN 10,AIN 11,AIN 12,AIN 13,AIN 14,AIN 15,AIN 16,AIN 17"
|
|
bitfld.long 0x00 0.--2. " ICNUM0[2:0] ,Analog Input Channel Number Selection Field" "AIN 10,AIN 11,AIN 12,AIN 13,AIN 14,AIN 15,AIN 16,AIN 17"
|
|
rgroup.long 0x020++0x03
|
|
line.long 0x00 "ADC_SR,ADC Status Register"
|
|
bitfld.long 0x00 3. " CTCVS ,Continuous mode status" "One shot,Continuous mode"
|
|
bitfld.long 0x00 2. " ADCEN ,ADC Enable / Disable Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " BUSY ,ADC Status monitoring" "Not conversion operating,On conversion operating"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ADCSTABLE ,ADC Stabilization Status" "Not stabilized,Stabilized"
|
|
group.long 0x024++0x03
|
|
line.long 0x00 "ADC_IMSCR,ADC Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x00 1. " OVR ,Overrun Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 0. " EOC ,End of Conversion Interrupt Mask" "Masked,Not masked"
|
|
rgroup.long 0x028++0x03
|
|
line.long 0x00 "ADC_RISR,ADC Raw Interrupt Status Register"
|
|
bitfld.long 0x00 1. " OVR ,Overrun Raw Interrupt Status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " EOC ,End of Conversion Raw Interrupt Status" "No interrupt,Interrupt"
|
|
rgroup.long 0x02c++0x03
|
|
line.long 0x00 "ADC_MISR,ADC Masked Interrupt Status Register"
|
|
bitfld.long 0x00 1. " OVR ,Overrun Masked Interrupt State" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " EOC ,End of Conversion Masked Interrupt State" "No interrupt,Interrupt"
|
|
wgroup.long 0x030++0x03
|
|
line.long 0x00 "ADC_ICR,ADC Interrupt Clear Register"
|
|
bitfld.long 0x00 1. " OVR ,Overrun interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 0. " EOC ,End of conversion interrupt" "No effect,Clear"
|
|
rgroup.long 0x034++0x03
|
|
line.long 0x00 "ADC_CRR,ADC Conversion Result Register"
|
|
hexmask.long.word 0x00 0.--9. 1. " DATA ,Conversion Result Data of ADC"
|
|
group.long 0x038++0x03
|
|
line.long 0x00 "ADC_GCR,ADC Gain Calibration Register"
|
|
hexmask.long.word 0x00 0.--13. 1. " GCC_FRAC ,ADC Gain Calibration Constant Value"
|
|
group.long 0x03c++0x03
|
|
line.long 0x00 "ADC_OCR,ADC Offset Calibration Register"
|
|
hexmask.long.word 0x00 0.--11. 1. " ADCOCC ,ADC Offset Calibration Constant Value"
|
|
group.long 0x040++0x03
|
|
line.long 0x00 "ADC_DMACR,ADC DMA Control Register"
|
|
bitfld.long 0x00 0. " DMAE ,DMA for ADC Enable/Disable Control" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree.open "Controller Area Network (CAN)"
|
|
tree "CAN0"
|
|
base ad:0x400E0000
|
|
width 11.
|
|
group.long 0x058++0x3
|
|
line.long 0x00 "CAN_PMSR,CAN Power Manager Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " DBGEN_set/clr ,Debug mode status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " CAN_set/clr ,CAN clock status" "Disabled,Enabled"
|
|
wgroup.long 0x060++0x3
|
|
line.long 0x00 "CAN_CR,CAN Control Register"
|
|
bitfld.long 0x00 10. " STSR ,Store shift register" "No effect,Shift"
|
|
bitfld.long 0x00 9. " ABBTX ,Abort basic transmission" "No effect,Abort"
|
|
bitfld.long 0x00 8. " RQBTX ,Request basic transmission" "No effect,Request"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CCDIS ,Configuration change disable" "No effect,Disable"
|
|
bitfld.long 0x00 3. " CCEN ,Configuration change enable" "No effect,Enable"
|
|
bitfld.long 0x00 2. " CANDIS ,CAN disable" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CANEN ,CAN enable" "No effect,Enable"
|
|
bitfld.long 0x00 0. " SWRST ,CAN software reset" "No effect,Reset"
|
|
group.long 0x064++0x3
|
|
line.long 0x00 "CAN_MR,CAN Mode Register"
|
|
bitfld.long 0x00 20.--22. " PHSEG2 ,Phase segment 2 value" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x00 16.--19. " PHSEG1 ,Phase segment 1 value" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 14. " AR ,Automatic retransmission" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " SJW ,Synchronization jump width" "0,1,2,3"
|
|
bitfld.long 0x00 10. " CSSEL ,CAN Clock(CANCLK) Source Selection" "PCLK,EMCLK"
|
|
hexmask.long.word 0x00 0.--9. 1. " BD ,Baud rate pre-scalar"
|
|
group.long 0x06c++0x3
|
|
line.long 0x00 "CAN_CSR,CAN Clear Status Register"
|
|
bitfld.long 0x00 15. " CRC ,Clear CRC error" "No effect,Clear"
|
|
bitfld.long 0x00 14. " BIT0 ,Clear bit to zero error" "No effect,Clear"
|
|
bitfld.long 0x00 13. " BIT1 ,Clear bit to one error" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 12. " ACK ,Clear acknowledge error" "No effect,Clear"
|
|
bitfld.long 0x00 11. " FORM ,Clear form error" "No effect,Clear"
|
|
bitfld.long 0x00 10. " STUFF ,Clear stuff error" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TXOK ,Clear successfully transmit message" "No effect,Clear"
|
|
bitfld.long 0x00 8. " RXOK ,Clear successfully received message" "No effect,Clear"
|
|
bitfld.long 0x00 4. " ACTVT ,Clear activity" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BUSOFFTR ,Clear bus off transition" "No effect,Clear"
|
|
bitfld.long 0x00 2. " ERPASSTR ,Clear error passive transition" "No effect,Clear"
|
|
bitfld.long 0x00 1. " ERWARNTR ,Clear error passive warning transition" "No effect,Clear"
|
|
rgroup.long 0x070++0x3
|
|
line.long 0x00 "CAN_SR,CAN Status Register"
|
|
bitfld.long 0x00 25. " BTXPD ,Basic transmission pending" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " CCENS ,Configuration change enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22.--23. " TS/RS ,Transmit status" "Idle,Receive mode,Transmit mode,Lost arbitration"
|
|
textline " "
|
|
bitfld.long 0x00 21. " BUSY1 ,Busy flag of interface 1" "Idle,Busy"
|
|
bitfld.long 0x00 20. " BUSY0 ,Busy flag of interface 0" "Idle,Busy"
|
|
bitfld.long 0x00 19. " BUSOFF ,Bus off" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " ERPASS ,Error passive" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " ERWARN ,Error passive warning" "No error,Error"
|
|
bitfld.long 0x00 16. " CANENS ,CAN enable status" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CRC ,CRC error" "No error,Error"
|
|
bitfld.long 0x00 14. " BIT0 ,Bit to zero error" "No error,Error"
|
|
bitfld.long 0x00 13. " BIT1 ,Bit to one error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 12. " ACK ,Acknowledge error" "No error,Error"
|
|
bitfld.long 0x00 11. " FORM ,Form error" "No error,Error"
|
|
bitfld.long 0x00 10. " STUFF ,Stuff error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TXOK ,Successfully transmitted a message" "Not transmitted,Transmitted"
|
|
bitfld.long 0x00 8. " RXOK ,Successfully received a message" "Not received,Received"
|
|
bitfld.long 0x00 4. " ACTVT ,Activity" "No activity,Activity"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BUSOFFTR ,Bus off transition" "No transition,Transition"
|
|
bitfld.long 0x00 2. " ERPASSTR ,Error passive transition" "No transition,Transition"
|
|
bitfld.long 0x00 1. " ERWARNTR ,Error passive warning transition" "No transition,Transition"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ISS ,Interrupt source status" "No interrupt,Interrupt"
|
|
group.long 0x07c++0x3
|
|
line.long 0x00 "CAN_IMR,CAN Interrupt Mask Register"
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " CRC ,CRC error mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " BIT0 ,Bit to zero error mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " BIT1 ,Bit to one error mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " ACK ,Acknowledge error mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " FORM ,Form error mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " STUFF ,Stuff error mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " TXOK ,Successfully transmitted a message mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " RXOK ,Successfully received a message mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " ACTVT ,Activity mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " BUSOFFTR ,Bus off mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " ERPASSTR ,Error passive mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " ERWARNTR ,Error passive warning mask" "Disabled,Enabled"
|
|
rgroup.long 0x084++0x3
|
|
line.long 0x00 "CAN_ISSR,CAN Interrupt Source Status Register"
|
|
bitfld.long 0x00 31. " CH32 ,Channel 32 interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 30. " CH31 ,Channel 31 interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 29. " CH30 ,Channel 30 interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 28. " CH29 ,Channel 29 interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 27. " CH28 ,Channel 28 interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 26. " CH27 ,Channel 27 interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CH26 ,Channel 26 interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 24. " CH25 ,Channel 25 interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 23. " CH24 ,Channel 24 interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 22. " CH23 ,Channel 23 interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 21. " CH22 ,Channel 22 interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 20. " CH21 ,Channel 21 interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 19. " CH20 ,Channel 20 interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 18. " CH19 ,Channel 19 interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 17. " CH18 ,Channel 18 interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CH17 ,Channel 17 interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 15. " CH16 ,Channel 16 interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 14. " CH15 ,Channel 15 interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 13. " CH14 ,Channel 14 interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 12. " CH13 ,Channel 13 interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 11. " CH12 ,Channel 12 interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CH11 ,Channel 11 interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 9. " CH10 ,Channel 10 interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 8. " CH9 ,Channel 9 interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CH8 ,Channel 8 interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " CH7 ,Channel 7 interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " CH6 ,Channel 6 interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CH5 ,Channel 5 interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " CH4 ,Channel 4 interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " CH3 ,Channel 3 interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CH2 ,Channel 2 interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " CH1 ,Channel 1 interrupt" "Not occurred,Occurred"
|
|
group.long 0x090++0x3
|
|
line.long 0x00 "CAN_SIMR,CAN Source Interrupt Mask Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " CH32 ,Channel 32 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " CH31 ,Channel 31 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " CH30 ,Channel 30 interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " CH29 ,Channel 29 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " CH28 ,Channel 28 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " CH27 ,Channel 27 interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " CH26 ,Channel 26 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " CH25 ,Channel 25 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " CH24 ,Channel 24 interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " CH23 ,Channel 23 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " CH22 ,Channel 22 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " CH21 ,Channel 21 interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " CH20 ,Channel 20 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " CH19 ,Channel 19 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " CH18 ,Channel 18 interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " CH17 ,Channel 17 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " CH16 ,Channel 16 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " CH15 ,Channel 15 interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " CH14 ,Channel 14 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " CH13 ,Channel 13 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " CH12 ,Channel 12 interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " CH11 ,Channel 11 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " CH10 ,Channel 10 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " CH9 ,Channel 9 interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " CH8 ,Channel 8 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " CH7 ,Channel 7 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " CH6 ,Channel 6 interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " CH5 ,Channel 5 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " CH4 ,Channel 4 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " CH3 ,Channel 3 interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " CH2 ,Channel 2 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " CH1 ,Channel 1 interrupt mask" "Disabled,Enabled"
|
|
rgroup.long 0x094++0x3
|
|
line.long 0x00 "CAN_HPIR,CAN Highest Priority Interrupt Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " INTID ,Channel X interrupt mask"
|
|
rgroup.long 0x098++0x3
|
|
line.long 0x00 "CAN_ERCR,CAN Error Counter Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " TEC ,Transmit error counter"
|
|
bitfld.long 0x00 7. " REP ,Receive Error Passive" "Below,Reached"
|
|
hexmask.long.byte 0x00 0.--6. 1. " REC ,Reception error counter"
|
|
group.long 0x100++0x3
|
|
line.long 0x00 "CAN_TMR0,CAN Interface 0 Transfer Management Register"
|
|
bitfld.long 0x00 15. " CLRIT ,Clear interrupt pending" "Unchanged,Cleared"
|
|
bitfld.long 0x00 14. " TRND ,Set TXRQST bit or clear NEWDAT" "Unchanged,Cleared"
|
|
bitfld.long 0x00 12. " AMCR ,Access message control register" "Unchanged,Transfer"
|
|
textline " "
|
|
bitfld.long 0x00 11. " AIR ,Access identifier register" "Unchanged,Transfer"
|
|
bitfld.long 0x00 10. " AMSKR ,Access mask register" "Unchanged,Transfer"
|
|
bitfld.long 0x00 9. " ADBR ,Access Data B register" "Unchanged,Transfer"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ADAR ,Access Data A register" "Unchanged,Transfer"
|
|
bitfld.long 0x00 7. " WR ,Write or read direction" "Read,Write"
|
|
hexmask.long.byte 0x00 0.--5. 1. " NUMBER ,Message number"
|
|
group.long 0x104++0x3
|
|
line.long 0x00 "CAN_DAR0,CAN Interface 0 Data A Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " DATA3 ,Data3 of interface"
|
|
hexmask.long.byte 0x00 16.--23. 1. " DATA2 ,Data2 of interface"
|
|
hexmask.long.byte 0x00 8.--15. 1. " DATA1 ,Data1 of interface"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA0 ,Data0 of interface"
|
|
group.long 0x108++0x3
|
|
line.long 0x00 "CAN_DBR0,CAN Interface 0 Data B Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " DATA3 ,Data3 of interface"
|
|
hexmask.long.byte 0x00 16.--23. 1. " DATA2 ,Data2 of interface"
|
|
hexmask.long.byte 0x00 8.--15. 1. " DATA1 ,Data1 of interface"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA0 ,Data0 of interface"
|
|
if (((d.l(ad:0x400E0000+0x110))&0x40000000)==0x40000000)
|
|
group.long 0x10c++0x3
|
|
line.long 0x00 "CAN_MSKR0,CAN Interface 0 Mask Register"
|
|
bitfld.long 0x00 31. " MXTD ,XTD bit mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " MMDIR ,Message direction mask" "No effect,Used"
|
|
hexmask.long.word 0x00 18.--28. 1. " BASEMASK ,Base identifier mask"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 0.--17. 1. " EXTMASK ,Extended identifier mask"
|
|
else
|
|
group.long 0x10c++0x3
|
|
line.long 0x00 "CAN_MSKR0,CAN Interface 0 Mask Register"
|
|
bitfld.long 0x00 31. " MXTD ,XTD bit mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " MMDIR ,Message direction mask" "No effect,Used"
|
|
hexmask.long.word 0x00 18.--28. 1. " BASEMASK ,Base identifier mask"
|
|
endif
|
|
if (((d.l(ad:0x400E0000+0x110))&0x40000000)==0x40000000)
|
|
group.long 0x110++0x3
|
|
line.long 0x00 "CAN_IR0,CAN Interface 0 Identifier Register"
|
|
bitfld.long 0x00 31. " MSGVAL ,Message Valid" "Ignored,Configured"
|
|
bitfld.long 0x00 30. " XTD ,Extended identifier" "11-bit,29-bit"
|
|
bitfld.long 0x00 29. " MDIR ,Message direction" "Receive,Transmit"
|
|
textline " "
|
|
hexmask.long.word 0x00 18.--28. 1. " BASEID ,Base identifier of interface X"
|
|
hexmask.long.tbyte 0x00 0.--17. 1. " EXTID ,Extended identifier of interface X"
|
|
else
|
|
group.long 0x110++0x3
|
|
line.long 0x00 "CAN_IR0,CAN Interface 0 Identifier Register"
|
|
bitfld.long 0x00 31. " MSGVAL ,Message Valid" "Ignored,Configured"
|
|
bitfld.long 0x00 30. " XTD ,Extended identifier" "11-bit,29-bit"
|
|
bitfld.long 0x00 29. " MDIR ,Message direction" "Receive,Transmit"
|
|
textline " "
|
|
hexmask.long.word 0x00 18.--28. 1. " BASEID ,Base identifier of interface X"
|
|
endif
|
|
group.long 0x114++0x3
|
|
line.long 0x00 "CAN_MCR0,CAN Interface 0 Message Control Register"
|
|
bitfld.long 0x00 15. " NEWDAT ,New data" "No,Yes"
|
|
bitfld.long 0x00 14. " MSGLST ,Message lost" "No,Yes"
|
|
bitfld.long 0x00 13. " ITPND ,Interrupt pending" "Not source,Source"
|
|
textline " "
|
|
bitfld.long 0x00 12. " UMASK ,Use acceptance mask" "Ignored,Used"
|
|
bitfld.long 0x00 11. " TXIE ,Transmit interrupt enable" "Unchanged,Set"
|
|
bitfld.long 0x00 10. " RXIE ,Receive interrupt enable" "Unchanged,Set"
|
|
textline " "
|
|
bitfld.long 0x00 9. " RMTEN ,Remote enable" "Left,Set"
|
|
bitfld.long 0x00 8. " TXRQST ,Transmit request" "Not waiting,Requested"
|
|
bitfld.long 0x00 7. " OVERWRITE ,Overwrite mode" "Normal,Overwrite"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " DLC ,Data length code" "0,1,2,3,4,5,6,7,8,?..."
|
|
rgroup.long 0x118++0x3
|
|
line.long 0x00 "CAN_STPR0,CAN Interface 0 Stamp Register"
|
|
group.long 0x120++0x3
|
|
line.long 0x00 "CAN_TMR1,CAN Interface 1 Transfer Management Register"
|
|
bitfld.long 0x00 15. " CLRIT ,Clear interrupt pending" "Unchanged,Cleared"
|
|
bitfld.long 0x00 14. " TRND ,Set TXRQST bit or clear NEWDAT" "Unchanged,Cleared"
|
|
bitfld.long 0x00 12. " AMCR ,Access message control register" "Unchanged,Transfer"
|
|
textline " "
|
|
bitfld.long 0x00 11. " AIR ,Access identifier register" "Unchanged,Transfer"
|
|
bitfld.long 0x00 10. " AMSKR ,Access mask register" "Unchanged,Transfer"
|
|
bitfld.long 0x00 9. " ADBR ,Access Data B register" "Unchanged,Transfer"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ADAR ,Access Data A register" "Unchanged,Transfer"
|
|
bitfld.long 0x00 7. " WR ,Write or read direction" "Read,Write"
|
|
hexmask.long.byte 0x00 0.--5. 1. " NUMBER ,Message number"
|
|
group.long 0x124++0x3
|
|
line.long 0x00 "CAN_DAR1,CAN Interface 1 Data A Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " DATA3 ,Data3 of interface"
|
|
hexmask.long.byte 0x00 16.--23. 1. " DATA2 ,Data2 of interface"
|
|
hexmask.long.byte 0x00 8.--15. 1. " DATA1 ,Data1 of interface"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA0 ,Data0 of interface"
|
|
group.long 0x128++0x3
|
|
line.long 0x00 "CAN_DBR1,CAN Interface 1 Data B Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " DATA3 ,Data3 of interface"
|
|
hexmask.long.byte 0x00 16.--23. 1. " DATA2 ,Data2 of interface"
|
|
hexmask.long.byte 0x00 8.--15. 1. " DATA1 ,Data1 of interface"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA0 ,Data0 of interface"
|
|
if (((d.l(ad:0x400E0000+0x130))&0x40000000)==0x40000000)
|
|
group.long 0x12c++0x3
|
|
line.long 0x00 "CAN_MSKR1,CAN Interface X Mask Register 1"
|
|
bitfld.long 0x00 31. " MXTD ,XTD bit mask" "No effect,Used"
|
|
bitfld.long 0x00 30. " MMDIR ,Message direction mask" "Not masked,Masked"
|
|
hexmask.long.word 0x00 18.--28. 1. " BASEMASK ,Base identifier mask"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 0.--17. 1. " EXTMASK ,Extended identifier mask"
|
|
else
|
|
group.long 0x12c++0x3
|
|
line.long 0x00 "CAN_MSKR1,CAN Interface X Mask Register 1"
|
|
bitfld.long 0x00 31. " MXTD ,XTD bit mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " MMDIR ,Message direction mask" "No effect,Used"
|
|
hexmask.long.word 0x00 18.--28. 1. " BASEMASK ,Base identifier mask"
|
|
endif
|
|
if (((d.l(ad:0x400E0000+0x130))&0x40000000)==0x40000000)
|
|
group.long 0x130++0x3
|
|
line.long 0x00 "CAN_IR1,CAN Interface 1 Identifier Register"
|
|
bitfld.long 0x00 31. " MSGVAL ,Message Valid" "Ignored,Configured"
|
|
bitfld.long 0x00 30. " XTD ,Extended identifier" "11-bit,29-bit"
|
|
bitfld.long 0x00 29. " MDIR ,Message direction" "Receive,Transmit"
|
|
textline " "
|
|
hexmask.long.word 0x00 18.--28. 1. " BASEID ,Base identifier of interface X"
|
|
hexmask.long.tbyte 0x00 0.--17. 1. " EXTID ,Extended identifier of interface X"
|
|
else
|
|
group.long 0x130++0x3
|
|
line.long 0x00 "CAN_IR1,CAN Interface 1 Identifier Register"
|
|
bitfld.long 0x00 31. " MSGVAL ,Message Valid" "Ignored,Configured"
|
|
bitfld.long 0x00 30. " XTD ,Extended identifier" "11-bit,29-bit"
|
|
bitfld.long 0x00 29. " MDIR ,Message direction" "Receive,Transmit"
|
|
textline " "
|
|
hexmask.long.word 0x00 18.--28. 1. " BASEID ,Base identifier of interface X"
|
|
endif
|
|
group.long 0x134++0x3
|
|
line.long 0x00 "CAN_MCR1,CAN Interface 1 Message Control Register"
|
|
bitfld.long 0x00 15. " NEWDAT ,New data" "No,Yes"
|
|
bitfld.long 0x00 14. " MSGLST ,Message lost" "No,Yes"
|
|
bitfld.long 0x00 13. " ITPND ,Interrupt pending" "Not source,Source"
|
|
textline " "
|
|
bitfld.long 0x00 12. " UMASK ,Use acceptance mask" "Ignored,Used"
|
|
bitfld.long 0x00 11. " TXIE ,Transmit interrupt enable" "Unchanged,Set"
|
|
bitfld.long 0x00 10. " RXIE ,Receive interrupt enable" "Unchanged,Set"
|
|
textline " "
|
|
bitfld.long 0x00 9. " RMTEN ,Remote enable" "Left,Set"
|
|
bitfld.long 0x00 8. " TXRQST ,Transmit request" "Not waiting,Requested"
|
|
bitfld.long 0x00 7. " OVERWRITE ,Overwrite mode" "Normal,Overwrite"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " DLC ,Data length code" "0,1,2,3,4,5,6,7,8,?..."
|
|
rgroup.long 0x138++0x3
|
|
line.long 0x00 "CAN_STPR1,CAN Interface 1 Stamp Register"
|
|
rgroup.long 0x140++0x3
|
|
line.long 0x00 "CAN_TRR,CAN Transmission Request Register"
|
|
bitfld.long 0x00 31. " CH32 ,Transmission request on channel 32" "Not waiting,Requested"
|
|
bitfld.long 0x00 30. " CH31 ,Transmission request on channel 31" "Not requested,Requested"
|
|
bitfld.long 0x00 29. " CH30 ,Transmission request on channel 30" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 28. " CH29 ,Transmission request on channel 29" "Not requested,Requested"
|
|
bitfld.long 0x00 27. " CH28 ,Transmission request on channel 28" "Not requested,Requested"
|
|
bitfld.long 0x00 26. " CH27 ,Transmission request on channel 27" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CH26 ,Transmission request on channel 26" "Not requested,Requested"
|
|
bitfld.long 0x00 24. " CH25 ,Transmission request on channel 25" "Not requested,Requested"
|
|
bitfld.long 0x00 23. " CH24 ,Transmission request on channel 24" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 22. " CH23 ,Transmission request on channel 23" "Not requested,Requested"
|
|
bitfld.long 0x00 21. " CH22 ,Transmission request on channel 22" "Not requested,Requested"
|
|
bitfld.long 0x00 20. " CH21 ,Transmission request on channel 21" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 19. " CH20 ,Transmission request on channel 20" "Not requested,Requested"
|
|
bitfld.long 0x00 18. " CH19 ,Transmission request on channel 19" "Not requested,Requested"
|
|
bitfld.long 0x00 17. " CH18 ,Transmission request on channel 18" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CH17 ,Transmission request on channel 17" "Not requested,Requested"
|
|
bitfld.long 0x00 15. " CH16 ,Transmission request on channel 16" "Not requested,Requested"
|
|
bitfld.long 0x00 14. " CH15 ,Transmission request on channel 15" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 13. " CH14 ,Transmission request on channel 14" "Not requested,Requested"
|
|
bitfld.long 0x00 12. " CH13 ,Transmission request on channel 13" "Not requested,Requested"
|
|
bitfld.long 0x00 11. " CH12 ,Transmission request on channel 12" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CH11 ,Transmission request on channel 11" "Not requested,Requested"
|
|
bitfld.long 0x00 9. " CH10 ,Transmission request on channel 10" "Not requested,Requested"
|
|
bitfld.long 0x00 8. " CH9 ,Transmission request on channel 9" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CH8 ,Transmission request on channel 8" "Not requested,Requested"
|
|
bitfld.long 0x00 6. " CH7 ,Transmission request on channel 7" "Not requested,Requested"
|
|
bitfld.long 0x00 5. " CH6 ,Transmission request on channel 6" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CH5 ,Transmission request on channel 5" "Not requested,Requested"
|
|
bitfld.long 0x00 3. " CH4 ,Transmission request on channel 4" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " CH3 ,Transmission request on channel 3" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CH2 ,Transmission request on channel 2" "Not requested,Requested"
|
|
bitfld.long 0x00 0. " CH1 ,Transmission request on channel 1" "Not requested,Requested"
|
|
rgroup.long 0x144++0x3
|
|
line.long 0x00 "CAN_NDR,CAN New Data Register"
|
|
bitfld.long 0x00 31. " CH32 ,New data on channel 32" "No,Yes"
|
|
bitfld.long 0x00 30. " CH31 ,New data on channel 31" "No,Yes"
|
|
bitfld.long 0x00 29. " CH30 ,New data on channel 30" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 28. " CH29 ,New data on channel 29" "No,Yes"
|
|
bitfld.long 0x00 27. " CH28 ,New data on channel 28" "No,Yes"
|
|
bitfld.long 0x00 26. " CH27 ,New data on channel 27" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CH26 ,New data on channel 26" "No,Yes"
|
|
bitfld.long 0x00 24. " CH25 ,New data on channel 25" "No,Yes"
|
|
bitfld.long 0x00 23. " CH24 ,New data on channel 24" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 22. " CH23 ,New data on channel 23" "No,Yes"
|
|
bitfld.long 0x00 21. " CH22 ,New data on channel 22" "No,Yes"
|
|
bitfld.long 0x00 20. " CH21 ,New data on channel 21" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 19. " CH20 ,New data on channel 20" "No,Yes"
|
|
bitfld.long 0x00 18. " CH19 ,New data on channel 19" "No,Yes"
|
|
bitfld.long 0x00 17. " CH18 ,New data on channel 18" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CH17 ,New data on channel 17" "No,Yes"
|
|
bitfld.long 0x00 15. " CH16 ,New data on channel 16" "No,Yes"
|
|
bitfld.long 0x00 14. " CH15 ,New data on channel 15" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 13. " CH14 ,New data on channel 14" "No,Yes"
|
|
bitfld.long 0x00 12. " CH13 ,New data on channel 13" "No,Yes"
|
|
bitfld.long 0x00 11. " CH12 ,New data on channel 12" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CH11 ,New data on channel 11" "No,Yes"
|
|
bitfld.long 0x00 9. " CH10 ,New data on channel 10" "No,Yes"
|
|
bitfld.long 0x00 8. " CH9 ,New data on channel 9" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CH8 ,New data on channel 8" "No,Yes"
|
|
bitfld.long 0x00 6. " CH7 ,New data on channel 7" "No,Yes"
|
|
bitfld.long 0x00 5. " CH6 ,New data on channel 6" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CH5 ,New data on channel 5" "No,Yes"
|
|
bitfld.long 0x00 3. " CH4 ,New data on channel 4" "No,Yes"
|
|
bitfld.long 0x00 2. " CH3 ,New data on channel 3" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CH2 ,New data on channel 2" "No,Yes"
|
|
bitfld.long 0x00 0. " CH1 ,New data on channel 1" "No,Yes"
|
|
rgroup.long 0x148++0x3
|
|
line.long 0x00 "CAN_MVR,CAN Message Valid Register"
|
|
bitfld.long 0x00 31. " CH32 ,Message valid on channel 32" "Not valid,Valid"
|
|
bitfld.long 0x00 30. " CH31 ,Message valid on channel 31" "Not valid,Valid"
|
|
bitfld.long 0x00 29. " CH30 ,Message valid on channel 30" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 28. " CH29 ,Message valid on channel 29" "Not valid,Valid"
|
|
bitfld.long 0x00 27. " CH28 ,Message valid on channel 28" "Not valid,Valid"
|
|
bitfld.long 0x00 26. " CH27 ,Message valid on channel 27" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CH26 ,Message valid on channel 26" "Not valid,Valid"
|
|
bitfld.long 0x00 24. " CH25 ,Message valid on channel 25" "Not valid,Valid"
|
|
bitfld.long 0x00 23. " CH24 ,Message valid on channel 24" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 22. " CH23 ,Message valid on channel 23" "Not valid,Valid"
|
|
bitfld.long 0x00 21. " CH22 ,Message valid on channel 22" "Not valid,Valid"
|
|
bitfld.long 0x00 20. " CH21 ,Message valid on channel 21" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 19. " CH20 ,Message valid on channel 20" "Not valid,Valid"
|
|
bitfld.long 0x00 18. " CH19 ,Message valid on channel 19" "Not valid,Valid"
|
|
bitfld.long 0x00 17. " CH18 ,Message valid on channel 18" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CH17 ,Message valid on channel 17" "Not valid,Valid"
|
|
bitfld.long 0x00 15. " CH16 ,Message valid on channel 16" "Not valid,Valid"
|
|
bitfld.long 0x00 14. " CH15 ,Message valid on channel 15" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 13. " CH14 ,Message valid on channel 14" "Not valid,Valid"
|
|
bitfld.long 0x00 12. " CH13 ,Message valid on channel 13" "Not valid,Valid"
|
|
bitfld.long 0x00 11. " CH12 ,Message valid on channel 12" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CH11 ,Message valid on channel 11" "Not valid,Valid"
|
|
bitfld.long 0x00 9. " CH10 ,Message valid on channel 10" "Not valid,Valid"
|
|
bitfld.long 0x00 8. " CH9 ,Message valid on channel 9" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CH8 ,Message valid on channel 8" "Not valid,Valid"
|
|
bitfld.long 0x00 6. " CH7 ,Message valid on channel 7" "Not valid,Valid"
|
|
bitfld.long 0x00 5. " CH6 ,Message valid on channel 6" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CH5 ,Message valid on channel 5" "Not valid,Valid"
|
|
bitfld.long 0x00 3. " CH4 ,Message valid on channel 4" "Not valid,Valid"
|
|
bitfld.long 0x00 2. " CH3 ,Message valid on channel 3" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CH2 ,Message valid on channel 2" "Not valid,Valid"
|
|
bitfld.long 0x00 0. " CH1 ,Message valid on channel 1" "Not valid,Valid"
|
|
group.long 0x150++0x3
|
|
line.long 0x00 "CAN_TSTR,CAN Test Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " TSTKEY ,Test access key"
|
|
bitfld.long 0x00 6. " RX ,Monitor the value of CAN_RX pin" "Dominant,Recessive"
|
|
bitfld.long 0x00 5. " TXOPD ,TX Open drain" "Not configured,Configured"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " TX ,Control of CAN_TX pin" "Controlled by CAN core,Monitored at CAN_TX,Dominant,Recessive"
|
|
bitfld.long 0x00 2. " LBACK ,Loop Back Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " SILENT ,Silent mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " BASIC ,Basic mode" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
tree "CAN1"
|
|
base ad:0x400E1000
|
|
width 11.
|
|
group.long 0x058++0x3
|
|
line.long 0x00 "CAN_PMSR,CAN Power Manager Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " DBGEN_set/clr ,Debug mode status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " CAN_set/clr ,CAN clock status" "Disabled,Enabled"
|
|
wgroup.long 0x060++0x3
|
|
line.long 0x00 "CAN_CR,CAN Control Register"
|
|
bitfld.long 0x00 10. " STSR ,Store shift register" "No effect,Shift"
|
|
bitfld.long 0x00 9. " ABBTX ,Abort basic transmission" "No effect,Abort"
|
|
bitfld.long 0x00 8. " RQBTX ,Request basic transmission" "No effect,Request"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CCDIS ,Configuration change disable" "No effect,Disable"
|
|
bitfld.long 0x00 3. " CCEN ,Configuration change enable" "No effect,Enable"
|
|
bitfld.long 0x00 2. " CANDIS ,CAN disable" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CANEN ,CAN enable" "No effect,Enable"
|
|
bitfld.long 0x00 0. " SWRST ,CAN software reset" "No effect,Reset"
|
|
group.long 0x064++0x3
|
|
line.long 0x00 "CAN_MR,CAN Mode Register"
|
|
bitfld.long 0x00 20.--22. " PHSEG2 ,Phase segment 2 value" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x00 16.--19. " PHSEG1 ,Phase segment 1 value" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 14. " AR ,Automatic retransmission" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " SJW ,Synchronization jump width" "0,1,2,3"
|
|
bitfld.long 0x00 10. " CSSEL ,CAN Clock(CANCLK) Source Selection" "PCLK,EMCLK"
|
|
hexmask.long.word 0x00 0.--9. 1. " BD ,Baud rate pre-scalar"
|
|
group.long 0x06c++0x3
|
|
line.long 0x00 "CAN_CSR,CAN Clear Status Register"
|
|
bitfld.long 0x00 15. " CRC ,Clear CRC error" "No effect,Clear"
|
|
bitfld.long 0x00 14. " BIT0 ,Clear bit to zero error" "No effect,Clear"
|
|
bitfld.long 0x00 13. " BIT1 ,Clear bit to one error" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 12. " ACK ,Clear acknowledge error" "No effect,Clear"
|
|
bitfld.long 0x00 11. " FORM ,Clear form error" "No effect,Clear"
|
|
bitfld.long 0x00 10. " STUFF ,Clear stuff error" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TXOK ,Clear successfully transmit message" "No effect,Clear"
|
|
bitfld.long 0x00 8. " RXOK ,Clear successfully received message" "No effect,Clear"
|
|
bitfld.long 0x00 4. " ACTVT ,Clear activity" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BUSOFFTR ,Clear bus off transition" "No effect,Clear"
|
|
bitfld.long 0x00 2. " ERPASSTR ,Clear error passive transition" "No effect,Clear"
|
|
bitfld.long 0x00 1. " ERWARNTR ,Clear error passive warning transition" "No effect,Clear"
|
|
rgroup.long 0x070++0x3
|
|
line.long 0x00 "CAN_SR,CAN Status Register"
|
|
bitfld.long 0x00 25. " BTXPD ,Basic transmission pending" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " CCENS ,Configuration change enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22.--23. " TS/RS ,Transmit status" "Idle,Receive mode,Transmit mode,Lost arbitration"
|
|
textline " "
|
|
bitfld.long 0x00 21. " BUSY1 ,Busy flag of interface 1" "Idle,Busy"
|
|
bitfld.long 0x00 20. " BUSY0 ,Busy flag of interface 0" "Idle,Busy"
|
|
bitfld.long 0x00 19. " BUSOFF ,Bus off" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " ERPASS ,Error passive" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " ERWARN ,Error passive warning" "No error,Error"
|
|
bitfld.long 0x00 16. " CANENS ,CAN enable status" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CRC ,CRC error" "No error,Error"
|
|
bitfld.long 0x00 14. " BIT0 ,Bit to zero error" "No error,Error"
|
|
bitfld.long 0x00 13. " BIT1 ,Bit to one error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 12. " ACK ,Acknowledge error" "No error,Error"
|
|
bitfld.long 0x00 11. " FORM ,Form error" "No error,Error"
|
|
bitfld.long 0x00 10. " STUFF ,Stuff error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TXOK ,Successfully transmitted a message" "Not transmitted,Transmitted"
|
|
bitfld.long 0x00 8. " RXOK ,Successfully received a message" "Not received,Received"
|
|
bitfld.long 0x00 4. " ACTVT ,Activity" "No activity,Activity"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BUSOFFTR ,Bus off transition" "No transition,Transition"
|
|
bitfld.long 0x00 2. " ERPASSTR ,Error passive transition" "No transition,Transition"
|
|
bitfld.long 0x00 1. " ERWARNTR ,Error passive warning transition" "No transition,Transition"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ISS ,Interrupt source status" "No interrupt,Interrupt"
|
|
group.long 0x07c++0x3
|
|
line.long 0x00 "CAN_IMR,CAN Interrupt Mask Register"
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " CRC ,CRC error mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " BIT0 ,Bit to zero error mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " BIT1 ,Bit to one error mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " ACK ,Acknowledge error mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " FORM ,Form error mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " STUFF ,Stuff error mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " TXOK ,Successfully transmitted a message mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " RXOK ,Successfully received a message mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " ACTVT ,Activity mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " BUSOFFTR ,Bus off mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " ERPASSTR ,Error passive mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " ERWARNTR ,Error passive warning mask" "Disabled,Enabled"
|
|
rgroup.long 0x084++0x3
|
|
line.long 0x00 "CAN_ISSR,CAN Interrupt Source Status Register"
|
|
bitfld.long 0x00 31. " CH32 ,Channel 32 interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 30. " CH31 ,Channel 31 interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 29. " CH30 ,Channel 30 interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 28. " CH29 ,Channel 29 interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 27. " CH28 ,Channel 28 interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 26. " CH27 ,Channel 27 interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CH26 ,Channel 26 interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 24. " CH25 ,Channel 25 interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 23. " CH24 ,Channel 24 interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 22. " CH23 ,Channel 23 interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 21. " CH22 ,Channel 22 interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 20. " CH21 ,Channel 21 interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 19. " CH20 ,Channel 20 interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 18. " CH19 ,Channel 19 interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 17. " CH18 ,Channel 18 interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CH17 ,Channel 17 interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 15. " CH16 ,Channel 16 interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 14. " CH15 ,Channel 15 interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 13. " CH14 ,Channel 14 interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 12. " CH13 ,Channel 13 interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 11. " CH12 ,Channel 12 interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CH11 ,Channel 11 interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 9. " CH10 ,Channel 10 interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 8. " CH9 ,Channel 9 interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CH8 ,Channel 8 interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " CH7 ,Channel 7 interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " CH6 ,Channel 6 interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CH5 ,Channel 5 interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " CH4 ,Channel 4 interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " CH3 ,Channel 3 interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CH2 ,Channel 2 interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " CH1 ,Channel 1 interrupt" "Not occurred,Occurred"
|
|
group.long 0x090++0x3
|
|
line.long 0x00 "CAN_SIMR,CAN Source Interrupt Mask Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " CH32 ,Channel 32 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " CH31 ,Channel 31 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " CH30 ,Channel 30 interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " CH29 ,Channel 29 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " CH28 ,Channel 28 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " CH27 ,Channel 27 interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " CH26 ,Channel 26 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " CH25 ,Channel 25 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " CH24 ,Channel 24 interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " CH23 ,Channel 23 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " CH22 ,Channel 22 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " CH21 ,Channel 21 interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " CH20 ,Channel 20 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " CH19 ,Channel 19 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " CH18 ,Channel 18 interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " CH17 ,Channel 17 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " CH16 ,Channel 16 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " CH15 ,Channel 15 interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " CH14 ,Channel 14 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " CH13 ,Channel 13 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " CH12 ,Channel 12 interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " CH11 ,Channel 11 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " CH10 ,Channel 10 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " CH9 ,Channel 9 interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " CH8 ,Channel 8 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " CH7 ,Channel 7 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " CH6 ,Channel 6 interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " CH5 ,Channel 5 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " CH4 ,Channel 4 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " CH3 ,Channel 3 interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " CH2 ,Channel 2 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " CH1 ,Channel 1 interrupt mask" "Disabled,Enabled"
|
|
rgroup.long 0x094++0x3
|
|
line.long 0x00 "CAN_HPIR,CAN Highest Priority Interrupt Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " INTID ,Channel X interrupt mask"
|
|
rgroup.long 0x098++0x3
|
|
line.long 0x00 "CAN_ERCR,CAN Error Counter Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " TEC ,Transmit error counter"
|
|
bitfld.long 0x00 7. " REP ,Receive Error Passive" "Below,Reached"
|
|
hexmask.long.byte 0x00 0.--6. 1. " REC ,Reception error counter"
|
|
group.long 0x100++0x3
|
|
line.long 0x00 "CAN_TMR0,CAN Interface 0 Transfer Management Register"
|
|
bitfld.long 0x00 15. " CLRIT ,Clear interrupt pending" "Unchanged,Cleared"
|
|
bitfld.long 0x00 14. " TRND ,Set TXRQST bit or clear NEWDAT" "Unchanged,Cleared"
|
|
bitfld.long 0x00 12. " AMCR ,Access message control register" "Unchanged,Transfer"
|
|
textline " "
|
|
bitfld.long 0x00 11. " AIR ,Access identifier register" "Unchanged,Transfer"
|
|
bitfld.long 0x00 10. " AMSKR ,Access mask register" "Unchanged,Transfer"
|
|
bitfld.long 0x00 9. " ADBR ,Access Data B register" "Unchanged,Transfer"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ADAR ,Access Data A register" "Unchanged,Transfer"
|
|
bitfld.long 0x00 7. " WR ,Write or read direction" "Read,Write"
|
|
hexmask.long.byte 0x00 0.--5. 1. " NUMBER ,Message number"
|
|
group.long 0x104++0x3
|
|
line.long 0x00 "CAN_DAR0,CAN Interface 0 Data A Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " DATA3 ,Data3 of interface"
|
|
hexmask.long.byte 0x00 16.--23. 1. " DATA2 ,Data2 of interface"
|
|
hexmask.long.byte 0x00 8.--15. 1. " DATA1 ,Data1 of interface"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA0 ,Data0 of interface"
|
|
group.long 0x108++0x3
|
|
line.long 0x00 "CAN_DBR0,CAN Interface 0 Data B Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " DATA3 ,Data3 of interface"
|
|
hexmask.long.byte 0x00 16.--23. 1. " DATA2 ,Data2 of interface"
|
|
hexmask.long.byte 0x00 8.--15. 1. " DATA1 ,Data1 of interface"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA0 ,Data0 of interface"
|
|
if (((d.l(ad:0x400E0000+0x110))&0x40000000)==0x40000000)
|
|
group.long 0x10c++0x3
|
|
line.long 0x00 "CAN_MSKR0,CAN Interface 0 Mask Register"
|
|
bitfld.long 0x00 31. " MXTD ,XTD bit mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " MMDIR ,Message direction mask" "No effect,Used"
|
|
hexmask.long.word 0x00 18.--28. 1. " BASEMASK ,Base identifier mask"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 0.--17. 1. " EXTMASK ,Extended identifier mask"
|
|
else
|
|
group.long 0x10c++0x3
|
|
line.long 0x00 "CAN_MSKR0,CAN Interface 0 Mask Register"
|
|
bitfld.long 0x00 31. " MXTD ,XTD bit mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " MMDIR ,Message direction mask" "No effect,Used"
|
|
hexmask.long.word 0x00 18.--28. 1. " BASEMASK ,Base identifier mask"
|
|
endif
|
|
if (((d.l(ad:0x400E0000+0x110))&0x40000000)==0x40000000)
|
|
group.long 0x110++0x3
|
|
line.long 0x00 "CAN_IR0,CAN Interface 0 Identifier Register"
|
|
bitfld.long 0x00 31. " MSGVAL ,Message Valid" "Ignored,Configured"
|
|
bitfld.long 0x00 30. " XTD ,Extended identifier" "11-bit,29-bit"
|
|
bitfld.long 0x00 29. " MDIR ,Message direction" "Receive,Transmit"
|
|
textline " "
|
|
hexmask.long.word 0x00 18.--28. 1. " BASEID ,Base identifier of interface X"
|
|
hexmask.long.tbyte 0x00 0.--17. 1. " EXTID ,Extended identifier of interface X"
|
|
else
|
|
group.long 0x110++0x3
|
|
line.long 0x00 "CAN_IR0,CAN Interface 0 Identifier Register"
|
|
bitfld.long 0x00 31. " MSGVAL ,Message Valid" "Ignored,Configured"
|
|
bitfld.long 0x00 30. " XTD ,Extended identifier" "11-bit,29-bit"
|
|
bitfld.long 0x00 29. " MDIR ,Message direction" "Receive,Transmit"
|
|
textline " "
|
|
hexmask.long.word 0x00 18.--28. 1. " BASEID ,Base identifier of interface X"
|
|
endif
|
|
group.long 0x114++0x3
|
|
line.long 0x00 "CAN_MCR0,CAN Interface 0 Message Control Register"
|
|
bitfld.long 0x00 15. " NEWDAT ,New data" "No,Yes"
|
|
bitfld.long 0x00 14. " MSGLST ,Message lost" "No,Yes"
|
|
bitfld.long 0x00 13. " ITPND ,Interrupt pending" "Not source,Source"
|
|
textline " "
|
|
bitfld.long 0x00 12. " UMASK ,Use acceptance mask" "Ignored,Used"
|
|
bitfld.long 0x00 11. " TXIE ,Transmit interrupt enable" "Unchanged,Set"
|
|
bitfld.long 0x00 10. " RXIE ,Receive interrupt enable" "Unchanged,Set"
|
|
textline " "
|
|
bitfld.long 0x00 9. " RMTEN ,Remote enable" "Left,Set"
|
|
bitfld.long 0x00 8. " TXRQST ,Transmit request" "Not waiting,Requested"
|
|
bitfld.long 0x00 7. " OVERWRITE ,Overwrite mode" "Normal,Overwrite"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " DLC ,Data length code" "0,1,2,3,4,5,6,7,8,?..."
|
|
rgroup.long 0x118++0x3
|
|
line.long 0x00 "CAN_STPR0,CAN Interface 0 Stamp Register"
|
|
group.long 0x120++0x3
|
|
line.long 0x00 "CAN_TMR1,CAN Interface 1 Transfer Management Register"
|
|
bitfld.long 0x00 15. " CLRIT ,Clear interrupt pending" "Unchanged,Cleared"
|
|
bitfld.long 0x00 14. " TRND ,Set TXRQST bit or clear NEWDAT" "Unchanged,Cleared"
|
|
bitfld.long 0x00 12. " AMCR ,Access message control register" "Unchanged,Transfer"
|
|
textline " "
|
|
bitfld.long 0x00 11. " AIR ,Access identifier register" "Unchanged,Transfer"
|
|
bitfld.long 0x00 10. " AMSKR ,Access mask register" "Unchanged,Transfer"
|
|
bitfld.long 0x00 9. " ADBR ,Access Data B register" "Unchanged,Transfer"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ADAR ,Access Data A register" "Unchanged,Transfer"
|
|
bitfld.long 0x00 7. " WR ,Write or read direction" "Read,Write"
|
|
hexmask.long.byte 0x00 0.--5. 1. " NUMBER ,Message number"
|
|
group.long 0x124++0x3
|
|
line.long 0x00 "CAN_DAR1,CAN Interface 1 Data A Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " DATA3 ,Data3 of interface"
|
|
hexmask.long.byte 0x00 16.--23. 1. " DATA2 ,Data2 of interface"
|
|
hexmask.long.byte 0x00 8.--15. 1. " DATA1 ,Data1 of interface"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA0 ,Data0 of interface"
|
|
group.long 0x128++0x3
|
|
line.long 0x00 "CAN_DBR1,CAN Interface 1 Data B Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " DATA3 ,Data3 of interface"
|
|
hexmask.long.byte 0x00 16.--23. 1. " DATA2 ,Data2 of interface"
|
|
hexmask.long.byte 0x00 8.--15. 1. " DATA1 ,Data1 of interface"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA0 ,Data0 of interface"
|
|
if (((d.l(ad:0x400E0000+0x130))&0x40000000)==0x40000000)
|
|
group.long 0x12c++0x3
|
|
line.long 0x00 "CAN_MSKR1,CAN Interface X Mask Register 1"
|
|
bitfld.long 0x00 31. " MXTD ,XTD bit mask" "No effect,Used"
|
|
bitfld.long 0x00 30. " MMDIR ,Message direction mask" "Not masked,Masked"
|
|
hexmask.long.word 0x00 18.--28. 1. " BASEMASK ,Base identifier mask"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 0.--17. 1. " EXTMASK ,Extended identifier mask"
|
|
else
|
|
group.long 0x12c++0x3
|
|
line.long 0x00 "CAN_MSKR1,CAN Interface X Mask Register 1"
|
|
bitfld.long 0x00 31. " MXTD ,XTD bit mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " MMDIR ,Message direction mask" "No effect,Used"
|
|
hexmask.long.word 0x00 18.--28. 1. " BASEMASK ,Base identifier mask"
|
|
endif
|
|
if (((d.l(ad:0x400E0000+0x130))&0x40000000)==0x40000000)
|
|
group.long 0x130++0x3
|
|
line.long 0x00 "CAN_IR1,CAN Interface 1 Identifier Register"
|
|
bitfld.long 0x00 31. " MSGVAL ,Message Valid" "Ignored,Configured"
|
|
bitfld.long 0x00 30. " XTD ,Extended identifier" "11-bit,29-bit"
|
|
bitfld.long 0x00 29. " MDIR ,Message direction" "Receive,Transmit"
|
|
textline " "
|
|
hexmask.long.word 0x00 18.--28. 1. " BASEID ,Base identifier of interface X"
|
|
hexmask.long.tbyte 0x00 0.--17. 1. " EXTID ,Extended identifier of interface X"
|
|
else
|
|
group.long 0x130++0x3
|
|
line.long 0x00 "CAN_IR1,CAN Interface 1 Identifier Register"
|
|
bitfld.long 0x00 31. " MSGVAL ,Message Valid" "Ignored,Configured"
|
|
bitfld.long 0x00 30. " XTD ,Extended identifier" "11-bit,29-bit"
|
|
bitfld.long 0x00 29. " MDIR ,Message direction" "Receive,Transmit"
|
|
textline " "
|
|
hexmask.long.word 0x00 18.--28. 1. " BASEID ,Base identifier of interface X"
|
|
endif
|
|
group.long 0x134++0x3
|
|
line.long 0x00 "CAN_MCR1,CAN Interface 1 Message Control Register"
|
|
bitfld.long 0x00 15. " NEWDAT ,New data" "No,Yes"
|
|
bitfld.long 0x00 14. " MSGLST ,Message lost" "No,Yes"
|
|
bitfld.long 0x00 13. " ITPND ,Interrupt pending" "Not source,Source"
|
|
textline " "
|
|
bitfld.long 0x00 12. " UMASK ,Use acceptance mask" "Ignored,Used"
|
|
bitfld.long 0x00 11. " TXIE ,Transmit interrupt enable" "Unchanged,Set"
|
|
bitfld.long 0x00 10. " RXIE ,Receive interrupt enable" "Unchanged,Set"
|
|
textline " "
|
|
bitfld.long 0x00 9. " RMTEN ,Remote enable" "Left,Set"
|
|
bitfld.long 0x00 8. " TXRQST ,Transmit request" "Not waiting,Requested"
|
|
bitfld.long 0x00 7. " OVERWRITE ,Overwrite mode" "Normal,Overwrite"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " DLC ,Data length code" "0,1,2,3,4,5,6,7,8,?..."
|
|
rgroup.long 0x138++0x3
|
|
line.long 0x00 "CAN_STPR1,CAN Interface 1 Stamp Register"
|
|
rgroup.long 0x140++0x3
|
|
line.long 0x00 "CAN_TRR,CAN Transmission Request Register"
|
|
bitfld.long 0x00 31. " CH32 ,Transmission request on channel 32" "Not waiting,Requested"
|
|
bitfld.long 0x00 30. " CH31 ,Transmission request on channel 31" "Not requested,Requested"
|
|
bitfld.long 0x00 29. " CH30 ,Transmission request on channel 30" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 28. " CH29 ,Transmission request on channel 29" "Not requested,Requested"
|
|
bitfld.long 0x00 27. " CH28 ,Transmission request on channel 28" "Not requested,Requested"
|
|
bitfld.long 0x00 26. " CH27 ,Transmission request on channel 27" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CH26 ,Transmission request on channel 26" "Not requested,Requested"
|
|
bitfld.long 0x00 24. " CH25 ,Transmission request on channel 25" "Not requested,Requested"
|
|
bitfld.long 0x00 23. " CH24 ,Transmission request on channel 24" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 22. " CH23 ,Transmission request on channel 23" "Not requested,Requested"
|
|
bitfld.long 0x00 21. " CH22 ,Transmission request on channel 22" "Not requested,Requested"
|
|
bitfld.long 0x00 20. " CH21 ,Transmission request on channel 21" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 19. " CH20 ,Transmission request on channel 20" "Not requested,Requested"
|
|
bitfld.long 0x00 18. " CH19 ,Transmission request on channel 19" "Not requested,Requested"
|
|
bitfld.long 0x00 17. " CH18 ,Transmission request on channel 18" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CH17 ,Transmission request on channel 17" "Not requested,Requested"
|
|
bitfld.long 0x00 15. " CH16 ,Transmission request on channel 16" "Not requested,Requested"
|
|
bitfld.long 0x00 14. " CH15 ,Transmission request on channel 15" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 13. " CH14 ,Transmission request on channel 14" "Not requested,Requested"
|
|
bitfld.long 0x00 12. " CH13 ,Transmission request on channel 13" "Not requested,Requested"
|
|
bitfld.long 0x00 11. " CH12 ,Transmission request on channel 12" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CH11 ,Transmission request on channel 11" "Not requested,Requested"
|
|
bitfld.long 0x00 9. " CH10 ,Transmission request on channel 10" "Not requested,Requested"
|
|
bitfld.long 0x00 8. " CH9 ,Transmission request on channel 9" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CH8 ,Transmission request on channel 8" "Not requested,Requested"
|
|
bitfld.long 0x00 6. " CH7 ,Transmission request on channel 7" "Not requested,Requested"
|
|
bitfld.long 0x00 5. " CH6 ,Transmission request on channel 6" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CH5 ,Transmission request on channel 5" "Not requested,Requested"
|
|
bitfld.long 0x00 3. " CH4 ,Transmission request on channel 4" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " CH3 ,Transmission request on channel 3" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CH2 ,Transmission request on channel 2" "Not requested,Requested"
|
|
bitfld.long 0x00 0. " CH1 ,Transmission request on channel 1" "Not requested,Requested"
|
|
rgroup.long 0x144++0x3
|
|
line.long 0x00 "CAN_NDR,CAN New Data Register"
|
|
bitfld.long 0x00 31. " CH32 ,New data on channel 32" "No,Yes"
|
|
bitfld.long 0x00 30. " CH31 ,New data on channel 31" "No,Yes"
|
|
bitfld.long 0x00 29. " CH30 ,New data on channel 30" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 28. " CH29 ,New data on channel 29" "No,Yes"
|
|
bitfld.long 0x00 27. " CH28 ,New data on channel 28" "No,Yes"
|
|
bitfld.long 0x00 26. " CH27 ,New data on channel 27" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CH26 ,New data on channel 26" "No,Yes"
|
|
bitfld.long 0x00 24. " CH25 ,New data on channel 25" "No,Yes"
|
|
bitfld.long 0x00 23. " CH24 ,New data on channel 24" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 22. " CH23 ,New data on channel 23" "No,Yes"
|
|
bitfld.long 0x00 21. " CH22 ,New data on channel 22" "No,Yes"
|
|
bitfld.long 0x00 20. " CH21 ,New data on channel 21" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 19. " CH20 ,New data on channel 20" "No,Yes"
|
|
bitfld.long 0x00 18. " CH19 ,New data on channel 19" "No,Yes"
|
|
bitfld.long 0x00 17. " CH18 ,New data on channel 18" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CH17 ,New data on channel 17" "No,Yes"
|
|
bitfld.long 0x00 15. " CH16 ,New data on channel 16" "No,Yes"
|
|
bitfld.long 0x00 14. " CH15 ,New data on channel 15" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 13. " CH14 ,New data on channel 14" "No,Yes"
|
|
bitfld.long 0x00 12. " CH13 ,New data on channel 13" "No,Yes"
|
|
bitfld.long 0x00 11. " CH12 ,New data on channel 12" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CH11 ,New data on channel 11" "No,Yes"
|
|
bitfld.long 0x00 9. " CH10 ,New data on channel 10" "No,Yes"
|
|
bitfld.long 0x00 8. " CH9 ,New data on channel 9" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CH8 ,New data on channel 8" "No,Yes"
|
|
bitfld.long 0x00 6. " CH7 ,New data on channel 7" "No,Yes"
|
|
bitfld.long 0x00 5. " CH6 ,New data on channel 6" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CH5 ,New data on channel 5" "No,Yes"
|
|
bitfld.long 0x00 3. " CH4 ,New data on channel 4" "No,Yes"
|
|
bitfld.long 0x00 2. " CH3 ,New data on channel 3" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CH2 ,New data on channel 2" "No,Yes"
|
|
bitfld.long 0x00 0. " CH1 ,New data on channel 1" "No,Yes"
|
|
rgroup.long 0x148++0x3
|
|
line.long 0x00 "CAN_MVR,CAN Message Valid Register"
|
|
bitfld.long 0x00 31. " CH32 ,Message valid on channel 32" "Not valid,Valid"
|
|
bitfld.long 0x00 30. " CH31 ,Message valid on channel 31" "Not valid,Valid"
|
|
bitfld.long 0x00 29. " CH30 ,Message valid on channel 30" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 28. " CH29 ,Message valid on channel 29" "Not valid,Valid"
|
|
bitfld.long 0x00 27. " CH28 ,Message valid on channel 28" "Not valid,Valid"
|
|
bitfld.long 0x00 26. " CH27 ,Message valid on channel 27" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 25. " CH26 ,Message valid on channel 26" "Not valid,Valid"
|
|
bitfld.long 0x00 24. " CH25 ,Message valid on channel 25" "Not valid,Valid"
|
|
bitfld.long 0x00 23. " CH24 ,Message valid on channel 24" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 22. " CH23 ,Message valid on channel 23" "Not valid,Valid"
|
|
bitfld.long 0x00 21. " CH22 ,Message valid on channel 22" "Not valid,Valid"
|
|
bitfld.long 0x00 20. " CH21 ,Message valid on channel 21" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 19. " CH20 ,Message valid on channel 20" "Not valid,Valid"
|
|
bitfld.long 0x00 18. " CH19 ,Message valid on channel 19" "Not valid,Valid"
|
|
bitfld.long 0x00 17. " CH18 ,Message valid on channel 18" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CH17 ,Message valid on channel 17" "Not valid,Valid"
|
|
bitfld.long 0x00 15. " CH16 ,Message valid on channel 16" "Not valid,Valid"
|
|
bitfld.long 0x00 14. " CH15 ,Message valid on channel 15" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 13. " CH14 ,Message valid on channel 14" "Not valid,Valid"
|
|
bitfld.long 0x00 12. " CH13 ,Message valid on channel 13" "Not valid,Valid"
|
|
bitfld.long 0x00 11. " CH12 ,Message valid on channel 12" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CH11 ,Message valid on channel 11" "Not valid,Valid"
|
|
bitfld.long 0x00 9. " CH10 ,Message valid on channel 10" "Not valid,Valid"
|
|
bitfld.long 0x00 8. " CH9 ,Message valid on channel 9" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CH8 ,Message valid on channel 8" "Not valid,Valid"
|
|
bitfld.long 0x00 6. " CH7 ,Message valid on channel 7" "Not valid,Valid"
|
|
bitfld.long 0x00 5. " CH6 ,Message valid on channel 6" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CH5 ,Message valid on channel 5" "Not valid,Valid"
|
|
bitfld.long 0x00 3. " CH4 ,Message valid on channel 4" "Not valid,Valid"
|
|
bitfld.long 0x00 2. " CH3 ,Message valid on channel 3" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CH2 ,Message valid on channel 2" "Not valid,Valid"
|
|
bitfld.long 0x00 0. " CH1 ,Message valid on channel 1" "Not valid,Valid"
|
|
group.long 0x150++0x3
|
|
line.long 0x00 "CAN_TSTR,CAN Test Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " TSTKEY ,Test access key"
|
|
bitfld.long 0x00 6. " RX ,Monitor the value of CAN_RX pin" "Dominant,Recessive"
|
|
bitfld.long 0x00 5. " TXOPD ,TX Open drain" "Not configured,Configured"
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " TX ,Control of CAN_TX pin" "Controlled by CAN core,Monitored at CAN_TX,Dominant,Recessive"
|
|
bitfld.long 0x00 2. " LBACK ,Loop Back Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " SILENT ,Silent mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " BASIC ,Basic mode" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree "Clock & Power Manager"
|
|
base ad:0x40020000
|
|
width 11.
|
|
rgroup.long 0x000++0x3
|
|
line.long 0x00 "CM_IDR,ID Register"
|
|
hexmask.long 0x00 0.--25. 1. " IDCODE ,Identification Code Register"
|
|
wgroup.long 0x004++0x3
|
|
line.long 0x00 "CM_SRR,Software Reset Register"
|
|
bitfld.long 0x00 0. " SWRST ,CM Software Reset" "No effect,Reset"
|
|
wgroup.long 0x008++0x3
|
|
line.long 0x00 "CM_CSR,Control Set Register"
|
|
bitfld.long 0x00 23. " EMCM ,External Main Clock Monitor Function Enable Control" "No effect,Enable"
|
|
bitfld.long 0x00 22. " EMCMRST ,External Main Clock Monitor Reset Enable Control" "No effect,Enable"
|
|
bitfld.long 0x00 21. " ESCM ,External Sub Clock Monitor Function Enable Control" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 20. " ESCMRST ,External Sub Clock Monitor Reset Enable Control" "No effect,Enable"
|
|
bitfld.long 0x00 19. " IDLESP ,IVC Configuration" "No effect,STOP IVC used"
|
|
bitfld.long 0x00 11. " IDLESP ,Using NISR register for interrupt or wakeup source" "No effect,NISR0/NISR1 used"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ISCLKS ,ISCLK(Internal Sub Clock) Enable Control in STOP mode" "No effect,Enable"
|
|
bitfld.long 0x00 9. " PCLK ,PCLK Enable Control bit in IDLE mode" "No effect,Enable"
|
|
bitfld.long 0x00 8. " STCLK ,STCLK Enable Control in IDLE mode" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PLL ,PLL ON Control Bit" "No effect,Enable"
|
|
bitfld.long 0x00 5. " FWAKE ,Fast Wake-up Enable Control Field" "No effect,Enable"
|
|
bitfld.long 0x00 3. " ISCLK ,Internal Sub-Clock Enable Control" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ESCLK ,External Sub-Clock Enable Control" "No effect,Enable"
|
|
bitfld.long 0x00 1. " IMCLK ,Internal Main Clock Enable Control" "No effect,Enable"
|
|
bitfld.long 0x00 0. " EMCLK ,External Main Clock Enable Control" "No effect,Enable"
|
|
wgroup.long 0x00C++0x3
|
|
line.long 0x00 "CM_CCR,Control Clear Register"
|
|
bitfld.long 0x00 23. " EMCM ,External Main Clock Monitor Function Disable Control" "No effect,Disable"
|
|
bitfld.long 0x00 22. " EMCMRST ,External Main Clock Monitor Reset Disable Control" "No effect,Disable"
|
|
bitfld.long 0x00 21. " ESCM ,External Sub Clock Monitor Function Disable Control" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 20. " ESCMRST ,External Sub Clock Monitor Reset Disable Control" "No effect,Disable"
|
|
bitfld.long 0x00 19. " IDLESP ,During the Sub-IDLE Mode" "No effect,STOP IVC not used"
|
|
bitfld.long 0x00 11. " IDLEW ,Ignore NISR register for interrupt or wakeup source" "No effect,NISR0/NISR1 ignored"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ISCLKS ,ISCLK(Internal Sub Clock) Disable Control in STOP mode" "No effect,Disable"
|
|
bitfld.long 0x00 9. " PCLK ,PCLK Disable Control bit in IDLE mode" "No effect,Disable"
|
|
bitfld.long 0x00 8. " STCLK ,STCLK Disable Control in IDLE mode" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PLL ,PLL OFF Control" "No effect,Disable"
|
|
bitfld.long 0x00 5. " FWAKE ,Fast Wake-up Disable Control Field" "No effect,Disable"
|
|
bitfld.long 0x00 3. " ISCLK ,Internal Sub-Clock Disable Control" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ESCLK ,External Sub-Clock Disable Control" "No effect,Disable"
|
|
bitfld.long 0x00 1. " IMCLK ,Internal Main Clock Disable Control" "No effect,Disable"
|
|
bitfld.long 0x00 0. " EMCLK ,External Main Clock Disable Control" "No effect,Disable"
|
|
group.long 0x020++0x3
|
|
line.long 0x00 "CM_PCKSR0,Peripheral Clock Status Register 0"
|
|
setclrfld.long 0x00 31. -0x10 31. -0x08 31. " STTCLK_set/clr ,PCLK (APB Clock) Gating Control" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. -0x10 30. -0x08 30. " IOCLK_set/clr ,PCLK (APB Clock) Gating Control" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. -0x10 29. -0x08 29. " PFCCLK_set/clr ,PCLK (APB Clock) Gating Control" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x10 27. -0x08 27. " I2C1CLK_set/clr ,PCLK (APB Clock) Gating Control" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. -0x10 26. -0x08 26. " I2C0CLK_set/clr ,PCLK (APB Clock) Gating Control" "Disabled,Enabled"
|
|
setclrfld.long 0x00 25. -0x10 25. -0x08 25. " SPI1CLK_set/clr ,PCLK (APB Clock) Gating Control" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 24. -0x10 24. -0x08 24. " SPI0CLK_set/clr ,PCLK (APB Clock) Gating Control" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. -0x10 23. -0x08 23. " LCDCLK_set/clr ,PCLK (APB Clock) Gating Control" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. -0x10 22. -0x08 22. " ADC0CLK_set/clr ,PCLK (APB Clock) Gating Control" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 21. -0x10 21. -0x08 21. " CAN1CLK_set/clr ,PCLK (APB Clock) Gating Control" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. -0x10 20. -0x08 20. " CAN0CLK_set/clr ,PCLK (APB Clock) Gating Control" "Disabled,Enabled"
|
|
setclrfld.long 0x00 19. -0x10 19. -0x08 19. " USART3CLK_set/clr ,PCLK (APB Clock) Gating Control" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 18. -0x10 18. -0x08 18. " USART2CLK_set/clr ,PCLK (APB Clock) Gating Control" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. -0x10 17. -0x08 17. " USART1CLK_set/clr ,PCLK (APB Clock) Gating Control" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. -0x10 16. -0x08 16. " USART0CLK_set/clr ,PCLK (APB Clock) Gating Control" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x10 15. -0x08 15. " TC7CLK_set/clr ,PCLK (APB Clock) Gating Control" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. -0x10 14. -0x08 14. " TC6CLK_set/clr ,PCLK (APB Clock) Gating Control" "Disabled,Enabled"
|
|
setclrfld.long 0x00 13. -0x10 13. -0x08 13. " TC5CLK_set/clr ,PCLK (APB Clock) Gating Control" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 12. -0x10 12. -0x08 12. " TC4CLK_set/clr ,PCLK (APB Clock) Gating Control" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. -0x10 11. -0x08 11. " TC3CLK_set/clr ,PCLK (APB Clock) Gating Control" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. -0x10 10. -0x08 10. " TC2CLK_set/clr ,PCLK (APB Clock) Gating Control" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x10 9. -0x08 9. " TC1CLK_set/clr ,PCLK (APB Clock) Gating Control" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x10 8. -0x08 8. " TC0CLK_set/clr ,PCLK (APB Clock) Gating Control" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. -0x10 7. -0x08 7. " IMCCLK_set/clr ,PCLK (APB Clock) Gating Control" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 6. -0x10 6. -0x08 6. " ENCCLK_set/clr ,PCLK (APB Clock) Gating Control" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. -0x10 5. -0x08 5. " PWM1CLK_set/clr ,PCLK (APB Clock) Gating Control" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. -0x10 4. -0x08 4. " PWM0CLK_set/clr ,PCLK (APB Clock) Gating Control" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x10 3. -0x08 3. " FRTCLK_set/clr ,PCLK (APB Clock) Gating Control" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x10 2. -0x08 2. " WDTCLK_set/clr ,PCLK (APB Clock) Gating Control" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. -0x10 1. -0x08 1. " OPACLK_set/clr ,PCLK (APB Clock) Gating Control" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 0. -0x10 0. -0x08 0. " SFMCLK_set/clr ,PCLK (APB Clock) Gating Control" "Disabled,Enabled"
|
|
group.long 0x024++0x3
|
|
line.long 0x00 "CM_PCCR1,Peripheral Clock Status Register 1"
|
|
setclrfld.long 0x00 9. -0x10 9. -0x08 9. " DFCCLK_set/clr ,PCLK (APB Clock) Gating Control" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x10 8. -0x08 8. " ADC1CLK_set/clr ,PCLK (APB Clock) Gating Control" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. -0x10 7. -0x08 7. " IMC1CLK_set/clr ,PCLK (APB Clock) Gating Control" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 6. -0x10 6. -0x08 6. " ENC1CLK_set/clr ,PCLK (APB Clock) Gating Control" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. -0x10 5. -0x08 5. " PWM7CLK_set/clr ,PCLK (APB Clock) Gating Control" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. -0x10 4. -0x08 4. " PWM6CLK_set/clr ,PCLK (APB Clock) Gating Control" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x10 3. -0x08 3. " PWM5CLK_set/clr ,PCLK (APB Clock) Gating Control" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x10 2. -0x08 2. " PWM4CLK_set/clr ,PCLK (APB Clock) Gating Control" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. -0x10 1. -0x08 1. " PWM3CLK_set/clr ,PCLK (APB Clock) Gating Control" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 0. -0x10 0. -0x08 0. " PWM2CLK_set/clr ,PCLK (APB Clock) Gating Control" "Disabled,Enabled"
|
|
group.long 0x028++0x3
|
|
line.long 0x00 "CM_MR0,Mode Register 0"
|
|
bitfld.long 0x00 12.--14. " CLKOUT[2:0] ,Several Clock Output Control" "EMCLK,IMCLK,ESCLK,ISCLK,PLLCLK/8,Reserved,SYSCLK/S,CORECLK"
|
|
bitfld.long 0x00 11. " LVDPD ,LVD Power Down Control" "Power down,Power up"
|
|
bitfld.long 0x00 10. " STCLKEN ,Systic Timer Clock Enable/Disable Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " RXEV ,RXEV Enable/Disable Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " LVDINTEN ,LVD Interrupt Enable/Disable Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--6. " LVDIL[2:0] ,LVD Interrupt threshold Level" "Reserved,Reserved,Reserved,LVD_LEVEL0,LVD_LEVEL1,LVD_LEVEL2,LVD_LEVEL3,?..."
|
|
textline " "
|
|
bitfld.long 0x00 3. " LVDRSTEN ,LVD Reset Enable/Disable Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--2. " LVDRL[2:0] ,LVD Reset Level" "Reserved,Reserved,Reserved,LVD_LEVEL0,LVD_LEVEL1,LVD_LEVEL2,LVD_LEVEL3,?..."
|
|
group.long 0x02c++0x3
|
|
line.long 0x00 "CM_MR1,Mode Register 1"
|
|
bitfld.long 0x00 16.--18. " LCDCLK[2:0] ,LCD Clock Source Selection" "EMCLK,IMCLK,ESCLK,ISCLK,PLLCLK,Disconnect LCDCLK,Disconnect LCDCLK,Disconnect LCDCLK"
|
|
bitfld.long 0x00 12.--14. " STTCLK[2:0] ,Stamp Timer Clock Source Selection" "EMCLK,IMCLK,ESCLK,ISCLK,PLLCLK,Disconnect STTCLK,Disconnect STTCLK,Disconnect STTCLK"
|
|
bitfld.long 0x00 8.--10. " FRTCLK[2:0] ,Free Running Timer Clock Source Selection" "EMCLK,IMCLK,ESCLK,ISCLK,PLLCLK,Disconnect FRTCLK,Disconnect FRTCLK,Disconnect FRTCLK"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " WDTCLK[2:0] ,Watchdog Timer Clock Source Selection" "EMCLK,IMCLK,ESCLK,ISCLK,PLLCLK,Disconnect WDTCLK,Disconnect WDTCLK,Disconnect WDTCLK"
|
|
bitfld.long 0x00 0.--2. " SYSCLK[2:0] ,Select one among different clock for SYSCLK" "ESCLK,EMCLK,ISCLK,IMCLK,PLLCLK,?..."
|
|
group.long 0x030++0x3
|
|
line.long 0x00 "CM_IMSCR,Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x00 18. " CMDERR ,Command Error Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " LVDINT ,Interrupt Level Detect of LVD Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " EMCKFAIL ,External Main Clock Failure Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " EMCKFAIL_END ,External Main Clock Failure End Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ESCKFAIL ,External Sub Clock Failure Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " ESCKFAIL_END ,External Sub Clock Failure End Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PLL ,PLL Stable Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " STABLE ,Clock (SYSCLK) Switching Stable Interupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " ISCLK ,Internal Sub Clock Stable Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ESCLK ,External Sub Clock Stable Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " IMCLK ,Internal Main Clock Stable Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EMCLK ,External Main Clock Stable Interrupt" "Disabled,Enabled"
|
|
rgroup.long 0x034++0x3
|
|
line.long 0x00 "CM_RISR,Raw Interrupt Status Register"
|
|
bitfld.long 0x00 18. " CMDERR ,Command Error Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " LVDRS ,Reset Level Detect Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " LVDINT ,Interrupt Level Detect of LVD Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " EMCKFAIL ,External Main Clock Failure Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " EMCKFAIL_END ,External Main Clock Failure End Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " ESCKFAIL ,External Sub Clock Failure Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " ESCKFAIL_END ,External Sub Clock Failure End Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " PLL ,PLL Stable Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " STABLE ,Clock (SYSCLK) Switching Stable Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ISCLK ,Internal Sub Clock Stable Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " ESCLK ,External Sub Clock Stable Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " IMCLK ,Internal Main Clock Stable Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EMCLK ,External Main Clock Stable Interrupt" "Disabled,Enabled"
|
|
rgroup.long 0x038++0x3
|
|
line.long 0x00 "CM_MISR,Masked Interrupt Status Register"
|
|
bitfld.long 0x00 18. " CMDERR ,Command Error Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 16. " LVDINT ,Interrupt Level Detect of LVD Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 15. " EMCKFAIL ,External Main Clock Failure Interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 14. " EMCKFAIL_END ,External Main Clock Failure End Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 13. " ESCKFAIL ,External Sub Clock Failure Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 12. " ESCKFAIL_END ,External Sub Clock Failure End Interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PLL ,PLL Stable Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. " STABLE ,Clock (SYSCLK) Switching Stable Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " ISCLK ,Internal Sub Clock Stable Interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ESCLK ,External Sub Clock Stable Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " IMCLK ,Internal Main Clock Stable Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " EMCLK ,External Main Clock Stable Interrupt" "Not occurred,Occurred"
|
|
wgroup.long 0x03c++0x3
|
|
line.long 0x00 "CM_ICR,Interrupt Clear Register"
|
|
bitfld.long 0x00 18. " CMDERR ,Command Error Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 17. " LVDRS ,Reset Level Detect Status" "No effect,Clear"
|
|
bitfld.long 0x00 16. " LVDINT ,Interrupt Level Detect of LVD Interrupt" "No effect,Cleare"
|
|
textline " "
|
|
bitfld.long 0x00 15. " EMCKFAIL ,External Main Clock Failure Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 14. " EMCKFAIL_END ,External Main Clock Failure End Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 13. " ESCKFAIL ,External Sub Clock Failure Interrupt" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 12. " ESCKFAIL_END ,External Sub Clock Failure End Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 7. " PLL ,PLL Stable Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 4. " STABLE ,Clock (SYSCLK) Switching Stable Interrupt" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ISCLK ,Internal Sub Clock Stable Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 2. " ESCLK ,External Sub Clock Stable Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 1. " IMCLK ,Internal Main Clock Stable Interrupt" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EMCLK ,External Main Clock Stable Interrupt" "No effect,Clear"
|
|
group.long 0x040++0x3
|
|
line.long 0x00 "CM_SR,Status Register"
|
|
bitfld.long 0x00 31. " SYSRSTS ,System(Chip) Reset from CPU request" "Not occurred,Occurred"
|
|
bitfld.long 0x00 30. " EMCMRSTS ,System(Chip) Reset from External Main Clock Monitor fail" "Not occurred,Occurred"
|
|
bitfld.long 0x00 29. " ESCMRSTS ,System(Chip) Reset from External Sub Clock Monitor fail" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 28. " PORRSTS ,System(Chip) Reset from power on reset" "Not occurred,Occurred"
|
|
bitfld.long 0x00 27. " WDTRSTS ,System(Chip) Reset by Watchdog timer" "Not occurred,Occurred"
|
|
bitfld.long 0x00 26. " LVDRSTS ,System(Chip) Reset by LVD Control" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 25. " NRSTS ,System(Chip) Reset by External Reset Pin" "Not occurred,Occurred"
|
|
bitfld.long 0x00 24. " SWRSTS ,System(Chip) Reset from the software reset" "Not occurred,Occurred"
|
|
bitfld.long 0x00 23. " EMCM ,External Main Clock Monitor Fail function Enable/Disable Status" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " EMCMRST ,External Main Clock Monitor Reset function Enable/Disable Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " ESCM ,External Sub Clock Monitor Fail function Enable/Disable Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " ESCMRST ,External Sub Clock Monitor Reset function Enable/Disable Status" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IDLESP ,STOP IVC Control Status in IDLE mode" "Not used,Used"
|
|
bitfld.long 0x00 18. " CMDERR ,Command Error Interrupt" "No effect,Cleared"
|
|
bitfld.long 0x00 17. " LVDRS ,LVD Reset Level Detect Status" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 16. " LVDINT ,LVD Interrupt Status" "Not detected,Detected"
|
|
bitfld.long 0x00 15. " EMCKFAIL ,External Main Clock Fail Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 14. " EMCKFAIL_END ,External Main Clock Failure End Status" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ESCKFAIL ,External Sub Clock Fail Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 12. " ESCKFAIL_END ,External Sub Clock Failure End Status" "Not detected,Detected"
|
|
bitfld.long 0x00 11. " IDLEW ,Using/Ignore NISR register for interrupt or wakeup source" "Ignored,Used"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ISCLKS ,ISCLK (Internal Sub Clock) status in STOP mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " PCLK ,PCLK Control Status in IDLE mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " STCLK ,STCLK Control Status in IDLE mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PLL ,PLL Stable Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " FWAKE ,Fast Wake Up Control (Enable/Disable) Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " STABLE ,Clock source switching STABLE Status" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ISCLK ,Internal Sub-Clock Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " ESCLK ,External Sub-Clock Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " IMCLK ,Internal Main Clock Status" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EMCLK ,External Main Clock Status" "Disabled,Enabled"
|
|
group.long 0x044++0x3
|
|
line.long 0x00 "CM_SCDR,System Clock (SYSCLK) Divider Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " SDIVKEY[15:0] ,Key for write access into the CM_SCDR"
|
|
bitfld.long 0x00 0.--2. " SDIV[2:0] ,SYSCLK divider" "1,2,3,4,5,6,7,8"
|
|
group.long 0x048++0x3
|
|
line.long 0x00 "CM_PCDR,Peripheral Clock (PCLK) Divider Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " PDIVKEY[15:0] ,Key for write access into the CM_PCDR"
|
|
bitfld.long 0x00 0.--3. " PDIV[3:0] ,SYSCLK divider for PCLK" "1,2,4,4,8,8,8,8,16,16,16,16,16,16,16,16"
|
|
group.long 0x04c++0x3
|
|
line.long 0x00 "CM_FCDR,FRT Clock Divider Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " FDIVKEY[15:0] ,Key for write access into the CM_FCDR"
|
|
bitfld.long 0x00 4.--6. " MDIV ,MDIV" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x00 0.--3. " NDIV ,NDIV" "1,2,4,4,8,8,8,8,16,16,16,16,16,16,16,16"
|
|
group.long 0x050++0x3
|
|
line.long 0x00 "CM_STCDR,STT Clock Divider Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " STDIVKEY[15:0] ,Key for write access into the CM_SCDR"
|
|
bitfld.long 0x00 4.--6. " CDIV ,CDIV" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x00 0.--3. " DDIV ,DDIV" "1,2,4,4,8,8,8,8,16,16,16,16,16,16,16,16"
|
|
group.long 0x054++0x3
|
|
line.long 0x00 "CM_LCDR,LCD Clock Divider Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " LDIVKEY[15:0] ,Key for write access into the CM_LCDR"
|
|
bitfld.long 0x00 4.--6. " JDIV ,JDIV" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x00 0.--3. " KDIV ,KDIV" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,?..."
|
|
group.long 0x058++0x3
|
|
line.long 0x00 "CM_PSTR,PLL Stabilization Time Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " PLLSKEY[15:0] ,Key for write access into the CM_PSTR register"
|
|
hexmask.long.word 0x00 0.--10. 1. " PST[10:0] ,PLL stabilization time"
|
|
group.long 0x05c++0x3
|
|
line.long 0x00 "CM_PDPR,PLL Divider Parameters Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PLLKEY[7:0] ,PLL Parameter Control Register Key Value"
|
|
bitfld.long 0x00 19.--21. " PLLCUS[2:0] ,Charge Pump Current Selection" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x00 16.--17. " PLLPOST[1:0] ,PLL Post-scaler" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x00 8.--13. " PLLPRE[5:0] ,PLL Pre-divider" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PLLMUL[7:0] ,PLL Multiplier"
|
|
group.long 0x068++0x3
|
|
line.long 0x00 "CM_EMSTR,External Main Clock Stabilization Time Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " EMSKEY[15:0] ,Key for write access into the CM_EMSTR register"
|
|
hexmask.long.word 0x00 0.--15. 1. " EMST[15:0] ,External Main Clock Oscillator Stabilization Time Control Field"
|
|
group.long 0x06c++0x3
|
|
line.long 0x00 "CM_ESSTR,External Sub Clock Stabilization Time Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " ESSKEY[15:0] ,Key for write access into the CM_ESSTR register"
|
|
hexmask.long.word 0x00 0.--15. 1. " ESST[15:0] ,External Sub-Clock Oscillator Stabilization Time Control Field"
|
|
group.long 0x070++0x3
|
|
line.long 0x00 "CM_BTCDR,Basic Timer Clock Divider Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " BTCDKEY[15:0] ,Key for write access into the CM_BTCDR register"
|
|
bitfld.long 0x00 0.--3. " BTCDIV[3:0] ,Basic Timer Clock Divider Control Field" "Reserved,Reserved,Reserved,1,2,4,8,16,32,64,128,256,512,1024,2048,4096"
|
|
group.long 0x074++0x3
|
|
line.long 0x00 "CM_BTR,Basic Timer Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " BTCV ,Basic Timer Count Value"
|
|
group.long 0x078++0xf
|
|
line.long 0x0 "CM_WCR0,Wakeup Control Register 0"
|
|
bitfld.long 0x0 31. " WEN3 ,Wake-Up Enable/Disable Control" "Disabled,Enabled"
|
|
bitfld.long 0x0 30. " EDGE3 ,Edge Type Selection" "Rising,Falling"
|
|
bitfld.long 0x0 24.--28. " WSRC3 [4:0] ,Wake-Up Source Selection Field" "EXI0,EXI1,EXI2,EXI3,EXI4,EXI5,EXI6,EXI7,EXI8,EXI9,EXI10,EXI11,EXI12,EXI13,EXI14,EXI15,FRT,USARTRX0,USARTRX1,USARTRX2,USARTRX3,CANRX0,CANRX1,SPI0,SPI1,?..."
|
|
textline " "
|
|
bitfld.long 0x0 23. " WEN2 ,Wake-Up Enable/Disable Control" "Disabled,Enabled"
|
|
bitfld.long 0x0 22. " EDGE2 ,Edge Type Selection" "Rising,Falling"
|
|
bitfld.long 0x0 16.--20. " WSRC2 [4:0] ,Wake-Up Source Selection Field" "EXI0,EXI1,EXI2,EXI3,EXI4,EXI5,EXI6,EXI7,EXI8,EXI9,EXI10,EXI11,EXI12,EXI13,EXI14,EXI15,FRT,USARTRX0,USARTRX1,USARTRX2,USARTRX3,CANRX0,CANRX1,SPI0,SPI1,?..."
|
|
textline " "
|
|
bitfld.long 0x0 15. " WEN1 ,Wake-Up Enable/Disable Control" "Disabled,Enabled"
|
|
bitfld.long 0x0 14. " EDGE1 ,Edge Type Selection" "Rising,Falling"
|
|
bitfld.long 0x0 8.--12. " WSRC1 [4:0] ,Wake-Up Source Selection Field" "EXI0,EXI1,EXI2,EXI3,EXI4,EXI5,EXI6,EXI7,EXI8,EXI9,EXI10,EXI11,EXI12,EXI13,EXI14,EXI15,FRT,USARTRX0,USARTRX1,USARTRX2,USARTRX3,CANRX0,CANRX1,SPI0,SPI1,?..."
|
|
textline " "
|
|
bitfld.long 0x0 7. " WEN0 ,Wake-Up Enable/Disable Control" "Disabled,Enabled"
|
|
bitfld.long 0x0 6. " EDGE0 ,Edge Type Selection" "Rising,Falling"
|
|
bitfld.long 0x0 0.--4. " WSRC0 [4:0] ,Wake-Up Source Selection Field" "EXI0,EXI1,EXI2,EXI3,EXI4,EXI5,EXI6,EXI7,EXI8,EXI9,EXI10,EXI11,EXI12,EXI13,EXI14,EXI15,FRT,USARTRX0,USARTRX1,USARTRX2,USARTRX3,CANRX0,CANRX1,SPI0,SPI1,?..."
|
|
line.long 0x4 "CM_WCR1,Wakeup Control Register 1"
|
|
bitfld.long 0x4 31. " WEN7 ,Wake-Up Enable/Disable Control" "Disabled,Enabled"
|
|
bitfld.long 0x4 30. " EDGE7 ,Edge Type Selection" "Rising,Falling"
|
|
bitfld.long 0x4 24.--28. " WSRC7 [4:0] ,Wake-Up Source Selection Field" "EXI0,EXI1,EXI2,EXI3,EXI4,EXI5,EXI6,EXI7,EXI8,EXI9,EXI10,EXI11,EXI12,EXI13,EXI14,EXI15,FRT,USARTRX0,USARTRX1,USARTRX2,USARTRX3,CANRX0,CANRX1,SPI0,SPI1,?..."
|
|
textline " "
|
|
bitfld.long 0x4 23. " WEN6 ,Wake-Up Enable/Disable Control" "Disabled,Enabled"
|
|
bitfld.long 0x4 22. " EDGE6 ,Edge Type Selection" "Rising,Falling"
|
|
bitfld.long 0x4 16.--20. " WSRC6 [4:0] ,Wake-Up Source Selection Field" "EXI0,EXI1,EXI2,EXI3,EXI4,EXI5,EXI6,EXI7,EXI8,EXI9,EXI10,EXI11,EXI12,EXI13,EXI14,EXI15,FRT,USARTRX0,USARTRX1,USARTRX2,USARTRX3,CANRX0,CANRX1,SPI0,SPI1,?..."
|
|
textline " "
|
|
bitfld.long 0x4 15. " WEN5 ,Wake-Up Enable/Disable Control" "Disabled,Enabled"
|
|
bitfld.long 0x4 14. " EDGE5 ,Edge Type Selection" "Rising,Falling"
|
|
bitfld.long 0x4 8.--12. " WSRC5 [4:0] ,Wake-Up Source Selection Field" "EXI0,EXI1,EXI2,EXI3,EXI4,EXI5,EXI6,EXI7,EXI8,EXI9,EXI10,EXI11,EXI12,EXI13,EXI14,EXI15,FRT,USARTRX0,USARTRX1,USARTRX2,USARTRX3,CANRX0,CANRX1,SPI0,SPI1,?..."
|
|
textline " "
|
|
bitfld.long 0x4 7. " WEN4 ,Wake-Up Enable/Disable Control" "Disabled,Enabled"
|
|
bitfld.long 0x4 6. " EDGE4 ,Edge Type Selection" "Rising,Falling"
|
|
bitfld.long 0x4 0.--4. " WSRC4 [4:0] ,Wake-Up Source Selection Field" "EXI0,EXI1,EXI2,EXI3,EXI4,EXI5,EXI6,EXI7,EXI8,EXI9,EXI10,EXI11,EXI12,EXI13,EXI14,EXI15,FRT,USARTRX0,USARTRX1,USARTRX2,USARTRX3,CANRX0,CANRX1,SPI0,SPI1,?..."
|
|
line.long 0x8 "CM_WCR2,Wakeup Control Register 2"
|
|
bitfld.long 0x8 31. " WEN11 ,Wake-Up Enable/Disable Control" "Disabled,Enabled"
|
|
bitfld.long 0x8 30. " EDGE11 ,Edge Type Selection" "Rising,Falling"
|
|
bitfld.long 0x8 24.--28. " WSRC11[4:0] ,Wake-Up Source Selection Field" "EXI0,EXI1,EXI2,EXI3,EXI4,EXI5,EXI6,EXI7,EXI8,EXI9,EXI10,EXI11,EXI12,EXI13,EXI14,EXI15,FRT,USARTRX0,USARTRX1,USARTRX2,USARTRX3,CANRX0,CANRX1,SPI0,SPI1,?..."
|
|
textline " "
|
|
bitfld.long 0x8 23. " WEN10 ,Wake-Up Enable/Disable Control" "Disabled,Enabled"
|
|
bitfld.long 0x8 22. " EDGE10 ,Edge Type Selection" "Rising,Falling"
|
|
bitfld.long 0x8 16.--20. " WSRC10[4:0] ,Wake-Up Source Selection Field" "EXI0,EXI1,EXI2,EXI3,EXI4,EXI5,EXI6,EXI7,EXI8,EXI9,EXI10,EXI11,EXI12,EXI13,EXI14,EXI15,FRT,USARTRX0,USARTRX1,USARTRX2,USARTRX3,CANRX0,CANRX1,SPI0,SPI1,?..."
|
|
textline " "
|
|
bitfld.long 0x8 15. " WEN9 ,Wake-Up Enable/Disable Control" "Disabled,Enabled"
|
|
bitfld.long 0x8 14. " EDGE9 ,Edge Type Selection" "Rising,Falling"
|
|
bitfld.long 0x8 8.--12. " WSRC9 [4:0] ,Wake-Up Source Selection Field" "EXI0,EXI1,EXI2,EXI3,EXI4,EXI5,EXI6,EXI7,EXI8,EXI9,EXI10,EXI11,EXI12,EXI13,EXI14,EXI15,FRT,USARTRX0,USARTRX1,USARTRX2,USARTRX3,CANRX0,CANRX1,SPI0,SPI1,?..."
|
|
textline " "
|
|
bitfld.long 0x8 7. " WEN8 ,Wake-Up Enable/Disable Control" "Disabled,Enabled"
|
|
bitfld.long 0x8 6. " EDGE8 ,Edge Type Selection" "Rising,Falling"
|
|
bitfld.long 0x8 0.--4. " WSRC8 [4:0] ,Wake-Up Source Selection Field" "EXI0,EXI1,EXI2,EXI3,EXI4,EXI5,EXI6,EXI7,EXI8,EXI9,EXI10,EXI11,EXI12,EXI13,EXI14,EXI15,FRT,USARTRX0,USARTRX1,USARTRX2,USARTRX3,CANRX0,CANRX1,SPI0,SPI1,?..."
|
|
line.long 0xC "CM_WCR3,Wakeup Control Register 3"
|
|
bitfld.long 0xC 31. " WEN15 ,Wake-Up Enable/Disable Control" "Disabled,Enabled"
|
|
bitfld.long 0xC 30. " EDGE15 ,Edge Type Selection" "Rising,Falling"
|
|
bitfld.long 0xC 24.--28. " WSRC15[4:0] ,Wake-Up Source Selection Field" "EXI0,EXI1,EXI2,EXI3,EXI4,EXI5,EXI6,EXI7,EXI8,EXI9,EXI10,EXI11,EXI12,EXI13,EXI14,EXI15,FRT,USARTRX0,USARTRX1,USARTRX2,USARTRX3,CANRX0,CANRX1,SPI0,SPI1,?..."
|
|
textline " "
|
|
bitfld.long 0xC 23. " WEN14 ,Wake-Up Enable/Disable Control" "Disabled,Enabled"
|
|
bitfld.long 0xC 22. " EDGE14 ,Edge Type Selection" "Rising,Falling"
|
|
bitfld.long 0xC 16.--20. " WSRC14[4:0] ,Wake-Up Source Selection Field" "EXI0,EXI1,EXI2,EXI3,EXI4,EXI5,EXI6,EXI7,EXI8,EXI9,EXI10,EXI11,EXI12,EXI13,EXI14,EXI15,FRT,USARTRX0,USARTRX1,USARTRX2,USARTRX3,CANRX0,CANRX1,SPI0,SPI1,?..."
|
|
textline " "
|
|
bitfld.long 0xC 15. " WEN13 ,Wake-Up Enable/Disable Control" "Disabled,Enabled"
|
|
bitfld.long 0xC 14. " EDGE13 ,Edge Type Selection" "Rising,Falling"
|
|
bitfld.long 0xC 8.--12. " WSRC13[4:0] ,Wake-Up Source Selection Field" "EXI0,EXI1,EXI2,EXI3,EXI4,EXI5,EXI6,EXI7,EXI8,EXI9,EXI10,EXI11,EXI12,EXI13,EXI14,EXI15,FRT,USARTRX0,USARTRX1,USARTRX2,USARTRX3,CANRX0,CANRX1,SPI0,SPI1,?..."
|
|
textline " "
|
|
bitfld.long 0xC 7. " WEN12 ,Wake-Up Enable/Disable Control" "Disabled,Enabled"
|
|
bitfld.long 0xC 6. " EDGE12 ,Edge Type Selection" "Rising,Falling"
|
|
bitfld.long 0xC 0.--4. " WSRC12[4:0] ,Wake-Up Source Selection Field" "EXI0,EXI1,EXI2,EXI3,EXI4,EXI5,EXI6,EXI7,EXI8,EXI9,EXI10,EXI11,EXI12,EXI13,EXI14,EXI15,FRT,USARTRX0,USARTRX1,USARTRX2,USARTRX3,CANRX0,CANRX1,SPI0,SPI1,?..."
|
|
group.long 0x088++0x3
|
|
line.long 0x00 "CM_WIMSCR,Wakeup Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x00 15. " WI15 ,Wakeup Interrupt Mask Set/Clear" "Masked,Not masked"
|
|
bitfld.long 0x00 14. " WI14 ,Wakeup Interrupt Mask Set/Clear" "Masked,Not masked"
|
|
bitfld.long 0x00 13. " WI13 ,Wakeup Interrupt Mask Set/Clear" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " WI12 ,Wakeup Interrupt Mask Set/Clear" "Masked,Not masked"
|
|
bitfld.long 0x00 11. " WI11 ,Wakeup Interrupt Mask Set/Clear" "Masked,Not masked"
|
|
bitfld.long 0x00 10. " WI10 ,Wakeup Interrupt Mask Set/Clear" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " WI9 ,Wakeup Interrupt Mask Set/Clear" "Masked,Not masked"
|
|
bitfld.long 0x00 8. " WI8 ,Wakeup Interrupt Mask Set/Clear" "Masked,Not masked"
|
|
bitfld.long 0x00 7. " WI7 ,Wakeup Interrupt Mask Set/Clear" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " WI6 ,Wakeup Interrupt Mask Set/Clear" "Masked,Not masked"
|
|
bitfld.long 0x00 5. " WI5 ,Wakeup Interrupt Mask Set/Clear" "Masked,Not masked"
|
|
bitfld.long 0x00 4. " WI4 ,Wakeup Interrupt Mask Set/Clear" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " WI3 ,Wakeup Interrupt Mask Set/Clear" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " WI2 ,Wakeup Interrupt Mask Set/Clear" "Masked,Not masked"
|
|
bitfld.long 0x00 1. " WI1 ,Wakeup Interrupt Mask Set/Clear" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " WI0 ,Wakeup Interrupt Mask Set/Clear Register" "Masked,Not masked"
|
|
rgroup.long 0x08c++0x3
|
|
line.long 0x00 "CM_WRISR,Wakeup Raw Interrupt Status Register"
|
|
bitfld.long 0x00 15. " WI15 ,Wakeup Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 14. " WI14 ,Wakeup Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 13. " WI13 ,Wakeup Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 12. " WI12 ,Wakeup Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 11. " WI11 ,Wakeup Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 10. " WI10 ,Wakeup Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 9. " WI9 ,Wakeup Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 8. " WI8 ,Wakeup Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 7. " WI7 ,Wakeup Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 6. " WI6 ,Wakeup Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " WI5 ,Wakeup Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. " WI4 ,Wakeup Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 3. " WI3 ,Wakeup Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " WI2 ,Wakeup Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " WI1 ,Wakeup Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 0. " WI0 ,Wakeup Raw Interrupt Status" "Not occurred,Occurred"
|
|
rgroup.long 0x090++0x3
|
|
line.long 0x00 "CM_WMISR,Wakeup Masked Interrupt Status Register"
|
|
bitfld.long 0x00 15. " WI15 ,Wakeup Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 14. " WI14 ,Wakeup Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 13. " WI13 ,Wakeup Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 12. " WI12 ,Wakeup Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 11. " WI11 ,Wakeup Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 10. " WI10 ,Wakeup Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 9. " WI9 ,Wakeup Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 8. " WI8 ,Wakeup Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 7. " WI7 ,Wakeup Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 6. " WI6 ,Wakeup Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " WI5 ,Wakeup Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. " WI4 ,Wakeup Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 3. " WI3 ,Wakeup Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " WI2 ,Wakeup Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " WI1 ,Wakeup Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 0. " WI0 ,Wakeup Masked Interrupt Status" "Not occurred,Occurred"
|
|
wgroup.long 0x094++0x3
|
|
line.long 0x00 "CM_WICR,Wakeup Interrupt Clear Register"
|
|
bitfld.long 0x00 15. " WI15 ,Wakeup Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 14. " WI14 ,Wakeup Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 13. " WI13 ,Wakeup Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 12. " WI12 ,Wakeup Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 11. " WI11 ,Wakeup Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 10. " WI10 ,Wakeup Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 9. " WI9 ,Wakeup Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 8. " WI8 ,Wakeup Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 7. " WI7 ,Wakeup Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6. " WI6 ,Wakeup Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 5. " WI5 ,Wakeup Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 4. " WI4 ,Wakeup Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " WI3 ,Wakeup Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 2. " WI2 ,Wakeup Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 1. " WI1 ,Wakeup Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 0. " WI0 ,Wakeup Interrupt Clear" "No effect,Clear"
|
|
group.long 0x098++0x3
|
|
line.long 0x00 "CM_NISR0,NVIC Interrupt Status Register 0"
|
|
bitfld.long 0x00 31. " NVIC31 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 30. " NVIC30 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 29. " NVIC29 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 28. " NVIC28 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 27. " NVIC27 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 26. " NVIC26 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 25. " NVIC25 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 24. " NVIC24 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 23. " NVIC23 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 22. " NVIC22 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 21. " NVIC21 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 20. " NVIC20 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 19. " NVIC19 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 18. " NVIC18 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 17. " NVIC17 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 16. " NVIC16 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 15. " NVIC15 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 14. " NVIC14 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 13. " NVIC13 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 12. " NVIC12 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 11. " NVIC11 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 10. " NVIC10 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 9. " NVIC9 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 8. " NVIC8 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 7. " NVIC7 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " NVIC6 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " NVIC5 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 4. " NVIC4 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " NVIC3 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " NVIC2 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " NVIC1 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " NVIC0 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
group.long 0x09c++0x3
|
|
line.long 0x00 "CM_NISR1,NVIC Interrupt Status Register 1"
|
|
bitfld.long 0x00 31. " NVIC31 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 30. " NVIC30 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 29. " NVIC29 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 28. " NVIC28 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 27. " NVIC27 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 26. " NVIC26 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 25. " NVIC25 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 24. " NVIC24 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 23. " NVIC23 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 22. " NVIC22 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 21. " NVIC21 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 20. " NVIC20 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 19. " NVIC19 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 18. " NVIC18 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 17. " NVIC17 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 16. " NVIC16 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 15. " NVIC15 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 14. " NVIC14 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 13. " NVIC13 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 12. " NVIC12 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 11. " NVIC11 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 10. " NVIC10 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 9. " NVIC9 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 8. " NVIC8 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 7. " NVIC7 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " NVIC6 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " NVIC5 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 4. " NVIC4 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " NVIC3 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " NVIC2 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " NVIC1 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " NVIC0 ,Control Interrupt to NVIC of Cortex-M3" "Not occurred,Occurred"
|
|
width 0xb
|
|
tree.end
|
|
tree "Data Flash Controller"
|
|
base ad:0x40011000
|
|
width 10.
|
|
rgroup.long 0x00++0x3
|
|
line.long 0x00 "DF_IDR,D-Flash ID Register"
|
|
hexmask.long 0x00 0.--25. 1. " IDCODE[25:0] ,Identification Code Register"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "DF_CEDR,D-Flash Clock Enable/Disable Register"
|
|
bitfld.long 0x00 0. " CKEN ,Clock Enable" "Disabled,Enabled"
|
|
wgroup.long 0x08++0x3
|
|
line.long 0x00 "DF_SRR,D-Flash Software Reset Register"
|
|
bitfld.long 0x00 0. " SWRST ,Software Reset" "No efffect,Reset"
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "DF_CR,D-Flash Control Register"
|
|
bitfld.long 0x00 4.--7. " CMD[3:0] ,Flash Program/Erase Command Field" "No effect,Byte program,Half-word program,Word program,Page erase,Sector erase,Entire data flash erase,?..."
|
|
textline " "
|
|
bitfld.long 0x00 2. " DFSTABLE ,Data Flash Stable" "Not stable,Stable"
|
|
bitfld.long 0x00 1. " DFEN ,Data Flash Enable/Disable Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " START ,Operation(note) Start" "No effect,Start"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "DF_MR,D-Flash Mode Register"
|
|
bitfld.long 0x00 0.--3. " WAIT[3:0] ,Data Flash Access Wait Cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "DF_IMSCR,D-Flash Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x00 10. " ERR2 ,ERR Interrupt Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " ERR1 ,ERR Interrupt Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ERR0 ,ERR Interrupt Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " END ,END Interrupt Enable/Disable" "Disabled,Enabled"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x00 "DF_RISR,D-Flash Raw Interrupt Status Register"
|
|
bitfld.long 0x00 10. " ERR2 ,ERR Interrupt Mask Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " ERR1 ,ERR Interrupt Mask Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ERR0 ,ERR Interrupt Mask Status" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " END ,END Interrupt Mask Status" "Disabled,Enabled"
|
|
rgroup.long 0x1c++0x3
|
|
line.long 0x00 "DF_MISR,D-Flash Masked Interrupt Status Register"
|
|
bitfld.long 0x00 10. " ERR2 ,ERR Interrupt Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " ERR1 ,ERR Interrupt Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ERR0 ,ERR Interrupt Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " END ,END Interrupt Enable/Disable" "Disabled,Enabled"
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x00 "DF_ICR,D-Flash Interrupt Clear Register"
|
|
bitfld.long 0x00 10. " ERR2 ,ERR Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 9. " ERR1 ,ERR Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 8. " ERR0 ,ERR Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 0. " END ,END Interrupt Clear" "No effect,Clear"
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "DF_AR,D-Flash Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " ADDR[31:0] ,Data Flash Memory Address to program(Normal) or erase(Page/Sector/Entire Data Flash)"
|
|
group.long 0x28++0x3
|
|
line.long 0x00 "DF_DR,D-Flash Data Register"
|
|
hexmask.long 0x00 0.--31. 1. " DATA[31:0] ,Data to write on the target address of the data flash memory"
|
|
wgroup.long 0x2c++0x3
|
|
line.long 0x00 "DF_KR,D-Flash Key Register"
|
|
hexmask.long 0x00 0.--31. 1. " KEY[31:0] ,Key register value for program, erase, protection operation"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "DF_PCR,D-Flash Protection Control Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " PRKEY ,To set the protection bit, user should write with a specific key value, 0xA53C"
|
|
bitfld.long 0x00 15. " WEPR15 ,Write/Erase Protection Region Selection" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " WEPR14 ,Write/Erase Protection Region Selection" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " WEPR13 ,Write/Erase Protection Region Selection" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " WEPR12 ,Write/Erase Protection Region Selection" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " WEPR11 ,Write/Erase Protection Region Selection" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " WEPR10 ,Write/Erase Protection Region Selection" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " WEPR9 ,Write/Erase Protection Region Selection" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " WEPR8 ,Write/Erase Protection Region Selection" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " WEPR7 ,Write/Erase Protection Region Selection" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " WEPR6 ,Write/Erase Protection Region Selection" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " WEPR5 ,Write/Erase Protection Region Selection" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " WEPR4 ,Write/Erase Protection Region Selection" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " WEPR3 ,Write/Erase Protection Region Selection" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " WEPR2 ,Write/Erase Protection Region Selection" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " WEPR1 ,Write/Erase Protection Region Selection" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " WEPR0 ,Write/Erase Protection Region Selection" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
tree "Direct Memory Access (DMA) Controller"
|
|
base ad:0x400F0000
|
|
width 11.
|
|
tree "DMA Channel 0"
|
|
group.long 0x0++0x13
|
|
line.long 0x00 "DMA_ISR0,DMA Channel 0 Initial Source Register"
|
|
hexmask.long 0x00 0.--31. 1. " SADDR ,DMA Initial Source Address Field"
|
|
line.long 0x04 "DMA_ISCR0,DMA Channel 0 Initial Source Control Register"
|
|
bitfld.long 0x04 1. " HINC ,Source Address Increment Bit for High Transfer Count" "Increment,Fixed"
|
|
bitfld.long 0x04 0. " LINC ,Source Address Increment Bit for Low Transfer Count" "Increment,Fixed"
|
|
line.long 0x08 "DMA_IDR0,DMA Channel 0 Initial Destination Register"
|
|
hexmask.long 0x08 0.--31. 1. " DADDR ,Destination Address Field"
|
|
line.long 0x0c "DMA_IDCR0,DMA Channel 0 Initial Destination Control Register"
|
|
bitfld.long 0x0c 1. " HINC ,Destination Address Increment Bit for High Transfer Count" "Increment,Fixed"
|
|
bitfld.long 0x0c 0. " LINC ,Destination Address Increment Bit for Low Transfer Count" "Increment,Fixed"
|
|
line.long 0x10 "DMA_CR0,DMA Channel 0 Control Register"
|
|
bitfld.long 0x10 30. " TCIT ,Transfer Count Interrupt Enable/Disable Control" "Disabled,Enabled"
|
|
bitfld.long 0x10 29. " LTCIT ,Low Transfer Count Interrupt Enable/Disable Control" "Disabled,Enabled"
|
|
bitfld.long 0x10 28. " TSIZE ,Transfer Size" "Unit,Burst"
|
|
textline " "
|
|
bitfld.long 0x10 27. " SMODE ,Service Mode Selection" "Single Service Mode,Continuous Mode"
|
|
bitfld.long 0x10 26. " RELOAD ,Auto Reload Enable/Disable Control" "Enabled,Disabled"
|
|
bitfld.long 0x10 24.--25. " DSIZE ,Data Size Selection Field" "Byte,Half word,Word,?..."
|
|
textline " "
|
|
hexmask.long.word 0x10 12.--23. 1. " HTC ,High Transfer Count Field"
|
|
hexmask.long.word 0x10 0.--11. 1. " LTC ,Low Transfer Count Field"
|
|
rgroup.long 0x14++0x0B
|
|
line.long 0x00 "DMA_SR0,DMA Channel 0 Status Register"
|
|
bitfld.long 0x00 31. " LTCST ,Low Transfer Counter Status" "Not busy,Busy"
|
|
hexmask.long.word 0x00 12.--23. 1. " CURR_HTC ,Current High Transfer Count Value"
|
|
hexmask.long.word 0x00 0.--11. 1. " CURR_LTC ,Current Low Transfer Count Value"
|
|
line.long 0x04 "DMA_CSR0,DMA Channel 0 Current Source Register"
|
|
hexmask.long 0x04 0.--31. 1. " CURR_SADDR ,Current Source Address Field"
|
|
line.long 0x08 "DMA_CDR0,DMA Channel 0 Current Destination Register"
|
|
hexmask.long 0x08 0.--31. 1. " CURR_DADDR ,Current Destination Address Field"
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "DMA_MTR0,DMA Channel 0 Mask Trigger Register"
|
|
bitfld.long 0x00 2. " STOP ,DMA Operation Stop" "No effect,Stop"
|
|
bitfld.long 0x00 1. " CHEN ,DMA channel on/off" "Off,On"
|
|
bitfld.long 0x00 0. " SWTRIG ,DMA Software Request Trigger" "No effect,Request"
|
|
line.long 0x04 "DMA_RSR0,DMA Channel 0 Request Selection Register"
|
|
bitfld.long 0x04 1.--5. " HWSRC ,DMA Hardware Source Selection Field" "USART0_TX,USART0_RX,USART1_TX,USART1_RX,USART2_TX,USART2_RX,USART3_TX,USART3_RX,Reserved,Reserved,SPI0_TX,SPI0_RX,SPI1_TX,SPI1_RX,Reserved,Reserved,Reserved,Reserved,IIC0_TX,IIC0_RX,IIC1_TX,IIC1_RX,ADC00,ADC1,ADC01,?..."
|
|
bitfld.long 0x04 0. " REQ ,Request Type Selection" "S/W request,DMA source"
|
|
tree.end
|
|
tree "DMA Channel 1"
|
|
group.long 0x80++0x13
|
|
line.long 0x00 "DMA_ISR1,DMA Channel 1 Initial Source Register"
|
|
hexmask.long 0x00 0.--31. 1. " SADDR ,DMA Initial Source Address Field"
|
|
line.long 0x04 "DMA_ISCR1,DMA Channel 1 Initial Source Control Register"
|
|
bitfld.long 0x04 1. " HINC ,Source Address Increment Bit for High Transfer Count" "Increment,Fixed"
|
|
bitfld.long 0x04 0. " LINC ,Source Address Increment Bit for Low Transfer Count" "Increment,Fixed"
|
|
line.long 0x08 "DMA_IDR1,DMA Channel 1 Initial Destination Register"
|
|
hexmask.long 0x08 0.--31. 1. " DADDR ,Destination Address Field"
|
|
line.long 0x0c "DMA_IDCR1,DMA Channel 1 Initial Destination Control Register"
|
|
bitfld.long 0x0c 1. " HINC ,Destination Address Increment Bit for High Transfer Count" "Increment,Fixed"
|
|
bitfld.long 0x0c 0. " LINC ,Destination Address Increment Bit for Low Transfer Count" "Increment,Fixed"
|
|
line.long 0x10 "DMA_CR1,DMA Channel 1 Control Register"
|
|
bitfld.long 0x10 30. " TCIT ,Transfer Count Interrupt Enable/Disable Control" "Disabled,Enabled"
|
|
bitfld.long 0x10 29. " LTCIT ,Low Transfer Count Interrupt Enable/Disable Control" "Disabled,Enabled"
|
|
bitfld.long 0x10 28. " TSIZE ,Transfer Size" "Unit,Burst"
|
|
textline " "
|
|
bitfld.long 0x10 27. " SMODE ,Service Mode Selection" "Single Service Mode,Continuous Mode"
|
|
bitfld.long 0x10 26. " RELOAD ,Auto Reload Enable/Disable Control" "Enabled,Disabled"
|
|
bitfld.long 0x10 24.--25. " DSIZE ,Data Size Selection Field" "Byte,Half word,Word,?..."
|
|
textline " "
|
|
hexmask.long.word 0x10 12.--23. 1. " HTC ,High Transfer Count Field"
|
|
hexmask.long.word 0x10 0.--11. 1. " LTC ,Low Transfer Count Field"
|
|
rgroup.long 0x94++0x0B
|
|
line.long 0x00 "DMA_SR1,DMA Channel 1 Status Register"
|
|
bitfld.long 0x00 31. " LTCST ,Low Transfer Counter Status" "Not busy,Busy"
|
|
hexmask.long.word 0x00 12.--23. 1. " CURR_HTC ,Current High Transfer Count Value"
|
|
hexmask.long.word 0x00 0.--11. 1. " CURR_LTC ,Current Low Transfer Count Value"
|
|
line.long 0x04 "DMA_CSR1,DMA Channel 1 Current Source Register"
|
|
hexmask.long 0x04 0.--31. 1. " CURR_SADDR ,Current Source Address Field"
|
|
line.long 0x08 "DMA_CDR1,DMA Channel 1 Current Destination Register"
|
|
hexmask.long 0x08 0.--31. 1. " CURR_DADDR ,Current Destination Address Field"
|
|
group.long 0xA0++0x07
|
|
line.long 0x00 "DMA_MTR1,DMA Channel 1 Mask Trigger Register"
|
|
bitfld.long 0x00 2. " STOP ,DMA Operation Stop" "No effect,Stop"
|
|
bitfld.long 0x00 1. " CHEN ,DMA channel on/off" "Off,On"
|
|
bitfld.long 0x00 0. " SWTRIG ,DMA Software Request Trigger" "No effect,Request"
|
|
line.long 0x04 "DMA_RSR1,DMA Channel 1 Request Selection Register"
|
|
bitfld.long 0x04 1.--5. " HWSRC ,DMA Hardware Source Selection Field" "USART0_TX,USART0_RX,USART1_TX,USART1_RX,USART2_TX,USART2_RX,USART3_TX,USART3_RX,Reserved,Reserved,SPI0_TX,SPI0_RX,SPI1_TX,SPI1_RX,Reserved,Reserved,Reserved,Reserved,IIC0_TX,IIC0_RX,IIC1_TX,IIC1_RX,ADC00,ADC1,ADC01,?..."
|
|
bitfld.long 0x04 0. " REQ ,Request Type Selection" "S/W request,DMA source"
|
|
tree.end
|
|
tree "DMA Channel 2"
|
|
group.long 0x100++0x13
|
|
line.long 0x00 "DMA_ISR2,DMA Channel 2 Initial Source Register"
|
|
hexmask.long 0x00 0.--31. 1. " SADDR ,DMA Initial Source Address Field"
|
|
line.long 0x04 "DMA_ISCR2,DMA Channel 2 Initial Source Control Register"
|
|
bitfld.long 0x04 1. " HINC ,Source Address Increment Bit for High Transfer Count" "Increment,Fixed"
|
|
bitfld.long 0x04 0. " LINC ,Source Address Increment Bit for Low Transfer Count" "Increment,Fixed"
|
|
line.long 0x08 "DMA_IDR2,DMA Channel 2 Initial Destination Register"
|
|
hexmask.long 0x08 0.--31. 1. " DADDR ,Destination Address Field"
|
|
line.long 0x0c "DMA_IDCR2,DMA Channel 2 Initial Destination Control Register"
|
|
bitfld.long 0x0c 1. " HINC ,Destination Address Increment Bit for High Transfer Count" "Increment,Fixed"
|
|
bitfld.long 0x0c 0. " LINC ,Destination Address Increment Bit for Low Transfer Count" "Increment,Fixed"
|
|
line.long 0x10 "DMA_CR2,DMA Channel 2 Control Register"
|
|
bitfld.long 0x10 30. " TCIT ,Transfer Count Interrupt Enable/Disable Control" "Disabled,Enabled"
|
|
bitfld.long 0x10 29. " LTCIT ,Low Transfer Count Interrupt Enable/Disable Control" "Disabled,Enabled"
|
|
bitfld.long 0x10 28. " TSIZE ,Transfer Size" "Unit,Burst"
|
|
textline " "
|
|
bitfld.long 0x10 27. " SMODE ,Service Mode Selection" "Single Service Mode,Continuous Mode"
|
|
bitfld.long 0x10 26. " RELOAD ,Auto Reload Enable/Disable Control" "Enabled,Disabled"
|
|
bitfld.long 0x10 24.--25. " DSIZE ,Data Size Selection Field" "Byte,Half word,Word,?..."
|
|
textline " "
|
|
hexmask.long.word 0x10 12.--23. 1. " HTC ,High Transfer Count Field"
|
|
hexmask.long.word 0x10 0.--11. 1. " LTC ,Low Transfer Count Field"
|
|
rgroup.long 0x114++0x0B
|
|
line.long 0x00 "DMA_SR2,DMA Channel 2 Status Register"
|
|
bitfld.long 0x00 31. " LTCST ,Low Transfer Counter Status" "Not busy,Busy"
|
|
hexmask.long.word 0x00 12.--23. 1. " CURR_HTC ,Current High Transfer Count Value"
|
|
hexmask.long.word 0x00 0.--11. 1. " CURR_LTC ,Current Low Transfer Count Value"
|
|
line.long 0x04 "DMA_CSR2,DMA Channel 2 Current Source Register"
|
|
hexmask.long 0x04 0.--31. 1. " CURR_SADDR ,Current Source Address Field"
|
|
line.long 0x08 "DMA_CDR2,DMA Channel 2 Current Destination Register"
|
|
hexmask.long 0x08 0.--31. 1. " CURR_DADDR ,Current Destination Address Field"
|
|
group.long 0x120++0x07
|
|
line.long 0x00 "DMA_MTR2,DMA Channel 2 Mask Trigger Register"
|
|
bitfld.long 0x00 2. " STOP ,DMA Operation Stop" "No effect,Stop"
|
|
bitfld.long 0x00 1. " CHEN ,DMA channel on/off" "Off,On"
|
|
bitfld.long 0x00 0. " SWTRIG ,DMA Software Request Trigger" "No effect,Request"
|
|
line.long 0x04 "DMA_RSR2,DMA Channel 2 Request Selection Register"
|
|
bitfld.long 0x04 1.--5. " HWSRC ,DMA Hardware Source Selection Field" "USART0_TX,USART0_RX,USART1_TX,USART1_RX,USART2_TX,USART2_RX,USART3_TX,USART3_RX,Reserved,Reserved,SPI0_TX,SPI0_RX,SPI1_TX,SPI1_RX,Reserved,Reserved,Reserved,Reserved,IIC0_TX,IIC0_RX,IIC1_TX,IIC1_RX,ADC00,ADC1,ADC01,?..."
|
|
bitfld.long 0x04 0. " REQ ,Request Type Selection" "S/W request,DMA source"
|
|
tree.end
|
|
tree "DMA Channel 3"
|
|
group.long 0x180++0x13
|
|
line.long 0x00 "DMA_ISR3,DMA Channel 3 Initial Source Register"
|
|
hexmask.long 0x00 0.--31. 1. " SADDR ,DMA Initial Source Address Field"
|
|
line.long 0x04 "DMA_ISCR3,DMA Channel 3 Initial Source Control Register"
|
|
bitfld.long 0x04 1. " HINC ,Source Address Increment Bit for High Transfer Count" "Increment,Fixed"
|
|
bitfld.long 0x04 0. " LINC ,Source Address Increment Bit for Low Transfer Count" "Increment,Fixed"
|
|
line.long 0x08 "DMA_IDR3,DMA Channel 3 Initial Destination Register"
|
|
hexmask.long 0x08 0.--31. 1. " DADDR ,Destination Address Field"
|
|
line.long 0x0c "DMA_IDCR3,DMA Channel 3 Initial Destination Control Register"
|
|
bitfld.long 0x0c 1. " HINC ,Destination Address Increment Bit for High Transfer Count" "Increment,Fixed"
|
|
bitfld.long 0x0c 0. " LINC ,Destination Address Increment Bit for Low Transfer Count" "Increment,Fixed"
|
|
line.long 0x10 "DMA_CR3,DMA Channel 3 Control Register"
|
|
bitfld.long 0x10 30. " TCIT ,Transfer Count Interrupt Enable/Disable Control" "Disabled,Enabled"
|
|
bitfld.long 0x10 29. " LTCIT ,Low Transfer Count Interrupt Enable/Disable Control" "Disabled,Enabled"
|
|
bitfld.long 0x10 28. " TSIZE ,Transfer Size" "Unit,Burst"
|
|
textline " "
|
|
bitfld.long 0x10 27. " SMODE ,Service Mode Selection" "Single Service Mode,Continuous Mode"
|
|
bitfld.long 0x10 26. " RELOAD ,Auto Reload Enable/Disable Control" "Enabled,Disabled"
|
|
bitfld.long 0x10 24.--25. " DSIZE ,Data Size Selection Field" "Byte,Half word,Word,?..."
|
|
textline " "
|
|
hexmask.long.word 0x10 12.--23. 1. " HTC ,High Transfer Count Field"
|
|
hexmask.long.word 0x10 0.--11. 1. " LTC ,Low Transfer Count Field"
|
|
rgroup.long 0x194++0x0B
|
|
line.long 0x00 "DMA_SR3,DMA Channel 3 Status Register"
|
|
bitfld.long 0x00 31. " LTCST ,Low Transfer Counter Status" "Not busy,Busy"
|
|
hexmask.long.word 0x00 12.--23. 1. " CURR_HTC ,Current High Transfer Count Value"
|
|
hexmask.long.word 0x00 0.--11. 1. " CURR_LTC ,Current Low Transfer Count Value"
|
|
line.long 0x04 "DMA_CSR3,DMA Channel 3 Current Source Register"
|
|
hexmask.long 0x04 0.--31. 1. " CURR_SADDR ,Current Source Address Field"
|
|
line.long 0x08 "DMA_CDR3,DMA Channel 3 Current Destination Register"
|
|
hexmask.long 0x08 0.--31. 1. " CURR_DADDR ,Current Destination Address Field"
|
|
group.long 0x1A0++0x07
|
|
line.long 0x00 "DMA_MTR3,DMA Channel 3 Mask Trigger Register"
|
|
bitfld.long 0x00 2. " STOP ,DMA Operation Stop" "No effect,Stop"
|
|
bitfld.long 0x00 1. " CHEN ,DMA channel on/off" "Off,On"
|
|
bitfld.long 0x00 0. " SWTRIG ,DMA Software Request Trigger" "No effect,Request"
|
|
line.long 0x04 "DMA_RSR3,DMA Channel 3 Request Selection Register"
|
|
bitfld.long 0x04 1.--5. " HWSRC ,DMA Hardware Source Selection Field" "USART0_TX,USART0_RX,USART1_TX,USART1_RX,USART2_TX,USART2_RX,USART3_TX,USART3_RX,Reserved,Reserved,SPI0_TX,SPI0_RX,SPI1_TX,SPI1_RX,Reserved,Reserved,Reserved,Reserved,IIC0_TX,IIC0_RX,IIC1_TX,IIC1_RX,ADC00,ADC1,ADC01,?..."
|
|
bitfld.long 0x04 0. " REQ ,Request Type Selection" "S/W request,DMA source"
|
|
tree.end
|
|
tree "DMA Channel 4"
|
|
group.long 0x200++0x13
|
|
line.long 0x00 "DMA_ISR4,DMA Channel 4 Initial Source Register"
|
|
hexmask.long 0x00 0.--31. 1. " SADDR ,DMA Initial Source Address Field"
|
|
line.long 0x04 "DMA_ISCR4,DMA Channel 4 Initial Source Control Register"
|
|
bitfld.long 0x04 1. " HINC ,Source Address Increment Bit for High Transfer Count" "Increment,Fixed"
|
|
bitfld.long 0x04 0. " LINC ,Source Address Increment Bit for Low Transfer Count" "Increment,Fixed"
|
|
line.long 0x08 "DMA_IDR4,DMA Channel 4 Initial Destination Register"
|
|
hexmask.long 0x08 0.--31. 1. " DADDR ,Destination Address Field"
|
|
line.long 0x0c "DMA_IDCR4,DMA Channel 4 Initial Destination Control Register"
|
|
bitfld.long 0x0c 1. " HINC ,Destination Address Increment Bit for High Transfer Count" "Increment,Fixed"
|
|
bitfld.long 0x0c 0. " LINC ,Destination Address Increment Bit for Low Transfer Count" "Increment,Fixed"
|
|
line.long 0x10 "DMA_CR4,DMA Channel 4 Control Register"
|
|
bitfld.long 0x10 30. " TCIT ,Transfer Count Interrupt Enable/Disable Control" "Disabled,Enabled"
|
|
bitfld.long 0x10 29. " LTCIT ,Low Transfer Count Interrupt Enable/Disable Control" "Disabled,Enabled"
|
|
bitfld.long 0x10 28. " TSIZE ,Transfer Size" "Unit,Burst"
|
|
textline " "
|
|
bitfld.long 0x10 27. " SMODE ,Service Mode Selection" "Single Service Mode,Continuous Mode"
|
|
bitfld.long 0x10 26. " RELOAD ,Auto Reload Enable/Disable Control" "Enabled,Disabled"
|
|
bitfld.long 0x10 24.--25. " DSIZE ,Data Size Selection Field" "Byte,Half word,Word,?..."
|
|
textline " "
|
|
hexmask.long.word 0x10 12.--23. 1. " HTC ,High Transfer Count Field"
|
|
hexmask.long.word 0x10 0.--11. 1. " LTC ,Low Transfer Count Field"
|
|
rgroup.long 0x214++0x0B
|
|
line.long 0x00 "DMA_SR4,DMA Channel 4 Status Register"
|
|
bitfld.long 0x00 31. " LTCST ,Low Transfer Counter Status" "Not busy,Busy"
|
|
hexmask.long.word 0x00 12.--23. 1. " CURR_HTC ,Current High Transfer Count Value"
|
|
hexmask.long.word 0x00 0.--11. 1. " CURR_LTC ,Current Low Transfer Count Value"
|
|
line.long 0x04 "DMA_CSR4,DMA Channel 4 Current Source Register"
|
|
hexmask.long 0x04 0.--31. 1. " CURR_SADDR ,Current Source Address Field"
|
|
line.long 0x08 "DMA_CDR4,DMA Channel 4 Current Destination Register"
|
|
hexmask.long 0x08 0.--31. 1. " CURR_DADDR ,Current Destination Address Field"
|
|
group.long 0x220++0x07
|
|
line.long 0x00 "DMA_MTR4,DMA Channel 4 Mask Trigger Register"
|
|
bitfld.long 0x00 2. " STOP ,DMA Operation Stop" "No effect,Stop"
|
|
bitfld.long 0x00 1. " CHEN ,DMA channel on/off" "Off,On"
|
|
bitfld.long 0x00 0. " SWTRIG ,DMA Software Request Trigger" "No effect,Request"
|
|
line.long 0x04 "DMA_RSR4,DMA Channel 4 Request Selection Register"
|
|
bitfld.long 0x04 1.--5. " HWSRC ,DMA Hardware Source Selection Field" "USART0_TX,USART0_RX,USART1_TX,USART1_RX,USART2_TX,USART2_RX,USART3_TX,USART3_RX,Reserved,Reserved,SPI0_TX,SPI0_RX,SPI1_TX,SPI1_RX,Reserved,Reserved,Reserved,Reserved,IIC0_TX,IIC0_RX,IIC1_TX,IIC1_RX,ADC00,ADC1,ADC01,?..."
|
|
bitfld.long 0x04 0. " REQ ,Request Type Selection" "S/W request,DMA source"
|
|
tree.end
|
|
tree "DMA Channel 5"
|
|
group.long 0x280++0x13
|
|
line.long 0x00 "DMA_ISR5,DMA Channel 5 Initial Source Register"
|
|
hexmask.long 0x00 0.--31. 1. " SADDR ,DMA Initial Source Address Field"
|
|
line.long 0x04 "DMA_ISCR5,DMA Channel 5 Initial Source Control Register"
|
|
bitfld.long 0x04 1. " HINC ,Source Address Increment Bit for High Transfer Count" "Increment,Fixed"
|
|
bitfld.long 0x04 0. " LINC ,Source Address Increment Bit for Low Transfer Count" "Increment,Fixed"
|
|
line.long 0x08 "DMA_IDR5,DMA Channel 5 Initial Destination Register"
|
|
hexmask.long 0x08 0.--31. 1. " DADDR ,Destination Address Field"
|
|
line.long 0x0c "DMA_IDCR5,DMA Channel 5 Initial Destination Control Register"
|
|
bitfld.long 0x0c 1. " HINC ,Destination Address Increment Bit for High Transfer Count" "Increment,Fixed"
|
|
bitfld.long 0x0c 0. " LINC ,Destination Address Increment Bit for Low Transfer Count" "Increment,Fixed"
|
|
line.long 0x10 "DMA_CR5,DMA Channel 5 Control Register"
|
|
bitfld.long 0x10 30. " TCIT ,Transfer Count Interrupt Enable/Disable Control" "Disabled,Enabled"
|
|
bitfld.long 0x10 29. " LTCIT ,Low Transfer Count Interrupt Enable/Disable Control" "Disabled,Enabled"
|
|
bitfld.long 0x10 28. " TSIZE ,Transfer Size" "Unit,Burst"
|
|
textline " "
|
|
bitfld.long 0x10 27. " SMODE ,Service Mode Selection" "Single Service Mode,Continuous Mode"
|
|
bitfld.long 0x10 26. " RELOAD ,Auto Reload Enable/Disable Control" "Enabled,Disabled"
|
|
bitfld.long 0x10 24.--25. " DSIZE ,Data Size Selection Field" "Byte,Half word,Word,?..."
|
|
textline " "
|
|
hexmask.long.word 0x10 12.--23. 1. " HTC ,High Transfer Count Field"
|
|
hexmask.long.word 0x10 0.--11. 1. " LTC ,Low Transfer Count Field"
|
|
rgroup.long 0x294++0x0B
|
|
line.long 0x00 "DMA_SR5,DMA Channel 5 Status Register"
|
|
bitfld.long 0x00 31. " LTCST ,Low Transfer Counter Status" "Not busy,Busy"
|
|
hexmask.long.word 0x00 12.--23. 1. " CURR_HTC ,Current High Transfer Count Value"
|
|
hexmask.long.word 0x00 0.--11. 1. " CURR_LTC ,Current Low Transfer Count Value"
|
|
line.long 0x04 "DMA_CSR5,DMA Channel 5 Current Source Register"
|
|
hexmask.long 0x04 0.--31. 1. " CURR_SADDR ,Current Source Address Field"
|
|
line.long 0x08 "DMA_CDR5,DMA Channel 5 Current Destination Register"
|
|
hexmask.long 0x08 0.--31. 1. " CURR_DADDR ,Current Destination Address Field"
|
|
group.long 0x2A0++0x07
|
|
line.long 0x00 "DMA_MTR5,DMA Channel 5 Mask Trigger Register"
|
|
bitfld.long 0x00 2. " STOP ,DMA Operation Stop" "No effect,Stop"
|
|
bitfld.long 0x00 1. " CHEN ,DMA channel on/off" "Off,On"
|
|
bitfld.long 0x00 0. " SWTRIG ,DMA Software Request Trigger" "No effect,Request"
|
|
line.long 0x04 "DMA_RSR5,DMA Channel 5 Request Selection Register"
|
|
bitfld.long 0x04 1.--5. " HWSRC ,DMA Hardware Source Selection Field" "USART0_TX,USART0_RX,USART1_TX,USART1_RX,USART2_TX,USART2_RX,USART3_TX,USART3_RX,Reserved,Reserved,SPI0_TX,SPI0_RX,SPI1_TX,SPI1_RX,Reserved,Reserved,Reserved,Reserved,IIC0_TX,IIC0_RX,IIC1_TX,IIC1_RX,ADC00,ADC1,ADC01,?..."
|
|
bitfld.long 0x04 0. " REQ ,Request Type Selection" "S/W request,DMA source"
|
|
tree.end
|
|
tree "DMA Channel 6"
|
|
group.long 0x300++0x13
|
|
line.long 0x00 "DMA_ISR6,DMA Channel 6 Initial Source Register"
|
|
hexmask.long 0x00 0.--31. 1. " SADDR ,DMA Initial Source Address Field"
|
|
line.long 0x04 "DMA_ISCR6,DMA Channel 6 Initial Source Control Register"
|
|
bitfld.long 0x04 1. " HINC ,Source Address Increment Bit for High Transfer Count" "Increment,Fixed"
|
|
bitfld.long 0x04 0. " LINC ,Source Address Increment Bit for Low Transfer Count" "Increment,Fixed"
|
|
line.long 0x08 "DMA_IDR6,DMA Channel 6 Initial Destination Register"
|
|
hexmask.long 0x08 0.--31. 1. " DADDR ,Destination Address Field"
|
|
line.long 0x0c "DMA_IDCR6,DMA Channel 6 Initial Destination Control Register"
|
|
bitfld.long 0x0c 1. " HINC ,Destination Address Increment Bit for High Transfer Count" "Increment,Fixed"
|
|
bitfld.long 0x0c 0. " LINC ,Destination Address Increment Bit for Low Transfer Count" "Increment,Fixed"
|
|
line.long 0x10 "DMA_CR6,DMA Channel 6 Control Register"
|
|
bitfld.long 0x10 30. " TCIT ,Transfer Count Interrupt Enable/Disable Control" "Disabled,Enabled"
|
|
bitfld.long 0x10 29. " LTCIT ,Low Transfer Count Interrupt Enable/Disable Control" "Disabled,Enabled"
|
|
bitfld.long 0x10 28. " TSIZE ,Transfer Size" "Unit,Burst"
|
|
textline " "
|
|
bitfld.long 0x10 27. " SMODE ,Service Mode Selection" "Single Service Mode,Continuous Mode"
|
|
bitfld.long 0x10 26. " RELOAD ,Auto Reload Enable/Disable Control" "Enabled,Disabled"
|
|
bitfld.long 0x10 24.--25. " DSIZE ,Data Size Selection Field" "Byte,Half word,Word,?..."
|
|
textline " "
|
|
hexmask.long.word 0x10 12.--23. 1. " HTC ,High Transfer Count Field"
|
|
hexmask.long.word 0x10 0.--11. 1. " LTC ,Low Transfer Count Field"
|
|
rgroup.long 0x314++0x0B
|
|
line.long 0x00 "DMA_SR6,DMA Channel 6 Status Register"
|
|
bitfld.long 0x00 31. " LTCST ,Low Transfer Counter Status" "Not busy,Busy"
|
|
hexmask.long.word 0x00 12.--23. 1. " CURR_HTC ,Current High Transfer Count Value"
|
|
hexmask.long.word 0x00 0.--11. 1. " CURR_LTC ,Current Low Transfer Count Value"
|
|
line.long 0x04 "DMA_CSR6,DMA Channel 6 Current Source Register"
|
|
hexmask.long 0x04 0.--31. 1. " CURR_SADDR ,Current Source Address Field"
|
|
line.long 0x08 "DMA_CDR6,DMA Channel 6 Current Destination Register"
|
|
hexmask.long 0x08 0.--31. 1. " CURR_DADDR ,Current Destination Address Field"
|
|
group.long 0x320++0x07
|
|
line.long 0x00 "DMA_MTR6,DMA Channel 6 Mask Trigger Register"
|
|
bitfld.long 0x00 2. " STOP ,DMA Operation Stop" "No effect,Stop"
|
|
bitfld.long 0x00 1. " CHEN ,DMA channel on/off" "Off,On"
|
|
bitfld.long 0x00 0. " SWTRIG ,DMA Software Request Trigger" "No effect,Request"
|
|
line.long 0x04 "DMA_RSR6,DMA Channel 6 Request Selection Register"
|
|
bitfld.long 0x04 1.--5. " HWSRC ,DMA Hardware Source Selection Field" "USART0_TX,USART0_RX,USART1_TX,USART1_RX,USART2_TX,USART2_RX,USART3_TX,USART3_RX,Reserved,Reserved,SPI0_TX,SPI0_RX,SPI1_TX,SPI1_RX,Reserved,Reserved,Reserved,Reserved,IIC0_TX,IIC0_RX,IIC1_TX,IIC1_RX,ADC00,ADC1,ADC01,?..."
|
|
bitfld.long 0x04 0. " REQ ,Request Type Selection" "S/W request,DMA source"
|
|
tree.end
|
|
tree "DMA Channel 7"
|
|
group.long 0x380++0x13
|
|
line.long 0x00 "DMA_ISR7,DMA Channel 7 Initial Source Register"
|
|
hexmask.long 0x00 0.--31. 1. " SADDR ,DMA Initial Source Address Field"
|
|
line.long 0x04 "DMA_ISCR7,DMA Channel 7 Initial Source Control Register"
|
|
bitfld.long 0x04 1. " HINC ,Source Address Increment Bit for High Transfer Count" "Increment,Fixed"
|
|
bitfld.long 0x04 0. " LINC ,Source Address Increment Bit for Low Transfer Count" "Increment,Fixed"
|
|
line.long 0x08 "DMA_IDR7,DMA Channel 7 Initial Destination Register"
|
|
hexmask.long 0x08 0.--31. 1. " DADDR ,Destination Address Field"
|
|
line.long 0x0c "DMA_IDCR7,DMA Channel 7 Initial Destination Control Register"
|
|
bitfld.long 0x0c 1. " HINC ,Destination Address Increment Bit for High Transfer Count" "Increment,Fixed"
|
|
bitfld.long 0x0c 0. " LINC ,Destination Address Increment Bit for Low Transfer Count" "Increment,Fixed"
|
|
line.long 0x10 "DMA_CR7,DMA Channel 7 Control Register"
|
|
bitfld.long 0x10 30. " TCIT ,Transfer Count Interrupt Enable/Disable Control" "Disabled,Enabled"
|
|
bitfld.long 0x10 29. " LTCIT ,Low Transfer Count Interrupt Enable/Disable Control" "Disabled,Enabled"
|
|
bitfld.long 0x10 28. " TSIZE ,Transfer Size" "Unit,Burst"
|
|
textline " "
|
|
bitfld.long 0x10 27. " SMODE ,Service Mode Selection" "Single Service Mode,Continuous Mode"
|
|
bitfld.long 0x10 26. " RELOAD ,Auto Reload Enable/Disable Control" "Enabled,Disabled"
|
|
bitfld.long 0x10 24.--25. " DSIZE ,Data Size Selection Field" "Byte,Half word,Word,?..."
|
|
textline " "
|
|
hexmask.long.word 0x10 12.--23. 1. " HTC ,High Transfer Count Field"
|
|
hexmask.long.word 0x10 0.--11. 1. " LTC ,Low Transfer Count Field"
|
|
rgroup.long 0x394++0x0B
|
|
line.long 0x00 "DMA_SR7,DMA Channel 7 Status Register"
|
|
bitfld.long 0x00 31. " LTCST ,Low Transfer Counter Status" "Not busy,Busy"
|
|
hexmask.long.word 0x00 12.--23. 1. " CURR_HTC ,Current High Transfer Count Value"
|
|
hexmask.long.word 0x00 0.--11. 1. " CURR_LTC ,Current Low Transfer Count Value"
|
|
line.long 0x04 "DMA_CSR7,DMA Channel 7 Current Source Register"
|
|
hexmask.long 0x04 0.--31. 1. " CURR_SADDR ,Current Source Address Field"
|
|
line.long 0x08 "DMA_CDR7,DMA Channel 7 Current Destination Register"
|
|
hexmask.long 0x08 0.--31. 1. " CURR_DADDR ,Current Destination Address Field"
|
|
group.long 0x3A0++0x07
|
|
line.long 0x00 "DMA_MTR7,DMA Channel 7 Mask Trigger Register"
|
|
bitfld.long 0x00 2. " STOP ,DMA Operation Stop" "No effect,Stop"
|
|
bitfld.long 0x00 1. " CHEN ,DMA channel on/off" "Off,On"
|
|
bitfld.long 0x00 0. " SWTRIG ,DMA Software Request Trigger" "No effect,Request"
|
|
line.long 0x04 "DMA_RSR7,DMA Channel 7 Request Selection Register"
|
|
bitfld.long 0x04 1.--5. " HWSRC ,DMA Hardware Source Selection Field" "USART0_TX,USART0_RX,USART1_TX,USART1_RX,USART2_TX,USART2_RX,USART3_TX,USART3_RX,Reserved,Reserved,SPI0_TX,SPI0_RX,SPI1_TX,SPI1_RX,Reserved,Reserved,Reserved,Reserved,IIC0_TX,IIC0_RX,IIC1_TX,IIC1_RX,ADC00,ADC1,ADC01,?..."
|
|
bitfld.long 0x04 0. " REQ ,Request Type Selection" "S/W request,DMA source"
|
|
tree.end
|
|
tree "DMA Channel 8"
|
|
group.long 0x400++0x13
|
|
line.long 0x00 "DMA_ISR8,DMA Channel 8 Initial Source Register"
|
|
hexmask.long 0x00 0.--31. 1. " SADDR ,DMA Initial Source Address Field"
|
|
line.long 0x04 "DMA_ISCR8,DMA Channel 8 Initial Source Control Register"
|
|
bitfld.long 0x04 1. " HINC ,Source Address Increment Bit for High Transfer Count" "Increment,Fixed"
|
|
bitfld.long 0x04 0. " LINC ,Source Address Increment Bit for Low Transfer Count" "Increment,Fixed"
|
|
line.long 0x08 "DMA_IDR8,DMA Channel 8 Initial Destination Register"
|
|
hexmask.long 0x08 0.--31. 1. " DADDR ,Destination Address Field"
|
|
line.long 0x0c "DMA_IDCR8,DMA Channel 8 Initial Destination Control Register"
|
|
bitfld.long 0x0c 1. " HINC ,Destination Address Increment Bit for High Transfer Count" "Increment,Fixed"
|
|
bitfld.long 0x0c 0. " LINC ,Destination Address Increment Bit for Low Transfer Count" "Increment,Fixed"
|
|
line.long 0x10 "DMA_CR8,DMA Channel 8 Control Register"
|
|
bitfld.long 0x10 30. " TCIT ,Transfer Count Interrupt Enable/Disable Control" "Disabled,Enabled"
|
|
bitfld.long 0x10 29. " LTCIT ,Low Transfer Count Interrupt Enable/Disable Control" "Disabled,Enabled"
|
|
bitfld.long 0x10 28. " TSIZE ,Transfer Size" "Unit,Burst"
|
|
textline " "
|
|
bitfld.long 0x10 27. " SMODE ,Service Mode Selection" "Single Service Mode,Continuous Mode"
|
|
bitfld.long 0x10 26. " RELOAD ,Auto Reload Enable/Disable Control" "Enabled,Disabled"
|
|
bitfld.long 0x10 24.--25. " DSIZE ,Data Size Selection Field" "Byte,Half word,Word,?..."
|
|
textline " "
|
|
hexmask.long.word 0x10 12.--23. 1. " HTC ,High Transfer Count Field"
|
|
hexmask.long.word 0x10 0.--11. 1. " LTC ,Low Transfer Count Field"
|
|
rgroup.long 0x414++0x0B
|
|
line.long 0x00 "DMA_SR8,DMA Channel 8 Status Register"
|
|
bitfld.long 0x00 31. " LTCST ,Low Transfer Counter Status" "Not busy,Busy"
|
|
hexmask.long.word 0x00 12.--23. 1. " CURR_HTC ,Current High Transfer Count Value"
|
|
hexmask.long.word 0x00 0.--11. 1. " CURR_LTC ,Current Low Transfer Count Value"
|
|
line.long 0x04 "DMA_CSR8,DMA Channel 8 Current Source Register"
|
|
hexmask.long 0x04 0.--31. 1. " CURR_SADDR ,Current Source Address Field"
|
|
line.long 0x08 "DMA_CDR8,DMA Channel 8 Current Destination Register"
|
|
hexmask.long 0x08 0.--31. 1. " CURR_DADDR ,Current Destination Address Field"
|
|
group.long 0x420++0x07
|
|
line.long 0x00 "DMA_MTR8,DMA Channel 8 Mask Trigger Register"
|
|
bitfld.long 0x00 2. " STOP ,DMA Operation Stop" "No effect,Stop"
|
|
bitfld.long 0x00 1. " CHEN ,DMA channel on/off" "Off,On"
|
|
bitfld.long 0x00 0. " SWTRIG ,DMA Software Request Trigger" "No effect,Request"
|
|
line.long 0x04 "DMA_RSR8,DMA Channel 8 Request Selection Register"
|
|
bitfld.long 0x04 1.--5. " HWSRC ,DMA Hardware Source Selection Field" "USART0_TX,USART0_RX,USART1_TX,USART1_RX,USART2_TX,USART2_RX,USART3_TX,USART3_RX,Reserved,Reserved,SPI0_TX,SPI0_RX,SPI1_TX,SPI1_RX,Reserved,Reserved,Reserved,Reserved,IIC0_TX,IIC0_RX,IIC1_TX,IIC1_RX,ADC00,ADC1,ADC01,?..."
|
|
bitfld.long 0x04 0. " REQ ,Request Type Selection" "S/W request,DMA source"
|
|
tree.end
|
|
tree "DMA Channel 9"
|
|
group.long 0x480++0x13
|
|
line.long 0x00 "DMA_ISR9,DMA Channel 9 Initial Source Register"
|
|
hexmask.long 0x00 0.--31. 1. " SADDR ,DMA Initial Source Address Field"
|
|
line.long 0x04 "DMA_ISCR9,DMA Channel 9 Initial Source Control Register"
|
|
bitfld.long 0x04 1. " HINC ,Source Address Increment Bit for High Transfer Count" "Increment,Fixed"
|
|
bitfld.long 0x04 0. " LINC ,Source Address Increment Bit for Low Transfer Count" "Increment,Fixed"
|
|
line.long 0x08 "DMA_IDR9,DMA Channel 9 Initial Destination Register"
|
|
hexmask.long 0x08 0.--31. 1. " DADDR ,Destination Address Field"
|
|
line.long 0x0c "DMA_IDCR9,DMA Channel 9 Initial Destination Control Register"
|
|
bitfld.long 0x0c 1. " HINC ,Destination Address Increment Bit for High Transfer Count" "Increment,Fixed"
|
|
bitfld.long 0x0c 0. " LINC ,Destination Address Increment Bit for Low Transfer Count" "Increment,Fixed"
|
|
line.long 0x10 "DMA_CR9,DMA Channel 9 Control Register"
|
|
bitfld.long 0x10 30. " TCIT ,Transfer Count Interrupt Enable/Disable Control" "Disabled,Enabled"
|
|
bitfld.long 0x10 29. " LTCIT ,Low Transfer Count Interrupt Enable/Disable Control" "Disabled,Enabled"
|
|
bitfld.long 0x10 28. " TSIZE ,Transfer Size" "Unit,Burst"
|
|
textline " "
|
|
bitfld.long 0x10 27. " SMODE ,Service Mode Selection" "Single Service Mode,Continuous Mode"
|
|
bitfld.long 0x10 26. " RELOAD ,Auto Reload Enable/Disable Control" "Enabled,Disabled"
|
|
bitfld.long 0x10 24.--25. " DSIZE ,Data Size Selection Field" "Byte,Half word,Word,?..."
|
|
textline " "
|
|
hexmask.long.word 0x10 12.--23. 1. " HTC ,High Transfer Count Field"
|
|
hexmask.long.word 0x10 0.--11. 1. " LTC ,Low Transfer Count Field"
|
|
rgroup.long 0x494++0x0B
|
|
line.long 0x00 "DMA_SR9,DMA Channel 9 Status Register"
|
|
bitfld.long 0x00 31. " LTCST ,Low Transfer Counter Status" "Not busy,Busy"
|
|
hexmask.long.word 0x00 12.--23. 1. " CURR_HTC ,Current High Transfer Count Value"
|
|
hexmask.long.word 0x00 0.--11. 1. " CURR_LTC ,Current Low Transfer Count Value"
|
|
line.long 0x04 "DMA_CSR9,DMA Channel 9 Current Source Register"
|
|
hexmask.long 0x04 0.--31. 1. " CURR_SADDR ,Current Source Address Field"
|
|
line.long 0x08 "DMA_CDR9,DMA Channel 9 Current Destination Register"
|
|
hexmask.long 0x08 0.--31. 1. " CURR_DADDR ,Current Destination Address Field"
|
|
group.long 0x4A0++0x07
|
|
line.long 0x00 "DMA_MTR9,DMA Channel 9 Mask Trigger Register"
|
|
bitfld.long 0x00 2. " STOP ,DMA Operation Stop" "No effect,Stop"
|
|
bitfld.long 0x00 1. " CHEN ,DMA channel on/off" "Off,On"
|
|
bitfld.long 0x00 0. " SWTRIG ,DMA Software Request Trigger" "No effect,Request"
|
|
line.long 0x04 "DMA_RSR9,DMA Channel 9 Request Selection Register"
|
|
bitfld.long 0x04 1.--5. " HWSRC ,DMA Hardware Source Selection Field" "USART0_TX,USART0_RX,USART1_TX,USART1_RX,USART2_TX,USART2_RX,USART3_TX,USART3_RX,Reserved,Reserved,SPI0_TX,SPI0_RX,SPI1_TX,SPI1_RX,Reserved,Reserved,Reserved,Reserved,IIC0_TX,IIC0_RX,IIC1_TX,IIC1_RX,ADC00,ADC1,ADC01,?..."
|
|
bitfld.long 0x04 0. " REQ ,Request Type Selection" "S/W request,DMA source"
|
|
tree.end
|
|
rgroup.long 0x500++0x3
|
|
line.long 0x00 "DMA_IDR,DMA ID Register"
|
|
hexmask.long 0x00 0.--25. 1. " IDCODE ,Identification Code Register"
|
|
wgroup.long 0x504++0x3
|
|
line.long 0x00 "DMA_SRR,DMA Software Reset Register"
|
|
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
|
|
rgroup.long 0x508++0x3
|
|
line.long 0x00 "DMA_CESR,DMA Channel Enable Status Register"
|
|
bitfld.long 0x00 9. " CH9EN ,Channel 9 enable status" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " CH8EN ,Channel 8 enable status" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " CH7EN ,Channel 7 enable status" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH6EN ,Channel 6 enable status" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " CH5EN ,Channel 5 enable status" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " CH4EN ,Channel 4 enable status" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CH3EN ,Channel 3 enable status" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " CH2EN ,Channel 2 enable status" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " CH1EN ,Channel 1 enable status" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CH0EN ,Channel 0 enable status" "Disabled,Enabled"
|
|
rgroup.long 0x50c++0x3
|
|
line.long 0x00 "DMA_ISR,DMA Interrupt Status Register"
|
|
bitfld.long 0x00 25. " CH9_TCIT ,Channel 9 transfer count interrupt status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 24. " CH8_TCIT ,Channel 8 transfer count interrupt status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 23. " CH7_TCIT ,Channel 7 transfer count interrupt status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 22. " CH6_TCIT ,Channel 6 transfer count interrupt status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 21. " CH5_TCIT ,Channel 5 transfer count interrupt status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 20. " CH4_TCIT ,Channel 4 transfer count interrupt status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 19. " CH3_TCIT ,Channel 3 transfer count interrupt status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 18. " CH2_TCIT ,Channel 2 transfer count interrupt status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 17. " CH1_TCIT ,Channel 1 transfer count interrupt status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CH0_TCIT ,Channel 0 transfer count interrupt status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 9. " CH9_LTCIT ,Channel 9 low transfer count interrupt status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 8. " CH8_LTCIT ,Channel 8 low transfer count interrupt status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CH7_LTCIT ,Channel 7 low transfer count interrupt status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " CH6_LTCIT ,Channel 6 low transfer count interrupt status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " CH5_LTCIT ,Channel 5 low transfer count interrupt status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CH4_LTCIT ,Channel 4 low transfer count interrupt status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " CH3_LTCIT ,Channel 3 low transfer count interrupt status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " CH2_LTCIT ,Channel 2 low transfer count interrupt status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CH1_LTCIT ,Channel 1 low transfer count interrupt status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " CH0_LTCIT ,Channel 0 low transfer count interrupt status" "Not occurred,Occurred"
|
|
group.long 0x510++0x3
|
|
line.long 0x00 "DMA_ICR,DMA Interrupt Clear Register"
|
|
bitfld.long 0x00 9. " CH9_IT ,Channel 9 Interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 8. " CH8_IT ,Channel 8 Interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 7. " CH7_IT ,Channel 7 Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 6. " CH6_IT ,Channel 6 Interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 5. " CH5_IT ,Channel 5 Interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 4. " CH4_IT ,Channel 4 Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CH3_IT ,Channel 3 Interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 2. " CH2_IT ,Channel 2 Interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 1. " CH1_IT ,Channel 1 Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CH0_IT ,Channel 0 Interrupt clear" "No effect,Clear"
|
|
width 0xb
|
|
tree.end
|
|
tree.open "Encoder Counter"
|
|
tree "ENC0"
|
|
base ad:0x400C0000
|
|
width 11.
|
|
rgroup.long 0x00++0x3
|
|
line.long 0x00 "ENC_IDR,ENC ID Register"
|
|
hexmask.long 0x00 0.--25. 1. " IDCODE ,Identification Code Register"
|
|
sif (cpu()=="S3FN41F")
|
|
group.long 0x04++0x3
|
|
else
|
|
wgroup.long 0x04++0x3
|
|
endif
|
|
line.long 0x00 "ENC_CEDR,ENC Clock Enable/Disable Register"
|
|
bitfld.long 0x00 31. " DBGEN ,Debug Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CLKEN ,Clock Enable" "Disabled,Enabled"
|
|
wgroup.long 0x08++0x3
|
|
line.long 0x00 "ENC_SRR,ENC Software Reset Register"
|
|
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "ENC_CR0,ENC Control Register 0"
|
|
bitfld.long 0x00 8.--10. " ENCCLKSEL ,Encoder Counter Clock (ENCCLK) Selection" "PCLK,PCLK/2,PCLK/4,PCLK/8,PCLK/16,PCLK/32,PCLK/64,PCLK/128"
|
|
bitfld.long 0x00 7. " PZCLEN ,Position counter (ENC_PCR) clear enable by Phase Z" "Enabled,Disabled"
|
|
bitfld.long 0x00 4.--6. " ENCFILTER ,Filter Clock Selection of Encoder counter" "ENCCLK,ENCCLK/2,ENCCLK/4,ENCCLK/8,ENCCLK/16,ENCCLK/32,ENCCLK/64,ENCCLK/128"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ESELZ ,Phase Z Edge Selection" "Falling,Rising"
|
|
bitfld.long 0x00 2. " ENCEN ,Encoder Counter Block Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " SPCRCL ,Speed Counter (SPCR) Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PCRCL ,Position Counter Register (PCR) Clear" "No effect,Clear"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "ENC_CR1,ENC Control Register 1"
|
|
bitfld.long 0x00 12.--15. " PRESCALEA ,Phase A Pre-scale" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. " ESELA ,Phase A Capture Operating Mode Selection" "Falling,Rising,Both,Both"
|
|
bitfld.long 0x00 9. " PAEN ,Phase A Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PACCRCL ,Phase A Counter Register (PACCR) Clear" "No effect,Clear"
|
|
bitfld.long 0x00 4.--7. " PRESCALEB ,Phase B Pre-scale Bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 2.--3. " ESELB ,Phase B Capture Operating Mode Selection" "Falling,Rising,Both,Both"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PBEN ,Phase B Enable" "No effect,Clear"
|
|
bitfld.long 0x00 0. " PBCCRCL ,Phase B Counter Register (PBCCR) Clear" "No effect,Clear"
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "ENC_SR,ENC Status Register"
|
|
bitfld.long 0x00 7. " UFSCNT ,Underflow of SCNT" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " OFSCNT ,Overflow of SCNT" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " UFPCNT ,Underflow of PCNT" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 4. " OFPCNT ,Overflow of PCNT" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " PASTAT ,Phase A Status" "Low,High"
|
|
bitfld.long 0x00 2. " PBSTAT ,Phase B Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GLITCH ,Glitch detection of Phase A, Phase B and Phase Z" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " DIRECTION ,Direction of Motor Rotation" "Clockwise,Counter-clockwise"
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "ENC_IMSCR,ENC Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x00 7. " PHASEZ ,Phase Z Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 5. " SCMAT ,Speed Counter Match Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 4. " PCMAT ,Position Counter Match Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PBCAP ,Phase B Capture Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " PBOVF ,Phase B Counter Overflow Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 1. " PACAP ,Phase A Capture Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PAOVF ,Phase A Counter Overflow Interrupt Mask" "Masked,Not masked"
|
|
rgroup.long 0x1c++0x3
|
|
line.long 0x00 "ENC_RISR,ENC Raw Interrupt Status Register"
|
|
bitfld.long 0x00 7. " PHASEZ ,Phase Z Raw Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " SCMAT ,Speed Counter Match Raw Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. " PCMAT ,Position Counter Match Raw Interrupt State" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PBCAP ,Phase B Capture Raw Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " PBOVF ,Phase B Counter Overflow Raw Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " PACAP ,Phase A Capture Raw Interrupt State" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PAOVF ,Phase A Counter Overflow Raw Interrupt State" "Not occurred,Occurred"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x00 "ENC_MISR,ENC Masked Interrupt Status Register"
|
|
bitfld.long 0x00 7. " PHASEZ ,Phase Z Masked Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " SCMAT ,Speed Counter Match Masked Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. " PCMAT ,Position Counter Match Masked Interrupt State" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PBCAP ,Phase B Capture Masked Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " PBOVF ,Phase B Counter Overflow Masked Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " PACAP ,Phase A Capture Masked Interrupt State" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PAOVF ,Phase A Counter Overflow Masked Interrupt State" "Not occurred,Occurred"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x00 "ENC_ICR,ENC Interrupt Clear Register"
|
|
bitfld.long 0x00 7. " PHASEZ ,Phase Z Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 5. " SCMAT ,Speed Counter Match Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 4. " PCMAT ,Position Counter Match Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PBCAP ,Phase B Capture Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 2. " PBOVF ,Phase B Counter Overflow Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 1. " PACAP ,Phase A Capture Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PAOVF ,Phase A Counter Overflow Interrupt Clear" "No effect,Clear"
|
|
group.long 0x28++0x3
|
|
line.long 0x00 "ENC_PCR,ENC Position Counter Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PCV ,Position Counter Value"
|
|
group.long 0x2c++0x3
|
|
line.long 0x00 "ENC_PRR,ENC Position Reference Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PREFDAT ,Position Counter Reference Data Value"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "ENC_SCR,ENC Speed Counter Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " SCV ,Speed Counter Value"
|
|
group.long 0x34++0x3
|
|
line.long 0x00 "ENC_SRR,ENC Speed Reference Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " SREFDAT ,Speed Counter Reference Data Value"
|
|
group.long 0x38++0x3
|
|
line.long 0x00 "ENC_PACCR,ENC Phase A Capture Counter Register"
|
|
sif (cpu()=="S3FN41F")
|
|
hexmask.long.word 0x00 0.--15. 1. " PACCV ,Phase A Capture Counter Value"
|
|
else
|
|
hexmask.long.word 0x00 0.--15. 1. " PACV ,Phase A Capture Counter Value"
|
|
endif
|
|
group.long 0x3c++0x3
|
|
line.long 0x00 "ENC_PACDR,ENC Phase A Capture Data Register"
|
|
sif (cpu()=="S3FN41F")
|
|
hexmask.long.word 0x00 0.--15. 1. " PACDAT ,Phase A Capture Data Value"
|
|
else
|
|
hexmask.long.word 0x00 0.--15. 1. " PACV ,Phase A Capture Data Value"
|
|
endif
|
|
group.long 0x40++0x3
|
|
line.long 0x00 "ENC_PBCCR,ENC Phase B Capture Counter Register"
|
|
sif (cpu()=="S3FN41F")
|
|
hexmask.long.word 0x00 0.--15. 1. " PBCCV ,Phase B Counter Value"
|
|
else
|
|
hexmask.long.word 0x00 0.--15. 1. " PBCV ,Phase B Counter Value"
|
|
endif
|
|
group.long 0x44++0x3
|
|
line.long 0x00 "ENC_PBCDR,ENC Phase B Capture Data Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PBCDAT ,Phase B Capture Data Value"
|
|
width 0xb
|
|
tree.end
|
|
tree "ENC1"
|
|
base ad:0x400C1000
|
|
width 11.
|
|
rgroup.long 0x00++0x3
|
|
line.long 0x00 "ENC_IDR,ENC ID Register"
|
|
hexmask.long 0x00 0.--25. 1. " IDCODE ,Identification Code Register"
|
|
sif (cpu()=="S3FN41F")
|
|
group.long 0x04++0x3
|
|
else
|
|
wgroup.long 0x04++0x3
|
|
endif
|
|
line.long 0x00 "ENC_CEDR,ENC Clock Enable/Disable Register"
|
|
bitfld.long 0x00 31. " DBGEN ,Debug Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CLKEN ,Clock Enable" "Disabled,Enabled"
|
|
wgroup.long 0x08++0x3
|
|
line.long 0x00 "ENC_SRR,ENC Software Reset Register"
|
|
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "ENC_CR0,ENC Control Register 0"
|
|
bitfld.long 0x00 8.--10. " ENCCLKSEL ,Encoder Counter Clock (ENCCLK) Selection" "PCLK,PCLK/2,PCLK/4,PCLK/8,PCLK/16,PCLK/32,PCLK/64,PCLK/128"
|
|
bitfld.long 0x00 7. " PZCLEN ,Position counter (ENC_PCR) clear enable by Phase Z" "Enabled,Disabled"
|
|
bitfld.long 0x00 4.--6. " ENCFILTER ,Filter Clock Selection of Encoder counter" "ENCCLK,ENCCLK/2,ENCCLK/4,ENCCLK/8,ENCCLK/16,ENCCLK/32,ENCCLK/64,ENCCLK/128"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ESELZ ,Phase Z Edge Selection" "Falling,Rising"
|
|
bitfld.long 0x00 2. " ENCEN ,Encoder Counter Block Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " SPCRCL ,Speed Counter (SPCR) Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PCRCL ,Position Counter Register (PCR) Clear" "No effect,Clear"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "ENC_CR1,ENC Control Register 1"
|
|
bitfld.long 0x00 12.--15. " PRESCALEA ,Phase A Pre-scale" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. " ESELA ,Phase A Capture Operating Mode Selection" "Falling,Rising,Both,Both"
|
|
bitfld.long 0x00 9. " PAEN ,Phase A Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PACCRCL ,Phase A Counter Register (PACCR) Clear" "No effect,Clear"
|
|
bitfld.long 0x00 4.--7. " PRESCALEB ,Phase B Pre-scale Bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 2.--3. " ESELB ,Phase B Capture Operating Mode Selection" "Falling,Rising,Both,Both"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PBEN ,Phase B Enable" "No effect,Clear"
|
|
bitfld.long 0x00 0. " PBCCRCL ,Phase B Counter Register (PBCCR) Clear" "No effect,Clear"
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "ENC_SR,ENC Status Register"
|
|
bitfld.long 0x00 7. " UFSCNT ,Underflow of SCNT" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " OFSCNT ,Overflow of SCNT" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " UFPCNT ,Underflow of PCNT" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 4. " OFPCNT ,Overflow of PCNT" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " PASTAT ,Phase A Status" "Low,High"
|
|
bitfld.long 0x00 2. " PBSTAT ,Phase B Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GLITCH ,Glitch detection of Phase A, Phase B and Phase Z" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " DIRECTION ,Direction of Motor Rotation" "Clockwise,Counter-clockwise"
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "ENC_IMSCR,ENC Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x00 7. " PHASEZ ,Phase Z Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 5. " SCMAT ,Speed Counter Match Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 4. " PCMAT ,Position Counter Match Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PBCAP ,Phase B Capture Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " PBOVF ,Phase B Counter Overflow Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 1. " PACAP ,Phase A Capture Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PAOVF ,Phase A Counter Overflow Interrupt Mask" "Masked,Not masked"
|
|
rgroup.long 0x1c++0x3
|
|
line.long 0x00 "ENC_RISR,ENC Raw Interrupt Status Register"
|
|
bitfld.long 0x00 7. " PHASEZ ,Phase Z Raw Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " SCMAT ,Speed Counter Match Raw Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. " PCMAT ,Position Counter Match Raw Interrupt State" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PBCAP ,Phase B Capture Raw Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " PBOVF ,Phase B Counter Overflow Raw Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " PACAP ,Phase A Capture Raw Interrupt State" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PAOVF ,Phase A Counter Overflow Raw Interrupt State" "Not occurred,Occurred"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x00 "ENC_MISR,ENC Masked Interrupt Status Register"
|
|
bitfld.long 0x00 7. " PHASEZ ,Phase Z Masked Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " SCMAT ,Speed Counter Match Masked Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. " PCMAT ,Position Counter Match Masked Interrupt State" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PBCAP ,Phase B Capture Masked Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " PBOVF ,Phase B Counter Overflow Masked Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " PACAP ,Phase A Capture Masked Interrupt State" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PAOVF ,Phase A Counter Overflow Masked Interrupt State" "Not occurred,Occurred"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x00 "ENC_ICR,ENC Interrupt Clear Register"
|
|
bitfld.long 0x00 7. " PHASEZ ,Phase Z Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 5. " SCMAT ,Speed Counter Match Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 4. " PCMAT ,Position Counter Match Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PBCAP ,Phase B Capture Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 2. " PBOVF ,Phase B Counter Overflow Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 1. " PACAP ,Phase A Capture Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PAOVF ,Phase A Counter Overflow Interrupt Clear" "No effect,Clear"
|
|
group.long 0x28++0x3
|
|
line.long 0x00 "ENC_PCR,ENC Position Counter Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PCV ,Position Counter Value"
|
|
group.long 0x2c++0x3
|
|
line.long 0x00 "ENC_PRR,ENC Position Reference Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PREFDAT ,Position Counter Reference Data Value"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "ENC_SCR,ENC Speed Counter Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " SCV ,Speed Counter Value"
|
|
group.long 0x34++0x3
|
|
line.long 0x00 "ENC_SRR,ENC Speed Reference Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " SREFDAT ,Speed Counter Reference Data Value"
|
|
group.long 0x38++0x3
|
|
line.long 0x00 "ENC_PACCR,ENC Phase A Capture Counter Register"
|
|
sif (cpu()=="S3FN41F")
|
|
hexmask.long.word 0x00 0.--15. 1. " PACCV ,Phase A Capture Counter Value"
|
|
else
|
|
hexmask.long.word 0x00 0.--15. 1. " PACV ,Phase A Capture Counter Value"
|
|
endif
|
|
group.long 0x3c++0x3
|
|
line.long 0x00 "ENC_PACDR,ENC Phase A Capture Data Register"
|
|
sif (cpu()=="S3FN41F")
|
|
hexmask.long.word 0x00 0.--15. 1. " PACDAT ,Phase A Capture Data Value"
|
|
else
|
|
hexmask.long.word 0x00 0.--15. 1. " PACV ,Phase A Capture Data Value"
|
|
endif
|
|
group.long 0x40++0x3
|
|
line.long 0x00 "ENC_PBCCR,ENC Phase B Capture Counter Register"
|
|
sif (cpu()=="S3FN41F")
|
|
hexmask.long.word 0x00 0.--15. 1. " PBCCV ,Phase B Counter Value"
|
|
else
|
|
hexmask.long.word 0x00 0.--15. 1. " PBCV ,Phase B Counter Value"
|
|
endif
|
|
group.long 0x44++0x3
|
|
line.long 0x00 "ENC_PBCDR,ENC Phase B Capture Data Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PBCDAT ,Phase B Capture Data Value"
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree "Free Running Timer"
|
|
base ad:0x40031000
|
|
width 11.
|
|
rgroup.long 0x00++0x3
|
|
line.long 0x00 "FRT_IDR,Free Running Timer ID Register"
|
|
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "FRT_CEDR,Free Running Timer Clock Enable/Disable Register"
|
|
bitfld.long 0x00 31. " DBGEN ,Debug Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CLKEN ,Counter Clock Enable" "Disabled,Enabled"
|
|
wgroup.long 0x08++0x3
|
|
line.long 0x00 "FRT_SRR,Free Running Timer Software Reset Register"
|
|
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "FRT_CR,Free Running Timer Control Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " CDIV ,Clock Divider Field"
|
|
bitfld.long 0x00 8.--12. " FRTSIZE ,Free Running Timer Bit Size Selection Field" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8-bit,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16-bit,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,32-bit"
|
|
bitfld.long 0x00 0. " START ,START/STOP Control" "Stop,Start"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x00 "FRT_SR,Free Running Timer Status Register"
|
|
bitfld.long 0x00 0. " SWRST ,Software Release Status" "No reset,Reset"
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "FRT_IMSCR,Free Running Timer Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x00 2. " MATCH ,Match Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 0. " OVF ,Overflow Interrupt Mask" "Masked,Not masked"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x00 "FRT_RISR,Free Running Timer Raw Interrupt Status Register"
|
|
bitfld.long 0x00 2. " MATCH ,Match Raw Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " OVF ,Overflow Raw Interrupt State" "Not occurred,Occurred"
|
|
rgroup.long 0x1c++0x3
|
|
line.long 0x00 "FRT_MISR,Free RunningTimer Masked Interrupt Status Register"
|
|
bitfld.long 0x00 2. " MATCH ,Match Masked Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " OVF ,Overflow Masked Interrupt State" "Not occurred,Occurred"
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x00 "FRT_ICR,Free Running Timer Interrupt Clear Register"
|
|
bitfld.long 0x00 2. " MATCH ,Match Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " OVF ,Overflow Interrupt Clear" "No effect,Clear"
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "FRT_DR,Free Running Timer Data Register"
|
|
hexmask.long 0x00 0.--31. 1. " DATA ,DATA for Match"
|
|
rgroup.long 0x28++0x3
|
|
line.long 0x00 "FRT_DBR,Free Running Timer Data Buffer Register"
|
|
hexmask.long 0x00 0.--31. 1. " DATA ,DATA for Match"
|
|
rgroup.long 0x2c++0x3
|
|
line.long 0x00 "FRT_CVR,Free Running Timer Counter Value Register"
|
|
hexmask.long 0x00 0.--31. 1. " COUNT ,COUNT Value"
|
|
width 0xb
|
|
tree.end
|
|
tree.open "General Purpose IO (GPIO)"
|
|
tree "Port 0"
|
|
base ad:0x40050000
|
|
width 11.
|
|
rgroup.long 0x00++0x3
|
|
line.long 0x00 "GPIO_IDR,GPIO ID Code Register"
|
|
hexmask.long 0x00 0.--25. 1. " IDCODE ,Identification Code Register"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "GPIO_CEDR,GPIO Clock Enable Disable Register"
|
|
bitfld.long 0x00 0. " CLKEN ,Clock Enable/Disable" "Disabled,Enabled"
|
|
wgroup.long 0x08++0x3
|
|
line.long 0x00 "GPIO_SRR,GPIO Software Reset Register"
|
|
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "GPIO_IMSCR,GPIO Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x00 31. " P31 ,Port 31 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 30. " P30 ,Port 30 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " P29 ,Port 29 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 28. " P28 ,Port 28 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,Port 27 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 26. " P26 ,Port 26 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P25 ,Port 25 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 24. " P24 ,Port 24 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,Port 23 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 22. " P22 ,Port 22 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " P21 ,Port 21 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 20. " P20 ,Port 20 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,Port 19 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 18. " P18 ,Port 18 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P17 ,Port 17 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 16. " P16 ,Port 16 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,Port 15 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 14. " P14 ,Port 14 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P13 ,Port 13 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 12. " P12 ,Port 12 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,Port 11 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 10. " P10 ,Port 10 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " P9 ,Port 9 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 8. " P8 ,Port 8 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,Port 7 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 6. " P6 ,Port 6 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " P5 ,Port 5 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 4. " P4 ,Port 4 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,Port 3 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " P2 ,Port 2 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P1 ,Port 1 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 0. " P0 ,Port 0 Interrupt Mask" "Masked,Not masked"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x00 "GPIO_RISR,GPIO Raw Interrupt Status Register"
|
|
bitfld.long 0x00 31. " P31 ,Port 31 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 30. " P30 ,Port 30 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 29. " P29 ,Port 29 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 28. " P28 ,Port 28 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,Port 27 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 26. " P26 ,Port 26 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P25 ,Port 25 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 24. " P24 ,Port 24 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,Port 23 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 22. " P22 ,Port 22 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 21. " P21 ,Port 21 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 20. " P20 ,Port 20 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,Port 19 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 18. " P18 ,Port 18 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P17 ,Port 17 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 16. " P16 ,Port 16 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,Port 15 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 14. " P14 ,Port 14 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P13 ,Port 13 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 12. " P12 ,Port 12 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,Port 11 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 10. " P10 ,Port 10 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 9. " P9 ,Port 9 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 8. " P8 ,Port 8 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,Port 7 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " P6 ,Port 6 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 5. " P5 ,Port 5 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. " P4 ,Port 4 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,Port 3 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " P2 ,Port 2 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P1 ,Port 1 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " P0 ,Port 0 Raw Interrupt Status" "Not occurred,Occurred"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x00 "GPIO_MISR,GPIO Masked Interrupt Status Register"
|
|
bitfld.long 0x00 31. " P31 ,Port 31 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 30. " P30 ,Port 30 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 29. " P29 ,Port 29 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 28. " P28 ,Port 28 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,Port 27 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 26. " P26 ,Port 26 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P25 ,Port 25 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 24. " P24 ,Port 24 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,Port 23 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 22. " P22 ,Port 22 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 21. " P21 ,Port 21 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 20. " P20 ,Port 20 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,Port 19 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 18. " P18 ,Port 18 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P17 ,Port 17 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 16. " P16 ,Port 16 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,Port 15 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 14. " P14 ,Port 14 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P13 ,Port 13 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 12. " P12 ,Port 12 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,Port 11 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 10. " P10 ,Port 10 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 9. " P9 ,Port 9 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 8. " P8 ,Port 8 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,Port 7 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " P6 ,Port 6 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 5. " P5 ,Port 5 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. " P4 ,Port 4 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,Port 3 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " P2 ,Port 2 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P1 ,Port 1 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " P0 ,Port 0 Masked Interrupt Status" "Not occurred,Occurred"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x00 "GPIO_ICR,GPIO Interrupt Clear Register"
|
|
bitfld.long 0x00 31. " P31 ,Port 31 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 30. " P30 ,Port 30 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 29. " P29 ,Port 29 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 28. " P28 ,Port 28 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,Port 27 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 26. " P26 ,Port 26 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P25 ,Port 25 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 24. " P24 ,Port 24 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,Port 23 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 22. " P22 ,Port 22 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 21. " P21 ,Port 21 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 20. " P20 ,Port 20 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,Port 19 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 18. " P18 ,Port 18 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P17 ,Port 17 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 16. " P16 ,Port 16 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,Port 15 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 14. " P14 ,Port 14 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P13 ,Port 13 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 12. " P12 ,Port 12 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,Port 11 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 10. " P10 ,Port 10 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 9. " P9 ,Port 9 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 8. " P8 ,Port 8 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,Port 7 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 6. " P6 ,Port 6 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 5. " P5 ,Port 5 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 4. " P4 ,Port 4 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,Port 3 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 2. " P2 ,Port 2 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P1 ,Port 1 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " P0 ,Port 0 Interrupt Clear" "No effect,Clear"
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "GPIO_OSR,GPIO Output Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_set/clr ,Port 31 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_set/clr ,Port 30 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_set/clr ,Port 29 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_set/clr ,Port 28 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_set/clr ,Port 27 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_set/clr ,Port 26 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_set/clr ,Port 25 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_set/clr ,Port 24 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_set/clr ,Port 23 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_set/clr ,Port 22 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_set/clr ,Port 21 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,Port 20 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,Port 19 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,Port 18 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,Port 17 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,Port 16 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,Port 15 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,Port 14 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,Port 13 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,Port 12 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,Port 11 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,Port 10 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,Port 9 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,Port 8 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,Port 7 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,Port 6 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,Port 5 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,Port 4 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,Port 3 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,Port 2 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,Port 1 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,Port 0 Data Direction(Input or Output) Status" "Input,Output"
|
|
wgroup.long 0x28++0x3
|
|
line.long 0x00 "GPIO_WODR,GPIO Write Output Data Register"
|
|
bitfld.long 0x00 31. " P31 ,Port 31 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 30. " P30 ,Port 30 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 29. " P29 ,Port 29 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 28. " P28 ,Port 28 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,Port 27 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 26. " P26 ,Port 26 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P25 ,Port 25 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 24. " P24 ,Port 24 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,Port 23 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 22. " P22 ,Port 22 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 21. " P21 ,Port 21 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 20. " P20 ,Port 20 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,Port 19 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 18. " P18 ,Port 18 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P17 ,Port 17 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 16. " P16 ,Port 16 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,Port 15 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 14. " P14 ,Port 14 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P13 ,Port 13 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 12. " P12 ,Port 12 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,Port 11 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 10. " P10 ,Port 10 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 9. " P9 ,Port 9 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 8. " P8 ,Port 8 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,Port 7 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 6. " P6 ,Port 6 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " P5 ,Port 5 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 4. " P4 ,Port 4 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,Port 3 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 2. " P2 ,Port 2 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P1 ,Port 1 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 0. " P0 ,Port 0 Output Data Control" "Low,High"
|
|
group.long 0x34++0x3
|
|
line.long 0x00 "GPIO_ODSR,GPIO Output Data Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_set/clr ,Port 31 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_set/clr ,Port 30 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_set/clr ,Port 29 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_set/clr ,Port 28 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_set/clr ,Port 27 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_set/clr ,Port 26 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_set/clr ,Port 25 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_set/clr ,Port 24 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_set/clr ,Port 23 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_set/clr ,Port 22 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_set/clr ,Port 21 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,Port 20 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,Port 19 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,Port 18 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,Port 17 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,Port 16 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,Port 15 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,Port 14 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,Port 13 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,Port 12 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,Port 11 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,Port 10 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,Port 9 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,Port 8 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,Port 7 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,Port 6 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,Port 5 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,Port 4 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,Port 3 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,Port 2 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,Port 1 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,Port 0 Output Data Status" "Low,High"
|
|
rgroup.long 0x38++0x3
|
|
line.long 0x00 "GPIO_PDSR,GPIO Pin Data Status Register"
|
|
bitfld.long 0x00 31. " P31 ,Port 31 Pin Status" "Low,High"
|
|
bitfld.long 0x00 30. " P30 ,Port 30 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 29. " P29 ,Port 29 Pin Status" "Low,High"
|
|
bitfld.long 0x00 28. " P28 ,Port 28 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,Port 27 Pin Status" "Low,High"
|
|
bitfld.long 0x00 26. " P26 ,Port 26 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P25 ,Port 25 Pin Status" "Low,High"
|
|
bitfld.long 0x00 24. " P24 ,Port 24 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,Port 23 Pin Status" "Low,High"
|
|
bitfld.long 0x00 22. " P22 ,Port 22 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 21. " P21 ,Port 21 Pin Status" "Low,High"
|
|
bitfld.long 0x00 20. " P20 ,Port 20 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,Port 19 Pin Status" "Low,High"
|
|
bitfld.long 0x00 18. " P18 ,Port 18 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P17 ,Port 17 Pin Status" "Low,High"
|
|
bitfld.long 0x00 16. " P16 ,Port 16 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,Port 15 Pin Status" "Low,High"
|
|
bitfld.long 0x00 14. " P14 ,Port 14 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P13 ,Port 13 Pin Status" "Low,High"
|
|
bitfld.long 0x00 12. " P12 ,Port 12 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,Port 11 Pin Status" "Low,High"
|
|
bitfld.long 0x00 10. " P10 ,Port 10 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 9. " P9 ,Port 9 Pin Status" "Low,High"
|
|
bitfld.long 0x00 8. " P8 ,Port 8 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,Port 7 Pin Status" "Low,High"
|
|
bitfld.long 0x00 6. " P6 ,Port 6 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " P5 ,Port 5 Pin Status" "Low,High"
|
|
bitfld.long 0x00 4. " P4 ,Port 4 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,Port 3 Pin Status" "Low,High"
|
|
bitfld.long 0x00 2. " P2 ,Port 2 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P1 ,Port 1 Pin Status" "Low,High"
|
|
bitfld.long 0x00 0. " P0 ,Port 0 Pin Status" "Low,High"
|
|
width 0xb
|
|
tree.end
|
|
tree "Port 1"
|
|
base ad:0x40051000
|
|
width 11.
|
|
rgroup.long 0x00++0x3
|
|
line.long 0x00 "GPIO_IDR,GPIO ID Code Register"
|
|
hexmask.long 0x00 0.--25. 1. " IDCODE ,Identification Code Register"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "GPIO_CEDR,GPIO Clock Enable Disable Register"
|
|
bitfld.long 0x00 0. " CLKEN ,Clock Enable/Disable" "Disabled,Enabled"
|
|
wgroup.long 0x08++0x3
|
|
line.long 0x00 "GPIO_SRR,GPIO Software Reset Register"
|
|
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "GPIO_IMSCR,GPIO Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x00 31. " P31 ,Port 31 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 30. " P30 ,Port 30 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " P29 ,Port 29 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 28. " P28 ,Port 28 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,Port 27 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 26. " P26 ,Port 26 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P25 ,Port 25 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 24. " P24 ,Port 24 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,Port 23 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 22. " P22 ,Port 22 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " P21 ,Port 21 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 20. " P20 ,Port 20 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,Port 19 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 18. " P18 ,Port 18 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P17 ,Port 17 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 16. " P16 ,Port 16 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,Port 15 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 14. " P14 ,Port 14 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P13 ,Port 13 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 12. " P12 ,Port 12 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,Port 11 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 10. " P10 ,Port 10 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " P9 ,Port 9 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 8. " P8 ,Port 8 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,Port 7 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 6. " P6 ,Port 6 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " P5 ,Port 5 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 4. " P4 ,Port 4 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,Port 3 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " P2 ,Port 2 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P1 ,Port 1 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 0. " P0 ,Port 0 Interrupt Mask" "Masked,Not masked"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x00 "GPIO_RISR,GPIO Raw Interrupt Status Register"
|
|
bitfld.long 0x00 31. " P31 ,Port 31 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 30. " P30 ,Port 30 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 29. " P29 ,Port 29 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 28. " P28 ,Port 28 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,Port 27 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 26. " P26 ,Port 26 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P25 ,Port 25 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 24. " P24 ,Port 24 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,Port 23 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 22. " P22 ,Port 22 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 21. " P21 ,Port 21 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 20. " P20 ,Port 20 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,Port 19 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 18. " P18 ,Port 18 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P17 ,Port 17 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 16. " P16 ,Port 16 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,Port 15 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 14. " P14 ,Port 14 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P13 ,Port 13 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 12. " P12 ,Port 12 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,Port 11 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 10. " P10 ,Port 10 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 9. " P9 ,Port 9 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 8. " P8 ,Port 8 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,Port 7 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " P6 ,Port 6 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 5. " P5 ,Port 5 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. " P4 ,Port 4 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,Port 3 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " P2 ,Port 2 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P1 ,Port 1 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " P0 ,Port 0 Raw Interrupt Status" "Not occurred,Occurred"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x00 "GPIO_MISR,GPIO Masked Interrupt Status Register"
|
|
bitfld.long 0x00 31. " P31 ,Port 31 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 30. " P30 ,Port 30 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 29. " P29 ,Port 29 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 28. " P28 ,Port 28 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,Port 27 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 26. " P26 ,Port 26 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P25 ,Port 25 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 24. " P24 ,Port 24 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,Port 23 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 22. " P22 ,Port 22 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 21. " P21 ,Port 21 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 20. " P20 ,Port 20 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,Port 19 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 18. " P18 ,Port 18 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P17 ,Port 17 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 16. " P16 ,Port 16 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,Port 15 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 14. " P14 ,Port 14 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P13 ,Port 13 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 12. " P12 ,Port 12 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,Port 11 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 10. " P10 ,Port 10 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 9. " P9 ,Port 9 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 8. " P8 ,Port 8 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,Port 7 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " P6 ,Port 6 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 5. " P5 ,Port 5 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. " P4 ,Port 4 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,Port 3 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " P2 ,Port 2 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P1 ,Port 1 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " P0 ,Port 0 Masked Interrupt Status" "Not occurred,Occurred"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x00 "GPIO_ICR,GPIO Interrupt Clear Register"
|
|
bitfld.long 0x00 31. " P31 ,Port 31 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 30. " P30 ,Port 30 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 29. " P29 ,Port 29 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 28. " P28 ,Port 28 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,Port 27 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 26. " P26 ,Port 26 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P25 ,Port 25 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 24. " P24 ,Port 24 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,Port 23 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 22. " P22 ,Port 22 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 21. " P21 ,Port 21 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 20. " P20 ,Port 20 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,Port 19 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 18. " P18 ,Port 18 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P17 ,Port 17 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 16. " P16 ,Port 16 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,Port 15 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 14. " P14 ,Port 14 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P13 ,Port 13 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 12. " P12 ,Port 12 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,Port 11 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 10. " P10 ,Port 10 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 9. " P9 ,Port 9 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 8. " P8 ,Port 8 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,Port 7 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 6. " P6 ,Port 6 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 5. " P5 ,Port 5 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 4. " P4 ,Port 4 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,Port 3 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 2. " P2 ,Port 2 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P1 ,Port 1 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " P0 ,Port 0 Interrupt Clear" "No effect,Clear"
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "GPIO_OSR,GPIO Output Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_set/clr ,Port 31 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_set/clr ,Port 30 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_set/clr ,Port 29 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_set/clr ,Port 28 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_set/clr ,Port 27 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_set/clr ,Port 26 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_set/clr ,Port 25 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_set/clr ,Port 24 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_set/clr ,Port 23 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_set/clr ,Port 22 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_set/clr ,Port 21 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,Port 20 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,Port 19 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,Port 18 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,Port 17 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,Port 16 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,Port 15 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,Port 14 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,Port 13 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,Port 12 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,Port 11 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,Port 10 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,Port 9 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,Port 8 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,Port 7 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,Port 6 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,Port 5 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,Port 4 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,Port 3 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,Port 2 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,Port 1 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,Port 0 Data Direction(Input or Output) Status" "Input,Output"
|
|
wgroup.long 0x28++0x3
|
|
line.long 0x00 "GPIO_WODR,GPIO Write Output Data Register"
|
|
bitfld.long 0x00 31. " P31 ,Port 31 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 30. " P30 ,Port 30 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 29. " P29 ,Port 29 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 28. " P28 ,Port 28 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,Port 27 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 26. " P26 ,Port 26 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P25 ,Port 25 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 24. " P24 ,Port 24 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,Port 23 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 22. " P22 ,Port 22 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 21. " P21 ,Port 21 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 20. " P20 ,Port 20 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,Port 19 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 18. " P18 ,Port 18 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P17 ,Port 17 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 16. " P16 ,Port 16 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,Port 15 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 14. " P14 ,Port 14 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P13 ,Port 13 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 12. " P12 ,Port 12 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,Port 11 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 10. " P10 ,Port 10 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 9. " P9 ,Port 9 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 8. " P8 ,Port 8 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,Port 7 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 6. " P6 ,Port 6 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " P5 ,Port 5 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 4. " P4 ,Port 4 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,Port 3 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 2. " P2 ,Port 2 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P1 ,Port 1 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 0. " P0 ,Port 0 Output Data Control" "Low,High"
|
|
group.long 0x34++0x3
|
|
line.long 0x00 "GPIO_ODSR,GPIO Output Data Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_set/clr ,Port 31 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_set/clr ,Port 30 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_set/clr ,Port 29 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_set/clr ,Port 28 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_set/clr ,Port 27 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_set/clr ,Port 26 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_set/clr ,Port 25 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_set/clr ,Port 24 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_set/clr ,Port 23 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_set/clr ,Port 22 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_set/clr ,Port 21 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,Port 20 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,Port 19 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,Port 18 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,Port 17 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,Port 16 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,Port 15 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,Port 14 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,Port 13 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,Port 12 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,Port 11 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,Port 10 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,Port 9 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,Port 8 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,Port 7 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,Port 6 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,Port 5 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,Port 4 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,Port 3 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,Port 2 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,Port 1 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,Port 0 Output Data Status" "Low,High"
|
|
rgroup.long 0x38++0x3
|
|
line.long 0x00 "GPIO_PDSR,GPIO Pin Data Status Register"
|
|
bitfld.long 0x00 31. " P31 ,Port 31 Pin Status" "Low,High"
|
|
bitfld.long 0x00 30. " P30 ,Port 30 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 29. " P29 ,Port 29 Pin Status" "Low,High"
|
|
bitfld.long 0x00 28. " P28 ,Port 28 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,Port 27 Pin Status" "Low,High"
|
|
bitfld.long 0x00 26. " P26 ,Port 26 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P25 ,Port 25 Pin Status" "Low,High"
|
|
bitfld.long 0x00 24. " P24 ,Port 24 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,Port 23 Pin Status" "Low,High"
|
|
bitfld.long 0x00 22. " P22 ,Port 22 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 21. " P21 ,Port 21 Pin Status" "Low,High"
|
|
bitfld.long 0x00 20. " P20 ,Port 20 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,Port 19 Pin Status" "Low,High"
|
|
bitfld.long 0x00 18. " P18 ,Port 18 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P17 ,Port 17 Pin Status" "Low,High"
|
|
bitfld.long 0x00 16. " P16 ,Port 16 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,Port 15 Pin Status" "Low,High"
|
|
bitfld.long 0x00 14. " P14 ,Port 14 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P13 ,Port 13 Pin Status" "Low,High"
|
|
bitfld.long 0x00 12. " P12 ,Port 12 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,Port 11 Pin Status" "Low,High"
|
|
bitfld.long 0x00 10. " P10 ,Port 10 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 9. " P9 ,Port 9 Pin Status" "Low,High"
|
|
bitfld.long 0x00 8. " P8 ,Port 8 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,Port 7 Pin Status" "Low,High"
|
|
bitfld.long 0x00 6. " P6 ,Port 6 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " P5 ,Port 5 Pin Status" "Low,High"
|
|
bitfld.long 0x00 4. " P4 ,Port 4 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,Port 3 Pin Status" "Low,High"
|
|
bitfld.long 0x00 2. " P2 ,Port 2 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P1 ,Port 1 Pin Status" "Low,High"
|
|
bitfld.long 0x00 0. " P0 ,Port 0 Pin Status" "Low,High"
|
|
width 0xb
|
|
tree.end
|
|
tree "Port 2"
|
|
base ad:0x40052000
|
|
width 11.
|
|
rgroup.long 0x00++0x3
|
|
line.long 0x00 "GPIO_IDR,GPIO ID Code Register"
|
|
hexmask.long 0x00 0.--25. 1. " IDCODE ,Identification Code Register"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "GPIO_CEDR,GPIO Clock Enable Disable Register"
|
|
bitfld.long 0x00 0. " CLKEN ,Clock Enable/Disable" "Disabled,Enabled"
|
|
wgroup.long 0x08++0x3
|
|
line.long 0x00 "GPIO_SRR,GPIO Software Reset Register"
|
|
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "GPIO_IMSCR,GPIO Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x00 27. " P27 ,Port 27 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 26. " P26 ,Port 26 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P25 ,Port 25 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 24. " P24 ,Port 24 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,Port 23 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 22. " P22 ,Port 22 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " P21 ,Port 21 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 20. " P20 ,Port 20 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,Port 19 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 18. " P18 ,Port 18 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P17 ,Port 17 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 16. " P16 ,Port 16 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,Port 15 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 14. " P14 ,Port 14 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P13 ,Port 13 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 12. " P12 ,Port 12 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,Port 11 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 10. " P10 ,Port 10 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " P9 ,Port 9 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 8. " P8 ,Port 8 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,Port 7 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 6. " P6 ,Port 6 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " P5 ,Port 5 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 4. " P4 ,Port 4 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,Port 3 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " P2 ,Port 2 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P1 ,Port 1 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 0. " P0 ,Port 0 Interrupt Mask" "Masked,Not masked"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x00 "GPIO_RISR,GPIO Raw Interrupt Status Register"
|
|
bitfld.long 0x00 27. " P27 ,Port 27 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 26. " P26 ,Port 26 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P25 ,Port 25 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 24. " P24 ,Port 24 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,Port 23 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 22. " P22 ,Port 22 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 21. " P21 ,Port 21 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 20. " P20 ,Port 20 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,Port 19 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 18. " P18 ,Port 18 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P17 ,Port 17 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 16. " P16 ,Port 16 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,Port 15 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 14. " P14 ,Port 14 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P13 ,Port 13 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 12. " P12 ,Port 12 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,Port 11 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 10. " P10 ,Port 10 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 9. " P9 ,Port 9 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 8. " P8 ,Port 8 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,Port 7 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " P6 ,Port 6 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 5. " P5 ,Port 5 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. " P4 ,Port 4 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,Port 3 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " P2 ,Port 2 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P1 ,Port 1 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " P0 ,Port 0 Raw Interrupt Status" "Not occurred,Occurred"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x00 "GPIO_MISR,GPIO Masked Interrupt Status Register"
|
|
bitfld.long 0x00 27. " P27 ,Port 27 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 26. " P26 ,Port 26 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P25 ,Port 25 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 24. " P24 ,Port 24 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,Port 23 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 22. " P22 ,Port 22 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 21. " P21 ,Port 21 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 20. " P20 ,Port 20 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,Port 19 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 18. " P18 ,Port 18 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P17 ,Port 17 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 16. " P16 ,Port 16 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,Port 15 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 14. " P14 ,Port 14 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P13 ,Port 13 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 12. " P12 ,Port 12 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,Port 11 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 10. " P10 ,Port 10 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 9. " P9 ,Port 9 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 8. " P8 ,Port 8 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,Port 7 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " P6 ,Port 6 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 5. " P5 ,Port 5 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. " P4 ,Port 4 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,Port 3 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " P2 ,Port 2 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P1 ,Port 1 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " P0 ,Port 0 Masked Interrupt Status" "Not occurred,Occurred"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x00 "GPIO_ICR,GPIO Interrupt Clear Register"
|
|
bitfld.long 0x00 27. " P27 ,Port 27 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 26. " P26 ,Port 26 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P25 ,Port 25 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 24. " P24 ,Port 24 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,Port 23 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 22. " P22 ,Port 22 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 21. " P21 ,Port 21 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 20. " P20 ,Port 20 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,Port 19 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 18. " P18 ,Port 18 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P17 ,Port 17 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 16. " P16 ,Port 16 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,Port 15 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 14. " P14 ,Port 14 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P13 ,Port 13 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 12. " P12 ,Port 12 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,Port 11 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 10. " P10 ,Port 10 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 9. " P9 ,Port 9 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 8. " P8 ,Port 8 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,Port 7 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 6. " P6 ,Port 6 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 5. " P5 ,Port 5 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 4. " P4 ,Port 4 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,Port 3 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 2. " P2 ,Port 2 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P1 ,Port 1 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " P0 ,Port 0 Interrupt Clear" "No effect,Clear"
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "GPIO_OSR,GPIO Output Status Register"
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_set/clr ,Port 27 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_set/clr ,Port 26 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_set/clr ,Port 25 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_set/clr ,Port 24 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_set/clr ,Port 23 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_set/clr ,Port 22 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_set/clr ,Port 21 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,Port 20 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,Port 19 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,Port 18 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,Port 17 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,Port 16 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,Port 15 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,Port 14 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,Port 13 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,Port 12 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,Port 11 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,Port 10 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,Port 9 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,Port 8 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,Port 7 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,Port 6 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,Port 5 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,Port 4 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,Port 3 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,Port 2 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,Port 1 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,Port 0 Data Direction(Input or Output) Status" "Input,Output"
|
|
wgroup.long 0x28++0x3
|
|
line.long 0x00 "GPIO_WODR,GPIO Write Output Data Register"
|
|
bitfld.long 0x00 27. " P27 ,Port 27 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 26. " P26 ,Port 26 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P25 ,Port 25 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 24. " P24 ,Port 24 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,Port 23 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 22. " P22 ,Port 22 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 21. " P21 ,Port 21 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 20. " P20 ,Port 20 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,Port 19 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 18. " P18 ,Port 18 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P17 ,Port 17 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 16. " P16 ,Port 16 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,Port 15 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 14. " P14 ,Port 14 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P13 ,Port 13 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 12. " P12 ,Port 12 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,Port 11 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 10. " P10 ,Port 10 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 9. " P9 ,Port 9 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 8. " P8 ,Port 8 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,Port 7 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 6. " P6 ,Port 6 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " P5 ,Port 5 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 4. " P4 ,Port 4 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,Port 3 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 2. " P2 ,Port 2 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P1 ,Port 1 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 0. " P0 ,Port 0 Output Data Control" "Low,High"
|
|
group.long 0x34++0x3
|
|
line.long 0x00 "GPIO_ODSR,GPIO Output Data Status Register"
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_set/clr ,Port 27 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_set/clr ,Port 26 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_set/clr ,Port 25 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_set/clr ,Port 24 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_set/clr ,Port 23 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_set/clr ,Port 22 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_set/clr ,Port 21 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,Port 20 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,Port 19 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,Port 18 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,Port 17 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,Port 16 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,Port 15 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,Port 14 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,Port 13 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,Port 12 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,Port 11 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,Port 10 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,Port 9 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,Port 8 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,Port 7 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,Port 6 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,Port 5 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,Port 4 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,Port 3 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,Port 2 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,Port 1 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,Port 0 Output Data Status" "Low,High"
|
|
rgroup.long 0x38++0x3
|
|
line.long 0x00 "GPIO_PDSR,GPIO Pin Data Status Register"
|
|
bitfld.long 0x00 27. " P27 ,Port 27 Pin Status" "Low,High"
|
|
bitfld.long 0x00 26. " P26 ,Port 26 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " P25 ,Port 25 Pin Status" "Low,High"
|
|
bitfld.long 0x00 24. " P24 ,Port 24 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,Port 23 Pin Status" "Low,High"
|
|
bitfld.long 0x00 22. " P22 ,Port 22 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 21. " P21 ,Port 21 Pin Status" "Low,High"
|
|
bitfld.long 0x00 20. " P20 ,Port 20 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,Port 19 Pin Status" "Low,High"
|
|
bitfld.long 0x00 18. " P18 ,Port 18 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 17. " P17 ,Port 17 Pin Status" "Low,High"
|
|
bitfld.long 0x00 16. " P16 ,Port 16 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,Port 15 Pin Status" "Low,High"
|
|
bitfld.long 0x00 14. " P14 ,Port 14 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " P13 ,Port 13 Pin Status" "Low,High"
|
|
bitfld.long 0x00 12. " P12 ,Port 12 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,Port 11 Pin Status" "Low,High"
|
|
bitfld.long 0x00 10. " P10 ,Port 10 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 9. " P9 ,Port 9 Pin Status" "Low,High"
|
|
bitfld.long 0x00 8. " P8 ,Port 8 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,Port 7 Pin Status" "Low,High"
|
|
bitfld.long 0x00 6. " P6 ,Port 6 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " P5 ,Port 5 Pin Status" "Low,High"
|
|
bitfld.long 0x00 4. " P4 ,Port 4 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,Port 3 Pin Status" "Low,High"
|
|
bitfld.long 0x00 2. " P2 ,Port 2 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P1 ,Port 1 Pin Status" "Low,High"
|
|
bitfld.long 0x00 0. " P0 ,Port 0 Pin Status" "Low,High"
|
|
width 0xb
|
|
tree.end
|
|
tree "Port 3"
|
|
base ad:0x40053000
|
|
width 11.
|
|
rgroup.long 0x00++0x3
|
|
line.long 0x00 "GPIO_IDR,GPIO ID Code Register"
|
|
hexmask.long 0x00 0.--25. 1. " IDCODE ,Identification Code Register"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "GPIO_CEDR,GPIO Clock Enable Disable Register"
|
|
bitfld.long 0x00 0. " CLKEN ,Clock Enable/Disable" "Disabled,Enabled"
|
|
wgroup.long 0x08++0x3
|
|
line.long 0x00 "GPIO_SRR,GPIO Software Reset Register"
|
|
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "GPIO_IMSCR,GPIO Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x00 9. " P9 ,Port 9 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 8. " P8 ,Port 8 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,Port 7 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 6. " P6 ,Port 6 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " P5 ,Port 5 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 4. " P4 ,Port 4 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,Port 3 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " P2 ,Port 2 Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P1 ,Port 1 Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 0. " P0 ,Port 0 Interrupt Mask" "Masked,Not masked"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x00 "GPIO_RISR,GPIO Raw Interrupt Status Register"
|
|
bitfld.long 0x00 9. " P9 ,Port 9 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 8. " P8 ,Port 8 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,Port 7 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " P6 ,Port 6 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 5. " P5 ,Port 5 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. " P4 ,Port 4 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,Port 3 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " P2 ,Port 2 Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P1 ,Port 1 Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " P0 ,Port 0 Raw Interrupt Status" "Not occurred,Occurred"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x00 "GPIO_MISR,GPIO Masked Interrupt Status Register"
|
|
bitfld.long 0x00 9. " P9 ,Port 9 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 8. " P8 ,Port 8 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,Port 7 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " P6 ,Port 6 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 5. " P5 ,Port 5 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. " P4 ,Port 4 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,Port 3 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " P2 ,Port 2 Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P1 ,Port 1 Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " P0 ,Port 0 Masked Interrupt Status" "Not occurred,Occurred"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x00 "GPIO_ICR,GPIO Interrupt Clear Register"
|
|
bitfld.long 0x00 9. " P9 ,Port 9 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 8. " P8 ,Port 8 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,Port 7 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 6. " P6 ,Port 6 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 5. " P5 ,Port 5 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 4. " P4 ,Port 4 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,Port 3 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 2. " P2 ,Port 2 Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P1 ,Port 1 Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " P0 ,Port 0 Interrupt Clear" "No effect,Clear"
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "GPIO_OSR,GPIO Output Status Register"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,Port 9 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,Port 8 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,Port 7 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,Port 6 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,Port 5 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,Port 4 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,Port 3 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,Port 2 Data Direction(Input or Output) Status" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,Port 1 Data Direction(Input or Output) Status" "Input,Output"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,Port 0 Data Direction(Input or Output) Status" "Input,Output"
|
|
wgroup.long 0x28++0x3
|
|
line.long 0x00 "GPIO_WODR,GPIO Write Output Data Register"
|
|
bitfld.long 0x00 9. " P9 ,Port 9 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 8. " P8 ,Port 8 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,Port 7 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 6. " P6 ,Port 6 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " P5 ,Port 5 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 4. " P4 ,Port 4 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,Port 3 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 2. " P2 ,Port 2 Output Data Control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P1 ,Port 1 Output Data Control" "Low,High"
|
|
bitfld.long 0x00 0. " P0 ,Port 0 Output Data Control" "Low,High"
|
|
group.long 0x34++0x3
|
|
line.long 0x00 "GPIO_ODSR,GPIO Output Data Status Register"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,Port 9 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,Port 8 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,Port 7 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,Port 6 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,Port 5 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,Port 4 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,Port 3 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,Port 2 Output Data Status" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,Port 1 Output Data Status" "Low,High"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,Port 0 Output Data Status" "Low,High"
|
|
rgroup.long 0x38++0x3
|
|
line.long 0x00 "GPIO_PDSR,GPIO Pin Data Status Register"
|
|
bitfld.long 0x00 9. " P9 ,Port 9 Pin Status" "Low,High"
|
|
bitfld.long 0x00 8. " P8 ,Port 8 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,Port 7 Pin Status" "Low,High"
|
|
bitfld.long 0x00 6. " P6 ,Port 6 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " P5 ,Port 5 Pin Status" "Low,High"
|
|
bitfld.long 0x00 4. " P4 ,Port 4 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,Port 3 Pin Status" "Low,High"
|
|
bitfld.long 0x00 2. " P2 ,Port 2 Pin Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " P1 ,Port 1 Pin Status" "Low,High"
|
|
bitfld.long 0x00 0. " P0 ,Port 0 Pin Status" "Low,High"
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree.open "Inter-Integrated Circuit (IIC)"
|
|
tree "I2C0"
|
|
base ad:0x400A0000
|
|
width 11.
|
|
rgroup.long 0x00++0x3
|
|
line.long 0x00 "I2C_IDR,IIC ID Register"
|
|
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "I2C_CEDR,IIC Clock Enable/Disable Register"
|
|
bitfld.long 0x00 0. " CLKEN ,Clock Enable/Disable Control" "Disabled,Enabled"
|
|
wgroup.long 0x08++0x3
|
|
line.long 0x00 "I2C_SRR,IIC Software Reset Register"
|
|
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "I2C_CR,IIC Control Register"
|
|
bitfld.long 0x00 8. " ENA ,I2C Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " STA ,I2C Start" "Slave,Master"
|
|
bitfld.long 0x00 2. " STO ,I2C Stop" "No stop,Stop"
|
|
textline " "
|
|
bitfld.long 0x00 1. " AA ,I2C Acknowledge" "No acknowledge,Acknowledge"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "I2C_MR,IIC Mode Register"
|
|
bitfld.long 0x00 12. " FAST ,Fast mode" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 0.--11. 1. " PRV ,Pre-scalar value"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x00 "I2C_SR,I2C Status Register"
|
|
hexmask.long.byte 0x00 3.--7. 1. " SR ,I2C status code"
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "I2C_IMSCR,IIC Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x00 4. " SI ,SI interrupt enable mask" "Masked,Not masked"
|
|
rgroup.long 0x1c++0x3
|
|
line.long 0x00 "I2C_RISR,IIC Raw Interrupt Status Register"
|
|
bitfld.long 0x00 4. " SI ,SI Raw Interrupt State" "Not occurred,Occurred"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x00 "I2C_MISR,IIC Masked Interrupt Status Register"
|
|
bitfld.long 0x00 4. " SI ,SI Masked Interrupt State" "Not occurred,Occurred"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x00 "I2C_ICR,IIC Interrupt Clear Register"
|
|
bitfld.long 0x00 4. " SI ,SI Interrupt Clear" "No effect,Clear"
|
|
group.long 0x28++0x3
|
|
line.long 0x00 "I2C_SDR,IIC Serial Data Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DAT ,I2C Data"
|
|
group.long 0x2c++0x3
|
|
line.long 0x00 "I2C_SSAR,IIC Serial Slave Address Register"
|
|
hexmask.long.byte 0x00 1.--7. 2. " ADR ,I2C Address"
|
|
bitfld.long 0x00 0. " GC ,General Call" "Disabled,Enabled"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "I2C_HSDR,IIC Hold/Setup Delay Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DL ,Hold/setup delay"
|
|
group.long 0x34++0x3
|
|
line.long 0x00 "I2C_DMACR,IIC DMA Control Register"
|
|
bitfld.long 0x00 1. " TXDMAE ,DMA for the transmit Enable/Disable Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RXDMAE ,DMA for the receive Enable/Disable Control" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
tree "I2C1"
|
|
base ad:0x400A1000
|
|
width 11.
|
|
rgroup.long 0x00++0x3
|
|
line.long 0x00 "I2C_IDR,IIC ID Register"
|
|
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "I2C_CEDR,IIC Clock Enable/Disable Register"
|
|
bitfld.long 0x00 0. " CLKEN ,Clock Enable/Disable Control" "Disabled,Enabled"
|
|
wgroup.long 0x08++0x3
|
|
line.long 0x00 "I2C_SRR,IIC Software Reset Register"
|
|
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "I2C_CR,IIC Control Register"
|
|
bitfld.long 0x00 8. " ENA ,I2C Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " STA ,I2C Start" "Slave,Master"
|
|
bitfld.long 0x00 2. " STO ,I2C Stop" "No stop,Stop"
|
|
textline " "
|
|
bitfld.long 0x00 1. " AA ,I2C Acknowledge" "No acknowledge,Acknowledge"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "I2C_MR,IIC Mode Register"
|
|
bitfld.long 0x00 12. " FAST ,Fast mode" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 0.--11. 1. " PRV ,Pre-scalar value"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x00 "I2C_SR,I2C Status Register"
|
|
hexmask.long.byte 0x00 3.--7. 1. " SR ,I2C status code"
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "I2C_IMSCR,IIC Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x00 4. " SI ,SI interrupt enable mask" "Masked,Not masked"
|
|
rgroup.long 0x1c++0x3
|
|
line.long 0x00 "I2C_RISR,IIC Raw Interrupt Status Register"
|
|
bitfld.long 0x00 4. " SI ,SI Raw Interrupt State" "Not occurred,Occurred"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x00 "I2C_MISR,IIC Masked Interrupt Status Register"
|
|
bitfld.long 0x00 4. " SI ,SI Masked Interrupt State" "Not occurred,Occurred"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x00 "I2C_ICR,IIC Interrupt Clear Register"
|
|
bitfld.long 0x00 4. " SI ,SI Interrupt Clear" "No effect,Clear"
|
|
group.long 0x28++0x3
|
|
line.long 0x00 "I2C_SDR,IIC Serial Data Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DAT ,I2C Data"
|
|
group.long 0x2c++0x3
|
|
line.long 0x00 "I2C_SSAR,IIC Serial Slave Address Register"
|
|
hexmask.long.byte 0x00 1.--7. 2. " ADR ,I2C Address"
|
|
bitfld.long 0x00 0. " GC ,General Call" "Disabled,Enabled"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "I2C_HSDR,IIC Hold/Setup Delay Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DL ,Hold/setup delay"
|
|
group.long 0x34++0x3
|
|
line.long 0x00 "I2C_DMACR,IIC DMA Control Register"
|
|
bitfld.long 0x00 1. " TXDMAE ,DMA for the transmit Enable/Disable Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RXDMAE ,DMA for the receive Enable/Disable Control" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree.open "Inverter Motor Controller (IMC)"
|
|
tree "IMC0"
|
|
base ad:0x400B0000
|
|
width 12.
|
|
rgroup.long 0x00++0x3
|
|
line.long 0x00 "IMC_IDR,IMC ID Register"
|
|
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "IMC_CEDR,IMC Clock Enable/Disable Register"
|
|
bitfld.long 0x00 31. " DBGEN ,Debug enable" "Not halted,Halted"
|
|
bitfld.long 0x00 0. " CLKEN ,Clock Enable/Disable Control" "Disabled,Enabled"
|
|
wgroup.long 0x08++0x3
|
|
line.long 0x00 "IMC_SRR,IMC Software Reset Register"
|
|
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "IMC_CR0,IMC Control Register 0"
|
|
bitfld.long 0x00 26.--27. " SYNCSEL ,Synchronous Write Selection" "ZERO and IMC_TCR,ZERO,TOPCMP,?..."
|
|
bitfld.long 0x00 20.--24. " NUMSKIP ,Numbers of skip for motor match interrupt" "No skip,1 time skip,2 time skip,3 time skip,4 time skip,5 time skip,6 time skip,7 time skip,8 time skip,9 time skip,10 time skip,11 time skip,12 time skip,13 time skip,14 time skip,15 time skip,16 time skip,17 time skip,18 time skip,19 time skip,20 time skip,21 time skip,22 time skip,23 time skip,24 time skip,25 time skip,26 time skip,27 time skip,28 time skip,29 time skip,30 time skip,31 time skip"
|
|
bitfld.long 0x00 16.--18. " IMCLKSEL ,Inverter Clock (IMCLK) Selection" "PCLK,PCLK/2,PCLK/4,PCLK/8,PCLK/16,PCLK/32,PCLK/64,PCLK/128"
|
|
textline " "
|
|
sif (cpu()!="S3FN41F")
|
|
bitfld.long 0x00 15. " PWMOUTOFFENBYOPAMP ,PWM output off enable by OPAMP" "Enabled,Disabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 14. " PWMOUTEN ,PWM output enable" "Enabled,Disabled"
|
|
bitfld.long 0x00 13. " PWMOUTOFFEN ,PWM output disable by PWMxOFF" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PWMOFFEN ,PWMxOFF enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--10. " IMFILTER ,Filter Clock Selection of PWMxOFF pin" "IMCLK,IMCLK/2,IMCLK/4,IMCLK/8,IMCLK/16,IMCLK/32,IMCLK/64,IMCLK/128"
|
|
textline " "
|
|
sif (cpu()=="S3FN41F")
|
|
bitfld.long 0x00 6. " ESELPWMOFF ,PWMxOFF Active Selection" "Falling,Rising"
|
|
textline " "
|
|
else
|
|
bitfld.long 0x00 6.--7. " ESELPWMOFF ,PWMxOFF Active Selection" "Falling,Rising,Low,High"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 5. " PWMPOLD ,Polarity of PWM in the PWMxD0/1/2" "Low,High"
|
|
bitfld.long 0x00 4. " PWMPOLU ,Polarity of PWM in the PWMxU0/1/2" "Low,High"
|
|
bitfld.long 0x00 3. " PWMSWAP ,Swapping of PWMxUx and PWMxDx" "No swap,Swap"
|
|
textline " "
|
|
bitfld.long 0x00 2. " WMODE ,Write mode of compare register" "Immediate,Synchronous"
|
|
bitfld.long 0x00 1. " IMMODE ,Inverter Motor Mode Selection" "Tri-angular shape,Saw-tooth shape"
|
|
bitfld.long 0x00 0. " IMEN ,Inverter motor block enable" "Disabled,Enabled"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "IMC_CR1,IMC Control Register 1"
|
|
bitfld.long 0x00 21. " PWMxU0DT ,PWMxU0 Dead-time Insert" "No insertion,Insertion"
|
|
bitfld.long 0x00 20. " PWMxU1DT ,PWMxU1 Dead-time Insert" "No insertion,Insertion"
|
|
bitfld.long 0x00 19. " PWMxU2DT ,PWMxU2 Dead-time Insert" "No insertion,Insertion"
|
|
textline " "
|
|
bitfld.long 0x00 18. " PWMxD0DT ,PWMxD0 Dead-time Insert" "No insertion,Insertion"
|
|
bitfld.long 0x00 17. " PWMxD1DT ,PWMxD1 Dead-time Insert" "No insertion,Insertion"
|
|
bitfld.long 0x00 16. " PWMxD2DT ,PWMxD2 Dead-time Insert" "No insertion,Insertion"
|
|
textline " "
|
|
bitfld.long 0x00 13. " PWMxU0LEVEL ,PWMxU0 Output Level Selection" "Low,High"
|
|
bitfld.long 0x00 12. " PWMxU1LEVEL ,PWMxU1 Output Level Selection" "Low,High"
|
|
bitfld.long 0x00 11. " PWMxU2LEVEL ,PWMxU2 Output Level Selection" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " PWMxD0LEVEL ,PWMxD0 Output Level Selection" "Low,High"
|
|
bitfld.long 0x00 9. " PWMxD1LEVEL ,PWMxD1 Output Level Selection" "Low,High"
|
|
bitfld.long 0x00 8. " PWMxD2LEVEL ,PWMxD2 Output Level Selection" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " PWMxU0EN ,PWMxU0 PWM Output Enable" "Enabled,Disabled"
|
|
bitfld.long 0x00 4. " PWMxU1EN ,PWMxU1 PWM Output Enable" "Enabled,Disabled"
|
|
bitfld.long 0x00 3. " PWMxU2EN ,PWMxU2 PWM Output Enable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PWMxD0EN ,PWMxD0 PWM Output Enable" "Enabled,Disabled"
|
|
bitfld.long 0x00 1. " PWMxD1EN ,PWMxD1 PWM Output Enable" "Enabled,Disabled"
|
|
bitfld.long 0x00 0. " PWMxD2EN ,PWMxD2 PWM Output Enable" "Enabled,Disabled"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x00 "IMC_CNTR,IMC 16 Bit Counter Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CV ,Count Value"
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "IMC_SR,IMC Status Register"
|
|
sif (cpu()!="S3FN41F")
|
|
bitfld.long 0x00 2. " OPAMPEDGEDET ,OPAMP edge detect" "Not detected,Detected"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 1. " UPDOWN ,Status of PWM counter" "Up counting,Down counting"
|
|
bitfld.long 0x00 0. " FAULTSTAT ,Status of PWM Output Signal" "Normal,High-Z"
|
|
group.long 0x1c++0x3
|
|
line.long 0x00 "IMC_IMSCR,IMC Interrupt Mask Set and Clear Register"
|
|
bitfld.long 0x00 13. " ADCFM2 ,ADC Compare2 Falling Match Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 12. " ADCRM2 ,ADC Compare2 Rising Match Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 11. " ADCFM1 ,ADC Compare1 Falling Match Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ADCRM1 ,ADC Compare1 Rising Match Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 9. " ADCFM0 ,ADC Compare0 Falling Match Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 8. " ADCRM0 ,ADC Compare0 Rising Match Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TOP ,TOP Match Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 6. " ZERO ,ZERO Match Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 0. " FAULT ,FAULT Interrupt Mask" "Masked,Not masked"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x00 "IMC_RISR,IMC Raw Interrupt Status Register"
|
|
bitfld.long 0x00 13. " ADCFM2 ,ADC Compare2 Falling Match Raw Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 12. " ADCRM2 ,ADC Compare2 Rising Match Raw Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 11. " ADCFM1 ,ADC Compare1 Falling Match Raw Interrupt State" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ADCRM1 ,ADC Compare1 Rising Match Raw Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 9. " ADCFM0 ,ADC Compare0 Falling Match Raw Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 8. " ADCRM0 ,ADC Compare0 Rising Match Raw Interrupt State" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TOP ,TOP Match Raw Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " ZERO ,ZERO Match Raw Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " FAULT ,FAULT Raw Interrupt State" "Not occurred,Occurred"
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "IMC_MISR,IMC Masked Interrupt Status Register"
|
|
bitfld.long 0x00 13. " ADCFM2 ,ADC Compare2 Falling Match Masked Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 12. " ADCRM2 ,ADC Compare2 Rising Match Masked Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 11. " ADCFM1 ,ADC Compare1 Falling Match Masked Interrupt State" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ADCRM1 ,ADC Compare1 Rising Match Masked Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 9. " ADCFM0 ,ADC Compare0 Falling Match Masked Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 8. " ADCRM0 ,ADC Compare0 Rising Match Masked Interrupt State" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TOP ,TOP Match Masked Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " ZERO ,ZERO Match Masked Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " FAULT ,FAULT Masked Interrupt State" "Not occurred,Occurred"
|
|
wgroup.long 0x28++0x3
|
|
line.long 0x00 "IMC_ICR,IMC Interrupt Clear Register"
|
|
bitfld.long 0x00 13. " ADCFM2 ,ADC Compare2 Falling Match Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 12. " ADCRM2 ,ADC Compare2 Rising Match Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 11. " ADCFM1 ,ADC Compare1 Falling Match Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ADCRM1 ,ADC Compare1 Rising Match Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 9. " ADCFM0 ,ADC Compare0 Falling Match Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 8. " ADCRM0 ,ADC Compare0 Rising Match Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TOP ,TOP Match Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 6. " ZERO ,ZERO Match Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " FAULT ,FAULT Interrupt Clear" "No effect,Clear"
|
|
group.long 0x2c++0x3
|
|
line.long 0x00 "IMC_TCR,IMC 16 Bit Top Compare Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " TOPCMPDAT ,This field can determine the TOP compare register value"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "IMC_DTCR,16 Bit Dead-time Control Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " DTCMPDAT ,This field can determine the Dead-time compare register value"
|
|
group.long 0x34++0x3
|
|
line.long 0x00 "IMC_PACRR,16 Bit Phase A Compare Rising Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PACMPRDAT ,This field can determine the Phase A compare register value at rising"
|
|
group.long 0x38++0x3
|
|
line.long 0x00 "IMC_PBCRR,16 Bit Phase B Compare Rising Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PBCMPRDAT ,This field can determine the Phase B compare register value at rising"
|
|
group.long 0x3c++0x3
|
|
line.long 0x00 "IMC_PCCRR,16 Bit Phase C Compare Rising Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PCCMPRDAT ,This field can determine the Phase C compare register value at rising"
|
|
group.long 0x40++0x3
|
|
line.long 0x00 "IMC_PACFR,16 Bit Phase A Compare Falling Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PACMPFDAT ,This field can determine the Phase A compare register value at falling"
|
|
group.long 0x44++0x3
|
|
line.long 0x00 "IMC_PBCFR,16 Bit Phase B Compare Falling Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PBCMPFDAT ,This field can determine the Phase B compare register value at falling"
|
|
group.long 0x48++0x3
|
|
line.long 0x00 "IMC_PCCFR,16 Bit Phase C Compare Falling Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PCCMPFDAT ,This field can determine the Phase C compare register value at falling"
|
|
group.long 0x4c++0x3
|
|
line.long 0x00 "IMC_ASTSR,IMC ADC Start Signal Select Register"
|
|
sif (cpu()=="S3FN41F")
|
|
bitfld.long 0x00 7. " ADCCMPF2SEL ,ADC start trigger signal by ADCCMPF2DAT match" "Not selected,Selected"
|
|
bitfld.long 0x00 6. " ADCCMPR2SEL ,ADC start trigger signal by ADCCMPR2DAT match" "Not selected,Selected"
|
|
bitfld.long 0x00 5. " ADCCMPF1SEL ,ADC start trigger signal by ADCCMPF1DAT match" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ADCCMPR1SEL ,ADC start trigger signal by ADCCMPR1DAT match" "Not selected,Selected"
|
|
bitfld.long 0x00 3. " ADCCMPF0SEL ,ADC start trigger signal by ADCCMPF0DAT match" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " ADCCMPR0SEL ,ADC start trigger signal by ADCCMPR0DAT match" "Not selected,Selected"
|
|
else
|
|
bitfld.long 0x00 7. " ADCMPF2SEL ,ADC start trigger signal by ADCCMPF2 match" "Not selected,Selected"
|
|
bitfld.long 0x00 6. " ADCMPR2SEL ,ADC start trigger signal by ADCCMPR2 match" "Not selected,Selected"
|
|
bitfld.long 0x00 5. " ADCMPF1SEL ,ADC start trigger signal by ADCCMPF1 match" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ADCMPR1SEL ,ADC start trigger signal by ADCCMPR1 match" "Not selected,Selected"
|
|
bitfld.long 0x00 3. " ADCMPF0SEL ,ADC start trigger signal by ADCCMPF0 match" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " ADCMPR0SEL ,ADC start trigger signal by ADCCMPR0 match" "Not selected,Selected"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 1. " 0SEL ,ADC start trigger signal by counter zero match" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " TOPCMPSEL ,ADC start trigger signal by TOPCMP match" "Not selected,Selected"
|
|
group.long 0x50++0x0F
|
|
line.long 0x0 "IMC_ASCRR0,16 Bit ADC Start Compare Rising Register 0"
|
|
hexmask.long.word 0x0 0.--15. 1. " ADCCMPR0DAT ,This field can determine the ADC compare register value at rising"
|
|
line.long 0x4 "IMC_ASCRR1,16 Bit ADC Start Compare Rising Register 1"
|
|
hexmask.long.word 0x4 0.--15. 1. " ADCCMPR1DAT ,This field can determine the ADC compare register value at rising"
|
|
line.long 0x8 "IMC_ASCRR2,16 Bit ADC Start Compare Rising Register 2"
|
|
hexmask.long.word 0x8 0.--15. 1. " ADCCMPR2DAT ,This field can determine the ADC compare register value at rising"
|
|
group.long 0x5c++0x0F
|
|
line.long 0x0 "IMC_ASCFR0,16 Bit ADC Start Compare Falling Register 0"
|
|
hexmask.long.word 0x0 0.--15. 1. " ADCCMPF0DAT ,This field can determine the ADC compare register value at falling"
|
|
line.long 0x4 "IMC_ASCFR1,16 Bit ADC Start Compare Falling Register 1"
|
|
hexmask.long.word 0x4 0.--15. 1. " ADCCMPF1DAT ,This field can determine the ADC compare register value at falling"
|
|
line.long 0x8 "IMC_ASCFR2,16 Bit ADC Start Compare Falling Register 2"
|
|
hexmask.long.word 0x8 0.--15. 1. " ADCCMPF2DAT ,This field can determine the ADC compare register value at falling"
|
|
width 0xb
|
|
tree.end
|
|
tree "IMC1"
|
|
base ad:0x400B1000
|
|
width 12.
|
|
rgroup.long 0x00++0x3
|
|
line.long 0x00 "IMC_IDR,IMC ID Register"
|
|
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "IMC_CEDR,IMC Clock Enable/Disable Register"
|
|
bitfld.long 0x00 31. " DBGEN ,Debug enable" "Not halted,Halted"
|
|
bitfld.long 0x00 0. " CLKEN ,Clock Enable/Disable Control" "Disabled,Enabled"
|
|
wgroup.long 0x08++0x3
|
|
line.long 0x00 "IMC_SRR,IMC Software Reset Register"
|
|
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "IMC_CR0,IMC Control Register 0"
|
|
bitfld.long 0x00 26.--27. " SYNCSEL ,Synchronous Write Selection" "ZERO and IMC_TCR,ZERO,TOPCMP,?..."
|
|
bitfld.long 0x00 20.--24. " NUMSKIP ,Numbers of skip for motor match interrupt" "No skip,1 time skip,2 time skip,3 time skip,4 time skip,5 time skip,6 time skip,7 time skip,8 time skip,9 time skip,10 time skip,11 time skip,12 time skip,13 time skip,14 time skip,15 time skip,16 time skip,17 time skip,18 time skip,19 time skip,20 time skip,21 time skip,22 time skip,23 time skip,24 time skip,25 time skip,26 time skip,27 time skip,28 time skip,29 time skip,30 time skip,31 time skip"
|
|
bitfld.long 0x00 16.--18. " IMCLKSEL ,Inverter Clock (IMCLK) Selection" "PCLK,PCLK/2,PCLK/4,PCLK/8,PCLK/16,PCLK/32,PCLK/64,PCLK/128"
|
|
textline " "
|
|
sif (cpu()!="S3FN41F")
|
|
bitfld.long 0x00 15. " PWMOUTOFFENBYOPAMP ,PWM output off enable by OPAMP" "Enabled,Disabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 14. " PWMOUTEN ,PWM output enable" "Enabled,Disabled"
|
|
bitfld.long 0x00 13. " PWMOUTOFFEN ,PWM output disable by PWMxOFF" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PWMOFFEN ,PWMxOFF enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--10. " IMFILTER ,Filter Clock Selection of PWMxOFF pin" "IMCLK,IMCLK/2,IMCLK/4,IMCLK/8,IMCLK/16,IMCLK/32,IMCLK/64,IMCLK/128"
|
|
textline " "
|
|
sif (cpu()=="S3FN41F")
|
|
bitfld.long 0x00 6. " ESELPWMOFF ,PWMxOFF Active Selection" "Falling,Rising"
|
|
textline " "
|
|
else
|
|
bitfld.long 0x00 6.--7. " ESELPWMOFF ,PWMxOFF Active Selection" "Falling,Rising,Low,High"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 5. " PWMPOLD ,Polarity of PWM in the PWMxD0/1/2" "Low,High"
|
|
bitfld.long 0x00 4. " PWMPOLU ,Polarity of PWM in the PWMxU0/1/2" "Low,High"
|
|
bitfld.long 0x00 3. " PWMSWAP ,Swapping of PWMxUx and PWMxDx" "No swap,Swap"
|
|
textline " "
|
|
bitfld.long 0x00 2. " WMODE ,Write mode of compare register" "Immediate,Synchronous"
|
|
bitfld.long 0x00 1. " IMMODE ,Inverter Motor Mode Selection" "Tri-angular shape,Saw-tooth shape"
|
|
bitfld.long 0x00 0. " IMEN ,Inverter motor block enable" "Disabled,Enabled"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "IMC_CR1,IMC Control Register 1"
|
|
bitfld.long 0x00 21. " PWMxU0DT ,PWMxU0 Dead-time Insert" "No insertion,Insertion"
|
|
bitfld.long 0x00 20. " PWMxU1DT ,PWMxU1 Dead-time Insert" "No insertion,Insertion"
|
|
bitfld.long 0x00 19. " PWMxU2DT ,PWMxU2 Dead-time Insert" "No insertion,Insertion"
|
|
textline " "
|
|
bitfld.long 0x00 18. " PWMxD0DT ,PWMxD0 Dead-time Insert" "No insertion,Insertion"
|
|
bitfld.long 0x00 17. " PWMxD1DT ,PWMxD1 Dead-time Insert" "No insertion,Insertion"
|
|
bitfld.long 0x00 16. " PWMxD2DT ,PWMxD2 Dead-time Insert" "No insertion,Insertion"
|
|
textline " "
|
|
bitfld.long 0x00 13. " PWMxU0LEVEL ,PWMxU0 Output Level Selection" "Low,High"
|
|
bitfld.long 0x00 12. " PWMxU1LEVEL ,PWMxU1 Output Level Selection" "Low,High"
|
|
bitfld.long 0x00 11. " PWMxU2LEVEL ,PWMxU2 Output Level Selection" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " PWMxD0LEVEL ,PWMxD0 Output Level Selection" "Low,High"
|
|
bitfld.long 0x00 9. " PWMxD1LEVEL ,PWMxD1 Output Level Selection" "Low,High"
|
|
bitfld.long 0x00 8. " PWMxD2LEVEL ,PWMxD2 Output Level Selection" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " PWMxU0EN ,PWMxU0 PWM Output Enable" "Enabled,Disabled"
|
|
bitfld.long 0x00 4. " PWMxU1EN ,PWMxU1 PWM Output Enable" "Enabled,Disabled"
|
|
bitfld.long 0x00 3. " PWMxU2EN ,PWMxU2 PWM Output Enable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PWMxD0EN ,PWMxD0 PWM Output Enable" "Enabled,Disabled"
|
|
bitfld.long 0x00 1. " PWMxD1EN ,PWMxD1 PWM Output Enable" "Enabled,Disabled"
|
|
bitfld.long 0x00 0. " PWMxD2EN ,PWMxD2 PWM Output Enable" "Enabled,Disabled"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x00 "IMC_CNTR,IMC 16 Bit Counter Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CV ,Count Value"
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "IMC_SR,IMC Status Register"
|
|
sif (cpu()!="S3FN41F")
|
|
bitfld.long 0x00 2. " OPAMPEDGEDET ,OPAMP edge detect" "Not detected,Detected"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 1. " UPDOWN ,Status of PWM counter" "Up counting,Down counting"
|
|
bitfld.long 0x00 0. " FAULTSTAT ,Status of PWM Output Signal" "Normal,High-Z"
|
|
group.long 0x1c++0x3
|
|
line.long 0x00 "IMC_IMSCR,IMC Interrupt Mask Set and Clear Register"
|
|
bitfld.long 0x00 13. " ADCFM2 ,ADC Compare2 Falling Match Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 12. " ADCRM2 ,ADC Compare2 Rising Match Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 11. " ADCFM1 ,ADC Compare1 Falling Match Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ADCRM1 ,ADC Compare1 Rising Match Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 9. " ADCFM0 ,ADC Compare0 Falling Match Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 8. " ADCRM0 ,ADC Compare0 Rising Match Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TOP ,TOP Match Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 6. " ZERO ,ZERO Match Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 0. " FAULT ,FAULT Interrupt Mask" "Masked,Not masked"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x00 "IMC_RISR,IMC Raw Interrupt Status Register"
|
|
bitfld.long 0x00 13. " ADCFM2 ,ADC Compare2 Falling Match Raw Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 12. " ADCRM2 ,ADC Compare2 Rising Match Raw Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 11. " ADCFM1 ,ADC Compare1 Falling Match Raw Interrupt State" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ADCRM1 ,ADC Compare1 Rising Match Raw Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 9. " ADCFM0 ,ADC Compare0 Falling Match Raw Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 8. " ADCRM0 ,ADC Compare0 Rising Match Raw Interrupt State" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TOP ,TOP Match Raw Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " ZERO ,ZERO Match Raw Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " FAULT ,FAULT Raw Interrupt State" "Not occurred,Occurred"
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "IMC_MISR,IMC Masked Interrupt Status Register"
|
|
bitfld.long 0x00 13. " ADCFM2 ,ADC Compare2 Falling Match Masked Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 12. " ADCRM2 ,ADC Compare2 Rising Match Masked Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 11. " ADCFM1 ,ADC Compare1 Falling Match Masked Interrupt State" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ADCRM1 ,ADC Compare1 Rising Match Masked Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 9. " ADCFM0 ,ADC Compare0 Falling Match Masked Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 8. " ADCRM0 ,ADC Compare0 Rising Match Masked Interrupt State" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TOP ,TOP Match Masked Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " ZERO ,ZERO Match Masked Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " FAULT ,FAULT Masked Interrupt State" "Not occurred,Occurred"
|
|
wgroup.long 0x28++0x3
|
|
line.long 0x00 "IMC_ICR,IMC Interrupt Clear Register"
|
|
bitfld.long 0x00 13. " ADCFM2 ,ADC Compare2 Falling Match Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 12. " ADCRM2 ,ADC Compare2 Rising Match Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 11. " ADCFM1 ,ADC Compare1 Falling Match Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ADCRM1 ,ADC Compare1 Rising Match Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 9. " ADCFM0 ,ADC Compare0 Falling Match Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 8. " ADCRM0 ,ADC Compare0 Rising Match Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TOP ,TOP Match Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 6. " ZERO ,ZERO Match Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " FAULT ,FAULT Interrupt Clear" "No effect,Clear"
|
|
group.long 0x2c++0x3
|
|
line.long 0x00 "IMC_TCR,IMC 16 Bit Top Compare Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " TOPCMPDAT ,This field can determine the TOP compare register value"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "IMC_DTCR,16 Bit Dead-time Control Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " DTCMPDAT ,This field can determine the Dead-time compare register value"
|
|
group.long 0x34++0x3
|
|
line.long 0x00 "IMC_PACRR,16 Bit Phase A Compare Rising Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PACMPRDAT ,This field can determine the Phase A compare register value at rising"
|
|
group.long 0x38++0x3
|
|
line.long 0x00 "IMC_PBCRR,16 Bit Phase B Compare Rising Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PBCMPRDAT ,This field can determine the Phase B compare register value at rising"
|
|
group.long 0x3c++0x3
|
|
line.long 0x00 "IMC_PCCRR,16 Bit Phase C Compare Rising Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PCCMPRDAT ,This field can determine the Phase C compare register value at rising"
|
|
group.long 0x40++0x3
|
|
line.long 0x00 "IMC_PACFR,16 Bit Phase A Compare Falling Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PACMPFDAT ,This field can determine the Phase A compare register value at falling"
|
|
group.long 0x44++0x3
|
|
line.long 0x00 "IMC_PBCFR,16 Bit Phase B Compare Falling Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PBCMPFDAT ,This field can determine the Phase B compare register value at falling"
|
|
group.long 0x48++0x3
|
|
line.long 0x00 "IMC_PCCFR,16 Bit Phase C Compare Falling Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PCCMPFDAT ,This field can determine the Phase C compare register value at falling"
|
|
group.long 0x4c++0x3
|
|
line.long 0x00 "IMC_ASTSR,IMC ADC Start Signal Select Register"
|
|
sif (cpu()=="S3FN41F")
|
|
bitfld.long 0x00 7. " ADCCMPF2SEL ,ADC start trigger signal by ADCCMPF2DAT match" "Not selected,Selected"
|
|
bitfld.long 0x00 6. " ADCCMPR2SEL ,ADC start trigger signal by ADCCMPR2DAT match" "Not selected,Selected"
|
|
bitfld.long 0x00 5. " ADCCMPF1SEL ,ADC start trigger signal by ADCCMPF1DAT match" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ADCCMPR1SEL ,ADC start trigger signal by ADCCMPR1DAT match" "Not selected,Selected"
|
|
bitfld.long 0x00 3. " ADCCMPF0SEL ,ADC start trigger signal by ADCCMPF0DAT match" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " ADCCMPR0SEL ,ADC start trigger signal by ADCCMPR0DAT match" "Not selected,Selected"
|
|
else
|
|
bitfld.long 0x00 7. " ADCMPF2SEL ,ADC start trigger signal by ADCCMPF2 match" "Not selected,Selected"
|
|
bitfld.long 0x00 6. " ADCMPR2SEL ,ADC start trigger signal by ADCCMPR2 match" "Not selected,Selected"
|
|
bitfld.long 0x00 5. " ADCMPF1SEL ,ADC start trigger signal by ADCCMPF1 match" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ADCMPR1SEL ,ADC start trigger signal by ADCCMPR1 match" "Not selected,Selected"
|
|
bitfld.long 0x00 3. " ADCMPF0SEL ,ADC start trigger signal by ADCCMPF0 match" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " ADCMPR0SEL ,ADC start trigger signal by ADCCMPR0 match" "Not selected,Selected"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 1. " 0SEL ,ADC start trigger signal by counter zero match" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " TOPCMPSEL ,ADC start trigger signal by TOPCMP match" "Not selected,Selected"
|
|
group.long 0x50++0x0F
|
|
line.long 0x0 "IMC_ASCRR0,16 Bit ADC Start Compare Rising Register 0"
|
|
hexmask.long.word 0x0 0.--15. 1. " ADCCMPR0DAT ,This field can determine the ADC compare register value at rising"
|
|
line.long 0x4 "IMC_ASCRR1,16 Bit ADC Start Compare Rising Register 1"
|
|
hexmask.long.word 0x4 0.--15. 1. " ADCCMPR1DAT ,This field can determine the ADC compare register value at rising"
|
|
line.long 0x8 "IMC_ASCRR2,16 Bit ADC Start Compare Rising Register 2"
|
|
hexmask.long.word 0x8 0.--15. 1. " ADCCMPR2DAT ,This field can determine the ADC compare register value at rising"
|
|
group.long 0x5c++0x0F
|
|
line.long 0x0 "IMC_ASCFR0,16 Bit ADC Start Compare Falling Register 0"
|
|
hexmask.long.word 0x0 0.--15. 1. " ADCCMPF0DAT ,This field can determine the ADC compare register value at falling"
|
|
line.long 0x4 "IMC_ASCFR1,16 Bit ADC Start Compare Falling Register 1"
|
|
hexmask.long.word 0x4 0.--15. 1. " ADCCMPF1DAT ,This field can determine the ADC compare register value at falling"
|
|
line.long 0x8 "IMC_ASCFR2,16 Bit ADC Start Compare Falling Register 2"
|
|
hexmask.long.word 0x8 0.--15. 1. " ADCCMPF2DAT ,This field can determine the ADC compare register value at falling"
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree "I/O Configuration (IOCONF)"
|
|
base ad:0x40058000
|
|
width 15.
|
|
tree "Port 0"
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "IOCONF_P0MLR,PORT 0 Mode Low Register"
|
|
bitfld.long 0x00 30.--31. " IO0_15_FSEL[1:0] ,GPIO0.15 Function Selection" "P0.15,SEG7,TPWM3,SDA0"
|
|
bitfld.long 0x00 28.--29. " IO0_14_FSEL[1:0] ,GPIO0.14 Function Selection" "P0.14,SEG6,TCAP3,SCL0"
|
|
bitfld.long 0x00 26.--27. " IO0_13_FSEL[1:0] ,GPIO0.13 Function Selection" "P0.13,SEG5,TCLK4,EXI1"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " IO0_12_FSEL[1:0] ,GPIO0.12 Function Selection" "P0.12,SEG4,TCLK5,EXI0"
|
|
bitfld.long 0x00 22.--23. " IO0_11_FSEL[1:0] ,GPIO0.11 Function Selection" "P0.11,SEG3,TCLK6,SSPMOSI0"
|
|
bitfld.long 0x00 20.--21. " IO0_10_FSEL[1:0] ,GPIO0.10 Function Selection" "P0.10,SEG2,TCLK7,SSPMISO0"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " IO0_9_FSEL[1:0] ,GPIO0.9 Function Selection" "P0.9,SEG1,TPWM4,SSPCLK0"
|
|
bitfld.long 0x00 16.--17. " IO0_8_FSEL[1:0] ,GPIO0.8 Function Selection" "P0.8,SEG0,TCAP4,SSPFSS0"
|
|
bitfld.long 0x00 14.--15. " IO0_7_FSEL[1:0] ,GPIO0.7 Function Selection" "P0.7,COM3,TPWM5,ADTRG1"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " IO0_6_FSEL[1:0] ,GPIO0.6 Function Selection" "P0.6,COM2,TCAP5,-"
|
|
bitfld.long 0x00 10.--11. " IO0_5_FSEL[1:0] ,GPIO0.5 Function Selection" "P0.5,COM1,TPWM6,-"
|
|
bitfld.long 0x00 8.--9. " IO0_4_FSEL[1:0] ,GPIO0.4 Function Selection" "P0.4,COM0,TCAP6,EXI15"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " IO0_3_FSEL[1:0] ,GPIO0.3 Function Selection" "P0.3,VLCD4,TPWM7,EXI14"
|
|
bitfld.long 0x00 4.--5. " IO0_2_FSEL[1:0] ,GPIO0.2 Function Selection" "P0.2,VLCD3,TCAP7,USARTCLK0"
|
|
bitfld.long 0x00 2.--3. " IO0_1_FSEL[1:0] ,GPIO0.1 Function Selection" "P0.1 0,VLCD2,-,USARTTXD0"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " IO0_0_FSEL[1:0] ,GPIO0.0 Function Selection" "P0.0,VLCD1,CLKOUT,USARTRXD0"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "IOCONF_P0MHR,PORT 0 Mode High Register"
|
|
bitfld.long 0x00 30.--31. " IO0_31_FSEL[1:0] ,GPIO0.31 Function Selection" "P0.31,SEG24,PHASEZ1,-"
|
|
bitfld.long 0x00 28.--29. " IO0_30_FSEL[1:0] ,GPIO0.30 Function Selection" "P0.30,SEG23,PHASEB1,-"
|
|
bitfld.long 0x00 26.--27. " IO0_29_FSEL[1:0] ,GPIO0.29 Function Selection" "P0.29,SEG22,PHASEA1,-"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " IO0_28_FSEL[1:0] ,GPIO0.28 Function Selection" "P0.28,SEG21,USARTTXD3,-"
|
|
bitfld.long 0x00 22.--23. " IO0_27_FSEL[1:0] ,GPIO0.27 Function Selection" "P0.27,SEG20,USARTRXD3,-"
|
|
bitfld.long 0x00 20.--21. " IO0_26_FSEL[1:0] ,GPIO0.26 Function Selection" "P0.26,SEG19,USARTCLK3,EXI4"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " IO0_25_FSEL[1:0] ,GPIO0.25 Function Selection" "P0.25,SEG18,PWM2,-"
|
|
bitfld.long 0x00 16.--17. " IO0_24_FSEL[1:0] ,GPIO0.24 Function Selection" "P0.24,SEG17,PWM1,-"
|
|
bitfld.long 0x00 14.--15. " IO0_23_FSEL[1:0] ,GPIO0.23 Function Selection" "P0.23,SEG16,PWM0,-"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " IO0_22_FSEL[1:0] ,GPIO0.22 Function Selection" "P0.22,SEG15,TPWM1,USARTTXD1"
|
|
bitfld.long 0x00 10.--11. " IO0_21_FSEL[1:0] ,GPIO0.21 Function Selection" "P0.21,SEG14,TCAP1,USARTRXD1"
|
|
bitfld.long 0x00 8.--9. " IO0_20_FSEL[1:0] ,GPIO0.20 Function Selection" "P0.20,SEG13,TCLK1,USARTCLK1"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " IO0_19_FSEL[1:0] ,GPIO0.19 Function Selection" "P0.19,SEG12,TPWM2,CANRX0"
|
|
bitfld.long 0x00 4.--5. " IO0_18_FSEL[1:0] ,GPIO0.18 Function Selection" "P0.18,SEG11,TCAP2,CANTX0"
|
|
bitfld.long 0x00 2.--3. " IO0_17_FSEL[1:0] ,GPIO0.17 Function Selection" "P0.17,SEG10,TCLK2,EXI3"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " IO0_16_FSEL[1:0] ,GPIO0.16 Function Selection" "P0.16,SEG9,TCLK3,EXI2"
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "IOCONF_P0PUR,PORT 0 Pull-up Control Register"
|
|
bitfld.long 0x00 31. " IO0_31_PUEN ,GPIO0.31 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " IO0_30_PUEN ,GPIO0.30 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " IO0_29_PUEN ,GPIO0.29 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IO0_28_PUEN ,GPIO0.28 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " IO0_27_PUEN ,GPIO0.27 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " IO0_26_PUEN ,GPIO0.26 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IO0_25_PUEN ,GPIO0.25 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " IO0_24_PUEN ,GPIO0.24 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " IO0_23_PUEN ,GPIO0.23 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IO0_22_PUEN ,GPIO0.22 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " IO0_21_PUEN ,GPIO0.21 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " IO0_20_PUEN ,GPIO0.20 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IO0_19_PUEN ,GPIO0.19 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " IO0_18_PUEN ,GPIO0.18 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " IO0_17_PUEN ,GPIO0.17 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IO0_16_PUEN ,GPIO0.16 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " IO0_15_PUEN ,GPIO0.15 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " IO0_14_PUEN ,GPIO0.14 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IO0_13_PUEN ,GPIO0.13 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " IO0_12_PUEN ,GPIO0.12 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " IO0_11_PUEN ,GPIO0.11 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IO0_10_PUEN ,GPIO0.10 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " IO0_9_PUEN ,GPIO0.9 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " IO0_8_PUEN ,GPIO0.8 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IO0_7_PUEN ,GPIO0.7 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " IO0_6_PUEN ,GPIO0.6 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " IO0_5_PUEN ,GPIO0.5 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IO0_4_PUEN ,GPIO0.4 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " IO0_3_PUEN ,GPIO0.3 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " IO0_2_PUEN ,GPIO0.2 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IO0_1_PUEN ,GPIO0.1 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " IO0_0_PUEN ,GPIO0.0 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "IOCONF_P0ODCR,PORT 0 Open-Drain Control Register"
|
|
bitfld.long 0x00 31. " IO0_31_ODEN ,GPIO0.31 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " IO0_30_ODEN ,GPIO0.30 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " IO0_29_ODEN ,GPIO0.29 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IO0_28_ODEN ,GPIO0.28 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " IO0_27_ODEN ,GPIO0.27 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " IO0_26_ODEN ,GPIO0.26 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IO0_25_ODEN ,GPIO0.25 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " IO0_24_ODEN ,GPIO0.24 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " IO0_23_ODEN ,GPIO0.23 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IO0_22_ODEN ,GPIO0.22 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " IO0_21_ODEN ,GPIO0.21 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " IO0_20_ODEN ,GPIO0.20 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IO0_19_ODEN ,GPIO0.19 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " IO0_18_ODEN ,GPIO0.18 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " IO0_17_ODEN ,GPIO0.17 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IO0_16_ODEN ,GPIO0.16 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " IO0_15_ODEN ,GPIO0.15 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " IO0_14_ODEN ,GPIO0.14 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IO0_13_ODEN ,GPIO0.13 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " IO0_12_ODEN ,GPIO0.12 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " IO0_11_ODEN ,GPIO0.11 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IO0_10_ODEN ,GPIO0.10 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " IO0_9_ODEN ,GPIO0.9 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " IO0_8_ODEN ,GPIO0.8 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IO0_7_ODEN ,GPIO0.7 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " IO0_6_ODEN ,GPIO0.6 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " IO0_5_ODEN ,GPIO0.5 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IO0_4_ODEN ,GPIO0.4 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " IO0_3_ODEN ,GPIO0.3 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " IO0_2_ODEN ,GPIO0.2 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IO0_1_ODEN ,GPIO0.1 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " IO0_0_ODEN ,GPIO0.0 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Port 1"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "IOCONF_P1MLR,PORT 1 Mode Low Register"
|
|
bitfld.long 0x00 30.--31. " IO1_15_FSEL[1:0] ,GPIO1.15 Function Selection" "P1.15,PWM1D2,-,-"
|
|
bitfld.long 0x00 28.--29. " IO1_14_FSEL[1:0] ,GPIO1.14 Function Selection" "P1.14,SEG39,USARTCLK1,NMI"
|
|
bitfld.long 0x00 26.--27. " IO1_13_FSEL[1:0] ,GPIO1.13 Function Selection" "P1.13,SEG38,TPWM0,PWM7"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " IO1_12_FSEL[1:0] ,GPIO1.12 Function Selection" "P1.12,SEG37,TCAP0,PWM6"
|
|
bitfld.long 0x00 22.--23. " IO1_11_FSEL[1:0] ,GPIO1.11 Function Selection" "P1.11,SEG36,TCLK0,PWM5"
|
|
bitfld.long 0x00 20.--21. " IO1_10_FSEL[1:0] ,GPIO1.10 Function Selection" "P1.10,SEG35,USARTTXD2,PWM4"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " IO1_9_FSEL[1:0] ,GPIO1.9 Function Selection" "P1.9,SEG34,USARTRXD2,PWM3"
|
|
bitfld.long 0x00 16.--17. " IO1_8_FSEL[1:0] ,GPIO1.8 Function Selection" "P1.8,SEG33,USARTCLK2,EXI5"
|
|
bitfld.long 0x00 14.--15. " IO1_7_FSEL[1:0] ,GPIO1.7 Function Selection" "P1.7,SEG32,CANTX1,SSPFSS0"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " IO1_6_FSEL[1:0] ,GPIO1.6 Function Selection" "P1.6,SEG31,CANRX1,SSPCLK0"
|
|
bitfld.long 0x00 10.--11. " IO1_5_FSEL[1:0] ,GPIO1.5 Function Selection" "P1.5,SEG30,SDA1,SSPMISO0"
|
|
bitfld.long 0x00 8.--9. " IO1_4_FSEL[1:0] ,GPIO1.4 Function Selection" "P1.4,SEG29,SCL1,SSPMOSI0"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " IO1_3_FSEL[1:0] ,GPIO1.3 Function Selection" "P1.3,SEG28,SSPFSS1,-"
|
|
bitfld.long 0x00 4.--5. " IO1_2_FSEL[1:0] ,GPIO1.2 Function Selection" "P1.2,SEG27,SSPCLK1,-"
|
|
bitfld.long 0x00 2.--3. " IO1_1_FSEL[1:0] ,GPIO1.1 Function Selection" "P1.1,SEG26,SSPMISO1,-"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " IO1_0_FSEL[1:0] ,GPIO1.0 Function Selection" "P1.0,SEG25,SSPMOSI1,-"
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "IOCONF_P1MHR,PORT 1 Mode High Register"
|
|
bitfld.long 0x00 30.--31. " IO1_31_FSEL[1:0] ,GPIO1.31 Function Selection" "P1.31,OP2_P,USARTTXD0,-"
|
|
bitfld.long 0x00 28.--29. " IO1_30_FSEL[1:0] ,GPIO1.30 Function Selection" "P1.30,OP2_N,USARTRXD0,-"
|
|
bitfld.long 0x00 26.--27. " IO1_29_FSEL[1:0] ,GPIO1.29 Function Selection" "P1.29,OP2_O,USARTCLK0,ADTRG1"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " IO1_28_FSEL[1:0] ,GPIO1.28 Function Selection" "P1.28,OP1_P,CANTX0,SSPFSS1"
|
|
bitfld.long 0x00 22.--23. " IO1_27_FSEL[1:0] ,GPIO1.27 Function Selection" "P1.27,OP1_N,CANRX0,SSPCLK1"
|
|
bitfld.long 0x00 20.--21. " IO1_26_FSEL[1:0] ,GPIO1.26 Function Selection" "P1.26,OP1_O,SCL0,SSPMISO1"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " IO1_25_FSEL[1:0] ,GPIO1.25 Function Selection" "P1.25,OP0_P,SDA0,SSPMOSI1"
|
|
bitfld.long 0x00 16.--17. " IO1_24_FSEL[1:0] ,GPIO1.24 Function Selection" "P1.24,OP0_N,USARTTXD1,-"
|
|
bitfld.long 0x00 14.--15. " IO1_23_FSEL[1:0] ,GPIO1.23 Function Selection" "P1.23,OP0_O,USARTRXD1,-"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " IO1_22_FSEL[1:0] ,GPIO1.22 Function Selection" "P1.22,ADTRG0,EXI6,-"
|
|
bitfld.long 0x00 10.--11. " IO1_21_FSEL[1:0] ,GPIO1.21 Function Selection" "P1.21,PWM1OFF,-,-"
|
|
bitfld.long 0x00 8.--9. " IO1_20_FSEL[1:0] ,GPIO1.20 Function Selection" "P1.20,PWM1U0,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " IO1_19_FSEL[1:0] ,GPIO1.19 Function Selection" "P1.19,PWM1D0,-,-"
|
|
bitfld.long 0x00 4.--5. " IO1_18_FSEL[1:0] ,GPIO1.18 Function Selection" "P1.18,PWM1U1,-,-"
|
|
bitfld.long 0x00 2.--3. " IO1_17_FSEL[1:0] ,GPIO1.17 Function Selection" "P1.17,PWM1D1,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " IO1_16_FSEL[1:0] ,GPIO1.16 Function Selection" "P1.16,PWM1U2,-,-"
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "IOCONF_P1PUR,PORT 1 Pull-up Control Register"
|
|
bitfld.long 0x00 31. " IO1_31_PUEN ,GPIO1.31 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " IO1_30_PUEN ,GPIO1.30 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " IO1_29_PUEN ,GPIO1.29 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IO1_28_PUEN ,GPIO1.28 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " IO1_27_PUEN ,GPIO1.27 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " IO1_26_PUEN ,GPIO1.26 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IO1_25_PUEN ,GPIO1.25 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " IO1_24_PUEN ,GPIO1.24 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " IO1_23_PUEN ,GPIO1.23 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IO1_22_PUEN ,GPIO1.22 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " IO1_21_PUEN ,GPIO1.21 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " IO1_20_PUEN ,GPIO1.20 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IO1_19_PUEN ,GPIO1.19 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " IO1_18_PUEN ,GPIO1.18 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " IO1_17_PUEN ,GPIO1.17 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IO1_16_PUEN ,GPIO1.16 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " IO1_15_PUEN ,GPIO1.15 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " IO1_14_PUEN ,GPIO1.14 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IO1_13_PUEN ,GPIO1.13 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " IO1_12_PUEN ,GPIO1.12 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " IO1_11_PUEN ,GPIO1.11 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IO1_10_PUEN ,GPIO1.10 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " IO1_9_PUEN ,GPIO1.9 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " IO1_8_PUEN ,GPIO1.8 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IO1_7_PUEN ,GPIO1.7 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " IO1_6_PUEN ,GPIO1.6 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " IO1_5_PUEN ,GPIO1.5 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IO1_4_PUEN ,GPIO1.4 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " IO1_3_PUEN ,GPIO1.3 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " IO1_2_PUEN ,GPIO1.2 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IO1_1_PUEN ,GPIO1.1 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " IO1_0_PUEN ,GPIO1.0 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
group.long 0x1c++0x3
|
|
line.long 0x00 "IOCONF_P1ODCR,PORT 1 Open-Drain Control Register"
|
|
bitfld.long 0x00 31. " IO1_31_ODEN ,GPIO1.31 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " IO1_30_ODEN ,GPIO1.30 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " IO1_29_ODEN ,GPIO1.29 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IO1_28_ODEN ,GPIO1.28 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " IO1_27_ODEN ,GPIO1.27 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " IO1_26_ODEN ,GPIO1.26 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IO1_25_ODEN ,GPIO1.25 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " IO1_24_ODEN ,GPIO1.24 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " IO1_23_ODEN ,GPIO1.23 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IO1_22_ODEN ,GPIO1.22 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " IO1_21_ODEN ,GPIO1.21 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " IO1_20_ODEN ,GPIO1.20 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IO1_19_ODEN ,GPIO1.19 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " IO1_18_ODEN ,GPIO1.18 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " IO1_17_ODEN ,GPIO1.17 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IO1_16_ODEN ,GPIO1.16 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " IO1_15_ODEN ,GPIO1.15 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " IO1_14_ODEN ,GPIO1.14 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IO1_13_ODEN ,GPIO1.13 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " IO1_12_ODEN ,GPIO1.12 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " IO1_11_ODEN ,GPIO1.11 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IO1_10_ODEN ,GPIO1.10 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " IO1_9_ODEN ,GPIO1.9 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " IO1_8_ODEN ,GPIO1.8 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IO1_7_ODEN ,GPIO1.7 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " IO1_6_ODEN ,GPIO1.6 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " IO1_5_ODEN ,GPIO1.5 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IO1_4_ODEN ,GPIO1.4 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " IO1_3_ODEN ,GPIO1.3 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " IO1_2_ODEN ,GPIO1.2 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IO1_1_ODEN ,GPIO1.1 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " IO1_0_ODEN ,GPIO1.0 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Port 2"
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "IOCONF_P2MLR,PORT 2 Mode Low Register"
|
|
bitfld.long 0x00 30.--31. " IO2_15_FSEL[1:0] ,GPIO2.15 Function Selection" "P2.15,AIN08,OP4_P,EXI11"
|
|
bitfld.long 0x00 28.--29. " IO2_14_FSEL[1:0] ,GPIO2.14 Function Selection" "P2.14,AIN07,OP4_N,EXI10"
|
|
bitfld.long 0x00 26.--27. " IO2_13_FSEL[1:0] ,GPIO2.13 Function Selection" "P2.13,AIN06,OP4_O,EXI9"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " IO2_12_FSEL[1:0] ,GPIO2.12 Function Selection" "P2.12,AIN05,-,-"
|
|
bitfld.long 0x00 22.--23. " IO2_11_FSEL[1:0] ,GPIO2.11 Function Selection" "P2.11,AIN04,-,-"
|
|
bitfld.long 0x00 20.--21. " IO2_10_FSEL[1:0] ,GPIO2.10 Function Selection" "P2.10,AIN03,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " IO2_9_FSEL[1:0] ,GPIO2.9 Function Selection" "P2.9,AIN02,-,-"
|
|
bitfld.long 0x00 16.--17. " IO2_8_FSEL[1:0] ,GPIO2.8 Function Selection" "P2.8,AIN01,-,-"
|
|
bitfld.long 0x00 14.--15. " IO2_7_FSEL[1:0] ,GPIO2.7 Function Selection" "P2.7,AIN17,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " IO2_6_FSEL[1:0] ,GPIO2.6 Function Selection" "P2.6,AIN16,-,-"
|
|
bitfld.long 0x00 10.--11. " IO2_5_FSEL[1:0] ,GPIO2.5 Function Selection" "P2.5,AIN15,-,-"
|
|
bitfld.long 0x00 8.--9. " IO2_4_FSEL[1:0] ,GPIO2.4 Function Selection" "P2.4,AIN14,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " IO2_3_FSEL[1:0] ,GPIO2.3 Function Selection" "P2.3,AIN13,-,-"
|
|
bitfld.long 0x00 4.--5. " IO2_2_FSEL[1:0] ,GPIO2.2 Function Selection" "P2.2,AIN12,OP3_P,-"
|
|
bitfld.long 0x00 2.--3. " IO2_1_FSEL[1:0] ,GPIO2.1 Function Selection" "P2.1,AIN11,OP3_N,EXI8"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " IO2_0_FSEL[1:0] ,GPIO2.0 Function Selection" "P2.0,AIN10,OP3_O,EXI7"
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "IOCONF_P2MHR,PORT 2 Mode High Register"
|
|
bitfld.long 0x00 22.--23. " IO2_27_FSEL[1:0] ,GPIO2.27 Function Selection" "P2.27,SDA1,EXI13,-"
|
|
bitfld.long 0x00 20.--21. " IO2_26_FSEL[1:0] ,GPIO2.26 Function Selection" "P2.26,SCL1,EXI12,-"
|
|
bitfld.long 0x00 18.--19. " IO2_25_FSEL[1:0] ,GPIO2.25 Function Selection" "P2.25,PHASEZ0,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " IO2_24_FSEL[1:0] ,GPIO2.24 Function Selection" "P2.24,PHASEB0,-,-"
|
|
bitfld.long 0x00 14.--15. " IO2_23_FSEL[1:0] ,GPIO2.23 Function Selection" "P2.23,PHASEA0,-,-"
|
|
bitfld.long 0x00 12.--13. " IO2_22_FSEL[1:0] ,GPIO2.22 Function Selection" "P2.22,PWM0D2,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " IO2_21_FSEL[1:0] ,GPIO2.21 Function Selection" "P2.21,PWM0U2,-,-"
|
|
bitfld.long 0x00 8.--9. " IO2_20_FSEL[1:0] ,GPIO2.20 Function Selection" "P2.20,PWM0D1,-,-"
|
|
bitfld.long 0x00 6.--7. " IO2_19_FSEL[1:0] ,GPIO2.19 Function Selection" "P2.19,PWM0U1,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " IO2_18_FSEL[1:0] ,GPIO2.18 Function Selection" "P2.18,PWM0D0,-,-"
|
|
bitfld.long 0x00 2.--3. " IO2_17_FSEL[1:0] ,GPIO2.17 Function Selection" "P2.17,PWM0U0,-,-"
|
|
bitfld.long 0x00 0.--1. " IO2_16_FSEL[1:0] ,GPIO2.16 Function Selection" "P2.16,PWM0OFF,-,-"
|
|
group.long 0x28++0x3
|
|
line.long 0x00 "IOCONF_P2PUR,PORT 2 Pull-up Control Register"
|
|
bitfld.long 0x00 27. " IO2_27_PUEN ,GPIO2.27 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " IO2_26_PUEN ,GPIO2.26 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " IO2_25_PUEN ,GPIO2.25 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24. " IO2_24_PUEN ,GPIO2.24 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " IO2_23_PUEN ,GPIO2.23 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " IO2_22_PUEN ,GPIO2.22 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " IO2_21_PUEN ,GPIO2.21 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " IO2_20_PUEN ,GPIO2.20 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " IO2_19_PUEN ,GPIO2.19 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " IO2_18_PUEN ,GPIO2.18 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " IO2_17_PUEN ,GPIO2.17 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " IO2_16_PUEN ,GPIO2.16 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " IO2_15_PUEN ,GPIO2.15 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " IO2_14_PUEN ,GPIO2.14 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " IO2_13_PUEN ,GPIO2.13 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " IO2_12_PUEN ,GPIO2.12 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " IO2_11_PUEN ,GPIO2.11 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " IO2_10_PUEN ,GPIO2.10 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " IO2_9_PUEN ,GPIO2.9 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " IO2_8_PUEN ,GPIO2.8 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " IO2_7_PUEN ,GPIO2.7 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " IO2_6_PUEN ,GPIO2.6 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " IO2_5_PUEN ,GPIO2.5 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " IO2_4_PUEN ,GPIO2.4 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " IO2_3_PUEN ,GPIO2.3 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " IO2_2_PUEN ,GPIO2.2 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " IO2_1_PUEN ,GPIO2.1 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " IO2_0_PUEN ,GPIO2.0 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
group.long 0x2c++0x3
|
|
line.long 0x00 "IOCONF_P2ODCR,PORT 2 Open-Drain Control Register"
|
|
bitfld.long 0x00 27. " IO2_27_ODEN ,GPIO2.27 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " IO2_26_ODEN ,GPIO2.26 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " IO2_25_ODEN ,GPIO2.25 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24. " IO2_24_ODEN ,GPIO2.24 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " IO2_23_ODEN ,GPIO2.23 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " IO2_22_ODEN ,GPIO2.22 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " IO2_21_ODEN ,GPIO2.21 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " IO2_20_ODEN ,GPIO2.20 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " IO2_19_ODEN ,GPIO2.19 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " IO2_18_ODEN ,GPIO2.18 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " IO2_17_ODEN ,GPIO2.17 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " IO2_16_ODEN ,GPIO2.16 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " IO2_15_ODEN ,GPIO2.15 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " IO2_14_ODEN ,GPIO2.14 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " IO2_13_ODEN ,GPIO2.13 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " IO2_12_ODEN ,GPIO2.12 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " IO2_11_ODEN ,GPIO2.11 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " IO2_10_ODEN ,GPIO2.10 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " IO2_9_ODEN ,GPIO2.9 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " IO2_8_ODEN ,GPIO2.8 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " IO2_7_ODEN ,GPIO2.7 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " IO2_6_ODEN ,GPIO2.6 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " IO2_5_ODEN ,GPIO2.5 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " IO2_4_ODEN ,GPIO2.4 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " IO2_3_ODEN ,GPIO2.3 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " IO2_2_ODEN ,GPIO2.2 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " IO2_1_ODEN ,GPIO2.1 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " IO2_0_ODEN ,GPIO2.0 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Port 3"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "IOCONF_P3MLR,PORT 3 Mode Low Register"
|
|
bitfld.long 0x00 18.--19. " IO3_9_FSEL[1:0] ,GPIO3.9 Function Selection" "P3.9,TCK/SWCLK,-,-"
|
|
bitfld.long 0x00 16.--17. " IO3_8_FSEL[1:0] ,GPIO3.8 Function Selection" "P3.8,TMS/SWDIO,-,-"
|
|
bitfld.long 0x00 14.--15. " IO3_7_FSEL[1:0] ,GPIO3.7 Function Selection" "P3.7,TDI,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " IO3_6_FSEL[1:0] ,GPIO3.6 Function Selection" "P3.6,TDO/TRACESWO,-,-"
|
|
bitfld.long 0x00 10.--11. " IO3_5_FSEL[1:0] ,GPIO3.5 Function Selection" "P3.5,nTRST,-,-"
|
|
bitfld.long 0x00 8.--9. " IO3_4_FSEL[1:0] ,GPIO3.4 Function Selection" "P3.4,TRACECLK,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " IO3_3_FSEL[1:0] ,GPIO3.3 Function Selection" "P3.3,TRACED0,-,-"
|
|
bitfld.long 0x00 4.--5. " IO3_2_FSEL[1:0] ,GPIO3.2 Function Selection" "P3.2,TRACED1,-,-"
|
|
bitfld.long 0x00 2.--3. " IO3_1_FSEL[1:0] ,GPIO3.1 Function Selection" "P3.1,TRACED2,-,-"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " IO3_0_FSEL[1:0] ,GPIO3.0 Function Selection" "P3.0,TRACED3,-,-"
|
|
group.long 0x38++0x3
|
|
line.long 0x00 "IOCONF_P3PUR,PORT 3 Pull-up Control Register"
|
|
bitfld.long 0x00 9. " IO3_9_PUEN ,GPIO3.9 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " IO3_8_PUEN ,GPIO3.8 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " IO3_7_PUEN ,GPIO3.7 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " IO3_6_PUEN ,GPIO3.6 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " IO3_5_PUEN ,GPIO3.5 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " IO3_4_PUEN ,GPIO3.4 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " IO3_3_PUEN ,GPIO3.3 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " IO3_2_PUEN ,GPIO3.2 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " IO3_1_PUEN ,GPIO3.1 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " IO3_0_PUEN ,GPIO3.0 Pull-Up Enable/Disable" "Disabled,Enabled"
|
|
group.long 0x3c++0x3
|
|
line.long 0x00 "IOCONF_P3ODCR,PORT 3 Open-Drain Control Register"
|
|
bitfld.long 0x00 9. " IO3_9_ODEN ,GPIO3.9 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " IO3_8_ODEN ,GPIO3.8 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " IO3_7_ODEN ,GPIO3.7 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " IO3_6_ODEN ,GPIO3.6 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " IO3_5_ODEN ,GPIO3.5 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " IO3_4_ODEN ,GPIO3.4 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " IO3_3_ODEN ,GPIO3.3 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " IO3_2_ODEN ,GPIO3.2 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " IO3_1_ODEN ,GPIO3.1 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " IO3_0_ODEN ,GPIO3.0 Open-Drain Enable/Disable" "Disabled,Enabled"
|
|
tree.end
|
|
width 0xb
|
|
tree.end
|
|
tree "LCD Controller"
|
|
base ad:0x400D0000
|
|
width 10.
|
|
rgroup.long 0x000++0x3
|
|
line.long 0x00 "LCD_IDR,LCD ID Register"
|
|
hexmask.long 0x00 0.--25. 1. " IDCODE[25:0] ,Identification Code Register"
|
|
group.long 0x004++0x3
|
|
line.long 0x00 "LCD_CEDR,LCD Clock Enable/Disable Register"
|
|
bitfld.long 0x00 0. " CEN ,LCD Clock Enable" "Disabled,Enabled"
|
|
wgroup.long 0x008++0x3
|
|
line.long 0x00 "LCD_SRR,LCD Software Reset Register"
|
|
bitfld.long 0x00 0. " SWRST ,LCD Software Reset" "No effect,Reset"
|
|
group.long 0x00c++0x3
|
|
line.long 0x00 "LCD_CR,LCD Control Register"
|
|
sif (cpu()=="S3FN41F")
|
|
bitfld.long 0x00 20.--23. " CONSTRASTLEVEL[3:0] ,LCD Contrast Level Control" "1/16 step,2/16 step,3/16 step,4/16 step,5/16 step,6/16 step,7/16 step,8/16 step,9/16 step,10/16 step,11/16 step,12/16 step,13/16 step,14/16 step,15/16 step,16"
|
|
bitfld.long 0x00 17. " DIMINISHEN ,LCD Dividing Resistors Selection" "Normal,Diminish"
|
|
bitfld.long 0x00 16. " CONTRASTEN ,Contrast Control Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
sif (cpu()=="S3FN41F")
|
|
bitfld.long 0x00 8.--10. " BSEL[2:0] ,Duty and Bias Selection Field" "Static mode,1/2 Duty and 1/2 Bias,1/3 Duty and 1/2 Bias,1/3 Duty and 1/3 Bias,1/4 Duty and 1/3 Bias,1/8 Duty and 1/4 Bias,?..."
|
|
textline " "
|
|
else
|
|
bitfld.long 0x00 8.--10. " BSEL[2:0] ,Duty and Bias Selection Field" "Static mode,1/2 Duty and 1/2 Bias,1/3 Duty and 1/2 Bias,1/3 Duty and 1/3 Bias,1/4 Duty and 1/3 Bias,?..."
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 4. " BTSEL ,Bias Type Selection" "Internal,External"
|
|
bitfld.long 0x00 1.--2. " DISC[1:0] ,LCD Display Control Field" "Off,On,Normal,?..."
|
|
bitfld.long 0x00 0. " LCDEN ,LCD Enable/Disable Control" "Disabled,Enabled"
|
|
group.long 0x010++0x3
|
|
line.long 0x00 "LCD_CDR,LCD Clock Divide Register"
|
|
hexmask.long.word 0x00 8.--23. 1. " CPRE[15:0] ,LCD Clock Pre-scaler Value"
|
|
bitfld.long 0x00 7. " CDC ,Clock Divider Control" "Same as fLCDCLK,Calculated"
|
|
bitfld.long 0x00 0.--2. " CDIV[3:0] ,LCD Clock Dividing Value" "1,2,3,4,5,6,7,8"
|
|
group.long 0x400++0x9f
|
|
line.long 0x0 "LCD_DMR0 ,LCD Display Memory Register 0 "
|
|
sif (cpu()=="S3FN41F")
|
|
bitfld.long 0x0 7. " SEG0 COM7 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x0 6. " SEG0 COM6 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x0 5. " SEG0 COM5 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x0 4. " SEG0 COM4 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x0 3. " SEG0 COM3 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x0 2. " SEG0 COM2 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x0 1. " SEG0 COM1 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x0 0. " SEG0 COM0 ,Display Memory Control" "Off,On"
|
|
line.long 0x4 "LCD_DMR1 ,LCD Display Memory Register 1 "
|
|
sif (cpu()=="S3FN41F")
|
|
bitfld.long 0x4 7. " SEG1 COM7 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x4 6. " SEG1 COM6 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x4 5. " SEG1 COM5 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x4 4. " SEG1 COM4 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x4 3. " SEG1 COM3 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x4 2. " SEG1 COM2 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x4 1. " SEG1 COM1 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x4 0. " SEG1 COM0 ,Display Memory Control" "Off,On"
|
|
line.long 0x8 "LCD_DMR2 ,LCD Display Memory Register 2 "
|
|
sif (cpu()=="S3FN41F")
|
|
bitfld.long 0x8 7. " SEG2 COM7 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x8 6. " SEG2 COM6 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x8 5. " SEG2 COM5 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x8 4. " SEG2 COM4 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x8 3. " SEG2 COM3 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x8 2. " SEG2 COM2 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x8 1. " SEG2 COM1 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x8 0. " SEG2 COM0 ,Display Memory Control" "Off,On"
|
|
line.long 0xC "LCD_DMR3 ,LCD Display Memory Register 3 "
|
|
sif (cpu()=="S3FN41F")
|
|
bitfld.long 0xC 7. " SEG3 COM7 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0xC 6. " SEG3 COM6 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0xC 5. " SEG3 COM5 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0xC 4. " SEG3 COM4 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0xC 3. " SEG3 COM3 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0xC 2. " SEG3 COM2 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0xC 1. " SEG3 COM1 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0xC 0. " SEG3 COM0 ,Display Memory Control" "Off,On"
|
|
line.long 0x10 "LCD_DMR4 ,LCD Display Memory Register 4 "
|
|
sif (cpu()=="S3FN41F")
|
|
bitfld.long 0x10 7. " SEG4 COM7 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x10 6. " SEG4 COM6 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x10 5. " SEG4 COM5 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x10 4. " SEG4 COM4 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x10 3. " SEG4 COM3 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x10 2. " SEG4 COM2 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x10 1. " SEG4 COM1 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x10 0. " SEG4 COM0 ,Display Memory Control" "Off,On"
|
|
line.long 0x14 "LCD_DMR5 ,LCD Display Memory Register 5 "
|
|
sif (cpu()=="S3FN41F")
|
|
bitfld.long 0x14 7. " SEG5 COM7 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x14 6. " SEG5 COM6 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x14 5. " SEG5 COM5 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x14 4. " SEG5 COM4 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x14 3. " SEG5 COM3 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x14 2. " SEG5 COM2 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x14 1. " SEG5 COM1 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x14 0. " SEG5 COM0 ,Display Memory Control" "Off,On"
|
|
line.long 0x18 "LCD_DMR6 ,LCD Display Memory Register 6 "
|
|
sif (cpu()=="S3FN41F")
|
|
bitfld.long 0x18 7. " SEG6 COM7 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x18 6. " SEG6 COM6 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x18 5. " SEG6 COM5 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x18 4. " SEG6 COM4 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x18 3. " SEG6 COM3 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x18 2. " SEG6 COM2 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x18 1. " SEG6 COM1 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x18 0. " SEG6 COM0 ,Display Memory Control" "Off,On"
|
|
line.long 0x1C "LCD_DMR7 ,LCD Display Memory Register 7 "
|
|
sif (cpu()=="S3FN41F")
|
|
bitfld.long 0x1C 7. " SEG7 COM7 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x1C 6. " SEG7 COM6 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x1C 5. " SEG7 COM5 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x1C 4. " SEG7 COM4 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x1C 3. " SEG7 COM3 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x1C 2. " SEG7 COM2 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x1C 1. " SEG7 COM1 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x1C 0. " SEG7 COM0 ,Display Memory Control" "Off,On"
|
|
line.long 0x20 "LCD_DMR8 ,LCD Display Memory Register 8 "
|
|
sif (cpu()=="S3FN41F")
|
|
bitfld.long 0x20 7. " SEG8 COM7 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x20 6. " SEG8 COM6 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x20 5. " SEG8 COM5 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x20 4. " SEG8 COM4 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x20 3. " SEG8 COM3 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x20 2. " SEG8 COM2 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x20 1. " SEG8 COM1 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x20 0. " SEG8 COM0 ,Display Memory Control" "Off,On"
|
|
line.long 0x24 "LCD_DMR9 ,LCD Display Memory Register 9 "
|
|
sif (cpu()=="S3FN41F")
|
|
bitfld.long 0x24 7. " SEG9 COM7 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x24 6. " SEG9 COM6 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x24 5. " SEG9 COM5 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x24 4. " SEG9 COM4 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x24 3. " SEG9 COM3 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x24 2. " SEG9 COM2 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x24 1. " SEG9 COM1 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x24 0. " SEG9 COM0 ,Display Memory Control" "Off,On"
|
|
line.long 0x28 "LCD_DMR10,LCD Display Memory Register 10"
|
|
sif (cpu()=="S3FN41F")
|
|
bitfld.long 0x28 7. " SEG10COM7 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x28 6. " SEG10COM6 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x28 5. " SEG10COM5 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x28 4. " SEG10COM4 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x28 3. " SEG10COM3 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x28 2. " SEG10COM2 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x28 1. " SEG10COM1 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x28 0. " SEG10COM0 ,Display Memory Control" "Off,On"
|
|
line.long 0x2C "LCD_DMR11,LCD Display Memory Register 11"
|
|
sif (cpu()=="S3FN41F")
|
|
bitfld.long 0x2C 7. " SEG11COM7 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x2C 6. " SEG11COM6 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x2C 5. " SEG11COM5 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x2C 4. " SEG11COM4 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x2C 3. " SEG11COM3 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x2C 2. " SEG11COM2 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x2C 1. " SEG11COM1 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x2C 0. " SEG11COM0 ,Display Memory Control" "Off,On"
|
|
line.long 0x30 "LCD_DMR12,LCD Display Memory Register 12"
|
|
sif (cpu()=="S3FN41F")
|
|
bitfld.long 0x30 7. " SEG12COM7 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x30 6. " SEG12COM6 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x30 5. " SEG12COM5 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x30 4. " SEG12COM4 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x30 3. " SEG12COM3 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x30 2. " SEG12COM2 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x30 1. " SEG12COM1 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x30 0. " SEG12COM0 ,Display Memory Control" "Off,On"
|
|
line.long 0x34 "LCD_DMR13,LCD Display Memory Register 13"
|
|
sif (cpu()=="S3FN41F")
|
|
bitfld.long 0x34 7. " SEG13COM7 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x34 6. " SEG13COM6 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x34 5. " SEG13COM5 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x34 4. " SEG13COM4 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x34 3. " SEG13COM3 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x34 2. " SEG13COM2 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x34 1. " SEG13COM1 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x34 0. " SEG13COM0 ,Display Memory Control" "Off,On"
|
|
line.long 0x38 "LCD_DMR14,LCD Display Memory Register 14"
|
|
sif (cpu()=="S3FN41F")
|
|
bitfld.long 0x38 7. " SEG14COM7 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x38 6. " SEG14COM6 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x38 5. " SEG14COM5 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x38 4. " SEG14COM4 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x38 3. " SEG14COM3 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x38 2. " SEG14COM2 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x38 1. " SEG14COM1 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x38 0. " SEG14COM0 ,Display Memory Control" "Off,On"
|
|
line.long 0x3C "LCD_DMR15,LCD Display Memory Register 15"
|
|
sif (cpu()=="S3FN41F")
|
|
bitfld.long 0x3C 7. " SEG15COM7 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x3C 6. " SEG15COM6 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x3C 5. " SEG15COM5 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x3C 4. " SEG15COM4 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x3C 3. " SEG15COM3 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x3C 2. " SEG15COM2 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x3C 1. " SEG15COM1 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x3C 0. " SEG15COM0 ,Display Memory Control" "Off,On"
|
|
line.long 0x40 "LCD_DMR16,LCD Display Memory Register 16"
|
|
sif (cpu()=="S3FN41F")
|
|
bitfld.long 0x40 7. " SEG16COM7 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x40 6. " SEG16COM6 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x40 5. " SEG16COM5 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x40 4. " SEG16COM4 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x40 3. " SEG16COM3 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x40 2. " SEG16COM2 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x40 1. " SEG16COM1 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x40 0. " SEG16COM0 ,Display Memory Control" "Off,On"
|
|
line.long 0x44 "LCD_DMR17,LCD Display Memory Register 17"
|
|
sif (cpu()=="S3FN41F")
|
|
bitfld.long 0x44 7. " SEG17COM7 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x44 6. " SEG17COM6 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x44 5. " SEG17COM5 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x44 4. " SEG17COM4 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x44 3. " SEG17COM3 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x44 2. " SEG17COM2 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x44 1. " SEG17COM1 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x44 0. " SEG17COM0 ,Display Memory Control" "Off,On"
|
|
line.long 0x48 "LCD_DMR18,LCD Display Memory Register 18"
|
|
sif (cpu()=="S3FN41F")
|
|
bitfld.long 0x48 7. " SEG18COM7 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x48 6. " SEG18COM6 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x48 5. " SEG18COM5 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x48 4. " SEG18COM4 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x48 3. " SEG18COM3 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x48 2. " SEG18COM2 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x48 1. " SEG18COM1 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x48 0. " SEG18COM0 ,Display Memory Control" "Off,On"
|
|
line.long 0x4C "LCD_DMR19,LCD Display Memory Register 19"
|
|
sif (cpu()=="S3FN41F")
|
|
bitfld.long 0x4C 7. " SEG19COM7 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x4C 6. " SEG19COM6 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x4C 5. " SEG19COM5 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x4C 4. " SEG19COM4 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x4C 3. " SEG19COM3 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x4C 2. " SEG19COM2 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x4C 1. " SEG19COM1 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x4C 0. " SEG19COM0 ,Display Memory Control" "Off,On"
|
|
line.long 0x50 "LCD_DMR20,LCD Display Memory Register 20"
|
|
sif (cpu()=="S3FN41F")
|
|
bitfld.long 0x50 7. " SEG20COM7 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x50 6. " SEG20COM6 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x50 5. " SEG20COM5 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x50 4. " SEG20COM4 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x50 3. " SEG20COM3 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x50 2. " SEG20COM2 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x50 1. " SEG20COM1 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x50 0. " SEG20COM0 ,Display Memory Control" "Off,On"
|
|
line.long 0x54 "LCD_DMR21,LCD Display Memory Register 21"
|
|
sif (cpu()=="S3FN41F")
|
|
bitfld.long 0x54 7. " SEG21COM7 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x54 6. " SEG21COM6 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x54 5. " SEG21COM5 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x54 4. " SEG21COM4 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x54 3. " SEG21COM3 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x54 2. " SEG21COM2 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x54 1. " SEG21COM1 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x54 0. " SEG21COM0 ,Display Memory Control" "Off,On"
|
|
line.long 0x58 "LCD_DMR22,LCD Display Memory Register 22"
|
|
sif (cpu()=="S3FN41F")
|
|
bitfld.long 0x58 7. " SEG22COM7 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x58 6. " SEG22COM6 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x58 5. " SEG22COM5 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x58 4. " SEG22COM4 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x58 3. " SEG22COM3 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x58 2. " SEG22COM2 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x58 1. " SEG22COM1 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x58 0. " SEG22COM0 ,Display Memory Control" "Off,On"
|
|
line.long 0x5C "LCD_DMR23,LCD Display Memory Register 23"
|
|
sif (cpu()=="S3FN41F")
|
|
bitfld.long 0x5C 7. " SEG23COM7 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x5C 6. " SEG23COM6 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x5C 5. " SEG23COM5 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x5C 4. " SEG23COM4 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x5C 3. " SEG23COM3 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x5C 2. " SEG23COM2 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x5C 1. " SEG23COM1 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x5C 0. " SEG23COM0 ,Display Memory Control" "Off,On"
|
|
line.long 0x60 "LCD_DMR24,LCD Display Memory Register 24"
|
|
sif (cpu()=="S3FN41F")
|
|
bitfld.long 0x60 7. " SEG24COM7 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x60 6. " SEG24COM6 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x60 5. " SEG24COM5 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x60 4. " SEG24COM4 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x60 3. " SEG24COM3 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x60 2. " SEG24COM2 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x60 1. " SEG24COM1 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x60 0. " SEG24COM0 ,Display Memory Control" "Off,On"
|
|
line.long 0x64 "LCD_DMR25,LCD Display Memory Register 25"
|
|
sif (cpu()=="S3FN41F")
|
|
bitfld.long 0x64 7. " SEG25COM7 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x64 6. " SEG25COM6 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x64 5. " SEG25COM5 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x64 4. " SEG25COM4 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x64 3. " SEG25COM3 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x64 2. " SEG25COM2 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x64 1. " SEG25COM1 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x64 0. " SEG25COM0 ,Display Memory Control" "Off,On"
|
|
line.long 0x68 "LCD_DMR26,LCD Display Memory Register 26"
|
|
sif (cpu()=="S3FN41F")
|
|
bitfld.long 0x68 7. " SEG26COM7 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x68 6. " SEG26COM6 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x68 5. " SEG26COM5 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x68 4. " SEG26COM4 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x68 3. " SEG26COM3 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x68 2. " SEG26COM2 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x68 1. " SEG26COM1 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x68 0. " SEG26COM0 ,Display Memory Control" "Off,On"
|
|
line.long 0x6C "LCD_DMR27,LCD Display Memory Register 27"
|
|
sif (cpu()=="S3FN41F")
|
|
bitfld.long 0x6C 7. " SEG27COM7 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x6C 6. " SEG27COM6 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x6C 5. " SEG27COM5 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x6C 4. " SEG27COM4 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x6C 3. " SEG27COM3 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x6C 2. " SEG27COM2 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x6C 1. " SEG27COM1 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x6C 0. " SEG27COM0 ,Display Memory Control" "Off,On"
|
|
line.long 0x70 "LCD_DMR28,LCD Display Memory Register 28"
|
|
sif (cpu()=="S3FN41F")
|
|
bitfld.long 0x70 7. " SEG28COM7 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x70 6. " SEG28COM6 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x70 5. " SEG28COM5 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x70 4. " SEG28COM4 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x70 3. " SEG28COM3 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x70 2. " SEG28COM2 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x70 1. " SEG28COM1 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x70 0. " SEG28COM0 ,Display Memory Control" "Off,On"
|
|
line.long 0x74 "LCD_DMR29,LCD Display Memory Register 29"
|
|
sif (cpu()=="S3FN41F")
|
|
bitfld.long 0x74 7. " SEG29COM7 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x74 6. " SEG29COM6 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x74 5. " SEG29COM5 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x74 4. " SEG29COM4 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x74 3. " SEG29COM3 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x74 2. " SEG29COM2 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x74 1. " SEG29COM1 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x74 0. " SEG29COM0 ,Display Memory Control" "Off,On"
|
|
line.long 0x78 "LCD_DMR30,LCD Display Memory Register 30"
|
|
sif (cpu()=="S3FN41F")
|
|
bitfld.long 0x78 7. " SEG30COM7 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x78 6. " SEG30COM6 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x78 5. " SEG30COM5 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x78 4. " SEG30COM4 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x78 3. " SEG30COM3 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x78 2. " SEG30COM2 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x78 1. " SEG30COM1 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x78 0. " SEG30COM0 ,Display Memory Control" "Off,On"
|
|
line.long 0x7C "LCD_DMR31,LCD Display Memory Register 31"
|
|
sif (cpu()=="S3FN41F")
|
|
bitfld.long 0x7C 7. " SEG31COM7 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x7C 6. " SEG31COM6 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x7C 5. " SEG31COM5 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x7C 4. " SEG31COM4 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x7C 3. " SEG31COM3 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x7C 2. " SEG31COM2 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x7C 1. " SEG31COM1 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x7C 0. " SEG31COM0 ,Display Memory Control" "Off,On"
|
|
line.long 0x80 "LCD_DMR32,LCD Display Memory Register 32"
|
|
sif (cpu()=="S3FN41F")
|
|
bitfld.long 0x80 7. " SEG32COM7 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x80 6. " SEG32COM6 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x80 5. " SEG32COM5 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x80 4. " SEG32COM4 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x80 3. " SEG32COM3 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x80 2. " SEG32COM2 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x80 1. " SEG32COM1 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x80 0. " SEG32COM0 ,Display Memory Control" "Off,On"
|
|
line.long 0x84 "LCD_DMR33,LCD Display Memory Register 33"
|
|
sif (cpu()=="S3FN41F")
|
|
bitfld.long 0x84 7. " SEG33COM7 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x84 6. " SEG33COM6 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x84 5. " SEG33COM5 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x84 4. " SEG33COM4 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x84 3. " SEG33COM3 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x84 2. " SEG33COM2 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x84 1. " SEG33COM1 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x84 0. " SEG33COM0 ,Display Memory Control" "Off,On"
|
|
line.long 0x88 "LCD_DMR34,LCD Display Memory Register 34"
|
|
sif (cpu()=="S3FN41F")
|
|
bitfld.long 0x88 7. " SEG34COM7 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x88 6. " SEG34COM6 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x88 5. " SEG34COM5 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x88 4. " SEG34COM4 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x88 3. " SEG34COM3 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x88 2. " SEG34COM2 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x88 1. " SEG34COM1 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x88 0. " SEG34COM0 ,Display Memory Control" "Off,On"
|
|
line.long 0x8C "LCD_DMR35,LCD Display Memory Register 35"
|
|
sif (cpu()=="S3FN41F")
|
|
bitfld.long 0x8C 7. " SEG35COM7 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x8C 6. " SEG35COM6 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x8C 5. " SEG35COM5 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x8C 4. " SEG35COM4 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x8C 3. " SEG35COM3 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x8C 2. " SEG35COM2 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x8C 1. " SEG35COM1 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x8C 0. " SEG35COM0 ,Display Memory Control" "Off,On"
|
|
line.long 0x90 "LCD_DMR36,LCD Display Memory Register 36"
|
|
sif (cpu()=="S3FN41F")
|
|
bitfld.long 0x90 7. " SEG36COM7 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x90 6. " SEG36COM6 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x90 5. " SEG36COM5 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x90 4. " SEG36COM4 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x90 3. " SEG36COM3 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x90 2. " SEG36COM2 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x90 1. " SEG36COM1 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x90 0. " SEG36COM0 ,Display Memory Control" "Off,On"
|
|
line.long 0x94 "LCD_DMR37,LCD Display Memory Register 37"
|
|
sif (cpu()=="S3FN41F")
|
|
bitfld.long 0x94 7. " SEG37COM7 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x94 6. " SEG37COM6 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x94 5. " SEG37COM5 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x94 4. " SEG37COM4 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x94 3. " SEG37COM3 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x94 2. " SEG37COM2 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x94 1. " SEG37COM1 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x94 0. " SEG37COM0 ,Display Memory Control" "Off,On"
|
|
line.long 0x98 "LCD_DMR38,LCD Display Memory Register 38"
|
|
sif (cpu()=="S3FN41F")
|
|
bitfld.long 0x98 7. " SEG38COM7 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x98 6. " SEG38COM6 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x98 5. " SEG38COM5 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x98 4. " SEG38COM4 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x98 3. " SEG38COM3 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x98 2. " SEG38COM2 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x98 1. " SEG38COM1 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x98 0. " SEG38COM0 ,Display Memory Control" "Off,On"
|
|
line.long 0x9C "LCD_DMR39,LCD Display Memory Register 39"
|
|
sif (cpu()=="S3FN41F")
|
|
bitfld.long 0x9C 7. " SEG39COM7 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x9C 6. " SEG39COM6 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x9C 5. " SEG39COM5 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x9C 4. " SEG39COM4 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x9C 3. " SEG39COM3 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x9C 2. " SEG39COM2 ,Display Memory Control" "Off,On"
|
|
bitfld.long 0x9C 1. " SEG39COM1 ,Display Memory Control" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x9C 0. " SEG39COM0 ,Display Memory Control" "Off,On"
|
|
width 0xb
|
|
tree.end
|
|
tree "Operational Amplifier (OPAMP)"
|
|
base ad:0x40042000
|
|
width 11.
|
|
rgroup.long 0x00++0x3
|
|
line.long 0x00 "OPA_IDR,OP-AMP ID Register"
|
|
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "OPA_IDR,OP-AMP ID Register"
|
|
bitfld.long 0x00 0. " CLKEN ,Clock Enable/ Disable Control" "Disabled,Enabled"
|
|
wgroup.long 0x08++0x3
|
|
line.long 0x00 "OPA_SRR,OPAMP Software Reset Register"
|
|
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "OPA_CR0,OPAMP Control Register 0"
|
|
bitfld.long 0x00 12. " OPAM4 ,OPAMP Mode Selection" "Off ADC,On Chip"
|
|
bitfld.long 0x00 11. " OPAM3 ,OPAMP Mode Selection" "Off ADC,On Chip"
|
|
bitfld.long 0x00 10. " OPAM2 ,OPAMP Mode Selection" "Off ADC,On Chip"
|
|
textline " "
|
|
bitfld.long 0x00 9. " OPAM1 ,OPAMP Mode Selection" "Off ADC,On Chip"
|
|
bitfld.long 0x00 8. " OPAM0 ,OPAMP Mode Selection" "Off ADC,On Chip"
|
|
bitfld.long 0x00 4. " OPA4 ,OP-AMP Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " OPA3 ,OP-AMP Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " OPA2 ,OP-AMP Enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " OPA1 ,OP-AMP Enabled" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " OPA0 ,OP-AMP Enabled" "Disabled,Enabled"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "OPA_CR1,OPAMP Control Register 1"
|
|
bitfld.long 0x00 24.--26. " OPAFILTER[2:0] ,OPAMP Edge Detection Filter Selection" "Bypass,PCLK/1,PCLK/16,PCLK/64,PCLK/128,PCLK/256,PCLK/512,PCLK/1024"
|
|
bitfld.long 0x00 20. " IMC1OPAEDGEEN4 ,OPAMP Edge Detection for IMC1 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " IMC1OPAEDGEEN3 ,OPAMP Edge Detection for IMC1 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " IMC1OPAEDGEEN2 ,OPAMP Edge Detection for IMC1 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " IMC1OPAEDGEEN1 ,OPAMP Edge Detection for IMC1 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " IMC1OPAEDGEEN0 ,OPAMP Edge Detection for IMC1 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " IMC0OPAEDGEEN4 ,OPAMP Edge Detection for IMC0 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " IMC0OPAEDGEEN3 ,OPAMP Edge Detection for IMC0 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " IMC0OPAEDGEEN2 ,OPAMP Edge Detection for IMC0 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " IMC0OPAEDGEEN1 ,OPAMP Edge Detection for IMC0 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " IMC0OPAEDGEEN0 ,OPAMP Edge Detection for IMC0 Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " OPAEDGESEL4 ,OPAMP Edge Selection" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 3. " OPAEDGESEL3 ,OPAMP Edge Selection" "Falling,Rising"
|
|
bitfld.long 0x00 2. " OPAEDGESEL2 ,OPAMP Edge Selection" "Falling,Rising"
|
|
bitfld.long 0x00 1. " OPAEDGESEL1 ,OPAMP Edge Selection" "Falling,Rising"
|
|
textline " "
|
|
bitfld.long 0x00 0. " OPAEDGESEL0 ,OPAMP Edge Selection" "Falling,Rising"
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "OPA_GCR0,OPAMP Gain Control Register 0"
|
|
bitfld.long 0x00 31. " GCT3 ,OP-AMP Gain Control Type Selection" "External,Internal"
|
|
bitfld.long 0x00 24.--27. " GV3 ,Channel 3 OP-AMP Gain Value Field" "x2.32,x2.47,x2.62,x2.76,x3.06,x3.35,x3.65,x4.09,x4.53,x5.04,x5.92,x7.09,x8.86,?..."
|
|
bitfld.long 0x00 23. " GCT2 ,OP-AMP Gain Control Type Selection" "External,Internal"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " GV2 ,Channel 2 OP-AMP Gain Value Field" "x2.32,x2.47,x2.62,x2.76,x3.06,x3.35,x3.65,x4.09,x4.53,x5.04,x5.92,x7.09,x8.86,?..."
|
|
bitfld.long 0x00 15. " GCT1 ,OP-AMP Gain Control Type Selection" "External,Internal"
|
|
bitfld.long 0x00 8.--11. " GV1 ,Channel 1 OP-AMP Gain Value Field" "x2.32,x2.47,x2.62,x2.76,x3.06,x3.35,x3.65,x4.09,x4.53,x5.04,x5.92,x7.09,x8.86,?..."
|
|
textline " "
|
|
bitfld.long 0x00 7. " GCT0 ,OP-AMP Gain Control Type Selection" "External,Internal"
|
|
bitfld.long 0x00 0.--3. " GV0 ,Channel 0 OP-AMP Gain Value Field" "x2.32,x2.47,x2.62,x2.76,x3.06,x3.35,x3.65,x4.09,x4.53,x5.04,x5.92,x7.09,x8.86,?..."
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "OPA_GCR1,OPAMP Gain Control Register 1"
|
|
bitfld.long 0x00 7. " GCT4 ,OP-AMP Gain Control Type Selection" "External,Internal"
|
|
bitfld.long 0x00 0.--3. " GV4 ,Channel 4 OP-AMP Gain Value Field" "x2.32,x2.47,x2.62,x2.76,x3.06,x3.35,x3.65,x4.09,x4.53,x5.04,x5.92,x7.09,x8.86,?..."
|
|
group.long 0x1c++0x3
|
|
line.long 0x00 "OPA_IMSCR,OPAMP Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x00 4. " EDGEDET4 ,Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 3. " EDGEDET3 ,Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " EDGEDET2 ,Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EDGEDET1 ,Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 0. " EDGEDET0 ,Edge Detection Interrupt Mask" "Masked,Not masked"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x00 "OPA_RISR,OPAMP Raw Interrupt Status Register"
|
|
bitfld.long 0x00 4. " EDGEDET4 ,Edge Detection Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " EDGEDET3 ,Edge Detection Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " EDGEDET2 ,Edge Detection Raw Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EDGEDET1 ,Edge Detection Raw Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " EDGEDET0 ,Edge Detection Raw Interrupt Status" "Not occurred,Occurred"
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "OPA_MISR,OPAMP Masked Interrupt Status Register"
|
|
bitfld.long 0x00 4. " EDGEDET4 ,Edge Detection Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " EDGEDET3 ,Edge Detection Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " EDGEDET2 ,Edge Detection Masked Interrupt Status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EDGEDET1 ,Edge Detection Masked Interrupt Status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " EDGEDET0 ,Edge Detection Masked Interrupt Status" "Not occurred,Occurred"
|
|
wgroup.long 0x28++0x3
|
|
line.long 0x00 "OPA_ICR,OPAMP Interrupt Clear Register"
|
|
bitfld.long 0x00 4. " EDGEDET4 ,Edge Detection Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 3. " EDGEDET3 ,Edge Detection Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 2. " EDGEDET2 ,Edge Detection Interrupt" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EDGEDET1 ,Edge Detection Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 0. " EDGEDET0 ,Edge Detection Interrupt" "No effect,Clear"
|
|
width 0xb
|
|
tree.end
|
|
tree "Program Flash Controller"
|
|
base ad:0x40010000
|
|
width 10.
|
|
rgroup.long 0x00++0x3
|
|
line.long 0x00 "PF_IDR,P-Flash ID Register"
|
|
hexmask.long 0x00 0.--25. 1. " IDCODE ,Identification Code Register"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "PF_CEDR,P-Flash Clock Enable/Disable Register"
|
|
bitfld.long 0x00 0. " CLKEN ,Clock Enable" "Disabled,Enabled"
|
|
wgroup.long 0x08++0x3
|
|
line.long 0x00 "PF_SRR,P-Flash Software Reset Register"
|
|
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "PF_CR,P-Flash Control Register"
|
|
bitfld.long 0x00 4.--6. " CMD[2:0] ,Flash Program/Erase Command Field" "No effect,Normal program,Page erase,Sector erase,Entire flash,Smart option program,Smart option erase,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0. " START ,Operation Start" "No effect,Start"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "PF_MR,P-Flash Mode Register"
|
|
bitfld.long 0x00 8. " PBUFEN ,Pre-Fetch Buffer Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--5. " WAIT[1:0] ,Program Flash Access Wait Cycle" "1,2,3,4"
|
|
bitfld.long 0x00 0. " BACEN ,Boot Area Erase Enable/Disable by Entire Program Memory Erase" "Disabled,Enabled"
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "PF_IMSCR,P-Flash Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x00 10. " ERR2 ,ERR Interrupt Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " ERR1 ,ERR Interrupt Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ERR0 ,ERR Interrupt Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " END ,END Interrupt Enable/Disable" "Disabled,Enabled"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x00 "PF_RISR,P-Flash Raw Interrupt Status Register"
|
|
bitfld.long 0x00 10. " ERR2 ,ERR Interrupt Mask Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " ERR1 ,ERR Interrupt Mask Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ERR0 ,ERR Interrupt Mask Status" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " END ,END Interrupt Mask Status" "Disabled,Enabled"
|
|
rgroup.long 0x1c++0x3
|
|
line.long 0x00 "PF_MISR,P-Flash Raw Interrupt Status Register"
|
|
bitfld.long 0x00 10. " ERR2 ,ERR Interrupt Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " ERR1 ,ERR Interrupt Enable/Disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " ERR0 ,ERR Interrupt Enable/Disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " END ,END Interrupt Enable/Disable" "Disabled,Enabled"
|
|
wgroup.long 0x20++0x3
|
|
line.long 0x00 "PF_ICR,P-Flash Interrupt Clear Register"
|
|
bitfld.long 0x00 10. " ERR2 ,ERR Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 9. " ERR1 ,ERR Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 8. " ERR0 ,ERR Interrupt Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 0. " END ,END Interrupt Clear" "No effect,Clear"
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "PF_SR,P-Flash Status Register"
|
|
bitfld.long 0x00 0. " BUSY ,Busy Status Flag" "Not Busy,Busy"
|
|
group.long 0x28++0x3
|
|
line.long 0x00 "PF_AR,P-Flash Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " ADDR[31:0] ,Program Flash Memory Address"
|
|
group.long 0x2c++0x3
|
|
line.long 0x00 "PF_DR,P-Flash Data Register"
|
|
hexmask.long 0x00 0.--31. 1. " DATA[31:0] ,Data To Write On The Target Address"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "PF_KR,P-Flash Key Register"
|
|
hexmask.long 0x00 0.--31. 1. " KEY[31:0] ,Key Register Value For Program"
|
|
rgroup.long 0x34++0x3
|
|
line.long 0x00 "SO_PSR,Smart Option Protection Status Register"
|
|
bitfld.long 0x00 27. " nRDP ,Read Protection Status Flag" "Enabled,Disabled"
|
|
bitfld.long 0x00 23. " HWPA11 ,Hardware Protection Area 11" "Not protected,Protected"
|
|
bitfld.long 0x00 22. " HWPA10 ,Hardware Protection Area 10" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 21. " HWPA9 ,Hardware Protection Area 9" "Not protected,Protected"
|
|
bitfld.long 0x00 20. " HWPA8 ,Hardware Protection Area 8" "Not protected,Protected"
|
|
bitfld.long 0x00 17. " nHWP ,Hardware Protection Status Flag" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " HWPA7 ,Hardware Protection Area 7" "Not protected,Protected"
|
|
bitfld.long 0x00 14. " HWPA6 ,Hardware Protection Area 6" "Not protected,Protected"
|
|
bitfld.long 0x00 13. " HWPA5 ,Hardware Protection Area 5" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 12. " HWPA4 ,Hardware Protection Area 4" "Not protected,Protected"
|
|
bitfld.long 0x00 8. " nJTAGP ,JTAG Protection Status Flag" "Enabled,Disabled"
|
|
bitfld.long 0x00 7. " HWPA3 ,Hardware Protection Area 3" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 6. " HWPA2 ,Hardware Protection Area 2" "Not protected,Protected"
|
|
bitfld.long 0x00 5. " HWPA1 ,Hardware Protection Area 1" "Not protected,Protected"
|
|
bitfld.long 0x00 4. " HWPA0 ,Hardware Protection Area 0" "Not protected,Protected"
|
|
rgroup.long 0x38++0x3
|
|
line.long 0x00 "SO_CSR,Smart Option Configuration Status Register"
|
|
bitfld.long 0x00 12.--15. " BTDIV ,Basic timer divider selection bit in the reset time" "Reserved,Reserved,Reserved,1,2,4,8,16,32,64,128,256,512,1024,2048,4096"
|
|
bitfld.long 0x00 6.--7. " IMSEL ,Internal Main OSC Frequency Selection Field" "Reserved,8MHz,16MHz,20MHz"
|
|
bitfld.long 0x00 0.--1. " POCCS ,Power-On System Clock Source Selection Field" "ESCLK,EMCLK,ISCLK,IMCLK"
|
|
group.long 0x3c++0x3
|
|
line.long 0x00 "PF_IOTR,Internal OSC Trimming Register"
|
|
hexmask.long.byte 0x00 0.--6. 1. " OSC0[6:0] ,Internal Oscillator 0 (20MHz) Trim Value"
|
|
hexmask.long.byte 0x00 8.--14. 1. " OSC1[6:0] ,Internal Oscillator 1(8/16MHz) Trim Value"
|
|
hexmask.long.byte 0x00 16.--21. 1. " OSC2[5:0] ,Internal Oscillator 2(32.768KHz) Trim Value"
|
|
textline " "
|
|
hexmask.long.byte 0x00 24.--31. 1. " IOTKEY[7:0] ,Key for write access into the PF_IOTR register"
|
|
width 0xb
|
|
tree.end
|
|
tree.open "Pulse Width Modulation (PWM)"
|
|
tree "PWM0"
|
|
base ad:0x40070000
|
|
width 11.
|
|
rgroup.long 0x00++0x3
|
|
line.long 0x00 "PWM_IDR,PWM ID Register"
|
|
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "PWM_CEDR,PWM Clock Enable/Disable Register"
|
|
bitfld.long 0x00 31. " DBGEN ,Debug mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CLKEN ,Clock Enable" "Disabled,Enabled"
|
|
wgroup.long 0x08++0x3
|
|
line.long 0x00 "PWM_SRR,PWM Software Reset Register"
|
|
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
|
|
wgroup.long 0x0c++0x3
|
|
line.long 0x00 "PWM_CSR,PWM Control Set Register"
|
|
bitfld.long 0x00 29. " PWMEX5 ,PWM Extension Control" "No effect,Include"
|
|
bitfld.long 0x00 28. " PWMEX4 ,PWM Extension Control" "No effect,Include"
|
|
bitfld.long 0x00 27. " PWMEX3 ,PWM Extension Control" "No effect,Include"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PWMEX2 ,PWM Extension Control" "No effect,Include"
|
|
bitfld.long 0x00 25. " PWMEX1 ,PWM Extension Control" "No effect,Include"
|
|
bitfld.long 0x00 24. " PWMEX0 ,PWM Extension Control" "No effect,Include"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PWMIM ,PWM Interval Mode" "No effect,PWM mode"
|
|
bitfld.long 0x00 10. " KEEP ,Keep Last Period State" "No effect,Kept"
|
|
bitfld.long 0x00 9. " OUTSL ,PWM Output Start Level" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x00 8. " IDLESL ,Idle State Level" "No effect,Idle"
|
|
bitfld.long 0x00 1. " UPDATE ,Update PWM Parameter" "No effect,Update"
|
|
bitfld.long 0x00 0. " START ,Start PWM" "No effect,Start"
|
|
wgroup.long 0x10++0x3
|
|
line.long 0x00 "PWM_CCR,PWM Control Clear Register"
|
|
bitfld.long 0x00 29. " PWMEX5 ,PWM Extension Control" "No effect,Delete"
|
|
bitfld.long 0x00 28. " PWMEX4 ,PWM Extension Control" "No effect,Delete"
|
|
bitfld.long 0x00 27. " PWMEX3 ,PWM Extension Control" "No effect,Delete"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PWMEX2 ,PWM Extension Control" "No effect,Delete"
|
|
bitfld.long 0x00 25. " PWMEX1 ,PWM Extension Control" "No effect,Delete"
|
|
bitfld.long 0x00 24. " PWMEX0 ,PWM Extension Control" "No effect,Delete"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PWMIM ,PWM Interval Mode" "No effect,Interval mode"
|
|
bitfld.long 0x00 10. " KEEP ,Keep Last Period State" "No effect,Kept"
|
|
bitfld.long 0x00 9. " OUTSL ,PWM Start Level" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x00 8. " IDLESL ,Idle State Level" "No effect,Idle"
|
|
bitfld.long 0x00 0. " START ,Start PWM" "No effect,Stop"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x00 "PWM_SR,PWM Status Register"
|
|
bitfld.long 0x00 29. " PWMEX5 ,PWM Extension Control" "Not effective,Effective"
|
|
bitfld.long 0x00 28. " PWMEX4 ,PWM Extension Control" "Not effective,Effective"
|
|
bitfld.long 0x00 27. " PWMEX3 ,PWM Extension Control" "Not effective,Effective"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PWMEX2 ,PWM Extension Control" "Not effective,Effective"
|
|
bitfld.long 0x00 25. " PWMEX1 ,PWM Extension Control" "Not effective,Effective"
|
|
bitfld.long 0x00 24. " PWMEX0 ,PWM Extension Control" "Not effective,Effective"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PWMIM ,PWM Output Mode Status" "PWM mode,Interval mode"
|
|
bitfld.long 0x00 10. " KEEP ,Keep Last Period Status" "Not kept,Kept"
|
|
bitfld.long 0x00 9. " OUTSL ,PWM Output Start Level Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 8. " IDLESL ,Idle State PWM Output Level Status" "Low,High"
|
|
bitfld.long 0x00 0. " START ,PWM start/stop status" "Stopped,Started"
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "PWM_IMSCR,PWM Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x00 4. " PMATCH ,Pulse Match Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 3. " PEND ,Period End Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " PSTART ,Period Start Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PWMSTOP ,PWM Stop Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 0. " PWMSTART ,PWM Start Interrupt Mask" "Masked,Not masked"
|
|
rgroup.long 0x1c++0x3
|
|
line.long 0x00 "PWM_RISR,PWM Raw Interrupt Status Register"
|
|
bitfld.long 0x00 4. " PMATCH ,Pulse Match Raw Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " PEND ,Period End Raw Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " PSTART ,Period Start Raw Interrupt State" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PWMSTOP ,PWM Stop Raw Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " PWMSTART ,PWM Start Raw Interrupt State" "Not occurred,Occurred"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x00 "PWM_MISR,PWM Masked Interrupt Status Register"
|
|
bitfld.long 0x00 4. " PMATCH ,Pulse Match Masked Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " PEND ,Period End Masked Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " PSTART ,Period Start Masked Interrupt State" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PWMSTOP ,PWM Stop Masked Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " PWMSTART ,PWM Start Masked Interrupt State" "Not occurred,Occurred"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x00 "PWM_MISR,PWM Masked Interrupt Status Register"
|
|
bitfld.long 0x00 4. " PMATCH ,PWM Counter value is matched with Pulse value Status" "No effect,Clear"
|
|
bitfld.long 0x00 3. " PEND ,PWM Period Ended Interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 2. " PSTART ,PWM Period Started Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PWMSTOP ,PWM Stopped Interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " PWMSTART ,PWM Started Interrupt clear" "No effect,Clear"
|
|
group.long 0x28++0x3
|
|
line.long 0x00 "PWM_CDR,PWM Clock Divider Register"
|
|
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock Divider"
|
|
bitfld.long 0x00 0.--3. " DIVN ,Clock Divider" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
|
|
group.long 0x2C++0x3
|
|
line.long 0x00 "PWM_PRDR,PWM Period Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PERIOD ,PWM Period Value"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "PWM_PULR,PWM Pulse Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PULSE ,PWM Pulse Value"
|
|
rgroup.long 0x34++0x3
|
|
line.long 0x00 "PWM_CCDR,PWM Current Clock Divider Register"
|
|
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock Divider"
|
|
bitfld.long 0x00 0.--3. " DIVN ,Clock Divider" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
|
|
rgroup.long 0x38++0x3
|
|
line.long 0x00 "PWM_CPRDR,PWM Current Period Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PERIOD ,PWM Current Period Value"
|
|
rgroup.long 0x3c++0x3
|
|
line.long 0x00 "PWM_CPULR,PWM Current Pulse Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PULSE ,PWM Current Pulse Value"
|
|
width 0xb
|
|
tree.end
|
|
tree "PWM1"
|
|
base ad:0x40071000
|
|
width 11.
|
|
rgroup.long 0x00++0x3
|
|
line.long 0x00 "PWM_IDR,PWM ID Register"
|
|
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "PWM_CEDR,PWM Clock Enable/Disable Register"
|
|
bitfld.long 0x00 31. " DBGEN ,Debug mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CLKEN ,Clock Enable" "Disabled,Enabled"
|
|
wgroup.long 0x08++0x3
|
|
line.long 0x00 "PWM_SRR,PWM Software Reset Register"
|
|
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
|
|
wgroup.long 0x0c++0x3
|
|
line.long 0x00 "PWM_CSR,PWM Control Set Register"
|
|
bitfld.long 0x00 29. " PWMEX5 ,PWM Extension Control" "No effect,Include"
|
|
bitfld.long 0x00 28. " PWMEX4 ,PWM Extension Control" "No effect,Include"
|
|
bitfld.long 0x00 27. " PWMEX3 ,PWM Extension Control" "No effect,Include"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PWMEX2 ,PWM Extension Control" "No effect,Include"
|
|
bitfld.long 0x00 25. " PWMEX1 ,PWM Extension Control" "No effect,Include"
|
|
bitfld.long 0x00 24. " PWMEX0 ,PWM Extension Control" "No effect,Include"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PWMIM ,PWM Interval Mode" "No effect,PWM mode"
|
|
bitfld.long 0x00 10. " KEEP ,Keep Last Period State" "No effect,Kept"
|
|
bitfld.long 0x00 9. " OUTSL ,PWM Output Start Level" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x00 8. " IDLESL ,Idle State Level" "No effect,Idle"
|
|
bitfld.long 0x00 1. " UPDATE ,Update PWM Parameter" "No effect,Update"
|
|
bitfld.long 0x00 0. " START ,Start PWM" "No effect,Start"
|
|
wgroup.long 0x10++0x3
|
|
line.long 0x00 "PWM_CCR,PWM Control Clear Register"
|
|
bitfld.long 0x00 29. " PWMEX5 ,PWM Extension Control" "No effect,Delete"
|
|
bitfld.long 0x00 28. " PWMEX4 ,PWM Extension Control" "No effect,Delete"
|
|
bitfld.long 0x00 27. " PWMEX3 ,PWM Extension Control" "No effect,Delete"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PWMEX2 ,PWM Extension Control" "No effect,Delete"
|
|
bitfld.long 0x00 25. " PWMEX1 ,PWM Extension Control" "No effect,Delete"
|
|
bitfld.long 0x00 24. " PWMEX0 ,PWM Extension Control" "No effect,Delete"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PWMIM ,PWM Interval Mode" "No effect,Interval mode"
|
|
bitfld.long 0x00 10. " KEEP ,Keep Last Period State" "No effect,Kept"
|
|
bitfld.long 0x00 9. " OUTSL ,PWM Start Level" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x00 8. " IDLESL ,Idle State Level" "No effect,Idle"
|
|
bitfld.long 0x00 0. " START ,Start PWM" "No effect,Stop"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x00 "PWM_SR,PWM Status Register"
|
|
bitfld.long 0x00 29. " PWMEX5 ,PWM Extension Control" "Not effective,Effective"
|
|
bitfld.long 0x00 28. " PWMEX4 ,PWM Extension Control" "Not effective,Effective"
|
|
bitfld.long 0x00 27. " PWMEX3 ,PWM Extension Control" "Not effective,Effective"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PWMEX2 ,PWM Extension Control" "Not effective,Effective"
|
|
bitfld.long 0x00 25. " PWMEX1 ,PWM Extension Control" "Not effective,Effective"
|
|
bitfld.long 0x00 24. " PWMEX0 ,PWM Extension Control" "Not effective,Effective"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PWMIM ,PWM Output Mode Status" "PWM mode,Interval mode"
|
|
bitfld.long 0x00 10. " KEEP ,Keep Last Period Status" "Not kept,Kept"
|
|
bitfld.long 0x00 9. " OUTSL ,PWM Output Start Level Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 8. " IDLESL ,Idle State PWM Output Level Status" "Low,High"
|
|
bitfld.long 0x00 0. " START ,PWM start/stop status" "Stopped,Started"
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "PWM_IMSCR,PWM Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x00 4. " PMATCH ,Pulse Match Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 3. " PEND ,Period End Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " PSTART ,Period Start Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PWMSTOP ,PWM Stop Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 0. " PWMSTART ,PWM Start Interrupt Mask" "Masked,Not masked"
|
|
rgroup.long 0x1c++0x3
|
|
line.long 0x00 "PWM_RISR,PWM Raw Interrupt Status Register"
|
|
bitfld.long 0x00 4. " PMATCH ,Pulse Match Raw Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " PEND ,Period End Raw Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " PSTART ,Period Start Raw Interrupt State" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PWMSTOP ,PWM Stop Raw Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " PWMSTART ,PWM Start Raw Interrupt State" "Not occurred,Occurred"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x00 "PWM_MISR,PWM Masked Interrupt Status Register"
|
|
bitfld.long 0x00 4. " PMATCH ,Pulse Match Masked Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " PEND ,Period End Masked Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " PSTART ,Period Start Masked Interrupt State" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PWMSTOP ,PWM Stop Masked Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " PWMSTART ,PWM Start Masked Interrupt State" "Not occurred,Occurred"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x00 "PWM_MISR,PWM Masked Interrupt Status Register"
|
|
bitfld.long 0x00 4. " PMATCH ,PWM Counter value is matched with Pulse value Status" "No effect,Clear"
|
|
bitfld.long 0x00 3. " PEND ,PWM Period Ended Interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 2. " PSTART ,PWM Period Started Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PWMSTOP ,PWM Stopped Interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " PWMSTART ,PWM Started Interrupt clear" "No effect,Clear"
|
|
group.long 0x28++0x3
|
|
line.long 0x00 "PWM_CDR,PWM Clock Divider Register"
|
|
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock Divider"
|
|
bitfld.long 0x00 0.--3. " DIVN ,Clock Divider" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
|
|
group.long 0x2C++0x3
|
|
line.long 0x00 "PWM_PRDR,PWM Period Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PERIOD ,PWM Period Value"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "PWM_PULR,PWM Pulse Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PULSE ,PWM Pulse Value"
|
|
rgroup.long 0x34++0x3
|
|
line.long 0x00 "PWM_CCDR,PWM Current Clock Divider Register"
|
|
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock Divider"
|
|
bitfld.long 0x00 0.--3. " DIVN ,Clock Divider" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
|
|
rgroup.long 0x38++0x3
|
|
line.long 0x00 "PWM_CPRDR,PWM Current Period Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PERIOD ,PWM Current Period Value"
|
|
rgroup.long 0x3c++0x3
|
|
line.long 0x00 "PWM_CPULR,PWM Current Pulse Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PULSE ,PWM Current Pulse Value"
|
|
width 0xb
|
|
tree.end
|
|
tree "PWM2"
|
|
base ad:0x40072000
|
|
width 11.
|
|
rgroup.long 0x00++0x3
|
|
line.long 0x00 "PWM_IDR,PWM ID Register"
|
|
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "PWM_CEDR,PWM Clock Enable/Disable Register"
|
|
bitfld.long 0x00 31. " DBGEN ,Debug mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CLKEN ,Clock Enable" "Disabled,Enabled"
|
|
wgroup.long 0x08++0x3
|
|
line.long 0x00 "PWM_SRR,PWM Software Reset Register"
|
|
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
|
|
wgroup.long 0x0c++0x3
|
|
line.long 0x00 "PWM_CSR,PWM Control Set Register"
|
|
bitfld.long 0x00 29. " PWMEX5 ,PWM Extension Control" "No effect,Include"
|
|
bitfld.long 0x00 28. " PWMEX4 ,PWM Extension Control" "No effect,Include"
|
|
bitfld.long 0x00 27. " PWMEX3 ,PWM Extension Control" "No effect,Include"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PWMEX2 ,PWM Extension Control" "No effect,Include"
|
|
bitfld.long 0x00 25. " PWMEX1 ,PWM Extension Control" "No effect,Include"
|
|
bitfld.long 0x00 24. " PWMEX0 ,PWM Extension Control" "No effect,Include"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PWMIM ,PWM Interval Mode" "No effect,PWM mode"
|
|
bitfld.long 0x00 10. " KEEP ,Keep Last Period State" "No effect,Kept"
|
|
bitfld.long 0x00 9. " OUTSL ,PWM Output Start Level" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x00 8. " IDLESL ,Idle State Level" "No effect,Idle"
|
|
bitfld.long 0x00 1. " UPDATE ,Update PWM Parameter" "No effect,Update"
|
|
bitfld.long 0x00 0. " START ,Start PWM" "No effect,Start"
|
|
wgroup.long 0x10++0x3
|
|
line.long 0x00 "PWM_CCR,PWM Control Clear Register"
|
|
bitfld.long 0x00 29. " PWMEX5 ,PWM Extension Control" "No effect,Delete"
|
|
bitfld.long 0x00 28. " PWMEX4 ,PWM Extension Control" "No effect,Delete"
|
|
bitfld.long 0x00 27. " PWMEX3 ,PWM Extension Control" "No effect,Delete"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PWMEX2 ,PWM Extension Control" "No effect,Delete"
|
|
bitfld.long 0x00 25. " PWMEX1 ,PWM Extension Control" "No effect,Delete"
|
|
bitfld.long 0x00 24. " PWMEX0 ,PWM Extension Control" "No effect,Delete"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PWMIM ,PWM Interval Mode" "No effect,Interval mode"
|
|
bitfld.long 0x00 10. " KEEP ,Keep Last Period State" "No effect,Kept"
|
|
bitfld.long 0x00 9. " OUTSL ,PWM Start Level" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x00 8. " IDLESL ,Idle State Level" "No effect,Idle"
|
|
bitfld.long 0x00 0. " START ,Start PWM" "No effect,Stop"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x00 "PWM_SR,PWM Status Register"
|
|
bitfld.long 0x00 29. " PWMEX5 ,PWM Extension Control" "Not effective,Effective"
|
|
bitfld.long 0x00 28. " PWMEX4 ,PWM Extension Control" "Not effective,Effective"
|
|
bitfld.long 0x00 27. " PWMEX3 ,PWM Extension Control" "Not effective,Effective"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PWMEX2 ,PWM Extension Control" "Not effective,Effective"
|
|
bitfld.long 0x00 25. " PWMEX1 ,PWM Extension Control" "Not effective,Effective"
|
|
bitfld.long 0x00 24. " PWMEX0 ,PWM Extension Control" "Not effective,Effective"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PWMIM ,PWM Output Mode Status" "PWM mode,Interval mode"
|
|
bitfld.long 0x00 10. " KEEP ,Keep Last Period Status" "Not kept,Kept"
|
|
bitfld.long 0x00 9. " OUTSL ,PWM Output Start Level Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 8. " IDLESL ,Idle State PWM Output Level Status" "Low,High"
|
|
bitfld.long 0x00 0. " START ,PWM start/stop status" "Stopped,Started"
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "PWM_IMSCR,PWM Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x00 4. " PMATCH ,Pulse Match Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 3. " PEND ,Period End Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " PSTART ,Period Start Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PWMSTOP ,PWM Stop Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 0. " PWMSTART ,PWM Start Interrupt Mask" "Masked,Not masked"
|
|
rgroup.long 0x1c++0x3
|
|
line.long 0x00 "PWM_RISR,PWM Raw Interrupt Status Register"
|
|
bitfld.long 0x00 4. " PMATCH ,Pulse Match Raw Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " PEND ,Period End Raw Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " PSTART ,Period Start Raw Interrupt State" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PWMSTOP ,PWM Stop Raw Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " PWMSTART ,PWM Start Raw Interrupt State" "Not occurred,Occurred"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x00 "PWM_MISR,PWM Masked Interrupt Status Register"
|
|
bitfld.long 0x00 4. " PMATCH ,Pulse Match Masked Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " PEND ,Period End Masked Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " PSTART ,Period Start Masked Interrupt State" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PWMSTOP ,PWM Stop Masked Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " PWMSTART ,PWM Start Masked Interrupt State" "Not occurred,Occurred"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x00 "PWM_MISR,PWM Masked Interrupt Status Register"
|
|
bitfld.long 0x00 4. " PMATCH ,PWM Counter value is matched with Pulse value Status" "No effect,Clear"
|
|
bitfld.long 0x00 3. " PEND ,PWM Period Ended Interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 2. " PSTART ,PWM Period Started Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PWMSTOP ,PWM Stopped Interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " PWMSTART ,PWM Started Interrupt clear" "No effect,Clear"
|
|
group.long 0x28++0x3
|
|
line.long 0x00 "PWM_CDR,PWM Clock Divider Register"
|
|
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock Divider"
|
|
bitfld.long 0x00 0.--3. " DIVN ,Clock Divider" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
|
|
group.long 0x2C++0x3
|
|
line.long 0x00 "PWM_PRDR,PWM Period Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PERIOD ,PWM Period Value"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "PWM_PULR,PWM Pulse Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PULSE ,PWM Pulse Value"
|
|
rgroup.long 0x34++0x3
|
|
line.long 0x00 "PWM_CCDR,PWM Current Clock Divider Register"
|
|
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock Divider"
|
|
bitfld.long 0x00 0.--3. " DIVN ,Clock Divider" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
|
|
rgroup.long 0x38++0x3
|
|
line.long 0x00 "PWM_CPRDR,PWM Current Period Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PERIOD ,PWM Current Period Value"
|
|
rgroup.long 0x3c++0x3
|
|
line.long 0x00 "PWM_CPULR,PWM Current Pulse Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PULSE ,PWM Current Pulse Value"
|
|
width 0xb
|
|
tree.end
|
|
tree "PWM3"
|
|
base ad:0x40073000
|
|
width 11.
|
|
rgroup.long 0x00++0x3
|
|
line.long 0x00 "PWM_IDR,PWM ID Register"
|
|
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "PWM_CEDR,PWM Clock Enable/Disable Register"
|
|
bitfld.long 0x00 31. " DBGEN ,Debug mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CLKEN ,Clock Enable" "Disabled,Enabled"
|
|
wgroup.long 0x08++0x3
|
|
line.long 0x00 "PWM_SRR,PWM Software Reset Register"
|
|
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
|
|
wgroup.long 0x0c++0x3
|
|
line.long 0x00 "PWM_CSR,PWM Control Set Register"
|
|
bitfld.long 0x00 29. " PWMEX5 ,PWM Extension Control" "No effect,Include"
|
|
bitfld.long 0x00 28. " PWMEX4 ,PWM Extension Control" "No effect,Include"
|
|
bitfld.long 0x00 27. " PWMEX3 ,PWM Extension Control" "No effect,Include"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PWMEX2 ,PWM Extension Control" "No effect,Include"
|
|
bitfld.long 0x00 25. " PWMEX1 ,PWM Extension Control" "No effect,Include"
|
|
bitfld.long 0x00 24. " PWMEX0 ,PWM Extension Control" "No effect,Include"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PWMIM ,PWM Interval Mode" "No effect,PWM mode"
|
|
bitfld.long 0x00 10. " KEEP ,Keep Last Period State" "No effect,Kept"
|
|
bitfld.long 0x00 9. " OUTSL ,PWM Output Start Level" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x00 8. " IDLESL ,Idle State Level" "No effect,Idle"
|
|
bitfld.long 0x00 1. " UPDATE ,Update PWM Parameter" "No effect,Update"
|
|
bitfld.long 0x00 0. " START ,Start PWM" "No effect,Start"
|
|
wgroup.long 0x10++0x3
|
|
line.long 0x00 "PWM_CCR,PWM Control Clear Register"
|
|
bitfld.long 0x00 29. " PWMEX5 ,PWM Extension Control" "No effect,Delete"
|
|
bitfld.long 0x00 28. " PWMEX4 ,PWM Extension Control" "No effect,Delete"
|
|
bitfld.long 0x00 27. " PWMEX3 ,PWM Extension Control" "No effect,Delete"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PWMEX2 ,PWM Extension Control" "No effect,Delete"
|
|
bitfld.long 0x00 25. " PWMEX1 ,PWM Extension Control" "No effect,Delete"
|
|
bitfld.long 0x00 24. " PWMEX0 ,PWM Extension Control" "No effect,Delete"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PWMIM ,PWM Interval Mode" "No effect,Interval mode"
|
|
bitfld.long 0x00 10. " KEEP ,Keep Last Period State" "No effect,Kept"
|
|
bitfld.long 0x00 9. " OUTSL ,PWM Start Level" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x00 8. " IDLESL ,Idle State Level" "No effect,Idle"
|
|
bitfld.long 0x00 0. " START ,Start PWM" "No effect,Stop"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x00 "PWM_SR,PWM Status Register"
|
|
bitfld.long 0x00 29. " PWMEX5 ,PWM Extension Control" "Not effective,Effective"
|
|
bitfld.long 0x00 28. " PWMEX4 ,PWM Extension Control" "Not effective,Effective"
|
|
bitfld.long 0x00 27. " PWMEX3 ,PWM Extension Control" "Not effective,Effective"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PWMEX2 ,PWM Extension Control" "Not effective,Effective"
|
|
bitfld.long 0x00 25. " PWMEX1 ,PWM Extension Control" "Not effective,Effective"
|
|
bitfld.long 0x00 24. " PWMEX0 ,PWM Extension Control" "Not effective,Effective"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PWMIM ,PWM Output Mode Status" "PWM mode,Interval mode"
|
|
bitfld.long 0x00 10. " KEEP ,Keep Last Period Status" "Not kept,Kept"
|
|
bitfld.long 0x00 9. " OUTSL ,PWM Output Start Level Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 8. " IDLESL ,Idle State PWM Output Level Status" "Low,High"
|
|
bitfld.long 0x00 0. " START ,PWM start/stop status" "Stopped,Started"
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "PWM_IMSCR,PWM Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x00 4. " PMATCH ,Pulse Match Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 3. " PEND ,Period End Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " PSTART ,Period Start Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PWMSTOP ,PWM Stop Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 0. " PWMSTART ,PWM Start Interrupt Mask" "Masked,Not masked"
|
|
rgroup.long 0x1c++0x3
|
|
line.long 0x00 "PWM_RISR,PWM Raw Interrupt Status Register"
|
|
bitfld.long 0x00 4. " PMATCH ,Pulse Match Raw Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " PEND ,Period End Raw Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " PSTART ,Period Start Raw Interrupt State" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PWMSTOP ,PWM Stop Raw Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " PWMSTART ,PWM Start Raw Interrupt State" "Not occurred,Occurred"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x00 "PWM_MISR,PWM Masked Interrupt Status Register"
|
|
bitfld.long 0x00 4. " PMATCH ,Pulse Match Masked Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " PEND ,Period End Masked Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " PSTART ,Period Start Masked Interrupt State" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PWMSTOP ,PWM Stop Masked Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " PWMSTART ,PWM Start Masked Interrupt State" "Not occurred,Occurred"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x00 "PWM_MISR,PWM Masked Interrupt Status Register"
|
|
bitfld.long 0x00 4. " PMATCH ,PWM Counter value is matched with Pulse value Status" "No effect,Clear"
|
|
bitfld.long 0x00 3. " PEND ,PWM Period Ended Interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 2. " PSTART ,PWM Period Started Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PWMSTOP ,PWM Stopped Interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " PWMSTART ,PWM Started Interrupt clear" "No effect,Clear"
|
|
group.long 0x28++0x3
|
|
line.long 0x00 "PWM_CDR,PWM Clock Divider Register"
|
|
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock Divider"
|
|
bitfld.long 0x00 0.--3. " DIVN ,Clock Divider" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
|
|
group.long 0x2C++0x3
|
|
line.long 0x00 "PWM_PRDR,PWM Period Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PERIOD ,PWM Period Value"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "PWM_PULR,PWM Pulse Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PULSE ,PWM Pulse Value"
|
|
rgroup.long 0x34++0x3
|
|
line.long 0x00 "PWM_CCDR,PWM Current Clock Divider Register"
|
|
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock Divider"
|
|
bitfld.long 0x00 0.--3. " DIVN ,Clock Divider" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
|
|
rgroup.long 0x38++0x3
|
|
line.long 0x00 "PWM_CPRDR,PWM Current Period Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PERIOD ,PWM Current Period Value"
|
|
rgroup.long 0x3c++0x3
|
|
line.long 0x00 "PWM_CPULR,PWM Current Pulse Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PULSE ,PWM Current Pulse Value"
|
|
width 0xb
|
|
tree.end
|
|
tree "PWM4"
|
|
base ad:0x40074000
|
|
width 11.
|
|
rgroup.long 0x00++0x3
|
|
line.long 0x00 "PWM_IDR,PWM ID Register"
|
|
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "PWM_CEDR,PWM Clock Enable/Disable Register"
|
|
bitfld.long 0x00 31. " DBGEN ,Debug mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CLKEN ,Clock Enable" "Disabled,Enabled"
|
|
wgroup.long 0x08++0x3
|
|
line.long 0x00 "PWM_SRR,PWM Software Reset Register"
|
|
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
|
|
wgroup.long 0x0c++0x3
|
|
line.long 0x00 "PWM_CSR,PWM Control Set Register"
|
|
bitfld.long 0x00 29. " PWMEX5 ,PWM Extension Control" "No effect,Include"
|
|
bitfld.long 0x00 28. " PWMEX4 ,PWM Extension Control" "No effect,Include"
|
|
bitfld.long 0x00 27. " PWMEX3 ,PWM Extension Control" "No effect,Include"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PWMEX2 ,PWM Extension Control" "No effect,Include"
|
|
bitfld.long 0x00 25. " PWMEX1 ,PWM Extension Control" "No effect,Include"
|
|
bitfld.long 0x00 24. " PWMEX0 ,PWM Extension Control" "No effect,Include"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PWMIM ,PWM Interval Mode" "No effect,PWM mode"
|
|
bitfld.long 0x00 10. " KEEP ,Keep Last Period State" "No effect,Kept"
|
|
bitfld.long 0x00 9. " OUTSL ,PWM Output Start Level" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x00 8. " IDLESL ,Idle State Level" "No effect,Idle"
|
|
bitfld.long 0x00 1. " UPDATE ,Update PWM Parameter" "No effect,Update"
|
|
bitfld.long 0x00 0. " START ,Start PWM" "No effect,Start"
|
|
wgroup.long 0x10++0x3
|
|
line.long 0x00 "PWM_CCR,PWM Control Clear Register"
|
|
bitfld.long 0x00 29. " PWMEX5 ,PWM Extension Control" "No effect,Delete"
|
|
bitfld.long 0x00 28. " PWMEX4 ,PWM Extension Control" "No effect,Delete"
|
|
bitfld.long 0x00 27. " PWMEX3 ,PWM Extension Control" "No effect,Delete"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PWMEX2 ,PWM Extension Control" "No effect,Delete"
|
|
bitfld.long 0x00 25. " PWMEX1 ,PWM Extension Control" "No effect,Delete"
|
|
bitfld.long 0x00 24. " PWMEX0 ,PWM Extension Control" "No effect,Delete"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PWMIM ,PWM Interval Mode" "No effect,Interval mode"
|
|
bitfld.long 0x00 10. " KEEP ,Keep Last Period State" "No effect,Kept"
|
|
bitfld.long 0x00 9. " OUTSL ,PWM Start Level" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x00 8. " IDLESL ,Idle State Level" "No effect,Idle"
|
|
bitfld.long 0x00 0. " START ,Start PWM" "No effect,Stop"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x00 "PWM_SR,PWM Status Register"
|
|
bitfld.long 0x00 29. " PWMEX5 ,PWM Extension Control" "Not effective,Effective"
|
|
bitfld.long 0x00 28. " PWMEX4 ,PWM Extension Control" "Not effective,Effective"
|
|
bitfld.long 0x00 27. " PWMEX3 ,PWM Extension Control" "Not effective,Effective"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PWMEX2 ,PWM Extension Control" "Not effective,Effective"
|
|
bitfld.long 0x00 25. " PWMEX1 ,PWM Extension Control" "Not effective,Effective"
|
|
bitfld.long 0x00 24. " PWMEX0 ,PWM Extension Control" "Not effective,Effective"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PWMIM ,PWM Output Mode Status" "PWM mode,Interval mode"
|
|
bitfld.long 0x00 10. " KEEP ,Keep Last Period Status" "Not kept,Kept"
|
|
bitfld.long 0x00 9. " OUTSL ,PWM Output Start Level Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 8. " IDLESL ,Idle State PWM Output Level Status" "Low,High"
|
|
bitfld.long 0x00 0. " START ,PWM start/stop status" "Stopped,Started"
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "PWM_IMSCR,PWM Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x00 4. " PMATCH ,Pulse Match Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 3. " PEND ,Period End Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " PSTART ,Period Start Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PWMSTOP ,PWM Stop Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 0. " PWMSTART ,PWM Start Interrupt Mask" "Masked,Not masked"
|
|
rgroup.long 0x1c++0x3
|
|
line.long 0x00 "PWM_RISR,PWM Raw Interrupt Status Register"
|
|
bitfld.long 0x00 4. " PMATCH ,Pulse Match Raw Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " PEND ,Period End Raw Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " PSTART ,Period Start Raw Interrupt State" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PWMSTOP ,PWM Stop Raw Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " PWMSTART ,PWM Start Raw Interrupt State" "Not occurred,Occurred"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x00 "PWM_MISR,PWM Masked Interrupt Status Register"
|
|
bitfld.long 0x00 4. " PMATCH ,Pulse Match Masked Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " PEND ,Period End Masked Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " PSTART ,Period Start Masked Interrupt State" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PWMSTOP ,PWM Stop Masked Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " PWMSTART ,PWM Start Masked Interrupt State" "Not occurred,Occurred"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x00 "PWM_MISR,PWM Masked Interrupt Status Register"
|
|
bitfld.long 0x00 4. " PMATCH ,PWM Counter value is matched with Pulse value Status" "No effect,Clear"
|
|
bitfld.long 0x00 3. " PEND ,PWM Period Ended Interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 2. " PSTART ,PWM Period Started Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PWMSTOP ,PWM Stopped Interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " PWMSTART ,PWM Started Interrupt clear" "No effect,Clear"
|
|
group.long 0x28++0x3
|
|
line.long 0x00 "PWM_CDR,PWM Clock Divider Register"
|
|
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock Divider"
|
|
bitfld.long 0x00 0.--3. " DIVN ,Clock Divider" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
|
|
group.long 0x2C++0x3
|
|
line.long 0x00 "PWM_PRDR,PWM Period Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PERIOD ,PWM Period Value"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "PWM_PULR,PWM Pulse Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PULSE ,PWM Pulse Value"
|
|
rgroup.long 0x34++0x3
|
|
line.long 0x00 "PWM_CCDR,PWM Current Clock Divider Register"
|
|
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock Divider"
|
|
bitfld.long 0x00 0.--3. " DIVN ,Clock Divider" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
|
|
rgroup.long 0x38++0x3
|
|
line.long 0x00 "PWM_CPRDR,PWM Current Period Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PERIOD ,PWM Current Period Value"
|
|
rgroup.long 0x3c++0x3
|
|
line.long 0x00 "PWM_CPULR,PWM Current Pulse Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PULSE ,PWM Current Pulse Value"
|
|
width 0xb
|
|
tree.end
|
|
tree "PWM5"
|
|
base ad:0x40075000
|
|
width 11.
|
|
rgroup.long 0x00++0x3
|
|
line.long 0x00 "PWM_IDR,PWM ID Register"
|
|
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "PWM_CEDR,PWM Clock Enable/Disable Register"
|
|
bitfld.long 0x00 31. " DBGEN ,Debug mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CLKEN ,Clock Enable" "Disabled,Enabled"
|
|
wgroup.long 0x08++0x3
|
|
line.long 0x00 "PWM_SRR,PWM Software Reset Register"
|
|
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
|
|
wgroup.long 0x0c++0x3
|
|
line.long 0x00 "PWM_CSR,PWM Control Set Register"
|
|
bitfld.long 0x00 29. " PWMEX5 ,PWM Extension Control" "No effect,Include"
|
|
bitfld.long 0x00 28. " PWMEX4 ,PWM Extension Control" "No effect,Include"
|
|
bitfld.long 0x00 27. " PWMEX3 ,PWM Extension Control" "No effect,Include"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PWMEX2 ,PWM Extension Control" "No effect,Include"
|
|
bitfld.long 0x00 25. " PWMEX1 ,PWM Extension Control" "No effect,Include"
|
|
bitfld.long 0x00 24. " PWMEX0 ,PWM Extension Control" "No effect,Include"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PWMIM ,PWM Interval Mode" "No effect,PWM mode"
|
|
bitfld.long 0x00 10. " KEEP ,Keep Last Period State" "No effect,Kept"
|
|
bitfld.long 0x00 9. " OUTSL ,PWM Output Start Level" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x00 8. " IDLESL ,Idle State Level" "No effect,Idle"
|
|
bitfld.long 0x00 1. " UPDATE ,Update PWM Parameter" "No effect,Update"
|
|
bitfld.long 0x00 0. " START ,Start PWM" "No effect,Start"
|
|
wgroup.long 0x10++0x3
|
|
line.long 0x00 "PWM_CCR,PWM Control Clear Register"
|
|
bitfld.long 0x00 29. " PWMEX5 ,PWM Extension Control" "No effect,Delete"
|
|
bitfld.long 0x00 28. " PWMEX4 ,PWM Extension Control" "No effect,Delete"
|
|
bitfld.long 0x00 27. " PWMEX3 ,PWM Extension Control" "No effect,Delete"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PWMEX2 ,PWM Extension Control" "No effect,Delete"
|
|
bitfld.long 0x00 25. " PWMEX1 ,PWM Extension Control" "No effect,Delete"
|
|
bitfld.long 0x00 24. " PWMEX0 ,PWM Extension Control" "No effect,Delete"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PWMIM ,PWM Interval Mode" "No effect,Interval mode"
|
|
bitfld.long 0x00 10. " KEEP ,Keep Last Period State" "No effect,Kept"
|
|
bitfld.long 0x00 9. " OUTSL ,PWM Start Level" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x00 8. " IDLESL ,Idle State Level" "No effect,Idle"
|
|
bitfld.long 0x00 0. " START ,Start PWM" "No effect,Stop"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x00 "PWM_SR,PWM Status Register"
|
|
bitfld.long 0x00 29. " PWMEX5 ,PWM Extension Control" "Not effective,Effective"
|
|
bitfld.long 0x00 28. " PWMEX4 ,PWM Extension Control" "Not effective,Effective"
|
|
bitfld.long 0x00 27. " PWMEX3 ,PWM Extension Control" "Not effective,Effective"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PWMEX2 ,PWM Extension Control" "Not effective,Effective"
|
|
bitfld.long 0x00 25. " PWMEX1 ,PWM Extension Control" "Not effective,Effective"
|
|
bitfld.long 0x00 24. " PWMEX0 ,PWM Extension Control" "Not effective,Effective"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PWMIM ,PWM Output Mode Status" "PWM mode,Interval mode"
|
|
bitfld.long 0x00 10. " KEEP ,Keep Last Period Status" "Not kept,Kept"
|
|
bitfld.long 0x00 9. " OUTSL ,PWM Output Start Level Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 8. " IDLESL ,Idle State PWM Output Level Status" "Low,High"
|
|
bitfld.long 0x00 0. " START ,PWM start/stop status" "Stopped,Started"
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "PWM_IMSCR,PWM Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x00 4. " PMATCH ,Pulse Match Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 3. " PEND ,Period End Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " PSTART ,Period Start Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PWMSTOP ,PWM Stop Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 0. " PWMSTART ,PWM Start Interrupt Mask" "Masked,Not masked"
|
|
rgroup.long 0x1c++0x3
|
|
line.long 0x00 "PWM_RISR,PWM Raw Interrupt Status Register"
|
|
bitfld.long 0x00 4. " PMATCH ,Pulse Match Raw Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " PEND ,Period End Raw Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " PSTART ,Period Start Raw Interrupt State" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PWMSTOP ,PWM Stop Raw Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " PWMSTART ,PWM Start Raw Interrupt State" "Not occurred,Occurred"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x00 "PWM_MISR,PWM Masked Interrupt Status Register"
|
|
bitfld.long 0x00 4. " PMATCH ,Pulse Match Masked Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " PEND ,Period End Masked Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " PSTART ,Period Start Masked Interrupt State" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PWMSTOP ,PWM Stop Masked Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " PWMSTART ,PWM Start Masked Interrupt State" "Not occurred,Occurred"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x00 "PWM_MISR,PWM Masked Interrupt Status Register"
|
|
bitfld.long 0x00 4. " PMATCH ,PWM Counter value is matched with Pulse value Status" "No effect,Clear"
|
|
bitfld.long 0x00 3. " PEND ,PWM Period Ended Interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 2. " PSTART ,PWM Period Started Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PWMSTOP ,PWM Stopped Interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " PWMSTART ,PWM Started Interrupt clear" "No effect,Clear"
|
|
group.long 0x28++0x3
|
|
line.long 0x00 "PWM_CDR,PWM Clock Divider Register"
|
|
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock Divider"
|
|
bitfld.long 0x00 0.--3. " DIVN ,Clock Divider" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
|
|
group.long 0x2C++0x3
|
|
line.long 0x00 "PWM_PRDR,PWM Period Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PERIOD ,PWM Period Value"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "PWM_PULR,PWM Pulse Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PULSE ,PWM Pulse Value"
|
|
rgroup.long 0x34++0x3
|
|
line.long 0x00 "PWM_CCDR,PWM Current Clock Divider Register"
|
|
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock Divider"
|
|
bitfld.long 0x00 0.--3. " DIVN ,Clock Divider" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
|
|
rgroup.long 0x38++0x3
|
|
line.long 0x00 "PWM_CPRDR,PWM Current Period Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PERIOD ,PWM Current Period Value"
|
|
rgroup.long 0x3c++0x3
|
|
line.long 0x00 "PWM_CPULR,PWM Current Pulse Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PULSE ,PWM Current Pulse Value"
|
|
width 0xb
|
|
tree.end
|
|
tree "PWM6"
|
|
base ad:0x40076000
|
|
width 11.
|
|
rgroup.long 0x00++0x3
|
|
line.long 0x00 "PWM_IDR,PWM ID Register"
|
|
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "PWM_CEDR,PWM Clock Enable/Disable Register"
|
|
bitfld.long 0x00 31. " DBGEN ,Debug mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CLKEN ,Clock Enable" "Disabled,Enabled"
|
|
wgroup.long 0x08++0x3
|
|
line.long 0x00 "PWM_SRR,PWM Software Reset Register"
|
|
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
|
|
wgroup.long 0x0c++0x3
|
|
line.long 0x00 "PWM_CSR,PWM Control Set Register"
|
|
bitfld.long 0x00 29. " PWMEX5 ,PWM Extension Control" "No effect,Include"
|
|
bitfld.long 0x00 28. " PWMEX4 ,PWM Extension Control" "No effect,Include"
|
|
bitfld.long 0x00 27. " PWMEX3 ,PWM Extension Control" "No effect,Include"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PWMEX2 ,PWM Extension Control" "No effect,Include"
|
|
bitfld.long 0x00 25. " PWMEX1 ,PWM Extension Control" "No effect,Include"
|
|
bitfld.long 0x00 24. " PWMEX0 ,PWM Extension Control" "No effect,Include"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PWMIM ,PWM Interval Mode" "No effect,PWM mode"
|
|
bitfld.long 0x00 10. " KEEP ,Keep Last Period State" "No effect,Kept"
|
|
bitfld.long 0x00 9. " OUTSL ,PWM Output Start Level" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x00 8. " IDLESL ,Idle State Level" "No effect,Idle"
|
|
bitfld.long 0x00 1. " UPDATE ,Update PWM Parameter" "No effect,Update"
|
|
bitfld.long 0x00 0. " START ,Start PWM" "No effect,Start"
|
|
wgroup.long 0x10++0x3
|
|
line.long 0x00 "PWM_CCR,PWM Control Clear Register"
|
|
bitfld.long 0x00 29. " PWMEX5 ,PWM Extension Control" "No effect,Delete"
|
|
bitfld.long 0x00 28. " PWMEX4 ,PWM Extension Control" "No effect,Delete"
|
|
bitfld.long 0x00 27. " PWMEX3 ,PWM Extension Control" "No effect,Delete"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PWMEX2 ,PWM Extension Control" "No effect,Delete"
|
|
bitfld.long 0x00 25. " PWMEX1 ,PWM Extension Control" "No effect,Delete"
|
|
bitfld.long 0x00 24. " PWMEX0 ,PWM Extension Control" "No effect,Delete"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PWMIM ,PWM Interval Mode" "No effect,Interval mode"
|
|
bitfld.long 0x00 10. " KEEP ,Keep Last Period State" "No effect,Kept"
|
|
bitfld.long 0x00 9. " OUTSL ,PWM Start Level" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x00 8. " IDLESL ,Idle State Level" "No effect,Idle"
|
|
bitfld.long 0x00 0. " START ,Start PWM" "No effect,Stop"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x00 "PWM_SR,PWM Status Register"
|
|
bitfld.long 0x00 29. " PWMEX5 ,PWM Extension Control" "Not effective,Effective"
|
|
bitfld.long 0x00 28. " PWMEX4 ,PWM Extension Control" "Not effective,Effective"
|
|
bitfld.long 0x00 27. " PWMEX3 ,PWM Extension Control" "Not effective,Effective"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PWMEX2 ,PWM Extension Control" "Not effective,Effective"
|
|
bitfld.long 0x00 25. " PWMEX1 ,PWM Extension Control" "Not effective,Effective"
|
|
bitfld.long 0x00 24. " PWMEX0 ,PWM Extension Control" "Not effective,Effective"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PWMIM ,PWM Output Mode Status" "PWM mode,Interval mode"
|
|
bitfld.long 0x00 10. " KEEP ,Keep Last Period Status" "Not kept,Kept"
|
|
bitfld.long 0x00 9. " OUTSL ,PWM Output Start Level Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 8. " IDLESL ,Idle State PWM Output Level Status" "Low,High"
|
|
bitfld.long 0x00 0. " START ,PWM start/stop status" "Stopped,Started"
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "PWM_IMSCR,PWM Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x00 4. " PMATCH ,Pulse Match Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 3. " PEND ,Period End Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " PSTART ,Period Start Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PWMSTOP ,PWM Stop Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 0. " PWMSTART ,PWM Start Interrupt Mask" "Masked,Not masked"
|
|
rgroup.long 0x1c++0x3
|
|
line.long 0x00 "PWM_RISR,PWM Raw Interrupt Status Register"
|
|
bitfld.long 0x00 4. " PMATCH ,Pulse Match Raw Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " PEND ,Period End Raw Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " PSTART ,Period Start Raw Interrupt State" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PWMSTOP ,PWM Stop Raw Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " PWMSTART ,PWM Start Raw Interrupt State" "Not occurred,Occurred"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x00 "PWM_MISR,PWM Masked Interrupt Status Register"
|
|
bitfld.long 0x00 4. " PMATCH ,Pulse Match Masked Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " PEND ,Period End Masked Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " PSTART ,Period Start Masked Interrupt State" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PWMSTOP ,PWM Stop Masked Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " PWMSTART ,PWM Start Masked Interrupt State" "Not occurred,Occurred"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x00 "PWM_MISR,PWM Masked Interrupt Status Register"
|
|
bitfld.long 0x00 4. " PMATCH ,PWM Counter value is matched with Pulse value Status" "No effect,Clear"
|
|
bitfld.long 0x00 3. " PEND ,PWM Period Ended Interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 2. " PSTART ,PWM Period Started Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PWMSTOP ,PWM Stopped Interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " PWMSTART ,PWM Started Interrupt clear" "No effect,Clear"
|
|
group.long 0x28++0x3
|
|
line.long 0x00 "PWM_CDR,PWM Clock Divider Register"
|
|
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock Divider"
|
|
bitfld.long 0x00 0.--3. " DIVN ,Clock Divider" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
|
|
group.long 0x2C++0x3
|
|
line.long 0x00 "PWM_PRDR,PWM Period Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PERIOD ,PWM Period Value"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "PWM_PULR,PWM Pulse Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PULSE ,PWM Pulse Value"
|
|
rgroup.long 0x34++0x3
|
|
line.long 0x00 "PWM_CCDR,PWM Current Clock Divider Register"
|
|
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock Divider"
|
|
bitfld.long 0x00 0.--3. " DIVN ,Clock Divider" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
|
|
rgroup.long 0x38++0x3
|
|
line.long 0x00 "PWM_CPRDR,PWM Current Period Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PERIOD ,PWM Current Period Value"
|
|
rgroup.long 0x3c++0x3
|
|
line.long 0x00 "PWM_CPULR,PWM Current Pulse Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PULSE ,PWM Current Pulse Value"
|
|
width 0xb
|
|
tree.end
|
|
tree "PWM7"
|
|
base ad:0x40077000
|
|
width 11.
|
|
rgroup.long 0x00++0x3
|
|
line.long 0x00 "PWM_IDR,PWM ID Register"
|
|
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "PWM_CEDR,PWM Clock Enable/Disable Register"
|
|
bitfld.long 0x00 31. " DBGEN ,Debug mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CLKEN ,Clock Enable" "Disabled,Enabled"
|
|
wgroup.long 0x08++0x3
|
|
line.long 0x00 "PWM_SRR,PWM Software Reset Register"
|
|
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
|
|
wgroup.long 0x0c++0x3
|
|
line.long 0x00 "PWM_CSR,PWM Control Set Register"
|
|
bitfld.long 0x00 29. " PWMEX5 ,PWM Extension Control" "No effect,Include"
|
|
bitfld.long 0x00 28. " PWMEX4 ,PWM Extension Control" "No effect,Include"
|
|
bitfld.long 0x00 27. " PWMEX3 ,PWM Extension Control" "No effect,Include"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PWMEX2 ,PWM Extension Control" "No effect,Include"
|
|
bitfld.long 0x00 25. " PWMEX1 ,PWM Extension Control" "No effect,Include"
|
|
bitfld.long 0x00 24. " PWMEX0 ,PWM Extension Control" "No effect,Include"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PWMIM ,PWM Interval Mode" "No effect,PWM mode"
|
|
bitfld.long 0x00 10. " KEEP ,Keep Last Period State" "No effect,Kept"
|
|
bitfld.long 0x00 9. " OUTSL ,PWM Output Start Level" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x00 8. " IDLESL ,Idle State Level" "No effect,Idle"
|
|
bitfld.long 0x00 1. " UPDATE ,Update PWM Parameter" "No effect,Update"
|
|
bitfld.long 0x00 0. " START ,Start PWM" "No effect,Start"
|
|
wgroup.long 0x10++0x3
|
|
line.long 0x00 "PWM_CCR,PWM Control Clear Register"
|
|
bitfld.long 0x00 29. " PWMEX5 ,PWM Extension Control" "No effect,Delete"
|
|
bitfld.long 0x00 28. " PWMEX4 ,PWM Extension Control" "No effect,Delete"
|
|
bitfld.long 0x00 27. " PWMEX3 ,PWM Extension Control" "No effect,Delete"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PWMEX2 ,PWM Extension Control" "No effect,Delete"
|
|
bitfld.long 0x00 25. " PWMEX1 ,PWM Extension Control" "No effect,Delete"
|
|
bitfld.long 0x00 24. " PWMEX0 ,PWM Extension Control" "No effect,Delete"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PWMIM ,PWM Interval Mode" "No effect,Interval mode"
|
|
bitfld.long 0x00 10. " KEEP ,Keep Last Period State" "No effect,Kept"
|
|
bitfld.long 0x00 9. " OUTSL ,PWM Start Level" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x00 8. " IDLESL ,Idle State Level" "No effect,Idle"
|
|
bitfld.long 0x00 0. " START ,Start PWM" "No effect,Stop"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x00 "PWM_SR,PWM Status Register"
|
|
bitfld.long 0x00 29. " PWMEX5 ,PWM Extension Control" "Not effective,Effective"
|
|
bitfld.long 0x00 28. " PWMEX4 ,PWM Extension Control" "Not effective,Effective"
|
|
bitfld.long 0x00 27. " PWMEX3 ,PWM Extension Control" "Not effective,Effective"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PWMEX2 ,PWM Extension Control" "Not effective,Effective"
|
|
bitfld.long 0x00 25. " PWMEX1 ,PWM Extension Control" "Not effective,Effective"
|
|
bitfld.long 0x00 24. " PWMEX0 ,PWM Extension Control" "Not effective,Effective"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PWMIM ,PWM Output Mode Status" "PWM mode,Interval mode"
|
|
bitfld.long 0x00 10. " KEEP ,Keep Last Period Status" "Not kept,Kept"
|
|
bitfld.long 0x00 9. " OUTSL ,PWM Output Start Level Status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 8. " IDLESL ,Idle State PWM Output Level Status" "Low,High"
|
|
bitfld.long 0x00 0. " START ,PWM start/stop status" "Stopped,Started"
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "PWM_IMSCR,PWM Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x00 4. " PMATCH ,Pulse Match Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 3. " PEND ,Period End Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " PSTART ,Period Start Interrupt Mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PWMSTOP ,PWM Stop Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 0. " PWMSTART ,PWM Start Interrupt Mask" "Masked,Not masked"
|
|
rgroup.long 0x1c++0x3
|
|
line.long 0x00 "PWM_RISR,PWM Raw Interrupt Status Register"
|
|
bitfld.long 0x00 4. " PMATCH ,Pulse Match Raw Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " PEND ,Period End Raw Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " PSTART ,Period Start Raw Interrupt State" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PWMSTOP ,PWM Stop Raw Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " PWMSTART ,PWM Start Raw Interrupt State" "Not occurred,Occurred"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x00 "PWM_MISR,PWM Masked Interrupt Status Register"
|
|
bitfld.long 0x00 4. " PMATCH ,Pulse Match Masked Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " PEND ,Period End Masked Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " PSTART ,Period Start Masked Interrupt State" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PWMSTOP ,PWM Stop Masked Interrupt State" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " PWMSTART ,PWM Start Masked Interrupt State" "Not occurred,Occurred"
|
|
wgroup.long 0x24++0x3
|
|
line.long 0x00 "PWM_MISR,PWM Masked Interrupt Status Register"
|
|
bitfld.long 0x00 4. " PMATCH ,PWM Counter value is matched with Pulse value Status" "No effect,Clear"
|
|
bitfld.long 0x00 3. " PEND ,PWM Period Ended Interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 2. " PSTART ,PWM Period Started Interrupt clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PWMSTOP ,PWM Stopped Interrupt clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " PWMSTART ,PWM Started Interrupt clear" "No effect,Clear"
|
|
group.long 0x28++0x3
|
|
line.long 0x00 "PWM_CDR,PWM Clock Divider Register"
|
|
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock Divider"
|
|
bitfld.long 0x00 0.--3. " DIVN ,Clock Divider" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
|
|
group.long 0x2C++0x3
|
|
line.long 0x00 "PWM_PRDR,PWM Period Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PERIOD ,PWM Period Value"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "PWM_PULR,PWM Pulse Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PULSE ,PWM Pulse Value"
|
|
rgroup.long 0x34++0x3
|
|
line.long 0x00 "PWM_CCDR,PWM Current Clock Divider Register"
|
|
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock Divider"
|
|
bitfld.long 0x00 0.--3. " DIVN ,Clock Divider" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
|
|
rgroup.long 0x38++0x3
|
|
line.long 0x00 "PWM_CPRDR,PWM Current Period Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PERIOD ,PWM Current Period Value"
|
|
rgroup.long 0x3c++0x3
|
|
line.long 0x00 "PWM_CPULR,PWM Current Pulse Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PULSE ,PWM Current Pulse Value"
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree.open "SPI (Serial Peripheral Interface)"
|
|
tree "SPI0"
|
|
base ad:0x40090000
|
|
width 11.
|
|
group.long 0x00++0x0B
|
|
line.long 0x00 "SSP_CR0,SSP Control Register 0"
|
|
hexmask.long.byte 0x00 8.--15. 1. " SCR ,Serial Clock Rate Field"
|
|
bitfld.long 0x00 7. " SPH ,SSPCLKOUT Phase" "First clock,Second clock"
|
|
bitfld.long 0x00 6. " SPO ,SSPCLK Polarity Bit" "First clock,Second clock"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " FRF ,Frame Format Selection Field" "0,1,2,3"
|
|
bitfld.long 0x00 0.--3. " DSS ,Data Size Selection Field" "Reserved,Reserved,Reserved,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit"
|
|
line.long 0x04 "SSP_CR1,SSP Control Register 1"
|
|
bitfld.long 0x04 4.--6. " RXIFLSEL ,Receive Interrupt FIFO Level Selection Field" "Reserved,1/8,1/4,Reserved,1/2,?..."
|
|
bitfld.long 0x04 3. " SOD ,Slave-mode Output Disable Bit" "Can drive,Must not drive"
|
|
bitfld.long 0x04 2. " MS ,Master or Slave Mode Selection Bit" "Master,Slave"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SSE ,Synchronous Serial Port Enable Bit" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " LBM ,Loop-Back Mode Bit" "Normal,Internally"
|
|
line.long 0x08 "SSP_DR,SSP Data Register"
|
|
hexmask.long.word 0x08 0.--15. 1. " DATA ,Transmit/ Receive FIFO"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "SSP_SR,SSP Status Register"
|
|
bitfld.long 0x00 4. " BSY ,Prime-Cell SSP Busy Flag Bit" "Idle,Transmitting/receiving"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RFF ,Receive FIFO Full Status Bit" "Not full,Full"
|
|
bitfld.long 0x00 2. " RNE ,Receive Empty Status Bit" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TNF ,Transmit FIFO Full Status Bit" "Full,Not full"
|
|
bitfld.long 0x00 0. " TFE ,Transmit FIFO Empty Status Bit" "Not empty,Empty"
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "SSP_CPSR,SSP Clock Pre-scale Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPSDVSR ,Clock Pre-scale Divisor Field"
|
|
line.long 0x04 "SSP_IMSCR,SSP Interrupt Mask Set/ Clear Register"
|
|
bitfld.long 0x04 3. " TXIM ,Transmit FIFO Interrupt Mask" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " RXIM ,Receive FIFO Interrupt Mask" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " RTIM ,Receive Timeout Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 0. " RORIM ,Receive Overrun Interrupt Mask" "Disabled,Enabled"
|
|
rgroup.long 0x18++0x07
|
|
line.long 0x00 "SSP_RISR,SSP Raw Interrupt Status Register"
|
|
bitfld.long 0x00 3. " TXRIS ,Transmit FIFO raw interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " RXRIS ,Receive FIFO raw interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " RTRIS ,Receive Timeout raw interrupt state" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RORRIS ,Receive Overrun raw interrupt state" "Not occurred,Occurred"
|
|
line.long 0x04 "SSP_MISR,Interrupt Priority Register"
|
|
bitfld.long 0x04 3. " TXMIS ,Transmit FIFO masked interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x04 2. " RXMIS ,Receive FIFO masked interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x04 1. " RTMIS ,Receive Timeout masked interrupt state" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 0. " RORMIS ,Receive Overrun masked interrupt state" "Not occurred,Occurred"
|
|
wgroup.long 0x20++0x03
|
|
line.long 0x00 "SSP_ICR,SSP Interrupt Clear Register"
|
|
bitfld.long 0x00 1. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " RORIC ,Receive Overrun Interrupt Clear" "No effect,Clear"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "SSP_DMACR,SSP DMA Control Register"
|
|
bitfld.long 0x00 1. " TXDMAE ,DMA for the transmit FIFO Enable/ Disable Control Bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RXDMAE ,DMA for the receive FIFO Enable/ Disable Control Bit" "Disabled,Enabled"
|
|
width 11.
|
|
tree.end
|
|
tree "SPI1"
|
|
base ad:0x40091000
|
|
width 11.
|
|
group.long 0x00++0x0B
|
|
line.long 0x00 "SSP_CR0,SSP Control Register 0"
|
|
hexmask.long.byte 0x00 8.--15. 1. " SCR ,Serial Clock Rate Field"
|
|
bitfld.long 0x00 7. " SPH ,SSPCLKOUT Phase" "First clock,Second clock"
|
|
bitfld.long 0x00 6. " SPO ,SSPCLK Polarity Bit" "First clock,Second clock"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " FRF ,Frame Format Selection Field" "0,1,2,3"
|
|
bitfld.long 0x00 0.--3. " DSS ,Data Size Selection Field" "Reserved,Reserved,Reserved,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit"
|
|
line.long 0x04 "SSP_CR1,SSP Control Register 1"
|
|
bitfld.long 0x04 4.--6. " RXIFLSEL ,Receive Interrupt FIFO Level Selection Field" "Reserved,1/8,1/4,Reserved,1/2,?..."
|
|
bitfld.long 0x04 3. " SOD ,Slave-mode Output Disable Bit" "Can drive,Must not drive"
|
|
bitfld.long 0x04 2. " MS ,Master or Slave Mode Selection Bit" "Master,Slave"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SSE ,Synchronous Serial Port Enable Bit" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " LBM ,Loop-Back Mode Bit" "Normal,Internally"
|
|
line.long 0x08 "SSP_DR,SSP Data Register"
|
|
hexmask.long.word 0x08 0.--15. 1. " DATA ,Transmit/ Receive FIFO"
|
|
rgroup.long 0x0C++0x03
|
|
line.long 0x00 "SSP_SR,SSP Status Register"
|
|
bitfld.long 0x00 4. " BSY ,Prime-Cell SSP Busy Flag Bit" "Idle,Transmitting/receiving"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RFF ,Receive FIFO Full Status Bit" "Not full,Full"
|
|
bitfld.long 0x00 2. " RNE ,Receive Empty Status Bit" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TNF ,Transmit FIFO Full Status Bit" "Full,Not full"
|
|
bitfld.long 0x00 0. " TFE ,Transmit FIFO Empty Status Bit" "Not empty,Empty"
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "SSP_CPSR,SSP Clock Pre-scale Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPSDVSR ,Clock Pre-scale Divisor Field"
|
|
line.long 0x04 "SSP_IMSCR,SSP Interrupt Mask Set/ Clear Register"
|
|
bitfld.long 0x04 3. " TXIM ,Transmit FIFO Interrupt Mask" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " RXIM ,Receive FIFO Interrupt Mask" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " RTIM ,Receive Timeout Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 0. " RORIM ,Receive Overrun Interrupt Mask" "Disabled,Enabled"
|
|
rgroup.long 0x18++0x07
|
|
line.long 0x00 "SSP_RISR,SSP Raw Interrupt Status Register"
|
|
bitfld.long 0x00 3. " TXRIS ,Transmit FIFO raw interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " RXRIS ,Receive FIFO raw interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " RTRIS ,Receive Timeout raw interrupt state" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RORRIS ,Receive Overrun raw interrupt state" "Not occurred,Occurred"
|
|
line.long 0x04 "SSP_MISR,Interrupt Priority Register"
|
|
bitfld.long 0x04 3. " TXMIS ,Transmit FIFO masked interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x04 2. " RXMIS ,Receive FIFO masked interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x04 1. " RTMIS ,Receive Timeout masked interrupt state" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 0. " RORMIS ,Receive Overrun masked interrupt state" "Not occurred,Occurred"
|
|
wgroup.long 0x20++0x03
|
|
line.long 0x00 "SSP_ICR,SSP Interrupt Clear Register"
|
|
bitfld.long 0x00 1. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " RORIC ,Receive Overrun Interrupt Clear" "No effect,Clear"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "SSP_DMACR,SSP DMA Control Register"
|
|
bitfld.long 0x00 1. " TXDMAE ,DMA for the transmit FIFO Enable/ Disable Control Bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RXDMAE ,DMA for the receive FIFO Enable/ Disable Control Bit" "Disabled,Enabled"
|
|
width 11.
|
|
tree.end
|
|
tree.end
|
|
tree "STT (Stamp Timer)"
|
|
base ad:0x40078000
|
|
width 11.
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "STT_IDR,STT ID Register"
|
|
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "STT_CEDR,STT Clock Enable/ Disable Register"
|
|
bitfld.long 0x00 31. " DBGEN ,Debug Mode Enable/Disable Control Bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CLKEN ,Clock Enable/Disable Control Bit" "Disabled,Enabled"
|
|
wgroup.long 0x08++0x07
|
|
line.long 0x00 "STT_SRR,STT Software Reset Register"
|
|
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,STT software reset"
|
|
line.long 0x04 "STT_CR,STT Control Register"
|
|
bitfld.long 0x04 4. " ALARMDIS ,STT alarm disable" "No effect,Disable"
|
|
bitfld.long 0x04 3. " ALARMEN ,STT alarm enable" "No effect,Enable"
|
|
bitfld.long 0x04 2. " CNTDIS ,STT counter disable" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x04 1. " CNTEN ,STT counter enable" "No effect,Enable"
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "STT_MR,STT Mode Register"
|
|
bitfld.long 0x00 0. " CNTRST ,Counter Reset" "Reset at 0xA8BFFFFF,Reset at 0xFFFFFFFF"
|
|
line.long 0x04 "STT_IMSCR,STT Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x04 4. " ALARMDIS ,Alarm Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
bitfld.long 0x04 3. " ALARMEN ,Alarm Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
bitfld.long 0x04 2. " CNTDIS ,Counter Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x04 1. " CNTEN ,Counter Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
bitfld.long 0x04 0. " ALARM ,Alarm Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
rgroup.long 0x18++0x07
|
|
line.long 0x00 "STT_ RISR,STT Raw Interrupt Status Register"
|
|
bitfld.long 0x00 4. " ALARMDIS ,Raw interrupt state of ALARMDIS" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " ALARMEN ,Raw interrupt state of ALARMEN" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " CNTDIS ,Raw interrupt state of CNTDIS" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CNTEN ,Raw interrupt state of CNTEN" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " ALARM ,Raw interrupt state of ALARM" "Not occurred,Occurred"
|
|
line.long 0x04 "STT_MISR,STT Masked Interrupt Status Register"
|
|
bitfld.long 0x04 4. " ALARMDIS ,Masked interrupt status of ALARMDIS" "Not occurred,Occurred"
|
|
bitfld.long 0x04 3. " ALARMEN ,Masked interrupt status of ALARMEN" "Not occurred,Occurred"
|
|
bitfld.long 0x04 2. " CNTDIS ,Masked interrupt status of CNTDIS" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 1. " CNTEN ,Masked interrupt status of CNTEN" "Not occurred,Occurred"
|
|
bitfld.long 0x04 0. " ALARM ,Masked interrupt status of ALARM" "Not occurred,Occurred"
|
|
wgroup.long 0x20++0x03
|
|
line.long 0x00 "STT_ ICR,STT Interrupt Clear Register"
|
|
bitfld.long 0x00 4. " ALARMDIS ,Clears the ALARMDIS interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 3. " ALARMEN ,Clears the ALARMEN interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 2. " CNTDIS ,Clears the CNTDIS interrupt" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CNTEN ,Clears the CNTEN interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 0. " ALARM ,Clears the ALARM interrupt" "No effect,Clear"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "STT_SR,STT Status Register"
|
|
bitfld.long 0x00 9. " ALARMENS ,Alarm Enable Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " CNTENS ,Counter enable status" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " WSEC ,Write counter" "No effect,Occurred"
|
|
group.long 0x28++0x07
|
|
line.long 0x00 "STT_CNTR,STT Count Register"
|
|
hexmask.long 0x00 0.--31. 1. " COUNT ,Counter register"
|
|
line.long 0x04 "STT_ALR,STT Alarm Register"
|
|
hexmask.long 0x04 0.--31. 1. " ALARMREG ,Alarm Register"
|
|
width 11.
|
|
tree.end
|
|
tree.open "TC (Timer/Counter)"
|
|
tree "TC0"
|
|
base ad:0x40060000
|
|
width 10.
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "TC_IDR,Timer/Counter ID Register"
|
|
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
|
|
group.long 0x04++0x07
|
|
line.long 0x00 "TC_CSSR,Timer/Counter Clock Source Selection Register"
|
|
bitfld.long 0x00 0. " CLKSRC ,Clock Source Selection Field" "PCLK,External clock"
|
|
line.long 0x04 "TC_CEDR,Timer/Counter Clock Enable/Disable Register"
|
|
bitfld.long 0x04 31. " DBGEN ,Debug Mode Enable/Disable Control Bit" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " CLKEN ,Clock Enable/Disable Control Bit" "Disabled,Enabled"
|
|
wgroup.long 0x0C++0x0B
|
|
line.long 0x00 "TC_SRR,Timer/Counter Software Reset Register"
|
|
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
|
|
line.long 0x04 "TC_CSR,Timer/Counter Control Set Register"
|
|
bitfld.long 0x04 29. " PWMEX5 ,PWM output extension" "No effect,Enable"
|
|
bitfld.long 0x04 28. " PWMEX4 ,PWM output extension" "No effect,Enable"
|
|
bitfld.long 0x04 27. " PWMEX3 ,PWM output extension" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 26. " PWMEX2 ,PWM output extension" "No effect,Enable"
|
|
bitfld.long 0x04 25. " PWMEX1 ,PWM output extension" "No effect,Enable"
|
|
bitfld.long 0x04 24. " PWMEX0 ,PWM output extension " "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 18. " CAPT_R ,Capture by Rising Edge Trigger" "No effect,Detect"
|
|
bitfld.long 0x04 17. " CAPT_F ,Capture by Falling Edge Trigger" "No effect,Detect"
|
|
bitfld.long 0x04 16. " CAPTEN ,Capture Enable" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 15. " ADTRIG ,ADC Trigger" "No effect,Enable"
|
|
bitfld.long 0x04 14. " OVFM ,Overflow Mode" "No effect,Enable"
|
|
bitfld.long 0x04 13. " REPEAT ,Auto Repeat Mode" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 12. " PWMEN ,PWM Enable" "No effect,Enable"
|
|
bitfld.long 0x04 11. " PWMIM ,Interval mode" "No effect,Enable"
|
|
bitfld.long 0x04 10. " KEEP ,Keep Stop Level" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 9. " OUTSL ,PWM Output Start Level" "No effect,High level"
|
|
bitfld.long 0x04 8. " IDLESL ,IDLE State Level" "No effect,High level"
|
|
bitfld.long 0x04 3. " STOPCLEAR ,Stop Count Clear" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 2. " STOPHOLD ,Stop Count Hold" "No effect,Enable"
|
|
bitfld.long 0x04 1. " UPDATE ,Update PWM parameter" "No effect,Update"
|
|
bitfld.long 0x04 0. " START ,Counter Start" "No effect,Start"
|
|
line.long 0x08 "TC_CCR,Timer/Counter Control Clear Register"
|
|
bitfld.long 0x08 29. " PWMEX5 ,PWM output extension" "No effect,Disable"
|
|
bitfld.long 0x08 28. " PWMEX4 ,PWM output extension" "No effect,Disable"
|
|
bitfld.long 0x08 27. " PWMEX3 ,PWM output extension" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 26. " PWMEX2 ,PWM output extension" "No effect,Disable"
|
|
bitfld.long 0x08 25. " PWMEX1 ,PWM output extension" "No effect,Disable"
|
|
bitfld.long 0x08 24. " PWMEX0 ,PWM output extension " "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 18. " CAPT_R ,Capture by Rising Edge Trigger" "No effect,Disable"
|
|
bitfld.long 0x08 17. " CAPT_F ,Capture by Falling Edge Trigger" "No effect,Disable"
|
|
bitfld.long 0x08 16. " CAPTEN ,Capture Enable" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 15. " ADTRIG ,ADC Trigger" "No effect,Disable"
|
|
bitfld.long 0x08 14. " OVFM ,Overflow Mode" "No effect,Disable"
|
|
bitfld.long 0x08 13. " REPEAT ,Auto Repeat Mode" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 12. " PWMEN ,PWM Enable" "No effect,Disable"
|
|
bitfld.long 0x08 11. " PWMIM ,Interval mode" "No effect,PWM mode"
|
|
bitfld.long 0x08 10. " KEEP ,Keep Stop Level" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 9. " OUTSL ,PWM Output Start Level" "No effect,Low level"
|
|
bitfld.long 0x08 8. " IDLESL ,IDLE State Level" "No effect,Low level"
|
|
bitfld.long 0x08 3. " STOPCLEAR ,Stop Count Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 2. " STOPHOLD ,Stop Count Hold" "No effect,Disable"
|
|
bitfld.long 0x08 1. " UPDATE ,Update PWM parameter" "No effect,Update"
|
|
bitfld.long 0x08 0. " START ,Counter Start" "No effect,Stop"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "TC_SR,Timer/Counter Status Register"
|
|
bitfld.long 0x00 29. " PWMEX5 ,PWM output extension status" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " PWMEX4 ,PWM output extension status" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " PWMEX3 ,PWM output extension status" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PWMEX2 ,PWM output extension status" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " PWMEX1 ,PWM output extension status" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " PWMEX0 ,PWM output extension status " "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " CAPT_R ,Capture by Rising Edge Trigger" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CAPT_F ,Capture by Falling Edge Trigger" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " CAPTEN ,Capture Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " ADTRIG ,ADC Trigger" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " OVFM ,Overflow Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " REPEAT ,Auto Repeat Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PWMEN ,PWM Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " PWMIM ,Interval mode" "PWM mode,Interval mode"
|
|
bitfld.long 0x00 10. " KEEP ,Keep Stop Level" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " OUTSL ,PWM Output Start Level" "Low,High"
|
|
bitfld.long 0x00 8. " IDLESL ,IDLE State Level" "Low,High"
|
|
bitfld.long 0x00 3. " STOPCLEAR ,Stop Count Clear" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " STOPHOLD ,Stop Count Hold" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " START ,Counter Start" "Stopped,Started"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "TC_IMSCR,Timer/Counter Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x00 6. " CAPTI ,Capture Trigger Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
bitfld.long 0x00 5. " OVFI ,Timer/Counter Overflow Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
bitfld.long 0x00 4. " MATI ,Pulse Start Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PENDI ,Period End Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " PSTARTI ,Period Start Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
bitfld.long 0x00 1. " STOPI ,Stop Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STARTI ,Start Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
rgroup.long 0x20++0x07
|
|
line.long 0x00 "TC_RISR,Timer/Counter Raw Interrupt Status Register"
|
|
bitfld.long 0x00 6. " CAPTI ,Raw interrupt state of the CAPT interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " OVFI ,Raw interrupt state of the OVF interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. " MATI ,Raw interrupt state of the PULSESTA interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PENDI ,Raw interrupt state of the PEND interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " PSTARTI ,Raw interrupt state of the PSTA interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " STOPI ,Raw interrupt state of the STOP interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STARTI ,Raw interrupt state of the START interrupt" "Not occurred,Occurred"
|
|
line.long 0x04 "TC_MISR,Timer/Counter Masked Interrupt Status Register"
|
|
bitfld.long 0x04 6. " CAPTI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x04 5. " OVFI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x04 4. " MATI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 3. " PENDI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x04 2. " PSTARTI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x04 1. " STOPI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 0. " STARTI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
wgroup.long 0x28++0x03
|
|
line.long 0x00 "TC_ICR,Timer/Counter Interrupt Clear Register"
|
|
bitfld.long 0x00 6. " CAPTI ,Clears the CAPT interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 5. " OVFI ,Clears the OVF interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 4. " MATI ,Clears the MATCH interrupt" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PENDI ,Clears the PEND interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 2. " PSTARTI ,Clears the PSTART interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 1. " STOPI ,Clears the STOP interrupt" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STARTI ,Clears the START interrupt" "No effect,Clear"
|
|
group.long 0x2C++0x0F
|
|
line.long 0x00 "TC_CDR,Timer/Counter Clock Divider Register"
|
|
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock divider"
|
|
bitfld.long 0x00 0.--3. " DIVN ,Clock divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "TC_CSMR,Timer/Counter Counter Size Mask Register"
|
|
bitfld.long 0x04 0.--3. " SIZE ,Timer/Counter Size Mask Field" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit"
|
|
line.long 0x08 "TC_PRDR,Timer/Counter Period Register"
|
|
hexmask.long.word 0x08 0.--15. 1. " PERIOD ,PWM Period Width"
|
|
line.long 0x0C "TC_PULR,Timer/Counter Pulse Register"
|
|
hexmask.long.word 0x0C 0.--15. 1. " PULSE ,PWM Pulse Width"
|
|
rgroup.long 0x3C++0x1B
|
|
line.long 0x00 "TC_CCDR,Timer/Counter Current Clock Divider Register"
|
|
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock divider"
|
|
bitfld.long 0x00 0.--3. " DIVN ,Clock divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "TC_CCSMR,Timer/Counter Current Counter Size Mask Register"
|
|
bitfld.long 0x04 0.--3. " SIZE ,Timer/Counter Size Mask Field" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit"
|
|
line.long 0x08 "TC_CPRDR,Timer/Counter Current Period Register"
|
|
hexmask.long.word 0x08 0.--15. 1. " PERIOD ,PWM Period Width"
|
|
line.long 0x0C "TC_CPULR,Timer/Counter Current Pulse Register"
|
|
hexmask.long.word 0x0C 0.--15. 1. " PULSE ,PWM Pulse Width"
|
|
line.long 0x10 "TC_CUCR,Timer/Counter Capture up Counter Value Register"
|
|
hexmask.long.word 0x10 0.--15. 1. " COUNT ,Capture Up Count Value"
|
|
line.long 0x14 "TC_CUCR,Timer/Counter Capture down Counter Value Register"
|
|
hexmask.long.word 0x14 0.--15. 1. " COUNT ,Capture Down Count Value"
|
|
line.long 0x18 "TC_CUCR,Timer/Counter Counter Value Register"
|
|
hexmask.long.word 0x18 0.--15. 1. " COUNT ,Current Count Value"
|
|
width 11.
|
|
tree.end
|
|
tree "TC1"
|
|
base ad:0x40061000
|
|
width 10.
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "TC_IDR,Timer/Counter ID Register"
|
|
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
|
|
group.long 0x04++0x07
|
|
line.long 0x00 "TC_CSSR,Timer/Counter Clock Source Selection Register"
|
|
bitfld.long 0x00 0. " CLKSRC ,Clock Source Selection Field" "PCLK,External clock"
|
|
line.long 0x04 "TC_CEDR,Timer/Counter Clock Enable/Disable Register"
|
|
bitfld.long 0x04 31. " DBGEN ,Debug Mode Enable/Disable Control Bit" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " CLKEN ,Clock Enable/Disable Control Bit" "Disabled,Enabled"
|
|
wgroup.long 0x0C++0x0B
|
|
line.long 0x00 "TC_SRR,Timer/Counter Software Reset Register"
|
|
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
|
|
line.long 0x04 "TC_CSR,Timer/Counter Control Set Register"
|
|
bitfld.long 0x04 29. " PWMEX5 ,PWM output extension" "No effect,Enable"
|
|
bitfld.long 0x04 28. " PWMEX4 ,PWM output extension" "No effect,Enable"
|
|
bitfld.long 0x04 27. " PWMEX3 ,PWM output extension" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 26. " PWMEX2 ,PWM output extension" "No effect,Enable"
|
|
bitfld.long 0x04 25. " PWMEX1 ,PWM output extension" "No effect,Enable"
|
|
bitfld.long 0x04 24. " PWMEX0 ,PWM output extension " "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 18. " CAPT_R ,Capture by Rising Edge Trigger" "No effect,Detect"
|
|
bitfld.long 0x04 17. " CAPT_F ,Capture by Falling Edge Trigger" "No effect,Detect"
|
|
bitfld.long 0x04 16. " CAPTEN ,Capture Enable" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 15. " ADTRIG ,ADC Trigger" "No effect,Enable"
|
|
bitfld.long 0x04 14. " OVFM ,Overflow Mode" "No effect,Enable"
|
|
bitfld.long 0x04 13. " REPEAT ,Auto Repeat Mode" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 12. " PWMEN ,PWM Enable" "No effect,Enable"
|
|
bitfld.long 0x04 11. " PWMIM ,Interval mode" "No effect,Enable"
|
|
bitfld.long 0x04 10. " KEEP ,Keep Stop Level" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 9. " OUTSL ,PWM Output Start Level" "No effect,High level"
|
|
bitfld.long 0x04 8. " IDLESL ,IDLE State Level" "No effect,High level"
|
|
bitfld.long 0x04 3. " STOPCLEAR ,Stop Count Clear" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 2. " STOPHOLD ,Stop Count Hold" "No effect,Enable"
|
|
bitfld.long 0x04 1. " UPDATE ,Update PWM parameter" "No effect,Update"
|
|
bitfld.long 0x04 0. " START ,Counter Start" "No effect,Start"
|
|
line.long 0x08 "TC_CCR,Timer/Counter Control Clear Register"
|
|
bitfld.long 0x08 29. " PWMEX5 ,PWM output extension" "No effect,Disable"
|
|
bitfld.long 0x08 28. " PWMEX4 ,PWM output extension" "No effect,Disable"
|
|
bitfld.long 0x08 27. " PWMEX3 ,PWM output extension" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 26. " PWMEX2 ,PWM output extension" "No effect,Disable"
|
|
bitfld.long 0x08 25. " PWMEX1 ,PWM output extension" "No effect,Disable"
|
|
bitfld.long 0x08 24. " PWMEX0 ,PWM output extension " "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 18. " CAPT_R ,Capture by Rising Edge Trigger" "No effect,Disable"
|
|
bitfld.long 0x08 17. " CAPT_F ,Capture by Falling Edge Trigger" "No effect,Disable"
|
|
bitfld.long 0x08 16. " CAPTEN ,Capture Enable" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 15. " ADTRIG ,ADC Trigger" "No effect,Disable"
|
|
bitfld.long 0x08 14. " OVFM ,Overflow Mode" "No effect,Disable"
|
|
bitfld.long 0x08 13. " REPEAT ,Auto Repeat Mode" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 12. " PWMEN ,PWM Enable" "No effect,Disable"
|
|
bitfld.long 0x08 11. " PWMIM ,Interval mode" "No effect,PWM mode"
|
|
bitfld.long 0x08 10. " KEEP ,Keep Stop Level" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 9. " OUTSL ,PWM Output Start Level" "No effect,Low level"
|
|
bitfld.long 0x08 8. " IDLESL ,IDLE State Level" "No effect,Low level"
|
|
bitfld.long 0x08 3. " STOPCLEAR ,Stop Count Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 2. " STOPHOLD ,Stop Count Hold" "No effect,Disable"
|
|
bitfld.long 0x08 1. " UPDATE ,Update PWM parameter" "No effect,Update"
|
|
bitfld.long 0x08 0. " START ,Counter Start" "No effect,Stop"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "TC_SR,Timer/Counter Status Register"
|
|
bitfld.long 0x00 29. " PWMEX5 ,PWM output extension status" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " PWMEX4 ,PWM output extension status" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " PWMEX3 ,PWM output extension status" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PWMEX2 ,PWM output extension status" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " PWMEX1 ,PWM output extension status" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " PWMEX0 ,PWM output extension status " "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " CAPT_R ,Capture by Rising Edge Trigger" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CAPT_F ,Capture by Falling Edge Trigger" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " CAPTEN ,Capture Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " ADTRIG ,ADC Trigger" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " OVFM ,Overflow Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " REPEAT ,Auto Repeat Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PWMEN ,PWM Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " PWMIM ,Interval mode" "PWM mode,Interval mode"
|
|
bitfld.long 0x00 10. " KEEP ,Keep Stop Level" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " OUTSL ,PWM Output Start Level" "Low,High"
|
|
bitfld.long 0x00 8. " IDLESL ,IDLE State Level" "Low,High"
|
|
bitfld.long 0x00 3. " STOPCLEAR ,Stop Count Clear" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " STOPHOLD ,Stop Count Hold" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " START ,Counter Start" "Stopped,Started"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "TC_IMSCR,Timer/Counter Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x00 6. " CAPTI ,Capture Trigger Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
bitfld.long 0x00 5. " OVFI ,Timer/Counter Overflow Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
bitfld.long 0x00 4. " MATI ,Pulse Start Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PENDI ,Period End Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " PSTARTI ,Period Start Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
bitfld.long 0x00 1. " STOPI ,Stop Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STARTI ,Start Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
rgroup.long 0x20++0x07
|
|
line.long 0x00 "TC_RISR,Timer/Counter Raw Interrupt Status Register"
|
|
bitfld.long 0x00 6. " CAPTI ,Raw interrupt state of the CAPT interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " OVFI ,Raw interrupt state of the OVF interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. " MATI ,Raw interrupt state of the PULSESTA interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PENDI ,Raw interrupt state of the PEND interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " PSTARTI ,Raw interrupt state of the PSTA interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " STOPI ,Raw interrupt state of the STOP interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STARTI ,Raw interrupt state of the START interrupt" "Not occurred,Occurred"
|
|
line.long 0x04 "TC_MISR,Timer/Counter Masked Interrupt Status Register"
|
|
bitfld.long 0x04 6. " CAPTI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x04 5. " OVFI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x04 4. " MATI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 3. " PENDI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x04 2. " PSTARTI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x04 1. " STOPI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 0. " STARTI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
wgroup.long 0x28++0x03
|
|
line.long 0x00 "TC_ICR,Timer/Counter Interrupt Clear Register"
|
|
bitfld.long 0x00 6. " CAPTI ,Clears the CAPT interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 5. " OVFI ,Clears the OVF interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 4. " MATI ,Clears the MATCH interrupt" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PENDI ,Clears the PEND interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 2. " PSTARTI ,Clears the PSTART interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 1. " STOPI ,Clears the STOP interrupt" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STARTI ,Clears the START interrupt" "No effect,Clear"
|
|
group.long 0x2C++0x0F
|
|
line.long 0x00 "TC_CDR,Timer/Counter Clock Divider Register"
|
|
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock divider"
|
|
bitfld.long 0x00 0.--3. " DIVN ,Clock divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "TC_CSMR,Timer/Counter Counter Size Mask Register"
|
|
bitfld.long 0x04 0.--3. " SIZE ,Timer/Counter Size Mask Field" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit"
|
|
line.long 0x08 "TC_PRDR,Timer/Counter Period Register"
|
|
hexmask.long.word 0x08 0.--15. 1. " PERIOD ,PWM Period Width"
|
|
line.long 0x0C "TC_PULR,Timer/Counter Pulse Register"
|
|
hexmask.long.word 0x0C 0.--15. 1. " PULSE ,PWM Pulse Width"
|
|
rgroup.long 0x3C++0x1B
|
|
line.long 0x00 "TC_CCDR,Timer/Counter Current Clock Divider Register"
|
|
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock divider"
|
|
bitfld.long 0x00 0.--3. " DIVN ,Clock divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "TC_CCSMR,Timer/Counter Current Counter Size Mask Register"
|
|
bitfld.long 0x04 0.--3. " SIZE ,Timer/Counter Size Mask Field" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit"
|
|
line.long 0x08 "TC_CPRDR,Timer/Counter Current Period Register"
|
|
hexmask.long.word 0x08 0.--15. 1. " PERIOD ,PWM Period Width"
|
|
line.long 0x0C "TC_CPULR,Timer/Counter Current Pulse Register"
|
|
hexmask.long.word 0x0C 0.--15. 1. " PULSE ,PWM Pulse Width"
|
|
line.long 0x10 "TC_CUCR,Timer/Counter Capture up Counter Value Register"
|
|
hexmask.long.word 0x10 0.--15. 1. " COUNT ,Capture Up Count Value"
|
|
line.long 0x14 "TC_CUCR,Timer/Counter Capture down Counter Value Register"
|
|
hexmask.long.word 0x14 0.--15. 1. " COUNT ,Capture Down Count Value"
|
|
line.long 0x18 "TC_CUCR,Timer/Counter Counter Value Register"
|
|
hexmask.long.word 0x18 0.--15. 1. " COUNT ,Current Count Value"
|
|
width 11.
|
|
tree.end
|
|
tree "TC2"
|
|
base ad:0x40062000
|
|
width 10.
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "TC_IDR,Timer/Counter ID Register"
|
|
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
|
|
group.long 0x04++0x07
|
|
line.long 0x00 "TC_CSSR,Timer/Counter Clock Source Selection Register"
|
|
bitfld.long 0x00 0. " CLKSRC ,Clock Source Selection Field" "PCLK,External clock"
|
|
line.long 0x04 "TC_CEDR,Timer/Counter Clock Enable/Disable Register"
|
|
bitfld.long 0x04 31. " DBGEN ,Debug Mode Enable/Disable Control Bit" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " CLKEN ,Clock Enable/Disable Control Bit" "Disabled,Enabled"
|
|
wgroup.long 0x0C++0x0B
|
|
line.long 0x00 "TC_SRR,Timer/Counter Software Reset Register"
|
|
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
|
|
line.long 0x04 "TC_CSR,Timer/Counter Control Set Register"
|
|
bitfld.long 0x04 29. " PWMEX5 ,PWM output extension" "No effect,Enable"
|
|
bitfld.long 0x04 28. " PWMEX4 ,PWM output extension" "No effect,Enable"
|
|
bitfld.long 0x04 27. " PWMEX3 ,PWM output extension" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 26. " PWMEX2 ,PWM output extension" "No effect,Enable"
|
|
bitfld.long 0x04 25. " PWMEX1 ,PWM output extension" "No effect,Enable"
|
|
bitfld.long 0x04 24. " PWMEX0 ,PWM output extension " "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 18. " CAPT_R ,Capture by Rising Edge Trigger" "No effect,Detect"
|
|
bitfld.long 0x04 17. " CAPT_F ,Capture by Falling Edge Trigger" "No effect,Detect"
|
|
bitfld.long 0x04 16. " CAPTEN ,Capture Enable" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 15. " ADTRIG ,ADC Trigger" "No effect,Enable"
|
|
bitfld.long 0x04 14. " OVFM ,Overflow Mode" "No effect,Enable"
|
|
bitfld.long 0x04 13. " REPEAT ,Auto Repeat Mode" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 12. " PWMEN ,PWM Enable" "No effect,Enable"
|
|
bitfld.long 0x04 11. " PWMIM ,Interval mode" "No effect,Enable"
|
|
bitfld.long 0x04 10. " KEEP ,Keep Stop Level" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 9. " OUTSL ,PWM Output Start Level" "No effect,High level"
|
|
bitfld.long 0x04 8. " IDLESL ,IDLE State Level" "No effect,High level"
|
|
bitfld.long 0x04 3. " STOPCLEAR ,Stop Count Clear" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 2. " STOPHOLD ,Stop Count Hold" "No effect,Enable"
|
|
bitfld.long 0x04 1. " UPDATE ,Update PWM parameter" "No effect,Update"
|
|
bitfld.long 0x04 0. " START ,Counter Start" "No effect,Start"
|
|
line.long 0x08 "TC_CCR,Timer/Counter Control Clear Register"
|
|
bitfld.long 0x08 29. " PWMEX5 ,PWM output extension" "No effect,Disable"
|
|
bitfld.long 0x08 28. " PWMEX4 ,PWM output extension" "No effect,Disable"
|
|
bitfld.long 0x08 27. " PWMEX3 ,PWM output extension" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 26. " PWMEX2 ,PWM output extension" "No effect,Disable"
|
|
bitfld.long 0x08 25. " PWMEX1 ,PWM output extension" "No effect,Disable"
|
|
bitfld.long 0x08 24. " PWMEX0 ,PWM output extension " "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 18. " CAPT_R ,Capture by Rising Edge Trigger" "No effect,Disable"
|
|
bitfld.long 0x08 17. " CAPT_F ,Capture by Falling Edge Trigger" "No effect,Disable"
|
|
bitfld.long 0x08 16. " CAPTEN ,Capture Enable" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 15. " ADTRIG ,ADC Trigger" "No effect,Disable"
|
|
bitfld.long 0x08 14. " OVFM ,Overflow Mode" "No effect,Disable"
|
|
bitfld.long 0x08 13. " REPEAT ,Auto Repeat Mode" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 12. " PWMEN ,PWM Enable" "No effect,Disable"
|
|
bitfld.long 0x08 11. " PWMIM ,Interval mode" "No effect,PWM mode"
|
|
bitfld.long 0x08 10. " KEEP ,Keep Stop Level" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 9. " OUTSL ,PWM Output Start Level" "No effect,Low level"
|
|
bitfld.long 0x08 8. " IDLESL ,IDLE State Level" "No effect,Low level"
|
|
bitfld.long 0x08 3. " STOPCLEAR ,Stop Count Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 2. " STOPHOLD ,Stop Count Hold" "No effect,Disable"
|
|
bitfld.long 0x08 1. " UPDATE ,Update PWM parameter" "No effect,Update"
|
|
bitfld.long 0x08 0. " START ,Counter Start" "No effect,Stop"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "TC_SR,Timer/Counter Status Register"
|
|
bitfld.long 0x00 29. " PWMEX5 ,PWM output extension status" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " PWMEX4 ,PWM output extension status" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " PWMEX3 ,PWM output extension status" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PWMEX2 ,PWM output extension status" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " PWMEX1 ,PWM output extension status" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " PWMEX0 ,PWM output extension status " "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " CAPT_R ,Capture by Rising Edge Trigger" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CAPT_F ,Capture by Falling Edge Trigger" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " CAPTEN ,Capture Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " ADTRIG ,ADC Trigger" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " OVFM ,Overflow Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " REPEAT ,Auto Repeat Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PWMEN ,PWM Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " PWMIM ,Interval mode" "PWM mode,Interval mode"
|
|
bitfld.long 0x00 10. " KEEP ,Keep Stop Level" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " OUTSL ,PWM Output Start Level" "Low,High"
|
|
bitfld.long 0x00 8. " IDLESL ,IDLE State Level" "Low,High"
|
|
bitfld.long 0x00 3. " STOPCLEAR ,Stop Count Clear" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " STOPHOLD ,Stop Count Hold" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " START ,Counter Start" "Stopped,Started"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "TC_IMSCR,Timer/Counter Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x00 6. " CAPTI ,Capture Trigger Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
bitfld.long 0x00 5. " OVFI ,Timer/Counter Overflow Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
bitfld.long 0x00 4. " MATI ,Pulse Start Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PENDI ,Period End Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " PSTARTI ,Period Start Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
bitfld.long 0x00 1. " STOPI ,Stop Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STARTI ,Start Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
rgroup.long 0x20++0x07
|
|
line.long 0x00 "TC_RISR,Timer/Counter Raw Interrupt Status Register"
|
|
bitfld.long 0x00 6. " CAPTI ,Raw interrupt state of the CAPT interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " OVFI ,Raw interrupt state of the OVF interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. " MATI ,Raw interrupt state of the PULSESTA interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PENDI ,Raw interrupt state of the PEND interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " PSTARTI ,Raw interrupt state of the PSTA interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " STOPI ,Raw interrupt state of the STOP interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STARTI ,Raw interrupt state of the START interrupt" "Not occurred,Occurred"
|
|
line.long 0x04 "TC_MISR,Timer/Counter Masked Interrupt Status Register"
|
|
bitfld.long 0x04 6. " CAPTI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x04 5. " OVFI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x04 4. " MATI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 3. " PENDI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x04 2. " PSTARTI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x04 1. " STOPI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 0. " STARTI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
wgroup.long 0x28++0x03
|
|
line.long 0x00 "TC_ICR,Timer/Counter Interrupt Clear Register"
|
|
bitfld.long 0x00 6. " CAPTI ,Clears the CAPT interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 5. " OVFI ,Clears the OVF interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 4. " MATI ,Clears the MATCH interrupt" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PENDI ,Clears the PEND interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 2. " PSTARTI ,Clears the PSTART interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 1. " STOPI ,Clears the STOP interrupt" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STARTI ,Clears the START interrupt" "No effect,Clear"
|
|
group.long 0x2C++0x0F
|
|
line.long 0x00 "TC_CDR,Timer/Counter Clock Divider Register"
|
|
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock divider"
|
|
bitfld.long 0x00 0.--3. " DIVN ,Clock divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "TC_CSMR,Timer/Counter Counter Size Mask Register"
|
|
bitfld.long 0x04 0.--3. " SIZE ,Timer/Counter Size Mask Field" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit"
|
|
line.long 0x08 "TC_PRDR,Timer/Counter Period Register"
|
|
hexmask.long.word 0x08 0.--15. 1. " PERIOD ,PWM Period Width"
|
|
line.long 0x0C "TC_PULR,Timer/Counter Pulse Register"
|
|
hexmask.long.word 0x0C 0.--15. 1. " PULSE ,PWM Pulse Width"
|
|
rgroup.long 0x3C++0x1B
|
|
line.long 0x00 "TC_CCDR,Timer/Counter Current Clock Divider Register"
|
|
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock divider"
|
|
bitfld.long 0x00 0.--3. " DIVN ,Clock divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "TC_CCSMR,Timer/Counter Current Counter Size Mask Register"
|
|
bitfld.long 0x04 0.--3. " SIZE ,Timer/Counter Size Mask Field" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit"
|
|
line.long 0x08 "TC_CPRDR,Timer/Counter Current Period Register"
|
|
hexmask.long.word 0x08 0.--15. 1. " PERIOD ,PWM Period Width"
|
|
line.long 0x0C "TC_CPULR,Timer/Counter Current Pulse Register"
|
|
hexmask.long.word 0x0C 0.--15. 1. " PULSE ,PWM Pulse Width"
|
|
line.long 0x10 "TC_CUCR,Timer/Counter Capture up Counter Value Register"
|
|
hexmask.long.word 0x10 0.--15. 1. " COUNT ,Capture Up Count Value"
|
|
line.long 0x14 "TC_CUCR,Timer/Counter Capture down Counter Value Register"
|
|
hexmask.long.word 0x14 0.--15. 1. " COUNT ,Capture Down Count Value"
|
|
line.long 0x18 "TC_CUCR,Timer/Counter Counter Value Register"
|
|
hexmask.long.word 0x18 0.--15. 1. " COUNT ,Current Count Value"
|
|
width 11.
|
|
tree.end
|
|
tree "TC3"
|
|
base ad:0x40063000
|
|
width 10.
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "TC_IDR,Timer/Counter ID Register"
|
|
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
|
|
group.long 0x04++0x07
|
|
line.long 0x00 "TC_CSSR,Timer/Counter Clock Source Selection Register"
|
|
bitfld.long 0x00 0. " CLKSRC ,Clock Source Selection Field" "PCLK,External clock"
|
|
line.long 0x04 "TC_CEDR,Timer/Counter Clock Enable/Disable Register"
|
|
bitfld.long 0x04 31. " DBGEN ,Debug Mode Enable/Disable Control Bit" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " CLKEN ,Clock Enable/Disable Control Bit" "Disabled,Enabled"
|
|
wgroup.long 0x0C++0x0B
|
|
line.long 0x00 "TC_SRR,Timer/Counter Software Reset Register"
|
|
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
|
|
line.long 0x04 "TC_CSR,Timer/Counter Control Set Register"
|
|
bitfld.long 0x04 29. " PWMEX5 ,PWM output extension" "No effect,Enable"
|
|
bitfld.long 0x04 28. " PWMEX4 ,PWM output extension" "No effect,Enable"
|
|
bitfld.long 0x04 27. " PWMEX3 ,PWM output extension" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 26. " PWMEX2 ,PWM output extension" "No effect,Enable"
|
|
bitfld.long 0x04 25. " PWMEX1 ,PWM output extension" "No effect,Enable"
|
|
bitfld.long 0x04 24. " PWMEX0 ,PWM output extension " "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 18. " CAPT_R ,Capture by Rising Edge Trigger" "No effect,Detect"
|
|
bitfld.long 0x04 17. " CAPT_F ,Capture by Falling Edge Trigger" "No effect,Detect"
|
|
bitfld.long 0x04 16. " CAPTEN ,Capture Enable" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 15. " ADTRIG ,ADC Trigger" "No effect,Enable"
|
|
bitfld.long 0x04 14. " OVFM ,Overflow Mode" "No effect,Enable"
|
|
bitfld.long 0x04 13. " REPEAT ,Auto Repeat Mode" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 12. " PWMEN ,PWM Enable" "No effect,Enable"
|
|
bitfld.long 0x04 11. " PWMIM ,Interval mode" "No effect,Enable"
|
|
bitfld.long 0x04 10. " KEEP ,Keep Stop Level" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 9. " OUTSL ,PWM Output Start Level" "No effect,High level"
|
|
bitfld.long 0x04 8. " IDLESL ,IDLE State Level" "No effect,High level"
|
|
bitfld.long 0x04 3. " STOPCLEAR ,Stop Count Clear" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 2. " STOPHOLD ,Stop Count Hold" "No effect,Enable"
|
|
bitfld.long 0x04 1. " UPDATE ,Update PWM parameter" "No effect,Update"
|
|
bitfld.long 0x04 0. " START ,Counter Start" "No effect,Start"
|
|
line.long 0x08 "TC_CCR,Timer/Counter Control Clear Register"
|
|
bitfld.long 0x08 29. " PWMEX5 ,PWM output extension" "No effect,Disable"
|
|
bitfld.long 0x08 28. " PWMEX4 ,PWM output extension" "No effect,Disable"
|
|
bitfld.long 0x08 27. " PWMEX3 ,PWM output extension" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 26. " PWMEX2 ,PWM output extension" "No effect,Disable"
|
|
bitfld.long 0x08 25. " PWMEX1 ,PWM output extension" "No effect,Disable"
|
|
bitfld.long 0x08 24. " PWMEX0 ,PWM output extension " "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 18. " CAPT_R ,Capture by Rising Edge Trigger" "No effect,Disable"
|
|
bitfld.long 0x08 17. " CAPT_F ,Capture by Falling Edge Trigger" "No effect,Disable"
|
|
bitfld.long 0x08 16. " CAPTEN ,Capture Enable" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 15. " ADTRIG ,ADC Trigger" "No effect,Disable"
|
|
bitfld.long 0x08 14. " OVFM ,Overflow Mode" "No effect,Disable"
|
|
bitfld.long 0x08 13. " REPEAT ,Auto Repeat Mode" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 12. " PWMEN ,PWM Enable" "No effect,Disable"
|
|
bitfld.long 0x08 11. " PWMIM ,Interval mode" "No effect,PWM mode"
|
|
bitfld.long 0x08 10. " KEEP ,Keep Stop Level" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 9. " OUTSL ,PWM Output Start Level" "No effect,Low level"
|
|
bitfld.long 0x08 8. " IDLESL ,IDLE State Level" "No effect,Low level"
|
|
bitfld.long 0x08 3. " STOPCLEAR ,Stop Count Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 2. " STOPHOLD ,Stop Count Hold" "No effect,Disable"
|
|
bitfld.long 0x08 1. " UPDATE ,Update PWM parameter" "No effect,Update"
|
|
bitfld.long 0x08 0. " START ,Counter Start" "No effect,Stop"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "TC_SR,Timer/Counter Status Register"
|
|
bitfld.long 0x00 29. " PWMEX5 ,PWM output extension status" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " PWMEX4 ,PWM output extension status" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " PWMEX3 ,PWM output extension status" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PWMEX2 ,PWM output extension status" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " PWMEX1 ,PWM output extension status" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " PWMEX0 ,PWM output extension status " "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " CAPT_R ,Capture by Rising Edge Trigger" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CAPT_F ,Capture by Falling Edge Trigger" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " CAPTEN ,Capture Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " ADTRIG ,ADC Trigger" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " OVFM ,Overflow Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " REPEAT ,Auto Repeat Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PWMEN ,PWM Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " PWMIM ,Interval mode" "PWM mode,Interval mode"
|
|
bitfld.long 0x00 10. " KEEP ,Keep Stop Level" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " OUTSL ,PWM Output Start Level" "Low,High"
|
|
bitfld.long 0x00 8. " IDLESL ,IDLE State Level" "Low,High"
|
|
bitfld.long 0x00 3. " STOPCLEAR ,Stop Count Clear" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " STOPHOLD ,Stop Count Hold" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " START ,Counter Start" "Stopped,Started"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "TC_IMSCR,Timer/Counter Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x00 6. " CAPTI ,Capture Trigger Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
bitfld.long 0x00 5. " OVFI ,Timer/Counter Overflow Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
bitfld.long 0x00 4. " MATI ,Pulse Start Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PENDI ,Period End Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " PSTARTI ,Period Start Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
bitfld.long 0x00 1. " STOPI ,Stop Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STARTI ,Start Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
rgroup.long 0x20++0x07
|
|
line.long 0x00 "TC_RISR,Timer/Counter Raw Interrupt Status Register"
|
|
bitfld.long 0x00 6. " CAPTI ,Raw interrupt state of the CAPT interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " OVFI ,Raw interrupt state of the OVF interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. " MATI ,Raw interrupt state of the PULSESTA interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PENDI ,Raw interrupt state of the PEND interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " PSTARTI ,Raw interrupt state of the PSTA interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " STOPI ,Raw interrupt state of the STOP interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STARTI ,Raw interrupt state of the START interrupt" "Not occurred,Occurred"
|
|
line.long 0x04 "TC_MISR,Timer/Counter Masked Interrupt Status Register"
|
|
bitfld.long 0x04 6. " CAPTI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x04 5. " OVFI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x04 4. " MATI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 3. " PENDI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x04 2. " PSTARTI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x04 1. " STOPI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 0. " STARTI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
wgroup.long 0x28++0x03
|
|
line.long 0x00 "TC_ICR,Timer/Counter Interrupt Clear Register"
|
|
bitfld.long 0x00 6. " CAPTI ,Clears the CAPT interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 5. " OVFI ,Clears the OVF interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 4. " MATI ,Clears the MATCH interrupt" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PENDI ,Clears the PEND interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 2. " PSTARTI ,Clears the PSTART interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 1. " STOPI ,Clears the STOP interrupt" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STARTI ,Clears the START interrupt" "No effect,Clear"
|
|
group.long 0x2C++0x0F
|
|
line.long 0x00 "TC_CDR,Timer/Counter Clock Divider Register"
|
|
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock divider"
|
|
bitfld.long 0x00 0.--3. " DIVN ,Clock divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "TC_CSMR,Timer/Counter Counter Size Mask Register"
|
|
bitfld.long 0x04 0.--3. " SIZE ,Timer/Counter Size Mask Field" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit"
|
|
line.long 0x08 "TC_PRDR,Timer/Counter Period Register"
|
|
hexmask.long.word 0x08 0.--15. 1. " PERIOD ,PWM Period Width"
|
|
line.long 0x0C "TC_PULR,Timer/Counter Pulse Register"
|
|
hexmask.long.word 0x0C 0.--15. 1. " PULSE ,PWM Pulse Width"
|
|
rgroup.long 0x3C++0x1B
|
|
line.long 0x00 "TC_CCDR,Timer/Counter Current Clock Divider Register"
|
|
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock divider"
|
|
bitfld.long 0x00 0.--3. " DIVN ,Clock divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "TC_CCSMR,Timer/Counter Current Counter Size Mask Register"
|
|
bitfld.long 0x04 0.--3. " SIZE ,Timer/Counter Size Mask Field" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit"
|
|
line.long 0x08 "TC_CPRDR,Timer/Counter Current Period Register"
|
|
hexmask.long.word 0x08 0.--15. 1. " PERIOD ,PWM Period Width"
|
|
line.long 0x0C "TC_CPULR,Timer/Counter Current Pulse Register"
|
|
hexmask.long.word 0x0C 0.--15. 1. " PULSE ,PWM Pulse Width"
|
|
line.long 0x10 "TC_CUCR,Timer/Counter Capture up Counter Value Register"
|
|
hexmask.long.word 0x10 0.--15. 1. " COUNT ,Capture Up Count Value"
|
|
line.long 0x14 "TC_CUCR,Timer/Counter Capture down Counter Value Register"
|
|
hexmask.long.word 0x14 0.--15. 1. " COUNT ,Capture Down Count Value"
|
|
line.long 0x18 "TC_CUCR,Timer/Counter Counter Value Register"
|
|
hexmask.long.word 0x18 0.--15. 1. " COUNT ,Current Count Value"
|
|
width 11.
|
|
tree.end
|
|
tree "TC4"
|
|
base ad:0x40064000
|
|
width 10.
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "TC_IDR,Timer/Counter ID Register"
|
|
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
|
|
group.long 0x04++0x07
|
|
line.long 0x00 "TC_CSSR,Timer/Counter Clock Source Selection Register"
|
|
bitfld.long 0x00 0. " CLKSRC ,Clock Source Selection Field" "PCLK,External clock"
|
|
line.long 0x04 "TC_CEDR,Timer/Counter Clock Enable/Disable Register"
|
|
bitfld.long 0x04 31. " DBGEN ,Debug Mode Enable/Disable Control Bit" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " CLKEN ,Clock Enable/Disable Control Bit" "Disabled,Enabled"
|
|
wgroup.long 0x0C++0x0B
|
|
line.long 0x00 "TC_SRR,Timer/Counter Software Reset Register"
|
|
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
|
|
line.long 0x04 "TC_CSR,Timer/Counter Control Set Register"
|
|
bitfld.long 0x04 29. " PWMEX5 ,PWM output extension" "No effect,Enable"
|
|
bitfld.long 0x04 28. " PWMEX4 ,PWM output extension" "No effect,Enable"
|
|
bitfld.long 0x04 27. " PWMEX3 ,PWM output extension" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 26. " PWMEX2 ,PWM output extension" "No effect,Enable"
|
|
bitfld.long 0x04 25. " PWMEX1 ,PWM output extension" "No effect,Enable"
|
|
bitfld.long 0x04 24. " PWMEX0 ,PWM output extension " "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 18. " CAPT_R ,Capture by Rising Edge Trigger" "No effect,Detect"
|
|
bitfld.long 0x04 17. " CAPT_F ,Capture by Falling Edge Trigger" "No effect,Detect"
|
|
bitfld.long 0x04 16. " CAPTEN ,Capture Enable" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 15. " ADTRIG ,ADC Trigger" "No effect,Enable"
|
|
bitfld.long 0x04 14. " OVFM ,Overflow Mode" "No effect,Enable"
|
|
bitfld.long 0x04 13. " REPEAT ,Auto Repeat Mode" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 12. " PWMEN ,PWM Enable" "No effect,Enable"
|
|
bitfld.long 0x04 11. " PWMIM ,Interval mode" "No effect,Enable"
|
|
bitfld.long 0x04 10. " KEEP ,Keep Stop Level" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 9. " OUTSL ,PWM Output Start Level" "No effect,High level"
|
|
bitfld.long 0x04 8. " IDLESL ,IDLE State Level" "No effect,High level"
|
|
bitfld.long 0x04 3. " STOPCLEAR ,Stop Count Clear" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 2. " STOPHOLD ,Stop Count Hold" "No effect,Enable"
|
|
bitfld.long 0x04 1. " UPDATE ,Update PWM parameter" "No effect,Update"
|
|
bitfld.long 0x04 0. " START ,Counter Start" "No effect,Start"
|
|
line.long 0x08 "TC_CCR,Timer/Counter Control Clear Register"
|
|
bitfld.long 0x08 29. " PWMEX5 ,PWM output extension" "No effect,Disable"
|
|
bitfld.long 0x08 28. " PWMEX4 ,PWM output extension" "No effect,Disable"
|
|
bitfld.long 0x08 27. " PWMEX3 ,PWM output extension" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 26. " PWMEX2 ,PWM output extension" "No effect,Disable"
|
|
bitfld.long 0x08 25. " PWMEX1 ,PWM output extension" "No effect,Disable"
|
|
bitfld.long 0x08 24. " PWMEX0 ,PWM output extension " "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 18. " CAPT_R ,Capture by Rising Edge Trigger" "No effect,Disable"
|
|
bitfld.long 0x08 17. " CAPT_F ,Capture by Falling Edge Trigger" "No effect,Disable"
|
|
bitfld.long 0x08 16. " CAPTEN ,Capture Enable" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 15. " ADTRIG ,ADC Trigger" "No effect,Disable"
|
|
bitfld.long 0x08 14. " OVFM ,Overflow Mode" "No effect,Disable"
|
|
bitfld.long 0x08 13. " REPEAT ,Auto Repeat Mode" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 12. " PWMEN ,PWM Enable" "No effect,Disable"
|
|
bitfld.long 0x08 11. " PWMIM ,Interval mode" "No effect,PWM mode"
|
|
bitfld.long 0x08 10. " KEEP ,Keep Stop Level" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 9. " OUTSL ,PWM Output Start Level" "No effect,Low level"
|
|
bitfld.long 0x08 8. " IDLESL ,IDLE State Level" "No effect,Low level"
|
|
bitfld.long 0x08 3. " STOPCLEAR ,Stop Count Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 2. " STOPHOLD ,Stop Count Hold" "No effect,Disable"
|
|
bitfld.long 0x08 1. " UPDATE ,Update PWM parameter" "No effect,Update"
|
|
bitfld.long 0x08 0. " START ,Counter Start" "No effect,Stop"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "TC_SR,Timer/Counter Status Register"
|
|
bitfld.long 0x00 29. " PWMEX5 ,PWM output extension status" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " PWMEX4 ,PWM output extension status" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " PWMEX3 ,PWM output extension status" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PWMEX2 ,PWM output extension status" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " PWMEX1 ,PWM output extension status" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " PWMEX0 ,PWM output extension status " "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " CAPT_R ,Capture by Rising Edge Trigger" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CAPT_F ,Capture by Falling Edge Trigger" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " CAPTEN ,Capture Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " ADTRIG ,ADC Trigger" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " OVFM ,Overflow Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " REPEAT ,Auto Repeat Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PWMEN ,PWM Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " PWMIM ,Interval mode" "PWM mode,Interval mode"
|
|
bitfld.long 0x00 10. " KEEP ,Keep Stop Level" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " OUTSL ,PWM Output Start Level" "Low,High"
|
|
bitfld.long 0x00 8. " IDLESL ,IDLE State Level" "Low,High"
|
|
bitfld.long 0x00 3. " STOPCLEAR ,Stop Count Clear" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " STOPHOLD ,Stop Count Hold" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " START ,Counter Start" "Stopped,Started"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "TC_IMSCR,Timer/Counter Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x00 6. " CAPTI ,Capture Trigger Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
bitfld.long 0x00 5. " OVFI ,Timer/Counter Overflow Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
bitfld.long 0x00 4. " MATI ,Pulse Start Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PENDI ,Period End Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " PSTARTI ,Period Start Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
bitfld.long 0x00 1. " STOPI ,Stop Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STARTI ,Start Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
rgroup.long 0x20++0x07
|
|
line.long 0x00 "TC_RISR,Timer/Counter Raw Interrupt Status Register"
|
|
bitfld.long 0x00 6. " CAPTI ,Raw interrupt state of the CAPT interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " OVFI ,Raw interrupt state of the OVF interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. " MATI ,Raw interrupt state of the PULSESTA interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PENDI ,Raw interrupt state of the PEND interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " PSTARTI ,Raw interrupt state of the PSTA interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " STOPI ,Raw interrupt state of the STOP interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STARTI ,Raw interrupt state of the START interrupt" "Not occurred,Occurred"
|
|
line.long 0x04 "TC_MISR,Timer/Counter Masked Interrupt Status Register"
|
|
bitfld.long 0x04 6. " CAPTI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x04 5. " OVFI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x04 4. " MATI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 3. " PENDI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x04 2. " PSTARTI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x04 1. " STOPI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 0. " STARTI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
wgroup.long 0x28++0x03
|
|
line.long 0x00 "TC_ICR,Timer/Counter Interrupt Clear Register"
|
|
bitfld.long 0x00 6. " CAPTI ,Clears the CAPT interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 5. " OVFI ,Clears the OVF interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 4. " MATI ,Clears the MATCH interrupt" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PENDI ,Clears the PEND interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 2. " PSTARTI ,Clears the PSTART interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 1. " STOPI ,Clears the STOP interrupt" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STARTI ,Clears the START interrupt" "No effect,Clear"
|
|
group.long 0x2C++0x0F
|
|
line.long 0x00 "TC_CDR,Timer/Counter Clock Divider Register"
|
|
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock divider"
|
|
bitfld.long 0x00 0.--3. " DIVN ,Clock divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "TC_CSMR,Timer/Counter Counter Size Mask Register"
|
|
bitfld.long 0x04 0.--3. " SIZE ,Timer/Counter Size Mask Field" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit"
|
|
line.long 0x08 "TC_PRDR,Timer/Counter Period Register"
|
|
hexmask.long.word 0x08 0.--15. 1. " PERIOD ,PWM Period Width"
|
|
line.long 0x0C "TC_PULR,Timer/Counter Pulse Register"
|
|
hexmask.long.word 0x0C 0.--15. 1. " PULSE ,PWM Pulse Width"
|
|
rgroup.long 0x3C++0x1B
|
|
line.long 0x00 "TC_CCDR,Timer/Counter Current Clock Divider Register"
|
|
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock divider"
|
|
bitfld.long 0x00 0.--3. " DIVN ,Clock divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "TC_CCSMR,Timer/Counter Current Counter Size Mask Register"
|
|
bitfld.long 0x04 0.--3. " SIZE ,Timer/Counter Size Mask Field" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit"
|
|
line.long 0x08 "TC_CPRDR,Timer/Counter Current Period Register"
|
|
hexmask.long.word 0x08 0.--15. 1. " PERIOD ,PWM Period Width"
|
|
line.long 0x0C "TC_CPULR,Timer/Counter Current Pulse Register"
|
|
hexmask.long.word 0x0C 0.--15. 1. " PULSE ,PWM Pulse Width"
|
|
line.long 0x10 "TC_CUCR,Timer/Counter Capture up Counter Value Register"
|
|
hexmask.long.word 0x10 0.--15. 1. " COUNT ,Capture Up Count Value"
|
|
line.long 0x14 "TC_CUCR,Timer/Counter Capture down Counter Value Register"
|
|
hexmask.long.word 0x14 0.--15. 1. " COUNT ,Capture Down Count Value"
|
|
line.long 0x18 "TC_CUCR,Timer/Counter Counter Value Register"
|
|
hexmask.long.word 0x18 0.--15. 1. " COUNT ,Current Count Value"
|
|
width 11.
|
|
tree.end
|
|
tree "TC5"
|
|
base ad:0x40065000
|
|
width 10.
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "TC_IDR,Timer/Counter ID Register"
|
|
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
|
|
group.long 0x04++0x07
|
|
line.long 0x00 "TC_CSSR,Timer/Counter Clock Source Selection Register"
|
|
bitfld.long 0x00 0. " CLKSRC ,Clock Source Selection Field" "PCLK,External clock"
|
|
line.long 0x04 "TC_CEDR,Timer/Counter Clock Enable/Disable Register"
|
|
bitfld.long 0x04 31. " DBGEN ,Debug Mode Enable/Disable Control Bit" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " CLKEN ,Clock Enable/Disable Control Bit" "Disabled,Enabled"
|
|
wgroup.long 0x0C++0x0B
|
|
line.long 0x00 "TC_SRR,Timer/Counter Software Reset Register"
|
|
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
|
|
line.long 0x04 "TC_CSR,Timer/Counter Control Set Register"
|
|
bitfld.long 0x04 29. " PWMEX5 ,PWM output extension" "No effect,Enable"
|
|
bitfld.long 0x04 28. " PWMEX4 ,PWM output extension" "No effect,Enable"
|
|
bitfld.long 0x04 27. " PWMEX3 ,PWM output extension" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 26. " PWMEX2 ,PWM output extension" "No effect,Enable"
|
|
bitfld.long 0x04 25. " PWMEX1 ,PWM output extension" "No effect,Enable"
|
|
bitfld.long 0x04 24. " PWMEX0 ,PWM output extension " "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 18. " CAPT_R ,Capture by Rising Edge Trigger" "No effect,Detect"
|
|
bitfld.long 0x04 17. " CAPT_F ,Capture by Falling Edge Trigger" "No effect,Detect"
|
|
bitfld.long 0x04 16. " CAPTEN ,Capture Enable" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 15. " ADTRIG ,ADC Trigger" "No effect,Enable"
|
|
bitfld.long 0x04 14. " OVFM ,Overflow Mode" "No effect,Enable"
|
|
bitfld.long 0x04 13. " REPEAT ,Auto Repeat Mode" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 12. " PWMEN ,PWM Enable" "No effect,Enable"
|
|
bitfld.long 0x04 11. " PWMIM ,Interval mode" "No effect,Enable"
|
|
bitfld.long 0x04 10. " KEEP ,Keep Stop Level" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 9. " OUTSL ,PWM Output Start Level" "No effect,High level"
|
|
bitfld.long 0x04 8. " IDLESL ,IDLE State Level" "No effect,High level"
|
|
bitfld.long 0x04 3. " STOPCLEAR ,Stop Count Clear" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 2. " STOPHOLD ,Stop Count Hold" "No effect,Enable"
|
|
bitfld.long 0x04 1. " UPDATE ,Update PWM parameter" "No effect,Update"
|
|
bitfld.long 0x04 0. " START ,Counter Start" "No effect,Start"
|
|
line.long 0x08 "TC_CCR,Timer/Counter Control Clear Register"
|
|
bitfld.long 0x08 29. " PWMEX5 ,PWM output extension" "No effect,Disable"
|
|
bitfld.long 0x08 28. " PWMEX4 ,PWM output extension" "No effect,Disable"
|
|
bitfld.long 0x08 27. " PWMEX3 ,PWM output extension" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 26. " PWMEX2 ,PWM output extension" "No effect,Disable"
|
|
bitfld.long 0x08 25. " PWMEX1 ,PWM output extension" "No effect,Disable"
|
|
bitfld.long 0x08 24. " PWMEX0 ,PWM output extension " "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 18. " CAPT_R ,Capture by Rising Edge Trigger" "No effect,Disable"
|
|
bitfld.long 0x08 17. " CAPT_F ,Capture by Falling Edge Trigger" "No effect,Disable"
|
|
bitfld.long 0x08 16. " CAPTEN ,Capture Enable" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 15. " ADTRIG ,ADC Trigger" "No effect,Disable"
|
|
bitfld.long 0x08 14. " OVFM ,Overflow Mode" "No effect,Disable"
|
|
bitfld.long 0x08 13. " REPEAT ,Auto Repeat Mode" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 12. " PWMEN ,PWM Enable" "No effect,Disable"
|
|
bitfld.long 0x08 11. " PWMIM ,Interval mode" "No effect,PWM mode"
|
|
bitfld.long 0x08 10. " KEEP ,Keep Stop Level" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 9. " OUTSL ,PWM Output Start Level" "No effect,Low level"
|
|
bitfld.long 0x08 8. " IDLESL ,IDLE State Level" "No effect,Low level"
|
|
bitfld.long 0x08 3. " STOPCLEAR ,Stop Count Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 2. " STOPHOLD ,Stop Count Hold" "No effect,Disable"
|
|
bitfld.long 0x08 1. " UPDATE ,Update PWM parameter" "No effect,Update"
|
|
bitfld.long 0x08 0. " START ,Counter Start" "No effect,Stop"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "TC_SR,Timer/Counter Status Register"
|
|
bitfld.long 0x00 29. " PWMEX5 ,PWM output extension status" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " PWMEX4 ,PWM output extension status" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " PWMEX3 ,PWM output extension status" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PWMEX2 ,PWM output extension status" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " PWMEX1 ,PWM output extension status" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " PWMEX0 ,PWM output extension status " "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " CAPT_R ,Capture by Rising Edge Trigger" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CAPT_F ,Capture by Falling Edge Trigger" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " CAPTEN ,Capture Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " ADTRIG ,ADC Trigger" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " OVFM ,Overflow Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " REPEAT ,Auto Repeat Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PWMEN ,PWM Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " PWMIM ,Interval mode" "PWM mode,Interval mode"
|
|
bitfld.long 0x00 10. " KEEP ,Keep Stop Level" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " OUTSL ,PWM Output Start Level" "Low,High"
|
|
bitfld.long 0x00 8. " IDLESL ,IDLE State Level" "Low,High"
|
|
bitfld.long 0x00 3. " STOPCLEAR ,Stop Count Clear" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " STOPHOLD ,Stop Count Hold" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " START ,Counter Start" "Stopped,Started"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "TC_IMSCR,Timer/Counter Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x00 6. " CAPTI ,Capture Trigger Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
bitfld.long 0x00 5. " OVFI ,Timer/Counter Overflow Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
bitfld.long 0x00 4. " MATI ,Pulse Start Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PENDI ,Period End Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " PSTARTI ,Period Start Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
bitfld.long 0x00 1. " STOPI ,Stop Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STARTI ,Start Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
rgroup.long 0x20++0x07
|
|
line.long 0x00 "TC_RISR,Timer/Counter Raw Interrupt Status Register"
|
|
bitfld.long 0x00 6. " CAPTI ,Raw interrupt state of the CAPT interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " OVFI ,Raw interrupt state of the OVF interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. " MATI ,Raw interrupt state of the PULSESTA interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PENDI ,Raw interrupt state of the PEND interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " PSTARTI ,Raw interrupt state of the PSTA interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " STOPI ,Raw interrupt state of the STOP interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STARTI ,Raw interrupt state of the START interrupt" "Not occurred,Occurred"
|
|
line.long 0x04 "TC_MISR,Timer/Counter Masked Interrupt Status Register"
|
|
bitfld.long 0x04 6. " CAPTI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x04 5. " OVFI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x04 4. " MATI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 3. " PENDI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x04 2. " PSTARTI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x04 1. " STOPI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 0. " STARTI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
wgroup.long 0x28++0x03
|
|
line.long 0x00 "TC_ICR,Timer/Counter Interrupt Clear Register"
|
|
bitfld.long 0x00 6. " CAPTI ,Clears the CAPT interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 5. " OVFI ,Clears the OVF interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 4. " MATI ,Clears the MATCH interrupt" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PENDI ,Clears the PEND interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 2. " PSTARTI ,Clears the PSTART interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 1. " STOPI ,Clears the STOP interrupt" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STARTI ,Clears the START interrupt" "No effect,Clear"
|
|
group.long 0x2C++0x0F
|
|
line.long 0x00 "TC_CDR,Timer/Counter Clock Divider Register"
|
|
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock divider"
|
|
bitfld.long 0x00 0.--3. " DIVN ,Clock divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "TC_CSMR,Timer/Counter Counter Size Mask Register"
|
|
bitfld.long 0x04 0.--3. " SIZE ,Timer/Counter Size Mask Field" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit"
|
|
line.long 0x08 "TC_PRDR,Timer/Counter Period Register"
|
|
hexmask.long.word 0x08 0.--15. 1. " PERIOD ,PWM Period Width"
|
|
line.long 0x0C "TC_PULR,Timer/Counter Pulse Register"
|
|
hexmask.long.word 0x0C 0.--15. 1. " PULSE ,PWM Pulse Width"
|
|
rgroup.long 0x3C++0x1B
|
|
line.long 0x00 "TC_CCDR,Timer/Counter Current Clock Divider Register"
|
|
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock divider"
|
|
bitfld.long 0x00 0.--3. " DIVN ,Clock divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "TC_CCSMR,Timer/Counter Current Counter Size Mask Register"
|
|
bitfld.long 0x04 0.--3. " SIZE ,Timer/Counter Size Mask Field" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit"
|
|
line.long 0x08 "TC_CPRDR,Timer/Counter Current Period Register"
|
|
hexmask.long.word 0x08 0.--15. 1. " PERIOD ,PWM Period Width"
|
|
line.long 0x0C "TC_CPULR,Timer/Counter Current Pulse Register"
|
|
hexmask.long.word 0x0C 0.--15. 1. " PULSE ,PWM Pulse Width"
|
|
line.long 0x10 "TC_CUCR,Timer/Counter Capture up Counter Value Register"
|
|
hexmask.long.word 0x10 0.--15. 1. " COUNT ,Capture Up Count Value"
|
|
line.long 0x14 "TC_CUCR,Timer/Counter Capture down Counter Value Register"
|
|
hexmask.long.word 0x14 0.--15. 1. " COUNT ,Capture Down Count Value"
|
|
line.long 0x18 "TC_CUCR,Timer/Counter Counter Value Register"
|
|
hexmask.long.word 0x18 0.--15. 1. " COUNT ,Current Count Value"
|
|
width 11.
|
|
tree.end
|
|
tree "TC6"
|
|
base ad:0x40066000
|
|
width 10.
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "TC_IDR,Timer/Counter ID Register"
|
|
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
|
|
group.long 0x04++0x07
|
|
line.long 0x00 "TC_CSSR,Timer/Counter Clock Source Selection Register"
|
|
bitfld.long 0x00 0. " CLKSRC ,Clock Source Selection Field" "PCLK,External clock"
|
|
line.long 0x04 "TC_CEDR,Timer/Counter Clock Enable/Disable Register"
|
|
bitfld.long 0x04 31. " DBGEN ,Debug Mode Enable/Disable Control Bit" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " CLKEN ,Clock Enable/Disable Control Bit" "Disabled,Enabled"
|
|
wgroup.long 0x0C++0x0B
|
|
line.long 0x00 "TC_SRR,Timer/Counter Software Reset Register"
|
|
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
|
|
line.long 0x04 "TC_CSR,Timer/Counter Control Set Register"
|
|
bitfld.long 0x04 29. " PWMEX5 ,PWM output extension" "No effect,Enable"
|
|
bitfld.long 0x04 28. " PWMEX4 ,PWM output extension" "No effect,Enable"
|
|
bitfld.long 0x04 27. " PWMEX3 ,PWM output extension" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 26. " PWMEX2 ,PWM output extension" "No effect,Enable"
|
|
bitfld.long 0x04 25. " PWMEX1 ,PWM output extension" "No effect,Enable"
|
|
bitfld.long 0x04 24. " PWMEX0 ,PWM output extension " "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 18. " CAPT_R ,Capture by Rising Edge Trigger" "No effect,Detect"
|
|
bitfld.long 0x04 17. " CAPT_F ,Capture by Falling Edge Trigger" "No effect,Detect"
|
|
bitfld.long 0x04 16. " CAPTEN ,Capture Enable" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 15. " ADTRIG ,ADC Trigger" "No effect,Enable"
|
|
bitfld.long 0x04 14. " OVFM ,Overflow Mode" "No effect,Enable"
|
|
bitfld.long 0x04 13. " REPEAT ,Auto Repeat Mode" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 12. " PWMEN ,PWM Enable" "No effect,Enable"
|
|
bitfld.long 0x04 11. " PWMIM ,Interval mode" "No effect,Enable"
|
|
bitfld.long 0x04 10. " KEEP ,Keep Stop Level" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 9. " OUTSL ,PWM Output Start Level" "No effect,High level"
|
|
bitfld.long 0x04 8. " IDLESL ,IDLE State Level" "No effect,High level"
|
|
bitfld.long 0x04 3. " STOPCLEAR ,Stop Count Clear" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 2. " STOPHOLD ,Stop Count Hold" "No effect,Enable"
|
|
bitfld.long 0x04 1. " UPDATE ,Update PWM parameter" "No effect,Update"
|
|
bitfld.long 0x04 0. " START ,Counter Start" "No effect,Start"
|
|
line.long 0x08 "TC_CCR,Timer/Counter Control Clear Register"
|
|
bitfld.long 0x08 29. " PWMEX5 ,PWM output extension" "No effect,Disable"
|
|
bitfld.long 0x08 28. " PWMEX4 ,PWM output extension" "No effect,Disable"
|
|
bitfld.long 0x08 27. " PWMEX3 ,PWM output extension" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 26. " PWMEX2 ,PWM output extension" "No effect,Disable"
|
|
bitfld.long 0x08 25. " PWMEX1 ,PWM output extension" "No effect,Disable"
|
|
bitfld.long 0x08 24. " PWMEX0 ,PWM output extension " "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 18. " CAPT_R ,Capture by Rising Edge Trigger" "No effect,Disable"
|
|
bitfld.long 0x08 17. " CAPT_F ,Capture by Falling Edge Trigger" "No effect,Disable"
|
|
bitfld.long 0x08 16. " CAPTEN ,Capture Enable" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 15. " ADTRIG ,ADC Trigger" "No effect,Disable"
|
|
bitfld.long 0x08 14. " OVFM ,Overflow Mode" "No effect,Disable"
|
|
bitfld.long 0x08 13. " REPEAT ,Auto Repeat Mode" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 12. " PWMEN ,PWM Enable" "No effect,Disable"
|
|
bitfld.long 0x08 11. " PWMIM ,Interval mode" "No effect,PWM mode"
|
|
bitfld.long 0x08 10. " KEEP ,Keep Stop Level" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 9. " OUTSL ,PWM Output Start Level" "No effect,Low level"
|
|
bitfld.long 0x08 8. " IDLESL ,IDLE State Level" "No effect,Low level"
|
|
bitfld.long 0x08 3. " STOPCLEAR ,Stop Count Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 2. " STOPHOLD ,Stop Count Hold" "No effect,Disable"
|
|
bitfld.long 0x08 1. " UPDATE ,Update PWM parameter" "No effect,Update"
|
|
bitfld.long 0x08 0. " START ,Counter Start" "No effect,Stop"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "TC_SR,Timer/Counter Status Register"
|
|
bitfld.long 0x00 29. " PWMEX5 ,PWM output extension status" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " PWMEX4 ,PWM output extension status" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " PWMEX3 ,PWM output extension status" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PWMEX2 ,PWM output extension status" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " PWMEX1 ,PWM output extension status" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " PWMEX0 ,PWM output extension status " "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " CAPT_R ,Capture by Rising Edge Trigger" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CAPT_F ,Capture by Falling Edge Trigger" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " CAPTEN ,Capture Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " ADTRIG ,ADC Trigger" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " OVFM ,Overflow Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " REPEAT ,Auto Repeat Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PWMEN ,PWM Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " PWMIM ,Interval mode" "PWM mode,Interval mode"
|
|
bitfld.long 0x00 10. " KEEP ,Keep Stop Level" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " OUTSL ,PWM Output Start Level" "Low,High"
|
|
bitfld.long 0x00 8. " IDLESL ,IDLE State Level" "Low,High"
|
|
bitfld.long 0x00 3. " STOPCLEAR ,Stop Count Clear" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " STOPHOLD ,Stop Count Hold" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " START ,Counter Start" "Stopped,Started"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "TC_IMSCR,Timer/Counter Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x00 6. " CAPTI ,Capture Trigger Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
bitfld.long 0x00 5. " OVFI ,Timer/Counter Overflow Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
bitfld.long 0x00 4. " MATI ,Pulse Start Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PENDI ,Period End Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " PSTARTI ,Period Start Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
bitfld.long 0x00 1. " STOPI ,Stop Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STARTI ,Start Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
rgroup.long 0x20++0x07
|
|
line.long 0x00 "TC_RISR,Timer/Counter Raw Interrupt Status Register"
|
|
bitfld.long 0x00 6. " CAPTI ,Raw interrupt state of the CAPT interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " OVFI ,Raw interrupt state of the OVF interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. " MATI ,Raw interrupt state of the PULSESTA interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PENDI ,Raw interrupt state of the PEND interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " PSTARTI ,Raw interrupt state of the PSTA interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " STOPI ,Raw interrupt state of the STOP interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STARTI ,Raw interrupt state of the START interrupt" "Not occurred,Occurred"
|
|
line.long 0x04 "TC_MISR,Timer/Counter Masked Interrupt Status Register"
|
|
bitfld.long 0x04 6. " CAPTI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x04 5. " OVFI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x04 4. " MATI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 3. " PENDI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x04 2. " PSTARTI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x04 1. " STOPI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 0. " STARTI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
wgroup.long 0x28++0x03
|
|
line.long 0x00 "TC_ICR,Timer/Counter Interrupt Clear Register"
|
|
bitfld.long 0x00 6. " CAPTI ,Clears the CAPT interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 5. " OVFI ,Clears the OVF interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 4. " MATI ,Clears the MATCH interrupt" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PENDI ,Clears the PEND interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 2. " PSTARTI ,Clears the PSTART interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 1. " STOPI ,Clears the STOP interrupt" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STARTI ,Clears the START interrupt" "No effect,Clear"
|
|
group.long 0x2C++0x0F
|
|
line.long 0x00 "TC_CDR,Timer/Counter Clock Divider Register"
|
|
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock divider"
|
|
bitfld.long 0x00 0.--3. " DIVN ,Clock divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "TC_CSMR,Timer/Counter Counter Size Mask Register"
|
|
bitfld.long 0x04 0.--3. " SIZE ,Timer/Counter Size Mask Field" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit"
|
|
line.long 0x08 "TC_PRDR,Timer/Counter Period Register"
|
|
hexmask.long.word 0x08 0.--15. 1. " PERIOD ,PWM Period Width"
|
|
line.long 0x0C "TC_PULR,Timer/Counter Pulse Register"
|
|
hexmask.long.word 0x0C 0.--15. 1. " PULSE ,PWM Pulse Width"
|
|
rgroup.long 0x3C++0x1B
|
|
line.long 0x00 "TC_CCDR,Timer/Counter Current Clock Divider Register"
|
|
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock divider"
|
|
bitfld.long 0x00 0.--3. " DIVN ,Clock divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "TC_CCSMR,Timer/Counter Current Counter Size Mask Register"
|
|
bitfld.long 0x04 0.--3. " SIZE ,Timer/Counter Size Mask Field" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit"
|
|
line.long 0x08 "TC_CPRDR,Timer/Counter Current Period Register"
|
|
hexmask.long.word 0x08 0.--15. 1. " PERIOD ,PWM Period Width"
|
|
line.long 0x0C "TC_CPULR,Timer/Counter Current Pulse Register"
|
|
hexmask.long.word 0x0C 0.--15. 1. " PULSE ,PWM Pulse Width"
|
|
line.long 0x10 "TC_CUCR,Timer/Counter Capture up Counter Value Register"
|
|
hexmask.long.word 0x10 0.--15. 1. " COUNT ,Capture Up Count Value"
|
|
line.long 0x14 "TC_CUCR,Timer/Counter Capture down Counter Value Register"
|
|
hexmask.long.word 0x14 0.--15. 1. " COUNT ,Capture Down Count Value"
|
|
line.long 0x18 "TC_CUCR,Timer/Counter Counter Value Register"
|
|
hexmask.long.word 0x18 0.--15. 1. " COUNT ,Current Count Value"
|
|
width 11.
|
|
tree.end
|
|
tree "TC7"
|
|
base ad:0x40067000
|
|
width 10.
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "TC_IDR,Timer/Counter ID Register"
|
|
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
|
|
group.long 0x04++0x07
|
|
line.long 0x00 "TC_CSSR,Timer/Counter Clock Source Selection Register"
|
|
bitfld.long 0x00 0. " CLKSRC ,Clock Source Selection Field" "PCLK,External clock"
|
|
line.long 0x04 "TC_CEDR,Timer/Counter Clock Enable/Disable Register"
|
|
bitfld.long 0x04 31. " DBGEN ,Debug Mode Enable/Disable Control Bit" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " CLKEN ,Clock Enable/Disable Control Bit" "Disabled,Enabled"
|
|
wgroup.long 0x0C++0x0B
|
|
line.long 0x00 "TC_SRR,Timer/Counter Software Reset Register"
|
|
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
|
|
line.long 0x04 "TC_CSR,Timer/Counter Control Set Register"
|
|
bitfld.long 0x04 29. " PWMEX5 ,PWM output extension" "No effect,Enable"
|
|
bitfld.long 0x04 28. " PWMEX4 ,PWM output extension" "No effect,Enable"
|
|
bitfld.long 0x04 27. " PWMEX3 ,PWM output extension" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 26. " PWMEX2 ,PWM output extension" "No effect,Enable"
|
|
bitfld.long 0x04 25. " PWMEX1 ,PWM output extension" "No effect,Enable"
|
|
bitfld.long 0x04 24. " PWMEX0 ,PWM output extension " "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 18. " CAPT_R ,Capture by Rising Edge Trigger" "No effect,Detect"
|
|
bitfld.long 0x04 17. " CAPT_F ,Capture by Falling Edge Trigger" "No effect,Detect"
|
|
bitfld.long 0x04 16. " CAPTEN ,Capture Enable" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 15. " ADTRIG ,ADC Trigger" "No effect,Enable"
|
|
bitfld.long 0x04 14. " OVFM ,Overflow Mode" "No effect,Enable"
|
|
bitfld.long 0x04 13. " REPEAT ,Auto Repeat Mode" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 12. " PWMEN ,PWM Enable" "No effect,Enable"
|
|
bitfld.long 0x04 11. " PWMIM ,Interval mode" "No effect,Enable"
|
|
bitfld.long 0x04 10. " KEEP ,Keep Stop Level" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 9. " OUTSL ,PWM Output Start Level" "No effect,High level"
|
|
bitfld.long 0x04 8. " IDLESL ,IDLE State Level" "No effect,High level"
|
|
bitfld.long 0x04 3. " STOPCLEAR ,Stop Count Clear" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 2. " STOPHOLD ,Stop Count Hold" "No effect,Enable"
|
|
bitfld.long 0x04 1. " UPDATE ,Update PWM parameter" "No effect,Update"
|
|
bitfld.long 0x04 0. " START ,Counter Start" "No effect,Start"
|
|
line.long 0x08 "TC_CCR,Timer/Counter Control Clear Register"
|
|
bitfld.long 0x08 29. " PWMEX5 ,PWM output extension" "No effect,Disable"
|
|
bitfld.long 0x08 28. " PWMEX4 ,PWM output extension" "No effect,Disable"
|
|
bitfld.long 0x08 27. " PWMEX3 ,PWM output extension" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 26. " PWMEX2 ,PWM output extension" "No effect,Disable"
|
|
bitfld.long 0x08 25. " PWMEX1 ,PWM output extension" "No effect,Disable"
|
|
bitfld.long 0x08 24. " PWMEX0 ,PWM output extension " "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 18. " CAPT_R ,Capture by Rising Edge Trigger" "No effect,Disable"
|
|
bitfld.long 0x08 17. " CAPT_F ,Capture by Falling Edge Trigger" "No effect,Disable"
|
|
bitfld.long 0x08 16. " CAPTEN ,Capture Enable" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 15. " ADTRIG ,ADC Trigger" "No effect,Disable"
|
|
bitfld.long 0x08 14. " OVFM ,Overflow Mode" "No effect,Disable"
|
|
bitfld.long 0x08 13. " REPEAT ,Auto Repeat Mode" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 12. " PWMEN ,PWM Enable" "No effect,Disable"
|
|
bitfld.long 0x08 11. " PWMIM ,Interval mode" "No effect,PWM mode"
|
|
bitfld.long 0x08 10. " KEEP ,Keep Stop Level" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 9. " OUTSL ,PWM Output Start Level" "No effect,Low level"
|
|
bitfld.long 0x08 8. " IDLESL ,IDLE State Level" "No effect,Low level"
|
|
bitfld.long 0x08 3. " STOPCLEAR ,Stop Count Clear" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x08 2. " STOPHOLD ,Stop Count Hold" "No effect,Disable"
|
|
bitfld.long 0x08 1. " UPDATE ,Update PWM parameter" "No effect,Update"
|
|
bitfld.long 0x08 0. " START ,Counter Start" "No effect,Stop"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "TC_SR,Timer/Counter Status Register"
|
|
bitfld.long 0x00 29. " PWMEX5 ,PWM output extension status" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " PWMEX4 ,PWM output extension status" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " PWMEX3 ,PWM output extension status" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PWMEX2 ,PWM output extension status" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " PWMEX1 ,PWM output extension status" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " PWMEX0 ,PWM output extension status " "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " CAPT_R ,Capture by Rising Edge Trigger" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CAPT_F ,Capture by Falling Edge Trigger" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " CAPTEN ,Capture Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " ADTRIG ,ADC Trigger" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " OVFM ,Overflow Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " REPEAT ,Auto Repeat Mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PWMEN ,PWM Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " PWMIM ,Interval mode" "PWM mode,Interval mode"
|
|
bitfld.long 0x00 10. " KEEP ,Keep Stop Level" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " OUTSL ,PWM Output Start Level" "Low,High"
|
|
bitfld.long 0x00 8. " IDLESL ,IDLE State Level" "Low,High"
|
|
bitfld.long 0x00 3. " STOPCLEAR ,Stop Count Clear" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " STOPHOLD ,Stop Count Hold" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " START ,Counter Start" "Stopped,Started"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "TC_IMSCR,Timer/Counter Interrupt Mask Set/Clear Register"
|
|
bitfld.long 0x00 6. " CAPTI ,Capture Trigger Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
bitfld.long 0x00 5. " OVFI ,Timer/Counter Overflow Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
bitfld.long 0x00 4. " MATI ,Pulse Start Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PENDI ,Period End Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " PSTARTI ,Period Start Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
bitfld.long 0x00 1. " STOPI ,Stop Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STARTI ,Start Interrupt Mask Set/Clear Bit" "Masked,Not masked"
|
|
rgroup.long 0x20++0x07
|
|
line.long 0x00 "TC_RISR,Timer/Counter Raw Interrupt Status Register"
|
|
bitfld.long 0x00 6. " CAPTI ,Raw interrupt state of the CAPT interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " OVFI ,Raw interrupt state of the OVF interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. " MATI ,Raw interrupt state of the PULSESTA interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PENDI ,Raw interrupt state of the PEND interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " PSTARTI ,Raw interrupt state of the PSTA interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " STOPI ,Raw interrupt state of the STOP interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STARTI ,Raw interrupt state of the START interrupt" "Not occurred,Occurred"
|
|
line.long 0x04 "TC_MISR,Timer/Counter Masked Interrupt Status Register"
|
|
bitfld.long 0x04 6. " CAPTI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x04 5. " OVFI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x04 4. " MATI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 3. " PENDI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x04 2. " PSTARTI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x04 1. " STOPI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 0. " STARTI ,Masked interrupt status of the START interrupt" "Not occurred,Occurred"
|
|
wgroup.long 0x28++0x03
|
|
line.long 0x00 "TC_ICR,Timer/Counter Interrupt Clear Register"
|
|
bitfld.long 0x00 6. " CAPTI ,Clears the CAPT interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 5. " OVFI ,Clears the OVF interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 4. " MATI ,Clears the MATCH interrupt" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PENDI ,Clears the PEND interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 2. " PSTARTI ,Clears the PSTART interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 1. " STOPI ,Clears the STOP interrupt" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STARTI ,Clears the START interrupt" "No effect,Clear"
|
|
group.long 0x2C++0x0F
|
|
line.long 0x00 "TC_CDR,Timer/Counter Clock Divider Register"
|
|
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock divider"
|
|
bitfld.long 0x00 0.--3. " DIVN ,Clock divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "TC_CSMR,Timer/Counter Counter Size Mask Register"
|
|
bitfld.long 0x04 0.--3. " SIZE ,Timer/Counter Size Mask Field" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit"
|
|
line.long 0x08 "TC_PRDR,Timer/Counter Period Register"
|
|
hexmask.long.word 0x08 0.--15. 1. " PERIOD ,PWM Period Width"
|
|
line.long 0x0C "TC_PULR,Timer/Counter Pulse Register"
|
|
hexmask.long.word 0x0C 0.--15. 1. " PULSE ,PWM Pulse Width"
|
|
rgroup.long 0x3C++0x1B
|
|
line.long 0x00 "TC_CCDR,Timer/Counter Current Clock Divider Register"
|
|
hexmask.long.word 0x00 4.--14. 1. " DIVM ,Clock divider"
|
|
bitfld.long 0x00 0.--3. " DIVN ,Clock divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "TC_CCSMR,Timer/Counter Current Counter Size Mask Register"
|
|
bitfld.long 0x04 0.--3. " SIZE ,Timer/Counter Size Mask Field" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit"
|
|
line.long 0x08 "TC_CPRDR,Timer/Counter Current Period Register"
|
|
hexmask.long.word 0x08 0.--15. 1. " PERIOD ,PWM Period Width"
|
|
line.long 0x0C "TC_CPULR,Timer/Counter Current Pulse Register"
|
|
hexmask.long.word 0x0C 0.--15. 1. " PULSE ,PWM Pulse Width"
|
|
line.long 0x10 "TC_CUCR,Timer/Counter Capture up Counter Value Register"
|
|
hexmask.long.word 0x10 0.--15. 1. " COUNT ,Capture Up Count Value"
|
|
line.long 0x14 "TC_CUCR,Timer/Counter Capture down Counter Value Register"
|
|
hexmask.long.word 0x14 0.--15. 1. " COUNT ,Capture Down Count Value"
|
|
line.long 0x18 "TC_CUCR,Timer/Counter Counter Value Register"
|
|
hexmask.long.word 0x18 0.--15. 1. " COUNT ,Current Count Value"
|
|
width 11.
|
|
tree.end
|
|
tree.end
|
|
tree.open "USART (Universal Asynchronous/Synchronous Receiver/Transmitter)"
|
|
tree "USART0"
|
|
base ad:0x40080000
|
|
width 11.
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "US_IDR,USART ID Register"
|
|
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "US_CEDR,USART Clock Enable Disable Register"
|
|
bitfld.long 0x00 31. " DBGEN ,Debug mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CLKEN ,Clock Enable/Disable Control Bit" "Disabled,Enabled"
|
|
wgroup.long 0x08++0x07
|
|
line.long 0x00 "US_SRR,USART Software Reset Register"
|
|
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
|
|
line.long 0x04 "US_CR,USART Control Register"
|
|
bitfld.long 0x04 19. " RSTLIN ,Reset the LIN" "No effect,Reset"
|
|
bitfld.long 0x04 18. " STMESSAGE ,Start Message" "No effect,Send"
|
|
bitfld.long 0x04 17. " STRESP ,Start Response" "No effect,Send"
|
|
textline " "
|
|
bitfld.long 0x04 16. " STHEADER ,Start Header" "No effect,Send"
|
|
bitfld.long 0x04 12. " SENDA ,Send Address" "No effect,Send"
|
|
bitfld.long 0x04 11. " STTTO ,Start Time-out" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x04 10. " STPBRK ,Stop Break" "No effect,Stop"
|
|
bitfld.long 0x04 9. " STTBRK ,Start Break" "No effect,Start"
|
|
bitfld.long 0x04 7. " TXDIS ,Transmitter disabled" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x04 6. " TXEN ,Transmitter Enable" "No effect,Enable"
|
|
bitfld.long 0x04 5. " RXDIS ,Receiver Disable" "No effect,Disable"
|
|
bitfld.long 0x04 4. " RXEN ,Receiver Enable" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 3. " RSTTX ,Reset Transmitter" "No effect,Reset"
|
|
bitfld.long 0x04 2. " RSTRX ,Reset Receiver" "No effect,Reset"
|
|
if (((d.l(ad:0x40080000+0x10))&0x100)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "US_MR,USART Mode Register"
|
|
bitfld.long 0x00 20. " DSB ,Data Start Bit Selection" "LSB,MSB"
|
|
textline " "
|
|
bitfld.long 0x00 19. " LIN2_0 ,Select the LIN protocol release" "LIN 1.2,LIN 2.0"
|
|
bitfld.long 0x00 18. " CLKO ,Clock output select" "Pin not driven,Pin driven"
|
|
bitfld.long 0x00 17. " MODE9 ,9-bit character length" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SMCARDPT ,Smart Card protocol" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " CHMODE[1:0] ,Channel mode" "Normal mode,Automatic echo,Local loopback,Remote loopback"
|
|
bitfld.long 0x00 12.--13. " NBSTOP[1:0] ,Number of stop bits" "1,1.5,2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " AR[2:0] ,Parity type" "Even parity,Odd Parity,Parity forced to 0,Parity forced to 1,No parity,No parity,Multi-drop mode,Multi-drop mode"
|
|
bitfld.long 0x00 8. " SYNC ,Synchronous mode select" "Asynchronous Mode,Synchronous Mode"
|
|
bitfld.long 0x00 6.--7. " CHRL[1:0] ,Character length" "5,6,7,8"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " CLKS[1:0] ,Clock selection (baud rate generator input clock)" "PCLK,PCLK/8,External clock,External clock"
|
|
bitfld.long 0x00 1.--3. " SENDTIME[2:0] ,Maximum number of repetitions a character has to be transmitted" "0,1,Reserved,Reserved,Reserved,Reserved,Reserved,7"
|
|
bitfld.long 0x00 0. " LIN ,Local Interconnect Network mode" "Disabled,Enabled"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "US_MR,USART Mode Register"
|
|
bitfld.long 0x00 20. " DSB ,Data Start Bit Selection" "LSB,MSB"
|
|
textline " "
|
|
bitfld.long 0x00 19. " LIN2_0 ,Select the LIN protocol release" "LIN 1.2,LIN 2.0"
|
|
bitfld.long 0x00 18. " CLKO ,Clock output select" "Pin not driven,Pin driven"
|
|
bitfld.long 0x00 17. " MODE9 ,9-bit character length" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SMCARDPT ,Smart Card protocol" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " CHMODE[1:0] ,Channel mode" "Normal mode,Automatic echo,Local loopback,Remote loopback"
|
|
bitfld.long 0x00 12.--13. " NBSTOP[1:0] ,Number of stop bits" "1,Reserved,2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " AR[2:0] ,Parity type" "Even parity,Odd Parity,Parity forced to 0,Parity forced to 1,No parity,No parity,Multi-drop mode,Multi-drop mode"
|
|
bitfld.long 0x00 8. " SYNC ,Synchronous mode select" "Asynchronous Mode,Synchronous Mode"
|
|
bitfld.long 0x00 6.--7. " CHRL[1:0] ,Character length" "5,6,7,8"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " CLKS[1:0] ,Clock selection (baud rate generator input clock)" "PCLK,PCLK/8,External clock,External clock"
|
|
bitfld.long 0x00 1.--3. " SENDTIME[2:0] ,Maximum number of repetitions a character has to be transmitted" "0,1,Reserved,Reserved,Reserved,Reserved,Reserved,7"
|
|
bitfld.long 0x00 0. " LIN ,Local Interconnect Network mode" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "US_IMSCR,USART Interrupt Mask Set and Clear Register"
|
|
bitfld.long 0x00 30. " WAKEUP ,Wake Up interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 29. " CHECKSUM ,Check Sum interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 28. " IPERROR ,Identity Parity Error interrupt mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BITERROR ,Bit Error interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 26. " NOTRESP ,Not Responding error interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 25. " ENDMESS ,End of Message interrupt mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " ENDHEADER ,End of Header interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 10. " IDLE ,Idle interrupt interrupt mask" "Masked,End occurred"
|
|
bitfld.long 0x00 9. " TXEMPTY ,Transmitter empty interrupt mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " TIMEOUT ,Receiver time-out interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 7. " PARE ,Parity error interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 6. " FRAME ,Framing error interrupt mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " OVRE ,Overrun error interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " RXBRK ,Break received/end interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 1. " TXRDY ,Transmitter ready interrupt mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXRDY ,Receiver ready interrupt mask" "Masked,Not masked"
|
|
rgroup.long 0x18++0x07
|
|
line.long 0x00 "US_RISR,USART Raw Interrupt Status Register"
|
|
bitfld.long 0x00 30. " WAKEUP ,Wake up raw interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x00 29. " CHECKSUM ,Check sum raw interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x00 28. " IPERROR ,Identity parity error raw interrupt state" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BITERROR ,Bit error raw interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x00 26. " NOTRESP ,Not responding error raw interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x00 25. " ENDMESS ,End of message raw interrupt state" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 24. " ENDHEADER ,End of header raw interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x00 10. " IDLE ,IDLE interrupt raw interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x00 9. " TXEMPTY ,Transmitter empty raw interrupt state" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 8. " TIMEOUT ,Time-out raw interrupt state raw interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x00 7. " PARE ,Parity error raw interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " FRAME ,Framing error raw interrupt state" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 5. " OVRE ,Overrun error raw interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " RXBRK ,Receiver break raw interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " TXRDY ,Transmitter ready raw interrupt state" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXRDY ,Receiver ready raw interrupt state" "Not occurred,Occurred"
|
|
line.long 0x04 "US_MISR,USART Masked Interrupt Status Register"
|
|
bitfld.long 0x04 30. " WAKEUP ,Wake up masked interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x04 29. " CHECKSUM ,Check sum masked interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x04 28. " IPERROR ,Identity parity error masked interrupt state" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 27. " BITERROR ,Bit error masked interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x04 26. " NOTRESP ,Not responding error masked interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x04 25. " ENDMESS ,End of message masked interrupt state" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 24. " ENDHEADER ,End of header masked interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x04 10. " IDLE ,IDLE interrupt masked interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x04 9. " TXEMPTY ,Transmitter empty masked interrupt state" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 8. " TIMEOUT ,Time-out masked interrupt state masked interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x04 7. " PARE ,Parity error masked interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x04 6. " FRAME ,Framing error masked interrupt state" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 5. " OVRE ,Overrun error masked interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x04 2. " RXBRK ,Receiver break masked interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x04 1. " TXRDY ,Transmitter ready masked interrupt state" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 0. " RXRDY ,Receiver ready masked interrupt state" "Not occurred,Occurred"
|
|
wgroup.long 0x20++0x03
|
|
line.long 0x00 "US_ICR,USART Interrupt Clear Register"
|
|
bitfld.long 0x00 30. " WAKEUP ,Wake up cleared interrupt state" "No effect,Clear"
|
|
bitfld.long 0x00 29. " CHECKSUM ,Check sum cleared interrupt state" "No effect,Clear"
|
|
bitfld.long 0x00 28. " IPERROR ,Identity parity error cleared interrupt state" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BITERROR ,Bit error cleared interrupt state" "No effect,Clear"
|
|
bitfld.long 0x00 26. " NOTRESP ,Not responding error cleared interrupt state" "No effect,Clear"
|
|
bitfld.long 0x00 25. " ENDMESS ,End of message cleared interrupt state" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 24. " ENDHEADER ,End of header cleared interrupt state" "No effect,Clear"
|
|
bitfld.long 0x00 10. " IDLE ,IDLE interrupt cleared interrupt state" "No effect,Clear"
|
|
bitfld.long 0x00 9. " TXEMPTY ,Transmitter empty cleared interrupt state" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 8. " TIMEOUT ,Time-out cleared interrupt state" "No effect,Clear"
|
|
bitfld.long 0x00 7. " PARE ,Parity error cleared interrupt state" "No effect,Clear"
|
|
bitfld.long 0x00 6. " FRAME ,Framing error cleared interrupt state" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 5. " OVRE ,Overrun error cleared interrupt state" "No effect,Clear"
|
|
bitfld.long 0x00 2. " RXBRK ,Receiver break cleared interrupt state" "No effect,Clear"
|
|
bitfld.long 0x00 1. " TXRDY ,Transmitter ready cleared interrupt state" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXRDY ,Receiver ready cleared interrupt state" "No effect,Clear"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "US_SR,USART Status Register"
|
|
bitfld.long 0x00 31. " LIN ,LIN busy" "IDLE,BUSY"
|
|
bitfld.long 0x00 30. " WAKEUP ,Wake up" "Not detected,Detected"
|
|
bitfld.long 0x00 29. " CHECKSUM ,Check sum Cleared interrupt state" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IPERROR ,Identity parity error" "Not detected,Detected"
|
|
bitfld.long 0x00 27. " BITERROR ,Bit error" "Not detected,Detected"
|
|
bitfld.long 0x00 26. " NOTRESP ,Not responding error" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ENDMESS ,End of message" "No end,End"
|
|
bitfld.long 0x00 24. " ENDHEADER ,End of header" "No end,End"
|
|
bitfld.long 0x00 11. " IDLEFLAG ,Frame transmission in J1587 protocol" "Received,Not received"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IDLE ,IDLE interrupt" "No end,End"
|
|
bitfld.long 0x00 9. " TXEMPTY ,Transmitter empty" "Not empty,Empty"
|
|
bitfld.long 0x00 8. " TIMEOUT ,Time-out" "No time-out,Time-out"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PARE ,Parity error" "Not false,False"
|
|
bitfld.long 0x00 6. " FRAME ,Framing error" "Not detected,Detected"
|
|
bitfld.long 0x00 5. " OVRE ,Overrun error" "Not transferred,Transferred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RXBRK ,Receiver break" "Not received,Received"
|
|
bitfld.long 0x00 1. " TXRDY ,Transmitter ready" "Waiting,No character"
|
|
bitfld.long 0x00 0. " RXRDY ,Receiver ready" "Not received,Received"
|
|
hgroup.long 0x28++0x03
|
|
hide.long 0x04 "US_RHR,USART Receiver Holding Register"
|
|
in
|
|
wgroup.long 0x2C++0x03
|
|
line.long 0x00 "US_THR,USART Transmit Holding Register"
|
|
hexmask.long.word 0x00 0.--8. 1. " TXCHR ,Character to be transmitted"
|
|
group.long 0x30++0x17
|
|
line.long 0x00 "US_BRGR,USART Baud Rate Generator Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CD ,Clock Divider"
|
|
line.long 0x04 "US_RTOR,USART Receiver Time-Out Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " TO ,Time-out value"
|
|
line.long 0x08 "US_TTGR,USART Transmit Time-Guard Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " TG ,Time-guard value"
|
|
line.long 0x0C "US_LIR,USART Transmit Time-Guard Register"
|
|
hexmask.long.word 0x0C 16.--29. 1. " WAKE_UP_TIME ,Wake up time for the LIN2.0 release"
|
|
bitfld.long 0x0C 9. " CHK_SEL ,Checksum selection" "Classic,Enhanced"
|
|
bitfld.long 0x0C 6.--8. " NDATA ,Number of data field for the LIN2.0 release" "1,2,3,4,5,6,7,8"
|
|
textline " "
|
|
bitfld.long 0x0C 0.--5. " IDENTIFIER ,LIN identifier" "2,2,4,8,?..."
|
|
line.long 0x10 "US_DFWR0,USART Data Field Write 0 Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " DATA3 ,LINs byte field to be transmitted"
|
|
hexmask.long.byte 0x10 16.--23. 1. " DATA2 ,LINs byte field to be transmitted"
|
|
hexmask.long.byte 0x10 8.--15. 1. " DATA1 ,LINs byte field to be transmitted"
|
|
textline " "
|
|
hexmask.long.byte 0x10 0.--7. 1. " DATA0 ,LINs byte field to be transmitted"
|
|
line.long 0x14 "US_DFWR1,USART Data Field Write 1 Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " DATA7 ,LINs byte field to be transmitted"
|
|
hexmask.long.byte 0x14 16.--23. 1. " DATA6 ,LINs byte field to be transmitted"
|
|
hexmask.long.byte 0x14 8.--15. 1. " DATA5 ,LINs byte field to be transmitted"
|
|
textline " "
|
|
hexmask.long.byte 0x14 0.--7. 1. " DATA4 ,LINs byte field to be transmitted"
|
|
rgroup.long 0x48++0x07
|
|
line.long 0x00 "US_DFRR0,USART Data Field Read 0 Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " DATA3 ,LINs byte field to be received"
|
|
hexmask.long.byte 0x00 16.--23. 1. " DATA2 ,LINs byte field to be received"
|
|
hexmask.long.byte 0x00 8.--15. 1. " DATA1 ,LINs byte field to be received"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA0 ,LINs byte field to be received"
|
|
line.long 0x04 "US_DFRR1,USART Data Field Read 1 Register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " DATA7 ,LINs byte field to be received"
|
|
hexmask.long.byte 0x04 16.--23. 1. " DATA6 ,LINs byte field to be received"
|
|
hexmask.long.byte 0x04 8.--15. 1. " DATA5 ,LINs byte field to be received"
|
|
textline " "
|
|
hexmask.long.byte 0x04 0.--7. 1. " DATA4 ,LINs byte field to be received"
|
|
group.long 0x50++0x0F
|
|
line.long 0x00 "US_SBLR,USART Synchronous Break Length Register"
|
|
bitfld.long 0x00 0.--4. " SYNC_BRK ,Synchronous break length" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x04 "US_LCP1,USART Synchronous Break Length Register 1"
|
|
hexmask.long.byte 0x04 24.--31. 1. " LCP3 ,Limit Counter Protocol"
|
|
hexmask.long.byte 0x04 16.--23. 1. " LCP2 ,Limit Counter Protocol"
|
|
hexmask.long.byte 0x04 8.--15. 1. " LCP1 ,Limit Counter Protocol"
|
|
textline " "
|
|
hexmask.long.byte 0x04 0.--7. 1. " LCP0 ,Limit Counter Protocol"
|
|
line.long 0x08 "US_LCP2,USART Synchronous Break Length Register 2"
|
|
hexmask.long.byte 0x08 24.--31. 1. " LCP7 ,Limit Counter Protocol"
|
|
hexmask.long.byte 0x08 16.--23. 1. " LCP6 ,Limit Counter Protocol"
|
|
hexmask.long.byte 0x08 8.--15. 1. " LCP5 ,Limit Counter Protocol"
|
|
textline " "
|
|
hexmask.long.byte 0x08 0.--7. 1. " LCP4 ,Limit Counter Protocol"
|
|
line.long 0x0C "US_DMACR,USART DMA Control Register"
|
|
bitfld.long 0x0C 1. " TXDMAE ,DMA for the transmit Enable/ Disable Control Bit" "Disabled,Enabled"
|
|
bitfld.long 0x0C 0. " RXDMAE ,DMA for the receive Enable/ Disable Control Bit" "Disabled,Enabled"
|
|
width 11.
|
|
tree.end
|
|
tree "USART1"
|
|
base ad:0x40081000
|
|
width 11.
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "US_IDR,USART ID Register"
|
|
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "US_CEDR,USART Clock Enable Disable Register"
|
|
bitfld.long 0x00 31. " DBGEN ,Debug mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CLKEN ,Clock Enable/Disable Control Bit" "Disabled,Enabled"
|
|
wgroup.long 0x08++0x07
|
|
line.long 0x00 "US_SRR,USART Software Reset Register"
|
|
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
|
|
line.long 0x04 "US_CR,USART Control Register"
|
|
bitfld.long 0x04 19. " RSTLIN ,Reset the LIN" "No effect,Reset"
|
|
bitfld.long 0x04 18. " STMESSAGE ,Start Message" "No effect,Send"
|
|
bitfld.long 0x04 17. " STRESP ,Start Response" "No effect,Send"
|
|
textline " "
|
|
bitfld.long 0x04 16. " STHEADER ,Start Header" "No effect,Send"
|
|
bitfld.long 0x04 12. " SENDA ,Send Address" "No effect,Send"
|
|
bitfld.long 0x04 11. " STTTO ,Start Time-out" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x04 10. " STPBRK ,Stop Break" "No effect,Stop"
|
|
bitfld.long 0x04 9. " STTBRK ,Start Break" "No effect,Start"
|
|
bitfld.long 0x04 7. " TXDIS ,Transmitter disabled" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x04 6. " TXEN ,Transmitter Enable" "No effect,Enable"
|
|
bitfld.long 0x04 5. " RXDIS ,Receiver Disable" "No effect,Disable"
|
|
bitfld.long 0x04 4. " RXEN ,Receiver Enable" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 3. " RSTTX ,Reset Transmitter" "No effect,Reset"
|
|
bitfld.long 0x04 2. " RSTRX ,Reset Receiver" "No effect,Reset"
|
|
if (((d.l(ad:0x40080000+0x10))&0x100)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "US_MR,USART Mode Register"
|
|
bitfld.long 0x00 20. " DSB ,Data Start Bit Selection" "LSB,MSB"
|
|
textline " "
|
|
bitfld.long 0x00 19. " LIN2_0 ,Select the LIN protocol release" "LIN 1.2,LIN 2.0"
|
|
bitfld.long 0x00 18. " CLKO ,Clock output select" "Pin not driven,Pin driven"
|
|
bitfld.long 0x00 17. " MODE9 ,9-bit character length" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SMCARDPT ,Smart Card protocol" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " CHMODE[1:0] ,Channel mode" "Normal mode,Automatic echo,Local loopback,Remote loopback"
|
|
bitfld.long 0x00 12.--13. " NBSTOP[1:0] ,Number of stop bits" "1,1.5,2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " AR[2:0] ,Parity type" "Even parity,Odd Parity,Parity forced to 0,Parity forced to 1,No parity,No parity,Multi-drop mode,Multi-drop mode"
|
|
bitfld.long 0x00 8. " SYNC ,Synchronous mode select" "Asynchronous Mode,Synchronous Mode"
|
|
bitfld.long 0x00 6.--7. " CHRL[1:0] ,Character length" "5,6,7,8"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " CLKS[1:0] ,Clock selection (baud rate generator input clock)" "PCLK,PCLK/8,External clock,External clock"
|
|
bitfld.long 0x00 1.--3. " SENDTIME[2:0] ,Maximum number of repetitions a character has to be transmitted" "0,1,Reserved,Reserved,Reserved,Reserved,Reserved,7"
|
|
bitfld.long 0x00 0. " LIN ,Local Interconnect Network mode" "Disabled,Enabled"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "US_MR,USART Mode Register"
|
|
bitfld.long 0x00 20. " DSB ,Data Start Bit Selection" "LSB,MSB"
|
|
textline " "
|
|
bitfld.long 0x00 19. " LIN2_0 ,Select the LIN protocol release" "LIN 1.2,LIN 2.0"
|
|
bitfld.long 0x00 18. " CLKO ,Clock output select" "Pin not driven,Pin driven"
|
|
bitfld.long 0x00 17. " MODE9 ,9-bit character length" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SMCARDPT ,Smart Card protocol" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " CHMODE[1:0] ,Channel mode" "Normal mode,Automatic echo,Local loopback,Remote loopback"
|
|
bitfld.long 0x00 12.--13. " NBSTOP[1:0] ,Number of stop bits" "1,Reserved,2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " AR[2:0] ,Parity type" "Even parity,Odd Parity,Parity forced to 0,Parity forced to 1,No parity,No parity,Multi-drop mode,Multi-drop mode"
|
|
bitfld.long 0x00 8. " SYNC ,Synchronous mode select" "Asynchronous Mode,Synchronous Mode"
|
|
bitfld.long 0x00 6.--7. " CHRL[1:0] ,Character length" "5,6,7,8"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " CLKS[1:0] ,Clock selection (baud rate generator input clock)" "PCLK,PCLK/8,External clock,External clock"
|
|
bitfld.long 0x00 1.--3. " SENDTIME[2:0] ,Maximum number of repetitions a character has to be transmitted" "0,1,Reserved,Reserved,Reserved,Reserved,Reserved,7"
|
|
bitfld.long 0x00 0. " LIN ,Local Interconnect Network mode" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "US_IMSCR,USART Interrupt Mask Set and Clear Register"
|
|
bitfld.long 0x00 30. " WAKEUP ,Wake Up interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 29. " CHECKSUM ,Check Sum interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 28. " IPERROR ,Identity Parity Error interrupt mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BITERROR ,Bit Error interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 26. " NOTRESP ,Not Responding error interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 25. " ENDMESS ,End of Message interrupt mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " ENDHEADER ,End of Header interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 10. " IDLE ,Idle interrupt interrupt mask" "Masked,End occurred"
|
|
bitfld.long 0x00 9. " TXEMPTY ,Transmitter empty interrupt mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " TIMEOUT ,Receiver time-out interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 7. " PARE ,Parity error interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 6. " FRAME ,Framing error interrupt mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " OVRE ,Overrun error interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " RXBRK ,Break received/end interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 1. " TXRDY ,Transmitter ready interrupt mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXRDY ,Receiver ready interrupt mask" "Masked,Not masked"
|
|
rgroup.long 0x18++0x07
|
|
line.long 0x00 "US_RISR,USART Raw Interrupt Status Register"
|
|
bitfld.long 0x00 30. " WAKEUP ,Wake up raw interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x00 29. " CHECKSUM ,Check sum raw interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x00 28. " IPERROR ,Identity parity error raw interrupt state" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BITERROR ,Bit error raw interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x00 26. " NOTRESP ,Not responding error raw interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x00 25. " ENDMESS ,End of message raw interrupt state" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 24. " ENDHEADER ,End of header raw interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x00 10. " IDLE ,IDLE interrupt raw interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x00 9. " TXEMPTY ,Transmitter empty raw interrupt state" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 8. " TIMEOUT ,Time-out raw interrupt state raw interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x00 7. " PARE ,Parity error raw interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " FRAME ,Framing error raw interrupt state" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 5. " OVRE ,Overrun error raw interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " RXBRK ,Receiver break raw interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " TXRDY ,Transmitter ready raw interrupt state" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXRDY ,Receiver ready raw interrupt state" "Not occurred,Occurred"
|
|
line.long 0x04 "US_MISR,USART Masked Interrupt Status Register"
|
|
bitfld.long 0x04 30. " WAKEUP ,Wake up masked interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x04 29. " CHECKSUM ,Check sum masked interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x04 28. " IPERROR ,Identity parity error masked interrupt state" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 27. " BITERROR ,Bit error masked interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x04 26. " NOTRESP ,Not responding error masked interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x04 25. " ENDMESS ,End of message masked interrupt state" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 24. " ENDHEADER ,End of header masked interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x04 10. " IDLE ,IDLE interrupt masked interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x04 9. " TXEMPTY ,Transmitter empty masked interrupt state" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 8. " TIMEOUT ,Time-out masked interrupt state masked interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x04 7. " PARE ,Parity error masked interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x04 6. " FRAME ,Framing error masked interrupt state" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 5. " OVRE ,Overrun error masked interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x04 2. " RXBRK ,Receiver break masked interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x04 1. " TXRDY ,Transmitter ready masked interrupt state" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 0. " RXRDY ,Receiver ready masked interrupt state" "Not occurred,Occurred"
|
|
wgroup.long 0x20++0x03
|
|
line.long 0x00 "US_ICR,USART Interrupt Clear Register"
|
|
bitfld.long 0x00 30. " WAKEUP ,Wake up cleared interrupt state" "No effect,Clear"
|
|
bitfld.long 0x00 29. " CHECKSUM ,Check sum cleared interrupt state" "No effect,Clear"
|
|
bitfld.long 0x00 28. " IPERROR ,Identity parity error cleared interrupt state" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BITERROR ,Bit error cleared interrupt state" "No effect,Clear"
|
|
bitfld.long 0x00 26. " NOTRESP ,Not responding error cleared interrupt state" "No effect,Clear"
|
|
bitfld.long 0x00 25. " ENDMESS ,End of message cleared interrupt state" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 24. " ENDHEADER ,End of header cleared interrupt state" "No effect,Clear"
|
|
bitfld.long 0x00 10. " IDLE ,IDLE interrupt cleared interrupt state" "No effect,Clear"
|
|
bitfld.long 0x00 9. " TXEMPTY ,Transmitter empty cleared interrupt state" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 8. " TIMEOUT ,Time-out cleared interrupt state" "No effect,Clear"
|
|
bitfld.long 0x00 7. " PARE ,Parity error cleared interrupt state" "No effect,Clear"
|
|
bitfld.long 0x00 6. " FRAME ,Framing error cleared interrupt state" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 5. " OVRE ,Overrun error cleared interrupt state" "No effect,Clear"
|
|
bitfld.long 0x00 2. " RXBRK ,Receiver break cleared interrupt state" "No effect,Clear"
|
|
bitfld.long 0x00 1. " TXRDY ,Transmitter ready cleared interrupt state" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXRDY ,Receiver ready cleared interrupt state" "No effect,Clear"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "US_SR,USART Status Register"
|
|
bitfld.long 0x00 31. " LIN ,LIN busy" "IDLE,BUSY"
|
|
bitfld.long 0x00 30. " WAKEUP ,Wake up" "Not detected,Detected"
|
|
bitfld.long 0x00 29. " CHECKSUM ,Check sum Cleared interrupt state" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IPERROR ,Identity parity error" "Not detected,Detected"
|
|
bitfld.long 0x00 27. " BITERROR ,Bit error" "Not detected,Detected"
|
|
bitfld.long 0x00 26. " NOTRESP ,Not responding error" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ENDMESS ,End of message" "No end,End"
|
|
bitfld.long 0x00 24. " ENDHEADER ,End of header" "No end,End"
|
|
bitfld.long 0x00 11. " IDLEFLAG ,Frame transmission in J1587 protocol" "Received,Not received"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IDLE ,IDLE interrupt" "No end,End"
|
|
bitfld.long 0x00 9. " TXEMPTY ,Transmitter empty" "Not empty,Empty"
|
|
bitfld.long 0x00 8. " TIMEOUT ,Time-out" "No time-out,Time-out"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PARE ,Parity error" "Not false,False"
|
|
bitfld.long 0x00 6. " FRAME ,Framing error" "Not detected,Detected"
|
|
bitfld.long 0x00 5. " OVRE ,Overrun error" "Not transferred,Transferred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RXBRK ,Receiver break" "Not received,Received"
|
|
bitfld.long 0x00 1. " TXRDY ,Transmitter ready" "Waiting,No character"
|
|
bitfld.long 0x00 0. " RXRDY ,Receiver ready" "Not received,Received"
|
|
hgroup.long 0x28++0x03
|
|
hide.long 0x04 "US_RHR,USART Receiver Holding Register"
|
|
in
|
|
wgroup.long 0x2C++0x03
|
|
line.long 0x00 "US_THR,USART Transmit Holding Register"
|
|
hexmask.long.word 0x00 0.--8. 1. " TXCHR ,Character to be transmitted"
|
|
group.long 0x30++0x17
|
|
line.long 0x00 "US_BRGR,USART Baud Rate Generator Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CD ,Clock Divider"
|
|
line.long 0x04 "US_RTOR,USART Receiver Time-Out Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " TO ,Time-out value"
|
|
line.long 0x08 "US_TTGR,USART Transmit Time-Guard Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " TG ,Time-guard value"
|
|
line.long 0x0C "US_LIR,USART Transmit Time-Guard Register"
|
|
hexmask.long.word 0x0C 16.--29. 1. " WAKE_UP_TIME ,Wake up time for the LIN2.0 release"
|
|
bitfld.long 0x0C 9. " CHK_SEL ,Checksum selection" "Classic,Enhanced"
|
|
bitfld.long 0x0C 6.--8. " NDATA ,Number of data field for the LIN2.0 release" "1,2,3,4,5,6,7,8"
|
|
textline " "
|
|
bitfld.long 0x0C 0.--5. " IDENTIFIER ,LIN identifier" "2,2,4,8,?..."
|
|
line.long 0x10 "US_DFWR0,USART Data Field Write 0 Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " DATA3 ,LINs byte field to be transmitted"
|
|
hexmask.long.byte 0x10 16.--23. 1. " DATA2 ,LINs byte field to be transmitted"
|
|
hexmask.long.byte 0x10 8.--15. 1. " DATA1 ,LINs byte field to be transmitted"
|
|
textline " "
|
|
hexmask.long.byte 0x10 0.--7. 1. " DATA0 ,LINs byte field to be transmitted"
|
|
line.long 0x14 "US_DFWR1,USART Data Field Write 1 Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " DATA7 ,LINs byte field to be transmitted"
|
|
hexmask.long.byte 0x14 16.--23. 1. " DATA6 ,LINs byte field to be transmitted"
|
|
hexmask.long.byte 0x14 8.--15. 1. " DATA5 ,LINs byte field to be transmitted"
|
|
textline " "
|
|
hexmask.long.byte 0x14 0.--7. 1. " DATA4 ,LINs byte field to be transmitted"
|
|
rgroup.long 0x48++0x07
|
|
line.long 0x00 "US_DFRR0,USART Data Field Read 0 Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " DATA3 ,LINs byte field to be received"
|
|
hexmask.long.byte 0x00 16.--23. 1. " DATA2 ,LINs byte field to be received"
|
|
hexmask.long.byte 0x00 8.--15. 1. " DATA1 ,LINs byte field to be received"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA0 ,LINs byte field to be received"
|
|
line.long 0x04 "US_DFRR1,USART Data Field Read 1 Register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " DATA7 ,LINs byte field to be received"
|
|
hexmask.long.byte 0x04 16.--23. 1. " DATA6 ,LINs byte field to be received"
|
|
hexmask.long.byte 0x04 8.--15. 1. " DATA5 ,LINs byte field to be received"
|
|
textline " "
|
|
hexmask.long.byte 0x04 0.--7. 1. " DATA4 ,LINs byte field to be received"
|
|
group.long 0x50++0x0F
|
|
line.long 0x00 "US_SBLR,USART Synchronous Break Length Register"
|
|
bitfld.long 0x00 0.--4. " SYNC_BRK ,Synchronous break length" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x04 "US_LCP1,USART Synchronous Break Length Register 1"
|
|
hexmask.long.byte 0x04 24.--31. 1. " LCP3 ,Limit Counter Protocol"
|
|
hexmask.long.byte 0x04 16.--23. 1. " LCP2 ,Limit Counter Protocol"
|
|
hexmask.long.byte 0x04 8.--15. 1. " LCP1 ,Limit Counter Protocol"
|
|
textline " "
|
|
hexmask.long.byte 0x04 0.--7. 1. " LCP0 ,Limit Counter Protocol"
|
|
line.long 0x08 "US_LCP2,USART Synchronous Break Length Register 2"
|
|
hexmask.long.byte 0x08 24.--31. 1. " LCP7 ,Limit Counter Protocol"
|
|
hexmask.long.byte 0x08 16.--23. 1. " LCP6 ,Limit Counter Protocol"
|
|
hexmask.long.byte 0x08 8.--15. 1. " LCP5 ,Limit Counter Protocol"
|
|
textline " "
|
|
hexmask.long.byte 0x08 0.--7. 1. " LCP4 ,Limit Counter Protocol"
|
|
line.long 0x0C "US_DMACR,USART DMA Control Register"
|
|
bitfld.long 0x0C 1. " TXDMAE ,DMA for the transmit Enable/ Disable Control Bit" "Disabled,Enabled"
|
|
bitfld.long 0x0C 0. " RXDMAE ,DMA for the receive Enable/ Disable Control Bit" "Disabled,Enabled"
|
|
width 11.
|
|
tree.end
|
|
tree "USART2"
|
|
base ad:0x40082000
|
|
width 11.
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "US_IDR,USART ID Register"
|
|
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "US_CEDR,USART Clock Enable Disable Register"
|
|
bitfld.long 0x00 31. " DBGEN ,Debug mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CLKEN ,Clock Enable/Disable Control Bit" "Disabled,Enabled"
|
|
wgroup.long 0x08++0x07
|
|
line.long 0x00 "US_SRR,USART Software Reset Register"
|
|
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
|
|
line.long 0x04 "US_CR,USART Control Register"
|
|
bitfld.long 0x04 19. " RSTLIN ,Reset the LIN" "No effect,Reset"
|
|
bitfld.long 0x04 18. " STMESSAGE ,Start Message" "No effect,Send"
|
|
bitfld.long 0x04 17. " STRESP ,Start Response" "No effect,Send"
|
|
textline " "
|
|
bitfld.long 0x04 16. " STHEADER ,Start Header" "No effect,Send"
|
|
bitfld.long 0x04 12. " SENDA ,Send Address" "No effect,Send"
|
|
bitfld.long 0x04 11. " STTTO ,Start Time-out" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x04 10. " STPBRK ,Stop Break" "No effect,Stop"
|
|
bitfld.long 0x04 9. " STTBRK ,Start Break" "No effect,Start"
|
|
bitfld.long 0x04 7. " TXDIS ,Transmitter disabled" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x04 6. " TXEN ,Transmitter Enable" "No effect,Enable"
|
|
bitfld.long 0x04 5. " RXDIS ,Receiver Disable" "No effect,Disable"
|
|
bitfld.long 0x04 4. " RXEN ,Receiver Enable" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 3. " RSTTX ,Reset Transmitter" "No effect,Reset"
|
|
bitfld.long 0x04 2. " RSTRX ,Reset Receiver" "No effect,Reset"
|
|
if (((d.l(ad:0x40080000+0x10))&0x100)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "US_MR,USART Mode Register"
|
|
bitfld.long 0x00 20. " DSB ,Data Start Bit Selection" "LSB,MSB"
|
|
textline " "
|
|
bitfld.long 0x00 19. " LIN2_0 ,Select the LIN protocol release" "LIN 1.2,LIN 2.0"
|
|
bitfld.long 0x00 18. " CLKO ,Clock output select" "Pin not driven,Pin driven"
|
|
bitfld.long 0x00 17. " MODE9 ,9-bit character length" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SMCARDPT ,Smart Card protocol" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " CHMODE[1:0] ,Channel mode" "Normal mode,Automatic echo,Local loopback,Remote loopback"
|
|
bitfld.long 0x00 12.--13. " NBSTOP[1:0] ,Number of stop bits" "1,1.5,2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " AR[2:0] ,Parity type" "Even parity,Odd Parity,Parity forced to 0,Parity forced to 1,No parity,No parity,Multi-drop mode,Multi-drop mode"
|
|
bitfld.long 0x00 8. " SYNC ,Synchronous mode select" "Asynchronous Mode,Synchronous Mode"
|
|
bitfld.long 0x00 6.--7. " CHRL[1:0] ,Character length" "5,6,7,8"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " CLKS[1:0] ,Clock selection (baud rate generator input clock)" "PCLK,PCLK/8,External clock,External clock"
|
|
bitfld.long 0x00 1.--3. " SENDTIME[2:0] ,Maximum number of repetitions a character has to be transmitted" "0,1,Reserved,Reserved,Reserved,Reserved,Reserved,7"
|
|
bitfld.long 0x00 0. " LIN ,Local Interconnect Network mode" "Disabled,Enabled"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "US_MR,USART Mode Register"
|
|
bitfld.long 0x00 20. " DSB ,Data Start Bit Selection" "LSB,MSB"
|
|
textline " "
|
|
bitfld.long 0x00 19. " LIN2_0 ,Select the LIN protocol release" "LIN 1.2,LIN 2.0"
|
|
bitfld.long 0x00 18. " CLKO ,Clock output select" "Pin not driven,Pin driven"
|
|
bitfld.long 0x00 17. " MODE9 ,9-bit character length" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SMCARDPT ,Smart Card protocol" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " CHMODE[1:0] ,Channel mode" "Normal mode,Automatic echo,Local loopback,Remote loopback"
|
|
bitfld.long 0x00 12.--13. " NBSTOP[1:0] ,Number of stop bits" "1,Reserved,2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " AR[2:0] ,Parity type" "Even parity,Odd Parity,Parity forced to 0,Parity forced to 1,No parity,No parity,Multi-drop mode,Multi-drop mode"
|
|
bitfld.long 0x00 8. " SYNC ,Synchronous mode select" "Asynchronous Mode,Synchronous Mode"
|
|
bitfld.long 0x00 6.--7. " CHRL[1:0] ,Character length" "5,6,7,8"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " CLKS[1:0] ,Clock selection (baud rate generator input clock)" "PCLK,PCLK/8,External clock,External clock"
|
|
bitfld.long 0x00 1.--3. " SENDTIME[2:0] ,Maximum number of repetitions a character has to be transmitted" "0,1,Reserved,Reserved,Reserved,Reserved,Reserved,7"
|
|
bitfld.long 0x00 0. " LIN ,Local Interconnect Network mode" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "US_IMSCR,USART Interrupt Mask Set and Clear Register"
|
|
bitfld.long 0x00 30. " WAKEUP ,Wake Up interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 29. " CHECKSUM ,Check Sum interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 28. " IPERROR ,Identity Parity Error interrupt mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BITERROR ,Bit Error interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 26. " NOTRESP ,Not Responding error interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 25. " ENDMESS ,End of Message interrupt mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " ENDHEADER ,End of Header interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 10. " IDLE ,Idle interrupt interrupt mask" "Masked,End occurred"
|
|
bitfld.long 0x00 9. " TXEMPTY ,Transmitter empty interrupt mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " TIMEOUT ,Receiver time-out interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 7. " PARE ,Parity error interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 6. " FRAME ,Framing error interrupt mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " OVRE ,Overrun error interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " RXBRK ,Break received/end interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 1. " TXRDY ,Transmitter ready interrupt mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXRDY ,Receiver ready interrupt mask" "Masked,Not masked"
|
|
rgroup.long 0x18++0x07
|
|
line.long 0x00 "US_RISR,USART Raw Interrupt Status Register"
|
|
bitfld.long 0x00 30. " WAKEUP ,Wake up raw interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x00 29. " CHECKSUM ,Check sum raw interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x00 28. " IPERROR ,Identity parity error raw interrupt state" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BITERROR ,Bit error raw interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x00 26. " NOTRESP ,Not responding error raw interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x00 25. " ENDMESS ,End of message raw interrupt state" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 24. " ENDHEADER ,End of header raw interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x00 10. " IDLE ,IDLE interrupt raw interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x00 9. " TXEMPTY ,Transmitter empty raw interrupt state" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 8. " TIMEOUT ,Time-out raw interrupt state raw interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x00 7. " PARE ,Parity error raw interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " FRAME ,Framing error raw interrupt state" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 5. " OVRE ,Overrun error raw interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " RXBRK ,Receiver break raw interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " TXRDY ,Transmitter ready raw interrupt state" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXRDY ,Receiver ready raw interrupt state" "Not occurred,Occurred"
|
|
line.long 0x04 "US_MISR,USART Masked Interrupt Status Register"
|
|
bitfld.long 0x04 30. " WAKEUP ,Wake up masked interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x04 29. " CHECKSUM ,Check sum masked interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x04 28. " IPERROR ,Identity parity error masked interrupt state" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 27. " BITERROR ,Bit error masked interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x04 26. " NOTRESP ,Not responding error masked interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x04 25. " ENDMESS ,End of message masked interrupt state" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 24. " ENDHEADER ,End of header masked interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x04 10. " IDLE ,IDLE interrupt masked interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x04 9. " TXEMPTY ,Transmitter empty masked interrupt state" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 8. " TIMEOUT ,Time-out masked interrupt state masked interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x04 7. " PARE ,Parity error masked interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x04 6. " FRAME ,Framing error masked interrupt state" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 5. " OVRE ,Overrun error masked interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x04 2. " RXBRK ,Receiver break masked interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x04 1. " TXRDY ,Transmitter ready masked interrupt state" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 0. " RXRDY ,Receiver ready masked interrupt state" "Not occurred,Occurred"
|
|
wgroup.long 0x20++0x03
|
|
line.long 0x00 "US_ICR,USART Interrupt Clear Register"
|
|
bitfld.long 0x00 30. " WAKEUP ,Wake up cleared interrupt state" "No effect,Clear"
|
|
bitfld.long 0x00 29. " CHECKSUM ,Check sum cleared interrupt state" "No effect,Clear"
|
|
bitfld.long 0x00 28. " IPERROR ,Identity parity error cleared interrupt state" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BITERROR ,Bit error cleared interrupt state" "No effect,Clear"
|
|
bitfld.long 0x00 26. " NOTRESP ,Not responding error cleared interrupt state" "No effect,Clear"
|
|
bitfld.long 0x00 25. " ENDMESS ,End of message cleared interrupt state" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 24. " ENDHEADER ,End of header cleared interrupt state" "No effect,Clear"
|
|
bitfld.long 0x00 10. " IDLE ,IDLE interrupt cleared interrupt state" "No effect,Clear"
|
|
bitfld.long 0x00 9. " TXEMPTY ,Transmitter empty cleared interrupt state" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 8. " TIMEOUT ,Time-out cleared interrupt state" "No effect,Clear"
|
|
bitfld.long 0x00 7. " PARE ,Parity error cleared interrupt state" "No effect,Clear"
|
|
bitfld.long 0x00 6. " FRAME ,Framing error cleared interrupt state" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 5. " OVRE ,Overrun error cleared interrupt state" "No effect,Clear"
|
|
bitfld.long 0x00 2. " RXBRK ,Receiver break cleared interrupt state" "No effect,Clear"
|
|
bitfld.long 0x00 1. " TXRDY ,Transmitter ready cleared interrupt state" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXRDY ,Receiver ready cleared interrupt state" "No effect,Clear"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "US_SR,USART Status Register"
|
|
bitfld.long 0x00 31. " LIN ,LIN busy" "IDLE,BUSY"
|
|
bitfld.long 0x00 30. " WAKEUP ,Wake up" "Not detected,Detected"
|
|
bitfld.long 0x00 29. " CHECKSUM ,Check sum Cleared interrupt state" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IPERROR ,Identity parity error" "Not detected,Detected"
|
|
bitfld.long 0x00 27. " BITERROR ,Bit error" "Not detected,Detected"
|
|
bitfld.long 0x00 26. " NOTRESP ,Not responding error" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ENDMESS ,End of message" "No end,End"
|
|
bitfld.long 0x00 24. " ENDHEADER ,End of header" "No end,End"
|
|
bitfld.long 0x00 11. " IDLEFLAG ,Frame transmission in J1587 protocol" "Received,Not received"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IDLE ,IDLE interrupt" "No end,End"
|
|
bitfld.long 0x00 9. " TXEMPTY ,Transmitter empty" "Not empty,Empty"
|
|
bitfld.long 0x00 8. " TIMEOUT ,Time-out" "No time-out,Time-out"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PARE ,Parity error" "Not false,False"
|
|
bitfld.long 0x00 6. " FRAME ,Framing error" "Not detected,Detected"
|
|
bitfld.long 0x00 5. " OVRE ,Overrun error" "Not transferred,Transferred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RXBRK ,Receiver break" "Not received,Received"
|
|
bitfld.long 0x00 1. " TXRDY ,Transmitter ready" "Waiting,No character"
|
|
bitfld.long 0x00 0. " RXRDY ,Receiver ready" "Not received,Received"
|
|
hgroup.long 0x28++0x03
|
|
hide.long 0x04 "US_RHR,USART Receiver Holding Register"
|
|
in
|
|
wgroup.long 0x2C++0x03
|
|
line.long 0x00 "US_THR,USART Transmit Holding Register"
|
|
hexmask.long.word 0x00 0.--8. 1. " TXCHR ,Character to be transmitted"
|
|
group.long 0x30++0x17
|
|
line.long 0x00 "US_BRGR,USART Baud Rate Generator Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CD ,Clock Divider"
|
|
line.long 0x04 "US_RTOR,USART Receiver Time-Out Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " TO ,Time-out value"
|
|
line.long 0x08 "US_TTGR,USART Transmit Time-Guard Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " TG ,Time-guard value"
|
|
line.long 0x0C "US_LIR,USART Transmit Time-Guard Register"
|
|
hexmask.long.word 0x0C 16.--29. 1. " WAKE_UP_TIME ,Wake up time for the LIN2.0 release"
|
|
bitfld.long 0x0C 9. " CHK_SEL ,Checksum selection" "Classic,Enhanced"
|
|
bitfld.long 0x0C 6.--8. " NDATA ,Number of data field for the LIN2.0 release" "1,2,3,4,5,6,7,8"
|
|
textline " "
|
|
bitfld.long 0x0C 0.--5. " IDENTIFIER ,LIN identifier" "2,2,4,8,?..."
|
|
line.long 0x10 "US_DFWR0,USART Data Field Write 0 Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " DATA3 ,LINs byte field to be transmitted"
|
|
hexmask.long.byte 0x10 16.--23. 1. " DATA2 ,LINs byte field to be transmitted"
|
|
hexmask.long.byte 0x10 8.--15. 1. " DATA1 ,LINs byte field to be transmitted"
|
|
textline " "
|
|
hexmask.long.byte 0x10 0.--7. 1. " DATA0 ,LINs byte field to be transmitted"
|
|
line.long 0x14 "US_DFWR1,USART Data Field Write 1 Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " DATA7 ,LINs byte field to be transmitted"
|
|
hexmask.long.byte 0x14 16.--23. 1. " DATA6 ,LINs byte field to be transmitted"
|
|
hexmask.long.byte 0x14 8.--15. 1. " DATA5 ,LINs byte field to be transmitted"
|
|
textline " "
|
|
hexmask.long.byte 0x14 0.--7. 1. " DATA4 ,LINs byte field to be transmitted"
|
|
rgroup.long 0x48++0x07
|
|
line.long 0x00 "US_DFRR0,USART Data Field Read 0 Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " DATA3 ,LINs byte field to be received"
|
|
hexmask.long.byte 0x00 16.--23. 1. " DATA2 ,LINs byte field to be received"
|
|
hexmask.long.byte 0x00 8.--15. 1. " DATA1 ,LINs byte field to be received"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA0 ,LINs byte field to be received"
|
|
line.long 0x04 "US_DFRR1,USART Data Field Read 1 Register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " DATA7 ,LINs byte field to be received"
|
|
hexmask.long.byte 0x04 16.--23. 1. " DATA6 ,LINs byte field to be received"
|
|
hexmask.long.byte 0x04 8.--15. 1. " DATA5 ,LINs byte field to be received"
|
|
textline " "
|
|
hexmask.long.byte 0x04 0.--7. 1. " DATA4 ,LINs byte field to be received"
|
|
group.long 0x50++0x0F
|
|
line.long 0x00 "US_SBLR,USART Synchronous Break Length Register"
|
|
bitfld.long 0x00 0.--4. " SYNC_BRK ,Synchronous break length" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x04 "US_LCP1,USART Synchronous Break Length Register 1"
|
|
hexmask.long.byte 0x04 24.--31. 1. " LCP3 ,Limit Counter Protocol"
|
|
hexmask.long.byte 0x04 16.--23. 1. " LCP2 ,Limit Counter Protocol"
|
|
hexmask.long.byte 0x04 8.--15. 1. " LCP1 ,Limit Counter Protocol"
|
|
textline " "
|
|
hexmask.long.byte 0x04 0.--7. 1. " LCP0 ,Limit Counter Protocol"
|
|
line.long 0x08 "US_LCP2,USART Synchronous Break Length Register 2"
|
|
hexmask.long.byte 0x08 24.--31. 1. " LCP7 ,Limit Counter Protocol"
|
|
hexmask.long.byte 0x08 16.--23. 1. " LCP6 ,Limit Counter Protocol"
|
|
hexmask.long.byte 0x08 8.--15. 1. " LCP5 ,Limit Counter Protocol"
|
|
textline " "
|
|
hexmask.long.byte 0x08 0.--7. 1. " LCP4 ,Limit Counter Protocol"
|
|
line.long 0x0C "US_DMACR,USART DMA Control Register"
|
|
bitfld.long 0x0C 1. " TXDMAE ,DMA for the transmit Enable/ Disable Control Bit" "Disabled,Enabled"
|
|
bitfld.long 0x0C 0. " RXDMAE ,DMA for the receive Enable/ Disable Control Bit" "Disabled,Enabled"
|
|
width 11.
|
|
tree.end
|
|
tree "USART3"
|
|
base ad:0x40083000
|
|
width 11.
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "US_IDR,USART ID Register"
|
|
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "US_CEDR,USART Clock Enable Disable Register"
|
|
bitfld.long 0x00 31. " DBGEN ,Debug mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CLKEN ,Clock Enable/Disable Control Bit" "Disabled,Enabled"
|
|
wgroup.long 0x08++0x07
|
|
line.long 0x00 "US_SRR,USART Software Reset Register"
|
|
bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset"
|
|
line.long 0x04 "US_CR,USART Control Register"
|
|
bitfld.long 0x04 19. " RSTLIN ,Reset the LIN" "No effect,Reset"
|
|
bitfld.long 0x04 18. " STMESSAGE ,Start Message" "No effect,Send"
|
|
bitfld.long 0x04 17. " STRESP ,Start Response" "No effect,Send"
|
|
textline " "
|
|
bitfld.long 0x04 16. " STHEADER ,Start Header" "No effect,Send"
|
|
bitfld.long 0x04 12. " SENDA ,Send Address" "No effect,Send"
|
|
bitfld.long 0x04 11. " STTTO ,Start Time-out" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x04 10. " STPBRK ,Stop Break" "No effect,Stop"
|
|
bitfld.long 0x04 9. " STTBRK ,Start Break" "No effect,Start"
|
|
bitfld.long 0x04 7. " TXDIS ,Transmitter disabled" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x04 6. " TXEN ,Transmitter Enable" "No effect,Enable"
|
|
bitfld.long 0x04 5. " RXDIS ,Receiver Disable" "No effect,Disable"
|
|
bitfld.long 0x04 4. " RXEN ,Receiver Enable" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x04 3. " RSTTX ,Reset Transmitter" "No effect,Reset"
|
|
bitfld.long 0x04 2. " RSTRX ,Reset Receiver" "No effect,Reset"
|
|
if (((d.l(ad:0x40080000+0x10))&0x100)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "US_MR,USART Mode Register"
|
|
bitfld.long 0x00 20. " DSB ,Data Start Bit Selection" "LSB,MSB"
|
|
textline " "
|
|
bitfld.long 0x00 19. " LIN2_0 ,Select the LIN protocol release" "LIN 1.2,LIN 2.0"
|
|
bitfld.long 0x00 18. " CLKO ,Clock output select" "Pin not driven,Pin driven"
|
|
bitfld.long 0x00 17. " MODE9 ,9-bit character length" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SMCARDPT ,Smart Card protocol" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " CHMODE[1:0] ,Channel mode" "Normal mode,Automatic echo,Local loopback,Remote loopback"
|
|
bitfld.long 0x00 12.--13. " NBSTOP[1:0] ,Number of stop bits" "1,1.5,2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " AR[2:0] ,Parity type" "Even parity,Odd Parity,Parity forced to 0,Parity forced to 1,No parity,No parity,Multi-drop mode,Multi-drop mode"
|
|
bitfld.long 0x00 8. " SYNC ,Synchronous mode select" "Asynchronous Mode,Synchronous Mode"
|
|
bitfld.long 0x00 6.--7. " CHRL[1:0] ,Character length" "5,6,7,8"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " CLKS[1:0] ,Clock selection (baud rate generator input clock)" "PCLK,PCLK/8,External clock,External clock"
|
|
bitfld.long 0x00 1.--3. " SENDTIME[2:0] ,Maximum number of repetitions a character has to be transmitted" "0,1,Reserved,Reserved,Reserved,Reserved,Reserved,7"
|
|
bitfld.long 0x00 0. " LIN ,Local Interconnect Network mode" "Disabled,Enabled"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "US_MR,USART Mode Register"
|
|
bitfld.long 0x00 20. " DSB ,Data Start Bit Selection" "LSB,MSB"
|
|
textline " "
|
|
bitfld.long 0x00 19. " LIN2_0 ,Select the LIN protocol release" "LIN 1.2,LIN 2.0"
|
|
bitfld.long 0x00 18. " CLKO ,Clock output select" "Pin not driven,Pin driven"
|
|
bitfld.long 0x00 17. " MODE9 ,9-bit character length" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SMCARDPT ,Smart Card protocol" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. " CHMODE[1:0] ,Channel mode" "Normal mode,Automatic echo,Local loopback,Remote loopback"
|
|
bitfld.long 0x00 12.--13. " NBSTOP[1:0] ,Number of stop bits" "1,Reserved,2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " AR[2:0] ,Parity type" "Even parity,Odd Parity,Parity forced to 0,Parity forced to 1,No parity,No parity,Multi-drop mode,Multi-drop mode"
|
|
bitfld.long 0x00 8. " SYNC ,Synchronous mode select" "Asynchronous Mode,Synchronous Mode"
|
|
bitfld.long 0x00 6.--7. " CHRL[1:0] ,Character length" "5,6,7,8"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " CLKS[1:0] ,Clock selection (baud rate generator input clock)" "PCLK,PCLK/8,External clock,External clock"
|
|
bitfld.long 0x00 1.--3. " SENDTIME[2:0] ,Maximum number of repetitions a character has to be transmitted" "0,1,Reserved,Reserved,Reserved,Reserved,Reserved,7"
|
|
bitfld.long 0x00 0. " LIN ,Local Interconnect Network mode" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "US_IMSCR,USART Interrupt Mask Set and Clear Register"
|
|
bitfld.long 0x00 30. " WAKEUP ,Wake Up interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 29. " CHECKSUM ,Check Sum interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 28. " IPERROR ,Identity Parity Error interrupt mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BITERROR ,Bit Error interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 26. " NOTRESP ,Not Responding error interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 25. " ENDMESS ,End of Message interrupt mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 24. " ENDHEADER ,End of Header interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 10. " IDLE ,Idle interrupt interrupt mask" "Masked,End occurred"
|
|
bitfld.long 0x00 9. " TXEMPTY ,Transmitter empty interrupt mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " TIMEOUT ,Receiver time-out interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 7. " PARE ,Parity error interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 6. " FRAME ,Framing error interrupt mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " OVRE ,Overrun error interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 2. " RXBRK ,Break received/end interrupt mask" "Masked,Not masked"
|
|
bitfld.long 0x00 1. " TXRDY ,Transmitter ready interrupt mask" "Masked,Not masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXRDY ,Receiver ready interrupt mask" "Masked,Not masked"
|
|
rgroup.long 0x18++0x07
|
|
line.long 0x00 "US_RISR,USART Raw Interrupt Status Register"
|
|
bitfld.long 0x00 30. " WAKEUP ,Wake up raw interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x00 29. " CHECKSUM ,Check sum raw interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x00 28. " IPERROR ,Identity parity error raw interrupt state" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BITERROR ,Bit error raw interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x00 26. " NOTRESP ,Not responding error raw interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x00 25. " ENDMESS ,End of message raw interrupt state" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 24. " ENDHEADER ,End of header raw interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x00 10. " IDLE ,IDLE interrupt raw interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x00 9. " TXEMPTY ,Transmitter empty raw interrupt state" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 8. " TIMEOUT ,Time-out raw interrupt state raw interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x00 7. " PARE ,Parity error raw interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " FRAME ,Framing error raw interrupt state" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 5. " OVRE ,Overrun error raw interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " RXBRK ,Receiver break raw interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " TXRDY ,Transmitter ready raw interrupt state" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXRDY ,Receiver ready raw interrupt state" "Not occurred,Occurred"
|
|
line.long 0x04 "US_MISR,USART Masked Interrupt Status Register"
|
|
bitfld.long 0x04 30. " WAKEUP ,Wake up masked interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x04 29. " CHECKSUM ,Check sum masked interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x04 28. " IPERROR ,Identity parity error masked interrupt state" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 27. " BITERROR ,Bit error masked interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x04 26. " NOTRESP ,Not responding error masked interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x04 25. " ENDMESS ,End of message masked interrupt state" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 24. " ENDHEADER ,End of header masked interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x04 10. " IDLE ,IDLE interrupt masked interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x04 9. " TXEMPTY ,Transmitter empty masked interrupt state" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 8. " TIMEOUT ,Time-out masked interrupt state masked interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x04 7. " PARE ,Parity error masked interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x04 6. " FRAME ,Framing error masked interrupt state" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 5. " OVRE ,Overrun error masked interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x04 2. " RXBRK ,Receiver break masked interrupt state" "Not occurred,Occurred"
|
|
bitfld.long 0x04 1. " TXRDY ,Transmitter ready masked interrupt state" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 0. " RXRDY ,Receiver ready masked interrupt state" "Not occurred,Occurred"
|
|
wgroup.long 0x20++0x03
|
|
line.long 0x00 "US_ICR,USART Interrupt Clear Register"
|
|
bitfld.long 0x00 30. " WAKEUP ,Wake up cleared interrupt state" "No effect,Clear"
|
|
bitfld.long 0x00 29. " CHECKSUM ,Check sum cleared interrupt state" "No effect,Clear"
|
|
bitfld.long 0x00 28. " IPERROR ,Identity parity error cleared interrupt state" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 27. " BITERROR ,Bit error cleared interrupt state" "No effect,Clear"
|
|
bitfld.long 0x00 26. " NOTRESP ,Not responding error cleared interrupt state" "No effect,Clear"
|
|
bitfld.long 0x00 25. " ENDMESS ,End of message cleared interrupt state" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 24. " ENDHEADER ,End of header cleared interrupt state" "No effect,Clear"
|
|
bitfld.long 0x00 10. " IDLE ,IDLE interrupt cleared interrupt state" "No effect,Clear"
|
|
bitfld.long 0x00 9. " TXEMPTY ,Transmitter empty cleared interrupt state" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 8. " TIMEOUT ,Time-out cleared interrupt state" "No effect,Clear"
|
|
bitfld.long 0x00 7. " PARE ,Parity error cleared interrupt state" "No effect,Clear"
|
|
bitfld.long 0x00 6. " FRAME ,Framing error cleared interrupt state" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 5. " OVRE ,Overrun error cleared interrupt state" "No effect,Clear"
|
|
bitfld.long 0x00 2. " RXBRK ,Receiver break cleared interrupt state" "No effect,Clear"
|
|
bitfld.long 0x00 1. " TXRDY ,Transmitter ready cleared interrupt state" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXRDY ,Receiver ready cleared interrupt state" "No effect,Clear"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "US_SR,USART Status Register"
|
|
bitfld.long 0x00 31. " LIN ,LIN busy" "IDLE,BUSY"
|
|
bitfld.long 0x00 30. " WAKEUP ,Wake up" "Not detected,Detected"
|
|
bitfld.long 0x00 29. " CHECKSUM ,Check sum Cleared interrupt state" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IPERROR ,Identity parity error" "Not detected,Detected"
|
|
bitfld.long 0x00 27. " BITERROR ,Bit error" "Not detected,Detected"
|
|
bitfld.long 0x00 26. " NOTRESP ,Not responding error" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ENDMESS ,End of message" "No end,End"
|
|
bitfld.long 0x00 24. " ENDHEADER ,End of header" "No end,End"
|
|
bitfld.long 0x00 11. " IDLEFLAG ,Frame transmission in J1587 protocol" "Received,Not received"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IDLE ,IDLE interrupt" "No end,End"
|
|
bitfld.long 0x00 9. " TXEMPTY ,Transmitter empty" "Not empty,Empty"
|
|
bitfld.long 0x00 8. " TIMEOUT ,Time-out" "No time-out,Time-out"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PARE ,Parity error" "Not false,False"
|
|
bitfld.long 0x00 6. " FRAME ,Framing error" "Not detected,Detected"
|
|
bitfld.long 0x00 5. " OVRE ,Overrun error" "Not transferred,Transferred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RXBRK ,Receiver break" "Not received,Received"
|
|
bitfld.long 0x00 1. " TXRDY ,Transmitter ready" "Waiting,No character"
|
|
bitfld.long 0x00 0. " RXRDY ,Receiver ready" "Not received,Received"
|
|
hgroup.long 0x28++0x03
|
|
hide.long 0x04 "US_RHR,USART Receiver Holding Register"
|
|
in
|
|
wgroup.long 0x2C++0x03
|
|
line.long 0x00 "US_THR,USART Transmit Holding Register"
|
|
hexmask.long.word 0x00 0.--8. 1. " TXCHR ,Character to be transmitted"
|
|
group.long 0x30++0x17
|
|
line.long 0x00 "US_BRGR,USART Baud Rate Generator Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CD ,Clock Divider"
|
|
line.long 0x04 "US_RTOR,USART Receiver Time-Out Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " TO ,Time-out value"
|
|
line.long 0x08 "US_TTGR,USART Transmit Time-Guard Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " TG ,Time-guard value"
|
|
line.long 0x0C "US_LIR,USART Transmit Time-Guard Register"
|
|
hexmask.long.word 0x0C 16.--29. 1. " WAKE_UP_TIME ,Wake up time for the LIN2.0 release"
|
|
bitfld.long 0x0C 9. " CHK_SEL ,Checksum selection" "Classic,Enhanced"
|
|
bitfld.long 0x0C 6.--8. " NDATA ,Number of data field for the LIN2.0 release" "1,2,3,4,5,6,7,8"
|
|
textline " "
|
|
bitfld.long 0x0C 0.--5. " IDENTIFIER ,LIN identifier" "2,2,4,8,?..."
|
|
line.long 0x10 "US_DFWR0,USART Data Field Write 0 Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " DATA3 ,LINs byte field to be transmitted"
|
|
hexmask.long.byte 0x10 16.--23. 1. " DATA2 ,LINs byte field to be transmitted"
|
|
hexmask.long.byte 0x10 8.--15. 1. " DATA1 ,LINs byte field to be transmitted"
|
|
textline " "
|
|
hexmask.long.byte 0x10 0.--7. 1. " DATA0 ,LINs byte field to be transmitted"
|
|
line.long 0x14 "US_DFWR1,USART Data Field Write 1 Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " DATA7 ,LINs byte field to be transmitted"
|
|
hexmask.long.byte 0x14 16.--23. 1. " DATA6 ,LINs byte field to be transmitted"
|
|
hexmask.long.byte 0x14 8.--15. 1. " DATA5 ,LINs byte field to be transmitted"
|
|
textline " "
|
|
hexmask.long.byte 0x14 0.--7. 1. " DATA4 ,LINs byte field to be transmitted"
|
|
rgroup.long 0x48++0x07
|
|
line.long 0x00 "US_DFRR0,USART Data Field Read 0 Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " DATA3 ,LINs byte field to be received"
|
|
hexmask.long.byte 0x00 16.--23. 1. " DATA2 ,LINs byte field to be received"
|
|
hexmask.long.byte 0x00 8.--15. 1. " DATA1 ,LINs byte field to be received"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA0 ,LINs byte field to be received"
|
|
line.long 0x04 "US_DFRR1,USART Data Field Read 1 Register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " DATA7 ,LINs byte field to be received"
|
|
hexmask.long.byte 0x04 16.--23. 1. " DATA6 ,LINs byte field to be received"
|
|
hexmask.long.byte 0x04 8.--15. 1. " DATA5 ,LINs byte field to be received"
|
|
textline " "
|
|
hexmask.long.byte 0x04 0.--7. 1. " DATA4 ,LINs byte field to be received"
|
|
group.long 0x50++0x0F
|
|
line.long 0x00 "US_SBLR,USART Synchronous Break Length Register"
|
|
bitfld.long 0x00 0.--4. " SYNC_BRK ,Synchronous break length" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x04 "US_LCP1,USART Synchronous Break Length Register 1"
|
|
hexmask.long.byte 0x04 24.--31. 1. " LCP3 ,Limit Counter Protocol"
|
|
hexmask.long.byte 0x04 16.--23. 1. " LCP2 ,Limit Counter Protocol"
|
|
hexmask.long.byte 0x04 8.--15. 1. " LCP1 ,Limit Counter Protocol"
|
|
textline " "
|
|
hexmask.long.byte 0x04 0.--7. 1. " LCP0 ,Limit Counter Protocol"
|
|
line.long 0x08 "US_LCP2,USART Synchronous Break Length Register 2"
|
|
hexmask.long.byte 0x08 24.--31. 1. " LCP7 ,Limit Counter Protocol"
|
|
hexmask.long.byte 0x08 16.--23. 1. " LCP6 ,Limit Counter Protocol"
|
|
hexmask.long.byte 0x08 8.--15. 1. " LCP5 ,Limit Counter Protocol"
|
|
textline " "
|
|
hexmask.long.byte 0x08 0.--7. 1. " LCP4 ,Limit Counter Protocol"
|
|
line.long 0x0C "US_DMACR,USART DMA Control Register"
|
|
bitfld.long 0x0C 1. " TXDMAE ,DMA for the transmit Enable/ Disable Control Bit" "Disabled,Enabled"
|
|
bitfld.long 0x0C 0. " RXDMAE ,DMA for the receive Enable/ Disable Control Bit" "Disabled,Enabled"
|
|
width 11.
|
|
tree.end
|
|
tree.end
|
|
tree "WD (Watchdog Timer)"
|
|
base ad:0x40030000
|
|
width 11.
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "WDT_IDR,Watchdog Timer ID Register"
|
|
hexmask.long 0x00 0.--25. 1. " IDCODE ,ID Code Register"
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "WDT_CR,Watchdog Timer Control Register"
|
|
bitfld.long 0x00 31. " DBGEN ,Debug Enable/Disable Control Bit" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 0.--15. 1. " RSTKEY ,Restart Key Field"
|
|
group.long 0x08++0x07
|
|
line.long 0x00 "WDT_MR,Watchdog Timer Mode Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CKEY ,Clock Access Key Field"
|
|
hexmask.long.word 0x00 8.--23. 1. " PCV ,Preload Counter Value"
|
|
bitfld.long 0x00 0.--2. " WDTPDIV ,WDT Clock Divider Field" "FIN/2,FIN/4,FIN/8,FIN/16,FIN/64,FIN/128,FIN/256,FIN/512"
|
|
line.long 0x04 "WDT_OMR,Watchdog Timer Overflow Mode Register"
|
|
hexmask.long.word 0x04 4.--15. 1. " OKEY ,Overflow Access Key Field"
|
|
bitfld.long 0x04 2. " LOCKRSTEN ,CPU Lock-up Reset Enable/Disable Control Bit" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " RSTEN ,System (Chip) Reset Enable/Disable Control Bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 0. " WDTEN ,Watchdog Enable/Disable Control Bit" "Disabled,Enabled"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "WDT_SR,Watchdog Timer Status Register"
|
|
bitfld.long 0x00 31. " DBGEN ,DBGEN Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " ,Clear Status" "Reset finished,Reset started"
|
|
bitfld.long 0x00 8. " PENDING ,Watchdog Pending status" "Over,Equal/less"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "WDT_IMSCR,Watchdog Timer Interrupt Mask Set and Clear Register"
|
|
bitfld.long 0x00 1. " WDTOVF ,Watchdog Timer Pending Interrupt Mask" "Masked,Not masked"
|
|
bitfld.long 0x00 0. " WDTPEND ,Watchdog Timer Overflow Interrupt Mask" "Masked,Not masked"
|
|
rgroup.long 0x18++0x07
|
|
line.long 0x00 "WDT_RISR,Watchdog Timer Raw Interrupt Status Register"
|
|
bitfld.long 0x00 1. " WDTOVF ,Watchdog overflow interrupt raw state" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " WDTPEND ,Watchdog pending interrupt raw state" "Not occurred,Occurred"
|
|
line.long 0x04 "WDT_MISR,Watchdog Timer Masked Interrupt Status Register"
|
|
bitfld.long 0x04 1. " WDTOVF ,Watchdog overflow interrupt mask" "Not occurred,Occurred"
|
|
bitfld.long 0x04 0. " WDTPEND ,Watchdog pending masked interrupt Status" "Not occurred,Occurred"
|
|
wgroup.long 0x20++0x03
|
|
line.long 0x00 "WDT_ICR,Watchdog Timer Interrupt Clear Register"
|
|
bitfld.long 0x00 1. " WDTOVF ,Watchdog overflow clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " WDTPEND ,Watchdog pending clear." "No effect,Clear"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "WDT_PWR,Watchdog Pending Windows Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PWKEY ,Pending window access key"
|
|
hexmask.long.word 0x00 8.--23. 1. " PWL ,Pending window length"
|
|
bitfld.long 0x00 0. " RSTALW ,Restart allowed" "Every time,Within"
|
|
rgroup.long 0x28++0x03
|
|
line.long 0x00 "WDT_CTR,Watchdog Timer Counter Test Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " COUNT ,Value of Watchdog timer counter"
|
|
width 11.
|
|
tree.end
|
|
textline ""
|