58334 lines
4.3 MiB
58334 lines
4.3 MiB
; --------------------------------------------------------------------------------
|
|
; @Title: S32V On-Chip Peripherals
|
|
; @Props: Released
|
|
; @Author: KRZ
|
|
; @Changelog: 2024-02-12 KRZ
|
|
; @Manufacturer: NXP - NXP Semiconductors
|
|
; @Doc: Generated (TRACE32, build: 166684.), based on:
|
|
; S32V234.svd (Ver. 1.6)
|
|
; @Core: Cortex-A53, Cortex-M4F, Cortex-M0+
|
|
; @Chip: S32V232, S32V232-CM4, S32V232-CM0+, S32V234, S32V234-CM4, S32V234-CM0+
|
|
; @Copyright: (C) 1989-2024 Lauterbach GmbH, licensed for use with TRACE32(R) only
|
|
; --------------------------------------------------------------------------------
|
|
; $Id: pers32v.per 17484 2024-02-13 12:16:58Z kwisniewski $
|
|
|
|
AUTOINDENT.ON CENTER TREE
|
|
ENUMDELIMITER ","
|
|
base ad:0x0
|
|
sif (CORENAME()=="CORTEXA53")
|
|
tree "Core Registers (Cortex-A53)"
|
|
AUTOINDENT.PUSH
|
|
AUTOINDENT.ON center tree
|
|
tree.open "AArch64"
|
|
tree "ID Registers"
|
|
rgroup.quad spr:0x30000++0x0
|
|
line.long 0x0 "MIDR_EL1,Main ID Register"
|
|
hexmask.long.byte 0x0 24.--31. 0x1 "IMPL,Implementer code"
|
|
bitfld.long 0x0 20.--23. "VAR,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0 16.--19. "ARCH,Architecture" "Reserved,ARMv4,ARMv4T,ARMv5,ARMv5T,ARMv5TE,ARMv5TEJ,ARMv6,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,CPUID scheme"
|
|
newline
|
|
hexmask.long.word 0x0 4.--15. 0x1 "PART,Primary Part Number"
|
|
bitfld.long 0x0 0.--3. "REV,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
if (CORENAME()=="CORTEXA57")
|
|
rgroup.quad spr:0x33001++0x0
|
|
line.long 0x0 "CTR_EL0,Cache Type Register"
|
|
bitfld.long 0x0 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
|
|
bitfld.long 0x0 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
|
|
bitfld.long 0x0 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
|
|
newline
|
|
bitfld.long 0x0 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,Reserved,PIPT"
|
|
bitfld.long 0x0 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
|
|
elif (CORENAME()=="CORTEXA53")
|
|
rgroup.quad spr:0x33001++0x0
|
|
line.long 0x0 "CTR_EL0,Cache Type Register"
|
|
bitfld.long 0x0 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
|
|
bitfld.long 0x0 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
|
|
bitfld.long 0x0 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
|
|
newline
|
|
bitfld.long 0x0 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,VIPT,?..."
|
|
bitfld.long 0x0 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
|
|
endif
|
|
if (CORENAME()=="CORTEXA57")
|
|
rgroup.quad spr:0x30005++0x00
|
|
line.quad 0x0 "MPIDR_EL1,Multiprocessor Affinity Register"
|
|
bitfld.quad 0x00 30. "U,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,?..."
|
|
bitfld.quad 0x00 24. "MT,Lowest level of affinity consist of logical processors" "Largely independent,?..."
|
|
hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2. Second highest level affinity field"
|
|
newline
|
|
hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1. Third highest level affinity field"
|
|
bitfld.quad 0x00 0.--1. "CPUID,CPU ID" "1,2,3,4"
|
|
elif (CORENAME()=="CORTEXA53")
|
|
rgroup.quad spr:0x30005++0x00
|
|
line.quad 0x0 "MPIDR_EL1,Multiprocessor Affinity Register"
|
|
hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity level 3. Third highest level affinity field"
|
|
newline
|
|
bitfld.quad 0x00 30. "U,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,?..."
|
|
bitfld.quad 0x00 24. "MT,Lowest level of affinity consist of logical processors" "Largely independent,?..."
|
|
hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2. Second highest level affinity field"
|
|
newline
|
|
hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1. Third highest level affinity field"
|
|
hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0. Lowest level affinity field"
|
|
endif
|
|
rgroup.quad SPR:0x30006++0x0
|
|
line.long 0x0 "REVIDR_EL1,Revision ID Register"
|
|
rgroup.quad SPR:0x30014++0x00
|
|
line.long 0x00 "ID_MMFR0_EL1,Memory Model Feature Register 0"
|
|
bitfld.long 0x00 28.--31. "IS,Indicates innermost shareability domain implemented" "Reserved,Implemented,?..."
|
|
bitfld.long 0x00 24.--27. "FCSE,Fast Context Switch Memory Mappings Support" "Not supported,?..."
|
|
bitfld.long 0x00 20.--23. "AR,Auxiliary Register Support" "Reserved,Supported,?..."
|
|
newline
|
|
bitfld.long 0x00 16.--19. "TCM,TCM and Associated DMA Support" "Not supported,?..."
|
|
bitfld.long 0x00 12.--15. "SL,Shareability levels" "Reserved,Implemented 2 levels,?..."
|
|
bitfld.long 0x00 8.--11. "OSS,Outer Shareable Support" "Reserved,Implemented,?..."
|
|
newline
|
|
bitfld.long 0x00 4.--7. "PMSA,Physical Memory System Architecture (PMSA) Support" "Not supported,?..."
|
|
bitfld.long 0x00 0.--3. "VMSA,Virtual Memory System Architecture (VMSA) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
|
|
rgroup.quad SPR:0x30015++0x00
|
|
line.long 0x00 "ID_MMFR1_EL1,Memory Model Feature Register 1"
|
|
bitfld.long 0x00 28.--31. "BTB,Branch Predictor" "Reserved,Reserved,Required,?..."
|
|
bitfld.long 0x00 24.--27. "L1TCO,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..."
|
|
bitfld.long 0x00 20.--23. "L1UCMO,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..."
|
|
newline
|
|
bitfld.long 0x00 16.--19. "L1HCMO,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Not supported,?..."
|
|
bitfld.long 0x00 12.--15. "L1UCLMOSW,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..."
|
|
bitfld.long 0x00 8.--11. "L1HCLMOSW,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Not supported,?..."
|
|
newline
|
|
bitfld.long 0x00 4.--7. "L1UCLMOMVA,L1 Cache Line Maintenance Operations by VA/Unified Architecture Support" "Not supported,?..."
|
|
bitfld.long 0x00 0.--3. "L1HCLMOMVA,L1 Cache Line Maintenance Operations by VA/Harvard Architecture" "Not supported,?..."
|
|
rgroup.quad SPR:0x30016++0x00
|
|
line.long 0x00 "ID_MMFR2_EL1,Memory Model Feature Register 2"
|
|
bitfld.long 0x00 28.--31. "HAF,Hardware Access Flag Support" "Not supported,?..."
|
|
bitfld.long 0x00 24.--27. "WFI,Wait for Interrupt Stalling Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 20.--23. "MBF,Memory Barrier Operations Support" "Reserved,Reserved,Supported,?..."
|
|
newline
|
|
bitfld.long 0x00 16.--19. "UTLBMO,TLB Maintenance Operations/Unified Architecture Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 12.--15. "HTLBMO,TLB Maintenance Operations/Harvard Architecture Support" "Not supported,?..."
|
|
bitfld.long 0x00 8.--11. "HL1CMRO,Cache Maintenance Range Operations/Harvard Architecture Support" "Not supported,?..."
|
|
newline
|
|
bitfld.long 0x00 4.--7. "HL1BPCRO,Background Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..."
|
|
bitfld.long 0x00 0.--3. "HL1FPCRO,Foreground Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..."
|
|
rgroup.quad SPR:0x30017++0x00
|
|
line.long 0x00 "ID_MMFR3_EL1,Memory Model Feature Register 3"
|
|
bitfld.long 0x00 28.--31. "SS,Supersection support" "Supported,?..."
|
|
bitfld.long 0x00 24.--27. "CMEMSZ,Cache memory size" "Reserved,Reserved,1TByte,?..."
|
|
bitfld.long 0x00 20.--23. "CW,Coherent walk" "Reserved,Supported,Reserved,?..."
|
|
newline
|
|
bitfld.long 0x00 12.--15. "MB,Maintenance broadcast Support" "Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 8.--11. "BPM,Invalidate Branch predictor Support" "Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 4.--7. "HCMOSW,Invalidate Cache by Set and Way/Clean by Set and Way/Invalidate and Clean by Set and Way Support" "Reserved,Supported,?..."
|
|
newline
|
|
bitfld.long 0x00 0.--3. "HCMOMVA,Invalidate Cache MVA Support" "Reserved,Supported,?..."
|
|
rgroup.quad spr:0x30026++0x00
|
|
line.long 0x00 "ID_MMFR4_EL1,Memory Model Feature Register 4"
|
|
bitfld.long 0x00 4.--7. "AC2,Extension of ACTLR and HACTLR by ACTLR2 and HACTLR2" "Not implemented,Implemented,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
if (CORENAME()=="CORTEXA53")
|
|
rgroup.quad spr:0x30070++0x00
|
|
line.quad 0x00 "ID_AA64MMFR0_EL1,AArch64 Memory Model Feature Register 0"
|
|
bitfld.quad 0x00 28.--31. "4KB,4KB granule supported" "Supported,?..."
|
|
bitfld.quad 0x00 24.--27. "64KB,64KB granule supported" "Supported,?..."
|
|
bitfld.quad 0x00 20.--23. "16KB,16KB granule supported" "Not supported,?..."
|
|
newline
|
|
bitfld.quad 0x00 12.--15. "SNSMEM,Secure versus Non-secure Memory distinction" "Reserved,Supported,?..."
|
|
bitfld.quad 0x00 8.--11. "BIGEND,Mixed-endian configuration support" "Reserved,Supported,?..."
|
|
bitfld.quad 0x00 4.--7. "ASIDBITS,Number of ASID bits" "Reserved,Reserved,16 bits,?..."
|
|
newline
|
|
bitfld.quad 0x00 0.--3. "PARANGE,Physical address range supported" "Reserved,Reserved,Reserved,Reserved,44 bits/16 TB,?..."
|
|
elif (CORENAME()=="CORTEXA53")
|
|
rgroup.quad spr:0x30070++0x00
|
|
line.quad 0x00 "ID_AA64MMFR0_EL1,AArch64 Memory Model Feature Register 0"
|
|
bitfld.quad 0x00 28.--31. "4KB,4KB granule supported" "Supported,?..."
|
|
bitfld.quad 0x00 24.--27. "64KB,64KB granule supported" "Supported,?..."
|
|
bitfld.quad 0x00 20.--23. "16KB,16KB granule supported" "Not supported,?..."
|
|
newline
|
|
bitfld.quad 0x00 12.--15. "SNSMEM,Secure versus Non-secure Memory distinction" "Reserved,Supported,?..."
|
|
bitfld.quad 0x00 8.--11. "BIGEND,Mixed-endian configuration support" "Reserved,Supported,?..."
|
|
bitfld.quad 0x00 4.--7. "ASIDBITS,Number of ASID bits" "Reserved,Reserved,16 bits,?..."
|
|
newline
|
|
bitfld.quad 0x00 0.--3. "PARANGE,Physical address range supported" "Reserved,Reserved,40 bits/1 TB,?..."
|
|
endif
|
|
if (CORENAME()=="CORTEXA53")
|
|
rgroup.quad spr:0x30071++0x00
|
|
line.quad 0x00 "ID_AA64MMFR1_EL1,AArch64 Memory Model Feature Register 1"
|
|
endif
|
|
rgroup.quad SPR:0x30020++0x00
|
|
line.long 0x00 "ID_ISAR0_EL1,Instruction Set Attribute Register 0"
|
|
bitfld.long 0x00 24.--27. "DIVI,Divide Instructions Support" "Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 20.--23. "DEBI,Debug Instructions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 16.--19. "CI,Coprocessor Instructions Support" "Not supported,?..."
|
|
newline
|
|
bitfld.long 0x00 12.--15. "CBI,Combined Compare and Branch Instructions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 8.--11. "BI,Bitfield Instructions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 4.--7. "BCI,Bit Counting Instructions Support" "Reserved,Supported,?..."
|
|
newline
|
|
bitfld.long 0x00 0.--3. "SI,Swap Instructions Support" "Not supported,?..."
|
|
rgroup.quad SPR:0x30021++0x00
|
|
line.long 0x00 "ID_ISAR1_EL1,Instruction Set Attribute Register 1"
|
|
bitfld.long 0x00 28.--31. "JI,Jazelle Instructions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 24.--27. "INTI,Interwork Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 20.--23. "IMMI,Immediate Instructions Support" "Reserved,Supported,?..."
|
|
newline
|
|
bitfld.long 0x00 16.--19. "ITEI,If Then Instructions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 12.--15. "EXTI,Extend Instructions Support" "Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 8.--11. "EARI,Exception A and R Instructions Support" "Reserved,Supported,?..."
|
|
newline
|
|
bitfld.long 0x00 4.--7. "EXIN,Exception in ARM Instructions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 0.--3. "ENDI,Endian Instructions Support" "Reserved,Supported,?..."
|
|
rgroup.quad SPR:0x30022++0x00
|
|
line.long 0x00 "ID_ISAR2_EL1,Instruction Set Attribute Register 2"
|
|
bitfld.long 0x00 28.--31. "RI,Reversal Instructions Support" "Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 24.--27. "PSRI,PSR Instructions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 20.--23. "UMI,Advanced Unsigned Multiply Instructions Support" "Reserved,Reserved,Supported,?..."
|
|
newline
|
|
bitfld.long 0x00 16.--19. "SMI,Advanced Signed Multiply Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 12.--15. "MI,Multiply Instructions Support" "Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 8.--11. "II,Multi-Access Interruptible Instructions Support" "Not supported,?..."
|
|
newline
|
|
bitfld.long 0x00 4.--7. "MHI,Memory Hint Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 0.--3. "LSI,Load and Store Instructions Support" "Reserved,Reserved,Supported,?..."
|
|
rgroup.quad SPR:0x30023++0x00
|
|
line.long 0x00 "ID_ISAR3_EL1,Instruction Set Attribute Register 3"
|
|
bitfld.long 0x00 28.--31. "TEEEI,Thumb-EE Extensions Support" "Not supported,?..."
|
|
bitfld.long 0x00 24.--27. "NOPI,True NOP Instructions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 20.--23. "TCI,Thumb Copy Instructions Support" "Reserved,Supported,?..."
|
|
newline
|
|
bitfld.long 0x00 16.--19. "TBI,Table Branch Instructions Support" "Reserved,Supported,Reserved,?..."
|
|
bitfld.long 0x00 12.--15. "SPI,Synchronization Primitive Instructions Support" "Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 8.--11. "SVCI,SVC Instructions Support" "Reserved,Supported,?..."
|
|
newline
|
|
bitfld.long 0x00 4.--7. "SIMDI,Single Instruction Multiple Data (SIMD) Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 0.--3. "SI,Saturate Instructions Support" "Reserved,Supported,?..."
|
|
rgroup.quad SPR:0x30024++0x00
|
|
line.long 0x00 "ID_ISAR4_EL1,Instruction Set Attribute Register 4"
|
|
bitfld.long 0x00 28.--31. "SWP_FRAC,Memory System Locking Support" "Not supported,?..."
|
|
bitfld.long 0x00 24.--27. "PSR_M_I,PSR_M Instructions Support" "Not supported,?..."
|
|
bitfld.long 0x00 20.--23. "SPRI,Synchronization Primitive instructions" "Supported,?..."
|
|
newline
|
|
bitfld.long 0x00 16.--19. "BI,Barrier Instructions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 12.--15. "SMCI,SMC Instructions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 8.--11. "WBI,Write-Back Instructions Support" "Reserved,Supported,?..."
|
|
newline
|
|
bitfld.long 0x00 4.--7. "WSI,With-Shift Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 0.--3. "UI,Unprivileged Instructions Support" "Reserved,Reserved,Supported,?..."
|
|
rgroup.quad SPR:0x30025++0x00
|
|
line.long 0x00 "ID_ISAR5_EL1,Instruction Set Attribute Register 5"
|
|
bitfld.long 0x00 16.--19. "CRC32,CRC32 Instructions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 12.--15. "SHA2,SHA2 Instructions Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 8.--11. "SHA1,SHA1 Instructions Support" "Not supported,Supported,?..."
|
|
newline
|
|
bitfld.long 0x00 4.--7. "AES,AES Instructions Support" "Not supported,Reserved,Supported,?..."
|
|
bitfld.long 0x00 0.--3. "SEVL,SEVL Instructions Support" "Reserved,Supported,?..."
|
|
rgroup.quad spr:0x30060++0x00
|
|
line.quad 0x00 "ID_AA64ISAR0_EL1,AArch64 Instruction Set Attribute Register 0"
|
|
bitfld.quad 0x00 16.--19. "CRC32,CRC32" "Reserved,Implemented,?..."
|
|
bitfld.quad 0x00 12.--15. "SHA2,SHA2 instructions are implemented" "Not implemented,Implemented,?..."
|
|
bitfld.quad 0x00 8.--11. "SHA1,SHA1 instructions are implemented" "Not implemented,Implemented,?..."
|
|
newline
|
|
bitfld.quad 0x00 4.--7. "AES,AES instructions are implemented" "Not implemented,Reserved,Implemented,?..."
|
|
if (CORENAME()=="CORTEXA53")
|
|
rgroup.quad spr:0x30061++0x00
|
|
line.quad 0x00 "ID_AA64ISAR1_EL1,AArch64 Instruction Set Attribute Register 1"
|
|
endif
|
|
rgroup.quad SPR:0x30010++0x00
|
|
line.long 0x00 "ID_PFR0_EL1,Processor Feature Register 0"
|
|
bitfld.long 0x00 12.--15. "STATE3,Thumb Execution Environment (Thumb-EE) Support" "Not supported,?..."
|
|
bitfld.long 0x00 8.--11. "STATE2,Support for Jazelle extension" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 4.--7. "STATE1,Thumb Encoding Supported by the Processor Type" "Reserved,Reserved,Reserved,Supported,?..."
|
|
newline
|
|
bitfld.long 0x00 0.--3. "STATE0,ARM Instruction Set Support" "Reserved,Supported,?..."
|
|
rgroup.quad SPR:0x30011++0x00
|
|
line.long 0x00 "ID_PFR1_EL1,Processor Feature Register 1"
|
|
bitfld.long 0x00 28.--31. "GIC_CPU,GIC CPU Support" "Disabled,Enabled,?..."
|
|
bitfld.long 0x00 16.--19. "GT,Generic Timer Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 12.--15. "VE,Virtualization Extensions Support" "Reserved,Supported,?..."
|
|
newline
|
|
bitfld.long 0x00 8.--11. "MPM,Microcontroller Programmer's Model Support" "Not supported,?..."
|
|
bitfld.long 0x00 4.--7. "SE,Security Extensions Architecture v1 Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 0.--3. "PM,Standard ARMv4 Programmer's Model Support" "Reserved,Supported,?..."
|
|
if (CORENAME()=="CORTEXA57")
|
|
rgroup.quad spr:0x30040++0x00
|
|
line.quad 0x00 "ID_AA64PFR0_EL1,AArch64 Processor Feature Register 0"
|
|
bitfld.quad 0x00 24.--27. "GIC,GIC CPU interface" "Disabled,Enabled,?..."
|
|
bitfld.quad 0x00 20.--23. "ADVSIMD,Advanced SIMD" "Implemented,?..."
|
|
bitfld.quad 0x00 16.--19. "FP,Floating-point" "Implemented,?..."
|
|
newline
|
|
bitfld.quad 0x00 12.--15. "EL3H,EL3 exception handling" "Reserved,Reserved,AArch64/AArch32,?..."
|
|
bitfld.quad 0x00 8.--11. "EL2H,EL2 exception handling" "Reserved,Reserved,AArch64/AArch32,?..."
|
|
bitfld.quad 0x00 4.--7. "EL1H,EL1 exception handling" "Reserved,Reserved,AArch64/AArch32,?..."
|
|
newline
|
|
bitfld.quad 0x00 0.--3. "EL0H,EL0 exception handling" "Reserved,Reserved,AArch64/AArch32,?..."
|
|
elif (CORENAME()=="CORTEXA53")
|
|
rgroup.quad spr:0x30040++0x00
|
|
line.quad 0x00 "ID_AA64PFR0_EL1,AArch64 Processor Feature Register 0"
|
|
bitfld.quad 0x00 24.--27. "GIC,GIC CPU interface" "Disabled,Enabled,?..."
|
|
bitfld.quad 0x00 20.--23. "ADVSIMD,Advanced SIMD" "Implemented,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Not implemented"
|
|
bitfld.quad 0x00 16.--19. "FP,Floating-point" "Implemented,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Not implemented"
|
|
newline
|
|
bitfld.quad 0x00 12.--15. "EL3H,EL3 exception handling" "Reserved,Reserved,AArch64/AArch32,?..."
|
|
bitfld.quad 0x00 8.--11. "EL2H,EL2 exception handling" "Reserved,Reserved,AArch64/AArch32,?..."
|
|
bitfld.quad 0x00 4.--7. "EL1H,EL1 exception handling" "Reserved,Reserved,AArch64/AArch32,?..."
|
|
newline
|
|
bitfld.quad 0x00 0.--3. "EL0H,EL0 exception handling" "Reserved,Reserved,AArch64/AArch32,?..."
|
|
endif
|
|
if (CORENAME()=="CORTEXA53")
|
|
rgroup.quad spr:0x30041++0x00
|
|
line.quad 0x00 "ID_AA64PFR1_EL1,AArch64 Processor Feature Register 1"
|
|
endif
|
|
if (CORENAME()=="CORTEXA57")
|
|
rgroup.quad SPR:0x30012++0x00
|
|
line.long 0x00 "ID_DFR0_EL1,Debug Feature Register 0"
|
|
bitfld.long 0x00 24.--27. "PMM,Performance Monitor Model Support" "Reserved,Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 20.--23. "MDM_MM,Memory-mapped Debug Model for M profile processors Support" "Not supported,?..."
|
|
bitfld.long 0x00 16.--19. "TM_MM,Trace Model (Memory-Mapped) Support" "Reserved,Supported,?..."
|
|
newline
|
|
bitfld.long 0x00 12.--15. "CTM_CB,Coprocessor-Based Trace Debug Model Support" "Not supported,?..."
|
|
bitfld.long 0x00 8.--11. "CDM_MM,Memory-Mapped Debug Model Support" "Not supported,?..."
|
|
bitfld.long 0x00 4.--7. "SDM_CB,Secure Debug Model (Coprocessor) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
|
|
newline
|
|
bitfld.long 0x00 0.--3. "CDM_CB,Coprocessor Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
|
|
elif (CORENAME()=="CORTEXA53")
|
|
rgroup.quad SPR:0x30012++0x00
|
|
line.long 0x00 "ID_DFR0_EL1,Debug Feature Register 0"
|
|
bitfld.long 0x00 24.--27. "PMM,Performance Monitor Model Support" "Reserved,Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 20.--23. "MDM_MM,Memory-mapped Debug Model for M profile processors Support" "Not supported,?..."
|
|
bitfld.long 0x00 16.--19. "TM_MM,Trace Model (Memory-Mapped) Support" "Reserved,Supported,?..."
|
|
newline
|
|
bitfld.long 0x00 12.--15. "CTM_CB,Coprocessor-Based Trace Debug Model Support" "Not supported,?..."
|
|
bitfld.long 0x00 4.--7. "SDM_CB,Secure Debug Model (Coprocessor) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 0.--3. "CDM_CB,Coprocessor Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
|
|
endif
|
|
rgroup.quad spr:0x30050++0x00
|
|
line.quad 0x00 "ID_AA64DFR0_EL1,AArch64 Debug Feature Register 0"
|
|
bitfld.quad 0x00 28.--31. "CTX_CMPS,Number of breakpoints that are context-aware minus 1" "Reserved,2,?..."
|
|
bitfld.quad 0x00 20.--23. "WRPS,The number of watchpoints minus 1" "Reserved,Reserved,Reserved,4,?..."
|
|
bitfld.quad 0x00 12.--15. "BRPS,The number of breakpoints minus 1" "Reserved,Reserved,Reserved,Reserved,Reserved,6,?..."
|
|
newline
|
|
bitfld.quad 0x00 8.--11. "PMUVER,Performance Monitors extension version" "Reserved,Implemented,?..."
|
|
bitfld.quad 0x00 4.--7. "TRACEVER,Trace extension" "Not implemented,?..."
|
|
bitfld.quad 0x00 0.--3. "DEBUGGER,Debug architecture version" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Implemented,?..."
|
|
if (CORENAME()=="CORTEXA53")
|
|
rgroup.quad spr:0x30051++0x00
|
|
line.quad 0x00 "ID_AA64DFR1_EL1,AArch64 Debug Feature Register 1"
|
|
rgroup.quad spr:0x30054++0x00
|
|
line.quad 0x00 "ID_AA64AFR0_EL1,AArch64 Auxiliary Feature Register 0"
|
|
rgroup.quad spr:0x30055++0x00
|
|
line.quad 0x00 "ID_AA64AFR1_EL1,AArch64 Auxiliary Feature Register 1"
|
|
endif
|
|
rgroup.quad SPR:0x30013++0x00
|
|
line.long 0x00 "ID_AFR0_EL1,Auxiliary Feature Register 0"
|
|
rgroup.quad SPR:0x31007++0x00
|
|
line.long 0x00 "AIDR_EL1,Auxiliary ID Register"
|
|
rgroup.quad SPR:0x33007++0x00
|
|
line.long 0x00 "DCZID_EL0,Data Cache Zero ID"
|
|
bitfld.long 0x00 4. "DZP,Prohibit the DC ZVA instruction" "Not prohibited,Prohibited"
|
|
bitfld.long 0x00 0.--3. "BS,Block Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
|
|
tree.end
|
|
tree "System Control and Configuration"
|
|
group.quad spr:0x36111++0x00
|
|
line.quad 0x00 "SDER32_EL3,Secure Debug Enable Register"
|
|
bitfld.quad 0x00 1. "SUNIDEN,Enable non-invasive debug features in Secure User mode" "Disabled,Enabled"
|
|
bitfld.quad 0x00 0. "SUIDEN,Enable debug exceptions in Secure User mode" "Disabled,Enabled"
|
|
group.quad SPR:0x30100++0x0
|
|
line.long 0x00 "SCTLR_EL1,System Control Register (EL1)"
|
|
bitfld.long 0x0 26. "UCI,EL0 access enable (DC CVAU|DC CIVAC|DC CVAC|IC IVAU)" "Disabled,Enabled"
|
|
bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big"
|
|
newline
|
|
bitfld.long 0x0 24. "E0E,Endianness of explicit data access at EL0" "Little,Big"
|
|
bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced"
|
|
newline
|
|
bitfld.long 0x0 18. "NTWE,Not trap WFE" "No,Yes"
|
|
bitfld.long 0x0 16. "NTWI,Not trap WFI" "No,Yes"
|
|
newline
|
|
bitfld.long 0x0 15. "UCT,EL0 access enable (CTR_EL0)" "Disabled,Enabled"
|
|
bitfld.long 0x0 14. "DZE,EL0 access enable (DC ZVA)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 9. "UMA,User Mask Access" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes"
|
|
bitfld.long 0x0 7. "ITD,IT instruction disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 6. "THEE,Thumb EE enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 5. "CP15BEN,c15 barrier enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0 4. "SA0,EL0 stack alignment check enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. "SA,SP stack alignment check enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled"
|
|
group.quad SPR:0x34100++0x0
|
|
line.long 0x00 "SCTLR_EL2,System Control Register (EL2)"
|
|
bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big"
|
|
bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced"
|
|
newline
|
|
bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. "SA,SP stack alignment check enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled"
|
|
group.quad SPR:0x36100++0x0
|
|
line.long 0x00 "SCTLR_EL3,System Control Register (EL3)"
|
|
bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big"
|
|
bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced"
|
|
newline
|
|
bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 3. "SA,SP stack alignment check enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled"
|
|
rgroup.quad SPR:0x30101++0x0
|
|
line.long 0x00 "ACTLR_EL1,Auxiliary Control Register (EL1)"
|
|
group.quad SPR:0x34101++0x0
|
|
line.long 0x00 "ACTLR_EL2,Auxiliary Control Register (EL2)"
|
|
bitfld.long 0x00 6. "L2ACTLRAC,L2ACTLR write access control" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. "L2ECTLRAC,L2ECTLR write access control" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 4. "L2CTLRAC,L2CTLR write access control" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. "CPUECTLRAC,CPUECTLR write access control" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "CPUACTLRAC,CPUACTLR write access control" "Disabled,Enabled"
|
|
group.quad SPR:0x36101++0x0
|
|
line.long 0x00 "ACTLR_EL3,Auxiliary Control Register (EL3)"
|
|
bitfld.long 0x00 6. "L2ACTLRAC,L2ACTLR write access control" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. "L2ECTLRAC,L2ECTLR write access control" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 4. "L2CTLRAC,L2CTLR write access control" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. "CPUECTLRAC,CPUECTLR write access control" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "CPUACTLRAC,CPUACTLR write access control" "Disabled,Enabled"
|
|
group.quad SPR:0x30102++0x00
|
|
line.long 0x00 "CPACR_EL1,Architectural Feature Access Control Register"
|
|
bitfld.long 0x00 28. "TTA,Causes access to the Trace functionality to trap to EL1 when executed from EL0 or EL1" "Disabled,?..."
|
|
bitfld.long 0x00 20.--21. "FPEN,Traps instructions that access registers associated with Advanced SIMD and Floating-point execution to trap to EL1 when executed from EL0 or EL1" "Trap all,Trap El0,Trap all,Not trapped"
|
|
group.quad SPR:0x36110++0x0
|
|
line.long 0x0 "SCR_EL3,Secure Configuration Register"
|
|
bitfld.long 0x00 13. "TWE,Trap WFE Instructions" "Not trapped,Trapped"
|
|
bitfld.long 0x00 12. "TWI,Trap WFI Instructions" "Not trapped,Trapped"
|
|
newline
|
|
bitfld.long 0x00 11. "ST,Enable secure EL1 access" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. "RW,Register width control for lower exception levels" "AArch32,AArch64"
|
|
newline
|
|
bitfld.long 0x00 9. "SIF,Secure Instruction Fetch" "Permitted,Not permitted"
|
|
bitfld.long 0x00 8. "HCE,Hypervisor Call enable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 7. "SMD,Secure Monitor Call disable" "No,Yes"
|
|
bitfld.long 0x00 3. "EA,External Abort exceptions handled in Abort mode or Monitor mode" "Abort,Monitor"
|
|
newline
|
|
bitfld.long 0x00 2. "FIQ,FIQ exceptions handled in Abort mode or Monitor mode" "FIQ,Monitor"
|
|
bitfld.long 0x00 1. "IRQ,IRQ exceptions handled in Abort mode or Monitor mode" "IRQ,Monitor"
|
|
newline
|
|
bitfld.long 0x00 0. "NS,Secure mode" "Secure,Non-secure"
|
|
group.quad spr:0x34110++0x00
|
|
line.quad 0x00 "HCR_EL2,Hypervisor Configuration Register"
|
|
bitfld.quad 0x00 33. "ID,Stage 2 Instruction cache disable" "No,Yes"
|
|
bitfld.quad 0x00 32. "CD,Stage 2 Data cache disable" "No,Yes"
|
|
newline
|
|
bitfld.quad 0x00 31. "RW,Register width control for lower exception levels" "AArch32,EL1 is 64-bit"
|
|
bitfld.quad 0x00 30. "TRVM,Trap Read of Virtual Memory controls" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 29. "HCD,Hypervisor Call Disable" "No,Yes"
|
|
bitfld.quad 0x00 28. "TDZ,Trap DC ZVA instruction" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 27. "TGE,Trap General Exceptions has an enhanced role when EL2 is using AArch64" "Disabled,Enabled"
|
|
bitfld.quad 0x00 26. "TVM,Trap Virtual Memory controls to EL2" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 25. "TTLB,Trap TLB maintenance instructions to EL2" "Disabled,Enabled"
|
|
bitfld.quad 0x00 24. "TPU,Trap Cache maintenance instructions to Point of Unificiation to EL2" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 23. "TPC,Trap Data/Unified Cache maintenance instructions to Point of Coherency tp EL2" "Disabled,Enabled"
|
|
bitfld.quad 0x00 22. "TSW,Trap Data/Unified Cache maintenance instructions by Set/Way to EL2" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 21. "TACR,Trap Auxiliary Control Register" "Disabled,Enabled"
|
|
bitfld.quad 0x00 20. "TIDCP,Trap Implementation Dependent functionality" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 19. "TSC,Trap SMC" "Disabled,Enabled"
|
|
bitfld.quad 0x00 18. "TID3,Trap ID Group 3" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 17. "TID2,Trap ID Group 2" "Disabled,Enabled"
|
|
bitfld.quad 0x00 16. "TID1,Trap ID Group 1" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 15. "TID0,Trap ID Group 0" "Disabled,Enabled"
|
|
bitfld.quad 0x00 14. "TWE,Trap WFE" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 13. "TWI,Trap WFI" "Disabled,Enabled"
|
|
bitfld.quad 0x00 12. "DC,Default Cacheable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 10.--11. "BSU,Barrier Shareability upgrade. determines the minimum shareability domain that is applied to any barrier executed from EL1 or EL0" "No effect,Inner Shareable,Outer Shareable,Full System"
|
|
bitfld.quad 0x00 9. "FB,Force broadcast" "Not forced,Forced"
|
|
newline
|
|
bitfld.quad 0x00 8. "VSE,Virtual System Error/Asynchronous Abort:" "No pending,Pending"
|
|
bitfld.quad 0x00 7. "VI,Virtual IRQ Interrupt" "Not pending,Pending"
|
|
newline
|
|
bitfld.quad 0x00 6. "VF,Virtual FIQ Interrupt" "Not pending,Pending"
|
|
bitfld.quad 0x00 5. "AMO,asynchronous abort and error interrupt routing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 4. "IMO,Physical IRQ Routing" "Disabled,Enabled"
|
|
bitfld.quad 0x00 3. "FMO,Physical FIQ Routing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 2. "PTW,Protected Table Walk" "Disabled,Enabled"
|
|
bitfld.quad 0x00 1. "SWIO,Set/Way Invalidation Override" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 0. "VM,Second stage of Translation enable" "Disabled,Enabled"
|
|
group.quad spr:0x30510++0x00
|
|
line.quad 0x00 "AFSR0_EL1,Auxiliary Fault Status Register 0 (EL1)"
|
|
group.quad spr:0x30511++0x00
|
|
line.quad 0x00 "AFSR1_EL1,Auxiliary Fault Status Register 1 (EL1)"
|
|
group.quad spr:0x34510++0x00
|
|
line.quad 0x00 "AFSR0_EL2,Auxiliary Fault Status Register 0 (EL2)"
|
|
group.quad spr:0x34511++0x00
|
|
line.quad 0x00 "AFSR1_EL2,Auxiliary Fault Status Register 1 (EL2)"
|
|
group.quad spr:0x36510++0x00
|
|
line.quad 0x00 "AFSR0_EL3,Auxiliary Fault Status Register 0 (EL3)"
|
|
group.quad spr:0x36511++0x00
|
|
line.quad 0x00 "AFSR1_EL3,Auxiliary Fault Status Register 1 (EL3)"
|
|
tree.open "Exception Syndrome Registers"
|
|
if (CORENAME()=="CORTEXA57")
|
|
if (((d.l(spr:0x30520))&0xFC000000)==(0x00000000||0x38000000||0x88000000||0x98000000))
|
|
group.quad SPR:0x30520++0x00
|
|
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
elif (((d.l(spr:0x30520))&0xFC000000)==0x04000000)
|
|
group.quad SPR:0x30520++0x00
|
|
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
|
|
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
newline
|
|
bitfld.long 0x00 0. "TI,Trapped instruction" "WFI,WFE"
|
|
elif (((d.l(spr:0x30520))&0xFC000000)==(0x0C000000||0x14000000))
|
|
group.quad SPR:0x30520++0x00
|
|
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
|
|
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
newline
|
|
bitfld.long 0x00 17.--19. "Opc2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 14.--16. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
|
|
elif (((d.l(spr:0x30520))&0xFC000000)==(0x10000000||0x30000000))
|
|
group.quad SPR:0x30520++0x00
|
|
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
|
|
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
newline
|
|
bitfld.long 0x00 16.--19. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--14. "Rt2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
|
|
elif (((d.l(spr:0x30520))&0xFC000000)==0x18000000)
|
|
group.quad SPR:0x30520++0x00
|
|
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
|
|
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
newline
|
|
hexmask.long.byte 0x00 12.--19. 1 "IMM8,The immediate value from the issued instruction"
|
|
bitfld.long 0x00 5.--9. "Rn,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added"
|
|
bitfld.long 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved"
|
|
newline
|
|
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
|
|
elif (((d.l(spr:0x30520))&0xFC000000)==0x1C000000)
|
|
group.quad SPR:0x30520++0x00
|
|
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
|
|
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
elif (((d.l(spr:0x30520))&0xFC000000)==(0x44000000||0x54000000))
|
|
group.quad SPR:0x30520++0x00
|
|
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the HVC or SVC instruction"
|
|
elif (((d.l(spr:0x30520))&0xFC000000)==0x60000000)
|
|
group.quad SPR:0x30520++0x00
|
|
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
|
|
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
newline
|
|
bitfld.long 0x00 20.--21. "Op0,Op0 value from the issued instruction" "0,1,2,3"
|
|
bitfld.long 0x00 17.--19. "Op2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 14.--16. "Op1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
|
|
elif (((d.l(spr:0x30520))&0xFC000000)==(0x80000000||0x84000000))
|
|
group.quad SPR:0x30520++0x00
|
|
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 9. "EA,External abort type" "DECERR,SLVERR"
|
|
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/TTBR[0/1],Reserved,Reserved,Reserved,Reserved,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort,Reserved,Reserved,Reserved,Reserved,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity,Reserved,Reserved,Reserved,Reserved,Sync. parity/1st level,Sync. parity/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Debug,?..."
|
|
elif (((d.l(spr:0x30520))&0xFD000000)==(0x91000000||0x95000000))
|
|
group.quad SPR:0x30520++0x00
|
|
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
|
|
bitfld.long 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword"
|
|
newline
|
|
bitfld.long 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required"
|
|
bitfld.long 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit"
|
|
bitfld.long 0x00 14. "AR,Acquire/Release" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
|
|
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
|
|
newline
|
|
bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
|
|
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
|
|
newline
|
|
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
|
|
bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
|
|
elif (((d.l(spr:0x30520))&0xFD000000)==(0x90000000||0x94000000))
|
|
group.quad SPR:0x30520++0x00
|
|
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
|
|
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
|
|
newline
|
|
bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
|
|
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
|
|
newline
|
|
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
|
|
bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
|
|
elif (((d.l(spr:0x30520))&0xFC800000)==(0xA0800000||0xB0800000))
|
|
group.quad SPR:0x30520++0x00
|
|
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
|
|
bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred"
|
|
newline
|
|
bitfld.long 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred"
|
|
newline
|
|
bitfld.long 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred"
|
|
elif (((d.l(spr:0x30520))&0xFC800000)==(0xA0000000||0xB0000000))
|
|
group.quad SPR:0x30520++0x00
|
|
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
|
|
bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
|
|
elif (((d.l(spr:0x30520))&0xFD000000)==0xBD000000)
|
|
group.quad SPR:0x30520++0x00
|
|
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
|
|
hexmask.long.tbyte 0x00 0.--23. 1 "IS,Additional information about the SError interrupt"
|
|
elif (((d.l(spr:0x30520))&0xFD000000)==0xBC000000)
|
|
group.quad SPR:0x30520++0x00
|
|
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
|
|
elif (((d.l(spr:0x30520))&0xFC000000)==(0xC0000000||0xC4000000))
|
|
group.quad SPR:0x30520++0x00
|
|
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..."
|
|
elif (((d.l(spr:0x30520))&0xFC000000)==(0xC8000000||0xCC000000))
|
|
group.quad SPR:0x30520++0x00
|
|
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "ISV,EX bit valid" "Not valid,Valid"
|
|
bitfld.long 0x00 6. "EX,Exclusive operation" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..."
|
|
elif (((d.l(spr:0x30520))&0xFC000000)==(0xD0000000||0xD4000000))
|
|
group.quad SPR:0x30520++0x00
|
|
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 8. "CM,Data came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
|
|
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..."
|
|
elif (((d.l(spr:0x30520))&0xFC000000)==(0xE0000000||0xF0000000))
|
|
group.quad SPR:0x30520++0x00
|
|
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1 "COMMENT,Set to the instruction comment field value"
|
|
else
|
|
group.quad SPR:0x30520++0x00
|
|
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
endif
|
|
if (((d.l(spr:0x34520))&0xFC000000)==(0x00000000||0x38000000||0x88000000||0x98000000||0x4C000000))
|
|
group.quad SPR:0x34520++0x00
|
|
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
elif (((d.l(spr:0x34520))&0xFC000000)==0x04000000)
|
|
group.quad SPR:0x34520++0x00
|
|
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
|
|
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
newline
|
|
bitfld.long 0x00 0. "TI,Trapped instruction" "WFI,WFE"
|
|
elif (((d.l(spr:0x34520))&0xFC000000)==(0x0C000000||0x14000000||0x20000000))
|
|
group.quad SPR:0x34520++0x00
|
|
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
|
|
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
newline
|
|
bitfld.long 0x00 17.--19. "Opc2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 14.--16. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
|
|
elif (((d.l(spr:0x34520))&0xFC000000)==(0x10000000||0x30000000))
|
|
group.quad SPR:0x34520++0x00
|
|
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
|
|
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
newline
|
|
bitfld.long 0x00 16.--19. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--14. "Rt2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
|
|
elif (((d.l(spr:0x34520))&0xFC000000)==0x18000000)
|
|
group.quad SPR:0x34520++0x00
|
|
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
|
|
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
newline
|
|
hexmask.long.byte 0x00 12.--19. 1 "IMM8,The immediate value from the issued instruction"
|
|
bitfld.long 0x00 5.--9. "Rn,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added"
|
|
bitfld.long 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved"
|
|
newline
|
|
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
|
|
elif (((d.l(spr:0x34520))&0xFC000000)==0x1C000000)
|
|
group.quad SPR:0x34520++0x00
|
|
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
|
|
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
elif (((d.l(spr:0x34520))&0xFC000000)==(0x44000000||0x48000000||0x54000000||0x58000000))
|
|
group.quad SPR:0x34520++0x00
|
|
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the HVC or SVC instruction"
|
|
elif (((d.l(spr:0x34520))&0xFC000000)==0x5C000000)
|
|
group.quad SPR:0x34520++0x00
|
|
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the issued SMC instruction"
|
|
elif (((d.l(spr:0x34520))&0xFC000000)==0x60000000)
|
|
group.quad SPR:0x34520++0x00
|
|
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
|
|
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
newline
|
|
bitfld.long 0x00 20.--21. "Op0,Op0 value from the issued instruction" "0,1,2,3"
|
|
bitfld.long 0x00 17.--19. "Op2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 14.--16. "Op1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
|
|
elif (((d.l(spr:0x34520))&0xFC000000)==(0x80000000||0x84000000))
|
|
group.quad SPR:0x34520++0x00
|
|
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 9. "EA,External abort type" "DECERR,SLVERR"
|
|
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..."
|
|
elif (((d.l(spr:0x34520))&0xFD000000)==(0x91000000||0x95000000))
|
|
group.quad SPR:0x34520++0x00
|
|
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
|
|
bitfld.long 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword"
|
|
newline
|
|
bitfld.long 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required"
|
|
bitfld.long 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit"
|
|
bitfld.long 0x00 14. "AR,Acquire/Release" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
|
|
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
|
|
newline
|
|
bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
|
|
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
|
|
newline
|
|
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
|
|
bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
|
|
elif (((d.l(spr:0x34520))&0xFD000000)==(0x90000000||0x94000000))
|
|
group.quad SPR:0x34520++0x00
|
|
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
|
|
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
|
|
newline
|
|
bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
|
|
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
|
|
newline
|
|
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
|
|
bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
|
|
elif (((d.l(spr:0x34520))&0xFC800000)==(0xA0800000||0xB0800000))
|
|
group.quad SPR:0x34520++0x00
|
|
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
|
|
bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred"
|
|
newline
|
|
bitfld.long 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred"
|
|
newline
|
|
bitfld.long 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred"
|
|
elif (((d.l(spr:0x34520))&0xFC800000)==(0xA0000000||0xB0000000))
|
|
group.quad SPR:0x34520++0x00
|
|
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
|
|
bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
|
|
elif (((d.l(spr:0x34520))&0xFD000000)==0xBD000000)
|
|
group.quad SPR:0x34520++0x00
|
|
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
|
|
hexmask.long.tbyte 0x00 0.--23. 1 "IS,Additional information about the SError interrupt"
|
|
elif (((d.l(spr:0x34520))&0xFD000000)==0xBC000000)
|
|
group.quad SPR:0x34520++0x00
|
|
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
|
|
elif (((d.l(spr:0x34520))&0xFC000000)==(0xC0000000||0xC4000000||0xE8000000))
|
|
group.quad SPR:0x34520++0x00
|
|
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..."
|
|
elif (((d.l(spr:0x34520))&0xFC000000)==(0xC8000000||0xCC000000))
|
|
group.quad SPR:0x34520++0x00
|
|
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "ISV,EX bit valid" "Not valid,Valid"
|
|
bitfld.long 0x00 6. "EX,Exclusive operation" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..."
|
|
elif (((d.l(spr:0x34520))&0xFC000000)==(0xD0000000||0xD4000000))
|
|
group.quad SPR:0x34520++0x00
|
|
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 8. "CM,Data came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
|
|
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..."
|
|
elif (((d.l(spr:0x34520))&0xFC000000)==(0xE0000000||0xF0000000))
|
|
group.quad SPR:0x34520++0x00
|
|
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
hexmask.long.word 0x00 0.--15. 1 "COMMENT,Set to the instruction comment field value"
|
|
else
|
|
group.quad SPR:0x34520++0x00
|
|
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
endif
|
|
if (((d.l(spr:0x36520))&0xFC000000)==(0x00000000||0x38000000||0x88000000||0x98000000||0x4C000000))
|
|
group.quad SPR:0x36520++0x00
|
|
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
elif (((d.l(spr:0x36520))&0xFC000000)==0x04000000)
|
|
group.quad SPR:0x36520++0x00
|
|
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
|
|
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
newline
|
|
bitfld.long 0x00 0. "TI,Trapped instruction" "WFI,WFE"
|
|
elif (((d.l(spr:0x36520))&0xFC000000)==(0x0C000000||0x14000000))
|
|
group.quad SPR:0x36520++0x00
|
|
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
|
|
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
newline
|
|
bitfld.long 0x00 17.--19. "Opc2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 14.--16. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
|
|
elif (((d.l(spr:0x36520))&0xFC000000)==(0x10000000||0x30000000))
|
|
group.quad SPR:0x36520++0x00
|
|
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
|
|
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
newline
|
|
bitfld.long 0x00 16.--19. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--14. "Rt2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
|
|
elif (((d.l(spr:0x36520))&0xFC000000)==0x18000000)
|
|
group.quad SPR:0x36520++0x00
|
|
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
|
|
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
newline
|
|
hexmask.long.byte 0x00 12.--19. 1 "IMM8,The immediate value from the issued instruction"
|
|
bitfld.long 0x00 5.--9. "Rn,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added"
|
|
bitfld.long 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved"
|
|
newline
|
|
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
|
|
elif (((d.l(spr:0x36520))&0xFC000000)==0x1C000000)
|
|
group.quad SPR:0x36520++0x00
|
|
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
|
|
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
elif (((d.l(spr:0x36520))&0xFC000000)==(0x54000000||0x58000000))
|
|
group.quad SPR:0x36520++0x00
|
|
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the HVC or SVC instruction"
|
|
elif (((d.l(spr:0x36520))&0xFC000000)==0x5C000000)
|
|
group.quad SPR:0x36520++0x00
|
|
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the issued SMC instruction"
|
|
elif (((d.l(spr:0x36520))&0xFC000000)==0x60000000)
|
|
group.quad SPR:0x36520++0x00
|
|
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
|
|
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
newline
|
|
bitfld.long 0x00 20.--21. "Op0,Op0 value from the issued instruction" "0,1,2,3"
|
|
bitfld.long 0x00 17.--19. "Op2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 14.--16. "Op1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
|
|
elif (((d.l(spr:0x36520))&0xFC000000)==0x7C000000)
|
|
group.quad SPR:0x36520++0x00
|
|
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
hexmask.long 0x00 0.--24. 1 "IMPL_DEF,Implementation defined"
|
|
elif (((d.l(spr:0x36520))&0xFC000000)==(0x80000000||0x84000000))
|
|
group.quad SPR:0x36520++0x00
|
|
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 9. "EA,External abort type" "DECERR,SLVERR"
|
|
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/TTBR[0/1],Reserved,Reserved,Reserved,Reserved,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort,Reserved,Reserved,Reserved,Reserved,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity,Reserved,Reserved,Reserved,Reserved,Sync. parity/1st level,Sync. parity/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Debug,?..."
|
|
elif (((d.l(spr:0x36520))&0xFD000000)==(0x91000000||0x95000000))
|
|
group.quad SPR:0x36520++0x00
|
|
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
|
|
bitfld.long 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword"
|
|
newline
|
|
bitfld.long 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required"
|
|
bitfld.long 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit"
|
|
bitfld.long 0x00 14. "AR,Acquire/Release" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
|
|
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
|
|
newline
|
|
bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
|
|
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
|
|
newline
|
|
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
|
|
bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
|
|
elif (((d.l(spr:0x36520))&0xFD000000)==(0x90000000||0x94000000))
|
|
group.quad SPR:0x36520++0x00
|
|
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
|
|
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
|
|
newline
|
|
bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
|
|
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
|
|
newline
|
|
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
|
|
bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
|
|
elif (((d.l(spr:0x36520))&0xFC800000)==0xB0800000)
|
|
group.quad SPR:0x36520++0x00
|
|
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
|
|
bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred"
|
|
newline
|
|
bitfld.long 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred"
|
|
newline
|
|
bitfld.long 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred"
|
|
elif (((d.l(spr:0x36520))&0xFC800000)==0xB0000000)
|
|
group.quad SPR:0x36520++0x00
|
|
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
|
|
bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
|
|
elif (((d.l(spr:0x36520))&0xFD000000)==0xBD000000)
|
|
group.quad SPR:0x36520++0x00
|
|
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
|
|
hexmask.long.tbyte 0x00 0.--23. 1 "IS,Additional information about the SError interrupt"
|
|
elif (((d.l(spr:0x36520))&0xFD000000)==0xBC000000)
|
|
group.quad SPR:0x36520++0x00
|
|
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
|
|
elif (((d.l(spr:0x36520))&0xFC000000)==0xF0000000)
|
|
group.quad SPR:0x36520++0x00
|
|
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1 "COMMENT,Set to the instruction comment field value"
|
|
else
|
|
group.quad SPR:0x36520++0x00
|
|
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
endif
|
|
elif (CORENAME()=="CORTEXA53")
|
|
if (((d.l(spr:0x30520))&0xFC000000)==(0x00000000||0x38000000||0x88000000||0x98000000))
|
|
group.quad SPR:0x30520++0x00
|
|
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
elif (((d.l(spr:0x30520))&0xFC000000)==0x04000000)
|
|
group.quad SPR:0x30520++0x00
|
|
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
|
|
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
newline
|
|
bitfld.long 0x00 0. "TI,Trapped instruction" "WFI,WFE"
|
|
elif (((d.l(spr:0x30520))&0xFC000000)==(0x0C000000||0x14000000))
|
|
group.quad SPR:0x30520++0x00
|
|
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
|
|
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
newline
|
|
bitfld.long 0x00 17.--19. "Opc2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 14.--16. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
|
|
elif (((d.l(spr:0x30520))&0xFC000000)==(0x10000000||0x30000000))
|
|
group.quad SPR:0x30520++0x00
|
|
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
|
|
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
newline
|
|
bitfld.long 0x00 16.--19. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--14. "Rt2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
|
|
elif (((d.l(spr:0x30520))&0xFC000000)==0x18000000)
|
|
group.quad SPR:0x30520++0x00
|
|
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
|
|
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
newline
|
|
hexmask.long.byte 0x00 12.--19. 1 "IMM8,The immediate value from the issued instruction"
|
|
bitfld.long 0x00 5.--9. "Rn,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added"
|
|
bitfld.long 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved"
|
|
newline
|
|
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
|
|
elif (((d.l(spr:0x30520))&0xFC000000)==0x1C000000)
|
|
group.quad SPR:0x30520++0x00
|
|
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
|
|
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
elif (((d.l(spr:0x30520))&0xFC000000)==(0x44000000||0x54000000))
|
|
group.quad SPR:0x30520++0x00
|
|
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the HVC or SVC instruction"
|
|
elif (((d.l(spr:0x30520))&0xFC000000)==0x60000000)
|
|
group.quad SPR:0x30520++0x00
|
|
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
|
|
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
newline
|
|
bitfld.long 0x00 20.--21. "Op0,Op0 value from the issued instruction" "0,1,2,3"
|
|
bitfld.long 0x00 17.--19. "Op2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 14.--16. "Op1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
|
|
elif (((d.l(spr:0x30520))&0xFC000000)==(0x80000000||0x84000000))
|
|
group.quad SPR:0x30520++0x00
|
|
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
|
|
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
|
|
newline
|
|
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
|
|
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/0th level/base register,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1st level,Sync. external abort/2nd level,Sync. external abort/3rd level,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..."
|
|
elif (((d.l(spr:0x30520))&0xFD000000)==(0x91000000||0x95000000))
|
|
group.quad SPR:0x30520++0x00
|
|
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
|
|
bitfld.long 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword"
|
|
newline
|
|
bitfld.long 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required"
|
|
bitfld.long 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit"
|
|
bitfld.long 0x00 14. "AR,Acquire/Release" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
|
|
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
|
|
newline
|
|
bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
|
|
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
|
|
newline
|
|
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
|
|
bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
|
|
elif (((d.l(spr:0x30520))&0xFD000000)==(0x90000000||0x94000000))
|
|
group.quad SPR:0x30520++0x00
|
|
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
|
|
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
|
|
newline
|
|
bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
|
|
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
|
|
newline
|
|
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
|
|
bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
|
|
elif (((d.l(spr:0x30520))&0xFC800000)==(0xA0800000||0xB0800000))
|
|
group.quad SPR:0x30520++0x00
|
|
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
|
|
bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred"
|
|
newline
|
|
bitfld.long 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred"
|
|
newline
|
|
bitfld.long 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred"
|
|
elif (((d.l(spr:0x30520))&0xFC800000)==(0xA0000000||0xB0000000))
|
|
group.quad SPR:0x30520++0x00
|
|
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
|
|
bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
|
|
elif (((d.l(spr:0x30520))&0xFD000000)==0xBD000000)
|
|
group.quad SPR:0x30520++0x00
|
|
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
|
|
bitfld.long 0x00 22.--23. "SES,System Error Source" "Processor,System,External,"
|
|
newline
|
|
hexmask.long.tbyte 0x00 0.--21. 1 "IS,Additional information about the SError interrupt"
|
|
elif (((d.l(spr:0x30520))&0xFD000000)==0xBC000000)
|
|
group.quad SPR:0x30520++0x00
|
|
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
|
|
elif (((d.l(spr:0x30520))&0xFC000000)==(0xC0000000||0xC4000000))
|
|
group.quad SPR:0x30520++0x00
|
|
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..."
|
|
elif (((d.l(spr:0x30520))&0xFC000000)==(0xC8000000||0xCC000000))
|
|
group.quad SPR:0x30520++0x00
|
|
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "ISV,EX bit valid" "Not valid,Valid"
|
|
bitfld.long 0x00 6. "EX,Exclusive operation" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..."
|
|
elif (((d.l(spr:0x30520))&0xFC000000)==(0xD0000000||0xD4000000))
|
|
group.quad SPR:0x30520++0x00
|
|
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 8. "CM,Data came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
|
|
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..."
|
|
elif (((d.l(spr:0x30520))&0xFC000000)==(0xE0000000||0xF0000000))
|
|
group.quad SPR:0x30520++0x00
|
|
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1 "COMMENT,Set to the instruction comment field value"
|
|
else
|
|
group.quad SPR:0x30520++0x00
|
|
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
endif
|
|
if (((d.l(spr:0x34520))&0xFC000000)==(0x00000000||0x38000000||0x88000000||0x98000000||0x4C000000))
|
|
group.quad SPR:0x34520++0x00
|
|
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
elif (((d.l(spr:0x34520))&0xFC000000)==0x04000000)
|
|
group.quad SPR:0x34520++0x00
|
|
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
|
|
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
newline
|
|
bitfld.long 0x00 0. "TI,Trapped instruction" "WFI,WFE"
|
|
elif (((d.l(spr:0x34520))&0xFC000000)==(0x0C000000||0x14000000||0x20000000))
|
|
group.quad SPR:0x34520++0x00
|
|
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
|
|
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
newline
|
|
bitfld.long 0x00 17.--19. "Opc2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 14.--16. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
|
|
elif (((d.l(spr:0x34520))&0xFC000000)==(0x10000000||0x30000000))
|
|
group.quad SPR:0x34520++0x00
|
|
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
|
|
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
newline
|
|
bitfld.long 0x00 16.--19. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--14. "Rt2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
|
|
elif (((d.l(spr:0x34520))&0xFC000000)==0x18000000)
|
|
group.quad SPR:0x34520++0x00
|
|
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
|
|
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
hexmask.long.byte 0x00 12.--19. 1 "IMM8,The immediate value from the issued instruction"
|
|
bitfld.long 0x00 5.--9. "Rn,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added"
|
|
bitfld.long 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved"
|
|
newline
|
|
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
|
|
elif (((d.l(spr:0x34520))&0xFC000000)==0x1C000000)
|
|
group.quad SPR:0x34520++0x00
|
|
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
|
|
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
elif (((d.l(spr:0x34520))&0xFC000000)==(0x44000000||0x48000000||0x54000000||0x58000000))
|
|
group.quad SPR:0x34520++0x00
|
|
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the HVC or SVC instruction"
|
|
elif (((d.l(spr:0x34520))&0xFC000000)==0x5C000000)
|
|
group.quad SPR:0x34520++0x00
|
|
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the issued SMC instruction"
|
|
elif (((d.l(spr:0x34520))&0xFC000000)==0x60000000)
|
|
group.quad SPR:0x34520++0x00
|
|
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
|
|
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
newline
|
|
bitfld.long 0x00 20.--21. "Op0,Op0 value from the issued instruction" "0,1,2,3"
|
|
bitfld.long 0x00 17.--19. "Op2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 14.--16. "Op1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
|
|
elif (((d.l(spr:0x34520))&0xFC000000)==(0x80000000||0x84000000))
|
|
group.quad SPR:0x34520++0x00
|
|
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
|
|
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
|
|
newline
|
|
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
|
|
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/0th level/base register,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1st level,Sync. external abort/2nd level,Sync. external abort/3rd level,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..."
|
|
elif (((d.l(spr:0x34520))&0xFD000000)==(0x91000000||0x95000000))
|
|
group.quad SPR:0x34520++0x00
|
|
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
|
|
bitfld.long 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword"
|
|
newline
|
|
bitfld.long 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required"
|
|
bitfld.long 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit"
|
|
bitfld.long 0x00 14. "AR,Acquire/Release" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
|
|
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
|
|
newline
|
|
bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
|
|
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
|
|
newline
|
|
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
|
|
bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
|
|
elif (((d.l(spr:0x34520))&0xFD000000)==(0x90000000||0x94000000))
|
|
group.quad SPR:0x34520++0x00
|
|
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
|
|
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
|
|
newline
|
|
bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
|
|
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
|
|
newline
|
|
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
|
|
bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
|
|
elif (((d.l(spr:0x34520))&0xFC800000)==(0xA0800000||0xB0800000))
|
|
group.quad SPR:0x34520++0x00
|
|
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
|
|
bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred"
|
|
newline
|
|
bitfld.long 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred"
|
|
newline
|
|
bitfld.long 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred"
|
|
elif (((d.l(spr:0x34520))&0xFC800000)==(0xA0000000||0xB0000000))
|
|
group.quad SPR:0x34520++0x00
|
|
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
|
|
bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
|
|
elif (((d.l(spr:0x34520))&0xFD000000)==0xBD000000)
|
|
group.quad SPR:0x34520++0x00
|
|
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
|
|
hexmask.long.tbyte 0x00 0.--23. 1 "IS,Additional information about the SError interrupt"
|
|
elif (((d.l(spr:0x34520))&0xFD000000)==0xBC000000)
|
|
group.quad SPR:0x34520++0x00
|
|
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
|
|
elif (((d.l(spr:0x34520))&0xFC000000)==(0xC0000000||0xC4000000||0xE8000000))
|
|
group.quad SPR:0x34520++0x00
|
|
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..."
|
|
elif (((d.l(spr:0x34520))&0xFC000000)==(0xC8000000||0xCC000000))
|
|
group.quad SPR:0x34520++0x00
|
|
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "ISV,EX bit valid" "Not valid,Valid"
|
|
bitfld.long 0x00 6. "EX,Exclusive operation" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..."
|
|
elif (((d.l(spr:0x34520))&0xFC000000)==(0xD0000000||0xD4000000))
|
|
group.quad SPR:0x34520++0x00
|
|
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 8. "CM,Data came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
|
|
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..."
|
|
elif (((d.l(spr:0x34520))&0xFC000000)==(0xE0000000||0xF0000000))
|
|
group.quad SPR:0x34520++0x00
|
|
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1 "COMMENT,Set to the instruction comment field value"
|
|
else
|
|
group.quad SPR:0x34520++0x00
|
|
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
endif
|
|
if (((d.l(spr:0x36520))&0xFC000000)==(0x00000000||0x38000000||0x88000000||0x98000000||0x4C000000))
|
|
group.quad SPR:0x36520++0x00
|
|
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
elif (((d.l(spr:0x36520))&0xFC000000)==0x04000000)
|
|
group.quad SPR:0x36520++0x00
|
|
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
|
|
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
newline
|
|
bitfld.long 0x00 0. "TI,Trapped instruction" "WFI,WFE"
|
|
elif (((d.l(spr:0x36520))&0xFC000000)==(0x0C000000||0x14000000))
|
|
group.quad SPR:0x36520++0x00
|
|
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
|
|
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
newline
|
|
bitfld.long 0x00 17.--19. "Opc2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 14.--16. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
|
|
elif (((d.l(spr:0x36520))&0xFC000000)==(0x10000000||0x30000000))
|
|
group.quad SPR:0x36520++0x00
|
|
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
|
|
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
newline
|
|
bitfld.long 0x00 16.--19. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--14. "Rt2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
|
|
elif (((d.l(spr:0x36520))&0xFC000000)==0x18000000)
|
|
group.quad SPR:0x36520++0x00
|
|
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
|
|
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
hexmask.long.byte 0x00 12.--19. 1 "IMM8,The immediate value from the issued instruction"
|
|
bitfld.long 0x00 5.--9. "Rn,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added"
|
|
bitfld.long 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved"
|
|
newline
|
|
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
|
|
elif (((d.l(spr:0x36520))&0xFC000000)==0x1C000000)
|
|
group.quad SPR:0x36520++0x00
|
|
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
|
|
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
elif (((d.l(spr:0x36520))&0xFC000000)==(0x54000000||0x58000000))
|
|
group.quad SPR:0x36520++0x00
|
|
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the HVC or SVC instruction"
|
|
elif (((d.l(spr:0x36520))&0xFC000000)==0x5C000000)
|
|
group.quad SPR:0x36520++0x00
|
|
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the issued SMC instruction"
|
|
elif (((d.l(spr:0x36520))&0xFC000000)==0x60000000)
|
|
group.quad SPR:0x36520++0x00
|
|
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
|
|
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
newline
|
|
bitfld.long 0x00 20.--21. "Op0,Op0 value from the issued instruction" "0,1,2,3"
|
|
bitfld.long 0x00 17.--19. "Op2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 14.--16. "Op1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
|
|
elif (((d.l(spr:0x36520))&0xFC000000)==0x7C000000)
|
|
group.quad SPR:0x36520++0x00
|
|
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
hexmask.long 0x00 0.--24. 1 "IMPL_DEF,Implementation defined"
|
|
elif (((d.l(spr:0x36520))&0xFC000000)==(0x80000000||0x84000000))
|
|
group.quad SPR:0x36520++0x00
|
|
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
|
|
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
|
|
newline
|
|
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
|
|
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/0th level/base register,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1st level,Sync. external abort/2nd level,Sync. external abort/3rd level,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..."
|
|
elif (((d.l(spr:0x36520))&0xFD000000)==(0x91000000||0x95000000))
|
|
group.quad SPR:0x36520++0x00
|
|
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
|
|
bitfld.long 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword"
|
|
newline
|
|
bitfld.long 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required"
|
|
bitfld.long 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
bitfld.long 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit"
|
|
bitfld.long 0x00 14. "AR,Acquire/Release" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
|
|
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
|
|
newline
|
|
bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
|
|
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
|
|
newline
|
|
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
|
|
bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
|
|
elif (((d.l(spr:0x36520))&0xFD000000)==(0x90000000||0x94000000))
|
|
group.quad SPR:0x36520++0x00
|
|
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
|
|
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
|
|
newline
|
|
bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
|
|
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
|
|
newline
|
|
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
|
|
bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
|
|
elif (((d.l(spr:0x36520))&0xFC800000)==0xB0800000)
|
|
group.quad SPR:0x36520++0x00
|
|
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
|
|
bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred"
|
|
newline
|
|
bitfld.long 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred"
|
|
newline
|
|
bitfld.long 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred"
|
|
elif (((d.l(spr:0x36520))&0xFC800000)==0xB0000000)
|
|
group.quad SPR:0x36520++0x00
|
|
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
|
|
bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
|
|
elif (((d.l(spr:0x36520))&0xFD000000)==0xBD000000)
|
|
group.quad SPR:0x36520++0x00
|
|
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
|
|
hexmask.long.tbyte 0x00 0.--23. 1 "IS,Additional information about the SError interrupt"
|
|
elif (((d.l(spr:0x36520))&0xFD000000)==0xBC000000)
|
|
group.quad SPR:0x36520++0x00
|
|
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
|
|
elif (((d.l(spr:0x36520))&0xFC000000)==0xF0000000)
|
|
group.quad SPR:0x36520++0x00
|
|
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1 "COMMENT,Set to the instruction comment field value"
|
|
else
|
|
group.quad SPR:0x36520++0x00
|
|
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
|
|
endif
|
|
endif
|
|
tree.end
|
|
newline
|
|
if (CORENAME()=="CORTEXA57")
|
|
if (((per.q(spr:0x34501))&0x200)==0x200)
|
|
group.quad spr:0x34501++0x00
|
|
line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register"
|
|
bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR"
|
|
bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long"
|
|
newline
|
|
bitfld.quad 0x00 0.--5. "STATUS,Fault Status" "Address size/0th level/TTBR0/TTBR1,Reserved,Reserved,Reserved,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Access flag/0th level,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Permission/0th level,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Reserved,Reserved,Reserved,Sync. external/on TTW/0th level,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/0th level,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,?..."
|
|
else
|
|
group.quad spr:0x34501++0x00
|
|
line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register"
|
|
bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR"
|
|
bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long"
|
|
newline
|
|
bitfld.quad 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Alignment,Debug event,Access flag/1st level,Reserved,Translation/1st level,Access flag/2nd level,Translation/2nd level,Sync. external/non-translation,Domain/1st level,Reserved,Domain/2nd level,Sync. external/on TTW/1st level,Permission/1st level,Sync. external/on TTW/2nd level,Permission/2nd level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access,Reserved,Reserved,Sync. parity/on TTW/1st level,Reserved,Sync. parity/on TTW/2nd level,?..."
|
|
endif
|
|
elif (CORENAME()=="CORTEXA53")
|
|
if (((per.q(spr:0x34501))&0x200)==0x200)
|
|
group.quad spr:0x34501++0x00
|
|
line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register"
|
|
bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR"
|
|
bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long"
|
|
newline
|
|
bitfld.quad 0x00 0.--5. "STATUS,Fault Status" "Address size/TTBR0/TTBR1,Reserved,Reserved,Reserved,Reserved,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Reserved,Reserved,Reserved,Reserved,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..."
|
|
else
|
|
group.quad spr:0x34501++0x00
|
|
line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register"
|
|
bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR"
|
|
bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long"
|
|
newline
|
|
bitfld.quad 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Reserved,Debug event,Access flag/section,Reserved,Translation/section,Access flag/page,Translation/page,Sync. external/non-translation,Domain/section,Reserved,Domain/page,Sync. external/on TTW/1st level,Permission/section,Sync. external/on TTW/2nd level,Permission/page,TLB conflict,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access,Reserved,Reserved,Sync. parity/on TTW/1st level,Reserved,Sync. parity/on TTW/2nd level,?..."
|
|
endif
|
|
endif
|
|
group.quad spr:0x30600++0x00
|
|
line.quad 0x00 "FAR_EL1,Fault Address Register"
|
|
group.quad spr:0x34600++0x00
|
|
line.quad 0x00 "FAR_EL2,Fault Address Register"
|
|
group.quad spr:0x36600++0x00
|
|
line.quad 0x00 "FAR_EL3,Fault Address Register"
|
|
group.quad spr:0x34604++0x00
|
|
line.quad 0x00 "HPFAR_EL2,Hypervisor IPA Fault Address Register"
|
|
group.quad spr:0x30C00++0x00
|
|
line.quad 0x00 "VBAR_EL1,Vector Base Address Register"
|
|
hexmask.quad 0x00 11.--63. 0x800 "VBA,Vector base address"
|
|
group.quad spr:0x34C00++0x00
|
|
line.quad 0x00 "VBAR_EL2,Vector Base Address Register"
|
|
hexmask.quad 0x00 11.--63. 0x800 "VBA,Vector base address"
|
|
group.quad spr:0x36C00++0x00
|
|
line.quad 0x00 "VBAR_EL3,Vector Base Address Register"
|
|
hexmask.quad 0x00 11.--63. 0x800 "VBA,Vector base address"
|
|
rgroup.quad spr:0x36C01++0x00
|
|
line.quad 0x00 "RVBAR_EL3,Reset Vector Base Address Register"
|
|
hexmask.quad 0x00 2.--43. 0x4 "RVBA,Reset Vector Base Address"
|
|
rgroup.quad SPR:0x30C10++0x00
|
|
line.long 0x00 "ISR_EL1,Interrupt Status Register"
|
|
bitfld.long 0x00 8. "A,External abort pending flag" "Not pending,Pending"
|
|
bitfld.long 0x00 7. "I,Interrupt pending flag" "Not pending,Pending"
|
|
newline
|
|
bitfld.long 0x00 6. "F,Fast interrupt pending flag" "Not pending,Pending"
|
|
group.quad SPR:0x36C02++0x00
|
|
line.long 0x00 "RMR_EL3,Reset Management Register"
|
|
bitfld.long 0x00 1. "RR,Reset Request" "Not requested,Requested"
|
|
bitfld.long 0x00 0. "AA64,Determines which execution state the processor boots into after a warmreset" "AArch32,AArch64"
|
|
if (CORENAME()=="CORTEXA57")
|
|
rgroup.quad spr:0x31F30++0x00
|
|
line.quad 0x00 "CBAR_EL1,Configuration Base Address Register"
|
|
hexmask.quad.long 0x00 18.--43. 1. "PERIPHBASE[43:18],Periphbase[43:18]"
|
|
elif (CORENAME()=="CORTEXA53")
|
|
rgroup.quad spr:0x31F30++0x00
|
|
line.quad 0x00 "CBAR_EL1,Configuration Base Address Register"
|
|
hexmask.quad.tbyte 0x00 18.--39. 1. "PERIPHBASE[39:18],Periphbase[39:18]"
|
|
endif
|
|
group.quad spr:0x30D01++0x00
|
|
line.quad 0x00 "CONTEXTIDR_EL1,Context ID Register"
|
|
group.quad spr:0x33D02++0x00
|
|
line.quad 0x00 "TPIDR_EL0,Software Thread ID Register"
|
|
group.quad spr:0x33D03++0x00
|
|
line.quad 0x00 "TPIDRRO_EL0,Software Thread ID Register"
|
|
group.quad spr:0x30D04++0x00
|
|
line.quad 0x00 "TPIDR_EL1,Software Thread ID Register"
|
|
group.quad spr:0x34D02++0x00
|
|
line.quad 0x00 "TPIDR_EL2,Software Thread ID Register"
|
|
group.quad spr:0x36D02++0x00
|
|
line.quad 0x00 "TPIDR_EL3,Software Thread ID Register"
|
|
tree.end
|
|
tree "Memory Management Unit"
|
|
group.quad spr:0x30100++0x0
|
|
line.quad 0x00 "SCTLR_EL1,System Control Register (EL1)"
|
|
bitfld.quad 0x00 26. "UCI,EL0 access enable (DC CVAU|DC CIVAC|DC CVAC|IC IVAU)" "Disabled,Enabled"
|
|
bitfld.quad 0x00 25. "EE,Exception endianness" "Little,Big"
|
|
newline
|
|
bitfld.quad 0x00 24. "E0E,Endianness of explicit data access at EL0" "Little,Big"
|
|
bitfld.quad 0x00 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced"
|
|
newline
|
|
bitfld.quad 0x00 18. "NTWE,Not trap WFE" "No,Yes"
|
|
bitfld.quad 0x00 16. "NTWI,Not trap WFI" "No,Yes"
|
|
newline
|
|
bitfld.quad 0x00 15. "UCT,EL0 access enable (CTR_EL0)" "Disabled,Enabled"
|
|
bitfld.quad 0x00 14. "DZE,EL0 access enable (DC ZVA)" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 12. "I,Instruction Cache Enable" "Disabled,Enabled"
|
|
bitfld.quad 0x00 9. "UMA,User Mask Access" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 8. "SED,SETEND Disable" "No,Yes"
|
|
bitfld.quad 0x00 7. "ITD,IT instruction disable" "No,Yes"
|
|
newline
|
|
bitfld.quad 0x00 5. "CP15BEN,c15 barrier enable" "Disabled,Enabled"
|
|
bitfld.quad 0x00 4. "SA0,EL0 stack alignment check enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 3. "SA,SP stack alignment check enable" "Disabled,Enabled"
|
|
bitfld.quad 0x00 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 1. "A,Strict Alignment" "Disabled,Enabled"
|
|
bitfld.quad 0x00 0. "M,MMU or Protection Unit" "Disabled,Enabled"
|
|
group.quad spr:0x34100++0x0
|
|
line.quad 0x00 "SCTLR_EL2,System Control Register (EL2)"
|
|
bitfld.quad 0x00 25. "EE,Exception endianness" "Little,Big"
|
|
bitfld.quad 0x00 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced"
|
|
newline
|
|
bitfld.quad 0x00 12. "I,Instruction Cache Enable" "Disabled,Enabled"
|
|
bitfld.quad 0x00 3. "SA,SP stack alignment check enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
|
|
bitfld.quad 0x00 1. "A,Strict Alignment" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 0. "M,MMU or Protection Unit" "Disabled,Enabled"
|
|
group.quad spr:0x36100++0x0
|
|
line.quad 0x00 "SCTLR_EL3,System Control Register (EL3)"
|
|
bitfld.quad 0x00 25. "EE,Exception endianness" "Little,Big"
|
|
bitfld.quad 0x00 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced"
|
|
newline
|
|
bitfld.quad 0x00 12. "I,Instruction Cache Enable" "Disabled,Enabled"
|
|
bitfld.quad 0x00 3. "SA,SP stack alignment check enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
|
|
bitfld.quad 0x00 1. "A,Strict Alignment" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 0. "M,MMU or Protection Unit" "Disabled,Enabled"
|
|
group.quad spr:0x30200++0x00
|
|
line.quad 0x00 "TTBR0_EL1,Translation Table Base Register 0 (EL1)"
|
|
hexmask.quad.word 0x00 48.--63. 1. "ASID,ASID for the translation table base address"
|
|
hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address"
|
|
group.quad spr:0x30201++0x00
|
|
line.quad 0x00 "TTBR1_EL1,Translation Table Base Register 1 (EL1)"
|
|
hexmask.quad.word 0x00 48.--63. 1. "ASID,ASID for the translation table base address"
|
|
hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address"
|
|
if (CORENAME()=="CORTEXA57")
|
|
group.quad spr:0x30202++0x00
|
|
line.quad 0x00 "TCR_EL1,Translation Control Register (EL1)"
|
|
bitfld.quad 0x00 38. "TBI1,Top Byte Ignored 1" "Not ignored,Ignored"
|
|
bitfld.quad 0x00 37. "TBI0,Top Byte Ignored 0" "Not ignored,Ignored"
|
|
newline
|
|
bitfld.quad 0x00 36. "AS,ASID size" "8-bit,16-bit"
|
|
bitfld.quad 0x00 32.--34. "IPS,Intermediate Physical Address Size" "32 bits/4 GB,36 bits/64 GB,40 bits/1 TB,42 bits/4 TB,44 bits/16 TB,48 bits/256 TB,?..."
|
|
newline
|
|
bitfld.quad 0x00 30. "TG1,TTBR1_EL1 granule size" "4 KByte,64 KByte"
|
|
bitfld.quad 0x00 28.--29. "SH1,Shareability attribute for memory associated with translation table walks using TTBR1_EL1" "Non-shareable,Reserved,Outer shareable,Inner shareable"
|
|
newline
|
|
bitfld.quad 0x00 26.--27. "ORGN1,Outer cacheability attribute for memory associated with translation table walks using TTBR1_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
bitfld.quad 0x00 24.--25. "IRGN1,Inner cacheability attribute for memory associated with translation table walks using TTBR1_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
newline
|
|
bitfld.quad 0x00 23. "EPD1,Translation table walk disable for translations using TTBR1_EL1" "Enabled,Disabled"
|
|
bitfld.quad 0x00 22. "A1,Selects whether TTBR0_EL1 or TTBR1_EL1 defines the ASID" "TTBR0_EL1,TTBR1_EL1"
|
|
newline
|
|
bitfld.quad 0x00 16.--21. "T1SZ,Size offset of the memory region addressed by TTBR1_EL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.quad 0x00 14. "TG0,TTBR0_EL1 granule size" "4 KB,64 KB"
|
|
newline
|
|
bitfld.quad 0x00 12.--13. "SH0,Shareability attribute for memory associated with translation table walks using TTBR0_EL1" "Non-shareable,Reserved,Outer shareable,Inner shareable"
|
|
bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attribute for memory associated with translation table walks using TTBR0_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
newline
|
|
bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attribute for memory associated with translation table walks using TTBR0_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memory region addressed by TTBR0_EL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
elif (CORENAME()=="CORTEXA53")
|
|
group.quad spr:0x30202++0x00
|
|
line.quad 0x00 "TCR_EL1,Translation Control Register (EL1)"
|
|
bitfld.quad 0x00 38. "TBI1,Top Byte Ignored 1" "Not ignored,Ignored"
|
|
bitfld.quad 0x00 37. "TBI0,Top Byte Ignored 0" "Not ignored,Ignored"
|
|
newline
|
|
bitfld.quad 0x00 36. "AS,ASID size" "8-bit,16-bit"
|
|
bitfld.quad 0x00 32.--34. "IPS,Intermediate Physical Address Size" "32 bits/4 GB,36 bits/64 GB,40 bits/1 TB,?..."
|
|
newline
|
|
bitfld.quad 0x00 30.--31. "TG1,TTBR1_EL1 granule size" "Reserved,Reserved,4 KB,64 KB"
|
|
bitfld.quad 0x00 28.--29. "SH1,Shareability attribute for memory associated with translation table walks using TTBR1_EL1" "Non-shareable,Reserved,Outer shareable,Inner shareable"
|
|
newline
|
|
bitfld.quad 0x00 26.--27. "ORGN1,Outer cacheability attribute for memory associated with translation table walks using TTBR1_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
bitfld.quad 0x00 24.--25. "IRGN1,Inner cacheability attribute for memory associated with translation table walks using TTBR1_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
newline
|
|
bitfld.quad 0x00 23. "EPD1,Translation table walk disable for translations using TTBR1_EL1" "Enabled,Disabled"
|
|
bitfld.quad 0x00 22. "A1,Selects whether TTBR0_EL1 or TTBR1_EL1 defines the ASID" "TTBR0_EL1,TTBR1_EL1"
|
|
newline
|
|
bitfld.quad 0x00 16.--21. "T1SZ,Size offset of the memory region addressed by TTBR1_EL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.quad 0x00 14.--15. "TG0,TTBR0_EL1 granule size" "4 KB,64 KB,?..."
|
|
newline
|
|
bitfld.quad 0x00 12.--13. "SH0,Shareability attribute for memory associated with translation table walks using TTBR0_EL1" "Non-shareable,Reserved,Outer shareable,Inner shareable"
|
|
bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attribute for memory associated with translation table walks using TTBR0_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
newline
|
|
bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attribute for memory associated with translation table walks using TTBR0_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
bitfld.quad 0x00 7. "EPD0,Translation table walk disable for translations using TTBR0" "Enabled,Disabled"
|
|
newline
|
|
bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memory region addressed by TTBR0_EL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
endif
|
|
group.quad spr:0x34200++0x00
|
|
line.quad 0x00 "TTBR0_EL2,Translation Table Base Register 0 (EL2)"
|
|
hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address"
|
|
if (CORENAME()=="CORTEXA57")
|
|
group.quad spr:0x34202++0x00
|
|
line.quad 0x00 "TCR_EL2,Translation Control Register (EL2)"
|
|
bitfld.quad 0x00 20. "TBI,Top Byte Ignored" "Not ignored,Ignored"
|
|
bitfld.quad 0x00 16.--18. "PS,Intermediate Physical Address Size" "32 bits/4 GB,36 bits/64 GB,40 bits/1 TB,42 bits/4 TB,44 bits/16 TB,48 bits/256 TB,?..."
|
|
newline
|
|
bitfld.quad 0x00 14. "TG0,TTBR0_EL2 granule size" "4 KB,64 KB"
|
|
bitfld.quad 0x00 12.--13. "SH0,Shareability attribute for memory associated with translation table walks using TTBR0_EL2" "Non-shareable,Reserved,Outer shareable,Inner shareable"
|
|
newline
|
|
bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attribute for memory associated with translation table walks using TTBR0_EL2" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attribute for memory associated with translation table walks using TTBR0_EL2" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
newline
|
|
bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memory region addressed by TTBR0_EL2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
elif (CORENAME()=="CORTEXA53")
|
|
group.quad spr:0x34202++0x00
|
|
line.quad 0x00 "TCR_EL2,Translation Control Register (EL2)"
|
|
bitfld.quad 0x00 20. "TBI,Top Byte Ignored" "Not ignored,Ignored"
|
|
bitfld.quad 0x00 16.--18. "PS,Intermediate Physical Address Size" "32 bits/4 GB,36 bits/64 GB,40 bits/1 TB,?..."
|
|
newline
|
|
bitfld.quad 0x00 14.--15. "TG0,TTBR0_EL2 granule size" "4 KB,64 KB,?..."
|
|
bitfld.quad 0x00 12.--13. "SH0,Shareability attribute for memory associated with translation table walks using TTBR0_EL2" "Non-shareable,Reserved,Outer shareable,Inner shareable"
|
|
newline
|
|
bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attribute for memory associated with translation table walks using TTBR0_EL2" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attribute for memory associated with translation table walks using TTBR0_EL2" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
newline
|
|
bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memory region addressed by TTBR0_EL2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
endif
|
|
group.quad spr:0x36200++0x00
|
|
line.quad 0x00 "TTBR0_EL3,Translation Table Base Register 0 (EL3)"
|
|
hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address"
|
|
if (CORENAME()=="CORTEXA57")
|
|
group.quad spr:0x36202++0x00
|
|
line.quad 0x00 "TCR_EL3,Translation Control Register (EL3)"
|
|
bitfld.quad 0x00 20. "TBI,Top Byte Ignored" "Not ignored,Ignored"
|
|
bitfld.quad 0x00 16.--18. "PS,Intermediate Physical Address Size" "32 bits/4 GB,36 bits/64 GB,40 bits/1 TB,42 bits/4 TB,44 bits/16 TB,48 bits/256 TB,?..."
|
|
newline
|
|
bitfld.quad 0x00 14. "TG0,TTBR0_EL3 granule size" "4 KB,64 KB"
|
|
bitfld.quad 0x00 12.--13. "SH0,Shareability attribute for memory associated with translation table walks using TTBR0_EL3" "Non-shareable,Reserved,Outer shareable,Inner shareable"
|
|
newline
|
|
bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attribute for memory associated with translation table walks using TTBR0_EL3" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attribute for memory associated with translation table walks using TTBR0_EL3" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
newline
|
|
bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memory region addressed by TTBR0_EL3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
elif (CORENAME()=="CORTEXA53")
|
|
group.quad spr:0x36202++0x00
|
|
line.quad 0x00 "TCR_EL3,Translation Control Register (EL3)"
|
|
bitfld.quad 0x00 20. "TBI,Top Byte Ignored" "Not ignored,Ignored"
|
|
bitfld.quad 0x00 16.--18. "PS,Intermediate Physical Address Size" "32 bits/4 GB,36 bits/64 GB,40 bits/1 TB,?..."
|
|
newline
|
|
bitfld.quad 0x00 14.--15. "TG0,TTBR0_EL3 granule size" "4 KB,64 KB,?..."
|
|
bitfld.quad 0x00 12.--13. "SH0,Shareability attribute for memory associated with translation table walks using TTBR0_EL3" "Non-shareable,Reserved,Outer shareable,Inner shareable"
|
|
newline
|
|
bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attribute for memory associated with translation table walks using TTBR0_EL3" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attribute for memory associated with translation table walks using TTBR0_EL3" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
newline
|
|
bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memory region addressed by TTBR0_EL3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
endif
|
|
group.quad SPR:0x34300++0x00
|
|
line.long 0x00 "DACR32_EL2,Domain Access Control Register"
|
|
bitfld.long 0x0 30.--31. "D15,Domain Access 15" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 28.--29. "D14,Domain Access 14" "Denied,Client,Reserved,Manager"
|
|
newline
|
|
bitfld.long 0x0 26.--27. "D13,Domain Access 13" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 24.--25. "D12,Domain Access 12" "Denied,Client,Reserved,Manager"
|
|
newline
|
|
bitfld.long 0x0 22.--23. "D11,Domain Access 11" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 20.--21. "D10,Domain Access 10" "Denied,Client,Reserved,Manager"
|
|
newline
|
|
bitfld.long 0x0 18.--19. "D9,Domain Access 9" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 16.--17. "D8,Domain Access 8" "Denied,Client,Reserved,Manager"
|
|
newline
|
|
bitfld.long 0x0 14.--15. "D7,Domain Access 7" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 12.--13. "D6,Domain Access 6" "Denied,Client,Reserved,Manager"
|
|
newline
|
|
bitfld.long 0x0 10.--11. "D5,Domain Access 5" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 8.--9. "D4,Domain Access 4" "Denied,Client,Reserved,Manager"
|
|
newline
|
|
bitfld.long 0x0 6.--7. "D3,Domain Access 3" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 4.--5. "D2,Domain Access 2" "Denied,Client,Reserved,Manager"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "D1,Domain Access 1" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 0.--1. "D0,Domain Access 0" "Denied,Client,Reserved,Manager"
|
|
if (CORENAME()=="CORTEXA57")
|
|
if (((per.q(spr:0x34501))&0x200)==0x200)
|
|
group.quad spr:0x34501++0x00
|
|
line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register"
|
|
bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR"
|
|
bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long"
|
|
newline
|
|
bitfld.quad 0x00 0.--5. "STATUS,Fault Status" "Address size/0th level/TTBR0/TTBR1,Reserved,Reserved,Reserved,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Access flag/0th level,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Permission/0th level,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Reserved,Reserved,Reserved,Sync. external/on TTW/0th level,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/0th level,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,?..."
|
|
else
|
|
group.quad spr:0x34501++0x00
|
|
line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register"
|
|
bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR"
|
|
bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long"
|
|
newline
|
|
bitfld.quad 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Alignment,Debug event,Access flag/1st level,Reserved,Translation/1st level,Access flag/2nd level,Translation/2nd level,Sync. external/non-translation,Domain/1st level,Reserved,Domain/2nd level,Sync. external/on TTW/1st level,Permission/1st level,Sync. external/on TTW/2nd level,Permission/2nd level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access,Reserved,Reserved,Sync. parity/on TTW/1st level,Reserved,Sync. parity/on TTW/2nd level,?..."
|
|
endif
|
|
elif (CORENAME()=="CORTEXA53")
|
|
if (((per.q(spr:0x34501))&0x200)==0x200)
|
|
group.quad spr:0x34501++0x00
|
|
line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register"
|
|
bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR"
|
|
bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long"
|
|
newline
|
|
bitfld.quad 0x00 0.--5. "STATUS,Fault Status" "Address size/TTBR0/TTBR1,Reserved,Reserved,Reserved,Reserved,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Reserved,Reserved,Reserved,Reserved,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..."
|
|
else
|
|
group.quad spr:0x34501++0x00
|
|
line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register"
|
|
bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR"
|
|
bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long"
|
|
newline
|
|
bitfld.quad 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Reserved,Debug event,Access flag/section,Reserved,Translation/section,Access flag/page,Translation/page,Sync. external/non-translation,Domain/section,Reserved,Domain/page,Sync. external/on TTW/1st level,Permission/section,Sync. external/on TTW/2nd level,Permission/page,TLB conflict,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access,Reserved,Reserved,Sync. parity/on TTW/1st level,Reserved,Sync. parity/on TTW/2nd level,?..."
|
|
endif
|
|
endif
|
|
rgroup.quad SPR:0x30510++0x00
|
|
line.long 0x00 "AFSR0_EL1,Auxiliary Fault Status Register 0 (EL1)"
|
|
rgroup.quad SPR:0x34510++0x00
|
|
line.long 0x00 "AFSR0_EL2,Auxiliary Fault Status Register 0 (EL2)"
|
|
rgroup.quad SPR:0x36510++0x00
|
|
line.long 0x00 "AFSR0_EL3,Auxiliary Fault Status Register 0 (EL3)"
|
|
rgroup.quad SPR:0x30511++0x00
|
|
line.long 0x00 "AFSR1_EL1,Auxiliary Fault Status Register 1 (EL1)"
|
|
rgroup.quad SPR:0x34511++0x00
|
|
line.long 0x00 "AFSR1_EL2,Auxiliary Fault Status Register 1 (EL2)"
|
|
rgroup.quad SPR:0x36511++0x00
|
|
line.long 0x00 "AFSR1_EL3,Auxiliary Fault Status Register 1 (EL3)"
|
|
if (((per.q(spr:0x30740))&0xF000000000000001)==0x0000000000000000)
|
|
group.quad spr:0x30740++0x00
|
|
line.quad 0x00 "PAR_EL1,Physical Address Register"
|
|
bitfld.quad 0x00 60.--63. "ATTRH,Device memory or Normal memory plus Outer cacheability [Type/Cacheable/Allocate]" "Device,Reserved,Reserved,Reserved,Normal/Non-cacheable,Reserved,Reserved,Reserved,Normal/Write-Through,Normal/Write-Through/Write,Normal/Write-Through/Read,Normal/Write-Through/Write|Read,Normal/Write-Back,Normal/Write-Back/Write,Normal/Write-Back/Read,Normal/Write-Back/Write|Read"
|
|
bitfld.quad 0x00 56.--59. "ATTRL,Device memory or Normal memory plus Inner cacheability [Type/Cacheable/Allocate]" "Device-nGnRnE,Reserved,Reserved,Reserved,Device-not nGnRnE,?..."
|
|
newline
|
|
hexmask.quad 0x00 12.--47. 0x10 "PA[47:12],Physical Address"
|
|
bitfld.quad 0x00 9. "NS,The NS attribute for a translation table entry read from Secure state" "No,Yes"
|
|
newline
|
|
bitfld.quad 0x00 7.--8. "SHA,Shareable attribute" "Non-shareable,Reserved,Outer Shareable,Inner Shareable"
|
|
newline
|
|
bitfld.quad 0x00 0. "F,Indicates whether the conversion completed successfully" "Successful,Aborted"
|
|
elif (((per.q(spr:0x30740))&0x01)==0x00)
|
|
group.quad spr:0x30740++0x00
|
|
line.quad 0x00 "PAR_EL1,Physical Address Register"
|
|
bitfld.quad 0x00 60.--63. "ATTRH,Device memory or Normal memory plus Outer cacheability [Type/Cacheable/Allocate]" "Device,Reserved,Reserved,Reserved,Normal/Non-cacheable,Reserved,Reserved,Reserved,Normal/Write-Through,Normal/Write-Through/Write,Normal/Write-Through/Read,Normal/Write-Through/Write|Read,Normal/Write-Back,Normal/Write-Back/Write,Normal/Write-Back/Read,Normal/Write-Back/Write|Read"
|
|
bitfld.quad 0x00 56.--59. "ATTRL,Device memory or Normal memory plus Inner cacheability [Type/Cacheable/Allocate]" "Reserved,Reserved,Reserved,Reserved,Normal/Non-cacheable,Reserved,Reserved,Reserved,Normal/Write-Through,Normal/Write-Through/Write,Normal/Write-Through/Read,Normal/Write-Through/Write|Read,Normal/Write-Back,Normal/Write-Back/Write,Normal/Write-Back/Read,Normal/Write-Back/Write|Read"
|
|
newline
|
|
hexmask.quad 0x00 12.--47. 0x10 "PA[47:12],Physical Address"
|
|
bitfld.quad 0x00 9. "NS,The NS attribute for a translation table entry read from Secure state" "No,Yes"
|
|
newline
|
|
bitfld.quad 0x00 7.--8. "SHA,Shareable attribute" "Non-shareable,Reserved,Outer Shareable,Inner Shareable"
|
|
newline
|
|
bitfld.quad 0x00 0. "F,Indicates whether the conversion completed successfully" "Successful,Aborted"
|
|
else
|
|
group.quad spr:0x30740++0x00
|
|
line.quad 0x00 "PAR_EL1,Physical Address Register"
|
|
newline
|
|
bitfld.quad 0x00 9. "S,Indicates the translation stage at which the translation aborted" "Stage 1,Stage 2"
|
|
bitfld.quad 0x00 8. "PTW,Translation aborted because of a stage 2 fault during a stage 1 translation table walk" "No,Yes"
|
|
newline
|
|
bitfld.quad 0x00 1.--6. "FST,Fault status field" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Reserved,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Atomic/AArch64,?..."
|
|
newline
|
|
bitfld.quad 0x00 0. "F,Indicates whether the conversion completed successfully" "Successful,Aborted"
|
|
endif
|
|
tree.open "Memory Attribute Indirection Registers"
|
|
group.quad spr:0x30A20++0x00
|
|
line.quad 0x00 "MAIR_EL1,Memory Attribute Indirection Register (EL1)"
|
|
bitfld.quad 0x00 60.--63. "ATTR7H,Attribute 7 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
bitfld.quad 0x00 56.--59. "ATTR7L,Attribute 7 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
newline
|
|
bitfld.quad 0x00 52.--55. "ATTR6H,Attribute 6 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
bitfld.quad 0x00 48.--51. "ATTR6L,Attribute 6 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
newline
|
|
bitfld.quad 0x00 44.--47. "ATTR5H,Attribute 5 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
bitfld.quad 0x00 40.--43. "ATTR5L,Attribute 5 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
newline
|
|
bitfld.quad 0x00 36.--39. "ATTR4H,Attribute 4 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
bitfld.quad 0x00 32.--35. "ATTR4L,Attribute 4 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
newline
|
|
bitfld.quad 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
bitfld.quad 0x00 24.--27. "ATTR3L,Attribute 3 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
newline
|
|
bitfld.quad 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
bitfld.quad 0x00 16.--19. "ATTR2L,Attribute 2 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
newline
|
|
bitfld.quad 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
bitfld.quad 0x00 8.--11. "ATTR1L,Attribute 1 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
newline
|
|
bitfld.quad 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
bitfld.quad 0x00 0.--3. "ATTR0L,Attribute 0 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
group.quad spr:0x34A20++0x00
|
|
line.quad 0x00 "MAIR_EL2,Memory Attribute Indirection Register (EL2)"
|
|
bitfld.quad 0x00 60.--63. "ATTR7H,Attribute 7 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
bitfld.quad 0x00 56.--59. "ATTR7L,Attribute 7 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
newline
|
|
bitfld.quad 0x00 52.--55. "ATTR6H,Attribute 6 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
bitfld.quad 0x00 48.--51. "ATTR6L,Attribute 6 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
newline
|
|
bitfld.quad 0x00 44.--47. "ATTR5H,Attribute 5 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
bitfld.quad 0x00 40.--43. "ATTR5L,Attribute 5 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
newline
|
|
bitfld.quad 0x00 36.--39. "ATTR4H,Attribute 4 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
bitfld.quad 0x00 32.--35. "ATTR4L,Attribute 4 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
newline
|
|
bitfld.quad 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
bitfld.quad 0x00 24.--27. "ATTR3L,Attribute 3 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
newline
|
|
bitfld.quad 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
bitfld.quad 0x00 16.--19. "ATTR2L,Attribute 2 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
newline
|
|
bitfld.quad 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
bitfld.quad 0x00 8.--11. "ATTR1L,Attribute 1 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
newline
|
|
bitfld.quad 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
bitfld.quad 0x00 0.--3. "ATTR0L,Attribute 0 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
group.quad spr:0x36A20++0x00
|
|
line.quad 0x00 "MAIR_EL3,Memory Attribute Indirection Register (EL3)"
|
|
bitfld.quad 0x00 60.--63. "ATTR7H,Attribute 7 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
bitfld.quad 0x00 56.--59. "ATTR7L,Attribute 7 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
newline
|
|
bitfld.quad 0x00 52.--55. "ATTR6H,Attribute 6 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
bitfld.quad 0x00 48.--51. "ATTR6L,Attribute 6 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
newline
|
|
bitfld.quad 0x00 44.--47. "ATTR5H,Attribute 5 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
bitfld.quad 0x00 40.--43. "ATTR5L,Attribute 5 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
newline
|
|
bitfld.quad 0x00 36.--39. "ATTR4H,Attribute 4 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
bitfld.quad 0x00 32.--35. "ATTR4L,Attribute 4 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
newline
|
|
bitfld.quad 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
bitfld.quad 0x00 24.--27. "ATTR3L,Attribute 3 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
newline
|
|
bitfld.quad 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
bitfld.quad 0x00 16.--19. "ATTR2L,Attribute 2 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
newline
|
|
bitfld.quad 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
bitfld.quad 0x00 8.--11. "ATTR1L,Attribute 1 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
newline
|
|
bitfld.quad 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
bitfld.quad 0x00 0.--3. "ATTR0L,Attribute 0 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
|
|
rgroup.quad spr:0x30A30++0x00
|
|
line.quad 0x00 "AMAIR_EL1,Memory Attribute Indirection Register (EL1)"
|
|
rgroup.quad spr:0x34A30++0x00
|
|
line.quad 0x00 "AMAIR_EL2,Memory Attribute Indirection Register (EL2)"
|
|
rgroup.quad spr:0x36A30++0x00
|
|
line.quad 0x00 "AMAIR_EL3,Memory Attribute Indirection Register (EL3)"
|
|
tree.end
|
|
newline
|
|
group.quad SPR:0x30D01++0x00
|
|
line.long 0x0 "CONTEXTIDR_EL1,Context ID Register"
|
|
tree.end
|
|
tree "Virtualization Extensions"
|
|
group.quad SPR:0x34000++0x0
|
|
line.long 0x0 "VPIDR_EL2,Virtualization Processor ID Register"
|
|
if (CORENAME()=="CORTEXA57")
|
|
group.quad spr:0x34005++0x00
|
|
line.quad 0x0 "VMPIDR_EL2,Virtualization Multiprocessor ID Register"
|
|
hexmask.quad.long 0x00 0.--31. 1. "VMPIDR_EL2,MPIDR value returned by Non-secure EL1 reads of the MPIDR_EL1"
|
|
elif (CORENAME()=="CORTEXA53")
|
|
group.quad spr:0x34005++0x00
|
|
line.quad 0x0 "VMPIDR_EL2,Virtualization Multiprocessor ID Register"
|
|
endif
|
|
group.quad spr:0x34100++0x0
|
|
line.quad 0x00 "SCTLR_EL2,System Control Register (EL2)"
|
|
bitfld.quad 0x00 25. "EE,Exception endianness" "Little,Big"
|
|
bitfld.quad 0x00 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced"
|
|
newline
|
|
bitfld.quad 0x00 12. "I,Instruction Cache Enable" "Disabled,Enabled"
|
|
bitfld.quad 0x00 3. "SA,SP stack alignment check enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
|
|
bitfld.quad 0x00 1. "A,Strict Alignment" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 0. "M,MMU or Protection Unit" "Disabled,Enabled"
|
|
group.quad spr:0x34110++0x00
|
|
line.quad 0x00 "HCR_EL2,Hypervisor Configuration Register"
|
|
bitfld.quad 0x00 33. "ID,Stage 2 Instruction cache disable" "No,Yes"
|
|
bitfld.quad 0x00 32. "CD,Stage 2 Data cache disable" "No,Yes"
|
|
newline
|
|
bitfld.quad 0x00 31. "RW,Register width control for lower exception levels" "AArch32,EL1 is 64-bit"
|
|
bitfld.quad 0x00 30. "TRVM,Trap Read of Virtual Memory controls" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 29. "HCD,Hypervisor Call Disable" "No,Yes"
|
|
bitfld.quad 0x00 28. "TDZ,Trap DC ZVA instruction" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 27. "TGE,Trap General Exceptions has an enhanced role when EL2 is using AArch64" "Disabled,Enabled"
|
|
bitfld.quad 0x00 26. "TVM,Trap Virtual Memory controls to EL2" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 25. "TTLB,Trap TLB maintenance instructions to EL2" "Disabled,Enabled"
|
|
bitfld.quad 0x00 24. "TPU,Trap Cache maintenance instructions to Point of Unificiation to EL2" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 23. "TPC,Trap Data/Unified Cache maintenance instructions to Point of Coherency tp EL2" "Disabled,Enabled"
|
|
bitfld.quad 0x00 22. "TSW,Trap Data/Unified Cache maintenance instructions by Set/Way to EL2" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 21. "TACR,Trap Auxiliary Control Register" "Disabled,Enabled"
|
|
bitfld.quad 0x00 20. "TIDCP,Trap Implementation Dependent functionality" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 19. "TSC,Trap SMC" "Disabled,Enabled"
|
|
bitfld.quad 0x00 18. "TID3,Trap ID Group 3" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 17. "TID2,Trap ID Group 2" "Disabled,Enabled"
|
|
bitfld.quad 0x00 16. "TID1,Trap ID Group 1" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 15. "TID0,Trap ID Group 0" "Disabled,Enabled"
|
|
bitfld.quad 0x00 14. "TWE,Trap WFE" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 13. "TWI,Trap WFI" "Disabled,Enabled"
|
|
bitfld.quad 0x00 12. "DC,Default Cacheable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 10.--11. "BSU,Barrier Shareability upgrade. determines the minimum shareability domain that is applied to any barrier executed from EL1 or EL0" "No effect,Inner Shareable,Outer Shareable,Full System"
|
|
bitfld.quad 0x00 9. "FB,Force broadcast" "Not forced,Forced"
|
|
newline
|
|
bitfld.quad 0x00 8. "VSE,Virtual System Error/Asynchronous Abort:" "No pending,Pending"
|
|
bitfld.quad 0x00 7. "VI,Virtual IRQ Interrupt" "Not pending,Pending"
|
|
newline
|
|
bitfld.quad 0x00 6. "VF,Virtual FIQ Interrupt" "Not pending,Pending"
|
|
bitfld.quad 0x00 5. "AMO,asynchronous abort and error interrupt routing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 4. "IMO,Physical IRQ Routing" "Disabled,Enabled"
|
|
bitfld.quad 0x00 3. "FMO,Physical FIQ Routing" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 2. "PTW,Protected Table Walk" "Disabled,Enabled"
|
|
bitfld.quad 0x00 1. "SWIO,Set/Way Invalidation Override" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 0. "VM,Second stage of Translation enable" "Disabled,Enabled"
|
|
if (CORENAME()=="CORTEXA57")
|
|
group.quad SPR:0x34111++0x00
|
|
line.long 0x00 "MDCR_EL2,Hypervisor Debug Control Register (EL2)"
|
|
bitfld.long 0x00 11. "TDRA,Trap Debug ROM Access" "No effect,Valid"
|
|
bitfld.long 0x00 10. "TDOSA,Trap Debug OS-related register Access" "No effect,Valid"
|
|
bitfld.long 0x00 9. "TDA,Trap Debug Access" "No effect,Valid"
|
|
newline
|
|
bitfld.long 0x00 8. "TDE,Trap Debug Exceptions" "No effect,Valid"
|
|
bitfld.long 0x00 7. "HPME,Hypervisor Performance Monitors Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. "TPM,Trap Performance Monitors accesses" "No effect,Valid"
|
|
newline
|
|
bitfld.long 0x00 5. "TPMCR,Trap Performance Monitor Control Register accesses" "No effect,Valid"
|
|
bitfld.long 0x00 0.--4. "HPMN,Defines the number of Performance Monitors counters" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
elif (CORENAME()=="CORTEXA53")
|
|
group.quad SPR:0x34111++0x00
|
|
line.long 0x00 "MDCR_EL2,Hypervisor Debug Control Register (EL2)"
|
|
bitfld.long 0x00 11. "TDRA,Trap Debug ROM Access" "No effect,Valid"
|
|
bitfld.long 0x00 10. "TDOSA,Trap Debug OS-related register Access" "No effect,Valid"
|
|
bitfld.long 0x00 9. "TDA,Trap Debug Access" "No effect,Valid"
|
|
newline
|
|
bitfld.long 0x00 8. "TDE,Trap Debug Exceptions" "No effect,Valid"
|
|
bitfld.long 0x00 7. "HPME,Hypervisor Performance Monitors Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. "TPM,Trap Performance Monitors accesses" "No effect,Valid"
|
|
newline
|
|
bitfld.long 0x00 5. "TPMCR,Trap Performance Monitor Control Register accesses" "No effect,Valid"
|
|
bitfld.long 0x00 0.--4. "HPMN,Defines the number of Performance Monitors counters" "0,1,2,3,4,5,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6"
|
|
endif
|
|
group.quad SPR:0x34112++0x00
|
|
line.long 0x00 "CPTR_EL2,Architectural Feature Trap Register (EL2)"
|
|
bitfld.long 0x0 31. "TCPAC,Trap Coprocessor Access Control" "Not trapped,Trapped"
|
|
bitfld.long 0x0 10. "TFP,Traps instructions that access registers associated with Advanced SIMD and Floating-point execution from a lower exception level to EL2" "Not trapped,Trapped"
|
|
group.quad SPR:0x36131++0x00
|
|
line.long 0x00 "MDCR_EL3,Hypervisor Debug Control Register (EL3)"
|
|
bitfld.long 0x00 21. "EPMAD,External debugger access to Performance Monitors registers disabled" "No,Yes"
|
|
bitfld.long 0x00 20. "EDAD,External debugger access to breakpoint and watchpoint registers disabled" "No,Yes"
|
|
bitfld.long 0x00 17. "SPME,Secure performance monitors enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 16. "SDD,AArch64 secure debug disable" "No,Yes"
|
|
bitfld.long 0x00 14.--15. "SPD32,AArch32 secure privileged debug" "Legacy,Reserved,Disabled,Enabled"
|
|
bitfld.long 0x00 10. "TDOSA,Trap Debug OS-related register Access" "No effect,Valid"
|
|
newline
|
|
bitfld.long 0x00 9. "TDA,Trap Debug Access" "No effect,Valid"
|
|
bitfld.long 0x00 6. "TPM,Trap Performance Monitors accesses" "No effect,Valid"
|
|
group.quad SPR:0x36112++0x00
|
|
line.long 0x00 "CPTR_EL3,Architectural Feature Trap Register (EL3)"
|
|
bitfld.long 0x0 31. "TCPAC,Trap Coprocessor Access Control" "Not trapped,Trapped"
|
|
bitfld.long 0x0 10. "TFP,Traps instructions that access registers associated with Advanced SIMD and Floating-point execution from a lower exception level to EL2" "Not trapped,Trapped"
|
|
group.quad SPR:0x34113++0x00
|
|
line.long 0x00 "HSTR_EL2,Hypervisor System Trap Register"
|
|
bitfld.long 0x00 16. "TTEE,Trap ThumbEE" "Not supported,?..."
|
|
bitfld.long 0x00 15. "T15,Trap coprocessor primary register CRn = 15" "No effect,Trapped"
|
|
bitfld.long 0x00 13. "T13,Trap coprocessor primary register CRn = 13" "No effect,Trapped"
|
|
newline
|
|
bitfld.long 0x00 12. "T12,Trap coprocessor primary register CRn = 12" "No effect,Trapped"
|
|
bitfld.long 0x00 11. "T11,Trap coprocessor primary register CRn = 11" "No effect,Trapped"
|
|
bitfld.long 0x00 10. "T10,Trap coprocessor primary register CRn = 10" "No effect,Trapped"
|
|
newline
|
|
bitfld.long 0x00 9. "T9,Trap coprocessor primary register CRn = 9" "No effect,Trapped"
|
|
bitfld.long 0x00 8. "T8,Trap coprocessor primary register CRn = 8" "No effect,Trapped"
|
|
bitfld.long 0x00 7. "T7,Trap coprocessor primary register CRn = 7" "No effect,Trapped"
|
|
newline
|
|
bitfld.long 0x00 6. "T6,Trap coprocessor primary register CRn = 6" "No effect,Trapped"
|
|
bitfld.long 0x00 5. "T5,Trap coprocessor primary register CRn = 5" "No effect,Trapped"
|
|
bitfld.long 0x00 3. "T3,Trap coprocessor primary register CRn = 3" "No effect,Trapped"
|
|
newline
|
|
bitfld.long 0x00 2. "T2,Trap coprocessor primary register CRn = 2" "No effect,Trapped"
|
|
bitfld.long 0x00 1. "T1,Trap coprocessor primary register CRn = 1" "No effect,Trapped"
|
|
bitfld.long 0x00 0. "T0,Trap coprocessor primary register CRn = 0" "No effect,Trapped"
|
|
rgroup.quad SPR:0x34117++0x00
|
|
line.long 0x00 "HACR_EL2,Hypervisor Auxiliary Configuration Register"
|
|
group.quad spr:0x34210++0x00
|
|
line.quad 0x00 "VTTBR_EL2,Virtualization Translation Table Base Register"
|
|
hexmask.quad.byte 0x00 48.--55. 1. "VMID,VMID for the translation table"
|
|
hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address"
|
|
if (CORENAME()=="CORTEXA57")
|
|
group.quad SPR:0x34212++0x00
|
|
line.long 0x00 "VTCR_EL2,Virtualization Translation Control Register"
|
|
bitfld.long 0x00 16.--18. "PS,Physical Address Size" "32 bits/4GB,36 bits/64GB,40 bits/1TB,42 bits/4TB,44 bits/16TB,48 bits/256TB,?..."
|
|
bitfld.long 0x00 14. "TG0,Granule size for the corresponding translation table base address register" "4 KB,64 KB"
|
|
bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using VTTBR" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using VTTBR" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks VTTBR" "0,1,2,3"
|
|
bitfld.long 0x00 6.--7. "SL0,Starting Level for VTCR addressed region" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "T0SZ,The Size offset of the VTCR addressed region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
elif (CORENAME()=="CORTEXA53")
|
|
group.quad SPR:0x34212++0x00
|
|
line.long 0x00 "VTCR_EL2,Virtualization Translation Control Register"
|
|
bitfld.long 0x00 16.--18. "PS,Physical Address Size" "32 bits/4GB,36 bits/64GB,40 bits/1TB,?..."
|
|
bitfld.long 0x00 14.--15. "TG0,Granule size for the corresponding translation table base address register" "4 KB,64 KB,?..."
|
|
bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using VTTBR" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using VTTBR" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks VTTBR" "0,1,2,3"
|
|
bitfld.long 0x00 6.--7. "SL0,Starting Level for VTCR addressed region" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "T0SZ,The Size offset of the VTCR addressed region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
endif
|
|
group.quad spr:0x34604++0x00
|
|
line.quad 0x00 "HPFAR_EL2,Hypervisor IPA Fault Address Register"
|
|
hexmask.quad 0x00 4.--39. 0x10 "FIPA,Faulting IPA bits"
|
|
tree.end
|
|
tree "Cache Control and Configuration"
|
|
if (CORENAME()=="CORTEXA57")
|
|
rgroup.quad spr:0x33001++0x0
|
|
line.long 0x0 "CTR_EL0,Cache Type Register"
|
|
bitfld.long 0x0 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
|
|
bitfld.long 0x0 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
|
|
bitfld.long 0x0 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
|
|
newline
|
|
bitfld.long 0x0 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,Reserved,PIPT"
|
|
bitfld.long 0x0 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
|
|
elif (CORENAME()=="CORTEXA53")
|
|
rgroup.quad spr:0x33001++0x0
|
|
line.long 0x0 "CTR_EL0,Cache Type Register"
|
|
bitfld.long 0x0 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
|
|
bitfld.long 0x0 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
|
|
bitfld.long 0x0 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
|
|
newline
|
|
bitfld.long 0x0 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,VIPT,?..."
|
|
bitfld.long 0x0 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
|
|
endif
|
|
group.quad SPR:0x32000++0x0
|
|
line.long 0x0 "CSSELR_EL1,Cache Size Selection Register"
|
|
bitfld.long 0x00 1.--3. "LEVEL,Cache level of required cache" "Level 1,Level 2,?..."
|
|
bitfld.long 0x00 0. "IND,Instruction/Not Data" "Data/Unified,Instruction"
|
|
if (CORENAME()=="CORTEXA57")
|
|
rgroup.quad SPR:0x31001++0x0
|
|
line.long 0x0 "CLIDR_EL1,Cache Level ID Register"
|
|
bitfld.long 0x00 27.--29. "LOUU,Level of Unification Uniprocessor" "Reserved,Level 1,?..."
|
|
bitfld.long 0x00 24.--26. "LOC,Level of Coherency" "Reserved,Reserved,Level 3,?..."
|
|
bitfld.long 0x00 21.--23. "LOUIS,Level of Unification Inner Shareable" "Reserved,Level 2,?..."
|
|
newline
|
|
bitfld.long 0x00 18.--20. "CTYPE7,Cache type for levels 7" "No cache,?..."
|
|
bitfld.long 0x00 15.--17. "CTYPE6,Cache type for levels 6" "No cache,?..."
|
|
bitfld.long 0x00 12.--14. "CTYPE5,Cache type for levels 5" "No cache,?..."
|
|
newline
|
|
bitfld.long 0x00 9.--11. "CTYPE4,Cache type for levels 4" "No cache,?..."
|
|
bitfld.long 0x00 6.--8. "CTYPE3,Cache type for levels 3" "No cache,?..."
|
|
bitfld.long 0x00 3.--5. "CTYPE2,Cache type for levels 2" "Reserved,Reserved,Reserved,Reserved,Unified,?..."
|
|
newline
|
|
bitfld.long 0x00 0.--2. "CTYPE1,Cache type for levels 1" "Reserved,Reserved,Reserved,Separate Inst/Data,?..."
|
|
rgroup.quad SPR:0x31000++0x0
|
|
line.long 0x0 "CCSIDR_EL1,Current Cache Size ID Register"
|
|
bitfld.long 0x00 31. "WT,Write-Through" "Not Supported,?..."
|
|
bitfld.long 0x00 30. "WB,Write-Back" "Not Supported,Supported"
|
|
bitfld.long 0x00 29. "RA,Read-Allocate" "Reserved,Supported"
|
|
newline
|
|
bitfld.long 0x00 28. "WA,Write-Allocate" "Not Supported,Supported"
|
|
hexmask.long.word 0x00 13.--27. 1. 1. "SETS,Number of Sets"
|
|
hexmask.long.word 0x00 3.--12. 1. 1. "ASSOC,Associativity"
|
|
newline
|
|
bitfld.long 0x00 0.--2. "LSIZE,Line Size" "Reserved,Reserved,64 bytes,?..."
|
|
elif (CORENAME()=="CORTEXA53")
|
|
rgroup.quad SPR:0x31001++0x0
|
|
line.long 0x0 "CLIDR_EL1,Cache Level ID Register"
|
|
bitfld.long 0x00 30.--31. "ICB,Inner cache boundary" "Not disclosed,?..."
|
|
bitfld.long 0x00 27.--29. "LOUU,Level of Unification Uniprocessor" "Reserved,Level 1,?..."
|
|
bitfld.long 0x00 24.--26. "LOC,Level of Coherency" "Reserved,L1,L1/L2,?..."
|
|
newline
|
|
bitfld.long 0x00 21.--23. "LOUIS,Level of Unification Inner Shareable" "Reserved,Level 1,?..."
|
|
bitfld.long 0x00 6.--8. "CTYPE3,Cache type for levels 3" "No cache,?..."
|
|
bitfld.long 0x00 3.--5. "CTYPE2,Cache type for levels 2" "No cache,Reserved,Reserved,Reserved,Unified,?..."
|
|
newline
|
|
bitfld.long 0x00 0.--2. "CTYPE1,Cache type for levels 1" "Reserved,Reserved,Reserved,Separate Inst/Data,?..."
|
|
rgroup.quad SPR:0x31000++0x0
|
|
line.long 0x0 "CCSIDR_EL1,Current Cache Size ID Register"
|
|
bitfld.long 0x00 31. "WT,Write-Through" "Not Supported,?..."
|
|
bitfld.long 0x00 30. "WB,Write-Back" "Not Supported,Supported"
|
|
bitfld.long 0x00 29. "RA,Read-Allocate" "Not Supported,Supported"
|
|
newline
|
|
bitfld.long 0x00 28. "WA,Write-Allocate" "Not Supported,Supported"
|
|
hexmask.long.word 0x00 13.--27. 1. 1. "SETS,Number of Sets"
|
|
hexmask.long.word 0x00 3.--12. 1. 1. "ASSOC,Associativity"
|
|
newline
|
|
bitfld.long 0x00 0.--2. "LSIZE,Line Size" "1Reserved,Reserved,64 bytes,?..."
|
|
endif
|
|
tree "Level 1 memory system"
|
|
if (CORENAME()=="CORTEXA57")
|
|
group.quad SPR:0x30F10++0x00
|
|
line.long 0x00 "DL1DATA0_EL1,Data L1 Data 0 Register"
|
|
group.quad SPR:0x30F11++0x00
|
|
line.long 0x00 "DL1DATA1_EL1,Data L1 Data 1 Register"
|
|
group.quad SPR:0x30F12++0x00
|
|
line.long 0x00 "DL1DATA2_EL1,Data L1 Data 2 Register"
|
|
group.quad SPR:0x30F13++0x00
|
|
line.long 0x00 "DL1DATA3_EL1,Data L1 Data 3 Register"
|
|
group.quad SPR:0x30F00++0x00
|
|
line.long 0x00 "IL1DATA0_EL1,Instruction L1 Data 0 Register"
|
|
group.quad SPR:0x30F01++0x00
|
|
line.long 0x00 "IL1DATA1_EL1,Instruction L1 Data 1 Register"
|
|
group.quad SPR:0x30F02++0x00
|
|
line.long 0x00 "IL1DATA2_EL1,Instruction L1 Data 2 Register"
|
|
group.quad SPR:0x30F03++0x00
|
|
line.long 0x00 "IL1DATA3_EL1,Instruction L1 Data 3 Register"
|
|
group.quad spr:0x31F20++0x00
|
|
line.quad 0x00 "CPUACTLR_EL1,CPU Auxiliary Control Register"
|
|
bitfld.quad 0x00 63. "FPRCGEC,Force processor RCG enables active" "Not forced,Forced"
|
|
bitfld.quad 0x00 59. "DLPDMB,Disable load pass DMB" "No,Yes"
|
|
bitfld.quad 0x00 58. "DDMBN,Disable DMB nullification" "No,Yes"
|
|
newline
|
|
bitfld.quad 0x00 57. "TA,Treat DMB st/stand DMB ld/allas DMB all/all" "Disabled,Enabled"
|
|
bitfld.quad 0x00 56. "DL1DCHP,Disable L1 Data Cache hardware prefetcher" "No,Yes"
|
|
bitfld.quad 0x00 55. "DLPS,Disable load pass store" "No,Yes"
|
|
newline
|
|
bitfld.quad 0x00 54. "TGRE,Treat GRE/nGRE as nGnRE" "Disabled,Enabled"
|
|
bitfld.quad 0x00 53. "TDMBADSB,Treat DMBand DSBas if their domain field is SY" "Disabled,Enabled"
|
|
bitfld.quad 0x00 52. "DORFLDNPI,Disable over-read from LDNP instruction" "No,Yes"
|
|
newline
|
|
bitfld.quad 0x00 51. "DCDAFEMP,Disable contention detection and fast exclusive monitor path" "No,Yes"
|
|
bitfld.quad 0x00 50. "DSSONNCGREEMT,Disable store streaming on NC/GRE memory type" "No,Yes"
|
|
bitfld.quad 0x00 49. "DNHOWBNAMT,Disable non-allocate hint of Write-Back No-Allocate (WBNA) memory type" "No,Yes"
|
|
newline
|
|
bitfld.quad 0x00 48. "DESRAFLSTL2,Disable early speculative read access from LS to L2" "No,Yes"
|
|
bitfld.quad 0x00 47. "DL1L2HP,Disable L1/L2 hardware prefetch across 4KB page boundary even if page is 64KB or larger" "No,Yes"
|
|
bitfld.quad 0x00 44. "EDCCADCCI,Enable data cache clean as data cache clean/invalidate" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 39. "DIM,Disable instruction merging" "No,Yes"
|
|
bitfld.quad 0x00 38. "FFPSCRWF,Force FPSCR write flush" "Not forced,Forced"
|
|
bitfld.quad 0x00 37. "DIGS,Disable instruction group split" "No,Yes"
|
|
newline
|
|
bitfld.quad 0x00 36. "FIDSBONASBE,Force implicit DSB on an ISB event" "Not forced,Forced"
|
|
bitfld.quad 0x00 34. "DSBP,Disable Static Branch Predictor" "No,Yes"
|
|
bitfld.quad 0x00 33. "DL1ICWPIMBTB,Disable L1 Instruction Cache way prediction in micro-BTB" "No,Yes"
|
|
newline
|
|
bitfld.quad 0x00 32. "DL1ICP,Disable L1 Instruction Cache prefetch" "No,Yes"
|
|
bitfld.quad 0x00 31. "SDEH,Snoop-delayed exclusive handling" "Disabled,Enabled"
|
|
bitfld.quad 0x00 30. "FMCEA,Force main clock enable active" "Not forced,Forced"
|
|
newline
|
|
bitfld.quad 0x00 29. "FASIMDFPCEA,Force Advanced SIMD and floating-point clock enable active" "Disabled,Enabled"
|
|
bitfld.quad 0x00 27.--28. "WSNAT,Write streaming no-allocate threshold" "12th,128th,512th,Disabled"
|
|
bitfld.quad 0x00 25.--26. "WSNL1AT,Write streaming no-L1-allocate threshold" "4th,64th,128th,Disabled"
|
|
newline
|
|
bitfld.quad 0x00 24. "NCSE,Non-cacheable streaming enhancement" "Disabled,Enabled"
|
|
bitfld.quad 0x00 23. "FIORTTSSAW,Force in-order requests to the same set and way" "Not forced,Forced"
|
|
bitfld.quad 0x00 22. "FIOLI,Force in-order load issue" "Not forced,Forced"
|
|
newline
|
|
bitfld.quad 0x00 21. "DL2TLBP,Disable L2 TLB prefetching" "No,Yes"
|
|
bitfld.quad 0x00 20. "DL2TTWIPAPAC,Disable L2 translation table walk IPA PA cache" "No,Yes"
|
|
bitfld.quad 0x00 19. "DL2S1TTWC,Disable L2 stage 1 translation table walk cache" "No,Yes"
|
|
newline
|
|
bitfld.quad 0x00 18. "DL2S1TTWL2PAC,Disable L2 stage 1 translation table walk L2 PA cache" "No,Yes"
|
|
bitfld.quad 0x00 17. "DL2TLBPO,Disable L2 TLB performance optimization" "No,Yes"
|
|
bitfld.quad 0x00 16. "EFSOADLR,Enable full Strongly-ordered and Device load replay" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 15. "FIOIIBEU,Force in-order issue in branch execute unit" "Not forced,Forced"
|
|
bitfld.quad 0x00 14. "FLOFOIGCDAPC,Force limit of one instruction group commit/de-allocate per cycle" "Not forced,Forced"
|
|
bitfld.quad 0x00 13. "FASPRW,Flush after Special Purpose Register (SPR) writes" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 12. "FPOSPRS,Force push of SPRs" "Disabled,Enabled"
|
|
bitfld.quad 0x00 11. "LTOIPIG,Limit to one instruction per instruction group" "Disabled,Enabled"
|
|
bitfld.quad 0x00 10. "FSAEIG,Force serialization after each instruction group" "Not forced,Forced"
|
|
newline
|
|
bitfld.quad 0x00 9. "DFRO,Disable flag renaming optimization" "No,Yes"
|
|
bitfld.quad 0x00 8. "EWFIIAANOPI,Execute WFI instruction as a NOP instruction" "Disabled,Enabled"
|
|
bitfld.quad 0x00 7. "EWFEIAANOPI,Execute WFE instruction as a NOP instruction" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 5. "EPLDPLDWIASNOP,Execute PLDand PLDWinstructions as a NOP" "Disabled,Enabled"
|
|
bitfld.quad 0x00 4. "DIP,Disable indirect predictor" "No,Yes"
|
|
bitfld.quad 0x00 3. "DMBTB,Disable micro-BTB" "No,Yes"
|
|
newline
|
|
bitfld.quad 0x00 1. "DICMS,Disable Instruction Cache miss streaming" "No,Yes"
|
|
bitfld.quad 0x00 0. "EIOBTB,Enable invalidates of BTB" "Disabled,Enabled"
|
|
group.quad spr:0x31F21++0x00
|
|
line.quad 0x00 "CPUECTLR_EL1,CPU Extended Control Register"
|
|
bitfld.quad 0x00 38. "DTWDAP,Disable table walk descriptor access prefetch" "No,Yes"
|
|
bitfld.quad 0x00 35.--36. "L2IFPD,L2 instruction fetch prefetch distance" "0 lines,1 line,2 lines,3 lines"
|
|
bitfld.quad 0x00 32.--33. "L2LSDPD,L2 load/store data prefetch distance" "0 line,2 lines,4 lines,8 lines"
|
|
newline
|
|
bitfld.quad 0x00 6. "SMPEN,Enable hardware management of data coherency with other processors in the multiprocessor" "Disabled,Enabled"
|
|
bitfld.quad 0x00 3.--5. "FPRETCTL,Advanced SIMD and Floating-point retention control" "2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks,?..."
|
|
bitfld.quad 0x00 0.--2. "CPURETCTL,CPU retention control" "2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks,?..."
|
|
elif (CORENAME()=="CORTEXA53")
|
|
group.quad spr:0x31F20++0x00
|
|
line.quad 0x00 "CPUACTLR_EL1,CPU Auxiliary Control Register"
|
|
bitfld.quad 0x00 44. "ENDCCASCI,Enable data cache clean as data cache clean/invalidate" "Disabled,Enabled"
|
|
bitfld.quad 0x00 30. "FPDIDIS,Disable floating-point dual issue" "No,Yes"
|
|
bitfld.quad 0x00 29. "DIDIS,Disable Dual Issue" "No,Yes"
|
|
newline
|
|
bitfld.quad 0x00 27.--28. "RADIS,Write streaming no-allocate threshold" "16th,128th,512th,Disabled"
|
|
bitfld.quad 0x00 25.--26. "L1RADIS,Write streaming no-L1-allocate threshold" "4th,64th,128th,Disabled"
|
|
bitfld.quad 0x00 24. "DTAH,Disable Transient allocation hint" "No,Yes"
|
|
newline
|
|
bitfld.quad 0x00 23. "STBPFRS,Disable ReadUnique request for prefetch streams initiated by STB accesses" "No,Yes"
|
|
bitfld.quad 0x00 22. "STBPFDIS,Disable prefetch streams initiated from STB accesses" "No,Yes"
|
|
bitfld.quad 0x00 21. "IFUTHDIS,IFU fetch throttle disabled" "No,Yes"
|
|
newline
|
|
bitfld.quad 0x00 19.--20. "NPFSTRM,Number of independent data prefetch streams" "1 stream,2 streams,3 streams,4 streams"
|
|
bitfld.quad 0x00 18. "DSTDIS,Enable device split throttle" "Disabled,Enabled"
|
|
bitfld.quad 0x00 17. "STRIDE,Enable stride detection" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 13.--15. "L1PCTL,L1 Data prefetch control" "Disabled,1,2,3,4,5,6,8"
|
|
bitfld.quad 0x00 10. "DODMBS,Disable optimized Data Memory Barrier behavior" "No,Yes"
|
|
bitfld.quad 0x00 6. "L1DEIEN,L1 D-cache data RAM error injection enable" "Disabled,Enabled"
|
|
group.quad spr:0x31F21++0x00
|
|
line.quad 0x00 "CPUECTLR_EL1,CPU Extended Control Register"
|
|
bitfld.quad 0x00 6. "SMPEN,Enable hardware management of data coherency with other processors in the multiprocessor" "Disabled,Enabled"
|
|
bitfld.quad 0x00 3.--5. "FPRETCTL,Advanced SIMD and Floating-point retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks"
|
|
bitfld.quad 0x00 0.--2. "CPURETCTL,CPU retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks"
|
|
endif
|
|
if (CORENAME()=="CORTEXA57")
|
|
group.quad spr:0x31F22++0x00
|
|
line.quad 0x00 "CPUMERRSR_EL1,CPU Memory Error Syndrome Register"
|
|
bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1"
|
|
hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count"
|
|
hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count"
|
|
newline
|
|
bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid"
|
|
hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier"
|
|
bitfld.quad 0x00 18.--22. "B/W,Bank/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.quad.tbyte 0x00 0.--17. 1. "INDEX,RAM address"
|
|
elif (CORENAME()=="CORTEXA53")
|
|
group.quad spr:0x31F22++0x00
|
|
line.quad 0x00 "CPUMERRSR_EL1,CPU Memory Error Syndrome Register"
|
|
bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1"
|
|
hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count"
|
|
hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count"
|
|
newline
|
|
bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid"
|
|
hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier"
|
|
bitfld.quad 0x00 18.--20. "C/W,CPUID/Way" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.quad.word 0x00 0.--11. 1. "RAD,RAM address"
|
|
endif
|
|
tree.end
|
|
tree "Level 2 memory system"
|
|
if (CORENAME()=="CORTEXA57")
|
|
group.quad SPR:0x31B02++0x0
|
|
line.long 0x00 "L2CTLR_EL1,L2 Control Register"
|
|
bitfld.long 0x00 31. "L2RSTDM,L2RSTDISABLE monitor" "No,Yes"
|
|
bitfld.long 0x00 24.--25. "NCPU,Number of CPU" "1,2,3,4"
|
|
rbitfld.long 0x00 22. "CPUCP,CPU Cache Protection" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 21. "SCUL2CP,SCU-L2 Cache Protection" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. "DIECCE,Data inline ECC enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 13. "L2AS,L2 arbitration slice" "Not presented,Presented"
|
|
newline
|
|
rbitfld.long 0x00 12. "L2TRAMS,L2 Tag RAM slice" "Not presented,Presented"
|
|
rbitfld.long 0x00 10.--11. "L2DRAMS,L2 Data RAM slice" "Not presented,1,2,?..."
|
|
bitfld.long 0x00 9. "L2TRAMS,L2 Tag RAM setup" "0 cycle,1 cycle"
|
|
newline
|
|
bitfld.long 0x00 6.--8. "L2TRAML,L2 Tag RAM latency" "2 cycles,2 cycles,3 cycles,4 cycles,5 cycles,5 cycles,5 cycles,5 cycles"
|
|
rbitfld.long 0x00 5. "DRAMIL,L2 data RAM input latency" "1 cycle,2 cycle"
|
|
bitfld.long 0x00 0.--2. "DRAML,L2 data RAM latency" "2 cycles,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
|
|
group.quad SPR:0x31B03++0x0
|
|
line.long 0x00 "L2ECTLR_EL1,L2 Extended Control Register"
|
|
bitfld.long 0x00 30. "L2INTASYNCERR,L2 internal asynchronous error" "No error,Error"
|
|
bitfld.long 0x00 29. "AXIASYNCERR,AXI asynchronous error" "No error,Error"
|
|
bitfld.long 0x00 0.--2. "L2DRC,L2 dynamic retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks"
|
|
group.quad SPR:0x31F00++0x00
|
|
line.long 0x00 "L2ACTLR_EL1,L2 Auxiliary Control Register"
|
|
bitfld.long 0x00 28. "FL2TBCEA,Force L2 tag bank clock enable active" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. "FL2LCEA,Force L2 logic clock enable active" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. "FL2GICRCGEA,Forces L2, GIC CPU interface, and Timer Regional Clock Gate(RCG) enables active" "Not forced,Forced"
|
|
newline
|
|
bitfld.long 0x00 25. "ESIAA,Enables single issue across all tag banks when the L2 arbitration replay threshold is reached" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. "DPRFRUT,Disables prefetch requests from ReadUnique transactions" "No,Yes"
|
|
bitfld.long 0x00 22. "DDTLSPR,Disable dynamic throttling of load/store prefetch requests" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 20.--21. "DTL2PRFEQOC,Disable throttling of L2 prefetch requests based on Fill/Evict Queue(FEQ) occupancy count" "12,10,8,Disabled"
|
|
bitfld.long 0x00 18.--19. "DLASQ,Disable limit on NC/SO/Dev stores in Address Sequence Queue" "12 entries,10 entries,8 entries,No limit"
|
|
bitfld.long 0x00 17. "DL2RRA,Disable L2 round-robin arbitration that only clocks through paths with an active requestor waiting to be arbitrated" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 16. "ERTSI,Enable replay threshold single issue" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. "DFFD,Disable fast forwarding of data from ACE or CHI to LS and IF" "No,Yes"
|
|
bitfld.long 0x00 14. "EUCE,Enables UniqueClean evictions with data" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 13. "DCEO,Disable clean evict optimization" "No,Yes"
|
|
bitfld.long 0x00 11. "DDSB,Disable DSB with no DVM synchronization" "No,Yes"
|
|
bitfld.long 0x00 10. "DNSDAR,Disable Non-secure debug array read" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 8. "DDVMCMOMB,Disable DVM and cache maintenance operation message broadcast" "No,Yes"
|
|
bitfld.long 0x00 7. "EHDT,Enable hazard detect timeout" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. "DACESCHIST,Disable ACE shareable or CHI snoopable transactions from master" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 4. "DWUWLUTFM,Disable WriteUnique and WriteLineUnique transactions from master" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. "DCEPTE,Disables clean/evict push to external" "No,Yes"
|
|
bitfld.long 0x00 2. "LTORPTB,Limit to one request per tag bank" "Normal,Limited"
|
|
newline
|
|
bitfld.long 0x00 1. "EARTT,Enable arbitration replay threshold timeout" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. "DHPF,Disable hardware prefetch forwarding" "No,Yes"
|
|
group.quad spr:0x31F23++0x00
|
|
line.quad 0x00 "L2MERRSR_EL1,L2 Memory Error Syndrome Register"
|
|
bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1"
|
|
hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count"
|
|
hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count"
|
|
newline
|
|
bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid"
|
|
hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier"
|
|
bitfld.quad 0x00 18.--21. "C/W,CPUID/Way" "CPU0 tag way 0,CPU0 tag way 1,CPU1 tag way 0,CPU1 tag way 1,CPU2 tag way 0,CPU2 tag way 1,CPU3 tag way 0,CPU3 tag way 1,?..."
|
|
newline
|
|
hexmask.quad.tbyte 0x00 0.--17. 1. "IND,Index"
|
|
elif (CORENAME()=="CORTEXA53")
|
|
group.quad SPR:0x31B02++0x0
|
|
line.long 0x00 "L2CTLR_EL1,L2 Control Register"
|
|
bitfld.long 0x00 24.--25. "NCPU,Number of CPU" "1,2,3,4"
|
|
bitfld.long 0x00 22. "CPUCP,CPU Cache Protection" "Disabled,Enabled"
|
|
rbitfld.long 0x00 21. "SCUL2CP,SCU-L2 Cache Protection" "Disabled,Enabled"
|
|
newline
|
|
rbitfld.long 0x00 5. "DRAMIL,L2 data RAM input latency" "1 cycle,2 cycle"
|
|
rbitfld.long 0x00 0. "DRAMOL,L2 data RAM output latency" "2 cycles,3 cycles"
|
|
group.quad SPR:0x31B03++0x0
|
|
line.long 0x00 "L2ECTLR_EL1,L2 Extended Control Register"
|
|
bitfld.long 0x00 30. "L2INTASYNCERR,L2 internal asynchronous error" "No error,Error"
|
|
bitfld.long 0x00 29. "AXIASYNCERR,AXI asynchronous error" "No error,Error"
|
|
bitfld.long 0x00 0.--2. "L2DRC,L2 dynamic retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks"
|
|
group.quad SPR:0x31F00++0x00
|
|
line.long 0x00 "L2ACTLR_EL1,L2 Auxiliary Control Register"
|
|
bitfld.long 0x00 30.--31. "L2VC,L2 Victim Control" "0,1,2,3"
|
|
bitfld.long 0x00 29. "L2DEIEN,L2 cache data RAM error injection enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. "L2TEIEN,L2 cache tag RAM error injection enable." "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 14. "EUCE,Enables UniqueClean evictions with data" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. "DCEPTE,Disables clean/evict push to external" "No,Yes"
|
|
group.quad spr:0x31F23++0x00
|
|
line.quad 0x00 "L2MERRSR_EL1,L2 Memory Error Syndrome Register"
|
|
bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1"
|
|
hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count"
|
|
hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count"
|
|
newline
|
|
bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid"
|
|
hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier"
|
|
bitfld.quad 0x00 18.--21. "C/W,CPUID/Way" "CPU0 tag way 0,CPU0 tag way 1,CPU1 tag way 0,CPU1 tag way 1,CPU2 tag way 0,CPU2 tag way 1,CPU3 tag way 0,CPU3 tag way 1,?..."
|
|
newline
|
|
hexmask.quad.word 0x00 3.--16. 1. "RAD,RAM index address"
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
tree "System Performance Monitor"
|
|
group.quad SPR:0x339C0++0x00
|
|
line.long 0x0 "PMCR_EL0,Performance Monitor Control Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "IMP,Implementer code"
|
|
hexmask.long.byte 0x00 16.--23. 1. "IDCODE,Identification code"
|
|
bitfld.long 0x00 11.--15. "N,Number of counters implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 6. "LC,Long cycle count enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 5. "DP,Disable CCNT when prohibited" "No,Yes"
|
|
bitfld.long 0x00 4. "X,Export Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. "D,Clock Divider" "Every cycle,64th cycle"
|
|
bitfld.long 0x00 2. "C,Clock Counter Reset" "No reset,Reset"
|
|
newline
|
|
bitfld.long 0x00 1. "P,Performance Counter Reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. "E,All Counters Enable" "Disabled,Enabled"
|
|
group.quad SPR:0x339C1++0x00
|
|
line.long 0x00 "PMCNTENSET_EL0,Count Enable Set Register"
|
|
bitfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. "P30,Event Counter 30 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. "P29,Event Counter 29 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. "P28,Event Counter 28 enable bit" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 27. "P27,Event Counter 27 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. "P26,Event Counter 26 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. "P25,Event Counter 25 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. "P24,Event Counter 24 enable bit" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 23. "P23,Event Counter 23 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. "P22,Event Counter 22 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. "P21,Event Counter 21 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. "P20,Event Counter 20 enable bit" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 19. "P19,Event Counter 19 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. "P18,Event Counter 18 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. "P17,Event Counter 17 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. "P16,Event Counter 16 enable bit" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 15. "P15,Event Counter 15 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. "P14,Event Counter 14 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. "P13,Event Counter 13 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. "P12,Event Counter 12 enable bit" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 11. "P11,Event Counter 11 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. "P10,Event Counter 10 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. "P9,Event Counter 9 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. "P8,Event Counter 8 enable bit" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 7. "P7,Event Counter 7 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. "P6,Event Counter 6 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. "P5,Event Counter 5 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. "P4,Event Counter 4 enable bit" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 3. "P3,Event Counter 3 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. "P2,Event Counter 2 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. "P1,Event Counter 1 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. "P0,Event Counter 0 enable bit" "Disabled,Enabled"
|
|
group.quad SPR:0x339C2++0x00
|
|
line.long 0x00 "PMCNTENCLR_EL0,Count Enable Clear Register"
|
|
bitfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 30. "P30,Event Counter 30 clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 29. "P29,Event Counter 29 clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 28. "P28,Event Counter 28 clear bit" "Disabled,Enabled"
|
|
newline
|
|
eventfld.long 0x00 27. "P27,Event Counter 27 clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 26. "P26,Event Counter 26 clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 25. "P25,Event Counter 25 clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 24. "P24,Event Counter 24 clear bit" "Disabled,Enabled"
|
|
newline
|
|
eventfld.long 0x00 23. "P23,Event Counter 23 clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 22. "P22,Event Counter 22 clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 21. "P21,Event Counter 21 clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 20. "P20,Event Counter 20 clear bit" "Disabled,Enabled"
|
|
newline
|
|
eventfld.long 0x00 19. "P19,Event Counter 19 clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 18. "P18,Event Counter 18 clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 17. "P17,Event Counter 17 clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 16. "P16,Event Counter 16 clear bit" "Disabled,Enabled"
|
|
newline
|
|
eventfld.long 0x00 15. "P15,Event Counter 15 clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 14. "P14,Event Counter 14 clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 13. "P13,Event Counter 13 clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 12. "P12,Event Counter 12 clear bit" "Disabled,Enabled"
|
|
newline
|
|
eventfld.long 0x00 11. "P11,Event Counter 11 clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 10. "P10,Event Counter 10 clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 9. "P9,Event Counter 9 clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 8. "P8,Event Counter 8 clear bit" "Disabled,Enabled"
|
|
newline
|
|
eventfld.long 0x00 7. "P7,Event Counter 7 clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 6. "P6,Event Counter 6 clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 5. "P5,Event Counter 5 clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 4. "P4,Event Counter 4 clear bit" "Disabled,Enabled"
|
|
newline
|
|
eventfld.long 0x00 3. "P3,Event Counter 3 clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 2. "P2,Event Counter 2 clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 1. "P1,Event Counter 1 clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. "P0,Event Counter 0 clear bit" "Disabled,Enabled"
|
|
group.quad SPR:0x339C3++0x00
|
|
line.long 0x00 "PMOVSCLR_EL0,Performance Monitors Overflow Flag Status Clear Register"
|
|
bitfld.long 0x00 31. "C,PMCCNTR overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 30. "P30,Event Counter 30 overflow clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 29. "P29,Event Counter 29 clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 28. "P28,Event Counter 28 overflow clear bit" "Disabled,Enabled"
|
|
newline
|
|
eventfld.long 0x00 27. "P27,Event Counter 27 overflow clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 26. "P26,Event Counter 26 overflow clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 25. "P25,Event Counter 25 overflow clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 24. "P24,Event Counter 24 overflow clear bit" "Disabled,Enabled"
|
|
newline
|
|
eventfld.long 0x00 23. "P23,Event Counter 23 overflow clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 22. "P22,Event Counter 22 overflow clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 21. "P21,Event Counter 21 overflow clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 20. "P20,Event Counter 20 overflow clear bit" "Disabled,Enabled"
|
|
newline
|
|
eventfld.long 0x00 19. "P19,Event Counter 19 overflow clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 18. "P18,Event Counter 18 overflow clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 17. "P17,Event Counter 17 overflow clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 16. "P16,Event Counter 16 overflow clear bit" "Disabled,Enabled"
|
|
newline
|
|
eventfld.long 0x00 15. "P15,Event Counter 15 overflow clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 14. "P14,Event Counter 14 overflow clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 13. "P13,Event Counter 13 overflow clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 12. "P12,Event Counter 12 overflow clear bit" "Disabled,Enabled"
|
|
newline
|
|
eventfld.long 0x00 11. "P11,Event Counter 11 overflow clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 10. "P10,Event Counter 10 overflow clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 9. "P9,Event Counter 9 overflow clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 8. "P8,Event Counter 8 overflow clear bit" "Disabled,Enabled"
|
|
newline
|
|
eventfld.long 0x00 7. "P7,Event Counter 7 overflow clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 6. "P6,Event Counter 6 overflow clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 5. "P5,Event Counter 5 overflow clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 4. "P4,Event Counter 4 overflow clear bit" "Disabled,Enabled"
|
|
newline
|
|
eventfld.long 0x00 3. "P3,Event Counter 3 overflow clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 2. "P2,Event Counter 2 overflow clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 1. "P1,Event Counter 1 overflow clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. "P0,Event Counter 0 overflow clear bit" "Disabled,Enabled"
|
|
wgroup.quad SPR:0x339C4++0x00
|
|
line.long 0x00 "PMSWINC_EL0,Performance Monitor Software Increment"
|
|
bitfld.long 0x00 30. "P30,Increment PMN30" "No action,Increment"
|
|
bitfld.long 0x00 29. "P29,Increment PMN29" "No action,Increment"
|
|
bitfld.long 0x00 28. "P28,Increment PMN28" "No action,Increment"
|
|
bitfld.long 0x00 27. "P27,Increment PMN27" "No action,Increment"
|
|
newline
|
|
bitfld.long 0x00 26. "P26,Increment PMN26" "No action,Increment"
|
|
bitfld.long 0x00 25. "P25,Increment PMN25" "No action,Increment"
|
|
bitfld.long 0x00 24. "P24,Increment PMN24" "No action,Increment"
|
|
bitfld.long 0x00 23. "P23,Increment PMN23" "No action,Increment"
|
|
newline
|
|
bitfld.long 0x00 22. "P22,Increment PMN22" "No action,Increment"
|
|
bitfld.long 0x00 21. "P21,Increment PMN21" "No action,Increment"
|
|
bitfld.long 0x00 20. "P20,Increment PMN20" "No action,Increment"
|
|
bitfld.long 0x00 19. "P19,Increment PMN19" "No action,Increment"
|
|
newline
|
|
bitfld.long 0x00 18. "P18,Increment PMN18" "No action,Increment"
|
|
bitfld.long 0x00 17. "P17,Increment PMN17" "No action,Increment"
|
|
bitfld.long 0x00 16. "P16,Increment PMN16" "No action,Increment"
|
|
bitfld.long 0x00 15. "P15,Increment PMN15" "No action,Increment"
|
|
newline
|
|
bitfld.long 0x00 14. "P14,Increment PMN14" "No action,Increment"
|
|
bitfld.long 0x00 13. "P13,Increment PMN13" "No action,Increment"
|
|
bitfld.long 0x00 12. "P12,Increment PMN12" "No action,Increment"
|
|
bitfld.long 0x00 11. "P11,Increment PMN11" "No action,Increment"
|
|
newline
|
|
bitfld.long 0x00 10. "P10,Increment PMN10" "No action,Increment"
|
|
bitfld.long 0x00 9. "P9,Increment PMN9" "No action,Increment"
|
|
bitfld.long 0x00 8. "P8,Increment PMN8" "No action,Increment"
|
|
bitfld.long 0x00 7. "P7,Increment PMN7" "No action,Increment"
|
|
newline
|
|
bitfld.long 0x00 6. "P6,Increment PMN6" "No action,Increment"
|
|
bitfld.long 0x00 5. "P5,Increment PMN5" "No action,Increment"
|
|
bitfld.long 0x00 4. "P4,Increment PMN4" "No action,Increment"
|
|
bitfld.long 0x00 3. "P3,Increment PMN3" "No action,Increment"
|
|
newline
|
|
bitfld.long 0x00 2. "P2,Increment PMN2" "No action,Increment"
|
|
bitfld.long 0x00 1. "P1,Increment PMN1" "No action,Increment"
|
|
bitfld.long 0x00 0. "P0,Increment PMN0" "No action,Increment"
|
|
group.quad SPR:0x339C5++0x00
|
|
line.long 0x00 "PMSELR_EL0,Performance Monitor Select Register"
|
|
bitfld.long 0x00 0.--4. "SEL,Current event counter select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
tree.open "Common Event Identification Registers"
|
|
if (CORENAME()=="CORTEXA57")
|
|
rgroup.quad SPR:0x339C6++0x0
|
|
line.long 0x00 "PMCEID0_EL0,Common Event Identification Register 0"
|
|
bitfld.long 0x00 30. "EVENT30,Chain" "Not implemented,Implemented"
|
|
bitfld.long 0x00 29. "EVENT29,Bus cycle" "Not implemented,Implemented"
|
|
bitfld.long 0x00 28. "EVENT28,Instruction architecturally executed condition check pass" "Not implemented,Implemented"
|
|
newline
|
|
bitfld.long 0x00 27. "EVENT27,Instruction speculatively executed" "Not implemented,Implemented"
|
|
bitfld.long 0x00 26. "EVENT26,Local memory error" "Not implemented,Implemented"
|
|
bitfld.long 0x00 25. "EVENT25,Bus access" "Not implemented,Implemented"
|
|
newline
|
|
bitfld.long 0x00 24. "EVENT24,Level 2 data cache write-back" "Not implemented,Implemented"
|
|
bitfld.long 0x00 23. "EVENT23,Level 2 data cache refill" "Not implemented,Implemented"
|
|
bitfld.long 0x00 22. "EVENT22,Level 2 data cache access" "Not implemented,Implemented"
|
|
newline
|
|
bitfld.long 0x00 21. "EVENT21,Level 1 data cache write-back" "Not implemented,Implemented"
|
|
bitfld.long 0x00 20. "EVENT20,Level 1 instruction cache access" "Not implemented,Implemented"
|
|
bitfld.long 0x00 19. "EVENT19,Data memory access" "Not implemented,Implemented"
|
|
newline
|
|
bitfld.long 0x00 18. "EVENT18,Predictable branch speculatively executed" "Not implemented,Implemented"
|
|
bitfld.long 0x00 17. "EVENT17,Cycle" "Not implemented,Implemented"
|
|
bitfld.long 0x00 16. "EVENT16,Mispredicted or not predicted branch speculatively executed" "Not implemented,Implemented"
|
|
newline
|
|
bitfld.long 0x00 15. "EVENT15,Instruction architecturally executed condition check pass unaligned load or store" "Not implemented,Implemented"
|
|
bitfld.long 0x00 14. "EVENT14,Instruction architecturally executed condition check pass procedure return" "Not implemented,Implemented"
|
|
bitfld.long 0x00 13. "EVENT13,Instruction architecturally executed immediate branch" "Not implemented,Implemented"
|
|
newline
|
|
bitfld.long 0x00 12. "EVENT12,Instruction architecturally executed condition check pass software change of the PC" "Not implemented,Implemented"
|
|
bitfld.long 0x00 11. "EVENT11,Instruction architecturally executed condition check pass write to CONTEXTIDR" "Not implemented,Implemented"
|
|
bitfld.long 0x00 10. "EVENT10,Instruction architecturally executed condition check pass exception return" "Not implemented,Implemented"
|
|
newline
|
|
bitfld.long 0x00 9. "EVENT9,Exception taken" "Not implemented,Implemented"
|
|
bitfld.long 0x00 8. "EVENT8,Instruction architecturally executed" "Not implemented,Implemented"
|
|
bitfld.long 0x00 7. "EVENT7,Instruction architecturally executed condition check pass store" "Not implemented,Implemented"
|
|
newline
|
|
bitfld.long 0x00 6. "EVENT6,Instruction architecturally executed condition check pass load" "Not implemented,Implemented"
|
|
bitfld.long 0x00 5. "EVENT5,Level 1 data TLB refill" "Not implemented,Implemented"
|
|
bitfld.long 0x00 4. "EVENT4,Level 1 data cache access" "Not implemented,Implemented"
|
|
newline
|
|
bitfld.long 0x00 3. "EVENT3,Level 1 data cache refill" "Not implemented,Implemented"
|
|
bitfld.long 0x00 2. "EVENT2,Level 1 instruction TLB refill" "Not implemented,Implemented"
|
|
bitfld.long 0x00 1. "EVENT1,Level 1 instruction cache refill" "Not implemented,Implemented"
|
|
newline
|
|
bitfld.long 0x00 0. "EVENT0,Instruction architecturally executed condition check pass software increment" "Not implemented,Implemented"
|
|
elif (CORENAME()=="CORTEXA53")
|
|
rgroup.quad SPR:0x339C6++0x0
|
|
line.long 0x00 "PMCEID0_EL0,Common Event Identification Register 0"
|
|
bitfld.long 0x00 31. "EVENT31,L1 Data cache allocate" "Not implemented,Implemented"
|
|
bitfld.long 0x00 30. "EVENT30,Chain" "Not implemented,Implemented"
|
|
bitfld.long 0x00 29. "EVENT29,Bus cycle" "Not implemented,Implemented"
|
|
newline
|
|
bitfld.long 0x00 28. "EVENT28,Instruction architecturally executed condition check pass" "Not implemented,Implemented"
|
|
bitfld.long 0x00 27. "EVENT27,Instruction speculatively executed" "Not implemented,Implemented"
|
|
bitfld.long 0x00 26. "EVENT26,Local memory error" "Not implemented,Implemented"
|
|
newline
|
|
bitfld.long 0x00 25. "EVENT25,Bus access" "Not implemented,Implemented"
|
|
bitfld.long 0x00 24. "EVENT24,Level 2 data cache write-back" "Not implemented,Implemented"
|
|
bitfld.long 0x00 23. "EVENT23,Level 2 data cache refill" "Not implemented,Implemented"
|
|
newline
|
|
bitfld.long 0x00 22. "EVENT22,Level 2 data cache access" "Not implemented,Implemented"
|
|
bitfld.long 0x00 21. "EVENT21,Level 1 data cache write-back" "Not implemented,Implemented"
|
|
bitfld.long 0x00 20. "EVENT20,Level 1 instruction cache access" "Not implemented,Implemented"
|
|
newline
|
|
bitfld.long 0x00 19. "EVENT19,Data memory access" "Not implemented,Implemented"
|
|
bitfld.long 0x00 18. "EVENT18,Predictable branch speculatively executed" "Not implemented,Implemented"
|
|
bitfld.long 0x00 17. "EVENT17,Cycle" "Not implemented,Implemented"
|
|
newline
|
|
bitfld.long 0x00 16. "EVENT16,Mispredicted or not predicted branch speculatively executed" "Not implemented,Implemented"
|
|
bitfld.long 0x00 15. "EVENT15,Instruction architecturally executed condition check pass unaligned load or store" "Not implemented,Implemented"
|
|
bitfld.long 0x00 14. "EVENT14,Instruction architecturally executed condition check pass procedure return" "Not implemented,Implemented"
|
|
newline
|
|
bitfld.long 0x00 13. "EVENT13,Instruction architecturally executed immediate branch" "Not implemented,Implemented"
|
|
bitfld.long 0x00 12. "EVENT12,Instruction architecturally executed condition check pass software change of the PC" "Not implemented,Implemented"
|
|
bitfld.long 0x00 11. "EVENT11,Instruction architecturally executed condition check pass write to CONTEXTIDR" "Not implemented,Implemented"
|
|
newline
|
|
bitfld.long 0x00 10. "EVENT10,Instruction architecturally executed condition check pass exception return" "Not implemented,Implemented"
|
|
bitfld.long 0x00 9. "EVENT9,Exception taken" "Not implemented,Implemented"
|
|
bitfld.long 0x00 8. "EVENT8,Instruction architecturally executed" "Not implemented,Implemented"
|
|
newline
|
|
bitfld.long 0x00 7. "EVENT7,Instruction architecturally executed condition check pass store" "Not implemented,Implemented"
|
|
bitfld.long 0x00 6. "EVENT6,Instruction architecturally executed condition check pass load" "Not implemented,Implemented"
|
|
bitfld.long 0x00 5. "EVENT5,Level 1 data TLB refill" "Not implemented,Implemented"
|
|
newline
|
|
bitfld.long 0x00 4. "EVENT4,Level 1 data cache access" "Not implemented,Implemented"
|
|
bitfld.long 0x00 3. "EVENT3,Level 1 data cache refill" "Not implemented,Implemented"
|
|
bitfld.long 0x00 2. "EVENT2,Level 1 instruction TLB refill" "Not implemented,Implemented"
|
|
newline
|
|
bitfld.long 0x00 1. "EVENT1,Level 1 instruction cache refill" "Not implemented,Implemented"
|
|
bitfld.long 0x00 0. "EVENT0,Instruction architecturally executed condition check pass software increment" "Not implemented,Implemented"
|
|
endif
|
|
rgroup.quad SPR:0x339C7++0x0
|
|
line.long 0x00 "PMCEID1_EL0,Common Event Identification Register 1"
|
|
bitfld.long 0x00 0. "EVENT32,Level 2 cache allocate" "Not implemented,Implemented"
|
|
tree.end
|
|
newline
|
|
group.quad spr:0x339D0++0x00
|
|
line.quad 0x00 "PMCCNTR_EL0,Performance Monitor Cycle Count Register"
|
|
group.quad SPR:0x339D1++0x00
|
|
line.long 0x00 "PMXEVTYPER_EL0,Performance Monitor Event Type Register"
|
|
group.quad SPR:0x339D2++0x00
|
|
line.long 0x00 "PMXEVCNTR_EL0,Performance Monitor Event Count Register"
|
|
group.quad SPR:0x339E0++0x00
|
|
line.long 0x00 "PMUSERENR_EL0,Performance Monitor User Enable Register"
|
|
bitfld.long 0x00 3. "ER,Event counter read enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. "EC,Cycle counter read enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. "SW,Software Increment write enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. "EN,User mode access enable" "Disabled,Enabled"
|
|
group.quad SPR:0x309E1++0x00
|
|
line.long 0x00 "PMINTENSET_EL1,Performance Monitor Interrupt Enable Set"
|
|
bitfld.long 0x00 31. "C,Cycle counter Overflow Interrupt clear" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. "P30,PMCNT30 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. "P29,PMCNT29 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. "P28,PMCNT28 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 27. "P27,PMCNT27 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. "P26,PMCNT26 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. "P25,PMCNT25 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. "P24,PMCNT24 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 23. "P23,PMCNT23 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. "P22,PMCNT22 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. "P21,PMCNT21 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. "P20,PMCNT20 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 19. "P19,PMCNT19 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. "P18,PMCNT18 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. "P17,PMCNT17 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. "P16,PMCNT16 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 15. "P15,PMCNT15 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. "P14,PMCNT14 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. "P13,PMCNT13 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. "P12,PMCNT12 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 11. "P11,PMCNT11 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. "P10,PMCNT10 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. "P9,PMCNT9 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. "P8,PMCNT8 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 7. "P7,PMCNT7 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. "P6,PMCNT6 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. "P5,PMCNT5 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. "P4,PMCNT4 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 3. "P3,PMCNT3 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. "P2,PMCNT2 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. "P1,PMCNT1 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. "P0,PMCNT0 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
group.quad SPR:0x309E2++0x00
|
|
line.long 0x00 "PMINTENCLR_EL1,Performance Monitor Interrupt Enable Clear"
|
|
bitfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 30. "P30,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 29. "P29,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 28. "P28,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
newline
|
|
eventfld.long 0x00 27. "P27,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 26. "P26,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 25. "P25,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 24. "P24,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
newline
|
|
eventfld.long 0x00 23. "P23,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 22. "P22,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 21. "P21,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 20. "P20,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
newline
|
|
eventfld.long 0x00 19. "P19,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 18. "P18,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 17. "P17,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 16. "P16,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
newline
|
|
eventfld.long 0x00 15. "P15,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 14. "P14,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 13. "P13,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 12. "P12,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
newline
|
|
eventfld.long 0x00 11. "P11,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 10. "P10,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 9. "P9,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 8. "P8,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
newline
|
|
eventfld.long 0x00 7. "P7,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 6. "P6,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 5. "P5,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 4. "P4,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
newline
|
|
eventfld.long 0x00 3. "P3,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 2. "P2,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 1. "P1,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. "P0,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
group.quad SPR:0x339E3++0x00
|
|
line.long 0x00 "PMOVSSET_EL0,Performance Monitor Overflow Flag Status Set Register"
|
|
group.quad SPR:(0x33E80+0x0)++0x00
|
|
line.long 0x00 "PMEVCNTR0_EL0,Performance Monitors Event Count Register 0"
|
|
group.quad SPR:(0x33EC0+0x0)++0x00
|
|
line.long 0x00 "PMEVTYPER0_EL0,Performance Monitors Selected Event Type Register 0"
|
|
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
|
|
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
|
|
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
|
|
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
|
|
newline
|
|
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
|
|
group.quad SPR:(0x33E80+0x1)++0x00
|
|
line.long 0x00 "PMEVCNTR1_EL0,Performance Monitors Event Count Register 1"
|
|
group.quad SPR:(0x33EC0+0x1)++0x00
|
|
line.long 0x00 "PMEVTYPER1_EL0,Performance Monitors Selected Event Type Register 1"
|
|
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
|
|
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
|
|
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
|
|
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
|
|
newline
|
|
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
|
|
group.quad SPR:(0x33E80+0x2)++0x00
|
|
line.long 0x00 "PMEVCNTR2_EL0,Performance Monitors Event Count Register 2"
|
|
group.quad SPR:(0x33EC0+0x2)++0x00
|
|
line.long 0x00 "PMEVTYPER2_EL0,Performance Monitors Selected Event Type Register 2"
|
|
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
|
|
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
|
|
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
|
|
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
|
|
newline
|
|
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
|
|
group.quad SPR:(0x33E80+0x3)++0x00
|
|
line.long 0x00 "PMEVCNTR3_EL0,Performance Monitors Event Count Register 3"
|
|
group.quad SPR:(0x33EC0+0x3)++0x00
|
|
line.long 0x00 "PMEVTYPER3_EL0,Performance Monitors Selected Event Type Register 3"
|
|
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
|
|
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
|
|
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
|
|
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
|
|
newline
|
|
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
|
|
group.quad SPR:(0x33E80+0x4)++0x00
|
|
line.long 0x00 "PMEVCNTR4_EL0,Performance Monitors Event Count Register 4"
|
|
group.quad SPR:(0x33EC0+0x4)++0x00
|
|
line.long 0x00 "PMEVTYPER4_EL0,Performance Monitors Selected Event Type Register 4"
|
|
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
|
|
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
|
|
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
|
|
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
|
|
newline
|
|
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
|
|
group.quad SPR:(0x33E80+0x5)++0x00
|
|
line.long 0x00 "PMEVCNTR5_EL0,Performance Monitors Event Count Register 5"
|
|
group.quad SPR:(0x33EC0+0x5)++0x00
|
|
line.long 0x00 "PMEVTYPER5_EL0,Performance Monitors Selected Event Type Register 5"
|
|
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
|
|
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
|
|
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
|
|
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
|
|
newline
|
|
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
|
|
group.quad SPR:0x33EF7++0x00
|
|
line.long 0x00 "PMCCFILTR_EL0,Performance Monitors Cycle Count Filter Register"
|
|
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
|
|
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
|
|
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
|
|
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
|
|
newline
|
|
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled"
|
|
tree.end
|
|
tree "System Timer Registers"
|
|
group.quad SPR:0x33E00++0x00
|
|
line.long 0x00 "CNTFRQ_EL0,Counter Frequency Register"
|
|
rgroup.quad spr:0x33E01++0x00
|
|
line.quad 0x00 "CNTPCT_EL0,Counter Physical Count Register"
|
|
group.quad SPR:0x30E10++0x00
|
|
line.long 0x00 "CNTKCTL_EL1,Timer PL1 Control Register"
|
|
bitfld.long 0x00 9. "EL0PTEN,Controls whether the physical timer registers are accessible from EL0 modes" "Not accessible,Accessible"
|
|
bitfld.long 0x00 8. "EL0VTEN,Controls whether the virtual timer registers are accessible from EL0 modes" "Not accessible,Accessible"
|
|
bitfld.long 0x00 4.--7. "EVNTI,Selects which bit of CNTVCT is the trigger for the event stream generated from the virtual counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 3. "EVNTDIR,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0"
|
|
newline
|
|
bitfld.long 0x00 2. "EVNTEN,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. "EL0VCTEN,Controls whether the virtual counter, CNTVCT, and the frequency register CNTFRQ, are accessible from EL0 modes" "Not accessible,Accessible"
|
|
bitfld.long 0x00 0. "EL0PCTEN,Controls whether the physical counter, CNTPCT, and the frequency register CNTFRQ, are accessible from EL0 modes" "Not accessible,Accessible"
|
|
group.quad SPR:0x33E20++0x00
|
|
line.long 0x00 "CNTP_TVAL_EL0,Counter-timer Physical Timer TimerValue register"
|
|
group.quad SPR:0x33E21++0x00
|
|
line.long 0x00 "CNTP_CTL_EL0,Counter PL1 Physical Timer Control Register"
|
|
bitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled"
|
|
group.quad SPR:0x33E30++0x00
|
|
line.long 0x00 "CNTV_TVAL_EL0,Counter PL1 Virtual Timer Value Register"
|
|
group.quad SPR:0x33E31++0x00
|
|
line.long 0x00 "CNTV_CTL_EL0,Counter PL1 Virtual Timer Control Register"
|
|
bitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled"
|
|
group.quad spr:0x33E02++0x00
|
|
line.quad 0x00 "CNTVCT_EL0,Counter Virtual Count Register"
|
|
group.quad spr:0x33E22++0x00
|
|
line.quad 0x00 "CNTP_CVAL_EL0,Counter PL1 Physical Compare Value Register"
|
|
group.quad spr:0x33E32++0x00
|
|
line.quad 0x00 "CNTV_CVAL_EL0,Counter PL1 Virtual Compare Value Register"
|
|
group.quad spr:0x34E03++0x00
|
|
line.quad 0x00 "CNTVOFF_EL2,Counter Virtual Offset Register"
|
|
group.quad SPR:0x34E10++0x00
|
|
line.long 0x00 "CNTHCTL_EL2,Counter Non-secure PL2 Control Register"
|
|
bitfld.long 0x00 4.--7. "EVNTI,Selects which bit is the trigger for the event stream generated from counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 3. "EVNTDIR,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0"
|
|
bitfld.long 0x00 2. "EVNTEN,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. "EL0VCTEN,Controls whether the virtual counter, CNTVCT, and the frequency register CNTFRQ, are accessible from EL0 modes" "Not accessible,Accessible"
|
|
bitfld.long 0x00 0. "EL0PCTEN,Controls whether the physical counter, CNTPCT, and the frequency register CNTFRQ, are accessible from EL0 modes" "Not accessible,Accessible"
|
|
group.quad SPR:0x34E20++0x00
|
|
line.long 0x00 "CNTHP_TVAL_EL2,Counter Non-secure PL2 Physical Timer Value Register"
|
|
group.quad SPR:0x34E21++0x00
|
|
line.long 0x00 "CNTHP_CTL_EL2,Counter Non-secure PL2 Physical Timer Control Register"
|
|
rbitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled"
|
|
group.quad spr:0x34E22++0x00
|
|
line.quad 0x00 "CNTHP_CVAL_EL2,Counter Non-secure PL2 Physical Compare Value Register"
|
|
group.quad SPR:0x37E20++0x00
|
|
line.long 0x00 "CNTPS_TVAL_EL1,Counter-timer Physical SecureTimer TimerValue register"
|
|
group.quad SPR:0x37E21++0x00
|
|
line.long 0x00 "CNTPS_CTL_EL1,Counter-timer Physical Secure Timer Control register"
|
|
rbitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled"
|
|
group.quad spr:0x37E22++0x00
|
|
line.quad 0x00 "CNTPS_CVAL_EL1,Counter-timer Physical Secure Timer CompareValue register"
|
|
tree.end
|
|
tree "Generic Interrupt Controller CPU Interface"
|
|
tree "AArch64 GIC Physical CPU Interface System Registers"
|
|
tree.open "Interrupt Controller Active Priorities Registers"
|
|
group.quad spr:0x30C84++0x00
|
|
line.quad 0x00 "ICC_AP0R0_EL1,Interrupt Controller Active Priorities Group 0 Register 0 (EL1)"
|
|
bitfld.quad 0x00 31. "P31,Group 0 interrupt active with priority level 31" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 30. "P30,Group 0 interrupt active with priority level 30" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 29. "P29,Group 0 interrupt active with priority level 29" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 28. "P28,Group 0 interrupt active with priority level 28" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 27. "P27,Group 0 interrupt active with priority level 27" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.quad 0x00 26. "P26,Group 0 interrupt active with priority level 26" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 25. "P25,Group 0 interrupt active with priority level 25" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 24. "P24,Group 0 interrupt active with priority level 24" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 23. "P23,Group 0 interrupt active with priority level 23" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 22. "P22,Group 0 interrupt active with priority level 22" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.quad 0x00 21. "P21,Group 0 interrupt active with priority level 21" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 20. "P20,Group 0 interrupt active with priority level 20" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 19. "P19,Group 0 interrupt active with priority level 19" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 18. "P18,Group 0 interrupt active with priority level 18" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 17. "P17,Group 0 interrupt active with priority level 17" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.quad 0x00 16. "P16,Group 0 interrupt active with priority level 16" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 15. "P15,Group 0 interrupt active with priority level 15" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 14. "P14,Group 0 interrupt active with priority level 14" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 13. "P13,Group 0 interrupt active with priority level 13" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 12. "P12,Group 0 interrupt active with priority level 12" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.quad 0x00 11. "P11,Group 0 interrupt active with priority level 11" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 10. "P10,Group 0 interrupt active with priority level 10" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 9. "P9,Group 0 interrupt active with priority level 9" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 8. "P8,Group 0 interrupt active with priority level 8" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 7. "P7,Group 0 interrupt active with priority level 7" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.quad 0x00 6. "P6,Group 0 interrupt active with priority level 6" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 5. "P5,Group 0 interrupt active with priority level 5" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 4. "P4,Group 0 interrupt active with priority level 4" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 3. "P3,Group 0 interrupt active with priority level 3" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 2. "P2,Group 0 interrupt active with priority level 2" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.quad 0x00 1. "P1,Group 0 interrupt active with priority level 1" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 0. "P0,Group 0 interrupt active with priority level 0" "No interrupt,Interrupt"
|
|
group.quad spr:0x30C90++0x00
|
|
line.quad 0x00 "ICC_AP1R0_EL1,Interrupt Controller Active Priorities Group 1 Register 0 (EL1)"
|
|
bitfld.quad 0x00 31. "P31,Group 1 interrupt active with priority level 31" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 30. "P30,Group 1 interrupt active with priority level 30" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 29. "P29,Group 1 interrupt active with priority level 29" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 28. "P28,Group 1 interrupt active with priority level 28" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 27. "P27,Group 1 interrupt active with priority level 27" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.quad 0x00 26. "P26,Group 1 interrupt active with priority level 26" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 25. "P25,Group 1 interrupt active with priority level 25" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 24. "P24,Group 1 interrupt active with priority level 24" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 23. "P23,Group 1 interrupt active with priority level 23" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 22. "P22,Group 1 interrupt active with priority level 22" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.quad 0x00 21. "P21,Group 1 interrupt active with priority level 21" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 20. "P20,Group 1 interrupt active with priority level 20" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 19. "P19,Group 1 interrupt active with priority level 19" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 18. "P18,Group 1 interrupt active with priority level 18" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 17. "P17,Group 1 interrupt active with priority level 17" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.quad 0x00 16. "P16,Group 1 interrupt active with priority level 16" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 15. "P15,Group 1 interrupt active with priority level 15" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 14. "P14,Group 1 interrupt active with priority level 14" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 13. "P13,Group 1 interrupt active with priority level 13" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 12. "P12,Group 1 interrupt active with priority level 12" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.quad 0x00 11. "P11,Group 1 interrupt active with priority level 11" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 10. "P10,Group 1 interrupt active with priority level 10" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 9. "P9,Group 1 interrupt active with priority level 9" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 8. "P8,Group 1 interrupt active with priority level 8" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 7. "P7,Group 1 interrupt active with priority level 7" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.quad 0x00 6. "P6,Group 1 interrupt active with priority level 6" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 5. "P5,Group 1 interrupt active with priority level 5" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 4. "P4,Group 1 interrupt active with priority level 4" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 3. "P3,Group 1 interrupt active with priority level 3" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 2. "P2,Group 1 interrupt active with priority level 2" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.quad 0x00 1. "P1,Group 1 interrupt active with priority level 1" "No interrupt,Interrupt"
|
|
bitfld.quad 0x00 0. "P0,Group 1 interrupt active with priority level 0" "No interrupt,Interrupt"
|
|
tree.end
|
|
newline
|
|
if (((per.q(spr:0x30CB6))&0x10000000000)==0x00)
|
|
wgroup.quad spr:0x30CB6++0x00
|
|
line.quad 0x00 "ICC_ASGI1R_EL1,Interrupt Controller Alias Software Generated Interrupt Group 1 Register"
|
|
hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3"
|
|
newline
|
|
bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self"
|
|
newline
|
|
hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2"
|
|
bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1"
|
|
hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,The set of PEs for which SGI interrupts will be generated"
|
|
else
|
|
wgroup.quad spr:0x30CB6++0x00
|
|
line.quad 0x00 "ICC_ASGI1R_EL1,Interrupt Controller Alias Software Generated Interrupt Group 1 Register"
|
|
newline
|
|
bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self"
|
|
newline
|
|
bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
endif
|
|
group.quad spr:0x30C83++0x00
|
|
line.quad 0x00 "ICC_BPR0_EL1,Interrupt Controller Binary Point Register 0"
|
|
bitfld.quad 0x00 0.--2. "BINARYPOINT,Interrupt Priority Field Control and Interrupt Preemption Control" "[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0],No preemption-[7:0]"
|
|
group.quad spr:0x30CC3++0x00
|
|
line.quad 0x00 "ICC_BPR1_EL1,Interrupt Controller Binary Point Register 1"
|
|
bitfld.quad 0x00 0.--2. "BINARYPOINT,Interrupt Priority Field Control and Interrupt Preemption Control" "Reserved,[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0]"
|
|
group.quad spr:0x30CC4++0x00
|
|
line.quad 0x00 "ICC_CTLR_EL1,Interrupt Controller Control Register (EL1)"
|
|
rbitfld.quad 0x00 19. "EXTRANGE,Extended INTID range" "Reserved,Supported"
|
|
rbitfld.quad 0x00 18. "RSS,Range selector support" "0 - 15,0 - 255"
|
|
newline
|
|
rbitfld.quad 0x00 15. "A3V,Affinity 3 Valid" "Zero,Non-zero"
|
|
rbitfld.quad 0x00 14. "SEIS,Indicates whether the CPU interface supports local generation of SEIs" "Not supported,Supported"
|
|
rbitfld.quad 0x00 11.--13. "IDBITS,The number of physical interrupt identifier bits supported" "16 bits,24 bits,?..."
|
|
newline
|
|
rbitfld.quad 0x00 8.--10. "PRIBITS,The number of priority bits implemented minus one" "0,1,2,3,4,5,6,7"
|
|
bitfld.quad 0x00 6. "PMHE,Controls whether the priority mask Register is used as a hint for interrupt distribution" "Disabled,Enabled"
|
|
bitfld.quad 0x00 1. "EOIMODE,Controls whether a write to an End of Interrupt Register also deactivates the interrupt" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 0. "CBPR,Controls whether the same Register is used for interrupt preemption of both Group 0 and Group 1 interrupts" "Separate registers,Same Register"
|
|
group.quad spr:0x36CC4++0x00
|
|
line.quad 0x00 "ICC_CTLR_EL3,Interrupt Controller Control Register (EL3)"
|
|
rbitfld.quad 0x00 19. "ExtRange,Extended INTID range" "Not supported,Supported"
|
|
rbitfld.quad 0x00 18. "RSS,Range Selector Support" "0 - 15,0 - 255"
|
|
newline
|
|
rbitfld.quad 0x00 17. "NDS,Disable Security not supported" "Supported,Not supported"
|
|
rbitfld.quad 0x00 15. "A3V,Affinity 3 Valid" "Not supported,Supported"
|
|
rbitfld.quad 0x00 14. "SEIS,Indicates whether the CPU interface supports generation of SEIs" "Not supported,Supported"
|
|
newline
|
|
rbitfld.quad 0x00 11.--13. "IDBITS,The number of physical interrupt identifier bits supported" "16 bits,24 bits,?..."
|
|
rbitfld.quad 0x00 8.--10. "PRIBITS,The number of priority bits implemented minus one" "0,1,2,3,4,5,6,7"
|
|
bitfld.quad 0x00 6. "PMHE,Priority Mask Hint Enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 4. "EOIMODE_EL1NS,Controls whether a write to an End of Interrupt Register also deactivates the interrupt (Non-secure EL1 and EL2)" "Priority drop/Deactivation,Priority drop"
|
|
bitfld.quad 0x00 3. "EOIMODE_EL1S,Controls whether a write to an End of Interrupt Register also deactivates the interrupt (Secure EL1)" "Priority drop/Deactivation,Priority drop"
|
|
bitfld.quad 0x00 2. "EOIMODE_EL3,Controls whether a write to an End of Interrupt Register also deactivates the interrupt (EL3)" "Enabled,Disabled"
|
|
newline
|
|
bitfld.quad 0x00 1. "CBPR_EL1NS,Controls whether the same Register is used for interrupt preemption of both Group 0 and Group 1 Non-secure interrupts at EL1" "Separate registers,Same Register"
|
|
bitfld.quad 0x00 0. "CBPR_EL1S,Controls whether the same Register is used for interrupt preemption of both Group 0 and Group 1 Secure interrupts in Secure non-Monitor modes" "Separate registers,Same Register"
|
|
if (((per.q(spr:0x30CC4))&0x3800)==0x00)
|
|
wgroup.quad spr:0x30CB1++0x00
|
|
line.quad 0x00 "ICC_DIR_EL1,Interrupt Controller Deactivate Interrupt Register"
|
|
hexmask.quad.word 0x00 0.--15. 1. "INTID,The INTID of the interrupt to be deactivated"
|
|
wgroup.quad spr:0x30C81++0x00
|
|
line.quad 0x00 "ICC_EOIR0_EL1,Interrupt Controller End Of Interrupt Register 0"
|
|
hexmask.quad.word 0x00 0.--15. 1. "INTID,The INTID from the corresponding ICC_IAR0 access"
|
|
wgroup.quad spr:0x30CC1++0x00
|
|
line.quad 0x00 "ICC_EOIR1_EL1,Interrupt Controller End Of Interrupt Register 1"
|
|
hexmask.quad.word 0x00 0.--15. 1. "INTID,The INTID from the corresponding ICC_IAR1 access"
|
|
rgroup.quad spr:0x30C82++0x00
|
|
line.quad 0x00 "ICC_HPPIR0_EL1,Interrupt Controller Highest Priority Pending Interrupt Register 0"
|
|
hexmask.quad.word 0x00 0.--15. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the currentSecurity state and Exception level"
|
|
rgroup.quad spr:0x30CC2++0x00
|
|
line.quad 0x00 "ICC_HPPIR1_EL1,Interrupt Controller Highest Priority Pending Interrupt Register 1"
|
|
hexmask.quad.word 0x00 0.--15. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the currentSecurity state and Exception level"
|
|
elif (((per.q(spr:0x30CC4))&0x3800)==0x800)
|
|
wgroup.quad spr:0x30CB1++0x00
|
|
line.quad 0x00 "ICC_DIR_EL1,Interrupt Controller Deactivate Interrupt Register"
|
|
hexmask.quad.tbyte 0x00 0.--23. 1. "INTID,The INTID of the interrupt to be deactivated"
|
|
wgroup.quad spr:0x30C81++0x00
|
|
line.quad 0x00 "ICC_EOIR0_EL1,Interrupt Controller End Of Interrupt Register 0"
|
|
hexmask.quad.tbyte 0x00 0.--23. 1. "INTID,The INTID from the corresponding ICC_IAR0 access"
|
|
wgroup.quad spr:0x30CC1++0x00
|
|
line.quad 0x00 "ICC_EOIR1_EL1,Interrupt Controller End Of Interrupt Register 1"
|
|
hexmask.quad.tbyte 0x00 0.--23. 1. "INTID,The INTID from the corresponding ICC_IAR1 access"
|
|
rgroup.quad spr:0x30C82++0x00
|
|
line.quad 0x00 "ICC_HPPIR0_EL1,Interrupt Controller Highest Priority Pending Interrupt Register 0"
|
|
hexmask.quad.tbyte 0x00 0.--23. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the currentSecurity state and Exception level"
|
|
rgroup.quad spr:0x30CC2++0x00
|
|
line.quad 0x00 "ICC_HPPIR1_EL1,Interrupt Controller Highest Priority Pending Interrupt Register 1"
|
|
hexmask.quad.tbyte 0x00 0.--23. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the currentSecurity state and Exception level"
|
|
endif
|
|
hgroup.quad spr:0x30C80++0x00
|
|
hide.long 0x00 "ICC_IAR0_EL1,Interrupt Acknowledge Register 0"
|
|
in
|
|
hgroup.quad spr:0x30CC0++0x00
|
|
hide.long 0x00 "ICC_IAR1_EL1,Interrupt Acknowledge Register 1"
|
|
in
|
|
newline
|
|
group.quad SPR:0x30CC6++0x00
|
|
line.long 0x00 "ICC_IGRPEN0_EL1,Interrupt Group Enable Register 0"
|
|
bitfld.long 0x00 0. "ENABLE,Enable" "Disabled,Enabled"
|
|
group.quad SPR:0x30CC7++0x00
|
|
line.long 0x00 "ICC_IGRPEN1_EL1,Interrupt Group Enable Register 1 (EL1)"
|
|
bitfld.long 0x00 0. "ENABLE,Enable" "Disabled,Enabled"
|
|
group.quad SPR:0x36CC7++0x00
|
|
line.long 0x00 "ICC_IGRPEN1_EL3,Interrupt Group Enable Register 1 (EL3)"
|
|
bitfld.long 0x00 1. "ENABLEGRP1S,Enable Group 1 interrupts for the Secure state" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. "ENABLEGRP1NS,Enable Group 1 interrupts for the Non-secure state" "Disabled,Enabled"
|
|
group.quad SPR:0x30460++0x00
|
|
line.long 0x00 "ICC_PMR_EL1,Priority Mask Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "PRIORITY,Priority mask level for the CPU interface"
|
|
rgroup.quad SPR:0x30CB3++0x00
|
|
line.long 0x00 "ICC_RPR_EL1,Running Priority Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "PRIORITY,Current running priority on the CPU interface"
|
|
if (((per.q(spr:0x30CB7))&0x10000000000)==0x00)
|
|
wgroup.quad spr:0x30CB7++0x00
|
|
line.quad 0x00 "ICC_SGI0R_EL1,Interrupt Controller Software Generated Interrupt Group 0 Register"
|
|
hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3"
|
|
newline
|
|
bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self"
|
|
newline
|
|
hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2"
|
|
bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1"
|
|
hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,The set of PEs for which SGI interrupts will be generated."
|
|
else
|
|
wgroup.quad spr:0x30CB7++0x00
|
|
line.quad 0x00 "ICC_SGI0R_EL1,Interrupt Controller Software Generated Interrupt Group 0 Register"
|
|
newline
|
|
bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self"
|
|
newline
|
|
bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
endif
|
|
if (((per.q(spr:0x30CB5))&0x10000000000)==0x00)
|
|
wgroup.quad spr:0x30CB5++0x00
|
|
line.quad 0x00 "ICC_SGI1R_EL1,Interrupt Controller Software Generated Interrupt Group 0 Register"
|
|
hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3"
|
|
newline
|
|
bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self"
|
|
newline
|
|
hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2"
|
|
bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1"
|
|
hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,The set of PEs for which SGI interrupts will be generated"
|
|
else
|
|
wgroup.quad spr:0x30CB5++0x00
|
|
line.quad 0x00 "ICC_SGI1R_EL1,Interrupt Controller Software Generated Interrupt Group 0 Register"
|
|
newline
|
|
bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self"
|
|
newline
|
|
bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
endif
|
|
group.quad SPR:0x30CC5++0x00
|
|
line.long 0x00 "ICC_SRE_EL1,System Register Enable Register for EL1"
|
|
bitfld.long 0x00 2. "DIB,Disable IRQ bypass" "No,Yes"
|
|
bitfld.long 0x00 1. "DFB,Disable FIQ bypass" "No,Yes"
|
|
bitfld.long 0x00 0. "SRE,System Register Enable" "Disabled,Enabled"
|
|
group.quad SPR:0x34C95++0x00
|
|
line.long 0x00 "ICC_SRE_EL2,System Register Enable Register for EL2"
|
|
bitfld.long 0x00 3. "ENABLE,Enable lower exception level access" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. "DIB,Disable IRQ bypass" "No,Yes"
|
|
bitfld.long 0x00 1. "DFB,Disable FIQ bypass" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 0. "SRE,System Register Enable" "Disabled,Enabled"
|
|
group.quad SPR:0x36CC5++0x00
|
|
line.long 0x00 "ICC_SRE_EL3,System Register Enable Register for EL3"
|
|
bitfld.long 0x00 3. "ENABLE,Enable lower exception level access" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. "DIB,Disable IRQ bypass" "No,Yes"
|
|
bitfld.long 0x00 1. "DFB,Disable FIQ bypass" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 0. "SRE,System Register Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "AArch64 Virtual Interface Control System Registers"
|
|
tree.open "Hypervisor Active Priorities Registers"
|
|
group.quad SPR:0x34C80++0x00
|
|
line.long 0x00 "ICH_AP0R0_EL2,Interrupt Controller Hypervisor Active Priorities Group 0 Register 0"
|
|
bitfld.long 0x00 31. "P31,Group 0 interrupt active with priority level 31" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 30. "P30,Group 0 interrupt active with priority level 30" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 29. "P29,Group 0 interrupt active with priority level 29" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 28. "P28,Group 0 interrupt active with priority level 28" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 27. "P27,Group 0 interrupt active with priority level 27" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 26. "P26,Group 0 interrupt active with priority level 26" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 25. "P25,Group 0 interrupt active with priority level 25" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 24. "P24,Group 0 interrupt active with priority level 24" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 23. "P23,Group 0 interrupt active with priority level 23" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 22. "P22,Group 0 interrupt active with priority level 22" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 21. "P21,Group 0 interrupt active with priority level 21" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 20. "P20,Group 0 interrupt active with priority level 20" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 19. "P19,Group 0 interrupt active with priority level 19" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 18. "P18,Group 0 interrupt active with priority level 18" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 17. "P17,Group 0 interrupt active with priority level 17" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 16. "P16,Group 0 interrupt active with priority level 16" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 15. "P15,Group 0 interrupt active with priority level 15" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 14. "P14,Group 0 interrupt active with priority level 14" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 13. "P13,Group 0 interrupt active with priority level 13" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. "P12,Group 0 interrupt active with priority level 12" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 11. "P11,Group 0 interrupt active with priority level 11" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 10. "P10,Group 0 interrupt active with priority level 10" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 9. "P9,Group 0 interrupt active with priority level 9" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. "P8,Group 0 interrupt active with priority level 8" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 7. "P7,Group 0 interrupt active with priority level 7" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. "P6,Group 0 interrupt active with priority level 6" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. "P5,Group 0 interrupt active with priority level 5" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Group 0 interrupt active with priority level 4" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. "P3,Group 0 interrupt active with priority level 3" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. "P2,Group 0 interrupt active with priority level 2" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Group 0 interrupt active with priority level 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. "P0,Group 0 interrupt active with priority level 0" "No interrupt,Interrupt"
|
|
if (CORENAME()=="CORTEXA53")
|
|
group.quad SPR:0x34C90++0x00
|
|
line.long 0x00 "ICH_AP1R0_EL2,Interrupt Controller Hypervisor Active Priorities Group 1 Register 0"
|
|
bitfld.long 0x00 31. "P31,Group 1 interrupt active with priority level 31" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 30. "P30,Group 1 interrupt active with priority level 30" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 29. "P29,Group 1 interrupt active with priority level 29" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 28. "P28,Group 1 interrupt active with priority level 28" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 27. "P27,Group 1 interrupt active with priority level 27" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 26. "P26,Group 1 interrupt active with priority level 26" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 25. "P25,Group 1 interrupt active with priority level 25" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 24. "P24,Group 1 interrupt active with priority level 24" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 23. "P23,Group 1 interrupt active with priority level 23" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 22. "P22,Group 1 interrupt active with priority level 22" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 21. "P21,Group 1 interrupt active with priority level 21" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 20. "P20,Group 1 interrupt active with priority level 20" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 19. "P19,Group 1 interrupt active with priority level 19" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 18. "P18,Group 1 interrupt active with priority level 18" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 17. "P17,Group 1 interrupt active with priority level 17" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 16. "P16,Group 1 interrupt active with priority level 16" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 15. "P15,Group 1 interrupt active with priority level 15" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 14. "P14,Group 1 interrupt active with priority level 14" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 13. "P13,Group 1 interrupt active with priority level 13" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. "P12,Group 1 interrupt active with priority level 12" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 11. "P11,Group 1 interrupt active with priority level 11" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 10. "P10,Group 1 interrupt active with priority level 10" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 9. "P9,Group 1 interrupt active with priority level 9" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. "P8,Group 1 interrupt active with priority level 8" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 7. "P7,Group 1 interrupt active with priority level 7" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. "P6,Group 1 interrupt active with priority level 6" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. "P5,Group 1 interrupt active with priority level 5" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Group 1 interrupt active with priority level 4" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. "P3,Group 1 interrupt active with priority level 3" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. "P2,Group 1 interrupt active with priority level 2" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Group 1 interrupt active with priority level 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. "P0,Group 1 interrupt active with priority level 0" "No interrupt,Interrupt"
|
|
endif
|
|
tree.end
|
|
newline
|
|
rgroup.quad SPR:0x34CB3++0x00
|
|
line.long 0x00 "ICH_EISR_EL2,Interrupt Controller End of Interrupt Status Register"
|
|
bitfld.long 0x00 3. "STATUS3,EOI maintenance interrupt status bit for List register 3" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. "STATUS2,EOI maintenance interrupt status bit for List register 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. "STATUS1,EOI maintenance interrupt status bit for List register 1" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 0. "STATUS0,EOI maintenance interrupt status bit for List register 0" "No interrupt,Interrupt"
|
|
rgroup.quad SPR:0x34CB5++0x00
|
|
line.long 0x00 "ICH_ELRSR_EL2,Interrupt Controller Empty List Register Status Register"
|
|
bitfld.long 0x00 3. "STATUS3,Status bit for List register 3" "Interrupt,No interrupt"
|
|
bitfld.long 0x00 2. "STATUS2,Status bit for List register 2" "Interrupt,No interrupt"
|
|
bitfld.long 0x00 1. "STATUS1,Status bit for List register 1" "Interrupt,No interrupt"
|
|
newline
|
|
bitfld.long 0x00 0. "STATUS0,Status bit for List register 0" "Interrupt,No interrupt"
|
|
group.quad SPR:0x34CB0++0x00
|
|
line.long 0x00 "ICH_HCR_EL2,Interrupt Controller Hypervisor Control Register"
|
|
bitfld.long 0x00 27.--31. "EOICOUNT,This field is incremented whenever a successful write to a virtual EOIR or DIR register would have resulted in a virtual interrupt deactivation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,?..."
|
|
bitfld.long 0x00 14. "TDIR,Trap Non-secure EL1 writes to ICC_DIR" "Not trapped,Trapped"
|
|
bitfld.long 0x00 13. "TSEI,Trap all locally generated SEIs" "Not trapped,Trapped"
|
|
newline
|
|
bitfld.long 0x00 12. "TALL1,Trap all Non-secure EL1 accesses to ICC_* System registers for Group 1 interrupts to EL2" "Not trapped,Trapped"
|
|
bitfld.long 0x00 11. "TALL0,Trap all Non-secure EL1 accesses to ICC_* System registers for Group 0 interrupts to EL2" "Not trapped,Trapped"
|
|
bitfld.long 0x00 10. "TC,Trap all Non-secure EL1 accesses to System registers that are common to Group 0 and Group 1 to EL2" "Not trapped,Trapped"
|
|
newline
|
|
bitfld.long 0x00 7. "VGRP1DIE,VM Group 1 Disabled Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. "VGRP1EIE,VM Group 1 Enabled Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. "VGRP0DIE,VM Group 0 Disabled Interrupt Enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 4. "VGRP0EIE,VM Group 0 Enabled Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. "NPIE,No Pending Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. "LRENPIE,List Register Entry Not Present Interrupt Enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. "UIE,Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. "EN,Global enable bit for the virtual CPU interface" "Disabled,Enabled"
|
|
if (((d.q(spr:(0x34CC0+0x0)))&0x2000000000000000)==0x00)
|
|
group.quad spr:(0x34CC0+0x0)++0x00
|
|
line.quad 0x00 "ICH_LR0_EL2,Interrupt Controller List Register 0"
|
|
bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
|
|
bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware"
|
|
bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1"
|
|
newline
|
|
hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt"
|
|
bitfld.quad 0x00 41. "PINTID_EOI,End of Interrupt" "Interrupt,No interrupt"
|
|
hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
|
|
else
|
|
group.quad spr:(0x34CC0+0x0)++0x00
|
|
line.quad 0x00 "ICH_LR0_EL2,Interrupt Controller List Register 0"
|
|
bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
|
|
bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware"
|
|
bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1"
|
|
newline
|
|
hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt"
|
|
hexmask.quad.word 0x00 32.--41. 1. "PINTID,Physical INTID, for hardware interrupts"
|
|
hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
|
|
endif
|
|
if (((d.q(spr:(0x34CC0+0x1)))&0x2000000000000000)==0x00)
|
|
group.quad spr:(0x34CC0+0x1)++0x00
|
|
line.quad 0x00 "ICH_LR1_EL2,Interrupt Controller List Register 1"
|
|
bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
|
|
bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware"
|
|
bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1"
|
|
newline
|
|
hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt"
|
|
bitfld.quad 0x00 41. "PINTID_EOI,End of Interrupt" "Interrupt,No interrupt"
|
|
hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
|
|
else
|
|
group.quad spr:(0x34CC0+0x1)++0x00
|
|
line.quad 0x00 "ICH_LR1_EL2,Interrupt Controller List Register 1"
|
|
bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
|
|
bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware"
|
|
bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1"
|
|
newline
|
|
hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt"
|
|
hexmask.quad.word 0x00 32.--41. 1. "PINTID,Physical INTID, for hardware interrupts"
|
|
hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
|
|
endif
|
|
if (((d.q(spr:(0x34CC0+0x2)))&0x2000000000000000)==0x00)
|
|
group.quad spr:(0x34CC0+0x2)++0x00
|
|
line.quad 0x00 "ICH_LR2_EL2,Interrupt Controller List Register 2"
|
|
bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
|
|
bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware"
|
|
bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1"
|
|
newline
|
|
hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt"
|
|
bitfld.quad 0x00 41. "PINTID_EOI,End of Interrupt" "Interrupt,No interrupt"
|
|
hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
|
|
else
|
|
group.quad spr:(0x34CC0+0x2)++0x00
|
|
line.quad 0x00 "ICH_LR2_EL2,Interrupt Controller List Register 2"
|
|
bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
|
|
bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware"
|
|
bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1"
|
|
newline
|
|
hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt"
|
|
hexmask.quad.word 0x00 32.--41. 1. "PINTID,Physical INTID, for hardware interrupts"
|
|
hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
|
|
endif
|
|
if (((d.q(spr:(0x34CC0+0x3)))&0x2000000000000000)==0x00)
|
|
group.quad spr:(0x34CC0+0x3)++0x00
|
|
line.quad 0x00 "ICH_LR3_EL2,Interrupt Controller List Register 3"
|
|
bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
|
|
bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware"
|
|
bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1"
|
|
newline
|
|
hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt"
|
|
bitfld.quad 0x00 41. "PINTID_EOI,End of Interrupt" "Interrupt,No interrupt"
|
|
hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
|
|
else
|
|
group.quad spr:(0x34CC0+0x3)++0x00
|
|
line.quad 0x00 "ICH_LR3_EL2,Interrupt Controller List Register 3"
|
|
bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
|
|
bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware"
|
|
bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1"
|
|
newline
|
|
hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt"
|
|
hexmask.quad.word 0x00 32.--41. 1. "PINTID,Physical INTID, for hardware interrupts"
|
|
hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
|
|
endif
|
|
rgroup.quad SPR:0x34CB2++0x00
|
|
line.long 0x00 "ICH_MISR_EL2,Interrupt Controller Maintenance Interrupt State Register"
|
|
bitfld.long 0x00 7. "VGRP1D,VPE Group 1 Disabled" "Not asserted,Asserted"
|
|
bitfld.long 0x00 6. "VGRP1E,VPE Group 1 Enabled" "Not asserted,Asserted"
|
|
bitfld.long 0x00 5. "VGRP0D,VPE Group 0 Disabled" "Not asserted,Asserted"
|
|
newline
|
|
bitfld.long 0x00 4. "VGRP0E,VPE Group 0 Enabled" "Not asserted,Asserted"
|
|
bitfld.long 0x00 3. "NP,No Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 2. "LRENP,List Register Entry Not Present" "Not asserted,Asserted"
|
|
newline
|
|
bitfld.long 0x00 1. "U,Underflow" "Not asserted,Asserted"
|
|
bitfld.long 0x00 0. "EOI,End Of Interrupt" "Not asserted,Asserted"
|
|
group.quad SPR:0x34CB7++0x00
|
|
line.long 0x00 "ICH_VMCR_EL2,Interrupt Controller Virtual Machine Control Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "VPMR,The priority mask level for the virtual CPU interface"
|
|
bitfld.long 0x00 21.--23. "VBPR0,Virtual Binary Point Register Group 0" "[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0],No preemption-[7:0]"
|
|
bitfld.long 0x00 18.--20. "VBPR1,Virtual Binary Point Register, Group 1" ",[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0]"
|
|
newline
|
|
bitfld.long 0x00 9. "VEOIM,Controls whether a write to an End of Interrupt register also deactivates the virtual interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. "VCBPR,Virtual Common Binary Point Register" "Separate registers,Same register"
|
|
bitfld.long 0x00 3. "VFIQEN,Virtual FIQ enable" "Virtual IRQs,Virtual FIQs"
|
|
newline
|
|
bitfld.long 0x00 2. "VACKCTL,Virtual FIQ enable" "1022,Corresponding interrupt"
|
|
bitfld.long 0x00 1. "VENG1,Virtual Group 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. "VENG0,Virtual Group 0 interrupt enable" "Disabled,Enabled"
|
|
group.quad SPR:0x34C94++0x00
|
|
line.long 0x00 "ICH_VSEIR_EL2,Interrupt Controller Virtual System Error Interrupt Register"
|
|
rgroup.quad SPR:0x34CB1++0x00
|
|
line.long 0x00 "ICH_VTR_EL2,Interrupt Controller VGIC Type Register"
|
|
bitfld.long 0x00 29.--31. "PRIBITS,The number of priority bits implemented minus one" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 26.--28. "PREBITS,The number of virtual preemption bits implemented, minus one" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 23.--25. "IDBITS,The number of physical interrupt identifier bits supported" "16 bits,24 bits,?..."
|
|
newline
|
|
bitfld.long 0x00 22. "SEIS,Indicates whether the CPU interface supports local generation of SEIs" "Not supported,Supported"
|
|
bitfld.long 0x00 21. "A3V,Affinity 3 Valid" "Only zero values supported,Non-zero values supported"
|
|
bitfld.long 0x00 20. "NV4,GICv4 direct injection of virtual interrupts not supported" "Supported,Not supported"
|
|
newline
|
|
bitfld.long 0x00 19. "TDS,Separate trapping of Non-secure EL1 writes to ICV_DIR_EL1 supported" "Not supported,Supported"
|
|
bitfld.long 0x00 0.--4. "LISTREGS,The number of implemented List registers, minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
tree.end
|
|
tree.end
|
|
tree "Debug Registers"
|
|
rgroup.quad SPR:0x23010++0x00
|
|
line.long 0x00 "MDCCSR_EL0,Debug Comms Channel Status Register"
|
|
bitfld.long 0x00 30. "RXFULL,DBGDTRRX Register full" "Empty,Full"
|
|
bitfld.long 0x00 29. "TXFULL,DBGDTRTX Register full" "Empty,Full"
|
|
group.quad SPR:0x20020++0x00
|
|
line.long 0x00 "MDCCINT_EL1,Debug Comms Channel Interrupt Enable register"
|
|
bitfld.long 0x00 30. "RX,DCC interrupt enable controls" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. "TX,DCC interrupt enable controls" "Disabled,Enabled"
|
|
group.quad spr:0x23040++0x00
|
|
line.quad 0x00 "DBGDTR_EL0,Half Duplex Data Transfer Register"
|
|
rgroup.quad SPR:0x23050++0x00
|
|
line.long 0x00 "DBGDTRRX_EL0,Full Duplex Receive Data Transfer Register"
|
|
wgroup.quad SPR:0x23050++0x00
|
|
line.long 0x00 "DBGDTRTX_EL0,Full Duplex Transmit Data Transfer Register"
|
|
group.quad SPR:0x24070++0x00
|
|
line.long 0x00 "DBGVCR32_EL2,Vector Catch Register"
|
|
bitfld.long 0x00 31. "NSF,FIQ vector catch enable in Non-secure state" "Low,High"
|
|
bitfld.long 0x00 30. "NSI,IRQ vector catch enable in Non-secure state" "Low,High"
|
|
bitfld.long 0x00 28. "NSD,Data Abort vector catch enable in Non-secure state" "Low,High"
|
|
bitfld.long 0x00 27. "NSP,Prefetch Abort vector catch enable in Non-secure state" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 26. "NSS,Supervisor Call (SVC) vector catch enable in Non-secure state" "Low,High"
|
|
bitfld.long 0x00 25. "NSU,Undefined Instruction vector catch enable in Non-secure state" "Low,High"
|
|
bitfld.long 0x00 7. "SF,FIQ vector catch enable in Secure state" "Low,High"
|
|
bitfld.long 0x00 6. "SI,IRQ vector catch enable in Secure state" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 4. "SD,Data Abort vector catch enable in Secure state" "Low,High"
|
|
bitfld.long 0x00 3. "SP,Prefetch Abort vector catch enable in Secure state" "Low,High"
|
|
bitfld.long 0x00 2. "SS,Supervisor Call (SVC) vector catch enable in Secure state" "Low,High"
|
|
bitfld.long 0x00 1. "SU,Undefined Instruction vector catch enable in Secure state" "Low,High"
|
|
group.quad SPR:0x20002++0x00
|
|
line.long 0x00 "OSDTRRX_EL1,OS Lock Data Transfer Register"
|
|
group.quad SPR:0x20022++0x00
|
|
line.long 0x00 "MDSCR_EL1,Monitor Debug System Control Register"
|
|
bitfld.long 0x00 30. "RXFULL,DBGDTRRX Register full" "Empty,Full"
|
|
bitfld.long 0x00 29. "TXFULL,DBGDTRTX Register full" "Empty,Full"
|
|
bitfld.long 0x00 27. "RXO,Save/restore bit" "Low,High"
|
|
bitfld.long 0x00 26. "TXU,Save/restore bit" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 22.--23. "INTDIS,Save/restore bits" "0,1,2,3"
|
|
bitfld.long 0x00 21. "TDA,Save/restore bit" "Low,High"
|
|
bitfld.long 0x00 15. "MDE,Monitor debug events" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. "HDE,Save/restore bit" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 13. "KDE,Local (kernel) debug enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. "TDCC,Trap accesses to the debug comms channel in EL0" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. "ERR,Save/restore bit" "Low,High"
|
|
bitfld.long 0x00 0. "SS,Software step control" "Disabled,Enabled"
|
|
group.quad SPR:0x20032++0x00
|
|
line.long 0x00 "OSDTRTX_EL1,OS Lock Data Transfer Register"
|
|
group.quad SPR:0x20062++0x00
|
|
line.long 0x00 "OSECCR_EL1,OS Lock Exception Catch Control Register"
|
|
rgroup.quad spr:0x20100++0x00
|
|
line.quad 0x00 "MDRAR_EL1,Debug ROM Address Register"
|
|
hexmask.quad 0x00 12.--47. 0x1000 "ROMADDR,ROM base physical address"
|
|
bitfld.quad 0x00 0.--1. "VALID,ROM address valid" "Invalid,Reserved,Reserved,Valid"
|
|
wgroup.quad SPR:0x20104++0x00
|
|
line.long 0x00 "OSLAR_EL1,OS Lock Access Register"
|
|
bitfld.long 0x00 0. "OSLK,OS lock" "Unlock,Lock"
|
|
rgroup.quad SPR:0x20114++0x00
|
|
line.long 0x00 "OSLSR_EL1,OS Lock Status Register"
|
|
bitfld.long 0x00 2. "NTT,Not 32-bit access" "Low,High"
|
|
bitfld.long 0x00 1. "OSLK,OS lock status" "Not locked,Locked"
|
|
bitfld.long 0x00 0. 3. "OSLM,OS lock model implemented field" "Reserved,Reserved,Impelemented,?..."
|
|
group.quad SPR:0x20134++0x00
|
|
line.long 0x00 "OSDLR_EL1,OS Double-lock Register"
|
|
bitfld.long 0x00 0. "DLK,OS double-lock control" "Not locked,Locked"
|
|
group.quad SPR:0x20144++0x00
|
|
line.long 0x00 "DBGPRCR_EL1,Debug Power/Reset Control Register"
|
|
bitfld.long 0x00 0. "CORENPDRQ,Core no powerdown request" "No,Yes"
|
|
group.quad SPR:0x20786++0x00
|
|
line.long 0x00 "DBGCLAIMSET_EL1,Claim Tag register Set"
|
|
bitfld.long 0x0 7. "CT7,Claim Tag 7 Set" "Not set,Set"
|
|
bitfld.long 0x0 6. "CT6,Claim Tag 6 Set" "Not set,Set"
|
|
bitfld.long 0x0 5. "CT5,Claim Tag 5 Set" "Not set,Set"
|
|
bitfld.long 0x0 4. "CT4,Claim Tag 4 Set" "Not set,Set"
|
|
newline
|
|
bitfld.long 0x0 3. "CT3,Claim Tag 3 Set" "Not set,Set"
|
|
bitfld.long 0x0 2. "CT2,Claim Tag 2 Set" "Not set,Set"
|
|
bitfld.long 0x0 1. "CT1,Claim Tag 1 Set" "Not set,Set"
|
|
bitfld.long 0x0 0. "CT0,Claim Tag 0 Set" "Not set,Set"
|
|
group.quad SPR:0x20796++0x00
|
|
line.long 0x00 "DBGCLAIMCLR_EL1,Claim Tag register Clear"
|
|
bitfld.long 0x0 7. "CT7,Claim Tag 7 Clear" "Not cleared,Cleared"
|
|
bitfld.long 0x0 6. "CT6,Claim Tag 6 Clear" "Not cleared,Cleared"
|
|
bitfld.long 0x0 5. "CT5,Claim Tag 5 Clear" "Not cleared,Cleared"
|
|
bitfld.long 0x0 4. "CT4,Claim Tag 4 Clear" "Not cleared,Cleared"
|
|
newline
|
|
bitfld.long 0x0 3. "CT3,Claim Tag 3 Clear" "Not cleared,Cleared"
|
|
bitfld.long 0x0 2. "CT2,Claim Tag 2 Clear" "Not cleared,Cleared"
|
|
bitfld.long 0x0 1. "CT1,Claim Tag 1 Clear" "Not cleared,Cleared"
|
|
bitfld.long 0x0 0. "CT0,Claim Tag 0 Clear" "Not cleared,Cleared"
|
|
rgroup.quad SPR:0x207E6++0x00
|
|
line.long 0x00 "DBGAUTHSTATUS_EL1,Authentication Status register"
|
|
bitfld.long 0x00 7. "SNI,Secure non-invasive debug implemented" "Not implemented,Implemented"
|
|
bitfld.long 0x00 6. "SNE,Secure non-invasive debug enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. "SI,Secure invasive debug implemented" "Not implemented,Implemented"
|
|
bitfld.long 0x00 4. "SE,Secure invasive debug enabled" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 3. "NSNI,Non-secure non-invasive debug implemented" "Not implemented,Implemented"
|
|
bitfld.long 0x00 2. "NSNE,Non-secure non-invasive debug enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. "NSI,Non-secure invasive debug implemented" "Not implemented,Implemented"
|
|
bitfld.long 0x00 0. "NSE,Non-secure invasive debug enabled" "Disabled,Enabled"
|
|
group.quad SPR:0x33450++0x00
|
|
line.long 0x00 "DSPSR_EL0,Debug Saved Processor Status Register"
|
|
group.quad spr:0x33451++0x00
|
|
line.quad 0x00 "DLR_EL0,Debug Link Register"
|
|
tree.end
|
|
tree "Breakpoint Registers"
|
|
if (((d.l(spr:(0x20005+0x0)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000))
|
|
group.quad spr:(0x20004+0x0)++0x00 "Breakpoint 0"
|
|
line.quad 0x00 "DBGBVR0_EL1,Breakpoint Value Register"
|
|
hexmask.quad 0x00 2.--48. 0x4 "VA,Bits[31:2] of the address value for comparison"
|
|
elif (((d.l(spr:(0x20005+0x0)))&0xF00000)==(0x800000||0x900000||0xC00000||0xD00000))
|
|
group.quad spr:(0x20004+0x0)++0x00 "Breakpoint 0"
|
|
line.quad 0x00 "DBGBVR0_EL1,Breakpoint Value Register"
|
|
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
|
|
elif (((d.l(spr:(0x20005+0x0)))&0xF00000)==(0xA00000||0xB00000||0xE00000||0xF00000))
|
|
else
|
|
group.quad spr:(0x20004+0x0)++0x00 "Breakpoint 0"
|
|
line.quad 0x00 "DBGBVR0_EL1,Breakpoint Value Register"
|
|
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
|
|
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID"
|
|
endif
|
|
group.quad SPR:(0x20005+0x0)++0x0
|
|
line.long 0x00 "DBGBCR0_EL1,Breakpoint Control Register"
|
|
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
|
|
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
|
|
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
|
|
bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
|
|
bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
|
|
if (((d.l(spr:(0x20005+0x10)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000))
|
|
group.quad spr:(0x20004+0x10)++0x00 "Breakpoint 1"
|
|
line.quad 0x00 "DBGBVR1_EL1,Breakpoint Value Register"
|
|
hexmask.quad 0x00 2.--48. 0x4 "VA,Bits[31:2] of the address value for comparison"
|
|
elif (((d.l(spr:(0x20005+0x10)))&0xF00000)==(0x800000||0x900000||0xC00000||0xD00000))
|
|
group.quad spr:(0x20004+0x10)++0x00 "Breakpoint 1"
|
|
line.quad 0x00 "DBGBVR1_EL1,Breakpoint Value Register"
|
|
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
|
|
elif (((d.l(spr:(0x20005+0x10)))&0xF00000)==(0xA00000||0xB00000||0xE00000||0xF00000))
|
|
else
|
|
group.quad spr:(0x20004+0x10)++0x00 "Breakpoint 1"
|
|
line.quad 0x00 "DBGBVR1_EL1,Breakpoint Value Register"
|
|
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
|
|
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID"
|
|
endif
|
|
group.quad SPR:(0x20005+0x10)++0x0
|
|
line.long 0x00 "DBGBCR1_EL1,Breakpoint Control Register"
|
|
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
|
|
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
|
|
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
|
|
bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
|
|
bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
|
|
if (((d.l(spr:(0x20005+0x20)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000))
|
|
group.quad spr:(0x20004+0x20)++0x00 "Breakpoint 2"
|
|
line.quad 0x00 "DBGBVR2_EL1,Breakpoint Value Register"
|
|
hexmask.quad 0x00 2.--48. 0x4 "VA,Bits[31:2] of the address value for comparison"
|
|
elif (((d.l(spr:(0x20005+0x20)))&0xF00000)==(0x800000||0x900000||0xC00000||0xD00000))
|
|
group.quad spr:(0x20004+0x20)++0x00 "Breakpoint 2"
|
|
line.quad 0x00 "DBGBVR2_EL1,Breakpoint Value Register"
|
|
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
|
|
elif (((d.l(spr:(0x20005+0x20)))&0xF00000)==(0xA00000||0xB00000||0xE00000||0xF00000))
|
|
else
|
|
group.quad spr:(0x20004+0x20)++0x00 "Breakpoint 2"
|
|
line.quad 0x00 "DBGBVR2_EL1,Breakpoint Value Register"
|
|
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
|
|
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID"
|
|
endif
|
|
group.quad SPR:(0x20005+0x20)++0x0
|
|
line.long 0x00 "DBGBCR2_EL1,Breakpoint Control Register"
|
|
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
|
|
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
|
|
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
|
|
bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
|
|
bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
|
|
if (((d.l(spr:(0x20005+0x30)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000))
|
|
group.quad spr:(0x20004+0x30)++0x00 "Breakpoint 3"
|
|
line.quad 0x00 "DBGBVR3_EL1,Breakpoint Value Register"
|
|
hexmask.quad 0x00 2.--48. 0x4 "VA,Bits[31:2] of the address value for comparison"
|
|
elif (((d.l(spr:(0x20005+0x30)))&0xF00000)==(0x800000||0x900000||0xC00000||0xD00000))
|
|
group.quad spr:(0x20004+0x30)++0x00 "Breakpoint 3"
|
|
line.quad 0x00 "DBGBVR3_EL1,Breakpoint Value Register"
|
|
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
|
|
elif (((d.l(spr:(0x20005+0x30)))&0xF00000)==(0xA00000||0xB00000||0xE00000||0xF00000))
|
|
else
|
|
group.quad spr:(0x20004+0x30)++0x00 "Breakpoint 3"
|
|
line.quad 0x00 "DBGBVR3_EL1,Breakpoint Value Register"
|
|
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
|
|
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID"
|
|
endif
|
|
group.quad SPR:(0x20005+0x30)++0x0
|
|
line.long 0x00 "DBGBCR3_EL1,Breakpoint Control Register"
|
|
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
|
|
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
|
|
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
|
|
bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
|
|
bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
|
|
if (((d.l(spr:(0x20005+0x40)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000))
|
|
group.quad spr:(0x20004+0x40)++0x00 "Breakpoint 4"
|
|
line.quad 0x00 "DBGBVR4_EL1,Breakpoint Value Register"
|
|
hexmask.quad 0x00 2.--48. 0x4 "VA,Bits[31:2] of the address value for comparison"
|
|
elif (((d.l(spr:(0x20005+0x40)))&0xF00000)==(0x800000||0x900000||0xC00000||0xD00000))
|
|
group.quad spr:(0x20004+0x40)++0x00 "Breakpoint 4"
|
|
line.quad 0x00 "DBGBVR4_EL1,Breakpoint Value Register"
|
|
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
|
|
elif (((d.l(spr:(0x20005+0x40)))&0xF00000)==(0xA00000||0xB00000||0xE00000||0xF00000))
|
|
else
|
|
group.quad spr:(0x20004+0x40)++0x00 "Breakpoint 4"
|
|
line.quad 0x00 "DBGBVR4_EL1,Breakpoint Value Register"
|
|
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
|
|
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID"
|
|
endif
|
|
group.quad SPR:(0x20005+0x40)++0x0
|
|
line.long 0x00 "DBGBCR4_EL1,Breakpoint Control Register"
|
|
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
|
|
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
|
|
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
|
|
bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
|
|
bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
|
|
if (((d.l(spr:(0x20005+0x50)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000))
|
|
group.quad spr:(0x20004+0x50)++0x00 "Breakpoint 5"
|
|
line.quad 0x00 "DBGBVR5_EL1,Breakpoint Value Register"
|
|
hexmask.quad 0x00 2.--48. 0x4 "VA,Bits[31:2] of the address value for comparison"
|
|
elif (((d.l(spr:(0x20005+0x50)))&0xF00000)==(0x800000||0x900000||0xC00000||0xD00000))
|
|
group.quad spr:(0x20004+0x50)++0x00 "Breakpoint 5"
|
|
line.quad 0x00 "DBGBVR5_EL1,Breakpoint Value Register"
|
|
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
|
|
elif (((d.l(spr:(0x20005+0x50)))&0xF00000)==(0xA00000||0xB00000||0xE00000||0xF00000))
|
|
else
|
|
group.quad spr:(0x20004+0x50)++0x00 "Breakpoint 5"
|
|
line.quad 0x00 "DBGBVR5_EL1,Breakpoint Value Register"
|
|
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
|
|
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID"
|
|
endif
|
|
group.quad SPR:(0x20005+0x50)++0x0
|
|
line.long 0x00 "DBGBCR5_EL1,Breakpoint Control Register"
|
|
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
|
|
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
|
|
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
|
|
bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
|
|
bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Watchpoint Control Registers"
|
|
group.quad spr:(0x20006+0x0)++0x00 "Watchpoint 0"
|
|
line.quad 0x00 "DBGWVR0_EL1,Watchpoint Value Register (AArch64)"
|
|
hexmask.quad 0x00 2.--48. 0x4 "ADDRESS,Data address"
|
|
group.quad spr:(0x20007+0x0)++0x00
|
|
line.quad 0x00 "DBGWCR0_EL1,Watchpoint Control Register"
|
|
bitfld.quad 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
|
|
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
|
|
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
|
|
hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select"
|
|
newline
|
|
bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both"
|
|
bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
|
|
bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled"
|
|
group.quad spr:(0x20006+0x10)++0x00 "Watchpoint 1"
|
|
line.quad 0x00 "DBGWVR1_EL1,Watchpoint Value Register (AArch64)"
|
|
hexmask.quad 0x00 2.--48. 0x4 "ADDRESS,Data address"
|
|
group.quad spr:(0x20007+0x10)++0x00
|
|
line.quad 0x00 "DBGWCR1_EL1,Watchpoint Control Register"
|
|
bitfld.quad 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
|
|
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
|
|
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
|
|
hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select"
|
|
newline
|
|
bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both"
|
|
bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
|
|
bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled"
|
|
group.quad spr:(0x20006+0x20)++0x00 "Watchpoint 2"
|
|
line.quad 0x00 "DBGWVR2_EL1,Watchpoint Value Register (AArch64)"
|
|
hexmask.quad 0x00 2.--48. 0x4 "ADDRESS,Data address"
|
|
group.quad spr:(0x20007+0x20)++0x00
|
|
line.quad 0x00 "DBGWCR2_EL1,Watchpoint Control Register"
|
|
bitfld.quad 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
|
|
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
|
|
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
|
|
hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select"
|
|
newline
|
|
bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both"
|
|
bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
|
|
bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled"
|
|
group.quad spr:(0x20006+0x30)++0x00 "Watchpoint 3"
|
|
line.quad 0x00 "DBGWVR3_EL1,Watchpoint Value Register (AArch64)"
|
|
hexmask.quad 0x00 2.--48. 0x4 "ADDRESS,Data address"
|
|
group.quad spr:(0x20007+0x30)++0x00
|
|
line.quad 0x00 "DBGWCR3_EL1,Watchpoint Control Register"
|
|
bitfld.quad 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
|
|
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
|
|
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
|
|
hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select"
|
|
newline
|
|
bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both"
|
|
bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
|
|
bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree.end
|
|
tree.open "AArch32"
|
|
tree "ID Registers"
|
|
rgroup.long c15:0x0000++0x0
|
|
line.long 0x0 "MIDR,Main ID Register"
|
|
hexmask.long.byte 0x0 24.--31. 0x1 "IMPL,Implementer code"
|
|
bitfld.long 0x0 20.--23. "VAR,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0 16.--19. "ARCH, Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv8"
|
|
newline
|
|
hexmask.long.word 0x0 4.--15. 0x10 "PART,Primary Part Number"
|
|
bitfld.long 0x0 0.--3. "REV,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
if (CORENAME()=="CORTEXA57")
|
|
rgroup.long c15:0x0100++0x0
|
|
line.long 0x0 "CTR,Cache Type Register"
|
|
bitfld.long 0x0 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
|
|
newline
|
|
bitfld.long 0x0 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
|
|
bitfld.long 0x0 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
|
|
newline
|
|
bitfld.long 0x0 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,Reserved,PIPT"
|
|
bitfld.long 0x0 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
|
|
elif (CORENAME()=="CORTEXA53")
|
|
rgroup.long c15:0x0100++0x0
|
|
line.long 0x0 "CTR,Cache Type Register"
|
|
bitfld.long 0x0 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
|
|
newline
|
|
bitfld.long 0x0 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
|
|
bitfld.long 0x0 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
|
|
newline
|
|
bitfld.long 0x0 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,VIPT,?..."
|
|
bitfld.long 0x0 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
|
|
endif
|
|
if corename()=="CORTEXA57"
|
|
rgroup.long c15:0x0300++0x0
|
|
line.long 0x0 "TLBTR,TLB Type Register"
|
|
endif
|
|
if corename()=="CORTEXA57"
|
|
rgroup.long c15:0x0500++0x0
|
|
line.long 0x0 "MPIDR,Multiprocessor Affinity Register"
|
|
bitfld.long 0x00 30. "U,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,?..."
|
|
newline
|
|
bitfld.long 0x00 24. "MT,Lowest level of affinity consist of logical processors" "Not implemented,Implemented"
|
|
hexmask.long.byte 0x00 16.--23. 1. "AFF2,Affinity level 2. Second highest level affinity field"
|
|
hexmask.long.byte 0x00 8.--15. 1. "AFF1,Affinity level 1. Third highest level affinity field"
|
|
newline
|
|
bitfld.long 0x00 0.--1. "CPUID,Indicates the core number in the device" "1,2,3,4"
|
|
elif corename()=="CORTEXA53"
|
|
rgroup.long c15:0x0500++0x0
|
|
line.long 0x0 "MPIDR,Multiprocessor Affinity Register"
|
|
bitfld.long 0x00 30. "U,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,?..."
|
|
newline
|
|
bitfld.long 0x00 24. "MT,Lowest level of affinity consist of logical processors" "Not implemented,?..."
|
|
hexmask.long.byte 0x00 16.--23. 1. "AFF2,Affinity level 2. Second highest level affinity field"
|
|
hexmask.long.byte 0x00 8.--15. 1. "AFF1,Affinity level 1. Third highest level affinity field"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. "AFF0,Affinity level 0. Lowest level affinity field"
|
|
endif
|
|
rgroup.long c15:0x0600++0x0
|
|
line.long 0x0 "REVIDR,Revision ID Register"
|
|
rgroup.long c15:0x0410++0x00
|
|
line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0"
|
|
bitfld.long 0x00 28.--31. "IS,Indicates innermost shareability domain implemented" "Reserved,Implemented,?..."
|
|
bitfld.long 0x00 24.--27. "FCSE,Fast Context Switch Memory Mappings Support" "Not supported,?..."
|
|
bitfld.long 0x00 20.--23. "AR,Auxiliary Register Support" "Reserved,Supported,?..."
|
|
newline
|
|
bitfld.long 0x00 16.--19. "TCM,TCM and Associated DMA Support" "Not supported,?..."
|
|
bitfld.long 0x00 12.--15. "SL,Shareability levels" "Reserved,Implemented 2 levels,?..."
|
|
bitfld.long 0x00 8.--11. "OSS,Outer Shareable Support" "Reserved,Implemented,?..."
|
|
newline
|
|
bitfld.long 0x00 4.--7. "PMSA,Physical Memory System Architecture (PMSA) Support" "Not supported,?..."
|
|
bitfld.long 0x00 0.--3. "VMSA,Virtual Memory System Architecture (VMSA) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
|
|
rgroup.long c15:0x0510++0x00
|
|
line.long 0x00 "ID_MMFR1,Memory Model Feature Register 1"
|
|
bitfld.long 0x00 28.--31. "BTB,Branch Predictor" "Reserved,Reserved,Required,?..."
|
|
bitfld.long 0x00 24.--27. "L1TCO,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..."
|
|
bitfld.long 0x00 20.--23. "L1UCMO,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..."
|
|
newline
|
|
bitfld.long 0x00 16.--19. "L1HCMO,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Not supported,?..."
|
|
bitfld.long 0x00 12.--15. "L1UCLMOSW,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..."
|
|
bitfld.long 0x00 8.--11. "L1HCLMOSW,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Not supported,?..."
|
|
newline
|
|
bitfld.long 0x00 4.--7. "L1UCLMOMVA,L1 Cache Line Maintenance Operations by VA/Unified Architecture Support" "Not supported,?..."
|
|
bitfld.long 0x00 0.--3. "L1HCLMOMVA,L1 Cache Line Maintenance Operations by VA/Harvard Architecture" "Not supported,?..."
|
|
rgroup.long c15:0x0610++0x00
|
|
line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2"
|
|
bitfld.long 0x00 28.--31. "HAF,Hardware Access Flag Support" "Not supported,?..."
|
|
bitfld.long 0x00 24.--27. "WFI,Wait for Interrupt Stalling Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 20.--23. "MBF,Memory Barrier Operations Support" "Reserved,Reserved,Supported,?..."
|
|
newline
|
|
bitfld.long 0x00 16.--19. "UTLBMO,TLB Maintenance Operations/Unified Architecture Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 12.--15. "HTLBMO,TLB Maintenance Operations/Harvard Architecture Support" "Not supported,?..."
|
|
bitfld.long 0x00 8.--11. "HL1CMRO,Cache Maintenance Range Operations/Harvard Architecture Support" "Not supported,?..."
|
|
newline
|
|
bitfld.long 0x00 4.--7. "HL1BPCRO,Background Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..."
|
|
bitfld.long 0x00 0.--3. "HL1FPCRO,Foreground Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..."
|
|
rgroup.long c15:0x0710++0x00
|
|
line.long 0x00 "ID_MMFR3,Memory Model Feature Register 3"
|
|
bitfld.long 0x00 28.--31. "SS,Supersection support" "Supported,?..."
|
|
bitfld.long 0x00 24.--27. "CMEMSZ,Cache memory size" "Reserved,Reserved,1TByte,?..."
|
|
bitfld.long 0x00 20.--23. "CW,Coherent walk" "Reserved,Supported,?..."
|
|
newline
|
|
bitfld.long 0x00 12.--15. "MB,Maintenance broadcast Support" "Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 8.--11. "BPM,Invalidate Branch predictor Support" "Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 4.--7. "HCMOSW,Invalidate Cache by Set and Way/Clean by Set and Way/Invalidate and Clean by Set and Way Support" "Reserved,Supported,?..."
|
|
newline
|
|
bitfld.long 0x00 0.--3. "HCMOMVA,Invalidate Cache MVA Support" "Reserved,Supported,?..."
|
|
rgroup.long c15:0x0620++0x00
|
|
line.long 0x00 "ID_MMFR4,ID_MMFR4"
|
|
bitfld.long 0x00 4.--7. "AC2,Extension of ACTLR and HACTLR by ACTLR2 and HACTLR2" "Not implemented, implemented,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
|
|
rgroup.long c15:0x0020++0x00
|
|
line.long 0x00 "ID_ISAR0,Instruction Set Attribute Register 0"
|
|
bitfld.long 0x00 24.--27. "DIVI,Divide Instructions Support" "Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 20.--23. "DEBI,Debug Instructions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 16.--19. "CI,Coprocessor Instructions Support" "Not supported,?..."
|
|
newline
|
|
bitfld.long 0x00 12.--15. "CBI,Combined Compare and Branch Instructions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 8.--11. "BI,Bitfield Instructions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 4.--7. "BCI,Bit Counting Instructions Support" "Reserved,Supported,?..."
|
|
newline
|
|
bitfld.long 0x00 0.--3. "SI,Swap Instructions Support" "Not supported,?..."
|
|
rgroup.long c15:0x0120++0x00
|
|
line.long 0x00 "ID_ISAR1,Instruction Set Attribute Register 1"
|
|
bitfld.long 0x00 28.--31. "JI,Jazelle Instructions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 24.--27. "INTI,Interwork Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 20.--23. "IMMI,Immediate Instructions Support" "Reserved,Supported,?..."
|
|
newline
|
|
bitfld.long 0x00 16.--19. "ITEI,If Then Instructions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 12.--15. "EXTI,Extend Instructions Support" "Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 8.--11. "EARI,Exception A and R Instructions Support" "Reserved,Supported,?..."
|
|
newline
|
|
bitfld.long 0x00 4.--7. "EXIN,Exception in ARM Instructions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 0.--3. "ENDI,Endian Instructions Support" "Reserved,Supported,?..."
|
|
rgroup.long c15:0x0220++0x00
|
|
line.long 0x00 "ID_ISAR2,Instruction Set Attribute Register 2"
|
|
bitfld.long 0x00 28.--31. "RI,Reversal Instructions Support" "Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 24.--27. "PSRI,PSR Instructions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 20.--23. "UMI,Advanced Unsigned Multiply Instructions Support" "Reserved,Reserved,Supported,?..."
|
|
newline
|
|
bitfld.long 0x00 16.--19. "SMI,Advanced Signed Multiply Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 12.--15. "MI,Multiply Instructions Support" "Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 8.--11. "II,Multi-Access Interruptible Instructions Support" "Not supported,?..."
|
|
newline
|
|
bitfld.long 0x00 4.--7. "MHI,Memory Hint Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 0.--3. "LSI,Load and Store Instructions Support" "Reserved,Reserved,Supported,?..."
|
|
rgroup.long c15:0x0320++0x00
|
|
line.long 0x00 "ID_ISAR3,Instruction Set Attribute Register 3"
|
|
bitfld.long 0x00 28.--31. "TEEEI,Thumb-EE Extensions Support" "Not supported,?..."
|
|
bitfld.long 0x00 24.--27. "NOPI,True NOP Instructions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 20.--23. "TCI,Thumb Copy Instructions Support" "Reserved,Supported,?..."
|
|
newline
|
|
bitfld.long 0x00 16.--19. "TBI,Table Branch Instructions Support" "Reserved,Supported,Reserved,?..."
|
|
bitfld.long 0x00 12.--15. "SPI,Synchronization Primitive Instructions Support" "Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 8.--11. "SVCI,SVC Instructions Support" "Reserved,Supported,?..."
|
|
newline
|
|
bitfld.long 0x00 4.--7. "SIMDI,Single Instruction Multiple Data (SIMD) Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 0.--3. "SI,Saturate Instructions Support" "Reserved,Supported,?..."
|
|
rgroup.long c15:0x0420++0x00
|
|
line.long 0x00 "ID_ISAR4,Instruction Set Attribute Register 4"
|
|
bitfld.long 0x00 28.--31. "SWP_FRAC,Memory System Locking Support" "Not supported,?..."
|
|
bitfld.long 0x00 24.--27. "PSR_M_I,PSR_M Instructions Support" "Not supported,?..."
|
|
bitfld.long 0x00 20.--23. "SPRI,Synchronization Primitive instructions" "Supported,?..."
|
|
newline
|
|
bitfld.long 0x00 16.--19. "BI,Barrier Instructions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 12.--15. "SMCI,SMC Instructions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 8.--11. "WBI,Write-Back Instructions Support" "Reserved,Supported,?..."
|
|
newline
|
|
bitfld.long 0x00 4.--7. "WSI,With-Shift Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 0.--3. "UI,Unprivileged Instructions Support" "Reserved,Reserved,Supported,?..."
|
|
rgroup.long c15:0x0520++0x00
|
|
line.long 0x00 "ID_ISAR5,Instruction Set Attribute Register 5"
|
|
bitfld.long 0x00 16.--19. "CRC32,CRC32 Instructions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 12.--15. "SHA2,SHA2 Instructions Support" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 8.--11. "SHA1,SHA1 Instructions Support" "Not supported,Supported,?..."
|
|
newline
|
|
bitfld.long 0x00 4.--7. "AES,AES Instructions Support" "Not supported,Reserved,Supported,?..."
|
|
bitfld.long 0x00 0.--3. "SEVL,SEVL Instructions Support" "Reserved,Supported,?..."
|
|
rgroup.long c15:0x0010++0x00
|
|
line.long 0x00 "ID_PFR0,Processor Feature Register 0"
|
|
bitfld.long 0x00 12.--15. "STATE3,Thumb Execution Environment (Thumb-EE) Support" "Not supported,?..."
|
|
bitfld.long 0x00 8.--11. "STATE2,Support for Jazelle extension" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 4.--7. "STATE1,Thumb Encoding Supported by the Processor Type" "Reserved,Reserved,Reserved,Supported,?..."
|
|
newline
|
|
bitfld.long 0x00 0.--3. "STATE0,ARM Instruction Set Support" "Reserved,Supported,?..."
|
|
rgroup.long c15:0x0110++0x00
|
|
line.long 0x00 "ID_PFR1,Processor Feature Register 1"
|
|
bitfld.long 0x00 28.--31. "GIC_CPU,GIC CPU Support" "Disabled,Enabled,?..."
|
|
newline
|
|
bitfld.long 0x00 16.--19. "GT,Generic Timer Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 12.--15. "VE,Virtualization Extensions Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 8.--11. "MPM,Microcontroller Programmer's Model Support" "Not supported,?..."
|
|
newline
|
|
bitfld.long 0x00 4.--7. "SE,Security Extensions Architecture v1 Support" "Reserved,Supported,?..."
|
|
bitfld.long 0x00 0.--3. "PM,Standard ARMv4 Programmer's Model Support" "Reserved,Supported,?..."
|
|
if corename()=="CORTEXA57"
|
|
rgroup.long c15:0x0210++0x00
|
|
line.long 0x00 "ID_DFR0,Debug Feature Register 0"
|
|
bitfld.long 0x00 24.--27. "PMM,Performance Monitor Model Support" "Reserved,Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 20.--23. "MDM_MM,Memory-mapped Debug Model for M profile processors Support" "Not supported,?..."
|
|
bitfld.long 0x00 16.--19. "TM_MM,Trace Model (Memory-Mapped) Support" "Reserved,Supported,?..."
|
|
newline
|
|
bitfld.long 0x00 12.--15. "CTM_CB,Coprocessor-Based Trace Debug Model Support" "Not supported,?..."
|
|
bitfld.long 0x00 8.--11. "CDM_MM,Memory-Mapped Debug Model Support" "Not supported,?..."
|
|
bitfld.long 0x00 4.--7. "SDM_CB,Secure Debug Model (Coprocessor) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
|
|
newline
|
|
bitfld.long 0x00 0.--3. "CDM_CB,Coprocessor Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
|
|
elif corename()=="CORTEXA53"
|
|
rgroup.long c15:0x0210++0x00
|
|
line.long 0x00 "ID_DFR0,Debug Feature Register 0"
|
|
bitfld.long 0x00 24.--27. "PMM,Performance Monitor Model Support" "Reserved,Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 20.--23. "MDM_MM,Memory-mapped Debug Model for M profile processors Support" "Not supported,?..."
|
|
bitfld.long 0x00 16.--19. "TM_MM,Trace Model (Memory-Mapped) Support" "Reserved,Supported,?..."
|
|
newline
|
|
bitfld.long 0x00 12.--15. "CTM_CB,Coprocessor-Based Trace Debug Model Support" "Not supported,?..."
|
|
bitfld.long 0x00 4.--7. "SDM_CB,Secure Debug Model (Coprocessor) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
|
|
bitfld.long 0x00 0.--3. "CDM_CB,Coprocessor Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
|
|
endif
|
|
group.long c15:0x0310++0x00
|
|
line.long 0x00 "ID_AFR0,Auxiliary Feature Register 0"
|
|
if corename()=="CORTEXA57"
|
|
rgroup.long c15:0x6C9++0x0
|
|
line.long 0x00 "PMCEID0,Common Event Identification Register 0"
|
|
bitfld.long 0x00 30. "EVENT30,Chain" "Not implemented,Implemented"
|
|
newline
|
|
bitfld.long 0x00 29. "EVENT29,Bus cycle" "Not implemented,Implemented"
|
|
bitfld.long 0x00 28. "EVENT28,Instruction architecturally executed condition check pass" "Not implemented,Implemented"
|
|
bitfld.long 0x00 27. "EVENT27,Instruction speculatively executed" "Not implemented,Implemented"
|
|
newline
|
|
bitfld.long 0x00 26. "EVENT26,Local memory error" "Not implemented,Implemented"
|
|
bitfld.long 0x00 25. "EVENT25,Bus access" "Not implemented,Implemented"
|
|
bitfld.long 0x00 24. "EVENT24,Level 2 data cache write-back" "Not implemented,Implemented"
|
|
newline
|
|
bitfld.long 0x00 23. "EVENT23,Level 2 data cache refill" "Not implemented,Implemented"
|
|
bitfld.long 0x00 22. "EVENT22,Level 2 data cache access" "Not implemented,Implemented"
|
|
bitfld.long 0x00 21. "EVENT21,Level 1 data cache write-back" "Not implemented,Implemented"
|
|
newline
|
|
bitfld.long 0x00 20. "EVENT20,Level 1 instruction cache access" "Not implemented,Implemented"
|
|
bitfld.long 0x00 19. "EVENT19,Data memory access" "Not implemented,Implemented"
|
|
bitfld.long 0x00 18. "EVENT18,Predictable branch speculatively executed" "Not implemented,Implemented"
|
|
newline
|
|
bitfld.long 0x00 17. "EVENT17,Cycle" "Not implemented,Implemented"
|
|
bitfld.long 0x00 16. "EVENT16,Mispredicted or not predicted branch speculatively executed" "Not implemented,Implemented"
|
|
bitfld.long 0x00 15. "EVENT15,Instruction architecturally executed condition check pass unaligned load or store" "Not implemented,Implemented"
|
|
newline
|
|
bitfld.long 0x00 14. "EVENT14,Instruction architecturally executed condition check pass procedure return" "Not implemented,Implemented"
|
|
bitfld.long 0x00 13. "EVENT13,Instruction architecturally executed immediate branch" "Not implemented,Implemented"
|
|
bitfld.long 0x00 12. "EVENT12,Instruction architecturally executed condition check pass software change of the PC" "Not implemented,Implemented"
|
|
newline
|
|
bitfld.long 0x00 11. "EVENT11,Instruction architecturally executed condition check pass write to CONTEXTIDR" "Not implemented,Implemented"
|
|
bitfld.long 0x00 10. "EVENT10,Instruction architecturally executed condition check pass exception return" "Not implemented,Implemented"
|
|
bitfld.long 0x00 9. "EVENT9,Exception taken" "Not implemented,Implemented"
|
|
newline
|
|
bitfld.long 0x00 8. "EVENT8,Instruction architecturally executed" "Not implemented,Implemented"
|
|
bitfld.long 0x00 7. "EVENT7,Instruction architecturally executed condition check pass store" "Not implemented,Implemented"
|
|
bitfld.long 0x00 6. "EVENT6,Instruction architecturally executed condition check pass load" "Not implemented,Implemented"
|
|
newline
|
|
bitfld.long 0x00 5. "EVENT5,Level 1 data TLB refill" "Not implemented,Implemented"
|
|
bitfld.long 0x00 4. "EVENT4,Level 1 data cache access" "Not implemented,Implemented"
|
|
bitfld.long 0x00 3. "EVENT3,Level 1 data cache refill" "Not implemented,Implemented"
|
|
newline
|
|
bitfld.long 0x00 2. "EVENT2,Level 1 instruction TLB refill" "Not implemented,Implemented"
|
|
bitfld.long 0x00 1. "EVENT1,Level 1 instruction cache refill" "Not implemented,Implemented"
|
|
bitfld.long 0x00 0. "EVENT0,Instruction architecturally executed condition check pass software increment" "Not implemented,Implemented"
|
|
rgroup.long c15:0x7C9++0x0
|
|
line.long 0x00 "PMCEID1,Common Event Identification Register 1"
|
|
elif corename()=="CORTEXA53"
|
|
rgroup.long c15:0x6C9++0x0
|
|
line.long 0x00 "PMCEID0,Common Event Identification Register 0"
|
|
bitfld.long 0x00 31. "EVENT31,L1 Data cache allocate" "Not implemented,Implemented"
|
|
bitfld.long 0x00 30. "EVENT30,Chain" "Not implemented,Implemented"
|
|
newline
|
|
bitfld.long 0x00 29. "EVENT29,Bus cycle" "Not implemented,Implemented"
|
|
bitfld.long 0x00 28. "EVENT28,Instruction architecturally executed condition check pass" "Not implemented,Implemented"
|
|
bitfld.long 0x00 27. "EVENT27,Instruction speculatively executed" "Not implemented,Implemented"
|
|
newline
|
|
bitfld.long 0x00 26. "EVENT26,Local memory error" "Not implemented,Implemented"
|
|
bitfld.long 0x00 25. "EVENT25,Bus access" "Not implemented,Implemented"
|
|
bitfld.long 0x00 24. "EVENT24,Level 2 data cache write-back" "Not implemented,Implemented"
|
|
newline
|
|
bitfld.long 0x00 23. "EVENT23,Level 2 data cache refill" "Not implemented,Implemented"
|
|
bitfld.long 0x00 22. "EVENT22,Level 2 data cache access" "Not implemented,Implemented"
|
|
bitfld.long 0x00 21. "EVENT21,Level 1 data cache write-back" "Not implemented,Implemented"
|
|
newline
|
|
bitfld.long 0x00 20. "EVENT20,Level 1 instruction cache access" "Not implemented,Implemented"
|
|
bitfld.long 0x00 19. "EVENT19,Data memory access" "Not implemented,Implemented"
|
|
bitfld.long 0x00 18. "EVENT18,Predictable branch speculatively executed" "Not implemented,Implemented"
|
|
newline
|
|
bitfld.long 0x00 17. "EVENT17,Cycle" "Not implemented,Implemented"
|
|
bitfld.long 0x00 16. "EVENT16,Mispredicted or not predicted branch speculatively executed" "Not implemented,Implemented"
|
|
bitfld.long 0x00 15. "EVENT15,Instruction architecturally executed condition check pass unaligned load or store" "Not implemented,Implemented"
|
|
newline
|
|
bitfld.long 0x00 14. "EVENT14,Instruction architecturally executed condition check pass procedure return" "Not implemented,Implemented"
|
|
bitfld.long 0x00 13. "EVENT13,Instruction architecturally executed immediate branch" "Not implemented,Implemented"
|
|
bitfld.long 0x00 12. "EVENT12,Instruction architecturally executed condition check pass software change of the PC" "Not implemented,Implemented"
|
|
newline
|
|
bitfld.long 0x00 11. "EVENT11,Instruction architecturally executed condition check pass write to CONTEXTIDR" "Not implemented,Implemented"
|
|
bitfld.long 0x00 10. "EVENT10,Instruction architecturally executed condition check pass exception return" "Not implemented,Implemented"
|
|
bitfld.long 0x00 9. "EVENT9,Exception taken" "Not implemented,Implemented"
|
|
newline
|
|
bitfld.long 0x00 8. "EVENT8,Instruction architecturally executed" "Not implemented,Implemented"
|
|
bitfld.long 0x00 7. "EVENT7,Instruction architecturally executed condition check pass store" "Not implemented,Implemented"
|
|
bitfld.long 0x00 6. "EVENT6,Instruction architecturally executed condition check pass load" "Not implemented,Implemented"
|
|
newline
|
|
bitfld.long 0x00 5. "EVENT5,Level 1 data TLB refill" "Not implemented,Implemented"
|
|
bitfld.long 0x00 4. "EVENT4,Level 1 data cache access" "Not implemented,Implemented"
|
|
bitfld.long 0x00 3. "EVENT3,Level 1 data cache refill" "Not implemented,Implemented"
|
|
newline
|
|
bitfld.long 0x00 2. "EVENT2,Level 1 instruction TLB refill" "Not implemented,Implemented"
|
|
bitfld.long 0x00 1. "EVENT1,Level 1 instruction cache refill" "Not implemented,Implemented"
|
|
bitfld.long 0x00 0. "EVENT0,Instruction architecturally executed condition check pass software increment" "Not implemented,Implemented"
|
|
rgroup.long c15:0x7C9++0x0
|
|
line.long 0x00 "PMCEID1,Common Event Identification Register 1"
|
|
bitfld.long 0x00 0. "EVENT32,L2D Cache Allocate" "Not implemented,Implemented"
|
|
endif
|
|
group.long c15:0x020D++0x00
|
|
line.long 0x00 "TPIDRURW,User Read/Write Thread ID Register"
|
|
group.long c15:0x030D++0x00
|
|
line.long 0x00 "TPIDRURO,User Read-Only Thread ID Register"
|
|
group.long c15:0x040D++0x00
|
|
line.long 0x00 "TPIDRPRW,EL1 only Thread ID Register"
|
|
group.long c15:0x420D++0x00
|
|
line.long 0x00 "HTPIDR,Hypervisor Software Thread ID Register"
|
|
tree.end
|
|
tree "System Control and Configuration"
|
|
if corename()=="CORTEXA57"
|
|
if (((per.l(c15:0x202))&0x80000000)==0x00000000)
|
|
group.long c15:0x0001++0x0
|
|
line.long 0x0 "SCTLR,System Control Register"
|
|
bitfld.long 0x0 30. "TE,T32 exception enable" "A32,T32"
|
|
bitfld.long 0x0 29. "AFE,Access Flag Enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0 28. "TRE,TEX remap enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big"
|
|
newline
|
|
bitfld.long 0x0 20. "UWXN,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced"
|
|
bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced"
|
|
newline
|
|
bitfld.long 0x0 18. "NTWE,Not trap WFE" "No,Yes"
|
|
bitfld.long 0x0 16. "NTWI,Not trap WFI" "No,Yes"
|
|
newline
|
|
bitfld.long 0x0 13. "V,Base Location of Exception Registers" "0x00000000,0xFFFF0000"
|
|
bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes"
|
|
bitfld.long 0x0 7. "ITD,IT Disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x0 6. "THEE,ThumbEE Disable" "No,Yes"
|
|
bitfld.long 0x0 5. "CP15BEN,c15 barrier enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled"
|
|
else
|
|
group.long c15:0x0001++0x0
|
|
line.long 0x0 "SCTLR,Control Register"
|
|
bitfld.long 0x0 30. "TE,T32 exception enable" "A32,T32"
|
|
bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big"
|
|
newline
|
|
bitfld.long 0x0 20. "UWXN,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced"
|
|
bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced"
|
|
newline
|
|
bitfld.long 0x0 18. "NTWE,Not trap WFE" "No,Yes"
|
|
bitfld.long 0x0 16. "NTWI,Not trap WFI" "No,Yes"
|
|
newline
|
|
bitfld.long 0x0 13. "V,Base Location of Exception Registers" "0x00000000,0xFFFF0000"
|
|
bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes"
|
|
bitfld.long 0x0 7. "ITD,IT Disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x0 6. "THEE,ThumbEE Disable" "No,Yes"
|
|
bitfld.long 0x0 5. "CP15BEN,c15 barrier enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled"
|
|
endif
|
|
group.quad c15:0x100F0++0x01
|
|
line.quad 0x00 "CPUACTLR,CPU Auxiliary Control Register"
|
|
bitfld.quad 0x00 63. "FPRCGEC,Force processor RCG enables active" "Not forced,Forced"
|
|
bitfld.quad 0x00 59. "DLPDMB,Disable load pass DMB" "No,Yes"
|
|
newline
|
|
bitfld.quad 0x00 58. "DDMBN,Disable DMB nullification" "No,Yes"
|
|
bitfld.quad 0x00 57. "TA,Treat DMB st/stand DMB ld/allas DMB all/all" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 56. "DL1DCHP,Disable L1 Data Cache hardware prefetcher" "No,Yes"
|
|
bitfld.quad 0x00 55. "DLPS,Disable load pass store" "No,Yes"
|
|
newline
|
|
bitfld.quad 0x00 54. "TGRE,Treat GRE/nGRE as nGnRE" "Disabled,Enabled"
|
|
bitfld.quad 0x00 53. "TDMBADSB,Treat DMBand DSBas if their domain field is SY" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 52. "DORFLDNPI,Disable over-read from LDNP instruction" "No,Yes"
|
|
bitfld.quad 0x00 51. "DCDAFEMP,Disable contention detection and fast exclusive monitor path" "No,Yes"
|
|
newline
|
|
bitfld.quad 0x00 50. "DSSONNCGREEMT,Disable store streaming on NC/GRE memory type" "No,Yes"
|
|
bitfld.quad 0x00 49. "DNHOWBNAMT,Disable non-allocate hint of Write-Back No-Allocate (WBNA) memory type" "No,Yes"
|
|
newline
|
|
bitfld.quad 0x00 48. "DESRAFLSTL2,Disable early speculative read access from LS to L2" "No,Yes"
|
|
bitfld.quad 0x00 47. "DL1L2HP,Disable L1/L2 hardware prefetch across 4KB page boundary even if page is 64KB or larger" "No,Yes"
|
|
newline
|
|
bitfld.quad 0x00 44. "EDCCADCCI,Enable data cache clean as data cache clean/invalidate" "Disabled,Enabled"
|
|
bitfld.quad 0x00 39. "DIM,Disable instruction merging" "No,Yes"
|
|
newline
|
|
bitfld.quad 0x00 38. "FFPSCRWF,Force FPSCR write flush" "Not forced,Forced"
|
|
bitfld.quad 0x00 37. "DIGS,Disable instruction group split" "No,Yes"
|
|
newline
|
|
bitfld.quad 0x00 36. "FIDSBONASBE,Force implicit DSB on an ISB event" "Not forced,Forced"
|
|
bitfld.quad 0x00 34. "DSBP,Disable Static Branch Predictor" "No,Yes"
|
|
newline
|
|
bitfld.quad 0x00 33. "DL1ICWPIMBTB,Disable L1 Instruction Cache way prediction in micro-BTB" "No,Yes"
|
|
bitfld.quad 0x00 32. "DL1ICP,Disable L1 Instruction Cache prefetch" "No,Yes"
|
|
newline
|
|
bitfld.quad 0x00 31. "SDEH,Snoop-delayed exclusive handling" "Disabled,Enabled"
|
|
bitfld.quad 0x00 30. "FMCEA,Force main clock enable active" "Not forced,Forced"
|
|
newline
|
|
bitfld.quad 0x00 29. "FASIMDFPCEA,Force Advanced SIMD and floating-point clock enable active" "Disabled,Enabled"
|
|
bitfld.quad 0x00 27.--28. "WSNAT,Write streaming no-allocate threshold" "12th,128th,512th,Disabled"
|
|
newline
|
|
bitfld.quad 0x00 25.--26. "WSNL1AT,Write streaming no-L1-allocate threshold" "4th,64th,128th,Disabled"
|
|
bitfld.quad 0x00 24. "NCSE,Non-cacheable streaming enhancement" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 23. "FIORTTSSAW,Force in-order requests to the same set and way" "Not forced,Forced"
|
|
bitfld.quad 0x00 22. "FIOLI,Force in-order load issue" "Not forced,Forced"
|
|
newline
|
|
bitfld.quad 0x00 21. "DL2TLBP,Disable L2 TLB prefetching" "No,Yes"
|
|
bitfld.quad 0x00 20. "DL2TTWIPAPAC,Disable L2 translation table walk IPA PA cache" "No,Yes"
|
|
newline
|
|
bitfld.quad 0x00 19. "DL2S1TTWC,Disable L2 stage 1 translation table walk cache" "No,Yes"
|
|
bitfld.quad 0x00 18. "DL2S1TTWL2PAC,Disable L2 stage 1 translation table walk L2 PA cache" "No,Yes"
|
|
newline
|
|
bitfld.quad 0x00 17. "DL2TLBPO,Disable L2 TLB performance optimization" "No,Yes"
|
|
bitfld.quad 0x00 16. "EFSOADLR,Enable full Strongly-ordered and Device load replay" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 15. "FIOIIBEU,Force in-order issue in branch execute unit" "Not forced,Forced"
|
|
bitfld.quad 0x00 14. "FLOFOIGCDAPC,Force limit of one instruction group commit/de-allocate per cycle" "Not forced,Forced"
|
|
newline
|
|
bitfld.quad 0x00 13. "FASPRW,Flush after Special Purpose Register (SPR) writes" "Disabled,Enabled"
|
|
bitfld.quad 0x00 12. "FPOSPRS,Force push of SPRs" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 11. "LTOIPIG,Limit to one instruction per instruction group" "Disabled,Enabled"
|
|
bitfld.quad 0x00 10. "FSAEIG,Force serialization after each instruction group" "Not forced,Forced"
|
|
newline
|
|
bitfld.quad 0x00 9. "DFRO,Disable flag renaming optimization" "No,Yes"
|
|
bitfld.quad 0x00 8. "EWFIIAANOPI,Execute WFI instruction as a NOP instruction" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 7. "EWFEIAANOPI,Execute WFE instruction as a NOP instruction" "Disabled,Enabled"
|
|
bitfld.quad 0x00 5. "EPLDPLDWIASNOP,Execute PLDand PLDWinstructions as a NOP" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 4. "DIP,Disable indirect predictor" "No,Yes"
|
|
bitfld.quad 0x00 3. "DMBTB,Disable micro-BTB" "No,Yes"
|
|
newline
|
|
bitfld.quad 0x00 1. "DICMS,Disable Instruction Cache miss streaming" "No,Yes"
|
|
bitfld.quad 0x00 0. "EIOBTB,Enable invalidates of BTB" "Disabled,Enabled"
|
|
group.quad c15:0x110F0++0x01
|
|
line.quad 0x00 "CPUECTLR,CPU Extended Control Register"
|
|
bitfld.quad 0x00 38. "DTWDAP,Disable table walk descriptor access prefetch" "No,Yes"
|
|
bitfld.quad 0x00 35.--36. "L2IFPD,L2 instruction fetch prefetch distance" "0 lines,1 line,2 lines,3 lines"
|
|
newline
|
|
bitfld.quad 0x00 32.--33. "L2LSDPD,L2 load/store data prefetch distance" "0 line,2 lines,4 lines,8 lines"
|
|
bitfld.quad 0x00 6. "SMPEN,Enable hardware management of data coherency with other processors in the multiprocessor" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 0.--2. "CPURETCTL,CPU retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks"
|
|
group.quad c15:0x120F0++0x01
|
|
line.quad 0x00 "CPUMERRSR,CPU Memory Error Syndrome Register"
|
|
bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1"
|
|
hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count"
|
|
newline
|
|
hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count"
|
|
bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid"
|
|
newline
|
|
hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier"
|
|
bitfld.quad 0x00 18.--22. "B/W,Bank/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
newline
|
|
hexmask.quad.tbyte 0x00 0.--17. 1. "INDEX,RAM address"
|
|
group.long c15:0x0101++0x0
|
|
line.long 0x0 "ACTLR,Auxiliary Control Register"
|
|
elif corename()=="CORTEXA53"
|
|
group.long c15:0x0001++0x0
|
|
line.long 0x0 "SCTLR,Control Register"
|
|
bitfld.long 0x0 30. "TE,T32 exception enable" "A32,T32"
|
|
bitfld.long 0x0 29. "AFE,Access Flag Enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0 28. "TRE,TEX remap enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big"
|
|
newline
|
|
bitfld.long 0x0 20. "UWXN,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced"
|
|
bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced"
|
|
newline
|
|
bitfld.long 0x0 18. "NTWE,Not trap WFE" "No,Yes"
|
|
bitfld.long 0x0 16. "NTWI,Not trap WFI" "No,Yes"
|
|
newline
|
|
bitfld.long 0x0 13. "V,Base Location of Exception Registers" "0x00000000,0xFFFF0000"
|
|
bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes"
|
|
bitfld.long 0x0 6. "ITD,IT Disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x0 5. "CP15BEN,c15 barrier enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled"
|
|
bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled"
|
|
group.quad c15:0x100F0++0x01
|
|
line.quad 0x00 "CPUACTLR,CPU Auxiliary Control Register"
|
|
bitfld.quad 0x00 30. "FPDIDIS,Disable floating-point dual issue" "No,Yes"
|
|
bitfld.quad 0x00 29. "DIDIS,Disable Dual Issue" "No,Yes"
|
|
newline
|
|
bitfld.quad 0x00 27.--28. "RADIS,Write streaming no-allocate threshold" "16th,128th,512th,Disabled"
|
|
bitfld.quad 0x00 25.--26. "L1RADIS,Write streaming no-L1-allocate threshold" "4th,64th,128th,Disabled"
|
|
newline
|
|
bitfld.quad 0x00 24. "DTAH,Disable Transient allocation hint" "No,Yes"
|
|
bitfld.quad 0x00 23. "STBPFRS,Disable ReadUnique request for prefetch streams initiated by STB accesses" "No,Yes"
|
|
newline
|
|
bitfld.quad 0x00 22. "STBPFDIS,Disable prefetch streams initiated from STB accesses" "No,Yes"
|
|
bitfld.quad 0x00 21. "IFUTHDIS,IFU fetch throttle disabled" "No,Yes"
|
|
newline
|
|
bitfld.quad 0x00 19.--20. "NPFSTRM,Number of independent data prefetch streams" "1 stream,2 streams,3 streams,4 streams"
|
|
bitfld.quad 0x00 18. "DSTDIS,Enable device split throttle" "Disabled,Enabled"
|
|
newline
|
|
bitfld.quad 0x00 17. "STRIDE,Enable stride detection" "Disabled,Enabled"
|
|
bitfld.quad 0x00 13.--15. "L1PCTL,L1 Data prefetch control" "Disabled,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.quad 0x00 10. "DODMBS,Disable optimized Data Memory Barrier behavior" "No,Yes"
|
|
group.quad c15:0x110F0++0x01
|
|
line.quad 0x00 "CPUECTLR,CPU Extended Control Register"
|
|
bitfld.quad 0x00 6. "SMPEN,Enable hardware management of data coherency with other processors in the multiprocessor" "Disabled,Enabled"
|
|
bitfld.quad 0x00 3.--5. "FPRETCTL,Advanced SIMD and Floating-point retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks"
|
|
newline
|
|
bitfld.quad 0x00 0.--2. "CPURETCTL,CPU retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks"
|
|
group.quad c15:0x120F0++0x01
|
|
line.quad 0x00 "CPUMERRSR,CPU Memory Error Syndrome Register"
|
|
bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1"
|
|
hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count"
|
|
newline
|
|
hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count"
|
|
bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid"
|
|
newline
|
|
hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier"
|
|
bitfld.quad 0x00 18.--20. "C/W,CPUID/Way" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.quad.word 0x00 0.--11. 1. "RAD,RAM address"
|
|
group.long c15:0x0101++0x0
|
|
line.long 0x0 "ACTLR,Auxiliary Control Register"
|
|
bitfld.long 0x00 6. "L2ACTLRAC,L2ACTLR write access control" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. "L2ECTLRAC,L2ECTLR write access control" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 4. "L2CTLRAC,L2CTLR write access control" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. "CPUECTLRAC,CPUECTLR write access control" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "CPUACTLRAC,CPUACTLR write access control" "Disabled,Enabled"
|
|
endif
|
|
if corename()=="CORTEXA57"
|
|
group.long c15:0x0201++0x00
|
|
line.long 0x0 "CPACR,Coprocessor Access Control Register"
|
|
bitfld.long 0x0 31. "ASEDIS,Disable Advanced SIMD Extension functionality" "No,Yes"
|
|
bitfld.long 0x0 28. "TRCDIS,Disable CP14 access to trace registers" "No,Yes"
|
|
newline
|
|
bitfld.long 0x0 22.--23. "CP11,Coprocessor access control" "Denied,EL1 or higher,Reserved,Full"
|
|
bitfld.long 0x0 20.--21. "CP10,Coprocessor access control" "Denied,EL1 or higher,Reserved,Full"
|
|
elif corename()=="CORTEXA53"
|
|
group.long c15:0x201++0x00
|
|
line.long 0x0 "CPACR,Coprocessor Access Control Register"
|
|
bitfld.long 0x0 31. "ASEDIS,Disable Advanced SIMD Extension functionality" "No,Yes"
|
|
bitfld.long 0x0 22.--23. "CP11,Coprocessor access control" "Denied,EL1 only,Reserved,Full"
|
|
newline
|
|
bitfld.long 0x0 20.--21. "CP10,Coprocessor access control" "Denied,EL1 only,Reserved,Full"
|
|
endif
|
|
group.long c15:0x0011++0x0
|
|
line.long 0x00 "SCR,Secure Configuration Register"
|
|
bitfld.long 0x00 13. "TWE,Trap WFE Instructions" "Not trapped,Trapped"
|
|
bitfld.long 0x00 12. "TWI,Trap WFI Instructions" "Not trapped,Trapped"
|
|
newline
|
|
bitfld.long 0x00 9. "SIF,Secure Instruction Fetch" "Permitted,Not permitted"
|
|
bitfld.long 0x00 8. "HCE,Hypervisor Call enable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 7. "SCD,Secure Monitor Call disable" "No,Yes"
|
|
bitfld.long 0x00 5. "AW,Controls whether the Non-secure world can modify the A-bit in the CPSR" "Not allowed,Allowed"
|
|
newline
|
|
bitfld.long 0x00 4. "FW,Controls whether the Non-secure world can modify the F-bit in the CPSR" "Not allowed,Allowed"
|
|
bitfld.long 0x00 3. "EA,External Abort exceptions handled in Abort mode or Monitor mode" "Abort,Monitor"
|
|
newline
|
|
bitfld.long 0x00 2. "FIQ,FIQ exceptions handled in Abort mode or Monitor mode" "FIQ,Monitor"
|
|
bitfld.long 0x00 1. "IRQ,IRQ exceptions handled in Abort mode or Monitor mode" "IRQ,Monitor"
|
|
newline
|
|
bitfld.long 0x00 0. "NS,Secure mode " "Secure,Non-secure"
|
|
group.long c15:0x0111++0x00
|
|
line.long 0x00 "SDER,Secure Debug Enable Register"
|
|
bitfld.long 0x00 1. "SUNIDEN,Non-Invasive Secure User Debug Enable bit" "Denied,Permitted"
|
|
bitfld.long 0x00 0. "SUIDEN,Invasive Secure User Debug Enable bit" "Denied,Permitted"
|
|
group.long c15:0x0131++0x00
|
|
line.long 0x00 "SDCR,Secure Debug Control Register"
|
|
bitfld.long 0x00 21. "EPMAD,External debugger access to Performance Monitors registers disabled" "No,Yes"
|
|
bitfld.long 0x00 20. "EDAD,External debugger access to breakpoint and watchpoint registers disabled" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 17. "SPME,Secure performance monitors enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14.--15. "SPD,AArch32 secure privileged debug" "Legacy,Reserved,Disabled,Enabled"
|
|
group.long c15:0x0211++0x00
|
|
line.long 0x00 "NSACR,Non-Secure Access Control Register"
|
|
bitfld.long 0x00 15. "NSASEDIS,Disable Non-secure Advanced SIMD Extension functionality" "No,Yes"
|
|
bitfld.long 0x00 11. "CP11,Coprocessor 11 in the Non-secure World Access Permission" "Denied,Permitted"
|
|
newline
|
|
bitfld.long 0x00 10. "CP10,Coprocessor 10 in the Non-secure World Access Permission" "Denied,Permitted"
|
|
if corename()=="CORTEXA57"
|
|
group.long c15:0x000C++0x00
|
|
line.long 0x00 "VBAR,Vector Base Address Register"
|
|
hexmask.long 0x00 5.--31. 0x20 "VBA,Vector Base Address"
|
|
group.long c15:0x010C++0x00
|
|
line.long 0x00 "MVBAR,Monitor Vector Base Address Register"
|
|
hexmask.long 0x00 5.--31. 0x20 "VBA,Vector Base Address"
|
|
elif corename()=="CORTEXA53"
|
|
group.long c15:0x000C++0x00
|
|
line.long 0x00 "VBAR,Vector Base Address Register"
|
|
group.long c15:0x010C++0x00
|
|
line.long 0x00 "MVBAR,Monitor Vector Base Address Register"
|
|
endif
|
|
rgroup.long c15:0x001C++0x00
|
|
line.long 0x00 "ISR,Interrupt Status Register"
|
|
bitfld.long 0x00 8. "A,External abort pending flag" "Not pending,Pending"
|
|
bitfld.long 0x00 7. "I,Interrupt pending flag" "Not pending,Pending"
|
|
newline
|
|
bitfld.long 0x00 6. "F,Fast interrupt pending flag" "Not pending,Pending"
|
|
group.long c15:0x020C++0x00
|
|
line.long 0x00 "RMR,Reset Management Register"
|
|
bitfld.long 0x00 1. "RR,Reset Request" "Not requested,Requested"
|
|
bitfld.long 0x00 0. "AA64,Determines which execution state the processor boots into after a warm reset" "AArch32,AArch64"
|
|
group.long c15:0x0015++0x00
|
|
line.long 0x00 "ADFSR,Auxiliary Data Fault Status Register"
|
|
group.long c15:0x0115++0x00
|
|
line.long 0x00 "AIFSR,Auxiliary Instruction Fault Status Register"
|
|
if corename()=="CORTEXA57"
|
|
if (((per.l(c15:0x202))&0x80000000)==0x80000000)
|
|
group.long c15:0x0005++0x00
|
|
line.long 0x00 "DFSR,Data Fault Status Register"
|
|
bitfld.long 0x00 15. "UA,Unattributable fault" "Attributable,Unattributable"
|
|
bitfld.long 0x00 14. "UC,Uncontainable fault" "Containable,Uncontainable"
|
|
newline
|
|
bitfld.long 0x00 13. "CM,Cache maintenance fault" "Not aborted,Aborted"
|
|
bitfld.long 0x00 12. "EXT,External Abort Qualifier" "DECERR,SLVERR"
|
|
newline
|
|
bitfld.long 0x00 9. "LPAE,Large physical address extension" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--5. "STATUS,Fault Status" "Address size/TTBR0/TTBR1,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Access flag/0th level,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Permission/0th level,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Async. external,Reserved,Reserved,Sync. external/on TTW/0th level,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Async. parity/on memory access,Reserved,Reserved,Sync. parity/on memory access/on TTW/0th level,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,?..."
|
|
else
|
|
group.long c15:0x0005++0x00
|
|
line.long 0x00 "DFSR,Data Fault Status Register"
|
|
bitfld.long 0x00 15. "UA,Unattributable fault" "Attributable,Unattributable"
|
|
bitfld.long 0x00 14. "UC,Uncontainable fault" "Containable,Uncontainable"
|
|
newline
|
|
bitfld.long 0x00 13. "CM,Cache maintenance fault" "Not aborted,Aborted"
|
|
bitfld.long 0x00 12. "EXT,External Abort Qualifier" "DECERR,SLVERR"
|
|
newline
|
|
bitfld.long 0x00 11. "WNR,Access Caused an Abort Type" "Read,Write"
|
|
bitfld.long 0x00 9. "LPAE,Large physical address extension" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "DOMAIN,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15"
|
|
bitfld.long 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Alignment,Debug event,Access flag/1st level,Reserved,Translation/1st level,Access flag/2nd level,Translation/1st level,Sync. external/non-translation,Domain/1st level,Reserved,Domain/2nd level,Sync. external/1st level,Permission/1nd level,Sync. external/2nd level,Permission/2nd level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Async. external,Reserved,Async. parity,Sync. parity,Reserved,Reserved,Sync. parity/1st level,Reserved,Sync. parity/2nd level,?..."
|
|
endif
|
|
elif corename()=="CORTEXA53"
|
|
if (((per.l(c15:0x202))&0x80000000)==0x80000000)
|
|
group.long c15:0x0005++0x00
|
|
line.long 0x00 "DFSR,Data Fault Status Register"
|
|
bitfld.long 0x00 13. "CM,Cache maintenance fault" "Not aborted,Aborted"
|
|
bitfld.long 0x00 12. "EXT,External Abort Qualifier" "DECERR,SLVERR"
|
|
newline
|
|
bitfld.long 0x00 11. "WNR,Access Caused an Abort Type" "Read,Write"
|
|
bitfld.long 0x00 0.--5. "STATUS,Fault Status" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Reserved,Reserved,Reserved,Reserved,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Reserved,LDREX/STREX,?..."
|
|
else
|
|
group.long c15:0x0005++0x00
|
|
line.long 0x00 "DFSR,Data Fault Status Register"
|
|
bitfld.long 0x00 13. "CM,Cache maintenance fault" "Not aborted,Aborted"
|
|
bitfld.long 0x00 12. "EXT,External Abort Qualifier" "DECERR,SLVERR"
|
|
newline
|
|
bitfld.long 0x00 11. "WNR,Access Caused an Abort Type" "Read,Write"
|
|
bitfld.long 0x00 4.--7. "DOMAIN,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15"
|
|
newline
|
|
bitfld.long 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Alignment,Debug event,Access flag/section,Instruction cache maintenance,Translation/section,Access flag/page,Translation/page,Sync. external/non-translation,Domain/section,Reserved,Domain/page,Sync. external/1st level,Permission/section,Sync. external/2nd level,Permission/2nd level,TLB conflict,Reserved,Reserved,Reserved,Reserved,LDREX or STREX,Async. external,Reserved,Async. parity,Sync. parity,Reserved,Reserved,Sync. parity/1st level,Reserved,Sync. parity/2nd level,?..."
|
|
endif
|
|
endif
|
|
if corename()=="CORTEXA57"
|
|
if (((per.l(c15:0x202))&0x80000000)==0x80000000)
|
|
group.long c15:0x0105++0x00
|
|
line.long 0x00 "IFSR,Instruction Fault Status Register"
|
|
bitfld.long 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR"
|
|
bitfld.long 0x00 9. "LPAE,Large physical address extension" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "STATUS,Fault Status" "Address size/TTBR0/TTBR1,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Access flag/0th level,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Permission/0th level,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Reserved,Reserved,Reserved,Reserved,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,?..."
|
|
else
|
|
group.long c15:0x0105++0x00
|
|
line.long 0x00 "IFSR,Instruction Fault Status Register"
|
|
bitfld.long 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR"
|
|
bitfld.long 0x00 9. "LPAE,Large physical address extension" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Alignment,Debug event,Access flag/1st level,Reserved,Translation/1st level,Access flag/2nd level,Translation/2nd level,Sync. external/non-translation,Domain/1st level,Reserved,Domain/2nd level,Sync. external/on TTW/1st level,Permission/1st level,Sync. external/on TTW/2nd level,Permission/2nd level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access,Reserved,Reserved,Sync. parity/on TTW/1st level,Reserved,Sync. parity/on TTW/2nd level,?..."
|
|
endif
|
|
elif corename()=="CORTEXA53"
|
|
if (((per.l(c15:0x202))&0x80000000)==0x80000000)
|
|
group.long c15:0x0105++0x00
|
|
line.long 0x00 "IFSR,Instruction Fault Status Register"
|
|
bitfld.long 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR"
|
|
bitfld.long 0x00 9. "LPAE,Large physical address extension" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0.--5. "STATUS,Fault Status" "Address size/TTBR0/TTBR1,Reserved,Reserved,Reserved,Reserved,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Reserved,Reserved,Reserved,Reserved,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..."
|
|
else
|
|
group.long c15:0x0105++0x00
|
|
line.long 0x00 "IFSR,Instruction Fault Status Register"
|
|
bitfld.long 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR"
|
|
bitfld.long 0x00 9. "LPAE,Large physical address extension" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Reserved,Debug event,Access flag/section,Reserved,Translation/section,Access flag/page,Translation/page,Sync. external/non-translation,Domain/section,Reserved,Domain/page,Sync. external/on TTW/1st level,Permission/section,Sync. external/on TTW/2nd level,Permission/page,TLB conflict,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access,Reserved,Reserved,Sync. parity/on TTW/1st level,Reserved,Sync. parity/on TTW/2nd level,?..."
|
|
endif
|
|
endif
|
|
group.long c15:0x0006++0x00
|
|
line.long 0x00 "DFAR,Data Fault Address Register"
|
|
group.long c15:0x0206++0x00
|
|
line.long 0x00 "IFAR,Instruction Fault Address Register"
|
|
if corename()=="CORTEXA57"
|
|
rgroup.long c15:0x103F++0x00
|
|
line.long 0x00 "CBAR,Configuration Base Address Register"
|
|
hexmask.long.word 0x00 18.--31. 1. "PERIPHBASE[31:18],Periphbase[31:18]"
|
|
hexmask.long.word 0x00 0.--11. 1. "PERIPHBASE[42:32],Periphbase[42:32]"
|
|
elif corename()=="CORTEXA53"
|
|
rgroup.long c15:0x103F++0x00
|
|
line.long 0x00 "CBAR,Configuration Base Address Register"
|
|
hexmask.long.word 0x00 18.--31. 1. "PERIPHBASE[31:18],Periphbase[31:18]"
|
|
hexmask.long.byte 0x00 0.--7. 1. "PERIPHBASE[39:32],Periphbase[39:32]"
|
|
endif
|
|
group.long c15:0x000D++0x00
|
|
line.long 0x00 "FCSEIDR,FCSE Process ID register"
|
|
group.long c15:0x020D++0x00
|
|
line.long 0x00 "TPIDRURW,PL0 Read/Write Software Thread ID Register"
|
|
group.long c15:0x030D++0x00
|
|
line.long 0x00 "TPIDRURO,PL0 Read-Only Software Thread ID Register"
|
|
group.long c15:0x040D++0x00
|
|
line.long 0x00 "TPIDRPRW,PL1 Software Thread ID Register"
|
|
tree.end
|
|
tree "Memory Management Unit"
|
|
if corename()=="CORTEXA57"
|
|
group.long c15:0x0001++0x0
|
|
line.long 0x0 "SCTLR,Control Register"
|
|
bitfld.long 0x0 30. "TE,T32 exception enable" "A32,T32"
|
|
bitfld.long 0x0 29. "AFE,Access Flag Enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0 28. "TRE,TEX remap enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big"
|
|
newline
|
|
bitfld.long 0x0 20. "UWXN,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced"
|
|
bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced"
|
|
newline
|
|
bitfld.long 0x0 18. "NTWE,Not trap WFE" "No,Yes"
|
|
bitfld.long 0x0 16. "NTWI,Not trap WFI" "No,Yes"
|
|
newline
|
|
bitfld.long 0x0 13. "V,Base Location of Exception Registers" "0x00000000,0xFFFF0000"
|
|
bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes"
|
|
bitfld.long 0x0 7. "ITD,IT Disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x0 6. "THEE,ThumbEE Disable" "No,Yes"
|
|
bitfld.long 0x0 5. "CP15BEN,c15 barrier enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled"
|
|
group.long c15:0x4001++0x0
|
|
line.long 0x00 "HSCTLR,System Control Register"
|
|
bitfld.long 0x0 30. "TE,Thumb exception enable" "ARM,Thumb"
|
|
bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big"
|
|
newline
|
|
bitfld.long 0x0 21. "FI,Fast Interrupts configuration enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 19. "WXN,Write permission implies XN" "Not forced,Forced"
|
|
newline
|
|
bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x0 7. "ITD,IT Disable" "No,Yes"
|
|
bitfld.long 0x0 5. "CP15BEN,CP15 barrier enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0 0. "M,Enable address translation" "Disabled,Enabled"
|
|
if (((per.l(c15:0x0202))&0x80000000)==0x00000000)
|
|
// MPIDR[31]==1 case is missing here for TTBR0 and TTBR1
|
|
group.long c15:0x0002++0x00
|
|
line.long 0x00 "TTBR0,Translation Table Base Registers"
|
|
hexmask.long 0x00 6.--31. 0x40 "TTB1,Translation table base address"
|
|
bitfld.long 0x00 5. "NOS,Not outer shareable bit" "Outer,Inner"
|
|
newline
|
|
bitfld.long 0x00 3.--4. "RGN,Region" "Normal,Outer Write-Back Write-Allocate Cacheable,Outer Write-Through Cacheable,Outer Write-Back no Write-Allocate Cacheable"
|
|
bitfld.long 0x00 2. "IMP,Implementation" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 1. "S,Shareable" "Non-shareable,Shareable"
|
|
bitfld.long 0x00 0. "C,Cacheable" "Non-cacheable,Cacheable"
|
|
group.long c15:0x0102++0x00
|
|
line.long 0x00 "TTBR1,Translation Table Base Registers"
|
|
hexmask.long 0x00 6.--31. 0x40 "TTBA,Translation table base address"
|
|
bitfld.long 0x00 5. "NOS,Not outer shareable bit" "Outer,Inner"
|
|
newline
|
|
bitfld.long 0x00 3.--4. "RGN,Region" "Normal,Outer Write-Back Write-Allocate Cacheable,Outer Write-Through Cacheable,Outer Write-Back no Write-Allocate Cacheable"
|
|
bitfld.long 0x00 2. "IMP,Implementation" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 1. "S,Shareable" "Non-shareable,Shareable"
|
|
bitfld.long 0x00 0. "C,Cacheable" "Non-cacheable,Cacheable"
|
|
else
|
|
group.quad c15:0x10020++0x01
|
|
line.quad 0x00 "TTBR0,Translation Table Base Registers"
|
|
hexmask.quad.byte 0x00 48.--55. 1. "ASID,ASID for the translation table base address"
|
|
hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address"
|
|
group.quad c15:0x11020++0x01
|
|
line.quad 0x00 "TTBR1,Translation Table Base Registers"
|
|
hexmask.quad.byte 0x00 48.--55. 1. "ASID,ASID for the translation table base address"
|
|
hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address"
|
|
endif
|
|
if (((per.l(c15:0x0202))&0x80000000)==0x00000000)
|
|
group.long c15:0x0202++0x00
|
|
line.long 0x00 "TTBCR,Translation Table Base Control Register"
|
|
bitfld.long 0x00 31. "EAE,Extended Address Enable" "32-bit,40-bit"
|
|
bitfld.long 0x00 5. "PD1,Translation table walk disable for translations using TTBR1" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 4. "PD0,Translation table walk disable for translations using TTBR0" "No,Yes"
|
|
bitfld.long 0x00 0.--2. "N,Width of the base address held in TTBR0" "0,1,2,3,4,5,6,7"
|
|
else
|
|
group.long c15:0x0202++0x00
|
|
line.long 0x00 "TTBCR,Translation Table Base Control Register"
|
|
bitfld.long 0x00 31. "EAE,Extended Address Enable" "32-bit,40-bit"
|
|
bitfld.long 0x00 28.--29. "SH1,Shareability attributes for the memory associated with the translation table walks using TTBR1" "Non-Shareable,Reserved,Non-Shareable,Inner Shareable"
|
|
newline
|
|
bitfld.long 0x00 26.--27. "ORGN1,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR1" "0,1,2,3"
|
|
bitfld.long 0x00 24.--25. "IRGN1,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR1" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 23. "EPD1,Translation Walk Disable for TTBR1" "No,Yes"
|
|
bitfld.long 0x00 22. "A1,Select ASID from TTBR1 ASID field" "Selected,Not selected"
|
|
newline
|
|
bitfld.long 0x00 16.--18. "T1SZ,The Size offset of the TTBR1 addressed region" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "Non-Shareable,Reserved,Non-Shareable,Inner Shareable"
|
|
newline
|
|
bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 7. "EPD0,Translation Walk Disable for TTBR0 region" "No,Yes"
|
|
bitfld.long 0x00 0.--2. "T0SZ,The Size offset of the TTBR0/HTTBR addressed region" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
elif corename()=="CORTEXA53"
|
|
group.long c15:0x0001++0x0
|
|
line.long 0x0 "SCTLR,Control Register"
|
|
bitfld.long 0x0 30. "TE,T32 exception enable" "A32,T32"
|
|
bitfld.long 0x0 29. "AFE,Access Flag Enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0 28. "TRE,TEX remap enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big"
|
|
newline
|
|
bitfld.long 0x0 20. "UWXN,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced"
|
|
bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced"
|
|
newline
|
|
bitfld.long 0x0 18. "NTWE,Not trap WFE" "No,Yes"
|
|
bitfld.long 0x0 16. "NTWI,Not trap WFI" "No,Yes"
|
|
newline
|
|
bitfld.long 0x0 13. "V,Base Location of Exception Registers" "0x00000000,0xFFFF0000"
|
|
bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes"
|
|
bitfld.long 0x0 6. "ITD,IT Disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x0 5. "CP15BEN,c15 barrier enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled"
|
|
bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled"
|
|
group.long c15:0x4001++0x0
|
|
line.long 0x00 "HSCTLR,System Control Register"
|
|
bitfld.long 0x0 30. "TE,Thumb exception enable" "ARM,Thumb"
|
|
bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big"
|
|
newline
|
|
bitfld.long 0x0 21. "FI,Fast Interrupts configuration enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 19. "WXN,Write permission implies XN" "Not forced,Forced"
|
|
newline
|
|
bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x0 7. "ITD,IT Disable" "No,Yes"
|
|
bitfld.long 0x0 5. "CP15BEN,CP15 barrier enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0 0. "M,Enable address translation" "Disabled,Enabled"
|
|
if (((per.l(c15:0x202))&0x80000000)==0x80000000)
|
|
group.quad c15:0x10020++0x01
|
|
line.quad 0x00 "TTBR0,Translation Table Base Register 0"
|
|
hexmask.quad.byte 0x00 48.--55. 1. "ASID,ASID for the translation table base address"
|
|
hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address"
|
|
group.quad c15:0x11020++0x01
|
|
line.quad 0x00 "TTBR1,Translation Table Base Register 1"
|
|
hexmask.quad.byte 0x00 48.--55. 1. "ASID,ASID for the translation table base address"
|
|
hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address"
|
|
group.long c15:0x0202++0x00
|
|
line.long 0x00 "TTBCR,Translation Table Base Control Register"
|
|
bitfld.long 0x00 31. "EAE,Extended Address Enable" "32-bit,40-bit"
|
|
bitfld.long 0x00 28.--29. "SH1,Shareability attributes for the memory associated with the translation table walks using TTBR1" "Non-Shareable,Reserved,Outer Shareable,Inner Shareable"
|
|
newline
|
|
bitfld.long 0x00 26.--27. "ORGN1,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR1" "0,1,2,3"
|
|
bitfld.long 0x00 24.--25. "IRGN1,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR1" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 23. "EPD1,Translation Walk Disable for TTBR1" "No,Yes"
|
|
bitfld.long 0x00 22. "A1,Select ASID from TTBR1 ASID field" "Selected,Not selected"
|
|
newline
|
|
bitfld.long 0x00 16.--18. "T1SZ,The Size offset of the TTBR1 addressed region" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "Non-Shareable,Reserved,Outer Shareable,Inner Shareable"
|
|
newline
|
|
bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 7. "EPD0,Translation Walk Disable for TTBR0 region" "No,Yes"
|
|
bitfld.long 0x00 0.--2. "T0SZ,The Size offset of the TTBR0/HTTBR addressed region" "0,1,2,3,4,5,6,7"
|
|
else
|
|
group.long c15:0x0002++0x00
|
|
line.long 0x00 "TTBR0,Translation Table Base Register 0"
|
|
hexmask.long 0x00 7.--31. 0x80 "TTB0,Translation table base 0 address"
|
|
bitfld.long 0x00 6. 0. "IRGN,Inner region bits" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
newline
|
|
bitfld.long 0x00 5. "NOS,Not Outer Shareable bit" "Outer,Inner"
|
|
bitfld.long 0x00 3.--4. "RGN,RGN" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
newline
|
|
bitfld.long 0x00 1. "S,Shareable bit" "Non-shareable,Shareable"
|
|
group.long c15:0x0102++0x00
|
|
line.long 0x00 "TTBR1,Translation Table Base Register 1"
|
|
hexmask.long 0x00 7.--31. 0x80 "TTB1,Translation table base 1 address"
|
|
bitfld.long 0x00 0. 6. "IRGN,Inner region bits" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
newline
|
|
bitfld.long 0x00 5. "NOS,Not Outer Shareable bit" "Outer,Inner"
|
|
bitfld.long 0x00 3.--4. "RGN,RGN" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
|
|
newline
|
|
bitfld.long 0x00 1. "S,Shareable bit" "Non-shareable,Shareable"
|
|
group.long c15:0x0202++0x00
|
|
line.long 0x00 "TTBCR,Translation Table Base Control Register"
|
|
bitfld.long 0x00 31. "EAE,Extended Address Enable" "32-bit,40-bit"
|
|
bitfld.long 0x00 5. "PD1,Translation table walk disable for translations using TTBR1" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 4. "PD0,Translation table walk disable for translations using TTBR0" "No,Yes"
|
|
bitfld.long 0x00 0.--2. "N,Width of the base address held in TTBR0" "0,1,2,3,4,5,6,7"
|
|
endif
|
|
endif
|
|
if corename()=="CORTEXA57"
|
|
group.quad c15:0x14020++0x01
|
|
line.quad 0x00 "HTTBR,Hypervisor Translation Table Base Register"
|
|
hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address"
|
|
elif corename()=="CORTEXA53"
|
|
group.quad c15:0x14020++0x01
|
|
line.quad 0x00 "HTTBR,Hypervisor Translation Table Base Register"
|
|
endif
|
|
group.long c15:0x4202++0x00
|
|
line.long 0x00 "HTCR,Hypervisor Translation Control Register"
|
|
bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "Non-Shareable,Reserved,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3"
|
|
bitfld.long 0x00 0.--2. "T0SZ,The Size offset of the TTBR0/HTTBR addressed region" "0,1,2,3,4,5,6,7"
|
|
group.long c15:0x0003++0x00
|
|
line.long 0x00 "DACR,Domain Access Control Register"
|
|
bitfld.long 0x0 30.--31. "D15,Domain Access 15" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 28.--29. "D14,Domain Access 14" "Denied,Client,Reserved,Manager"
|
|
newline
|
|
bitfld.long 0x0 26.--27. "D13,Domain Access 13" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 24.--25. "D12,Domain Access 12" "Denied,Client,Reserved,Manager"
|
|
newline
|
|
bitfld.long 0x0 22.--23. "D11,Domain Access 11" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 20.--21. "D10,Domain Access 10" "Denied,Client,Reserved,Manager"
|
|
newline
|
|
bitfld.long 0x0 18.--19. "D9,Domain Access 9" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 16.--17. "D8,Domain Access 8" "Denied,Client,Reserved,Manager"
|
|
newline
|
|
bitfld.long 0x0 14.--15. "D7,Domain Access 7" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 12.--13. "D6,Domain Access 6" "Denied,Client,Reserved,Manager"
|
|
newline
|
|
bitfld.long 0x0 10.--11. "D5,Domain Access 5" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 8.--9. "D4,Domain Access 4" "Denied,Client,Reserved,Manager"
|
|
newline
|
|
bitfld.long 0x0 6.--7. "D3,Domain Access 3" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 4.--5. "D2,Domain Access 2" "Denied,Client,Reserved,Manager"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "D1,Domain Access 1" "Denied,Client,Reserved,Manager"
|
|
bitfld.long 0x0 0.--1. "D0,Domain Access 0" "Denied,Client,Reserved,Manager"
|
|
if (((per.l(c15:0x202))&0x80000000)==0x80000000)
|
|
group.quad c15:0x10070++0x01
|
|
line.quad 0x00 "PAR,Physical Address Register"
|
|
else
|
|
group.long c15:0x0047++0x00
|
|
line.long 0x00 "PAR,Physical Address Register"
|
|
endif
|
|
tree.open "Memory Attribute Indirection Registers"
|
|
group.long c15:0x403A++0x00
|
|
line.long 0x00 "HAMAIR0,Hypervisor Auxiliary Memory Attribute Indirection Register 0"
|
|
group.long c15:0x413A++0x00
|
|
line.long 0x00 "HAMAIR1,Hypervisor Auxiliary Memory Attribute Indirection Register 1"
|
|
group.long c15:0x002A++0x00
|
|
line.long 0x00 "MAIR0,Memory Attribute Indirection Register 0"
|
|
bitfld.long 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
|
|
bitfld.long 0x00 24.--27. "ATTR3L,Attribute 3 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
|
|
newline
|
|
bitfld.long 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
|
|
bitfld.long 0x00 16.--19. "ATTR2L,Attribute 2 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
|
|
newline
|
|
bitfld.long 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
|
|
bitfld.long 0x00 8.--11. "ATTR1L,Attribute 1 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
|
|
bitfld.long 0x00 0.--3. "ATTR0L,Attribute 0 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
|
|
group.long c15:0x012A++0x00
|
|
line.long 0x00 "MAIR1,Memory Attribute Indirection Register 1"
|
|
bitfld.long 0x00 28.--31. "ATTR7H,Attribute 7 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
|
|
bitfld.long 0x00 24.--27. "ATTR7L,Attribute 7 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
|
|
newline
|
|
bitfld.long 0x00 20.--23. "ATTR6H,Attribute 6 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
|
|
bitfld.long 0x00 16.--19. "ATTR6L,Attribute 6 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
|
|
newline
|
|
bitfld.long 0x00 12.--15. "ATTR5H,Attribute 5 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
|
|
bitfld.long 0x00 8.--11. "ATTR5L,Attribute 5 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "ATTR4H,Attribute 4 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
|
|
bitfld.long 0x00 0.--3. "ATTR4L,Attribute 4 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
|
|
group.long c15:0x003A++0x00
|
|
line.long 0x00 "AMAIR0,Auxiliary Memory Attribute Indirection Register 0"
|
|
group.long c15:0x013A++0x00
|
|
line.long 0x00 "AMAIR1,Auxiliary Memory Attribute Indirection Register 1"
|
|
group.long c15:0x402A++0x00
|
|
line.long 0x00 "HMAIR0,Hypervisor Memory Attribute Indirection Register 0"
|
|
bitfld.long 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
|
|
bitfld.long 0x00 24.--27. "ATTR3L,Attribute 3 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
|
|
newline
|
|
bitfld.long 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
|
|
bitfld.long 0x00 16.--19. "ATTR2L,Attribute 2 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
|
|
newline
|
|
bitfld.long 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
|
|
bitfld.long 0x00 8.--11. "ATTR1L,Attribute 1 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
|
|
bitfld.long 0x00 0.--3. "ATTR0L,Attribute 0 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
|
|
group.long c15:0x412A++0x00
|
|
line.long 0x00 "HMAIR1,Hypervisor Memory Attribute Indirection Register 1"
|
|
bitfld.long 0x00 28.--31. "ATTR7H,Attribute 7 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
|
|
bitfld.long 0x00 24.--27. "ATTR7L,Attribute 7 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
|
|
newline
|
|
bitfld.long 0x00 20.--23. "ATTR6H,Attribute 6 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
|
|
bitfld.long 0x00 16.--19. "ATTR6L,Attribute 6 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
|
|
newline
|
|
bitfld.long 0x00 12.--15. "ATTR5H,Attribute 5 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
|
|
bitfld.long 0x00 8.--11. "ATTR5L,Attribute 5 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "ATTR4H,Attribute 4 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
|
|
bitfld.long 0x00 0.--3. "ATTR4L,Attribute 4 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
|
|
if (((per.l(c15:0x202))&0x80000000)==0x00000000)
|
|
group.long c15:0x002A++0x0
|
|
line.long 0x00 "PRRR,Primary Region Remap Register"
|
|
bitfld.long 0x00 31. "NOS7,Outer Shareable property mapping for memory attributes" "Outer,Inner"
|
|
bitfld.long 0x00 30. "NOS6,Outer Shareable property mapping for memory attributes" "Outer,Inner"
|
|
newline
|
|
bitfld.long 0x00 29. "NOS5,Outer Shareable property mapping for memory attributes" "Outer,Inner"
|
|
bitfld.long 0x00 28. "NOS4,Outer Shareable property mapping for memory attributes" "Outer,Inner"
|
|
newline
|
|
bitfld.long 0x00 27. "NOS3,Outer Shareable property mapping for memory attributes" "Outer,Inner"
|
|
bitfld.long 0x00 26. "NOS2,Outer Shareable property mapping for memory attributes" "Outer,Inner"
|
|
newline
|
|
bitfld.long 0x00 25. "NOS1,Outer Shareable property mapping for memory attributes" "Outer,Inner"
|
|
bitfld.long 0x00 24. "NOS0,Outer Shareable property mapping for memory attributes" "Outer,Inner"
|
|
newline
|
|
bitfld.long 0x00 19. "NS1,Shareable Attribute Remap when S=1 for Normal Regions" "Remapped,Not remapped"
|
|
bitfld.long 0x00 18. "NS0,Shareable Attribute Remap when S=0 for Normal Regions" "Not remapped,Remapped"
|
|
newline
|
|
bitfld.long 0x00 17. "DS1,Shareable Attribute Remap when S=1 for Device regions" "Remapped,Not remapped"
|
|
bitfld.long 0x00 16. "DS0,Shareable Attribute Remap when S=0 for Device regions" "Not remapped,Remapped"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "TR7,{TEX[0] C B} = b111 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..."
|
|
bitfld.long 0x00 12.--13. "TR6,{TEX[0] C B} = b110 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..."
|
|
newline
|
|
bitfld.long 0x00 10.--11. "TR5,{TEX[0] C B} = b101 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..."
|
|
bitfld.long 0x00 8.--9. "TR4,{TEX[0] C B} = b100 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..."
|
|
newline
|
|
bitfld.long 0x00 6.--7. "TR3,{TEX[0] C B} = b011 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..."
|
|
bitfld.long 0x00 4.--5. "TR2,{TEX[0] C B} = b010 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..."
|
|
newline
|
|
bitfld.long 0x00 2.--3. "TR1,{TEX[0] C B} = b001 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..."
|
|
bitfld.long 0x00 0.--1. "TR0,{TEX[0] C B} = b000 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..."
|
|
group.long c15:0x012A++0x0
|
|
line.long 0x00 "NMRR,Normal Memory Remap Register"
|
|
bitfld.long 0x00 30.--31. "OR7,Outer Attribute for {TEX[0] C B} = b111 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 28.--29. "OR6,Outer Attribute for {TEX[0] C B} = b110 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
|
|
newline
|
|
bitfld.long 0x00 26.--27. "OR5,Outer Attribute for {TEX[0] C B} = b101 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 24.--25. "OR4,Outer Attribute for {TEX[0] C B} = b100 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
|
|
newline
|
|
bitfld.long 0x00 22.--23. "OR3,Outer Attribute for {TEX[0] C B} = b011 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 20.--21. "OR2,Outer Attribute for {TEX[0] C B} = b010 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
|
|
newline
|
|
bitfld.long 0x00 18.--19. "OR1,Outer Attribute for {TEX[0] C B} = b001 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 16.--17. "OR0,Outer Attribute for {TEX[0] C B} = b000 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
|
|
newline
|
|
bitfld.long 0x00 14.--15. "IR7,Inner attribute for {TEX[0] C B} = b111 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 12.--13. "IR6,Inner attribute for {TEX[0] C B} = b110 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
|
|
newline
|
|
bitfld.long 0x00 10.--11. "IR5,Inner attribute for {TEX[0] C B} = b101 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 8.--9. "IR4,Inner attribute for {TEX[0] C B} = b100 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
|
|
newline
|
|
bitfld.long 0x00 6.--7. "IR3,Inner attribute for {TEX[0] C B} = b011 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 4.--5. "IR2,Inner attribute for {TEX[0] C B} = b010 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
|
|
newline
|
|
bitfld.long 0x00 2.--3. "IR1,Inner attribute for {TEX[0] C B} = b001 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
|
|
bitfld.long 0x00 0.--1. "IR0,Inner attribute for {TEX[0] C B} = b000 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
|
|
newline
|
|
endif
|
|
tree.end
|
|
newline
|
|
if (((per.l(c15:0x202))&0x80000000)==0x00000000)
|
|
group.long c15:0x10d++0x00
|
|
line.long 0x00 "CONTEXTIDR,Context ID Register"
|
|
else
|
|
group.long c15:0x10d++0x00
|
|
line.long 0x00 "CONTEXTIDR,Context ID Register"
|
|
hexmask.long.tbyte 0x00 8.--31. 1. "PROCID,Process identifier"
|
|
hexmask.long.byte 0x00 0.--7. 1. "ASID,Address space identifier"
|
|
endif
|
|
tree.end
|
|
tree "Virtualization Extensions"
|
|
group.long c15:0x4000++0x0
|
|
line.long 0x00 "VPIDR,Virtualization Processor ID Register"
|
|
group.long c15:0x4500++0x00
|
|
line.long 0x00 "VMPIDR,Virtualization Multiprocessor ID Register"
|
|
group.long c15:0x420D++0x00
|
|
line.long 0x00 "HTPIDR,Hypervisor Software Thread ID Register"
|
|
group.long c15:0x4001++0x0
|
|
line.long 0x00 "HSCTLR,System Control Register"
|
|
bitfld.long 0x0 30. "TE,Thumb exception enable" "ARM,Thumb"
|
|
bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big"
|
|
newline
|
|
bitfld.long 0x0 21. "FI,Fast Interrupts configuration enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 19. "WXN,Write permission implies XN" "Not forced,Forced"
|
|
newline
|
|
bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x0 7. "ITD,IT Disable" "No,Yes"
|
|
bitfld.long 0x0 5. "CP15BEN,CP15 barrier enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
|
|
bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0 0. "M,Enable address translation" "Disabled,Enabled"
|
|
group.long c15:0x4101++0x00
|
|
line.long 0x00 "HACTLR,Hypervisor Auxiliary Control Register"
|
|
bitfld.long 0x00 6. "L2ACTLRAC,L2ACTLR write access control" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. "L2ECTLRAC,L2ECTLR write access control" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 4. "L2CTLRAC,L2CTLR write access control" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. "CPUECTLRAC,CPUECTLR write access control" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "CPUACTLRAC,CPUACTLR write access control" "Disabled,Enabled"
|
|
if corename()=="CORTEXA57"
|
|
group.long c15:0x4011++0x00
|
|
line.long 0x00 "HCR,Hypervisor Configuration Register"
|
|
bitfld.long 0x00 30. "TRVM,Trap Read of Virtual Memory controls" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. "TGE,Trap General Exceptions" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. "TVM,Trap Virtual Memory Controls" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. "TTLB,Trap TLB maintenance instructions" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 24. "TPU,Trap Cache maintenance instructions to point of unification" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. "TPC,Trap Data/Unified cache maintenance instructions to point of coherency" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 22. "TSW,Trap Data/Unified cache Set/Way instructions" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. "TAC,Trap Auxiliary Control Register Accesses" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 20. "TIDCP,Trap Lockdown" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. "TSC,Trap SMC" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 18. "TID3,Trap ID Group 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. "TID2,Trap ID Group 2" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 16. "TID1,Trap ID Group 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. "TID0,Trap ID Group 0" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 14. "TWE,Trap WFE" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. "TWI,Trap WFI" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 12. "DC,Default Cacheable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10.--11. "BSU,Barrier Shareability Upgrade" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 9. "FB,Force Broadcast of TLB maintenance BPIALL and ICIALLU instructions" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. "VA,Virtual External Asynchronous Abort" "Not aborted,Aborted"
|
|
newline
|
|
bitfld.long 0x00 7. "VI,Virtual IRQ interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. "VF,Virtual FIQ interrupt" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 5. "AMO,A-bit Mask Override" "Not routed,Routed"
|
|
bitfld.long 0x00 4. "IMO,I-bit Mask Override" "Not routed,Routed"
|
|
newline
|
|
bitfld.long 0x00 3. "FMO,F-bit Mask Override" "Not routed,Routed"
|
|
bitfld.long 0x00 2. "PTW,Protected Table Walk" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. "SWIO,Set/Way Invalidation Override" "No override,Override"
|
|
bitfld.long 0x00 0. "VM,Second Stage of Translation Enable" "Disabled,Enabled"
|
|
elif corename()=="CORTEXA53"
|
|
group.long c15:0x4011++0x00
|
|
line.long 0x00 "HCR,Hypervisor Configuration Register"
|
|
bitfld.long 0x00 30. "TRVM,Trap Read of Virtual Memory controls" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. "HCD,Hypervisor Call Disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 27. "TGE,Trap General Exceptions" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. "TVM,Trap Virtual Memory Controls" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 25. "TTLB,Trap TLB maintenance instructions" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. "TPU,Trap Cache maintenance instructions to point of unification" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 23. "TPC,Trap Data/Unified cache maintenance instructions to point of coherency" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. "TSW,Trap Data/Unified cache Set/Way instructions" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 21. "TAC,Trap Auxiliary Control Register Accesses" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. "TIDCP,Trap Lockdown" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 19. "TSC,Trap SMC" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. "TID3,Trap ID Group 3" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 17. "TID2,Trap ID Group 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. "TID1,Trap ID Group 1" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 15. "TID0,Trap ID Group 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. "TWE,Trap WFE" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 13. "TWI,Trap WFI" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. "DC,Default Cacheable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 10.--11. "BSU,Barrier Shareability Upgrade" "0,1,2,3"
|
|
bitfld.long 0x00 9. "FB,Force Broadcast of TLB maintenance BPIALL and ICIALLU instructions" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 8. "VA,Virtual External Asynchronous Abort" "No aborted,Aborted"
|
|
bitfld.long 0x00 7. "VI,Virtual IRQ interrupt" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 6. "VF,Virtual FIQ interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. "AMO,A-bit Mask Override" "No override,Override"
|
|
newline
|
|
bitfld.long 0x00 4. "IMO,I-bit Mask Override" "No override,Override"
|
|
bitfld.long 0x00 3. "FMO,F-bit Mask Override" "No override,Override"
|
|
newline
|
|
bitfld.long 0x00 2. "PTW,Protected Table Walk" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. "SWIO,Set/Way Invalidation Override" "No override,Override"
|
|
newline
|
|
bitfld.long 0x00 0. "VM,Second Stage of Translation Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long c15:0x4411++0x00
|
|
line.long 0x00 "HCR2,Hypervisor Configuration Register 2"
|
|
bitfld.long 0x00 1. "ID,Stage 2 Instruction cache disable" "No,Yes"
|
|
bitfld.long 0x00 0. "CD,Stage 2 Data cache disable" "No,Yes"
|
|
group.long c15:0x4111++0x00
|
|
line.long 0x00 "HDCR,Hypervisor Debug Control Register"
|
|
bitfld.long 0x00 11. "TDRA,Trap Debug ROM Access" "No effect,Valid"
|
|
bitfld.long 0x00 10. "TDOSA,Trap Debug OS-related register Access" "No effect,Valid"
|
|
newline
|
|
bitfld.long 0x00 9. "TDA,Trap Debug Access" "No effect,Valid"
|
|
bitfld.long 0x00 8. "TDE,Trap Debug Exceptions" "No effect,Valid"
|
|
newline
|
|
bitfld.long 0x00 7. "HPME,Hypervisor Performance Monitors Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. "TPM,Trap Performance Monitors accesses" "No effect,Valid"
|
|
newline
|
|
bitfld.long 0x00 5. "TPMCR,Trap Performance Monitor Control Register accesses" "No effect,Valid"
|
|
bitfld.long 0x00 0.--4. "HPMN,Defines the number of Performance Monitors counters" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long c15:0x4211++0x00
|
|
line.long 0x00 "HCPTR,Hypervisor Architectural Feature Trap Register"
|
|
bitfld.long 0x0 31. "TCPAC,Trap Coprocessor Access Control" "Not trapped,Trapped"
|
|
bitfld.long 0x0 20. "TTA,Trap Trace Access" "Not trapped,?..."
|
|
newline
|
|
bitfld.long 0x0 15. "TASE,Trap Advanced SIMD extensions" "Not trapped,Trapped"
|
|
bitfld.long 0x0 11. "TCP11,Trap coprocessor 11" "Not trapped,Trapped"
|
|
newline
|
|
bitfld.long 0x0 10. "TCP10,Trap coprocessor 10" "Not trapped,Trapped"
|
|
group.long c15:0x4311++0x00
|
|
line.long 0x00 "HSTR,Hypervisor System Trap Register"
|
|
bitfld.long 0x00 16. "TTEE,Trap ThumbEE" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. "T15,Trap to Hypervisor mode Non-secure priv 15" "Reserved,?..."
|
|
newline
|
|
hexmask.long.word 0x00 5.--13. 1. "T4_15,Trap to Hypervisor mode Non-secure priv 5 - 13"
|
|
bitfld.long 0x00 0.--3. "T0_13,Trap to Hypervisor mode Non-secure priv 0 - 3," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long c15:0x4711++0x00
|
|
line.long 0x00 "HACR,Hypervisor Auxiliary Configuration Register"
|
|
if corename()=="CORTEXA57"
|
|
group.quad c15:0x14020++0x01
|
|
line.quad 0x00 "HTTBR,Hypervisor Translation Table Base Register"
|
|
hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address"
|
|
elif corename()=="CORTEXA53"
|
|
group.quad c15:0x14020++0x01
|
|
line.quad 0x00 "HTTBR,Hypervisor Translation Table Base Register"
|
|
endif
|
|
group.long c15:0x4202++0x00
|
|
line.long 0x00 "HTCR,Hypervisor Translation Control Register"
|
|
bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "Non-Shareable,Reserved,Outer Shareable,Inner Shareable"
|
|
bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3"
|
|
bitfld.long 0x00 0.--2. "T0SZ,The Size offset of the TTBR0/HTTBR addressed region" "0,1,2,3,4,5,6,7"
|
|
group.quad c15:0x16020++0x01
|
|
line.quad 0x00 "VTTBR,Virtualization Translation Table Base Register"
|
|
group.long c15:0x4212++0x00
|
|
line.long 0x00 "VTCR,Virtualization Translation Control Register"
|
|
bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using VTTBR" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using VTTBR" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks VTTBR" "0,1,2,3"
|
|
bitfld.long 0x00 6.--7. "SL0,Starting Level for VTCR addressed region" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 4. "S,Sign-extension of the T0SZ field" "Low,High"
|
|
bitfld.long 0x00 0.--3. "T0SZ,The Size offset of the VTCR addressed region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long c15:0x4015++0x00
|
|
line.long 0x00 "HADFSR,Hypervisor Auxiliary Data Fault Status Syndrome Register"
|
|
group.long c15:0x4115++0x00
|
|
line.long 0x00 "HAIFSR,Hypervisor Auxiliary Instruction Fault Status Syndrome Register"
|
|
group.long c15:0x4006++0x00
|
|
line.long 0x00 "HDFAR,Hypervisor Data Fault Address Register"
|
|
group.long c15:0x4025++0x00
|
|
line.long 0x00 "HSR,Hypervisor Syndrome Register"
|
|
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to c15,Trapped MCRR/MRRC to c15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped Coprocessor Usage,Trapped MRC,Trapped Jazelle instruction,Trapped BXJ,Reserved,Trapped MRRC,Reserved,Reserved,Reserved,Reserved,SVC,HVC,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hypervisor mode Instruction Abort,Executing within Hypervisor mode Instruction Abort,Reserved,Reserved,Entry into Hypervisor mode Data Abort,Executing within Hypervisor mode Data Abort,?..."
|
|
bitfld.long 0x00 25. "IL,Instruction length" "16-bit,32-bit"
|
|
newline
|
|
hexmask.long 0x00 0.--24. 1. "ISS,Instruction specific syndrome"
|
|
group.long c15:0x4206++0x00
|
|
line.long 0x00 "HIFAR,Hypervisor Instruction Fault Address Register"
|
|
group.long c15:0x4406++0x00
|
|
line.long 0x00 "HPFAR,Hypervisor IPA Fault Address Register"
|
|
hexmask.long 0x00 4.--31. 1. "FIPA[39:12],Bits [39:12] of the faulting intermediate physical address"
|
|
tree.open "Hypervisor Memory Attribute Indirection Registers"
|
|
group.long c15:0x402A++0x00
|
|
line.long 0x00 "HMAIR0,Hypervisor Memory Attribute Indirection Register 0"
|
|
bitfld.long 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
|
|
bitfld.long 0x00 24.--27. "ATTR3L,Attribute 3 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
|
|
newline
|
|
bitfld.long 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
|
|
bitfld.long 0x00 16.--19. "ATTR2L,Attribute 2 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
|
|
newline
|
|
bitfld.long 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
|
|
bitfld.long 0x00 8.--11. "ATTR1L,Attribute 1 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
|
|
bitfld.long 0x00 0.--3. "ATTR0L,Attribute 0 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
|
|
group.long c15:0x412A++0x00
|
|
line.long 0x00 "HMAIR1,Hypervisor Memory Attribute Indirection Register 1"
|
|
bitfld.long 0x00 28.--31. "ATTR7H,Attribute 7 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
|
|
bitfld.long 0x00 24.--27. "ATTR7L,Attribute 7 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
|
|
newline
|
|
bitfld.long 0x00 20.--23. "ATTR6H,Attribute 6 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
|
|
bitfld.long 0x00 16.--19. "ATTR6L,Attribute 6 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
|
|
newline
|
|
bitfld.long 0x00 12.--15. "ATTR5H,Attribute 5 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
|
|
bitfld.long 0x00 8.--11. "ATTR5L,Attribute 5 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "ATTR4H,Attribute 4 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
|
|
bitfld.long 0x00 0.--3. "ATTR4L,Attribute 4 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
|
|
group.long c15:0x403A++0x00
|
|
line.long 0x00 "HAMAIR0,Hypervisor Auxiliary Memory Attribute Indirection Register 0"
|
|
group.long c15:0x413A++0x00
|
|
line.long 0x00 "HAMAIR1,Hypervisor Auxiliary Memory Attribute Indirection Register 1"
|
|
tree.end
|
|
newline
|
|
group.long c15:0x400C++0x00
|
|
line.long 0x00 "HVBAR,Hypervisor Vector Base Address Register"
|
|
hexmask.long 0x00 5.--31. 0x20 "HVBADDR,Hypervisor Vector Base Address"
|
|
tree.end
|
|
tree "Cache Control and Configuration"
|
|
rgroup.long c15:0x0100++0x0
|
|
line.long 0x0 "CTR,Cache Type Register"
|
|
bitfld.long 0x0 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
|
|
bitfld.long 0x0 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
|
|
newline
|
|
bitfld.long 0x0 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
|
|
bitfld.long 0x0 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,VIPT,PIPT"
|
|
newline
|
|
bitfld.long 0x0 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
|
|
if corename()=="CORTEXA57"
|
|
rgroup.long c15:0x1100++0x0
|
|
line.long 0x0 "CLIDR,Cache Level ID Register"
|
|
bitfld.long 0x00 27.--29. "LOUU,Level of Unification Uniprocessor" "Reserved,Level 1,?..."
|
|
bitfld.long 0x00 24.--26. "LOC,Level of Coherency" "Reserved,Reserved,Level 3,?..."
|
|
bitfld.long 0x00 21.--23. "LOUIS,Level of Unification Inner Shareable" "Reserved,Level 2,?..."
|
|
newline
|
|
bitfld.long 0x00 18.--20. "CTYPE7,Cache type for levels 7" "No cache,?..."
|
|
bitfld.long 0x00 15.--17. "CTYPE6,Cache type for levels 6" "No cache,?..."
|
|
bitfld.long 0x00 12.--14. "CTYPE5,Cache type for levels 5" "No cache,?..."
|
|
newline
|
|
bitfld.long 0x00 9.--11. "CTYPE4,Cache type for levels 4" "No cache,?..."
|
|
bitfld.long 0x00 6.--8. "CTYPE3,Cache type for levels 3" "No cache,?..."
|
|
bitfld.long 0x00 3.--5. "CTYPE2,Cache type for levels 2" "Reserved,Reserved,Reserved,Reserved,Unified,?..."
|
|
newline
|
|
bitfld.long 0x00 0.--2. "CTYPE1,Cache type for levels 1" "Reserved,Reserved,Reserved,Separate Inst/Data,?..."
|
|
elif corename()=="CORTEXA53"
|
|
rgroup.long c15:0x1100++0x0
|
|
line.long 0x0 "CLIDR,Cache Level ID Register"
|
|
bitfld.long 0x00 30.--31. "ICB,Inner cache boundary" "Not disclosed,?..."
|
|
bitfld.long 0x00 27.--29. "LOUU,Level of Unification Uniprocessor" "Reserved,Level 1,?..."
|
|
bitfld.long 0x00 24.--26. "LOC,Level of Coherency" "Reserved,L1,L1/L2,?..."
|
|
newline
|
|
bitfld.long 0x00 21.--23. "LOUIS,Level of Unification Inner Shareable" "Reserved,Level 1,?..."
|
|
bitfld.long 0x00 6.--8. "CTYPE3,Cache type for levels 3" "No cache,?..."
|
|
bitfld.long 0x00 3.--5. "CTYPE2,Cache type for levels 2" "No cache,Reserved,Reserved,Reserved,Unified,?..."
|
|
newline
|
|
bitfld.long 0x00 0.--2. "CTYPE1,Cache type for levels 1" "Reserved,Reserved,Reserved,Separate Inst/Data,?..."
|
|
endif
|
|
rgroup.long c15:0x1700++0x0
|
|
line.long 0x00 "AIDR,Auxiliary ID Register"
|
|
rgroup.long c15:0x1000++0x0
|
|
line.long 0x0 "CCSIDR,Current Cache Size ID Register"
|
|
bitfld.long 0x00 31. "WT,Write-Through" "Not Supported,Supported"
|
|
bitfld.long 0x00 30. "WB,Write-Back" "Not Supported,Supported"
|
|
newline
|
|
bitfld.long 0x00 29. "RA,Read-Allocate" "Not Supported,Supported"
|
|
bitfld.long 0x00 28. "WA,Write-Allocate" "Not Supported,Supported"
|
|
newline
|
|
hexmask.long.word 0x00 13.--27. 1. "SETS,Number of Sets"
|
|
hexmask.long.word 0x00 3.--12. 1. "ASSOC,Associativity"
|
|
newline
|
|
bitfld.long 0x00 0.--2. "LSIZE,Line Size" "16 bytes,32 bytes,64 bytes,128 bytes,?..."
|
|
group.long c15:0x2000++0x0
|
|
line.long 0x0 "CSSELR,Cache Size Selection Register"
|
|
bitfld.long 0x00 1.--3. "LEVEL,Cache level of required cache" "Level 1,Level 2,?..."
|
|
bitfld.long 0x00 0. "IND,Instruction/Not Data" "Data/Unified,Instruction"
|
|
tree "Level 1 memory system"
|
|
if corename()=="CORTEXA57"
|
|
group.long c15:0x001F++0x00
|
|
line.long 0x00 "DL1DATA0,Data L1 Data 0 Register"
|
|
group.long c15:0x011F++0x00
|
|
line.long 0x00 "DL1DATA1,Data L1 Data 1 Register"
|
|
group.long c15:0x021F++0x00
|
|
line.long 0x00 "DL1DATA2,Data L1 Data 2 Register"
|
|
group.long c15:0x031F++0x00
|
|
line.long 0x00 "DL1DATA3,Data L1 Data 3 Register"
|
|
group.long c15:0x000F++0x00
|
|
line.long 0x00 "IL1DATA0,Instruction L1 Data 0 Register"
|
|
group.long c15:0x010F++0x00
|
|
line.long 0x00 "IL1DATA1,Instruction L1 Data 1 Register"
|
|
group.long c15:0x020F++0x00
|
|
line.long 0x00 "IL1DATA2,Instruction L1 Data 2 Register"
|
|
group.long c15:0x030F++0x00
|
|
line.long 0x00 "IL1DATA3,Instruction L1 Data 3 Register"
|
|
wgroup.long c15:0x04F++0x00
|
|
line.long 0x00 "RAMINDEX,RAM Index Operation Register"
|
|
elif corename()=="CORTEXA53"
|
|
rgroup.long c15:0x300F++0x00
|
|
line.long 0x00 "CDBGDR0,Cache Debug Data Register 0"
|
|
rgroup.long c15:0x310F++0x00
|
|
line.long 0x00 "CDBGDR1,Cache Debug Data Register 1"
|
|
rgroup.long c15:0x320F++0x00
|
|
line.long 0x00 "CDBGDR2,Cache Debug Data Register 2"
|
|
rgroup.long c15:0x330F++0x00
|
|
line.long 0x00 "CDBGDR3,Cache Debug Data Register 3"
|
|
wgroup.long c15:0x302F++0x00
|
|
line.long 0x00 "CDBGDCT,Cache Debug Data Cache Tag Read Operation Register"
|
|
wgroup.long c15:0x312F++0x00
|
|
line.long 0x00 "CDBGICT,Cache Debug Instruction Cache Tag Read Operation Register"
|
|
wgroup.long c15:0x304F++0x00
|
|
line.long 0x00 "CDBGDCD,Cache Debug Cache Debug Data Cache Data Read Operation Register"
|
|
wgroup.long c15:0x314F++0x00
|
|
line.long 0x00 "CDBGICD,Cache Debug Instruction Cache Data Read Operation Register"
|
|
wgroup.long c15:0x324F++0x00
|
|
line.long 0x00 "CDBGTD,Cache Debug TLB Data Read Operation Register"
|
|
endif
|
|
tree.end
|
|
tree "Level 2 memory system"
|
|
if corename()=="CORTEXA57"
|
|
group.long c15:0x1209++0x0
|
|
line.long 0x00 "L2CTLR,L2 Control Register"
|
|
bitfld.long 0x00 31. "L2RSTDM,L2RSTDISABLE monitor" "No,Yes"
|
|
bitfld.long 0x00 24.--25. "NCPU, Number of CPU" "1,2,3,4"
|
|
newline
|
|
rbitfld.long 0x00 22. "CPUCP,CPU Cache Protection" "Not supported,Supported"
|
|
bitfld.long 0x00 21. "SCUL2CP,SCU-L2 Cache Protection" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 20. "DIECCE,Data in-line ECC enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 13. "L2AS,L2 arbitration slice" "Not present,Present"
|
|
newline
|
|
rbitfld.long 0x00 12. "L2TRAMS,L2 Tag RAM slice" "Not present,Present"
|
|
rbitfld.long 0x00 10.--11. "L2DRAMS,L2 Data RAM slice" "Not present,1,2,Present"
|
|
newline
|
|
bitfld.long 0x00 9. "L2TRAMS,L2 Tag RAM setup" "0 cycle,1 cycle"
|
|
bitfld.long 0x00 6.--8. "L2TRAML,L2 Tag RAM latency" "2 cycles,2 cycles,3 cycles,4 cycles,5 cycles,5 cycles,5 cycles,5 cycles"
|
|
newline
|
|
rbitfld.long 0x00 5. "DRAMIL,L2 data RAM input latency" "0 cycle,1 cycle"
|
|
bitfld.long 0x00 0.--2. "DRAML,L2 data RAM latency" "2 cycles,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
|
|
group.long c15:0x1309++0x0
|
|
line.long 0x00 "L2ECTLR,L2 Extended Control Register"
|
|
bitfld.long 0x00 30. "L2INTASYNCERR,L2 internal asynchronous error" "No error,Error"
|
|
bitfld.long 0x00 29. "AXIASYNCERR,AXI asynchronous error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 0.--2. "L2DRC,L2 dynamic retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks"
|
|
group.long c15:0x100F++0x00
|
|
line.long 0x00 "L2ACTLR,L2 Auxiliary Control Register"
|
|
bitfld.long 0x00 28. "FL2TBCEA,Force L2 tag bank clock enable active" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. "FL2LCEA,Force L2 logic clock enable active" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. "FL2GICRCGEA,Forces L2, GIC CPU interface, and Timer Regional Clock Gate(RCG) enables active" "Not forced,Forced"
|
|
bitfld.long 0x00 25. "ESIAA,Enables single issue across all tag banks when the L2 arbitration replay threshold is reached" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 23. "DPRFRUT,Disables prefetch requests from ReadUnique transactions" "No,Yes"
|
|
bitfld.long 0x00 22. "DDTLSPR,Disable dynamic throttling of load/store prefetch requests" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 20.--21. "DTL2PRFEQOC,Disable throttling of L2 prefetch requests based on Fill/Evict Queue(FEQ) occupancy count" "12,10,8,Disabled"
|
|
bitfld.long 0x00 18.--19. "DLASQ,Disable limit on NC/SO/Dev stores in Address Sequence Queue" "12 entries,10 entries,8 entries,No limit"
|
|
newline
|
|
bitfld.long 0x00 17. "DL2RRA,Disable L2 round-robin arbitration that only clocks through paths with an active requestor waiting to be arbitrated" "No,Yes"
|
|
bitfld.long 0x00 16. "ERTSI,Enable replay threshold single issue" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 15. "DFFD,Disable fast forwarding of data from ACE or CHI to LS and IF" "No,Yes"
|
|
bitfld.long 0x00 14. "EUCE,Enables UniqueClean evictions with data" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 13. "DCEO,Disable clean evict optimization" "No,Yes"
|
|
bitfld.long 0x00 11. "DDSB,Disable DSB with no DVM synchronization" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 10. "DNSDAR,Disable Non-secure debug array read" "No,Yes"
|
|
bitfld.long 0x00 8. "DDVMCMOMB,Disable DVM and cache maintenance operation message broadcast" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 7. "EHDT,Enable hazard detect timeout" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. "DACESCHIST,Disable ACE shareable or CHI snoopable transactions from master" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 4. "DWUWLUTFM,Disable WriteUnique and WriteLineUnique transactions from master" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. "DCEPTE,Disables clean/evict push to external" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 2. "LTORPTB,Limit to one request per tag bank" "Normal,Limited"
|
|
bitfld.long 0x00 1. "EARTT,Enable arbitration replay threshold timeout" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. "DHPF,Disable hardware prefetch forwarding" "No,Yes"
|
|
group.quad c15:0x130F0++0x01
|
|
line.quad 0x00 "L2MERRSR,L2 Memory Error Syndrome Register"
|
|
bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1"
|
|
hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count"
|
|
newline
|
|
hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count"
|
|
bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid"
|
|
newline
|
|
hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier"
|
|
bitfld.quad 0x00 18.--21. "C/W,CPUID/Way" "CPU0 tag way 0,CPU0 tag way 1,CPU1 tag way 0,CPU1 tag way 1,CPU2 tag way 0,CPU2 tag way 1,CPU3 tag way 0,CPU3 tag way 1,?..."
|
|
newline
|
|
hexmask.quad.tbyte 0x00 0.--17. 1. "IND,Index"
|
|
elif corename()=="CORTEXA53"
|
|
group.long c15:0x1209++0x0
|
|
line.long 0x00 "L2CTLR,L2 Control Register"
|
|
bitfld.long 0x00 24.--25. "NCPU, Number of CPU" "1,2,3,4"
|
|
bitfld.long 0x00 22. "CPUCP,CPU Cache Protection" "Disabled,Enabled"
|
|
newline
|
|
rbitfld.long 0x00 21. "SCUL2CP,SCU-L2 Cache Protection" "Disabled,Enabled"
|
|
rbitfld.long 0x00 5. "DRAMIL,L2 data RAM input latency" "1 cycle,2 cycle"
|
|
newline
|
|
rbitfld.long 0x00 0. "DRAMOL,L2 data RAM output latency" "2 cycles,3 cycles"
|
|
group.long c15:0x1309++0x0
|
|
line.long 0x00 "L2ECTLR,L2 Extended Control Register"
|
|
bitfld.long 0x00 30. "L2INTASYNCERR,L2 internal asynchronous error" "No error,Error"
|
|
bitfld.long 0x00 29. "AXIASYNCERR,AXI asynchronous error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 0.--2. "L2DRC,L2 dynamic retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks"
|
|
group.long c15:0x100F++0x00
|
|
line.long 0x00 "L2ACTLR,L2 Auxiliary Control Register"
|
|
bitfld.long 0x00 30.--31. "L2VC,L2 victim Control" "0,1,2,3"
|
|
bitfld.long 0x00 14. "EUCE,Enables UniqueClean evictions with data" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 3. "DCEPTE,Disables clean/evict push to external" "No,Yes"
|
|
group.quad c15:0x110F0++0x01
|
|
line.quad 0x00 "L2MERRSR,L2 Memory Error Syndrome Register"
|
|
bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1"
|
|
hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count"
|
|
newline
|
|
hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count"
|
|
bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid"
|
|
newline
|
|
hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier"
|
|
bitfld.quad 0x00 18.--21. "C/W,CPUID/Way" "CPU0 tag way 0,CPU0 tag way 1,CPU1 tag way 0,CPU1 tag way 1,CPU2 tag way 0,CPU2 tag way 1,CPU3 tag way 0,CPU3 tag way 1,?..."
|
|
newline
|
|
hexmask.quad.word 0x00 3.--16. 1. "RAD,RAM index address"
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
tree "System Performance Monitor"
|
|
group.long c15:0xc9++0x00
|
|
line.long 0x0 "PMCR,Performance Monitor Control Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "IMP,Implementer code"
|
|
hexmask.long.byte 0x00 16.--23. 1. "IDCODE,Identification code"
|
|
rbitfld.long 0x00 11.--15. "N,Number of counters implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 6. "LC,Long cycle count enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 5. "DP,Disable CCNT when prohibited" "No,Yes"
|
|
bitfld.long 0x00 4. "X,Export Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. "D,Clock Divider" "Every cycle,64th cycle"
|
|
bitfld.long 0x00 2. "C,Clock Counter Reset" "No reset,Reset"
|
|
newline
|
|
bitfld.long 0x00 1. "P,Performance Counter Reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. "E,All Counters Enable" "Disabled,Enabled"
|
|
newline
|
|
group.long c15:0x1c9++0x00
|
|
line.long 0x00 "PMNCNTENSET,Count Enable Set Register "
|
|
bitfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. "P30,Event Counter 30 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. "P29,Event Counter 29 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. "P28,Event Counter 28 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. "P27,Event Counter 27 enable bit" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. "P26,Event Counter 26 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. "P25,Event Counter 25 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. "P24,Event Counter 24 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. "P23,Event Counter 23 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. "P22,Event Counter 22 enable bit" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 21. "P21,Event Counter 21 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. "P20,Event Counter 20 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. "P19,Event Counter 19 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. "P18,Event Counter 18 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. "P17,Event Counter 17 enable bit" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 16. "P16,Event Counter 16 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. "P15,Event Counter 15 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. "P14,Event Counter 14 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. "P13,Event Counter 13 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. "P12,Event Counter 12 enable bit" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 11. "P11,Event Counter 11 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. "P10,Event Counter 10 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. "P9,Event Counter 9 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. "P8,Event Counter 8 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. "P7,Event Counter 7 enable bit" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. "P6,Event Counter 6 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. "P5,Event Counter 5 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. "P4,Event Counter 4 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. "P3,Event Counter 3 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. "P2,Event Counter 2 enable bit" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Event Counter 1 enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. "P0,Event Counter 0 enable bit" "Disabled,Enabled"
|
|
group.long c15:0x2c9++0x00
|
|
line.long 0x00 "PMCNTENCLR,Count Enable Clear Register"
|
|
eventfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 30. "P30,Event Counter 30 clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 29. "P29,Event Counter 29 clear bit " "Disabled,Enabled"
|
|
eventfld.long 0x00 28. "P28,Event Counter 28 clear bit " "Disabled,Enabled"
|
|
eventfld.long 0x00 27. "P27,Event Counter 27 clear bit " "Disabled,Enabled"
|
|
newline
|
|
eventfld.long 0x00 26. "P26,Event Counter 26 clear bit " "Disabled,Enabled"
|
|
eventfld.long 0x00 25. "P25,Event Counter 25 clear bit " "Disabled,Enabled"
|
|
eventfld.long 0x00 24. "P24,Event Counter 24 clear bit " "Disabled,Enabled"
|
|
eventfld.long 0x00 23. "P23,Event Counter 23 clear bit " "Disabled,Enabled"
|
|
eventfld.long 0x00 22. "P22,Event Counter 22 clear bit " "Disabled,Enabled"
|
|
newline
|
|
eventfld.long 0x00 21. "P21,Event Counter 21 clear bit " "Disabled,Enabled"
|
|
eventfld.long 0x00 20. "P20,Event Counter 20 clear bit " "Disabled,Enabled"
|
|
eventfld.long 0x00 19. "P19,Event Counter 19 clear bit " "Disabled,Enabled"
|
|
eventfld.long 0x00 18. "P18,Event Counter 18 clear bit " "Disabled,Enabled"
|
|
eventfld.long 0x00 17. "P17,Event Counter 17 clear bit " "Disabled,Enabled"
|
|
newline
|
|
eventfld.long 0x00 16. "P16,Event Counter 16 clear bit " "Disabled,Enabled"
|
|
eventfld.long 0x00 15. "P15,Event Counter 15 clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 14. "P14,Event Counter 14 clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 13. "P13,Event Counter 13 clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 12. "P12,Event Counter 12 clear bit" "Disabled,Enabled"
|
|
newline
|
|
eventfld.long 0x00 11. "P11,Event Counter 11 clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 10. "P10,Event Counter 10 clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 9. "P9,Event Counter 9 clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 8. "P8,Event Counter 8 clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 7. "P7,Event Counter 7 clear bit" "Disabled,Enabled"
|
|
newline
|
|
eventfld.long 0x00 6. "P6,Event Counter 6 clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 5. "P5,Event Counter 5 clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 4. "P4,Event Counter 4 clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 3. "P3,Event Counter 3 clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 2. "P2,Event Counter 2 clear bit" "Disabled,Enabled"
|
|
newline
|
|
eventfld.long 0x00 1. "P1,Event Counter 1 clear bit" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. "P0,Event Counter 0 clear bit" "Disabled,Enabled"
|
|
group.long c15:0x3c9++0x00
|
|
line.long 0x00 "PMOVSR,Performance Monitor Overflow Status Register"
|
|
eventfld.long 0x00 31. "C,PMCCNTR overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 30. "P30,PMN30 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 29. "P29,PMN29 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 28. "P28,PMN28 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 27. "P27,PMN27 overflow" "No overflow,Overflow"
|
|
newline
|
|
eventfld.long 0x00 26. "P26,PMN26 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 25. "P25,PMN25 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 24. "P24,PMN24 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 23. "P23,PMN23 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 22. "P22,PMN22 overflow" "No overflow,Overflow"
|
|
newline
|
|
eventfld.long 0x00 21. "P21,PMN21 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 20. "P20,PMN20 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 19. "P19,PMN19 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 18. "P18,PMN18 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 17. "P17,PMN17 overflow" "No overflow,Overflow"
|
|
newline
|
|
eventfld.long 0x00 16. "P16,PMN16 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 15. "P15,PMN15 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 14. "P14,PMN14 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 13. "P13,PMN13 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 12. "P12,PMN12 overflow" "No overflow,Overflow"
|
|
newline
|
|
eventfld.long 0x00 11. "P11,PMN11 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 10. "P10,PMN10 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 9. "P9,PMN9 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 8. "P8,PMN8 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 7. "P7,PMN7 overflow" "No overflow,Overflow"
|
|
newline
|
|
eventfld.long 0x00 6. "P6,PMN6 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 5. "P5,PMN5 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 4. "P4,PMN4 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 3. "P3,PMN3 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 2. "P2,PMN2 overflow" "No overflow,Overflow"
|
|
newline
|
|
eventfld.long 0x00 1. "P1,PMN1 overflow" "No overflow,Overflow"
|
|
eventfld.long 0x00 0. "P0,PMN0 overflow" "No overflow,Overflow"
|
|
group.long c15:0x4c9++0x00
|
|
line.long 0x00 "PMSWINC,Performance Monitor Software Increment"
|
|
bitfld.long 0x00 30. "P30,Increment PMN30" "No action,Increment"
|
|
bitfld.long 0x00 29. "P29,Increment PMN29" "No action,Increment"
|
|
bitfld.long 0x00 28. "P28,Increment PMN28" "No action,Increment"
|
|
bitfld.long 0x00 27. "P27,Increment PMN27" "No action,Increment"
|
|
bitfld.long 0x00 26. "P26,Increment PMN26" "No action,Increment"
|
|
newline
|
|
bitfld.long 0x00 25. "P25,Increment PMN25" "No action,Increment"
|
|
bitfld.long 0x00 24. "P24,Increment PMN24" "No action,Increment"
|
|
bitfld.long 0x00 23. "P23,Increment PMN23" "No action,Increment"
|
|
bitfld.long 0x00 22. "P22,Increment PMN22" "No action,Increment"
|
|
bitfld.long 0x00 21. "P21,Increment PMN21" "No action,Increment"
|
|
newline
|
|
bitfld.long 0x00 20. "P20,Increment PMN20" "No action,Increment"
|
|
bitfld.long 0x00 19. "P19,Increment PMN19" "No action,Increment"
|
|
bitfld.long 0x00 18. "P18,Increment PMN18" "No action,Increment"
|
|
bitfld.long 0x00 17. "P17,Increment PMN17" "No action,Increment"
|
|
bitfld.long 0x00 16. "P16,Increment PMN16" "No action,Increment"
|
|
newline
|
|
bitfld.long 0x00 15. "P15,Increment PMN15" "No action,Increment"
|
|
bitfld.long 0x00 14. "P14,Increment PMN14" "No action,Increment"
|
|
bitfld.long 0x00 13. "P13,Increment PMN13" "No action,Increment"
|
|
bitfld.long 0x00 12. "P12,Increment PMN12" "No action,Increment"
|
|
bitfld.long 0x00 11. "P11,Increment PMN11" "No action,Increment"
|
|
newline
|
|
bitfld.long 0x00 10. "P10,Increment PMN10" "No action,Increment"
|
|
bitfld.long 0x00 9. "P9,Increment PMN9" "No action,Increment"
|
|
bitfld.long 0x00 8. "P8,Increment PMN8" "No action,Increment"
|
|
bitfld.long 0x00 7. "P7,Increment PMN7" "No action,Increment"
|
|
bitfld.long 0x00 6. "P6,Increment PMN6" "No action,Increment"
|
|
newline
|
|
bitfld.long 0x00 5. "P5,Increment PMN5" "No action,Increment"
|
|
bitfld.long 0x00 4. "P4,Increment PMN4" "No action,Increment"
|
|
bitfld.long 0x00 3. "P3,Increment PMN3" "No action,Increment"
|
|
bitfld.long 0x00 2. "P2,Increment PMN2" "No action,Increment"
|
|
bitfld.long 0x00 1. "P1,Increment PMN1" "No action,Increment"
|
|
newline
|
|
bitfld.long 0x00 0. "P0,Increment PMN0" "No action,Increment"
|
|
group.long c15:0x5c9++0x00
|
|
line.long 0x00 "PMSELR,Performance Monitor Select Register"
|
|
bitfld.long 0x00 0.--4. "SEL,Current event counter select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..."
|
|
group.long c15:0xd9++0x00
|
|
line.long 0x00 "PMCCNTR,Performance Monitor Cycle Count Register"
|
|
group.long c15:0x1d9++0x00
|
|
line.long 0x00 "PMXEVTYPER,Performance Monitor Event Type Register"
|
|
group.long c15:0x2d9++0x00
|
|
line.long 0x00 "PMXEVCNTR,Performance Monitor Event Count Register"
|
|
group.long c15:0xe9++0x00
|
|
line.long 0x00 "PMUSERENR,Performance Monitor User Enable Register"
|
|
bitfld.long 0x00 3. "ER,Event counter read enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. "CR,Cycle counter read enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. "SW,Software Increment write enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. "EN,User mode access enable" "Disabled,Enabled"
|
|
group.long c15:0x1e9++0x00
|
|
line.long 0x00 "PMINTENSET,Performance Monitor Interrupt Enable Set"
|
|
bitfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. "P30,PMCNT30 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. "P29,PMCNT29 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. "P28,PMCNT28 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. "P27,PMCNT27 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. "P26,PMCNT26 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. "P25,PMCNT25 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. "P24,PMCNT24 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. "P23,PMCNT23 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. "P22,PMCNT22 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 21. "P21,PMCNT21 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. "P20,PMCNT20 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. "P19,PMCNT19 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. "P18,PMCNT18 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. "P17,PMCNT17 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 16. "P16,PMCNT16 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. "P15,PMCNT15 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. "P14,PMCNT14 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. "P13,PMCNT13 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. "P12,PMCNT12 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 11. "P11,PMCNT11 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. "P10,PMCNT10 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. "P9,PMCNT9 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. "P8,PMCNT8 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. "P7,PMCNT7 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. "P6,PMCNT6 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. "P5,PMCNT5 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. "P4,PMCNT4 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. "P3,PMCNT3 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. "P2,PMCNT2 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,PMCNT1 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. "P0,PMCNT0 Overflow Interrupt Enable" "Disabled,Enabled"
|
|
group.long c15:0x2e9++0x00
|
|
line.long 0x00 "PMINTENCLR,Performance Monitor Interrupt Enable Clear"
|
|
eventfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled"
|
|
eventfld.long 0x00 30. "P30,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 29. "P29,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 28. "P28,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 27. "P27,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
newline
|
|
eventfld.long 0x00 26. "P26,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 25. "P25,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 24. "P24,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 23. "P23,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 22. "P22,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
newline
|
|
eventfld.long 0x00 21. "P21,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 20. "P20,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 19. "P19,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 18. "P18,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 17. "P17,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
newline
|
|
eventfld.long 0x00 16. "P16,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 15. "P15,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 14. "P14,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 13. "P13,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 12. "P12,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
newline
|
|
eventfld.long 0x00 11. "P11,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 10. "P10,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 9. "P9,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 8. "P8,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 7. "P7,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
newline
|
|
eventfld.long 0x00 6. "P6,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 5. "P5,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 4. "P4,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 3. "P3,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 2. "P2,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
newline
|
|
eventfld.long 0x00 1. "P1,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
eventfld.long 0x00 0. "P0,Overflow Interrupt Clear" "Disabled,Enabled"
|
|
group.long c15:0x3e9++0x00
|
|
line.long 0x00 "PMOVSSET,Performance Monitor Overflow Flag Status Set Register"
|
|
group.long c15:0x8E++0x00
|
|
line.long 0x00 "PMEVCNTR0,Performance Monitors Event Count Register 0"
|
|
group.long c15:(0x8E+0x40)++0x00
|
|
line.long 0x00 "PMEVTYPER0,Performance Monitors Selected Event Type Register 0"
|
|
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
|
|
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
|
|
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
|
|
newline
|
|
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
|
|
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
|
|
group.long c15:0x18E++0x00
|
|
line.long 0x00 "PMEVCNTR1,Performance Monitors Event Count Register 1"
|
|
group.long c15:(0x18E+0x40)++0x00
|
|
line.long 0x00 "PMEVTYPER1,Performance Monitors Selected Event Type Register 1"
|
|
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
|
|
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
|
|
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
|
|
newline
|
|
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
|
|
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
|
|
group.long c15:0x28E++0x00
|
|
line.long 0x00 "PMEVCNTR2,Performance Monitors Event Count Register 2"
|
|
group.long c15:(0x28E+0x40)++0x00
|
|
line.long 0x00 "PMEVTYPER2,Performance Monitors Selected Event Type Register 2"
|
|
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
|
|
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
|
|
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
|
|
newline
|
|
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
|
|
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
|
|
group.long c15:0x38E++0x00
|
|
line.long 0x00 "PMEVCNTR3,Performance Monitors Event Count Register 3"
|
|
group.long c15:(0x38E+0x40)++0x00
|
|
line.long 0x00 "PMEVTYPER3,Performance Monitors Selected Event Type Register 3"
|
|
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
|
|
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
|
|
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
|
|
newline
|
|
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
|
|
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
|
|
group.long c15:0x48E++0x00
|
|
line.long 0x00 "PMEVCNTR4,Performance Monitors Event Count Register 4"
|
|
group.long c15:(0x48E+0x40)++0x00
|
|
line.long 0x00 "PMEVTYPER4,Performance Monitors Selected Event Type Register 4"
|
|
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
|
|
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
|
|
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
|
|
newline
|
|
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
|
|
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
|
|
group.long c15:0x58E++0x00
|
|
line.long 0x00 "PMEVCNTR5,Performance Monitors Event Count Register 5"
|
|
group.long c15:(0x58E+0x40)++0x00
|
|
line.long 0x00 "PMEVTYPER5,Performance Monitors Selected Event Type Register 5"
|
|
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
|
|
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
|
|
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
|
|
newline
|
|
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
|
|
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
|
|
group.long c15:0x07FE++0x00
|
|
line.long 0x00 "PMCCFILTR,Performance Monitors Cycle Count Filter Register"
|
|
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
|
|
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
|
|
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
|
|
newline
|
|
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
|
|
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
|
|
tree.end
|
|
tree "System Timer Registers"
|
|
group.long c15:0x000E++0x00
|
|
line.long 0x00 "CNTFRQ,Counter Frequency Register"
|
|
rgroup.quad c15:0x100E0++0x01
|
|
line.quad 0x00 "CNTPCT,Counter Physical Count Register"
|
|
group.long c15:0x001E++0x00
|
|
line.long 0x00 "CNTKCTL,Timer PL1 Control Register"
|
|
bitfld.long 0x00 9. "EL0PTEN,Controls whether the physical timer registers are accessible from EL0 modes" "Not accessible,Accessible"
|
|
bitfld.long 0x00 8. "EL0VTEN,Controls whether the virtual timer registers are accessible from EL0 modes" "Not accessible,Accessible"
|
|
bitfld.long 0x00 4.--7. "EVNTI,Selects which bit of CNTVCT is the trigger for the event stream generated from the virtual counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 3. "EVNTDIR,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0"
|
|
newline
|
|
bitfld.long 0x00 2. "EVNTEN,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. "EL0VCTEN,Controls whether the virtual counter, CNTVCT, and the frequency register CNTFRQ, are accessible from EL0 modes" "Not accessible,Accessible"
|
|
bitfld.long 0x00 0. "EL0PCTEN,Controls whether the physical counter, CNTPCT, and the frequency register CNTFRQ, are accessible from EL0 modes" "Not accessible,Accessible"
|
|
group.long c15:0x002E++0x00
|
|
line.long 0x00 "CNTP_TVAL,Counter PL1 Physical Compare Value Register"
|
|
group.long c15:0x012E++0x00
|
|
line.long 0x00 "CNTP_CTL,Counter PL1 Physical Timer Control Register"
|
|
rbitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled"
|
|
group.long c15:0x003E++0x00
|
|
line.long 0x00 "CNTV_TVAL,Counter PL1 Virtual Timer Value Register"
|
|
group.long c15:0x013E++0x00
|
|
line.long 0x00 "CNTV_CTL,Counter PL1 Virtual Timer Control Register"
|
|
rbitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled"
|
|
group.quad c15:0x110E0++0x01
|
|
line.quad 0x00 "CNTVCT,Counter Virtual Count Register"
|
|
group.quad c15:0x120E0++0x01
|
|
line.quad 0x00 "CNTP_CVAL,Counter PL1 Physical Compare Value Register"
|
|
group.quad c15:0x130E0++0x01
|
|
line.quad 0x00 "CNTV_CVAL,Counter PL1 Virtual Compare Value Register"
|
|
group.quad c15:0x140E0++0x01
|
|
line.quad 0x00 "CNTVOFF,Counter Virtual Offset Register"
|
|
group.long c15:0x401E++0x00
|
|
line.long 0x00 "CNTHCTL,Counter Non-secure PL2 Control Register"
|
|
bitfld.long 0x00 4.--7. "EVNTI,Select trigger for the event stream generated from counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 3. "EVNTDIR,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0"
|
|
bitfld.long 0x00 2. "EVNTEN,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. "EL1VCTEN,Controls whether the Non-secure copies of the physical timer registers are accessible from Non-secure EL1 and EL0 modes" "Not accessible,Accessible"
|
|
bitfld.long 0x00 0. "EL1PCTEN,Controls whether the physical counter, CNTPCT, is accessible from Non-secure EL1 and EL0 modes" "Not accessible,Accessible"
|
|
group.long c15:0x402E++0x00
|
|
line.long 0x00 "CNTHP_TVAL,Counter Non-secure PL2 Physical Timer Value Register"
|
|
group.long c15:0x412E++0x00
|
|
line.long 0x00 "CNTHP_CTL,Counter Non-secure PL2 Physical Timer Control Register"
|
|
rbitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked"
|
|
bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled"
|
|
group.quad c15:0x160E0++0x01
|
|
line.quad 0x00 "CNTHP_CVAL,Counter Non-secure PL2 Physical Compare Value Register"
|
|
tree.end
|
|
tree "Generic Interrupt Controller CPU Interface"
|
|
tree "AArch32 GIC Physical CPU Interface System Registers"
|
|
tree.open "Interrupt Controller Active Priorities Registers"
|
|
group.long c15:0x048C++0x00
|
|
line.long 0x00 "ICC_AP0R0,Active Priorities Group 0 Register 0"
|
|
bitfld.long 0x00 31. "P31,Group 0 interrupt active with priority level 31" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 30. "P30,Group 0 interrupt active with priority level 30" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 29. "P29,Group 0 interrupt active with priority level 29" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 28. "P28,Group 0 interrupt active with priority level 28" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 27. "P27,Group 0 interrupt active with priority level 27" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 26. "P26,Group 0 interrupt active with priority level 26" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 25. "P25,Group 0 interrupt active with priority level 25" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 24. "P24,Group 0 interrupt active with priority level 24" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 23. "P23,Group 0 interrupt active with priority level 23" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 22. "P22,Group 0 interrupt active with priority level 22" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 21. "P21,Group 0 interrupt active with priority level 21" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 20. "P20,Group 0 interrupt active with priority level 20" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 19. "P19,Group 0 interrupt active with priority level 19" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 18. "P18,Group 0 interrupt active with priority level 18" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 17. "P17,Group 0 interrupt active with priority level 17" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 16. "P16,Group 0 interrupt active with priority level 16" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 15. "P15,Group 0 interrupt active with priority level 15" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 14. "P14,Group 0 interrupt active with priority level 14" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 13. "P13,Group 0 interrupt active with priority level 13" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. "P12,Group 0 interrupt active with priority level 12" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 11. "P11,Group 0 interrupt active with priority level 11" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 10. "P10,Group 0 interrupt active with priority level 10" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 9. "P9,Group 0 interrupt active with priority level 9" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. "P8,Group 0 interrupt active with priority level 8" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 7. "P7,Group 0 interrupt active with priority level 7" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. "P6,Group 0 interrupt active with priority level 6" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. "P5,Group 0 interrupt active with priority level 5" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Group 0 interrupt active with priority level 4" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. "P3,Group 0 interrupt active with priority level 3" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. "P2,Group 0 interrupt active with priority level 2" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Group 0 interrupt active with priority level 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. "P0,Group 0 interrupt active with priority level 0" "No interrupt,Interrupt"
|
|
group.long c15:0x009C++0x00
|
|
line.long 0x00 "ICC_AP1R0,Active Priorities Group 1 Register 0"
|
|
bitfld.long 0x00 31. "P31,Group 1 interrupt active with priority level 31" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 30. "P30,Group 1 interrupt active with priority level 30" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 29. "P29,Group 1 interrupt active with priority level 29" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 28. "P28,Group 1 interrupt active with priority level 28" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 27. "P27,Group 1 interrupt active with priority level 27" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 26. "P26,Group 1 interrupt active with priority level 26" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 25. "P25,Group 1 interrupt active with priority level 25" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 24. "P24,Group 1 interrupt active with priority level 24" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 23. "P23,Group 1 interrupt active with priority level 23" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 22. "P22,Group 1 interrupt active with priority level 22" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 21. "P21,Group 1 interrupt active with priority level 21" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 20. "P20,Group 1 interrupt active with priority level 20" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 19. "P19,Group 1 interrupt active with priority level 19" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 18. "P18,Group 1 interrupt active with priority level 18" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 17. "P17,Group 1 interrupt active with priority level 17" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 16. "P16,Group 1 interrupt active with priority level 16" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 15. "P15,Group 1 interrupt active with priority level 15" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 14. "P14,Group 1 interrupt active with priority level 14" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 13. "P13,Group 1 interrupt active with priority level 13" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. "P12,Group 1 interrupt active with priority level 12" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 11. "P11,Group 1 interrupt active with priority level 11" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 10. "P10,Group 1 interrupt active with priority level 10" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 9. "P9,Group 1 interrupt active with priority level 9" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. "P8,Group 1 interrupt active with priority level 8" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 7. "P7,Group 1 interrupt active with priority level 7" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. "P6,Group 1 interrupt active with priority level 6" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. "P5,Group 1 interrupt active with priority level 5" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Group 1 interrupt active with priority level 4" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. "P3,Group 1 interrupt active with priority level 3" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. "P2,Group 1 interrupt active with priority level 2" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Group 1 interrupt active with priority level 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. "P0,Group 1 interrupt active with priority level 0" "No interrupt,Interrupt"
|
|
tree.end
|
|
newline
|
|
wgroup.quad c15:0x110C0++0x01
|
|
line.quad 0x00 "ICC_ASGI1R,Alternate SGI Generation Register 1"
|
|
hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3"
|
|
bitfld.quad 0x00 40. "IRM,Interrupt Routing Mode" "Disabled,Enabled"
|
|
hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2"
|
|
newline
|
|
bitfld.quad 0x00 24.--27. "SGIID,SGI Interrupt ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1"
|
|
hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,Target List"
|
|
group.long c15:0x038C++0x00
|
|
line.long 0x00 "ICC_BPR0,Binary Point Register 0"
|
|
bitfld.long 0x00 0.--2. "BINARYPOINT,Binary point" "0,1,2,3,4,5,6,7"
|
|
group.long c15:0x03CC++0x00
|
|
line.long 0x00 "ICC_BPR1,Binary Point Register 1"
|
|
bitfld.long 0x00 0.--2. "BINARYPOINT,Binary point" "0,1,2,3,4,5,6,7"
|
|
group.long c15:0x04CC++0x00
|
|
line.long 0x00 "ICC_CTLR,Interrupt Control Registers for EL1"
|
|
rbitfld.long 0x00 15. "A3V,Affinity 3 Valid" "Not supported,Supported"
|
|
rbitfld.long 0x00 14. "SEIS,SEI Support" "Not supported,Supported"
|
|
rbitfld.long 0x00 11.--13. "IDBITS,Number of physical interrupt identifier bits supported" "16 bits,24 bits,?..."
|
|
newline
|
|
rbitfld.long 0x00 8.--10. "PRIBITS,Number of priority bits implemented" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6. "PMHE,Priority Mask Hint Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. "EOIMODE,Alias of ICC_MCTLR.EOImode_EL1" "0,1"
|
|
newline
|
|
bitfld.long 0x00 0. "CBPR,Common Binary Point Register" "0,1"
|
|
group.long c15:0x64CC++0x00
|
|
line.long 0x00 "ICC_MCTLR,Interrupt Control Registers for EL3"
|
|
rbitfld.long 0x00 17. "NDS,Disable Security not supported" "Supported,Not supported"
|
|
rbitfld.long 0x00 15. "A3V,Affinity 3 Valid" "Not supported,Supported"
|
|
rbitfld.long 0x00 14. "SEIS,Indicates whether the CPU interface supports generation of SEIs" "Not supported,Supported"
|
|
newline
|
|
rbitfld.long 0x00 11.--13. "IDBITS,The number of physical interrupt identifier bits supported" "16 bits,24 bits,?..."
|
|
rbitfld.long 0x00 8.--10. "PRIBITS,The number of priority bits implemented minus one" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6. "PMHE,Priority Mask Hint Enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 4. "EOIMODE_EL1NS,Controls whether a write to an End of Interrupt register also deactivates the interrupt(Non-secure EL1 and EL2)" "Enabled,Disabled"
|
|
bitfld.long 0x00 3. "EOIMODE_EL1S,Controls whether a write to an End of Interrupt register also deactivates the interrupt(Secure EL1)" "Enabled,Disabled"
|
|
bitfld.long 0x00 2. "EOIMODE_EL3,Controls whether a write to an End of Interrupt register also deactivates the interrupt(EL3)" "Enabled,Disabled"
|
|
newline
|
|
bitfld.long 0x00 1. "CBPR_EL1NS,Controls whether the same register is used for interrupt preemption of both Group 0 and Group 1 Non-secure interrupts at EL1" "Separate registers,Same register"
|
|
bitfld.long 0x00 0. "CBPR_EL1S,Controls whether the same register is used for interrupt preemption of both Group 0 and Group 1 Secure interrupts in Secure non-Monitor modes" "Separate registers,Same register"
|
|
if (((per.l(c15:0x4CC))&0x3800)==0x00)
|
|
wgroup.long c15:0x01BC++0x00
|
|
line.long 0x00 "ICC_DIR,Interrupt Controller Deactivate Interrupt Register"
|
|
hexmask.long.word 0x00 0.--15. 1. "INTID,The INTID of the interrupt to be deactivated"
|
|
wgroup.long c15:0x018C++0x00
|
|
line.long 0x00 "ICC_EOIR0,Interrupt Controller End Of Interrupt Register 0"
|
|
hexmask.long.word 0x00 0.--15. 1. "INTID,The INTID from the corresponding ICC_IAR0 access"
|
|
wgroup.long c15:0x01CC++0x00
|
|
line.long 0x00 "ICC_EOIR1,Interrupt Controller End Of Interrupt Register 1"
|
|
hexmask.long.word 0x00 0.--15. 1. "INTID,The INTID from the corresponding ICC_IAR1 access"
|
|
rgroup.long c15:0x028C++0x00
|
|
line.long 0x00 "ICC_HPPIR0,Interrupt Controller Highest Priority Pending Interrupt Register 0"
|
|
hexmask.long.word 0x00 0.--15. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the current security state and exception level"
|
|
rgroup.long c15:0x02CC++0x00
|
|
line.long 0x00 "ICC_HPPIR1,Interrupt Controller Highest Priority Pending Interrupt Register 1"
|
|
hexmask.long.word 0x00 0.--15. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the current security state and exception level"
|
|
elif (((per.l(c15:0x4CC))&0x3800)==0x800)
|
|
wgroup.long c15:0x01BC++0x00
|
|
line.long 0x00 "ICC_DIR,Interrupt Controller Deactivate Interrupt Register"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. "INTID,The INTID of the interrupt to be deactivated"
|
|
wgroup.long c15:0x018C++0x00
|
|
line.long 0x00 "ICC_EOIR0,Interrupt Controller End Of Interrupt Register 0"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. "INTID,The INTID from the corresponding ICC_IAR0 access"
|
|
wgroup.long c15:0x01CC++0x00
|
|
line.long 0x00 "ICC_EOIR1,Interrupt Controller End Of Interrupt Register 1"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. "INTID,The INTID from the corresponding ICC_IAR1 access"
|
|
rgroup.long c15:0x028C++0x00
|
|
line.long 0x00 "ICC_HPPIR0,Interrupt Controller Highest Priority Pending Interrupt Register 0"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the current security state and exception level"
|
|
rgroup.long c15:0x02CC++0x00
|
|
line.long 0x00 "ICC_HPPIR1,Interrupt Controller Highest Priority Pending Interrupt Register 1"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the current security state and exception level"
|
|
endif
|
|
hgroup.long c15:0x008C++0x00
|
|
hide.long 0x00 "ICC_IAR0,Interrupt Acknowledge Register 0"
|
|
in
|
|
hgroup.long c15:0x00CC++0x00
|
|
hide.long 0x00 "ICC_IAR1,Interrupt Acknowledge Register 1"
|
|
in
|
|
group.long c15:0x06CC++0x00
|
|
line.long 0x00 "ICC_IGRPEN0,Interrupt Group Enable Register 0"
|
|
bitfld.long 0x00 0. "ENABLE,Enables Group 0 interrupts" "Disabled,Enabled"
|
|
group.long c15:0x07CC++0x00
|
|
line.long 0x00 "ICC_IGRPEN1,Interrupt Group Enable Register 1"
|
|
bitfld.long 0x00 0. "ENABLE,Enables Group 0 interrupts" "Disabled,Enabled"
|
|
group.long c15:0x0064++0x00
|
|
line.long 0x00 "ICC_PMR,Priority Mask Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "PRIORITY,Priority mask level for the CPU interface"
|
|
rgroup.long c15:0x03BC++0x00
|
|
line.long 0x00 "ICC_RPR,Running Priority Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. "PRIORITY,Current running priority on the CPU interface"
|
|
wgroup.quad c15:0x120C0++0x01
|
|
line.quad 0x00 "ICC_SGI0R,SGI Generation Register 0"
|
|
hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3"
|
|
bitfld.quad 0x00 40. "IRM,Interrupt Routing Mode" "Disabled,Enabled"
|
|
hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2"
|
|
newline
|
|
bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1"
|
|
hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,Target List"
|
|
wgroup.quad c15:0x100C0++0x01
|
|
line.quad 0x00 "ICC_SGI1R,SGI Generation Register 1"
|
|
hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3"
|
|
bitfld.quad 0x00 40. "IRM,Interrupt Routing Mode" "Disabled,Enabled"
|
|
hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2"
|
|
newline
|
|
bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1"
|
|
hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,Target List"
|
|
group.long c15:0x05CC++0x00
|
|
line.long 0x00 "ICC_SRE,System Register Enable Register for EL1"
|
|
bitfld.long 0x00 2. "DIB,Disable IRQ bypass" "No,Yes"
|
|
bitfld.long 0x00 1. "DFB,Disable FIQ bypass" "No,Yes"
|
|
bitfld.long 0x00 0. "SRE,System Register Enable" "Disabled,Enabled"
|
|
if corename()=="CORTEXA53"
|
|
group.long c15:0x459C++0x00
|
|
line.long 0x00 "ICC_HSRE,System Register Enable Register for EL2"
|
|
bitfld.long 0x00 3. "ENABLE,Enable lower exception level access to ICC_SRE_EL1" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. "DIB,Disable IRQ bypass" "No,Yes"
|
|
bitfld.long 0x00 1. "DFB,Disable FIQ bypass" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 0. "SRE,System Register Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long c15:0x65CC++0x00
|
|
line.long 0x00 "ICC_MSRE,System Register Enable Register for EL3"
|
|
bitfld.long 0x00 3. "ENABLE,Enable lower exception level access to ICC_SRE_EL1 and ICC_SRE_EL2" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. "DIB,Disable IRQ bypass" "No,Yes"
|
|
bitfld.long 0x00 1. "DFB,Disable FIQ bypass" "No,Yes"
|
|
newline
|
|
bitfld.long 0x00 0. "SRE,System Register Enable" "Disabled,Enabled"
|
|
group.long c15:0x67CC++0x00
|
|
line.long 0x00 "ICC_MGRPEN1,Monitor Group1 Interrupt Group Enable"
|
|
bitfld.long 0x00 1. "ENABLEGRP1S,Enables Group 1 interrupts for the Secure state" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. "ENABLEGRP1NS,Enables Group 1 interrupts for the Non-secure state" "Disabled,Enabled"
|
|
tree.end
|
|
tree "AArch32 Virtual Interface Control System Registers"
|
|
tree.open "Hypervisor Active Priorities Registers"
|
|
group.long c15:0x408C++0x00
|
|
line.long 0x00 "ICH_AP0R0,Interrupt Controller Hypervisor Active Priorities Group 0 Register 0"
|
|
bitfld.long 0x00 31. "P31,Group 0 interrupt active with priority level 31" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 30. "P30,Group 0 interrupt active with priority level 30" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 29. "P29,Group 0 interrupt active with priority level 29" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 28. "P28,Group 0 interrupt active with priority level 28" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 27. "P27,Group 0 interrupt active with priority level 27" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 26. "P26,Group 0 interrupt active with priority level 26" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 25. "P25,Group 0 interrupt active with priority level 25" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 24. "P24,Group 0 interrupt active with priority level 24" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 23. "P23,Group 0 interrupt active with priority level 23" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 22. "P22,Group 0 interrupt active with priority level 22" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 21. "P21,Group 0 interrupt active with priority level 21" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 20. "P20,Group 0 interrupt active with priority level 20" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 19. "P19,Group 0 interrupt active with priority level 19" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 18. "P18,Group 0 interrupt active with priority level 18" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 17. "P17,Group 0 interrupt active with priority level 17" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 16. "P16,Group 0 interrupt active with priority level 16" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 15. "P15,Group 0 interrupt active with priority level 15" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 14. "P14,Group 0 interrupt active with priority level 14" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 13. "P13,Group 0 interrupt active with priority level 13" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. "P12,Group 0 interrupt active with priority level 12" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 11. "P11,Group 0 interrupt active with priority level 11" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 10. "P10,Group 0 interrupt active with priority level 10" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 9. "P9,Group 0 interrupt active with priority level 9" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. "P8,Group 0 interrupt active with priority level 8" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 7. "P7,Group 0 interrupt active with priority level 7" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. "P6,Group 0 interrupt active with priority level 6" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. "P5,Group 0 interrupt active with priority level 5" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Group 0 interrupt active with priority level 4" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. "P3,Group 0 interrupt active with priority level 3" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. "P2,Group 0 interrupt active with priority level 2" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Group 0 interrupt active with priority level 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. "P0,Group 0 interrupt active with priority level 0" "No interrupt,Interrupt"
|
|
group.long c15:0x409C++0x00
|
|
line.long 0x00 "ICH_AP1R0,Interrupt Controller Hypervisor Active Priorities Group 1 Register 0"
|
|
bitfld.long 0x00 31. "P31,Group 1 interrupt active with priority level 31" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 30. "P30,Group 1 interrupt active with priority level 30" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 29. "P29,Group 1 interrupt active with priority level 29" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 28. "P28,Group 1 interrupt active with priority level 28" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 27. "P27,Group 1 interrupt active with priority level 27" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 26. "P26,Group 1 interrupt active with priority level 26" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 25. "P25,Group 1 interrupt active with priority level 25" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 24. "P24,Group 1 interrupt active with priority level 24" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 23. "P23,Group 1 interrupt active with priority level 23" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 22. "P22,Group 1 interrupt active with priority level 22" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 21. "P21,Group 1 interrupt active with priority level 21" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 20. "P20,Group 1 interrupt active with priority level 20" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 19. "P19,Group 1 interrupt active with priority level 19" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 18. "P18,Group 1 interrupt active with priority level 18" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 17. "P17,Group 1 interrupt active with priority level 17" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 16. "P16,Group 1 interrupt active with priority level 16" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 15. "P15,Group 1 interrupt active with priority level 15" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 14. "P14,Group 1 interrupt active with priority level 14" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 13. "P13,Group 1 interrupt active with priority level 13" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. "P12,Group 1 interrupt active with priority level 12" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 11. "P11,Group 1 interrupt active with priority level 11" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 10. "P10,Group 1 interrupt active with priority level 10" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 9. "P9,Group 1 interrupt active with priority level 9" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 8. "P8,Group 1 interrupt active with priority level 8" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 7. "P7,Group 1 interrupt active with priority level 7" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. "P6,Group 1 interrupt active with priority level 6" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. "P5,Group 1 interrupt active with priority level 5" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 4. "P4,Group 1 interrupt active with priority level 4" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. "P3,Group 1 interrupt active with priority level 3" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. "P2,Group 1 interrupt active with priority level 2" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 1. "P1,Group 1 interrupt active with priority level 1" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. "P0,Group 1 interrupt active with priority level 0" "No interrupt,Interrupt"
|
|
tree.end
|
|
newline
|
|
rgroup.long c15:0x43BC++0x00
|
|
line.long 0x00 "ICH_EISR,Interrupt Controller End of Interrupt Status Register"
|
|
bitfld.long 0x00 3. "STATUS3,EOI maintenance interrupt status bit for List register 3" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. "STATUS2,EOI maintenance interrupt status bit for List register 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. "STATUS1,EOI maintenance interrupt status bit for List register 1" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 0. "STATUS0,EOI maintenance interrupt status bit for List register 0" "No interrupt,Interrupt"
|
|
rgroup.long c15:0x45BC++0x00
|
|
line.long 0x00 "ICH_ELRSR,Interrupt Controller Empty List Register Status Register"
|
|
bitfld.long 0x00 3. "STATUS3,Status bit for List register 3" "Interrupt,No interrupt"
|
|
bitfld.long 0x00 2. "STATUS2,Status bit for List register 2" "Interrupt,No interrupt"
|
|
bitfld.long 0x00 1. "STATUS1,Status bit for List register 1" "Interrupt,No interrupt"
|
|
newline
|
|
bitfld.long 0x00 0. "STATUS0,Status bit for List register 0" "Interrupt,No interrupt"
|
|
group.long c15:0x40BC++0x00
|
|
line.long 0x00 "ICH_HCR,Interrupt Controller Hypervisor Control Register"
|
|
bitfld.long 0x00 27.--31. "EOICOUNT,This field is incremented whenever a successful write to a virtual EOIR or DIR register would have resulted in a virtual interrupt deactivation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 14. "TDIR,Trap Non-secure EL1 writes to ICC_DIR" "Not trapped,Trapped"
|
|
bitfld.long 0x00 13. "TSEI,Trap all locally generated SEIs" "Not trapped,Trapped"
|
|
newline
|
|
bitfld.long 0x00 12. "TALL1,Trap all Non-secure EL1 accesses to ICC_* System registers for Group 1 interrupts to EL2" "Not trapped,Trapped"
|
|
bitfld.long 0x00 11. "TALL0,Trap all Non-secure EL1 accesses to ICC_* System registers for Group 0 interrupts to EL2" "Not trapped,Trapped"
|
|
bitfld.long 0x00 10. "TC,Trap all Non-secure EL1 accesses to System registers that are common to Group 0 and Group 1 to EL2" "Not trapped,Trapped"
|
|
newline
|
|
bitfld.long 0x00 7. "VGRP1DIE,VM Group 1 Disabled Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. "VGRP1EIE,VM Group 1 Enabled Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. "VGRP0DIE,VM Group 0 Disabled Interrupt Enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 4. "VGRP0EIE,VM Group 0 Enabled Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. "NPIE,No Pending Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. "LRENPIE,List Register Entry Not Present Interrupt Enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. "UIE,Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. "EN,Global enable bit for the virtual CPU interface" "Disabled,Enabled"
|
|
group.long c15:(0x40CC+0x0)++0x00
|
|
line.long 0x00 "ICH_LR0,Interrupt Controller List Register 0"
|
|
hexmask.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
|
|
group.long c15:(0x40CC+0x100)++0x00
|
|
line.long 0x00 "ICH_LR1,Interrupt Controller List Register 1"
|
|
hexmask.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
|
|
group.long c15:(0x40CC+0x200)++0x00
|
|
line.long 0x00 "ICH_LR2,Interrupt Controller List Register 2"
|
|
hexmask.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
|
|
group.long c15:(0x40CC+0x300)++0x00
|
|
line.long 0x00 "ICH_LR3,Interrupt Controller List Register 3"
|
|
hexmask.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
|
|
group.long c15:(0x40EC+0x0)++0x00
|
|
line.long 0x00 "ICH_LRC0,Interrupt Controller List Register Extension 0"
|
|
bitfld.long 0x00 30.--31. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
|
|
bitfld.long 0x00 29. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt." "Triggered by Software,Hardware interrupt"
|
|
bitfld.long 0x00 28. "GROUP,Indicates the group for this virtual interrupt" "Group 1,Group 0"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. "PRIORITY,The priority of this interrupt"
|
|
hexmask.long.word 0x00 0.--9. 1. "PINTID,Physical INTID for hardware interrupts"
|
|
group.long c15:(0x40EC+0x100)++0x00
|
|
line.long 0x00 "ICH_LRC1,Interrupt Controller List Register Extension 1"
|
|
bitfld.long 0x00 30.--31. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
|
|
bitfld.long 0x00 29. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt." "Triggered by Software,Hardware interrupt"
|
|
bitfld.long 0x00 28. "GROUP,Indicates the group for this virtual interrupt" "Group 1,Group 0"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. "PRIORITY,The priority of this interrupt"
|
|
hexmask.long.word 0x00 0.--9. 1. "PINTID,Physical INTID for hardware interrupts"
|
|
group.long c15:(0x40EC+0x200)++0x00
|
|
line.long 0x00 "ICH_LRC2,Interrupt Controller List Register Extension 2"
|
|
bitfld.long 0x00 30.--31. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
|
|
bitfld.long 0x00 29. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt." "Triggered by Software,Hardware interrupt"
|
|
bitfld.long 0x00 28. "GROUP,Indicates the group for this virtual interrupt" "Group 1,Group 0"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. "PRIORITY,The priority of this interrupt"
|
|
hexmask.long.word 0x00 0.--9. 1. "PINTID,Physical INTID for hardware interrupts"
|
|
group.long c15:(0x40EC+0x300)++0x00
|
|
line.long 0x00 "ICH_LRC3,Interrupt Controller List Register Extension 3"
|
|
bitfld.long 0x00 30.--31. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
|
|
bitfld.long 0x00 29. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt." "Triggered by Software,Hardware interrupt"
|
|
bitfld.long 0x00 28. "GROUP,Indicates the group for this virtual interrupt" "Group 1,Group 0"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. "PRIORITY,The priority of this interrupt"
|
|
hexmask.long.word 0x00 0.--9. 1. "PINTID,Physical INTID for hardware interrupts"
|
|
rgroup.long c15:0x42BC++0x00
|
|
line.long 0x00 "ICH_MISR,Interrupt Controller Maintenance Interrupt State Register"
|
|
bitfld.long 0x00 7. "VGRP1D,VPE Group 1 Disabled" "Not asserted,Asserted"
|
|
bitfld.long 0x00 6. "VGRP1E,VPE Group 1 Enabled" "Not asserted,Asserted"
|
|
bitfld.long 0x00 5. "VGRP0D,VPE Group 0 Disabled" "Not asserted,Asserted"
|
|
newline
|
|
bitfld.long 0x00 4. "VGRP0E,VPE Group 0 Enabled" "Not asserted,Asserted"
|
|
bitfld.long 0x00 3. "NP,No Pending" "Not asserted,Asserted"
|
|
bitfld.long 0x00 2. "LRENP,List Register Entry Not Present" "Not asserted,Asserted"
|
|
newline
|
|
bitfld.long 0x00 1. "U,Underflow" "Not asserted,Asserted"
|
|
bitfld.long 0x00 0. "EOI,End Of Interrupt" "Not asserted,Asserted"
|
|
group.long c15:0x459C++0x00
|
|
line.long 0x00 "ICH_SRE,Hypervisor System Register"
|
|
group.long c15:0x47BC++0x00
|
|
line.long 0x00 "ICH_VMCR,Interrupt Controller Virtual Machine Control Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. "VPMR,The priority mask level for the virtual CPU interface"
|
|
bitfld.long 0x00 21.--23. "VBPR0,Virtual Binary Point Register Group 0" "[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0],No preemption-[7:0]"
|
|
bitfld.long 0x00 18.--20. "VBPR1,Virtual Binary Point Register, Group 1" ",[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0]"
|
|
newline
|
|
bitfld.long 0x00 9. "VEOIM,Controls whether a write to an End of Interrupt register also deactivates the virtual interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. "VCBPR,Virtual Common Binary Point Register" "Separate registers,Same register"
|
|
bitfld.long 0x00 3. "VFIQEN,Virtual FIQ enable" "Virtual IRQs,Virtual FIQs"
|
|
newline
|
|
bitfld.long 0x00 2. "VACKCTL,Virtual FIQ enable" "1022,Corresponding interrupt"
|
|
bitfld.long 0x00 1. "VENG1,Virtual Group 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. "VENG0,Virtual Group 0 interrupt enable" "Disabled,Enabled"
|
|
group.long c15:0x449C++0x00
|
|
line.long 0x00 "ICH_VSEIR,Virtual System Error Interrupt Register"
|
|
rgroup.long c15:0x41BC++0x00
|
|
line.long 0x00 "ICH_VTR,Interrupt Controller VGIC Type Register"
|
|
bitfld.long 0x00 29.--31. "PRIBITS,The number of priority bits implemented minus one" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 26.--28. "PREBITS,The number of virtual preemption bits implemented, minus one" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 23.--25. "IDBITS,The number of physical interrupt identifier bits supported" "16 bits,24 bits,?..."
|
|
newline
|
|
bitfld.long 0x00 22. "SEIS,Indicates whether the CPU interface supports local generation of SEIs" "Not supported,Supported"
|
|
bitfld.long 0x00 21. "A3V,Affinity 3 Valid" "Only zero values supported,Non-zero values supported"
|
|
bitfld.long 0x00 20. "NV4,GICv4 direct injection of virtual interrupts not supported" "Supported,Not supported"
|
|
newline
|
|
bitfld.long 0x00 19. "TDS,Separate trapping of Non-secure EL1 writes to ICV_DIR_EL1 supported" "Not supported,Supported"
|
|
bitfld.long 0x00 0.--4. "LISTREGS,The number of implemented List registers, minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
tree.end
|
|
tree.end
|
|
tree "Debug Registers"
|
|
tree "Coresight Management Registers"
|
|
if corename()=="CORTEXA57"
|
|
rgroup.long c14:0x0000++0x0
|
|
line.long 0x0 "DBGDIDR,Debug ID Register"
|
|
bitfld.long 0x0 28.--31. "WRP,Number of Watchpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x0 24.--27. "BRP,Number of Breakpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x0 20.--23. "CTX_CMP,Number of BRPs with Context ID Comparison Capability" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--19. 1. "VERSION,Debug Architecture Version"
|
|
bitfld.long 0x0 14. "NSUHD,Secure User halting debug-mode" "Supported,Not supported"
|
|
bitfld.long 0x0 12. "SE,Security Extensions implemented" "Not implemented,Implemented"
|
|
elif corename()=="CORTEXA53"
|
|
rgroup.long c14:0x0000++0x0
|
|
line.long 0x0 "DBGDIDR,Debug ID Register"
|
|
bitfld.long 0x0 28.--31. "WRP,Number of Watchpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x0 24.--27. "BRP,Number of Breakpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x0 20.--23. "CTX_CMP,Number of BRPs with Context ID Comparison Capability" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--19. 1. "VERSION,Debug Architecture Version"
|
|
bitfld.long 0x0 15. "DEVID,Debug Device ID" "Low,High"
|
|
bitfld.long 0x0 14. "NSUHD,Secure User halting debug-mode" "Supported,Not supported"
|
|
newline
|
|
bitfld.long 0x0 13. "PCSR,PC Sample register implemented" "Not implemented,Implemented"
|
|
bitfld.long 0x0 12. "SE,Security Extensions implemented" "Not implemented,Implemented"
|
|
hexmask.long.byte 0x0 4.--7. 1. "VARIANT,Implementation-defined Variant Number"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "REVISION,Implementation-defined Revision Number"
|
|
endif
|
|
rgroup.long c14:0x0060++0x0
|
|
line.long 0x00 "DBGWFAR,Watchpoint Fault Address Register"
|
|
group.long c14:0x0070++0x0
|
|
line.long 0x00 "DBGVCR,Debug Vector Catch register"
|
|
bitfld.long 0x00 31. "FIQVCE_NS,FIQ vector catch in Non-secure state" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. "IRQVCE_NS,IRG vector catch in Non-secure state" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. "DAVCE_NS,Data Abort vector catch in Non-secure state" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 27. "PAVCE_NS,Prefetch Abort vector catch in Non-secure state" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. "SVCVCE_NS,SVC vector catch in Non-secure state" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. "UIVCE_NS,Undefined instruction vector catch in Non-secure state" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 15. "FIQVCE_SM,FIQ vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. "IRQVCE_SM,IRQ vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. "DAVCE_SM,Data Abort vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 11. "PAVCE_SM,Prefetch Abort vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. "SMCVCE_S,SMC vector catch enable in Secure state" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. "FIQVCE_S,FIQ vector catch in Secure state" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. "IRQVCE_S,IRG vector catch in Secure state" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. "DAVCE_S,Data Abort vector catch in Secure state" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. "PAVCE_S,Prefetch Abort vector catch in Secure state" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. "SVCVCE_S,SVC vector catch in Secure state" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. "UIVCE_S,Undefined instruction vector catch in Secure state" "Disabled,Enabled"
|
|
group.long c14:0x0020++0x00
|
|
line.long 0x00 "DBGDCCINT,DCC Interrupt Enable Register"
|
|
bitfld.long 0x00 30. "RX,DCC interrupt request enable control for DTRRX" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. "TX,DCC interrupt request enable control for DTRTX" "Disabled,Enabled"
|
|
group.long c14:0x0200++0x0
|
|
line.long 0x00 "DBGDTRRXEXT,Debug Receive Register (External View)"
|
|
group.long c14:0x0220++0x0
|
|
line.long 0x00 "DBGDSCREXT,Debug Status and Control Register (External View)"
|
|
bitfld.long 0x00 30. "RXFULL,DBGDTRRX Register full" "Empty,Full"
|
|
bitfld.long 0x00 29. "TXFULL,DBGDTRTX Register full" "Empty,Full"
|
|
bitfld.long 0x00 27. "RXO,Used for save/restore of EDSCR.RXO" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. "TXU,Used for save/restore of EDSCR.TXU" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. "TDA,Used for save/restore of EDSCR.TDA" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. "NS,Non-secure status bit" "Secure,Non-secure"
|
|
newline
|
|
bitfld.long 0x00 17. "SPNIDDIS,Secure Privileged Non-Invasive Debug Disable" "No,Yes"
|
|
bitfld.long 0x00 16. "SPIDDIS,Secure Privileged Invasive Debug Disable" "No,Yes"
|
|
bitfld.long 0x00 15. "MDBGEN,Monitor debug-mode enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 14. "HDE,Used for save/restore of EDSCR.HDE" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. "UDCCDIS,User mode access to Communications Channel disable" "No,Yes"
|
|
bitfld.long 0x00 6. "ERR,Used for save/restore of EDSCR.ERR" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2.--5. "MOE,Method of debug entry field" "Reserved,Breakpoint,Reserved,BKPT Instruction,Reserved,Vector Catch,Reserved,Reserved,Reserved,Reserved,Synchronous Watchpoint,?..."
|
|
rgroup.long c14:0x0010++0x0
|
|
line.long 0x00 "DBGDSCRINT,Debug Status and Control Register (Internal View)"
|
|
bitfld.long 0x00 30. "RXFULL,DBGDTRRX Register full" "Empty,Full"
|
|
bitfld.long 0x00 29. "TXFULL,DBGDTRTX Register full" "Empty,Full"
|
|
bitfld.long 0x00 18. "NS,Non-secure status bit" "Secure,Non-secure"
|
|
newline
|
|
bitfld.long 0x00 17. "SPNIDDIS,Secure Privileged Non-Invasive Debug Disable" "No,Yes"
|
|
bitfld.long 0x00 16. "SPIDDIS,Secure Privileged Invasive Debug Disable" "No,Yes"
|
|
bitfld.long 0x00 15. "MDBGEN,Monitor debug-mode enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 12. "UDCCDIS,User mode access to Communications Channel disable" "No,Yes"
|
|
bitfld.long 0x00 2.--5. "MOE,Method of debug entry field" "Reserved,Breakpoint,Reserved,BKPT Instruction,Reserved,Vector Catch,Reserved,Reserved,Reserved,Reserved,Synchronous Watchpoint,?..."
|
|
wgroup.long c14:0x0230++0x0
|
|
line.long 0x00 "DBGDTRTXEXT,Debug Transmit Register (External View)"
|
|
group.long c14:0x0050++0x0
|
|
line.long 0x00 "DBGDTRTXINT,Debug Transmit/Receive Register (Internal View)"
|
|
group.long c14:0x0687++0x0
|
|
line.long 0x0 "DBGCLAIMSET,Claim Tag Set Register"
|
|
bitfld.long 0x0 7. "CT7,Claim Tag 7 Set" "Not set,Set"
|
|
bitfld.long 0x0 6. "CT6,Claim Tag 6 Set" "Not set,Set"
|
|
bitfld.long 0x0 5. "CT5,Claim Tag 5 Set" "Not set,Set"
|
|
newline
|
|
bitfld.long 0x0 4. "CT4,Claim Tag 4 Set" "Not set,Set"
|
|
bitfld.long 0x0 3. "CT3,Claim Tag 3 Set" "Not set,Set"
|
|
bitfld.long 0x0 2. "CT2,Claim Tag 2 Set" "Not set,Set"
|
|
newline
|
|
bitfld.long 0x0 1. "CT1,Claim Tag 1 Set" "Not set,Set"
|
|
bitfld.long 0x0 0. "CT0,Claim Tag 0 Set" "Not set,Set"
|
|
group.long c14:0x0697++0x0
|
|
line.long 0x0 "DBGCLAIMCLR,Claim Tag Clear Register"
|
|
bitfld.long 0x0 7. "CT7,Claim Tag 7 Clear" "Not cleared,Cleared"
|
|
bitfld.long 0x0 6. "CT6,Claim Tag 6 Clear" "Not cleared,Cleared"
|
|
bitfld.long 0x0 5. "CT5,Claim Tag 5 Clear" "Not cleared,Cleared"
|
|
newline
|
|
bitfld.long 0x0 4. "CT4,Claim Tag 4 Clear" "Not cleared,Cleared"
|
|
bitfld.long 0x0 3. "CT3,Claim Tag 3 Clear" "Not cleared,Cleared"
|
|
bitfld.long 0x0 2. "CT2,Claim Tag 2 Clear" "Not cleared,Cleared"
|
|
newline
|
|
bitfld.long 0x0 1. "CT1,Claim Tag 1 Clear" "Not cleared,Cleared"
|
|
bitfld.long 0x0 0. "CT0,Claim Tag 0 Clear" "Not cleared,Cleared"
|
|
rgroup.long c14:0x06E7++0x0
|
|
line.long 0x0 "DBGAUTHSTATUS,Debug Authentication Status Register"
|
|
bitfld.long 0x00 7. "SNDFI,Secure non-invasive debug features implementation" "No effect,Implemented"
|
|
bitfld.long 0x00 6. "SNDE,Secure non-invasive debug enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. "SIDFI,Secure invasive debug features implementation" "No effect,Implemented"
|
|
newline
|
|
bitfld.long 0x00 4. "SIDE,Secure invasive debug enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. "NSNDFI,Non-secure non-invasive debug features implementation" "Not implemented,Implemented"
|
|
bitfld.long 0x00 2. "NSNDE,Non-secure non-invasive debug enable" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. "NSIDFI,Non-secure invasive debug features implementation" "Not implemented,Implemented"
|
|
bitfld.long 0x00 0. "NSIDE,Non-secure invasive debug enable" "0,1"
|
|
rgroup.long c14:0x0707++0x0
|
|
line.long 0x0 "DBGDEVID2,Debug Device ID Register 2"
|
|
rgroup.long c14:0x0717++0x0
|
|
line.long 0x0 "DBGDEVID1,Debug Device ID Register 1"
|
|
bitfld.long 0x00 0.--3. "PCSROFFSET,This field defines the offset applied to DBGPCSR samples" "0,1,No offset,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long c14:0x0727++0x00
|
|
line.long 0x00 "DBGDEVID,Debug Device ID Register 0"
|
|
bitfld.long 0x00 28.--31. "CIDMASK,Specifies the level of support for the Context ID matching breakpoint masking capability" "Not implemented,?..."
|
|
bitfld.long 0x00 24.--27. "AUXREGS,Specifies support for the Debug External Auxiliary Control Register" "Not implemented,?..."
|
|
bitfld.long 0x00 20.--23. "DOUBLELOCK,Specifies support for the Debug OS Double Lock Register" "Reserved,Implemented,?..."
|
|
newline
|
|
bitfld.long 0x00 16.--19. "VIREXTNS,Specifies whether EL2 is implemented" "Reserved,Implemented,?..."
|
|
bitfld.long 0x00 12.--15. "VECTORCATCH,Defines the form of the vector catch event implemented" "Implemented,?..."
|
|
bitfld.long 0x00 8.--11. "BPADDRMASK,Indicates the level of support for the Immediate Virtual Address(IVA) matching breakpoint masking capability" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Implemented"
|
|
newline
|
|
bitfld.long 0x00 4.--7. "WPADDRMASK,Indicates the level of support for the DVA matching watchpoint masking capability" "Reserved,Implemented,?..."
|
|
bitfld.long 0x00 0.--3. "PCSAMPLE,Indicates the level of support for Program Counter sampling using debug registers 40 and 41" "Reserved,Reserved,Reserved,Implemented,?..."
|
|
tree.end
|
|
newline
|
|
rgroup.quad c14:0x10010++0x1
|
|
line.quad 0x0 "DBGDRAR,Debug ROM Address Register"
|
|
hexmask.quad.word 0x0 32.--47. 0x1 "ROMADDR,ROM physical address"
|
|
hexmask.quad.tbyte 0x0 12.--31. 0x10 "ROMADDR,ROM physical address"
|
|
bitfld.quad 0x0 1. "VALID1,ROM table address valid" "Not valid,Valid"
|
|
newline
|
|
bitfld.quad 0x0 0. "VALID0,ROM table address valid" "Not valid,Valid"
|
|
rgroup.quad c14:0x10020++0x1
|
|
line.quad 0x0 "DBGDSAR,Debug Self Address Offset Register"
|
|
wgroup.long c14:0x0401++0x00
|
|
line.long 0x00 "DBGOSLAR,Operating System Lock Access Register"
|
|
rgroup.long c14:0x0411++0x00
|
|
line.long 0x00 "DBGOSLSR,Operating System Lock Status Register"
|
|
bitfld.long 0x00 2. "NTT,32-Bit Access" "Not required,Required"
|
|
bitfld.long 0x00 1. "OSLK,Status of the OS Lock" "Not locked,Locked"
|
|
bitfld.long 0x00 0. 3. "OSLM,OS Lock Model implemented Bit" "Reserved,Reserved,Implemented,?..."
|
|
if (((per.l(c14:0x0411))&0x2)==0x2)
|
|
group.long c14:0x0260++0x00
|
|
line.long 0x00 "DBGOSECCR,Debug OS Lock Exception Catch Control Register"
|
|
else
|
|
hgroup.long c14:0x0260++0x00
|
|
hide.long 0x00 "DBGOSECCR,Debug OS Lock Exception Catch Control Register"
|
|
endif
|
|
group.long c14:0x0431++0x00
|
|
line.long 0x00 "DBGOSDLR,Debug OS Double Lock Register"
|
|
bitfld.long 0x00 0. "DLK,OS Double Lock control bit" "Not locked,Locked"
|
|
group.long c14:0x0441++0x00
|
|
line.long 0x00 "DBGPRCR,Device Power-Down and Reset Control Register"
|
|
bitfld.long 0x00 0. "CORENPDRQ,Core No Power down Request" "Low,High"
|
|
tree.end
|
|
tree "Breakpoint Registers"
|
|
if (((per.l(c14:(0x500+0x0)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000))
|
|
group.long c14:(0x0400+0x0)++0x0 "Breakpoint 0"
|
|
line.long 0x00 "DBGBVR0,Breakpoint Value Register (Instruction address)"
|
|
hexmask.long 0x00 2.--31. 0x4 "VA,Bits[31:2] of the address value for comparison"
|
|
elif (((per.l(c14:(0x500+0x0)))&0xF00000)==(0x800000||0x900000||0xA00000||0xB00000))
|
|
hgroup.long c14:(0x0400+0x0)++0x0 "Breakpoint 0"
|
|
hide.long 0x00 "DBGBVR0,Breakpoint Value Register (VMID)"
|
|
else
|
|
group.long c14:(0x0400+0x0)++0x0 "Breakpoint 0"
|
|
line.long 0x00 "DBGBVR0,Breakpoint Value Register (Context ID)"
|
|
endif
|
|
group.long c14:(0x0500+0x0)++0x0
|
|
line.long 0x00 "DBGBCR0,Breakpoint Control Register"
|
|
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
|
|
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
|
|
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
|
|
bitfld.long 0x00 13. "HMM,Hypervisor mode match" "Not matched,Matched"
|
|
newline
|
|
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
|
|
bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
|
|
if (((per.l(c14:(0x500+0x10)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000))
|
|
group.long c14:(0x0400+0x10)++0x0 "Breakpoint 1"
|
|
line.long 0x00 "DBGBVR1,Breakpoint Value Register (Instruction address)"
|
|
hexmask.long 0x00 2.--31. 0x4 "VA,Bits[31:2] of the address value for comparison"
|
|
elif (((per.l(c14:(0x500+0x10)))&0xF00000)==(0x800000||0x900000||0xA00000||0xB00000))
|
|
hgroup.long c14:(0x0400+0x10)++0x0 "Breakpoint 1"
|
|
hide.long 0x00 "DBGBVR1,Breakpoint Value Register (VMID)"
|
|
else
|
|
group.long c14:(0x0400+0x10)++0x0 "Breakpoint 1"
|
|
line.long 0x00 "DBGBVR1,Breakpoint Value Register (Context ID)"
|
|
endif
|
|
group.long c14:(0x0500+0x10)++0x0
|
|
line.long 0x00 "DBGBCR1,Breakpoint Control Register"
|
|
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
|
|
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
|
|
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
|
|
bitfld.long 0x00 13. "HMM,Hypervisor mode match" "Not matched,Matched"
|
|
newline
|
|
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
|
|
bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
|
|
if (((per.l(c14:(0x500+0x20)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000))
|
|
group.long c14:(0x0400+0x20)++0x0 "Breakpoint 2"
|
|
line.long 0x00 "DBGBVR2,Breakpoint Value Register (Instruction address)"
|
|
hexmask.long 0x00 2.--31. 0x4 "VA,Bits[31:2] of the address value for comparison"
|
|
elif (((per.l(c14:(0x500+0x20)))&0xF00000)==(0x800000||0x900000||0xA00000||0xB00000))
|
|
hgroup.long c14:(0x0400+0x20)++0x0 "Breakpoint 2"
|
|
hide.long 0x00 "DBGBVR2,Breakpoint Value Register (VMID)"
|
|
else
|
|
group.long c14:(0x0400+0x20)++0x0 "Breakpoint 2"
|
|
line.long 0x00 "DBGBVR2,Breakpoint Value Register (Context ID)"
|
|
endif
|
|
group.long c14:(0x0500+0x20)++0x0
|
|
line.long 0x00 "DBGBCR2,Breakpoint Control Register"
|
|
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
|
|
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
|
|
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
|
|
bitfld.long 0x00 13. "HMM,Hypervisor mode match" "Not matched,Matched"
|
|
newline
|
|
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
|
|
bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
|
|
if (((per.l(c14:(0x500+0x30)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000))
|
|
group.long c14:(0x0400+0x30)++0x0 "Breakpoint 3"
|
|
line.long 0x00 "DBGBVR3,Breakpoint Value Register (Instruction address)"
|
|
hexmask.long 0x00 2.--31. 0x4 "VA,Bits[31:2] of the address value for comparison"
|
|
elif (((per.l(c14:(0x500+0x30)))&0xF00000)==(0x800000||0x900000||0xA00000||0xB00000))
|
|
hgroup.long c14:(0x0400+0x30)++0x0 "Breakpoint 3"
|
|
hide.long 0x00 "DBGBVR3,Breakpoint Value Register (VMID)"
|
|
else
|
|
group.long c14:(0x0400+0x30)++0x0 "Breakpoint 3"
|
|
line.long 0x00 "DBGBVR3,Breakpoint Value Register (Context ID)"
|
|
endif
|
|
group.long c14:(0x0500+0x30)++0x0
|
|
line.long 0x00 "DBGBCR3,Breakpoint Control Register"
|
|
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
|
|
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
|
|
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
|
|
bitfld.long 0x00 13. "HMM,Hypervisor mode match" "Not matched,Matched"
|
|
newline
|
|
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
|
|
bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
|
|
if (((per.l(c14:(0x500+0x40)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000))
|
|
group.long c14:(0x0400+0x40)++0x0 "Breakpoint 4"
|
|
line.long 0x00 "DBGBVR4,Breakpoint Value Register (Instruction address)"
|
|
hexmask.long 0x00 2.--31. 0x4 "VA,Bits[31:2] of the address value for comparison"
|
|
elif (((per.l(c14:(0x500+0x40)))&0xF00000)==(0x800000||0x900000||0xA00000||0xB00000))
|
|
hgroup.long c14:(0x0400+0x40)++0x0 "Breakpoint 4"
|
|
hide.long 0x00 "DBGBVR4,Breakpoint Value Register (VMID)"
|
|
else
|
|
group.long c14:(0x0400+0x40)++0x0 "Breakpoint 4"
|
|
line.long 0x00 "DBGBVR4,Breakpoint Value Register (Context ID)"
|
|
endif
|
|
group.long c14:(0x0500+0x40)++0x0
|
|
line.long 0x00 "DBGBCR4,Breakpoint Control Register"
|
|
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
|
|
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
|
|
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
|
|
bitfld.long 0x00 13. "HMM,Hypervisor mode match" "Not matched,Matched"
|
|
newline
|
|
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
|
|
bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
|
|
if (((per.l(c14:(0x500+0x50)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000))
|
|
group.long c14:(0x0400+0x50)++0x0 "Breakpoint 5"
|
|
line.long 0x00 "DBGBVR5,Breakpoint Value Register (Instruction address)"
|
|
hexmask.long 0x00 2.--31. 0x4 "VA,Bits[31:2] of the address value for comparison"
|
|
elif (((per.l(c14:(0x500+0x50)))&0xF00000)==(0x800000||0x900000||0xA00000||0xB00000))
|
|
hgroup.long c14:(0x0400+0x50)++0x0 "Breakpoint 5"
|
|
hide.long 0x00 "DBGBVR5,Breakpoint Value Register (VMID)"
|
|
else
|
|
group.long c14:(0x0400+0x50)++0x0 "Breakpoint 5"
|
|
line.long 0x00 "DBGBVR5,Breakpoint Value Register (Context ID)"
|
|
endif
|
|
group.long c14:(0x0500+0x50)++0x0
|
|
line.long 0x00 "DBGBCR5,Breakpoint Control Register"
|
|
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
|
|
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
|
|
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
|
|
bitfld.long 0x00 13. "HMM,Hypervisor mode match" "Not matched,Matched"
|
|
newline
|
|
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
|
|
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
|
|
bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
|
|
group.long c14:0x0141++0x0
|
|
line.long 0x00 "DBGBXVR4,Debug Breakpoint Extended Value Register 4"
|
|
hexmask.long.byte 0x00 0.--7. 1. "VMID, VMID value"
|
|
group.long c14:0x0151++0x0
|
|
line.long 0x00 "DBGBXVR5,Debug Breakpoint Extended Value Register 5"
|
|
hexmask.long.byte 0x00 0.--7. 1. "VMID, VMID value"
|
|
tree.end
|
|
tree "Watchpoint Control Registers"
|
|
group.long c14:(0x0600+0x0)++0x00 "Breakpoint 0"
|
|
line.long 0x00 "DBGWVR0,Watchpoint Value Register"
|
|
hexmask.long 0x00 2.--31. 0x4 "DA,Data address"
|
|
group.long c14:(0x0700+0x0)++0x00
|
|
line.long 0x00 "DBGWCR0,Watchpoint Control Register"
|
|
bitfld.long 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x0 20. "WT,Watchpoint Type" "Unlinked data address match,Linked data address match"
|
|
bitfld.long 0x0 16.--19. "LBN,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
newline
|
|
bitfld.long 0x0 14.--15. "SSC,Secure state control" "Both,Non-secure,Secure,?..."
|
|
bitfld.long 0x0 13. "HMC,Hypervisor Mode Control" "Disabled,Enabled"
|
|
hexmask.long.byte 0x0 5.--12. "BAS,Byte address select"
|
|
newline
|
|
bitfld.long 0x0 3.--4. "LSC,Load/Store access control" "Reserved,Load,Store,Any"
|
|
bitfld.long 0x0 1.--2. "PAC,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses"
|
|
bitfld.long 0x0 0. "WE,Watchpoint enable" "Disabled,Enabled"
|
|
group.long c14:(0x0600+0x10)++0x00 "Breakpoint 1"
|
|
line.long 0x00 "DBGWVR1,Watchpoint Value Register"
|
|
hexmask.long 0x00 2.--31. 0x4 "DA,Data address"
|
|
group.long c14:(0x0700+0x10)++0x00
|
|
line.long 0x00 "DBGWCR1,Watchpoint Control Register"
|
|
bitfld.long 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x0 20. "WT,Watchpoint Type" "Unlinked data address match,Linked data address match"
|
|
bitfld.long 0x0 16.--19. "LBN,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
newline
|
|
bitfld.long 0x0 14.--15. "SSC,Secure state control" "Both,Non-secure,Secure,?..."
|
|
bitfld.long 0x0 13. "HMC,Hypervisor Mode Control" "Disabled,Enabled"
|
|
hexmask.long.byte 0x0 5.--12. "BAS,Byte address select"
|
|
newline
|
|
bitfld.long 0x0 3.--4. "LSC,Load/Store access control" "Reserved,Load,Store,Any"
|
|
bitfld.long 0x0 1.--2. "PAC,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses"
|
|
bitfld.long 0x0 0. "WE,Watchpoint enable" "Disabled,Enabled"
|
|
group.long c14:(0x0600+0x20)++0x00 "Breakpoint 2"
|
|
line.long 0x00 "DBGWVR2,Watchpoint Value Register"
|
|
hexmask.long 0x00 2.--31. 0x4 "DA,Data address"
|
|
group.long c14:(0x0700+0x20)++0x00
|
|
line.long 0x00 "DBGWCR2,Watchpoint Control Register"
|
|
bitfld.long 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x0 20. "WT,Watchpoint Type" "Unlinked data address match,Linked data address match"
|
|
bitfld.long 0x0 16.--19. "LBN,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
newline
|
|
bitfld.long 0x0 14.--15. "SSC,Secure state control" "Both,Non-secure,Secure,?..."
|
|
bitfld.long 0x0 13. "HMC,Hypervisor Mode Control" "Disabled,Enabled"
|
|
hexmask.long.byte 0x0 5.--12. "BAS,Byte address select"
|
|
newline
|
|
bitfld.long 0x0 3.--4. "LSC,Load/Store access control" "Reserved,Load,Store,Any"
|
|
bitfld.long 0x0 1.--2. "PAC,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses"
|
|
bitfld.long 0x0 0. "WE,Watchpoint enable" "Disabled,Enabled"
|
|
group.long c14:(0x0600+0x30)++0x00 "Breakpoint 3"
|
|
line.long 0x00 "DBGWVR3,Watchpoint Value Register"
|
|
hexmask.long 0x00 2.--31. 0x4 "DA,Data address"
|
|
group.long c14:(0x0700+0x30)++0x00
|
|
line.long 0x00 "DBGWCR3,Watchpoint Control Register"
|
|
bitfld.long 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
|
|
bitfld.long 0x0 20. "WT,Watchpoint Type" "Unlinked data address match,Linked data address match"
|
|
bitfld.long 0x0 16.--19. "LBN,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
|
|
newline
|
|
bitfld.long 0x0 14.--15. "SSC,Secure state control" "Both,Non-secure,Secure,?..."
|
|
bitfld.long 0x0 13. "HMC,Hypervisor Mode Control" "Disabled,Enabled"
|
|
hexmask.long.byte 0x0 5.--12. "BAS,Byte address select"
|
|
newline
|
|
bitfld.long 0x0 3.--4. "LSC,Load/Store access control" "Reserved,Load,Store,Any"
|
|
bitfld.long 0x0 1.--2. "PAC,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses"
|
|
bitfld.long 0x0 0. "WE,Watchpoint enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree.end
|
|
AUTOINDENT.OFF
|
|
AUTOINDENT.POP
|
|
tree.open "Interrupt Controller (GIC-400)"
|
|
width 17.
|
|
width 17.
|
|
base ad:0x7d001000
|
|
tree "Distributor Interface"
|
|
if (((per.l(ad:0x7d001000+0x04))&0x400)==0x400)
|
|
if PER.ADDRESS.isSECUREEX(ad:0x7d001000)
|
|
group.long 0x0000++0x03
|
|
line.long 0x00 "GICD_CTLR,Distributor Control Register (Secure access)"
|
|
bitfld.long 0x00 1. " ENABLEGRP1 ,Global Interrupt Enable Group 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ENABLEGRP0 ,Global Interrupt Enable Group 1" "Disabled,Enabled"
|
|
else
|
|
group.long 0x0000++0x03
|
|
line.long 0x00 "GICD_CTLR,Distributor Control Register (Non-secure access)"
|
|
bitfld.long 0x00 0. " ENABLE ,Global enable for forwarding pending interrupts from the Distributor to the CPU interfaces" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
group.long 0x0000++0x03
|
|
line.long 0x00 "GICD_CTLR,Distributor Control Register"
|
|
bitfld.long 0x00 0. " ENABLE ,Global enable for forwarding pending interrupts from the Distributor to the CPU interfaces" "Disabled,Enabled"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x400)==0x400)
|
|
rgroup.long 0x0004++0x03
|
|
line.long 0x00 "GICD_TYPER,Interrupt Controller Type Register"
|
|
bitfld.long 0x00 11.--15. " LSPI ,Locable Shared Peripheral Interrupts" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 10. " SECURITYEXTN ,Indicate whether interrupt controller implements the security extensions" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 5.--7. " CPUNUMBER ,Indicates the number of implemented CPU interfaces" "1,2,3,4,?..."
|
|
bitfld.long 0x00 0.--4. " ITLN ,Indicates the number of interrupts that the interrupt controller supports" "Up to 32,Up to 64,Up to 96,Up to 128,Up to 160,Up to 192,Up to 224,Up to 256,Up to 288,Up to 320,Up to 352,Up to 384,Up to 416,Up to 448,Up to 480,Up to 512,Up to 544,Up to 576,Up to 608,Up to 640,Up to 672,Up to 704,Up to 736,Up to 768,Up to 800,Up to 832,Up to 864,Up to 896,Up to 928,Up to 960,Up to 992,Up to 1020"
|
|
else
|
|
rgroup.long 0x0004++0x03
|
|
line.long 0x00 "GICD_TYPER,Interrupt Controller Type Register"
|
|
bitfld.long 0x00 10. " SECURITYEXTN ,Indicates whether interrupt controller implements the security extensions" "Not implemented,Implemented"
|
|
textline " "
|
|
bitfld.long 0x00 5.--7. " CPUNUMBER ,Indicates the number of implemented CPU interfaces" "1,2,3,4,?..."
|
|
bitfld.long 0x00 0.--4. " ITLN ,Indicates the number of interrupts that the interrupt controller supports" "Up to 32,Up to 64,Up to 96,Up to 128,Up to 160,Up to 192,Up to 224,Up to 256,Up to 288,Up to 320,Up to 352,Up to 384,Up to 416,Up to 448,Up to 480,Up to 512,Up to 544,Up to 576,Up to 608,Up to 640,Up to 672,Up to 704,Up to 736,Up to 768,Up to 800,Up to 832,Up to 864,Up to 896,Up to 928,Up to 960,Up to 992,Up to 1020"
|
|
endif
|
|
rgroup.long 0x0008++0x03
|
|
line.long 0x00 "GICD_IIDR,Distributor Implementer Identification Register"
|
|
bitfld.long 0x00 24.--31. " PRODID ,Indicates the product ID" "PL390,PL390,GIC400,GIC400,?..."
|
|
bitfld.long 0x00 16.--19. " VAR ,Major revison number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " REV ,Minor revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer"
|
|
sif CPU.FEATURE(hypervisor)||CPU.FEATURE(secure)
|
|
width 17.
|
|
tree "Group/Security Registers"
|
|
if PER.ADDRESS.isSECUREEX(ad:0x7d001000+0x0080)
|
|
group.long 0x0080++0x03
|
|
line.long 0x0 "GICD_IGROUPR0,Interrupt Group Register 0 (Secure Access)"
|
|
bitfld.long 0x00 31. " GSB31 ,Group Status Bit 31" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB30 ,Group Status Bit 30" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB29 ,Group Status Bit 29" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB28 ,Group Status Bit 28" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB27 ,Group Status Bit 27" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB26 ,Group Status Bit 26" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB25 ,Group Status Bit 25" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB24 ,Group Status Bit 24" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB23 ,Group Status Bit 23" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB22 ,Group Status Bit 22" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB21 ,Group Status Bit 21" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB20 ,Group Status Bit 20" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB19 ,Group Status Bit 19" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB18 ,Group Status Bit 18" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB17 ,Group Status Bit 17" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB16 ,Group Status Bit 16" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB15 ,Group Status Bit 15" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB14 ,Group Status Bit 14" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB13 ,Group Status Bit 13" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB12 ,Group Status Bit 12" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB11 ,Group Status Bit 11" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB10 ,Group Status Bit 10" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB9 ,Group Status Bit 9" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB8 ,Group Status Bit 8" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB7 ,Group Status Bit 7" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB6 ,Group Status Bit 6" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB5 ,Group Status Bit 5" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB4 ,Group Status Bit 4" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB3 ,Group Status Bit 3" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB2 ,Group Status Bit 2" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB1 ,Group Status Bit 1" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB0 ,Group Status Bit 0" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
else
|
|
group.long 0x0080++0x03
|
|
line.long 0x0 "GICD_IGROUPR0,Interrupt Group Register 0 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB31 ,Group Status Bit 31" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB30 ,Group Status Bit 30" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB29 ,Group Status Bit 29" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB28 ,Group Status Bit 28" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB27 ,Group Status Bit 27" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB26 ,Group Status Bit 26" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB25 ,Group Status Bit 25" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB24 ,Group Status Bit 24" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB23 ,Group Status Bit 23" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB22 ,Group Status Bit 22" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB21 ,Group Status Bit 21" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB20 ,Group Status Bit 20" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB19 ,Group Status Bit 19" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB18 ,Group Status Bit 18" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB17 ,Group Status Bit 17" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB16 ,Group Status Bit 16" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB15 ,Group Status Bit 15" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB14 ,Group Status Bit 14" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB13 ,Group Status Bit 13" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB12 ,Group Status Bit 12" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB11 ,Group Status Bit 11" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB10 ,Group Status Bit 10" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB9 ,Group Status Bit 9" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB8 ,Group Status Bit 8" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB7 ,Group Status Bit 7" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB6 ,Group Status Bit 6" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB5 ,Group Status Bit 5" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB4 ,Group Status Bit 4" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB3 ,Group Status Bit 3" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB2 ,Group Status Bit 2" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB1 ,Group Status Bit 1" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB0 ,Group Status Bit 0" "Group 0,Group 1"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x01)&&(PER.ADDRESS.isSECUREEX(ad:0x7d001000+0x0084))
|
|
group.long 0x0084++0x03
|
|
line.long 0x0 "GICD_IGROUPR1,Interrupt Group Register 1 (Secure Access)"
|
|
bitfld.long 0x00 31. " GSB63 ,Group Status Bit 63" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB62 ,Group Status Bit 62" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB61 ,Group Status Bit 61" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB60 ,Group Status Bit 60" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB59 ,Group Status Bit 59" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB58 ,Group Status Bit 58" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB57 ,Group Status Bit 57" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB56 ,Group Status Bit 56" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB55 ,Group Status Bit 55" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB54 ,Group Status Bit 54" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB53 ,Group Status Bit 53" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB52 ,Group Status Bit 52" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB51 ,Group Status Bit 51" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB50 ,Group Status Bit 50" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB49 ,Group Status Bit 49" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB48 ,Group Status Bit 48" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB47 ,Group Status Bit 47" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB46 ,Group Status Bit 46" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB45 ,Group Status Bit 45" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB44 ,Group Status Bit 44" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB43 ,Group Status Bit 43" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB42 ,Group Status Bit 42" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB41 ,Group Status Bit 41" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB40 ,Group Status Bit 40" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB39 ,Group Status Bit 39" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB38 ,Group Status Bit 38" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB37 ,Group Status Bit 37" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB36 ,Group Status Bit 36" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB35 ,Group Status Bit 35" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB34 ,Group Status Bit 34" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB33 ,Group Status Bit 33" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB32 ,Group Status Bit 32" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x01)
|
|
group.long 0x0084++0x03
|
|
line.long 0x0 "GICD_IGROUPR1,Interrupt Group Register 1 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB63 ,Group Status Bit 63" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB62 ,Group Status Bit 62" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB61 ,Group Status Bit 61" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB60 ,Group Status Bit 60" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB59 ,Group Status Bit 59" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB58 ,Group Status Bit 58" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB57 ,Group Status Bit 57" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB56 ,Group Status Bit 56" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB55 ,Group Status Bit 55" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB54 ,Group Status Bit 54" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB53 ,Group Status Bit 53" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB52 ,Group Status Bit 52" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB51 ,Group Status Bit 51" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB50 ,Group Status Bit 50" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB49 ,Group Status Bit 49" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB48 ,Group Status Bit 48" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB47 ,Group Status Bit 47" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB46 ,Group Status Bit 46" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB45 ,Group Status Bit 45" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB44 ,Group Status Bit 44" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB43 ,Group Status Bit 43" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB42 ,Group Status Bit 42" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB41 ,Group Status Bit 41" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB40 ,Group Status Bit 40" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB39 ,Group Status Bit 39" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB38 ,Group Status Bit 38" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB37 ,Group Status Bit 37" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB36 ,Group Status Bit 36" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB35 ,Group Status Bit 35" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB34 ,Group Status Bit 34" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB33 ,Group Status Bit 33" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB32 ,Group Status Bit 32" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x0084++0x03
|
|
line.long 0x0 "GICD_IGROUPR1,Interrupt Group Register 1"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x02)&&(PER.ADDRESS.isSECUREEX(ad:0x7d001000+0x0088))
|
|
group.long 0x0088++0x03
|
|
line.long 0x0 "GICD_IGROUPR2,Interrupt Group Register 2 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB95 ,Group Status Bit 95" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB94 ,Group Status Bit 94" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB93 ,Group Status Bit 93" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB92 ,Group Status Bit 92" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB91 ,Group Status Bit 91" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB90 ,Group Status Bit 90" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB89 ,Group Status Bit 89" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB88 ,Group Status Bit 88" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB87 ,Group Status Bit 87" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB86 ,Group Status Bit 86" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB85 ,Group Status Bit 85" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB84 ,Group Status Bit 84" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB83 ,Group Status Bit 83" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB82 ,Group Status Bit 82" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB81 ,Group Status Bit 81" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB80 ,Group Status Bit 80" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB79 ,Group Status Bit 79" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB78 ,Group Status Bit 78" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB77 ,Group Status Bit 77" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB76 ,Group Status Bit 76" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB75 ,Group Status Bit 75" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB74 ,Group Status Bit 74" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB73 ,Group Status Bit 73" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB72 ,Group Status Bit 72" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB71 ,Group Status Bit 71" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB70 ,Group Status Bit 70" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB69 ,Group Status Bit 69" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB68 ,Group Status Bit 68" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB67 ,Group Status Bit 67" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB66 ,Group Status Bit 66" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB65 ,Group Status Bit 65" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB64 ,Group Status Bit 64" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x02)
|
|
group.long 0x0088++0x03
|
|
line.long 0x0 "GICD_IGROUPR2,Interrupt Group Register 2 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB95 ,Group Status Bit 95" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB94 ,Group Status Bit 94" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB93 ,Group Status Bit 93" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB92 ,Group Status Bit 92" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB91 ,Group Status Bit 91" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB90 ,Group Status Bit 90" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB89 ,Group Status Bit 89" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB88 ,Group Status Bit 88" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB87 ,Group Status Bit 87" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB86 ,Group Status Bit 86" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB85 ,Group Status Bit 85" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB84 ,Group Status Bit 84" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB83 ,Group Status Bit 83" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB82 ,Group Status Bit 82" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB81 ,Group Status Bit 81" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB80 ,Group Status Bit 80" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB79 ,Group Status Bit 79" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB78 ,Group Status Bit 78" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB77 ,Group Status Bit 77" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB76 ,Group Status Bit 76" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB75 ,Group Status Bit 75" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB74 ,Group Status Bit 74" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB73 ,Group Status Bit 73" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB72 ,Group Status Bit 72" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB71 ,Group Status Bit 71" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB70 ,Group Status Bit 70" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB69 ,Group Status Bit 69" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB68 ,Group Status Bit 68" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB67 ,Group Status Bit 67" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB66 ,Group Status Bit 66" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB65 ,Group Status Bit 65" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB64 ,Group Status Bit 64" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x0088++0x03
|
|
line.long 0x0 "GICD_IGROUPR2,Interrupt Group Register 2"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x03)&&(PER.ADDRESS.isSECUREEX(ad:0x7d001000+0x008C))
|
|
group.long 0x008C++0x03
|
|
line.long 0x0 "GICD_IGROUPR3,Interrupt Group Register 3 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB127 ,Group Status Bit 127" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB126 ,Group Status Bit 126" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB125 ,Group Status Bit 125" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB124 ,Group Status Bit 124" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB123 ,Group Status Bit 123" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB122 ,Group Status Bit 122" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB121 ,Group Status Bit 121" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB120 ,Group Status Bit 120" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB119 ,Group Status Bit 119" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB118 ,Group Status Bit 118" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB117 ,Group Status Bit 117" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB116 ,Group Status Bit 116" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB115 ,Group Status Bit 115" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB114 ,Group Status Bit 114" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB113 ,Group Status Bit 113" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB112 ,Group Status Bit 112" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB111 ,Group Status Bit 111" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB110 ,Group Status Bit 110" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB109 ,Group Status Bit 109" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB108 ,Group Status Bit 108" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB107 ,Group Status Bit 107" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB106 ,Group Status Bit 106" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB105 ,Group Status Bit 105" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB104 ,Group Status Bit 104" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB103 ,Group Status Bit 103" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB102 ,Group Status Bit 102" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB101 ,Group Status Bit 101" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB100 ,Group Status Bit 100" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB99 ,Group Status Bit 99" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB98 ,Group Status Bit 98" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB97 ,Group Status Bit 97" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB96 ,Group Status Bit 96" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x03)
|
|
group.long 0x008C++0x03
|
|
line.long 0x0 "GICD_IGROUPR3,Interrupt Group Register 3 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB127 ,Group Status Bit 127" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB126 ,Group Status Bit 126" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB125 ,Group Status Bit 125" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB124 ,Group Status Bit 124" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB123 ,Group Status Bit 123" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB122 ,Group Status Bit 122" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB121 ,Group Status Bit 121" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB120 ,Group Status Bit 120" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB119 ,Group Status Bit 119" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB118 ,Group Status Bit 118" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB117 ,Group Status Bit 117" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB116 ,Group Status Bit 116" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB115 ,Group Status Bit 115" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB114 ,Group Status Bit 114" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB113 ,Group Status Bit 113" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB112 ,Group Status Bit 112" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB111 ,Group Status Bit 111" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB110 ,Group Status Bit 110" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB109 ,Group Status Bit 109" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB108 ,Group Status Bit 108" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB107 ,Group Status Bit 107" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB106 ,Group Status Bit 106" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB105 ,Group Status Bit 105" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB104 ,Group Status Bit 104" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB103 ,Group Status Bit 103" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB102 ,Group Status Bit 102" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB101 ,Group Status Bit 101" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB100 ,Group Status Bit 100" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB99 ,Group Status Bit 99" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB98 ,Group Status Bit 98" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB97 ,Group Status Bit 97" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB96 ,Group Status Bit 96" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x008C++0x03
|
|
line.long 0x0 "GICD_IGROUPR3,Interrupt Group Register 3"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x04)&&(PER.ADDRESS.isSECUREEX(ad:0x7d001000+0x0090))
|
|
group.long 0x0090++0x03
|
|
line.long 0x0 "GICD_IGROUPR4,Interrupt Group Register 4 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB159 ,Group Status Bit 159" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB158 ,Group Status Bit 158" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB157 ,Group Status Bit 157" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB156 ,Group Status Bit 156" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB155 ,Group Status Bit 155" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB154 ,Group Status Bit 154" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB153 ,Group Status Bit 153" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB152 ,Group Status Bit 152" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB151 ,Group Status Bit 151" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB150 ,Group Status Bit 150" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB149 ,Group Status Bit 149" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB148 ,Group Status Bit 148" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB147 ,Group Status Bit 147" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB146 ,Group Status Bit 146" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB145 ,Group Status Bit 145" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB144 ,Group Status Bit 144" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB143 ,Group Status Bit 143" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB142 ,Group Status Bit 142" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB141 ,Group Status Bit 141" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB140 ,Group Status Bit 140" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB139 ,Group Status Bit 139" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB138 ,Group Status Bit 138" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB137 ,Group Status Bit 137" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB136 ,Group Status Bit 136" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB135 ,Group Status Bit 135" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB134 ,Group Status Bit 134" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB133 ,Group Status Bit 133" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB132 ,Group Status Bit 132" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB131 ,Group Status Bit 131" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB130 ,Group Status Bit 130" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB129 ,Group Status Bit 129" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB128 ,Group Status Bit 128" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x04)
|
|
group.long 0x0090++0x03
|
|
line.long 0x0 "GICD_IGROUPR4,Interrupt Group Register 4 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB159 ,Group Status Bit 159" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB158 ,Group Status Bit 158" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB157 ,Group Status Bit 157" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB156 ,Group Status Bit 156" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB155 ,Group Status Bit 155" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB154 ,Group Status Bit 154" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB153 ,Group Status Bit 153" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB152 ,Group Status Bit 152" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB151 ,Group Status Bit 151" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB150 ,Group Status Bit 150" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB149 ,Group Status Bit 149" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB148 ,Group Status Bit 148" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB147 ,Group Status Bit 147" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB146 ,Group Status Bit 146" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB145 ,Group Status Bit 145" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB144 ,Group Status Bit 144" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB143 ,Group Status Bit 143" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB142 ,Group Status Bit 142" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB141 ,Group Status Bit 141" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB140 ,Group Status Bit 140" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB139 ,Group Status Bit 139" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB138 ,Group Status Bit 138" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB137 ,Group Status Bit 137" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB136 ,Group Status Bit 136" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB135 ,Group Status Bit 135" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB134 ,Group Status Bit 134" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB133 ,Group Status Bit 133" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB132 ,Group Status Bit 132" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB131 ,Group Status Bit 131" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB130 ,Group Status Bit 130" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB129 ,Group Status Bit 129" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB128 ,Group Status Bit 128" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x0090++0x03
|
|
line.long 0x0 "GICD_IGROUPR4,Interrupt Group Register 4"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x05)&&(PER.ADDRESS.isSECUREEX(ad:0x7d001000+0x0094))
|
|
group.long 0x0094++0x03
|
|
line.long 0x0 "GICD_IGROUPR5,Interrupt Group Register 5 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB191 ,Group Status Bit 191" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB190 ,Group Status Bit 190" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB189 ,Group Status Bit 189" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB188 ,Group Status Bit 188" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB187 ,Group Status Bit 187" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB186 ,Group Status Bit 186" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB185 ,Group Status Bit 185" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB184 ,Group Status Bit 184" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB183 ,Group Status Bit 183" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB182 ,Group Status Bit 182" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB181 ,Group Status Bit 181" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB180 ,Group Status Bit 180" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB179 ,Group Status Bit 179" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB178 ,Group Status Bit 178" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB177 ,Group Status Bit 177" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB176 ,Group Status Bit 176" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB175 ,Group Status Bit 175" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB174 ,Group Status Bit 174" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB173 ,Group Status Bit 173" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB172 ,Group Status Bit 172" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB171 ,Group Status Bit 171" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB170 ,Group Status Bit 170" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB169 ,Group Status Bit 169" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB168 ,Group Status Bit 168" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB167 ,Group Status Bit 167" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB166 ,Group Status Bit 166" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB165 ,Group Status Bit 165" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB164 ,Group Status Bit 164" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB163 ,Group Status Bit 163" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB162 ,Group Status Bit 162" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB161 ,Group Status Bit 161" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB160 ,Group Status Bit 160" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x05)
|
|
group.long 0x0094++0x03
|
|
line.long 0x0 "GICD_IGROUPR5,Interrupt Group Register 5 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB191 ,Group Status Bit 191" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB190 ,Group Status Bit 190" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB189 ,Group Status Bit 189" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB188 ,Group Status Bit 188" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB187 ,Group Status Bit 187" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB186 ,Group Status Bit 186" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB185 ,Group Status Bit 185" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB184 ,Group Status Bit 184" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB183 ,Group Status Bit 183" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB182 ,Group Status Bit 182" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB181 ,Group Status Bit 181" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB180 ,Group Status Bit 180" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB179 ,Group Status Bit 179" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB178 ,Group Status Bit 178" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB177 ,Group Status Bit 177" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB176 ,Group Status Bit 176" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB175 ,Group Status Bit 175" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB174 ,Group Status Bit 174" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB173 ,Group Status Bit 173" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB172 ,Group Status Bit 172" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB171 ,Group Status Bit 171" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB170 ,Group Status Bit 170" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB169 ,Group Status Bit 169" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB168 ,Group Status Bit 168" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB167 ,Group Status Bit 167" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB166 ,Group Status Bit 166" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB165 ,Group Status Bit 165" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB164 ,Group Status Bit 164" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB163 ,Group Status Bit 163" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB162 ,Group Status Bit 162" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB161 ,Group Status Bit 161" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB160 ,Group Status Bit 160" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x0094++0x03
|
|
line.long 0x0 "GICD_IGROUPR5,Interrupt Group Register 5"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x06)&&(PER.ADDRESS.isSECUREEX(ad:0x7d001000+0x0098))
|
|
group.long 0x0098++0x03
|
|
line.long 0x0 "GICD_IGROUPR6,Interrupt Group Register 6 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB223 ,Group Status Bit 223" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB222 ,Group Status Bit 222" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB221 ,Group Status Bit 221" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB220 ,Group Status Bit 220" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB219 ,Group Status Bit 219" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB218 ,Group Status Bit 218" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB217 ,Group Status Bit 217" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB216 ,Group Status Bit 216" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB215 ,Group Status Bit 215" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB214 ,Group Status Bit 214" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB213 ,Group Status Bit 213" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB212 ,Group Status Bit 212" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB211 ,Group Status Bit 211" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB210 ,Group Status Bit 210" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB209 ,Group Status Bit 209" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB208 ,Group Status Bit 208" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB207 ,Group Status Bit 207" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB206 ,Group Status Bit 206" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB205 ,Group Status Bit 205" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB204 ,Group Status Bit 204" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB203 ,Group Status Bit 203" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB202 ,Group Status Bit 202" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB201 ,Group Status Bit 201" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB200 ,Group Status Bit 200" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB199 ,Group Status Bit 199" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB198 ,Group Status Bit 198" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB197 ,Group Status Bit 197" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB196 ,Group Status Bit 196" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB195 ,Group Status Bit 195" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB194 ,Group Status Bit 194" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB193 ,Group Status Bit 193" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB192 ,Group Status Bit 192" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x06)
|
|
group.long 0x0098++0x03
|
|
line.long 0x0 "GICD_IGROUPR6,Interrupt Group Register 6 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB223 ,Group Status Bit 223" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB222 ,Group Status Bit 222" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB221 ,Group Status Bit 221" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB220 ,Group Status Bit 220" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB219 ,Group Status Bit 219" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB218 ,Group Status Bit 218" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB217 ,Group Status Bit 217" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB216 ,Group Status Bit 216" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB215 ,Group Status Bit 215" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB214 ,Group Status Bit 214" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB213 ,Group Status Bit 213" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB212 ,Group Status Bit 212" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB211 ,Group Status Bit 211" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB210 ,Group Status Bit 210" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB209 ,Group Status Bit 209" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB208 ,Group Status Bit 208" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB207 ,Group Status Bit 207" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB206 ,Group Status Bit 206" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB205 ,Group Status Bit 205" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB204 ,Group Status Bit 204" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB203 ,Group Status Bit 203" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB202 ,Group Status Bit 202" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB201 ,Group Status Bit 201" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB200 ,Group Status Bit 200" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB199 ,Group Status Bit 199" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB198 ,Group Status Bit 198" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB197 ,Group Status Bit 197" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB196 ,Group Status Bit 196" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB195 ,Group Status Bit 195" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB194 ,Group Status Bit 194" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB193 ,Group Status Bit 193" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB192 ,Group Status Bit 192" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x0098++0x03
|
|
line.long 0x0 "GICD_IGROUPR6,Interrupt Group Register 6"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x07)&&(PER.ADDRESS.isSECUREEX(ad:0x7d001000+0x009C))
|
|
group.long 0x009C++0x03
|
|
line.long 0x0 "GICD_IGROUPR7,Interrupt Group Register 7 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB255 ,Group Status Bit 255" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB254 ,Group Status Bit 254" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB253 ,Group Status Bit 253" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB252 ,Group Status Bit 252" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB251 ,Group Status Bit 251" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB250 ,Group Status Bit 250" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB249 ,Group Status Bit 249" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB248 ,Group Status Bit 248" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB247 ,Group Status Bit 247" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB246 ,Group Status Bit 246" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB245 ,Group Status Bit 245" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB244 ,Group Status Bit 244" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB243 ,Group Status Bit 243" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB242 ,Group Status Bit 242" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB241 ,Group Status Bit 241" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB240 ,Group Status Bit 240" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB239 ,Group Status Bit 239" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB238 ,Group Status Bit 238" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB237 ,Group Status Bit 237" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB236 ,Group Status Bit 236" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB235 ,Group Status Bit 235" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB234 ,Group Status Bit 234" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB233 ,Group Status Bit 233" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB232 ,Group Status Bit 232" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB231 ,Group Status Bit 231" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB230 ,Group Status Bit 230" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB229 ,Group Status Bit 229" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB228 ,Group Status Bit 228" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB227 ,Group Status Bit 227" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB226 ,Group Status Bit 226" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB225 ,Group Status Bit 225" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB224 ,Group Status Bit 224" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x07)
|
|
group.long 0x009C++0x03
|
|
line.long 0x0 "GICD_IGROUPR7,Interrupt Group Register 7 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB255 ,Group Status Bit 255" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB254 ,Group Status Bit 254" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB253 ,Group Status Bit 253" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB252 ,Group Status Bit 252" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB251 ,Group Status Bit 251" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB250 ,Group Status Bit 250" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB249 ,Group Status Bit 249" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB248 ,Group Status Bit 248" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB247 ,Group Status Bit 247" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB246 ,Group Status Bit 246" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB245 ,Group Status Bit 245" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB244 ,Group Status Bit 244" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB243 ,Group Status Bit 243" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB242 ,Group Status Bit 242" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB241 ,Group Status Bit 241" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB240 ,Group Status Bit 240" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB239 ,Group Status Bit 239" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB238 ,Group Status Bit 238" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB237 ,Group Status Bit 237" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB236 ,Group Status Bit 236" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB235 ,Group Status Bit 235" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB234 ,Group Status Bit 234" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB233 ,Group Status Bit 233" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB232 ,Group Status Bit 232" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB231 ,Group Status Bit 231" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB230 ,Group Status Bit 230" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB229 ,Group Status Bit 229" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB228 ,Group Status Bit 228" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB227 ,Group Status Bit 227" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB226 ,Group Status Bit 226" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB225 ,Group Status Bit 225" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB224 ,Group Status Bit 224" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x009C++0x03
|
|
line.long 0x0 "GICD_IGROUPR7,Interrupt Group Register 7"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x08)&&(PER.ADDRESS.isSECUREEX(ad:0x7d001000+0x00A0))
|
|
group.long 0x00A0++0x03
|
|
line.long 0x0 "GICD_IGROUPR8,Interrupt Group Register 8 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB287 ,Group Status Bit 287" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB286 ,Group Status Bit 286" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB285 ,Group Status Bit 285" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB284 ,Group Status Bit 284" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB283 ,Group Status Bit 283" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB282 ,Group Status Bit 282" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB281 ,Group Status Bit 281" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB280 ,Group Status Bit 280" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB279 ,Group Status Bit 279" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB278 ,Group Status Bit 278" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB277 ,Group Status Bit 277" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB276 ,Group Status Bit 276" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB275 ,Group Status Bit 275" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB274 ,Group Status Bit 274" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB273 ,Group Status Bit 273" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB272 ,Group Status Bit 272" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB271 ,Group Status Bit 271" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB270 ,Group Status Bit 270" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB269 ,Group Status Bit 269" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB268 ,Group Status Bit 268" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB267 ,Group Status Bit 267" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB266 ,Group Status Bit 266" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB265 ,Group Status Bit 265" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB264 ,Group Status Bit 264" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB263 ,Group Status Bit 263" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB262 ,Group Status Bit 262" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB261 ,Group Status Bit 261" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB260 ,Group Status Bit 260" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB259 ,Group Status Bit 259" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB258 ,Group Status Bit 258" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB257 ,Group Status Bit 257" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB256 ,Group Status Bit 256" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x08)
|
|
group.long 0x00A0++0x03
|
|
line.long 0x0 "GICD_IGROUPR8,Interrupt Group Register 8 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB287 ,Group Status Bit 287" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB286 ,Group Status Bit 286" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB285 ,Group Status Bit 285" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB284 ,Group Status Bit 284" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB283 ,Group Status Bit 283" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB282 ,Group Status Bit 282" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB281 ,Group Status Bit 281" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB280 ,Group Status Bit 280" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB279 ,Group Status Bit 279" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB278 ,Group Status Bit 278" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB277 ,Group Status Bit 277" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB276 ,Group Status Bit 276" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB275 ,Group Status Bit 275" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB274 ,Group Status Bit 274" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB273 ,Group Status Bit 273" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB272 ,Group Status Bit 272" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB271 ,Group Status Bit 271" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB270 ,Group Status Bit 270" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB269 ,Group Status Bit 269" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB268 ,Group Status Bit 268" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB267 ,Group Status Bit 267" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB266 ,Group Status Bit 266" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB265 ,Group Status Bit 265" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB264 ,Group Status Bit 264" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB263 ,Group Status Bit 263" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB262 ,Group Status Bit 262" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB261 ,Group Status Bit 261" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB260 ,Group Status Bit 260" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB259 ,Group Status Bit 259" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB258 ,Group Status Bit 258" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB257 ,Group Status Bit 257" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB256 ,Group Status Bit 256" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x00A0++0x03
|
|
line.long 0x0 "GICD_IGROUPR8,Interrupt Group Register 8"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x09)&&(PER.ADDRESS.isSECUREEX(ad:0x7d001000+0x00A4))
|
|
group.long 0x00A4++0x03
|
|
line.long 0x0 "GICD_IGROUPR9,Interrupt Group Register 9 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB319 ,Group Status Bit 319" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB318 ,Group Status Bit 318" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB317 ,Group Status Bit 317" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB316 ,Group Status Bit 316" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB315 ,Group Status Bit 315" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB314 ,Group Status Bit 314" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB313 ,Group Status Bit 313" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB312 ,Group Status Bit 312" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB311 ,Group Status Bit 311" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB310 ,Group Status Bit 310" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB309 ,Group Status Bit 309" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB308 ,Group Status Bit 308" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB307 ,Group Status Bit 307" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB306 ,Group Status Bit 306" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB305 ,Group Status Bit 305" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB304 ,Group Status Bit 304" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB303 ,Group Status Bit 303" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB302 ,Group Status Bit 302" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB301 ,Group Status Bit 301" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB300 ,Group Status Bit 300" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB299 ,Group Status Bit 299" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB298 ,Group Status Bit 298" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB297 ,Group Status Bit 297" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB296 ,Group Status Bit 296" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB295 ,Group Status Bit 295" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB294 ,Group Status Bit 294" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB293 ,Group Status Bit 293" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB292 ,Group Status Bit 292" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB291 ,Group Status Bit 291" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB290 ,Group Status Bit 290" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB289 ,Group Status Bit 289" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB288 ,Group Status Bit 288" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x09)
|
|
group.long 0x00A4++0x03
|
|
line.long 0x0 "GICD_IGROUPR9,Interrupt Group Register 9 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB319 ,Group Status Bit 319" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB318 ,Group Status Bit 318" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB317 ,Group Status Bit 317" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB316 ,Group Status Bit 316" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB315 ,Group Status Bit 315" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB314 ,Group Status Bit 314" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB313 ,Group Status Bit 313" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB312 ,Group Status Bit 312" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB311 ,Group Status Bit 311" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB310 ,Group Status Bit 310" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB309 ,Group Status Bit 309" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB308 ,Group Status Bit 308" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB307 ,Group Status Bit 307" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB306 ,Group Status Bit 306" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB305 ,Group Status Bit 305" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB304 ,Group Status Bit 304" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB303 ,Group Status Bit 303" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB302 ,Group Status Bit 302" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB301 ,Group Status Bit 301" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB300 ,Group Status Bit 300" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB299 ,Group Status Bit 299" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB298 ,Group Status Bit 298" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB297 ,Group Status Bit 297" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB296 ,Group Status Bit 296" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB295 ,Group Status Bit 295" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB294 ,Group Status Bit 294" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB293 ,Group Status Bit 293" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB292 ,Group Status Bit 292" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB291 ,Group Status Bit 291" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB290 ,Group Status Bit 290" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB289 ,Group Status Bit 289" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB288 ,Group Status Bit 288" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x00A4++0x03
|
|
line.long 0x0 "GICD_IGROUPR9,Interrupt Group Register 9"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0A)&&(PER.ADDRESS.isSECUREEX(ad:0x7d001000+0x00A8))
|
|
group.long 0x00A8++0x03
|
|
line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB351 ,Group Status Bit 351" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB350 ,Group Status Bit 350" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB349 ,Group Status Bit 349" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB348 ,Group Status Bit 348" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB347 ,Group Status Bit 347" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB346 ,Group Status Bit 346" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB345 ,Group Status Bit 345" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB344 ,Group Status Bit 344" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB343 ,Group Status Bit 343" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB342 ,Group Status Bit 342" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB341 ,Group Status Bit 341" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB340 ,Group Status Bit 340" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB339 ,Group Status Bit 339" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB338 ,Group Status Bit 338" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB337 ,Group Status Bit 337" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB336 ,Group Status Bit 336" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB335 ,Group Status Bit 335" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB334 ,Group Status Bit 334" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB333 ,Group Status Bit 333" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB332 ,Group Status Bit 332" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB331 ,Group Status Bit 331" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB330 ,Group Status Bit 330" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB329 ,Group Status Bit 329" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB328 ,Group Status Bit 328" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB327 ,Group Status Bit 327" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB326 ,Group Status Bit 326" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB325 ,Group Status Bit 325" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB324 ,Group Status Bit 324" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB323 ,Group Status Bit 323" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB322 ,Group Status Bit 322" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB321 ,Group Status Bit 321" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB320 ,Group Status Bit 320" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0A)
|
|
group.long 0x00A8++0x03
|
|
line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB351 ,Group Status Bit 351" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB350 ,Group Status Bit 350" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB349 ,Group Status Bit 349" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB348 ,Group Status Bit 348" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB347 ,Group Status Bit 347" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB346 ,Group Status Bit 346" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB345 ,Group Status Bit 345" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB344 ,Group Status Bit 344" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB343 ,Group Status Bit 343" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB342 ,Group Status Bit 342" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB341 ,Group Status Bit 341" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB340 ,Group Status Bit 340" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB339 ,Group Status Bit 339" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB338 ,Group Status Bit 338" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB337 ,Group Status Bit 337" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB336 ,Group Status Bit 336" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB335 ,Group Status Bit 335" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB334 ,Group Status Bit 334" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB333 ,Group Status Bit 333" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB332 ,Group Status Bit 332" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB331 ,Group Status Bit 331" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB330 ,Group Status Bit 330" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB329 ,Group Status Bit 329" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB328 ,Group Status Bit 328" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB327 ,Group Status Bit 327" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB326 ,Group Status Bit 326" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB325 ,Group Status Bit 325" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB324 ,Group Status Bit 324" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB323 ,Group Status Bit 323" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB322 ,Group Status Bit 322" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB321 ,Group Status Bit 321" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB320 ,Group Status Bit 320" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x00A8++0x03
|
|
line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0B)&&(PER.ADDRESS.isSECUREEX(ad:0x7d001000+0x00AC))
|
|
group.long 0x00AC++0x03
|
|
line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB383 ,Group Status Bit 383" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB382 ,Group Status Bit 382" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB381 ,Group Status Bit 381" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB380 ,Group Status Bit 380" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB379 ,Group Status Bit 379" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB378 ,Group Status Bit 378" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB377 ,Group Status Bit 377" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB376 ,Group Status Bit 376" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB375 ,Group Status Bit 375" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB374 ,Group Status Bit 374" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB373 ,Group Status Bit 373" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB372 ,Group Status Bit 372" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB371 ,Group Status Bit 371" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB370 ,Group Status Bit 370" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB369 ,Group Status Bit 369" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB368 ,Group Status Bit 368" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB367 ,Group Status Bit 367" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB366 ,Group Status Bit 366" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB365 ,Group Status Bit 365" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB364 ,Group Status Bit 364" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB363 ,Group Status Bit 363" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB362 ,Group Status Bit 362" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB361 ,Group Status Bit 361" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB360 ,Group Status Bit 360" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB359 ,Group Status Bit 359" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB358 ,Group Status Bit 358" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB357 ,Group Status Bit 357" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB356 ,Group Status Bit 356" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB355 ,Group Status Bit 355" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB354 ,Group Status Bit 354" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB353 ,Group Status Bit 353" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB352 ,Group Status Bit 352" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0B)
|
|
group.long 0x00AC++0x03
|
|
line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB383 ,Group Status Bit 383" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB382 ,Group Status Bit 382" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB381 ,Group Status Bit 381" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB380 ,Group Status Bit 380" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB379 ,Group Status Bit 379" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB378 ,Group Status Bit 378" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB377 ,Group Status Bit 377" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB376 ,Group Status Bit 376" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB375 ,Group Status Bit 375" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB374 ,Group Status Bit 374" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB373 ,Group Status Bit 373" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB372 ,Group Status Bit 372" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB371 ,Group Status Bit 371" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB370 ,Group Status Bit 370" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB369 ,Group Status Bit 369" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB368 ,Group Status Bit 368" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB367 ,Group Status Bit 367" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB366 ,Group Status Bit 366" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB365 ,Group Status Bit 365" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB364 ,Group Status Bit 364" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB363 ,Group Status Bit 363" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB362 ,Group Status Bit 362" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB361 ,Group Status Bit 361" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB360 ,Group Status Bit 360" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB359 ,Group Status Bit 359" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB358 ,Group Status Bit 358" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB357 ,Group Status Bit 357" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB356 ,Group Status Bit 356" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB355 ,Group Status Bit 355" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB354 ,Group Status Bit 354" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB353 ,Group Status Bit 353" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB352 ,Group Status Bit 352" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x00AC++0x03
|
|
line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0C)&&(PER.ADDRESS.isSECUREEX(ad:0x7d001000+0x00B0))
|
|
group.long 0x00B0++0x03
|
|
line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB415 ,Group Status Bit 415" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB414 ,Group Status Bit 414" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB413 ,Group Status Bit 413" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB412 ,Group Status Bit 412" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB411 ,Group Status Bit 411" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB410 ,Group Status Bit 410" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB409 ,Group Status Bit 409" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB408 ,Group Status Bit 408" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB407 ,Group Status Bit 407" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB406 ,Group Status Bit 406" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB405 ,Group Status Bit 405" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB404 ,Group Status Bit 404" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB403 ,Group Status Bit 403" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB402 ,Group Status Bit 402" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB401 ,Group Status Bit 401" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB400 ,Group Status Bit 400" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB399 ,Group Status Bit 399" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB398 ,Group Status Bit 398" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB397 ,Group Status Bit 397" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB396 ,Group Status Bit 396" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB395 ,Group Status Bit 395" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB394 ,Group Status Bit 394" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB393 ,Group Status Bit 393" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB392 ,Group Status Bit 392" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB391 ,Group Status Bit 391" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB390 ,Group Status Bit 390" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB389 ,Group Status Bit 389" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB388 ,Group Status Bit 388" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB387 ,Group Status Bit 387" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB386 ,Group Status Bit 386" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB385 ,Group Status Bit 385" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB384 ,Group Status Bit 384" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0C)
|
|
group.long 0x00B0++0x03
|
|
line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB415 ,Group Status Bit 415" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB414 ,Group Status Bit 414" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB413 ,Group Status Bit 413" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB412 ,Group Status Bit 412" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB411 ,Group Status Bit 411" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB410 ,Group Status Bit 410" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB409 ,Group Status Bit 409" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB408 ,Group Status Bit 408" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB407 ,Group Status Bit 407" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB406 ,Group Status Bit 406" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB405 ,Group Status Bit 405" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB404 ,Group Status Bit 404" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB403 ,Group Status Bit 403" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB402 ,Group Status Bit 402" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB401 ,Group Status Bit 401" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB400 ,Group Status Bit 400" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB399 ,Group Status Bit 399" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB398 ,Group Status Bit 398" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB397 ,Group Status Bit 397" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB396 ,Group Status Bit 396" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB395 ,Group Status Bit 395" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB394 ,Group Status Bit 394" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB393 ,Group Status Bit 393" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB392 ,Group Status Bit 392" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB391 ,Group Status Bit 391" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB390 ,Group Status Bit 390" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB389 ,Group Status Bit 389" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB388 ,Group Status Bit 388" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB387 ,Group Status Bit 387" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB386 ,Group Status Bit 386" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB385 ,Group Status Bit 385" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB384 ,Group Status Bit 384" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x00B0++0x03
|
|
line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0D)&&(PER.ADDRESS.isSECUREEX(ad:0x7d001000+0x00B4))
|
|
group.long 0x00B4++0x03
|
|
line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB447 ,Group Status Bit 447" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB446 ,Group Status Bit 446" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB445 ,Group Status Bit 445" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB444 ,Group Status Bit 444" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB443 ,Group Status Bit 443" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB442 ,Group Status Bit 442" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB441 ,Group Status Bit 441" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB440 ,Group Status Bit 440" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB439 ,Group Status Bit 439" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB438 ,Group Status Bit 438" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB437 ,Group Status Bit 437" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB436 ,Group Status Bit 436" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB435 ,Group Status Bit 435" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB434 ,Group Status Bit 434" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB433 ,Group Status Bit 433" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB432 ,Group Status Bit 432" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB431 ,Group Status Bit 431" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB430 ,Group Status Bit 430" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB429 ,Group Status Bit 429" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB428 ,Group Status Bit 428" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB427 ,Group Status Bit 427" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB426 ,Group Status Bit 426" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB425 ,Group Status Bit 425" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB424 ,Group Status Bit 424" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB423 ,Group Status Bit 423" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB422 ,Group Status Bit 422" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB421 ,Group Status Bit 421" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB420 ,Group Status Bit 420" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB419 ,Group Status Bit 419" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB418 ,Group Status Bit 418" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB417 ,Group Status Bit 417" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB416 ,Group Status Bit 416" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0D)
|
|
group.long 0x00B4++0x03
|
|
line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB447 ,Group Status Bit 447" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB446 ,Group Status Bit 446" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB445 ,Group Status Bit 445" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB444 ,Group Status Bit 444" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB443 ,Group Status Bit 443" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB442 ,Group Status Bit 442" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB441 ,Group Status Bit 441" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB440 ,Group Status Bit 440" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB439 ,Group Status Bit 439" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB438 ,Group Status Bit 438" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB437 ,Group Status Bit 437" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB436 ,Group Status Bit 436" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB435 ,Group Status Bit 435" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB434 ,Group Status Bit 434" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB433 ,Group Status Bit 433" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB432 ,Group Status Bit 432" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB431 ,Group Status Bit 431" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB430 ,Group Status Bit 430" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB429 ,Group Status Bit 429" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB428 ,Group Status Bit 428" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB427 ,Group Status Bit 427" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB426 ,Group Status Bit 426" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB425 ,Group Status Bit 425" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB424 ,Group Status Bit 424" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB423 ,Group Status Bit 423" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB422 ,Group Status Bit 422" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB421 ,Group Status Bit 421" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB420 ,Group Status Bit 420" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB419 ,Group Status Bit 419" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB418 ,Group Status Bit 418" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB417 ,Group Status Bit 417" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB416 ,Group Status Bit 416" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x00B4++0x03
|
|
line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0E)&&(PER.ADDRESS.isSECUREEX(ad:0x7d001000+0x00B8))
|
|
group.long 0x00B8++0x03
|
|
line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB479 ,Group Status Bit 479" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB478 ,Group Status Bit 478" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB477 ,Group Status Bit 477" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB476 ,Group Status Bit 476" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB475 ,Group Status Bit 475" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB474 ,Group Status Bit 474" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB473 ,Group Status Bit 473" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB472 ,Group Status Bit 472" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB471 ,Group Status Bit 471" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB470 ,Group Status Bit 470" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB469 ,Group Status Bit 469" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB468 ,Group Status Bit 468" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB467 ,Group Status Bit 467" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB466 ,Group Status Bit 466" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB465 ,Group Status Bit 465" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB464 ,Group Status Bit 464" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB463 ,Group Status Bit 463" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB462 ,Group Status Bit 462" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB461 ,Group Status Bit 461" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB460 ,Group Status Bit 460" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB459 ,Group Status Bit 459" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB458 ,Group Status Bit 458" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB457 ,Group Status Bit 457" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB456 ,Group Status Bit 456" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB455 ,Group Status Bit 455" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB454 ,Group Status Bit 454" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB453 ,Group Status Bit 453" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB452 ,Group Status Bit 452" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB451 ,Group Status Bit 451" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB450 ,Group Status Bit 450" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB449 ,Group Status Bit 449" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB448 ,Group Status Bit 448" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0E)
|
|
group.long 0x00B8++0x03
|
|
line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB479 ,Group Status Bit 479" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB478 ,Group Status Bit 478" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB477 ,Group Status Bit 477" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB476 ,Group Status Bit 476" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB475 ,Group Status Bit 475" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB474 ,Group Status Bit 474" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB473 ,Group Status Bit 473" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB472 ,Group Status Bit 472" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB471 ,Group Status Bit 471" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB470 ,Group Status Bit 470" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB469 ,Group Status Bit 469" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB468 ,Group Status Bit 468" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB467 ,Group Status Bit 467" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB466 ,Group Status Bit 466" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB465 ,Group Status Bit 465" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB464 ,Group Status Bit 464" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB463 ,Group Status Bit 463" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB462 ,Group Status Bit 462" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB461 ,Group Status Bit 461" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB460 ,Group Status Bit 460" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB459 ,Group Status Bit 459" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB458 ,Group Status Bit 458" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB457 ,Group Status Bit 457" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB456 ,Group Status Bit 456" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB455 ,Group Status Bit 455" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB454 ,Group Status Bit 454" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB453 ,Group Status Bit 453" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB452 ,Group Status Bit 452" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB451 ,Group Status Bit 451" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB450 ,Group Status Bit 450" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB449 ,Group Status Bit 449" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB448 ,Group Status Bit 448" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x00B8++0x03
|
|
line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0F)&&(PER.ADDRESS.isSECUREEX(ad:0x7d001000+0x00BC))
|
|
group.long 0x00BC++0x03
|
|
line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB511 ,Group Status Bit 511" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB510 ,Group Status Bit 510" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB509 ,Group Status Bit 509" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB508 ,Group Status Bit 508" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB507 ,Group Status Bit 507" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB506 ,Group Status Bit 506" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB505 ,Group Status Bit 505" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB504 ,Group Status Bit 504" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB503 ,Group Status Bit 503" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB502 ,Group Status Bit 502" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB501 ,Group Status Bit 501" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB500 ,Group Status Bit 500" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB499 ,Group Status Bit 499" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB498 ,Group Status Bit 498" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB497 ,Group Status Bit 497" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB496 ,Group Status Bit 496" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB495 ,Group Status Bit 495" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB494 ,Group Status Bit 494" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB493 ,Group Status Bit 493" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB492 ,Group Status Bit 492" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB491 ,Group Status Bit 491" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB490 ,Group Status Bit 490" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB489 ,Group Status Bit 489" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB488 ,Group Status Bit 488" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB487 ,Group Status Bit 487" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB486 ,Group Status Bit 486" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB485 ,Group Status Bit 485" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB484 ,Group Status Bit 484" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB483 ,Group Status Bit 483" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB482 ,Group Status Bit 482" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB481 ,Group Status Bit 481" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB480 ,Group Status Bit 480" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0F)
|
|
group.long 0x00BC++0x03
|
|
line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB511 ,Group Status Bit 511" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB510 ,Group Status Bit 510" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB509 ,Group Status Bit 509" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB508 ,Group Status Bit 508" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB507 ,Group Status Bit 507" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB506 ,Group Status Bit 506" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB505 ,Group Status Bit 505" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB504 ,Group Status Bit 504" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB503 ,Group Status Bit 503" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB502 ,Group Status Bit 502" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB501 ,Group Status Bit 501" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB500 ,Group Status Bit 500" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB499 ,Group Status Bit 499" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB498 ,Group Status Bit 498" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB497 ,Group Status Bit 497" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB496 ,Group Status Bit 496" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB495 ,Group Status Bit 495" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB494 ,Group Status Bit 494" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB493 ,Group Status Bit 493" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB492 ,Group Status Bit 492" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB491 ,Group Status Bit 491" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB490 ,Group Status Bit 490" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB489 ,Group Status Bit 489" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB488 ,Group Status Bit 488" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB487 ,Group Status Bit 487" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB486 ,Group Status Bit 486" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB485 ,Group Status Bit 485" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB484 ,Group Status Bit 484" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB483 ,Group Status Bit 483" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB482 ,Group Status Bit 482" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB481 ,Group Status Bit 481" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB480 ,Group Status Bit 480" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x00BC++0x03
|
|
line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x10)&&(PER.ADDRESS.isSECUREEX(ad:0x7d001000+0x00C0))
|
|
group.long 0x00C0++0x03
|
|
line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB543 ,Group Status Bit 543" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB542 ,Group Status Bit 542" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB541 ,Group Status Bit 541" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB540 ,Group Status Bit 540" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB539 ,Group Status Bit 539" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB538 ,Group Status Bit 538" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB537 ,Group Status Bit 537" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB536 ,Group Status Bit 536" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB535 ,Group Status Bit 535" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB534 ,Group Status Bit 534" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB533 ,Group Status Bit 533" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB532 ,Group Status Bit 532" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB531 ,Group Status Bit 531" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB530 ,Group Status Bit 530" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB529 ,Group Status Bit 529" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB528 ,Group Status Bit 528" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB527 ,Group Status Bit 527" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB526 ,Group Status Bit 526" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB525 ,Group Status Bit 525" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB524 ,Group Status Bit 524" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB523 ,Group Status Bit 523" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB522 ,Group Status Bit 522" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB521 ,Group Status Bit 521" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB520 ,Group Status Bit 520" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB519 ,Group Status Bit 519" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB518 ,Group Status Bit 518" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB517 ,Group Status Bit 517" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB516 ,Group Status Bit 516" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB515 ,Group Status Bit 515" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB514 ,Group Status Bit 514" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB513 ,Group Status Bit 513" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB512 ,Group Status Bit 512" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x10)
|
|
group.long 0x00C0++0x03
|
|
line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB543 ,Group Status Bit 543" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB542 ,Group Status Bit 542" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB541 ,Group Status Bit 541" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB540 ,Group Status Bit 540" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB539 ,Group Status Bit 539" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB538 ,Group Status Bit 538" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB537 ,Group Status Bit 537" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB536 ,Group Status Bit 536" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB535 ,Group Status Bit 535" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB534 ,Group Status Bit 534" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB533 ,Group Status Bit 533" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB532 ,Group Status Bit 532" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB531 ,Group Status Bit 531" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB530 ,Group Status Bit 530" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB529 ,Group Status Bit 529" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB528 ,Group Status Bit 528" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB527 ,Group Status Bit 527" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB526 ,Group Status Bit 526" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB525 ,Group Status Bit 525" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB524 ,Group Status Bit 524" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB523 ,Group Status Bit 523" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB522 ,Group Status Bit 522" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB521 ,Group Status Bit 521" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB520 ,Group Status Bit 520" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB519 ,Group Status Bit 519" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB518 ,Group Status Bit 518" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB517 ,Group Status Bit 517" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB516 ,Group Status Bit 516" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB515 ,Group Status Bit 515" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB514 ,Group Status Bit 514" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB513 ,Group Status Bit 513" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB512 ,Group Status Bit 512" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x00C0++0x03
|
|
line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x11)&&(PER.ADDRESS.isSECUREEX(ad:0x7d001000+0x00C4))
|
|
group.long 0x00C4++0x03
|
|
line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB575 ,Group Status Bit 575" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB574 ,Group Status Bit 574" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB573 ,Group Status Bit 573" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB572 ,Group Status Bit 572" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB571 ,Group Status Bit 571" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB570 ,Group Status Bit 570" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB569 ,Group Status Bit 569" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB568 ,Group Status Bit 568" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB567 ,Group Status Bit 567" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB566 ,Group Status Bit 566" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB565 ,Group Status Bit 565" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB564 ,Group Status Bit 564" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB563 ,Group Status Bit 563" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB562 ,Group Status Bit 562" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB561 ,Group Status Bit 561" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB560 ,Group Status Bit 560" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB559 ,Group Status Bit 559" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB558 ,Group Status Bit 558" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB557 ,Group Status Bit 557" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB556 ,Group Status Bit 556" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB555 ,Group Status Bit 555" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB554 ,Group Status Bit 554" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB553 ,Group Status Bit 553" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB552 ,Group Status Bit 552" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB551 ,Group Status Bit 551" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB550 ,Group Status Bit 550" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB549 ,Group Status Bit 549" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB548 ,Group Status Bit 548" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB547 ,Group Status Bit 547" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB546 ,Group Status Bit 546" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB545 ,Group Status Bit 545" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB544 ,Group Status Bit 544" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x11)
|
|
group.long 0x00C4++0x03
|
|
line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB575 ,Group Status Bit 575" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB574 ,Group Status Bit 574" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB573 ,Group Status Bit 573" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB572 ,Group Status Bit 572" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB571 ,Group Status Bit 571" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB570 ,Group Status Bit 570" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB569 ,Group Status Bit 569" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB568 ,Group Status Bit 568" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB567 ,Group Status Bit 567" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB566 ,Group Status Bit 566" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB565 ,Group Status Bit 565" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB564 ,Group Status Bit 564" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB563 ,Group Status Bit 563" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB562 ,Group Status Bit 562" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB561 ,Group Status Bit 561" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB560 ,Group Status Bit 560" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB559 ,Group Status Bit 559" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB558 ,Group Status Bit 558" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB557 ,Group Status Bit 557" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB556 ,Group Status Bit 556" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB555 ,Group Status Bit 555" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB554 ,Group Status Bit 554" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB553 ,Group Status Bit 553" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB552 ,Group Status Bit 552" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB551 ,Group Status Bit 551" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB550 ,Group Status Bit 550" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB549 ,Group Status Bit 549" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB548 ,Group Status Bit 548" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB547 ,Group Status Bit 547" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB546 ,Group Status Bit 546" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB545 ,Group Status Bit 545" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB544 ,Group Status Bit 544" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x00C4++0x03
|
|
line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x12)&&(PER.ADDRESS.isSECUREEX(ad:0x7d001000+0x00C8))
|
|
group.long 0x00C8++0x03
|
|
line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB607 ,Group Status Bit 607" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB606 ,Group Status Bit 606" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB605 ,Group Status Bit 605" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB604 ,Group Status Bit 604" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB603 ,Group Status Bit 603" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB602 ,Group Status Bit 602" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB601 ,Group Status Bit 601" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB600 ,Group Status Bit 600" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB599 ,Group Status Bit 599" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB598 ,Group Status Bit 598" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB597 ,Group Status Bit 597" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB596 ,Group Status Bit 596" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB595 ,Group Status Bit 595" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB594 ,Group Status Bit 594" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB593 ,Group Status Bit 593" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB592 ,Group Status Bit 592" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB591 ,Group Status Bit 591" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB590 ,Group Status Bit 590" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB589 ,Group Status Bit 589" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB588 ,Group Status Bit 588" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB587 ,Group Status Bit 587" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB586 ,Group Status Bit 586" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB585 ,Group Status Bit 585" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB584 ,Group Status Bit 584" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB583 ,Group Status Bit 583" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB582 ,Group Status Bit 582" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB581 ,Group Status Bit 581" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB580 ,Group Status Bit 580" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB579 ,Group Status Bit 579" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB578 ,Group Status Bit 578" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB577 ,Group Status Bit 577" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB576 ,Group Status Bit 576" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x12)
|
|
group.long 0x00C8++0x03
|
|
line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB607 ,Group Status Bit 607" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB606 ,Group Status Bit 606" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB605 ,Group Status Bit 605" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB604 ,Group Status Bit 604" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB603 ,Group Status Bit 603" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB602 ,Group Status Bit 602" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB601 ,Group Status Bit 601" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB600 ,Group Status Bit 600" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB599 ,Group Status Bit 599" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB598 ,Group Status Bit 598" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB597 ,Group Status Bit 597" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB596 ,Group Status Bit 596" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB595 ,Group Status Bit 595" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB594 ,Group Status Bit 594" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB593 ,Group Status Bit 593" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB592 ,Group Status Bit 592" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB591 ,Group Status Bit 591" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB590 ,Group Status Bit 590" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB589 ,Group Status Bit 589" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB588 ,Group Status Bit 588" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB587 ,Group Status Bit 587" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB586 ,Group Status Bit 586" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB585 ,Group Status Bit 585" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB584 ,Group Status Bit 584" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB583 ,Group Status Bit 583" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB582 ,Group Status Bit 582" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB581 ,Group Status Bit 581" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB580 ,Group Status Bit 580" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB579 ,Group Status Bit 579" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB578 ,Group Status Bit 578" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB577 ,Group Status Bit 577" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB576 ,Group Status Bit 576" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x00C8++0x03
|
|
line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x13)&&(PER.ADDRESS.isSECUREEX(ad:0x7d001000+0x00CC))
|
|
group.long 0x00CC++0x03
|
|
line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB639 ,Group Status Bit 639" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB638 ,Group Status Bit 638" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB637 ,Group Status Bit 637" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB636 ,Group Status Bit 636" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB635 ,Group Status Bit 635" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB634 ,Group Status Bit 634" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB633 ,Group Status Bit 633" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB632 ,Group Status Bit 632" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB631 ,Group Status Bit 631" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB630 ,Group Status Bit 630" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB629 ,Group Status Bit 629" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB628 ,Group Status Bit 628" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB627 ,Group Status Bit 627" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB626 ,Group Status Bit 626" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB625 ,Group Status Bit 625" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB624 ,Group Status Bit 624" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB623 ,Group Status Bit 623" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB622 ,Group Status Bit 622" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB621 ,Group Status Bit 621" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB620 ,Group Status Bit 620" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB619 ,Group Status Bit 619" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB618 ,Group Status Bit 618" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB617 ,Group Status Bit 617" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB616 ,Group Status Bit 616" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB615 ,Group Status Bit 615" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB614 ,Group Status Bit 614" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB613 ,Group Status Bit 613" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB612 ,Group Status Bit 612" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB611 ,Group Status Bit 611" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB610 ,Group Status Bit 610" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB609 ,Group Status Bit 609" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB608 ,Group Status Bit 608" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x13)
|
|
group.long 0x00CC++0x03
|
|
line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB639 ,Group Status Bit 639" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB638 ,Group Status Bit 638" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB637 ,Group Status Bit 637" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB636 ,Group Status Bit 636" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB635 ,Group Status Bit 635" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB634 ,Group Status Bit 634" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB633 ,Group Status Bit 633" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB632 ,Group Status Bit 632" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB631 ,Group Status Bit 631" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB630 ,Group Status Bit 630" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB629 ,Group Status Bit 629" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB628 ,Group Status Bit 628" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB627 ,Group Status Bit 627" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB626 ,Group Status Bit 626" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB625 ,Group Status Bit 625" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB624 ,Group Status Bit 624" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB623 ,Group Status Bit 623" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB622 ,Group Status Bit 622" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB621 ,Group Status Bit 621" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB620 ,Group Status Bit 620" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB619 ,Group Status Bit 619" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB618 ,Group Status Bit 618" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB617 ,Group Status Bit 617" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB616 ,Group Status Bit 616" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB615 ,Group Status Bit 615" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB614 ,Group Status Bit 614" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB613 ,Group Status Bit 613" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB612 ,Group Status Bit 612" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB611 ,Group Status Bit 611" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB610 ,Group Status Bit 610" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB609 ,Group Status Bit 609" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB608 ,Group Status Bit 608" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x00CC++0x03
|
|
line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x14)&&(PER.ADDRESS.isSECUREEX(ad:0x7d001000+0x00D0))
|
|
group.long 0x00D0++0x03
|
|
line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB671 ,Group Status Bit 671" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB670 ,Group Status Bit 670" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB669 ,Group Status Bit 669" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB668 ,Group Status Bit 668" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB667 ,Group Status Bit 667" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB666 ,Group Status Bit 666" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB665 ,Group Status Bit 665" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB664 ,Group Status Bit 664" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB663 ,Group Status Bit 663" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB662 ,Group Status Bit 662" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB661 ,Group Status Bit 661" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB660 ,Group Status Bit 660" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB659 ,Group Status Bit 659" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB658 ,Group Status Bit 658" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB657 ,Group Status Bit 657" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB656 ,Group Status Bit 656" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB655 ,Group Status Bit 655" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB654 ,Group Status Bit 654" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB653 ,Group Status Bit 653" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB652 ,Group Status Bit 652" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB651 ,Group Status Bit 651" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB650 ,Group Status Bit 650" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB649 ,Group Status Bit 649" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB648 ,Group Status Bit 648" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB647 ,Group Status Bit 647" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB646 ,Group Status Bit 646" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB645 ,Group Status Bit 645" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB644 ,Group Status Bit 644" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB643 ,Group Status Bit 643" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB642 ,Group Status Bit 642" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB641 ,Group Status Bit 641" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB640 ,Group Status Bit 640" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x14)
|
|
group.long 0x00D0++0x03
|
|
line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB671 ,Group Status Bit 671" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB670 ,Group Status Bit 670" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB669 ,Group Status Bit 669" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB668 ,Group Status Bit 668" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB667 ,Group Status Bit 667" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB666 ,Group Status Bit 666" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB665 ,Group Status Bit 665" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB664 ,Group Status Bit 664" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB663 ,Group Status Bit 663" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB662 ,Group Status Bit 662" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB661 ,Group Status Bit 661" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB660 ,Group Status Bit 660" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB659 ,Group Status Bit 659" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB658 ,Group Status Bit 658" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB657 ,Group Status Bit 657" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB656 ,Group Status Bit 656" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB655 ,Group Status Bit 655" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB654 ,Group Status Bit 654" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB653 ,Group Status Bit 653" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB652 ,Group Status Bit 652" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB651 ,Group Status Bit 651" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB650 ,Group Status Bit 650" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB649 ,Group Status Bit 649" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB648 ,Group Status Bit 648" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB647 ,Group Status Bit 647" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB646 ,Group Status Bit 646" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB645 ,Group Status Bit 645" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB644 ,Group Status Bit 644" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB643 ,Group Status Bit 643" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB642 ,Group Status Bit 642" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB641 ,Group Status Bit 641" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB640 ,Group Status Bit 640" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x00D0++0x03
|
|
line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x15)&&(PER.ADDRESS.isSECUREEX(ad:0x7d001000+0x00D4))
|
|
group.long 0x00D4++0x03
|
|
line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB703 ,Group Status Bit 703" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB702 ,Group Status Bit 702" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB701 ,Group Status Bit 701" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB700 ,Group Status Bit 700" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB699 ,Group Status Bit 699" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB698 ,Group Status Bit 698" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB697 ,Group Status Bit 697" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB696 ,Group Status Bit 696" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB695 ,Group Status Bit 695" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB694 ,Group Status Bit 694" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB693 ,Group Status Bit 693" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB692 ,Group Status Bit 692" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB691 ,Group Status Bit 691" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB690 ,Group Status Bit 690" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB689 ,Group Status Bit 689" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB688 ,Group Status Bit 688" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB687 ,Group Status Bit 687" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB686 ,Group Status Bit 686" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB685 ,Group Status Bit 685" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB684 ,Group Status Bit 684" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB683 ,Group Status Bit 683" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB682 ,Group Status Bit 682" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB681 ,Group Status Bit 681" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB680 ,Group Status Bit 680" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB679 ,Group Status Bit 679" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB678 ,Group Status Bit 678" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB677 ,Group Status Bit 677" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB676 ,Group Status Bit 676" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB675 ,Group Status Bit 675" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB674 ,Group Status Bit 674" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB673 ,Group Status Bit 673" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB672 ,Group Status Bit 672" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x15)
|
|
group.long 0x00D4++0x03
|
|
line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB703 ,Group Status Bit 703" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB702 ,Group Status Bit 702" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB701 ,Group Status Bit 701" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB700 ,Group Status Bit 700" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB699 ,Group Status Bit 699" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB698 ,Group Status Bit 698" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB697 ,Group Status Bit 697" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB696 ,Group Status Bit 696" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB695 ,Group Status Bit 695" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB694 ,Group Status Bit 694" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB693 ,Group Status Bit 693" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB692 ,Group Status Bit 692" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB691 ,Group Status Bit 691" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB690 ,Group Status Bit 690" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB689 ,Group Status Bit 689" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB688 ,Group Status Bit 688" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB687 ,Group Status Bit 687" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB686 ,Group Status Bit 686" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB685 ,Group Status Bit 685" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB684 ,Group Status Bit 684" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB683 ,Group Status Bit 683" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB682 ,Group Status Bit 682" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB681 ,Group Status Bit 681" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB680 ,Group Status Bit 680" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB679 ,Group Status Bit 679" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB678 ,Group Status Bit 678" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB677 ,Group Status Bit 677" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB676 ,Group Status Bit 676" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB675 ,Group Status Bit 675" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB674 ,Group Status Bit 674" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB673 ,Group Status Bit 673" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB672 ,Group Status Bit 672" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x00D4++0x03
|
|
line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x16)&&(PER.ADDRESS.isSECUREEX(ad:0x7d001000+0x00D8))
|
|
group.long 0x00D8++0x03
|
|
line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB735 ,Group Status Bit 735" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB734 ,Group Status Bit 734" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB733 ,Group Status Bit 733" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB732 ,Group Status Bit 732" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB731 ,Group Status Bit 731" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB730 ,Group Status Bit 730" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB729 ,Group Status Bit 729" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB728 ,Group Status Bit 728" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB727 ,Group Status Bit 727" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB726 ,Group Status Bit 726" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB725 ,Group Status Bit 725" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB724 ,Group Status Bit 724" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB723 ,Group Status Bit 723" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB722 ,Group Status Bit 722" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB721 ,Group Status Bit 721" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB720 ,Group Status Bit 720" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB719 ,Group Status Bit 719" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB718 ,Group Status Bit 718" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB717 ,Group Status Bit 717" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB716 ,Group Status Bit 716" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB715 ,Group Status Bit 715" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB714 ,Group Status Bit 714" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB713 ,Group Status Bit 713" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB712 ,Group Status Bit 712" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB711 ,Group Status Bit 711" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB710 ,Group Status Bit 710" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB709 ,Group Status Bit 709" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB708 ,Group Status Bit 708" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB707 ,Group Status Bit 707" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB706 ,Group Status Bit 706" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB705 ,Group Status Bit 705" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB704 ,Group Status Bit 704" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x16)
|
|
group.long 0x00D8++0x03
|
|
line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB735 ,Group Status Bit 735" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB734 ,Group Status Bit 734" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB733 ,Group Status Bit 733" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB732 ,Group Status Bit 732" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB731 ,Group Status Bit 731" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB730 ,Group Status Bit 730" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB729 ,Group Status Bit 729" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB728 ,Group Status Bit 728" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB727 ,Group Status Bit 727" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB726 ,Group Status Bit 726" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB725 ,Group Status Bit 725" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB724 ,Group Status Bit 724" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB723 ,Group Status Bit 723" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB722 ,Group Status Bit 722" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB721 ,Group Status Bit 721" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB720 ,Group Status Bit 720" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB719 ,Group Status Bit 719" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB718 ,Group Status Bit 718" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB717 ,Group Status Bit 717" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB716 ,Group Status Bit 716" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB715 ,Group Status Bit 715" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB714 ,Group Status Bit 714" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB713 ,Group Status Bit 713" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB712 ,Group Status Bit 712" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB711 ,Group Status Bit 711" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB710 ,Group Status Bit 710" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB709 ,Group Status Bit 709" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB708 ,Group Status Bit 708" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB707 ,Group Status Bit 707" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB706 ,Group Status Bit 706" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB705 ,Group Status Bit 705" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB704 ,Group Status Bit 704" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x00D8++0x03
|
|
line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x17)&&(PER.ADDRESS.isSECUREEX(ad:0x7d001000+0x00DC))
|
|
group.long 0x00DC++0x03
|
|
line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB767 ,Group Status Bit 767" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB766 ,Group Status Bit 766" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB765 ,Group Status Bit 765" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB764 ,Group Status Bit 764" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB763 ,Group Status Bit 763" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB762 ,Group Status Bit 762" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB761 ,Group Status Bit 761" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB760 ,Group Status Bit 760" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB759 ,Group Status Bit 759" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB758 ,Group Status Bit 758" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB757 ,Group Status Bit 757" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB756 ,Group Status Bit 756" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB755 ,Group Status Bit 755" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB754 ,Group Status Bit 754" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB753 ,Group Status Bit 753" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB752 ,Group Status Bit 752" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB751 ,Group Status Bit 751" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB750 ,Group Status Bit 750" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB749 ,Group Status Bit 749" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB748 ,Group Status Bit 748" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB747 ,Group Status Bit 747" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB746 ,Group Status Bit 746" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB745 ,Group Status Bit 745" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB744 ,Group Status Bit 744" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB743 ,Group Status Bit 743" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB742 ,Group Status Bit 742" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB741 ,Group Status Bit 741" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB740 ,Group Status Bit 740" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB739 ,Group Status Bit 739" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB738 ,Group Status Bit 738" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB737 ,Group Status Bit 737" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB736 ,Group Status Bit 736" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x17)
|
|
group.long 0x00DC++0x03
|
|
line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB767 ,Group Status Bit 767" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB766 ,Group Status Bit 766" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB765 ,Group Status Bit 765" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB764 ,Group Status Bit 764" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB763 ,Group Status Bit 763" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB762 ,Group Status Bit 762" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB761 ,Group Status Bit 761" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB760 ,Group Status Bit 760" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB759 ,Group Status Bit 759" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB758 ,Group Status Bit 758" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB757 ,Group Status Bit 757" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB756 ,Group Status Bit 756" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB755 ,Group Status Bit 755" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB754 ,Group Status Bit 754" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB753 ,Group Status Bit 753" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB752 ,Group Status Bit 752" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB751 ,Group Status Bit 751" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB750 ,Group Status Bit 750" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB749 ,Group Status Bit 749" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB748 ,Group Status Bit 748" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB747 ,Group Status Bit 747" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB746 ,Group Status Bit 746" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB745 ,Group Status Bit 745" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB744 ,Group Status Bit 744" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB743 ,Group Status Bit 743" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB742 ,Group Status Bit 742" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB741 ,Group Status Bit 741" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB740 ,Group Status Bit 740" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB739 ,Group Status Bit 739" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB738 ,Group Status Bit 738" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB737 ,Group Status Bit 737" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB736 ,Group Status Bit 736" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x00DC++0x03
|
|
line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x18)&&(PER.ADDRESS.isSECUREEX(ad:0x7d001000+0x00E0))
|
|
group.long 0x00E0++0x03
|
|
line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB799 ,Group Status Bit 799" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB798 ,Group Status Bit 798" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB797 ,Group Status Bit 797" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB796 ,Group Status Bit 796" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB795 ,Group Status Bit 795" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB794 ,Group Status Bit 794" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB793 ,Group Status Bit 793" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB792 ,Group Status Bit 792" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB791 ,Group Status Bit 791" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB790 ,Group Status Bit 790" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB789 ,Group Status Bit 789" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB788 ,Group Status Bit 788" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB787 ,Group Status Bit 787" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB786 ,Group Status Bit 786" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB785 ,Group Status Bit 785" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB784 ,Group Status Bit 784" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB783 ,Group Status Bit 783" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB782 ,Group Status Bit 782" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB781 ,Group Status Bit 781" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB780 ,Group Status Bit 780" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB779 ,Group Status Bit 779" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB778 ,Group Status Bit 778" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB777 ,Group Status Bit 777" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB776 ,Group Status Bit 776" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB775 ,Group Status Bit 775" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB774 ,Group Status Bit 774" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB773 ,Group Status Bit 773" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB772 ,Group Status Bit 772" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB771 ,Group Status Bit 771" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB770 ,Group Status Bit 770" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB769 ,Group Status Bit 769" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB768 ,Group Status Bit 768" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x18)
|
|
group.long 0x00E0++0x03
|
|
line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB799 ,Group Status Bit 799" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB798 ,Group Status Bit 798" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB797 ,Group Status Bit 797" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB796 ,Group Status Bit 796" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB795 ,Group Status Bit 795" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB794 ,Group Status Bit 794" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB793 ,Group Status Bit 793" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB792 ,Group Status Bit 792" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB791 ,Group Status Bit 791" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB790 ,Group Status Bit 790" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB789 ,Group Status Bit 789" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB788 ,Group Status Bit 788" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB787 ,Group Status Bit 787" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB786 ,Group Status Bit 786" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB785 ,Group Status Bit 785" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB784 ,Group Status Bit 784" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB783 ,Group Status Bit 783" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB782 ,Group Status Bit 782" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB781 ,Group Status Bit 781" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB780 ,Group Status Bit 780" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB779 ,Group Status Bit 779" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB778 ,Group Status Bit 778" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB777 ,Group Status Bit 777" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB776 ,Group Status Bit 776" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB775 ,Group Status Bit 775" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB774 ,Group Status Bit 774" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB773 ,Group Status Bit 773" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB772 ,Group Status Bit 772" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB771 ,Group Status Bit 771" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB770 ,Group Status Bit 770" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB769 ,Group Status Bit 769" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB768 ,Group Status Bit 768" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x0E0++0x03
|
|
line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x19)&&(PER.ADDRESS.isSECUREEX(ad:0x7d001000+0x00E4))
|
|
group.long 0x00E4++0x03
|
|
line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB831 ,Group Status Bit 831" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB830 ,Group Status Bit 830" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB829 ,Group Status Bit 829" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB828 ,Group Status Bit 828" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB827 ,Group Status Bit 827" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB826 ,Group Status Bit 826" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB825 ,Group Status Bit 825" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB824 ,Group Status Bit 824" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB823 ,Group Status Bit 823" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB822 ,Group Status Bit 822" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB821 ,Group Status Bit 821" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB820 ,Group Status Bit 820" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB819 ,Group Status Bit 819" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB818 ,Group Status Bit 818" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB817 ,Group Status Bit 817" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB816 ,Group Status Bit 816" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB815 ,Group Status Bit 815" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB814 ,Group Status Bit 814" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB813 ,Group Status Bit 813" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB812 ,Group Status Bit 812" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB811 ,Group Status Bit 811" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB810 ,Group Status Bit 810" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB809 ,Group Status Bit 809" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB808 ,Group Status Bit 808" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB807 ,Group Status Bit 807" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB806 ,Group Status Bit 806" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB805 ,Group Status Bit 805" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB804 ,Group Status Bit 804" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB803 ,Group Status Bit 803" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB802 ,Group Status Bit 802" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB801 ,Group Status Bit 801" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB800 ,Group Status Bit 800" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x19)
|
|
group.long 0x00E4++0x03
|
|
line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB831 ,Group Status Bit 831" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB830 ,Group Status Bit 830" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB829 ,Group Status Bit 829" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB828 ,Group Status Bit 828" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB827 ,Group Status Bit 827" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB826 ,Group Status Bit 826" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB825 ,Group Status Bit 825" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB824 ,Group Status Bit 824" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB823 ,Group Status Bit 823" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB822 ,Group Status Bit 822" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB821 ,Group Status Bit 821" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB820 ,Group Status Bit 820" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB819 ,Group Status Bit 819" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB818 ,Group Status Bit 818" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB817 ,Group Status Bit 817" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB816 ,Group Status Bit 816" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB815 ,Group Status Bit 815" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB814 ,Group Status Bit 814" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB813 ,Group Status Bit 813" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB812 ,Group Status Bit 812" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB811 ,Group Status Bit 811" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB810 ,Group Status Bit 810" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB809 ,Group Status Bit 809" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB808 ,Group Status Bit 808" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB807 ,Group Status Bit 807" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB806 ,Group Status Bit 806" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB805 ,Group Status Bit 805" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB804 ,Group Status Bit 804" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB803 ,Group Status Bit 803" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB802 ,Group Status Bit 802" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB801 ,Group Status Bit 801" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB800 ,Group Status Bit 800" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x00E4++0x03
|
|
line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1A)&&(PER.ADDRESS.isSECUREEX(ad:0x7d001000+0x00E8))
|
|
group.long 0x00E8++0x03
|
|
line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB863 ,Group Status Bit 863" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB862 ,Group Status Bit 862" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB861 ,Group Status Bit 861" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB860 ,Group Status Bit 860" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB859 ,Group Status Bit 859" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB858 ,Group Status Bit 858" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB857 ,Group Status Bit 857" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB856 ,Group Status Bit 856" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB855 ,Group Status Bit 855" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB854 ,Group Status Bit 854" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB853 ,Group Status Bit 853" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB852 ,Group Status Bit 852" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB851 ,Group Status Bit 851" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB850 ,Group Status Bit 850" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB849 ,Group Status Bit 849" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB848 ,Group Status Bit 848" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB847 ,Group Status Bit 847" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB846 ,Group Status Bit 846" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB845 ,Group Status Bit 845" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB844 ,Group Status Bit 844" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB843 ,Group Status Bit 843" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB842 ,Group Status Bit 842" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB841 ,Group Status Bit 841" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB840 ,Group Status Bit 840" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB839 ,Group Status Bit 839" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB838 ,Group Status Bit 838" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB837 ,Group Status Bit 837" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB836 ,Group Status Bit 836" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB835 ,Group Status Bit 835" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB834 ,Group Status Bit 834" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB833 ,Group Status Bit 833" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB832 ,Group Status Bit 832" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1A)
|
|
group.long 0x00E8++0x03
|
|
line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB863 ,Group Status Bit 863" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB862 ,Group Status Bit 862" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB861 ,Group Status Bit 861" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB860 ,Group Status Bit 860" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB859 ,Group Status Bit 859" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB858 ,Group Status Bit 858" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB857 ,Group Status Bit 857" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB856 ,Group Status Bit 856" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB855 ,Group Status Bit 855" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB854 ,Group Status Bit 854" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB853 ,Group Status Bit 853" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB852 ,Group Status Bit 852" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB851 ,Group Status Bit 851" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB850 ,Group Status Bit 850" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB849 ,Group Status Bit 849" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB848 ,Group Status Bit 848" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB847 ,Group Status Bit 847" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB846 ,Group Status Bit 846" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB845 ,Group Status Bit 845" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB844 ,Group Status Bit 844" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB843 ,Group Status Bit 843" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB842 ,Group Status Bit 842" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB841 ,Group Status Bit 841" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB840 ,Group Status Bit 840" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB839 ,Group Status Bit 839" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB838 ,Group Status Bit 838" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB837 ,Group Status Bit 837" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB836 ,Group Status Bit 836" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB835 ,Group Status Bit 835" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB834 ,Group Status Bit 834" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB833 ,Group Status Bit 833" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB832 ,Group Status Bit 832" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x00E8++0x03
|
|
line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1B)&&(PER.ADDRESS.isSECUREEX(ad:0x7d001000+0x00EC))
|
|
group.long 0x00EC++0x03
|
|
line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB895 ,Group Status Bit 895" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB894 ,Group Status Bit 894" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB893 ,Group Status Bit 893" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB892 ,Group Status Bit 892" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB891 ,Group Status Bit 891" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB890 ,Group Status Bit 890" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB889 ,Group Status Bit 889" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB888 ,Group Status Bit 888" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB887 ,Group Status Bit 887" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB886 ,Group Status Bit 886" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB885 ,Group Status Bit 885" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB884 ,Group Status Bit 884" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB883 ,Group Status Bit 883" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB882 ,Group Status Bit 882" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB881 ,Group Status Bit 881" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB880 ,Group Status Bit 880" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB879 ,Group Status Bit 879" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB878 ,Group Status Bit 878" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB877 ,Group Status Bit 877" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB876 ,Group Status Bit 876" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB875 ,Group Status Bit 875" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB874 ,Group Status Bit 874" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB873 ,Group Status Bit 873" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB872 ,Group Status Bit 872" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB871 ,Group Status Bit 871" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB870 ,Group Status Bit 870" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB869 ,Group Status Bit 869" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB868 ,Group Status Bit 868" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB867 ,Group Status Bit 867" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB866 ,Group Status Bit 866" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB865 ,Group Status Bit 865" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB864 ,Group Status Bit 864" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1B)
|
|
group.long 0x00EC++0x03
|
|
line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27 (Non-Secure access)"
|
|
bitfld.long 0x00 31. " GSB895 ,Group Status Bit 895" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB894 ,Group Status Bit 894" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB893 ,Group Status Bit 893" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB892 ,Group Status Bit 892" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB891 ,Group Status Bit 891" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB890 ,Group Status Bit 890" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB889 ,Group Status Bit 889" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB888 ,Group Status Bit 888" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB887 ,Group Status Bit 887" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB886 ,Group Status Bit 886" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB885 ,Group Status Bit 885" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB884 ,Group Status Bit 884" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB883 ,Group Status Bit 883" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB882 ,Group Status Bit 882" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB881 ,Group Status Bit 881" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB880 ,Group Status Bit 880" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB879 ,Group Status Bit 879" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB878 ,Group Status Bit 878" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB877 ,Group Status Bit 877" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB876 ,Group Status Bit 876" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB875 ,Group Status Bit 875" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB874 ,Group Status Bit 874" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB873 ,Group Status Bit 873" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB872 ,Group Status Bit 872" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB871 ,Group Status Bit 871" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB870 ,Group Status Bit 870" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB869 ,Group Status Bit 869" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB868 ,Group Status Bit 868" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB867 ,Group Status Bit 867" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB866 ,Group Status Bit 866" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB865 ,Group Status Bit 865" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB864 ,Group Status Bit 864" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x00EC++0x03
|
|
line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1C)&&(PER.ADDRESS.isSECUREEX(ad:0x7d001000+0x00F0))
|
|
group.long 0x00F0++0x03
|
|
line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB927 ,Group Status Bit 927" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB926 ,Group Status Bit 926" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB925 ,Group Status Bit 925" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB924 ,Group Status Bit 924" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB923 ,Group Status Bit 923" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB922 ,Group Status Bit 922" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB921 ,Group Status Bit 921" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB920 ,Group Status Bit 920" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB919 ,Group Status Bit 919" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB918 ,Group Status Bit 918" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB917 ,Group Status Bit 917" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB916 ,Group Status Bit 916" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB915 ,Group Status Bit 915" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB914 ,Group Status Bit 914" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB913 ,Group Status Bit 913" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB912 ,Group Status Bit 912" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB911 ,Group Status Bit 911" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB910 ,Group Status Bit 910" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB909 ,Group Status Bit 909" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB908 ,Group Status Bit 908" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB907 ,Group Status Bit 907" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB906 ,Group Status Bit 906" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB905 ,Group Status Bit 905" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB904 ,Group Status Bit 904" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB903 ,Group Status Bit 903" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB902 ,Group Status Bit 902" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB901 ,Group Status Bit 901" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB900 ,Group Status Bit 900" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB899 ,Group Status Bit 899" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB898 ,Group Status Bit 898" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB897 ,Group Status Bit 897" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB896 ,Group Status Bit 896" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1C)
|
|
group.long 0x00F0++0x03
|
|
line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB927 ,Group Status Bit 927" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB926 ,Group Status Bit 926" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB925 ,Group Status Bit 925" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB924 ,Group Status Bit 924" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB923 ,Group Status Bit 923" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB922 ,Group Status Bit 922" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB921 ,Group Status Bit 921" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB920 ,Group Status Bit 920" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB919 ,Group Status Bit 919" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB918 ,Group Status Bit 918" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB917 ,Group Status Bit 917" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB916 ,Group Status Bit 916" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB915 ,Group Status Bit 915" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB914 ,Group Status Bit 914" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB913 ,Group Status Bit 913" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB912 ,Group Status Bit 912" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB911 ,Group Status Bit 911" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB910 ,Group Status Bit 910" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB909 ,Group Status Bit 909" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB908 ,Group Status Bit 908" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB907 ,Group Status Bit 907" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB906 ,Group Status Bit 906" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB905 ,Group Status Bit 905" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB904 ,Group Status Bit 904" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB903 ,Group Status Bit 903" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB902 ,Group Status Bit 902" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB901 ,Group Status Bit 901" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB900 ,Group Status Bit 900" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB899 ,Group Status Bit 899" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB898 ,Group Status Bit 898" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB897 ,Group Status Bit 897" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB896 ,Group Status Bit 896" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x0F0++0x03
|
|
line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1D)&&(PER.ADDRESS.isSECUREEX(ad:0x7d001000+0x00F4))
|
|
group.long 0x00F4++0x03
|
|
line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB959 ,Group Status Bit 959" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB958 ,Group Status Bit 958" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB957 ,Group Status Bit 957" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB956 ,Group Status Bit 956" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB955 ,Group Status Bit 955" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB954 ,Group Status Bit 954" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB953 ,Group Status Bit 953" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB952 ,Group Status Bit 952" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB951 ,Group Status Bit 951" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB950 ,Group Status Bit 950" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB949 ,Group Status Bit 949" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB948 ,Group Status Bit 948" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB947 ,Group Status Bit 947" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB946 ,Group Status Bit 946" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB945 ,Group Status Bit 945" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB944 ,Group Status Bit 944" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB943 ,Group Status Bit 943" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB942 ,Group Status Bit 942" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB941 ,Group Status Bit 941" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB940 ,Group Status Bit 940" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB939 ,Group Status Bit 939" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB938 ,Group Status Bit 938" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB937 ,Group Status Bit 937" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB936 ,Group Status Bit 936" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB935 ,Group Status Bit 935" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB934 ,Group Status Bit 934" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB933 ,Group Status Bit 933" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB932 ,Group Status Bit 932" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB931 ,Group Status Bit 931" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB930 ,Group Status Bit 930" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB929 ,Group Status Bit 929" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB928 ,Group Status Bit 928" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1D)
|
|
group.long 0x00F4++0x03
|
|
line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB959 ,Group Status Bit 959" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB958 ,Group Status Bit 958" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB957 ,Group Status Bit 957" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB956 ,Group Status Bit 956" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB955 ,Group Status Bit 955" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB954 ,Group Status Bit 954" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB953 ,Group Status Bit 953" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB952 ,Group Status Bit 952" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB951 ,Group Status Bit 951" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB950 ,Group Status Bit 950" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB949 ,Group Status Bit 949" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB948 ,Group Status Bit 948" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB947 ,Group Status Bit 947" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB946 ,Group Status Bit 946" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB945 ,Group Status Bit 945" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB944 ,Group Status Bit 944" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB943 ,Group Status Bit 943" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB942 ,Group Status Bit 942" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB941 ,Group Status Bit 941" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB940 ,Group Status Bit 940" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB939 ,Group Status Bit 939" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB938 ,Group Status Bit 938" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB937 ,Group Status Bit 937" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB936 ,Group Status Bit 936" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB935 ,Group Status Bit 935" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB934 ,Group Status Bit 934" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB933 ,Group Status Bit 933" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB932 ,Group Status Bit 932" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB931 ,Group Status Bit 931" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB930 ,Group Status Bit 930" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB929 ,Group Status Bit 929" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB928 ,Group Status Bit 928" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x00F4++0x03
|
|
line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1E)&&(PER.ADDRESS.isSECUREEX(ad:0x7d001000+0x00F8))
|
|
group.long 0x00F8++0x03
|
|
line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30 (Secure access)"
|
|
bitfld.long 0x00 31. " GSB991 ,Group Status Bit 991" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 30. " GSB990 ,Group Status Bit 990" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 29. " GSB989 ,Group Status Bit 989" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB988 ,Group Status Bit 988" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 27. " GSB987 ,Group Status Bit 987" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB986 ,Group Status Bit 986" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB985 ,Group Status Bit 985" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB984 ,Group Status Bit 984" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB983 ,Group Status Bit 983" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB982 ,Group Status Bit 982" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB981 ,Group Status Bit 981" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB980 ,Group Status Bit 980" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB979 ,Group Status Bit 979" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB978 ,Group Status Bit 978" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB977 ,Group Status Bit 977" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB976 ,Group Status Bit 976" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB975 ,Group Status Bit 975" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB974 ,Group Status Bit 974" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB973 ,Group Status Bit 973" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB972 ,Group Status Bit 972" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB971 ,Group Status Bit 971" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB970 ,Group Status Bit 970" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB969 ,Group Status Bit 969" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB968 ,Group Status Bit 968" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB967 ,Group Status Bit 967" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB966 ,Group Status Bit 966" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB965 ,Group Status Bit 965" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB964 ,Group Status Bit 964" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB963 ,Group Status Bit 963" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB962 ,Group Status Bit 962" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB961 ,Group Status Bit 961" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB960 ,Group Status Bit 960" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1E)
|
|
group.long 0x00F8++0x03
|
|
line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30 (Non-secure access)"
|
|
bitfld.long 0x00 31. " GSB991 ,Group Status Bit 991" "Group 0,Group 1"
|
|
bitfld.long 0x00 30. " GSB990 ,Group Status Bit 990" "Group 0,Group 1"
|
|
bitfld.long 0x00 29. " GSB989 ,Group Status Bit 989" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " GSB988 ,Group Status Bit 988" "Group 0,Group 1"
|
|
bitfld.long 0x00 27. " GSB987 ,Group Status Bit 987" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB986 ,Group Status Bit 986" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB985 ,Group Status Bit 985" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB984 ,Group Status Bit 984" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB983 ,Group Status Bit 983" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB982 ,Group Status Bit 982" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB981 ,Group Status Bit 981" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB980 ,Group Status Bit 980" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB979 ,Group Status Bit 979" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB978 ,Group Status Bit 978" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB977 ,Group Status Bit 977" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB976 ,Group Status Bit 976" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB975 ,Group Status Bit 975" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB974 ,Group Status Bit 974" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB973 ,Group Status Bit 973" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB972 ,Group Status Bit 972" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB971 ,Group Status Bit 971" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB970 ,Group Status Bit 970" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB969 ,Group Status Bit 969" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB968 ,Group Status Bit 968" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB967 ,Group Status Bit 967" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB966 ,Group Status Bit 966" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB965 ,Group Status Bit 965" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB964 ,Group Status Bit 964" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB963 ,Group Status Bit 963" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB962 ,Group Status Bit 962" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB961 ,Group Status Bit 961" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB960 ,Group Status Bit 960" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x00F8++0x03
|
|
line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)==0x1F)&&(PER.ADDRESS.isSECUREEX(ad:0x7d001000+0x00FC))
|
|
group.long 0x00FC++0x03
|
|
line.long 0x0 "GICD_IGROUPR31,Interrupt Group Register 31 (Secure access)"
|
|
bitfld.long 0x00 27. " GSB1019 ,Group Status Bit 1019" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 26. " GSB1018 ,Group Status Bit 1018" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB1017 ,Group Status Bit 1017" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 24. " GSB1016 ,Group Status Bit 1016" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 23. " GSB1015 ,Group Status Bit 1015" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB1014 ,Group Status Bit 1014" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 21. " GSB1013 ,Group Status Bit 1013" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 20. " GSB1012 ,Group Status Bit 1012" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB1011 ,Group Status Bit 1011" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 18. " GSB1010 ,Group Status Bit 1010" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 17. " GSB1009 ,Group Status Bit 1009" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB1008 ,Group Status Bit 1008" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 15. " GSB1007 ,Group Status Bit 1007" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 14. " GSB1006 ,Group Status Bit 1006" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB1005 ,Group Status Bit 1005" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 12. " GSB1004 ,Group Status Bit 1004" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 11. " GSB1003 ,Group Status Bit 1003" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB1002 ,Group Status Bit 1002" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 9. " GSB1001 ,Group Status Bit 1001" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 8. " GSB1000 ,Group Status Bit 1000" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB999 ,Group Status Bit 999" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 6. " GSB998 ,Group Status Bit 998" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 5. " GSB997 ,Group Status Bit 997" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB996 ,Group Status Bit 996" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 3. " GSB995 ,Group Status Bit 995" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 2. " GSB994 ,Group Status Bit 994" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB993 ,Group Status Bit 993" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
bitfld.long 0x00 0. " GSB992 ,Group Status Bit 992" "Group 0 (Secure),Group 1 (Non-secure)"
|
|
elif (((per.l(ad:0x7d001000+0x04))&0x0000001F)==0x1F)
|
|
group.long 0x00FC++0x03
|
|
line.long 0x0 "GICD_IGROUPR31,Interrupt Group Register 31 (Non-secure access)"
|
|
bitfld.long 0x00 27. " GSB1019 ,Group Status Bit 1019" "Group 0,Group 1"
|
|
bitfld.long 0x00 26. " GSB1018 ,Group Status Bit 1018" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " GSB1017 ,Group Status Bit 1017" "Group 0,Group 1"
|
|
bitfld.long 0x00 24. " GSB1016 ,Group Status Bit 1016" "Group 0,Group 1"
|
|
bitfld.long 0x00 23. " GSB1015 ,Group Status Bit 1015" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GSB1014 ,Group Status Bit 1014" "Group 0,Group 1"
|
|
bitfld.long 0x00 21. " GSB1013 ,Group Status Bit 1013" "Group 0,Group 1"
|
|
bitfld.long 0x00 20. " GSB1012 ,Group Status Bit 1012" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " GSB1011 ,Group Status Bit 1011" "Group 0,Group 1"
|
|
bitfld.long 0x00 18. " GSB1010 ,Group Status Bit 1010" "Group 0,Group 1"
|
|
bitfld.long 0x00 17. " GSB1009 ,Group Status Bit 1009" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 16. " GSB1008 ,Group Status Bit 1008" "Group 0,Group 1"
|
|
bitfld.long 0x00 15. " GSB1007 ,Group Status Bit 1007" "Group 0,Group 1"
|
|
bitfld.long 0x00 14. " GSB1006 ,Group Status Bit 1006" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 13. " GSB1005 ,Group Status Bit 1005" "Group 0,Group 1"
|
|
bitfld.long 0x00 12. " GSB1004 ,Group Status Bit 1004" "Group 0,Group 1"
|
|
bitfld.long 0x00 11. " GSB1003 ,Group Status Bit 1003" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 10. " GSB1002 ,Group Status Bit 1002" "Group 0,Group 1"
|
|
bitfld.long 0x00 9. " GSB1001 ,Group Status Bit 1001" "Group 0,Group 1"
|
|
bitfld.long 0x00 8. " GSB1000 ,Group Status Bit 1000" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 7. " GSB999 ,Group Status Bit 999" "Group 0,Group 1"
|
|
bitfld.long 0x00 6. " GSB998 ,Group Status Bit 998" "Group 0,Group 1"
|
|
bitfld.long 0x00 5. " GSB997 ,Group Status Bit 997" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " GSB996 ,Group Status Bit 996" "Group 0,Group 1"
|
|
bitfld.long 0x00 3. " GSB995 ,Group Status Bit 995" "Group 0,Group 1"
|
|
bitfld.long 0x00 2. " GSB994 ,Group Status Bit 994" "Group 0,Group 1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " GSB993 ,Group Status Bit 993" "Group 0,Group 1"
|
|
bitfld.long 0x00 0. " GSB992 ,Group Status Bit 992" "Group 0,Group 1"
|
|
else
|
|
rgroup.long 0x00FC++0x03
|
|
line.long 0x0 "GICD_IGROUPR31,Interrupt Group Register 31"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
endif
|
|
width 24.
|
|
tree "Set/Clear Enable Registers"
|
|
group.long 0x0100++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER0,Interrupt Set/Clear Enable Register 0"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB31 ,Set/Clear Enable Bit 31" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB30 ,Set/Clear Enable Bit 30" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB29 ,Set/Clear Enable Bit 29" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB28 ,Set/Clear Enable Bit 28" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB27 ,Set/Clear Enable Bit 27" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB26 ,Set/Clear Enable Bit 26" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB25 ,Set/Clear Enable Bit 25" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB24 ,Set/Clear Enable Bit 24" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB23 ,Set/Clear Enable Bit 23" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB22 ,Set/Clear Enable Bit 22" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB21 ,Set/Clear Enable Bit 21" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB20 ,Set/Clear Enable Bit 20" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB19 ,Set/Clear Enable Bit 19" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB18 ,Set/Clear Enable Bit 18" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB17 ,Set/Clear Enable Bit 17" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB16 ,Set/Clear Enable Bit 16" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB15 ,Set/Clear Enable Bit 15" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB14 ,Set/Clear Enable Bit 14" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB13 ,Set/Clear Enable Bit 13" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB12 ,Set/Clear Enable Bit 12" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB11 ,Set/Clear Enable Bit 11" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB10 ,Set/Clear Enable Bit 10" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB9 ,Set/Clear Enable Bit 9" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB8 ,Set/Clear Enable Bit 8" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB7 ,Set/Clear Enable Bit 7" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB6 ,Set/Clear Enable Bit 6" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB5 ,Set/Clear Enable Bit 5" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB4 ,Set/Clear Enable Bit 4" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB3 ,Set/Clear Enable Bit 3" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB2 ,Set/Clear Enable Bit 2" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB1 ,Set/Clear Enable Bit 1" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB0 ,Set/Clear Enable Bit 0" "Disabled,Enabled"
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x01)
|
|
group.long 0x0104++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER1,Interrupt Set/Clear Enable Register 1"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB63 ,Set/Clear Enable Bit 63" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB62 ,Set/Clear Enable Bit 62" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB61 ,Set/Clear Enable Bit 61" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB60 ,Set/Clear Enable Bit 60" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB59 ,Set/Clear Enable Bit 59" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB58 ,Set/Clear Enable Bit 58" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB57 ,Set/Clear Enable Bit 57" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB56 ,Set/Clear Enable Bit 56" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB55 ,Set/Clear Enable Bit 55" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB54 ,Set/Clear Enable Bit 54" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB53 ,Set/Clear Enable Bit 53" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB52 ,Set/Clear Enable Bit 52" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB51 ,Set/Clear Enable Bit 51" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB50 ,Set/Clear Enable Bit 50" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB49 ,Set/Clear Enable Bit 49" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB48 ,Set/Clear Enable Bit 48" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB47 ,Set/Clear Enable Bit 47" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB46 ,Set/Clear Enable Bit 46" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB45 ,Set/Clear Enable Bit 45" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB44 ,Set/Clear Enable Bit 44" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB43 ,Set/Clear Enable Bit 43" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB42 ,Set/Clear Enable Bit 42" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB41 ,Set/Clear Enable Bit 41" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB40 ,Set/Clear Enable Bit 40" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB39 ,Set/Clear Enable Bit 39" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB38 ,Set/Clear Enable Bit 38" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB37 ,Set/Clear Enable Bit 37" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB36 ,Set/Clear Enable Bit 36" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB35 ,Set/Clear Enable Bit 35" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB34 ,Set/Clear Enable Bit 34" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB33 ,Set/Clear Enable Bit 33" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB32 ,Set/Clear Enable Bit 32" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x0104++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER1,Interrupt Set/Clear Enable Register 1"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x02)
|
|
group.long 0x0108++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER2,Interrupt Set/Clear Enable Register 2"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB95 ,Set/Clear Enable Bit 95" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB94 ,Set/Clear Enable Bit 94" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB93 ,Set/Clear Enable Bit 93" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB92 ,Set/Clear Enable Bit 92" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB91 ,Set/Clear Enable Bit 91" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB90 ,Set/Clear Enable Bit 90" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB89 ,Set/Clear Enable Bit 89" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB88 ,Set/Clear Enable Bit 88" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB87 ,Set/Clear Enable Bit 87" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB86 ,Set/Clear Enable Bit 86" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB85 ,Set/Clear Enable Bit 85" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB84 ,Set/Clear Enable Bit 84" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB83 ,Set/Clear Enable Bit 83" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB82 ,Set/Clear Enable Bit 82" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB81 ,Set/Clear Enable Bit 81" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB80 ,Set/Clear Enable Bit 80" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB79 ,Set/Clear Enable Bit 79" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB78 ,Set/Clear Enable Bit 78" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB77 ,Set/Clear Enable Bit 77" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB76 ,Set/Clear Enable Bit 76" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB75 ,Set/Clear Enable Bit 75" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB74 ,Set/Clear Enable Bit 74" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB73 ,Set/Clear Enable Bit 73" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB72 ,Set/Clear Enable Bit 72" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB71 ,Set/Clear Enable Bit 71" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB70 ,Set/Clear Enable Bit 70" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB69 ,Set/Clear Enable Bit 69" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB68 ,Set/Clear Enable Bit 68" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB67 ,Set/Clear Enable Bit 67" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB66 ,Set/Clear Enable Bit 66" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB65 ,Set/Clear Enable Bit 65" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB64 ,Set/Clear Enable Bit 64" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x0108++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER2,Interrupt Set/Clear Enable Register 2"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x03)
|
|
group.long 0x010C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER3,Interrupt Set/Clear Enable Register 3"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB127 ,Set/Clear Enable Bit 127" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB126 ,Set/Clear Enable Bit 126" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB125 ,Set/Clear Enable Bit 125" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB124 ,Set/Clear Enable Bit 124" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB123 ,Set/Clear Enable Bit 123" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB122 ,Set/Clear Enable Bit 122" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB121 ,Set/Clear Enable Bit 121" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB120 ,Set/Clear Enable Bit 120" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB119 ,Set/Clear Enable Bit 119" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB118 ,Set/Clear Enable Bit 118" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB117 ,Set/Clear Enable Bit 117" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB116 ,Set/Clear Enable Bit 116" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB115 ,Set/Clear Enable Bit 115" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB114 ,Set/Clear Enable Bit 114" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB113 ,Set/Clear Enable Bit 113" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB112 ,Set/Clear Enable Bit 112" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB111 ,Set/Clear Enable Bit 111" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB110 ,Set/Clear Enable Bit 110" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB109 ,Set/Clear Enable Bit 109" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB108 ,Set/Clear Enable Bit 108" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB107 ,Set/Clear Enable Bit 107" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB106 ,Set/Clear Enable Bit 106" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB105 ,Set/Clear Enable Bit 105" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB104 ,Set/Clear Enable Bit 104" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB103 ,Set/Clear Enable Bit 103" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB102 ,Set/Clear Enable Bit 102" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB101 ,Set/Clear Enable Bit 101" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB100 ,Set/Clear Enable Bit 100" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB99 ,Set/Clear Enable Bit 99" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB98 ,Set/Clear Enable Bit 98" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB97 ,Set/Clear Enable Bit 97" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB96 ,Set/Clear Enable Bit 96" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x010C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER3,Interrupt Set/Clear Enable Register 3"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x04)
|
|
group.long 0x0110++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER4,Interrupt Set/Clear Enable Register 4"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB159 ,Set/Clear Enable Bit 159" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB158 ,Set/Clear Enable Bit 158" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB157 ,Set/Clear Enable Bit 157" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB156 ,Set/Clear Enable Bit 156" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB155 ,Set/Clear Enable Bit 155" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB154 ,Set/Clear Enable Bit 154" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB153 ,Set/Clear Enable Bit 153" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB152 ,Set/Clear Enable Bit 152" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB151 ,Set/Clear Enable Bit 151" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB150 ,Set/Clear Enable Bit 150" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB149 ,Set/Clear Enable Bit 149" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB148 ,Set/Clear Enable Bit 148" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB147 ,Set/Clear Enable Bit 147" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB146 ,Set/Clear Enable Bit 146" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB145 ,Set/Clear Enable Bit 145" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB144 ,Set/Clear Enable Bit 144" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB143 ,Set/Clear Enable Bit 143" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB142 ,Set/Clear Enable Bit 142" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB141 ,Set/Clear Enable Bit 141" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB140 ,Set/Clear Enable Bit 140" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB139 ,Set/Clear Enable Bit 139" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB138 ,Set/Clear Enable Bit 138" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB137 ,Set/Clear Enable Bit 137" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB136 ,Set/Clear Enable Bit 136" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB135 ,Set/Clear Enable Bit 135" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB134 ,Set/Clear Enable Bit 134" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB133 ,Set/Clear Enable Bit 133" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB132 ,Set/Clear Enable Bit 132" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB131 ,Set/Clear Enable Bit 131" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB130 ,Set/Clear Enable Bit 130" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB129 ,Set/Clear Enable Bit 129" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB128 ,Set/Clear Enable Bit 128" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x0110++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER4,Interrupt Set/Clear Enable Register 4"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x05)
|
|
group.long 0x0114++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER5,Interrupt Set/Clear Enable Register 5"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB191 ,Set/Clear Enable Bit 191" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB190 ,Set/Clear Enable Bit 190" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB189 ,Set/Clear Enable Bit 189" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB188 ,Set/Clear Enable Bit 188" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB187 ,Set/Clear Enable Bit 187" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB186 ,Set/Clear Enable Bit 186" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB185 ,Set/Clear Enable Bit 185" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB184 ,Set/Clear Enable Bit 184" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB183 ,Set/Clear Enable Bit 183" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB182 ,Set/Clear Enable Bit 182" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB181 ,Set/Clear Enable Bit 181" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB180 ,Set/Clear Enable Bit 180" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB179 ,Set/Clear Enable Bit 179" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB178 ,Set/Clear Enable Bit 178" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB177 ,Set/Clear Enable Bit 177" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB176 ,Set/Clear Enable Bit 176" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB175 ,Set/Clear Enable Bit 175" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB174 ,Set/Clear Enable Bit 174" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB173 ,Set/Clear Enable Bit 173" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB172 ,Set/Clear Enable Bit 172" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB171 ,Set/Clear Enable Bit 171" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB170 ,Set/Clear Enable Bit 170" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB169 ,Set/Clear Enable Bit 169" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB168 ,Set/Clear Enable Bit 168" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB167 ,Set/Clear Enable Bit 167" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB166 ,Set/Clear Enable Bit 166" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB165 ,Set/Clear Enable Bit 165" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB164 ,Set/Clear Enable Bit 164" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB163 ,Set/Clear Enable Bit 163" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB162 ,Set/Clear Enable Bit 162" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB161 ,Set/Clear Enable Bit 161" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB160 ,Set/Clear Enable Bit 160" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x0114++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER5,Interrupt Set/Clear Enable Register 5"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x06)
|
|
group.long 0x0118++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER6,Interrupt Set/Clear Enable Register 6"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB223 ,Set/Clear Enable Bit 223" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB222 ,Set/Clear Enable Bit 222" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB221 ,Set/Clear Enable Bit 221" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB220 ,Set/Clear Enable Bit 220" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB219 ,Set/Clear Enable Bit 219" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB218 ,Set/Clear Enable Bit 218" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB217 ,Set/Clear Enable Bit 217" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB216 ,Set/Clear Enable Bit 216" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB215 ,Set/Clear Enable Bit 215" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB214 ,Set/Clear Enable Bit 214" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB213 ,Set/Clear Enable Bit 213" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB212 ,Set/Clear Enable Bit 212" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB211 ,Set/Clear Enable Bit 211" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB210 ,Set/Clear Enable Bit 210" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB209 ,Set/Clear Enable Bit 209" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB208 ,Set/Clear Enable Bit 208" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB207 ,Set/Clear Enable Bit 207" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB206 ,Set/Clear Enable Bit 206" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB205 ,Set/Clear Enable Bit 205" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB204 ,Set/Clear Enable Bit 204" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB203 ,Set/Clear Enable Bit 203" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB202 ,Set/Clear Enable Bit 202" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB201 ,Set/Clear Enable Bit 201" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB200 ,Set/Clear Enable Bit 200" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB199 ,Set/Clear Enable Bit 199" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB198 ,Set/Clear Enable Bit 198" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB197 ,Set/Clear Enable Bit 197" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB196 ,Set/Clear Enable Bit 196" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB195 ,Set/Clear Enable Bit 195" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB194 ,Set/Clear Enable Bit 194" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB193 ,Set/Clear Enable Bit 193" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB192 ,Set/Clear Enable Bit 192" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x0118++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER6,Interrupt Set/Clear Enable Register 6"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x07)
|
|
group.long 0x011C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER7,Interrupt Set/Clear Enable Register 7"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB255 ,Set/Clear Enable Bit 255" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB254 ,Set/Clear Enable Bit 254" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB253 ,Set/Clear Enable Bit 253" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB252 ,Set/Clear Enable Bit 252" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB251 ,Set/Clear Enable Bit 251" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB250 ,Set/Clear Enable Bit 250" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB249 ,Set/Clear Enable Bit 249" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB248 ,Set/Clear Enable Bit 248" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB247 ,Set/Clear Enable Bit 247" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB246 ,Set/Clear Enable Bit 246" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB245 ,Set/Clear Enable Bit 245" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB244 ,Set/Clear Enable Bit 244" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB243 ,Set/Clear Enable Bit 243" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB242 ,Set/Clear Enable Bit 242" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB241 ,Set/Clear Enable Bit 241" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB240 ,Set/Clear Enable Bit 240" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB239 ,Set/Clear Enable Bit 239" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB238 ,Set/Clear Enable Bit 238" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB237 ,Set/Clear Enable Bit 237" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB236 ,Set/Clear Enable Bit 236" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB235 ,Set/Clear Enable Bit 235" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB234 ,Set/Clear Enable Bit 234" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB233 ,Set/Clear Enable Bit 233" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB232 ,Set/Clear Enable Bit 232" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB231 ,Set/Clear Enable Bit 231" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB230 ,Set/Clear Enable Bit 230" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB229 ,Set/Clear Enable Bit 229" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB228 ,Set/Clear Enable Bit 228" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB227 ,Set/Clear Enable Bit 227" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB226 ,Set/Clear Enable Bit 226" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB225 ,Set/Clear Enable Bit 225" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB224 ,Set/Clear Enable Bit 224" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x011C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER7,Interrupt Set/Clear Enable Register 7"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x08)
|
|
group.long 0x0120++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER8,Interrupt Set/Clear Enable Register 8"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB287 ,Set/Clear Enable Bit 287" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB286 ,Set/Clear Enable Bit 286" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB285 ,Set/Clear Enable Bit 285" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB284 ,Set/Clear Enable Bit 284" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB283 ,Set/Clear Enable Bit 283" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB282 ,Set/Clear Enable Bit 282" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB281 ,Set/Clear Enable Bit 281" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB280 ,Set/Clear Enable Bit 280" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB279 ,Set/Clear Enable Bit 279" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB278 ,Set/Clear Enable Bit 278" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB277 ,Set/Clear Enable Bit 277" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB276 ,Set/Clear Enable Bit 276" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB275 ,Set/Clear Enable Bit 275" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB274 ,Set/Clear Enable Bit 274" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB273 ,Set/Clear Enable Bit 273" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB272 ,Set/Clear Enable Bit 272" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB271 ,Set/Clear Enable Bit 271" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB270 ,Set/Clear Enable Bit 270" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB269 ,Set/Clear Enable Bit 269" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB268 ,Set/Clear Enable Bit 268" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB267 ,Set/Clear Enable Bit 267" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB266 ,Set/Clear Enable Bit 266" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB265 ,Set/Clear Enable Bit 265" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB264 ,Set/Clear Enable Bit 264" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB263 ,Set/Clear Enable Bit 263" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB262 ,Set/Clear Enable Bit 262" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB261 ,Set/Clear Enable Bit 261" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB260 ,Set/Clear Enable Bit 260" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB259 ,Set/Clear Enable Bit 259" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB258 ,Set/Clear Enable Bit 258" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB257 ,Set/Clear Enable Bit 257" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB256 ,Set/Clear Enable Bit 256" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x0120++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER8,Interrupt Set/Clear Enable Register 8"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x09)
|
|
group.long 0x0124++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER9,Interrupt Set/Clear Enable Register 9"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB319 ,Set/Clear Enable Bit 319" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB318 ,Set/Clear Enable Bit 318" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB317 ,Set/Clear Enable Bit 317" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB316 ,Set/Clear Enable Bit 316" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB315 ,Set/Clear Enable Bit 315" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB314 ,Set/Clear Enable Bit 314" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB313 ,Set/Clear Enable Bit 313" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB312 ,Set/Clear Enable Bit 312" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB311 ,Set/Clear Enable Bit 311" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB310 ,Set/Clear Enable Bit 310" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB309 ,Set/Clear Enable Bit 309" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB308 ,Set/Clear Enable Bit 308" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB307 ,Set/Clear Enable Bit 307" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB306 ,Set/Clear Enable Bit 306" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB305 ,Set/Clear Enable Bit 305" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB304 ,Set/Clear Enable Bit 304" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB303 ,Set/Clear Enable Bit 303" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB302 ,Set/Clear Enable Bit 302" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB301 ,Set/Clear Enable Bit 301" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB300 ,Set/Clear Enable Bit 300" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB299 ,Set/Clear Enable Bit 299" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB298 ,Set/Clear Enable Bit 298" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB297 ,Set/Clear Enable Bit 297" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB296 ,Set/Clear Enable Bit 296" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB295 ,Set/Clear Enable Bit 295" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB294 ,Set/Clear Enable Bit 294" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB293 ,Set/Clear Enable Bit 293" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB292 ,Set/Clear Enable Bit 292" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB291 ,Set/Clear Enable Bit 291" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB290 ,Set/Clear Enable Bit 290" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB289 ,Set/Clear Enable Bit 289" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB288 ,Set/Clear Enable Bit 288" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x0124++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER9,Interrupt Set/Clear Enable Register 9"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0A)
|
|
group.long 0x0128++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER10,Interrupt Set/Clear Enable Register 10"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB351 ,Set/Clear Enable Bit 351" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB350 ,Set/Clear Enable Bit 350" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB349 ,Set/Clear Enable Bit 349" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB348 ,Set/Clear Enable Bit 348" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB347 ,Set/Clear Enable Bit 347" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB346 ,Set/Clear Enable Bit 346" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB345 ,Set/Clear Enable Bit 345" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB344 ,Set/Clear Enable Bit 344" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB343 ,Set/Clear Enable Bit 343" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB342 ,Set/Clear Enable Bit 342" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB341 ,Set/Clear Enable Bit 341" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB340 ,Set/Clear Enable Bit 340" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB339 ,Set/Clear Enable Bit 339" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB338 ,Set/Clear Enable Bit 338" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB337 ,Set/Clear Enable Bit 337" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB336 ,Set/Clear Enable Bit 336" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB335 ,Set/Clear Enable Bit 335" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB334 ,Set/Clear Enable Bit 334" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB333 ,Set/Clear Enable Bit 333" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB332 ,Set/Clear Enable Bit 332" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB331 ,Set/Clear Enable Bit 331" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB330 ,Set/Clear Enable Bit 330" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB329 ,Set/Clear Enable Bit 329" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB328 ,Set/Clear Enable Bit 328" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB327 ,Set/Clear Enable Bit 327" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB326 ,Set/Clear Enable Bit 326" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB325 ,Set/Clear Enable Bit 325" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB324 ,Set/Clear Enable Bit 324" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB323 ,Set/Clear Enable Bit 323" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB322 ,Set/Clear Enable Bit 322" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB321 ,Set/Clear Enable Bit 321" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB320 ,Set/Clear Enable Bit 320" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x0128++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER10,Interrupt Set/Clear Enable Register 10"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0B)
|
|
group.long 0x012C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER11,Interrupt Set/Clear Enable Register 11"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB383 ,Set/Clear Enable Bit 383" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB382 ,Set/Clear Enable Bit 382" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB381 ,Set/Clear Enable Bit 381" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB380 ,Set/Clear Enable Bit 380" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB379 ,Set/Clear Enable Bit 379" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB378 ,Set/Clear Enable Bit 378" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB377 ,Set/Clear Enable Bit 377" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB376 ,Set/Clear Enable Bit 376" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB375 ,Set/Clear Enable Bit 375" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB374 ,Set/Clear Enable Bit 374" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB373 ,Set/Clear Enable Bit 373" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB372 ,Set/Clear Enable Bit 372" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB371 ,Set/Clear Enable Bit 371" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB370 ,Set/Clear Enable Bit 370" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB369 ,Set/Clear Enable Bit 369" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB368 ,Set/Clear Enable Bit 368" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB367 ,Set/Clear Enable Bit 367" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB366 ,Set/Clear Enable Bit 366" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB365 ,Set/Clear Enable Bit 365" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB364 ,Set/Clear Enable Bit 364" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB363 ,Set/Clear Enable Bit 363" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB362 ,Set/Clear Enable Bit 362" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB361 ,Set/Clear Enable Bit 361" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB360 ,Set/Clear Enable Bit 360" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB359 ,Set/Clear Enable Bit 359" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB358 ,Set/Clear Enable Bit 358" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB357 ,Set/Clear Enable Bit 357" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB356 ,Set/Clear Enable Bit 356" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB355 ,Set/Clear Enable Bit 355" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB354 ,Set/Clear Enable Bit 354" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB353 ,Set/Clear Enable Bit 353" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB352 ,Set/Clear Enable Bit 352" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x012C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER11,Interrupt Set/Clear Enable Register 11"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0C)
|
|
group.long 0x0130++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER12,Interrupt Set/Clear Enable Register 12"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB415 ,Set/Clear Enable Bit 415" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB414 ,Set/Clear Enable Bit 414" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB413 ,Set/Clear Enable Bit 413" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB412 ,Set/Clear Enable Bit 412" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB411 ,Set/Clear Enable Bit 411" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB410 ,Set/Clear Enable Bit 410" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB409 ,Set/Clear Enable Bit 409" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB408 ,Set/Clear Enable Bit 408" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB407 ,Set/Clear Enable Bit 407" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB406 ,Set/Clear Enable Bit 406" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB405 ,Set/Clear Enable Bit 405" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB404 ,Set/Clear Enable Bit 404" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB403 ,Set/Clear Enable Bit 403" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB402 ,Set/Clear Enable Bit 402" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB401 ,Set/Clear Enable Bit 401" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB400 ,Set/Clear Enable Bit 400" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB399 ,Set/Clear Enable Bit 399" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB398 ,Set/Clear Enable Bit 398" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB397 ,Set/Clear Enable Bit 397" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB396 ,Set/Clear Enable Bit 396" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB395 ,Set/Clear Enable Bit 395" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB394 ,Set/Clear Enable Bit 394" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB393 ,Set/Clear Enable Bit 393" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB392 ,Set/Clear Enable Bit 392" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB391 ,Set/Clear Enable Bit 391" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB390 ,Set/Clear Enable Bit 390" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB389 ,Set/Clear Enable Bit 389" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB388 ,Set/Clear Enable Bit 388" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB387 ,Set/Clear Enable Bit 387" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB386 ,Set/Clear Enable Bit 386" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB385 ,Set/Clear Enable Bit 385" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB384 ,Set/Clear Enable Bit 384" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x0130++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER12,Interrupt Set/Clear Enable Register 12"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0D)
|
|
group.long 0x0134++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER13,Interrupt Set/Clear Enable Register 13"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB447 ,Set/Clear Enable Bit 447" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB446 ,Set/Clear Enable Bit 446" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB445 ,Set/Clear Enable Bit 445" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB444 ,Set/Clear Enable Bit 444" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB443 ,Set/Clear Enable Bit 443" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB442 ,Set/Clear Enable Bit 442" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB441 ,Set/Clear Enable Bit 441" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB440 ,Set/Clear Enable Bit 440" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB439 ,Set/Clear Enable Bit 439" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB438 ,Set/Clear Enable Bit 438" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB437 ,Set/Clear Enable Bit 437" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB436 ,Set/Clear Enable Bit 436" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB435 ,Set/Clear Enable Bit 435" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB434 ,Set/Clear Enable Bit 434" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB433 ,Set/Clear Enable Bit 433" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB432 ,Set/Clear Enable Bit 432" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB431 ,Set/Clear Enable Bit 431" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB430 ,Set/Clear Enable Bit 430" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB429 ,Set/Clear Enable Bit 429" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB428 ,Set/Clear Enable Bit 428" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB427 ,Set/Clear Enable Bit 427" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB426 ,Set/Clear Enable Bit 426" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB425 ,Set/Clear Enable Bit 425" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB424 ,Set/Clear Enable Bit 424" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB423 ,Set/Clear Enable Bit 423" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB422 ,Set/Clear Enable Bit 422" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB421 ,Set/Clear Enable Bit 421" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB420 ,Set/Clear Enable Bit 420" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB419 ,Set/Clear Enable Bit 419" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB418 ,Set/Clear Enable Bit 418" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB417 ,Set/Clear Enable Bit 417" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB416 ,Set/Clear Enable Bit 416" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x0134++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER13,Interrupt Set/Clear Enable Register 13"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0E)
|
|
group.long 0x0138++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER14,Interrupt Set/Clear Enable Register 14"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB479 ,Set/Clear Enable Bit 479" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB478 ,Set/Clear Enable Bit 478" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB477 ,Set/Clear Enable Bit 477" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB476 ,Set/Clear Enable Bit 476" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB475 ,Set/Clear Enable Bit 475" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB474 ,Set/Clear Enable Bit 474" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB473 ,Set/Clear Enable Bit 473" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB472 ,Set/Clear Enable Bit 472" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB471 ,Set/Clear Enable Bit 471" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB470 ,Set/Clear Enable Bit 470" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB469 ,Set/Clear Enable Bit 469" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB468 ,Set/Clear Enable Bit 468" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB467 ,Set/Clear Enable Bit 467" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB466 ,Set/Clear Enable Bit 466" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB465 ,Set/Clear Enable Bit 465" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB464 ,Set/Clear Enable Bit 464" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB463 ,Set/Clear Enable Bit 463" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB462 ,Set/Clear Enable Bit 462" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB461 ,Set/Clear Enable Bit 461" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB460 ,Set/Clear Enable Bit 460" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB459 ,Set/Clear Enable Bit 459" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB458 ,Set/Clear Enable Bit 458" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB457 ,Set/Clear Enable Bit 457" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB456 ,Set/Clear Enable Bit 456" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB455 ,Set/Clear Enable Bit 455" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB454 ,Set/Clear Enable Bit 454" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB453 ,Set/Clear Enable Bit 453" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB452 ,Set/Clear Enable Bit 452" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB451 ,Set/Clear Enable Bit 451" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB450 ,Set/Clear Enable Bit 450" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB449 ,Set/Clear Enable Bit 449" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB448 ,Set/Clear Enable Bit 448" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x0138++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER14,Interrupt Set/Clear Enable Register 14"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0F)
|
|
group.long 0x013C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER15,Interrupt Set/Clear Enable Register 15"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB511 ,Set/Clear Enable Bit 511" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB510 ,Set/Clear Enable Bit 510" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB509 ,Set/Clear Enable Bit 509" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB508 ,Set/Clear Enable Bit 508" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB507 ,Set/Clear Enable Bit 507" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB506 ,Set/Clear Enable Bit 506" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB505 ,Set/Clear Enable Bit 505" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB504 ,Set/Clear Enable Bit 504" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB503 ,Set/Clear Enable Bit 503" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB502 ,Set/Clear Enable Bit 502" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB501 ,Set/Clear Enable Bit 501" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB500 ,Set/Clear Enable Bit 500" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB499 ,Set/Clear Enable Bit 499" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB498 ,Set/Clear Enable Bit 498" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB497 ,Set/Clear Enable Bit 497" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB496 ,Set/Clear Enable Bit 496" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB495 ,Set/Clear Enable Bit 495" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB494 ,Set/Clear Enable Bit 494" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB493 ,Set/Clear Enable Bit 493" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB492 ,Set/Clear Enable Bit 492" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB491 ,Set/Clear Enable Bit 491" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB490 ,Set/Clear Enable Bit 490" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB489 ,Set/Clear Enable Bit 489" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB488 ,Set/Clear Enable Bit 488" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB487 ,Set/Clear Enable Bit 487" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB486 ,Set/Clear Enable Bit 486" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB485 ,Set/Clear Enable Bit 485" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB484 ,Set/Clear Enable Bit 484" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB483 ,Set/Clear Enable Bit 483" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB482 ,Set/Clear Enable Bit 482" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB481 ,Set/Clear Enable Bit 481" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB480 ,Set/Clear Enable Bit 480" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x013C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER15,Interrupt Set/Clear Enable Register 15"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x10)
|
|
group.long 0x0140++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER16,Interrupt Set/Clear Enable Register 16"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB543 ,Set/Clear Enable Bit 543" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB542 ,Set/Clear Enable Bit 542" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB541 ,Set/Clear Enable Bit 541" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB540 ,Set/Clear Enable Bit 540" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB539 ,Set/Clear Enable Bit 539" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB538 ,Set/Clear Enable Bit 538" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB537 ,Set/Clear Enable Bit 537" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB536 ,Set/Clear Enable Bit 536" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB535 ,Set/Clear Enable Bit 535" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB534 ,Set/Clear Enable Bit 534" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB533 ,Set/Clear Enable Bit 533" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB532 ,Set/Clear Enable Bit 532" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB531 ,Set/Clear Enable Bit 531" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB530 ,Set/Clear Enable Bit 530" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB529 ,Set/Clear Enable Bit 529" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB528 ,Set/Clear Enable Bit 528" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB527 ,Set/Clear Enable Bit 527" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB526 ,Set/Clear Enable Bit 526" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB525 ,Set/Clear Enable Bit 525" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB524 ,Set/Clear Enable Bit 524" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB523 ,Set/Clear Enable Bit 523" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB522 ,Set/Clear Enable Bit 522" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB521 ,Set/Clear Enable Bit 521" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB520 ,Set/Clear Enable Bit 520" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB519 ,Set/Clear Enable Bit 519" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB518 ,Set/Clear Enable Bit 518" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB517 ,Set/Clear Enable Bit 517" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB516 ,Set/Clear Enable Bit 516" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB515 ,Set/Clear Enable Bit 515" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB514 ,Set/Clear Enable Bit 514" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB513 ,Set/Clear Enable Bit 513" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB512 ,Set/Clear Enable Bit 512" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x0140++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER16,Interrupt Set/Clear Enable Register 16"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x11)
|
|
group.long 0x0144++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER17,Interrupt Set/Clear Enable Register 17"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB575 ,Set/Clear Enable Bit 575" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB574 ,Set/Clear Enable Bit 574" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB573 ,Set/Clear Enable Bit 573" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB572 ,Set/Clear Enable Bit 572" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB571 ,Set/Clear Enable Bit 571" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB570 ,Set/Clear Enable Bit 570" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB569 ,Set/Clear Enable Bit 569" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB568 ,Set/Clear Enable Bit 568" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB567 ,Set/Clear Enable Bit 567" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB566 ,Set/Clear Enable Bit 566" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB565 ,Set/Clear Enable Bit 565" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB564 ,Set/Clear Enable Bit 564" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB563 ,Set/Clear Enable Bit 563" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB562 ,Set/Clear Enable Bit 562" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB561 ,Set/Clear Enable Bit 561" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB560 ,Set/Clear Enable Bit 560" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB559 ,Set/Clear Enable Bit 559" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB558 ,Set/Clear Enable Bit 558" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB557 ,Set/Clear Enable Bit 557" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB556 ,Set/Clear Enable Bit 556" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB555 ,Set/Clear Enable Bit 555" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB554 ,Set/Clear Enable Bit 554" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB553 ,Set/Clear Enable Bit 553" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB552 ,Set/Clear Enable Bit 552" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB551 ,Set/Clear Enable Bit 551" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB550 ,Set/Clear Enable Bit 550" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB549 ,Set/Clear Enable Bit 549" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB548 ,Set/Clear Enable Bit 548" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB547 ,Set/Clear Enable Bit 547" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB546 ,Set/Clear Enable Bit 546" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB545 ,Set/Clear Enable Bit 545" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB544 ,Set/Clear Enable Bit 544" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x0144++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER17,Interrupt Set/Clear Enable Register 17"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x12)
|
|
group.long 0x0148++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER18,Interrupt Set/Clear Enable Register 18"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB607 ,Set/Clear Enable Bit 607" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB606 ,Set/Clear Enable Bit 606" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB605 ,Set/Clear Enable Bit 605" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB604 ,Set/Clear Enable Bit 604" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB603 ,Set/Clear Enable Bit 603" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB602 ,Set/Clear Enable Bit 602" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB601 ,Set/Clear Enable Bit 601" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB600 ,Set/Clear Enable Bit 600" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB599 ,Set/Clear Enable Bit 599" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB598 ,Set/Clear Enable Bit 598" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB597 ,Set/Clear Enable Bit 597" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB596 ,Set/Clear Enable Bit 596" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB595 ,Set/Clear Enable Bit 595" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB594 ,Set/Clear Enable Bit 594" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB593 ,Set/Clear Enable Bit 593" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB592 ,Set/Clear Enable Bit 592" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB591 ,Set/Clear Enable Bit 591" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB590 ,Set/Clear Enable Bit 590" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB589 ,Set/Clear Enable Bit 589" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB588 ,Set/Clear Enable Bit 588" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB587 ,Set/Clear Enable Bit 587" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB586 ,Set/Clear Enable Bit 586" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB585 ,Set/Clear Enable Bit 585" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB584 ,Set/Clear Enable Bit 584" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB583 ,Set/Clear Enable Bit 583" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB582 ,Set/Clear Enable Bit 582" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB581 ,Set/Clear Enable Bit 581" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB580 ,Set/Clear Enable Bit 580" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB579 ,Set/Clear Enable Bit 579" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB578 ,Set/Clear Enable Bit 578" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB577 ,Set/Clear Enable Bit 577" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB576 ,Set/Clear Enable Bit 576" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x0148++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER18,Interrupt Set/Clear Enable Register 18"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x13)
|
|
group.long 0x014C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER19,Interrupt Set/Clear Enable Register 19"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB639 ,Set/Clear Enable Bit 639" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB638 ,Set/Clear Enable Bit 638" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB637 ,Set/Clear Enable Bit 637" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB636 ,Set/Clear Enable Bit 636" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB635 ,Set/Clear Enable Bit 635" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB634 ,Set/Clear Enable Bit 634" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB633 ,Set/Clear Enable Bit 633" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB632 ,Set/Clear Enable Bit 632" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB631 ,Set/Clear Enable Bit 631" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB630 ,Set/Clear Enable Bit 630" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB629 ,Set/Clear Enable Bit 629" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB628 ,Set/Clear Enable Bit 628" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB627 ,Set/Clear Enable Bit 627" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB626 ,Set/Clear Enable Bit 626" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB625 ,Set/Clear Enable Bit 625" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB624 ,Set/Clear Enable Bit 624" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB623 ,Set/Clear Enable Bit 623" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB622 ,Set/Clear Enable Bit 622" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB621 ,Set/Clear Enable Bit 621" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB620 ,Set/Clear Enable Bit 620" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB619 ,Set/Clear Enable Bit 619" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB618 ,Set/Clear Enable Bit 618" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB617 ,Set/Clear Enable Bit 617" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB616 ,Set/Clear Enable Bit 616" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB615 ,Set/Clear Enable Bit 615" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB614 ,Set/Clear Enable Bit 614" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB613 ,Set/Clear Enable Bit 613" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB612 ,Set/Clear Enable Bit 612" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB611 ,Set/Clear Enable Bit 611" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB610 ,Set/Clear Enable Bit 610" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB609 ,Set/Clear Enable Bit 609" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB608 ,Set/Clear Enable Bit 608" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x014C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER19,Interrupt Set/Clear Enable Register 19"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x14)
|
|
group.long 0x0150++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER20,Interrupt Set/Clear Enable Register 20"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB671 ,Set/Clear Enable Bit 671" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB670 ,Set/Clear Enable Bit 670" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB669 ,Set/Clear Enable Bit 669" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB668 ,Set/Clear Enable Bit 668" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB667 ,Set/Clear Enable Bit 667" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB666 ,Set/Clear Enable Bit 666" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB665 ,Set/Clear Enable Bit 665" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB664 ,Set/Clear Enable Bit 664" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB663 ,Set/Clear Enable Bit 663" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB662 ,Set/Clear Enable Bit 662" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB661 ,Set/Clear Enable Bit 661" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB660 ,Set/Clear Enable Bit 660" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB659 ,Set/Clear Enable Bit 659" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB658 ,Set/Clear Enable Bit 658" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB657 ,Set/Clear Enable Bit 657" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB656 ,Set/Clear Enable Bit 656" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB655 ,Set/Clear Enable Bit 655" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB654 ,Set/Clear Enable Bit 654" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB653 ,Set/Clear Enable Bit 653" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB652 ,Set/Clear Enable Bit 652" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB651 ,Set/Clear Enable Bit 651" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB650 ,Set/Clear Enable Bit 650" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB649 ,Set/Clear Enable Bit 649" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB648 ,Set/Clear Enable Bit 648" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB647 ,Set/Clear Enable Bit 647" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB646 ,Set/Clear Enable Bit 646" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB645 ,Set/Clear Enable Bit 645" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB644 ,Set/Clear Enable Bit 644" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB643 ,Set/Clear Enable Bit 643" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB642 ,Set/Clear Enable Bit 642" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB641 ,Set/Clear Enable Bit 641" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB640 ,Set/Clear Enable Bit 640" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x0150++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER20,Interrupt Set/Clear Enable Register 20"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x15)
|
|
group.long 0x0154++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER21,Interrupt Set/Clear Enable Register 21"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB703 ,Set/Clear Enable Bit 703" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB702 ,Set/Clear Enable Bit 702" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB701 ,Set/Clear Enable Bit 701" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB700 ,Set/Clear Enable Bit 700" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB699 ,Set/Clear Enable Bit 699" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB698 ,Set/Clear Enable Bit 698" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB697 ,Set/Clear Enable Bit 697" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB696 ,Set/Clear Enable Bit 696" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB695 ,Set/Clear Enable Bit 695" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB694 ,Set/Clear Enable Bit 694" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB693 ,Set/Clear Enable Bit 693" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB692 ,Set/Clear Enable Bit 692" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB691 ,Set/Clear Enable Bit 691" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB690 ,Set/Clear Enable Bit 690" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB689 ,Set/Clear Enable Bit 689" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB688 ,Set/Clear Enable Bit 688" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB687 ,Set/Clear Enable Bit 687" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB686 ,Set/Clear Enable Bit 686" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB685 ,Set/Clear Enable Bit 685" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB684 ,Set/Clear Enable Bit 684" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB683 ,Set/Clear Enable Bit 683" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB682 ,Set/Clear Enable Bit 682" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB681 ,Set/Clear Enable Bit 681" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB680 ,Set/Clear Enable Bit 680" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB679 ,Set/Clear Enable Bit 679" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB678 ,Set/Clear Enable Bit 678" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB677 ,Set/Clear Enable Bit 677" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB676 ,Set/Clear Enable Bit 676" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB675 ,Set/Clear Enable Bit 675" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB674 ,Set/Clear Enable Bit 674" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB673 ,Set/Clear Enable Bit 673" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB672 ,Set/Clear Enable Bit 672" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x0154++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER21,Interrupt Set/Clear Enable Register 21"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x16)
|
|
group.long 0x0158++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER22,Interrupt Set/Clear Enable Register 22"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB735 ,Set/Clear Enable Bit 735" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB734 ,Set/Clear Enable Bit 734" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB733 ,Set/Clear Enable Bit 733" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB732 ,Set/Clear Enable Bit 732" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB731 ,Set/Clear Enable Bit 731" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB730 ,Set/Clear Enable Bit 730" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB729 ,Set/Clear Enable Bit 729" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB728 ,Set/Clear Enable Bit 728" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB727 ,Set/Clear Enable Bit 727" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB726 ,Set/Clear Enable Bit 726" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB725 ,Set/Clear Enable Bit 725" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB724 ,Set/Clear Enable Bit 724" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB723 ,Set/Clear Enable Bit 723" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB722 ,Set/Clear Enable Bit 722" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB721 ,Set/Clear Enable Bit 721" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB720 ,Set/Clear Enable Bit 720" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB719 ,Set/Clear Enable Bit 719" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB718 ,Set/Clear Enable Bit 718" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB717 ,Set/Clear Enable Bit 717" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB716 ,Set/Clear Enable Bit 716" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB715 ,Set/Clear Enable Bit 715" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB714 ,Set/Clear Enable Bit 714" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB713 ,Set/Clear Enable Bit 713" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB712 ,Set/Clear Enable Bit 712" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB711 ,Set/Clear Enable Bit 711" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB710 ,Set/Clear Enable Bit 710" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB709 ,Set/Clear Enable Bit 709" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB708 ,Set/Clear Enable Bit 708" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB707 ,Set/Clear Enable Bit 707" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB706 ,Set/Clear Enable Bit 706" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB705 ,Set/Clear Enable Bit 705" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB704 ,Set/Clear Enable Bit 704" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x0158++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER22,Interrupt Set/Clear Enable Register 22"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x17)
|
|
group.long 0x015C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER23,Interrupt Set/Clear Enable Register 23"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB767 ,Set/Clear Enable Bit 767" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB766 ,Set/Clear Enable Bit 766" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB765 ,Set/Clear Enable Bit 765" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB764 ,Set/Clear Enable Bit 764" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB763 ,Set/Clear Enable Bit 763" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB762 ,Set/Clear Enable Bit 762" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB761 ,Set/Clear Enable Bit 761" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB760 ,Set/Clear Enable Bit 760" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB759 ,Set/Clear Enable Bit 759" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB758 ,Set/Clear Enable Bit 758" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB757 ,Set/Clear Enable Bit 757" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB756 ,Set/Clear Enable Bit 756" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB755 ,Set/Clear Enable Bit 755" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB754 ,Set/Clear Enable Bit 754" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB753 ,Set/Clear Enable Bit 753" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB752 ,Set/Clear Enable Bit 752" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB751 ,Set/Clear Enable Bit 751" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB750 ,Set/Clear Enable Bit 750" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB749 ,Set/Clear Enable Bit 749" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB748 ,Set/Clear Enable Bit 748" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB747 ,Set/Clear Enable Bit 747" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB746 ,Set/Clear Enable Bit 746" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB745 ,Set/Clear Enable Bit 745" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB744 ,Set/Clear Enable Bit 744" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB743 ,Set/Clear Enable Bit 743" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB742 ,Set/Clear Enable Bit 742" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB741 ,Set/Clear Enable Bit 741" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB740 ,Set/Clear Enable Bit 740" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB739 ,Set/Clear Enable Bit 739" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB738 ,Set/Clear Enable Bit 738" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB737 ,Set/Clear Enable Bit 737" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB736 ,Set/Clear Enable Bit 736" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x015C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER23,Interrupt Set/Clear Enable Register 23"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x18)
|
|
group.long 0x0160++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER24,Interrupt Set/Clear Enable Register 24"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB799 ,Set/Clear Enable Bit 799" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB798 ,Set/Clear Enable Bit 798" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB797 ,Set/Clear Enable Bit 797" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB796 ,Set/Clear Enable Bit 796" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB795 ,Set/Clear Enable Bit 795" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB794 ,Set/Clear Enable Bit 794" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB793 ,Set/Clear Enable Bit 793" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB792 ,Set/Clear Enable Bit 792" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB791 ,Set/Clear Enable Bit 791" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB790 ,Set/Clear Enable Bit 790" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB789 ,Set/Clear Enable Bit 789" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB788 ,Set/Clear Enable Bit 788" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB787 ,Set/Clear Enable Bit 787" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB786 ,Set/Clear Enable Bit 786" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB785 ,Set/Clear Enable Bit 785" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB784 ,Set/Clear Enable Bit 784" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB783 ,Set/Clear Enable Bit 783" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB782 ,Set/Clear Enable Bit 782" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB781 ,Set/Clear Enable Bit 781" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB780 ,Set/Clear Enable Bit 780" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB779 ,Set/Clear Enable Bit 779" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB778 ,Set/Clear Enable Bit 778" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB777 ,Set/Clear Enable Bit 777" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB776 ,Set/Clear Enable Bit 776" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB775 ,Set/Clear Enable Bit 775" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB774 ,Set/Clear Enable Bit 774" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB773 ,Set/Clear Enable Bit 773" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB772 ,Set/Clear Enable Bit 772" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB771 ,Set/Clear Enable Bit 771" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB770 ,Set/Clear Enable Bit 770" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB769 ,Set/Clear Enable Bit 769" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB768 ,Set/Clear Enable Bit 768" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x0160++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER24,Interrupt Set/Clear Enable Register 24"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x19)
|
|
group.long 0x0164++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER25,Interrupt Set/Clear Enable Register 25"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB831 ,Set/Clear Enable Bit 831" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB830 ,Set/Clear Enable Bit 830" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB829 ,Set/Clear Enable Bit 829" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB828 ,Set/Clear Enable Bit 828" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB827 ,Set/Clear Enable Bit 827" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB826 ,Set/Clear Enable Bit 826" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB825 ,Set/Clear Enable Bit 825" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB824 ,Set/Clear Enable Bit 824" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB823 ,Set/Clear Enable Bit 823" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB822 ,Set/Clear Enable Bit 822" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB821 ,Set/Clear Enable Bit 821" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB820 ,Set/Clear Enable Bit 820" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB819 ,Set/Clear Enable Bit 819" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB818 ,Set/Clear Enable Bit 818" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB817 ,Set/Clear Enable Bit 817" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB816 ,Set/Clear Enable Bit 816" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB815 ,Set/Clear Enable Bit 815" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB814 ,Set/Clear Enable Bit 814" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB813 ,Set/Clear Enable Bit 813" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB812 ,Set/Clear Enable Bit 812" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB811 ,Set/Clear Enable Bit 811" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB810 ,Set/Clear Enable Bit 810" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB809 ,Set/Clear Enable Bit 809" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB808 ,Set/Clear Enable Bit 808" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB807 ,Set/Clear Enable Bit 807" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB806 ,Set/Clear Enable Bit 806" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB805 ,Set/Clear Enable Bit 805" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB804 ,Set/Clear Enable Bit 804" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB803 ,Set/Clear Enable Bit 803" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB802 ,Set/Clear Enable Bit 802" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB801 ,Set/Clear Enable Bit 801" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB800 ,Set/Clear Enable Bit 800" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x0164++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER25,Interrupt Set/Clear Enable Register 25"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1A)
|
|
group.long 0x0168++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER26,Interrupt Set/Clear Enable Register 26"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB863 ,Set/Clear Enable Bit 863" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB862 ,Set/Clear Enable Bit 862" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB861 ,Set/Clear Enable Bit 861" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB860 ,Set/Clear Enable Bit 860" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB859 ,Set/Clear Enable Bit 859" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB858 ,Set/Clear Enable Bit 858" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB857 ,Set/Clear Enable Bit 857" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB856 ,Set/Clear Enable Bit 856" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB855 ,Set/Clear Enable Bit 855" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB854 ,Set/Clear Enable Bit 854" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB853 ,Set/Clear Enable Bit 853" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB852 ,Set/Clear Enable Bit 852" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB851 ,Set/Clear Enable Bit 851" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB850 ,Set/Clear Enable Bit 850" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB849 ,Set/Clear Enable Bit 849" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB848 ,Set/Clear Enable Bit 848" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB847 ,Set/Clear Enable Bit 847" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB846 ,Set/Clear Enable Bit 846" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB845 ,Set/Clear Enable Bit 845" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB844 ,Set/Clear Enable Bit 844" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB843 ,Set/Clear Enable Bit 843" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB842 ,Set/Clear Enable Bit 842" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB841 ,Set/Clear Enable Bit 841" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB840 ,Set/Clear Enable Bit 840" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB839 ,Set/Clear Enable Bit 839" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB838 ,Set/Clear Enable Bit 838" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB837 ,Set/Clear Enable Bit 837" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB836 ,Set/Clear Enable Bit 836" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB835 ,Set/Clear Enable Bit 835" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB834 ,Set/Clear Enable Bit 834" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB833 ,Set/Clear Enable Bit 833" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB832 ,Set/Clear Enable Bit 832" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x0168++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER26,Interrupt Set/Clear Enable Register 26"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1B)
|
|
group.long 0x016C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER27,Interrupt Set/Clear Enable Register 27"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB895 ,Set/Clear Enable Bit 895" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB894 ,Set/Clear Enable Bit 894" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB893 ,Set/Clear Enable Bit 893" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB892 ,Set/Clear Enable Bit 892" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB891 ,Set/Clear Enable Bit 891" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB890 ,Set/Clear Enable Bit 890" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB889 ,Set/Clear Enable Bit 889" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB888 ,Set/Clear Enable Bit 888" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB887 ,Set/Clear Enable Bit 887" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB886 ,Set/Clear Enable Bit 886" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB885 ,Set/Clear Enable Bit 885" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB884 ,Set/Clear Enable Bit 884" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB883 ,Set/Clear Enable Bit 883" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB882 ,Set/Clear Enable Bit 882" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB881 ,Set/Clear Enable Bit 881" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB880 ,Set/Clear Enable Bit 880" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB879 ,Set/Clear Enable Bit 879" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB878 ,Set/Clear Enable Bit 878" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB877 ,Set/Clear Enable Bit 877" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB876 ,Set/Clear Enable Bit 876" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB875 ,Set/Clear Enable Bit 875" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB874 ,Set/Clear Enable Bit 874" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB873 ,Set/Clear Enable Bit 873" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB872 ,Set/Clear Enable Bit 872" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB871 ,Set/Clear Enable Bit 871" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB870 ,Set/Clear Enable Bit 870" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB869 ,Set/Clear Enable Bit 869" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB868 ,Set/Clear Enable Bit 868" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB867 ,Set/Clear Enable Bit 867" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB866 ,Set/Clear Enable Bit 866" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB865 ,Set/Clear Enable Bit 865" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB864 ,Set/Clear Enable Bit 864" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x016C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER27,Interrupt Set/Clear Enable Register 27"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1C)
|
|
group.long 0x0170++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER28,Interrupt Set/Clear Enable Register 28"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB927 ,Set/Clear Enable Bit 927" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB926 ,Set/Clear Enable Bit 926" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB925 ,Set/Clear Enable Bit 925" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB924 ,Set/Clear Enable Bit 924" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB923 ,Set/Clear Enable Bit 923" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB922 ,Set/Clear Enable Bit 922" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB921 ,Set/Clear Enable Bit 921" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB920 ,Set/Clear Enable Bit 920" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB919 ,Set/Clear Enable Bit 919" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB918 ,Set/Clear Enable Bit 918" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB917 ,Set/Clear Enable Bit 917" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB916 ,Set/Clear Enable Bit 916" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB915 ,Set/Clear Enable Bit 915" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB914 ,Set/Clear Enable Bit 914" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB913 ,Set/Clear Enable Bit 913" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB912 ,Set/Clear Enable Bit 912" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB911 ,Set/Clear Enable Bit 911" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB910 ,Set/Clear Enable Bit 910" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB909 ,Set/Clear Enable Bit 909" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB908 ,Set/Clear Enable Bit 908" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB907 ,Set/Clear Enable Bit 907" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB906 ,Set/Clear Enable Bit 906" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB905 ,Set/Clear Enable Bit 905" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB904 ,Set/Clear Enable Bit 904" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB903 ,Set/Clear Enable Bit 903" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB902 ,Set/Clear Enable Bit 902" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB901 ,Set/Clear Enable Bit 901" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB900 ,Set/Clear Enable Bit 900" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB899 ,Set/Clear Enable Bit 899" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB898 ,Set/Clear Enable Bit 898" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB897 ,Set/Clear Enable Bit 897" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB896 ,Set/Clear Enable Bit 896" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x0170++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER28,Interrupt Set/Clear Enable Register 28"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1D)
|
|
group.long 0x0174++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER29,Interrupt Set/Clear Enable Register 29"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB959 ,Set/Clear Enable Bit 959" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB958 ,Set/Clear Enable Bit 958" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB957 ,Set/Clear Enable Bit 957" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB956 ,Set/Clear Enable Bit 956" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB955 ,Set/Clear Enable Bit 955" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB954 ,Set/Clear Enable Bit 954" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB953 ,Set/Clear Enable Bit 953" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB952 ,Set/Clear Enable Bit 952" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB951 ,Set/Clear Enable Bit 951" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB950 ,Set/Clear Enable Bit 950" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB949 ,Set/Clear Enable Bit 949" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB948 ,Set/Clear Enable Bit 948" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB947 ,Set/Clear Enable Bit 947" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB946 ,Set/Clear Enable Bit 946" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB945 ,Set/Clear Enable Bit 945" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB944 ,Set/Clear Enable Bit 944" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB943 ,Set/Clear Enable Bit 943" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB942 ,Set/Clear Enable Bit 942" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB941 ,Set/Clear Enable Bit 941" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB940 ,Set/Clear Enable Bit 940" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB939 ,Set/Clear Enable Bit 939" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB938 ,Set/Clear Enable Bit 938" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB937 ,Set/Clear Enable Bit 937" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB936 ,Set/Clear Enable Bit 936" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB935 ,Set/Clear Enable Bit 935" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB934 ,Set/Clear Enable Bit 934" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB933 ,Set/Clear Enable Bit 933" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB932 ,Set/Clear Enable Bit 932" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB931 ,Set/Clear Enable Bit 931" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB930 ,Set/Clear Enable Bit 930" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB929 ,Set/Clear Enable Bit 929" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB928 ,Set/Clear Enable Bit 928" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x0174++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER29,Interrupt Set/Clear Enable Register 29"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1E)
|
|
group.long 0x0178++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER30,Interrupt Set/Clear Enable Register 30"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB991 ,Set/Clear Enable Bit 991" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB990 ,Set/Clear Enable Bit 990" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB989 ,Set/Clear Enable Bit 989" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB988 ,Set/Clear Enable Bit 988" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB987 ,Set/Clear Enable Bit 987" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB986 ,Set/Clear Enable Bit 986" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB985 ,Set/Clear Enable Bit 985" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB984 ,Set/Clear Enable Bit 984" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB983 ,Set/Clear Enable Bit 983" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB982 ,Set/Clear Enable Bit 982" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB981 ,Set/Clear Enable Bit 981" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB980 ,Set/Clear Enable Bit 980" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB979 ,Set/Clear Enable Bit 979" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB978 ,Set/Clear Enable Bit 978" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB977 ,Set/Clear Enable Bit 977" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB976 ,Set/Clear Enable Bit 976" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB975 ,Set/Clear Enable Bit 975" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB974 ,Set/Clear Enable Bit 974" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB973 ,Set/Clear Enable Bit 973" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB972 ,Set/Clear Enable Bit 972" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB971 ,Set/Clear Enable Bit 971" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB970 ,Set/Clear Enable Bit 970" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB969 ,Set/Clear Enable Bit 969" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB968 ,Set/Clear Enable Bit 968" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB967 ,Set/Clear Enable Bit 967" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB966 ,Set/Clear Enable Bit 966" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB965 ,Set/Clear Enable Bit 965" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB964 ,Set/Clear Enable Bit 964" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB963 ,Set/Clear Enable Bit 963" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB962 ,Set/Clear Enable Bit 962" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB961 ,Set/Clear Enable Bit 961" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB960 ,Set/Clear Enable Bit 960" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x0178++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER30,Interrupt Set/Clear Enable Register 30"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)==0x1F)
|
|
group.long 0x017C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER31,Interrupt Set/Clear Enable Register 31"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB1019 ,Set/Clear Enable Bit 1019" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB1018 ,Set/Clear Enable Bit 1018" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB1017 ,Set/Clear Enable Bit 1017" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB1016 ,Set/Clear Enable Bit 1016" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB1015 ,Set/Clear Enable Bit 1015" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB1014 ,Set/Clear Enable Bit 1014" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB1013 ,Set/Clear Enable Bit 1013" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB1012 ,Set/Clear Enable Bit 1012" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB1011 ,Set/Clear Enable Bit 1011" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB1010 ,Set/Clear Enable Bit 1010" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB1009 ,Set/Clear Enable Bit 1009" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB1008 ,Set/Clear Enable Bit 1008" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB1007 ,Set/Clear Enable Bit 1007" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB1006 ,Set/Clear Enable Bit 1006" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB1005 ,Set/Clear Enable Bit 1005" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB1004 ,Set/Clear Enable Bit 1004" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB1003 ,Set/Clear Enable Bit 1003" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB1002 ,Set/Clear Enable Bit 1002" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB1001 ,Set/Clear Enable Bit 1001" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB1000 ,Set/Clear Enable Bit 1000" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB999 ,Set/Clear Enable Bit 999" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB998 ,Set/Clear Enable Bit 998" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB997 ,Set/Clear Enable Bit 997" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB996 ,Set/Clear Enable Bit 996" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB995 ,Set/Clear Enable Bit 995" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB994 ,Set/Clear Enable Bit 994" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB993 ,Set/Clear Enable Bit 993" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB992 ,Set/Clear Enable Bit 992" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x017C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ENABLER31,Interrupt Set/Clear Enable Register 31"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 22.
|
|
tree "Set/Clear Pending Registers"
|
|
group.long 0x0200++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR0,Interrupt Set/Clear Pending Register 0"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND31 ,Set/Clear Pending Bit 31" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND30 ,Set/Clear Pending Bit 30" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND29 ,Set/Clear Pending Bit 29" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND28 ,Set/Clear Pending Bit 28" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND27 ,Set/Clear Pending Bit 27" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND26 ,Set/Clear Pending Bit 26" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND25 ,Set/Clear Pending Bit 25" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND24 ,Set/Clear Pending Bit 24" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND23 ,Set/Clear Pending Bit 23" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND22 ,Set/Clear Pending Bit 22" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND21 ,Set/Clear Pending Bit 21" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND20 ,Set/Clear Pending Bit 20" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND19 ,Set/Clear Pending Bit 19" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND18 ,Set/Clear Pending Bit 18" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND17 ,Set/Clear Pending Bit 17" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND16 ,Set/Clear Pending Bit 16" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND15 ,Set/Clear Pending Bit 15" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND14 ,Set/Clear Pending Bit 14" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND13 ,Set/Clear Pending Bit 13" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND12 ,Set/Clear Pending Bit 12" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND11 ,Set/Clear Pending Bit 11" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND10 ,Set/Clear Pending Bit 10" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND9 ,Set/Clear Pending Bit 9" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND8 ,Set/Clear Pending Bit 8" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND7 ,Set/Clear Pending Bit 7" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND6 ,Set/Clear Pending Bit 6" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND5 ,Set/Clear Pending Bit 5" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND4 ,Set/Clear Pending Bit 4" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND3 ,Set/Clear Pending Bit 3" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND2 ,Set/Clear Pending Bit 2" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND1 ,Set/Clear Pending Bit 1" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND0 ,Set/Clear Pending Bit 0" "Not pending,Pending"
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x01)
|
|
group.long 0x0204++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR1,Interrupt Set/Clear Pending Register 1"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND63 ,Set/Clear Pending Bit 63" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND62 ,Set/Clear Pending Bit 62" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND61 ,Set/Clear Pending Bit 61" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND60 ,Set/Clear Pending Bit 60" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND59 ,Set/Clear Pending Bit 59" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND58 ,Set/Clear Pending Bit 58" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND57 ,Set/Clear Pending Bit 57" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND56 ,Set/Clear Pending Bit 56" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND55 ,Set/Clear Pending Bit 55" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND54 ,Set/Clear Pending Bit 54" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND53 ,Set/Clear Pending Bit 53" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND52 ,Set/Clear Pending Bit 52" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND51 ,Set/Clear Pending Bit 51" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND50 ,Set/Clear Pending Bit 50" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND49 ,Set/Clear Pending Bit 49" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND48 ,Set/Clear Pending Bit 48" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND47 ,Set/Clear Pending Bit 47" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND46 ,Set/Clear Pending Bit 46" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND45 ,Set/Clear Pending Bit 45" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND44 ,Set/Clear Pending Bit 44" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND43 ,Set/Clear Pending Bit 43" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND42 ,Set/Clear Pending Bit 42" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND41 ,Set/Clear Pending Bit 41" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND40 ,Set/Clear Pending Bit 40" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND39 ,Set/Clear Pending Bit 39" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND38 ,Set/Clear Pending Bit 38" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND37 ,Set/Clear Pending Bit 37" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND36 ,Set/Clear Pending Bit 36" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND35 ,Set/Clear Pending Bit 35" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND34 ,Set/Clear Pending Bit 34" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND33 ,Set/Clear Pending Bit 33" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND32 ,Set/Clear Pending Bit 32" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x0204++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR1,Interrupt Set/Clear Pending Register 1"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x02)
|
|
group.long 0x0208++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR2,Interrupt Set/Clear Pending Register 2"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND95 ,Set/Clear Pending Bit 95" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND94 ,Set/Clear Pending Bit 94" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND93 ,Set/Clear Pending Bit 93" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND92 ,Set/Clear Pending Bit 92" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND91 ,Set/Clear Pending Bit 91" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND90 ,Set/Clear Pending Bit 90" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND89 ,Set/Clear Pending Bit 89" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND88 ,Set/Clear Pending Bit 88" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND87 ,Set/Clear Pending Bit 87" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND86 ,Set/Clear Pending Bit 86" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND85 ,Set/Clear Pending Bit 85" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND84 ,Set/Clear Pending Bit 84" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND83 ,Set/Clear Pending Bit 83" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND82 ,Set/Clear Pending Bit 82" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND81 ,Set/Clear Pending Bit 81" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND80 ,Set/Clear Pending Bit 80" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND79 ,Set/Clear Pending Bit 79" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND78 ,Set/Clear Pending Bit 78" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND77 ,Set/Clear Pending Bit 77" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND76 ,Set/Clear Pending Bit 76" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND75 ,Set/Clear Pending Bit 75" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND74 ,Set/Clear Pending Bit 74" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND73 ,Set/Clear Pending Bit 73" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND72 ,Set/Clear Pending Bit 72" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND71 ,Set/Clear Pending Bit 71" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND70 ,Set/Clear Pending Bit 70" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND69 ,Set/Clear Pending Bit 69" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND68 ,Set/Clear Pending Bit 68" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND67 ,Set/Clear Pending Bit 67" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND66 ,Set/Clear Pending Bit 66" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND65 ,Set/Clear Pending Bit 65" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND64 ,Set/Clear Pending Bit 64" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x0208++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR2,Interrupt Set/Clear Pending Register 2"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x03)
|
|
group.long 0x020C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR3,Interrupt Set/Clear Pending Register 3"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND127 ,Set/Clear Pending Bit 127" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND126 ,Set/Clear Pending Bit 126" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND125 ,Set/Clear Pending Bit 125" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND124 ,Set/Clear Pending Bit 124" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND123 ,Set/Clear Pending Bit 123" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND122 ,Set/Clear Pending Bit 122" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND121 ,Set/Clear Pending Bit 121" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND120 ,Set/Clear Pending Bit 120" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND119 ,Set/Clear Pending Bit 119" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND118 ,Set/Clear Pending Bit 118" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND117 ,Set/Clear Pending Bit 117" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND116 ,Set/Clear Pending Bit 116" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND115 ,Set/Clear Pending Bit 115" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND114 ,Set/Clear Pending Bit 114" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND113 ,Set/Clear Pending Bit 113" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND112 ,Set/Clear Pending Bit 112" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND111 ,Set/Clear Pending Bit 111" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND110 ,Set/Clear Pending Bit 110" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND109 ,Set/Clear Pending Bit 109" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND108 ,Set/Clear Pending Bit 108" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND107 ,Set/Clear Pending Bit 107" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND106 ,Set/Clear Pending Bit 106" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND105 ,Set/Clear Pending Bit 105" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND104 ,Set/Clear Pending Bit 104" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND103 ,Set/Clear Pending Bit 103" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND102 ,Set/Clear Pending Bit 102" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND101 ,Set/Clear Pending Bit 101" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND100 ,Set/Clear Pending Bit 100" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND99 ,Set/Clear Pending Bit 99" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND98 ,Set/Clear Pending Bit 98" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND97 ,Set/Clear Pending Bit 97" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND96 ,Set/Clear Pending Bit 96" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x020C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR3,Interrupt Set/Clear Pending Register 3"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x04)
|
|
group.long 0x0210++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR4,Interrupt Set/Clear Pending Register 4"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND159 ,Set/Clear Pending Bit 159" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND158 ,Set/Clear Pending Bit 158" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND157 ,Set/Clear Pending Bit 157" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND156 ,Set/Clear Pending Bit 156" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND155 ,Set/Clear Pending Bit 155" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND154 ,Set/Clear Pending Bit 154" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND153 ,Set/Clear Pending Bit 153" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND152 ,Set/Clear Pending Bit 152" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND151 ,Set/Clear Pending Bit 151" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND150 ,Set/Clear Pending Bit 150" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND149 ,Set/Clear Pending Bit 149" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND148 ,Set/Clear Pending Bit 148" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND147 ,Set/Clear Pending Bit 147" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND146 ,Set/Clear Pending Bit 146" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND145 ,Set/Clear Pending Bit 145" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND144 ,Set/Clear Pending Bit 144" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND143 ,Set/Clear Pending Bit 143" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND142 ,Set/Clear Pending Bit 142" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND141 ,Set/Clear Pending Bit 141" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND140 ,Set/Clear Pending Bit 140" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND139 ,Set/Clear Pending Bit 139" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND138 ,Set/Clear Pending Bit 138" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND137 ,Set/Clear Pending Bit 137" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND136 ,Set/Clear Pending Bit 136" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND135 ,Set/Clear Pending Bit 135" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND134 ,Set/Clear Pending Bit 134" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND133 ,Set/Clear Pending Bit 133" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND132 ,Set/Clear Pending Bit 132" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND131 ,Set/Clear Pending Bit 131" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND130 ,Set/Clear Pending Bit 130" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND129 ,Set/Clear Pending Bit 129" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND128 ,Set/Clear Pending Bit 128" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x0210++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR4,Interrupt Set/Clear Pending Register 4"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x05)
|
|
group.long 0x0214++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR5,Interrupt Set/Clear Pending Register 5"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND191 ,Set/Clear Pending Bit 191" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND190 ,Set/Clear Pending Bit 190" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND189 ,Set/Clear Pending Bit 189" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND188 ,Set/Clear Pending Bit 188" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND187 ,Set/Clear Pending Bit 187" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND186 ,Set/Clear Pending Bit 186" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND185 ,Set/Clear Pending Bit 185" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND184 ,Set/Clear Pending Bit 184" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND183 ,Set/Clear Pending Bit 183" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND182 ,Set/Clear Pending Bit 182" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND181 ,Set/Clear Pending Bit 181" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND180 ,Set/Clear Pending Bit 180" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND179 ,Set/Clear Pending Bit 179" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND178 ,Set/Clear Pending Bit 178" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND177 ,Set/Clear Pending Bit 177" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND176 ,Set/Clear Pending Bit 176" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND175 ,Set/Clear Pending Bit 175" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND174 ,Set/Clear Pending Bit 174" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND173 ,Set/Clear Pending Bit 173" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND172 ,Set/Clear Pending Bit 172" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND171 ,Set/Clear Pending Bit 171" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND170 ,Set/Clear Pending Bit 170" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND169 ,Set/Clear Pending Bit 169" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND168 ,Set/Clear Pending Bit 168" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND167 ,Set/Clear Pending Bit 167" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND166 ,Set/Clear Pending Bit 166" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND165 ,Set/Clear Pending Bit 165" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND164 ,Set/Clear Pending Bit 164" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND163 ,Set/Clear Pending Bit 163" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND162 ,Set/Clear Pending Bit 162" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND161 ,Set/Clear Pending Bit 161" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND160 ,Set/Clear Pending Bit 160" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x0214++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR5,Interrupt Set/Clear Pending Register 5"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x06)
|
|
group.long 0x0218++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR6,Interrupt Set/Clear Pending Register 6"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND223 ,Set/Clear Pending Bit 223" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND222 ,Set/Clear Pending Bit 222" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND221 ,Set/Clear Pending Bit 221" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND220 ,Set/Clear Pending Bit 220" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND219 ,Set/Clear Pending Bit 219" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND218 ,Set/Clear Pending Bit 218" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND217 ,Set/Clear Pending Bit 217" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND216 ,Set/Clear Pending Bit 216" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND215 ,Set/Clear Pending Bit 215" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND214 ,Set/Clear Pending Bit 214" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND213 ,Set/Clear Pending Bit 213" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND212 ,Set/Clear Pending Bit 212" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND211 ,Set/Clear Pending Bit 211" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND210 ,Set/Clear Pending Bit 210" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND209 ,Set/Clear Pending Bit 209" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND208 ,Set/Clear Pending Bit 208" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND207 ,Set/Clear Pending Bit 207" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND206 ,Set/Clear Pending Bit 206" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND205 ,Set/Clear Pending Bit 205" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND204 ,Set/Clear Pending Bit 204" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND203 ,Set/Clear Pending Bit 203" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND202 ,Set/Clear Pending Bit 202" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND201 ,Set/Clear Pending Bit 201" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND200 ,Set/Clear Pending Bit 200" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND199 ,Set/Clear Pending Bit 199" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND198 ,Set/Clear Pending Bit 198" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND197 ,Set/Clear Pending Bit 197" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND196 ,Set/Clear Pending Bit 196" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND195 ,Set/Clear Pending Bit 195" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND194 ,Set/Clear Pending Bit 194" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND193 ,Set/Clear Pending Bit 193" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND192 ,Set/Clear Pending Bit 192" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x0218++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR6,Interrupt Set/Clear Pending Register 6"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x07)
|
|
group.long 0x021C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR7,Interrupt Set/Clear Pending Register 7"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND255 ,Set/Clear Pending Bit 255" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND254 ,Set/Clear Pending Bit 254" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND253 ,Set/Clear Pending Bit 253" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND252 ,Set/Clear Pending Bit 252" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND251 ,Set/Clear Pending Bit 251" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND250 ,Set/Clear Pending Bit 250" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND249 ,Set/Clear Pending Bit 249" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND248 ,Set/Clear Pending Bit 248" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND247 ,Set/Clear Pending Bit 247" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND246 ,Set/Clear Pending Bit 246" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND245 ,Set/Clear Pending Bit 245" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND244 ,Set/Clear Pending Bit 244" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND243 ,Set/Clear Pending Bit 243" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND242 ,Set/Clear Pending Bit 242" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND241 ,Set/Clear Pending Bit 241" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND240 ,Set/Clear Pending Bit 240" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND239 ,Set/Clear Pending Bit 239" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND238 ,Set/Clear Pending Bit 238" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND237 ,Set/Clear Pending Bit 237" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND236 ,Set/Clear Pending Bit 236" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND235 ,Set/Clear Pending Bit 235" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND234 ,Set/Clear Pending Bit 234" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND233 ,Set/Clear Pending Bit 233" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND232 ,Set/Clear Pending Bit 232" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND231 ,Set/Clear Pending Bit 231" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND230 ,Set/Clear Pending Bit 230" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND229 ,Set/Clear Pending Bit 229" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND228 ,Set/Clear Pending Bit 228" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND227 ,Set/Clear Pending Bit 227" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND226 ,Set/Clear Pending Bit 226" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND225 ,Set/Clear Pending Bit 225" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND224 ,Set/Clear Pending Bit 224" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x021C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR7,Interrupt Set/Clear Pending Register 7"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x08)
|
|
group.long 0x0220++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR8,Interrupt Set/Clear Pending Register 8"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND287 ,Set/Clear Pending Bit 287" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND286 ,Set/Clear Pending Bit 286" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND285 ,Set/Clear Pending Bit 285" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND284 ,Set/Clear Pending Bit 284" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND283 ,Set/Clear Pending Bit 283" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND282 ,Set/Clear Pending Bit 282" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND281 ,Set/Clear Pending Bit 281" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND280 ,Set/Clear Pending Bit 280" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND279 ,Set/Clear Pending Bit 279" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND278 ,Set/Clear Pending Bit 278" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND277 ,Set/Clear Pending Bit 277" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND276 ,Set/Clear Pending Bit 276" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND275 ,Set/Clear Pending Bit 275" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND274 ,Set/Clear Pending Bit 274" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND273 ,Set/Clear Pending Bit 273" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND272 ,Set/Clear Pending Bit 272" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND271 ,Set/Clear Pending Bit 271" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND270 ,Set/Clear Pending Bit 270" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND269 ,Set/Clear Pending Bit 269" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND268 ,Set/Clear Pending Bit 268" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND267 ,Set/Clear Pending Bit 267" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND266 ,Set/Clear Pending Bit 266" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND265 ,Set/Clear Pending Bit 265" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND264 ,Set/Clear Pending Bit 264" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND263 ,Set/Clear Pending Bit 263" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND262 ,Set/Clear Pending Bit 262" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND261 ,Set/Clear Pending Bit 261" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND260 ,Set/Clear Pending Bit 260" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND259 ,Set/Clear Pending Bit 259" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND258 ,Set/Clear Pending Bit 258" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND257 ,Set/Clear Pending Bit 257" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND256 ,Set/Clear Pending Bit 256" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x0220++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR8,Interrupt Set/Clear Pending Register 8"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x09)
|
|
group.long 0x0224++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR9,Interrupt Set/Clear Pending Register 9"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND319 ,Set/Clear Pending Bit 319" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND318 ,Set/Clear Pending Bit 318" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND317 ,Set/Clear Pending Bit 317" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND316 ,Set/Clear Pending Bit 316" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND315 ,Set/Clear Pending Bit 315" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND314 ,Set/Clear Pending Bit 314" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND313 ,Set/Clear Pending Bit 313" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND312 ,Set/Clear Pending Bit 312" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND311 ,Set/Clear Pending Bit 311" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND310 ,Set/Clear Pending Bit 310" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND309 ,Set/Clear Pending Bit 309" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND308 ,Set/Clear Pending Bit 308" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND307 ,Set/Clear Pending Bit 307" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND306 ,Set/Clear Pending Bit 306" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND305 ,Set/Clear Pending Bit 305" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND304 ,Set/Clear Pending Bit 304" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND303 ,Set/Clear Pending Bit 303" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND302 ,Set/Clear Pending Bit 302" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND301 ,Set/Clear Pending Bit 301" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND300 ,Set/Clear Pending Bit 300" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND299 ,Set/Clear Pending Bit 299" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND298 ,Set/Clear Pending Bit 298" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND297 ,Set/Clear Pending Bit 297" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND296 ,Set/Clear Pending Bit 296" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND295 ,Set/Clear Pending Bit 295" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND294 ,Set/Clear Pending Bit 294" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND293 ,Set/Clear Pending Bit 293" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND292 ,Set/Clear Pending Bit 292" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND291 ,Set/Clear Pending Bit 291" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND290 ,Set/Clear Pending Bit 290" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND289 ,Set/Clear Pending Bit 289" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND288 ,Set/Clear Pending Bit 288" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x0224++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR9,Interrupt Set/Clear Pending Register 9"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0A)
|
|
group.long 0x0228++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR10,Interrupt Set/Clear Pending Register 10"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND351 ,Set/Clear Pending Bit 351" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND350 ,Set/Clear Pending Bit 350" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND349 ,Set/Clear Pending Bit 349" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND348 ,Set/Clear Pending Bit 348" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND347 ,Set/Clear Pending Bit 347" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND346 ,Set/Clear Pending Bit 346" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND345 ,Set/Clear Pending Bit 345" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND344 ,Set/Clear Pending Bit 344" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND343 ,Set/Clear Pending Bit 343" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND342 ,Set/Clear Pending Bit 342" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND341 ,Set/Clear Pending Bit 341" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND340 ,Set/Clear Pending Bit 340" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND339 ,Set/Clear Pending Bit 339" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND338 ,Set/Clear Pending Bit 338" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND337 ,Set/Clear Pending Bit 337" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND336 ,Set/Clear Pending Bit 336" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND335 ,Set/Clear Pending Bit 335" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND334 ,Set/Clear Pending Bit 334" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND333 ,Set/Clear Pending Bit 333" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND332 ,Set/Clear Pending Bit 332" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND331 ,Set/Clear Pending Bit 331" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND330 ,Set/Clear Pending Bit 330" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND329 ,Set/Clear Pending Bit 329" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND328 ,Set/Clear Pending Bit 328" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND327 ,Set/Clear Pending Bit 327" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND326 ,Set/Clear Pending Bit 326" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND325 ,Set/Clear Pending Bit 325" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND324 ,Set/Clear Pending Bit 324" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND323 ,Set/Clear Pending Bit 323" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND322 ,Set/Clear Pending Bit 322" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND321 ,Set/Clear Pending Bit 321" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND320 ,Set/Clear Pending Bit 320" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x0228++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR10,Interrupt Set/Clear Pending Register 10"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0B)
|
|
group.long 0x022C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR11,Interrupt Set/Clear Pending Register 11"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND383 ,Set/Clear Pending Bit 383" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND382 ,Set/Clear Pending Bit 382" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND381 ,Set/Clear Pending Bit 381" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND380 ,Set/Clear Pending Bit 380" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND379 ,Set/Clear Pending Bit 379" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND378 ,Set/Clear Pending Bit 378" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND377 ,Set/Clear Pending Bit 377" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND376 ,Set/Clear Pending Bit 376" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND375 ,Set/Clear Pending Bit 375" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND374 ,Set/Clear Pending Bit 374" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND373 ,Set/Clear Pending Bit 373" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND372 ,Set/Clear Pending Bit 372" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND371 ,Set/Clear Pending Bit 371" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND370 ,Set/Clear Pending Bit 370" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND369 ,Set/Clear Pending Bit 369" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND368 ,Set/Clear Pending Bit 368" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND367 ,Set/Clear Pending Bit 367" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND366 ,Set/Clear Pending Bit 366" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND365 ,Set/Clear Pending Bit 365" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND364 ,Set/Clear Pending Bit 364" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND363 ,Set/Clear Pending Bit 363" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND362 ,Set/Clear Pending Bit 362" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND361 ,Set/Clear Pending Bit 361" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND360 ,Set/Clear Pending Bit 360" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND359 ,Set/Clear Pending Bit 359" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND358 ,Set/Clear Pending Bit 358" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND357 ,Set/Clear Pending Bit 357" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND356 ,Set/Clear Pending Bit 356" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND355 ,Set/Clear Pending Bit 355" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND354 ,Set/Clear Pending Bit 354" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND353 ,Set/Clear Pending Bit 353" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND352 ,Set/Clear Pending Bit 352" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x022C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR11,Interrupt Set/Clear Pending Register 11"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0C)
|
|
group.long 0x0230++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR12,Interrupt Set/Clear Pending Register 12"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND415 ,Set/Clear Pending Bit 415" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND414 ,Set/Clear Pending Bit 414" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND413 ,Set/Clear Pending Bit 413" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND412 ,Set/Clear Pending Bit 412" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND411 ,Set/Clear Pending Bit 411" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND410 ,Set/Clear Pending Bit 410" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND409 ,Set/Clear Pending Bit 409" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND408 ,Set/Clear Pending Bit 408" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND407 ,Set/Clear Pending Bit 407" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND406 ,Set/Clear Pending Bit 406" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND405 ,Set/Clear Pending Bit 405" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND404 ,Set/Clear Pending Bit 404" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND403 ,Set/Clear Pending Bit 403" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND402 ,Set/Clear Pending Bit 402" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND401 ,Set/Clear Pending Bit 401" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND400 ,Set/Clear Pending Bit 400" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND399 ,Set/Clear Pending Bit 399" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND398 ,Set/Clear Pending Bit 398" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND397 ,Set/Clear Pending Bit 397" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND396 ,Set/Clear Pending Bit 396" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND395 ,Set/Clear Pending Bit 395" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND394 ,Set/Clear Pending Bit 394" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND393 ,Set/Clear Pending Bit 393" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND392 ,Set/Clear Pending Bit 392" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND391 ,Set/Clear Pending Bit 391" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND390 ,Set/Clear Pending Bit 390" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND389 ,Set/Clear Pending Bit 389" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND388 ,Set/Clear Pending Bit 388" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND387 ,Set/Clear Pending Bit 387" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND386 ,Set/Clear Pending Bit 386" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND385 ,Set/Clear Pending Bit 385" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND384 ,Set/Clear Pending Bit 384" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x0230++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR12,Interrupt Set/Clear Pending Register 12"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0D)
|
|
group.long 0x0234++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR13,Interrupt Set/Clear Pending Register 13"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND447 ,Set/Clear Pending Bit 447" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND446 ,Set/Clear Pending Bit 446" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND445 ,Set/Clear Pending Bit 445" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND444 ,Set/Clear Pending Bit 444" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND443 ,Set/Clear Pending Bit 443" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND442 ,Set/Clear Pending Bit 442" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND441 ,Set/Clear Pending Bit 441" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND440 ,Set/Clear Pending Bit 440" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND439 ,Set/Clear Pending Bit 439" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND438 ,Set/Clear Pending Bit 438" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND437 ,Set/Clear Pending Bit 437" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND436 ,Set/Clear Pending Bit 436" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND435 ,Set/Clear Pending Bit 435" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND434 ,Set/Clear Pending Bit 434" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND433 ,Set/Clear Pending Bit 433" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND432 ,Set/Clear Pending Bit 432" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND431 ,Set/Clear Pending Bit 431" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND430 ,Set/Clear Pending Bit 430" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND429 ,Set/Clear Pending Bit 429" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND428 ,Set/Clear Pending Bit 428" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND427 ,Set/Clear Pending Bit 427" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND426 ,Set/Clear Pending Bit 426" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND425 ,Set/Clear Pending Bit 425" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND424 ,Set/Clear Pending Bit 424" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND423 ,Set/Clear Pending Bit 423" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND422 ,Set/Clear Pending Bit 422" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND421 ,Set/Clear Pending Bit 421" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND420 ,Set/Clear Pending Bit 420" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND419 ,Set/Clear Pending Bit 419" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND418 ,Set/Clear Pending Bit 418" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND417 ,Set/Clear Pending Bit 417" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND416 ,Set/Clear Pending Bit 416" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x0234++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR13,Interrupt Set/Clear Pending Register 13"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0E)
|
|
group.long 0x0238++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR14,Interrupt Set/Clear Pending Register 14"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND479 ,Set/Clear Pending Bit 479" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND478 ,Set/Clear Pending Bit 478" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND477 ,Set/Clear Pending Bit 477" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND476 ,Set/Clear Pending Bit 476" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND475 ,Set/Clear Pending Bit 475" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND474 ,Set/Clear Pending Bit 474" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND473 ,Set/Clear Pending Bit 473" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND472 ,Set/Clear Pending Bit 472" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND471 ,Set/Clear Pending Bit 471" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND470 ,Set/Clear Pending Bit 470" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND469 ,Set/Clear Pending Bit 469" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND468 ,Set/Clear Pending Bit 468" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND467 ,Set/Clear Pending Bit 467" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND466 ,Set/Clear Pending Bit 466" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND465 ,Set/Clear Pending Bit 465" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND464 ,Set/Clear Pending Bit 464" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND463 ,Set/Clear Pending Bit 463" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND462 ,Set/Clear Pending Bit 462" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND461 ,Set/Clear Pending Bit 461" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND460 ,Set/Clear Pending Bit 460" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND459 ,Set/Clear Pending Bit 459" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND458 ,Set/Clear Pending Bit 458" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND457 ,Set/Clear Pending Bit 457" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND456 ,Set/Clear Pending Bit 456" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND455 ,Set/Clear Pending Bit 455" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND454 ,Set/Clear Pending Bit 454" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND453 ,Set/Clear Pending Bit 453" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND452 ,Set/Clear Pending Bit 452" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND451 ,Set/Clear Pending Bit 451" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND450 ,Set/Clear Pending Bit 450" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND449 ,Set/Clear Pending Bit 449" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND448 ,Set/Clear Pending Bit 448" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x0238++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR14,Interrupt Set/Clear Pending Register 14"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0F)
|
|
group.long 0x023C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR15,Interrupt Set/Clear Pending Register 15"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND511 ,Set/Clear Pending Bit 511" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND510 ,Set/Clear Pending Bit 510" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND509 ,Set/Clear Pending Bit 509" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND508 ,Set/Clear Pending Bit 508" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND507 ,Set/Clear Pending Bit 507" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND506 ,Set/Clear Pending Bit 506" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND505 ,Set/Clear Pending Bit 505" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND504 ,Set/Clear Pending Bit 504" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND503 ,Set/Clear Pending Bit 503" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND502 ,Set/Clear Pending Bit 502" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND501 ,Set/Clear Pending Bit 501" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND500 ,Set/Clear Pending Bit 500" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND499 ,Set/Clear Pending Bit 499" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND498 ,Set/Clear Pending Bit 498" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND497 ,Set/Clear Pending Bit 497" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND496 ,Set/Clear Pending Bit 496" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND495 ,Set/Clear Pending Bit 495" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND494 ,Set/Clear Pending Bit 494" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND493 ,Set/Clear Pending Bit 493" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND492 ,Set/Clear Pending Bit 492" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND491 ,Set/Clear Pending Bit 491" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND490 ,Set/Clear Pending Bit 490" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND489 ,Set/Clear Pending Bit 489" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND488 ,Set/Clear Pending Bit 488" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND487 ,Set/Clear Pending Bit 487" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND486 ,Set/Clear Pending Bit 486" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND485 ,Set/Clear Pending Bit 485" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND484 ,Set/Clear Pending Bit 484" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND483 ,Set/Clear Pending Bit 483" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND482 ,Set/Clear Pending Bit 482" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND481 ,Set/Clear Pending Bit 481" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND480 ,Set/Clear Pending Bit 480" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x023C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR15,Interrupt Set/Clear Pending Register 15"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x10)
|
|
group.long 0x0240++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR16,Interrupt Set/Clear Pending Register 16"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND543 ,Set/Clear Pending Bit 543" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND542 ,Set/Clear Pending Bit 542" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND541 ,Set/Clear Pending Bit 541" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND540 ,Set/Clear Pending Bit 540" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND539 ,Set/Clear Pending Bit 539" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND538 ,Set/Clear Pending Bit 538" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND537 ,Set/Clear Pending Bit 537" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND536 ,Set/Clear Pending Bit 536" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND535 ,Set/Clear Pending Bit 535" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND534 ,Set/Clear Pending Bit 534" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND533 ,Set/Clear Pending Bit 533" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND532 ,Set/Clear Pending Bit 532" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND531 ,Set/Clear Pending Bit 531" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND530 ,Set/Clear Pending Bit 530" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND529 ,Set/Clear Pending Bit 529" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND528 ,Set/Clear Pending Bit 528" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND527 ,Set/Clear Pending Bit 527" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND526 ,Set/Clear Pending Bit 526" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND525 ,Set/Clear Pending Bit 525" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND524 ,Set/Clear Pending Bit 524" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND523 ,Set/Clear Pending Bit 523" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND522 ,Set/Clear Pending Bit 522" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND521 ,Set/Clear Pending Bit 521" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND520 ,Set/Clear Pending Bit 520" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND519 ,Set/Clear Pending Bit 519" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND518 ,Set/Clear Pending Bit 518" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND517 ,Set/Clear Pending Bit 517" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND516 ,Set/Clear Pending Bit 516" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND515 ,Set/Clear Pending Bit 515" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND514 ,Set/Clear Pending Bit 514" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND513 ,Set/Clear Pending Bit 513" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND512 ,Set/Clear Pending Bit 512" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x0240++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR16,Interrupt Set/Clear Pending Register 16"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x11)
|
|
group.long 0x0244++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR17,Interrupt Set/Clear Pending Register 17"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND575 ,Set/Clear Pending Bit 575" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND574 ,Set/Clear Pending Bit 574" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND573 ,Set/Clear Pending Bit 573" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND572 ,Set/Clear Pending Bit 572" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND571 ,Set/Clear Pending Bit 571" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND570 ,Set/Clear Pending Bit 570" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND569 ,Set/Clear Pending Bit 569" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND568 ,Set/Clear Pending Bit 568" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND567 ,Set/Clear Pending Bit 567" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND566 ,Set/Clear Pending Bit 566" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND565 ,Set/Clear Pending Bit 565" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND564 ,Set/Clear Pending Bit 564" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND563 ,Set/Clear Pending Bit 563" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND562 ,Set/Clear Pending Bit 562" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND561 ,Set/Clear Pending Bit 561" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND560 ,Set/Clear Pending Bit 560" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND559 ,Set/Clear Pending Bit 559" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND558 ,Set/Clear Pending Bit 558" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND557 ,Set/Clear Pending Bit 557" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND556 ,Set/Clear Pending Bit 556" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND555 ,Set/Clear Pending Bit 555" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND554 ,Set/Clear Pending Bit 554" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND553 ,Set/Clear Pending Bit 553" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND552 ,Set/Clear Pending Bit 552" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND551 ,Set/Clear Pending Bit 551" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND550 ,Set/Clear Pending Bit 550" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND549 ,Set/Clear Pending Bit 549" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND548 ,Set/Clear Pending Bit 548" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND547 ,Set/Clear Pending Bit 547" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND546 ,Set/Clear Pending Bit 546" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND545 ,Set/Clear Pending Bit 545" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND544 ,Set/Clear Pending Bit 544" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x0244++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR17,Interrupt Set/Clear Pending Register 17"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x12)
|
|
group.long 0x0248++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR18,Interrupt Set/Clear Pending Register 18"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND607 ,Set/Clear Pending Bit 607" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND606 ,Set/Clear Pending Bit 606" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND605 ,Set/Clear Pending Bit 605" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND604 ,Set/Clear Pending Bit 604" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND603 ,Set/Clear Pending Bit 603" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND602 ,Set/Clear Pending Bit 602" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND601 ,Set/Clear Pending Bit 601" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND600 ,Set/Clear Pending Bit 600" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND599 ,Set/Clear Pending Bit 599" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND598 ,Set/Clear Pending Bit 598" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND597 ,Set/Clear Pending Bit 597" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND596 ,Set/Clear Pending Bit 596" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND595 ,Set/Clear Pending Bit 595" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND594 ,Set/Clear Pending Bit 594" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND593 ,Set/Clear Pending Bit 593" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND592 ,Set/Clear Pending Bit 592" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND591 ,Set/Clear Pending Bit 591" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND590 ,Set/Clear Pending Bit 590" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND589 ,Set/Clear Pending Bit 589" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND588 ,Set/Clear Pending Bit 588" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND587 ,Set/Clear Pending Bit 587" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND586 ,Set/Clear Pending Bit 586" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND585 ,Set/Clear Pending Bit 585" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND584 ,Set/Clear Pending Bit 584" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND583 ,Set/Clear Pending Bit 583" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND582 ,Set/Clear Pending Bit 582" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND581 ,Set/Clear Pending Bit 581" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND580 ,Set/Clear Pending Bit 580" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND579 ,Set/Clear Pending Bit 579" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND578 ,Set/Clear Pending Bit 578" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND577 ,Set/Clear Pending Bit 577" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND576 ,Set/Clear Pending Bit 576" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x0248++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR18,Interrupt Set/Clear Pending Register 18"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x13)
|
|
group.long 0x024C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR19,Interrupt Set/Clear Pending Register 19"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND639 ,Set/Clear Pending Bit 639" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND638 ,Set/Clear Pending Bit 638" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND637 ,Set/Clear Pending Bit 637" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND636 ,Set/Clear Pending Bit 636" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND635 ,Set/Clear Pending Bit 635" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND634 ,Set/Clear Pending Bit 634" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND633 ,Set/Clear Pending Bit 633" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND632 ,Set/Clear Pending Bit 632" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND631 ,Set/Clear Pending Bit 631" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND630 ,Set/Clear Pending Bit 630" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND629 ,Set/Clear Pending Bit 629" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND628 ,Set/Clear Pending Bit 628" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND627 ,Set/Clear Pending Bit 627" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND626 ,Set/Clear Pending Bit 626" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND625 ,Set/Clear Pending Bit 625" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND624 ,Set/Clear Pending Bit 624" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND623 ,Set/Clear Pending Bit 623" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND622 ,Set/Clear Pending Bit 622" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND621 ,Set/Clear Pending Bit 621" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND620 ,Set/Clear Pending Bit 620" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND619 ,Set/Clear Pending Bit 619" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND618 ,Set/Clear Pending Bit 618" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND617 ,Set/Clear Pending Bit 617" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND616 ,Set/Clear Pending Bit 616" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND615 ,Set/Clear Pending Bit 615" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND614 ,Set/Clear Pending Bit 614" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND613 ,Set/Clear Pending Bit 613" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND612 ,Set/Clear Pending Bit 612" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND611 ,Set/Clear Pending Bit 611" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND610 ,Set/Clear Pending Bit 610" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND609 ,Set/Clear Pending Bit 609" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND608 ,Set/Clear Pending Bit 608" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x024C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR19,Interrupt Set/Clear Pending Register 19"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x14)
|
|
group.long 0x0250++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR20,Interrupt Set/Clear Pending Register 20"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND671 ,Set/Clear Pending Bit 671" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND670 ,Set/Clear Pending Bit 670" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND669 ,Set/Clear Pending Bit 669" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND668 ,Set/Clear Pending Bit 668" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND667 ,Set/Clear Pending Bit 667" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND666 ,Set/Clear Pending Bit 666" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND665 ,Set/Clear Pending Bit 665" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND664 ,Set/Clear Pending Bit 664" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND663 ,Set/Clear Pending Bit 663" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND662 ,Set/Clear Pending Bit 662" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND661 ,Set/Clear Pending Bit 661" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND660 ,Set/Clear Pending Bit 660" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND659 ,Set/Clear Pending Bit 659" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND658 ,Set/Clear Pending Bit 658" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND657 ,Set/Clear Pending Bit 657" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND656 ,Set/Clear Pending Bit 656" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND655 ,Set/Clear Pending Bit 655" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND654 ,Set/Clear Pending Bit 654" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND653 ,Set/Clear Pending Bit 653" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND652 ,Set/Clear Pending Bit 652" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND651 ,Set/Clear Pending Bit 651" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND650 ,Set/Clear Pending Bit 650" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND649 ,Set/Clear Pending Bit 649" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND648 ,Set/Clear Pending Bit 648" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND647 ,Set/Clear Pending Bit 647" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND646 ,Set/Clear Pending Bit 646" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND645 ,Set/Clear Pending Bit 645" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND644 ,Set/Clear Pending Bit 644" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND643 ,Set/Clear Pending Bit 643" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND642 ,Set/Clear Pending Bit 642" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND641 ,Set/Clear Pending Bit 641" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND640 ,Set/Clear Pending Bit 640" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x0250++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR20,Interrupt Set/Clear Pending Register 20"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x15)
|
|
group.long 0x0254++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR21,Interrupt Set/Clear Pending Register 21"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND703 ,Set/Clear Pending Bit 703" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND702 ,Set/Clear Pending Bit 702" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND701 ,Set/Clear Pending Bit 701" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND700 ,Set/Clear Pending Bit 700" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND699 ,Set/Clear Pending Bit 699" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND698 ,Set/Clear Pending Bit 698" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND697 ,Set/Clear Pending Bit 697" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND696 ,Set/Clear Pending Bit 696" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND695 ,Set/Clear Pending Bit 695" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND694 ,Set/Clear Pending Bit 694" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND693 ,Set/Clear Pending Bit 693" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND692 ,Set/Clear Pending Bit 692" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND691 ,Set/Clear Pending Bit 691" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND690 ,Set/Clear Pending Bit 690" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND689 ,Set/Clear Pending Bit 689" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND688 ,Set/Clear Pending Bit 688" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND687 ,Set/Clear Pending Bit 687" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND686 ,Set/Clear Pending Bit 686" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND685 ,Set/Clear Pending Bit 685" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND684 ,Set/Clear Pending Bit 684" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND683 ,Set/Clear Pending Bit 683" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND682 ,Set/Clear Pending Bit 682" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND681 ,Set/Clear Pending Bit 681" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND680 ,Set/Clear Pending Bit 680" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND679 ,Set/Clear Pending Bit 679" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND678 ,Set/Clear Pending Bit 678" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND677 ,Set/Clear Pending Bit 677" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND676 ,Set/Clear Pending Bit 676" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND675 ,Set/Clear Pending Bit 675" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND674 ,Set/Clear Pending Bit 674" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND673 ,Set/Clear Pending Bit 673" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND672 ,Set/Clear Pending Bit 672" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x0254++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR21,Interrupt Set/Clear Pending Register 21"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x16)
|
|
group.long 0x0258++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR22,Interrupt Set/Clear Pending Register 22"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND735 ,Set/Clear Pending Bit 735" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND734 ,Set/Clear Pending Bit 734" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND733 ,Set/Clear Pending Bit 733" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND732 ,Set/Clear Pending Bit 732" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND731 ,Set/Clear Pending Bit 731" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND730 ,Set/Clear Pending Bit 730" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND729 ,Set/Clear Pending Bit 729" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND728 ,Set/Clear Pending Bit 728" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND727 ,Set/Clear Pending Bit 727" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND726 ,Set/Clear Pending Bit 726" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND725 ,Set/Clear Pending Bit 725" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND724 ,Set/Clear Pending Bit 724" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND723 ,Set/Clear Pending Bit 723" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND722 ,Set/Clear Pending Bit 722" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND721 ,Set/Clear Pending Bit 721" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND720 ,Set/Clear Pending Bit 720" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND719 ,Set/Clear Pending Bit 719" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND718 ,Set/Clear Pending Bit 718" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND717 ,Set/Clear Pending Bit 717" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND716 ,Set/Clear Pending Bit 716" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND715 ,Set/Clear Pending Bit 715" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND714 ,Set/Clear Pending Bit 714" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND713 ,Set/Clear Pending Bit 713" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND712 ,Set/Clear Pending Bit 712" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND711 ,Set/Clear Pending Bit 711" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND710 ,Set/Clear Pending Bit 710" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND709 ,Set/Clear Pending Bit 709" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND708 ,Set/Clear Pending Bit 708" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND707 ,Set/Clear Pending Bit 707" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND706 ,Set/Clear Pending Bit 706" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND705 ,Set/Clear Pending Bit 705" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND704 ,Set/Clear Pending Bit 704" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x0258++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR22,Interrupt Set/Clear Pending Register 22"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x17)
|
|
group.long 0x025C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR23,Interrupt Set/Clear Pending Register 23"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND767 ,Set/Clear Pending Bit 767" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND766 ,Set/Clear Pending Bit 766" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND765 ,Set/Clear Pending Bit 765" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND764 ,Set/Clear Pending Bit 764" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND763 ,Set/Clear Pending Bit 763" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND762 ,Set/Clear Pending Bit 762" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND761 ,Set/Clear Pending Bit 761" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND760 ,Set/Clear Pending Bit 760" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND759 ,Set/Clear Pending Bit 759" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND758 ,Set/Clear Pending Bit 758" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND757 ,Set/Clear Pending Bit 757" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND756 ,Set/Clear Pending Bit 756" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND755 ,Set/Clear Pending Bit 755" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND754 ,Set/Clear Pending Bit 754" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND753 ,Set/Clear Pending Bit 753" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND752 ,Set/Clear Pending Bit 752" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND751 ,Set/Clear Pending Bit 751" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND750 ,Set/Clear Pending Bit 750" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND749 ,Set/Clear Pending Bit 749" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND748 ,Set/Clear Pending Bit 748" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND747 ,Set/Clear Pending Bit 747" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND746 ,Set/Clear Pending Bit 746" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND745 ,Set/Clear Pending Bit 745" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND744 ,Set/Clear Pending Bit 744" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND743 ,Set/Clear Pending Bit 743" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND742 ,Set/Clear Pending Bit 742" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND741 ,Set/Clear Pending Bit 741" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND740 ,Set/Clear Pending Bit 740" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND739 ,Set/Clear Pending Bit 739" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND738 ,Set/Clear Pending Bit 738" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND737 ,Set/Clear Pending Bit 737" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND736 ,Set/Clear Pending Bit 736" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x025C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR23,Interrupt Set/Clear Pending Register 23"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x18)
|
|
group.long 0x0260++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR24,Interrupt Set/Clear Pending Register 24"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND799 ,Set/Clear Pending Bit 799" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND798 ,Set/Clear Pending Bit 798" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND797 ,Set/Clear Pending Bit 797" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND796 ,Set/Clear Pending Bit 796" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND795 ,Set/Clear Pending Bit 795" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND794 ,Set/Clear Pending Bit 794" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND793 ,Set/Clear Pending Bit 793" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND792 ,Set/Clear Pending Bit 792" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND791 ,Set/Clear Pending Bit 791" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND790 ,Set/Clear Pending Bit 790" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND789 ,Set/Clear Pending Bit 789" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND788 ,Set/Clear Pending Bit 788" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND787 ,Set/Clear Pending Bit 787" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND786 ,Set/Clear Pending Bit 786" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND785 ,Set/Clear Pending Bit 785" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND784 ,Set/Clear Pending Bit 784" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND783 ,Set/Clear Pending Bit 783" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND782 ,Set/Clear Pending Bit 782" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND781 ,Set/Clear Pending Bit 781" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND780 ,Set/Clear Pending Bit 780" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND779 ,Set/Clear Pending Bit 779" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND778 ,Set/Clear Pending Bit 778" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND777 ,Set/Clear Pending Bit 777" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND776 ,Set/Clear Pending Bit 776" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND775 ,Set/Clear Pending Bit 775" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND774 ,Set/Clear Pending Bit 774" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND773 ,Set/Clear Pending Bit 773" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND772 ,Set/Clear Pending Bit 772" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND771 ,Set/Clear Pending Bit 771" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND770 ,Set/Clear Pending Bit 770" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND769 ,Set/Clear Pending Bit 769" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND768 ,Set/Clear Pending Bit 768" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x0260++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR24,Interrupt Set/Clear Pending Register 24"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x19)
|
|
group.long 0x0264++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR25,Interrupt Set/Clear Pending Register 25"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND831 ,Set/Clear Pending Bit 831" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND830 ,Set/Clear Pending Bit 830" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND829 ,Set/Clear Pending Bit 829" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND828 ,Set/Clear Pending Bit 828" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND827 ,Set/Clear Pending Bit 827" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND826 ,Set/Clear Pending Bit 826" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND825 ,Set/Clear Pending Bit 825" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND824 ,Set/Clear Pending Bit 824" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND823 ,Set/Clear Pending Bit 823" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND822 ,Set/Clear Pending Bit 822" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND821 ,Set/Clear Pending Bit 821" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND820 ,Set/Clear Pending Bit 820" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND819 ,Set/Clear Pending Bit 819" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND818 ,Set/Clear Pending Bit 818" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND817 ,Set/Clear Pending Bit 817" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND816 ,Set/Clear Pending Bit 816" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND815 ,Set/Clear Pending Bit 815" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND814 ,Set/Clear Pending Bit 814" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND813 ,Set/Clear Pending Bit 813" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND812 ,Set/Clear Pending Bit 812" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND811 ,Set/Clear Pending Bit 811" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND810 ,Set/Clear Pending Bit 810" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND809 ,Set/Clear Pending Bit 809" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND808 ,Set/Clear Pending Bit 808" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND807 ,Set/Clear Pending Bit 807" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND806 ,Set/Clear Pending Bit 806" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND805 ,Set/Clear Pending Bit 805" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND804 ,Set/Clear Pending Bit 804" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND803 ,Set/Clear Pending Bit 803" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND802 ,Set/Clear Pending Bit 802" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND801 ,Set/Clear Pending Bit 801" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND800 ,Set/Clear Pending Bit 800" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x0264++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR25,Interrupt Set/Clear Pending Register 25"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1A)
|
|
group.long 0x0268++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR26,Interrupt Set/Clear Pending Register 26"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND863 ,Set/Clear Pending Bit 863" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND862 ,Set/Clear Pending Bit 862" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND861 ,Set/Clear Pending Bit 861" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND860 ,Set/Clear Pending Bit 860" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND859 ,Set/Clear Pending Bit 859" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND858 ,Set/Clear Pending Bit 858" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND857 ,Set/Clear Pending Bit 857" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND856 ,Set/Clear Pending Bit 856" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND855 ,Set/Clear Pending Bit 855" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND854 ,Set/Clear Pending Bit 854" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND853 ,Set/Clear Pending Bit 853" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND852 ,Set/Clear Pending Bit 852" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND851 ,Set/Clear Pending Bit 851" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND850 ,Set/Clear Pending Bit 850" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND849 ,Set/Clear Pending Bit 849" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND848 ,Set/Clear Pending Bit 848" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND847 ,Set/Clear Pending Bit 847" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND846 ,Set/Clear Pending Bit 846" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND845 ,Set/Clear Pending Bit 845" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND844 ,Set/Clear Pending Bit 844" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND843 ,Set/Clear Pending Bit 843" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND842 ,Set/Clear Pending Bit 842" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND841 ,Set/Clear Pending Bit 841" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND840 ,Set/Clear Pending Bit 840" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND839 ,Set/Clear Pending Bit 839" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND838 ,Set/Clear Pending Bit 838" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND837 ,Set/Clear Pending Bit 837" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND836 ,Set/Clear Pending Bit 836" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND835 ,Set/Clear Pending Bit 835" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND834 ,Set/Clear Pending Bit 834" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND833 ,Set/Clear Pending Bit 833" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND832 ,Set/Clear Pending Bit 832" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x0268++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR26,Interrupt Set/Clear Pending Register 26"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1B)
|
|
group.long 0x026C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR27,Interrupt Set/Clear Pending Register 27"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND895 ,Set/Clear Pending Bit 895" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND894 ,Set/Clear Pending Bit 894" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND893 ,Set/Clear Pending Bit 893" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND892 ,Set/Clear Pending Bit 892" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND891 ,Set/Clear Pending Bit 891" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND890 ,Set/Clear Pending Bit 890" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND889 ,Set/Clear Pending Bit 889" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND888 ,Set/Clear Pending Bit 888" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND887 ,Set/Clear Pending Bit 887" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND886 ,Set/Clear Pending Bit 886" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND885 ,Set/Clear Pending Bit 885" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND884 ,Set/Clear Pending Bit 884" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND883 ,Set/Clear Pending Bit 883" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND882 ,Set/Clear Pending Bit 882" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND881 ,Set/Clear Pending Bit 881" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND880 ,Set/Clear Pending Bit 880" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND879 ,Set/Clear Pending Bit 879" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND878 ,Set/Clear Pending Bit 878" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND877 ,Set/Clear Pending Bit 877" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND876 ,Set/Clear Pending Bit 876" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND875 ,Set/Clear Pending Bit 875" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND874 ,Set/Clear Pending Bit 874" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND873 ,Set/Clear Pending Bit 873" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND872 ,Set/Clear Pending Bit 872" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND871 ,Set/Clear Pending Bit 871" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND870 ,Set/Clear Pending Bit 870" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND869 ,Set/Clear Pending Bit 869" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND868 ,Set/Clear Pending Bit 868" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND867 ,Set/Clear Pending Bit 867" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND866 ,Set/Clear Pending Bit 866" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND865 ,Set/Clear Pending Bit 865" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND864 ,Set/Clear Pending Bit 864" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x026C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR27,Interrupt Set/Clear Pending Register 27"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1C)
|
|
group.long 0x0270++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR28,Interrupt Set/Clear Pending Register 28"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND927 ,Set/Clear Pending Bit 927" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND926 ,Set/Clear Pending Bit 926" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND925 ,Set/Clear Pending Bit 925" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND924 ,Set/Clear Pending Bit 924" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND923 ,Set/Clear Pending Bit 923" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND922 ,Set/Clear Pending Bit 922" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND921 ,Set/Clear Pending Bit 921" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND920 ,Set/Clear Pending Bit 920" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND919 ,Set/Clear Pending Bit 919" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND918 ,Set/Clear Pending Bit 918" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND917 ,Set/Clear Pending Bit 917" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND916 ,Set/Clear Pending Bit 916" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND915 ,Set/Clear Pending Bit 915" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND914 ,Set/Clear Pending Bit 914" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND913 ,Set/Clear Pending Bit 913" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND912 ,Set/Clear Pending Bit 912" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND911 ,Set/Clear Pending Bit 911" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND910 ,Set/Clear Pending Bit 910" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND909 ,Set/Clear Pending Bit 909" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND908 ,Set/Clear Pending Bit 908" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND907 ,Set/Clear Pending Bit 907" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND906 ,Set/Clear Pending Bit 906" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND905 ,Set/Clear Pending Bit 905" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND904 ,Set/Clear Pending Bit 904" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND903 ,Set/Clear Pending Bit 903" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND902 ,Set/Clear Pending Bit 902" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND901 ,Set/Clear Pending Bit 901" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND900 ,Set/Clear Pending Bit 900" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND899 ,Set/Clear Pending Bit 899" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND898 ,Set/Clear Pending Bit 898" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND897 ,Set/Clear Pending Bit 897" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND896 ,Set/Clear Pending Bit 896" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x0270++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR28,Interrupt Set/Clear Pending Register 28"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1D)
|
|
group.long 0x0274++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR29,Interrupt Set/Clear Pending Register 29"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND959 ,Set/Clear Pending Bit 959" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND958 ,Set/Clear Pending Bit 958" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND957 ,Set/Clear Pending Bit 957" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND956 ,Set/Clear Pending Bit 956" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND955 ,Set/Clear Pending Bit 955" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND954 ,Set/Clear Pending Bit 954" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND953 ,Set/Clear Pending Bit 953" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND952 ,Set/Clear Pending Bit 952" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND951 ,Set/Clear Pending Bit 951" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND950 ,Set/Clear Pending Bit 950" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND949 ,Set/Clear Pending Bit 949" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND948 ,Set/Clear Pending Bit 948" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND947 ,Set/Clear Pending Bit 947" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND946 ,Set/Clear Pending Bit 946" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND945 ,Set/Clear Pending Bit 945" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND944 ,Set/Clear Pending Bit 944" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND943 ,Set/Clear Pending Bit 943" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND942 ,Set/Clear Pending Bit 942" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND941 ,Set/Clear Pending Bit 941" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND940 ,Set/Clear Pending Bit 940" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND939 ,Set/Clear Pending Bit 939" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND938 ,Set/Clear Pending Bit 938" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND937 ,Set/Clear Pending Bit 937" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND936 ,Set/Clear Pending Bit 936" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND935 ,Set/Clear Pending Bit 935" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND934 ,Set/Clear Pending Bit 934" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND933 ,Set/Clear Pending Bit 933" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND932 ,Set/Clear Pending Bit 932" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND931 ,Set/Clear Pending Bit 931" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND930 ,Set/Clear Pending Bit 930" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND929 ,Set/Clear Pending Bit 929" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND928 ,Set/Clear Pending Bit 928" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x0274++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR29,Interrupt Set/Clear Pending Register 29"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1E)
|
|
group.long 0x0278++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR30,Interrupt Set/Clear Pending Register 30"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND991 ,Set/Clear Pending Bit 991" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND990 ,Set/Clear Pending Bit 990" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND989 ,Set/Clear Pending Bit 989" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND988 ,Set/Clear Pending Bit 988" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND987 ,Set/Clear Pending Bit 987" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND986 ,Set/Clear Pending Bit 986" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND985 ,Set/Clear Pending Bit 985" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND984 ,Set/Clear Pending Bit 984" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND983 ,Set/Clear Pending Bit 983" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND982 ,Set/Clear Pending Bit 982" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND981 ,Set/Clear Pending Bit 981" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND980 ,Set/Clear Pending Bit 980" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND979 ,Set/Clear Pending Bit 979" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND978 ,Set/Clear Pending Bit 978" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND977 ,Set/Clear Pending Bit 977" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND976 ,Set/Clear Pending Bit 976" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND975 ,Set/Clear Pending Bit 975" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND974 ,Set/Clear Pending Bit 974" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND973 ,Set/Clear Pending Bit 973" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND972 ,Set/Clear Pending Bit 972" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND971 ,Set/Clear Pending Bit 971" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND970 ,Set/Clear Pending Bit 970" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND969 ,Set/Clear Pending Bit 969" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND968 ,Set/Clear Pending Bit 968" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND967 ,Set/Clear Pending Bit 967" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND966 ,Set/Clear Pending Bit 966" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND965 ,Set/Clear Pending Bit 965" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND964 ,Set/Clear Pending Bit 964" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND963 ,Set/Clear Pending Bit 963" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND962 ,Set/Clear Pending Bit 962" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND961 ,Set/Clear Pending Bit 961" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND960 ,Set/Clear Pending Bit 960" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x0278++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR30,Interrupt Set/Clear Pending Register 30"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)==0x1F)
|
|
group.long 0x027C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR31,Interrupt Set/Clear Pending Register 31"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND1019 ,Set/Clear Pending Bit 1019" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND1018 ,Set/Clear Pending Bit 1018" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND1017 ,Set/Clear Pending Bit 1017" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND1016 ,Set/Clear Pending Bit 1016" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND1015 ,Set/Clear Pending Bit 1015" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND1014 ,Set/Clear Pending Bit 1014" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND1013 ,Set/Clear Pending Bit 1013" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND1012 ,Set/Clear Pending Bit 1012" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND1011 ,Set/Clear Pending Bit 1011" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND1010 ,Set/Clear Pending Bit 1010" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND1009 ,Set/Clear Pending Bit 1009" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND1008 ,Set/Clear Pending Bit 1008" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND1007 ,Set/Clear Pending Bit 1007" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND1006 ,Set/Clear Pending Bit 1006" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND1005 ,Set/Clear Pending Bit 1005" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND1004 ,Set/Clear Pending Bit 1004" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND1003 ,Set/Clear Pending Bit 1003" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND1002 ,Set/Clear Pending Bit 1002" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND1001 ,Set/Clear Pending Bit 1001" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND1000 ,Set/Clear Pending Bit 1000" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND999 ,Set/Clear Pending Bit 999" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND998 ,Set/Clear Pending Bit 998" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND997 ,Set/Clear Pending Bit 997" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND996 ,Set/Clear Pending Bit 996" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND995 ,Set/Clear Pending Bit 995" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND994 ,Set/Clear Pending Bit 994" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND993 ,Set/Clear Pending Bit 993" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND992 ,Set/Clear Pending Bit 992" "Not pending,Pending"
|
|
else
|
|
rgroup.long 0x027C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_PENDR31,Interrupt Set/Clear Pending Register 31"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 24.
|
|
tree "Set/Clear Active Registers"
|
|
if (((per.l(ad:0x7d001000+0x08))&0xFF000000)==(0x0000000||0x1000000))
|
|
rgroup.long 0x0300++0x03
|
|
line.long 0x0 "GICD_ICDABR0,Active Status Register 0"
|
|
bitfld.long 0x00 31. " ASB31 ,Active Status Bit 31" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB30 ,Active Status Bit 30" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB29 ,Active Status Bit 29" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB28 ,Active Status Bit 28" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB27 ,Active Status Bit 27" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB26 ,Active Status Bit 26" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB25 ,Active Status Bit 25" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB24 ,Active Status Bit 24" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB23 ,Active Status Bit 23" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB22 ,Active Status Bit 22" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB21 ,Active Status Bit 21" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB20 ,Active Status Bit 20" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB19 ,Active Status Bit 19" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB18 ,Active Status Bit 18" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB17 ,Active Status Bit 17" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB16 ,Active Status Bit 16" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB15 ,Active Status Bit 15" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB14 ,Active Status Bit 14" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB13 ,Active Status Bit 13" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB12 ,Active Status Bit 12" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB11 ,Active Status Bit 11" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB10 ,Active Status Bit 10" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB9 ,Active Status Bit 9" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB8 ,Active Status Bit 8" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB7 ,Active Status Bit 7" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB6 ,Active Status Bit 6" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB5 ,Active Status Bit 5" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB4 ,Active Status Bit 4" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB3 ,Active Status Bit 3" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB2 ,Active Status Bit 2" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB1 ,Active Status Bit 1" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB0 ,Active Status Bit 0" "Not active,Active"
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x01)
|
|
rgroup.long 0x0304++0x03
|
|
line.long 0x0 "GICD_ICDABR1,Active Status Register 1"
|
|
bitfld.long 0x00 31. " ASB63 ,Active Status Bit 63" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB62 ,Active Status Bit 62" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB61 ,Active Status Bit 61" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB60 ,Active Status Bit 60" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB59 ,Active Status Bit 59" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB58 ,Active Status Bit 58" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB57 ,Active Status Bit 57" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB56 ,Active Status Bit 56" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB55 ,Active Status Bit 55" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB54 ,Active Status Bit 54" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB53 ,Active Status Bit 53" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB52 ,Active Status Bit 52" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB51 ,Active Status Bit 51" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB50 ,Active Status Bit 50" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB49 ,Active Status Bit 49" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB48 ,Active Status Bit 48" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB47 ,Active Status Bit 47" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB46 ,Active Status Bit 46" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB45 ,Active Status Bit 45" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB44 ,Active Status Bit 44" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB43 ,Active Status Bit 43" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB42 ,Active Status Bit 42" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB41 ,Active Status Bit 41" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB40 ,Active Status Bit 40" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB39 ,Active Status Bit 39" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB38 ,Active Status Bit 38" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB37 ,Active Status Bit 37" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB36 ,Active Status Bit 36" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB35 ,Active Status Bit 35" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB34 ,Active Status Bit 34" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB33 ,Active Status Bit 33" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB32 ,Active Status Bit 32" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0304++0x03
|
|
line.long 0x0 "GICD_ICDABR1,Active Status Register 1"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x02)
|
|
rgroup.long 0x0308++0x03
|
|
line.long 0x0 "GICD_ICDABR2,Active Status Register 2"
|
|
bitfld.long 0x00 31. " ASB95 ,Active Status Bit 95" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB94 ,Active Status Bit 94" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB93 ,Active Status Bit 93" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB92 ,Active Status Bit 92" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB91 ,Active Status Bit 91" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB90 ,Active Status Bit 90" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB89 ,Active Status Bit 89" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB88 ,Active Status Bit 88" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB87 ,Active Status Bit 87" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB86 ,Active Status Bit 86" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB85 ,Active Status Bit 85" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB84 ,Active Status Bit 84" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB83 ,Active Status Bit 83" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB82 ,Active Status Bit 82" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB81 ,Active Status Bit 81" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB80 ,Active Status Bit 80" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB79 ,Active Status Bit 79" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB78 ,Active Status Bit 78" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB77 ,Active Status Bit 77" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB76 ,Active Status Bit 76" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB75 ,Active Status Bit 75" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB74 ,Active Status Bit 74" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB73 ,Active Status Bit 73" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB72 ,Active Status Bit 72" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB71 ,Active Status Bit 71" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB70 ,Active Status Bit 70" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB69 ,Active Status Bit 69" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB68 ,Active Status Bit 68" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB67 ,Active Status Bit 67" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB66 ,Active Status Bit 66" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB65 ,Active Status Bit 65" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB64 ,Active Status Bit 64" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0308++0x03
|
|
line.long 0x0 "GICD_ICDABR2,Active Status Register 2"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x03)
|
|
rgroup.long 0x030C++0x03
|
|
line.long 0x0 "GICD_ICDABR3,Active Status Register 3"
|
|
bitfld.long 0x00 31. " ASB127 ,Active Status Bit 127" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB126 ,Active Status Bit 126" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB125 ,Active Status Bit 125" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB124 ,Active Status Bit 124" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB123 ,Active Status Bit 123" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB122 ,Active Status Bit 122" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB121 ,Active Status Bit 121" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB120 ,Active Status Bit 120" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB119 ,Active Status Bit 119" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB118 ,Active Status Bit 118" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB117 ,Active Status Bit 117" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB116 ,Active Status Bit 116" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB115 ,Active Status Bit 115" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB114 ,Active Status Bit 114" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB113 ,Active Status Bit 113" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB112 ,Active Status Bit 112" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB111 ,Active Status Bit 111" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB110 ,Active Status Bit 110" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB109 ,Active Status Bit 109" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB108 ,Active Status Bit 108" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB107 ,Active Status Bit 107" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB106 ,Active Status Bit 106" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB105 ,Active Status Bit 105" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB104 ,Active Status Bit 104" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB103 ,Active Status Bit 103" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB102 ,Active Status Bit 102" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB101 ,Active Status Bit 101" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB100 ,Active Status Bit 100" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB99 ,Active Status Bit 99" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB98 ,Active Status Bit 98" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB97 ,Active Status Bit 97" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB96 ,Active Status Bit 96" "Not active,Active"
|
|
else
|
|
rgroup.long 0x030C++0x03
|
|
line.long 0x0 "GICD_ICDABR3,Active Status Register 3"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x04)
|
|
rgroup.long 0x0310++0x03
|
|
line.long 0x0 "GICD_ICDABR4,Active Status Register 4"
|
|
bitfld.long 0x00 31. " ASB159 ,Active Status Bit 159" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB158 ,Active Status Bit 158" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB157 ,Active Status Bit 157" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB156 ,Active Status Bit 156" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB155 ,Active Status Bit 155" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB154 ,Active Status Bit 154" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB153 ,Active Status Bit 153" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB152 ,Active Status Bit 152" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB151 ,Active Status Bit 151" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB150 ,Active Status Bit 150" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB149 ,Active Status Bit 149" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB148 ,Active Status Bit 148" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB147 ,Active Status Bit 147" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB146 ,Active Status Bit 146" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB145 ,Active Status Bit 145" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB144 ,Active Status Bit 144" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB143 ,Active Status Bit 143" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB142 ,Active Status Bit 142" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB141 ,Active Status Bit 141" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB140 ,Active Status Bit 140" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB139 ,Active Status Bit 139" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB138 ,Active Status Bit 138" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB137 ,Active Status Bit 137" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB136 ,Active Status Bit 136" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB135 ,Active Status Bit 135" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB134 ,Active Status Bit 134" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB133 ,Active Status Bit 133" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB132 ,Active Status Bit 132" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB131 ,Active Status Bit 131" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB130 ,Active Status Bit 130" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB129 ,Active Status Bit 129" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB128 ,Active Status Bit 128" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0310++0x03
|
|
line.long 0x0 "GICD_ICDABR4,Active Status Register 4"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x05)
|
|
rgroup.long 0x0314++0x03
|
|
line.long 0x0 "GICD_ICDABR5,Active Status Register 5"
|
|
bitfld.long 0x00 31. " ASB191 ,Active Status Bit 191" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB190 ,Active Status Bit 190" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB189 ,Active Status Bit 189" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB188 ,Active Status Bit 188" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB187 ,Active Status Bit 187" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB186 ,Active Status Bit 186" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB185 ,Active Status Bit 185" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB184 ,Active Status Bit 184" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB183 ,Active Status Bit 183" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB182 ,Active Status Bit 182" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB181 ,Active Status Bit 181" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB180 ,Active Status Bit 180" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB179 ,Active Status Bit 179" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB178 ,Active Status Bit 178" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB177 ,Active Status Bit 177" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB176 ,Active Status Bit 176" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB175 ,Active Status Bit 175" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB174 ,Active Status Bit 174" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB173 ,Active Status Bit 173" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB172 ,Active Status Bit 172" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB171 ,Active Status Bit 171" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB170 ,Active Status Bit 170" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB169 ,Active Status Bit 169" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB168 ,Active Status Bit 168" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB167 ,Active Status Bit 167" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB166 ,Active Status Bit 166" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB165 ,Active Status Bit 165" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB164 ,Active Status Bit 164" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB163 ,Active Status Bit 163" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB162 ,Active Status Bit 162" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB161 ,Active Status Bit 161" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB160 ,Active Status Bit 160" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0314++0x03
|
|
line.long 0x0 "GICD_ICDABR5,Active Status Register 5"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x06)
|
|
rgroup.long 0x0318++0x03
|
|
line.long 0x0 "GICD_ICDABR6,Active Status Register 6"
|
|
bitfld.long 0x00 31. " ASB223 ,Active Status Bit 223" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB222 ,Active Status Bit 222" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB221 ,Active Status Bit 221" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB220 ,Active Status Bit 220" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB219 ,Active Status Bit 219" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB218 ,Active Status Bit 218" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB217 ,Active Status Bit 217" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB216 ,Active Status Bit 216" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB215 ,Active Status Bit 215" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB214 ,Active Status Bit 214" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB213 ,Active Status Bit 213" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB212 ,Active Status Bit 212" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB211 ,Active Status Bit 211" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB210 ,Active Status Bit 210" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB209 ,Active Status Bit 209" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB208 ,Active Status Bit 208" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB207 ,Active Status Bit 207" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB206 ,Active Status Bit 206" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB205 ,Active Status Bit 205" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB204 ,Active Status Bit 204" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB203 ,Active Status Bit 203" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB202 ,Active Status Bit 202" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB201 ,Active Status Bit 201" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB200 ,Active Status Bit 200" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB199 ,Active Status Bit 199" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB198 ,Active Status Bit 198" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB197 ,Active Status Bit 197" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB196 ,Active Status Bit 196" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB195 ,Active Status Bit 195" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB194 ,Active Status Bit 194" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB193 ,Active Status Bit 193" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB192 ,Active Status Bit 192" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0318++0x03
|
|
line.long 0x0 "GICD_ICDABR6,Active Status Register 6"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x07)
|
|
rgroup.long 0x031C++0x03
|
|
line.long 0x0 "GICD_ICDABR7,Active Status Register 7"
|
|
bitfld.long 0x00 31. " ASB255 ,Active Status Bit 255" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB254 ,Active Status Bit 254" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB253 ,Active Status Bit 253" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB252 ,Active Status Bit 252" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB251 ,Active Status Bit 251" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB250 ,Active Status Bit 250" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB249 ,Active Status Bit 249" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB248 ,Active Status Bit 248" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB247 ,Active Status Bit 247" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB246 ,Active Status Bit 246" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB245 ,Active Status Bit 245" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB244 ,Active Status Bit 244" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB243 ,Active Status Bit 243" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB242 ,Active Status Bit 242" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB241 ,Active Status Bit 241" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB240 ,Active Status Bit 240" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB239 ,Active Status Bit 239" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB238 ,Active Status Bit 238" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB237 ,Active Status Bit 237" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB236 ,Active Status Bit 236" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB235 ,Active Status Bit 235" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB234 ,Active Status Bit 234" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB233 ,Active Status Bit 233" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB232 ,Active Status Bit 232" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB231 ,Active Status Bit 231" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB230 ,Active Status Bit 230" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB229 ,Active Status Bit 229" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB228 ,Active Status Bit 228" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB227 ,Active Status Bit 227" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB226 ,Active Status Bit 226" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB225 ,Active Status Bit 225" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB224 ,Active Status Bit 224" "Not active,Active"
|
|
else
|
|
rgroup.long 0x031C++0x03
|
|
line.long 0x0 "GICD_ICDABR7,Active Status Register 7"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x08)
|
|
rgroup.long 0x0320++0x03
|
|
line.long 0x0 "GICD_ICDABR8,Active Status Register 8"
|
|
bitfld.long 0x00 31. " ASB287 ,Active Status Bit 287" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB286 ,Active Status Bit 286" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB285 ,Active Status Bit 285" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB284 ,Active Status Bit 284" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB283 ,Active Status Bit 283" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB282 ,Active Status Bit 282" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB281 ,Active Status Bit 281" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB280 ,Active Status Bit 280" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB279 ,Active Status Bit 279" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB278 ,Active Status Bit 278" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB277 ,Active Status Bit 277" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB276 ,Active Status Bit 276" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB275 ,Active Status Bit 275" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB274 ,Active Status Bit 274" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB273 ,Active Status Bit 273" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB272 ,Active Status Bit 272" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB271 ,Active Status Bit 271" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB270 ,Active Status Bit 270" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB269 ,Active Status Bit 269" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB268 ,Active Status Bit 268" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB267 ,Active Status Bit 267" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB266 ,Active Status Bit 266" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB265 ,Active Status Bit 265" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB264 ,Active Status Bit 264" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB263 ,Active Status Bit 263" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB262 ,Active Status Bit 262" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB261 ,Active Status Bit 261" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB260 ,Active Status Bit 260" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB259 ,Active Status Bit 259" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB258 ,Active Status Bit 258" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB257 ,Active Status Bit 257" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB256 ,Active Status Bit 256" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0320++0x03
|
|
line.long 0x0 "GICD_ICDABR8,Active Status Register 8"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x09)
|
|
rgroup.long 0x0324++0x03
|
|
line.long 0x0 "GICD_ICDABR9,Active Status Register 9"
|
|
bitfld.long 0x00 31. " ASB319 ,Active Status Bit 319" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB318 ,Active Status Bit 318" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB317 ,Active Status Bit 317" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB316 ,Active Status Bit 316" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB315 ,Active Status Bit 315" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB314 ,Active Status Bit 314" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB313 ,Active Status Bit 313" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB312 ,Active Status Bit 312" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB311 ,Active Status Bit 311" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB310 ,Active Status Bit 310" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB309 ,Active Status Bit 309" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB308 ,Active Status Bit 308" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB307 ,Active Status Bit 307" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB306 ,Active Status Bit 306" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB305 ,Active Status Bit 305" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB304 ,Active Status Bit 304" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB303 ,Active Status Bit 303" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB302 ,Active Status Bit 302" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB301 ,Active Status Bit 301" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB300 ,Active Status Bit 300" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB299 ,Active Status Bit 299" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB298 ,Active Status Bit 298" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB297 ,Active Status Bit 297" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB296 ,Active Status Bit 296" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB295 ,Active Status Bit 295" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB294 ,Active Status Bit 294" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB293 ,Active Status Bit 293" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB292 ,Active Status Bit 292" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB291 ,Active Status Bit 291" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB290 ,Active Status Bit 290" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB289 ,Active Status Bit 289" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB288 ,Active Status Bit 288" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0324++0x03
|
|
line.long 0x0 "GICD_ICDABR9,Active Status Register 9"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0A)
|
|
rgroup.long 0x0328++0x03
|
|
line.long 0x0 "GICD_ICDABR10,Active Status Register 10"
|
|
bitfld.long 0x00 31. " ASB351 ,Active Status Bit 351" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB350 ,Active Status Bit 350" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB349 ,Active Status Bit 349" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB348 ,Active Status Bit 348" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB347 ,Active Status Bit 347" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB346 ,Active Status Bit 346" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB345 ,Active Status Bit 345" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB344 ,Active Status Bit 344" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB343 ,Active Status Bit 343" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB342 ,Active Status Bit 342" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB341 ,Active Status Bit 341" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB340 ,Active Status Bit 340" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB339 ,Active Status Bit 339" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB338 ,Active Status Bit 338" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB337 ,Active Status Bit 337" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB336 ,Active Status Bit 336" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB335 ,Active Status Bit 335" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB334 ,Active Status Bit 334" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB333 ,Active Status Bit 333" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB332 ,Active Status Bit 332" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB331 ,Active Status Bit 331" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB330 ,Active Status Bit 330" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB329 ,Active Status Bit 329" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB328 ,Active Status Bit 328" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB327 ,Active Status Bit 327" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB326 ,Active Status Bit 326" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB325 ,Active Status Bit 325" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB324 ,Active Status Bit 324" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB323 ,Active Status Bit 323" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB322 ,Active Status Bit 322" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB321 ,Active Status Bit 321" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB320 ,Active Status Bit 320" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0328++0x03
|
|
line.long 0x0 "GICD_ICDABR10,Active Status Register 10"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0B)
|
|
rgroup.long 0x032C++0x03
|
|
line.long 0x0 "GICD_ICDABR11,Active Status Register 11"
|
|
bitfld.long 0x00 31. " ASB383 ,Active Status Bit 383" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB382 ,Active Status Bit 382" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB381 ,Active Status Bit 381" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB380 ,Active Status Bit 380" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB379 ,Active Status Bit 379" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB378 ,Active Status Bit 378" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB377 ,Active Status Bit 377" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB376 ,Active Status Bit 376" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB375 ,Active Status Bit 375" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB374 ,Active Status Bit 374" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB373 ,Active Status Bit 373" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB372 ,Active Status Bit 372" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB371 ,Active Status Bit 371" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB370 ,Active Status Bit 370" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB369 ,Active Status Bit 369" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB368 ,Active Status Bit 368" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB367 ,Active Status Bit 367" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB366 ,Active Status Bit 366" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB365 ,Active Status Bit 365" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB364 ,Active Status Bit 364" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB363 ,Active Status Bit 363" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB362 ,Active Status Bit 362" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB361 ,Active Status Bit 361" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB360 ,Active Status Bit 360" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB359 ,Active Status Bit 359" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB358 ,Active Status Bit 358" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB357 ,Active Status Bit 357" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB356 ,Active Status Bit 356" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB355 ,Active Status Bit 355" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB354 ,Active Status Bit 354" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB353 ,Active Status Bit 353" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB352 ,Active Status Bit 352" "Not active,Active"
|
|
else
|
|
rgroup.long 0x032C++0x03
|
|
line.long 0x0 "GICD_ICDABR11,Active Status Register 11"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0C)
|
|
rgroup.long 0x0330++0x03
|
|
line.long 0x0 "GICD_ICDABR12,Active Status Register 12"
|
|
bitfld.long 0x00 31. " ASB415 ,Active Status Bit 415" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB414 ,Active Status Bit 414" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB413 ,Active Status Bit 413" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB412 ,Active Status Bit 412" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB411 ,Active Status Bit 411" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB410 ,Active Status Bit 410" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB409 ,Active Status Bit 409" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB408 ,Active Status Bit 408" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB407 ,Active Status Bit 407" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB406 ,Active Status Bit 406" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB405 ,Active Status Bit 405" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB404 ,Active Status Bit 404" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB403 ,Active Status Bit 403" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB402 ,Active Status Bit 402" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB401 ,Active Status Bit 401" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB400 ,Active Status Bit 400" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB399 ,Active Status Bit 399" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB398 ,Active Status Bit 398" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB397 ,Active Status Bit 397" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB396 ,Active Status Bit 396" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB395 ,Active Status Bit 395" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB394 ,Active Status Bit 394" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB393 ,Active Status Bit 393" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB392 ,Active Status Bit 392" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB391 ,Active Status Bit 391" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB390 ,Active Status Bit 390" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB389 ,Active Status Bit 389" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB388 ,Active Status Bit 388" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB387 ,Active Status Bit 387" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB386 ,Active Status Bit 386" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB385 ,Active Status Bit 385" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB384 ,Active Status Bit 384" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0330++0x03
|
|
line.long 0x0 "GICD_ICDABR12,Active Status Register 12"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0D)
|
|
rgroup.long 0x0334++0x03
|
|
line.long 0x0 "GICD_ICDABR13,Active Status Register 13"
|
|
bitfld.long 0x00 31. " ASB447 ,Active Status Bit 447" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB446 ,Active Status Bit 446" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB445 ,Active Status Bit 445" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB444 ,Active Status Bit 444" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB443 ,Active Status Bit 443" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB442 ,Active Status Bit 442" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB441 ,Active Status Bit 441" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB440 ,Active Status Bit 440" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB439 ,Active Status Bit 439" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB438 ,Active Status Bit 438" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB437 ,Active Status Bit 437" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB436 ,Active Status Bit 436" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB435 ,Active Status Bit 435" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB434 ,Active Status Bit 434" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB433 ,Active Status Bit 433" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB432 ,Active Status Bit 432" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB431 ,Active Status Bit 431" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB430 ,Active Status Bit 430" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB429 ,Active Status Bit 429" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB428 ,Active Status Bit 428" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB427 ,Active Status Bit 427" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB426 ,Active Status Bit 426" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB425 ,Active Status Bit 425" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB424 ,Active Status Bit 424" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB423 ,Active Status Bit 423" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB422 ,Active Status Bit 422" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB421 ,Active Status Bit 421" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB420 ,Active Status Bit 420" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB419 ,Active Status Bit 419" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB418 ,Active Status Bit 418" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB417 ,Active Status Bit 417" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB416 ,Active Status Bit 416" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0334++0x03
|
|
line.long 0x0 "GICD_ICDABR13,Active Status Register 13"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0E)
|
|
rgroup.long 0x0338++0x03
|
|
line.long 0x0 "GICD_ICDABR14,Active Status Register 14"
|
|
bitfld.long 0x00 31. " ASB479 ,Active Status Bit 479" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB478 ,Active Status Bit 478" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB477 ,Active Status Bit 477" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB476 ,Active Status Bit 476" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB475 ,Active Status Bit 475" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB474 ,Active Status Bit 474" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB473 ,Active Status Bit 473" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB472 ,Active Status Bit 472" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB471 ,Active Status Bit 471" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB470 ,Active Status Bit 470" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB469 ,Active Status Bit 469" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB468 ,Active Status Bit 468" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB467 ,Active Status Bit 467" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB466 ,Active Status Bit 466" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB465 ,Active Status Bit 465" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB464 ,Active Status Bit 464" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB463 ,Active Status Bit 463" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB462 ,Active Status Bit 462" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB461 ,Active Status Bit 461" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB460 ,Active Status Bit 460" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB459 ,Active Status Bit 459" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB458 ,Active Status Bit 458" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB457 ,Active Status Bit 457" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB456 ,Active Status Bit 456" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB455 ,Active Status Bit 455" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB454 ,Active Status Bit 454" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB453 ,Active Status Bit 453" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB452 ,Active Status Bit 452" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB451 ,Active Status Bit 451" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB450 ,Active Status Bit 450" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB449 ,Active Status Bit 449" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB448 ,Active Status Bit 448" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0338++0x03
|
|
line.long 0x0 "GICD_ICDABR14,Active Status Register 14"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0F)
|
|
rgroup.long 0x033C++0x03
|
|
line.long 0x0 "GICD_ICDABR15,Active Status Register 15"
|
|
bitfld.long 0x00 31. " ASB511 ,Active Status Bit 511" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB510 ,Active Status Bit 510" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB509 ,Active Status Bit 509" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB508 ,Active Status Bit 508" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB507 ,Active Status Bit 507" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB506 ,Active Status Bit 506" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB505 ,Active Status Bit 505" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB504 ,Active Status Bit 504" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB503 ,Active Status Bit 503" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB502 ,Active Status Bit 502" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB501 ,Active Status Bit 501" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB500 ,Active Status Bit 500" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB499 ,Active Status Bit 499" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB498 ,Active Status Bit 498" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB497 ,Active Status Bit 497" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB496 ,Active Status Bit 496" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB495 ,Active Status Bit 495" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB494 ,Active Status Bit 494" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB493 ,Active Status Bit 493" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB492 ,Active Status Bit 492" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB491 ,Active Status Bit 491" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB490 ,Active Status Bit 490" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB489 ,Active Status Bit 489" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB488 ,Active Status Bit 488" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB487 ,Active Status Bit 487" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB486 ,Active Status Bit 486" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB485 ,Active Status Bit 485" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB484 ,Active Status Bit 484" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB483 ,Active Status Bit 483" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB482 ,Active Status Bit 482" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB481 ,Active Status Bit 481" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB480 ,Active Status Bit 480" "Not active,Active"
|
|
else
|
|
rgroup.long 0x033C++0x03
|
|
line.long 0x0 "GICD_ICDABR15,Active Status Register 15"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x10)
|
|
rgroup.long 0x0340++0x03
|
|
line.long 0x0 "GICD_ICDABR16,Active Status Register 16"
|
|
bitfld.long 0x00 31. " ASB543 ,Active Status Bit 543" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB542 ,Active Status Bit 542" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB541 ,Active Status Bit 541" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB540 ,Active Status Bit 540" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB539 ,Active Status Bit 539" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB538 ,Active Status Bit 538" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB537 ,Active Status Bit 537" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB536 ,Active Status Bit 536" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB535 ,Active Status Bit 535" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB534 ,Active Status Bit 534" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB533 ,Active Status Bit 533" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB532 ,Active Status Bit 532" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB531 ,Active Status Bit 531" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB530 ,Active Status Bit 530" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB529 ,Active Status Bit 529" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB528 ,Active Status Bit 528" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB527 ,Active Status Bit 527" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB526 ,Active Status Bit 526" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB525 ,Active Status Bit 525" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB524 ,Active Status Bit 524" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB523 ,Active Status Bit 523" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB522 ,Active Status Bit 522" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB521 ,Active Status Bit 521" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB520 ,Active Status Bit 520" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB519 ,Active Status Bit 519" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB518 ,Active Status Bit 518" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB517 ,Active Status Bit 517" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB516 ,Active Status Bit 516" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB515 ,Active Status Bit 515" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB514 ,Active Status Bit 514" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB513 ,Active Status Bit 513" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB512 ,Active Status Bit 512" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0340++0x03
|
|
line.long 0x0 "GICD_ICDABR16,Active Status Register 16"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x11)
|
|
rgroup.long 0x0344++0x03
|
|
line.long 0x0 "GICD_ICDABR17,Active Status Register 17"
|
|
bitfld.long 0x00 31. " ASB575 ,Active Status Bit 575" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB574 ,Active Status Bit 574" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB573 ,Active Status Bit 573" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB572 ,Active Status Bit 572" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB571 ,Active Status Bit 571" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB570 ,Active Status Bit 570" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB569 ,Active Status Bit 569" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB568 ,Active Status Bit 568" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB567 ,Active Status Bit 567" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB566 ,Active Status Bit 566" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB565 ,Active Status Bit 565" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB564 ,Active Status Bit 564" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB563 ,Active Status Bit 563" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB562 ,Active Status Bit 562" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB561 ,Active Status Bit 561" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB560 ,Active Status Bit 560" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB559 ,Active Status Bit 559" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB558 ,Active Status Bit 558" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB557 ,Active Status Bit 557" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB556 ,Active Status Bit 556" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB555 ,Active Status Bit 555" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB554 ,Active Status Bit 554" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB553 ,Active Status Bit 553" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB552 ,Active Status Bit 552" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB551 ,Active Status Bit 551" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB550 ,Active Status Bit 550" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB549 ,Active Status Bit 549" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB548 ,Active Status Bit 548" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB547 ,Active Status Bit 547" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB546 ,Active Status Bit 546" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB545 ,Active Status Bit 545" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB544 ,Active Status Bit 544" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0344++0x03
|
|
line.long 0x0 "GICD_ICDABR17,Active Status Register 17"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x12)
|
|
rgroup.long 0x0348++0x03
|
|
line.long 0x0 "GICD_ICDABR18,Active Status Register 18"
|
|
bitfld.long 0x00 31. " ASB607 ,Active Status Bit 607" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB606 ,Active Status Bit 606" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB605 ,Active Status Bit 605" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB604 ,Active Status Bit 604" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB603 ,Active Status Bit 603" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB602 ,Active Status Bit 602" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB601 ,Active Status Bit 601" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB600 ,Active Status Bit 600" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB599 ,Active Status Bit 599" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB598 ,Active Status Bit 598" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB597 ,Active Status Bit 597" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB596 ,Active Status Bit 596" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB595 ,Active Status Bit 595" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB594 ,Active Status Bit 594" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB593 ,Active Status Bit 593" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB592 ,Active Status Bit 592" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB591 ,Active Status Bit 591" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB590 ,Active Status Bit 590" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB589 ,Active Status Bit 589" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB588 ,Active Status Bit 588" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB587 ,Active Status Bit 587" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB586 ,Active Status Bit 586" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB585 ,Active Status Bit 585" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB584 ,Active Status Bit 584" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB583 ,Active Status Bit 583" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB582 ,Active Status Bit 582" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB581 ,Active Status Bit 581" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB580 ,Active Status Bit 580" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB579 ,Active Status Bit 579" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB578 ,Active Status Bit 578" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB577 ,Active Status Bit 577" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB576 ,Active Status Bit 576" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0348++0x03
|
|
line.long 0x0 "GICD_ICDABR18,Active Status Register 18"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x13)
|
|
rgroup.long 0x034C++0x03
|
|
line.long 0x0 "GICD_ICDABR19,Active Status Register 19"
|
|
bitfld.long 0x00 31. " ASB639 ,Active Status Bit 639" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB638 ,Active Status Bit 638" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB637 ,Active Status Bit 637" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB636 ,Active Status Bit 636" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB635 ,Active Status Bit 635" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB634 ,Active Status Bit 634" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB633 ,Active Status Bit 633" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB632 ,Active Status Bit 632" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB631 ,Active Status Bit 631" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB630 ,Active Status Bit 630" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB629 ,Active Status Bit 629" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB628 ,Active Status Bit 628" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB627 ,Active Status Bit 627" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB626 ,Active Status Bit 626" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB625 ,Active Status Bit 625" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB624 ,Active Status Bit 624" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB623 ,Active Status Bit 623" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB622 ,Active Status Bit 622" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB621 ,Active Status Bit 621" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB620 ,Active Status Bit 620" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB619 ,Active Status Bit 619" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB618 ,Active Status Bit 618" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB617 ,Active Status Bit 617" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB616 ,Active Status Bit 616" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB615 ,Active Status Bit 615" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB614 ,Active Status Bit 614" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB613 ,Active Status Bit 613" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB612 ,Active Status Bit 612" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB611 ,Active Status Bit 611" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB610 ,Active Status Bit 610" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB609 ,Active Status Bit 609" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB608 ,Active Status Bit 608" "Not active,Active"
|
|
else
|
|
rgroup.long 0x034C++0x03
|
|
line.long 0x0 "GICD_ICDABR19,Active Status Register 19"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x14)
|
|
rgroup.long 0x0350++0x03
|
|
line.long 0x0 "GICD_ICDABR20,Active Status Register 20"
|
|
bitfld.long 0x00 31. " ASB671 ,Active Status Bit 671" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB670 ,Active Status Bit 670" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB669 ,Active Status Bit 669" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB668 ,Active Status Bit 668" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB667 ,Active Status Bit 667" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB666 ,Active Status Bit 666" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB665 ,Active Status Bit 665" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB664 ,Active Status Bit 664" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB663 ,Active Status Bit 663" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB662 ,Active Status Bit 662" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB661 ,Active Status Bit 661" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB660 ,Active Status Bit 660" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB659 ,Active Status Bit 659" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB658 ,Active Status Bit 658" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB657 ,Active Status Bit 657" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB656 ,Active Status Bit 656" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB655 ,Active Status Bit 655" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB654 ,Active Status Bit 654" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB653 ,Active Status Bit 653" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB652 ,Active Status Bit 652" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB651 ,Active Status Bit 651" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB650 ,Active Status Bit 650" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB649 ,Active Status Bit 649" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB648 ,Active Status Bit 648" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB647 ,Active Status Bit 647" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB646 ,Active Status Bit 646" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB645 ,Active Status Bit 645" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB644 ,Active Status Bit 644" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB643 ,Active Status Bit 643" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB642 ,Active Status Bit 642" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB641 ,Active Status Bit 641" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB640 ,Active Status Bit 640" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0350++0x03
|
|
line.long 0x0 "GICD_ICDABR20,Active Status Register 20"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x15)
|
|
rgroup.long 0x0354++0x03
|
|
line.long 0x0 "GICD_ICDABR21,Active Status Register 21"
|
|
bitfld.long 0x00 31. " ASB703 ,Active Status Bit 703" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB702 ,Active Status Bit 702" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB701 ,Active Status Bit 701" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB700 ,Active Status Bit 700" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB699 ,Active Status Bit 699" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB698 ,Active Status Bit 698" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB697 ,Active Status Bit 697" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB696 ,Active Status Bit 696" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB695 ,Active Status Bit 695" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB694 ,Active Status Bit 694" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB693 ,Active Status Bit 693" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB692 ,Active Status Bit 692" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB691 ,Active Status Bit 691" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB690 ,Active Status Bit 690" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB689 ,Active Status Bit 689" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB688 ,Active Status Bit 688" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB687 ,Active Status Bit 687" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB686 ,Active Status Bit 686" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB685 ,Active Status Bit 685" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB684 ,Active Status Bit 684" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB683 ,Active Status Bit 683" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB682 ,Active Status Bit 682" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB681 ,Active Status Bit 681" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB680 ,Active Status Bit 680" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB679 ,Active Status Bit 679" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB678 ,Active Status Bit 678" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB677 ,Active Status Bit 677" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB676 ,Active Status Bit 676" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB675 ,Active Status Bit 675" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB674 ,Active Status Bit 674" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB673 ,Active Status Bit 673" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB672 ,Active Status Bit 672" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0354++0x03
|
|
line.long 0x0 "GICD_ICDABR21,Active Status Register 21"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x16)
|
|
rgroup.long 0x0358++0x03
|
|
line.long 0x0 "GICD_ICDABR22,Active Status Register 22"
|
|
bitfld.long 0x00 31. " ASB735 ,Active Status Bit 735" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB734 ,Active Status Bit 734" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB733 ,Active Status Bit 733" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB732 ,Active Status Bit 732" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB731 ,Active Status Bit 731" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB730 ,Active Status Bit 730" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB729 ,Active Status Bit 729" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB728 ,Active Status Bit 728" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB727 ,Active Status Bit 727" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB726 ,Active Status Bit 726" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB725 ,Active Status Bit 725" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB724 ,Active Status Bit 724" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB723 ,Active Status Bit 723" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB722 ,Active Status Bit 722" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB721 ,Active Status Bit 721" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB720 ,Active Status Bit 720" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB719 ,Active Status Bit 719" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB718 ,Active Status Bit 718" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB717 ,Active Status Bit 717" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB716 ,Active Status Bit 716" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB715 ,Active Status Bit 715" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB714 ,Active Status Bit 714" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB713 ,Active Status Bit 713" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB712 ,Active Status Bit 712" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB711 ,Active Status Bit 711" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB710 ,Active Status Bit 710" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB709 ,Active Status Bit 709" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB708 ,Active Status Bit 708" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB707 ,Active Status Bit 707" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB706 ,Active Status Bit 706" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB705 ,Active Status Bit 705" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB704 ,Active Status Bit 704" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0358++0x03
|
|
line.long 0x0 "GICD_ICDABR22,Active Status Register 22"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x17)
|
|
rgroup.long 0x035C++0x03
|
|
line.long 0x0 "GICD_ICDABR23,Active Status Register 23"
|
|
bitfld.long 0x00 31. " ASB767 ,Active Status Bit 767" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB766 ,Active Status Bit 766" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB765 ,Active Status Bit 765" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB764 ,Active Status Bit 764" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB763 ,Active Status Bit 763" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB762 ,Active Status Bit 762" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB761 ,Active Status Bit 761" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB760 ,Active Status Bit 760" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB759 ,Active Status Bit 759" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB758 ,Active Status Bit 758" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB757 ,Active Status Bit 757" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB756 ,Active Status Bit 756" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB755 ,Active Status Bit 755" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB754 ,Active Status Bit 754" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB753 ,Active Status Bit 753" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB752 ,Active Status Bit 752" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB751 ,Active Status Bit 751" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB750 ,Active Status Bit 750" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB749 ,Active Status Bit 749" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB748 ,Active Status Bit 748" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB747 ,Active Status Bit 747" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB746 ,Active Status Bit 746" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB745 ,Active Status Bit 745" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB744 ,Active Status Bit 744" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB743 ,Active Status Bit 743" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB742 ,Active Status Bit 742" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB741 ,Active Status Bit 741" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB740 ,Active Status Bit 740" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB739 ,Active Status Bit 739" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB738 ,Active Status Bit 738" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB737 ,Active Status Bit 737" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB736 ,Active Status Bit 736" "Not active,Active"
|
|
else
|
|
rgroup.long 0x035C++0x03
|
|
line.long 0x0 "GICD_ICDABR23,Active Status Register 23"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x18)
|
|
rgroup.long 0x0360++0x03
|
|
line.long 0x0 "GICD_ICDABR24,Active Status Register 24"
|
|
bitfld.long 0x00 31. " ASB799 ,Active Status Bit 799" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB798 ,Active Status Bit 798" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB797 ,Active Status Bit 797" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB796 ,Active Status Bit 796" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB795 ,Active Status Bit 795" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB794 ,Active Status Bit 794" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB793 ,Active Status Bit 793" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB792 ,Active Status Bit 792" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB791 ,Active Status Bit 791" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB790 ,Active Status Bit 790" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB789 ,Active Status Bit 789" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB788 ,Active Status Bit 788" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB787 ,Active Status Bit 787" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB786 ,Active Status Bit 786" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB785 ,Active Status Bit 785" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB784 ,Active Status Bit 784" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB783 ,Active Status Bit 783" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB782 ,Active Status Bit 782" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB781 ,Active Status Bit 781" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB780 ,Active Status Bit 780" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB779 ,Active Status Bit 779" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB778 ,Active Status Bit 778" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB777 ,Active Status Bit 777" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB776 ,Active Status Bit 776" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB775 ,Active Status Bit 775" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB774 ,Active Status Bit 774" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB773 ,Active Status Bit 773" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB772 ,Active Status Bit 772" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB771 ,Active Status Bit 771" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB770 ,Active Status Bit 770" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB769 ,Active Status Bit 769" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB768 ,Active Status Bit 768" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0360++0x03
|
|
line.long 0x0 "GICD_ICDABR24,Active Status Register 24"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x19)
|
|
rgroup.long 0x0364++0x03
|
|
line.long 0x0 "GICD_ICDABR25,Active Status Register 25"
|
|
bitfld.long 0x00 31. " ASB831 ,Active Status Bit 831" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB830 ,Active Status Bit 830" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB829 ,Active Status Bit 829" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB828 ,Active Status Bit 828" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB827 ,Active Status Bit 827" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB826 ,Active Status Bit 826" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB825 ,Active Status Bit 825" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB824 ,Active Status Bit 824" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB823 ,Active Status Bit 823" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB822 ,Active Status Bit 822" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB821 ,Active Status Bit 821" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB820 ,Active Status Bit 820" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB819 ,Active Status Bit 819" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB818 ,Active Status Bit 818" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB817 ,Active Status Bit 817" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB816 ,Active Status Bit 816" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB815 ,Active Status Bit 815" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB814 ,Active Status Bit 814" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB813 ,Active Status Bit 813" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB812 ,Active Status Bit 812" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB811 ,Active Status Bit 811" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB810 ,Active Status Bit 810" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB809 ,Active Status Bit 809" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB808 ,Active Status Bit 808" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB807 ,Active Status Bit 807" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB806 ,Active Status Bit 806" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB805 ,Active Status Bit 805" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB804 ,Active Status Bit 804" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB803 ,Active Status Bit 803" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB802 ,Active Status Bit 802" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB801 ,Active Status Bit 801" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB800 ,Active Status Bit 800" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0364++0x03
|
|
line.long 0x0 "GICD_ICDABR25,Active Status Register 25"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1A)
|
|
rgroup.long 0x0368++0x03
|
|
line.long 0x0 "GICD_ICDABR26,Active Status Register 26"
|
|
bitfld.long 0x00 31. " ASB863 ,Active Status Bit 863" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB862 ,Active Status Bit 862" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB861 ,Active Status Bit 861" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB860 ,Active Status Bit 860" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB859 ,Active Status Bit 859" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB858 ,Active Status Bit 858" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB857 ,Active Status Bit 857" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB856 ,Active Status Bit 856" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB855 ,Active Status Bit 855" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB854 ,Active Status Bit 854" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB853 ,Active Status Bit 853" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB852 ,Active Status Bit 852" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB851 ,Active Status Bit 851" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB850 ,Active Status Bit 850" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB849 ,Active Status Bit 849" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB848 ,Active Status Bit 848" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB847 ,Active Status Bit 847" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB846 ,Active Status Bit 846" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB845 ,Active Status Bit 845" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB844 ,Active Status Bit 844" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB843 ,Active Status Bit 843" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB842 ,Active Status Bit 842" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB841 ,Active Status Bit 841" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB840 ,Active Status Bit 840" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB839 ,Active Status Bit 839" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB838 ,Active Status Bit 838" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB837 ,Active Status Bit 837" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB836 ,Active Status Bit 836" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB835 ,Active Status Bit 835" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB834 ,Active Status Bit 834" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB833 ,Active Status Bit 833" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB832 ,Active Status Bit 832" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0368++0x03
|
|
line.long 0x0 "GICD_ICDABR26,Active Status Register 26"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1B)
|
|
rgroup.long 0x036C++0x03
|
|
line.long 0x0 "GICD_ICDABR27,Active Status Register 27"
|
|
bitfld.long 0x00 31. " ASB895 ,Active Status Bit 895" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB894 ,Active Status Bit 894" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB893 ,Active Status Bit 893" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB892 ,Active Status Bit 892" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB891 ,Active Status Bit 891" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB890 ,Active Status Bit 890" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB889 ,Active Status Bit 889" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB888 ,Active Status Bit 888" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB887 ,Active Status Bit 887" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB886 ,Active Status Bit 886" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB885 ,Active Status Bit 885" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB884 ,Active Status Bit 884" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB883 ,Active Status Bit 883" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB882 ,Active Status Bit 882" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB881 ,Active Status Bit 881" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB880 ,Active Status Bit 880" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB879 ,Active Status Bit 879" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB878 ,Active Status Bit 878" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB877 ,Active Status Bit 877" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB876 ,Active Status Bit 876" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB875 ,Active Status Bit 875" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB874 ,Active Status Bit 874" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB873 ,Active Status Bit 873" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB872 ,Active Status Bit 872" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB871 ,Active Status Bit 871" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB870 ,Active Status Bit 870" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB869 ,Active Status Bit 869" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB868 ,Active Status Bit 868" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB867 ,Active Status Bit 867" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB866 ,Active Status Bit 866" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB865 ,Active Status Bit 865" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB864 ,Active Status Bit 864" "Not active,Active"
|
|
else
|
|
rgroup.long 0x036C++0x03
|
|
line.long 0x0 "GICD_ICDABR27,Active Status Register 27"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1C)
|
|
rgroup.long 0x0370++0x03
|
|
line.long 0x0 "GICD_ICDABR28,Active Status Register 28"
|
|
bitfld.long 0x00 31. " ASB927 ,Active Status Bit 927" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB926 ,Active Status Bit 926" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB925 ,Active Status Bit 925" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB924 ,Active Status Bit 924" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB923 ,Active Status Bit 923" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB922 ,Active Status Bit 922" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB921 ,Active Status Bit 921" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB920 ,Active Status Bit 920" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB919 ,Active Status Bit 919" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB918 ,Active Status Bit 918" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB917 ,Active Status Bit 917" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB916 ,Active Status Bit 916" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB915 ,Active Status Bit 915" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB914 ,Active Status Bit 914" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB913 ,Active Status Bit 913" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB912 ,Active Status Bit 912" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB911 ,Active Status Bit 911" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB910 ,Active Status Bit 910" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB909 ,Active Status Bit 909" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB908 ,Active Status Bit 908" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB907 ,Active Status Bit 907" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB906 ,Active Status Bit 906" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB905 ,Active Status Bit 905" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB904 ,Active Status Bit 904" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB903 ,Active Status Bit 903" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB902 ,Active Status Bit 902" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB901 ,Active Status Bit 901" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB900 ,Active Status Bit 900" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB899 ,Active Status Bit 899" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB898 ,Active Status Bit 898" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB897 ,Active Status Bit 897" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB896 ,Active Status Bit 896" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0370++0x03
|
|
line.long 0x0 "GICD_ICDABR28,Active Status Register 28"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1D)
|
|
rgroup.long 0x0374++0x03
|
|
line.long 0x0 "GICD_ICDABR29,Active Status Register 29"
|
|
bitfld.long 0x00 31. " ASB959 ,Active Status Bit 959" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB958 ,Active Status Bit 958" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB957 ,Active Status Bit 957" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB956 ,Active Status Bit 956" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB955 ,Active Status Bit 955" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB954 ,Active Status Bit 954" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB953 ,Active Status Bit 953" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB952 ,Active Status Bit 952" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB951 ,Active Status Bit 951" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB950 ,Active Status Bit 950" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB949 ,Active Status Bit 949" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB948 ,Active Status Bit 948" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB947 ,Active Status Bit 947" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB946 ,Active Status Bit 946" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB945 ,Active Status Bit 945" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB944 ,Active Status Bit 944" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB943 ,Active Status Bit 943" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB942 ,Active Status Bit 942" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB941 ,Active Status Bit 941" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB940 ,Active Status Bit 940" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB939 ,Active Status Bit 939" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB938 ,Active Status Bit 938" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB937 ,Active Status Bit 937" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB936 ,Active Status Bit 936" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB935 ,Active Status Bit 935" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB934 ,Active Status Bit 934" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB933 ,Active Status Bit 933" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB932 ,Active Status Bit 932" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB931 ,Active Status Bit 931" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB930 ,Active Status Bit 930" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB929 ,Active Status Bit 929" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB928 ,Active Status Bit 928" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0374++0x03
|
|
line.long 0x0 "GICD_ICDABR29,Active Status Register 29"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1E)
|
|
rgroup.long 0x0378++0x03
|
|
line.long 0x0 "GICD_ICDABR30,Active Status Register 30"
|
|
bitfld.long 0x00 31. " ASB991 ,Active Status Bit 991" "Not active,Active"
|
|
bitfld.long 0x00 30. " ASB990 ,Active Status Bit 990" "Not active,Active"
|
|
bitfld.long 0x00 29. " ASB989 ,Active Status Bit 989" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " ASB988 ,Active Status Bit 988" "Not active,Active"
|
|
bitfld.long 0x00 27. " ASB987 ,Active Status Bit 987" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB986 ,Active Status Bit 986" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB985 ,Active Status Bit 985" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB984 ,Active Status Bit 984" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB983 ,Active Status Bit 983" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB982 ,Active Status Bit 982" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB981 ,Active Status Bit 981" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB980 ,Active Status Bit 980" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB979 ,Active Status Bit 979" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB978 ,Active Status Bit 978" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB977 ,Active Status Bit 977" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB976 ,Active Status Bit 976" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB975 ,Active Status Bit 975" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB974 ,Active Status Bit 974" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB973 ,Active Status Bit 973" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB972 ,Active Status Bit 972" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB971 ,Active Status Bit 971" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB970 ,Active Status Bit 970" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB969 ,Active Status Bit 969" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB968 ,Active Status Bit 968" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB967 ,Active Status Bit 967" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB966 ,Active Status Bit 966" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB965 ,Active Status Bit 965" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB964 ,Active Status Bit 964" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB963 ,Active Status Bit 963" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB962 ,Active Status Bit 962" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB961 ,Active Status Bit 961" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB960 ,Active Status Bit 960" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0378++0x03
|
|
line.long 0x0 "GICD_ICDABR30,Active Status Register 30"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)==0x1F)
|
|
rgroup.long 0x037C++0x03
|
|
line.long 0x0 "GICD_ICDABR31,Active Status Register 31"
|
|
bitfld.long 0x00 27. " ASB1019 ,Active Status Bit 1019" "Not active,Active"
|
|
bitfld.long 0x00 26. " ASB1018 ,Active Status Bit 1018" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ASB1017 ,Active Status Bit 1017" "Not active,Active"
|
|
bitfld.long 0x00 24. " ASB1016 ,Active Status Bit 1016" "Not active,Active"
|
|
bitfld.long 0x00 23. " ASB1015 ,Active Status Bit 1015" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ASB1014 ,Active Status Bit 1014" "Not active,Active"
|
|
bitfld.long 0x00 21. " ASB1013 ,Active Status Bit 1013" "Not active,Active"
|
|
bitfld.long 0x00 20. " ASB1012 ,Active Status Bit 1012" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ASB1011 ,Active Status Bit 1011" "Not active,Active"
|
|
bitfld.long 0x00 18. " ASB1010 ,Active Status Bit 1010" "Not active,Active"
|
|
bitfld.long 0x00 17. " ASB1009 ,Active Status Bit 1009" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " ASB1008 ,Active Status Bit 1008" "Not active,Active"
|
|
bitfld.long 0x00 15. " ASB1007 ,Active Status Bit 1007" "Not active,Active"
|
|
bitfld.long 0x00 14. " ASB1006 ,Active Status Bit 1006" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ASB1005 ,Active Status Bit 1005" "Not active,Active"
|
|
bitfld.long 0x00 12. " ASB1004 ,Active Status Bit 1004" "Not active,Active"
|
|
bitfld.long 0x00 11. " ASB1003 ,Active Status Bit 1003" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ASB1002 ,Active Status Bit 1002" "Not active,Active"
|
|
bitfld.long 0x00 9. " ASB1001 ,Active Status Bit 1001" "Not active,Active"
|
|
bitfld.long 0x00 8. " ASB1000 ,Active Status Bit 1000" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ASB999 ,Active Status Bit 999" "Not active,Active"
|
|
bitfld.long 0x00 6. " ASB998 ,Active Status Bit 998" "Not active,Active"
|
|
bitfld.long 0x00 5. " ASB997 ,Active Status Bit 997" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ASB996 ,Active Status Bit 996" "Not active,Active"
|
|
bitfld.long 0x00 3. " ASB995 ,Active Status Bit 995" "Not active,Active"
|
|
bitfld.long 0x00 2. " ASB994 ,Active Status Bit 994" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ASB993 ,Active Status Bit 993" "Not active,Active"
|
|
bitfld.long 0x00 0. " ASB992 ,Active Status Bit 992" "Not active,Active"
|
|
else
|
|
rgroup.long 0x037C++0x03
|
|
line.long 0x0 "GICD_ICDABR31,Active Status Register 31"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
else
|
|
group.long 0x0300++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER0,Interrupt Set/Clear Active Register 0"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE31 ,Set/Clear Active Bit 31" "Not active,Active"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE30 ,Set/Clear Active Bit 30" "Not active,Active"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE29 ,Set/Clear Active Bit 29" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE28 ,Set/Clear Active Bit 28" "Not active,Active"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE27 ,Set/Clear Active Bit 27" "Not active,Active"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE26 ,Set/Clear Active Bit 26" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE25 ,Set/Clear Active Bit 25" "Not active,Active"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE24 ,Set/Clear Active Bit 24" "Not active,Active"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE23 ,Set/Clear Active Bit 23" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE22 ,Set/Clear Active Bit 22" "Not active,Active"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE21 ,Set/Clear Active Bit 21" "Not active,Active"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE20 ,Set/Clear Active Bit 20" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE19 ,Set/Clear Active Bit 19" "Not active,Active"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE18 ,Set/Clear Active Bit 18" "Not active,Active"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE17 ,Set/Clear Active Bit 17" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE16 ,Set/Clear Active Bit 16" "Not active,Active"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE15 ,Set/Clear Active Bit 15" "Not active,Active"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE14 ,Set/Clear Active Bit 14" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE13 ,Set/Clear Active Bit 13" "Not active,Active"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE12 ,Set/Clear Active Bit 12" "Not active,Active"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE11 ,Set/Clear Active Bit 11" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE10 ,Set/Clear Active Bit 10" "Not active,Active"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE9 ,Set/Clear Active Bit 9" "Not active,Active"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE8 ,Set/Clear Active Bit 8" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE7 ,Set/Clear Active Bit 7" "Not active,Active"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE6 ,Set/Clear Active Bit 6" "Not active,Active"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE5 ,Set/Clear Active Bit 5" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE4 ,Set/Clear Active Bit 4" "Not active,Active"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE3 ,Set/Clear Active Bit 3" "Not active,Active"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE2 ,Set/Clear Active Bit 2" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE1 ,Set/Clear Active Bit 1" "Not active,Active"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE0 ,Set/Clear Active Bit 0" "Not active,Active"
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x01)
|
|
group.long 0x0304++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER1,Interrupt Set/Clear Active Register 1"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE63 ,Set/Clear Active Bit 63" "Not active,Active"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE62 ,Set/Clear Active Bit 62" "Not active,Active"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE61 ,Set/Clear Active Bit 61" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE60 ,Set/Clear Active Bit 60" "Not active,Active"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE59 ,Set/Clear Active Bit 59" "Not active,Active"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE58 ,Set/Clear Active Bit 58" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE57 ,Set/Clear Active Bit 57" "Not active,Active"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE56 ,Set/Clear Active Bit 56" "Not active,Active"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE55 ,Set/Clear Active Bit 55" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE54 ,Set/Clear Active Bit 54" "Not active,Active"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE53 ,Set/Clear Active Bit 53" "Not active,Active"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE52 ,Set/Clear Active Bit 52" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE51 ,Set/Clear Active Bit 51" "Not active,Active"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE50 ,Set/Clear Active Bit 50" "Not active,Active"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE49 ,Set/Clear Active Bit 49" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE48 ,Set/Clear Active Bit 48" "Not active,Active"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE47 ,Set/Clear Active Bit 47" "Not active,Active"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE46 ,Set/Clear Active Bit 46" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE45 ,Set/Clear Active Bit 45" "Not active,Active"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE44 ,Set/Clear Active Bit 44" "Not active,Active"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE43 ,Set/Clear Active Bit 43" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE42 ,Set/Clear Active Bit 42" "Not active,Active"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE41 ,Set/Clear Active Bit 41" "Not active,Active"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE40 ,Set/Clear Active Bit 40" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE39 ,Set/Clear Active Bit 39" "Not active,Active"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE38 ,Set/Clear Active Bit 38" "Not active,Active"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE37 ,Set/Clear Active Bit 37" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE36 ,Set/Clear Active Bit 36" "Not active,Active"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE35 ,Set/Clear Active Bit 35" "Not active,Active"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE34 ,Set/Clear Active Bit 34" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE33 ,Set/Clear Active Bit 33" "Not active,Active"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE32 ,Set/Clear Active Bit 32" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0304++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER1,Interrupt Set/Clear Active Register 1"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x02)
|
|
group.long 0x0308++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER2,Interrupt Set/Clear Active Register 2"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE95 ,Set/Clear Active Bit 95" "Not active,Active"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE94 ,Set/Clear Active Bit 94" "Not active,Active"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE93 ,Set/Clear Active Bit 93" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE92 ,Set/Clear Active Bit 92" "Not active,Active"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE91 ,Set/Clear Active Bit 91" "Not active,Active"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE90 ,Set/Clear Active Bit 90" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE89 ,Set/Clear Active Bit 89" "Not active,Active"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE88 ,Set/Clear Active Bit 88" "Not active,Active"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE87 ,Set/Clear Active Bit 87" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE86 ,Set/Clear Active Bit 86" "Not active,Active"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE85 ,Set/Clear Active Bit 85" "Not active,Active"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE84 ,Set/Clear Active Bit 84" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE83 ,Set/Clear Active Bit 83" "Not active,Active"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE82 ,Set/Clear Active Bit 82" "Not active,Active"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE81 ,Set/Clear Active Bit 81" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE80 ,Set/Clear Active Bit 80" "Not active,Active"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE79 ,Set/Clear Active Bit 79" "Not active,Active"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE78 ,Set/Clear Active Bit 78" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE77 ,Set/Clear Active Bit 77" "Not active,Active"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE76 ,Set/Clear Active Bit 76" "Not active,Active"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE75 ,Set/Clear Active Bit 75" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE74 ,Set/Clear Active Bit 74" "Not active,Active"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE73 ,Set/Clear Active Bit 73" "Not active,Active"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE72 ,Set/Clear Active Bit 72" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE71 ,Set/Clear Active Bit 71" "Not active,Active"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE70 ,Set/Clear Active Bit 70" "Not active,Active"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE69 ,Set/Clear Active Bit 69" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE68 ,Set/Clear Active Bit 68" "Not active,Active"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE67 ,Set/Clear Active Bit 67" "Not active,Active"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE66 ,Set/Clear Active Bit 66" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE65 ,Set/Clear Active Bit 65" "Not active,Active"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE64 ,Set/Clear Active Bit 64" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0308++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER2,Interrupt Set/Clear Active Register 2"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x03)
|
|
group.long 0x030C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER3,Interrupt Set/Clear Active Register 3"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE127 ,Set/Clear Active Bit 127" "Not active,Active"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE126 ,Set/Clear Active Bit 126" "Not active,Active"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE125 ,Set/Clear Active Bit 125" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE124 ,Set/Clear Active Bit 124" "Not active,Active"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE123 ,Set/Clear Active Bit 123" "Not active,Active"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE122 ,Set/Clear Active Bit 122" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE121 ,Set/Clear Active Bit 121" "Not active,Active"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE120 ,Set/Clear Active Bit 120" "Not active,Active"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE119 ,Set/Clear Active Bit 119" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE118 ,Set/Clear Active Bit 118" "Not active,Active"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE117 ,Set/Clear Active Bit 117" "Not active,Active"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE116 ,Set/Clear Active Bit 116" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE115 ,Set/Clear Active Bit 115" "Not active,Active"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE114 ,Set/Clear Active Bit 114" "Not active,Active"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE113 ,Set/Clear Active Bit 113" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE112 ,Set/Clear Active Bit 112" "Not active,Active"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE111 ,Set/Clear Active Bit 111" "Not active,Active"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE110 ,Set/Clear Active Bit 110" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE109 ,Set/Clear Active Bit 109" "Not active,Active"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE108 ,Set/Clear Active Bit 108" "Not active,Active"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE107 ,Set/Clear Active Bit 107" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE106 ,Set/Clear Active Bit 106" "Not active,Active"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE105 ,Set/Clear Active Bit 105" "Not active,Active"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE104 ,Set/Clear Active Bit 104" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE103 ,Set/Clear Active Bit 103" "Not active,Active"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE102 ,Set/Clear Active Bit 102" "Not active,Active"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE101 ,Set/Clear Active Bit 101" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE100 ,Set/Clear Active Bit 100" "Not active,Active"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE99 ,Set/Clear Active Bit 99" "Not active,Active"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE98 ,Set/Clear Active Bit 98" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE97 ,Set/Clear Active Bit 97" "Not active,Active"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE96 ,Set/Clear Active Bit 96" "Not active,Active"
|
|
else
|
|
rgroup.long 0x030C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER3,Interrupt Set/Clear Active Register 3"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x04)
|
|
group.long 0x0310++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER4,Interrupt Set/Clear Active Register 4"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE159 ,Set/Clear Active Bit 159" "Not active,Active"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE158 ,Set/Clear Active Bit 158" "Not active,Active"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE157 ,Set/Clear Active Bit 157" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE156 ,Set/Clear Active Bit 156" "Not active,Active"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE155 ,Set/Clear Active Bit 155" "Not active,Active"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE154 ,Set/Clear Active Bit 154" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE153 ,Set/Clear Active Bit 153" "Not active,Active"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE152 ,Set/Clear Active Bit 152" "Not active,Active"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE151 ,Set/Clear Active Bit 151" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE150 ,Set/Clear Active Bit 150" "Not active,Active"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE149 ,Set/Clear Active Bit 149" "Not active,Active"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE148 ,Set/Clear Active Bit 148" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE147 ,Set/Clear Active Bit 147" "Not active,Active"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE146 ,Set/Clear Active Bit 146" "Not active,Active"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE145 ,Set/Clear Active Bit 145" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE144 ,Set/Clear Active Bit 144" "Not active,Active"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE143 ,Set/Clear Active Bit 143" "Not active,Active"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE142 ,Set/Clear Active Bit 142" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE141 ,Set/Clear Active Bit 141" "Not active,Active"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE140 ,Set/Clear Active Bit 140" "Not active,Active"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE139 ,Set/Clear Active Bit 139" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE138 ,Set/Clear Active Bit 138" "Not active,Active"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE137 ,Set/Clear Active Bit 137" "Not active,Active"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE136 ,Set/Clear Active Bit 136" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE135 ,Set/Clear Active Bit 135" "Not active,Active"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE134 ,Set/Clear Active Bit 134" "Not active,Active"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE133 ,Set/Clear Active Bit 133" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE132 ,Set/Clear Active Bit 132" "Not active,Active"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE131 ,Set/Clear Active Bit 131" "Not active,Active"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE130 ,Set/Clear Active Bit 130" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE129 ,Set/Clear Active Bit 129" "Not active,Active"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE128 ,Set/Clear Active Bit 128" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0310++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER4,Interrupt Set/Clear Active Register 4"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x05)
|
|
group.long 0x0314++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER5,Interrupt Set/Clear Active Register 5"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE191 ,Set/Clear Active Bit 191" "Not active,Active"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE190 ,Set/Clear Active Bit 190" "Not active,Active"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE189 ,Set/Clear Active Bit 189" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE188 ,Set/Clear Active Bit 188" "Not active,Active"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE187 ,Set/Clear Active Bit 187" "Not active,Active"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE186 ,Set/Clear Active Bit 186" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE185 ,Set/Clear Active Bit 185" "Not active,Active"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE184 ,Set/Clear Active Bit 184" "Not active,Active"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE183 ,Set/Clear Active Bit 183" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE182 ,Set/Clear Active Bit 182" "Not active,Active"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE181 ,Set/Clear Active Bit 181" "Not active,Active"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE180 ,Set/Clear Active Bit 180" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE179 ,Set/Clear Active Bit 179" "Not active,Active"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE178 ,Set/Clear Active Bit 178" "Not active,Active"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE177 ,Set/Clear Active Bit 177" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE176 ,Set/Clear Active Bit 176" "Not active,Active"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE175 ,Set/Clear Active Bit 175" "Not active,Active"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE174 ,Set/Clear Active Bit 174" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE173 ,Set/Clear Active Bit 173" "Not active,Active"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE172 ,Set/Clear Active Bit 172" "Not active,Active"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE171 ,Set/Clear Active Bit 171" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE170 ,Set/Clear Active Bit 170" "Not active,Active"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE169 ,Set/Clear Active Bit 169" "Not active,Active"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE168 ,Set/Clear Active Bit 168" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE167 ,Set/Clear Active Bit 167" "Not active,Active"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE166 ,Set/Clear Active Bit 166" "Not active,Active"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE165 ,Set/Clear Active Bit 165" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE164 ,Set/Clear Active Bit 164" "Not active,Active"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE163 ,Set/Clear Active Bit 163" "Not active,Active"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE162 ,Set/Clear Active Bit 162" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE161 ,Set/Clear Active Bit 161" "Not active,Active"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE160 ,Set/Clear Active Bit 160" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0314++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER5,Interrupt Set/Clear Active Register 5"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x06)
|
|
group.long 0x0318++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER6,Interrupt Set/Clear Active Register 6"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE223 ,Set/Clear Active Bit 223" "Not active,Active"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE222 ,Set/Clear Active Bit 222" "Not active,Active"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE221 ,Set/Clear Active Bit 221" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE220 ,Set/Clear Active Bit 220" "Not active,Active"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE219 ,Set/Clear Active Bit 219" "Not active,Active"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE218 ,Set/Clear Active Bit 218" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE217 ,Set/Clear Active Bit 217" "Not active,Active"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE216 ,Set/Clear Active Bit 216" "Not active,Active"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE215 ,Set/Clear Active Bit 215" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE214 ,Set/Clear Active Bit 214" "Not active,Active"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE213 ,Set/Clear Active Bit 213" "Not active,Active"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE212 ,Set/Clear Active Bit 212" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE211 ,Set/Clear Active Bit 211" "Not active,Active"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE210 ,Set/Clear Active Bit 210" "Not active,Active"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE209 ,Set/Clear Active Bit 209" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE208 ,Set/Clear Active Bit 208" "Not active,Active"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE207 ,Set/Clear Active Bit 207" "Not active,Active"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE206 ,Set/Clear Active Bit 206" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE205 ,Set/Clear Active Bit 205" "Not active,Active"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE204 ,Set/Clear Active Bit 204" "Not active,Active"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE203 ,Set/Clear Active Bit 203" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE202 ,Set/Clear Active Bit 202" "Not active,Active"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE201 ,Set/Clear Active Bit 201" "Not active,Active"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE200 ,Set/Clear Active Bit 200" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE199 ,Set/Clear Active Bit 199" "Not active,Active"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE198 ,Set/Clear Active Bit 198" "Not active,Active"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE197 ,Set/Clear Active Bit 197" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE196 ,Set/Clear Active Bit 196" "Not active,Active"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE195 ,Set/Clear Active Bit 195" "Not active,Active"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE194 ,Set/Clear Active Bit 194" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE193 ,Set/Clear Active Bit 193" "Not active,Active"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE192 ,Set/Clear Active Bit 192" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0318++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER6,Interrupt Set/Clear Active Register 6"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x07)
|
|
group.long 0x031C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER7,Interrupt Set/Clear Active Register 7"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE255 ,Set/Clear Active Bit 255" "Not active,Active"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE254 ,Set/Clear Active Bit 254" "Not active,Active"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE253 ,Set/Clear Active Bit 253" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE252 ,Set/Clear Active Bit 252" "Not active,Active"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE251 ,Set/Clear Active Bit 251" "Not active,Active"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE250 ,Set/Clear Active Bit 250" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE249 ,Set/Clear Active Bit 249" "Not active,Active"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE248 ,Set/Clear Active Bit 248" "Not active,Active"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE247 ,Set/Clear Active Bit 247" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE246 ,Set/Clear Active Bit 246" "Not active,Active"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE245 ,Set/Clear Active Bit 245" "Not active,Active"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE244 ,Set/Clear Active Bit 244" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE243 ,Set/Clear Active Bit 243" "Not active,Active"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE242 ,Set/Clear Active Bit 242" "Not active,Active"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE241 ,Set/Clear Active Bit 241" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE240 ,Set/Clear Active Bit 240" "Not active,Active"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE239 ,Set/Clear Active Bit 239" "Not active,Active"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE238 ,Set/Clear Active Bit 238" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE237 ,Set/Clear Active Bit 237" "Not active,Active"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE236 ,Set/Clear Active Bit 236" "Not active,Active"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE235 ,Set/Clear Active Bit 235" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE234 ,Set/Clear Active Bit 234" "Not active,Active"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE233 ,Set/Clear Active Bit 233" "Not active,Active"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE232 ,Set/Clear Active Bit 232" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE231 ,Set/Clear Active Bit 231" "Not active,Active"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE230 ,Set/Clear Active Bit 230" "Not active,Active"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE229 ,Set/Clear Active Bit 229" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE228 ,Set/Clear Active Bit 228" "Not active,Active"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE227 ,Set/Clear Active Bit 227" "Not active,Active"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE226 ,Set/Clear Active Bit 226" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE225 ,Set/Clear Active Bit 225" "Not active,Active"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE224 ,Set/Clear Active Bit 224" "Not active,Active"
|
|
else
|
|
rgroup.long 0x031C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER7,Interrupt Set/Clear Active Register 7"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x08)
|
|
group.long 0x0320++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER8,Interrupt Set/Clear Active Register 8"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE287 ,Set/Clear Active Bit 287" "Not active,Active"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE286 ,Set/Clear Active Bit 286" "Not active,Active"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE285 ,Set/Clear Active Bit 285" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE284 ,Set/Clear Active Bit 284" "Not active,Active"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE283 ,Set/Clear Active Bit 283" "Not active,Active"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE282 ,Set/Clear Active Bit 282" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE281 ,Set/Clear Active Bit 281" "Not active,Active"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE280 ,Set/Clear Active Bit 280" "Not active,Active"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE279 ,Set/Clear Active Bit 279" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE278 ,Set/Clear Active Bit 278" "Not active,Active"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE277 ,Set/Clear Active Bit 277" "Not active,Active"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE276 ,Set/Clear Active Bit 276" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE275 ,Set/Clear Active Bit 275" "Not active,Active"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE274 ,Set/Clear Active Bit 274" "Not active,Active"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE273 ,Set/Clear Active Bit 273" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE272 ,Set/Clear Active Bit 272" "Not active,Active"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE271 ,Set/Clear Active Bit 271" "Not active,Active"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE270 ,Set/Clear Active Bit 270" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE269 ,Set/Clear Active Bit 269" "Not active,Active"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE268 ,Set/Clear Active Bit 268" "Not active,Active"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE267 ,Set/Clear Active Bit 267" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE266 ,Set/Clear Active Bit 266" "Not active,Active"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE265 ,Set/Clear Active Bit 265" "Not active,Active"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE264 ,Set/Clear Active Bit 264" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE263 ,Set/Clear Active Bit 263" "Not active,Active"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE262 ,Set/Clear Active Bit 262" "Not active,Active"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE261 ,Set/Clear Active Bit 261" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE260 ,Set/Clear Active Bit 260" "Not active,Active"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE259 ,Set/Clear Active Bit 259" "Not active,Active"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE258 ,Set/Clear Active Bit 258" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE257 ,Set/Clear Active Bit 257" "Not active,Active"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE256 ,Set/Clear Active Bit 256" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0320++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER8,Interrupt Set/Clear Active Register 8"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x09)
|
|
group.long 0x0324++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER9,Interrupt Set/Clear Active Register 9"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE319 ,Set/Clear Active Bit 319" "Not active,Active"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE318 ,Set/Clear Active Bit 318" "Not active,Active"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE317 ,Set/Clear Active Bit 317" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE316 ,Set/Clear Active Bit 316" "Not active,Active"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE315 ,Set/Clear Active Bit 315" "Not active,Active"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE314 ,Set/Clear Active Bit 314" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE313 ,Set/Clear Active Bit 313" "Not active,Active"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE312 ,Set/Clear Active Bit 312" "Not active,Active"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE311 ,Set/Clear Active Bit 311" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE310 ,Set/Clear Active Bit 310" "Not active,Active"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE309 ,Set/Clear Active Bit 309" "Not active,Active"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE308 ,Set/Clear Active Bit 308" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE307 ,Set/Clear Active Bit 307" "Not active,Active"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE306 ,Set/Clear Active Bit 306" "Not active,Active"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE305 ,Set/Clear Active Bit 305" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE304 ,Set/Clear Active Bit 304" "Not active,Active"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE303 ,Set/Clear Active Bit 303" "Not active,Active"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE302 ,Set/Clear Active Bit 302" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE301 ,Set/Clear Active Bit 301" "Not active,Active"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE300 ,Set/Clear Active Bit 300" "Not active,Active"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE299 ,Set/Clear Active Bit 299" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE298 ,Set/Clear Active Bit 298" "Not active,Active"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE297 ,Set/Clear Active Bit 297" "Not active,Active"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE296 ,Set/Clear Active Bit 296" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE295 ,Set/Clear Active Bit 295" "Not active,Active"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE294 ,Set/Clear Active Bit 294" "Not active,Active"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE293 ,Set/Clear Active Bit 293" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE292 ,Set/Clear Active Bit 292" "Not active,Active"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE291 ,Set/Clear Active Bit 291" "Not active,Active"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE290 ,Set/Clear Active Bit 290" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE289 ,Set/Clear Active Bit 289" "Not active,Active"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE288 ,Set/Clear Active Bit 288" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0324++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER9,Interrupt Set/Clear Active Register 9"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0A)
|
|
group.long 0x0328++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER10,Interrupt Set/Clear Active Register 10"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE351 ,Set/Clear Active Bit 351" "Not active,Active"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE350 ,Set/Clear Active Bit 350" "Not active,Active"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE349 ,Set/Clear Active Bit 349" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE348 ,Set/Clear Active Bit 348" "Not active,Active"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE347 ,Set/Clear Active Bit 347" "Not active,Active"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE346 ,Set/Clear Active Bit 346" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE345 ,Set/Clear Active Bit 345" "Not active,Active"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE344 ,Set/Clear Active Bit 344" "Not active,Active"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE343 ,Set/Clear Active Bit 343" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE342 ,Set/Clear Active Bit 342" "Not active,Active"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE341 ,Set/Clear Active Bit 341" "Not active,Active"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE340 ,Set/Clear Active Bit 340" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE339 ,Set/Clear Active Bit 339" "Not active,Active"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE338 ,Set/Clear Active Bit 338" "Not active,Active"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE337 ,Set/Clear Active Bit 337" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE336 ,Set/Clear Active Bit 336" "Not active,Active"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE335 ,Set/Clear Active Bit 335" "Not active,Active"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE334 ,Set/Clear Active Bit 334" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE333 ,Set/Clear Active Bit 333" "Not active,Active"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE332 ,Set/Clear Active Bit 332" "Not active,Active"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE331 ,Set/Clear Active Bit 331" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE330 ,Set/Clear Active Bit 330" "Not active,Active"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE329 ,Set/Clear Active Bit 329" "Not active,Active"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE328 ,Set/Clear Active Bit 328" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE327 ,Set/Clear Active Bit 327" "Not active,Active"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE326 ,Set/Clear Active Bit 326" "Not active,Active"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE325 ,Set/Clear Active Bit 325" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE324 ,Set/Clear Active Bit 324" "Not active,Active"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE323 ,Set/Clear Active Bit 323" "Not active,Active"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE322 ,Set/Clear Active Bit 322" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE321 ,Set/Clear Active Bit 321" "Not active,Active"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE320 ,Set/Clear Active Bit 320" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0328++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER10,Interrupt Set/Clear Active Register 10"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0B)
|
|
group.long 0x032C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER11,Interrupt Set/Clear Active Register 11"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE383 ,Set/Clear Active Bit 383" "Not active,Active"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE382 ,Set/Clear Active Bit 382" "Not active,Active"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE381 ,Set/Clear Active Bit 381" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE380 ,Set/Clear Active Bit 380" "Not active,Active"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE379 ,Set/Clear Active Bit 379" "Not active,Active"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE378 ,Set/Clear Active Bit 378" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE377 ,Set/Clear Active Bit 377" "Not active,Active"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE376 ,Set/Clear Active Bit 376" "Not active,Active"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE375 ,Set/Clear Active Bit 375" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE374 ,Set/Clear Active Bit 374" "Not active,Active"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE373 ,Set/Clear Active Bit 373" "Not active,Active"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE372 ,Set/Clear Active Bit 372" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE371 ,Set/Clear Active Bit 371" "Not active,Active"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE370 ,Set/Clear Active Bit 370" "Not active,Active"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE369 ,Set/Clear Active Bit 369" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE368 ,Set/Clear Active Bit 368" "Not active,Active"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE367 ,Set/Clear Active Bit 367" "Not active,Active"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE366 ,Set/Clear Active Bit 366" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE365 ,Set/Clear Active Bit 365" "Not active,Active"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE364 ,Set/Clear Active Bit 364" "Not active,Active"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE363 ,Set/Clear Active Bit 363" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE362 ,Set/Clear Active Bit 362" "Not active,Active"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE361 ,Set/Clear Active Bit 361" "Not active,Active"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE360 ,Set/Clear Active Bit 360" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE359 ,Set/Clear Active Bit 359" "Not active,Active"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE358 ,Set/Clear Active Bit 358" "Not active,Active"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE357 ,Set/Clear Active Bit 357" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE356 ,Set/Clear Active Bit 356" "Not active,Active"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE355 ,Set/Clear Active Bit 355" "Not active,Active"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE354 ,Set/Clear Active Bit 354" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE353 ,Set/Clear Active Bit 353" "Not active,Active"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE352 ,Set/Clear Active Bit 352" "Not active,Active"
|
|
else
|
|
rgroup.long 0x032C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER11,Interrupt Set/Clear Active Register 11"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0C)
|
|
group.long 0x0330++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER12,Interrupt Set/Clear Active Register 12"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE415 ,Set/Clear Active Bit 415" "Not active,Active"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE414 ,Set/Clear Active Bit 414" "Not active,Active"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE413 ,Set/Clear Active Bit 413" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE412 ,Set/Clear Active Bit 412" "Not active,Active"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE411 ,Set/Clear Active Bit 411" "Not active,Active"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE410 ,Set/Clear Active Bit 410" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE409 ,Set/Clear Active Bit 409" "Not active,Active"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE408 ,Set/Clear Active Bit 408" "Not active,Active"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE407 ,Set/Clear Active Bit 407" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE406 ,Set/Clear Active Bit 406" "Not active,Active"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE405 ,Set/Clear Active Bit 405" "Not active,Active"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE404 ,Set/Clear Active Bit 404" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE403 ,Set/Clear Active Bit 403" "Not active,Active"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE402 ,Set/Clear Active Bit 402" "Not active,Active"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE401 ,Set/Clear Active Bit 401" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE400 ,Set/Clear Active Bit 400" "Not active,Active"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE399 ,Set/Clear Active Bit 399" "Not active,Active"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE398 ,Set/Clear Active Bit 398" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE397 ,Set/Clear Active Bit 397" "Not active,Active"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE396 ,Set/Clear Active Bit 396" "Not active,Active"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE395 ,Set/Clear Active Bit 395" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE394 ,Set/Clear Active Bit 394" "Not active,Active"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE393 ,Set/Clear Active Bit 393" "Not active,Active"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE392 ,Set/Clear Active Bit 392" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE391 ,Set/Clear Active Bit 391" "Not active,Active"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE390 ,Set/Clear Active Bit 390" "Not active,Active"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE389 ,Set/Clear Active Bit 389" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE388 ,Set/Clear Active Bit 388" "Not active,Active"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE387 ,Set/Clear Active Bit 387" "Not active,Active"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE386 ,Set/Clear Active Bit 386" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE385 ,Set/Clear Active Bit 385" "Not active,Active"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE384 ,Set/Clear Active Bit 384" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0330++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER12,Interrupt Set/Clear Active Register 12"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0D)
|
|
group.long 0x0334++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER13,Interrupt Set/Clear Active Register 13"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE447 ,Set/Clear Active Bit 447" "Not active,Active"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE446 ,Set/Clear Active Bit 446" "Not active,Active"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE445 ,Set/Clear Active Bit 445" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE444 ,Set/Clear Active Bit 444" "Not active,Active"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE443 ,Set/Clear Active Bit 443" "Not active,Active"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE442 ,Set/Clear Active Bit 442" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE441 ,Set/Clear Active Bit 441" "Not active,Active"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE440 ,Set/Clear Active Bit 440" "Not active,Active"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE439 ,Set/Clear Active Bit 439" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE438 ,Set/Clear Active Bit 438" "Not active,Active"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE437 ,Set/Clear Active Bit 437" "Not active,Active"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE436 ,Set/Clear Active Bit 436" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE435 ,Set/Clear Active Bit 435" "Not active,Active"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE434 ,Set/Clear Active Bit 434" "Not active,Active"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE433 ,Set/Clear Active Bit 433" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE432 ,Set/Clear Active Bit 432" "Not active,Active"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE431 ,Set/Clear Active Bit 431" "Not active,Active"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE430 ,Set/Clear Active Bit 430" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE429 ,Set/Clear Active Bit 429" "Not active,Active"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE428 ,Set/Clear Active Bit 428" "Not active,Active"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE427 ,Set/Clear Active Bit 427" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE426 ,Set/Clear Active Bit 426" "Not active,Active"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE425 ,Set/Clear Active Bit 425" "Not active,Active"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE424 ,Set/Clear Active Bit 424" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE423 ,Set/Clear Active Bit 423" "Not active,Active"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE422 ,Set/Clear Active Bit 422" "Not active,Active"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE421 ,Set/Clear Active Bit 421" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE420 ,Set/Clear Active Bit 420" "Not active,Active"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE419 ,Set/Clear Active Bit 419" "Not active,Active"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE418 ,Set/Clear Active Bit 418" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE417 ,Set/Clear Active Bit 417" "Not active,Active"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE416 ,Set/Clear Active Bit 416" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0334++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER13,Interrupt Set/Clear Active Register 13"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0E)
|
|
group.long 0x0338++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER14,Interrupt Set/Clear Active Register 14"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE479 ,Set/Clear Active Bit 479" "Not active,Active"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE478 ,Set/Clear Active Bit 478" "Not active,Active"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE477 ,Set/Clear Active Bit 477" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE476 ,Set/Clear Active Bit 476" "Not active,Active"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE475 ,Set/Clear Active Bit 475" "Not active,Active"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE474 ,Set/Clear Active Bit 474" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE473 ,Set/Clear Active Bit 473" "Not active,Active"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE472 ,Set/Clear Active Bit 472" "Not active,Active"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE471 ,Set/Clear Active Bit 471" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE470 ,Set/Clear Active Bit 470" "Not active,Active"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE469 ,Set/Clear Active Bit 469" "Not active,Active"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE468 ,Set/Clear Active Bit 468" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE467 ,Set/Clear Active Bit 467" "Not active,Active"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE466 ,Set/Clear Active Bit 466" "Not active,Active"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE465 ,Set/Clear Active Bit 465" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE464 ,Set/Clear Active Bit 464" "Not active,Active"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE463 ,Set/Clear Active Bit 463" "Not active,Active"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE462 ,Set/Clear Active Bit 462" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE461 ,Set/Clear Active Bit 461" "Not active,Active"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE460 ,Set/Clear Active Bit 460" "Not active,Active"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE459 ,Set/Clear Active Bit 459" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE458 ,Set/Clear Active Bit 458" "Not active,Active"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE457 ,Set/Clear Active Bit 457" "Not active,Active"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE456 ,Set/Clear Active Bit 456" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE455 ,Set/Clear Active Bit 455" "Not active,Active"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE454 ,Set/Clear Active Bit 454" "Not active,Active"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE453 ,Set/Clear Active Bit 453" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE452 ,Set/Clear Active Bit 452" "Not active,Active"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE451 ,Set/Clear Active Bit 451" "Not active,Active"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE450 ,Set/Clear Active Bit 450" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE449 ,Set/Clear Active Bit 449" "Not active,Active"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE448 ,Set/Clear Active Bit 448" "Not active,Active"
|
|
else
|
|
rgroup.long 0x0338++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER14,Interrupt Set/Clear Active Register 14"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0F)
|
|
group.long 0x033C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER15,Interrupt Set/Clear Active Register 15"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE511 ,Set/Clear Active Bit 511" "Not active,Active"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE510 ,Set/Clear Active Bit 510" "Not active,Active"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE509 ,Set/Clear Active Bit 509" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE508 ,Set/Clear Active Bit 508" "Not active,Active"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE507 ,Set/Clear Active Bit 507" "Not active,Active"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE506 ,Set/Clear Active Bit 506" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE505 ,Set/Clear Active Bit 505" "Not active,Active"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE504 ,Set/Clear Active Bit 504" "Not active,Active"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE503 ,Set/Clear Active Bit 503" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE502 ,Set/Clear Active Bit 502" "Not active,Active"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE501 ,Set/Clear Active Bit 501" "Not active,Active"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE500 ,Set/Clear Active Bit 500" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE499 ,Set/Clear Active Bit 499" "Not active,Active"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE498 ,Set/Clear Active Bit 498" "Not active,Active"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE497 ,Set/Clear Active Bit 497" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE496 ,Set/Clear Active Bit 496" "Not active,Active"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE495 ,Set/Clear Active Bit 495" "Not active,Active"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE494 ,Set/Clear Active Bit 494" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE493 ,Set/Clear Active Bit 493" "Not active,Active"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE492 ,Set/Clear Active Bit 492" "Not active,Active"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE491 ,Set/Clear Active Bit 491" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE490 ,Set/Clear Active Bit 490" "Not active,Active"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE489 ,Set/Clear Active Bit 489" "Not active,Active"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE488 ,Set/Clear Active Bit 488" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE487 ,Set/Clear Active Bit 487" "Not active,Active"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE486 ,Set/Clear Active Bit 486" "Not active,Active"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE485 ,Set/Clear Active Bit 485" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE484 ,Set/Clear Active Bit 484" "Not active,Active"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE483 ,Set/Clear Active Bit 483" "Not active,Active"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE482 ,Set/Clear Active Bit 482" "Not active,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE481 ,Set/Clear Active Bit 481" "Not active,Active"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE480 ,Set/Clear Active Bit 480" "Not active,Active"
|
|
else
|
|
rgroup.long 0x033C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER15,Interrupt Set/Clear Active Register 15"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
rgroup.long 0x0340++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER16,Interrupt Set/Clear Active Register 16"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
rgroup.long 0x0344++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER17,Interrupt Set/Clear Active Register 17"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
rgroup.long 0x0348++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER18,Interrupt Set/Clear Active Register 18"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
rgroup.long 0x034C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER19,Interrupt Set/Clear Active Register 19"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
rgroup.long 0x0350++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER20,Interrupt Set/Clear Active Register 20"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
rgroup.long 0x0354++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER21,Interrupt Set/Clear Active Register 21"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
rgroup.long 0x0358++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER22,Interrupt Set/Clear Active Register 22"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
rgroup.long 0x035C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER23,Interrupt Set/Clear Active Register 23"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
rgroup.long 0x0360++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER24,Interrupt Set/Clear Active Register 24"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
rgroup.long 0x0364++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER25,Interrupt Set/Clear Active Register 25"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
rgroup.long 0x0368++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER26,Interrupt Set/Clear Active Register 26"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
rgroup.long 0x036C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER27,Interrupt Set/Clear Active Register 27"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
rgroup.long 0x0370++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER28,Interrupt Set/Clear Active Register 28"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
rgroup.long 0x0374++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER29,Interrupt Set/Clear Active Register 29"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
rgroup.long 0x0378++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER30,Interrupt Set/Clear Active Register 30"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
rgroup.long 0x037C++0x03
|
|
line.long 0x0 "GICD_SET/CLR_ACTIVER31,Interrupt Set/Clear Active Register 31"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
tree "Priority Registers"
|
|
group.long 0x400++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR0,Interrupt Priority Register 0"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID3 ,Interrupt ID3 Priority/Priority Byte Offset 3 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID2 ,Interrupt ID2 Priority/Priority Byte Offset 2 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID1 ,Interrupt ID1 Priority/Priority Byte Offset 1 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID0 ,Interrupt ID0 Priority/Priority Byte Offset 0 "
|
|
group.long 0x404++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR1,Interrupt Priority Register 1"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID7 ,Interrupt ID7 Priority/Priority Byte Offset 7 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID6 ,Interrupt ID6 Priority/Priority Byte Offset 6 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID5 ,Interrupt ID5 Priority/Priority Byte Offset 5 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID4 ,Interrupt ID4 Priority/Priority Byte Offset 4 "
|
|
group.long 0x408++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR2,Interrupt Priority Register 2"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID11 ,Interrupt ID11 Priority/Priority Byte Offset 11 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID10 ,Interrupt ID10 Priority/Priority Byte Offset 10 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID9 ,Interrupt ID9 Priority/Priority Byte Offset 9 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID8 ,Interrupt ID8 Priority/Priority Byte Offset 8 "
|
|
group.long 0x40C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR3,Interrupt Priority Register 3"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID15 ,Interrupt ID15 Priority/Priority Byte Offset 15 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID14 ,Interrupt ID14 Priority/Priority Byte Offset 14 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID13 ,Interrupt ID13 Priority/Priority Byte Offset 13 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID12 ,Interrupt ID12 Priority/Priority Byte Offset 12 "
|
|
group.long 0x410++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR4,Interrupt Priority Register 4"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID19 ,Interrupt ID19 Priority/Priority Byte Offset 19 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID18 ,Interrupt ID18 Priority/Priority Byte Offset 18 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID17 ,Interrupt ID17 Priority/Priority Byte Offset 17 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID16 ,Interrupt ID16 Priority/Priority Byte Offset 16 "
|
|
group.long 0x414++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR5,Interrupt Priority Register 5"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID23 ,Interrupt ID23 Priority/Priority Byte Offset 23 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID22 ,Interrupt ID22 Priority/Priority Byte Offset 22 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID21 ,Interrupt ID21 Priority/Priority Byte Offset 21 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID20 ,Interrupt ID20 Priority/Priority Byte Offset 20 "
|
|
group.long 0x418++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR6,Interrupt Priority Register 6"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID27 ,Interrupt ID27 Priority/Priority Byte Offset 27 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID26 ,Interrupt ID26 Priority/Priority Byte Offset 26 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID25 ,Interrupt ID25 Priority/Priority Byte Offset 25 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID24 ,Interrupt ID24 Priority/Priority Byte Offset 24 "
|
|
group.long 0x41C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR7,Interrupt Priority Register 7"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID31 ,Interrupt ID31 Priority/Priority Byte Offset 31 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID30 ,Interrupt ID30 Priority/Priority Byte Offset 30 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID29 ,Interrupt ID29 Priority/Priority Byte Offset 29 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID28 ,Interrupt ID28 Priority/Priority Byte Offset 28 "
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x01)
|
|
group.long 0x420++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR8,Interrupt Priority Register 8"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID35 ,Interrupt ID35 Priority/Priority Byte Offset 35 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID34 ,Interrupt ID34 Priority/Priority Byte Offset 34 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID33 ,Interrupt ID33 Priority/Priority Byte Offset 33 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID32 ,Interrupt ID32 Priority/Priority Byte Offset 32 "
|
|
group.long 0x424++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR9,Interrupt Priority Register 9"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID39 ,Interrupt ID39 Priority/Priority Byte Offset 39 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID38 ,Interrupt ID38 Priority/Priority Byte Offset 38 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID37 ,Interrupt ID37 Priority/Priority Byte Offset 37 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID36 ,Interrupt ID36 Priority/Priority Byte Offset 36 "
|
|
group.long 0x428++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR10,Interrupt Priority Register 10"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID43 ,Interrupt ID43 Priority/Priority Byte Offset 43 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID42 ,Interrupt ID42 Priority/Priority Byte Offset 42 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID41 ,Interrupt ID41 Priority/Priority Byte Offset 41 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID40 ,Interrupt ID40 Priority/Priority Byte Offset 40 "
|
|
group.long 0x42C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR11,Interrupt Priority Register 11"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID47 ,Interrupt ID47 Priority/Priority Byte Offset 47 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID46 ,Interrupt ID46 Priority/Priority Byte Offset 46 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID45 ,Interrupt ID45 Priority/Priority Byte Offset 45 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID44 ,Interrupt ID44 Priority/Priority Byte Offset 44 "
|
|
group.long 0x430++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR12,Interrupt Priority Register 12"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID51 ,Interrupt ID51 Priority/Priority Byte Offset 51 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID50 ,Interrupt ID50 Priority/Priority Byte Offset 50 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID49 ,Interrupt ID49 Priority/Priority Byte Offset 49 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID48 ,Interrupt ID48 Priority/Priority Byte Offset 48 "
|
|
group.long 0x434++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR13,Interrupt Priority Register 13"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID55 ,Interrupt ID55 Priority/Priority Byte Offset 55 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID54 ,Interrupt ID54 Priority/Priority Byte Offset 54 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID53 ,Interrupt ID53 Priority/Priority Byte Offset 53 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID52 ,Interrupt ID52 Priority/Priority Byte Offset 52 "
|
|
group.long 0x438++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR14,Interrupt Priority Register 14"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID59 ,Interrupt ID59 Priority/Priority Byte Offset 59 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID58 ,Interrupt ID58 Priority/Priority Byte Offset 58 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID57 ,Interrupt ID57 Priority/Priority Byte Offset 57 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID56 ,Interrupt ID56 Priority/Priority Byte Offset 56 "
|
|
group.long 0x43C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR15,Interrupt Priority Register 15"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID63 ,Interrupt ID63 Priority/Priority Byte Offset 63 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID62 ,Interrupt ID62 Priority/Priority Byte Offset 62 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID61 ,Interrupt ID61 Priority/Priority Byte Offset 61 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID60 ,Interrupt ID60 Priority/Priority Byte Offset 60 "
|
|
else
|
|
rgroup.long 0x420++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR8,Interrupt Priority Register 8"
|
|
rgroup.long 0x424++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR9,Interrupt Priority Register 9"
|
|
rgroup.long 0x428++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR10,Interrupt Priority Register 10"
|
|
rgroup.long 0x42C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR11,Interrupt Priority Register 11"
|
|
rgroup.long 0x430++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR12,Interrupt Priority Register 12"
|
|
rgroup.long 0x434++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR13,Interrupt Priority Register 13"
|
|
rgroup.long 0x438++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR14,Interrupt Priority Register 14"
|
|
rgroup.long 0x43C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR15,Interrupt Priority Register 15"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x02)
|
|
group.long 0x440++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR16,Interrupt Priority Register 16"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID67 ,Interrupt ID67 Priority/Priority Byte Offset 67 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID66 ,Interrupt ID66 Priority/Priority Byte Offset 66 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID65 ,Interrupt ID65 Priority/Priority Byte Offset 65 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID64 ,Interrupt ID64 Priority/Priority Byte Offset 64 "
|
|
group.long 0x444++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR17,Interrupt Priority Register 17"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID71 ,Interrupt ID71 Priority/Priority Byte Offset 71 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID70 ,Interrupt ID70 Priority/Priority Byte Offset 70 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID69 ,Interrupt ID69 Priority/Priority Byte Offset 69 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID68 ,Interrupt ID68 Priority/Priority Byte Offset 68 "
|
|
group.long 0x448++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR18,Interrupt Priority Register 18"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID75 ,Interrupt ID75 Priority/Priority Byte Offset 75 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID74 ,Interrupt ID74 Priority/Priority Byte Offset 74 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID73 ,Interrupt ID73 Priority/Priority Byte Offset 73 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID72 ,Interrupt ID72 Priority/Priority Byte Offset 72 "
|
|
group.long 0x44C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR19,Interrupt Priority Register 19"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID79 ,Interrupt ID79 Priority/Priority Byte Offset 79 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID78 ,Interrupt ID78 Priority/Priority Byte Offset 78 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID77 ,Interrupt ID77 Priority/Priority Byte Offset 77 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID76 ,Interrupt ID76 Priority/Priority Byte Offset 76 "
|
|
group.long 0x450++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR20,Interrupt Priority Register 20"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID83 ,Interrupt ID83 Priority/Priority Byte Offset 83 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID82 ,Interrupt ID82 Priority/Priority Byte Offset 82 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID81 ,Interrupt ID81 Priority/Priority Byte Offset 81 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID80 ,Interrupt ID80 Priority/Priority Byte Offset 80 "
|
|
group.long 0x454++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR21,Interrupt Priority Register 21"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID87 ,Interrupt ID87 Priority/Priority Byte Offset 87 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID86 ,Interrupt ID86 Priority/Priority Byte Offset 86 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID85 ,Interrupt ID85 Priority/Priority Byte Offset 85 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID84 ,Interrupt ID84 Priority/Priority Byte Offset 84 "
|
|
group.long 0x458++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR22,Interrupt Priority Register 22"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID91 ,Interrupt ID91 Priority/Priority Byte Offset 91 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID90 ,Interrupt ID90 Priority/Priority Byte Offset 90 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID89 ,Interrupt ID89 Priority/Priority Byte Offset 89 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID88 ,Interrupt ID88 Priority/Priority Byte Offset 88 "
|
|
group.long 0x45C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR23,Interrupt Priority Register 23"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID95 ,Interrupt ID95 Priority/Priority Byte Offset 95 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID94 ,Interrupt ID94 Priority/Priority Byte Offset 94 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID93 ,Interrupt ID93 Priority/Priority Byte Offset 93 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID92 ,Interrupt ID92 Priority/Priority Byte Offset 92 "
|
|
else
|
|
rgroup.long 0x440++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR16,Interrupt Priority Register 16"
|
|
rgroup.long 0x444++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR17,Interrupt Priority Register 17"
|
|
rgroup.long 0x448++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR18,Interrupt Priority Register 18"
|
|
rgroup.long 0x44C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR19,Interrupt Priority Register 19"
|
|
rgroup.long 0x450++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR20,Interrupt Priority Register 20"
|
|
rgroup.long 0x454++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR21,Interrupt Priority Register 21"
|
|
rgroup.long 0x458++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR22,Interrupt Priority Register 22"
|
|
rgroup.long 0x45C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR23,Interrupt Priority Register 23"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x03)
|
|
group.long 0x460++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR24,Interrupt Priority Register 24"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID99 ,Interrupt ID99 Priority/Priority Byte Offset 99 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID98 ,Interrupt ID98 Priority/Priority Byte Offset 98 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID97 ,Interrupt ID97 Priority/Priority Byte Offset 97 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID96 ,Interrupt ID96 Priority/Priority Byte Offset 96 "
|
|
group.long 0x464++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR25,Interrupt Priority Register 25"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID103 ,Interrupt ID103 Priority/Priority Byte Offset 103 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID102 ,Interrupt ID102 Priority/Priority Byte Offset 102 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID101 ,Interrupt ID101 Priority/Priority Byte Offset 101 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID100 ,Interrupt ID100 Priority/Priority Byte Offset 100 "
|
|
group.long 0x468++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR26,Interrupt Priority Register 26"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID107 ,Interrupt ID107 Priority/Priority Byte Offset 107 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID106 ,Interrupt ID106 Priority/Priority Byte Offset 106 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID105 ,Interrupt ID105 Priority/Priority Byte Offset 105 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID104 ,Interrupt ID104 Priority/Priority Byte Offset 104 "
|
|
group.long 0x46C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR27,Interrupt Priority Register 27"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID111 ,Interrupt ID111 Priority/Priority Byte Offset 111 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID110 ,Interrupt ID110 Priority/Priority Byte Offset 110 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID109 ,Interrupt ID109 Priority/Priority Byte Offset 109 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID108 ,Interrupt ID108 Priority/Priority Byte Offset 108 "
|
|
group.long 0x470++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR28,Interrupt Priority Register 28"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID115 ,Interrupt ID115 Priority/Priority Byte Offset 115 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID114 ,Interrupt ID114 Priority/Priority Byte Offset 114 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID113 ,Interrupt ID113 Priority/Priority Byte Offset 113 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID112 ,Interrupt ID112 Priority/Priority Byte Offset 112 "
|
|
group.long 0x474++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR29,Interrupt Priority Register 29"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID119 ,Interrupt ID119 Priority/Priority Byte Offset 119 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID118 ,Interrupt ID118 Priority/Priority Byte Offset 118 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID117 ,Interrupt ID117 Priority/Priority Byte Offset 117 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID116 ,Interrupt ID116 Priority/Priority Byte Offset 116 "
|
|
group.long 0x478++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR30,Interrupt Priority Register 30"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID123 ,Interrupt ID123 Priority/Priority Byte Offset 123 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID122 ,Interrupt ID122 Priority/Priority Byte Offset 122 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID121 ,Interrupt ID121 Priority/Priority Byte Offset 121 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID120 ,Interrupt ID120 Priority/Priority Byte Offset 120 "
|
|
group.long 0x47C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR31,Interrupt Priority Register 31"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID127 ,Interrupt ID127 Priority/Priority Byte Offset 127 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID126 ,Interrupt ID126 Priority/Priority Byte Offset 126 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID125 ,Interrupt ID125 Priority/Priority Byte Offset 125 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID124 ,Interrupt ID124 Priority/Priority Byte Offset 124 "
|
|
else
|
|
rgroup.long 0x460++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR24,Interrupt Priority Register 24"
|
|
rgroup.long 0x464++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR25,Interrupt Priority Register 25"
|
|
rgroup.long 0x468++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR26,Interrupt Priority Register 26"
|
|
rgroup.long 0x46C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR27,Interrupt Priority Register 27"
|
|
rgroup.long 0x470++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR28,Interrupt Priority Register 28"
|
|
rgroup.long 0x474++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR29,Interrupt Priority Register 29"
|
|
rgroup.long 0x478++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR30,Interrupt Priority Register 30"
|
|
rgroup.long 0x47C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR31,Interrupt Priority Register 31"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x04)
|
|
group.long 0x480++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR32,Interrupt Priority Register 32"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID131 ,Interrupt ID131 Priority/Priority Byte Offset 131 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID130 ,Interrupt ID130 Priority/Priority Byte Offset 130 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID129 ,Interrupt ID129 Priority/Priority Byte Offset 129 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID128 ,Interrupt ID128 Priority/Priority Byte Offset 128 "
|
|
group.long 0x484++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR33,Interrupt Priority Register 33"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID135 ,Interrupt ID135 Priority/Priority Byte Offset 135 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID134 ,Interrupt ID134 Priority/Priority Byte Offset 134 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID133 ,Interrupt ID133 Priority/Priority Byte Offset 133 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID132 ,Interrupt ID132 Priority/Priority Byte Offset 132 "
|
|
group.long 0x488++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR34,Interrupt Priority Register 34"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID139 ,Interrupt ID139 Priority/Priority Byte Offset 139 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID138 ,Interrupt ID138 Priority/Priority Byte Offset 138 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID137 ,Interrupt ID137 Priority/Priority Byte Offset 137 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID136 ,Interrupt ID136 Priority/Priority Byte Offset 136 "
|
|
group.long 0x48C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR35,Interrupt Priority Register 35"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID143 ,Interrupt ID143 Priority/Priority Byte Offset 143 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID142 ,Interrupt ID142 Priority/Priority Byte Offset 142 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID141 ,Interrupt ID141 Priority/Priority Byte Offset 141 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID140 ,Interrupt ID140 Priority/Priority Byte Offset 140 "
|
|
group.long 0x490++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR36,Interrupt Priority Register 36"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID147 ,Interrupt ID147 Priority/Priority Byte Offset 147 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID146 ,Interrupt ID146 Priority/Priority Byte Offset 146 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID145 ,Interrupt ID145 Priority/Priority Byte Offset 145 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID144 ,Interrupt ID144 Priority/Priority Byte Offset 144 "
|
|
group.long 0x494++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR37,Interrupt Priority Register 37"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID151 ,Interrupt ID151 Priority/Priority Byte Offset 151 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID150 ,Interrupt ID150 Priority/Priority Byte Offset 150 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID149 ,Interrupt ID149 Priority/Priority Byte Offset 149 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID148 ,Interrupt ID148 Priority/Priority Byte Offset 148 "
|
|
group.long 0x498++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR38,Interrupt Priority Register 38"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID155 ,Interrupt ID155 Priority/Priority Byte Offset 155 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID154 ,Interrupt ID154 Priority/Priority Byte Offset 154 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID153 ,Interrupt ID153 Priority/Priority Byte Offset 153 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID152 ,Interrupt ID152 Priority/Priority Byte Offset 152 "
|
|
group.long 0x49C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR39,Interrupt Priority Register 39"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID159 ,Interrupt ID159 Priority/Priority Byte Offset 159 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID158 ,Interrupt ID158 Priority/Priority Byte Offset 158 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID157 ,Interrupt ID157 Priority/Priority Byte Offset 157 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID156 ,Interrupt ID156 Priority/Priority Byte Offset 156 "
|
|
else
|
|
rgroup.long 0x480++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR32,Interrupt Priority Register 32"
|
|
rgroup.long 0x484++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR33,Interrupt Priority Register 33"
|
|
rgroup.long 0x488++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR34,Interrupt Priority Register 34"
|
|
rgroup.long 0x48C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR35,Interrupt Priority Register 35"
|
|
rgroup.long 0x490++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR36,Interrupt Priority Register 36"
|
|
rgroup.long 0x494++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR37,Interrupt Priority Register 37"
|
|
rgroup.long 0x498++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR38,Interrupt Priority Register 38"
|
|
rgroup.long 0x49C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR39,Interrupt Priority Register 39"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x05)
|
|
group.long 0x4A0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR40,Interrupt Priority Register 40"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID163 ,Interrupt ID163 Priority/Priority Byte Offset 163 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID162 ,Interrupt ID162 Priority/Priority Byte Offset 162 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID161 ,Interrupt ID161 Priority/Priority Byte Offset 161 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID160 ,Interrupt ID160 Priority/Priority Byte Offset 160 "
|
|
group.long 0x4A4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR41,Interrupt Priority Register 41"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID167 ,Interrupt ID167 Priority/Priority Byte Offset 167 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID166 ,Interrupt ID166 Priority/Priority Byte Offset 166 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID165 ,Interrupt ID165 Priority/Priority Byte Offset 165 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID164 ,Interrupt ID164 Priority/Priority Byte Offset 164 "
|
|
group.long 0x4A8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR42,Interrupt Priority Register 42"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID171 ,Interrupt ID171 Priority/Priority Byte Offset 171 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID170 ,Interrupt ID170 Priority/Priority Byte Offset 170 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID169 ,Interrupt ID169 Priority/Priority Byte Offset 169 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID168 ,Interrupt ID168 Priority/Priority Byte Offset 168 "
|
|
group.long 0x4AC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR43,Interrupt Priority Register 43"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID175 ,Interrupt ID175 Priority/Priority Byte Offset 175 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID174 ,Interrupt ID174 Priority/Priority Byte Offset 174 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID173 ,Interrupt ID173 Priority/Priority Byte Offset 173 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID172 ,Interrupt ID172 Priority/Priority Byte Offset 172 "
|
|
group.long 0x4B0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR44,Interrupt Priority Register 44"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID179 ,Interrupt ID179 Priority/Priority Byte Offset 179 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID178 ,Interrupt ID178 Priority/Priority Byte Offset 178 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID177 ,Interrupt ID177 Priority/Priority Byte Offset 177 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID176 ,Interrupt ID176 Priority/Priority Byte Offset 176 "
|
|
group.long 0x4B4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR45,Interrupt Priority Register 45"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID183 ,Interrupt ID183 Priority/Priority Byte Offset 183 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID182 ,Interrupt ID182 Priority/Priority Byte Offset 182 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID181 ,Interrupt ID181 Priority/Priority Byte Offset 181 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID180 ,Interrupt ID180 Priority/Priority Byte Offset 180 "
|
|
group.long 0x4B8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR46,Interrupt Priority Register 46"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID187 ,Interrupt ID187 Priority/Priority Byte Offset 187 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID186 ,Interrupt ID186 Priority/Priority Byte Offset 186 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID185 ,Interrupt ID185 Priority/Priority Byte Offset 185 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID184 ,Interrupt ID184 Priority/Priority Byte Offset 184 "
|
|
group.long 0x4BC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR47,Interrupt Priority Register 47"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID191 ,Interrupt ID191 Priority/Priority Byte Offset 191 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID190 ,Interrupt ID190 Priority/Priority Byte Offset 190 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID189 ,Interrupt ID189 Priority/Priority Byte Offset 189 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID188 ,Interrupt ID188 Priority/Priority Byte Offset 188 "
|
|
else
|
|
rgroup.long 0x4A0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR40,Interrupt Priority Register 40"
|
|
rgroup.long 0x4A4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR41,Interrupt Priority Register 41"
|
|
rgroup.long 0x4A8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR42,Interrupt Priority Register 42"
|
|
rgroup.long 0x4AC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR43,Interrupt Priority Register 43"
|
|
rgroup.long 0x4B0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR44,Interrupt Priority Register 44"
|
|
rgroup.long 0x4B4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR45,Interrupt Priority Register 45"
|
|
rgroup.long 0x4B8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR46,Interrupt Priority Register 46"
|
|
rgroup.long 0x4BC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR47,Interrupt Priority Register 47"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x06)
|
|
group.long 0x4C0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR48,Interrupt Priority Register 48"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID195 ,Interrupt ID195 Priority/Priority Byte Offset 195 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID194 ,Interrupt ID194 Priority/Priority Byte Offset 194 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID193 ,Interrupt ID193 Priority/Priority Byte Offset 193 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID192 ,Interrupt ID192 Priority/Priority Byte Offset 192 "
|
|
group.long 0x4C4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR49,Interrupt Priority Register 49"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID199 ,Interrupt ID199 Priority/Priority Byte Offset 199 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID198 ,Interrupt ID198 Priority/Priority Byte Offset 198 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID197 ,Interrupt ID197 Priority/Priority Byte Offset 197 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID196 ,Interrupt ID196 Priority/Priority Byte Offset 196 "
|
|
group.long 0x4C8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR50,Interrupt Priority Register 50"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID203 ,Interrupt ID203 Priority/Priority Byte Offset 203 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID202 ,Interrupt ID202 Priority/Priority Byte Offset 202 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID201 ,Interrupt ID201 Priority/Priority Byte Offset 201 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID200 ,Interrupt ID200 Priority/Priority Byte Offset 200 "
|
|
group.long 0x4CC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR51,Interrupt Priority Register 51"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID207 ,Interrupt ID207 Priority/Priority Byte Offset 207 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID206 ,Interrupt ID206 Priority/Priority Byte Offset 206 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID205 ,Interrupt ID205 Priority/Priority Byte Offset 205 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID204 ,Interrupt ID204 Priority/Priority Byte Offset 204 "
|
|
group.long 0x4D0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR52,Interrupt Priority Register 52"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID211 ,Interrupt ID211 Priority/Priority Byte Offset 211 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID210 ,Interrupt ID210 Priority/Priority Byte Offset 210 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID209 ,Interrupt ID209 Priority/Priority Byte Offset 209 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID208 ,Interrupt ID208 Priority/Priority Byte Offset 208 "
|
|
group.long 0x4D4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR53,Interrupt Priority Register 53"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID215 ,Interrupt ID215 Priority/Priority Byte Offset 215 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID214 ,Interrupt ID214 Priority/Priority Byte Offset 214 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID213 ,Interrupt ID213 Priority/Priority Byte Offset 213 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID212 ,Interrupt ID212 Priority/Priority Byte Offset 212 "
|
|
group.long 0x4D8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR54,Interrupt Priority Register 54"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID219 ,Interrupt ID219 Priority/Priority Byte Offset 219 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID218 ,Interrupt ID218 Priority/Priority Byte Offset 218 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID217 ,Interrupt ID217 Priority/Priority Byte Offset 217 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID216 ,Interrupt ID216 Priority/Priority Byte Offset 216 "
|
|
group.long 0x4DC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR55,Interrupt Priority Register 55"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID223 ,Interrupt ID223 Priority/Priority Byte Offset 223 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID222 ,Interrupt ID222 Priority/Priority Byte Offset 222 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID221 ,Interrupt ID221 Priority/Priority Byte Offset 221 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID220 ,Interrupt ID220 Priority/Priority Byte Offset 220 "
|
|
else
|
|
rgroup.long 0x4C0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR48,Interrupt Priority Register 48"
|
|
rgroup.long 0x4C4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR49,Interrupt Priority Register 49"
|
|
rgroup.long 0x4C8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR50,Interrupt Priority Register 50"
|
|
rgroup.long 0x4CC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR51,Interrupt Priority Register 51"
|
|
rgroup.long 0x4D0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR52,Interrupt Priority Register 52"
|
|
rgroup.long 0x4D4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR53,Interrupt Priority Register 53"
|
|
rgroup.long 0x4D8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR54,Interrupt Priority Register 54"
|
|
rgroup.long 0x4DC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR55,Interrupt Priority Register 55"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x07)
|
|
group.long 0x4E0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR56,Interrupt Priority Register 56"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID227 ,Interrupt ID227 Priority/Priority Byte Offset 227 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID226 ,Interrupt ID226 Priority/Priority Byte Offset 226 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID225 ,Interrupt ID225 Priority/Priority Byte Offset 225 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID224 ,Interrupt ID224 Priority/Priority Byte Offset 224 "
|
|
group.long 0x4E4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR57,Interrupt Priority Register 57"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID231 ,Interrupt ID231 Priority/Priority Byte Offset 231 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID230 ,Interrupt ID230 Priority/Priority Byte Offset 230 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID229 ,Interrupt ID229 Priority/Priority Byte Offset 229 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID228 ,Interrupt ID228 Priority/Priority Byte Offset 228 "
|
|
group.long 0x4E8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR58,Interrupt Priority Register 58"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID235 ,Interrupt ID235 Priority/Priority Byte Offset 235 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID234 ,Interrupt ID234 Priority/Priority Byte Offset 234 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID233 ,Interrupt ID233 Priority/Priority Byte Offset 233 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID232 ,Interrupt ID232 Priority/Priority Byte Offset 232 "
|
|
group.long 0x4EC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR59,Interrupt Priority Register 59"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID239 ,Interrupt ID239 Priority/Priority Byte Offset 239 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID238 ,Interrupt ID238 Priority/Priority Byte Offset 238 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID237 ,Interrupt ID237 Priority/Priority Byte Offset 237 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID236 ,Interrupt ID236 Priority/Priority Byte Offset 236 "
|
|
group.long 0x4F0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR60,Interrupt Priority Register 60"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID243 ,Interrupt ID243 Priority/Priority Byte Offset 243 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID242 ,Interrupt ID242 Priority/Priority Byte Offset 242 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID241 ,Interrupt ID241 Priority/Priority Byte Offset 241 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID240 ,Interrupt ID240 Priority/Priority Byte Offset 240 "
|
|
group.long 0x4F4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR61,Interrupt Priority Register 61"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID247 ,Interrupt ID247 Priority/Priority Byte Offset 247 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID246 ,Interrupt ID246 Priority/Priority Byte Offset 246 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID245 ,Interrupt ID245 Priority/Priority Byte Offset 245 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID244 ,Interrupt ID244 Priority/Priority Byte Offset 244 "
|
|
group.long 0x4F8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR62,Interrupt Priority Register 62"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID251 ,Interrupt ID251 Priority/Priority Byte Offset 251 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID250 ,Interrupt ID250 Priority/Priority Byte Offset 250 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID249 ,Interrupt ID249 Priority/Priority Byte Offset 249 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID248 ,Interrupt ID248 Priority/Priority Byte Offset 248 "
|
|
group.long 0x4FC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR63,Interrupt Priority Register 63"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID255 ,Interrupt ID255 Priority/Priority Byte Offset 255 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID254 ,Interrupt ID254 Priority/Priority Byte Offset 254 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID253 ,Interrupt ID253 Priority/Priority Byte Offset 253 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID252 ,Interrupt ID252 Priority/Priority Byte Offset 252 "
|
|
else
|
|
rgroup.long 0x4E0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR56,Interrupt Priority Register 56"
|
|
rgroup.long 0x4E4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR57,Interrupt Priority Register 57"
|
|
rgroup.long 0x4E8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR58,Interrupt Priority Register 58"
|
|
rgroup.long 0x4EC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR59,Interrupt Priority Register 59"
|
|
rgroup.long 0x4F0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR60,Interrupt Priority Register 60"
|
|
rgroup.long 0x4F4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR61,Interrupt Priority Register 61"
|
|
rgroup.long 0x4F8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR62,Interrupt Priority Register 62"
|
|
rgroup.long 0x4FC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR63,Interrupt Priority Register 63"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x08)
|
|
group.long 0x500++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR64,Interrupt Priority Register 64"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID259 ,Interrupt ID259 Priority/Priority Byte Offset 259 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID258 ,Interrupt ID258 Priority/Priority Byte Offset 258 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID257 ,Interrupt ID257 Priority/Priority Byte Offset 257 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID256 ,Interrupt ID256 Priority/Priority Byte Offset 256 "
|
|
group.long 0x504++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR65,Interrupt Priority Register 65"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID263 ,Interrupt ID263 Priority/Priority Byte Offset 263 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID262 ,Interrupt ID262 Priority/Priority Byte Offset 262 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID261 ,Interrupt ID261 Priority/Priority Byte Offset 261 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID260 ,Interrupt ID260 Priority/Priority Byte Offset 260 "
|
|
group.long 0x508++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR66,Interrupt Priority Register 66"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID267 ,Interrupt ID267 Priority/Priority Byte Offset 267 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID266 ,Interrupt ID266 Priority/Priority Byte Offset 266 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID265 ,Interrupt ID265 Priority/Priority Byte Offset 265 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID264 ,Interrupt ID264 Priority/Priority Byte Offset 264 "
|
|
group.long 0x50C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR67,Interrupt Priority Register 67"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID271 ,Interrupt ID271 Priority/Priority Byte Offset 271 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID270 ,Interrupt ID270 Priority/Priority Byte Offset 270 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID269 ,Interrupt ID269 Priority/Priority Byte Offset 269 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID268 ,Interrupt ID268 Priority/Priority Byte Offset 268 "
|
|
group.long 0x510++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR68,Interrupt Priority Register 68"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID275 ,Interrupt ID275 Priority/Priority Byte Offset 275 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID274 ,Interrupt ID274 Priority/Priority Byte Offset 274 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID273 ,Interrupt ID273 Priority/Priority Byte Offset 273 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID272 ,Interrupt ID272 Priority/Priority Byte Offset 272 "
|
|
group.long 0x514++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR69,Interrupt Priority Register 69"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID279 ,Interrupt ID279 Priority/Priority Byte Offset 279 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID278 ,Interrupt ID278 Priority/Priority Byte Offset 278 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID277 ,Interrupt ID277 Priority/Priority Byte Offset 277 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID276 ,Interrupt ID276 Priority/Priority Byte Offset 276 "
|
|
group.long 0x518++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR70,Interrupt Priority Register 70"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID283 ,Interrupt ID283 Priority/Priority Byte Offset 283 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID282 ,Interrupt ID282 Priority/Priority Byte Offset 282 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID281 ,Interrupt ID281 Priority/Priority Byte Offset 281 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID280 ,Interrupt ID280 Priority/Priority Byte Offset 280 "
|
|
group.long 0x51C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR71,Interrupt Priority Register 71"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID287 ,Interrupt ID287 Priority/Priority Byte Offset 287 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID286 ,Interrupt ID286 Priority/Priority Byte Offset 286 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID285 ,Interrupt ID285 Priority/Priority Byte Offset 285 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID284 ,Interrupt ID284 Priority/Priority Byte Offset 284 "
|
|
else
|
|
rgroup.long 0x500++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR64,Interrupt Priority Register 64"
|
|
rgroup.long 0x504++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR65,Interrupt Priority Register 65"
|
|
rgroup.long 0x508++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR66,Interrupt Priority Register 66"
|
|
rgroup.long 0x50C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR67,Interrupt Priority Register 67"
|
|
rgroup.long 0x510++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR68,Interrupt Priority Register 68"
|
|
rgroup.long 0x514++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR69,Interrupt Priority Register 69"
|
|
rgroup.long 0x518++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR70,Interrupt Priority Register 70"
|
|
rgroup.long 0x51C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR71,Interrupt Priority Register 71"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x09)
|
|
group.long 0x520++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR72,Interrupt Priority Register 72"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID291 ,Interrupt ID291 Priority/Priority Byte Offset 291 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID290 ,Interrupt ID290 Priority/Priority Byte Offset 290 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID289 ,Interrupt ID289 Priority/Priority Byte Offset 289 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID288 ,Interrupt ID288 Priority/Priority Byte Offset 288 "
|
|
group.long 0x524++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR73,Interrupt Priority Register 73"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID295 ,Interrupt ID295 Priority/Priority Byte Offset 295 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID294 ,Interrupt ID294 Priority/Priority Byte Offset 294 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID293 ,Interrupt ID293 Priority/Priority Byte Offset 293 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID292 ,Interrupt ID292 Priority/Priority Byte Offset 292 "
|
|
group.long 0x528++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR74,Interrupt Priority Register 74"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID299 ,Interrupt ID299 Priority/Priority Byte Offset 299 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID298 ,Interrupt ID298 Priority/Priority Byte Offset 298 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID297 ,Interrupt ID297 Priority/Priority Byte Offset 297 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID296 ,Interrupt ID296 Priority/Priority Byte Offset 296 "
|
|
group.long 0x52C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR75,Interrupt Priority Register 75"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID303 ,Interrupt ID303 Priority/Priority Byte Offset 303 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID302 ,Interrupt ID302 Priority/Priority Byte Offset 302 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID301 ,Interrupt ID301 Priority/Priority Byte Offset 301 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID300 ,Interrupt ID300 Priority/Priority Byte Offset 300 "
|
|
group.long 0x530++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR76,Interrupt Priority Register 76"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID307 ,Interrupt ID307 Priority/Priority Byte Offset 307 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID306 ,Interrupt ID306 Priority/Priority Byte Offset 306 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID305 ,Interrupt ID305 Priority/Priority Byte Offset 305 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID304 ,Interrupt ID304 Priority/Priority Byte Offset 304 "
|
|
group.long 0x534++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR77,Interrupt Priority Register 77"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID311 ,Interrupt ID311 Priority/Priority Byte Offset 311 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID310 ,Interrupt ID310 Priority/Priority Byte Offset 310 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID309 ,Interrupt ID309 Priority/Priority Byte Offset 309 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID308 ,Interrupt ID308 Priority/Priority Byte Offset 308 "
|
|
group.long 0x538++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR78,Interrupt Priority Register 78"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID315 ,Interrupt ID315 Priority/Priority Byte Offset 315 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID314 ,Interrupt ID314 Priority/Priority Byte Offset 314 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID313 ,Interrupt ID313 Priority/Priority Byte Offset 313 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID312 ,Interrupt ID312 Priority/Priority Byte Offset 312 "
|
|
group.long 0x53C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR79,Interrupt Priority Register 79"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID319 ,Interrupt ID319 Priority/Priority Byte Offset 319 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID318 ,Interrupt ID318 Priority/Priority Byte Offset 318 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID317 ,Interrupt ID317 Priority/Priority Byte Offset 317 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID316 ,Interrupt ID316 Priority/Priority Byte Offset 316 "
|
|
else
|
|
rgroup.long 0x520++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR72,Interrupt Priority Register 72"
|
|
rgroup.long 0x524++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR73,Interrupt Priority Register 73"
|
|
rgroup.long 0x528++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR74,Interrupt Priority Register 74"
|
|
rgroup.long 0x52C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR75,Interrupt Priority Register 75"
|
|
rgroup.long 0x530++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR76,Interrupt Priority Register 76"
|
|
rgroup.long 0x534++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR77,Interrupt Priority Register 77"
|
|
rgroup.long 0x538++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR78,Interrupt Priority Register 78"
|
|
rgroup.long 0x53C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR79,Interrupt Priority Register 79"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0A)
|
|
group.long 0x540++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR80,Interrupt Priority Register 80"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID323 ,Interrupt ID323 Priority/Priority Byte Offset 323 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID322 ,Interrupt ID322 Priority/Priority Byte Offset 322 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID321 ,Interrupt ID321 Priority/Priority Byte Offset 321 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID320 ,Interrupt ID320 Priority/Priority Byte Offset 320 "
|
|
group.long 0x544++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR81,Interrupt Priority Register 81"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID327 ,Interrupt ID327 Priority/Priority Byte Offset 327 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID326 ,Interrupt ID326 Priority/Priority Byte Offset 326 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID325 ,Interrupt ID325 Priority/Priority Byte Offset 325 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID324 ,Interrupt ID324 Priority/Priority Byte Offset 324 "
|
|
group.long 0x548++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR82,Interrupt Priority Register 82"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID331 ,Interrupt ID331 Priority/Priority Byte Offset 331 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID330 ,Interrupt ID330 Priority/Priority Byte Offset 330 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID329 ,Interrupt ID329 Priority/Priority Byte Offset 329 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID328 ,Interrupt ID328 Priority/Priority Byte Offset 328 "
|
|
group.long 0x54C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR83,Interrupt Priority Register 83"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID335 ,Interrupt ID335 Priority/Priority Byte Offset 335 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID334 ,Interrupt ID334 Priority/Priority Byte Offset 334 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID333 ,Interrupt ID333 Priority/Priority Byte Offset 333 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID332 ,Interrupt ID332 Priority/Priority Byte Offset 332 "
|
|
group.long 0x550++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR84,Interrupt Priority Register 84"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID339 ,Interrupt ID339 Priority/Priority Byte Offset 339 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID338 ,Interrupt ID338 Priority/Priority Byte Offset 338 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID337 ,Interrupt ID337 Priority/Priority Byte Offset 337 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID336 ,Interrupt ID336 Priority/Priority Byte Offset 336 "
|
|
group.long 0x554++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR85,Interrupt Priority Register 85"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID343 ,Interrupt ID343 Priority/Priority Byte Offset 343 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID342 ,Interrupt ID342 Priority/Priority Byte Offset 342 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID341 ,Interrupt ID341 Priority/Priority Byte Offset 341 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID340 ,Interrupt ID340 Priority/Priority Byte Offset 340 "
|
|
group.long 0x558++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR86,Interrupt Priority Register 86"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID347 ,Interrupt ID347 Priority/Priority Byte Offset 347 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID346 ,Interrupt ID346 Priority/Priority Byte Offset 346 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID345 ,Interrupt ID345 Priority/Priority Byte Offset 345 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID344 ,Interrupt ID344 Priority/Priority Byte Offset 344 "
|
|
group.long 0x55C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR87,Interrupt Priority Register 87"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID351 ,Interrupt ID351 Priority/Priority Byte Offset 351 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID350 ,Interrupt ID350 Priority/Priority Byte Offset 350 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID349 ,Interrupt ID349 Priority/Priority Byte Offset 349 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID348 ,Interrupt ID348 Priority/Priority Byte Offset 348 "
|
|
else
|
|
rgroup.long 0x540++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR80,Interrupt Priority Register 80"
|
|
rgroup.long 0x544++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR81,Interrupt Priority Register 81"
|
|
rgroup.long 0x548++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR82,Interrupt Priority Register 82"
|
|
rgroup.long 0x54C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR83,Interrupt Priority Register 83"
|
|
rgroup.long 0x550++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR84,Interrupt Priority Register 84"
|
|
rgroup.long 0x554++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR85,Interrupt Priority Register 85"
|
|
rgroup.long 0x558++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR86,Interrupt Priority Register 86"
|
|
rgroup.long 0x55C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR87,Interrupt Priority Register 87"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0B)
|
|
group.long 0x560++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR88,Interrupt Priority Register 88"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID355 ,Interrupt ID355 Priority/Priority Byte Offset 355 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID354 ,Interrupt ID354 Priority/Priority Byte Offset 354 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID353 ,Interrupt ID353 Priority/Priority Byte Offset 353 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID352 ,Interrupt ID352 Priority/Priority Byte Offset 352 "
|
|
group.long 0x564++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR89,Interrupt Priority Register 89"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID359 ,Interrupt ID359 Priority/Priority Byte Offset 359 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID358 ,Interrupt ID358 Priority/Priority Byte Offset 358 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID357 ,Interrupt ID357 Priority/Priority Byte Offset 357 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID356 ,Interrupt ID356 Priority/Priority Byte Offset 356 "
|
|
group.long 0x568++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR90,Interrupt Priority Register 90"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID363 ,Interrupt ID363 Priority/Priority Byte Offset 363 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID362 ,Interrupt ID362 Priority/Priority Byte Offset 362 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID361 ,Interrupt ID361 Priority/Priority Byte Offset 361 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID360 ,Interrupt ID360 Priority/Priority Byte Offset 360 "
|
|
group.long 0x56C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR91,Interrupt Priority Register 91"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID367 ,Interrupt ID367 Priority/Priority Byte Offset 367 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID366 ,Interrupt ID366 Priority/Priority Byte Offset 366 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID365 ,Interrupt ID365 Priority/Priority Byte Offset 365 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID364 ,Interrupt ID364 Priority/Priority Byte Offset 364 "
|
|
group.long 0x570++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR92,Interrupt Priority Register 92"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID371 ,Interrupt ID371 Priority/Priority Byte Offset 371 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID370 ,Interrupt ID370 Priority/Priority Byte Offset 370 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID369 ,Interrupt ID369 Priority/Priority Byte Offset 369 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID368 ,Interrupt ID368 Priority/Priority Byte Offset 368 "
|
|
group.long 0x574++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR93,Interrupt Priority Register 93"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID375 ,Interrupt ID375 Priority/Priority Byte Offset 375 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID374 ,Interrupt ID374 Priority/Priority Byte Offset 374 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID373 ,Interrupt ID373 Priority/Priority Byte Offset 373 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID372 ,Interrupt ID372 Priority/Priority Byte Offset 372 "
|
|
group.long 0x578++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR94,Interrupt Priority Register 94"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID379 ,Interrupt ID379 Priority/Priority Byte Offset 379 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID378 ,Interrupt ID378 Priority/Priority Byte Offset 378 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID377 ,Interrupt ID377 Priority/Priority Byte Offset 377 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID376 ,Interrupt ID376 Priority/Priority Byte Offset 376 "
|
|
group.long 0x57C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR95,Interrupt Priority Register 95"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID383 ,Interrupt ID383 Priority/Priority Byte Offset 383 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID382 ,Interrupt ID382 Priority/Priority Byte Offset 382 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID381 ,Interrupt ID381 Priority/Priority Byte Offset 381 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID380 ,Interrupt ID380 Priority/Priority Byte Offset 380 "
|
|
else
|
|
rgroup.long 0x560++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR88,Interrupt Priority Register 88"
|
|
rgroup.long 0x564++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR89,Interrupt Priority Register 89"
|
|
rgroup.long 0x568++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR90,Interrupt Priority Register 90"
|
|
rgroup.long 0x56C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR91,Interrupt Priority Register 91"
|
|
rgroup.long 0x570++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR92,Interrupt Priority Register 92"
|
|
rgroup.long 0x574++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR93,Interrupt Priority Register 93"
|
|
rgroup.long 0x578++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR94,Interrupt Priority Register 94"
|
|
rgroup.long 0x57C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR95,Interrupt Priority Register 95"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0C)
|
|
group.long 0x580++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR96,Interrupt Priority Register 96"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID387 ,Interrupt ID387 Priority/Priority Byte Offset 387 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID386 ,Interrupt ID386 Priority/Priority Byte Offset 386 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID385 ,Interrupt ID385 Priority/Priority Byte Offset 385 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID384 ,Interrupt ID384 Priority/Priority Byte Offset 384 "
|
|
group.long 0x584++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR97,Interrupt Priority Register 97"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID391 ,Interrupt ID391 Priority/Priority Byte Offset 391 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID390 ,Interrupt ID390 Priority/Priority Byte Offset 390 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID389 ,Interrupt ID389 Priority/Priority Byte Offset 389 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID388 ,Interrupt ID388 Priority/Priority Byte Offset 388 "
|
|
group.long 0x588++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR98,Interrupt Priority Register 98"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID395 ,Interrupt ID395 Priority/Priority Byte Offset 395 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID394 ,Interrupt ID394 Priority/Priority Byte Offset 394 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID393 ,Interrupt ID393 Priority/Priority Byte Offset 393 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID392 ,Interrupt ID392 Priority/Priority Byte Offset 392 "
|
|
group.long 0x58C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR99,Interrupt Priority Register 99"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID399 ,Interrupt ID399 Priority/Priority Byte Offset 399 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID398 ,Interrupt ID398 Priority/Priority Byte Offset 398 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID397 ,Interrupt ID397 Priority/Priority Byte Offset 397 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID396 ,Interrupt ID396 Priority/Priority Byte Offset 396 "
|
|
group.long 0x590++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR100,Interrupt Priority Register 100"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID403 ,Interrupt ID403 Priority/Priority Byte Offset 403 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID402 ,Interrupt ID402 Priority/Priority Byte Offset 402 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID401 ,Interrupt ID401 Priority/Priority Byte Offset 401 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID400 ,Interrupt ID400 Priority/Priority Byte Offset 400 "
|
|
group.long 0x594++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR101,Interrupt Priority Register 101"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID407 ,Interrupt ID407 Priority/Priority Byte Offset 407 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID406 ,Interrupt ID406 Priority/Priority Byte Offset 406 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID405 ,Interrupt ID405 Priority/Priority Byte Offset 405 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID404 ,Interrupt ID404 Priority/Priority Byte Offset 404 "
|
|
group.long 0x598++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR102,Interrupt Priority Register 102"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID411 ,Interrupt ID411 Priority/Priority Byte Offset 411 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID410 ,Interrupt ID410 Priority/Priority Byte Offset 410 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID409 ,Interrupt ID409 Priority/Priority Byte Offset 409 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID408 ,Interrupt ID408 Priority/Priority Byte Offset 408 "
|
|
group.long 0x59C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR103,Interrupt Priority Register 103"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID415 ,Interrupt ID415 Priority/Priority Byte Offset 415 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID414 ,Interrupt ID414 Priority/Priority Byte Offset 414 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID413 ,Interrupt ID413 Priority/Priority Byte Offset 413 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID412 ,Interrupt ID412 Priority/Priority Byte Offset 412 "
|
|
else
|
|
rgroup.long 0x580++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR96,Interrupt Priority Register 96"
|
|
rgroup.long 0x584++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR97,Interrupt Priority Register 97"
|
|
rgroup.long 0x588++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR98,Interrupt Priority Register 98"
|
|
rgroup.long 0x58C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR99,Interrupt Priority Register 99"
|
|
rgroup.long 0x590++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR100,Interrupt Priority Register 100"
|
|
rgroup.long 0x594++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR101,Interrupt Priority Register 101"
|
|
rgroup.long 0x598++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR102,Interrupt Priority Register 102"
|
|
rgroup.long 0x59C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR103,Interrupt Priority Register 103"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0D)
|
|
group.long 0x5A0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR104,Interrupt Priority Register 104"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID419 ,Interrupt ID419 Priority/Priority Byte Offset 419 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID418 ,Interrupt ID418 Priority/Priority Byte Offset 418 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID417 ,Interrupt ID417 Priority/Priority Byte Offset 417 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID416 ,Interrupt ID416 Priority/Priority Byte Offset 416 "
|
|
group.long 0x5A4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR105,Interrupt Priority Register 105"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID423 ,Interrupt ID423 Priority/Priority Byte Offset 423 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID422 ,Interrupt ID422 Priority/Priority Byte Offset 422 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID421 ,Interrupt ID421 Priority/Priority Byte Offset 421 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID420 ,Interrupt ID420 Priority/Priority Byte Offset 420 "
|
|
group.long 0x5A8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR106,Interrupt Priority Register 106"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID427 ,Interrupt ID427 Priority/Priority Byte Offset 427 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID426 ,Interrupt ID426 Priority/Priority Byte Offset 426 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID425 ,Interrupt ID425 Priority/Priority Byte Offset 425 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID424 ,Interrupt ID424 Priority/Priority Byte Offset 424 "
|
|
group.long 0x5AC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR107,Interrupt Priority Register 107"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID431 ,Interrupt ID431 Priority/Priority Byte Offset 431 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID430 ,Interrupt ID430 Priority/Priority Byte Offset 430 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID429 ,Interrupt ID429 Priority/Priority Byte Offset 429 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID428 ,Interrupt ID428 Priority/Priority Byte Offset 428 "
|
|
group.long 0x5B0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR108,Interrupt Priority Register 108"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID435 ,Interrupt ID435 Priority/Priority Byte Offset 435 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID434 ,Interrupt ID434 Priority/Priority Byte Offset 434 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID433 ,Interrupt ID433 Priority/Priority Byte Offset 433 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID432 ,Interrupt ID432 Priority/Priority Byte Offset 432 "
|
|
group.long 0x5B4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR109,Interrupt Priority Register 109"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID439 ,Interrupt ID439 Priority/Priority Byte Offset 439 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID438 ,Interrupt ID438 Priority/Priority Byte Offset 438 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID437 ,Interrupt ID437 Priority/Priority Byte Offset 437 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID436 ,Interrupt ID436 Priority/Priority Byte Offset 436 "
|
|
group.long 0x5B8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR110,Interrupt Priority Register 110"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID443 ,Interrupt ID443 Priority/Priority Byte Offset 443 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID442 ,Interrupt ID442 Priority/Priority Byte Offset 442 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID441 ,Interrupt ID441 Priority/Priority Byte Offset 441 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID440 ,Interrupt ID440 Priority/Priority Byte Offset 440 "
|
|
group.long 0x5BC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR111,Interrupt Priority Register 111"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID447 ,Interrupt ID447 Priority/Priority Byte Offset 447 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID446 ,Interrupt ID446 Priority/Priority Byte Offset 446 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID445 ,Interrupt ID445 Priority/Priority Byte Offset 445 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID444 ,Interrupt ID444 Priority/Priority Byte Offset 444 "
|
|
else
|
|
rgroup.long 0x5A0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR104,Interrupt Priority Register 104"
|
|
rgroup.long 0x5A4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR105,Interrupt Priority Register 105"
|
|
rgroup.long 0x5A8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR106,Interrupt Priority Register 106"
|
|
rgroup.long 0x5AC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR107,Interrupt Priority Register 107"
|
|
rgroup.long 0x5B0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR108,Interrupt Priority Register 108"
|
|
rgroup.long 0x5B4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR109,Interrupt Priority Register 109"
|
|
rgroup.long 0x5B8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR110,Interrupt Priority Register 110"
|
|
rgroup.long 0x5BC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR111,Interrupt Priority Register 111"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0E)
|
|
group.long 0x5C0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR112,Interrupt Priority Register 112"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID451 ,Interrupt ID451 Priority/Priority Byte Offset 451 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID450 ,Interrupt ID450 Priority/Priority Byte Offset 450 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID449 ,Interrupt ID449 Priority/Priority Byte Offset 449 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID448 ,Interrupt ID448 Priority/Priority Byte Offset 448 "
|
|
group.long 0x5C4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR113,Interrupt Priority Register 113"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID455 ,Interrupt ID455 Priority/Priority Byte Offset 455 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID454 ,Interrupt ID454 Priority/Priority Byte Offset 454 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID453 ,Interrupt ID453 Priority/Priority Byte Offset 453 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID452 ,Interrupt ID452 Priority/Priority Byte Offset 452 "
|
|
group.long 0x5C8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR114,Interrupt Priority Register 114"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID459 ,Interrupt ID459 Priority/Priority Byte Offset 459 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID458 ,Interrupt ID458 Priority/Priority Byte Offset 458 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID457 ,Interrupt ID457 Priority/Priority Byte Offset 457 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID456 ,Interrupt ID456 Priority/Priority Byte Offset 456 "
|
|
group.long 0x5CC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR115,Interrupt Priority Register 115"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID463 ,Interrupt ID463 Priority/Priority Byte Offset 463 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID462 ,Interrupt ID462 Priority/Priority Byte Offset 462 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID461 ,Interrupt ID461 Priority/Priority Byte Offset 461 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID460 ,Interrupt ID460 Priority/Priority Byte Offset 460 "
|
|
group.long 0x5D0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR116,Interrupt Priority Register 116"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID467 ,Interrupt ID467 Priority/Priority Byte Offset 467 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID466 ,Interrupt ID466 Priority/Priority Byte Offset 466 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID465 ,Interrupt ID465 Priority/Priority Byte Offset 465 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID464 ,Interrupt ID464 Priority/Priority Byte Offset 464 "
|
|
group.long 0x5D4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR117,Interrupt Priority Register 117"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID471 ,Interrupt ID471 Priority/Priority Byte Offset 471 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID470 ,Interrupt ID470 Priority/Priority Byte Offset 470 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID469 ,Interrupt ID469 Priority/Priority Byte Offset 469 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID468 ,Interrupt ID468 Priority/Priority Byte Offset 468 "
|
|
group.long 0x5D8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR118,Interrupt Priority Register 118"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID475 ,Interrupt ID475 Priority/Priority Byte Offset 475 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID474 ,Interrupt ID474 Priority/Priority Byte Offset 474 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID473 ,Interrupt ID473 Priority/Priority Byte Offset 473 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID472 ,Interrupt ID472 Priority/Priority Byte Offset 472 "
|
|
group.long 0x5DC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR119,Interrupt Priority Register 119"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID479 ,Interrupt ID479 Priority/Priority Byte Offset 479 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID478 ,Interrupt ID478 Priority/Priority Byte Offset 478 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID477 ,Interrupt ID477 Priority/Priority Byte Offset 477 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID476 ,Interrupt ID476 Priority/Priority Byte Offset 476 "
|
|
else
|
|
rgroup.long 0x5C0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR112,Interrupt Priority Register 112"
|
|
rgroup.long 0x5C4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR113,Interrupt Priority Register 113"
|
|
rgroup.long 0x5C8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR114,Interrupt Priority Register 114"
|
|
rgroup.long 0x5CC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR115,Interrupt Priority Register 115"
|
|
rgroup.long 0x5D0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR116,Interrupt Priority Register 116"
|
|
rgroup.long 0x5D4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR117,Interrupt Priority Register 117"
|
|
rgroup.long 0x5D8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR118,Interrupt Priority Register 118"
|
|
rgroup.long 0x5DC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR119,Interrupt Priority Register 119"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0F)
|
|
group.long 0x5E0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR120,Interrupt Priority Register 120"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID483 ,Interrupt ID483 Priority/Priority Byte Offset 483 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID482 ,Interrupt ID482 Priority/Priority Byte Offset 482 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID481 ,Interrupt ID481 Priority/Priority Byte Offset 481 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID480 ,Interrupt ID480 Priority/Priority Byte Offset 480 "
|
|
group.long 0x5E4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR121,Interrupt Priority Register 121"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID487 ,Interrupt ID487 Priority/Priority Byte Offset 487 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID486 ,Interrupt ID486 Priority/Priority Byte Offset 486 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID485 ,Interrupt ID485 Priority/Priority Byte Offset 485 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID484 ,Interrupt ID484 Priority/Priority Byte Offset 484 "
|
|
group.long 0x5E8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR122,Interrupt Priority Register 122"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID491 ,Interrupt ID491 Priority/Priority Byte Offset 491 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID490 ,Interrupt ID490 Priority/Priority Byte Offset 490 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID489 ,Interrupt ID489 Priority/Priority Byte Offset 489 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID488 ,Interrupt ID488 Priority/Priority Byte Offset 488 "
|
|
group.long 0x5EC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR123,Interrupt Priority Register 123"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID495 ,Interrupt ID495 Priority/Priority Byte Offset 495 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID494 ,Interrupt ID494 Priority/Priority Byte Offset 494 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID493 ,Interrupt ID493 Priority/Priority Byte Offset 493 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID492 ,Interrupt ID492 Priority/Priority Byte Offset 492 "
|
|
group.long 0x5F0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR124,Interrupt Priority Register 124"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID499 ,Interrupt ID499 Priority/Priority Byte Offset 499 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID498 ,Interrupt ID498 Priority/Priority Byte Offset 498 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID497 ,Interrupt ID497 Priority/Priority Byte Offset 497 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID496 ,Interrupt ID496 Priority/Priority Byte Offset 496 "
|
|
group.long 0x5F4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR125,Interrupt Priority Register 125"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID503 ,Interrupt ID503 Priority/Priority Byte Offset 503 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID502 ,Interrupt ID502 Priority/Priority Byte Offset 502 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID501 ,Interrupt ID501 Priority/Priority Byte Offset 501 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID500 ,Interrupt ID500 Priority/Priority Byte Offset 500 "
|
|
group.long 0x5F8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR126,Interrupt Priority Register 126"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID507 ,Interrupt ID507 Priority/Priority Byte Offset 507 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID506 ,Interrupt ID506 Priority/Priority Byte Offset 506 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID505 ,Interrupt ID505 Priority/Priority Byte Offset 505 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID504 ,Interrupt ID504 Priority/Priority Byte Offset 504 "
|
|
group.long 0x5FC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR127,Interrupt Priority Register 127"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID511 ,Interrupt ID511 Priority/Priority Byte Offset 511 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID510 ,Interrupt ID510 Priority/Priority Byte Offset 510 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID509 ,Interrupt ID509 Priority/Priority Byte Offset 509 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID508 ,Interrupt ID508 Priority/Priority Byte Offset 508 "
|
|
else
|
|
rgroup.long 0x5E0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR120,Interrupt Priority Register 120"
|
|
rgroup.long 0x5E4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR121,Interrupt Priority Register 121"
|
|
rgroup.long 0x5E8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR122,Interrupt Priority Register 122"
|
|
rgroup.long 0x5EC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR123,Interrupt Priority Register 123"
|
|
rgroup.long 0x5F0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR124,Interrupt Priority Register 124"
|
|
rgroup.long 0x5F4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR125,Interrupt Priority Register 125"
|
|
rgroup.long 0x5F8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR126,Interrupt Priority Register 126"
|
|
rgroup.long 0x5FC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR127,Interrupt Priority Register 127"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x10)
|
|
group.long 0x600++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR128,Interrupt Priority Register 128"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID515 ,Interrupt ID515 Priority/Priority Byte Offset 515 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID514 ,Interrupt ID514 Priority/Priority Byte Offset 514 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID513 ,Interrupt ID513 Priority/Priority Byte Offset 513 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID512 ,Interrupt ID512 Priority/Priority Byte Offset 512 "
|
|
group.long 0x604++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR129,Interrupt Priority Register 129"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID519 ,Interrupt ID519 Priority/Priority Byte Offset 519 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID518 ,Interrupt ID518 Priority/Priority Byte Offset 518 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID517 ,Interrupt ID517 Priority/Priority Byte Offset 517 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID516 ,Interrupt ID516 Priority/Priority Byte Offset 516 "
|
|
group.long 0x608++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR130,Interrupt Priority Register 130"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID523 ,Interrupt ID523 Priority/Priority Byte Offset 523 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID522 ,Interrupt ID522 Priority/Priority Byte Offset 522 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID521 ,Interrupt ID521 Priority/Priority Byte Offset 521 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID520 ,Interrupt ID520 Priority/Priority Byte Offset 520 "
|
|
group.long 0x60C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR131,Interrupt Priority Register 131"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID527 ,Interrupt ID527 Priority/Priority Byte Offset 527 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID526 ,Interrupt ID526 Priority/Priority Byte Offset 526 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID525 ,Interrupt ID525 Priority/Priority Byte Offset 525 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID524 ,Interrupt ID524 Priority/Priority Byte Offset 524 "
|
|
group.long 0x610++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR132,Interrupt Priority Register 132"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID531 ,Interrupt ID531 Priority/Priority Byte Offset 531 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID530 ,Interrupt ID530 Priority/Priority Byte Offset 530 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID529 ,Interrupt ID529 Priority/Priority Byte Offset 529 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID528 ,Interrupt ID528 Priority/Priority Byte Offset 528 "
|
|
group.long 0x614++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR133,Interrupt Priority Register 133"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID535 ,Interrupt ID535 Priority/Priority Byte Offset 535 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID534 ,Interrupt ID534 Priority/Priority Byte Offset 534 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID533 ,Interrupt ID533 Priority/Priority Byte Offset 533 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID532 ,Interrupt ID532 Priority/Priority Byte Offset 532 "
|
|
group.long 0x618++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR134,Interrupt Priority Register 134"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID539 ,Interrupt ID539 Priority/Priority Byte Offset 539 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID538 ,Interrupt ID538 Priority/Priority Byte Offset 538 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID537 ,Interrupt ID537 Priority/Priority Byte Offset 537 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID536 ,Interrupt ID536 Priority/Priority Byte Offset 536 "
|
|
group.long 0x61C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR135,Interrupt Priority Register 135"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID543 ,Interrupt ID543 Priority/Priority Byte Offset 543 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID542 ,Interrupt ID542 Priority/Priority Byte Offset 542 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID541 ,Interrupt ID541 Priority/Priority Byte Offset 541 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID540 ,Interrupt ID540 Priority/Priority Byte Offset 540 "
|
|
else
|
|
rgroup.long 0x600++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR128,Interrupt Priority Register 128"
|
|
rgroup.long 0x604++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR129,Interrupt Priority Register 129"
|
|
rgroup.long 0x608++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR130,Interrupt Priority Register 130"
|
|
rgroup.long 0x60C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR131,Interrupt Priority Register 131"
|
|
rgroup.long 0x610++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR132,Interrupt Priority Register 132"
|
|
rgroup.long 0x614++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR133,Interrupt Priority Register 133"
|
|
rgroup.long 0x618++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR134,Interrupt Priority Register 134"
|
|
rgroup.long 0x61C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR135,Interrupt Priority Register 135"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x11)
|
|
group.long 0x620++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR136,Interrupt Priority Register 136"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID547 ,Interrupt ID547 Priority/Priority Byte Offset 547 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID546 ,Interrupt ID546 Priority/Priority Byte Offset 546 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID545 ,Interrupt ID545 Priority/Priority Byte Offset 545 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID544 ,Interrupt ID544 Priority/Priority Byte Offset 544 "
|
|
group.long 0x624++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR137,Interrupt Priority Register 137"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID551 ,Interrupt ID551 Priority/Priority Byte Offset 551 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID550 ,Interrupt ID550 Priority/Priority Byte Offset 550 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID549 ,Interrupt ID549 Priority/Priority Byte Offset 549 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID548 ,Interrupt ID548 Priority/Priority Byte Offset 548 "
|
|
group.long 0x628++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR138,Interrupt Priority Register 138"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID555 ,Interrupt ID555 Priority/Priority Byte Offset 555 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID554 ,Interrupt ID554 Priority/Priority Byte Offset 554 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID553 ,Interrupt ID553 Priority/Priority Byte Offset 553 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID552 ,Interrupt ID552 Priority/Priority Byte Offset 552 "
|
|
group.long 0x62C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR139,Interrupt Priority Register 139"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID559 ,Interrupt ID559 Priority/Priority Byte Offset 559 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID558 ,Interrupt ID558 Priority/Priority Byte Offset 558 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID557 ,Interrupt ID557 Priority/Priority Byte Offset 557 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID556 ,Interrupt ID556 Priority/Priority Byte Offset 556 "
|
|
group.long 0x630++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR140,Interrupt Priority Register 140"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID563 ,Interrupt ID563 Priority/Priority Byte Offset 563 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID562 ,Interrupt ID562 Priority/Priority Byte Offset 562 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID561 ,Interrupt ID561 Priority/Priority Byte Offset 561 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID560 ,Interrupt ID560 Priority/Priority Byte Offset 560 "
|
|
group.long 0x634++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR141,Interrupt Priority Register 141"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID567 ,Interrupt ID567 Priority/Priority Byte Offset 567 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID566 ,Interrupt ID566 Priority/Priority Byte Offset 566 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID565 ,Interrupt ID565 Priority/Priority Byte Offset 565 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID564 ,Interrupt ID564 Priority/Priority Byte Offset 564 "
|
|
group.long 0x638++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR142,Interrupt Priority Register 142"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID571 ,Interrupt ID571 Priority/Priority Byte Offset 571 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID570 ,Interrupt ID570 Priority/Priority Byte Offset 570 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID569 ,Interrupt ID569 Priority/Priority Byte Offset 569 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID568 ,Interrupt ID568 Priority/Priority Byte Offset 568 "
|
|
group.long 0x63C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR143,Interrupt Priority Register 143"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID575 ,Interrupt ID575 Priority/Priority Byte Offset 575 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID574 ,Interrupt ID574 Priority/Priority Byte Offset 574 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID573 ,Interrupt ID573 Priority/Priority Byte Offset 573 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID572 ,Interrupt ID572 Priority/Priority Byte Offset 572 "
|
|
else
|
|
rgroup.long 0x620++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR136,Interrupt Priority Register 136"
|
|
rgroup.long 0x624++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR137,Interrupt Priority Register 137"
|
|
rgroup.long 0x628++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR138,Interrupt Priority Register 138"
|
|
rgroup.long 0x62C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR139,Interrupt Priority Register 139"
|
|
rgroup.long 0x630++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR140,Interrupt Priority Register 140"
|
|
rgroup.long 0x634++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR141,Interrupt Priority Register 141"
|
|
rgroup.long 0x638++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR142,Interrupt Priority Register 142"
|
|
rgroup.long 0x63C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR143,Interrupt Priority Register 143"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x12)
|
|
group.long 0x640++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR144,Interrupt Priority Register 144"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID579 ,Interrupt ID579 Priority/Priority Byte Offset 579 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID578 ,Interrupt ID578 Priority/Priority Byte Offset 578 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID577 ,Interrupt ID577 Priority/Priority Byte Offset 577 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID576 ,Interrupt ID576 Priority/Priority Byte Offset 576 "
|
|
group.long 0x644++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR145,Interrupt Priority Register 145"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID583 ,Interrupt ID583 Priority/Priority Byte Offset 583 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID582 ,Interrupt ID582 Priority/Priority Byte Offset 582 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID581 ,Interrupt ID581 Priority/Priority Byte Offset 581 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID580 ,Interrupt ID580 Priority/Priority Byte Offset 580 "
|
|
group.long 0x648++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR146,Interrupt Priority Register 146"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID587 ,Interrupt ID587 Priority/Priority Byte Offset 587 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID586 ,Interrupt ID586 Priority/Priority Byte Offset 586 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID585 ,Interrupt ID585 Priority/Priority Byte Offset 585 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID584 ,Interrupt ID584 Priority/Priority Byte Offset 584 "
|
|
group.long 0x64C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR147,Interrupt Priority Register 147"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID591 ,Interrupt ID591 Priority/Priority Byte Offset 591 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID590 ,Interrupt ID590 Priority/Priority Byte Offset 590 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID589 ,Interrupt ID589 Priority/Priority Byte Offset 589 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID588 ,Interrupt ID588 Priority/Priority Byte Offset 588 "
|
|
group.long 0x650++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR148,Interrupt Priority Register 148"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID595 ,Interrupt ID595 Priority/Priority Byte Offset 595 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID594 ,Interrupt ID594 Priority/Priority Byte Offset 594 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID593 ,Interrupt ID593 Priority/Priority Byte Offset 593 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID592 ,Interrupt ID592 Priority/Priority Byte Offset 592 "
|
|
group.long 0x654++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR149,Interrupt Priority Register 149"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID599 ,Interrupt ID599 Priority/Priority Byte Offset 599 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID598 ,Interrupt ID598 Priority/Priority Byte Offset 598 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID597 ,Interrupt ID597 Priority/Priority Byte Offset 597 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID596 ,Interrupt ID596 Priority/Priority Byte Offset 596 "
|
|
group.long 0x658++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR150,Interrupt Priority Register 150"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID603 ,Interrupt ID603 Priority/Priority Byte Offset 603 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID602 ,Interrupt ID602 Priority/Priority Byte Offset 602 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID601 ,Interrupt ID601 Priority/Priority Byte Offset 601 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID600 ,Interrupt ID600 Priority/Priority Byte Offset 600 "
|
|
group.long 0x65C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR151,Interrupt Priority Register 151"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID607 ,Interrupt ID607 Priority/Priority Byte Offset 607 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID606 ,Interrupt ID606 Priority/Priority Byte Offset 606 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID605 ,Interrupt ID605 Priority/Priority Byte Offset 605 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID604 ,Interrupt ID604 Priority/Priority Byte Offset 604 "
|
|
else
|
|
rgroup.long 0x640++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR144,Interrupt Priority Register 144"
|
|
rgroup.long 0x644++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR145,Interrupt Priority Register 145"
|
|
rgroup.long 0x648++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR146,Interrupt Priority Register 146"
|
|
rgroup.long 0x64C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR147,Interrupt Priority Register 147"
|
|
rgroup.long 0x650++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR148,Interrupt Priority Register 148"
|
|
rgroup.long 0x654++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR149,Interrupt Priority Register 149"
|
|
rgroup.long 0x658++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR150,Interrupt Priority Register 150"
|
|
rgroup.long 0x65C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR151,Interrupt Priority Register 151"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x13)
|
|
group.long 0x660++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR152,Interrupt Priority Register 152"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID611 ,Interrupt ID611 Priority/Priority Byte Offset 611 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID610 ,Interrupt ID610 Priority/Priority Byte Offset 610 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID609 ,Interrupt ID609 Priority/Priority Byte Offset 609 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID608 ,Interrupt ID608 Priority/Priority Byte Offset 608 "
|
|
group.long 0x664++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR153,Interrupt Priority Register 153"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID615 ,Interrupt ID615 Priority/Priority Byte Offset 615 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID614 ,Interrupt ID614 Priority/Priority Byte Offset 614 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID613 ,Interrupt ID613 Priority/Priority Byte Offset 613 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID612 ,Interrupt ID612 Priority/Priority Byte Offset 612 "
|
|
group.long 0x668++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR154,Interrupt Priority Register 154"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID619 ,Interrupt ID619 Priority/Priority Byte Offset 619 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID618 ,Interrupt ID618 Priority/Priority Byte Offset 618 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID617 ,Interrupt ID617 Priority/Priority Byte Offset 617 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID616 ,Interrupt ID616 Priority/Priority Byte Offset 616 "
|
|
group.long 0x66C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR155,Interrupt Priority Register 155"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID623 ,Interrupt ID623 Priority/Priority Byte Offset 623 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID622 ,Interrupt ID622 Priority/Priority Byte Offset 622 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID621 ,Interrupt ID621 Priority/Priority Byte Offset 621 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID620 ,Interrupt ID620 Priority/Priority Byte Offset 620 "
|
|
group.long 0x670++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR156,Interrupt Priority Register 156"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID627 ,Interrupt ID627 Priority/Priority Byte Offset 627 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID626 ,Interrupt ID626 Priority/Priority Byte Offset 626 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID625 ,Interrupt ID625 Priority/Priority Byte Offset 625 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID624 ,Interrupt ID624 Priority/Priority Byte Offset 624 "
|
|
group.long 0x674++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR157,Interrupt Priority Register 157"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID631 ,Interrupt ID631 Priority/Priority Byte Offset 631 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID630 ,Interrupt ID630 Priority/Priority Byte Offset 630 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID629 ,Interrupt ID629 Priority/Priority Byte Offset 629 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID628 ,Interrupt ID628 Priority/Priority Byte Offset 628 "
|
|
group.long 0x678++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR158,Interrupt Priority Register 158"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID635 ,Interrupt ID635 Priority/Priority Byte Offset 635 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID634 ,Interrupt ID634 Priority/Priority Byte Offset 634 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID633 ,Interrupt ID633 Priority/Priority Byte Offset 633 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID632 ,Interrupt ID632 Priority/Priority Byte Offset 632 "
|
|
group.long 0x67C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR159,Interrupt Priority Register 159"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID639 ,Interrupt ID639 Priority/Priority Byte Offset 639 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID638 ,Interrupt ID638 Priority/Priority Byte Offset 638 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID637 ,Interrupt ID637 Priority/Priority Byte Offset 637 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID636 ,Interrupt ID636 Priority/Priority Byte Offset 636 "
|
|
else
|
|
rgroup.long 0x660++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR152,Interrupt Priority Register 152"
|
|
rgroup.long 0x664++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR153,Interrupt Priority Register 153"
|
|
rgroup.long 0x668++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR154,Interrupt Priority Register 154"
|
|
rgroup.long 0x66C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR155,Interrupt Priority Register 155"
|
|
rgroup.long 0x670++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR156,Interrupt Priority Register 156"
|
|
rgroup.long 0x674++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR157,Interrupt Priority Register 157"
|
|
rgroup.long 0x678++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR158,Interrupt Priority Register 158"
|
|
rgroup.long 0x67C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR159,Interrupt Priority Register 159"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x14)
|
|
group.long 0x680++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR160,Interrupt Priority Register 160"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID643 ,Interrupt ID643 Priority/Priority Byte Offset 643 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID642 ,Interrupt ID642 Priority/Priority Byte Offset 642 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID641 ,Interrupt ID641 Priority/Priority Byte Offset 641 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID640 ,Interrupt ID640 Priority/Priority Byte Offset 640 "
|
|
group.long 0x684++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR161,Interrupt Priority Register 161"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID647 ,Interrupt ID647 Priority/Priority Byte Offset 647 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID646 ,Interrupt ID646 Priority/Priority Byte Offset 646 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID645 ,Interrupt ID645 Priority/Priority Byte Offset 645 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID644 ,Interrupt ID644 Priority/Priority Byte Offset 644 "
|
|
group.long 0x688++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR162,Interrupt Priority Register 162"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID651 ,Interrupt ID651 Priority/Priority Byte Offset 651 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID650 ,Interrupt ID650 Priority/Priority Byte Offset 650 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID649 ,Interrupt ID649 Priority/Priority Byte Offset 649 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID648 ,Interrupt ID648 Priority/Priority Byte Offset 648 "
|
|
group.long 0x68C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR163,Interrupt Priority Register 163"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID655 ,Interrupt ID655 Priority/Priority Byte Offset 655 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID654 ,Interrupt ID654 Priority/Priority Byte Offset 654 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID653 ,Interrupt ID653 Priority/Priority Byte Offset 653 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID652 ,Interrupt ID652 Priority/Priority Byte Offset 652 "
|
|
group.long 0x690++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR164,Interrupt Priority Register 164"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID659 ,Interrupt ID659 Priority/Priority Byte Offset 659 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID658 ,Interrupt ID658 Priority/Priority Byte Offset 658 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID657 ,Interrupt ID657 Priority/Priority Byte Offset 657 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID656 ,Interrupt ID656 Priority/Priority Byte Offset 656 "
|
|
group.long 0x694++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR165,Interrupt Priority Register 165"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID663 ,Interrupt ID663 Priority/Priority Byte Offset 663 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID662 ,Interrupt ID662 Priority/Priority Byte Offset 662 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID661 ,Interrupt ID661 Priority/Priority Byte Offset 661 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID660 ,Interrupt ID660 Priority/Priority Byte Offset 660 "
|
|
group.long 0x698++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR166,Interrupt Priority Register 166"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID667 ,Interrupt ID667 Priority/Priority Byte Offset 667 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID666 ,Interrupt ID666 Priority/Priority Byte Offset 666 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID665 ,Interrupt ID665 Priority/Priority Byte Offset 665 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID664 ,Interrupt ID664 Priority/Priority Byte Offset 664 "
|
|
group.long 0x69C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR167,Interrupt Priority Register 167"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID671 ,Interrupt ID671 Priority/Priority Byte Offset 671 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID670 ,Interrupt ID670 Priority/Priority Byte Offset 670 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID669 ,Interrupt ID669 Priority/Priority Byte Offset 669 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID668 ,Interrupt ID668 Priority/Priority Byte Offset 668 "
|
|
else
|
|
rgroup.long 0x680++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR160,Interrupt Priority Register 160"
|
|
rgroup.long 0x684++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR161,Interrupt Priority Register 161"
|
|
rgroup.long 0x688++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR162,Interrupt Priority Register 162"
|
|
rgroup.long 0x68C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR163,Interrupt Priority Register 163"
|
|
rgroup.long 0x690++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR164,Interrupt Priority Register 164"
|
|
rgroup.long 0x694++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR165,Interrupt Priority Register 165"
|
|
rgroup.long 0x698++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR166,Interrupt Priority Register 166"
|
|
rgroup.long 0x69C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR167,Interrupt Priority Register 167"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x15)
|
|
group.long 0x6A0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR168,Interrupt Priority Register 168"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID675 ,Interrupt ID675 Priority/Priority Byte Offset 675 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID674 ,Interrupt ID674 Priority/Priority Byte Offset 674 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID673 ,Interrupt ID673 Priority/Priority Byte Offset 673 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID672 ,Interrupt ID672 Priority/Priority Byte Offset 672 "
|
|
group.long 0x6A4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR169,Interrupt Priority Register 169"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID679 ,Interrupt ID679 Priority/Priority Byte Offset 679 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID678 ,Interrupt ID678 Priority/Priority Byte Offset 678 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID677 ,Interrupt ID677 Priority/Priority Byte Offset 677 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID676 ,Interrupt ID676 Priority/Priority Byte Offset 676 "
|
|
group.long 0x6A8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR170,Interrupt Priority Register 170"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID683 ,Interrupt ID683 Priority/Priority Byte Offset 683 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID682 ,Interrupt ID682 Priority/Priority Byte Offset 682 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID681 ,Interrupt ID681 Priority/Priority Byte Offset 681 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID680 ,Interrupt ID680 Priority/Priority Byte Offset 680 "
|
|
group.long 0x6AC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR171,Interrupt Priority Register 171"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID687 ,Interrupt ID687 Priority/Priority Byte Offset 687 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID686 ,Interrupt ID686 Priority/Priority Byte Offset 686 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID685 ,Interrupt ID685 Priority/Priority Byte Offset 685 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID684 ,Interrupt ID684 Priority/Priority Byte Offset 684 "
|
|
group.long 0x6B0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR172,Interrupt Priority Register 172"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID691 ,Interrupt ID691 Priority/Priority Byte Offset 691 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID690 ,Interrupt ID690 Priority/Priority Byte Offset 690 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID689 ,Interrupt ID689 Priority/Priority Byte Offset 689 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID688 ,Interrupt ID688 Priority/Priority Byte Offset 688 "
|
|
group.long 0x6B4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR173,Interrupt Priority Register 173"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID695 ,Interrupt ID695 Priority/Priority Byte Offset 695 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID694 ,Interrupt ID694 Priority/Priority Byte Offset 694 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID693 ,Interrupt ID693 Priority/Priority Byte Offset 693 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID692 ,Interrupt ID692 Priority/Priority Byte Offset 692 "
|
|
group.long 0x6B8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR174,Interrupt Priority Register 174"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID699 ,Interrupt ID699 Priority/Priority Byte Offset 699 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID698 ,Interrupt ID698 Priority/Priority Byte Offset 698 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID697 ,Interrupt ID697 Priority/Priority Byte Offset 697 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID696 ,Interrupt ID696 Priority/Priority Byte Offset 696 "
|
|
group.long 0x6BC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR175,Interrupt Priority Register 175"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID703 ,Interrupt ID703 Priority/Priority Byte Offset 703 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID702 ,Interrupt ID702 Priority/Priority Byte Offset 702 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID701 ,Interrupt ID701 Priority/Priority Byte Offset 701 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID700 ,Interrupt ID700 Priority/Priority Byte Offset 700 "
|
|
else
|
|
rgroup.long 0x6A0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR168,Interrupt Priority Register 168"
|
|
rgroup.long 0x6A4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR169,Interrupt Priority Register 169"
|
|
rgroup.long 0x6A8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR170,Interrupt Priority Register 170"
|
|
rgroup.long 0x6AC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR171,Interrupt Priority Register 171"
|
|
rgroup.long 0x6B0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR172,Interrupt Priority Register 172"
|
|
rgroup.long 0x6B4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR173,Interrupt Priority Register 173"
|
|
rgroup.long 0x6B8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR174,Interrupt Priority Register 174"
|
|
rgroup.long 0x6BC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR175,Interrupt Priority Register 175"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x16)
|
|
group.long 0x6C0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR176,Interrupt Priority Register 176"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID707 ,Interrupt ID707 Priority/Priority Byte Offset 707 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID706 ,Interrupt ID706 Priority/Priority Byte Offset 706 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID705 ,Interrupt ID705 Priority/Priority Byte Offset 705 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID704 ,Interrupt ID704 Priority/Priority Byte Offset 704 "
|
|
group.long 0x6C4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR177,Interrupt Priority Register 177"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID711 ,Interrupt ID711 Priority/Priority Byte Offset 711 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID710 ,Interrupt ID710 Priority/Priority Byte Offset 710 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID709 ,Interrupt ID709 Priority/Priority Byte Offset 709 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID708 ,Interrupt ID708 Priority/Priority Byte Offset 708 "
|
|
group.long 0x6C8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR178,Interrupt Priority Register 178"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID715 ,Interrupt ID715 Priority/Priority Byte Offset 715 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID714 ,Interrupt ID714 Priority/Priority Byte Offset 714 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID713 ,Interrupt ID713 Priority/Priority Byte Offset 713 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID712 ,Interrupt ID712 Priority/Priority Byte Offset 712 "
|
|
group.long 0x6CC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR179,Interrupt Priority Register 179"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID719 ,Interrupt ID719 Priority/Priority Byte Offset 719 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID718 ,Interrupt ID718 Priority/Priority Byte Offset 718 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID717 ,Interrupt ID717 Priority/Priority Byte Offset 717 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID716 ,Interrupt ID716 Priority/Priority Byte Offset 716 "
|
|
group.long 0x6D0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR180,Interrupt Priority Register 180"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID723 ,Interrupt ID723 Priority/Priority Byte Offset 723 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID722 ,Interrupt ID722 Priority/Priority Byte Offset 722 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID721 ,Interrupt ID721 Priority/Priority Byte Offset 721 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID720 ,Interrupt ID720 Priority/Priority Byte Offset 720 "
|
|
group.long 0x6D4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR181,Interrupt Priority Register 181"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID727 ,Interrupt ID727 Priority/Priority Byte Offset 727 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID726 ,Interrupt ID726 Priority/Priority Byte Offset 726 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID725 ,Interrupt ID725 Priority/Priority Byte Offset 725 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID724 ,Interrupt ID724 Priority/Priority Byte Offset 724 "
|
|
group.long 0x6D8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR182,Interrupt Priority Register 182"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID731 ,Interrupt ID731 Priority/Priority Byte Offset 731 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID730 ,Interrupt ID730 Priority/Priority Byte Offset 730 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID729 ,Interrupt ID729 Priority/Priority Byte Offset 729 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID728 ,Interrupt ID728 Priority/Priority Byte Offset 728 "
|
|
group.long 0x6DC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR183,Interrupt Priority Register 183"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID735 ,Interrupt ID735 Priority/Priority Byte Offset 735 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID734 ,Interrupt ID734 Priority/Priority Byte Offset 734 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID733 ,Interrupt ID733 Priority/Priority Byte Offset 733 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID732 ,Interrupt ID732 Priority/Priority Byte Offset 732 "
|
|
else
|
|
rgroup.long 0x6C0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR176,Interrupt Priority Register 176"
|
|
rgroup.long 0x6C4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR177,Interrupt Priority Register 177"
|
|
rgroup.long 0x6C8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR178,Interrupt Priority Register 178"
|
|
rgroup.long 0x6CC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR179,Interrupt Priority Register 179"
|
|
rgroup.long 0x6D0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR180,Interrupt Priority Register 180"
|
|
rgroup.long 0x6D4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR181,Interrupt Priority Register 181"
|
|
rgroup.long 0x6D8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR182,Interrupt Priority Register 182"
|
|
rgroup.long 0x6DC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR183,Interrupt Priority Register 183"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x17)
|
|
group.long 0x6E0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR184,Interrupt Priority Register 184"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID739 ,Interrupt ID739 Priority/Priority Byte Offset 739 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID738 ,Interrupt ID738 Priority/Priority Byte Offset 738 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID737 ,Interrupt ID737 Priority/Priority Byte Offset 737 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID736 ,Interrupt ID736 Priority/Priority Byte Offset 736 "
|
|
group.long 0x6E4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR185,Interrupt Priority Register 185"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID743 ,Interrupt ID743 Priority/Priority Byte Offset 743 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID742 ,Interrupt ID742 Priority/Priority Byte Offset 742 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID741 ,Interrupt ID741 Priority/Priority Byte Offset 741 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID740 ,Interrupt ID740 Priority/Priority Byte Offset 740 "
|
|
group.long 0x6E8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR186,Interrupt Priority Register 186"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID747 ,Interrupt ID747 Priority/Priority Byte Offset 747 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID746 ,Interrupt ID746 Priority/Priority Byte Offset 746 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID745 ,Interrupt ID745 Priority/Priority Byte Offset 745 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID744 ,Interrupt ID744 Priority/Priority Byte Offset 744 "
|
|
group.long 0x6EC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR187,Interrupt Priority Register 187"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID751 ,Interrupt ID751 Priority/Priority Byte Offset 751 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID750 ,Interrupt ID750 Priority/Priority Byte Offset 750 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID749 ,Interrupt ID749 Priority/Priority Byte Offset 749 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID748 ,Interrupt ID748 Priority/Priority Byte Offset 748 "
|
|
group.long 0x6F0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR188,Interrupt Priority Register 188"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID755 ,Interrupt ID755 Priority/Priority Byte Offset 755 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID754 ,Interrupt ID754 Priority/Priority Byte Offset 754 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID753 ,Interrupt ID753 Priority/Priority Byte Offset 753 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID752 ,Interrupt ID752 Priority/Priority Byte Offset 752 "
|
|
group.long 0x6F4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR189,Interrupt Priority Register 189"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID759 ,Interrupt ID759 Priority/Priority Byte Offset 759 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID758 ,Interrupt ID758 Priority/Priority Byte Offset 758 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID757 ,Interrupt ID757 Priority/Priority Byte Offset 757 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID756 ,Interrupt ID756 Priority/Priority Byte Offset 756 "
|
|
group.long 0x6F8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR190,Interrupt Priority Register 190"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID763 ,Interrupt ID763 Priority/Priority Byte Offset 763 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID762 ,Interrupt ID762 Priority/Priority Byte Offset 762 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID761 ,Interrupt ID761 Priority/Priority Byte Offset 761 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID760 ,Interrupt ID760 Priority/Priority Byte Offset 760 "
|
|
group.long 0x6FC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR191,Interrupt Priority Register 191"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID767 ,Interrupt ID767 Priority/Priority Byte Offset 767 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID766 ,Interrupt ID766 Priority/Priority Byte Offset 766 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID765 ,Interrupt ID765 Priority/Priority Byte Offset 765 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID764 ,Interrupt ID764 Priority/Priority Byte Offset 764 "
|
|
else
|
|
rgroup.long 0x6E0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR184,Interrupt Priority Register 184"
|
|
rgroup.long 0x6E4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR185,Interrupt Priority Register 185"
|
|
rgroup.long 0x6E8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR186,Interrupt Priority Register 186"
|
|
rgroup.long 0x6EC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR187,Interrupt Priority Register 187"
|
|
rgroup.long 0x6F0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR188,Interrupt Priority Register 188"
|
|
rgroup.long 0x6F4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR189,Interrupt Priority Register 189"
|
|
rgroup.long 0x6F8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR190,Interrupt Priority Register 190"
|
|
rgroup.long 0x6FC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR191,Interrupt Priority Register 191"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x18)
|
|
group.long 0x700++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR192,Interrupt Priority Register 192"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID771 ,Interrupt ID771 Priority/Priority Byte Offset 771 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID770 ,Interrupt ID770 Priority/Priority Byte Offset 770 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID769 ,Interrupt ID769 Priority/Priority Byte Offset 769 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID768 ,Interrupt ID768 Priority/Priority Byte Offset 768 "
|
|
group.long 0x704++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR193,Interrupt Priority Register 193"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID775 ,Interrupt ID775 Priority/Priority Byte Offset 775 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID774 ,Interrupt ID774 Priority/Priority Byte Offset 774 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID773 ,Interrupt ID773 Priority/Priority Byte Offset 773 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID772 ,Interrupt ID772 Priority/Priority Byte Offset 772 "
|
|
group.long 0x708++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR194,Interrupt Priority Register 194"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID779 ,Interrupt ID779 Priority/Priority Byte Offset 779 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID778 ,Interrupt ID778 Priority/Priority Byte Offset 778 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID777 ,Interrupt ID777 Priority/Priority Byte Offset 777 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID776 ,Interrupt ID776 Priority/Priority Byte Offset 776 "
|
|
group.long 0x70C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR195,Interrupt Priority Register 195"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID783 ,Interrupt ID783 Priority/Priority Byte Offset 783 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID782 ,Interrupt ID782 Priority/Priority Byte Offset 782 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID781 ,Interrupt ID781 Priority/Priority Byte Offset 781 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID780 ,Interrupt ID780 Priority/Priority Byte Offset 780 "
|
|
group.long 0x710++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR196,Interrupt Priority Register 196"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID787 ,Interrupt ID787 Priority/Priority Byte Offset 787 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID786 ,Interrupt ID786 Priority/Priority Byte Offset 786 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID785 ,Interrupt ID785 Priority/Priority Byte Offset 785 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID784 ,Interrupt ID784 Priority/Priority Byte Offset 784 "
|
|
group.long 0x714++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR197,Interrupt Priority Register 197"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID791 ,Interrupt ID791 Priority/Priority Byte Offset 791 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID790 ,Interrupt ID790 Priority/Priority Byte Offset 790 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID789 ,Interrupt ID789 Priority/Priority Byte Offset 789 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID788 ,Interrupt ID788 Priority/Priority Byte Offset 788 "
|
|
group.long 0x718++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR198,Interrupt Priority Register 198"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID795 ,Interrupt ID795 Priority/Priority Byte Offset 795 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID794 ,Interrupt ID794 Priority/Priority Byte Offset 794 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID793 ,Interrupt ID793 Priority/Priority Byte Offset 793 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID792 ,Interrupt ID792 Priority/Priority Byte Offset 792 "
|
|
group.long 0x71C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR199,Interrupt Priority Register 199"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID799 ,Interrupt ID799 Priority/Priority Byte Offset 799 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID798 ,Interrupt ID798 Priority/Priority Byte Offset 798 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID797 ,Interrupt ID797 Priority/Priority Byte Offset 797 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID796 ,Interrupt ID796 Priority/Priority Byte Offset 796 "
|
|
else
|
|
rgroup.long 0x700++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR192,Interrupt Priority Register 192"
|
|
rgroup.long 0x704++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR193,Interrupt Priority Register 193"
|
|
rgroup.long 0x708++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR194,Interrupt Priority Register 194"
|
|
rgroup.long 0x70C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR195,Interrupt Priority Register 195"
|
|
rgroup.long 0x710++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR196,Interrupt Priority Register 196"
|
|
rgroup.long 0x714++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR197,Interrupt Priority Register 197"
|
|
rgroup.long 0x718++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR198,Interrupt Priority Register 198"
|
|
rgroup.long 0x71C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR199,Interrupt Priority Register 199"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x19)
|
|
group.long 0x720++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR200,Interrupt Priority Register 200"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID803 ,Interrupt ID803 Priority/Priority Byte Offset 803 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID802 ,Interrupt ID802 Priority/Priority Byte Offset 802 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID801 ,Interrupt ID801 Priority/Priority Byte Offset 801 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID800 ,Interrupt ID800 Priority/Priority Byte Offset 800 "
|
|
group.long 0x724++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR201,Interrupt Priority Register 201"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID807 ,Interrupt ID807 Priority/Priority Byte Offset 807 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID806 ,Interrupt ID806 Priority/Priority Byte Offset 806 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID805 ,Interrupt ID805 Priority/Priority Byte Offset 805 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID804 ,Interrupt ID804 Priority/Priority Byte Offset 804 "
|
|
group.long 0x728++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR202,Interrupt Priority Register 202"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID811 ,Interrupt ID811 Priority/Priority Byte Offset 811 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID810 ,Interrupt ID810 Priority/Priority Byte Offset 810 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID809 ,Interrupt ID809 Priority/Priority Byte Offset 809 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID808 ,Interrupt ID808 Priority/Priority Byte Offset 808 "
|
|
group.long 0x72C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR203,Interrupt Priority Register 203"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID815 ,Interrupt ID815 Priority/Priority Byte Offset 815 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID814 ,Interrupt ID814 Priority/Priority Byte Offset 814 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID813 ,Interrupt ID813 Priority/Priority Byte Offset 813 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID812 ,Interrupt ID812 Priority/Priority Byte Offset 812 "
|
|
group.long 0x730++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR204,Interrupt Priority Register 204"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID819 ,Interrupt ID819 Priority/Priority Byte Offset 819 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID818 ,Interrupt ID818 Priority/Priority Byte Offset 818 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID817 ,Interrupt ID817 Priority/Priority Byte Offset 817 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID816 ,Interrupt ID816 Priority/Priority Byte Offset 816 "
|
|
group.long 0x734++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR205,Interrupt Priority Register 205"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID823 ,Interrupt ID823 Priority/Priority Byte Offset 823 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID822 ,Interrupt ID822 Priority/Priority Byte Offset 822 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID821 ,Interrupt ID821 Priority/Priority Byte Offset 821 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID820 ,Interrupt ID820 Priority/Priority Byte Offset 820 "
|
|
group.long 0x738++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR206,Interrupt Priority Register 206"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID827 ,Interrupt ID827 Priority/Priority Byte Offset 827 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID826 ,Interrupt ID826 Priority/Priority Byte Offset 826 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID825 ,Interrupt ID825 Priority/Priority Byte Offset 825 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID824 ,Interrupt ID824 Priority/Priority Byte Offset 824 "
|
|
group.long 0x73C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR207,Interrupt Priority Register 207"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID831 ,Interrupt ID831 Priority/Priority Byte Offset 831 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID830 ,Interrupt ID830 Priority/Priority Byte Offset 830 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID829 ,Interrupt ID829 Priority/Priority Byte Offset 829 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID828 ,Interrupt ID828 Priority/Priority Byte Offset 828 "
|
|
else
|
|
rgroup.long 0x720++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR200,Interrupt Priority Register 200"
|
|
rgroup.long 0x724++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR201,Interrupt Priority Register 201"
|
|
rgroup.long 0x728++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR202,Interrupt Priority Register 202"
|
|
rgroup.long 0x72C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR203,Interrupt Priority Register 203"
|
|
rgroup.long 0x730++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR204,Interrupt Priority Register 204"
|
|
rgroup.long 0x734++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR205,Interrupt Priority Register 205"
|
|
rgroup.long 0x738++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR206,Interrupt Priority Register 206"
|
|
rgroup.long 0x73C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR207,Interrupt Priority Register 207"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1A)
|
|
group.long 0x740++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR208,Interrupt Priority Register 208"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID835 ,Interrupt ID835 Priority/Priority Byte Offset 835 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID834 ,Interrupt ID834 Priority/Priority Byte Offset 834 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID833 ,Interrupt ID833 Priority/Priority Byte Offset 833 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID832 ,Interrupt ID832 Priority/Priority Byte Offset 832 "
|
|
group.long 0x744++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR209,Interrupt Priority Register 209"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID839 ,Interrupt ID839 Priority/Priority Byte Offset 839 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID838 ,Interrupt ID838 Priority/Priority Byte Offset 838 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID837 ,Interrupt ID837 Priority/Priority Byte Offset 837 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID836 ,Interrupt ID836 Priority/Priority Byte Offset 836 "
|
|
group.long 0x748++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR210,Interrupt Priority Register 210"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID843 ,Interrupt ID843 Priority/Priority Byte Offset 843 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID842 ,Interrupt ID842 Priority/Priority Byte Offset 842 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID841 ,Interrupt ID841 Priority/Priority Byte Offset 841 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID840 ,Interrupt ID840 Priority/Priority Byte Offset 840 "
|
|
group.long 0x74C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR211,Interrupt Priority Register 211"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID847 ,Interrupt ID847 Priority/Priority Byte Offset 847 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID846 ,Interrupt ID846 Priority/Priority Byte Offset 846 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID845 ,Interrupt ID845 Priority/Priority Byte Offset 845 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID844 ,Interrupt ID844 Priority/Priority Byte Offset 844 "
|
|
group.long 0x750++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR212,Interrupt Priority Register 212"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID851 ,Interrupt ID851 Priority/Priority Byte Offset 851 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID850 ,Interrupt ID850 Priority/Priority Byte Offset 850 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID849 ,Interrupt ID849 Priority/Priority Byte Offset 849 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID848 ,Interrupt ID848 Priority/Priority Byte Offset 848 "
|
|
group.long 0x754++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR213,Interrupt Priority Register 213"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID855 ,Interrupt ID855 Priority/Priority Byte Offset 855 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID854 ,Interrupt ID854 Priority/Priority Byte Offset 854 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID853 ,Interrupt ID853 Priority/Priority Byte Offset 853 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID852 ,Interrupt ID852 Priority/Priority Byte Offset 852 "
|
|
group.long 0x758++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR214,Interrupt Priority Register 214"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID859 ,Interrupt ID859 Priority/Priority Byte Offset 859 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID858 ,Interrupt ID858 Priority/Priority Byte Offset 858 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID857 ,Interrupt ID857 Priority/Priority Byte Offset 857 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID856 ,Interrupt ID856 Priority/Priority Byte Offset 856 "
|
|
group.long 0x75C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR215,Interrupt Priority Register 215"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID863 ,Interrupt ID863 Priority/Priority Byte Offset 863 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID862 ,Interrupt ID862 Priority/Priority Byte Offset 862 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID861 ,Interrupt ID861 Priority/Priority Byte Offset 861 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID860 ,Interrupt ID860 Priority/Priority Byte Offset 860 "
|
|
else
|
|
rgroup.long 0x740++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR208,Interrupt Priority Register 208"
|
|
rgroup.long 0x744++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR209,Interrupt Priority Register 209"
|
|
rgroup.long 0x748++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR210,Interrupt Priority Register 210"
|
|
rgroup.long 0x74C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR211,Interrupt Priority Register 211"
|
|
rgroup.long 0x750++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR212,Interrupt Priority Register 212"
|
|
rgroup.long 0x754++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR213,Interrupt Priority Register 213"
|
|
rgroup.long 0x758++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR214,Interrupt Priority Register 214"
|
|
rgroup.long 0x75C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR215,Interrupt Priority Register 215"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1B)
|
|
group.long 0x760++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR216,Interrupt Priority Register 216"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID867 ,Interrupt ID867 Priority/Priority Byte Offset 867 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID866 ,Interrupt ID866 Priority/Priority Byte Offset 866 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID865 ,Interrupt ID865 Priority/Priority Byte Offset 865 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID864 ,Interrupt ID864 Priority/Priority Byte Offset 864 "
|
|
group.long 0x764++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR217,Interrupt Priority Register 217"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID871 ,Interrupt ID871 Priority/Priority Byte Offset 871 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID870 ,Interrupt ID870 Priority/Priority Byte Offset 870 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID869 ,Interrupt ID869 Priority/Priority Byte Offset 869 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID868 ,Interrupt ID868 Priority/Priority Byte Offset 868 "
|
|
group.long 0x768++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR218,Interrupt Priority Register 218"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID875 ,Interrupt ID875 Priority/Priority Byte Offset 875 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID874 ,Interrupt ID874 Priority/Priority Byte Offset 874 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID873 ,Interrupt ID873 Priority/Priority Byte Offset 873 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID872 ,Interrupt ID872 Priority/Priority Byte Offset 872 "
|
|
group.long 0x76C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR219,Interrupt Priority Register 219"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID879 ,Interrupt ID879 Priority/Priority Byte Offset 879 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID878 ,Interrupt ID878 Priority/Priority Byte Offset 878 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID877 ,Interrupt ID877 Priority/Priority Byte Offset 877 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID876 ,Interrupt ID876 Priority/Priority Byte Offset 876 "
|
|
group.long 0x770++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR220,Interrupt Priority Register 220"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID883 ,Interrupt ID883 Priority/Priority Byte Offset 883 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID882 ,Interrupt ID882 Priority/Priority Byte Offset 882 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID881 ,Interrupt ID881 Priority/Priority Byte Offset 881 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID880 ,Interrupt ID880 Priority/Priority Byte Offset 880 "
|
|
group.long 0x774++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR221,Interrupt Priority Register 221"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID887 ,Interrupt ID887 Priority/Priority Byte Offset 887 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID886 ,Interrupt ID886 Priority/Priority Byte Offset 886 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID885 ,Interrupt ID885 Priority/Priority Byte Offset 885 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID884 ,Interrupt ID884 Priority/Priority Byte Offset 884 "
|
|
group.long 0x778++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR222,Interrupt Priority Register 222"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID891 ,Interrupt ID891 Priority/Priority Byte Offset 891 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID890 ,Interrupt ID890 Priority/Priority Byte Offset 890 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID889 ,Interrupt ID889 Priority/Priority Byte Offset 889 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID888 ,Interrupt ID888 Priority/Priority Byte Offset 888 "
|
|
group.long 0x77C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR223,Interrupt Priority Register 223"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID895 ,Interrupt ID895 Priority/Priority Byte Offset 895 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID894 ,Interrupt ID894 Priority/Priority Byte Offset 894 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID893 ,Interrupt ID893 Priority/Priority Byte Offset 893 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID892 ,Interrupt ID892 Priority/Priority Byte Offset 892 "
|
|
else
|
|
rgroup.long 0x760++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR216,Interrupt Priority Register 216"
|
|
rgroup.long 0x764++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR217,Interrupt Priority Register 217"
|
|
rgroup.long 0x768++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR218,Interrupt Priority Register 218"
|
|
rgroup.long 0x76C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR219,Interrupt Priority Register 219"
|
|
rgroup.long 0x770++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR220,Interrupt Priority Register 220"
|
|
rgroup.long 0x774++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR221,Interrupt Priority Register 221"
|
|
rgroup.long 0x778++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR222,Interrupt Priority Register 222"
|
|
rgroup.long 0x77C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR223,Interrupt Priority Register 223"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1C)
|
|
group.long 0x780++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR224,Interrupt Priority Register 224"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID899 ,Interrupt ID899 Priority/Priority Byte Offset 899 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID898 ,Interrupt ID898 Priority/Priority Byte Offset 898 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID897 ,Interrupt ID897 Priority/Priority Byte Offset 897 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID896 ,Interrupt ID896 Priority/Priority Byte Offset 896 "
|
|
group.long 0x784++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR225,Interrupt Priority Register 225"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID903 ,Interrupt ID903 Priority/Priority Byte Offset 903 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID902 ,Interrupt ID902 Priority/Priority Byte Offset 902 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID901 ,Interrupt ID901 Priority/Priority Byte Offset 901 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID900 ,Interrupt ID900 Priority/Priority Byte Offset 900 "
|
|
group.long 0x788++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR226,Interrupt Priority Register 226"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID907 ,Interrupt ID907 Priority/Priority Byte Offset 907 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID906 ,Interrupt ID906 Priority/Priority Byte Offset 906 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID905 ,Interrupt ID905 Priority/Priority Byte Offset 905 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID904 ,Interrupt ID904 Priority/Priority Byte Offset 904 "
|
|
group.long 0x78C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR227,Interrupt Priority Register 227"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID911 ,Interrupt ID911 Priority/Priority Byte Offset 911 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID910 ,Interrupt ID910 Priority/Priority Byte Offset 910 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID909 ,Interrupt ID909 Priority/Priority Byte Offset 909 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID908 ,Interrupt ID908 Priority/Priority Byte Offset 908 "
|
|
group.long 0x790++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR228,Interrupt Priority Register 228"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID915 ,Interrupt ID915 Priority/Priority Byte Offset 915 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID914 ,Interrupt ID914 Priority/Priority Byte Offset 914 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID913 ,Interrupt ID913 Priority/Priority Byte Offset 913 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID912 ,Interrupt ID912 Priority/Priority Byte Offset 912 "
|
|
group.long 0x794++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR229,Interrupt Priority Register 229"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID919 ,Interrupt ID919 Priority/Priority Byte Offset 919 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID918 ,Interrupt ID918 Priority/Priority Byte Offset 918 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID917 ,Interrupt ID917 Priority/Priority Byte Offset 917 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID916 ,Interrupt ID916 Priority/Priority Byte Offset 916 "
|
|
group.long 0x798++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR230,Interrupt Priority Register 230"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID923 ,Interrupt ID923 Priority/Priority Byte Offset 923 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID922 ,Interrupt ID922 Priority/Priority Byte Offset 922 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID921 ,Interrupt ID921 Priority/Priority Byte Offset 921 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID920 ,Interrupt ID920 Priority/Priority Byte Offset 920 "
|
|
group.long 0x79C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR231,Interrupt Priority Register 231"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID927 ,Interrupt ID927 Priority/Priority Byte Offset 927 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID926 ,Interrupt ID926 Priority/Priority Byte Offset 926 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID925 ,Interrupt ID925 Priority/Priority Byte Offset 925 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID924 ,Interrupt ID924 Priority/Priority Byte Offset 924 "
|
|
else
|
|
rgroup.long 0x780++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR224,Interrupt Priority Register 224"
|
|
rgroup.long 0x784++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR225,Interrupt Priority Register 225"
|
|
rgroup.long 0x788++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR226,Interrupt Priority Register 226"
|
|
rgroup.long 0x78C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR227,Interrupt Priority Register 227"
|
|
rgroup.long 0x790++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR228,Interrupt Priority Register 228"
|
|
rgroup.long 0x794++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR229,Interrupt Priority Register 229"
|
|
rgroup.long 0x798++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR230,Interrupt Priority Register 230"
|
|
rgroup.long 0x79C++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR231,Interrupt Priority Register 231"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1D)
|
|
group.long 0x7A0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR232,Interrupt Priority Register 232"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID931 ,Interrupt ID931 Priority/Priority Byte Offset 931 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID930 ,Interrupt ID930 Priority/Priority Byte Offset 930 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID929 ,Interrupt ID929 Priority/Priority Byte Offset 929 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID928 ,Interrupt ID928 Priority/Priority Byte Offset 928 "
|
|
group.long 0x7A4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR233,Interrupt Priority Register 233"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID935 ,Interrupt ID935 Priority/Priority Byte Offset 935 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID934 ,Interrupt ID934 Priority/Priority Byte Offset 934 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID933 ,Interrupt ID933 Priority/Priority Byte Offset 933 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID932 ,Interrupt ID932 Priority/Priority Byte Offset 932 "
|
|
group.long 0x7A8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR234,Interrupt Priority Register 234"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID939 ,Interrupt ID939 Priority/Priority Byte Offset 939 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID938 ,Interrupt ID938 Priority/Priority Byte Offset 938 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID937 ,Interrupt ID937 Priority/Priority Byte Offset 937 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID936 ,Interrupt ID936 Priority/Priority Byte Offset 936 "
|
|
group.long 0x7AC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR235,Interrupt Priority Register 235"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID943 ,Interrupt ID943 Priority/Priority Byte Offset 943 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID942 ,Interrupt ID942 Priority/Priority Byte Offset 942 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID941 ,Interrupt ID941 Priority/Priority Byte Offset 941 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID940 ,Interrupt ID940 Priority/Priority Byte Offset 940 "
|
|
group.long 0x7B0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR236,Interrupt Priority Register 236"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID947 ,Interrupt ID947 Priority/Priority Byte Offset 947 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID946 ,Interrupt ID946 Priority/Priority Byte Offset 946 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID945 ,Interrupt ID945 Priority/Priority Byte Offset 945 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID944 ,Interrupt ID944 Priority/Priority Byte Offset 944 "
|
|
group.long 0x7B4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR237,Interrupt Priority Register 237"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID951 ,Interrupt ID951 Priority/Priority Byte Offset 951 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID950 ,Interrupt ID950 Priority/Priority Byte Offset 950 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID949 ,Interrupt ID949 Priority/Priority Byte Offset 949 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID948 ,Interrupt ID948 Priority/Priority Byte Offset 948 "
|
|
group.long 0x7B8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR238,Interrupt Priority Register 238"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID955 ,Interrupt ID955 Priority/Priority Byte Offset 955 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID954 ,Interrupt ID954 Priority/Priority Byte Offset 954 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID953 ,Interrupt ID953 Priority/Priority Byte Offset 953 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID952 ,Interrupt ID952 Priority/Priority Byte Offset 952 "
|
|
group.long 0x7BC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR239,Interrupt Priority Register 239"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID959 ,Interrupt ID959 Priority/Priority Byte Offset 959 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID958 ,Interrupt ID958 Priority/Priority Byte Offset 958 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID957 ,Interrupt ID957 Priority/Priority Byte Offset 957 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID956 ,Interrupt ID956 Priority/Priority Byte Offset 956 "
|
|
else
|
|
rgroup.long 0x7A0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR232,Interrupt Priority Register 232"
|
|
rgroup.long 0x7A4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR233,Interrupt Priority Register 233"
|
|
rgroup.long 0x7A8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR234,Interrupt Priority Register 234"
|
|
rgroup.long 0x7AC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR235,Interrupt Priority Register 235"
|
|
rgroup.long 0x7B0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR236,Interrupt Priority Register 236"
|
|
rgroup.long 0x7B4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR237,Interrupt Priority Register 237"
|
|
rgroup.long 0x7B8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR238,Interrupt Priority Register 238"
|
|
rgroup.long 0x7BC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR239,Interrupt Priority Register 239"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1E)
|
|
group.long 0x7C0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR240,Interrupt Priority Register 240"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID963 ,Interrupt ID963 Priority/Priority Byte Offset 963 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID962 ,Interrupt ID962 Priority/Priority Byte Offset 962 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID961 ,Interrupt ID961 Priority/Priority Byte Offset 961 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID960 ,Interrupt ID960 Priority/Priority Byte Offset 960 "
|
|
group.long 0x7C4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR241,Interrupt Priority Register 241"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID967 ,Interrupt ID967 Priority/Priority Byte Offset 967 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID966 ,Interrupt ID966 Priority/Priority Byte Offset 966 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID965 ,Interrupt ID965 Priority/Priority Byte Offset 965 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID964 ,Interrupt ID964 Priority/Priority Byte Offset 964 "
|
|
group.long 0x7C8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR242,Interrupt Priority Register 242"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID971 ,Interrupt ID971 Priority/Priority Byte Offset 971 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID970 ,Interrupt ID970 Priority/Priority Byte Offset 970 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID969 ,Interrupt ID969 Priority/Priority Byte Offset 969 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID968 ,Interrupt ID968 Priority/Priority Byte Offset 968 "
|
|
group.long 0x7CC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR243,Interrupt Priority Register 243"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID975 ,Interrupt ID975 Priority/Priority Byte Offset 975 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID974 ,Interrupt ID974 Priority/Priority Byte Offset 974 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID973 ,Interrupt ID973 Priority/Priority Byte Offset 973 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID972 ,Interrupt ID972 Priority/Priority Byte Offset 972 "
|
|
group.long 0x7D0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR244,Interrupt Priority Register 244"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID979 ,Interrupt ID979 Priority/Priority Byte Offset 979 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID978 ,Interrupt ID978 Priority/Priority Byte Offset 978 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID977 ,Interrupt ID977 Priority/Priority Byte Offset 977 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID976 ,Interrupt ID976 Priority/Priority Byte Offset 976 "
|
|
group.long 0x7D4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR245,Interrupt Priority Register 245"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID983 ,Interrupt ID983 Priority/Priority Byte Offset 983 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID982 ,Interrupt ID982 Priority/Priority Byte Offset 982 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID981 ,Interrupt ID981 Priority/Priority Byte Offset 981 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID980 ,Interrupt ID980 Priority/Priority Byte Offset 980 "
|
|
group.long 0x7D8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR246,Interrupt Priority Register 246"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID987 ,Interrupt ID987 Priority/Priority Byte Offset 987 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID986 ,Interrupt ID986 Priority/Priority Byte Offset 986 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID985 ,Interrupt ID985 Priority/Priority Byte Offset 985 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID984 ,Interrupt ID984 Priority/Priority Byte Offset 984 "
|
|
group.long 0x7DC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR247,Interrupt Priority Register 247"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID991 ,Interrupt ID991 Priority/Priority Byte Offset 991 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID990 ,Interrupt ID990 Priority/Priority Byte Offset 990 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID989 ,Interrupt ID989 Priority/Priority Byte Offset 989 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID988 ,Interrupt ID988 Priority/Priority Byte Offset 988 "
|
|
else
|
|
rgroup.long 0x7C0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR240,Interrupt Priority Register 240"
|
|
rgroup.long 0x7C4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR241,Interrupt Priority Register 241"
|
|
rgroup.long 0x7C8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR242,Interrupt Priority Register 242"
|
|
rgroup.long 0x7CC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR243,Interrupt Priority Register 243"
|
|
rgroup.long 0x7D0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR244,Interrupt Priority Register 244"
|
|
rgroup.long 0x7D4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR245,Interrupt Priority Register 245"
|
|
rgroup.long 0x7D8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR246,Interrupt Priority Register 246"
|
|
rgroup.long 0x7DC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR247,Interrupt Priority Register 247"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1F)
|
|
group.long 0x7E0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR248,Interrupt Priority Register 248"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID995 ,Interrupt ID995 Priority/Priority Byte Offset 995 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID994 ,Interrupt ID994 Priority/Priority Byte Offset 994 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID993 ,Interrupt ID993 Priority/Priority Byte Offset 993 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID992 ,Interrupt ID992 Priority/Priority Byte Offset 992 "
|
|
group.long 0x7E4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR249,Interrupt Priority Register 249"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID999 ,Interrupt ID999 Priority/Priority Byte Offset 999 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID998 ,Interrupt ID998 Priority/Priority Byte Offset 998 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID997 ,Interrupt ID997 Priority/Priority Byte Offset 997 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID996 ,Interrupt ID996 Priority/Priority Byte Offset 996 "
|
|
group.long 0x7E8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR250,Interrupt Priority Register 250"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID1003 ,Interrupt ID1003 Priority/Priority Byte Offset 1003"
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID1002 ,Interrupt ID1002 Priority/Priority Byte Offset 1002"
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID1001 ,Interrupt ID1001 Priority/Priority Byte Offset 1001"
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID1000 ,Interrupt ID1000 Priority/Priority Byte Offset 1000"
|
|
group.long 0x7EC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR251,Interrupt Priority Register 251"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID1007 ,Interrupt ID1007 Priority/Priority Byte Offset 1007"
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID1006 ,Interrupt ID1006 Priority/Priority Byte Offset 1006"
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID1005 ,Interrupt ID1005 Priority/Priority Byte Offset 1005"
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID1004 ,Interrupt ID1004 Priority/Priority Byte Offset 1004"
|
|
group.long 0x7F0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR252,Interrupt Priority Register 252"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID1011 ,Interrupt ID1011 Priority/Priority Byte Offset 1011"
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID1010 ,Interrupt ID1010 Priority/Priority Byte Offset 1010"
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID1009 ,Interrupt ID1009 Priority/Priority Byte Offset 1009"
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID1008 ,Interrupt ID1008 Priority/Priority Byte Offset 1008"
|
|
group.long 0x7F4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR253,Interrupt Priority Register 253"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID1015 ,Interrupt ID1015 Priority/Priority Byte Offset 1015"
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID1014 ,Interrupt ID1014 Priority/Priority Byte Offset 1014"
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID1013 ,Interrupt ID1013 Priority/Priority Byte Offset 1013"
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID1012 ,Interrupt ID1012 Priority/Priority Byte Offset 1012"
|
|
group.long 0x7F8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR254,Interrupt Priority Register 254"
|
|
hexmask.long.byte 0x00 24.--31. 1. " INTID1019 ,Interrupt ID1019 Priority/Priority Byte Offset 1019"
|
|
hexmask.long.byte 0x00 16.--23. 1. " INTID1018 ,Interrupt ID1018 Priority/Priority Byte Offset 1018"
|
|
hexmask.long.byte 0x00 8.--15. 1. " INTID1017 ,Interrupt ID1017 Priority/Priority Byte Offset 1017"
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTID1016 ,Interrupt ID1016 Priority/Priority Byte Offset 1016"
|
|
else
|
|
rgroup.long 0x7E0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR248,Interrupt Priority Register 248"
|
|
rgroup.long 0x7E4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR249,Interrupt Priority Register 249"
|
|
rgroup.long 0x7E8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR250,Interrupt Priority Register 250"
|
|
rgroup.long 0x7EC++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR251,Interrupt Priority Register 251"
|
|
rgroup.long 0x7F0++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR252,Interrupt Priority Register 252"
|
|
rgroup.long 0x7F4++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR253,Interrupt Priority Register 253"
|
|
rgroup.long 0x7F8++0x03
|
|
line.long 0x00 "GICD_IPRIORITYR254,Interrupt Priority Register 254"
|
|
endif
|
|
tree.end
|
|
width 19.
|
|
tree "Processor Targets Registers"
|
|
if (((per.l(ad:0x7d001000+0x04))&0x000000E0)>0x1)
|
|
rgroup.long 0x800++0x03
|
|
line.long 0x00 "GICD_ITARGETSR0,Interrupt Processor Targets Register 0"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0 "
|
|
rgroup.long 0x804++0x03
|
|
line.long 0x00 "GICD_ITARGETSR1,Interrupt Processor Targets Register 1"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO7 ,CPU Targets Byte Offset 7 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO6 ,CPU Targets Byte Offset 6 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO5 ,CPU Targets Byte Offset 5 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO4 ,CPU Targets Byte Offset 4 "
|
|
rgroup.long 0x808++0x03
|
|
line.long 0x00 "GICD_ITARGETSR2,Interrupt Processor Targets Register 2"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO11 ,CPU Targets Byte Offset 11 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO10 ,CPU Targets Byte Offset 10 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO9 ,CPU Targets Byte Offset 9 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO8 ,CPU Targets Byte Offset 8 "
|
|
rgroup.long 0x80C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR3,Interrupt Processor Targets Register 3"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO15 ,CPU Targets Byte Offset 15 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO14 ,CPU Targets Byte Offset 14 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO13 ,CPU Targets Byte Offset 13 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO12 ,CPU Targets Byte Offset 12 "
|
|
rgroup.long 0x810++0x03
|
|
line.long 0x00 "GICD_ITARGETSR4,Interrupt Processor Targets Register 4"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO19 ,CPU Targets Byte Offset 19 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO18 ,CPU Targets Byte Offset 18 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO17 ,CPU Targets Byte Offset 17 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO16 ,CPU Targets Byte Offset 16 "
|
|
rgroup.long 0x814++0x03
|
|
line.long 0x00 "GICD_ITARGETSR5,Interrupt Processor Targets Register 5"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO23 ,CPU Targets Byte Offset 23 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO22 ,CPU Targets Byte Offset 22 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO21 ,CPU Targets Byte Offset 21 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO20 ,CPU Targets Byte Offset 20 "
|
|
rgroup.long 0x818++0x03
|
|
line.long 0x00 "GICD_ITARGETSR6,Interrupt Processor Targets Register 6"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO27 ,CPU Targets Byte Offset 27 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO26 ,CPU Targets Byte Offset 26 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO25 ,CPU Targets Byte Offset 25 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO24 ,CPU Targets Byte Offset 24 "
|
|
rgroup.long 0x81C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR7,Interrupt Processor Targets Register 7"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO31 ,CPU Targets Byte Offset 31 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO30 ,CPU Targets Byte Offset 30 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO29 ,CPU Targets Byte Offset 29 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO28 ,CPU Targets Byte Offset 28 "
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x01)
|
|
group.long 0x820++0x03
|
|
line.long 0x00 "GICD_ITARGETSR8,Interrupt Processor Targets Register 8"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO35 ,CPU Targets Byte Offset 35 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO34 ,CPU Targets Byte Offset 34 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO33 ,CPU Targets Byte Offset 33 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO32 ,CPU Targets Byte Offset 32 "
|
|
group.long 0x824++0x03
|
|
line.long 0x00 "GICD_ITARGETSR9,Interrupt Processor Targets Register 9"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO39 ,CPU Targets Byte Offset 39 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO38 ,CPU Targets Byte Offset 38 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO37 ,CPU Targets Byte Offset 37 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO36 ,CPU Targets Byte Offset 36 "
|
|
group.long 0x828++0x03
|
|
line.long 0x00 "GICD_ITARGETSR10,Interrupt Processor Targets Register 10"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO43 ,CPU Targets Byte Offset 43 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO42 ,CPU Targets Byte Offset 42 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO41 ,CPU Targets Byte Offset 41 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO40 ,CPU Targets Byte Offset 40 "
|
|
group.long 0x82C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR11,Interrupt Processor Targets Register 11"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO47 ,CPU Targets Byte Offset 47 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO46 ,CPU Targets Byte Offset 46 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO45 ,CPU Targets Byte Offset 45 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO44 ,CPU Targets Byte Offset 44 "
|
|
group.long 0x830++0x03
|
|
line.long 0x00 "GICD_ITARGETSR12,Interrupt Processor Targets Register 12"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO51 ,CPU Targets Byte Offset 51 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO50 ,CPU Targets Byte Offset 50 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO49 ,CPU Targets Byte Offset 49 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO48 ,CPU Targets Byte Offset 48 "
|
|
group.long 0x834++0x03
|
|
line.long 0x00 "GICD_ITARGETSR13,Interrupt Processor Targets Register 13"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO55 ,CPU Targets Byte Offset 55 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO54 ,CPU Targets Byte Offset 54 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO53 ,CPU Targets Byte Offset 53 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO52 ,CPU Targets Byte Offset 52 "
|
|
group.long 0x838++0x03
|
|
line.long 0x00 "GICD_ITARGETSR14,Interrupt Processor Targets Register 14"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO59 ,CPU Targets Byte Offset 59 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO58 ,CPU Targets Byte Offset 58 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO57 ,CPU Targets Byte Offset 57 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO56 ,CPU Targets Byte Offset 56 "
|
|
group.long 0x83C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR15,Interrupt Processor Targets Register 15"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO63 ,CPU Targets Byte Offset 63 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO62 ,CPU Targets Byte Offset 62 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO61 ,CPU Targets Byte Offset 61 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO60 ,CPU Targets Byte Offset 60 "
|
|
else
|
|
rgroup.long 0x820++0x03
|
|
line.long 0x00 "GICD_ITARGETSR8,Interrupt Processor Targets Register 8"
|
|
rgroup.long 0x824++0x03
|
|
line.long 0x00 "GICD_ITARGETSR9,Interrupt Processor Targets Register 9"
|
|
rgroup.long 0x828++0x03
|
|
line.long 0x00 "GICD_ITARGETSR10,Interrupt Processor Targets Register 10"
|
|
rgroup.long 0x82C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR11,Interrupt Processor Targets Register 11"
|
|
rgroup.long 0x830++0x03
|
|
line.long 0x00 "GICD_ITARGETSR12,Interrupt Processor Targets Register 12"
|
|
rgroup.long 0x834++0x03
|
|
line.long 0x00 "GICD_ITARGETSR13,Interrupt Processor Targets Register 13"
|
|
rgroup.long 0x838++0x03
|
|
line.long 0x00 "GICD_ITARGETSR14,Interrupt Processor Targets Register 14"
|
|
rgroup.long 0x83C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR15,Interrupt Processor Targets Register 15"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x02)
|
|
group.long 0x840++0x03
|
|
line.long 0x00 "GICD_ITARGETSR16,Interrupt Processor Targets Register 16"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO67 ,CPU Targets Byte Offset 67 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO66 ,CPU Targets Byte Offset 66 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO65 ,CPU Targets Byte Offset 65 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO64 ,CPU Targets Byte Offset 64 "
|
|
group.long 0x844++0x03
|
|
line.long 0x00 "GICD_ITARGETSR17,Interrupt Processor Targets Register 17"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO71 ,CPU Targets Byte Offset 71 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO70 ,CPU Targets Byte Offset 70 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO69 ,CPU Targets Byte Offset 69 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO68 ,CPU Targets Byte Offset 68 "
|
|
group.long 0x848++0x03
|
|
line.long 0x00 "GICD_ITARGETSR18,Interrupt Processor Targets Register 18"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO75 ,CPU Targets Byte Offset 75 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO74 ,CPU Targets Byte Offset 74 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO73 ,CPU Targets Byte Offset 73 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO72 ,CPU Targets Byte Offset 72 "
|
|
group.long 0x84C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR19,Interrupt Processor Targets Register 19"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO79 ,CPU Targets Byte Offset 79 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO78 ,CPU Targets Byte Offset 78 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO77 ,CPU Targets Byte Offset 77 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO76 ,CPU Targets Byte Offset 76 "
|
|
group.long 0x850++0x03
|
|
line.long 0x00 "GICD_ITARGETSR20,Interrupt Processor Targets Register 20"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO83 ,CPU Targets Byte Offset 83 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO82 ,CPU Targets Byte Offset 82 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO81 ,CPU Targets Byte Offset 81 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO80 ,CPU Targets Byte Offset 80 "
|
|
group.long 0x854++0x03
|
|
line.long 0x00 "GICD_ITARGETSR21,Interrupt Processor Targets Register 21"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO87 ,CPU Targets Byte Offset 87 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO86 ,CPU Targets Byte Offset 86 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO85 ,CPU Targets Byte Offset 85 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO84 ,CPU Targets Byte Offset 84 "
|
|
group.long 0x858++0x03
|
|
line.long 0x00 "GICD_ITARGETSR22,Interrupt Processor Targets Register 22"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO91 ,CPU Targets Byte Offset 91 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO90 ,CPU Targets Byte Offset 90 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO89 ,CPU Targets Byte Offset 89 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO88 ,CPU Targets Byte Offset 88 "
|
|
group.long 0x85C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR23,Interrupt Processor Targets Register 23"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO95 ,CPU Targets Byte Offset 95 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO94 ,CPU Targets Byte Offset 94 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO93 ,CPU Targets Byte Offset 93 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO92 ,CPU Targets Byte Offset 92 "
|
|
else
|
|
rgroup.long 0x840++0x03
|
|
line.long 0x00 "GICD_ITARGETSR16,Interrupt Processor Targets Register 16"
|
|
rgroup.long 0x844++0x03
|
|
line.long 0x00 "GICD_ITARGETSR17,Interrupt Processor Targets Register 17"
|
|
rgroup.long 0x848++0x03
|
|
line.long 0x00 "GICD_ITARGETSR18,Interrupt Processor Targets Register 18"
|
|
rgroup.long 0x84C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR19,Interrupt Processor Targets Register 19"
|
|
rgroup.long 0x850++0x03
|
|
line.long 0x00 "GICD_ITARGETSR20,Interrupt Processor Targets Register 20"
|
|
rgroup.long 0x854++0x03
|
|
line.long 0x00 "GICD_ITARGETSR21,Interrupt Processor Targets Register 21"
|
|
rgroup.long 0x858++0x03
|
|
line.long 0x00 "GICD_ITARGETSR22,Interrupt Processor Targets Register 22"
|
|
rgroup.long 0x85C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR23,Interrupt Processor Targets Register 23"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x03)
|
|
group.long 0x860++0x03
|
|
line.long 0x00 "GICD_ITARGETSR24,Interrupt Processor Targets Register 24"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO99 ,CPU Targets Byte Offset 99 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO98 ,CPU Targets Byte Offset 98 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO97 ,CPU Targets Byte Offset 97 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO96 ,CPU Targets Byte Offset 96 "
|
|
group.long 0x864++0x03
|
|
line.long 0x00 "GICD_ITARGETSR25,Interrupt Processor Targets Register 25"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO103 ,CPU Targets Byte Offset 103 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO102 ,CPU Targets Byte Offset 102 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO101 ,CPU Targets Byte Offset 101 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO100 ,CPU Targets Byte Offset 100 "
|
|
group.long 0x868++0x03
|
|
line.long 0x00 "GICD_ITARGETSR26,Interrupt Processor Targets Register 26"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO107 ,CPU Targets Byte Offset 107 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO106 ,CPU Targets Byte Offset 106 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO105 ,CPU Targets Byte Offset 105 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO104 ,CPU Targets Byte Offset 104 "
|
|
group.long 0x86C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR27,Interrupt Processor Targets Register 27"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO111 ,CPU Targets Byte Offset 111 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO110 ,CPU Targets Byte Offset 110 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO109 ,CPU Targets Byte Offset 109 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO108 ,CPU Targets Byte Offset 108 "
|
|
group.long 0x870++0x03
|
|
line.long 0x00 "GICD_ITARGETSR28,Interrupt Processor Targets Register 28"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO115 ,CPU Targets Byte Offset 115 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO114 ,CPU Targets Byte Offset 114 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO113 ,CPU Targets Byte Offset 113 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO112 ,CPU Targets Byte Offset 112 "
|
|
group.long 0x874++0x03
|
|
line.long 0x00 "GICD_ITARGETSR29,Interrupt Processor Targets Register 29"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO119 ,CPU Targets Byte Offset 119 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO118 ,CPU Targets Byte Offset 118 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO117 ,CPU Targets Byte Offset 117 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO116 ,CPU Targets Byte Offset 116 "
|
|
group.long 0x878++0x03
|
|
line.long 0x00 "GICD_ITARGETSR30,Interrupt Processor Targets Register 30"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO123 ,CPU Targets Byte Offset 123 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO122 ,CPU Targets Byte Offset 122 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO121 ,CPU Targets Byte Offset 121 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO120 ,CPU Targets Byte Offset 120 "
|
|
group.long 0x87C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR31,Interrupt Processor Targets Register 31"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO127 ,CPU Targets Byte Offset 127 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO126 ,CPU Targets Byte Offset 126 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO125 ,CPU Targets Byte Offset 125 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO124 ,CPU Targets Byte Offset 124 "
|
|
else
|
|
rgroup.long 0x860++0x03
|
|
line.long 0x00 "GICD_ITARGETSR24,Interrupt Processor Targets Register 24"
|
|
rgroup.long 0x864++0x03
|
|
line.long 0x00 "GICD_ITARGETSR25,Interrupt Processor Targets Register 25"
|
|
rgroup.long 0x868++0x03
|
|
line.long 0x00 "GICD_ITARGETSR26,Interrupt Processor Targets Register 26"
|
|
rgroup.long 0x86C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR27,Interrupt Processor Targets Register 27"
|
|
rgroup.long 0x870++0x03
|
|
line.long 0x00 "GICD_ITARGETSR28,Interrupt Processor Targets Register 28"
|
|
rgroup.long 0x874++0x03
|
|
line.long 0x00 "GICD_ITARGETSR29,Interrupt Processor Targets Register 29"
|
|
rgroup.long 0x878++0x03
|
|
line.long 0x00 "GICD_ITARGETSR30,Interrupt Processor Targets Register 30"
|
|
rgroup.long 0x87C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR31,Interrupt Processor Targets Register 31"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x04)
|
|
group.long 0x880++0x03
|
|
line.long 0x00 "GICD_ITARGETSR32,Interrupt Processor Targets Register 32"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO131 ,CPU Targets Byte Offset 131 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO130 ,CPU Targets Byte Offset 130 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO129 ,CPU Targets Byte Offset 129 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO128 ,CPU Targets Byte Offset 128 "
|
|
group.long 0x884++0x03
|
|
line.long 0x00 "GICD_ITARGETSR33,Interrupt Processor Targets Register 33"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO135 ,CPU Targets Byte Offset 135 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO134 ,CPU Targets Byte Offset 134 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO133 ,CPU Targets Byte Offset 133 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO132 ,CPU Targets Byte Offset 132 "
|
|
group.long 0x888++0x03
|
|
line.long 0x00 "GICD_ITARGETSR34,Interrupt Processor Targets Register 34"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO139 ,CPU Targets Byte Offset 139 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO138 ,CPU Targets Byte Offset 138 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO137 ,CPU Targets Byte Offset 137 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO136 ,CPU Targets Byte Offset 136 "
|
|
group.long 0x88C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR35,Interrupt Processor Targets Register 35"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO143 ,CPU Targets Byte Offset 143 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO142 ,CPU Targets Byte Offset 142 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO141 ,CPU Targets Byte Offset 141 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO140 ,CPU Targets Byte Offset 140 "
|
|
group.long 0x890++0x03
|
|
line.long 0x00 "GICD_ITARGETSR36,Interrupt Processor Targets Register 36"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO147 ,CPU Targets Byte Offset 147 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO146 ,CPU Targets Byte Offset 146 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO145 ,CPU Targets Byte Offset 145 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO144 ,CPU Targets Byte Offset 144 "
|
|
group.long 0x894++0x03
|
|
line.long 0x00 "GICD_ITARGETSR37,Interrupt Processor Targets Register 37"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO151 ,CPU Targets Byte Offset 151 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO150 ,CPU Targets Byte Offset 150 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO149 ,CPU Targets Byte Offset 149 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO148 ,CPU Targets Byte Offset 148 "
|
|
group.long 0x898++0x03
|
|
line.long 0x00 "GICD_ITARGETSR38,Interrupt Processor Targets Register 38"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO155 ,CPU Targets Byte Offset 155 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO154 ,CPU Targets Byte Offset 154 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO153 ,CPU Targets Byte Offset 153 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO152 ,CPU Targets Byte Offset 152 "
|
|
group.long 0x89C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR39,Interrupt Processor Targets Register 39"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO159 ,CPU Targets Byte Offset 159 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO158 ,CPU Targets Byte Offset 158 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO157 ,CPU Targets Byte Offset 157 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO156 ,CPU Targets Byte Offset 156 "
|
|
else
|
|
rgroup.long 0x880++0x03
|
|
line.long 0x00 "GICD_ITARGETSR32,Interrupt Processor Targets Register 32"
|
|
rgroup.long 0x884++0x03
|
|
line.long 0x00 "GICD_ITARGETSR33,Interrupt Processor Targets Register 33"
|
|
rgroup.long 0x888++0x03
|
|
line.long 0x00 "GICD_ITARGETSR34,Interrupt Processor Targets Register 34"
|
|
rgroup.long 0x88C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR35,Interrupt Processor Targets Register 35"
|
|
rgroup.long 0x890++0x03
|
|
line.long 0x00 "GICD_ITARGETSR36,Interrupt Processor Targets Register 36"
|
|
rgroup.long 0x894++0x03
|
|
line.long 0x00 "GICD_ITARGETSR37,Interrupt Processor Targets Register 37"
|
|
rgroup.long 0x898++0x03
|
|
line.long 0x00 "GICD_ITARGETSR38,Interrupt Processor Targets Register 38"
|
|
rgroup.long 0x89C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR39,Interrupt Processor Targets Register 39"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x05)
|
|
group.long 0x8A0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR40,Interrupt Processor Targets Register 40"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO163 ,CPU Targets Byte Offset 163 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO162 ,CPU Targets Byte Offset 162 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO161 ,CPU Targets Byte Offset 161 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO160 ,CPU Targets Byte Offset 160 "
|
|
group.long 0x8A4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR41,Interrupt Processor Targets Register 41"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO167 ,CPU Targets Byte Offset 167 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO166 ,CPU Targets Byte Offset 166 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO165 ,CPU Targets Byte Offset 165 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO164 ,CPU Targets Byte Offset 164 "
|
|
group.long 0x8A8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR42,Interrupt Processor Targets Register 42"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO171 ,CPU Targets Byte Offset 171 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO170 ,CPU Targets Byte Offset 170 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO169 ,CPU Targets Byte Offset 169 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO168 ,CPU Targets Byte Offset 168 "
|
|
group.long 0x8AC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR43,Interrupt Processor Targets Register 43"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO175 ,CPU Targets Byte Offset 175 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO174 ,CPU Targets Byte Offset 174 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO173 ,CPU Targets Byte Offset 173 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO172 ,CPU Targets Byte Offset 172 "
|
|
group.long 0x8B0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR44,Interrupt Processor Targets Register 44"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO179 ,CPU Targets Byte Offset 179 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO178 ,CPU Targets Byte Offset 178 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO177 ,CPU Targets Byte Offset 177 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO176 ,CPU Targets Byte Offset 176 "
|
|
group.long 0x8B4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR45,Interrupt Processor Targets Register 45"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO183 ,CPU Targets Byte Offset 183 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO182 ,CPU Targets Byte Offset 182 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO181 ,CPU Targets Byte Offset 181 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO180 ,CPU Targets Byte Offset 180 "
|
|
group.long 0x8B8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR46,Interrupt Processor Targets Register 46"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO187 ,CPU Targets Byte Offset 187 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO186 ,CPU Targets Byte Offset 186 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO185 ,CPU Targets Byte Offset 185 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO184 ,CPU Targets Byte Offset 184 "
|
|
group.long 0x8BC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR47,Interrupt Processor Targets Register 47"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO191 ,CPU Targets Byte Offset 191 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO190 ,CPU Targets Byte Offset 190 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO189 ,CPU Targets Byte Offset 189 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO188 ,CPU Targets Byte Offset 188 "
|
|
else
|
|
rgroup.long 0x8A0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR40,Interrupt Processor Targets Register 40"
|
|
rgroup.long 0x8A4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR41,Interrupt Processor Targets Register 41"
|
|
rgroup.long 0x8A8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR42,Interrupt Processor Targets Register 42"
|
|
rgroup.long 0x8AC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR43,Interrupt Processor Targets Register 43"
|
|
rgroup.long 0x8B0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR44,Interrupt Processor Targets Register 44"
|
|
rgroup.long 0x8B4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR45,Interrupt Processor Targets Register 45"
|
|
rgroup.long 0x8B8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR46,Interrupt Processor Targets Register 46"
|
|
rgroup.long 0x8BC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR47,Interrupt Processor Targets Register 47"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x06)
|
|
group.long 0x8C0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR48,Interrupt Processor Targets Register 48"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO195 ,CPU Targets Byte Offset 195 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO194 ,CPU Targets Byte Offset 194 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO193 ,CPU Targets Byte Offset 193 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO192 ,CPU Targets Byte Offset 192 "
|
|
group.long 0x8C4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR49,Interrupt Processor Targets Register 49"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO199 ,CPU Targets Byte Offset 199 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO198 ,CPU Targets Byte Offset 198 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO197 ,CPU Targets Byte Offset 197 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO196 ,CPU Targets Byte Offset 196 "
|
|
group.long 0x8C8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR50,Interrupt Processor Targets Register 50"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO203 ,CPU Targets Byte Offset 203 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO202 ,CPU Targets Byte Offset 202 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO201 ,CPU Targets Byte Offset 201 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO200 ,CPU Targets Byte Offset 200 "
|
|
group.long 0x8CC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR51,Interrupt Processor Targets Register 51"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO207 ,CPU Targets Byte Offset 207 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO206 ,CPU Targets Byte Offset 206 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO205 ,CPU Targets Byte Offset 205 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO204 ,CPU Targets Byte Offset 204 "
|
|
group.long 0x8D0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR52,Interrupt Processor Targets Register 52"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO211 ,CPU Targets Byte Offset 211 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO210 ,CPU Targets Byte Offset 210 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO209 ,CPU Targets Byte Offset 209 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO208 ,CPU Targets Byte Offset 208 "
|
|
group.long 0x8D4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR53,Interrupt Processor Targets Register 53"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO215 ,CPU Targets Byte Offset 215 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO214 ,CPU Targets Byte Offset 214 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO213 ,CPU Targets Byte Offset 213 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO212 ,CPU Targets Byte Offset 212 "
|
|
group.long 0x8D8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR54,Interrupt Processor Targets Register 54"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO219 ,CPU Targets Byte Offset 219 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO218 ,CPU Targets Byte Offset 218 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO217 ,CPU Targets Byte Offset 217 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO216 ,CPU Targets Byte Offset 216 "
|
|
group.long 0x8DC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR55,Interrupt Processor Targets Register 55"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO223 ,CPU Targets Byte Offset 223 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO222 ,CPU Targets Byte Offset 222 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO221 ,CPU Targets Byte Offset 221 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO220 ,CPU Targets Byte Offset 220 "
|
|
else
|
|
rgroup.long 0x8C0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR48,Interrupt Processor Targets Register 48"
|
|
rgroup.long 0x8C4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR49,Interrupt Processor Targets Register 49"
|
|
rgroup.long 0x8C8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR50,Interrupt Processor Targets Register 50"
|
|
rgroup.long 0x8CC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR51,Interrupt Processor Targets Register 51"
|
|
rgroup.long 0x8D0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR52,Interrupt Processor Targets Register 52"
|
|
rgroup.long 0x8D4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR53,Interrupt Processor Targets Register 53"
|
|
rgroup.long 0x8D8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR54,Interrupt Processor Targets Register 54"
|
|
rgroup.long 0x8DC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR55,Interrupt Processor Targets Register 55"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x07)
|
|
group.long 0x8E0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR56,Interrupt Processor Targets Register 56"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO227 ,CPU Targets Byte Offset 227 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO226 ,CPU Targets Byte Offset 226 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO225 ,CPU Targets Byte Offset 225 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO224 ,CPU Targets Byte Offset 224 "
|
|
group.long 0x8E4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR57,Interrupt Processor Targets Register 57"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO231 ,CPU Targets Byte Offset 231 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO230 ,CPU Targets Byte Offset 230 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO229 ,CPU Targets Byte Offset 229 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO228 ,CPU Targets Byte Offset 228 "
|
|
group.long 0x8E8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR58,Interrupt Processor Targets Register 58"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO235 ,CPU Targets Byte Offset 235 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO234 ,CPU Targets Byte Offset 234 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO233 ,CPU Targets Byte Offset 233 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO232 ,CPU Targets Byte Offset 232 "
|
|
group.long 0x8EC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR59,Interrupt Processor Targets Register 59"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO239 ,CPU Targets Byte Offset 239 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO238 ,CPU Targets Byte Offset 238 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO237 ,CPU Targets Byte Offset 237 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO236 ,CPU Targets Byte Offset 236 "
|
|
group.long 0x8F0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR60,Interrupt Processor Targets Register 60"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO243 ,CPU Targets Byte Offset 243 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO242 ,CPU Targets Byte Offset 242 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO241 ,CPU Targets Byte Offset 241 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO240 ,CPU Targets Byte Offset 240 "
|
|
group.long 0x8F4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR61,Interrupt Processor Targets Register 61"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO247 ,CPU Targets Byte Offset 247 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO246 ,CPU Targets Byte Offset 246 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO245 ,CPU Targets Byte Offset 245 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO244 ,CPU Targets Byte Offset 244 "
|
|
group.long 0x8F8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR62,Interrupt Processor Targets Register 62"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO251 ,CPU Targets Byte Offset 251 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO250 ,CPU Targets Byte Offset 250 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO249 ,CPU Targets Byte Offset 249 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO248 ,CPU Targets Byte Offset 248 "
|
|
group.long 0x8FC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR63,Interrupt Processor Targets Register 63"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO255 ,CPU Targets Byte Offset 255 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO254 ,CPU Targets Byte Offset 254 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO253 ,CPU Targets Byte Offset 253 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO252 ,CPU Targets Byte Offset 252 "
|
|
else
|
|
rgroup.long 0x8E0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR56,Interrupt Processor Targets Register 56"
|
|
rgroup.long 0x8E4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR57,Interrupt Processor Targets Register 57"
|
|
rgroup.long 0x8E8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR58,Interrupt Processor Targets Register 58"
|
|
rgroup.long 0x8EC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR59,Interrupt Processor Targets Register 59"
|
|
rgroup.long 0x8F0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR60,Interrupt Processor Targets Register 60"
|
|
rgroup.long 0x8F4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR61,Interrupt Processor Targets Register 61"
|
|
rgroup.long 0x8F8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR62,Interrupt Processor Targets Register 62"
|
|
rgroup.long 0x8FC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR63,Interrupt Processor Targets Register 63"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x08)
|
|
group.long 0x900++0x03
|
|
line.long 0x00 "GICD_ITARGETSR64,Interrupt Processor Targets Register 64"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO259 ,CPU Targets Byte Offset 259 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO258 ,CPU Targets Byte Offset 258 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO257 ,CPU Targets Byte Offset 257 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO256 ,CPU Targets Byte Offset 256 "
|
|
group.long 0x904++0x03
|
|
line.long 0x00 "GICD_ITARGETSR65,Interrupt Processor Targets Register 65"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO263 ,CPU Targets Byte Offset 263 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO262 ,CPU Targets Byte Offset 262 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO261 ,CPU Targets Byte Offset 261 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO260 ,CPU Targets Byte Offset 260 "
|
|
group.long 0x908++0x03
|
|
line.long 0x00 "GICD_ITARGETSR66,Interrupt Processor Targets Register 66"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO267 ,CPU Targets Byte Offset 267 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO266 ,CPU Targets Byte Offset 266 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO265 ,CPU Targets Byte Offset 265 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO264 ,CPU Targets Byte Offset 264 "
|
|
group.long 0x90C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR67,Interrupt Processor Targets Register 67"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO271 ,CPU Targets Byte Offset 271 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO270 ,CPU Targets Byte Offset 270 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO269 ,CPU Targets Byte Offset 269 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO268 ,CPU Targets Byte Offset 268 "
|
|
group.long 0x910++0x03
|
|
line.long 0x00 "GICD_ITARGETSR68,Interrupt Processor Targets Register 68"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO275 ,CPU Targets Byte Offset 275 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO274 ,CPU Targets Byte Offset 274 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO273 ,CPU Targets Byte Offset 273 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO272 ,CPU Targets Byte Offset 272 "
|
|
group.long 0x914++0x03
|
|
line.long 0x00 "GICD_ITARGETSR69,Interrupt Processor Targets Register 69"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO279 ,CPU Targets Byte Offset 279 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO278 ,CPU Targets Byte Offset 278 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO277 ,CPU Targets Byte Offset 277 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO276 ,CPU Targets Byte Offset 276 "
|
|
group.long 0x918++0x03
|
|
line.long 0x00 "GICD_ITARGETSR70,Interrupt Processor Targets Register 70"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO283 ,CPU Targets Byte Offset 283 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO282 ,CPU Targets Byte Offset 282 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO281 ,CPU Targets Byte Offset 281 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO280 ,CPU Targets Byte Offset 280 "
|
|
group.long 0x91C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR71,Interrupt Processor Targets Register 71"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO287 ,CPU Targets Byte Offset 287 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO286 ,CPU Targets Byte Offset 286 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO285 ,CPU Targets Byte Offset 285 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO284 ,CPU Targets Byte Offset 284 "
|
|
else
|
|
rgroup.long 0x900++0x03
|
|
line.long 0x00 "GICD_ITARGETSR64,Interrupt Processor Targets Register 64"
|
|
rgroup.long 0x904++0x03
|
|
line.long 0x00 "GICD_ITARGETSR65,Interrupt Processor Targets Register 65"
|
|
rgroup.long 0x908++0x03
|
|
line.long 0x00 "GICD_ITARGETSR66,Interrupt Processor Targets Register 66"
|
|
rgroup.long 0x90C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR67,Interrupt Processor Targets Register 67"
|
|
rgroup.long 0x910++0x03
|
|
line.long 0x00 "GICD_ITARGETSR68,Interrupt Processor Targets Register 68"
|
|
rgroup.long 0x914++0x03
|
|
line.long 0x00 "GICD_ITARGETSR69,Interrupt Processor Targets Register 69"
|
|
rgroup.long 0x918++0x03
|
|
line.long 0x00 "GICD_ITARGETSR70,Interrupt Processor Targets Register 70"
|
|
rgroup.long 0x91C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR71,Interrupt Processor Targets Register 71"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x09)
|
|
group.long 0x920++0x03
|
|
line.long 0x00 "GICD_ITARGETSR72,Interrupt Processor Targets Register 72"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO291 ,CPU Targets Byte Offset 291 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO290 ,CPU Targets Byte Offset 290 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO289 ,CPU Targets Byte Offset 289 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO288 ,CPU Targets Byte Offset 288 "
|
|
group.long 0x924++0x03
|
|
line.long 0x00 "GICD_ITARGETSR73,Interrupt Processor Targets Register 73"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO295 ,CPU Targets Byte Offset 295 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO294 ,CPU Targets Byte Offset 294 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO293 ,CPU Targets Byte Offset 293 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO292 ,CPU Targets Byte Offset 292 "
|
|
group.long 0x928++0x03
|
|
line.long 0x00 "GICD_ITARGETSR74,Interrupt Processor Targets Register 74"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO299 ,CPU Targets Byte Offset 299 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO298 ,CPU Targets Byte Offset 298 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO297 ,CPU Targets Byte Offset 297 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO296 ,CPU Targets Byte Offset 296 "
|
|
group.long 0x92C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR75,Interrupt Processor Targets Register 75"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO303 ,CPU Targets Byte Offset 303 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO302 ,CPU Targets Byte Offset 302 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO301 ,CPU Targets Byte Offset 301 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO300 ,CPU Targets Byte Offset 300 "
|
|
group.long 0x930++0x03
|
|
line.long 0x00 "GICD_ITARGETSR76,Interrupt Processor Targets Register 76"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO307 ,CPU Targets Byte Offset 307 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO306 ,CPU Targets Byte Offset 306 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO305 ,CPU Targets Byte Offset 305 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO304 ,CPU Targets Byte Offset 304 "
|
|
group.long 0x934++0x03
|
|
line.long 0x00 "GICD_ITARGETSR77,Interrupt Processor Targets Register 77"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO311 ,CPU Targets Byte Offset 311 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO310 ,CPU Targets Byte Offset 310 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO309 ,CPU Targets Byte Offset 309 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO308 ,CPU Targets Byte Offset 308 "
|
|
group.long 0x938++0x03
|
|
line.long 0x00 "GICD_ITARGETSR78,Interrupt Processor Targets Register 78"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO315 ,CPU Targets Byte Offset 315 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO314 ,CPU Targets Byte Offset 314 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO313 ,CPU Targets Byte Offset 313 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO312 ,CPU Targets Byte Offset 312 "
|
|
group.long 0x93C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR79,Interrupt Processor Targets Register 79"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO319 ,CPU Targets Byte Offset 319 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO318 ,CPU Targets Byte Offset 318 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO317 ,CPU Targets Byte Offset 317 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO316 ,CPU Targets Byte Offset 316 "
|
|
else
|
|
rgroup.long 0x920++0x03
|
|
line.long 0x00 "GICD_ITARGETSR72,Interrupt Processor Targets Register 72"
|
|
rgroup.long 0x924++0x03
|
|
line.long 0x00 "GICD_ITARGETSR73,Interrupt Processor Targets Register 73"
|
|
rgroup.long 0x928++0x03
|
|
line.long 0x00 "GICD_ITARGETSR74,Interrupt Processor Targets Register 74"
|
|
rgroup.long 0x92C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR75,Interrupt Processor Targets Register 75"
|
|
rgroup.long 0x930++0x03
|
|
line.long 0x00 "GICD_ITARGETSR76,Interrupt Processor Targets Register 76"
|
|
rgroup.long 0x934++0x03
|
|
line.long 0x00 "GICD_ITARGETSR77,Interrupt Processor Targets Register 77"
|
|
rgroup.long 0x938++0x03
|
|
line.long 0x00 "GICD_ITARGETSR78,Interrupt Processor Targets Register 78"
|
|
rgroup.long 0x93C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR79,Interrupt Processor Targets Register 79"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0A)
|
|
group.long 0x940++0x03
|
|
line.long 0x00 "GICD_ITARGETSR80,Interrupt Processor Targets Register 80"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO323 ,CPU Targets Byte Offset 323 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO322 ,CPU Targets Byte Offset 322 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO321 ,CPU Targets Byte Offset 321 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO320 ,CPU Targets Byte Offset 320 "
|
|
group.long 0x944++0x03
|
|
line.long 0x00 "GICD_ITARGETSR81,Interrupt Processor Targets Register 81"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO327 ,CPU Targets Byte Offset 327 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO326 ,CPU Targets Byte Offset 326 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO325 ,CPU Targets Byte Offset 325 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO324 ,CPU Targets Byte Offset 324 "
|
|
group.long 0x948++0x03
|
|
line.long 0x00 "GICD_ITARGETSR82,Interrupt Processor Targets Register 82"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO331 ,CPU Targets Byte Offset 331 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO330 ,CPU Targets Byte Offset 330 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO329 ,CPU Targets Byte Offset 329 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO328 ,CPU Targets Byte Offset 328 "
|
|
group.long 0x94C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR83,Interrupt Processor Targets Register 83"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO335 ,CPU Targets Byte Offset 335 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO334 ,CPU Targets Byte Offset 334 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO333 ,CPU Targets Byte Offset 333 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO332 ,CPU Targets Byte Offset 332 "
|
|
group.long 0x950++0x03
|
|
line.long 0x00 "GICD_ITARGETSR84,Interrupt Processor Targets Register 84"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO339 ,CPU Targets Byte Offset 339 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO338 ,CPU Targets Byte Offset 338 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO337 ,CPU Targets Byte Offset 337 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO336 ,CPU Targets Byte Offset 336 "
|
|
group.long 0x954++0x03
|
|
line.long 0x00 "GICD_ITARGETSR85,Interrupt Processor Targets Register 85"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO343 ,CPU Targets Byte Offset 343 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO342 ,CPU Targets Byte Offset 342 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO341 ,CPU Targets Byte Offset 341 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO340 ,CPU Targets Byte Offset 340 "
|
|
group.long 0x958++0x03
|
|
line.long 0x00 "GICD_ITARGETSR86,Interrupt Processor Targets Register 86"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO347 ,CPU Targets Byte Offset 347 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO346 ,CPU Targets Byte Offset 346 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO345 ,CPU Targets Byte Offset 345 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO344 ,CPU Targets Byte Offset 344 "
|
|
group.long 0x95C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR87,Interrupt Processor Targets Register 87"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO351 ,CPU Targets Byte Offset 351 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO350 ,CPU Targets Byte Offset 350 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO349 ,CPU Targets Byte Offset 349 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO348 ,CPU Targets Byte Offset 348 "
|
|
else
|
|
rgroup.long 0x940++0x03
|
|
line.long 0x00 "GICD_ITARGETSR80,Interrupt Processor Targets Register 80"
|
|
rgroup.long 0x944++0x03
|
|
line.long 0x00 "GICD_ITARGETSR81,Interrupt Processor Targets Register 81"
|
|
rgroup.long 0x948++0x03
|
|
line.long 0x00 "GICD_ITARGETSR82,Interrupt Processor Targets Register 82"
|
|
rgroup.long 0x94C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR83,Interrupt Processor Targets Register 83"
|
|
rgroup.long 0x950++0x03
|
|
line.long 0x00 "GICD_ITARGETSR84,Interrupt Processor Targets Register 84"
|
|
rgroup.long 0x954++0x03
|
|
line.long 0x00 "GICD_ITARGETSR85,Interrupt Processor Targets Register 85"
|
|
rgroup.long 0x958++0x03
|
|
line.long 0x00 "GICD_ITARGETSR86,Interrupt Processor Targets Register 86"
|
|
rgroup.long 0x95C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR87,Interrupt Processor Targets Register 87"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0B)
|
|
group.long 0x960++0x03
|
|
line.long 0x00 "GICD_ITARGETSR88,Interrupt Processor Targets Register 88"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO355 ,CPU Targets Byte Offset 355 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO354 ,CPU Targets Byte Offset 354 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO353 ,CPU Targets Byte Offset 353 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO352 ,CPU Targets Byte Offset 352 "
|
|
group.long 0x964++0x03
|
|
line.long 0x00 "GICD_ITARGETSR89,Interrupt Processor Targets Register 89"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO359 ,CPU Targets Byte Offset 359 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO358 ,CPU Targets Byte Offset 358 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO357 ,CPU Targets Byte Offset 357 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO356 ,CPU Targets Byte Offset 356 "
|
|
group.long 0x968++0x03
|
|
line.long 0x00 "GICD_ITARGETSR90,Interrupt Processor Targets Register 90"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO363 ,CPU Targets Byte Offset 363 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO362 ,CPU Targets Byte Offset 362 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO361 ,CPU Targets Byte Offset 361 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO360 ,CPU Targets Byte Offset 360 "
|
|
group.long 0x96C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR91,Interrupt Processor Targets Register 91"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO367 ,CPU Targets Byte Offset 367 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO366 ,CPU Targets Byte Offset 366 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO365 ,CPU Targets Byte Offset 365 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO364 ,CPU Targets Byte Offset 364 "
|
|
group.long 0x970++0x03
|
|
line.long 0x00 "GICD_ITARGETSR92,Interrupt Processor Targets Register 92"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO371 ,CPU Targets Byte Offset 371 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO370 ,CPU Targets Byte Offset 370 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO369 ,CPU Targets Byte Offset 369 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO368 ,CPU Targets Byte Offset 368 "
|
|
group.long 0x974++0x03
|
|
line.long 0x00 "GICD_ITARGETSR93,Interrupt Processor Targets Register 93"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO375 ,CPU Targets Byte Offset 375 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO374 ,CPU Targets Byte Offset 374 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO373 ,CPU Targets Byte Offset 373 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO372 ,CPU Targets Byte Offset 372 "
|
|
group.long 0x978++0x03
|
|
line.long 0x00 "GICD_ITARGETSR94,Interrupt Processor Targets Register 94"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO379 ,CPU Targets Byte Offset 379 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO378 ,CPU Targets Byte Offset 378 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO377 ,CPU Targets Byte Offset 377 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO376 ,CPU Targets Byte Offset 376 "
|
|
group.long 0x97C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR95,Interrupt Processor Targets Register 95"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO383 ,CPU Targets Byte Offset 383 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO382 ,CPU Targets Byte Offset 382 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO381 ,CPU Targets Byte Offset 381 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO380 ,CPU Targets Byte Offset 380 "
|
|
else
|
|
rgroup.long 0x960++0x03
|
|
line.long 0x00 "GICD_ITARGETSR88,Interrupt Processor Targets Register 88"
|
|
rgroup.long 0x964++0x03
|
|
line.long 0x00 "GICD_ITARGETSR89,Interrupt Processor Targets Register 89"
|
|
rgroup.long 0x968++0x03
|
|
line.long 0x00 "GICD_ITARGETSR90,Interrupt Processor Targets Register 90"
|
|
rgroup.long 0x96C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR91,Interrupt Processor Targets Register 91"
|
|
rgroup.long 0x970++0x03
|
|
line.long 0x00 "GICD_ITARGETSR92,Interrupt Processor Targets Register 92"
|
|
rgroup.long 0x974++0x03
|
|
line.long 0x00 "GICD_ITARGETSR93,Interrupt Processor Targets Register 93"
|
|
rgroup.long 0x978++0x03
|
|
line.long 0x00 "GICD_ITARGETSR94,Interrupt Processor Targets Register 94"
|
|
rgroup.long 0x97C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR95,Interrupt Processor Targets Register 95"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0C)
|
|
group.long 0x980++0x03
|
|
line.long 0x00 "GICD_ITARGETSR96,Interrupt Processor Targets Register 96"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO387 ,CPU Targets Byte Offset 387 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO386 ,CPU Targets Byte Offset 386 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO385 ,CPU Targets Byte Offset 385 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO384 ,CPU Targets Byte Offset 384 "
|
|
group.long 0x984++0x03
|
|
line.long 0x00 "GICD_ITARGETSR97,Interrupt Processor Targets Register 97"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO391 ,CPU Targets Byte Offset 391 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO390 ,CPU Targets Byte Offset 390 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO389 ,CPU Targets Byte Offset 389 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO388 ,CPU Targets Byte Offset 388 "
|
|
group.long 0x988++0x03
|
|
line.long 0x00 "GICD_ITARGETSR98,Interrupt Processor Targets Register 98"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO395 ,CPU Targets Byte Offset 395 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO394 ,CPU Targets Byte Offset 394 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO393 ,CPU Targets Byte Offset 393 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO392 ,CPU Targets Byte Offset 392 "
|
|
group.long 0x98C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR99,Interrupt Processor Targets Register 99"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO399 ,CPU Targets Byte Offset 399 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO398 ,CPU Targets Byte Offset 398 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO397 ,CPU Targets Byte Offset 397 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO396 ,CPU Targets Byte Offset 396 "
|
|
group.long 0x990++0x03
|
|
line.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO403 ,CPU Targets Byte Offset 403 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO402 ,CPU Targets Byte Offset 402 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO401 ,CPU Targets Byte Offset 401 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO400 ,CPU Targets Byte Offset 400 "
|
|
group.long 0x994++0x03
|
|
line.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO407 ,CPU Targets Byte Offset 407 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO406 ,CPU Targets Byte Offset 406 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO405 ,CPU Targets Byte Offset 405 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO404 ,CPU Targets Byte Offset 404 "
|
|
group.long 0x998++0x03
|
|
line.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO411 ,CPU Targets Byte Offset 411 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO410 ,CPU Targets Byte Offset 410 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO409 ,CPU Targets Byte Offset 409 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO408 ,CPU Targets Byte Offset 408 "
|
|
group.long 0x99C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO415 ,CPU Targets Byte Offset 415 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO414 ,CPU Targets Byte Offset 414 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO413 ,CPU Targets Byte Offset 413 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO412 ,CPU Targets Byte Offset 412 "
|
|
else
|
|
rgroup.long 0x980++0x03
|
|
line.long 0x00 "GICD_ITARGETSR96,Interrupt Processor Targets Register 96"
|
|
rgroup.long 0x984++0x03
|
|
line.long 0x00 "GICD_ITARGETSR97,Interrupt Processor Targets Register 97"
|
|
rgroup.long 0x988++0x03
|
|
line.long 0x00 "GICD_ITARGETSR98,Interrupt Processor Targets Register 98"
|
|
rgroup.long 0x98C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR99,Interrupt Processor Targets Register 99"
|
|
rgroup.long 0x990++0x03
|
|
line.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100"
|
|
rgroup.long 0x994++0x03
|
|
line.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101"
|
|
rgroup.long 0x998++0x03
|
|
line.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102"
|
|
rgroup.long 0x99C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0D)
|
|
group.long 0x9A0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO419 ,CPU Targets Byte Offset 419 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO418 ,CPU Targets Byte Offset 418 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO417 ,CPU Targets Byte Offset 417 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO416 ,CPU Targets Byte Offset 416 "
|
|
group.long 0x9A4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO423 ,CPU Targets Byte Offset 423 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO422 ,CPU Targets Byte Offset 422 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO421 ,CPU Targets Byte Offset 421 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO420 ,CPU Targets Byte Offset 420 "
|
|
group.long 0x9A8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO427 ,CPU Targets Byte Offset 427 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO426 ,CPU Targets Byte Offset 426 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO425 ,CPU Targets Byte Offset 425 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO424 ,CPU Targets Byte Offset 424 "
|
|
group.long 0x9AC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO431 ,CPU Targets Byte Offset 431 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO430 ,CPU Targets Byte Offset 430 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO429 ,CPU Targets Byte Offset 429 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO428 ,CPU Targets Byte Offset 428 "
|
|
group.long 0x9B0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO435 ,CPU Targets Byte Offset 435 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO434 ,CPU Targets Byte Offset 434 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO433 ,CPU Targets Byte Offset 433 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO432 ,CPU Targets Byte Offset 432 "
|
|
group.long 0x9B4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO439 ,CPU Targets Byte Offset 439 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO438 ,CPU Targets Byte Offset 438 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO437 ,CPU Targets Byte Offset 437 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO436 ,CPU Targets Byte Offset 436 "
|
|
group.long 0x9B8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO443 ,CPU Targets Byte Offset 443 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO442 ,CPU Targets Byte Offset 442 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO441 ,CPU Targets Byte Offset 441 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO440 ,CPU Targets Byte Offset 440 "
|
|
group.long 0x9BC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO447 ,CPU Targets Byte Offset 447 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO446 ,CPU Targets Byte Offset 446 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO445 ,CPU Targets Byte Offset 445 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO444 ,CPU Targets Byte Offset 444 "
|
|
else
|
|
rgroup.long 0x9A0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104"
|
|
rgroup.long 0x9A4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105"
|
|
rgroup.long 0x9A8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106"
|
|
rgroup.long 0x9AC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107"
|
|
rgroup.long 0x9B0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108"
|
|
rgroup.long 0x9B4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109"
|
|
rgroup.long 0x9B8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110"
|
|
rgroup.long 0x9BC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0E)
|
|
group.long 0x9C0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO451 ,CPU Targets Byte Offset 451 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO450 ,CPU Targets Byte Offset 450 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO449 ,CPU Targets Byte Offset 449 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO448 ,CPU Targets Byte Offset 448 "
|
|
group.long 0x9C4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO455 ,CPU Targets Byte Offset 455 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO454 ,CPU Targets Byte Offset 454 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO453 ,CPU Targets Byte Offset 453 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO452 ,CPU Targets Byte Offset 452 "
|
|
group.long 0x9C8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO459 ,CPU Targets Byte Offset 459 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO458 ,CPU Targets Byte Offset 458 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO457 ,CPU Targets Byte Offset 457 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO456 ,CPU Targets Byte Offset 456 "
|
|
group.long 0x9CC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO463 ,CPU Targets Byte Offset 463 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO462 ,CPU Targets Byte Offset 462 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO461 ,CPU Targets Byte Offset 461 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO460 ,CPU Targets Byte Offset 460 "
|
|
group.long 0x9D0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO467 ,CPU Targets Byte Offset 467 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO466 ,CPU Targets Byte Offset 466 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO465 ,CPU Targets Byte Offset 465 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO464 ,CPU Targets Byte Offset 464 "
|
|
group.long 0x9D4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO471 ,CPU Targets Byte Offset 471 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO470 ,CPU Targets Byte Offset 470 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO469 ,CPU Targets Byte Offset 469 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO468 ,CPU Targets Byte Offset 468 "
|
|
group.long 0x9D8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO475 ,CPU Targets Byte Offset 475 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO474 ,CPU Targets Byte Offset 474 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO473 ,CPU Targets Byte Offset 473 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO472 ,CPU Targets Byte Offset 472 "
|
|
group.long 0x9DC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO479 ,CPU Targets Byte Offset 479 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO478 ,CPU Targets Byte Offset 478 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO477 ,CPU Targets Byte Offset 477 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO476 ,CPU Targets Byte Offset 476 "
|
|
else
|
|
rgroup.long 0x9C0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112"
|
|
rgroup.long 0x9C4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113"
|
|
rgroup.long 0x9C8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114"
|
|
rgroup.long 0x9CC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115"
|
|
rgroup.long 0x9D0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116"
|
|
rgroup.long 0x9D4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117"
|
|
rgroup.long 0x9D8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118"
|
|
rgroup.long 0x9DC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0F)
|
|
group.long 0x9E0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO483 ,CPU Targets Byte Offset 483 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO482 ,CPU Targets Byte Offset 482 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO481 ,CPU Targets Byte Offset 481 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO480 ,CPU Targets Byte Offset 480 "
|
|
group.long 0x9E4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO487 ,CPU Targets Byte Offset 487 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO486 ,CPU Targets Byte Offset 486 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO485 ,CPU Targets Byte Offset 485 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO484 ,CPU Targets Byte Offset 484 "
|
|
group.long 0x9E8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO491 ,CPU Targets Byte Offset 491 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO490 ,CPU Targets Byte Offset 490 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO489 ,CPU Targets Byte Offset 489 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO488 ,CPU Targets Byte Offset 488 "
|
|
group.long 0x9EC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO495 ,CPU Targets Byte Offset 495 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO494 ,CPU Targets Byte Offset 494 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO493 ,CPU Targets Byte Offset 493 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO492 ,CPU Targets Byte Offset 492 "
|
|
group.long 0x9F0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO499 ,CPU Targets Byte Offset 499 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO498 ,CPU Targets Byte Offset 498 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO497 ,CPU Targets Byte Offset 497 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO496 ,CPU Targets Byte Offset 496 "
|
|
group.long 0x9F4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO503 ,CPU Targets Byte Offset 503 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO502 ,CPU Targets Byte Offset 502 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO501 ,CPU Targets Byte Offset 501 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO500 ,CPU Targets Byte Offset 500 "
|
|
group.long 0x9F8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO507 ,CPU Targets Byte Offset 507 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO506 ,CPU Targets Byte Offset 506 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO505 ,CPU Targets Byte Offset 505 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO504 ,CPU Targets Byte Offset 504 "
|
|
group.long 0x9FC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO511 ,CPU Targets Byte Offset 511 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO510 ,CPU Targets Byte Offset 510 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO509 ,CPU Targets Byte Offset 509 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO508 ,CPU Targets Byte Offset 508 "
|
|
else
|
|
rgroup.long 0x9E0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120"
|
|
rgroup.long 0x9E4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121"
|
|
rgroup.long 0x9E8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122"
|
|
rgroup.long 0x9EC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123"
|
|
rgroup.long 0x9F0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124"
|
|
rgroup.long 0x9F4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125"
|
|
rgroup.long 0x9F8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126"
|
|
rgroup.long 0x9FC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x10)
|
|
group.long 0xA00++0x03
|
|
line.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO515 ,CPU Targets Byte Offset 515 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO514 ,CPU Targets Byte Offset 514 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO513 ,CPU Targets Byte Offset 513 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO512 ,CPU Targets Byte Offset 512 "
|
|
group.long 0xA04++0x03
|
|
line.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO519 ,CPU Targets Byte Offset 519 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO518 ,CPU Targets Byte Offset 518 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO517 ,CPU Targets Byte Offset 517 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO516 ,CPU Targets Byte Offset 516 "
|
|
group.long 0xA08++0x03
|
|
line.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO523 ,CPU Targets Byte Offset 523 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO522 ,CPU Targets Byte Offset 522 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO521 ,CPU Targets Byte Offset 521 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO520 ,CPU Targets Byte Offset 520 "
|
|
group.long 0xA0C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO527 ,CPU Targets Byte Offset 527 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO526 ,CPU Targets Byte Offset 526 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO525 ,CPU Targets Byte Offset 525 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO524 ,CPU Targets Byte Offset 524 "
|
|
group.long 0xA10++0x03
|
|
line.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO531 ,CPU Targets Byte Offset 531 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO530 ,CPU Targets Byte Offset 530 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO529 ,CPU Targets Byte Offset 529 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO528 ,CPU Targets Byte Offset 528 "
|
|
group.long 0xA14++0x03
|
|
line.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO535 ,CPU Targets Byte Offset 535 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO534 ,CPU Targets Byte Offset 534 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO533 ,CPU Targets Byte Offset 533 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO532 ,CPU Targets Byte Offset 532 "
|
|
group.long 0xA18++0x03
|
|
line.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO539 ,CPU Targets Byte Offset 539 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO538 ,CPU Targets Byte Offset 538 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO537 ,CPU Targets Byte Offset 537 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO536 ,CPU Targets Byte Offset 536 "
|
|
group.long 0xA1C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO543 ,CPU Targets Byte Offset 543 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO542 ,CPU Targets Byte Offset 542 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO541 ,CPU Targets Byte Offset 541 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO540 ,CPU Targets Byte Offset 540 "
|
|
else
|
|
rgroup.long 0xA00++0x03
|
|
line.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128"
|
|
rgroup.long 0xA04++0x03
|
|
line.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129"
|
|
rgroup.long 0xA08++0x03
|
|
line.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130"
|
|
rgroup.long 0xA0C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131"
|
|
rgroup.long 0xA10++0x03
|
|
line.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132"
|
|
rgroup.long 0xA14++0x03
|
|
line.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133"
|
|
rgroup.long 0xA18++0x03
|
|
line.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134"
|
|
rgroup.long 0xA1C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x11)
|
|
group.long 0xA20++0x03
|
|
line.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO547 ,CPU Targets Byte Offset 547 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO546 ,CPU Targets Byte Offset 546 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO545 ,CPU Targets Byte Offset 545 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO544 ,CPU Targets Byte Offset 544 "
|
|
group.long 0xA24++0x03
|
|
line.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO551 ,CPU Targets Byte Offset 551 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO550 ,CPU Targets Byte Offset 550 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO549 ,CPU Targets Byte Offset 549 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO548 ,CPU Targets Byte Offset 548 "
|
|
group.long 0xA28++0x03
|
|
line.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO555 ,CPU Targets Byte Offset 555 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO554 ,CPU Targets Byte Offset 554 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO553 ,CPU Targets Byte Offset 553 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO552 ,CPU Targets Byte Offset 552 "
|
|
group.long 0xA2C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO559 ,CPU Targets Byte Offset 559 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO558 ,CPU Targets Byte Offset 558 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO557 ,CPU Targets Byte Offset 557 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO556 ,CPU Targets Byte Offset 556 "
|
|
group.long 0xA30++0x03
|
|
line.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO563 ,CPU Targets Byte Offset 563 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO562 ,CPU Targets Byte Offset 562 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO561 ,CPU Targets Byte Offset 561 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO560 ,CPU Targets Byte Offset 560 "
|
|
group.long 0xA34++0x03
|
|
line.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO567 ,CPU Targets Byte Offset 567 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO566 ,CPU Targets Byte Offset 566 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO565 ,CPU Targets Byte Offset 565 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO564 ,CPU Targets Byte Offset 564 "
|
|
group.long 0xA38++0x03
|
|
line.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO571 ,CPU Targets Byte Offset 571 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO570 ,CPU Targets Byte Offset 570 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO569 ,CPU Targets Byte Offset 569 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO568 ,CPU Targets Byte Offset 568 "
|
|
group.long 0xA3C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO575 ,CPU Targets Byte Offset 575 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO574 ,CPU Targets Byte Offset 574 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO573 ,CPU Targets Byte Offset 573 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO572 ,CPU Targets Byte Offset 572 "
|
|
else
|
|
rgroup.long 0xA20++0x03
|
|
line.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136"
|
|
rgroup.long 0xA24++0x03
|
|
line.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137"
|
|
rgroup.long 0xA28++0x03
|
|
line.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138"
|
|
rgroup.long 0xA2C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139"
|
|
rgroup.long 0xA30++0x03
|
|
line.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140"
|
|
rgroup.long 0xA34++0x03
|
|
line.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141"
|
|
rgroup.long 0xA38++0x03
|
|
line.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142"
|
|
rgroup.long 0xA3C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x12)
|
|
group.long 0xA40++0x03
|
|
line.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO579 ,CPU Targets Byte Offset 579 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO578 ,CPU Targets Byte Offset 578 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO577 ,CPU Targets Byte Offset 577 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO576 ,CPU Targets Byte Offset 576 "
|
|
group.long 0xA44++0x03
|
|
line.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO583 ,CPU Targets Byte Offset 583 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO582 ,CPU Targets Byte Offset 582 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO581 ,CPU Targets Byte Offset 581 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO580 ,CPU Targets Byte Offset 580 "
|
|
group.long 0xA48++0x03
|
|
line.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO587 ,CPU Targets Byte Offset 587 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO586 ,CPU Targets Byte Offset 586 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO585 ,CPU Targets Byte Offset 585 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO584 ,CPU Targets Byte Offset 584 "
|
|
group.long 0xA4C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO591 ,CPU Targets Byte Offset 591 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO590 ,CPU Targets Byte Offset 590 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO589 ,CPU Targets Byte Offset 589 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO588 ,CPU Targets Byte Offset 588 "
|
|
group.long 0xA50++0x03
|
|
line.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO595 ,CPU Targets Byte Offset 595 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO594 ,CPU Targets Byte Offset 594 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO593 ,CPU Targets Byte Offset 593 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO592 ,CPU Targets Byte Offset 592 "
|
|
group.long 0xA54++0x03
|
|
line.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO599 ,CPU Targets Byte Offset 599 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO598 ,CPU Targets Byte Offset 598 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO597 ,CPU Targets Byte Offset 597 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO596 ,CPU Targets Byte Offset 596 "
|
|
group.long 0xA58++0x03
|
|
line.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO603 ,CPU Targets Byte Offset 603 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO602 ,CPU Targets Byte Offset 602 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO601 ,CPU Targets Byte Offset 601 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO600 ,CPU Targets Byte Offset 600 "
|
|
group.long 0xA5C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO607 ,CPU Targets Byte Offset 607 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO606 ,CPU Targets Byte Offset 606 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO605 ,CPU Targets Byte Offset 605 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO604 ,CPU Targets Byte Offset 604 "
|
|
else
|
|
rgroup.long 0xA40++0x03
|
|
line.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144"
|
|
rgroup.long 0xA44++0x03
|
|
line.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145"
|
|
rgroup.long 0xA48++0x03
|
|
line.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146"
|
|
rgroup.long 0xA4C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147"
|
|
rgroup.long 0xA50++0x03
|
|
line.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148"
|
|
rgroup.long 0xA54++0x03
|
|
line.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149"
|
|
rgroup.long 0xA58++0x03
|
|
line.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150"
|
|
rgroup.long 0xA5C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x13)
|
|
group.long 0xA60++0x03
|
|
line.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO611 ,CPU Targets Byte Offset 611 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO610 ,CPU Targets Byte Offset 610 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO609 ,CPU Targets Byte Offset 609 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO608 ,CPU Targets Byte Offset 608 "
|
|
group.long 0xA64++0x03
|
|
line.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO615 ,CPU Targets Byte Offset 615 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO614 ,CPU Targets Byte Offset 614 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO613 ,CPU Targets Byte Offset 613 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO612 ,CPU Targets Byte Offset 612 "
|
|
group.long 0xA68++0x03
|
|
line.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO619 ,CPU Targets Byte Offset 619 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO618 ,CPU Targets Byte Offset 618 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO617 ,CPU Targets Byte Offset 617 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO616 ,CPU Targets Byte Offset 616 "
|
|
group.long 0xA6C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO623 ,CPU Targets Byte Offset 623 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO622 ,CPU Targets Byte Offset 622 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO621 ,CPU Targets Byte Offset 621 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO620 ,CPU Targets Byte Offset 620 "
|
|
group.long 0xA70++0x03
|
|
line.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO627 ,CPU Targets Byte Offset 627 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO626 ,CPU Targets Byte Offset 626 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO625 ,CPU Targets Byte Offset 625 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO624 ,CPU Targets Byte Offset 624 "
|
|
group.long 0xA74++0x03
|
|
line.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO631 ,CPU Targets Byte Offset 631 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO630 ,CPU Targets Byte Offset 630 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO629 ,CPU Targets Byte Offset 629 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO628 ,CPU Targets Byte Offset 628 "
|
|
group.long 0xA78++0x03
|
|
line.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO635 ,CPU Targets Byte Offset 635 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO634 ,CPU Targets Byte Offset 634 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO633 ,CPU Targets Byte Offset 633 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO632 ,CPU Targets Byte Offset 632 "
|
|
group.long 0xA7C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO639 ,CPU Targets Byte Offset 639 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO638 ,CPU Targets Byte Offset 638 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO637 ,CPU Targets Byte Offset 637 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO636 ,CPU Targets Byte Offset 636 "
|
|
else
|
|
rgroup.long 0xA60++0x03
|
|
line.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152"
|
|
rgroup.long 0xA64++0x03
|
|
line.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153"
|
|
rgroup.long 0xA68++0x03
|
|
line.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154"
|
|
rgroup.long 0xA6C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155"
|
|
rgroup.long 0xA70++0x03
|
|
line.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156"
|
|
rgroup.long 0xA74++0x03
|
|
line.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157"
|
|
rgroup.long 0xA78++0x03
|
|
line.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158"
|
|
rgroup.long 0xA7C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x14)
|
|
group.long 0xA80++0x03
|
|
line.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO643 ,CPU Targets Byte Offset 643 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO642 ,CPU Targets Byte Offset 642 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO641 ,CPU Targets Byte Offset 641 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO640 ,CPU Targets Byte Offset 640 "
|
|
group.long 0xA84++0x03
|
|
line.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO647 ,CPU Targets Byte Offset 647 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO646 ,CPU Targets Byte Offset 646 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO645 ,CPU Targets Byte Offset 645 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO644 ,CPU Targets Byte Offset 644 "
|
|
group.long 0xA88++0x03
|
|
line.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO651 ,CPU Targets Byte Offset 651 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO650 ,CPU Targets Byte Offset 650 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO649 ,CPU Targets Byte Offset 649 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO648 ,CPU Targets Byte Offset 648 "
|
|
group.long 0xA8C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO655 ,CPU Targets Byte Offset 655 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO654 ,CPU Targets Byte Offset 654 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO653 ,CPU Targets Byte Offset 653 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO652 ,CPU Targets Byte Offset 652 "
|
|
group.long 0xA90++0x03
|
|
line.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO659 ,CPU Targets Byte Offset 659 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO658 ,CPU Targets Byte Offset 658 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO657 ,CPU Targets Byte Offset 657 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO656 ,CPU Targets Byte Offset 656 "
|
|
group.long 0xA94++0x03
|
|
line.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO663 ,CPU Targets Byte Offset 663 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO662 ,CPU Targets Byte Offset 662 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO661 ,CPU Targets Byte Offset 661 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO660 ,CPU Targets Byte Offset 660 "
|
|
group.long 0xA98++0x03
|
|
line.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO667 ,CPU Targets Byte Offset 667 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO666 ,CPU Targets Byte Offset 666 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO665 ,CPU Targets Byte Offset 665 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO664 ,CPU Targets Byte Offset 664 "
|
|
group.long 0xA9C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO671 ,CPU Targets Byte Offset 671 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO670 ,CPU Targets Byte Offset 670 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO669 ,CPU Targets Byte Offset 669 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO668 ,CPU Targets Byte Offset 668 "
|
|
else
|
|
rgroup.long 0xA80++0x03
|
|
line.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160"
|
|
rgroup.long 0xA84++0x03
|
|
line.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161"
|
|
rgroup.long 0xA88++0x03
|
|
line.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162"
|
|
rgroup.long 0xA8C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163"
|
|
rgroup.long 0xA90++0x03
|
|
line.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164"
|
|
rgroup.long 0xA94++0x03
|
|
line.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165"
|
|
rgroup.long 0xA98++0x03
|
|
line.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166"
|
|
rgroup.long 0xA9C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x15)
|
|
group.long 0xAA0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO675 ,CPU Targets Byte Offset 675 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO674 ,CPU Targets Byte Offset 674 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO673 ,CPU Targets Byte Offset 673 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO672 ,CPU Targets Byte Offset 672 "
|
|
group.long 0xAA4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO679 ,CPU Targets Byte Offset 679 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO678 ,CPU Targets Byte Offset 678 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO677 ,CPU Targets Byte Offset 677 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO676 ,CPU Targets Byte Offset 676 "
|
|
group.long 0xAA8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO683 ,CPU Targets Byte Offset 683 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO682 ,CPU Targets Byte Offset 682 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO681 ,CPU Targets Byte Offset 681 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO680 ,CPU Targets Byte Offset 680 "
|
|
group.long 0xAAC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO687 ,CPU Targets Byte Offset 687 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO686 ,CPU Targets Byte Offset 686 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO685 ,CPU Targets Byte Offset 685 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO684 ,CPU Targets Byte Offset 684 "
|
|
group.long 0xAB0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO691 ,CPU Targets Byte Offset 691 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO690 ,CPU Targets Byte Offset 690 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO689 ,CPU Targets Byte Offset 689 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO688 ,CPU Targets Byte Offset 688 "
|
|
group.long 0xAB4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO695 ,CPU Targets Byte Offset 695 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO694 ,CPU Targets Byte Offset 694 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO693 ,CPU Targets Byte Offset 693 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO692 ,CPU Targets Byte Offset 692 "
|
|
group.long 0xAB8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO699 ,CPU Targets Byte Offset 699 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO698 ,CPU Targets Byte Offset 698 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO697 ,CPU Targets Byte Offset 697 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO696 ,CPU Targets Byte Offset 696 "
|
|
group.long 0xABC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO703 ,CPU Targets Byte Offset 703 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO702 ,CPU Targets Byte Offset 702 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO701 ,CPU Targets Byte Offset 701 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO700 ,CPU Targets Byte Offset 700 "
|
|
else
|
|
rgroup.long 0xAA0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168"
|
|
rgroup.long 0xAA4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169"
|
|
rgroup.long 0xAA8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170"
|
|
rgroup.long 0xAAC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171"
|
|
rgroup.long 0xAB0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172"
|
|
rgroup.long 0xAB4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173"
|
|
rgroup.long 0xAB8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174"
|
|
rgroup.long 0xABC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x16)
|
|
group.long 0xAC0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO707 ,CPU Targets Byte Offset 707 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO706 ,CPU Targets Byte Offset 706 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO705 ,CPU Targets Byte Offset 705 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO704 ,CPU Targets Byte Offset 704 "
|
|
group.long 0xAC4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO711 ,CPU Targets Byte Offset 711 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO710 ,CPU Targets Byte Offset 710 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO709 ,CPU Targets Byte Offset 709 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO708 ,CPU Targets Byte Offset 708 "
|
|
group.long 0xAC8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO715 ,CPU Targets Byte Offset 715 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO714 ,CPU Targets Byte Offset 714 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO713 ,CPU Targets Byte Offset 713 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO712 ,CPU Targets Byte Offset 712 "
|
|
group.long 0xACC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO719 ,CPU Targets Byte Offset 719 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO718 ,CPU Targets Byte Offset 718 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO717 ,CPU Targets Byte Offset 717 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO716 ,CPU Targets Byte Offset 716 "
|
|
group.long 0xAD0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO723 ,CPU Targets Byte Offset 723 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO722 ,CPU Targets Byte Offset 722 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO721 ,CPU Targets Byte Offset 721 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO720 ,CPU Targets Byte Offset 720 "
|
|
group.long 0xAD4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO727 ,CPU Targets Byte Offset 727 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO726 ,CPU Targets Byte Offset 726 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO725 ,CPU Targets Byte Offset 725 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO724 ,CPU Targets Byte Offset 724 "
|
|
group.long 0xAD8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO731 ,CPU Targets Byte Offset 731 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO730 ,CPU Targets Byte Offset 730 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO729 ,CPU Targets Byte Offset 729 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO728 ,CPU Targets Byte Offset 728 "
|
|
group.long 0xADC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO735 ,CPU Targets Byte Offset 735 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO734 ,CPU Targets Byte Offset 734 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO733 ,CPU Targets Byte Offset 733 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO732 ,CPU Targets Byte Offset 732 "
|
|
else
|
|
rgroup.long 0xAC0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176"
|
|
rgroup.long 0xAC4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177"
|
|
rgroup.long 0xAC8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178"
|
|
rgroup.long 0xACC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179"
|
|
rgroup.long 0xAD0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180"
|
|
rgroup.long 0xAD4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181"
|
|
rgroup.long 0xAD8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182"
|
|
rgroup.long 0xADC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x17)
|
|
group.long 0xAE0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO739 ,CPU Targets Byte Offset 739 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO738 ,CPU Targets Byte Offset 738 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO737 ,CPU Targets Byte Offset 737 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO736 ,CPU Targets Byte Offset 736 "
|
|
group.long 0xAE4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO743 ,CPU Targets Byte Offset 743 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO742 ,CPU Targets Byte Offset 742 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO741 ,CPU Targets Byte Offset 741 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO740 ,CPU Targets Byte Offset 740 "
|
|
group.long 0xAE8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO747 ,CPU Targets Byte Offset 747 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO746 ,CPU Targets Byte Offset 746 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO745 ,CPU Targets Byte Offset 745 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO744 ,CPU Targets Byte Offset 744 "
|
|
group.long 0xAEC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO751 ,CPU Targets Byte Offset 751 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO750 ,CPU Targets Byte Offset 750 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO749 ,CPU Targets Byte Offset 749 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO748 ,CPU Targets Byte Offset 748 "
|
|
group.long 0xAF0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO755 ,CPU Targets Byte Offset 755 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO754 ,CPU Targets Byte Offset 754 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO753 ,CPU Targets Byte Offset 753 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO752 ,CPU Targets Byte Offset 752 "
|
|
group.long 0xAF4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO759 ,CPU Targets Byte Offset 759 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO758 ,CPU Targets Byte Offset 758 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO757 ,CPU Targets Byte Offset 757 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO756 ,CPU Targets Byte Offset 756 "
|
|
group.long 0xAF8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO763 ,CPU Targets Byte Offset 763 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO762 ,CPU Targets Byte Offset 762 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO761 ,CPU Targets Byte Offset 761 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO760 ,CPU Targets Byte Offset 760 "
|
|
group.long 0xAFC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO767 ,CPU Targets Byte Offset 767 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO766 ,CPU Targets Byte Offset 766 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO765 ,CPU Targets Byte Offset 765 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO764 ,CPU Targets Byte Offset 764 "
|
|
else
|
|
rgroup.long 0xAE0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184"
|
|
rgroup.long 0xAE4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185"
|
|
rgroup.long 0xAE8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186"
|
|
rgroup.long 0xAEC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187"
|
|
rgroup.long 0xAF0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188"
|
|
rgroup.long 0xAF4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189"
|
|
rgroup.long 0xAF8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190"
|
|
rgroup.long 0xAFC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x18)
|
|
group.long 0xB00++0x03
|
|
line.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO771 ,CPU Targets Byte Offset 771 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO770 ,CPU Targets Byte Offset 770 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO769 ,CPU Targets Byte Offset 769 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO768 ,CPU Targets Byte Offset 768 "
|
|
group.long 0xB04++0x03
|
|
line.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO775 ,CPU Targets Byte Offset 775 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO774 ,CPU Targets Byte Offset 774 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO773 ,CPU Targets Byte Offset 773 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO772 ,CPU Targets Byte Offset 772 "
|
|
group.long 0xB08++0x03
|
|
line.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO779 ,CPU Targets Byte Offset 779 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO778 ,CPU Targets Byte Offset 778 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO777 ,CPU Targets Byte Offset 777 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO776 ,CPU Targets Byte Offset 776 "
|
|
group.long 0xB0C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO783 ,CPU Targets Byte Offset 783 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO782 ,CPU Targets Byte Offset 782 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO781 ,CPU Targets Byte Offset 781 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO780 ,CPU Targets Byte Offset 780 "
|
|
group.long 0xB10++0x03
|
|
line.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO787 ,CPU Targets Byte Offset 787 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO786 ,CPU Targets Byte Offset 786 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO785 ,CPU Targets Byte Offset 785 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO784 ,CPU Targets Byte Offset 784 "
|
|
group.long 0xB14++0x03
|
|
line.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO791 ,CPU Targets Byte Offset 791 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO790 ,CPU Targets Byte Offset 790 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO789 ,CPU Targets Byte Offset 789 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO788 ,CPU Targets Byte Offset 788 "
|
|
group.long 0xB18++0x03
|
|
line.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO795 ,CPU Targets Byte Offset 795 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO794 ,CPU Targets Byte Offset 794 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO793 ,CPU Targets Byte Offset 793 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO792 ,CPU Targets Byte Offset 792 "
|
|
group.long 0xB1C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO799 ,CPU Targets Byte Offset 799 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO798 ,CPU Targets Byte Offset 798 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO797 ,CPU Targets Byte Offset 797 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO796 ,CPU Targets Byte Offset 796 "
|
|
else
|
|
rgroup.long 0xB00++0x03
|
|
line.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192"
|
|
rgroup.long 0xB04++0x03
|
|
line.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193"
|
|
rgroup.long 0xB08++0x03
|
|
line.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194"
|
|
rgroup.long 0xB0C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195"
|
|
rgroup.long 0xB10++0x03
|
|
line.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196"
|
|
rgroup.long 0xB14++0x03
|
|
line.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197"
|
|
rgroup.long 0xB18++0x03
|
|
line.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198"
|
|
rgroup.long 0xB1C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x19)
|
|
group.long 0xB20++0x03
|
|
line.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO803 ,CPU Targets Byte Offset 803 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO802 ,CPU Targets Byte Offset 802 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO801 ,CPU Targets Byte Offset 801 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO800 ,CPU Targets Byte Offset 800 "
|
|
group.long 0xB24++0x03
|
|
line.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO807 ,CPU Targets Byte Offset 807 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO806 ,CPU Targets Byte Offset 806 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO805 ,CPU Targets Byte Offset 805 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO804 ,CPU Targets Byte Offset 804 "
|
|
group.long 0xB28++0x03
|
|
line.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO811 ,CPU Targets Byte Offset 811 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO810 ,CPU Targets Byte Offset 810 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO809 ,CPU Targets Byte Offset 809 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO808 ,CPU Targets Byte Offset 808 "
|
|
group.long 0xB2C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO815 ,CPU Targets Byte Offset 815 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO814 ,CPU Targets Byte Offset 814 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO813 ,CPU Targets Byte Offset 813 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO812 ,CPU Targets Byte Offset 812 "
|
|
group.long 0xB30++0x03
|
|
line.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO819 ,CPU Targets Byte Offset 819 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO818 ,CPU Targets Byte Offset 818 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO817 ,CPU Targets Byte Offset 817 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO816 ,CPU Targets Byte Offset 816 "
|
|
group.long 0xB34++0x03
|
|
line.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO823 ,CPU Targets Byte Offset 823 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO822 ,CPU Targets Byte Offset 822 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO821 ,CPU Targets Byte Offset 821 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO820 ,CPU Targets Byte Offset 820 "
|
|
group.long 0xB38++0x03
|
|
line.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO827 ,CPU Targets Byte Offset 827 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO826 ,CPU Targets Byte Offset 826 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO825 ,CPU Targets Byte Offset 825 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO824 ,CPU Targets Byte Offset 824 "
|
|
group.long 0xB3C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO831 ,CPU Targets Byte Offset 831 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO830 ,CPU Targets Byte Offset 830 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO829 ,CPU Targets Byte Offset 829 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO828 ,CPU Targets Byte Offset 828 "
|
|
else
|
|
rgroup.long 0xB20++0x03
|
|
line.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200"
|
|
rgroup.long 0xB24++0x03
|
|
line.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201"
|
|
rgroup.long 0xB28++0x03
|
|
line.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202"
|
|
rgroup.long 0xB2C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203"
|
|
rgroup.long 0xB30++0x03
|
|
line.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204"
|
|
rgroup.long 0xB34++0x03
|
|
line.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205"
|
|
rgroup.long 0xB38++0x03
|
|
line.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206"
|
|
rgroup.long 0xB3C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1A)
|
|
group.long 0xB40++0x03
|
|
line.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO835 ,CPU Targets Byte Offset 835 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO834 ,CPU Targets Byte Offset 834 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO833 ,CPU Targets Byte Offset 833 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO832 ,CPU Targets Byte Offset 832 "
|
|
group.long 0xB44++0x03
|
|
line.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO839 ,CPU Targets Byte Offset 839 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO838 ,CPU Targets Byte Offset 838 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO837 ,CPU Targets Byte Offset 837 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO836 ,CPU Targets Byte Offset 836 "
|
|
group.long 0xB48++0x03
|
|
line.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO843 ,CPU Targets Byte Offset 843 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO842 ,CPU Targets Byte Offset 842 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO841 ,CPU Targets Byte Offset 841 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO840 ,CPU Targets Byte Offset 840 "
|
|
group.long 0xB4C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO847 ,CPU Targets Byte Offset 847 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO846 ,CPU Targets Byte Offset 846 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO845 ,CPU Targets Byte Offset 845 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO844 ,CPU Targets Byte Offset 844 "
|
|
group.long 0xB50++0x03
|
|
line.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO851 ,CPU Targets Byte Offset 851 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO850 ,CPU Targets Byte Offset 850 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO849 ,CPU Targets Byte Offset 849 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO848 ,CPU Targets Byte Offset 848 "
|
|
group.long 0xB54++0x03
|
|
line.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO855 ,CPU Targets Byte Offset 855 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO854 ,CPU Targets Byte Offset 854 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO853 ,CPU Targets Byte Offset 853 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO852 ,CPU Targets Byte Offset 852 "
|
|
group.long 0xB58++0x03
|
|
line.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO859 ,CPU Targets Byte Offset 859 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO858 ,CPU Targets Byte Offset 858 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO857 ,CPU Targets Byte Offset 857 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO856 ,CPU Targets Byte Offset 856 "
|
|
group.long 0xB5C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO863 ,CPU Targets Byte Offset 863 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO862 ,CPU Targets Byte Offset 862 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO861 ,CPU Targets Byte Offset 861 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO860 ,CPU Targets Byte Offset 860 "
|
|
else
|
|
rgroup.long 0xB40++0x03
|
|
line.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208"
|
|
rgroup.long 0xB44++0x03
|
|
line.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209"
|
|
rgroup.long 0xB48++0x03
|
|
line.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210"
|
|
rgroup.long 0xB4C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211"
|
|
rgroup.long 0xB50++0x03
|
|
line.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212"
|
|
rgroup.long 0xB54++0x03
|
|
line.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213"
|
|
rgroup.long 0xB58++0x03
|
|
line.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214"
|
|
rgroup.long 0xB5C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1B)
|
|
group.long 0xB60++0x03
|
|
line.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO867 ,CPU Targets Byte Offset 867 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO866 ,CPU Targets Byte Offset 866 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO865 ,CPU Targets Byte Offset 865 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO864 ,CPU Targets Byte Offset 864 "
|
|
group.long 0xB64++0x03
|
|
line.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO871 ,CPU Targets Byte Offset 871 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO870 ,CPU Targets Byte Offset 870 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO869 ,CPU Targets Byte Offset 869 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO868 ,CPU Targets Byte Offset 868 "
|
|
group.long 0xB68++0x03
|
|
line.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO875 ,CPU Targets Byte Offset 875 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO874 ,CPU Targets Byte Offset 874 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO873 ,CPU Targets Byte Offset 873 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO872 ,CPU Targets Byte Offset 872 "
|
|
group.long 0xB6C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO879 ,CPU Targets Byte Offset 879 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO878 ,CPU Targets Byte Offset 878 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO877 ,CPU Targets Byte Offset 877 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO876 ,CPU Targets Byte Offset 876 "
|
|
group.long 0xB70++0x03
|
|
line.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO883 ,CPU Targets Byte Offset 883 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO882 ,CPU Targets Byte Offset 882 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO881 ,CPU Targets Byte Offset 881 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO880 ,CPU Targets Byte Offset 880 "
|
|
group.long 0xB74++0x03
|
|
line.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO887 ,CPU Targets Byte Offset 887 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO886 ,CPU Targets Byte Offset 886 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO885 ,CPU Targets Byte Offset 885 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO884 ,CPU Targets Byte Offset 884 "
|
|
group.long 0xB78++0x03
|
|
line.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO891 ,CPU Targets Byte Offset 891 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO890 ,CPU Targets Byte Offset 890 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO889 ,CPU Targets Byte Offset 889 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO888 ,CPU Targets Byte Offset 888 "
|
|
group.long 0xB7C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO895 ,CPU Targets Byte Offset 895 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO894 ,CPU Targets Byte Offset 894 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO893 ,CPU Targets Byte Offset 893 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO892 ,CPU Targets Byte Offset 892 "
|
|
else
|
|
rgroup.long 0xB60++0x03
|
|
line.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216"
|
|
rgroup.long 0xB64++0x03
|
|
line.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217"
|
|
rgroup.long 0xB68++0x03
|
|
line.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218"
|
|
rgroup.long 0xB6C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219"
|
|
rgroup.long 0xB70++0x03
|
|
line.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220"
|
|
rgroup.long 0xB74++0x03
|
|
line.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221"
|
|
rgroup.long 0xB78++0x03
|
|
line.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222"
|
|
rgroup.long 0xB7C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1C)
|
|
group.long 0xB80++0x03
|
|
line.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO899 ,CPU Targets Byte Offset 899 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO898 ,CPU Targets Byte Offset 898 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO897 ,CPU Targets Byte Offset 897 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO896 ,CPU Targets Byte Offset 896 "
|
|
group.long 0xB84++0x03
|
|
line.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO903 ,CPU Targets Byte Offset 903 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO902 ,CPU Targets Byte Offset 902 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO901 ,CPU Targets Byte Offset 901 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO900 ,CPU Targets Byte Offset 900 "
|
|
group.long 0xB88++0x03
|
|
line.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO907 ,CPU Targets Byte Offset 907 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO906 ,CPU Targets Byte Offset 906 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO905 ,CPU Targets Byte Offset 905 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO904 ,CPU Targets Byte Offset 904 "
|
|
group.long 0xB8C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO911 ,CPU Targets Byte Offset 911 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO910 ,CPU Targets Byte Offset 910 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO909 ,CPU Targets Byte Offset 909 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO908 ,CPU Targets Byte Offset 908 "
|
|
group.long 0xB90++0x03
|
|
line.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO915 ,CPU Targets Byte Offset 915 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO914 ,CPU Targets Byte Offset 914 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO913 ,CPU Targets Byte Offset 913 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO912 ,CPU Targets Byte Offset 912 "
|
|
group.long 0xB94++0x03
|
|
line.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO919 ,CPU Targets Byte Offset 919 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO918 ,CPU Targets Byte Offset 918 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO917 ,CPU Targets Byte Offset 917 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO916 ,CPU Targets Byte Offset 916 "
|
|
group.long 0xB98++0x03
|
|
line.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO923 ,CPU Targets Byte Offset 923 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO922 ,CPU Targets Byte Offset 922 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO921 ,CPU Targets Byte Offset 921 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO920 ,CPU Targets Byte Offset 920 "
|
|
group.long 0xB9C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO927 ,CPU Targets Byte Offset 927 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO926 ,CPU Targets Byte Offset 926 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO925 ,CPU Targets Byte Offset 925 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO924 ,CPU Targets Byte Offset 924 "
|
|
else
|
|
rgroup.long 0xB80++0x03
|
|
line.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224"
|
|
rgroup.long 0xB84++0x03
|
|
line.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225"
|
|
rgroup.long 0xB88++0x03
|
|
line.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226"
|
|
rgroup.long 0xB8C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227"
|
|
rgroup.long 0xB90++0x03
|
|
line.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228"
|
|
rgroup.long 0xB94++0x03
|
|
line.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229"
|
|
rgroup.long 0xB98++0x03
|
|
line.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230"
|
|
rgroup.long 0xB9C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1D)
|
|
group.long 0xBA0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO931 ,CPU Targets Byte Offset 931 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO930 ,CPU Targets Byte Offset 930 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO929 ,CPU Targets Byte Offset 929 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO928 ,CPU Targets Byte Offset 928 "
|
|
group.long 0xBA4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO935 ,CPU Targets Byte Offset 935 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO934 ,CPU Targets Byte Offset 934 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO933 ,CPU Targets Byte Offset 933 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO932 ,CPU Targets Byte Offset 932 "
|
|
group.long 0xBA8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO939 ,CPU Targets Byte Offset 939 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO938 ,CPU Targets Byte Offset 938 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO937 ,CPU Targets Byte Offset 937 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO936 ,CPU Targets Byte Offset 936 "
|
|
group.long 0xBAC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO943 ,CPU Targets Byte Offset 943 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO942 ,CPU Targets Byte Offset 942 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO941 ,CPU Targets Byte Offset 941 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO940 ,CPU Targets Byte Offset 940 "
|
|
group.long 0xBB0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO947 ,CPU Targets Byte Offset 947 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO946 ,CPU Targets Byte Offset 946 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO945 ,CPU Targets Byte Offset 945 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO944 ,CPU Targets Byte Offset 944 "
|
|
group.long 0xBB4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO951 ,CPU Targets Byte Offset 951 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO950 ,CPU Targets Byte Offset 950 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO949 ,CPU Targets Byte Offset 949 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO948 ,CPU Targets Byte Offset 948 "
|
|
group.long 0xBB8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO955 ,CPU Targets Byte Offset 955 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO954 ,CPU Targets Byte Offset 954 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO953 ,CPU Targets Byte Offset 953 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO952 ,CPU Targets Byte Offset 952 "
|
|
group.long 0xBBC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO959 ,CPU Targets Byte Offset 959 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO958 ,CPU Targets Byte Offset 958 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO957 ,CPU Targets Byte Offset 957 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO956 ,CPU Targets Byte Offset 956 "
|
|
else
|
|
rgroup.long 0xBA0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232"
|
|
rgroup.long 0xBA4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233"
|
|
rgroup.long 0xBA8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234"
|
|
rgroup.long 0xBAC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235"
|
|
rgroup.long 0xBB0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236"
|
|
rgroup.long 0xBB4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237"
|
|
rgroup.long 0xBB8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238"
|
|
rgroup.long 0xBBC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1E)
|
|
group.long 0xBC0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO963 ,CPU Targets Byte Offset 963 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO962 ,CPU Targets Byte Offset 962 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO961 ,CPU Targets Byte Offset 961 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO960 ,CPU Targets Byte Offset 960 "
|
|
group.long 0xBC4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO967 ,CPU Targets Byte Offset 967 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO966 ,CPU Targets Byte Offset 966 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO965 ,CPU Targets Byte Offset 965 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO964 ,CPU Targets Byte Offset 964 "
|
|
group.long 0xBC8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO971 ,CPU Targets Byte Offset 971 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO970 ,CPU Targets Byte Offset 970 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO969 ,CPU Targets Byte Offset 969 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO968 ,CPU Targets Byte Offset 968 "
|
|
group.long 0xBCC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO975 ,CPU Targets Byte Offset 975 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO974 ,CPU Targets Byte Offset 974 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO973 ,CPU Targets Byte Offset 973 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO972 ,CPU Targets Byte Offset 972 "
|
|
group.long 0xBD0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO979 ,CPU Targets Byte Offset 979 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO978 ,CPU Targets Byte Offset 978 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO977 ,CPU Targets Byte Offset 977 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO976 ,CPU Targets Byte Offset 976 "
|
|
group.long 0xBD4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO983 ,CPU Targets Byte Offset 983 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO982 ,CPU Targets Byte Offset 982 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO981 ,CPU Targets Byte Offset 981 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO980 ,CPU Targets Byte Offset 980 "
|
|
group.long 0xBD8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO987 ,CPU Targets Byte Offset 987 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO986 ,CPU Targets Byte Offset 986 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO985 ,CPU Targets Byte Offset 985 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO984 ,CPU Targets Byte Offset 984 "
|
|
group.long 0xBDC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO991 ,CPU Targets Byte Offset 991 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO990 ,CPU Targets Byte Offset 990 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO989 ,CPU Targets Byte Offset 989 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO988 ,CPU Targets Byte Offset 988 "
|
|
else
|
|
rgroup.long 0xBC0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240"
|
|
rgroup.long 0xBC4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241"
|
|
rgroup.long 0xBC8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242"
|
|
rgroup.long 0xBCC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243"
|
|
rgroup.long 0xBD0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244"
|
|
rgroup.long 0xBD4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245"
|
|
rgroup.long 0xBD8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246"
|
|
rgroup.long 0xBDC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1F)
|
|
group.long 0xBE0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR248,Interrupt Processor Targets Register 248"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO995 ,CPU Targets Byte Offset 995 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO994 ,CPU Targets Byte Offset 994 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO993 ,CPU Targets Byte Offset 993 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO992 ,CPU Targets Byte Offset 992 "
|
|
group.long 0xBE4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR249,Interrupt Processor Targets Register 249"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO999 ,CPU Targets Byte Offset 999 "
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO998 ,CPU Targets Byte Offset 998 "
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO997 ,CPU Targets Byte Offset 997 "
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO996 ,CPU Targets Byte Offset 996 "
|
|
group.long 0xBE8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR250,Interrupt Processor Targets Register 250"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1003 ,CPU Targets Byte Offset 1003"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1002 ,CPU Targets Byte Offset 1002"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1001 ,CPU Targets Byte Offset 1001"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1000 ,CPU Targets Byte Offset 1000"
|
|
group.long 0xBEC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR251,Interrupt Processor Targets Register 251"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1007 ,CPU Targets Byte Offset 1007"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1006 ,CPU Targets Byte Offset 1006"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1005 ,CPU Targets Byte Offset 1005"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1004 ,CPU Targets Byte Offset 1004"
|
|
group.long 0xBF0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR252,Interrupt Processor Targets Register 252"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1011 ,CPU Targets Byte Offset 1011"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1010 ,CPU Targets Byte Offset 1010"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1009 ,CPU Targets Byte Offset 1009"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1008 ,CPU Targets Byte Offset 1008"
|
|
group.long 0xBF4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR253,Interrupt Processor Targets Register 253"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1015 ,CPU Targets Byte Offset 1015"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1014 ,CPU Targets Byte Offset 1014"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1013 ,CPU Targets Byte Offset 1013"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1012 ,CPU Targets Byte Offset 1012"
|
|
group.long 0xBF8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR254,Interrupt Processor Targets Register 254"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1019 ,CPU Targets Byte Offset 1019"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1018 ,CPU Targets Byte Offset 1018"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1017 ,CPU Targets Byte Offset 1017"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1016 ,CPU Targets Byte Offset 1016"
|
|
else
|
|
rgroup.long 0xBE0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR248,Interrupt Processor Targets Register 248"
|
|
rgroup.long 0xBE4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR249,Interrupt Processor Targets Register 249"
|
|
rgroup.long 0xBE8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR250,Interrupt Processor Targets Register 250"
|
|
rgroup.long 0xBEC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR251,Interrupt Processor Targets Register 251"
|
|
rgroup.long 0xBF0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR252,Interrupt Processor Targets Register 252"
|
|
rgroup.long 0xBF4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR253,Interrupt Processor Targets Register 253"
|
|
rgroup.long 0xBF8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR254,Interrupt Processor Targets Register 254"
|
|
endif
|
|
else
|
|
rgroup.long 0x800++0x03
|
|
line.long 0x00 "GICD_ITARGETSR0 ,Interrupt Processor Targets Register 0 "
|
|
rgroup.long 0x804++0x03
|
|
line.long 0x00 "GICD_ITARGETSR1 ,Interrupt Processor Targets Register 1 "
|
|
rgroup.long 0x808++0x03
|
|
line.long 0x00 "GICD_ITARGETSR2 ,Interrupt Processor Targets Register 2 "
|
|
rgroup.long 0x80C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR3 ,Interrupt Processor Targets Register 3 "
|
|
rgroup.long 0x810++0x03
|
|
line.long 0x00 "GICD_ITARGETSR4 ,Interrupt Processor Targets Register 4 "
|
|
rgroup.long 0x814++0x03
|
|
line.long 0x00 "GICD_ITARGETSR5 ,Interrupt Processor Targets Register 5 "
|
|
rgroup.long 0x818++0x03
|
|
line.long 0x00 "GICD_ITARGETSR6 ,Interrupt Processor Targets Register 6 "
|
|
rgroup.long 0x81C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR7 ,Interrupt Processor Targets Register 7 "
|
|
rgroup.long 0x820++0x03
|
|
line.long 0x00 "GICD_ITARGETSR8 ,Interrupt Processor Targets Register 8 "
|
|
rgroup.long 0x824++0x03
|
|
line.long 0x00 "GICD_ITARGETSR9 ,Interrupt Processor Targets Register 9 "
|
|
rgroup.long 0x828++0x03
|
|
line.long 0x00 "GICD_ITARGETSR10 ,Interrupt Processor Targets Register 10 "
|
|
rgroup.long 0x82C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR11 ,Interrupt Processor Targets Register 11 "
|
|
rgroup.long 0x830++0x03
|
|
line.long 0x00 "GICD_ITARGETSR12 ,Interrupt Processor Targets Register 12 "
|
|
rgroup.long 0x834++0x03
|
|
line.long 0x00 "GICD_ITARGETSR13 ,Interrupt Processor Targets Register 13 "
|
|
rgroup.long 0x838++0x03
|
|
line.long 0x00 "GICD_ITARGETSR14 ,Interrupt Processor Targets Register 14 "
|
|
rgroup.long 0x83C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR15 ,Interrupt Processor Targets Register 15 "
|
|
rgroup.long 0x840++0x03
|
|
line.long 0x00 "GICD_ITARGETSR16 ,Interrupt Processor Targets Register 16 "
|
|
rgroup.long 0x844++0x03
|
|
line.long 0x00 "GICD_ITARGETSR17 ,Interrupt Processor Targets Register 17 "
|
|
rgroup.long 0x848++0x03
|
|
line.long 0x00 "GICD_ITARGETSR18 ,Interrupt Processor Targets Register 18 "
|
|
rgroup.long 0x84C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR19 ,Interrupt Processor Targets Register 19 "
|
|
rgroup.long 0x850++0x03
|
|
line.long 0x00 "GICD_ITARGETSR20 ,Interrupt Processor Targets Register 20 "
|
|
rgroup.long 0x854++0x03
|
|
line.long 0x00 "GICD_ITARGETSR21 ,Interrupt Processor Targets Register 21 "
|
|
rgroup.long 0x858++0x03
|
|
line.long 0x00 "GICD_ITARGETSR22 ,Interrupt Processor Targets Register 22 "
|
|
rgroup.long 0x85C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR23 ,Interrupt Processor Targets Register 23 "
|
|
rgroup.long 0x860++0x03
|
|
line.long 0x00 "GICD_ITARGETSR24 ,Interrupt Processor Targets Register 24 "
|
|
rgroup.long 0x864++0x03
|
|
line.long 0x00 "GICD_ITARGETSR25 ,Interrupt Processor Targets Register 25 "
|
|
rgroup.long 0x868++0x03
|
|
line.long 0x00 "GICD_ITARGETSR26 ,Interrupt Processor Targets Register 26 "
|
|
rgroup.long 0x86C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR27 ,Interrupt Processor Targets Register 27 "
|
|
rgroup.long 0x870++0x03
|
|
line.long 0x00 "GICD_ITARGETSR28 ,Interrupt Processor Targets Register 28 "
|
|
rgroup.long 0x874++0x03
|
|
line.long 0x00 "GICD_ITARGETSR29 ,Interrupt Processor Targets Register 29 "
|
|
rgroup.long 0x878++0x03
|
|
line.long 0x00 "GICD_ITARGETSR30 ,Interrupt Processor Targets Register 30 "
|
|
rgroup.long 0x87C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR31 ,Interrupt Processor Targets Register 31 "
|
|
rgroup.long 0x880++0x03
|
|
line.long 0x00 "GICD_ITARGETSR32 ,Interrupt Processor Targets Register 32 "
|
|
rgroup.long 0x884++0x03
|
|
line.long 0x00 "GICD_ITARGETSR33 ,Interrupt Processor Targets Register 33 "
|
|
rgroup.long 0x888++0x03
|
|
line.long 0x00 "GICD_ITARGETSR34 ,Interrupt Processor Targets Register 34 "
|
|
rgroup.long 0x88C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR35 ,Interrupt Processor Targets Register 35 "
|
|
rgroup.long 0x890++0x03
|
|
line.long 0x00 "GICD_ITARGETSR36 ,Interrupt Processor Targets Register 36 "
|
|
rgroup.long 0x894++0x03
|
|
line.long 0x00 "GICD_ITARGETSR37 ,Interrupt Processor Targets Register 37 "
|
|
rgroup.long 0x898++0x03
|
|
line.long 0x00 "GICD_ITARGETSR38 ,Interrupt Processor Targets Register 38 "
|
|
rgroup.long 0x89C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR39 ,Interrupt Processor Targets Register 39 "
|
|
rgroup.long 0x8A0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR40 ,Interrupt Processor Targets Register 40 "
|
|
rgroup.long 0x8A4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR41 ,Interrupt Processor Targets Register 41 "
|
|
rgroup.long 0x8A8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR42 ,Interrupt Processor Targets Register 42 "
|
|
rgroup.long 0x8AC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR43 ,Interrupt Processor Targets Register 43 "
|
|
rgroup.long 0x8B0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR44 ,Interrupt Processor Targets Register 44 "
|
|
rgroup.long 0x8B4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR45 ,Interrupt Processor Targets Register 45 "
|
|
rgroup.long 0x8B8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR46 ,Interrupt Processor Targets Register 46 "
|
|
rgroup.long 0x8BC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR47 ,Interrupt Processor Targets Register 47 "
|
|
rgroup.long 0x8C0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR48 ,Interrupt Processor Targets Register 48 "
|
|
rgroup.long 0x8C4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR49 ,Interrupt Processor Targets Register 49 "
|
|
rgroup.long 0x8C8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR50 ,Interrupt Processor Targets Register 50 "
|
|
rgroup.long 0x8CC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR51 ,Interrupt Processor Targets Register 51 "
|
|
rgroup.long 0x8D0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR52 ,Interrupt Processor Targets Register 52 "
|
|
rgroup.long 0x8D4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR53 ,Interrupt Processor Targets Register 53 "
|
|
rgroup.long 0x8D8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR54 ,Interrupt Processor Targets Register 54 "
|
|
rgroup.long 0x8DC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR55 ,Interrupt Processor Targets Register 55 "
|
|
rgroup.long 0x8E0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR56 ,Interrupt Processor Targets Register 56 "
|
|
rgroup.long 0x8E4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR57 ,Interrupt Processor Targets Register 57 "
|
|
rgroup.long 0x8E8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR58 ,Interrupt Processor Targets Register 58 "
|
|
rgroup.long 0x8EC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR59 ,Interrupt Processor Targets Register 59 "
|
|
rgroup.long 0x8F0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR60 ,Interrupt Processor Targets Register 60 "
|
|
rgroup.long 0x8F4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR61 ,Interrupt Processor Targets Register 61 "
|
|
rgroup.long 0x8F8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR62 ,Interrupt Processor Targets Register 62 "
|
|
rgroup.long 0x8FC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR63 ,Interrupt Processor Targets Register 63 "
|
|
rgroup.long 0x900++0x03
|
|
line.long 0x00 "GICD_ITARGETSR64 ,Interrupt Processor Targets Register 64 "
|
|
rgroup.long 0x904++0x03
|
|
line.long 0x00 "GICD_ITARGETSR65 ,Interrupt Processor Targets Register 65 "
|
|
rgroup.long 0x908++0x03
|
|
line.long 0x00 "GICD_ITARGETSR66 ,Interrupt Processor Targets Register 66 "
|
|
rgroup.long 0x90C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR67 ,Interrupt Processor Targets Register 67 "
|
|
rgroup.long 0x910++0x03
|
|
line.long 0x00 "GICD_ITARGETSR68 ,Interrupt Processor Targets Register 68 "
|
|
rgroup.long 0x914++0x03
|
|
line.long 0x00 "GICD_ITARGETSR69 ,Interrupt Processor Targets Register 69 "
|
|
rgroup.long 0x918++0x03
|
|
line.long 0x00 "GICD_ITARGETSR70 ,Interrupt Processor Targets Register 70 "
|
|
rgroup.long 0x91C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR71 ,Interrupt Processor Targets Register 71 "
|
|
rgroup.long 0x920++0x03
|
|
line.long 0x00 "GICD_ITARGETSR72 ,Interrupt Processor Targets Register 72 "
|
|
rgroup.long 0x924++0x03
|
|
line.long 0x00 "GICD_ITARGETSR73 ,Interrupt Processor Targets Register 73 "
|
|
rgroup.long 0x928++0x03
|
|
line.long 0x00 "GICD_ITARGETSR74 ,Interrupt Processor Targets Register 74 "
|
|
rgroup.long 0x92C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR75 ,Interrupt Processor Targets Register 75 "
|
|
rgroup.long 0x930++0x03
|
|
line.long 0x00 "GICD_ITARGETSR76 ,Interrupt Processor Targets Register 76 "
|
|
rgroup.long 0x934++0x03
|
|
line.long 0x00 "GICD_ITARGETSR77 ,Interrupt Processor Targets Register 77 "
|
|
rgroup.long 0x938++0x03
|
|
line.long 0x00 "GICD_ITARGETSR78 ,Interrupt Processor Targets Register 78 "
|
|
rgroup.long 0x93C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR79 ,Interrupt Processor Targets Register 79 "
|
|
rgroup.long 0x940++0x03
|
|
line.long 0x00 "GICD_ITARGETSR80 ,Interrupt Processor Targets Register 80 "
|
|
rgroup.long 0x944++0x03
|
|
line.long 0x00 "GICD_ITARGETSR81 ,Interrupt Processor Targets Register 81 "
|
|
rgroup.long 0x948++0x03
|
|
line.long 0x00 "GICD_ITARGETSR82 ,Interrupt Processor Targets Register 82 "
|
|
rgroup.long 0x94C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR83 ,Interrupt Processor Targets Register 83 "
|
|
rgroup.long 0x950++0x03
|
|
line.long 0x00 "GICD_ITARGETSR84 ,Interrupt Processor Targets Register 84 "
|
|
rgroup.long 0x954++0x03
|
|
line.long 0x00 "GICD_ITARGETSR85 ,Interrupt Processor Targets Register 85 "
|
|
rgroup.long 0x958++0x03
|
|
line.long 0x00 "GICD_ITARGETSR86 ,Interrupt Processor Targets Register 86 "
|
|
rgroup.long 0x95C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR87 ,Interrupt Processor Targets Register 87 "
|
|
rgroup.long 0x960++0x03
|
|
line.long 0x00 "GICD_ITARGETSR88 ,Interrupt Processor Targets Register 88 "
|
|
rgroup.long 0x964++0x03
|
|
line.long 0x00 "GICD_ITARGETSR89 ,Interrupt Processor Targets Register 89 "
|
|
rgroup.long 0x968++0x03
|
|
line.long 0x00 "GICD_ITARGETSR90 ,Interrupt Processor Targets Register 90 "
|
|
rgroup.long 0x96C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR91 ,Interrupt Processor Targets Register 91 "
|
|
rgroup.long 0x970++0x03
|
|
line.long 0x00 "GICD_ITARGETSR92 ,Interrupt Processor Targets Register 92 "
|
|
rgroup.long 0x974++0x03
|
|
line.long 0x00 "GICD_ITARGETSR93 ,Interrupt Processor Targets Register 93 "
|
|
rgroup.long 0x978++0x03
|
|
line.long 0x00 "GICD_ITARGETSR94 ,Interrupt Processor Targets Register 94 "
|
|
rgroup.long 0x97C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR95 ,Interrupt Processor Targets Register 95 "
|
|
rgroup.long 0x980++0x03
|
|
line.long 0x00 "GICD_ITARGETSR96 ,Interrupt Processor Targets Register 96 "
|
|
rgroup.long 0x984++0x03
|
|
line.long 0x00 "GICD_ITARGETSR97 ,Interrupt Processor Targets Register 97 "
|
|
rgroup.long 0x988++0x03
|
|
line.long 0x00 "GICD_ITARGETSR98 ,Interrupt Processor Targets Register 98 "
|
|
rgroup.long 0x98C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR99 ,Interrupt Processor Targets Register 99 "
|
|
rgroup.long 0x990++0x03
|
|
line.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100"
|
|
rgroup.long 0x994++0x03
|
|
line.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101"
|
|
rgroup.long 0x998++0x03
|
|
line.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102"
|
|
rgroup.long 0x99C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103"
|
|
rgroup.long 0x9A0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104"
|
|
rgroup.long 0x9A4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105"
|
|
rgroup.long 0x9A8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106"
|
|
rgroup.long 0x9AC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107"
|
|
rgroup.long 0x9B0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108"
|
|
rgroup.long 0x9B4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109"
|
|
rgroup.long 0x9B8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110"
|
|
rgroup.long 0x9BC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111"
|
|
rgroup.long 0x9C0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112"
|
|
rgroup.long 0x9C4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113"
|
|
rgroup.long 0x9C8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114"
|
|
rgroup.long 0x9CC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115"
|
|
rgroup.long 0x9D0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116"
|
|
rgroup.long 0x9D4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117"
|
|
rgroup.long 0x9D8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118"
|
|
rgroup.long 0x9DC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119"
|
|
rgroup.long 0x9E0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120"
|
|
rgroup.long 0x9E4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121"
|
|
rgroup.long 0x9E8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122"
|
|
rgroup.long 0x9EC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123"
|
|
rgroup.long 0x9F0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124"
|
|
rgroup.long 0x9F4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125"
|
|
rgroup.long 0x9F8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126"
|
|
rgroup.long 0x9FC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127"
|
|
rgroup.long 0xA00++0x03
|
|
line.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128"
|
|
rgroup.long 0xA04++0x03
|
|
line.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129"
|
|
rgroup.long 0xA08++0x03
|
|
line.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130"
|
|
rgroup.long 0xA0C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131"
|
|
rgroup.long 0xA10++0x03
|
|
line.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132"
|
|
rgroup.long 0xA14++0x03
|
|
line.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133"
|
|
rgroup.long 0xA18++0x03
|
|
line.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134"
|
|
rgroup.long 0xA1C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135"
|
|
rgroup.long 0xA20++0x03
|
|
line.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136"
|
|
rgroup.long 0xA24++0x03
|
|
line.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137"
|
|
rgroup.long 0xA28++0x03
|
|
line.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138"
|
|
rgroup.long 0xA2C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139"
|
|
rgroup.long 0xA30++0x03
|
|
line.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140"
|
|
rgroup.long 0xA34++0x03
|
|
line.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141"
|
|
rgroup.long 0xA38++0x03
|
|
line.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142"
|
|
rgroup.long 0xA3C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143"
|
|
rgroup.long 0xA40++0x03
|
|
line.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144"
|
|
rgroup.long 0xA44++0x03
|
|
line.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145"
|
|
rgroup.long 0xA48++0x03
|
|
line.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146"
|
|
rgroup.long 0xA4C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147"
|
|
rgroup.long 0xA50++0x03
|
|
line.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148"
|
|
rgroup.long 0xA54++0x03
|
|
line.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149"
|
|
rgroup.long 0xA58++0x03
|
|
line.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150"
|
|
rgroup.long 0xA5C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151"
|
|
rgroup.long 0xA60++0x03
|
|
line.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152"
|
|
rgroup.long 0xA64++0x03
|
|
line.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153"
|
|
rgroup.long 0xA68++0x03
|
|
line.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154"
|
|
rgroup.long 0xA6C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155"
|
|
rgroup.long 0xA70++0x03
|
|
line.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156"
|
|
rgroup.long 0xA74++0x03
|
|
line.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157"
|
|
rgroup.long 0xA78++0x03
|
|
line.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158"
|
|
rgroup.long 0xA7C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159"
|
|
rgroup.long 0xA80++0x03
|
|
line.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160"
|
|
rgroup.long 0xA84++0x03
|
|
line.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161"
|
|
rgroup.long 0xA88++0x03
|
|
line.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162"
|
|
rgroup.long 0xA8C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163"
|
|
rgroup.long 0xA90++0x03
|
|
line.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164"
|
|
rgroup.long 0xA94++0x03
|
|
line.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165"
|
|
rgroup.long 0xA98++0x03
|
|
line.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166"
|
|
rgroup.long 0xA9C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167"
|
|
rgroup.long 0xAA0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168"
|
|
rgroup.long 0xAA4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169"
|
|
rgroup.long 0xAA8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170"
|
|
rgroup.long 0xAAC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171"
|
|
rgroup.long 0xAB0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172"
|
|
rgroup.long 0xAB4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173"
|
|
rgroup.long 0xAB8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174"
|
|
rgroup.long 0xABC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175"
|
|
rgroup.long 0xAC0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176"
|
|
rgroup.long 0xAC4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177"
|
|
rgroup.long 0xAC8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178"
|
|
rgroup.long 0xACC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179"
|
|
rgroup.long 0xAD0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180"
|
|
rgroup.long 0xAD4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181"
|
|
rgroup.long 0xAD8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182"
|
|
rgroup.long 0xADC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183"
|
|
rgroup.long 0xAE0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184"
|
|
rgroup.long 0xAE4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185"
|
|
rgroup.long 0xAE8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186"
|
|
rgroup.long 0xAEC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187"
|
|
rgroup.long 0xAF0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188"
|
|
rgroup.long 0xAF4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189"
|
|
rgroup.long 0xAF8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190"
|
|
rgroup.long 0xAFC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191"
|
|
rgroup.long 0xB00++0x03
|
|
line.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192"
|
|
rgroup.long 0xB04++0x03
|
|
line.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193"
|
|
rgroup.long 0xB08++0x03
|
|
line.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194"
|
|
rgroup.long 0xB0C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195"
|
|
rgroup.long 0xB10++0x03
|
|
line.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196"
|
|
rgroup.long 0xB14++0x03
|
|
line.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197"
|
|
rgroup.long 0xB18++0x03
|
|
line.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198"
|
|
rgroup.long 0xB1C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199"
|
|
rgroup.long 0xB20++0x03
|
|
line.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200"
|
|
rgroup.long 0xB24++0x03
|
|
line.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201"
|
|
rgroup.long 0xB28++0x03
|
|
line.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202"
|
|
rgroup.long 0xB2C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203"
|
|
rgroup.long 0xB30++0x03
|
|
line.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204"
|
|
rgroup.long 0xB34++0x03
|
|
line.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205"
|
|
rgroup.long 0xB38++0x03
|
|
line.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206"
|
|
rgroup.long 0xB3C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207"
|
|
rgroup.long 0xB40++0x03
|
|
line.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208"
|
|
rgroup.long 0xB44++0x03
|
|
line.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209"
|
|
rgroup.long 0xB48++0x03
|
|
line.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210"
|
|
rgroup.long 0xB4C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211"
|
|
rgroup.long 0xB50++0x03
|
|
line.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212"
|
|
rgroup.long 0xB54++0x03
|
|
line.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213"
|
|
rgroup.long 0xB58++0x03
|
|
line.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214"
|
|
rgroup.long 0xB5C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215"
|
|
rgroup.long 0xB60++0x03
|
|
line.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216"
|
|
rgroup.long 0xB64++0x03
|
|
line.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217"
|
|
rgroup.long 0xB68++0x03
|
|
line.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218"
|
|
rgroup.long 0xB6C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219"
|
|
rgroup.long 0xB70++0x03
|
|
line.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220"
|
|
rgroup.long 0xB74++0x03
|
|
line.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221"
|
|
rgroup.long 0xB78++0x03
|
|
line.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222"
|
|
rgroup.long 0xB7C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223"
|
|
rgroup.long 0xB80++0x03
|
|
line.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224"
|
|
rgroup.long 0xB84++0x03
|
|
line.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225"
|
|
rgroup.long 0xB88++0x03
|
|
line.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226"
|
|
rgroup.long 0xB8C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227"
|
|
rgroup.long 0xB90++0x03
|
|
line.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228"
|
|
rgroup.long 0xB94++0x03
|
|
line.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229"
|
|
rgroup.long 0xB98++0x03
|
|
line.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230"
|
|
rgroup.long 0xB9C++0x03
|
|
line.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231"
|
|
rgroup.long 0xBA0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232"
|
|
rgroup.long 0xBA4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233"
|
|
rgroup.long 0xBA8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234"
|
|
rgroup.long 0xBAC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235"
|
|
rgroup.long 0xBB0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236"
|
|
rgroup.long 0xBB4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237"
|
|
rgroup.long 0xBB8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238"
|
|
rgroup.long 0xBBC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239"
|
|
rgroup.long 0xBC0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240"
|
|
rgroup.long 0xBC4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241"
|
|
rgroup.long 0xBC8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242"
|
|
rgroup.long 0xBCC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243"
|
|
rgroup.long 0xBD0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244"
|
|
rgroup.long 0xBD4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245"
|
|
rgroup.long 0xBD8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246"
|
|
rgroup.long 0xBDC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247"
|
|
rgroup.long 0xBE0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR248,Interrupt Processor Targets Register 248"
|
|
rgroup.long 0xBE4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR249,Interrupt Processor Targets Register 249"
|
|
rgroup.long 0xBE8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR250,Interrupt Processor Targets Register 250"
|
|
rgroup.long 0xBEC++0x03
|
|
line.long 0x00 "GICD_ITARGETSR251,Interrupt Processor Targets Register 251"
|
|
rgroup.long 0xBF0++0x03
|
|
line.long 0x00 "GICD_ITARGETSR252,Interrupt Processor Targets Register 252"
|
|
rgroup.long 0xBF4++0x03
|
|
line.long 0x00 "GICD_ITARGETSR253,Interrupt Processor Targets Register 253"
|
|
rgroup.long 0xBF8++0x03
|
|
line.long 0x00 "GICD_ITARGETSR254,Interrupt Processor Targets Register 254"
|
|
endif
|
|
tree.end
|
|
width 14.
|
|
tree "Configuration Registers"
|
|
rgroup.long 0xC00++0x03
|
|
line.long 0x00 "GICD_ICFGR0,Interrupt Configuration Register"
|
|
textline " "
|
|
rgroup.long 0xC04++0x03
|
|
line.long 0x00 "GICD_ICFGR1,Interrupt Configuration Register"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1)
|
|
group.long 0xC08++0x03
|
|
line.long 0x00 "GICD_ICFGR2,Interrupt Configuration Register 2"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC0C++0x03
|
|
line.long 0x00 "GICD_ICFGR3,Interrupt Configuration Register 3"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xC08++0x03
|
|
line.long 0x00 "GICD_ICFGR2,Interrupt Configuration Register 2"
|
|
rgroup.long 0xC0C++0x03
|
|
line.long 0x00 "GICD_ICFGR3,Interrupt Configuration Register 3"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x2)
|
|
group.long 0xC10++0x03
|
|
line.long 0x00 "GICD_ICFGR4,Interrupt Configuration Register 4"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC14++0x03
|
|
line.long 0x00 "GICD_ICFGR5,Interrupt Configuration Register 5"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xC10++0x03
|
|
line.long 0x00 "GICD_ICFGR4,Interrupt Configuration Register 4"
|
|
rgroup.long 0xC14++0x03
|
|
line.long 0x00 "GICD_ICFGR5,Interrupt Configuration Register 5"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x3)
|
|
group.long 0xC18++0x03
|
|
line.long 0x00 "GICD_ICFGR6,Interrupt Configuration Register 6"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC1C++0x03
|
|
line.long 0x00 "GICD_ICFGR7,Interrupt Configuration Register 7"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xC18++0x03
|
|
line.long 0x00 "GICD_ICFGR6,Interrupt Configuration Register 6"
|
|
rgroup.long 0xC1C++0x03
|
|
line.long 0x00 "GICD_ICFGR7,Interrupt Configuration Register 7"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x4)
|
|
group.long 0xC20++0x03
|
|
line.long 0x00 "GICD_ICFGR8,Interrupt Configuration Register 8"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC24++0x03
|
|
line.long 0x00 "GICD_ICFGR9,Interrupt Configuration Register 9"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xC20++0x03
|
|
line.long 0x00 "GICD_ICFGR8,Interrupt Configuration Register 8"
|
|
rgroup.long 0xC24++0x03
|
|
line.long 0x00 "GICD_ICFGR9,Interrupt Configuration Register 9"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x5)
|
|
group.long 0xC28++0x03
|
|
line.long 0x00 "GICD_ICFGR10,Interrupt Configuration Register 10"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC2C++0x03
|
|
line.long 0x00 "GICD_ICFGR11,Interrupt Configuration Register 11"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xC28++0x03
|
|
line.long 0x00 "GICD_ICFGR10,Interrupt Configuration Register 10"
|
|
rgroup.long 0xC2C++0x03
|
|
line.long 0x00 "GICD_ICFGR11,Interrupt Configuration Register 11"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x6)
|
|
group.long 0xC30++0x03
|
|
line.long 0x00 "GICD_ICFGR12,Interrupt Configuration Register 12"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC34++0x03
|
|
line.long 0x00 "GICD_ICFGR13,Interrupt Configuration Register 13"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xC30++0x03
|
|
line.long 0x00 "GICD_ICFGR12,Interrupt Configuration Register 12"
|
|
rgroup.long 0xC34++0x03
|
|
line.long 0x00 "GICD_ICFGR13,Interrupt Configuration Register 13"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x7)
|
|
group.long 0xC38++0x03
|
|
line.long 0x00 "GICD_ICFGR14,Interrupt Configuration Register 14"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC3C++0x03
|
|
line.long 0x00 "GICD_ICFGR15,Interrupt Configuration Register 15"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xC38++0x03
|
|
line.long 0x00 "GICD_ICFGR14,Interrupt Configuration Register 14"
|
|
rgroup.long 0xC3C++0x03
|
|
line.long 0x00 "GICD_ICFGR15,Interrupt Configuration Register 15"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x8)
|
|
group.long 0xC40++0x03
|
|
line.long 0x00 "GICD_ICFGR16,Interrupt Configuration Register 16"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC44++0x03
|
|
line.long 0x00 "GICD_ICFGR17,Interrupt Configuration Register 17"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xC40++0x03
|
|
line.long 0x00 "GICD_ICFGR16,Interrupt Configuration Register 16"
|
|
rgroup.long 0xC44++0x03
|
|
line.long 0x00 "GICD_ICFGR17,Interrupt Configuration Register 17"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x9)
|
|
group.long 0xC48++0x03
|
|
line.long 0x00 "GICD_ICFGR18,Interrupt Configuration Register 18"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC4C++0x03
|
|
line.long 0x00 "GICD_ICFGR19,Interrupt Configuration Register 19"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xC48++0x03
|
|
line.long 0x00 "GICD_ICFGR18,Interrupt Configuration Register 18"
|
|
rgroup.long 0xC4C++0x03
|
|
line.long 0x00 "GICD_ICFGR19,Interrupt Configuration Register 19"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0xA)
|
|
group.long 0xC50++0x03
|
|
line.long 0x00 "GICD_ICFGR20,Interrupt Configuration Register 20"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC54++0x03
|
|
line.long 0x00 "GICD_ICFGR21,Interrupt Configuration Register 21"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xC50++0x03
|
|
line.long 0x00 "GICD_ICFGR20,Interrupt Configuration Register 20"
|
|
rgroup.long 0xC54++0x03
|
|
line.long 0x00 "GICD_ICFGR21,Interrupt Configuration Register 21"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0xB)
|
|
group.long 0xC58++0x03
|
|
line.long 0x00 "GICD_ICFGR22,Interrupt Configuration Register 22"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC5C++0x03
|
|
line.long 0x00 "GICD_ICFGR23,Interrupt Configuration Register 23"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xC58++0x03
|
|
line.long 0x00 "GICD_ICFGR22,Interrupt Configuration Register 22"
|
|
rgroup.long 0xC5C++0x03
|
|
line.long 0x00 "GICD_ICFGR23,Interrupt Configuration Register 23"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0xC)
|
|
group.long 0xC60++0x03
|
|
line.long 0x00 "GICD_ICFGR24,Interrupt Configuration Register 24"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC64++0x03
|
|
line.long 0x00 "GICD_ICFGR25,Interrupt Configuration Register 25"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xC60++0x03
|
|
line.long 0x00 "GICD_ICFGR24,Interrupt Configuration Register 24"
|
|
rgroup.long 0xC64++0x03
|
|
line.long 0x00 "GICD_ICFGR25,Interrupt Configuration Register 25"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0xD)
|
|
group.long 0xC68++0x03
|
|
line.long 0x00 "GICD_ICFGR26,Interrupt Configuration Register 26"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC6C++0x03
|
|
line.long 0x00 "GICD_ICFGR27,Interrupt Configuration Register 27"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xC68++0x03
|
|
line.long 0x00 "GICD_ICFGR26,Interrupt Configuration Register 26"
|
|
rgroup.long 0xC6C++0x03
|
|
line.long 0x00 "GICD_ICFGR27,Interrupt Configuration Register 27"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0xE)
|
|
group.long 0xC70++0x03
|
|
line.long 0x00 "GICD_ICFGR28,Interrupt Configuration Register 28"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC74++0x03
|
|
line.long 0x00 "GICD_ICFGR29,Interrupt Configuration Register 29"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xC70++0x03
|
|
line.long 0x00 "GICD_ICFGR28,Interrupt Configuration Register 28"
|
|
rgroup.long 0xC74++0x03
|
|
line.long 0x00 "GICD_ICFGR29,Interrupt Configuration Register 29"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0xF)
|
|
group.long 0xC78++0x03
|
|
line.long 0x00 "GICD_ICFGR30,Interrupt Configuration Register 30"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC7C++0x03
|
|
line.long 0x00 "GICD_ICFGR31,Interrupt Configuration Register 31"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xC78++0x03
|
|
line.long 0x00 "GICD_ICFGR30,Interrupt Configuration Register 30"
|
|
rgroup.long 0xC7C++0x03
|
|
line.long 0x00 "GICD_ICFGR31,Interrupt Configuration Register 31"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x10)
|
|
group.long 0xC80++0x03
|
|
line.long 0x00 "GICD_ICFGR32,Interrupt Configuration Register 32"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC84++0x03
|
|
line.long 0x00 "GICD_ICFGR33,Interrupt Configuration Register 33"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xC80++0x03
|
|
line.long 0x00 "GICD_ICFGR32,Interrupt Configuration Register 32"
|
|
rgroup.long 0xC84++0x03
|
|
line.long 0x00 "GICD_ICFGR33,Interrupt Configuration Register 33"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x11)
|
|
group.long 0xC88++0x03
|
|
line.long 0x00 "GICD_ICFGR34,Interrupt Configuration Register 34"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC8C++0x03
|
|
line.long 0x00 "GICD_ICFGR35,Interrupt Configuration Register 35"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xC88++0x03
|
|
line.long 0x00 "GICD_ICFGR34,Interrupt Configuration Register 34"
|
|
rgroup.long 0xC8C++0x03
|
|
line.long 0x00 "GICD_ICFGR35,Interrupt Configuration Register 35"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x12)
|
|
group.long 0xC90++0x03
|
|
line.long 0x00 "GICD_ICFGR36,Interrupt Configuration Register 36"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC94++0x03
|
|
line.long 0x00 "GICD_ICFGR37,Interrupt Configuration Register 37"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xC90++0x03
|
|
line.long 0x00 "GICD_ICFGR36,Interrupt Configuration Register 36"
|
|
rgroup.long 0xC94++0x03
|
|
line.long 0x00 "GICD_ICFGR37,Interrupt Configuration Register 37"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x13)
|
|
group.long 0xC98++0x03
|
|
line.long 0x00 "GICD_ICFGR38,Interrupt Configuration Register 38"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xC9C++0x03
|
|
line.long 0x00 "GICD_ICFGR39,Interrupt Configuration Register 39"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xC98++0x03
|
|
line.long 0x00 "GICD_ICFGR38,Interrupt Configuration Register 38"
|
|
rgroup.long 0xC9C++0x03
|
|
line.long 0x00 "GICD_ICFGR39,Interrupt Configuration Register 39"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x14)
|
|
group.long 0xCA0++0x03
|
|
line.long 0x00 "GICD_ICFGR40,Interrupt Configuration Register 40"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCA4++0x03
|
|
line.long 0x00 "GICD_ICFGR41,Interrupt Configuration Register 41"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xCA0++0x03
|
|
line.long 0x00 "GICD_ICFGR40,Interrupt Configuration Register 40"
|
|
rgroup.long 0xCA4++0x03
|
|
line.long 0x00 "GICD_ICFGR41,Interrupt Configuration Register 41"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x15)
|
|
group.long 0xCA8++0x03
|
|
line.long 0x00 "GICD_ICFGR42,Interrupt Configuration Register 42"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCAC++0x03
|
|
line.long 0x00 "GICD_ICFGR43,Interrupt Configuration Register 43"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xCA8++0x03
|
|
line.long 0x00 "GICD_ICFGR42,Interrupt Configuration Register 42"
|
|
rgroup.long 0xCAC++0x03
|
|
line.long 0x00 "GICD_ICFGR43,Interrupt Configuration Register 43"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x16)
|
|
group.long 0xCB0++0x03
|
|
line.long 0x00 "GICD_ICFGR44,Interrupt Configuration Register 44"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCB4++0x03
|
|
line.long 0x00 "GICD_ICFGR45,Interrupt Configuration Register 45"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xCB0++0x03
|
|
line.long 0x00 "GICD_ICFGR44,Interrupt Configuration Register 44"
|
|
rgroup.long 0xCB4++0x03
|
|
line.long 0x00 "GICD_ICFGR45,Interrupt Configuration Register 45"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x17)
|
|
group.long 0xCB8++0x03
|
|
line.long 0x00 "GICD_ICFGR46,Interrupt Configuration Register 46"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCBC++0x03
|
|
line.long 0x00 "GICD_ICFGR47,Interrupt Configuration Register 47"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xCB8++0x03
|
|
line.long 0x00 "GICD_ICFGR46,Interrupt Configuration Register 46"
|
|
rgroup.long 0xCBC++0x03
|
|
line.long 0x00 "GICD_ICFGR47,Interrupt Configuration Register 47"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x18)
|
|
group.long 0xCC0++0x03
|
|
line.long 0x00 "GICD_ICFGR48,Interrupt Configuration Register 48"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCC4++0x03
|
|
line.long 0x00 "GICD_ICFGR49,Interrupt Configuration Register 49"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xCC0++0x03
|
|
line.long 0x00 "GICD_ICFGR48,Interrupt Configuration Register 48"
|
|
rgroup.long 0xCC4++0x03
|
|
line.long 0x00 "GICD_ICFGR49,Interrupt Configuration Register 49"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x19)
|
|
group.long 0xCC8++0x03
|
|
line.long 0x00 "GICD_ICFGR50,Interrupt Configuration Register 50"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCCC++0x03
|
|
line.long 0x00 "GICD_ICFGR51,Interrupt Configuration Register 51"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xCC8++0x03
|
|
line.long 0x00 "GICD_ICFGR50,Interrupt Configuration Register 50"
|
|
rgroup.long 0xCCC++0x03
|
|
line.long 0x00 "GICD_ICFGR51,Interrupt Configuration Register 51"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1A)
|
|
group.long 0xCD0++0x03
|
|
line.long 0x00 "GICD_ICFGR52,Interrupt Configuration Register 52"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCD4++0x03
|
|
line.long 0x00 "GICD_ICFGR53,Interrupt Configuration Register 53"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xCD0++0x03
|
|
line.long 0x00 "GICD_ICFGR52,Interrupt Configuration Register 52"
|
|
rgroup.long 0xCD4++0x03
|
|
line.long 0x00 "GICD_ICFGR53,Interrupt Configuration Register 53"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1B)
|
|
group.long 0xCD8++0x03
|
|
line.long 0x00 "GICD_ICFGR54,Interrupt Configuration Register 54"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCDC++0x03
|
|
line.long 0x00 "GICD_ICFGR55,Interrupt Configuration Register 55"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xCD8++0x03
|
|
line.long 0x00 "GICD_ICFGR54,Interrupt Configuration Register 54"
|
|
rgroup.long 0xCDC++0x03
|
|
line.long 0x00 "GICD_ICFGR55,Interrupt Configuration Register 55"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1C)
|
|
group.long 0xCE0++0x03
|
|
line.long 0x00 "GICD_ICFGR56,Interrupt Configuration Register 56"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCE4++0x03
|
|
line.long 0x00 "GICD_ICFGR57,Interrupt Configuration Register 57"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xCE0++0x03
|
|
line.long 0x00 "GICD_ICFGR56,Interrupt Configuration Register 56"
|
|
rgroup.long 0xCE4++0x03
|
|
line.long 0x00 "GICD_ICFGR57,Interrupt Configuration Register 57"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1D)
|
|
group.long 0xCE8++0x03
|
|
line.long 0x00 "GICD_ICFGR58,Interrupt Configuration Register 58"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCEC++0x03
|
|
line.long 0x00 "GICD_ICFGR59,Interrupt Configuration Register 59"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xCE8++0x03
|
|
line.long 0x00 "GICD_ICFGR58,Interrupt Configuration Register 58"
|
|
rgroup.long 0xCEC++0x03
|
|
line.long 0x00 "GICD_ICFGR59,Interrupt Configuration Register 59"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1E)
|
|
group.long 0xCF0++0x03
|
|
line.long 0x00 "GICD_ICFGR60,Interrupt Configuration Register 60"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCF4++0x03
|
|
line.long 0x00 "GICD_ICFGR61,Interrupt Configuration Register 61"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xCF0++0x03
|
|
line.long 0x00 "GICD_ICFGR60,Interrupt Configuration Register 60"
|
|
rgroup.long 0xCF4++0x03
|
|
line.long 0x00 "GICD_ICFGR61,Interrupt Configuration Register 61"
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1F)
|
|
group.long 0xCF8++0x03
|
|
line.long 0x00 "GICD_ICFGR62,Interrupt Configuration Register 62"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
group.long 0xCFC++0x03
|
|
line.long 0x00 "GICD_ICFGR63,Interrupt Configuration Register 63"
|
|
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
|
|
bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge"
|
|
bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
|
|
bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge"
|
|
bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge"
|
|
bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge"
|
|
bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge"
|
|
bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge"
|
|
bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge"
|
|
bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge"
|
|
bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge"
|
|
else
|
|
rgroup.long 0xCF8++0x03
|
|
line.long 0x00 "GICD_ICFGR62,Interrupt Configuration Register 62"
|
|
rgroup.long 0xCFC++0x03
|
|
line.long 0x00 "GICD_ICFGR63,Interrupt Configuration Register 63"
|
|
endif
|
|
tree.end
|
|
width 12.
|
|
tree "Peripheral Interrupt Status Registers"
|
|
rgroup.long 0x0D00++0x03
|
|
line.long 0x00 "GICD_PPISR,Private Peripheral Interrupt Status Register"
|
|
bitfld.long 0x00 15. " PPI3S ,nIRQ pin status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 14. " PPI2S ,Non-secure Physical Timer event status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 13. " PPI1S ,Secure Physical Timer event status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 12. " PPI0S ,nFIQ pin status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 11. " PPI4S ,Virtual Timer event status" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 10. " PPI5S ,Hypervisor Timer event status" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PPI6S ,Virtual Maintenance Status" "No interrupt,Interrupt"
|
|
textline " "
|
|
width 22.
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x01)
|
|
rgroup.long 0x0D04++0x03
|
|
line.long 0x0 "GICD_SPISR0,Shared Peripheral Interrupt Status Register 0"
|
|
bitfld.long 0x00 31. " IRQS31 ,IRQS Status Bit 31" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS30 ,IRQS Status Bit 30" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS29 ,IRQS Status Bit 29" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS28 ,IRQS Status Bit 28" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS27 ,IRQS Status Bit 27" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS26 ,IRQS Status Bit 26" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS25 ,IRQS Status Bit 25" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS24 ,IRQS Status Bit 24" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS23 ,IRQS Status Bit 23" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS22 ,IRQS Status Bit 22" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS21 ,IRQS Status Bit 21" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS20 ,IRQS Status Bit 20" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS19 ,IRQS Status Bit 19" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS18 ,IRQS Status Bit 18" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS17 ,IRQS Status Bit 17" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS16 ,IRQS Status Bit 16" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS15 ,IRQS Status Bit 15" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS14 ,IRQS Status Bit 14" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS13 ,IRQS Status Bit 13" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS12 ,IRQS Status Bit 12" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS11 ,IRQS Status Bit 11" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS10 ,IRQS Status Bit 10" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS9 ,IRQS Status Bit 9" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS8 ,IRQS Status Bit 8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS7 ,IRQS Status Bit 7" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS6 ,IRQS Status Bit 6" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS5 ,IRQS Status Bit 5" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS4 ,IRQS Status Bit 4" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS3 ,IRQS Status Bit 3" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS2 ,IRQS Status Bit 2" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS1 ,IRQS Status Bit 1" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS0 ,IRQS Status Bit 0" "Low,High"
|
|
else
|
|
rgroup.long 0x0D04++0x03
|
|
line.long 0x0 "GICD_SPISR0,Shared Peripheral Interrupt Status Register 1"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x02)
|
|
rgroup.long 0x0D08++0x03
|
|
line.long 0x0 "GICD_SPISR1,Shared Peripheral Interrupt Status Register 1"
|
|
bitfld.long 0x00 31. " IRQS63 ,IRQS Status Bit 63" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS62 ,IRQS Status Bit 62" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS61 ,IRQS Status Bit 61" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS60 ,IRQS Status Bit 60" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS59 ,IRQS Status Bit 59" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS58 ,IRQS Status Bit 58" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS57 ,IRQS Status Bit 57" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS56 ,IRQS Status Bit 56" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS55 ,IRQS Status Bit 55" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS54 ,IRQS Status Bit 54" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS53 ,IRQS Status Bit 53" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS52 ,IRQS Status Bit 52" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS51 ,IRQS Status Bit 51" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS50 ,IRQS Status Bit 50" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS49 ,IRQS Status Bit 49" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS48 ,IRQS Status Bit 48" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS47 ,IRQS Status Bit 47" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS46 ,IRQS Status Bit 46" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS45 ,IRQS Status Bit 45" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS44 ,IRQS Status Bit 44" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS43 ,IRQS Status Bit 43" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS42 ,IRQS Status Bit 42" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS41 ,IRQS Status Bit 41" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS40 ,IRQS Status Bit 40" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS39 ,IRQS Status Bit 39" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS38 ,IRQS Status Bit 38" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS37 ,IRQS Status Bit 37" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS36 ,IRQS Status Bit 36" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS35 ,IRQS Status Bit 35" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS34 ,IRQS Status Bit 34" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS33 ,IRQS Status Bit 33" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS32 ,IRQS Status Bit 32" "Low,High"
|
|
else
|
|
rgroup.long 0x0D08++0x03
|
|
line.long 0x0 "GICD_SPISR1,Shared Peripheral Interrupt Status Register 1"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x03)
|
|
rgroup.long 0x0D0C++0x03
|
|
line.long 0x0 "GICD_SPISR2,Shared Peripheral Interrupt Status Register 2"
|
|
bitfld.long 0x00 31. " IRQS95 ,IRQS Status Bit 95" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS94 ,IRQS Status Bit 94" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS93 ,IRQS Status Bit 93" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS92 ,IRQS Status Bit 92" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS91 ,IRQS Status Bit 91" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS90 ,IRQS Status Bit 90" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS89 ,IRQS Status Bit 89" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS88 ,IRQS Status Bit 88" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS87 ,IRQS Status Bit 87" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS86 ,IRQS Status Bit 86" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS85 ,IRQS Status Bit 85" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS84 ,IRQS Status Bit 84" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS83 ,IRQS Status Bit 83" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS82 ,IRQS Status Bit 82" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS81 ,IRQS Status Bit 81" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS80 ,IRQS Status Bit 80" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS79 ,IRQS Status Bit 79" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS78 ,IRQS Status Bit 78" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS77 ,IRQS Status Bit 77" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS76 ,IRQS Status Bit 76" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS75 ,IRQS Status Bit 75" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS74 ,IRQS Status Bit 74" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS73 ,IRQS Status Bit 73" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS72 ,IRQS Status Bit 72" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS71 ,IRQS Status Bit 71" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS70 ,IRQS Status Bit 70" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS69 ,IRQS Status Bit 69" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS68 ,IRQS Status Bit 68" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS67 ,IRQS Status Bit 67" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS66 ,IRQS Status Bit 66" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS65 ,IRQS Status Bit 65" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS64 ,IRQS Status Bit 64" "Low,High"
|
|
else
|
|
rgroup.long 0x0D0C++0x03
|
|
line.long 0x0 "GICD_SPISR2,Shared Peripheral Interrupt Status Register 2"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x04)
|
|
rgroup.long 0x0D10++0x03
|
|
line.long 0x0 "GICD_SPISR3,Shared Peripheral Interrupt Status Register 3"
|
|
bitfld.long 0x00 31. " IRQS127 ,IRQS Status Bit 127" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS126 ,IRQS Status Bit 126" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS125 ,IRQS Status Bit 125" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS124 ,IRQS Status Bit 124" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS123 ,IRQS Status Bit 123" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS122 ,IRQS Status Bit 122" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS121 ,IRQS Status Bit 121" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS120 ,IRQS Status Bit 120" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS119 ,IRQS Status Bit 119" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS118 ,IRQS Status Bit 118" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS117 ,IRQS Status Bit 117" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS116 ,IRQS Status Bit 116" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS115 ,IRQS Status Bit 115" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS114 ,IRQS Status Bit 114" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS113 ,IRQS Status Bit 113" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS112 ,IRQS Status Bit 112" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS111 ,IRQS Status Bit 111" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS110 ,IRQS Status Bit 110" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS109 ,IRQS Status Bit 109" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS108 ,IRQS Status Bit 108" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS107 ,IRQS Status Bit 107" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS106 ,IRQS Status Bit 106" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS105 ,IRQS Status Bit 105" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS104 ,IRQS Status Bit 104" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS103 ,IRQS Status Bit 103" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS102 ,IRQS Status Bit 102" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS101 ,IRQS Status Bit 101" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS100 ,IRQS Status Bit 100" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS99 ,IRQS Status Bit 99" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS98 ,IRQS Status Bit 98" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS97 ,IRQS Status Bit 97" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS96 ,IRQS Status Bit 96" "Low,High"
|
|
else
|
|
rgroup.long 0x0D10++0x03
|
|
line.long 0x0 "GICD_SPISR3,Shared Peripheral Interrupt Status Register 3"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x05)
|
|
rgroup.long 0x0D14++0x03
|
|
line.long 0x0 "GICD_SPISR4,Shared Peripheral Interrupt Status Register 4"
|
|
bitfld.long 0x00 31. " IRQS159 ,IRQS Status Bit 159" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS158 ,IRQS Status Bit 158" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS157 ,IRQS Status Bit 157" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS156 ,IRQS Status Bit 156" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS155 ,IRQS Status Bit 155" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS154 ,IRQS Status Bit 154" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS153 ,IRQS Status Bit 153" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS152 ,IRQS Status Bit 152" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS151 ,IRQS Status Bit 151" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS150 ,IRQS Status Bit 150" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS149 ,IRQS Status Bit 149" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS148 ,IRQS Status Bit 148" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS147 ,IRQS Status Bit 147" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS146 ,IRQS Status Bit 146" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS145 ,IRQS Status Bit 145" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS144 ,IRQS Status Bit 144" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS143 ,IRQS Status Bit 143" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS142 ,IRQS Status Bit 142" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS141 ,IRQS Status Bit 141" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS140 ,IRQS Status Bit 140" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS139 ,IRQS Status Bit 139" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS138 ,IRQS Status Bit 138" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS137 ,IRQS Status Bit 137" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS136 ,IRQS Status Bit 136" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS135 ,IRQS Status Bit 135" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS134 ,IRQS Status Bit 134" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS133 ,IRQS Status Bit 133" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS132 ,IRQS Status Bit 132" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS131 ,IRQS Status Bit 131" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS130 ,IRQS Status Bit 130" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS129 ,IRQS Status Bit 129" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS128 ,IRQS Status Bit 128" "Low,High"
|
|
else
|
|
rgroup.long 0x0D14++0x03
|
|
line.long 0x0 "GICD_SPISR4,Shared Peripheral Interrupt Status Register 4"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x06)
|
|
rgroup.long 0x0D18++0x03
|
|
line.long 0x0 "GICD_SPISR5,Shared Peripheral Interrupt Status Register 5"
|
|
bitfld.long 0x00 31. " IRQS191 ,IRQS Status Bit 191" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS190 ,IRQS Status Bit 190" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS189 ,IRQS Status Bit 189" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS188 ,IRQS Status Bit 188" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS187 ,IRQS Status Bit 187" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS186 ,IRQS Status Bit 186" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS185 ,IRQS Status Bit 185" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS184 ,IRQS Status Bit 184" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS183 ,IRQS Status Bit 183" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS182 ,IRQS Status Bit 182" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS181 ,IRQS Status Bit 181" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS180 ,IRQS Status Bit 180" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS179 ,IRQS Status Bit 179" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS178 ,IRQS Status Bit 178" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS177 ,IRQS Status Bit 177" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS176 ,IRQS Status Bit 176" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS175 ,IRQS Status Bit 175" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS174 ,IRQS Status Bit 174" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS173 ,IRQS Status Bit 173" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS172 ,IRQS Status Bit 172" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS171 ,IRQS Status Bit 171" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS170 ,IRQS Status Bit 170" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS169 ,IRQS Status Bit 169" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS168 ,IRQS Status Bit 168" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS167 ,IRQS Status Bit 167" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS166 ,IRQS Status Bit 166" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS165 ,IRQS Status Bit 165" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS164 ,IRQS Status Bit 164" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS163 ,IRQS Status Bit 163" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS162 ,IRQS Status Bit 162" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS161 ,IRQS Status Bit 161" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS160 ,IRQS Status Bit 160" "Low,High"
|
|
else
|
|
rgroup.long 0x0D18++0x03
|
|
line.long 0x0 "GICD_SPISR5,Shared Peripheral Interrupt Status Register 5"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x07)
|
|
rgroup.long 0x0D1C++0x03
|
|
line.long 0x0 "GICD_SPISR6,Shared Peripheral Interrupt Status Register 6"
|
|
bitfld.long 0x00 31. " IRQS223 ,IRQS Status Bit 223" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS222 ,IRQS Status Bit 222" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS221 ,IRQS Status Bit 221" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS220 ,IRQS Status Bit 220" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS219 ,IRQS Status Bit 219" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS218 ,IRQS Status Bit 218" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS217 ,IRQS Status Bit 217" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS216 ,IRQS Status Bit 216" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS215 ,IRQS Status Bit 215" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS214 ,IRQS Status Bit 214" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS213 ,IRQS Status Bit 213" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS212 ,IRQS Status Bit 212" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS211 ,IRQS Status Bit 211" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS210 ,IRQS Status Bit 210" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS209 ,IRQS Status Bit 209" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS208 ,IRQS Status Bit 208" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS207 ,IRQS Status Bit 207" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS206 ,IRQS Status Bit 206" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS205 ,IRQS Status Bit 205" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS204 ,IRQS Status Bit 204" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS203 ,IRQS Status Bit 203" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS202 ,IRQS Status Bit 202" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS201 ,IRQS Status Bit 201" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS200 ,IRQS Status Bit 200" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS199 ,IRQS Status Bit 199" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS198 ,IRQS Status Bit 198" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS197 ,IRQS Status Bit 197" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS196 ,IRQS Status Bit 196" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS195 ,IRQS Status Bit 195" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS194 ,IRQS Status Bit 194" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS193 ,IRQS Status Bit 193" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS192 ,IRQS Status Bit 192" "Low,High"
|
|
else
|
|
rgroup.long 0x0D1C++0x03
|
|
line.long 0x0 "GICD_SPISR6,Shared Peripheral Interrupt Status Register 6"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x08)
|
|
rgroup.long 0x0D20++0x03
|
|
line.long 0x0 "GICD_SPISR7,Shared Peripheral Interrupt Status Register 7"
|
|
bitfld.long 0x00 31. " IRQS255 ,IRQS Status Bit 255" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS254 ,IRQS Status Bit 254" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS253 ,IRQS Status Bit 253" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS252 ,IRQS Status Bit 252" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS251 ,IRQS Status Bit 251" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS250 ,IRQS Status Bit 250" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS249 ,IRQS Status Bit 249" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS248 ,IRQS Status Bit 248" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS247 ,IRQS Status Bit 247" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS246 ,IRQS Status Bit 246" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS245 ,IRQS Status Bit 245" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS244 ,IRQS Status Bit 244" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS243 ,IRQS Status Bit 243" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS242 ,IRQS Status Bit 242" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS241 ,IRQS Status Bit 241" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS240 ,IRQS Status Bit 240" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS239 ,IRQS Status Bit 239" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS238 ,IRQS Status Bit 238" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS237 ,IRQS Status Bit 237" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS236 ,IRQS Status Bit 236" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS235 ,IRQS Status Bit 235" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS234 ,IRQS Status Bit 234" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS233 ,IRQS Status Bit 233" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS232 ,IRQS Status Bit 232" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS231 ,IRQS Status Bit 231" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS230 ,IRQS Status Bit 230" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS229 ,IRQS Status Bit 229" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS228 ,IRQS Status Bit 228" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS227 ,IRQS Status Bit 227" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS226 ,IRQS Status Bit 226" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS225 ,IRQS Status Bit 225" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS224 ,IRQS Status Bit 224" "Low,High"
|
|
else
|
|
rgroup.long 0x0D20++0x03
|
|
line.long 0x0 "GICD_SPISR7,Shared Peripheral Interrupt Status Register 7"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x09)
|
|
rgroup.long 0x0D24++0x03
|
|
line.long 0x0 "GICD_SPISR8,Shared Peripheral Interrupt Status Register 8"
|
|
bitfld.long 0x00 31. " IRQS287 ,IRQS Status Bit 287" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS286 ,IRQS Status Bit 286" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS285 ,IRQS Status Bit 285" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS284 ,IRQS Status Bit 284" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS283 ,IRQS Status Bit 283" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS282 ,IRQS Status Bit 282" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS281 ,IRQS Status Bit 281" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS280 ,IRQS Status Bit 280" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS279 ,IRQS Status Bit 279" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS278 ,IRQS Status Bit 278" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS277 ,IRQS Status Bit 277" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS276 ,IRQS Status Bit 276" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS275 ,IRQS Status Bit 275" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS274 ,IRQS Status Bit 274" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS273 ,IRQS Status Bit 273" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS272 ,IRQS Status Bit 272" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS271 ,IRQS Status Bit 271" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS270 ,IRQS Status Bit 270" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS269 ,IRQS Status Bit 269" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS268 ,IRQS Status Bit 268" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS267 ,IRQS Status Bit 267" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS266 ,IRQS Status Bit 266" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS265 ,IRQS Status Bit 265" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS264 ,IRQS Status Bit 264" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS263 ,IRQS Status Bit 263" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS262 ,IRQS Status Bit 262" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS261 ,IRQS Status Bit 261" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS260 ,IRQS Status Bit 260" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS259 ,IRQS Status Bit 259" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS258 ,IRQS Status Bit 258" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS257 ,IRQS Status Bit 257" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS256 ,IRQS Status Bit 256" "Low,High"
|
|
else
|
|
rgroup.long 0x0D24++0x03
|
|
line.long 0x0 "GICD_SPISR8,Shared Peripheral Interrupt Status Register 8"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0A)
|
|
rgroup.long 0x0D28++0x03
|
|
line.long 0x0 "GICD_SPISR9,Shared Peripheral Interrupt Status Register 9"
|
|
bitfld.long 0x00 31. " IRQS319 ,IRQS Status Bit 319" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS318 ,IRQS Status Bit 318" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS317 ,IRQS Status Bit 317" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS316 ,IRQS Status Bit 316" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS315 ,IRQS Status Bit 315" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS314 ,IRQS Status Bit 314" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS313 ,IRQS Status Bit 313" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS312 ,IRQS Status Bit 312" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS311 ,IRQS Status Bit 311" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS310 ,IRQS Status Bit 310" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS309 ,IRQS Status Bit 309" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS308 ,IRQS Status Bit 308" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS307 ,IRQS Status Bit 307" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS306 ,IRQS Status Bit 306" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS305 ,IRQS Status Bit 305" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS304 ,IRQS Status Bit 304" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS303 ,IRQS Status Bit 303" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS302 ,IRQS Status Bit 302" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS301 ,IRQS Status Bit 301" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS300 ,IRQS Status Bit 300" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS299 ,IRQS Status Bit 299" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS298 ,IRQS Status Bit 298" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS297 ,IRQS Status Bit 297" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS296 ,IRQS Status Bit 296" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS295 ,IRQS Status Bit 295" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS294 ,IRQS Status Bit 294" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS293 ,IRQS Status Bit 293" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS292 ,IRQS Status Bit 292" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS291 ,IRQS Status Bit 291" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS290 ,IRQS Status Bit 290" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS289 ,IRQS Status Bit 289" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS288 ,IRQS Status Bit 288" "Low,High"
|
|
else
|
|
rgroup.long 0x0D28++0x03
|
|
line.long 0x0 "GICD_SPISR9,Shared Peripheral Interrupt Status Register 9"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0B)
|
|
rgroup.long 0x0D2C++0x03
|
|
line.long 0x0 "GICD_SPISR10,Shared Peripheral Interrupt Status Register 10"
|
|
bitfld.long 0x00 31. " IRQS351 ,IRQS Status Bit 351" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS350 ,IRQS Status Bit 350" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS349 ,IRQS Status Bit 349" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS348 ,IRQS Status Bit 348" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS347 ,IRQS Status Bit 347" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS346 ,IRQS Status Bit 346" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS345 ,IRQS Status Bit 345" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS344 ,IRQS Status Bit 344" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS343 ,IRQS Status Bit 343" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS342 ,IRQS Status Bit 342" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS341 ,IRQS Status Bit 341" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS340 ,IRQS Status Bit 340" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS339 ,IRQS Status Bit 339" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS338 ,IRQS Status Bit 338" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS337 ,IRQS Status Bit 337" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS336 ,IRQS Status Bit 336" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS335 ,IRQS Status Bit 335" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS334 ,IRQS Status Bit 334" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS333 ,IRQS Status Bit 333" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS332 ,IRQS Status Bit 332" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS331 ,IRQS Status Bit 331" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS330 ,IRQS Status Bit 330" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS329 ,IRQS Status Bit 329" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS328 ,IRQS Status Bit 328" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS327 ,IRQS Status Bit 327" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS326 ,IRQS Status Bit 326" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS325 ,IRQS Status Bit 325" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS324 ,IRQS Status Bit 324" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS323 ,IRQS Status Bit 323" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS322 ,IRQS Status Bit 322" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS321 ,IRQS Status Bit 321" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS320 ,IRQS Status Bit 320" "Low,High"
|
|
else
|
|
rgroup.long 0x0D2C++0x03
|
|
line.long 0x0 "GICD_SPISR10,Shared Peripheral Interrupt Status Register 10"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0C)
|
|
rgroup.long 0x0D30++0x03
|
|
line.long 0x0 "GICD_SPISR11,Shared Peripheral Interrupt Status Register 11"
|
|
bitfld.long 0x00 31. " IRQS383 ,IRQS Status Bit 383" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS382 ,IRQS Status Bit 382" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS381 ,IRQS Status Bit 381" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS380 ,IRQS Status Bit 380" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS379 ,IRQS Status Bit 379" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS378 ,IRQS Status Bit 378" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS377 ,IRQS Status Bit 377" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS376 ,IRQS Status Bit 376" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS375 ,IRQS Status Bit 375" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS374 ,IRQS Status Bit 374" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS373 ,IRQS Status Bit 373" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS372 ,IRQS Status Bit 372" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS371 ,IRQS Status Bit 371" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS370 ,IRQS Status Bit 370" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS369 ,IRQS Status Bit 369" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS368 ,IRQS Status Bit 368" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS367 ,IRQS Status Bit 367" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS366 ,IRQS Status Bit 366" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS365 ,IRQS Status Bit 365" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS364 ,IRQS Status Bit 364" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS363 ,IRQS Status Bit 363" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS362 ,IRQS Status Bit 362" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS361 ,IRQS Status Bit 361" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS360 ,IRQS Status Bit 360" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS359 ,IRQS Status Bit 359" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS358 ,IRQS Status Bit 358" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS357 ,IRQS Status Bit 357" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS356 ,IRQS Status Bit 356" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS355 ,IRQS Status Bit 355" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS354 ,IRQS Status Bit 354" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS353 ,IRQS Status Bit 353" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS352 ,IRQS Status Bit 352" "Low,High"
|
|
else
|
|
rgroup.long 0x0D30++0x03
|
|
line.long 0x0 "GICD_SPISR11,Shared Peripheral Interrupt Status Register 11"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0D)
|
|
rgroup.long 0x0D34++0x03
|
|
line.long 0x0 "GICD_SPISR12,Shared Peripheral Interrupt Status Register 12"
|
|
bitfld.long 0x00 31. " IRQS415 ,IRQS Status Bit 415" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS414 ,IRQS Status Bit 414" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS413 ,IRQS Status Bit 413" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS412 ,IRQS Status Bit 412" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS411 ,IRQS Status Bit 411" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS410 ,IRQS Status Bit 410" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS409 ,IRQS Status Bit 409" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS408 ,IRQS Status Bit 408" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS407 ,IRQS Status Bit 407" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS406 ,IRQS Status Bit 406" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS405 ,IRQS Status Bit 405" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS404 ,IRQS Status Bit 404" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS403 ,IRQS Status Bit 403" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS402 ,IRQS Status Bit 402" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS401 ,IRQS Status Bit 401" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS400 ,IRQS Status Bit 400" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS399 ,IRQS Status Bit 399" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS398 ,IRQS Status Bit 398" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS397 ,IRQS Status Bit 397" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS396 ,IRQS Status Bit 396" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS395 ,IRQS Status Bit 395" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS394 ,IRQS Status Bit 394" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS393 ,IRQS Status Bit 393" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS392 ,IRQS Status Bit 392" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS391 ,IRQS Status Bit 391" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS390 ,IRQS Status Bit 390" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS389 ,IRQS Status Bit 389" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS388 ,IRQS Status Bit 388" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS387 ,IRQS Status Bit 387" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS386 ,IRQS Status Bit 386" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS385 ,IRQS Status Bit 385" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS384 ,IRQS Status Bit 384" "Low,High"
|
|
else
|
|
rgroup.long 0x0D34++0x03
|
|
line.long 0x0 "GICD_SPISR12,Shared Peripheral Interrupt Status Register 12"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0E)
|
|
rgroup.long 0x0D38++0x03
|
|
line.long 0x0 "GICD_SPISR13,Shared Peripheral Interrupt Status Register 13"
|
|
bitfld.long 0x00 31. " IRQS447 ,IRQS Status Bit 447" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS446 ,IRQS Status Bit 446" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS445 ,IRQS Status Bit 445" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS444 ,IRQS Status Bit 444" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS443 ,IRQS Status Bit 443" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS442 ,IRQS Status Bit 442" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS441 ,IRQS Status Bit 441" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS440 ,IRQS Status Bit 440" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS439 ,IRQS Status Bit 439" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS438 ,IRQS Status Bit 438" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS437 ,IRQS Status Bit 437" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS436 ,IRQS Status Bit 436" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS435 ,IRQS Status Bit 435" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS434 ,IRQS Status Bit 434" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS433 ,IRQS Status Bit 433" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS432 ,IRQS Status Bit 432" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS431 ,IRQS Status Bit 431" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS430 ,IRQS Status Bit 430" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS429 ,IRQS Status Bit 429" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS428 ,IRQS Status Bit 428" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS427 ,IRQS Status Bit 427" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS426 ,IRQS Status Bit 426" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS425 ,IRQS Status Bit 425" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS424 ,IRQS Status Bit 424" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS423 ,IRQS Status Bit 423" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS422 ,IRQS Status Bit 422" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS421 ,IRQS Status Bit 421" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS420 ,IRQS Status Bit 420" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS419 ,IRQS Status Bit 419" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS418 ,IRQS Status Bit 418" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS417 ,IRQS Status Bit 417" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS416 ,IRQS Status Bit 416" "Low,High"
|
|
else
|
|
rgroup.long 0x0D38++0x03
|
|
line.long 0x0 "GICD_SPISR13,Shared Peripheral Interrupt Status Register 13"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x0F)
|
|
rgroup.long 0x0D3C++0x03
|
|
line.long 0x0 "GICD_SPISR14,Shared Peripheral Interrupt Status Register 14"
|
|
bitfld.long 0x00 31. " IRQS479 ,IRQS Status Bit 479" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS478 ,IRQS Status Bit 478" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS477 ,IRQS Status Bit 477" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS476 ,IRQS Status Bit 476" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS475 ,IRQS Status Bit 475" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS474 ,IRQS Status Bit 474" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS473 ,IRQS Status Bit 473" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS472 ,IRQS Status Bit 472" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS471 ,IRQS Status Bit 471" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS470 ,IRQS Status Bit 470" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS469 ,IRQS Status Bit 469" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS468 ,IRQS Status Bit 468" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS467 ,IRQS Status Bit 467" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS466 ,IRQS Status Bit 466" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS465 ,IRQS Status Bit 465" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS464 ,IRQS Status Bit 464" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS463 ,IRQS Status Bit 463" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS462 ,IRQS Status Bit 462" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS461 ,IRQS Status Bit 461" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS460 ,IRQS Status Bit 460" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS459 ,IRQS Status Bit 459" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS458 ,IRQS Status Bit 458" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS457 ,IRQS Status Bit 457" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS456 ,IRQS Status Bit 456" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS455 ,IRQS Status Bit 455" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS454 ,IRQS Status Bit 454" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS453 ,IRQS Status Bit 453" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS452 ,IRQS Status Bit 452" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS451 ,IRQS Status Bit 451" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS450 ,IRQS Status Bit 450" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS449 ,IRQS Status Bit 449" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS448 ,IRQS Status Bit 448" "Low,High"
|
|
else
|
|
rgroup.long 0x0D3C++0x03
|
|
line.long 0x0 "GICD_SPISR14,Shared Peripheral Interrupt Status Register 14"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x10)
|
|
rgroup.long 0x0D40++0x03
|
|
line.long 0x0 "GICD_SPISR15,Shared Peripheral Interrupt Status Register 15"
|
|
bitfld.long 0x00 31. " IRQS511 ,IRQS Status Bit 511" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS510 ,IRQS Status Bit 510" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS509 ,IRQS Status Bit 509" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS508 ,IRQS Status Bit 508" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS507 ,IRQS Status Bit 507" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS506 ,IRQS Status Bit 506" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS505 ,IRQS Status Bit 505" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS504 ,IRQS Status Bit 504" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS503 ,IRQS Status Bit 503" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS502 ,IRQS Status Bit 502" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS501 ,IRQS Status Bit 501" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS500 ,IRQS Status Bit 500" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS499 ,IRQS Status Bit 499" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS498 ,IRQS Status Bit 498" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS497 ,IRQS Status Bit 497" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS496 ,IRQS Status Bit 496" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS495 ,IRQS Status Bit 495" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS494 ,IRQS Status Bit 494" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS493 ,IRQS Status Bit 493" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS492 ,IRQS Status Bit 492" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS491 ,IRQS Status Bit 491" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS490 ,IRQS Status Bit 490" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS489 ,IRQS Status Bit 489" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS488 ,IRQS Status Bit 488" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS487 ,IRQS Status Bit 487" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS486 ,IRQS Status Bit 486" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS485 ,IRQS Status Bit 485" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS484 ,IRQS Status Bit 484" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS483 ,IRQS Status Bit 483" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS482 ,IRQS Status Bit 482" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS481 ,IRQS Status Bit 481" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS480 ,IRQS Status Bit 480" "Low,High"
|
|
else
|
|
rgroup.long 0x0D40++0x03
|
|
line.long 0x0 "GICD_SPISR15,Shared Peripheral Interrupt Status Register 15"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x11)
|
|
rgroup.long 0x0D44++0x03
|
|
line.long 0x0 "GICD_SPISR16,Shared Peripheral Interrupt Status Register 16"
|
|
bitfld.long 0x00 31. " IRQS543 ,IRQS Status Bit 543" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS542 ,IRQS Status Bit 542" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS541 ,IRQS Status Bit 541" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS540 ,IRQS Status Bit 540" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS539 ,IRQS Status Bit 539" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS538 ,IRQS Status Bit 538" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS537 ,IRQS Status Bit 537" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS536 ,IRQS Status Bit 536" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS535 ,IRQS Status Bit 535" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS534 ,IRQS Status Bit 534" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS533 ,IRQS Status Bit 533" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS532 ,IRQS Status Bit 532" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS531 ,IRQS Status Bit 531" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS530 ,IRQS Status Bit 530" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS529 ,IRQS Status Bit 529" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS528 ,IRQS Status Bit 528" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS527 ,IRQS Status Bit 527" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS526 ,IRQS Status Bit 526" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS525 ,IRQS Status Bit 525" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS524 ,IRQS Status Bit 524" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS523 ,IRQS Status Bit 523" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS522 ,IRQS Status Bit 522" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS521 ,IRQS Status Bit 521" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS520 ,IRQS Status Bit 520" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS519 ,IRQS Status Bit 519" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS518 ,IRQS Status Bit 518" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS517 ,IRQS Status Bit 517" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS516 ,IRQS Status Bit 516" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS515 ,IRQS Status Bit 515" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS514 ,IRQS Status Bit 514" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS513 ,IRQS Status Bit 513" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS512 ,IRQS Status Bit 512" "Low,High"
|
|
else
|
|
rgroup.long 0x0D44++0x03
|
|
line.long 0x0 "GICD_SPISR16,Shared Peripheral Interrupt Status Register 16"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x12)
|
|
rgroup.long 0x0D48++0x03
|
|
line.long 0x0 "GICD_SPISR17,Shared Peripheral Interrupt Status Register 17"
|
|
bitfld.long 0x00 31. " IRQS575 ,IRQS Status Bit 575" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS574 ,IRQS Status Bit 574" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS573 ,IRQS Status Bit 573" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS572 ,IRQS Status Bit 572" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS571 ,IRQS Status Bit 571" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS570 ,IRQS Status Bit 570" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS569 ,IRQS Status Bit 569" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS568 ,IRQS Status Bit 568" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS567 ,IRQS Status Bit 567" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS566 ,IRQS Status Bit 566" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS565 ,IRQS Status Bit 565" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS564 ,IRQS Status Bit 564" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS563 ,IRQS Status Bit 563" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS562 ,IRQS Status Bit 562" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS561 ,IRQS Status Bit 561" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS560 ,IRQS Status Bit 560" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS559 ,IRQS Status Bit 559" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS558 ,IRQS Status Bit 558" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS557 ,IRQS Status Bit 557" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS556 ,IRQS Status Bit 556" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS555 ,IRQS Status Bit 555" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS554 ,IRQS Status Bit 554" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS553 ,IRQS Status Bit 553" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS552 ,IRQS Status Bit 552" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS551 ,IRQS Status Bit 551" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS550 ,IRQS Status Bit 550" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS549 ,IRQS Status Bit 549" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS548 ,IRQS Status Bit 548" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS547 ,IRQS Status Bit 547" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS546 ,IRQS Status Bit 546" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS545 ,IRQS Status Bit 545" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS544 ,IRQS Status Bit 544" "Low,High"
|
|
else
|
|
rgroup.long 0x0D48++0x03
|
|
line.long 0x0 "GICD_SPISR17,Shared Peripheral Interrupt Status Register 17"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x13)
|
|
rgroup.long 0x0D4C++0x03
|
|
line.long 0x0 "GICD_SPISR18,Shared Peripheral Interrupt Status Register 18"
|
|
bitfld.long 0x00 31. " IRQS607 ,IRQS Status Bit 607" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS606 ,IRQS Status Bit 606" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS605 ,IRQS Status Bit 605" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS604 ,IRQS Status Bit 604" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS603 ,IRQS Status Bit 603" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS602 ,IRQS Status Bit 602" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS601 ,IRQS Status Bit 601" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS600 ,IRQS Status Bit 600" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS599 ,IRQS Status Bit 599" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS598 ,IRQS Status Bit 598" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS597 ,IRQS Status Bit 597" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS596 ,IRQS Status Bit 596" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS595 ,IRQS Status Bit 595" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS594 ,IRQS Status Bit 594" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS593 ,IRQS Status Bit 593" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS592 ,IRQS Status Bit 592" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS591 ,IRQS Status Bit 591" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS590 ,IRQS Status Bit 590" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS589 ,IRQS Status Bit 589" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS588 ,IRQS Status Bit 588" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS587 ,IRQS Status Bit 587" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS586 ,IRQS Status Bit 586" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS585 ,IRQS Status Bit 585" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS584 ,IRQS Status Bit 584" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS583 ,IRQS Status Bit 583" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS582 ,IRQS Status Bit 582" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS581 ,IRQS Status Bit 581" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS580 ,IRQS Status Bit 580" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS579 ,IRQS Status Bit 579" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS578 ,IRQS Status Bit 578" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS577 ,IRQS Status Bit 577" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS576 ,IRQS Status Bit 576" "Low,High"
|
|
else
|
|
rgroup.long 0x0D4C++0x03
|
|
line.long 0x0 "GICD_SPISR18,Shared Peripheral Interrupt Status Register 18"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x14)
|
|
rgroup.long 0x0D50++0x03
|
|
line.long 0x0 "GICD_SPISR19,Shared Peripheral Interrupt Status Register 19"
|
|
bitfld.long 0x00 31. " IRQS639 ,IRQS Status Bit 639" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS638 ,IRQS Status Bit 638" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS637 ,IRQS Status Bit 637" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS636 ,IRQS Status Bit 636" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS635 ,IRQS Status Bit 635" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS634 ,IRQS Status Bit 634" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS633 ,IRQS Status Bit 633" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS632 ,IRQS Status Bit 632" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS631 ,IRQS Status Bit 631" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS630 ,IRQS Status Bit 630" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS629 ,IRQS Status Bit 629" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS628 ,IRQS Status Bit 628" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS627 ,IRQS Status Bit 627" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS626 ,IRQS Status Bit 626" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS625 ,IRQS Status Bit 625" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS624 ,IRQS Status Bit 624" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS623 ,IRQS Status Bit 623" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS622 ,IRQS Status Bit 622" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS621 ,IRQS Status Bit 621" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS620 ,IRQS Status Bit 620" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS619 ,IRQS Status Bit 619" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS618 ,IRQS Status Bit 618" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS617 ,IRQS Status Bit 617" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS616 ,IRQS Status Bit 616" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS615 ,IRQS Status Bit 615" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS614 ,IRQS Status Bit 614" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS613 ,IRQS Status Bit 613" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS612 ,IRQS Status Bit 612" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS611 ,IRQS Status Bit 611" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS610 ,IRQS Status Bit 610" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS609 ,IRQS Status Bit 609" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS608 ,IRQS Status Bit 608" "Low,High"
|
|
else
|
|
rgroup.long 0x0D50++0x03
|
|
line.long 0x0 "GICD_SPISR19,Shared Peripheral Interrupt Status Register 19"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x15)
|
|
rgroup.long 0x0D54++0x03
|
|
line.long 0x0 "GICD_SPISR20,Shared Peripheral Interrupt Status Register 20"
|
|
bitfld.long 0x00 31. " IRQS671 ,IRQS Status Bit 671" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS670 ,IRQS Status Bit 670" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS669 ,IRQS Status Bit 669" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS668 ,IRQS Status Bit 668" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS667 ,IRQS Status Bit 667" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS666 ,IRQS Status Bit 666" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS665 ,IRQS Status Bit 665" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS664 ,IRQS Status Bit 664" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS663 ,IRQS Status Bit 663" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS662 ,IRQS Status Bit 662" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS661 ,IRQS Status Bit 661" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS660 ,IRQS Status Bit 660" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS659 ,IRQS Status Bit 659" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS658 ,IRQS Status Bit 658" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS657 ,IRQS Status Bit 657" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS656 ,IRQS Status Bit 656" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS655 ,IRQS Status Bit 655" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS654 ,IRQS Status Bit 654" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS653 ,IRQS Status Bit 653" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS652 ,IRQS Status Bit 652" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS651 ,IRQS Status Bit 651" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS650 ,IRQS Status Bit 650" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS649 ,IRQS Status Bit 649" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS648 ,IRQS Status Bit 648" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS647 ,IRQS Status Bit 647" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS646 ,IRQS Status Bit 646" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS645 ,IRQS Status Bit 645" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS644 ,IRQS Status Bit 644" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS643 ,IRQS Status Bit 643" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS642 ,IRQS Status Bit 642" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS641 ,IRQS Status Bit 641" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS640 ,IRQS Status Bit 640" "Low,High"
|
|
else
|
|
rgroup.long 0x0D54++0x03
|
|
line.long 0x0 "GICD_SPISR20,Shared Peripheral Interrupt Status Register 20"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x16)
|
|
rgroup.long 0x0D58++0x03
|
|
line.long 0x0 "GICD_SPISR21,Shared Peripheral Interrupt Status Register 21"
|
|
bitfld.long 0x00 31. " IRQS703 ,IRQS Status Bit 703" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS702 ,IRQS Status Bit 702" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS701 ,IRQS Status Bit 701" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS700 ,IRQS Status Bit 700" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS699 ,IRQS Status Bit 699" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS698 ,IRQS Status Bit 698" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS697 ,IRQS Status Bit 697" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS696 ,IRQS Status Bit 696" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS695 ,IRQS Status Bit 695" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS694 ,IRQS Status Bit 694" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS693 ,IRQS Status Bit 693" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS692 ,IRQS Status Bit 692" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS691 ,IRQS Status Bit 691" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS690 ,IRQS Status Bit 690" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS689 ,IRQS Status Bit 689" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS688 ,IRQS Status Bit 688" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS687 ,IRQS Status Bit 687" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS686 ,IRQS Status Bit 686" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS685 ,IRQS Status Bit 685" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS684 ,IRQS Status Bit 684" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS683 ,IRQS Status Bit 683" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS682 ,IRQS Status Bit 682" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS681 ,IRQS Status Bit 681" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS680 ,IRQS Status Bit 680" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS679 ,IRQS Status Bit 679" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS678 ,IRQS Status Bit 678" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS677 ,IRQS Status Bit 677" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS676 ,IRQS Status Bit 676" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS675 ,IRQS Status Bit 675" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS674 ,IRQS Status Bit 674" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS673 ,IRQS Status Bit 673" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS672 ,IRQS Status Bit 672" "Low,High"
|
|
else
|
|
rgroup.long 0x0D58++0x03
|
|
line.long 0x0 "GICD_SPISR21,Shared Peripheral Interrupt Status Register 21"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x17)
|
|
rgroup.long 0x0D5C++0x03
|
|
line.long 0x0 "GICD_SPISR22,Shared Peripheral Interrupt Status Register 22"
|
|
bitfld.long 0x00 31. " IRQS735 ,IRQS Status Bit 735" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS734 ,IRQS Status Bit 734" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS733 ,IRQS Status Bit 733" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS732 ,IRQS Status Bit 732" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS731 ,IRQS Status Bit 731" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS730 ,IRQS Status Bit 730" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS729 ,IRQS Status Bit 729" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS728 ,IRQS Status Bit 728" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS727 ,IRQS Status Bit 727" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS726 ,IRQS Status Bit 726" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS725 ,IRQS Status Bit 725" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS724 ,IRQS Status Bit 724" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS723 ,IRQS Status Bit 723" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS722 ,IRQS Status Bit 722" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS721 ,IRQS Status Bit 721" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS720 ,IRQS Status Bit 720" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS719 ,IRQS Status Bit 719" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS718 ,IRQS Status Bit 718" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS717 ,IRQS Status Bit 717" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS716 ,IRQS Status Bit 716" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS715 ,IRQS Status Bit 715" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS714 ,IRQS Status Bit 714" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS713 ,IRQS Status Bit 713" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS712 ,IRQS Status Bit 712" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS711 ,IRQS Status Bit 711" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS710 ,IRQS Status Bit 710" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS709 ,IRQS Status Bit 709" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS708 ,IRQS Status Bit 708" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS707 ,IRQS Status Bit 707" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS706 ,IRQS Status Bit 706" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS705 ,IRQS Status Bit 705" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS704 ,IRQS Status Bit 704" "Low,High"
|
|
else
|
|
rgroup.long 0x0D5C++0x03
|
|
line.long 0x0 "GICD_SPISR22,Shared Peripheral Interrupt Status Register 22"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x18)
|
|
rgroup.long 0x060++0x03
|
|
line.long 0x0 "GICD_SPISR23,Shared Peripheral Interrupt Status Register 23"
|
|
bitfld.long 0x00 31. " IRQS767 ,IRQS Status Bit 767" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS766 ,IRQS Status Bit 766" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS765 ,IRQS Status Bit 765" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS764 ,IRQS Status Bit 764" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS763 ,IRQS Status Bit 763" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS762 ,IRQS Status Bit 762" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS761 ,IRQS Status Bit 761" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS760 ,IRQS Status Bit 760" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS759 ,IRQS Status Bit 759" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS758 ,IRQS Status Bit 758" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS757 ,IRQS Status Bit 757" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS756 ,IRQS Status Bit 756" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS755 ,IRQS Status Bit 755" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS754 ,IRQS Status Bit 754" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS753 ,IRQS Status Bit 753" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS752 ,IRQS Status Bit 752" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS751 ,IRQS Status Bit 751" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS750 ,IRQS Status Bit 750" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS749 ,IRQS Status Bit 749" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS748 ,IRQS Status Bit 748" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS747 ,IRQS Status Bit 747" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS746 ,IRQS Status Bit 746" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS745 ,IRQS Status Bit 745" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS744 ,IRQS Status Bit 744" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS743 ,IRQS Status Bit 743" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS742 ,IRQS Status Bit 742" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS741 ,IRQS Status Bit 741" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS740 ,IRQS Status Bit 740" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS739 ,IRQS Status Bit 739" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS738 ,IRQS Status Bit 738" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS737 ,IRQS Status Bit 737" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS736 ,IRQS Status Bit 736" "Low,High"
|
|
else
|
|
rgroup.long 0x0D60++0x03
|
|
line.long 0x0 "GICD_SPISR23,Shared Peripheral Interrupt Status Register 23"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x19)
|
|
rgroup.long 0x0D64++0x03
|
|
line.long 0x0 "GICD_SPISR24,Shared Peripheral Interrupt Status Register 24"
|
|
bitfld.long 0x00 31. " IRQS799 ,IRQS Status Bit 799" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS798 ,IRQS Status Bit 798" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS797 ,IRQS Status Bit 797" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS796 ,IRQS Status Bit 796" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS795 ,IRQS Status Bit 795" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS794 ,IRQS Status Bit 794" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS793 ,IRQS Status Bit 793" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS792 ,IRQS Status Bit 792" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS791 ,IRQS Status Bit 791" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS790 ,IRQS Status Bit 790" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS789 ,IRQS Status Bit 789" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS788 ,IRQS Status Bit 788" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS787 ,IRQS Status Bit 787" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS786 ,IRQS Status Bit 786" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS785 ,IRQS Status Bit 785" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS784 ,IRQS Status Bit 784" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS783 ,IRQS Status Bit 783" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS782 ,IRQS Status Bit 782" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS781 ,IRQS Status Bit 781" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS780 ,IRQS Status Bit 780" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS779 ,IRQS Status Bit 779" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS778 ,IRQS Status Bit 778" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS777 ,IRQS Status Bit 777" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS776 ,IRQS Status Bit 776" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS775 ,IRQS Status Bit 775" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS774 ,IRQS Status Bit 774" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS773 ,IRQS Status Bit 773" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS772 ,IRQS Status Bit 772" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS771 ,IRQS Status Bit 771" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS770 ,IRQS Status Bit 770" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS769 ,IRQS Status Bit 769" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS768 ,IRQS Status Bit 768" "Low,High"
|
|
else
|
|
rgroup.long 0x0D64++0x03
|
|
line.long 0x0 "GICD_SPISR24,Shared Peripheral Interrupt Status Register 24"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1A)
|
|
rgroup.long 0x0D68++0x03
|
|
line.long 0x0 "GICD_SPISR25,Shared Peripheral Interrupt Status Register 25"
|
|
bitfld.long 0x00 31. " IRQS831 ,IRQS Status Bit 831" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS830 ,IRQS Status Bit 830" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS829 ,IRQS Status Bit 829" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS828 ,IRQS Status Bit 828" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS827 ,IRQS Status Bit 827" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS826 ,IRQS Status Bit 826" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS825 ,IRQS Status Bit 825" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS824 ,IRQS Status Bit 824" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS823 ,IRQS Status Bit 823" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS822 ,IRQS Status Bit 822" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS821 ,IRQS Status Bit 821" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS820 ,IRQS Status Bit 820" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS819 ,IRQS Status Bit 819" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS818 ,IRQS Status Bit 818" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS817 ,IRQS Status Bit 817" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS816 ,IRQS Status Bit 816" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS815 ,IRQS Status Bit 815" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS814 ,IRQS Status Bit 814" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS813 ,IRQS Status Bit 813" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS812 ,IRQS Status Bit 812" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS811 ,IRQS Status Bit 811" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS810 ,IRQS Status Bit 810" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS809 ,IRQS Status Bit 809" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS808 ,IRQS Status Bit 808" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS807 ,IRQS Status Bit 807" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS806 ,IRQS Status Bit 806" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS805 ,IRQS Status Bit 805" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS804 ,IRQS Status Bit 804" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS803 ,IRQS Status Bit 803" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS802 ,IRQS Status Bit 802" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS801 ,IRQS Status Bit 801" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS800 ,IRQS Status Bit 800" "Low,High"
|
|
else
|
|
rgroup.long 0x0D68++0x03
|
|
line.long 0x0 "GICD_SPISR25,Shared Peripheral Interrupt Status Register 25"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1B)
|
|
rgroup.long 0x0D6C++0x03
|
|
line.long 0x0 "GICD_SPISR26,Shared Peripheral Interrupt Status Register 26"
|
|
bitfld.long 0x00 31. " IRQS863 ,IRQS Status Bit 863" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS862 ,IRQS Status Bit 862" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS861 ,IRQS Status Bit 861" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS860 ,IRQS Status Bit 860" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS859 ,IRQS Status Bit 859" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS858 ,IRQS Status Bit 858" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS857 ,IRQS Status Bit 857" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS856 ,IRQS Status Bit 856" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS855 ,IRQS Status Bit 855" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS854 ,IRQS Status Bit 854" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS853 ,IRQS Status Bit 853" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS852 ,IRQS Status Bit 852" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS851 ,IRQS Status Bit 851" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS850 ,IRQS Status Bit 850" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS849 ,IRQS Status Bit 849" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS848 ,IRQS Status Bit 848" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS847 ,IRQS Status Bit 847" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS846 ,IRQS Status Bit 846" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS845 ,IRQS Status Bit 845" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS844 ,IRQS Status Bit 844" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS843 ,IRQS Status Bit 843" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS842 ,IRQS Status Bit 842" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS841 ,IRQS Status Bit 841" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS840 ,IRQS Status Bit 840" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS839 ,IRQS Status Bit 839" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS838 ,IRQS Status Bit 838" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS837 ,IRQS Status Bit 837" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS836 ,IRQS Status Bit 836" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS835 ,IRQS Status Bit 835" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS834 ,IRQS Status Bit 834" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS833 ,IRQS Status Bit 833" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS832 ,IRQS Status Bit 832" "Low,High"
|
|
else
|
|
rgroup.long 0x0D6C++0x03
|
|
line.long 0x0 "GICD_SPISR26,Shared Peripheral Interrupt Status Register 26"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1C)
|
|
rgroup.long 0x0D70++0x03
|
|
line.long 0x0 "GICD_SPISR27,Shared Peripheral Interrupt Status Register 27"
|
|
bitfld.long 0x00 31. " IRQS895 ,IRQS Status Bit 895" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS894 ,IRQS Status Bit 894" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS893 ,IRQS Status Bit 893" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS892 ,IRQS Status Bit 892" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS891 ,IRQS Status Bit 891" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS890 ,IRQS Status Bit 890" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS889 ,IRQS Status Bit 889" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS888 ,IRQS Status Bit 888" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS887 ,IRQS Status Bit 887" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS886 ,IRQS Status Bit 886" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS885 ,IRQS Status Bit 885" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS884 ,IRQS Status Bit 884" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS883 ,IRQS Status Bit 883" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS882 ,IRQS Status Bit 882" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS881 ,IRQS Status Bit 881" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS880 ,IRQS Status Bit 880" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS879 ,IRQS Status Bit 879" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS878 ,IRQS Status Bit 878" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS877 ,IRQS Status Bit 877" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS876 ,IRQS Status Bit 876" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS875 ,IRQS Status Bit 875" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS874 ,IRQS Status Bit 874" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS873 ,IRQS Status Bit 873" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS872 ,IRQS Status Bit 872" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS871 ,IRQS Status Bit 871" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS870 ,IRQS Status Bit 870" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS869 ,IRQS Status Bit 869" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS868 ,IRQS Status Bit 868" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS867 ,IRQS Status Bit 867" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS866 ,IRQS Status Bit 866" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS865 ,IRQS Status Bit 865" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS864 ,IRQS Status Bit 864" "Low,High"
|
|
else
|
|
rgroup.long 0x0D70++0x03
|
|
line.long 0x0 "GICD_SPISR27,Shared Peripheral Interrupt Status Register 27"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1D)
|
|
rgroup.long 0x0D74++0x03
|
|
line.long 0x0 "GICD_SPISR28,Shared Peripheral Interrupt Status Register 28"
|
|
bitfld.long 0x00 31. " IRQS927 ,IRQS Status Bit 927" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS926 ,IRQS Status Bit 926" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS925 ,IRQS Status Bit 925" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS924 ,IRQS Status Bit 924" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS923 ,IRQS Status Bit 923" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS922 ,IRQS Status Bit 922" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS921 ,IRQS Status Bit 921" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS920 ,IRQS Status Bit 920" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS919 ,IRQS Status Bit 919" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS918 ,IRQS Status Bit 918" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS917 ,IRQS Status Bit 917" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS916 ,IRQS Status Bit 916" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS915 ,IRQS Status Bit 915" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS914 ,IRQS Status Bit 914" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS913 ,IRQS Status Bit 913" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS912 ,IRQS Status Bit 912" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS911 ,IRQS Status Bit 911" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS910 ,IRQS Status Bit 910" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS909 ,IRQS Status Bit 909" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS908 ,IRQS Status Bit 908" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS907 ,IRQS Status Bit 907" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS906 ,IRQS Status Bit 906" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS905 ,IRQS Status Bit 905" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS904 ,IRQS Status Bit 904" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS903 ,IRQS Status Bit 903" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS902 ,IRQS Status Bit 902" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS901 ,IRQS Status Bit 901" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS900 ,IRQS Status Bit 900" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS899 ,IRQS Status Bit 899" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS898 ,IRQS Status Bit 898" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS897 ,IRQS Status Bit 897" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS896 ,IRQS Status Bit 896" "Low,High"
|
|
else
|
|
rgroup.long 0x0D74++0x03
|
|
line.long 0x0 "GICD_SPISR28,Shared Peripheral Interrupt Status Register 28"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1E)
|
|
rgroup.long 0x0D78++0x03
|
|
line.long 0x0 "GICD_SPISR29,Shared Peripheral Interrupt Status Register 29"
|
|
bitfld.long 0x00 31. " IRQS959 ,IRQS Status Bit 959" "Low,High"
|
|
bitfld.long 0x00 30. " IRQS958 ,IRQS Status Bit 958" "Low,High"
|
|
bitfld.long 0x00 29. " IRQS957 ,IRQS Status Bit 957" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " IRQS956 ,IRQS Status Bit 956" "Low,High"
|
|
bitfld.long 0x00 27. " IRQS955 ,IRQS Status Bit 955" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS954 ,IRQS Status Bit 954" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS953 ,IRQS Status Bit 953" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS952 ,IRQS Status Bit 952" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS951 ,IRQS Status Bit 951" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS950 ,IRQS Status Bit 950" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS949 ,IRQS Status Bit 949" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS948 ,IRQS Status Bit 948" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS947 ,IRQS Status Bit 947" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS946 ,IRQS Status Bit 946" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS945 ,IRQS Status Bit 945" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS944 ,IRQS Status Bit 944" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS943 ,IRQS Status Bit 943" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS942 ,IRQS Status Bit 942" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS941 ,IRQS Status Bit 941" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS940 ,IRQS Status Bit 940" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS939 ,IRQS Status Bit 939" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS938 ,IRQS Status Bit 938" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS937 ,IRQS Status Bit 937" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS936 ,IRQS Status Bit 936" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS935 ,IRQS Status Bit 935" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS934 ,IRQS Status Bit 934" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS933 ,IRQS Status Bit 933" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS932 ,IRQS Status Bit 932" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS931 ,IRQS Status Bit 931" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS930 ,IRQS Status Bit 930" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS929 ,IRQS Status Bit 929" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS928 ,IRQS Status Bit 928" "Low,High"
|
|
else
|
|
rgroup.long 0x0D78++0x03
|
|
line.long 0x0 "GICD_SPISR29,Shared Peripheral Interrupt Status Register 29"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if (((per.l(ad:0x7d001000+0x04))&0x0000001F)>=0x1F)
|
|
rgroup.long 0x0D7C++0x03
|
|
line.long 0x0 "GICD_SPISR30,Shared Peripheral Interrupt Status Register 30"
|
|
bitfld.long 0x00 27. " IRQS987 ,IRQS Status Bit 987" "Low,High"
|
|
bitfld.long 0x00 26. " IRQS986 ,IRQS Status Bit 986" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IRQS985 ,IRQS Status Bit 985" "Low,High"
|
|
bitfld.long 0x00 24. " IRQS984 ,IRQS Status Bit 984" "Low,High"
|
|
bitfld.long 0x00 23. " IRQS983 ,IRQS Status Bit 983" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " IRQS982 ,IRQS Status Bit 982" "Low,High"
|
|
bitfld.long 0x00 21. " IRQS981 ,IRQS Status Bit 981" "Low,High"
|
|
bitfld.long 0x00 20. " IRQS980 ,IRQS Status Bit 980" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IRQS979 ,IRQS Status Bit 979" "Low,High"
|
|
bitfld.long 0x00 18. " IRQS978 ,IRQS Status Bit 978" "Low,High"
|
|
bitfld.long 0x00 17. " IRQS977 ,IRQS Status Bit 977" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " IRQS976 ,IRQS Status Bit 976" "Low,High"
|
|
bitfld.long 0x00 15. " IRQS975 ,IRQS Status Bit 975" "Low,High"
|
|
bitfld.long 0x00 14. " IRQS974 ,IRQS Status Bit 974" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IRQS973 ,IRQS Status Bit 973" "Low,High"
|
|
bitfld.long 0x00 12. " IRQS972 ,IRQS Status Bit 972" "Low,High"
|
|
bitfld.long 0x00 11. " IRQS971 ,IRQS Status Bit 971" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IRQS970 ,IRQS Status Bit 970" "Low,High"
|
|
bitfld.long 0x00 9. " IRQS969 ,IRQS Status Bit 969" "Low,High"
|
|
bitfld.long 0x00 8. " IRQS968 ,IRQS Status Bit 968" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IRQS967 ,IRQS Status Bit 967" "Low,High"
|
|
bitfld.long 0x00 6. " IRQS966 ,IRQS Status Bit 966" "Low,High"
|
|
bitfld.long 0x00 5. " IRQS965 ,IRQS Status Bit 965" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " IRQS964 ,IRQS Status Bit 964" "Low,High"
|
|
bitfld.long 0x00 3. " IRQS963 ,IRQS Status Bit 963" "Low,High"
|
|
bitfld.long 0x00 2. " IRQS962 ,IRQS Status Bit 962" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IRQS961 ,IRQS Status Bit 961" "Low,High"
|
|
bitfld.long 0x00 0. " IRQS960 ,IRQS Status Bit 960" "Low,High"
|
|
else
|
|
rgroup.long 0x0D7C++0x03
|
|
line.long 0x0 "GICD_SPISR30,Shared Peripheral Interrupt Status Register 30"
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 25.
|
|
tree "Software Generated Interrupt"
|
|
if (((per.l(ad:0x7d001000+0x04))&0x400)==0x400)
|
|
wgroup.long 0x0F00++0x03
|
|
line.long 0x00 "GICD_SGIR,Software Generated Interrupt Register"
|
|
bitfld.long 0x00 24.--25. " TLF ,Target List Filter" "TargetList,All CPUs,Request CPU,?..."
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTL ,CPU Target List"
|
|
textline " "
|
|
bitfld.long 0x00 15. " NSATT ,NSATT" "Secure,Non-secure"
|
|
bitfld.long 0x00 0.--3. " SGINTID ,SGI Interrupt ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
else
|
|
wgroup.long 0x0F00++0x03
|
|
line.long 0x00 "GICD_SGIR,Software Generated Interrupt Register"
|
|
bitfld.long 0x00 24.--25. " TLF ,Target List Filter" "TargetList,All CPUs,Request CPU,?..."
|
|
hexmask.long.byte 0x00 16.--23. 1. " CPUTL ,CPU Target List"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SGINTID ,SGI Interrupt ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
endif
|
|
group.long 0x0F20++0x03
|
|
line.long 0x00 "GICD_SET/CLR_PENDSGIR0,SGI Set/Clear Pending Register 0"
|
|
setclrfld.long 0x00 31. 0x00 31. -0x10 31. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. -0x10 30. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. -0x10 29. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. -0x10 28. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. -0x10 27. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. -0x10 26. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. -0x10 25. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. -0x10 24. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. -0x10 23. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. -0x10 22. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. -0x10 21. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. -0x10 20. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. -0x10 19. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. -0x10 18. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. -0x10 17. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. -0x10 16. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. -0x10 15. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. -0x10 14. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. -0x10 13. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. -0x10 12. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. -0x10 11. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. -0x10 10. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. -0x10 9. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. -0x10 8. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. -0x10 7. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. -0x10 6. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. -0x10 5. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. -0x10 4. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. -0x10 3. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. -0x10 2. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. -0x10 1. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. -0x10 0. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
group.long 0x0F24++0x03
|
|
line.long 0x00 "GICD_SET/CLR_PENDSGIR1,SGI Set/Clear Pending Register 1"
|
|
setclrfld.long 0x00 31. 0x00 31. -0x10 31. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. -0x10 30. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. -0x10 29. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. -0x10 28. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. -0x10 27. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. -0x10 26. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. -0x10 25. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. -0x10 24. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. -0x10 23. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. -0x10 22. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. -0x10 21. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. -0x10 20. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. -0x10 19. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. -0x10 18. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. -0x10 17. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. -0x10 16. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. -0x10 15. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. -0x10 14. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. -0x10 13. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. -0x10 12. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. -0x10 11. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. -0x10 10. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. -0x10 9. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. -0x10 8. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. -0x10 7. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. -0x10 6. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. -0x10 5. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. -0x10 4. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. -0x10 3. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. -0x10 2. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. -0x10 1. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. -0x10 0. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
group.long 0x0F28++0x03
|
|
line.long 0x00 "GICD_SET/CLR_PENDSGIR2,SGI Set/Clear Pending Register 2"
|
|
setclrfld.long 0x00 31. 0x00 31. -0x10 31. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. -0x10 30. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. -0x10 29. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. -0x10 28. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. -0x10 27. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. -0x10 26. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. -0x10 25. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. -0x10 24. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. -0x10 23. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. -0x10 22. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. -0x10 21. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. -0x10 20. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. -0x10 19. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. -0x10 18. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. -0x10 17. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. -0x10 16. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. -0x10 15. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. -0x10 14. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. -0x10 13. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. -0x10 12. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. -0x10 11. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. -0x10 10. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. -0x10 9. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. -0x10 8. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. -0x10 7. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. -0x10 6. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. -0x10 5. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. -0x10 4. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. -0x10 3. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. -0x10 2. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. -0x10 1. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. -0x10 0. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
group.long 0x0F2C++0x03
|
|
line.long 0x00 "GICD_SET/CLR_PENDSGIR2,SGI Set/Clear Pending Register 3"
|
|
setclrfld.long 0x00 31. 0x00 31. -0x10 31. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. -0x10 30. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. -0x10 29. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. -0x10 28. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. -0x10 27. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. -0x10 26. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. -0x10 25. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. -0x10 24. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. -0x10 23. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. -0x10 22. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. -0x10 21. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. -0x10 20. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. -0x10 19. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. -0x10 18. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. -0x10 17. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. -0x10 16. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. -0x10 15. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. -0x10 14. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. -0x10 13. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. -0x10 12. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. -0x10 11. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. -0x10 10. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. -0x10 9. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. -0x10 8. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. -0x10 7. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. -0x10 6. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. -0x10 5. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. -0x10 4. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. -0x10 3. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. -0x10 2. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. -0x10 1. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. -0x10 0. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled"
|
|
tree.end
|
|
width 12.
|
|
tree "Peripheral/Component ID Registers"
|
|
rgroup.byte 0x0FE0++0x00
|
|
line.byte 0x00 "GICD_PIDR0,Peripheral ID0 Register"
|
|
hexmask.byte 0x00 0.--7. 1. " DEVID ,DevID field"
|
|
rgroup.byte 0x0FE4++0x00
|
|
line.byte 0x00 "GICD_PIDR1,Peripheral ID1 Register"
|
|
bitfld.byte 0x00 4.--7. " ARCHID ,ArchID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.byte 0x00 0.--3. " DEVID ,DevID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.byte 0x0FE8++0x00
|
|
line.byte 0x00 "GICD_PIDR2,Peripheral ID2 Register"
|
|
bitfld.byte 0x00 4.--7. " ARCHREV ,ArchRev field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.byte 0x00 3. " UJEPCODE ,UsesJEPcode field" "Low,High"
|
|
bitfld.byte 0x00 0.--2. " ARCHID ,ArchID field" "0,1,2,3,4,5,6,7"
|
|
rgroup.byte 0x0FEC++0x00
|
|
line.byte 0x00 "GICD_PIDR3,Peripheral ID3 Register"
|
|
bitfld.byte 0x00 4.--7. " REVID ,Revision field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.byte 0x0FD0++0x00
|
|
line.byte 0x00 "GICD_PIDR4,Peripheral ID4 Register"
|
|
bitfld.byte 0x00 0.--3. " CC ,ContinuationCode field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.byte 0xFD4++0x00
|
|
line.byte 0x00 "GICD_PIDR5,Peripheral ID5 Register"
|
|
rgroup.byte 0xFD8++0x00
|
|
line.byte 0x00 "GICD_PIDR6,Peripheral ID6 Register"
|
|
rgroup.byte 0xFDC++0x00
|
|
line.byte 0x00 "GICD_PIDR7,Peripheral ID7 Register"
|
|
textline " "
|
|
rgroup.byte 0xFF0++0x00
|
|
line.byte 0x00 "GICD_CIDR0,Component ID0 Register"
|
|
hexmask.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery"
|
|
rgroup.byte 0xFF4++0x00
|
|
line.byte 0x00 "GICD_CIDR1,Component ID1 Register"
|
|
hexmask.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery"
|
|
rgroup.byte 0xFF8++0x00
|
|
line.byte 0x00 "GICD_CIDR2,Component ID2 Register"
|
|
hexmask.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery"
|
|
rgroup.byte 0xFFC++0x00
|
|
line.byte 0x00 "GICD_CIDR3,Component ID3 Register"
|
|
hexmask.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery"
|
|
textline " "
|
|
tree.end
|
|
tree.end
|
|
width 0x0B
|
|
base ad:0x7d002000
|
|
width 17.
|
|
tree "CPU Interface"
|
|
if (((per.l(ad:0x7d001000+0x04))&0x400)==0x0)
|
|
group.long 0x0000++0x03
|
|
line.long 0x00 "GICC_CTLR,CPU Interface Control Register"
|
|
bitfld.long 0x00 9. " EOIMODENS ,Controls the behavior of Non-secure accesses to the GICC_EOIR and GICC_DIR registers" "Priority drop/Deactivate,Priority drop"
|
|
bitfld.long 0x00 6. " IRQBYPDISGRP1 ,When the signaling of IRQs by the CPU interface is disabled this bit partly controls whether the bypass IRQ signal is signaled to the processor" "Signaled,Not signaled"
|
|
bitfld.long 0x00 5. " FIQBYPDISGRP1 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ENABLEGRP1 ,Enable for the signaling of Group 1 interrupts by the CPU interface to the connected processor" "Disabled,Enabled"
|
|
textline " "
|
|
textline " "
|
|
else
|
|
if PER.ADDRESS.isSECUREEX(ad:0x7d002000)
|
|
group.long 0x0000++0x03
|
|
line.long 0x00 "GICC_CTLR,CPU Interface Control Register (Secure access)"
|
|
bitfld.long 0x00 10. " EOIMODENS ,Controls the behavior of Non-secure accesses to the GICC_EOIR and GICC_DIR registers" "Priority drop/Deactivate,Priority drop"
|
|
bitfld.long 0x00 9. " EOIMODES ,Controls the behavior of accesses to GICC_EOIR and GICC_DIR registers" "Priority drop/Deactivate,Priority drop"
|
|
bitfld.long 0x00 8. " IRQBYPDISGRP1 ,When the signaling of IRQs by the CPU interface is disabled this bit partly controls whether the bypass IRQ signal is signaled to the processor" "Signaled,Not signaled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FIQBYPDISGRP1 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled"
|
|
bitfld.long 0x00 6. " IRQBYPDISGRP0 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled"
|
|
bitfld.long 0x00 5. " FIQBYPDISGRP0 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CBPR ,Controls whether the GICC_BPR provides common control to Group 0 and Group 1 interrupts" "BPR/ABPR split,BPR common"
|
|
bitfld.long 0x00 3. " FIQEN ,Controls whether the CPU interface signals Group 0 interrupts to a target processor using the FIQ or the IRQ signal" "IRQ,FIQ"
|
|
bitfld.long 0x00 2. " ACKCTL ,Acknowledge Control" "ID 1022 interrupt,Corresponding interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ENABLEGRP1 ,Enable for the signaling of Group 1 interrupts by the CPU interface to the connected processor" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ENABLEGRP0 ,Enable for the signaling of Group 0 interrupts by the CPU interface to the connected processor" "Disabled,Enabled"
|
|
else
|
|
group.long 0x0000++0x03
|
|
line.long 0x00 "GICC_CTLR,CPU Interface Control Register (Non-secure access)"
|
|
bitfld.long 0x00 9. " EOIMODENS ,Controls the behavior of Non-secure accesses to the GICC_EOIR and GICC_DIR registers" "Priority drop/Deactivate,Priority drop"
|
|
bitfld.long 0x00 6. " IRQBYPDISGRP1 ,When the signaling of IRQs by the CPU interface is disabled this bit partly controls whether the bypass IRQ signal is signaled to the processor" "Signaled,Not signaled"
|
|
bitfld.long 0x00 5. " FIQBYPDISGRP1 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ENABLEGRP1 ,Enable for the signaling of Group 1 interrupts by the CPU interface to the connected processor" "Disabled,Enabled"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
endif
|
|
group.long 0x0004++0x03
|
|
line.long 0x00 "GICC_PMR,Interrupt Priority Mask Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Priority mask level for CPU interface"
|
|
if (((per.l(ad:0x7d001000+0x04))&0x400)==0x400)
|
|
if PER.ADDRESS.isSECUREEX(ad:0x7d002000+0x0008)
|
|
group.long 0x0008++0x03
|
|
line.long 0x00 "GICC_BPR,Binary Point Register (Secure access)"
|
|
bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
|
|
else
|
|
group.long 0x0008++0x03
|
|
line.long 0x00 "GICC_BPR,Binary Point Register (Non-secure access)"
|
|
bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,Reserved,[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
|
|
endif
|
|
else
|
|
group.long 0x0008++0x03
|
|
line.long 0x00 "GICC_BPR,Binary Point Register"
|
|
bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,Reserved,[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
|
|
endif
|
|
hgroup.long 0x000C++0x03
|
|
hide.long 0x00 "GICC_IAR,Interrupt Acknowledge Register"
|
|
in
|
|
wgroup.long 0x0010++0x03
|
|
line.long 0x00 "GICC_EOIR,End Of Interrupt Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,The Interrupt ID value from the corresponding GICC_IAR access"
|
|
rgroup.long 0x0014++0x03
|
|
line.long 0x00 "GICC_RPR,Running Priority Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,The current running priority on the CPU interface"
|
|
rgroup.long 0x0018++0x03
|
|
line.long 0x00 "GICC_HPIR,Highest Priority Pending Interrupt Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,The interrupt ID of the highest priority pending interrupt"
|
|
if (((per.l(ad:0x7d001000+0x04))&0x400)==0x400)
|
|
group.long 0x001C++0x03
|
|
line.long 0x00 "GICC_ABPR,Aliased Binary Point Register"
|
|
bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
|
|
else
|
|
hgroup.long 0x001C++0x03
|
|
hide.long 0x00 "GICC_ABPR,Aliased Binary Point Register"
|
|
endif
|
|
hgroup.long 0x0020++0x003
|
|
hide.long 0x00 "GICC_AIAR,Aliased Interrupt Acknowledge Register"
|
|
in
|
|
if (((per.l(ad:0x7d001000+0x04))&0x400)==0x400)
|
|
wgroup.long 0x0024++0x03
|
|
line.long 0x00 "GICC_AEOIR,Aliased End of Interrupt Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,The Interrupt ID value from the corresponding GICC_IAR access"
|
|
rgroup.long 0x0028++0x03
|
|
line.long 0x00 "GICC_AHPPIR,Aliased Highest Priority Pending Interrupt Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,The interrupt ID of the highest priority pending interrupt"
|
|
else
|
|
hgroup.long 0x0024++0x03
|
|
hide.long 0x00 "GICC_AEOIR,Aliased End of Interrupt Register"
|
|
hgroup.long 0x0028++0x03
|
|
hide.long 0x00 "GICC_AHPPIR,Aliased Highest Priority Pending Interrupt Register"
|
|
endif
|
|
group.long 0x00D0++0x03
|
|
line.long 0x00 "GICC_APR0,Active Priorities Register"
|
|
if (((per.l(ad:0x7d001000+0x04))&0x400)==0x400)
|
|
group.long 0x00E0++0x03
|
|
line.long 0x00 "GICC_NSAPR0,Non-Secure Active Priorities Register"
|
|
else
|
|
hgroup.long 0x00E0++0x03
|
|
hide.long 0x00 "GICC_NSAPR0,Non-Secure Active Priorities Register"
|
|
endif
|
|
rgroup.long 0x00FC++0x03
|
|
line.long 0x00 "GICC_IIDR,CPU and Virtual CPU Interface Identification Register"
|
|
hexmask.long.word 0x00 20.--31. 1. " PRODID ,Product ID"
|
|
bitfld.long 0x00 16.--19. " ARCH_VER ,Identifies the architecture version of the GIC" "GICv1,GICv1,GICv2,GICv2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " REV ,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer"
|
|
wgroup.long 0x1000++0x03
|
|
line.long 0x00 "GICC_DIR,Deactivate Interrupt Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation this field identifies the processor that requested the interrupt" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " INTID ,The interrupt ID"
|
|
tree.end
|
|
sif CPU.FEATURE(hypervisor)
|
|
base ad:0x7d004000
|
|
width 12.
|
|
tree "Virtual CPU Control Interface"
|
|
group.long 0x0000++0x03
|
|
line.long 0x00 "GICH_HCR,Hypervisor Control Register"
|
|
bitfld.long 0x00 27.--31. " EOICOUNT ,Counts the number of EOIs received that do not have a corresponding entry in the List registers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 7. " VGRP1DIE ,VM Disable Group 1 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " VGRP1EIE ,VM Enable Group 1 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " VGRP0DIE ,VM Disable Group 0 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VGRP0EIE ,VM Disable Group 0 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " NPIE ,No Pending Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LRENPIE ,List Register Entry Not Present Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " UIE ,Underflow Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
|
|
rgroup.long 0x0004++0x03
|
|
line.long 0x00 "GICH_VTR,VGIC Type Register"
|
|
bitfld.long 0x00 29.--31. " PRIBITS ,Number of priority bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRI levels,?..."
|
|
textline " "
|
|
bitfld.long 0x00 26.--28. " PREBITS ,Number of pre-emption bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRE levels,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--5. " LISTREGS ,List regs number" "Reserved,Reserved,Reserved,4 lists,?..."
|
|
group.long 0x008++0x03
|
|
line.long 0x00 "GICH_VMCR,Virtual Machine Control Register"
|
|
bitfld.long 0x00 27.--31. " VMPRIMASK ,Alias of GICV_PMR.Priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 21.--23. " VMBP ,Alias of GICV_BPR.Binary point" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 18.--20. " VMABP ,Alias of GICV_ABPR.Binary point" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 9. " VEM ,Alias of GICV_CTLR.EOImode" "0,1"
|
|
bitfld.long 0x00 4. " VMCBPR ,Alias of GICV_CTLR.CBPR" "0,1"
|
|
bitfld.long 0x00 3. " VMFIQEN ,Alias of GICV_CTLR.FIQEn" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 2. " VMACKCTL ,Alias of GICV_CTLR.AckCtl" "0,1"
|
|
bitfld.long 0x00 1. " VMGRP1EN ,Alias of GICV_CTLR.EnableGrp1" "0,1"
|
|
bitfld.long 0x00 0. " VMGRP0EN ,Alias of GICV_CTLR.EnableGrp0" "0,1"
|
|
rgroup.long 0x0010++0x03
|
|
line.long 0x00 "GICH_MISR,Maintenance Interrupt Status Register"
|
|
bitfld.long 0x00 7. " VGRP1D ,Disabled Group 1 maintenance interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 6. " VGRP1E ,Enabled Group 1 maintenance interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " VGRP0D ,Disabled Group 0 maintenance interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 4. " VGRP0E ,Enabled Group 0 maintenance interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " NP ,No Pending maintenance interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " LRENP ,List Register Entry Not Present maintenance interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 1. " U ,Underflow maintenance interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " EOI ,EOI maintenance interrupt" "No interrupt,Interrupt"
|
|
rgroup.long 0x020++0x03
|
|
line.long 0x00 "GICH_EISR0,End of Interrupt Status Register"
|
|
bitfld.long 0x00 3. " STATUS3 ,EOI maintenance interrupt status for List register 3" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " STATUS2 ,EOI maintenance interrupt status for List register 2" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " STATUS1 ,EOI maintenance interrupt status for List register 1" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STATUS0 ,EOI maintenance interrupt status for List register 0" "No interrupt,Interrupt"
|
|
rgroup.long 0x0030++0x03
|
|
line.long 0x00 "GICH_ELSR0,Empty List register Status Register"
|
|
bitfld.long 0x00 3. " STATUS3 ,Emptiness status bit for List register 3" "Not empty,Empty"
|
|
bitfld.long 0x00 2. " STATUS2 ,Emptiness status bit for List register 2" "Not empty,Empty"
|
|
bitfld.long 0x00 1. " STATUS1 ,Emptiness status bit for List register 1" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 0. " STATUS0 ,Emptiness status bit for List register 0" "Not empty,Empty"
|
|
group.long 0x00F0++0x03
|
|
line.long 0x00 "GICH_APR0,Active Priorities Register"
|
|
bitfld.long 0x00 31. " APB31 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 30. " APB30 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 29. " APB29 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " APB28 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 27. " APB27 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 26. " APB26 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " APB25 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 24. " APB24 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 23. " APB23 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " APB22 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 21. " APB21 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 20. " APB20 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " APB19 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 18. " APB18 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 17. " APB17 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " APB16 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 15. " APB15 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 14. " APB14 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " APB13 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 12. " APB12 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 11. " APB11 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " APB10 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 9. " APB9 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 8. " APB8 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " APB7 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 6. " APB6 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 5. " APB5 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " APB4 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 3. " APB3 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 2. " APB2 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " APB1 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 0. " APB0 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
if (((per.l(ad:0x7d004000+0x100))&0x80000000)==0x80000000)
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "GICH_LR0,List Register 0"
|
|
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
|
|
bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1"
|
|
bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active"
|
|
textline " "
|
|
bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor"
|
|
hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR"
|
|
else
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "GICH_LR0,List Register 0"
|
|
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
|
|
bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1"
|
|
bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active"
|
|
textline " "
|
|
bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 19. " EOI ,Indicates whether this interrupt triggers an EOI maintenance interrupt" "Not asserted,Asserted"
|
|
bitfld.long 0x00 10.--12. " CPUID ,If the interrupt has the VirtualID for an SGI that is 0-15 this field shows the requesting CPU ID" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR"
|
|
endif
|
|
if (((per.l(ad:0x7d004000+0x104))&0x80000000)==0x80000000)
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "GICH_LR1,List Register 1"
|
|
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
|
|
bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1"
|
|
bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active"
|
|
textline " "
|
|
bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor"
|
|
hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR"
|
|
else
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "GICH_LR1,List Register 1"
|
|
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
|
|
bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1"
|
|
bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active"
|
|
textline " "
|
|
bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 19. " EOI ,Indicates whether this interrupt triggers an EOI maintenance interrupt" "Not asserted,Asserted"
|
|
bitfld.long 0x00 10.--12. " CPUID ,If the interrupt has the VirtualID for an SGI that is 0-15 this field shows the requesting CPU ID" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR"
|
|
endif
|
|
if (((per.l(ad:0x7d004000+0x108))&0x80000000)==0x80000000)
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "GICH_LR2,List Register 2"
|
|
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
|
|
bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1"
|
|
bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active"
|
|
textline " "
|
|
bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor"
|
|
hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR"
|
|
else
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "GICH_LR2,List Register 2"
|
|
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
|
|
bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1"
|
|
bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active"
|
|
textline " "
|
|
bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 19. " EOI ,Indicates whether this interrupt triggers an EOI maintenance interrupt" "Not asserted,Asserted"
|
|
bitfld.long 0x00 10.--12. " CPUID ,If the interrupt has the VirtualID for an SGI that is 0-15 this field shows the requesting CPU ID" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR"
|
|
endif
|
|
if (((per.l(ad:0x7d004000+0x10C))&0x80000000)==0x80000000)
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "GICH_LR3,List Register 3"
|
|
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
|
|
bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1"
|
|
bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active"
|
|
textline " "
|
|
bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor"
|
|
hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR"
|
|
else
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "GICH_LR3,List Register 3"
|
|
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
|
|
bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1"
|
|
bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active"
|
|
textline " "
|
|
bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 19. " EOI ,Indicates whether this interrupt triggers an EOI maintenance interrupt" "Not asserted,Asserted"
|
|
bitfld.long 0x00 10.--12. " CPUID ,If the interrupt has the VirtualID for an SGI that is 0-15 this field shows the requesting CPU ID" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR"
|
|
endif
|
|
tree.end
|
|
base ad:0x7d006000
|
|
width 12.
|
|
tree "Virtual CPU Interface"
|
|
group.long 0x0000++0x03
|
|
line.long 0x00 "GICV_CTLR,Virtual Machine Control Register"
|
|
bitfld.long 0x00 9. " EOIMODE ,Controls the behavior associated with the GICV_EOIR GICV_AEOIR and GICV_DIR registers" "Priority drop/Deactivate,Priority drop"
|
|
bitfld.long 0x00 4. " CBPR ,Controls whether the GICV_BPR controls both Group 0 and Group 1 virtual interrupts" "BPR/ABPR split,BPR common"
|
|
bitfld.long 0x00 3. " FIQEN ,Controls whether interrupts marked as Group 0 are presented as virtual FIQs" "IRQs,FIQs"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ACKCTL ,Acknowledge Control" "ID 1022 interrupt,Corresponding interrupt"
|
|
bitfld.long 0x00 1. " ENABLEGRP1 ,Enables the signaling of Group 1 virtual interrupts by the virtual CPU interface to the virtual machine" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ENABLEGRP0 ,Enables the signaling of Group 0 virtual interrupts by the virtual CPU interface to the virtual machine" "Disabled,Enabled"
|
|
group.long 0x0004++0x03
|
|
line.long 0x00 "GICV_PMR,VM Priority Mask Register"
|
|
bitfld.long 0x00 3.--7. " PRIORITY ,Priority mask level for CPU interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long 0x0008++0x03
|
|
line.long 0x00 "GICV_BPR,VM Binary Point Register"
|
|
bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
|
|
hgroup.long 0x000C++0x03
|
|
hide.long 0x00 "GICV_IAR,VM Interrupt Acknowledge Register"
|
|
in
|
|
wgroup.long 0x0010++0x03
|
|
line.long 0x00 "GICV_EOIR,VM End of Interrupt Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,The Interrupt ID value from the corresponding GICC_IAR access"
|
|
rgroup.long 0x0014++0x03
|
|
line.long 0x00 "GICV_RPR,VM Running Priority Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,The current running priority on the Virtual CPU interface"
|
|
rgroup.long 0x0018++0x03
|
|
line.long 0x00 "GICV_HPPIR,VM Highest Priority Pending Interrupt Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,The interrupt ID of the highest priority pending interrupt"
|
|
group.long 0x001C++0x03
|
|
line.long 0x00 "GICV_ABPR,VM Aliased Binary Point Register"
|
|
bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
|
|
hgroup.long 0x0020++0x03
|
|
hide.long 0x00 "GICV_AIAR,VM Aliased Interrupt Acknowledge Register"
|
|
in
|
|
wgroup.long 0x0024++0x03
|
|
line.long 0x00 "GICV_AEOIR,VM Aliased End of Interrupt Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,The Interrupt ID value from the corresponding GICC_IAR access"
|
|
rgroup.long 0x0028++0x03
|
|
line.long 0x00 "GICV_AHPPIR,VM Aliased Highest Priority Pending Interrupt Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,The interrupt ID of the highest priority pending interrupt"
|
|
group.long 0x00D0++0x03
|
|
line.long 0x00 "GICV_APR0,VM Active Priority Register"
|
|
bitfld.long 0x00 31. " APB31 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 30. " APB30 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 29. " APB29 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 28. " APB28 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 27. " APB27 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 26. " APB26 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " APB25 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 24. " APB24 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 23. " APB23 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " APB22 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 21. " APB21 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 20. " APB20 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " APB19 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 18. " APB18 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 17. " APB17 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 16. " APB16 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 15. " APB15 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 14. " APB14 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " APB13 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 12. " APB12 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 11. " APB11 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 10. " APB10 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 9. " APB9 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 8. " APB8 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " APB7 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 6. " APB6 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 5. " APB5 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 4. " APB4 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 3. " APB3 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 2. " APB2 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " APB1 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
bitfld.long 0x00 0. " APB0 ,Determines whether the corresponding preemption level is active" "Not active,Active"
|
|
rgroup.long 0x00FC++0x03
|
|
line.long 0x00 "GICV_IIDR,VM CPU Interface Identification Register"
|
|
hexmask.long.word 0x00 20.--31. 1. " PRODID ,Product ID"
|
|
bitfld.long 0x00 16.--19. " ARCH_VER ,Identifies the architecture version of the GIC" "GICv1,GICv2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " REV ,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer"
|
|
wgroup.long 0x1000++0x03
|
|
line.long 0x00 "GICV_DIR,VM Deactivate Interrupt Register"
|
|
bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation this field identifies the processor that requested the interrupt" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x00 0.--9. 1. " INTID ,The interrupt ID"
|
|
tree.end
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
endif
|
|
sif (CORENAME()=="CORTEXM0+")
|
|
tree.close "Core Registers (Cortex-M0+)"
|
|
AUTOINDENT.PUSH
|
|
AUTOINDENT.OFF
|
|
tree "System Control"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 0x8
|
|
if (CORENAME()=="CORTEXM1")
|
|
group.long 0x10++0x0b
|
|
line.long 0x00 "STCSR,SysTick Control and Status Register"
|
|
bitfld.long 0x00 16. " COUNTFLAG ,Returns 1 if timer counted to 0" "0,1"
|
|
bitfld.long 0x00 2. " CLKSOURCE ,Always reads as one" "No effect,Processor clock"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TICKINT ,Counting down to 0 " "No SysTick,SysTick"
|
|
bitfld.long 0x00 0. " ENABLE ,Counter enable" "Disabled,Enabled"
|
|
line.long 0x04 "STRVR,SysTick Reload Value Register"
|
|
hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,Value to load into the STCVR when the counter reaches 0"
|
|
line.long 0x08 "STCVR,SysTick Current Value Register"
|
|
hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Reads return the current value of the SysTick counter"
|
|
else
|
|
group.long 0x10++0x0b
|
|
line.long 0x00 "STCSR,SysTick Control and Status Register"
|
|
bitfld.long 0x00 16. " COUNTFLAG ,Returns 1 if timer counted to 0" "0,1"
|
|
bitfld.long 0x00 2. " CLKSOURCE ,Always reads as one" "External clock,Processor clock"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TICKINT ,Counting down to 0 " "No SysTick,SysTick"
|
|
bitfld.long 0x00 0. " ENABLE ,Counter enable" "Disabled,Enabled"
|
|
line.long 0x04 "STRVR,SysTick Reload Value Register"
|
|
hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,Value to load into the STCVR when the counter reaches 0"
|
|
line.long 0x08 "STCVR,SysTick Current Value Register"
|
|
hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Reads return the current value of the SysTick counter"
|
|
endif
|
|
if (CORENAME()=="CORTEXM1")
|
|
rgroup.long 0x1c++0x03
|
|
line.long 0x00 "STCR,SysTick Calibration Value Register"
|
|
bitfld.long 0x00 31. " NOREF ,Reads as one" "0,1"
|
|
bitfld.long 0x00 30. " SKEW ,Reads as zero" "0,1"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Indicates calibration value is not known"
|
|
else
|
|
rgroup.long 0x1c++0x03
|
|
line.long 0x00 "STCR,SysTick Calibration Value Register"
|
|
bitfld.long 0x00 31. " NOREF ,Indicates whether the IMPL_DEF reference clock is provided" "Implemented,Not implemented"
|
|
bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing subject to system clock skew errors"
|
|
endif
|
|
rgroup.long 0xd00++0x03
|
|
line.long 0x00 "CPUID,CPU ID Base Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Implementer code"
|
|
hexmask.long.byte 0x00 20.--23. 1. " VARIANT ,Implementation defined variant number"
|
|
textline " "
|
|
hexmask.long.byte 0x00 4.--15. 1. " PARTNO ,Number of processor within family"
|
|
hexmask.long.byte 0x00 0.--3. 1. " REVISION ,Implementation defined revision number"
|
|
group.long 0xd04++0x03
|
|
line.long 0x00 "ICSR,Interrupt Control State Register"
|
|
bitfld.long 0x00 31. " NMIPENDSET ,Setting this bit will activate an NMI" "No effect,Set pending"
|
|
bitfld.long 0x00 28. " PENDSVSET ,Set a pending PendSV interrupt" "No effect,Set pending"
|
|
textline " "
|
|
bitfld.long 0x00 27. " PENDSVCLR ,Clear a pending PendSV interrupt" "No effect,Clear pending"
|
|
bitfld.long 0x00 26. " PENDSTSET ,Set a pending SysTick" "No effect,Set pending"
|
|
textline " "
|
|
bitfld.long 0x00 25. " PENDSVCLR ,Clear a pending SysTick" "No effect,Clear pending"
|
|
bitfld.long 0x00 23. " ISRPREEMPT ,Pending exception service" "No service,Service"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ISRPENDING ,External interrupt pending flag" "No interrupt,Interrupt"
|
|
hexmask.long.byte 0x00 12.--17. 1. " VECTPENDING ,Active exception number field"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--5. 1. " VECTACTIVET ,Active exception number field"
|
|
if (CORENAME()=="CORTEXM0+")
|
|
group.long 0xd08++0x03
|
|
line.long 0x00 "VTOR,Vector Table Offset Register"
|
|
hexmask.long 0x00 7.--31. 0x80 " TBLOFF ,Vector table address"
|
|
else
|
|
textline " "
|
|
endif
|
|
group.long 0xd0c++0x03
|
|
line.long 0x00 "AIRCR,Application Interrupt and Reset Control Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " VECTKEY ,Vector Key"
|
|
bitfld.long 0x00 15. " ENDIANNESS ,Data endianness bit" "Little-endian,Big-endian"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYSRESETREQ ,System reset setup request" "No effect,Reset"
|
|
bitfld.long 0x00 1. " VECTCLRACTIVE ,Clears all active state information" "No clear,Clear"
|
|
group.long 0xd10++0x03
|
|
line.long 0x00 "SCR,System Control Register"
|
|
bitfld.long 0x00 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
|
|
bitfld.long 0x00 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
|
|
rgroup.long 0xd14++0x03
|
|
line.long 0x00 "CCR,Configuration and Control Register"
|
|
bitfld.long 0x00 9. " STKALIGN ,Indicates whether on exception entry all exceptions are entered with 8-byte stack alignment and the context to restore it is saved" "Reserved,Aligned"
|
|
bitfld.long 0x00 3. " UNALIGN_TRP ,Indicates that all unaligned accesses results in a Hard Fault" "Reserved,Trapped"
|
|
group.long 0xd1c++0x0b
|
|
line.long 0x00 "SHPR2,System Handler Priority Register 2"
|
|
bitfld.long 0x00 30.--31. " PRI_11 ,Priority of system handler 11-SVCall" "00,01,10,11"
|
|
line.long 0x04 "SHPR3,System Handler Priority Register 3"
|
|
bitfld.long 0x04 30.--31. " PRI_15 ,Priority of system handler 15-SysTick" "00,01,10,11"
|
|
bitfld.long 0x04 22.--23. " PRI_14 ,Priority of system handler 14- PendSV" "00,01,10,11"
|
|
line.long 0x08 "SHCSR,System Handler Control and State Register"
|
|
bitfld.long 0x08 15. " SVCALLPENDED ,Reads as 1 if SVCall is pending" "Not pending,Pending"
|
|
if (CORENAME()=="CORTEXM0+")
|
|
hgroup.long 0x08++0x03
|
|
hide.long 0x00 "ACTLR,Auxiliary Control Register"
|
|
else
|
|
textline " "
|
|
endif
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Memory Protection Unit (MPU)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 15.
|
|
rgroup.long 0xD90++0x03
|
|
line.long 0x00 "MPU_TYPE,MPU Type Register"
|
|
bitfld.long 0x00 8.--15. 1. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,?..."
|
|
group.long 0xD94++0x03
|
|
line.long 0x00 "MPU_CTRL,MPU Control Register"
|
|
bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled"
|
|
group.long 0xD98++0x03
|
|
line.long 0x00 "MPU_RNR,MPU Region Number Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR"
|
|
tree.close "MPU regions"
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0
|
|
group.long 0xD9C++0x03 "Region 0"
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 0 (not implemented)"
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1
|
|
group.long 0xD9C++0x03 "Region 1"
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 1 (not implemented)"
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2
|
|
group.long 0xD9C++0x03 "Region 2"
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 2 (not implemented)"
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3
|
|
group.long 0xD9C++0x03 "Region 3"
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 3 (not implemented)"
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4
|
|
group.long 0xD9C++0x03 "Region 4"
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 4 (not implemented)"
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5
|
|
group.long 0xD9C++0x03 "Region 5"
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 5 (not implemented)"
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6
|
|
group.long 0xD9C++0x03 "Region 6"
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 6 (not implemented)"
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7
|
|
group.long 0xD9C++0x03 "Region 7"
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 7 (not implemented)"
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Nested Vectored Interrupt Controller (NVIC)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 12.
|
|
tree "Interrupt Enable Registers"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "SET/CLREN,Interrupt Set/Clear Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Interrupt Pending Registers"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "SET/CLRPEN,Interrupt Set/Clear Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
tree.end
|
|
width 6.
|
|
tree "Interrupt Priority Registers"
|
|
group.long 0x400++0x1F
|
|
line.long 0x00 "INT0,Interrupt Priority Register"
|
|
bitfld.long 0x00 30.--31. " IP_3 ,Priority of interrupt 3" "0,1,2,3"
|
|
bitfld.long 0x00 22.--23. " IP_2 ,Priority of interrupt 2" "0,1,2,3"
|
|
bitfld.long 0x00 14.--15. " IP_1 ,Priority of interrupt 1" "0,1,2,3"
|
|
bitfld.long 0x00 6.--7. " IP_0 ,Priority of interrupt 0" "0,1,2,3"
|
|
line.long 0x04 "INT1,Interrupt Priority Register"
|
|
bitfld.long 0x04 30.--31. " IP_7 ,Priority of interrupt 7" "0,1,2,3"
|
|
bitfld.long 0x04 22.--23. " IP_6 ,Priority of interrupt 6" "0,1,2,3"
|
|
bitfld.long 0x04 14.--15. " IP_5 ,Priority of interrupt 5" "0,1,2,3"
|
|
bitfld.long 0x04 6.--7. " IP_4 ,Priority of interrupt 4" "0,1,2,3"
|
|
line.long 0x08 "INT2,Interrupt Priority Register"
|
|
bitfld.long 0x08 30.--31. " IP_11 ,Priority of interrupt 11" "0,1,2,3"
|
|
bitfld.long 0x08 22.--23. " IP_10 ,Priority of interrupt 10" "0,1,2,3"
|
|
bitfld.long 0x08 14.--15. " IP_9 ,Priority of interrupt 9" "0,1,2,3"
|
|
bitfld.long 0x08 6.--7. " IP_8 ,Priority of interrupt 8" "0,1,2,3"
|
|
line.long 0x0C "INT3,Interrupt Priority Register"
|
|
bitfld.long 0x0C 30.--31. " IP_15 ,Priority of interrupt 15" "0,1,2,3"
|
|
bitfld.long 0x0C 22.--23. " IP_14 ,Priority of interrupt 14" "0,1,2,3"
|
|
bitfld.long 0x0C 14.--15. " IP_13 ,Priority of interrupt 13" "0,1,2,3"
|
|
bitfld.long 0x0C 6.--7. " IP_12 ,Priority of interrupt 12" "0,1,2,3"
|
|
line.long 0x10 "INT4,Interrupt Priority Register"
|
|
bitfld.long 0x10 30.--31. " IP_19 ,Priority of interrupt 19" "0,1,2,3"
|
|
bitfld.long 0x10 22.--23. " IP_18 ,Priority of interrupt 18" "0,1,2,3"
|
|
bitfld.long 0x10 14.--15. " IP_17 ,Priority of interrupt 17" "0,1,2,3"
|
|
bitfld.long 0x10 6.--7. " IP_16 ,Priority of interrupt 16" "0,1,2,3"
|
|
line.long 0x14 "INT5,Interrupt Priority Register"
|
|
bitfld.long 0x14 30.--31. " IP_23 ,Priority of interrupt 23" "0,1,2,3"
|
|
bitfld.long 0x14 22.--23. " IP_22 ,Priority of interrupt 22" "0,1,2,3"
|
|
bitfld.long 0x14 14.--15. " IP_21 ,Priority of interrupt 21" "0,1,2,3"
|
|
bitfld.long 0x14 6.--7. " IP_20 ,Priority of interrupt 20" "0,1,2,3"
|
|
line.long 0x18 "INT6,Interrupt Priority Register"
|
|
bitfld.long 0x18 30.--31. " IP_27 ,Priority of interrupt 27" "0,1,2,3"
|
|
bitfld.long 0x18 22.--23. " IP_26 ,Priority of interrupt 26" "0,1,2,3"
|
|
bitfld.long 0x18 14.--15. " IP_25 ,Priority of interrupt 25" "0,1,2,3"
|
|
bitfld.long 0x18 6.--7. " IP_24 ,Priority of interrupt 24" "0,1,2,3"
|
|
line.long 0x1C "INT7,Interrupt Priority Register"
|
|
bitfld.long 0x1C 30.--31. " IP_31 ,Priority of interrupt 31" "0,1,2,3"
|
|
bitfld.long 0x1C 22.--23. " IP_30 ,Priority of interrupt 30" "0,1,2,3"
|
|
bitfld.long 0x1C 14.--15. " IP_29 ,Priority of interrupt 29" "0,1,2,3"
|
|
bitfld.long 0x1C 6.--7. " IP_28 ,Priority of interrupt 28" "0,1,2,3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Debug"
|
|
tree "Core Debug"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 0xA
|
|
group.long 0xD30++0x03
|
|
line.long 0x00 "DFSR,Data Fault Status Register"
|
|
eventfld.long 0x00 4. " EXTERNAL ,External debug request flag" "No occurred,Occurred"
|
|
eventfld.long 0x00 3. " VCATCH ,Vector catch flag" "No occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 2. " DWTRAP ,Data Watchpoint flag" "No match,Match"
|
|
textline " "
|
|
eventfld.long 0x00 1. " BKPT ,BKPT flag" "No match,Match"
|
|
eventfld.long 0x00 0. " HALTED ,Halt request flag" "No request,Request"
|
|
if (CORENAME()=="CORTEXM1")
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x01)==0x00)
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 18. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
textline " "
|
|
textfld " "
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 18. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " C_STEP ,Steps the core in halted debug" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x01)==0x00)
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core Lockup Status/Debug Key" "Not locked up,Locked up"
|
|
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core Sleep Status/Debug Key" "Not sleeping,Sleeping"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
textline " "
|
|
textfld " "
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core Lockup Status/Debug Key" "Not locked up,Locked up"
|
|
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core Sleep Status/Debug Key" "Not sleeping,Sleeping"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " C_STEP ,Steps the core in halted debug" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
wgroup.long 0xDF4++0x03
|
|
line.long 0x00 "DCRSR,Debug Core Selector Register"
|
|
bitfld.long 0x00 16. " REGWnR ,Register Read/Write" "Read,Write"
|
|
bitfld.long 0x00 0.--4. " REGSEL ,Register Selection" "R0,R1,R2,R3,R4,R5,R6,R7,R8,R9,R10,R11,R12,Current SP,LR,DebugReturnAddress,xPSR Flags,MSP,PSP,Reserved,CONTROL[1]/PRIMASK[0],?..."
|
|
group.long 0xDF8++0x07
|
|
line.long 0x00 "DCRDR,Debug Core Register Data Register"
|
|
hexmask.long 0x00 0.--31. 1. " DATA ,Data for reading and writing registers to and from the processor"
|
|
line.long 0x04 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x04 24. " DWTENA ,Global enable or disable for the DW unit" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " VC_HARDERR ,Debug trap on a Hard Fault" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x04 0. " VC_CORERESET ,Reset Vector Catch" "No reset,Reset"
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Breakpoint Unit (BPU)"
|
|
sif COMPonent.AVAILABLE("BPU")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("BPU",-1))
|
|
width 8.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "BP_CTRL,Breakpoint Control Register"
|
|
bitfld.long 0x00 4.--7. " NUM_CODE1 ,Number of comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1. " KEY ,Key field" "No write,Write"
|
|
bitfld.long 0x00 0. " ENABLE ,Breakpoint unit enable bit" "Disabled,Enabled"
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "B_COMP0,Breakpoint Comparator Registers 0"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 0" "Disabled,Enabled"
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "B_COMP1,Breakpoint Comparator Registers 1"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 1" "Disabled,Enabled"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "B_COMP2,Breakpoint Comparator Registers 2"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 2" "Disabled,Enabled"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "B_COMP3,Breakpoint Comparator Registers 3"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 3" "Disabled,Enabled"
|
|
else
|
|
newline
|
|
textline "BPU component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Data Watchpoint and Trace Unit (DWT)"
|
|
sif COMPonent.AVAILABLE("DWT")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
|
|
width 14.
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "DW_CTRL,DW Control Register "
|
|
bitfld.long 0x00 28.--31. " NUM_CODE1 ,Number of comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x1c++0x03
|
|
line.long 0x00 "DW_PCSR,DW Program Counter Sample Register"
|
|
hexmask.long 0x00 0.--31. 1. " EIASAMPLE ,Execution instruction address sample or 0xFFFFFFFF"
|
|
group.long 0x20++0x0b
|
|
line.long 0x00 "DW_COMP0,DW Comparator Register 0"
|
|
hexmask.long 0x00 0.--31. 1. " COMP1 ,Compare against PC or the data address"
|
|
line.long 0x04 "DW_MASK0,DW Mask Register 0"
|
|
hexmask.long.byte 0x04 0.--4. 1. " MASK ,Mask on data address when matching against COMP"
|
|
line.long 0x08 "DW_FUNCTION0,DW Function Register 0"
|
|
bitfld.long 0x08 24. " MATCHED ,Comparator match" "No match,Match"
|
|
bitfld.long 0x08 0.--3. " FUNCTION , Settings for DW Function Registers" "Disabled,Reserved,Reserved,Reserved,On PC match,Read address,Write address,R/W address,?..."
|
|
group.long 0x30++0x0b
|
|
line.long 0x00 "DW_COMP1,DW Comparator Register 1"
|
|
hexmask.long 0x00 0.--31. 1. " COMP ,Compare against PC or the data address"
|
|
line.long 0x04 "DW_MASK1,DW Mask Register 1 "
|
|
hexmask.long.byte 0x04 0.--4. 1. " MASK ,Mask on data address when matching against COMP"
|
|
line.long 0x08 "DW_FUNCTION1,DW Function Register 1"
|
|
bitfld.long 0x08 24. " MATCHED ,Comparator match" "No match,Match"
|
|
bitfld.long 0x08 0.--3. " FUNCTION , Settings for DW Function Registers" "Disabled,Reserved,Reserved,Reserved,On PC match,Read address,Write address,R/W address,?..."
|
|
else
|
|
newline
|
|
textline "DWT component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
AUTOINDENT.POP
|
|
tree.end
|
|
endif
|
|
sif (CORENAME()=="CORTEXM4F")
|
|
tree.close "Core Registers (Cortex-M4F)"
|
|
AUTOINDENT.PUSH
|
|
AUTOINDENT.OFF
|
|
tree "System Control"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 12.
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "ACTLR,Auxiliary Control Register"
|
|
bitfld.long 0x00 9. " DISFPCA ,Disables lazy stacking of floating point context" "No,Yes"
|
|
bitfld.long 0x00 8. " DISOOFP ,Disables floating point instructions completing" "No,Yes"
|
|
bitfld.long 0x00 2. " DISFOLD ,Disables folding of IT instructions" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DISDEFWBUF ,Disables write buffer use during default memory map accesses" "No,Yes"
|
|
bitfld.long 0x00 0. " DISMCYCINT ,Disables interruption of multi-cycle instructions" "No,Yes"
|
|
group.long 0x10++0x0B
|
|
line.long 0x00 "SYST_CSR,SysTick Control and Status Register"
|
|
rbitfld.long 0x00 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted"
|
|
bitfld.long 0x00 2. " CLKSOURCE ,SysTick clock source" "External,Core"
|
|
bitfld.long 0x00 1. " TICKINT ,SysTick Handler" "No SysTick,SysTick"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ENABLE ,Counter Enable" "Disabled,Enabled"
|
|
line.long 0x04 "SYST_RVR,SysTick Reload Value Register"
|
|
hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0"
|
|
line.long 0x08 "SYST_CVR,SysTick Current Value Register"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "SYST_CALIB,SysTick Calibration Value Register"
|
|
bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented"
|
|
bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing"
|
|
rgroup.long 0xD00++0x03
|
|
line.long 0x00 "CPUID,CPU ID Base Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Implementer Code"
|
|
bitfld.long 0x00 20.--23. " VARIANT ,Indicates processor revision" "Revision 0,?..."
|
|
bitfld.long 0x00 16.--19. " ARCHITECTURE ,Architecture" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
hexmask.long.word 0x00 4.--15. 1. " PARTNO ,Indicates part number"
|
|
bitfld.long 0x00 0.--3. " REVISION ,Indicates patch release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0xD04++0x23
|
|
line.long 0x00 "ICSR,Interrupt Control State Register"
|
|
bitfld.long 0x00 31. " NMIPENDSET ,Set Pending NMI Bit" "Inactive,Active"
|
|
bitfld.long 0x00 28. " PENDSVSET ,Set Pending pendSV Bit" "Not pending,Pending"
|
|
bitfld.long 0x00 27. " PENDSVCLR ,Removes the pending status of the PendSV exception" "No effect,Removed"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PENDSTSET ,Set Pending SysTick Bit" "Not pending,Pending"
|
|
bitfld.long 0x00 25. " PENDSTCLR ,Clear Pending SysTick Bit" "No effect,Removed"
|
|
bitfld.long 0x00 23. " ISRPREEMPT ,Use Only at Debug Time" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ISRPENDING ,Indicates whether an external interrupt" "Not pending,Pending"
|
|
hexmask.long.word 0x00 12.--20. 1. " VECTPENDING ,Pending ISR Number Field"
|
|
bitfld.long 0x00 11. " RETTOBASE ,Interrupt Exception" "Active,Not active"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,The exception number of the current executing exception"
|
|
line.long 0x04 "VTOR,Vector Table Offset Register"
|
|
hexmask.long 0x04 7.--31. 0x80 " TBLOFF ,Vector table address"
|
|
line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register"
|
|
hexmask.long.word 0x08 16.--31. 1. " VECTKEY ,Register Key"
|
|
rbitfld.long 0x08 15. " ENDIANESS ,Data endianness Bit" "Little,Big"
|
|
bitfld.long 0x08 8.--10. " PRIGROUP ,Interrupt Priority Grouping Field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
|
|
textline " "
|
|
bitfld.long 0x08 2. " SYSRESETREQ ,System Reset Request" "Not requested,Requested"
|
|
bitfld.long 0x08 1. " VECTCLRACTIVE ,Clear Active Vector Bit" "No effect,Clear"
|
|
bitfld.long 0x08 0. " VECTRESET ,System Reset" "No effect,Reset"
|
|
line.long 0x0C "SCR,System Control Register"
|
|
bitfld.long 0x0C 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
|
|
bitfld.long 0x0C 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
|
|
bitfld.long 0x0C 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
|
|
line.long 0x10 "CCR,Configuration Control Register"
|
|
bitfld.long 0x10 18. " BP ,Branch prediction enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x10 17. " IC ,Instruction cache enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x10 16. " DC ,Cache enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 9. " STKALIGN ,8-byte Stack Frame Alignment" "4-byte/no adjustment,8-byte/adjustment"
|
|
bitfld.long 0x10 8. " BFHFNMIGN ,Enable NMI and Hard Fault and FAULTMASK to Ignore Bus Fault" "Disabled,Enabled"
|
|
bitfld.long 0x10 4. " DIV_0_TRP ,Trap Divide by Zero" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 3. " UNALIGN_TRP ,Trap for Unaligned Access" "Disabled,Enabled"
|
|
bitfld.long 0x10 1. " USERSETMPEND ,Controls whether unprivileged software can access the STIR" "Denied,Allowed"
|
|
bitfld.long 0x10 0. " NONEBASETHRDENA ,Control Entry to Thread Mode" "Only from last exception,Any level"
|
|
line.long 0x14 "SHPR1,SSystem Handler Priority Register 1"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_7 ,Priority of System Handler 7"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_6 ,Priority of system handler 6(UsageFault)"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_5 ,Priority of system handler 5(BusFault)"
|
|
textline " "
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_4 ,Priority of system handler 4(MemManage)"
|
|
line.long 0x18 "SHPR2,System Handler Priority Register 2"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_11 ,Priority of system handler 11(SVCall)"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_10 ,Priority of System Handler 10"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_9 ,Priority of System Handler 9"
|
|
textline " "
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_8 ,Priority of System Handler 8"
|
|
line.long 0x1C "SHPR3,System Handler Priority Register 3"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_15 ,Priority of System Handler 15(SysTick)"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_14 ,Priority of System Handler 14(PendSV)"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_13 ,Priority of System Handler 13"
|
|
textline " "
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_12 ,Priority of System Handler 12(DebugMonitor)"
|
|
line.long 0x20 "SHCSR,System Handler Control and State Register"
|
|
bitfld.long 0x20 18. " USGFAULTENA ,Enable UsageFault" "Disabled,Enabled"
|
|
bitfld.long 0x20 17. " BUSFAULTENA ,Enable BusFault" "Disabled,Enabled"
|
|
bitfld.long 0x20 16. " MEMFAULTENA ,Enable MemManage fault" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 15. " SVCALLPENDED ,SVCall is pending" "Not pending,Pending"
|
|
bitfld.long 0x20 14. " BUSFAULTPENDED ,BusFault is pending" "Not pending,Pending"
|
|
bitfld.long 0x20 13. " MEMFAULTPENDED ,MemManage is pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x20 12. " USGFAULTPENDED ,UsageFault is pending" "Not pending,Pending"
|
|
bitfld.long 0x20 11. " SYSTICKACT ,SysTick is Active" "Not active,Active"
|
|
bitfld.long 0x20 10. " PENDSVACT ,PendSV is Active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x20 8. " MONITORACT ,Monitor is Active" "Not active,Active"
|
|
bitfld.long 0x20 7. " SVCALLACT ,SVCall is Active" "Not active,Active"
|
|
bitfld.long 0x20 3. " USGFAULTACT ,UsageFault is Active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x20 1. " BUSFAULTACT ,BusFault is Active" "Not active,Active"
|
|
bitfld.long 0x20 0. " MEMFAULTACT ,MemManage is Active" "Not active,Active"
|
|
group.byte 0xD28++0x1
|
|
line.byte 0x00 "MMFSR,MemManage Status Register"
|
|
bitfld.byte 0x00 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid"
|
|
bitfld.byte 0x00 5. " MLSPERR ,A MemManage fault occurred during FP lazy state preservation" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 4. " MSTKERR ,tacking Access Violations" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " MUNSTKERR ,Unstack Access Violations" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 1. " DACCVIOL ,Data Access Violation" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 0. " IACCVIOL ,Instruction Access Violation" "Not occurred,Occurred"
|
|
line.byte 0x01 "BFSR,Bus Fault Status Register"
|
|
bitfld.byte 0x01 7. " BFARVALID ,Address Valid Flag" "Not valid,Valid"
|
|
bitfld.byte 0x01 5. " LSPERR ,A bus fault occurred during FP lazy state preservation" "Not occurred,Occurred"
|
|
bitfld.byte 0x01 4. " STKERR ,Derived bus fault(exception entry)" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x01 3. " UNSTKERR ,Derived bus fault(exception return)" "Not occurred,Occurred"
|
|
bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise data access error" "Not occurred,Occurred"
|
|
bitfld.byte 0x01 1. " PRECISERR ,Precise data access error" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x01 0. " IBUSERR ,Bus fault on an instruction prefetch" "Not occurred,Occurred"
|
|
group.word 0xD2A++0x1
|
|
line.word 0x00 "USAFAULT,Usage Fault Status Register"
|
|
bitfld.word 0x00 9. " DIVBYZERO ,Divide by zero error" "No error,Error"
|
|
bitfld.word 0x00 8. " UNALIGNED ,Unaligned access error" "No error,Error"
|
|
bitfld.word 0x00 3. " NOCP ,A coprocessor access error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 2. " INVPC ,An integrity check error" "No error,Error"
|
|
bitfld.word 0x00 1. " INVSTATE ,Invalid Combination of EPSR and Instruction" "No error,Error"
|
|
bitfld.word 0x00 0. " UNDEFINSTR ,Undefined instruction error" "No error,Error"
|
|
group.long 0xD2C++0x07
|
|
line.long 0x00 "HFSR,Hard Fault Status Register"
|
|
bitfld.long 0x00 31. " DEBUGEVT ,Indicates when a Debug event has occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x00 30. " FORCED ,Indicates that a fault with configurable priority" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " VECTTBL ,Indicates when a fault has occurred because of a vector table read error on exception processing" "Not occurred,Occurred"
|
|
line.long 0x04 "DFSR,Debug Fault Status Register"
|
|
bitfld.long 0x04 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of EDBGRQ" "Not asserted,Asserted"
|
|
bitfld.long 0x04 3. " VCATCH ,Vector Catch Flag" "Not occurred,Occurred"
|
|
bitfld.long 0x04 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 1. " BKPT ,BKPT Flag" "Not executed,Executed"
|
|
bitfld.long 0x04 0. " HALTED ,Indicates a debug event generated by either" "Not requested,Requested"
|
|
group.long 0xD34++0x0B
|
|
line.long 0x00 "MMFAR,MemManage Fault Address Register"
|
|
line.long 0x04 "BFAR,BusFault Address Register"
|
|
line.long 0x08 "AFSR,Auxiliary Fault Status Register"
|
|
group.long 0xD88++0x03
|
|
line.long 0x00 "CPACR,Coprocessor Access Control Register"
|
|
bitfld.long 0x00 22.--23. " CP11 ,Access privileges for coprocessor 11" "Access denied,Privileged only,Reserved,Full access"
|
|
bitfld.long 0x00 20.--21. " CP10 ,Access privileges for coprocessor 10" "Access denied,Privileged only,Reserved,Full access"
|
|
bitfld.long 0x00 14.--15. " CP7 ,Access privileges for coprocessor 7" "Access denied,Privileged only,Reserved,Full access"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " CP6 ,Access privileges for coprocessor 6" "Access denied,Privileged only,Reserved,Full access"
|
|
bitfld.long 0x00 10.--11. " CP5 ,Access privileges for coprocessor 5" "Access denied,Privileged only,Reserved,Full access"
|
|
bitfld.long 0x00 8.--9. " CP4 ,Access privileges for coprocessor 4" "Access denied,Privileged only,Reserved,Full access"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " CP3 ,Access privileges for coprocessor 3" "Access denied,Privileged only,Reserved,Full access"
|
|
bitfld.long 0x00 4.--5. " CP2 ,Access privileges for coprocessor 2" "Access denied,Privileged only,Reserved,Full access"
|
|
bitfld.long 0x00 2.--3. " CP1 ,Access privileges for coprocessor 1" "Access denied,Privileged only,Reserved,Full access"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " CP0 ,Access privileges for coprocessor 0" "Access denied,Privileged only,Reserved,Full access"
|
|
wgroup.long 0xF00++0x03
|
|
line.long 0x00 "STIR,Software Trigger Interrupt Register"
|
|
hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be triggered"
|
|
width 10.
|
|
tree "Feature Registers"
|
|
rgroup.long 0xD40++0x0B
|
|
line.long 0x00 "ID_PFR0,Processor Feature Register 0"
|
|
bitfld.long 0x00 4.--7. " STATE1 ,Thumb instruction set support" ",,,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..."
|
|
line.long 0x04 "ID_PFR1,Processor Feature Register 1"
|
|
bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..."
|
|
line.long 0x08 "ID_DFR0,Debug Feature Register 0"
|
|
bitfld.long 0x08 20.--23. " DBGMOD ,Support for memory-mapped debug model for M profile processors" "Not supported,Supported,?..."
|
|
hgroup.long 0xD4C++0x03
|
|
hide.long 0x00 "ID_AFR0,Auxiliary Feature Register 0"
|
|
rgroup.long 0xD50++0x03
|
|
line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0"
|
|
bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,ACTLR only,?..."
|
|
bitfld.long 0x00 16.--19. " TCMSUP ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "Level 1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,,,,,,,,,,,,,,,Ignored"
|
|
bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,PMSAv7,?..."
|
|
hgroup.long 0xD54++0x03
|
|
hide.long 0x00 "ID_MMFR1,Memory Model Feature Register 1"
|
|
rgroup.long 0xD58++0x03
|
|
line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2"
|
|
bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..."
|
|
rgroup.long 0xD60++0x13
|
|
line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0"
|
|
bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..."
|
|
bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..."
|
|
bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,CDP/LDC/MCR/STC,CDP2/LDC2/MCR2/STC2,MCRR/MRRC,MCRR2/MRRC2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..."
|
|
bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..."
|
|
bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..."
|
|
line.long 0x04 "ID_ISAR1,Instruction Set Attributes Register 1"
|
|
bitfld.long 0x04 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..."
|
|
bitfld.long 0x04 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..."
|
|
bitfld.long 0x04 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..."
|
|
textline " "
|
|
bitfld.long 0x04 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Supported,Supported,?..."
|
|
line.long 0x08 "ID_ISAR2,Instruction Set Attributes Register 2"
|
|
bitfld.long 0x08 24.--27. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..."
|
|
bitfld.long 0x08 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..."
|
|
bitfld.long 0x08 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,Supported,Supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x08 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MLA,MLA/MLS,?..."
|
|
bitfld.long 0x08 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..."
|
|
bitfld.long 0x08 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,LDRD/STRD,?..."
|
|
line.long 0x0C "ID_ISAR3,Instruction Set Attributes Register 3"
|
|
bitfld.long 0x0C 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..."
|
|
bitfld.long 0x0C 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..."
|
|
bitfld.long 0x0C 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x0C 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..."
|
|
bitfld.long 0x0C 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB,?..."
|
|
line.long 0x10 "ID_ISAR4,Instruction Set Attributes Register 4"
|
|
bitfld.long 0x10 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,?..."
|
|
bitfld.long 0x10 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x10 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,DMB/DSB/ISB,?..."
|
|
textline " "
|
|
bitfld.long 0x10 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..."
|
|
bitfld.long 0x10 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,Shift LSL 0-3,,Shift other,?..."
|
|
bitfld.long 0x10 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,LDRBT/LDRT/STRBT/STRT/LDRHT/LDRSBT/LDRSHTSTRHT,?..."
|
|
tree.end
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0C "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0C "CID3,Component ID3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Memory Protection Unit"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 15.
|
|
rgroup.long 0xD90++0x03
|
|
line.long 0x00 "MPU_TYPE,MPU Type Register"
|
|
bitfld.long 0x00 16.--23. " IREGION ,Instruction region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,Supported"
|
|
group.long 0xD94++0x03
|
|
line.long 0x00 "MPU_CTRL,MPU Control Register"
|
|
bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled"
|
|
group.long 0xD98++0x03
|
|
line.long 0x00 "MPU_RNR,MPU Region Number Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR"
|
|
tree.close "MPU regions"
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0
|
|
group.long 0xD9C++0x03 "Region 0"
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 0 (not implemented)"
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1
|
|
group.long 0xD9C++0x03 "Region 1"
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 1 (not implemented)"
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2
|
|
group.long 0xD9C++0x03 "Region 2"
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 2 (not implemented)"
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3
|
|
group.long 0xD9C++0x03 "Region 3"
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 3 (not implemented)"
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4
|
|
group.long 0xD9C++0x03 "Region 4"
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 4 (not implemented)"
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5
|
|
group.long 0xD9C++0x03 "Region 5"
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 5 (not implemented)"
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6
|
|
group.long 0xD9C++0x03 "Region 6"
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 6 (not implemented)"
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7
|
|
group.long 0xD9C++0x03 "Region 7"
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 7 (not implemented)"
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8
|
|
group.long 0xD9C++0x03 "Region 8"
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 8 (not implemented)"
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9
|
|
group.long 0xD9C++0x03 "Region 9"
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 9 (not implemented)"
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA
|
|
group.long 0xD9C++0x03 "Region 10"
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 10 (not implemented)"
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB
|
|
group.long 0xD9C++0x03 "Region 11"
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 11 (not implemented)"
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC
|
|
group.long 0xD9C++0x03 "Region 12"
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 12 (not implemented)"
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD
|
|
group.long 0xD9C++0x03 "Region 13"
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 13 (not implemented)"
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE
|
|
group.long 0xD9C++0x03 "Region 14"
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 14 (not implemented)"
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF
|
|
group.long 0xD9C++0x03 "Region 15"
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 15 (not implemented)"
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Nested Vectored Interrupt Controller"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 6.
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "ICTR,Interrupt Controller Type Register"
|
|
bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,33-64,65-96,97-128,129-160,161-192,193-224,225-240,?..."
|
|
tree "Interrupt Enable Registers"
|
|
width 23.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x100++0x7
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x100++0x0B
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x100++0x0F
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x100++0x13
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x100++0x17
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x100++0x1B
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x100++0x1F
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x100++0x1F
|
|
hide.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Pending Registers"
|
|
width 23.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x200++0x07
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x200++0x0B
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x200++0x0F
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x200++0x13
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x200++0x17
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x200++0x1B
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x200++0x1F
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x200++0x1F
|
|
hide.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Active Bit Registers"
|
|
width 9.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
rgroup.long 0x300++0x03
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
rgroup.long 0x300++0x07
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
rgroup.long 0x300++0x0B
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
rgroup.long 0x300++0x0F
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
rgroup.long 0x300++0x13
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
rgroup.long 0x300++0x17
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
rgroup.long 0x300++0x1B
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
rgroup.long 0x300++0x1F
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x1c "ACTIVE8,Active Bit Register 8"
|
|
bitfld.long 0x1c 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1c 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1c 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x300++0x1F
|
|
hide.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
hide.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
hide.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
hide.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
hide.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
hide.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
hide.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
hide.long 0x1c "ACTIVE8,Active Bit Register 8"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Priority Registers"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x400++0x1F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x400++0x3F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x400++0x5F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x400++0x7F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x400++0x9F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x400++0xBF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x400++0xDF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
line.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x400++0xEF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
line.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
line.long 0xE0 "IPR56,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority"
|
|
hexmask.long.byte 0xE0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority"
|
|
hexmask.long.byte 0xE0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority"
|
|
hexmask.long.byte 0xE0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority"
|
|
line.long 0xE4 "IPR57,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority"
|
|
hexmask.long.byte 0xE4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority"
|
|
hexmask.long.byte 0xE4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority"
|
|
hexmask.long.byte 0xE4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority"
|
|
line.long 0xE8 "IPR58,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority"
|
|
hexmask.long.byte 0xE8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority"
|
|
hexmask.long.byte 0xE8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority"
|
|
hexmask.long.byte 0xE8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority"
|
|
line.long 0xEC "IPR59,Interrupt Priority Register"
|
|
hexmask.long.byte 0xEC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority"
|
|
hexmask.long.byte 0xEC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority"
|
|
hexmask.long.byte 0xEC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority"
|
|
hexmask.long.byte 0xEC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority"
|
|
else
|
|
hgroup.long 0x400++0xEF
|
|
hide.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hide.long 0xC "IPR3,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hide.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hide.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hide.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hide.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hide.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hide.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hide.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hide.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hide.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hide.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hide.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hide.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hide.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hide.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hide.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hide.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hide.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hide.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hide.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hide.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hide.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hide.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hide.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hide.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hide.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hide.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hide.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hide.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hide.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hide.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hide.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hide.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hide.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hide.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hide.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hide.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hide.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hide.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hide.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hide.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hide.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hide.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hide.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hide.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hide.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hide.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hide.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hide.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hide.long 0xE0 "IPR56,Interrupt Priority Register"
|
|
hide.long 0xE4 "IPR57,Interrupt Priority Register"
|
|
hide.long 0xE8 "IPR58,Interrupt Priority Register"
|
|
hide.long 0xEC "IPR59,Interrupt Priority Register"
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
sif CORENAME()=="CORTEXM4F"
|
|
tree "Floating-point Unit (FPU)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 8.
|
|
group.long 0xF34++0x0B
|
|
line.long 0x00 "FPCCR,Floating-Point Context Control Register"
|
|
bitfld.long 0x00 31. " ASPEN ,Execution of a floating-point instruction sets the CONTROL.FPCA bit to 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " LSPEN ,Enables lazy context save of FP state" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " MONRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the DebugMonitor exception to pending" "Not able,Able"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the BusFault exception to pending" "Not able,Able"
|
|
bitfld.long 0x00 5. " MMRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the MemManage exception to pending" "Not able,Able"
|
|
bitfld.long 0x00 4. " HFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the HardFault exception to pending" "Not able,Able"
|
|
textline " "
|
|
bitfld.long 0x00 3. " THREAD ,Indicates the processor mode when it allocated the FP stack frame" "Handler,Thread"
|
|
bitfld.long 0x00 1. " USER ,Indicates the privilege level of the software executing" "Privileged,Unprivileged"
|
|
bitfld.long 0x00 0. " LSPACT ,Indicates whether Lazy preservation of the FP state is active" "Not active,Active"
|
|
line.long 0x04 "FPCAR,Floating-Point Context Address Register"
|
|
hexmask.long 0x04 3.--31. 0x8 " ADDRESS ,The location of the unpopulated floating-point register space allocated on an exception stack frame"
|
|
line.long 0x08 "FPDSCR,Floating-Point Default Status Control Register"
|
|
bitfld.long 0x08 26. " AHP ,Default value for FPSCR.AHP" "IEEE 754-2008,Alternative"
|
|
bitfld.long 0x08 25. " DN ,Default value for FPSCR.DN" "NaN operands,Any operation"
|
|
bitfld.long 0x08 24. " FZ ,Default value for FPSCR.FZ" "No Flush mode,Flush mode"
|
|
textline " "
|
|
bitfld.long 0x08 22.--23. " RMODE ,Default value for FPSCR.RMode" "Round to Nearest,Round towards Plus Infinity,Round towards Minus Infinity,Round towards Zero"
|
|
rgroup.long 0xF40++0x07
|
|
line.long 0x00 "MVFR0,Media and FP Feature Register 0"
|
|
bitfld.long 0x00 28.--31. " FPRNDMOD ,Indicates the rounding modes supported by the FP floating-point hardware" ",All supported,?..."
|
|
bitfld.long 0x00 24.--27. " SRTERR ,Indicates the hardware support for FP short vectors" "Not supported,?..."
|
|
bitfld.long 0x00 20.--23. " SQRROOT ,Indicates the hardware support for FP square root operations" ",Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " DIV ,Indicates the hardware support for FP divide operations" ",Supported,?..."
|
|
bitfld.long 0x00 12.--15. " FPEXTRP ,Indicates whether the FP hardware implementation supports exception trapping" "Not supported,?..."
|
|
bitfld.long 0x00 8.--11. " DBLPREC ,Indicates the hardware support for FP double_precision operations" "Not supported,,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " SNGLPREC ,Indicates the hardware support for FP single-precision operations" ",,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " A_SIMD ,Indicates the size of the FP register bank" ",Supported-16x64-bit,?..."
|
|
line.long 0x04 "MVFR1,Media and FP Feature Register 1"
|
|
bitfld.long 0x04 28.--31. " FP_FUSED_MAC ,Indicates whether the FP supports fused multiply accumulate operations" ",Supported,?..."
|
|
bitfld.long 0x04 24.--27. " FP_HPFP ,Indicates whether the FP supports half-precision and double-precision floating-point conversion instructions" ",Half-single,Half-single and half-double,?..."
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " D_NAN ,Indicates whether the FP hardware implementation supports only the Default NaN mode" ",NaN propagation,?..."
|
|
bitfld.long 0x04 0.--3. " FTZ_MODE ,Indicates whether the FP hardware implementation supports only the Flush-to-Zero mode of operation" ",Full denorm. num. arit.,?..."
|
|
width 0xB
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
endif
|
|
tree "Debug"
|
|
tree "Core Debug"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 7.
|
|
group.long 0xD30++0x03
|
|
line.long 0x00 "DFSR,Debug Fault Status Register"
|
|
eventfld.long 0x00 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not generated,Generated"
|
|
eventfld.long 0x00 3. " VCATCH ,Indicates triggering of a Vector catch" "Not triggered,Triggered"
|
|
eventfld.long 0x00 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not generated,Generated"
|
|
newline
|
|
eventfld.long 0x00 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not generated,Generated"
|
|
eventfld.long 0x00 0. " HALTED ,Indicates a debug event generated by either a C_HALT or C_STEP request, triggered by a write to the DHCSR or a step request triggered by setting DEMCR.MON_STEP to 1" "Not generated,Generated"
|
|
newline
|
|
hgroup.long 0xDF0++0x03
|
|
hide.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
in
|
|
newline
|
|
wgroup.long 0xDF4++0x03
|
|
line.long 0x00 "DCRSR,Debug Core Register Selector Register"
|
|
bitfld.long 0x00 16. " REGWNR ,Register Read/Write" "Read,Write"
|
|
hexmask.long.byte 0x00 0.--6. 1. " REGSEL ,Specifies the ARM core register or special-purpose register or Floating-point extension register"
|
|
group.long 0xDF8++0x03
|
|
line.long 0x00 "DCRDR,Debug Core Register Data Register"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000)
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step"
|
|
newline
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
endif
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Flash Patch and Breakpoint Unit (FPB)"
|
|
sif COMPonent.AVAILABLE("FPB")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))
|
|
width 10.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "FP_CTRL,Flash Patch Control Register"
|
|
bitfld.long 0x00 28.--31. " REV ,Flash Patch Breakpoint architecture revision" "Version 1,Version 2,?..."
|
|
rbitfld.long 0x00 4.--7. 12.--14. " NUM_CODE ,The number of instruction address comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127"
|
|
bitfld.long 0x00 1. " KEY ,Key Field" "Low,High"
|
|
bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled"
|
|
textline ""
|
|
line.long 0x04 "FP_REMAP,Flash Patch Remap Register"
|
|
bitfld.long 0x04 29. " RMPSPT ,Indicates whether the FPB unit supports flash patch remap" "Not supported,SRAM region"
|
|
hexmask.long.tbyte 0x04 5.--28. 0x20 " REMAP ,Remap Base Address Field"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x8))&0x01)==0x00)
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xC))&0x01)==0x00)
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x10))&0x01)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x14))&0x01)==0x00)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x18))&0x01)==0x00)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x1C))&0x01)==0x00)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x20))&0x01)==0x00)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x24))&0x01)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0c "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0c "CID3,Component ID3"
|
|
tree.end
|
|
width 0xB
|
|
else
|
|
newline
|
|
textline "FPB component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Data Watchpoint and Trace Unit (DWT)"
|
|
sif COMPonent.AVAILABLE("DWT")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
|
|
width 15.
|
|
group.long 0x00++0x1B
|
|
line.long 0x00 "DWT_CTRL,Control Register"
|
|
rbitfld.long 0x00 28.--31. " NUMCOMP ,Number of comparators implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.long 0x00 27. " NOTRCPKT ,Shows whether the implementation supports trace sampling and exception tracing" "Supported,Not supported"
|
|
rbitfld.long 0x00 26. " NOEXTTRIG ,Shows whether the implementation includes external match signals" "Supported,Not supported"
|
|
textline " "
|
|
rbitfld.long 0x00 25. " NOCYCCNT ,Shows whether the implementation supports a cycle counter" "Supported,Not supported"
|
|
rbitfld.long 0x00 24. " NOPRFCNT ,Shows whether the implementation supports the profiling counters" "Supported,Not supported"
|
|
bitfld.long 0x00 22. " CYCEVTENA ,Enables POSTCNT underflow Event counter packets generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " FOLDEVTENA ,Enables generation of the Folded-instruction counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " LSUEVTENA ,Enables generation of the LSU counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " SLEEPEVTENA ,Enables generation of the Sleep counter overflow event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " EXCEVTENA ,Enables generation of the Exception overhead counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CPIEVTENA ,Enables generation of the CPI counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " EXCTRCENA ,Enables generation of exception trace" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PCSAMPLEENA ,Enables use of POSTCNT counter as a timer for Periodic PC sample packet generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 10.--11. " SYNCTAP ,Selects the position of the synchronization packet counter tap on the CYCCNT counter" "Disabled,CYCCNT[24],CYCCNT[26],CYCCNT[28]"
|
|
bitfld.long 0x00 9. " CYCTAP ,Selects the position of the POSTCNT tap on the CYCCNT counter" "CYCCNT[6],CYCCNT[10]"
|
|
textline " "
|
|
bitfld.long 0x00 5.--8. " POSTINIT ,Initial value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1.--4. " POSTPRESET ,Reload value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0. " CYCCNTENA ,Enables CYCCNT" "Disabled,Enabled"
|
|
line.long 0x04 "DWT_CYCCNT,Cycle Count Register"
|
|
line.long 0x08 "DWT_CPICNT,CPI Count Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " CPICNT ,The base CPI counter"
|
|
line.long 0x0c "DWT_EXCCNT,Exception Overhead Count Register"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " EXCCNT ,The exception overhead counter"
|
|
line.long 0x10 "DWT_SLEEPCNT,Sleep Count Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. " SLEEPCNT ,Sleep Counter"
|
|
line.long 0x14 "DWT_LSUCNT,LSU Count Register"
|
|
hexmask.long.byte 0x14 0.--7. 1. " LSUCNT ,Load-store counter"
|
|
line.long 0x18 "DWT_FOLDCNT,Folded-instruction Count Register"
|
|
hexmask.long.byte 0x18 0.--7. 1. " FOLDCNT ,Folded-instruction counter"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "DWT_PCSR,Program Counter Sample register"
|
|
textline " "
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
|
|
line.long 0x04 "DWT_MASK0,DWT Mask Registers 0"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x20)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x00)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x180)==0x80)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet,UNPREDICTABLE,UNPREDICTABLE,Generate watchpoint debug event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,CMPMATCH[N] event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
else
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x30)++0x07
|
|
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
|
|
line.long 0x04 "DWT_MASK1,DWT Mask Registers 1"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x20)
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x00)
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x40)++0x07
|
|
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
|
|
line.long 0x04 "DWT_MASK2,DWT Mask Registers 2"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x20)
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x00)
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x50)++0x07
|
|
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
|
|
line.long 0x04 "DWT_MASK3,DWT Mask Registers 3"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x20)
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x00)
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0c "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0c "CID3,Component ID3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "DWT component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
AUTOINDENT.POP
|
|
tree.end
|
|
endif
|
|
tree "AXBS (Crossbar Switch)"
|
|
base ad:0x40000000
|
|
repeat 7. (increment 0x0 0x1)(increment 0x0 0x100)
|
|
group.long ($2)++0x3
|
|
line.long 0x0 "PRS$1,Priority Registers Slave"
|
|
bitfld.long 0x0 28.--30. "M7,Master 7 Priority. Sets the arbitration priority for this port on the associated slave port." "0: Priority Level 1 (Highest),1: Priority Level 2,2: Priority Level 3,3: Priority Level 4,4: Priority Level 5,5: Priority Level 6,6: Priority Level 7,7: Priority Level 8 (Lowest)"
|
|
bitfld.long 0x0 24.--26. "M6,Master 6 Priority. Sets the arbitration priority for this port on the associated slave port." "0: Priority Level 1 (Highest),1: Priority Level 2,2: Priority Level 3,3: Priority Level 4,4: Priority Level 5,5: Priority Level 6,6: Priority Level 7,7: Priority Level 8 (Lowest)"
|
|
newline
|
|
bitfld.long 0x0 20.--22. "M5,Master 5 Priority. Sets the arbitration priority for this port on the associated slave port." "0: Priority Level 1 (Highest),1: Priority Level 2,2: Priority Level 3,3: Priority Level 4,4: Priority Level 5,5: Priority Level 6,6: Priority Level 7,7: Priority Level 8 (Lowest)"
|
|
bitfld.long 0x0 16.--18. "M4,Master 4 Priority. Sets the arbitration priority for this port on the associated slave port." "0: Priority Level 1 (Highest),1: Priority Level 2,2: Priority Level 3,3: Priority Level 4,4: Priority Level 5,5: Priority Level 6,6: Priority Level 7,7: Priority Level 8 (Lowest)"
|
|
newline
|
|
bitfld.long 0x0 12.--14. "M3,Master 3 Priority. Sets the arbitration priority for this port on the associated slave port." "0: Priority Level 1 (Highest),1: Priority Level 2,2: Priority Level 3,3: Priority Level 4,4: Priority Level 5,5: Priority Level 6,6: Priority Level 7,7: Priority Level 8 (Lowest)"
|
|
bitfld.long 0x0 8.--10. "M2,Master 2 Priority. Sets the arbitration priority for this port on the associated slave port." "0: Priority Level 1 (Highest),1: Priority Level 2,2: Priority Level 3,3: Priority Level 4,4: Priority Level 5,5: Priority Level 6,6: Priority Level 7,7: Priority Level 8 (Lowest)"
|
|
newline
|
|
bitfld.long 0x0 4.--6. "M1,Master 1 Priority. Sets the arbitration priority for this port on the associated slave port." "0: Priority Level 1 (Highest),1: Priority Level 2,2: Priority Level 3,3: Priority Level 4,4: Priority Level 5,5: Priority Level 6,6: Priority Level 7,7: Priority Level 8 (Lowest)"
|
|
bitfld.long 0x0 0.--2. "M0,Master 0 Priority. Sets the arbitration priority for this port on the associated slave port." "0: Priority Level 1 (Highest),1: Priority Level 2,2: Priority Level 3,3: Priority Level 4,4: Priority Level 5,5: Priority Level 6,6: Priority Level 7,7: Priority Level 8 (Lowest)"
|
|
repeat.end
|
|
repeat 7. (increment 0x0 0x1)(increment 0x0 0x100)
|
|
group.long ($2+0x10)++0x3
|
|
line.long 0x0 "CRS$1,Control Register"
|
|
bitfld.long 0x0 31. "RO,Read Only" "0: The CRSn and PRSn registers are writeable,1: The CRSn and PRSn registers are read-only and.."
|
|
bitfld.long 0x0 30. "HLP,Halt Low Priority" "0: The low power mode request has the highest..,1: The low power mode request has the lowest.."
|
|
newline
|
|
bitfld.long 0x0 23. "HPE7,On this slave port enable master high-priority elevation for master 7" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x0 22. "HPE6,On this slave port enable master high-priority elevation for master 6" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 21. "HPE5,On this slave port enable master high-priority elevation for master 5" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x0 20. "HPE4,On this slave port enable master high-priority elevation for master 4" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 19. "HPE3,On this slave port enable master high-priority elevation for master 3" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x0 18. "HPE2,On this slave port enable master high-priority elevation for master 2" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 17. "HPE1,On this slave port enable master high-priority elevation for master 1" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x0 16. "HPE0,On this slave port enable master high-priority elevation for master 0" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "ARB,Arbitration Mode" "0: Fixed priority,1: Round-robin (rotating) priority,?,?"
|
|
bitfld.long 0x0 4.--5. "PCTL,Parking Control" "0: When no master makes a request the arbiter parks..,1: When no master makes a request the arbiter parks..,2: Low-power park. When no master makes a request..,?"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "PARK,Park" "0: Park on master port M0,1: Park on master port M1,2: Park on master port M2,3: Park on master port M3,4: Park on master port M4,5: Park on master port M5,6: Park on master port M6,7: Park on master port M7"
|
|
repeat.end
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x100)
|
|
group.long ($2+0x800)++0x3
|
|
line.long 0x0 "MGPCR$1,Master General Purpose Control Register"
|
|
bitfld.long 0x0 0.--2. "AULB,Arbitrates On Undefined Length Bursts" "0: Not allowed,1: Allowed at any time,2: Allowed after 4 beats,3: Allowed after 8 beats,4: Allowed after 16 beats,5: Reserved,6: Reserved,7: Reserved"
|
|
repeat.end
|
|
tree.end
|
|
tree "BCTRL (Repair Processor)"
|
|
base ad:0x400EA000
|
|
rgroup.long 0x2C++0x3
|
|
line.long 0x0 "BISTALL,BIST All register"
|
|
bitfld.long 0x0 2. "BIRA_FAIL,Indicates that at least one BIST test has failed with fail status" "0: No BIST test has failed.,1: At least one BIST test has failed."
|
|
bitfld.long 0x0 0.--1. "STAT_ALL,Status All field" "0: READY state - Initial state after reset. Stays..,1: Busy state - Indicates that at least one BIST..,2: Done No fail state - Indicates that all BISTs..,3: Done with fail state - Indicates that all BISTs.."
|
|
group.long 0x200++0x3
|
|
line.long 0x0 "BSEL,BIST Select Register"
|
|
hexmask.long 0x0 0.--31. 1. "BIST_CTRL,BIST Select (BIST ID)"
|
|
rgroup.long 0x300++0x3
|
|
line.long 0x0 "BIST_STAT,BIST Status register"
|
|
hexmask.long.byte 0x0 28.--31. 1. "BIST7STAT,Status of BIST7"
|
|
hexmask.long.byte 0x0 24.--27. 1. "BIST6STAT,Status of BIST6"
|
|
hexmask.long.byte 0x0 20.--23. 1. "BIST5STAT,Status of BIST5"
|
|
hexmask.long.byte 0x0 16.--19. 1. "BIST4STAT,Status of BIST4"
|
|
newline
|
|
hexmask.long.byte 0x0 12.--15. 1. "BIST3STAT,Status of BIST3"
|
|
hexmask.long.byte 0x0 8.--11. 1. "BIST2STAT,Status of BIST2"
|
|
hexmask.long.byte 0x0 4.--7. 1. "BIST1STAT,Status of BIST1"
|
|
hexmask.long.byte 0x0 0.--3. 1. "BIST0STAT,Status of BIST0"
|
|
tree.end
|
|
tree "BIST (Memory BIST Engine)"
|
|
base ad:0x400EC000
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x40)++0x3
|
|
line.long 0x0 "MSR$1,Memory selection register"
|
|
hexmask.long 0x0 0.--31. 1. "MSELn,Memory Selection"
|
|
repeat.end
|
|
group.long 0xA4++0x3
|
|
line.long 0x0 "BSTART,BIST start register"
|
|
bitfld.long 0x0 0.--1. "BSTART,These bits start the BIST execution." "0: No Operation,?,2: Run BIST,?"
|
|
rgroup.long 0xA8++0x3
|
|
line.long 0x0 "BRST,BIST reset register"
|
|
bitfld.long 0x0 1. "SRST,This bit controls the status reset for the BIST module." "0: No Operation,1: RESET"
|
|
bitfld.long 0x0 0. "BRST,This bit controls the soft reset for the BIST module." "0: No Operation,1: RESET"
|
|
rgroup.long 0xB8++0x3
|
|
line.long 0x0 "BSTAT,BIST status register"
|
|
bitfld.long 0x0 3. "BSTAT3,This bit indicates when the BIST has stopped in Stop-On-Fail or Stop-On-Read modes." "0: BIST is not on SOR/SOF or it is running.,1: BIST has stopped."
|
|
bitfld.long 0x0 0.--1. "BSTAT1,These bits indicate the present state of the BIST." "0: Bist has never ran (after reset state).,1: Bist is busy running a test.,2: Finished test with no fails.,3: Finished test with fails."
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0xBC)++0x3
|
|
line.long 0x0 "BFPM$1,BIST Fail Per Memory register"
|
|
hexmask.long 0x0 0.--31. 1. "FPMn,Fail Per Memory"
|
|
repeat.end
|
|
group.long 0xFC++0x3
|
|
line.long 0x0 "ROM_SEL,ROM Selection register"
|
|
bitfld.long 0x0 16. "ROMSEL14,The test will be performed in ROM 14" "0: ROM 14 will not be tested.,1: ROM 14 will be tested."
|
|
bitfld.long 0x0 15. "ROMSEL13,The test will be performed in ROM 13" "0: ROM 13 will not be tested.,1: ROM 13 will be tested."
|
|
newline
|
|
bitfld.long 0x0 14. "ROMSEL12,The test will be performed in ROM 12" "0: ROM 12 will not be tested.,1: ROM 12 will be tested."
|
|
bitfld.long 0x0 13. "ROMSEL11,The test will be performed in ROM 11" "0: ROM 11 will not be tested.,1: ROM 11 will be tested."
|
|
newline
|
|
bitfld.long 0x0 12. "ROMSEL10,The test will be performed in ROM 10" "0: ROM 10 will not be tested.,1: ROM 10 will be tested."
|
|
bitfld.long 0x0 11. "ROMSEL9,The test will be performed in ROM 9" "0: ROM 9 will not be tested.,1: ROM 9 will be tested."
|
|
newline
|
|
bitfld.long 0x0 10. "ROMSEL8,The test will be performed in ROM 8" "0: ROM 8 will not be tested.,1: ROM 8 will be tested."
|
|
bitfld.long 0x0 9. "ROMSEL7,The test will be performed in ROM 7" "0: ROM 7 will not be tested.,1: ROM 7 will be tested."
|
|
newline
|
|
bitfld.long 0x0 8. "ROMSEL6,The test will be performed in ROM 6" "0: ROM 6 will not be tested.,1: ROM 6 will be tested."
|
|
bitfld.long 0x0 7. "ROMSEL5,The test will be performed in ROM 5" "0: ROM 5 will not be tested.,1: ROM 5 will be tested."
|
|
newline
|
|
bitfld.long 0x0 6. "ROMSEL4,The test will be performed in ROM 4" "0: ROM 4 will not be tested.,1: ROM 4 will be tested."
|
|
bitfld.long 0x0 5. "ROMSEL3,The test will be performed in ROM 3" "0: ROM 3 will not be tested.,1: ROM 3 will be tested."
|
|
newline
|
|
bitfld.long 0x0 4. "ROMSEL2,The test will be performed in ROM 2" "0: ROM 2 will not be tested.,1: ROM 2 will be tested."
|
|
bitfld.long 0x0 3. "ROMSEL1,The test will be performed in ROM 1" "0: ROM 1 will not be tested.,1: ROM 1 will be tested."
|
|
newline
|
|
bitfld.long 0x0 2. "ROMSEL0,The test will be performed in ROM 0" "0: ROM 0 will not be tested.,1: ROM 0 will be tested."
|
|
bitfld.long 0x0 0.--1. "MISRL,MISR location" "?,?,?,3: Location"
|
|
rgroup.long 0x100++0x3
|
|
line.long 0x0 "ROM_STAT,ROM General Status register"
|
|
bitfld.long 0x0 18. "RFPM14,This bit is set when it was detected an error in ROM 14" "0: ROM 14 passed the test.,1: ROM 14 failed the test."
|
|
bitfld.long 0x0 17. "RFPM13,This bit is set when it was detected an error in ROM 13" "0: ROM 13 passed the test.,1: ROM 13 failed the test."
|
|
newline
|
|
bitfld.long 0x0 16. "RFPM12,This bit is set when it was detected an error in ROM 12" "0: ROM 12 passed the test.,1: ROM 12 failed the test."
|
|
bitfld.long 0x0 15. "RFPM11,This bit is set when it was detected an error in ROM 11" "0: ROM 11 passed the test.,1: ROM 11 failed the test."
|
|
newline
|
|
bitfld.long 0x0 14. "RFPM10,This bit is set when it was detected an error in ROM 10" "0: ROM 10 passed the test.,1: ROM 10 failed the test."
|
|
bitfld.long 0x0 13. "RFPM9,This bit is set when it was detected an error in ROM 9" "0: ROM 9 passed the test.,1: ROM 9 failed the test."
|
|
newline
|
|
bitfld.long 0x0 12. "RFPM8,This bit is set when it was detected an error in ROM 8" "0: ROM 8 passed the test.,1: ROM 8 failed the test."
|
|
bitfld.long 0x0 11. "RFPM7,This bit is set when it was detected an error in ROM 7" "0: ROM 7 passed the test.,1: ROM 7 failed the test."
|
|
newline
|
|
bitfld.long 0x0 10. "RFPM6,This bit is set when it was detected an error in ROM 6" "0: ROM 6 passed the test.,1: ROM 6 failed the test."
|
|
bitfld.long 0x0 9. "RFPM5,This bit is set when it was detected an error in ROM 5" "0: ROM 5 passed the test.,1: ROM 5 failed the test."
|
|
newline
|
|
bitfld.long 0x0 8. "RFPM4,This bit is set when it was detected an error in ROM 4" "0: ROM 4 passed the test.,1: ROM 4 failed the test."
|
|
bitfld.long 0x0 7. "RFPM3,This bit is set when it was detected an error in ROM 3" "0: ROM 3 passed the test.,1: ROM 3 failed the test."
|
|
newline
|
|
bitfld.long 0x0 6. "RFPM2,This bit is set when it was detected an error in ROM 2" "0: ROM 2 passed the test.,1: ROM 2 failed the test."
|
|
bitfld.long 0x0 5. "RFPM1,This bit is set when it was detected an error in ROM 1" "0: ROM 1 passed the test.,1: ROM 1 failed the test."
|
|
newline
|
|
bitfld.long 0x0 4. "RFPM0,This bit is set when it was detected an error in ROM 0" "0: ROM 0 passed the test.,1: ROM 0 failed the test."
|
|
bitfld.long 0x0 3. "BSTAT3,This bit indicates when the BIST has stopped in Stop-On-Read modes." "0: BIST is not on SOR or it is running.,1: BIST has stopped."
|
|
newline
|
|
bitfld.long 0x0 2. "BSTAT2,This bit indicates if an error has been detected." "0: No error has been detected.,1: An error has been detected."
|
|
bitfld.long 0x0 0.--1. "BSTAT1,These bits indicate the present state of the BIST." "0: BIST has never ran (after reset state).,1: BIST is busy running a test.,2: Finished test with no fails.,3: Finished test with fails."
|
|
rgroup.long 0x110++0x3
|
|
line.long 0x0 "ADDR_DBG,Address Debug register"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "ADDR,Address"
|
|
repeat 16. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x114)++0x3
|
|
line.long 0x0 "DBG$1,Data Debug register"
|
|
hexmask.long 0x0 0.--31. 1. "CDATAn,Compared data"
|
|
repeat.end
|
|
tree.end
|
|
tree "CMU (Clock Monitor Unit)"
|
|
base ad:0x0
|
|
tree "CMU_0"
|
|
base ad:0x400C4000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CSR,CMU Control Status Register"
|
|
bitfld.long 0x0 23. "SFM,Start frequency measure." "0: Frequency measurement is completed or not yet..,1: Frequency measurement is not completed"
|
|
bitfld.long 0x0 8.--9. "CKSEL1,Frequency measure clock selection bit." "0: CLKMT0_RMN is selected,?,2: CLKMT2 is selected,3: CLKMT0_RMN is selected"
|
|
bitfld.long 0x0 1.--2. "RCDIV,CLKMT0_RMN division factor." "0: CLKMT0_RMN * 1 (No division),1: CLKMT0_RMN * 2,2: CLKMT0_RMN * 4,3: CLKMT0_RMN * 8"
|
|
newline
|
|
bitfld.long 0x0 0. "CME,CLKMN1 monitor enable." "0: CLKMN1 monitor is disabled,1: CLKMN1 monitor is enabled"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "FDR,CMU Frequency Display Register"
|
|
hexmask.long.tbyte 0x0 0.--19. 1. "FD,Measured frequency bits."
|
|
group.long 0x8++0xB
|
|
line.long 0x0 "HFREFR,CMU High Frequency Reference Register CLKMN1"
|
|
hexmask.long.word 0x0 0.--11. 1. "HFREF,High Frequency reference value."
|
|
line.long 0x4 "LFREFR,CMU Low Frequency Reference Register CLKMN1"
|
|
hexmask.long.word 0x4 0.--11. 1. "LFREF,Low Frequency reference value."
|
|
line.long 0x8 "ISR,CMU Interrupt Status Register"
|
|
bitfld.long 0x8 2. "FHHI,CLKMN1 frequency higher than high reference event status." "0: No FHH event,1: FHH event occurred"
|
|
bitfld.long 0x8 1. "FLLI,CLKMN1 frequency less than low reference event status." "0: No FLL event,1: FLL event occurred"
|
|
bitfld.long 0x8 0. "OLRI,Oscillator frequency less than f CLKMT0_RMN * 2CMU_CSR[RCDIV]event status." "0: No OLR event,1: OLR event occurred"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "MDR,CMU Measurement Duration Register"
|
|
hexmask.long.tbyte 0x0 0.--19. 1. "MD,Measurement duration bits"
|
|
tree.end
|
|
tree "CMU_1"
|
|
base ad:0x400C4020
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CSR,CMU Control Status Register"
|
|
bitfld.long 0x0 23. "SFM,Start frequency measure." "0: Frequency measurement is completed or not yet..,1: Frequency measurement is not completed"
|
|
bitfld.long 0x0 8.--9. "CKSEL1,Frequency measure clock selection bit." "0: CLKMT0_RMN is selected,?,2: CLKMT2 is selected,3: CLKMT0_RMN is selected"
|
|
bitfld.long 0x0 1.--2. "RCDIV,CLKMT0_RMN division factor." "0: CLKMT0_RMN * 1 (No division),1: CLKMT0_RMN * 2,2: CLKMT0_RMN * 4,3: CLKMT0_RMN * 8"
|
|
newline
|
|
bitfld.long 0x0 0. "CME,CLKMN1 monitor enable." "0: CLKMN1 monitor is disabled,1: CLKMN1 monitor is enabled"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "FDR,CMU Frequency Display Register"
|
|
hexmask.long.tbyte 0x0 0.--19. 1. "FD,Measured frequency bits."
|
|
group.long 0x8++0xB
|
|
line.long 0x0 "HFREFR,CMU High Frequency Reference Register CLKMN1"
|
|
hexmask.long.word 0x0 0.--11. 1. "HFREF,High Frequency reference value."
|
|
line.long 0x4 "LFREFR,CMU Low Frequency Reference Register CLKMN1"
|
|
hexmask.long.word 0x4 0.--11. 1. "LFREF,Low Frequency reference value."
|
|
line.long 0x8 "ISR,CMU Interrupt Status Register"
|
|
bitfld.long 0x8 2. "FHHI,CLKMN1 frequency higher than high reference event status." "0: No FHH event,1: FHH event occurred"
|
|
bitfld.long 0x8 1. "FLLI,CLKMN1 frequency less than low reference event status." "0: No FLL event,1: FLL event occurred"
|
|
bitfld.long 0x8 0. "OLRI,Oscillator frequency less than f CLKMT0_RMN * 2CMU_CSR[RCDIV]event status." "0: No OLR event,1: OLR event occurred"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "MDR,CMU Measurement Duration Register"
|
|
hexmask.long.tbyte 0x0 0.--19. 1. "MD,Measurement duration bits"
|
|
tree.end
|
|
tree "CMU_2"
|
|
base ad:0x400C4040
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CSR,CMU Control Status Register"
|
|
bitfld.long 0x0 23. "SFM,Start frequency measure." "0: Frequency measurement is completed or not yet..,1: Frequency measurement is not completed"
|
|
bitfld.long 0x0 8.--9. "CKSEL1,Frequency measure clock selection bit." "0: CLKMT0_RMN is selected,?,2: CLKMT2 is selected,3: CLKMT0_RMN is selected"
|
|
bitfld.long 0x0 1.--2. "RCDIV,CLKMT0_RMN division factor." "0: CLKMT0_RMN * 1 (No division),1: CLKMT0_RMN * 2,2: CLKMT0_RMN * 4,3: CLKMT0_RMN * 8"
|
|
newline
|
|
bitfld.long 0x0 0. "CME,CLKMN1 monitor enable." "0: CLKMN1 monitor is disabled,1: CLKMN1 monitor is enabled"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "FDR,CMU Frequency Display Register"
|
|
hexmask.long.tbyte 0x0 0.--19. 1. "FD,Measured frequency bits."
|
|
group.long 0x8++0xB
|
|
line.long 0x0 "HFREFR,CMU High Frequency Reference Register CLKMN1"
|
|
hexmask.long.word 0x0 0.--11. 1. "HFREF,High Frequency reference value."
|
|
line.long 0x4 "LFREFR,CMU Low Frequency Reference Register CLKMN1"
|
|
hexmask.long.word 0x4 0.--11. 1. "LFREF,Low Frequency reference value."
|
|
line.long 0x8 "ISR,CMU Interrupt Status Register"
|
|
bitfld.long 0x8 2. "FHHI,CLKMN1 frequency higher than high reference event status." "0: No FHH event,1: FHH event occurred"
|
|
bitfld.long 0x8 1. "FLLI,CLKMN1 frequency less than low reference event status." "0: No FLL event,1: FLL event occurred"
|
|
bitfld.long 0x8 0. "OLRI,Oscillator frequency less than f CLKMT0_RMN * 2CMU_CSR[RCDIV]event status." "0: No OLR event,1: OLR event occurred"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "MDR,CMU Measurement Duration Register"
|
|
hexmask.long.tbyte 0x0 0.--19. 1. "MD,Measurement duration bits"
|
|
tree.end
|
|
tree "CMU_3"
|
|
base ad:0x400C4060
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CSR,CMU Control Status Register"
|
|
bitfld.long 0x0 23. "SFM,Start frequency measure." "0: Frequency measurement is completed or not yet..,1: Frequency measurement is not completed"
|
|
bitfld.long 0x0 8.--9. "CKSEL1,Frequency measure clock selection bit." "0: CLKMT0_RMN is selected,?,2: CLKMT2 is selected,3: CLKMT0_RMN is selected"
|
|
bitfld.long 0x0 1.--2. "RCDIV,CLKMT0_RMN division factor." "0: CLKMT0_RMN * 1 (No division),1: CLKMT0_RMN * 2,2: CLKMT0_RMN * 4,3: CLKMT0_RMN * 8"
|
|
newline
|
|
bitfld.long 0x0 0. "CME,CLKMN1 monitor enable." "0: CLKMN1 monitor is disabled,1: CLKMN1 monitor is enabled"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "FDR,CMU Frequency Display Register"
|
|
hexmask.long.tbyte 0x0 0.--19. 1. "FD,Measured frequency bits."
|
|
group.long 0x8++0xB
|
|
line.long 0x0 "HFREFR,CMU High Frequency Reference Register CLKMN1"
|
|
hexmask.long.word 0x0 0.--11. 1. "HFREF,High Frequency reference value."
|
|
line.long 0x4 "LFREFR,CMU Low Frequency Reference Register CLKMN1"
|
|
hexmask.long.word 0x4 0.--11. 1. "LFREF,Low Frequency reference value."
|
|
line.long 0x8 "ISR,CMU Interrupt Status Register"
|
|
bitfld.long 0x8 2. "FHHI,CLKMN1 frequency higher than high reference event status." "0: No FHH event,1: FHH event occurred"
|
|
bitfld.long 0x8 1. "FLLI,CLKMN1 frequency less than low reference event status." "0: No FLL event,1: FLL event occurred"
|
|
bitfld.long 0x8 0. "OLRI,Oscillator frequency less than f CLKMT0_RMN * 2CMU_CSR[RCDIV]event status." "0: No OLR event,1: OLR event occurred"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "MDR,CMU Measurement Duration Register"
|
|
hexmask.long.tbyte 0x0 0.--19. 1. "MD,Measurement duration bits"
|
|
tree.end
|
|
tree "CMU_4"
|
|
base ad:0x400C4080
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CSR,CMU Control Status Register"
|
|
bitfld.long 0x0 23. "SFM,Start frequency measure." "0: Frequency measurement is completed or not yet..,1: Frequency measurement is not completed"
|
|
bitfld.long 0x0 8.--9. "CKSEL1,Frequency measure clock selection bit." "0: CLKMT0_RMN is selected,?,2: CLKMT2 is selected,3: CLKMT0_RMN is selected"
|
|
bitfld.long 0x0 1.--2. "RCDIV,CLKMT0_RMN division factor." "0: CLKMT0_RMN * 1 (No division),1: CLKMT0_RMN * 2,2: CLKMT0_RMN * 4,3: CLKMT0_RMN * 8"
|
|
newline
|
|
bitfld.long 0x0 0. "CME,CLKMN1 monitor enable." "0: CLKMN1 monitor is disabled,1: CLKMN1 monitor is enabled"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "FDR,CMU Frequency Display Register"
|
|
hexmask.long.tbyte 0x0 0.--19. 1. "FD,Measured frequency bits."
|
|
group.long 0x8++0xB
|
|
line.long 0x0 "HFREFR,CMU High Frequency Reference Register CLKMN1"
|
|
hexmask.long.word 0x0 0.--11. 1. "HFREF,High Frequency reference value."
|
|
line.long 0x4 "LFREFR,CMU Low Frequency Reference Register CLKMN1"
|
|
hexmask.long.word 0x4 0.--11. 1. "LFREF,Low Frequency reference value."
|
|
line.long 0x8 "ISR,CMU Interrupt Status Register"
|
|
bitfld.long 0x8 2. "FHHI,CLKMN1 frequency higher than high reference event status." "0: No FHH event,1: FHH event occurred"
|
|
bitfld.long 0x8 1. "FLLI,CLKMN1 frequency less than low reference event status." "0: No FLL event,1: FLL event occurred"
|
|
bitfld.long 0x8 0. "OLRI,Oscillator frequency less than f CLKMT0_RMN * 2CMU_CSR[RCDIV]event status." "0: No OLR event,1: OLR event occurred"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "MDR,CMU Measurement Duration Register"
|
|
hexmask.long.tbyte 0x0 0.--19. 1. "MD,Measurement duration bits"
|
|
tree.end
|
|
tree "CMU_5"
|
|
base ad:0x400C40A0
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CSR,CMU Control Status Register"
|
|
bitfld.long 0x0 23. "SFM,Start frequency measure." "0: Frequency measurement is completed or not yet..,1: Frequency measurement is not completed"
|
|
bitfld.long 0x0 8.--9. "CKSEL1,Frequency measure clock selection bit." "0: CLKMT0_RMN is selected,?,2: CLKMT2 is selected,3: CLKMT0_RMN is selected"
|
|
bitfld.long 0x0 1.--2. "RCDIV,CLKMT0_RMN division factor." "0: CLKMT0_RMN * 1 (No division),1: CLKMT0_RMN * 2,2: CLKMT0_RMN * 4,3: CLKMT0_RMN * 8"
|
|
newline
|
|
bitfld.long 0x0 0. "CME,CLKMN1 monitor enable." "0: CLKMN1 monitor is disabled,1: CLKMN1 monitor is enabled"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "FDR,CMU Frequency Display Register"
|
|
hexmask.long.tbyte 0x0 0.--19. 1. "FD,Measured frequency bits."
|
|
group.long 0x8++0xB
|
|
line.long 0x0 "HFREFR,CMU High Frequency Reference Register CLKMN1"
|
|
hexmask.long.word 0x0 0.--11. 1. "HFREF,High Frequency reference value."
|
|
line.long 0x4 "LFREFR,CMU Low Frequency Reference Register CLKMN1"
|
|
hexmask.long.word 0x4 0.--11. 1. "LFREF,Low Frequency reference value."
|
|
line.long 0x8 "ISR,CMU Interrupt Status Register"
|
|
bitfld.long 0x8 2. "FHHI,CLKMN1 frequency higher than high reference event status." "0: No FHH event,1: FHH event occurred"
|
|
bitfld.long 0x8 1. "FLLI,CLKMN1 frequency less than low reference event status." "0: No FLL event,1: FLL event occurred"
|
|
bitfld.long 0x8 0. "OLRI,Oscillator frequency less than f CLKMT0_RMN * 2CMU_CSR[RCDIV]event status." "0: No OLR event,1: OLR event occurred"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "MDR,CMU Measurement Duration Register"
|
|
hexmask.long.tbyte 0x0 0.--19. 1. "MD,Measurement duration bits"
|
|
tree.end
|
|
tree "CMU_6"
|
|
base ad:0x400C40C0
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CSR,CMU Control Status Register"
|
|
bitfld.long 0x0 23. "SFM,Start frequency measure." "0: Frequency measurement is completed or not yet..,1: Frequency measurement is not completed"
|
|
bitfld.long 0x0 8.--9. "CKSEL1,Frequency measure clock selection bit." "0: CLKMT0_RMN is selected,?,2: CLKMT2 is selected,3: CLKMT0_RMN is selected"
|
|
bitfld.long 0x0 1.--2. "RCDIV,CLKMT0_RMN division factor." "0: CLKMT0_RMN * 1 (No division),1: CLKMT0_RMN * 2,2: CLKMT0_RMN * 4,3: CLKMT0_RMN * 8"
|
|
newline
|
|
bitfld.long 0x0 0. "CME,CLKMN1 monitor enable." "0: CLKMN1 monitor is disabled,1: CLKMN1 monitor is enabled"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "FDR,CMU Frequency Display Register"
|
|
hexmask.long.tbyte 0x0 0.--19. 1. "FD,Measured frequency bits."
|
|
group.long 0x8++0xB
|
|
line.long 0x0 "HFREFR,CMU High Frequency Reference Register CLKMN1"
|
|
hexmask.long.word 0x0 0.--11. 1. "HFREF,High Frequency reference value."
|
|
line.long 0x4 "LFREFR,CMU Low Frequency Reference Register CLKMN1"
|
|
hexmask.long.word 0x4 0.--11. 1. "LFREF,Low Frequency reference value."
|
|
line.long 0x8 "ISR,CMU Interrupt Status Register"
|
|
bitfld.long 0x8 2. "FHHI,CLKMN1 frequency higher than high reference event status." "0: No FHH event,1: FHH event occurred"
|
|
bitfld.long 0x8 1. "FLLI,CLKMN1 frequency less than low reference event status." "0: No FLL event,1: FLL event occurred"
|
|
bitfld.long 0x8 0. "OLRI,Oscillator frequency less than f CLKMT0_RMN * 2CMU_CSR[RCDIV]event status." "0: No OLR event,1: OLR event occurred"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "MDR,CMU Measurement Duration Register"
|
|
hexmask.long.tbyte 0x0 0.--19. 1. "MD,Measurement duration bits"
|
|
tree.end
|
|
tree "CMU_7"
|
|
base ad:0x400C40E0
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CSR,CMU Control Status Register"
|
|
bitfld.long 0x0 23. "SFM,Start frequency measure." "0: Frequency measurement is completed or not yet..,1: Frequency measurement is not completed"
|
|
bitfld.long 0x0 8.--9. "CKSEL1,Frequency measure clock selection bit." "0: CLKMT0_RMN is selected,?,2: CLKMT2 is selected,3: CLKMT0_RMN is selected"
|
|
bitfld.long 0x0 1.--2. "RCDIV,CLKMT0_RMN division factor." "0: CLKMT0_RMN * 1 (No division),1: CLKMT0_RMN * 2,2: CLKMT0_RMN * 4,3: CLKMT0_RMN * 8"
|
|
newline
|
|
bitfld.long 0x0 0. "CME,CLKMN1 monitor enable." "0: CLKMN1 monitor is disabled,1: CLKMN1 monitor is enabled"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "FDR,CMU Frequency Display Register"
|
|
hexmask.long.tbyte 0x0 0.--19. 1. "FD,Measured frequency bits."
|
|
group.long 0x8++0xB
|
|
line.long 0x0 "HFREFR,CMU High Frequency Reference Register CLKMN1"
|
|
hexmask.long.word 0x0 0.--11. 1. "HFREF,High Frequency reference value."
|
|
line.long 0x4 "LFREFR,CMU Low Frequency Reference Register CLKMN1"
|
|
hexmask.long.word 0x4 0.--11. 1. "LFREF,Low Frequency reference value."
|
|
line.long 0x8 "ISR,CMU Interrupt Status Register"
|
|
bitfld.long 0x8 2. "FHHI,CLKMN1 frequency higher than high reference event status." "0: No FHH event,1: FHH event occurred"
|
|
bitfld.long 0x8 1. "FLLI,CLKMN1 frequency less than low reference event status." "0: No FLL event,1: FLL event occurred"
|
|
bitfld.long 0x8 0. "OLRI,Oscillator frequency less than f CLKMT0_RMN * 2CMU_CSR[RCDIV]event status." "0: No OLR event,1: OLR event occurred"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "MDR,CMU Measurement Duration Register"
|
|
hexmask.long.tbyte 0x0 0.--19. 1. "MD,Measurement duration bits"
|
|
tree.end
|
|
tree "CMU_8"
|
|
base ad:0x400C4100
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CSR,CMU Control Status Register"
|
|
bitfld.long 0x0 23. "SFM,Start frequency measure." "0: Frequency measurement is completed or not yet..,1: Frequency measurement is not completed"
|
|
bitfld.long 0x0 8.--9. "CKSEL1,Frequency measure clock selection bit." "0: CLKMT0_RMN is selected,?,2: CLKMT2 is selected,3: CLKMT0_RMN is selected"
|
|
bitfld.long 0x0 1.--2. "RCDIV,CLKMT0_RMN division factor." "0: CLKMT0_RMN * 1 (No division),1: CLKMT0_RMN * 2,2: CLKMT0_RMN * 4,3: CLKMT0_RMN * 8"
|
|
newline
|
|
bitfld.long 0x0 0. "CME,CLKMN1 monitor enable." "0: CLKMN1 monitor is disabled,1: CLKMN1 monitor is enabled"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "FDR,CMU Frequency Display Register"
|
|
hexmask.long.tbyte 0x0 0.--19. 1. "FD,Measured frequency bits."
|
|
group.long 0x8++0xB
|
|
line.long 0x0 "HFREFR,CMU High Frequency Reference Register CLKMN1"
|
|
hexmask.long.word 0x0 0.--11. 1. "HFREF,High Frequency reference value."
|
|
line.long 0x4 "LFREFR,CMU Low Frequency Reference Register CLKMN1"
|
|
hexmask.long.word 0x4 0.--11. 1. "LFREF,Low Frequency reference value."
|
|
line.long 0x8 "ISR,CMU Interrupt Status Register"
|
|
bitfld.long 0x8 2. "FHHI,CLKMN1 frequency higher than high reference event status." "0: No FHH event,1: FHH event occurred"
|
|
bitfld.long 0x8 1. "FLLI,CLKMN1 frequency less than low reference event status." "0: No FLL event,1: FLL event occurred"
|
|
bitfld.long 0x8 0. "OLRI,Oscillator frequency less than f CLKMT0_RMN * 2CMU_CSR[RCDIV]event status." "0: No OLR event,1: OLR event occurred"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "MDR,CMU Measurement Duration Register"
|
|
hexmask.long.tbyte 0x0 0.--19. 1. "MD,Measurement duration bits"
|
|
tree.end
|
|
tree "CMU_9"
|
|
base ad:0x400C4120
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CSR,CMU Control Status Register"
|
|
bitfld.long 0x0 23. "SFM,Start frequency measure." "0: Frequency measurement is completed or not yet..,1: Frequency measurement is not completed"
|
|
bitfld.long 0x0 8.--9. "CKSEL1,Frequency measure clock selection bit." "0: CLKMT0_RMN is selected,?,2: CLKMT2 is selected,3: CLKMT0_RMN is selected"
|
|
bitfld.long 0x0 1.--2. "RCDIV,CLKMT0_RMN division factor." "0: CLKMT0_RMN * 1 (No division),1: CLKMT0_RMN * 2,2: CLKMT0_RMN * 4,3: CLKMT0_RMN * 8"
|
|
newline
|
|
bitfld.long 0x0 0. "CME,CLKMN1 monitor enable." "0: CLKMN1 monitor is disabled,1: CLKMN1 monitor is enabled"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "FDR,CMU Frequency Display Register"
|
|
hexmask.long.tbyte 0x0 0.--19. 1. "FD,Measured frequency bits."
|
|
group.long 0x8++0xB
|
|
line.long 0x0 "HFREFR,CMU High Frequency Reference Register CLKMN1"
|
|
hexmask.long.word 0x0 0.--11. 1. "HFREF,High Frequency reference value."
|
|
line.long 0x4 "LFREFR,CMU Low Frequency Reference Register CLKMN1"
|
|
hexmask.long.word 0x4 0.--11. 1. "LFREF,Low Frequency reference value."
|
|
line.long 0x8 "ISR,CMU Interrupt Status Register"
|
|
bitfld.long 0x8 2. "FHHI,CLKMN1 frequency higher than high reference event status." "0: No FHH event,1: FHH event occurred"
|
|
bitfld.long 0x8 1. "FLLI,CLKMN1 frequency less than low reference event status." "0: No FLL event,1: FLL event occurred"
|
|
bitfld.long 0x8 0. "OLRI,Oscillator frequency less than f CLKMT0_RMN * 2CMU_CSR[RCDIV]event status." "0: No OLR event,1: OLR event occurred"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "MDR,CMU Measurement Duration Register"
|
|
hexmask.long.tbyte 0x0 0.--19. 1. "MD,Measurement duration bits"
|
|
tree.end
|
|
tree "CMU_10"
|
|
base ad:0x400C4140
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CSR,CMU Control Status Register"
|
|
bitfld.long 0x0 23. "SFM,Start frequency measure." "0: Frequency measurement is completed or not yet..,1: Frequency measurement is not completed"
|
|
bitfld.long 0x0 8.--9. "CKSEL1,Frequency measure clock selection bit." "0: CLKMT0_RMN is selected,?,2: CLKMT2 is selected,3: CLKMT0_RMN is selected"
|
|
bitfld.long 0x0 1.--2. "RCDIV,CLKMT0_RMN division factor." "0: CLKMT0_RMN * 1 (No division),1: CLKMT0_RMN * 2,2: CLKMT0_RMN * 4,3: CLKMT0_RMN * 8"
|
|
newline
|
|
bitfld.long 0x0 0. "CME,CLKMN1 monitor enable." "0: CLKMN1 monitor is disabled,1: CLKMN1 monitor is enabled"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "FDR,CMU Frequency Display Register"
|
|
hexmask.long.tbyte 0x0 0.--19. 1. "FD,Measured frequency bits."
|
|
group.long 0x8++0xB
|
|
line.long 0x0 "HFREFR,CMU High Frequency Reference Register CLKMN1"
|
|
hexmask.long.word 0x0 0.--11. 1. "HFREF,High Frequency reference value."
|
|
line.long 0x4 "LFREFR,CMU Low Frequency Reference Register CLKMN1"
|
|
hexmask.long.word 0x4 0.--11. 1. "LFREF,Low Frequency reference value."
|
|
line.long 0x8 "ISR,CMU Interrupt Status Register"
|
|
bitfld.long 0x8 2. "FHHI,CLKMN1 frequency higher than high reference event status." "0: No FHH event,1: FHH event occurred"
|
|
bitfld.long 0x8 1. "FLLI,CLKMN1 frequency less than low reference event status." "0: No FLL event,1: FLL event occurred"
|
|
bitfld.long 0x8 0. "OLRI,Oscillator frequency less than f CLKMT0_RMN * 2CMU_CSR[RCDIV]event status." "0: No OLR event,1: OLR event occurred"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "MDR,CMU Measurement Duration Register"
|
|
hexmask.long.tbyte 0x0 0.--19. 1. "MD,Measurement duration bits"
|
|
tree.end
|
|
tree "CMU_11"
|
|
base ad:0x400C4160
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CSR,CMU Control Status Register"
|
|
bitfld.long 0x0 23. "SFM,Start frequency measure." "0: Frequency measurement is completed or not yet..,1: Frequency measurement is not completed"
|
|
bitfld.long 0x0 8.--9. "CKSEL1,Frequency measure clock selection bit." "0: CLKMT0_RMN is selected,?,2: CLKMT2 is selected,3: CLKMT0_RMN is selected"
|
|
bitfld.long 0x0 1.--2. "RCDIV,CLKMT0_RMN division factor." "0: CLKMT0_RMN * 1 (No division),1: CLKMT0_RMN * 2,2: CLKMT0_RMN * 4,3: CLKMT0_RMN * 8"
|
|
newline
|
|
bitfld.long 0x0 0. "CME,CLKMN1 monitor enable." "0: CLKMN1 monitor is disabled,1: CLKMN1 monitor is enabled"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "FDR,CMU Frequency Display Register"
|
|
hexmask.long.tbyte 0x0 0.--19. 1. "FD,Measured frequency bits."
|
|
group.long 0x8++0xB
|
|
line.long 0x0 "HFREFR,CMU High Frequency Reference Register CLKMN1"
|
|
hexmask.long.word 0x0 0.--11. 1. "HFREF,High Frequency reference value."
|
|
line.long 0x4 "LFREFR,CMU Low Frequency Reference Register CLKMN1"
|
|
hexmask.long.word 0x4 0.--11. 1. "LFREF,Low Frequency reference value."
|
|
line.long 0x8 "ISR,CMU Interrupt Status Register"
|
|
bitfld.long 0x8 2. "FHHI,CLKMN1 frequency higher than high reference event status." "0: No FHH event,1: FHH event occurred"
|
|
bitfld.long 0x8 1. "FLLI,CLKMN1 frequency less than low reference event status." "0: No FLL event,1: FLL event occurred"
|
|
bitfld.long 0x8 0. "OLRI,Oscillator frequency less than f CLKMT0_RMN * 2CMU_CSR[RCDIV]event status." "0: No OLR event,1: OLR event occurred"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "MDR,CMU Measurement Duration Register"
|
|
hexmask.long.tbyte 0x0 0.--19. 1. "MD,Measurement duration bits"
|
|
tree.end
|
|
tree "CMU_12"
|
|
base ad:0x400C4180
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CSR,CMU Control Status Register"
|
|
bitfld.long 0x0 23. "SFM,Start frequency measure." "0: Frequency measurement is completed or not yet..,1: Frequency measurement is not completed"
|
|
bitfld.long 0x0 8.--9. "CKSEL1,Frequency measure clock selection bit." "0: CLKMT0_RMN is selected,?,2: CLKMT2 is selected,3: CLKMT0_RMN is selected"
|
|
bitfld.long 0x0 1.--2. "RCDIV,CLKMT0_RMN division factor." "0: CLKMT0_RMN * 1 (No division),1: CLKMT0_RMN * 2,2: CLKMT0_RMN * 4,3: CLKMT0_RMN * 8"
|
|
newline
|
|
bitfld.long 0x0 0. "CME,CLKMN1 monitor enable." "0: CLKMN1 monitor is disabled,1: CLKMN1 monitor is enabled"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "FDR,CMU Frequency Display Register"
|
|
hexmask.long.tbyte 0x0 0.--19. 1. "FD,Measured frequency bits."
|
|
group.long 0x8++0xB
|
|
line.long 0x0 "HFREFR,CMU High Frequency Reference Register CLKMN1"
|
|
hexmask.long.word 0x0 0.--11. 1. "HFREF,High Frequency reference value."
|
|
line.long 0x4 "LFREFR,CMU Low Frequency Reference Register CLKMN1"
|
|
hexmask.long.word 0x4 0.--11. 1. "LFREF,Low Frequency reference value."
|
|
line.long 0x8 "ISR,CMU Interrupt Status Register"
|
|
bitfld.long 0x8 2. "FHHI,CLKMN1 frequency higher than high reference event status." "0: No FHH event,1: FHH event occurred"
|
|
bitfld.long 0x8 1. "FLLI,CLKMN1 frequency less than low reference event status." "0: No FLL event,1: FLL event occurred"
|
|
bitfld.long 0x8 0. "OLRI,Oscillator frequency less than f CLKMT0_RMN * 2CMU_CSR[RCDIV]event status." "0: No OLR event,1: OLR event occurred"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "MDR,CMU Measurement Duration Register"
|
|
hexmask.long.tbyte 0x0 0.--19. 1. "MD,Measurement duration bits"
|
|
tree.end
|
|
tree "CMU_13"
|
|
base ad:0x400C41A0
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CSR,CMU Control Status Register"
|
|
bitfld.long 0x0 23. "SFM,Start frequency measure." "0: Frequency measurement is completed or not yet..,1: Frequency measurement is not completed"
|
|
bitfld.long 0x0 8.--9. "CKSEL1,Frequency measure clock selection bit." "0: CLKMT0_RMN is selected,?,2: CLKMT2 is selected,3: CLKMT0_RMN is selected"
|
|
bitfld.long 0x0 1.--2. "RCDIV,CLKMT0_RMN division factor." "0: CLKMT0_RMN * 1 (No division),1: CLKMT0_RMN * 2,2: CLKMT0_RMN * 4,3: CLKMT0_RMN * 8"
|
|
newline
|
|
bitfld.long 0x0 0. "CME,CLKMN1 monitor enable." "0: CLKMN1 monitor is disabled,1: CLKMN1 monitor is enabled"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "FDR,CMU Frequency Display Register"
|
|
hexmask.long.tbyte 0x0 0.--19. 1. "FD,Measured frequency bits."
|
|
group.long 0x8++0xB
|
|
line.long 0x0 "HFREFR,CMU High Frequency Reference Register CLKMN1"
|
|
hexmask.long.word 0x0 0.--11. 1. "HFREF,High Frequency reference value."
|
|
line.long 0x4 "LFREFR,CMU Low Frequency Reference Register CLKMN1"
|
|
hexmask.long.word 0x4 0.--11. 1. "LFREF,Low Frequency reference value."
|
|
line.long 0x8 "ISR,CMU Interrupt Status Register"
|
|
bitfld.long 0x8 2. "FHHI,CLKMN1 frequency higher than high reference event status." "0: No FHH event,1: FHH event occurred"
|
|
bitfld.long 0x8 1. "FLLI,CLKMN1 frequency less than low reference event status." "0: No FLL event,1: FLL event occurred"
|
|
bitfld.long 0x8 0. "OLRI,Oscillator frequency less than f CLKMT0_RMN * 2CMU_CSR[RCDIV]event status." "0: No OLR event,1: OLR event occurred"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "MDR,CMU Measurement Duration Register"
|
|
hexmask.long.tbyte 0x0 0.--19. 1. "MD,Measurement duration bits"
|
|
tree.end
|
|
tree.end
|
|
tree "CRC (Cyclic Redundancy Check)"
|
|
base ad:0x0
|
|
tree "CRC_0"
|
|
base ad:0x4005B000
|
|
repeat 3. (increment 0x0 0x1)(increment 0x0 0x10)
|
|
group.long ($2)++0x3
|
|
line.long 0x0 "CFG$1,Configuration Register"
|
|
bitfld.long 0x0 5. "SWAP_BYTEWISE,Swap CRC_INP byte-wise" "0: Do not swap,1: Perform byte-wise swap on CRC_INP input data.."
|
|
bitfld.long 0x0 4. "SWAP_BITWISE,Swap CRC_INP bit-wise" "0: Do not swap,1: Perform bit-wise swap on CRC_INP input data.."
|
|
newline
|
|
bitfld.long 0x0 2.--3. "POLYG,Polynomial selection" "0: CRC-CCITT polynomial,1: CRC-32 polynomial,2: CRC-8 polynomial,3: CRC-8-H2F Autosar polynomial"
|
|
bitfld.long 0x0 1. "SWAP,Swap selection" "0: No swap selection applied on the CRC_OUTP content,1: Swap selection (MSB to LSB LSB to MSB) applied.."
|
|
newline
|
|
bitfld.long 0x0 0. "INV,Inversion selection" "0: No inversion selection applied on the CRC_OUTP..,1: Inversion selection (bit x bit) applied on the.."
|
|
repeat.end
|
|
repeat 3. (increment 0x0 0x1)(increment 0x0 0x10)
|
|
group.long ($2+0x4)++0x3
|
|
line.long 0x0 "INP$1,Input Register"
|
|
hexmask.long 0x0 0.--31. 1. "INP,Input data for the CRC computation"
|
|
repeat.end
|
|
repeat 3. (increment 0x0 0x1)(increment 0x0 0x10)
|
|
group.long ($2+0x8)++0x3
|
|
line.long 0x0 "CSTAT$1,Current Status Register"
|
|
hexmask.long 0x0 0.--31. 1. "CSTAT,CRC signature status"
|
|
repeat.end
|
|
repeat 3. (increment 0x0 0x1)(increment 0x0 0x10)
|
|
rgroup.long ($2+0xC)++0x3
|
|
line.long 0x0 "OUTP$1,Output Register"
|
|
hexmask.long 0x0 0.--31. 1. "OUTP,Final CRC signature"
|
|
repeat.end
|
|
tree.end
|
|
tree "CRC_1"
|
|
base ad:0x400CC000
|
|
repeat 3. (increment 0x0 0x1)(increment 0x0 0x10)
|
|
group.long ($2)++0x3
|
|
line.long 0x0 "CFG$1,Configuration Register"
|
|
bitfld.long 0x0 5. "SWAP_BYTEWISE,Swap CRC_INP byte-wise" "0: Do not swap,1: Perform byte-wise swap on CRC_INP input data.."
|
|
bitfld.long 0x0 4. "SWAP_BITWISE,Swap CRC_INP bit-wise" "0: Do not swap,1: Perform bit-wise swap on CRC_INP input data.."
|
|
newline
|
|
bitfld.long 0x0 2.--3. "POLYG,Polynomial selection" "0: CRC-CCITT polynomial,1: CRC-32 polynomial,2: CRC-8 polynomial,3: CRC-8-H2F Autosar polynomial"
|
|
bitfld.long 0x0 1. "SWAP,Swap selection" "0: No swap selection applied on the CRC_OUTP content,1: Swap selection (MSB to LSB LSB to MSB) applied.."
|
|
newline
|
|
bitfld.long 0x0 0. "INV,Inversion selection" "0: No inversion selection applied on the CRC_OUTP..,1: Inversion selection (bit x bit) applied on the.."
|
|
repeat.end
|
|
repeat 3. (increment 0x0 0x1)(increment 0x0 0x10)
|
|
group.long ($2+0x4)++0x3
|
|
line.long 0x0 "INP$1,Input Register"
|
|
hexmask.long 0x0 0.--31. 1. "INP,Input data for the CRC computation"
|
|
repeat.end
|
|
repeat 3. (increment 0x0 0x1)(increment 0x0 0x10)
|
|
group.long ($2+0x8)++0x3
|
|
line.long 0x0 "CSTAT$1,Current Status Register"
|
|
hexmask.long 0x0 0.--31. 1. "CSTAT,CRC signature status"
|
|
repeat.end
|
|
repeat 3. (increment 0x0 0x1)(increment 0x0 0x10)
|
|
rgroup.long ($2+0xC)++0x3
|
|
line.long 0x0 "OUTP$1,Output Register"
|
|
hexmask.long 0x0 0.--31. 1. "OUTP,Final CRC signature"
|
|
repeat.end
|
|
tree.end
|
|
tree.end
|
|
tree "CSE3 (Cryptographic Services Engine)"
|
|
base ad:0x40001000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CR,Control Register"
|
|
bitfld.long 0x0 5. "KBS,Key Bank Select. Selects which set of application keys are visible for commands. See ." "0: Select KEY_1-KEY_10,1: Select KEY_11-KEY_20"
|
|
bitfld.long 0x0 4. "SFE,Security Flag Extension" "0: Security Flag Extension disabled.,1: Security Flag Extension enabled."
|
|
newline
|
|
bitfld.long 0x0 3. "MDIS,Module Disable" "0: Normal mode,1: Low-power mode"
|
|
bitfld.long 0x0 2. "SUS,Suspend Command Processing" "0: Enable processing of commands.,1: Suspend command processing."
|
|
newline
|
|
bitfld.long 0x0 1. "DRE,DMA Request Enable" "0: DMA request not enabled.,1: DMA request enabled."
|
|
bitfld.long 0x0 0. "CIE,Command Complete Interrupt Enable" "0: Command Complete Interrupt disabled.,1: Command Complete Interrupt enabled."
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "SR,Status Register"
|
|
bitfld.long 0x0 10. "LEC,Little Endian Configuration." "0: Big endian byte ordering convention.,1: Little endian byte ordering convention."
|
|
bitfld.long 0x0 9. "FLC,Flash-less Configuration." "0: Keys are stored in an internal secure..,1: Keys are encrypted and stored in an external.."
|
|
newline
|
|
bitfld.long 0x0 8. "EX,Execute.Ignore the status of CSE_SR[EX] when CSE_SR[BSY] flag is '0'." "0: Command processor is idle or suspended.,1: Command processor is executing a command."
|
|
bitfld.long 0x0 7. "IDB,Internal Debug" "0: Internal Debug functions disabled.,1: Internal Debug functions enabled."
|
|
newline
|
|
bitfld.long 0x0 6. "EDB,External Debug. The EDB field is set when the CPU debug port is activated and is cleared on reset." "0: External debugger not attached.,1: External debugger attached."
|
|
bitfld.long 0x0 5. "RIN,Random Number Generator Initialized" "0: Random number generator not initialized.,1: Random number generator initialized."
|
|
newline
|
|
bitfld.long 0x0 4. "BOK,Secure Boot OK" "0: Secure boot not completed or secure boot failure.,1: Secure boot successful."
|
|
bitfld.long 0x0 3. "BFN,Secure Boot Finished" "0: Secure boot not finished.,1: Secure boot finished."
|
|
newline
|
|
bitfld.long 0x0 2. "BIN,Secure Boot Initialization" "0: Secure boot personalization not completed.,1: Secure boot personalization completed."
|
|
bitfld.long 0x0 1. "SB,Secure Boot" "0: Secure boot not activated.,1: Secure boot activated."
|
|
newline
|
|
bitfld.long 0x0 0. "BSY,Busy. The BSY bit is set when a command is issued and cleared when command processing is completed." "0: Command processing completed.,1: Command processing not completed."
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "IR,Interrupt Register"
|
|
bitfld.long 0x0 0. "CIF,Command Complete Interrupt Flag" "0: Command not complete.,1: Command completed."
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x0 "ECR,Error Code Register"
|
|
hexmask.long.byte 0x0 0.--5. 1. "EC,Error Code from the last command completed"
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "TRNG,TRNG Control Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "DLY,TRNG Delay"
|
|
bitfld.long 0x0 0. "TTM,TRNG Test Mode." "0: TRNG operational mode.,1: TRNG test mode which makes internal TRNG.."
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "CMD,Command Register"
|
|
hexmask.long.byte 0x0 0.--4. 1. "CMD,Command. See CSE3 commands for details of each command."
|
|
repeat 5. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x24)++0x3
|
|
line.long 0x0 "P$1,Command Parameter Register"
|
|
hexmask.long 0x0 0.--31. 1. "PARM,Command parameter (data value or address of data value)."
|
|
repeat.end
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x50)++0x3
|
|
line.long 0x0 "KIA$1,Key Image Address Register"
|
|
hexmask.long 0x0 0.--31. 1. "KI_ADDR,Key Image Address."
|
|
repeat.end
|
|
rgroup.long 0x58++0x7
|
|
line.long 0x0 "OTP,OTP Status Register"
|
|
hexmask.long.byte 0x0 0.--5. 1. "SEC_CNT,Secure Counter"
|
|
line.long 0x4 "PC,Publish Count Register"
|
|
hexmask.long 0x4 0.--31. 1. "PUB_CNT,Publish counter value of the loaded key image."
|
|
rgroup.long 0x70++0x7
|
|
line.long 0x0 "SRA0,Secure RAM Address Register"
|
|
hexmask.long 0x0 0.--31. 1. "SEC_RAM_ADDR,Secure RAM start address."
|
|
line.long 0x4 "SRS0,Secure RAM Size Register"
|
|
hexmask.long 0x4 0.--31. 1. "SEC_RAM_SIZE,Secure RAM size in bytes"
|
|
tree.end
|
|
tree "DCU (Two Dimensional Animation and Compositing Engine)"
|
|
base ad:0x40028000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CTRLDESCCURSOR1,Control Descriptor Cursor 1 Register"
|
|
hexmask.long.word 0x0 16.--26. 1. "HEIGHT,Height of the cursor in pixels."
|
|
newline
|
|
hexmask.long.word 0x0 0.--10. 1. "WIDTH,Width of the cursor in pixels."
|
|
line.long 0x4 "CTRLDESCCURSOR2,Control Descriptor Cursor 2 Register"
|
|
hexmask.long.word 0x4 16.--26. 1. "POSY,Y position of the cursor in pixels"
|
|
newline
|
|
hexmask.long.word 0x4 0.--10. 1. "POSX,X position of the cursor in pixels"
|
|
line.long 0x8 "CTRLDESCCURSOR3,Control Descriptor Cursor 3 Register"
|
|
bitfld.long 0x8 31. "CUR_EN,Cursor Enable signal." "0: Cursor is disabled,1: Enable the cursor"
|
|
newline
|
|
hexmask.long.tbyte 0x8 0.--23. 1. "DEFAULT_CURSOR_COLOR,Default pixel color value for the cursor. In the 2D-ACE the pixel value for the cursor is fixed for a particular frame."
|
|
group.long 0x10++0x4F
|
|
line.long 0x0 "MODE,Mode Register"
|
|
bitfld.long 0x0 31. "DCU_SW_RESET,Puts the 2D-ACE internal configuration into its reset state" "0: No action,1: All 2D-ACE internal registers are forced into.."
|
|
newline
|
|
bitfld.long 0x0 30. "EN_DITHER,Enable dithering mode." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 28.--29. "ADDB,Two-bit value to be added to pixel blue component for dithering." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 26.--27. "ADDG,Two bit Value to be added with pixel green component for dithering." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 24.--25. "ADDR,Two-bit value to be added to pixel red component for dithering." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 20.--22. "BLEND_ITER,Defines the maximum number of pixels which are blended in the pixel blend stack." "?,?,2: Two pixel blending,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 14. "RASTER_EN,Enables raster scanning of pixel data including the VSYNC and HSYNC signals and the pixel data. This bit takes effect immediately and does not require a transfer to the frame timing logic." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 6. "TAG_EN,Enables the calculation of CRC only on the safety layers." "0: CRC calculated over the whole area of interest..,1: Calculates CRC only on safety enabled layers"
|
|
newline
|
|
bitfld.long 0x0 5. "SIG_EN,Enables the signature calculator block." "0: Signature calculator is disabled,1: Signature calculator is enabled"
|
|
newline
|
|
bitfld.long 0x0 2. "EN_GAMMA,Enables/Disables the Gamma Correction." "0: Gamma correction is disabled,1: Gamma Correction is enabled"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "DCU_MODE,2D-ACE operating mode." "0: Off (pixel clock active if enabled by I/O).,1: Normal mode. Panel content controlled by layer..,2: Test mode. 2D-ACE disables all DMA fetches and..,3: Color Bar Generation. Panel content controlled.."
|
|
line.long 0x4 "BGND,Background Register"
|
|
hexmask.long.byte 0x4 16.--23. 1. "BGND_R,Red component of the default color displayed in the sectors where no layer is active."
|
|
newline
|
|
hexmask.long.byte 0x4 8.--15. 1. "BGND_G,Green component of the default color displayed in the sectors where no layer is active."
|
|
newline
|
|
hexmask.long.byte 0x4 0.--7. 1. "BGND_B,Blue component of the default color displayed in the sectors where no layer is active."
|
|
line.long 0x8 "DISP_SIZE,Display Size Register"
|
|
hexmask.long.word 0x8 16.--27. 1. "DELTA_Y,Sets the display size vertical resolution (in pixels)"
|
|
newline
|
|
hexmask.long.byte 0x8 0.--7. 1. "DELTA_X,Sets the display size horizontal resolution (in multiples of 16 pixels)"
|
|
line.long 0xC "HSYN_PARA,Horizontal Sync Parameter Register"
|
|
hexmask.long.word 0xC 22.--30. 1. "BP_H,HSYNC back-porch pulse width (in pixel clock cycles). Pulse width has a minimum value of 1."
|
|
newline
|
|
hexmask.long.word 0xC 11.--19. 1. "PW_H,HSYNC active pulse width (in pixel clock cycles)."
|
|
newline
|
|
hexmask.long.word 0xC 0.--8. 1. "FP_H,HSYNC front-porch pulse width (in pixel clock cycles). Pulse width has a minimum value of 1."
|
|
line.long 0x10 "VSYN_PARA,Vertical Sync Parameter Register"
|
|
hexmask.long.word 0x10 22.--30. 1. "BP_V,VSYNC back-porch pulse width (in horizontal line cycles). Pulse width has a minimum value of 1."
|
|
newline
|
|
hexmask.long.word 0x10 11.--19. 1. "PW_V,VSYNC active pulse width (in horizontal line cycles)."
|
|
newline
|
|
hexmask.long.word 0x10 0.--8. 1. "FP_V,VSYNC front-porch pulse width (in horizontal line cycles). Pulse width has a minimum value of 1."
|
|
line.long 0x14 "SYNPOL,Synchronize Polarity Register"
|
|
bitfld.long 0x14 11. "INV_DE,Invert Data Enable polarity" "0,1"
|
|
newline
|
|
bitfld.long 0x14 6. "INV_PXCK,Polarity change of Pixel Clock." "0: Display samples data on the falling edge,1: Display samples data on the rising edge"
|
|
newline
|
|
bitfld.long 0x14 5. "NEG,Indicates if value at the output (pixel data output) needs to be negated." "0: Output is to remain same,1: Output to be negated"
|
|
newline
|
|
bitfld.long 0x14 1. "INV_VS,Invert Vertical synchronization signal." "0: VSYNC signal not inverted (active HIGH).,1: Invert VSYNC signal (active LOW)."
|
|
newline
|
|
bitfld.long 0x14 0. "INV_HS,Invert Horizontal synchronization signal." "0: HSYNC signal not inverted (active HIGH).,1: Invert HSYNC signal (active LOW)."
|
|
line.long 0x18 "THRESHOLD,Threshold Register"
|
|
hexmask.long.word 0x18 16.--26. 1. "LS_BF_VS,Lines before VS_BLANK threshold value. This field provides the value in terms of number of lines before the VS_BLANK interval starts at which the LS_BF_VS status flag in INT_STATUS register is set."
|
|
newline
|
|
hexmask.long.byte 0x18 8.--15. 1. "OUT_BUF_HIGH,Output buffer high threshold (in pixels). When the output buffer exceeds this value the datapath clock is suspended. The maximum programmable threshold is 127."
|
|
newline
|
|
hexmask.long.byte 0x18 0.--7. 1. "OUT_BUF_LOW,Output buffer filling low Threshold (in pixels).This value is used to generate the underrun exception (UNDRUN in INT_STATUS). The maximum programmable threshold is 127."
|
|
line.long 0x1C "INT_STATUS,Interrupt Status Register"
|
|
bitfld.long 0x1C 27. "P2_EMPTY,Interrupt flag to indicate that the FIFO in position 2 in the pixel blend stack underflowed." "0,1"
|
|
newline
|
|
bitfld.long 0x1C 26. "P1_EMPTY,Interrupt flag to indicate that the FIFO in position 1 (lowest) in the pixel blend stack underflowed." "0,1"
|
|
newline
|
|
bitfld.long 0x1C 14. "DMA_TRANS_FINISH,Interrupt flag which indicates that the DMA has fetched the last pixel of data from the memory." "0,1"
|
|
newline
|
|
bitfld.long 0x1C 12. "LYR_TRANS_FINISH,Interrupt flag to indicate that the transfer is complete of layer configuration from the layer control descriptor registers into the functional block" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 11. "IPM_ERROR,Interrupt flag which indicates that an error has occured in an AXI bus read transaction." "0,1"
|
|
newline
|
|
bitfld.long 0x1C 10. "PROG_END,Interrupt flag which indicates that the 2D-ACE has begun to transfer layer configuration from the layer control descriptor registers into the functional block. Any register modification after this time and before LYR_TRANS_FINISH is asserted may.." "0,1"
|
|
newline
|
|
bitfld.long 0x1C 9. "P2_FIFO_HI_FLAG,Interrupt flag to indicate that the high threshold has been reached in the FIFO in position 2 in the pixel blend stack." "0,1"
|
|
newline
|
|
bitfld.long 0x1C 8. "P2_FIFO_LO_FLAG,Interrupt flag to indicate that the low threshold has been reached in the FIFO in position 2 in the pixel blend stack." "0,1"
|
|
newline
|
|
bitfld.long 0x1C 7. "P1_FIFO_HI_FLAG,Interrupt flag to indicate that the high threshold has been reached in the FIFO in position 1 (lowest) in the pixel blend stack." "0,1"
|
|
newline
|
|
bitfld.long 0x1C 6. "P1_FIFO_LO_FLAG,Interrupt flag to indicate that the low threshold has been reached in the FIFO in position 1 (lowest) in the pixel blend stack." "0,1"
|
|
newline
|
|
bitfld.long 0x1C 5. "CRC_OVERFLOW,Interrupt signal to indicate that CRC_ready has not been serviced and CRC has been calculated for the next frame" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 4. "CRC_READY,Interrupt flag to indicate CRC calculation is done and ready to be compared with precomputed CRC value by the software." "0,1"
|
|
newline
|
|
bitfld.long 0x1C 3. "VS_BLANK,Interrupt signal to indicate vertical blanking period. This is the period in which all the registers that affect the visible state of the layers need to be latched. This is needed so that CPU writes to the register while the display is being.." "0,1"
|
|
newline
|
|
bitfld.long 0x1C 2. "LS_BF_VS,Interrupt flag to indicate the Lines Before VS_BLANK event has been reached. The LS_BF_VS field in the Threshold register defines the timing of the event." "0,1"
|
|
newline
|
|
bitfld.long 0x1C 1. "UNDRUN,Interrupt flag to indicate the output buffer underrun condition. Asserted when the panel needs data and the output buffer level is lower than or equal to the OUT_BUF_LOW threshold. Flag is cleared when the data in the output buffer is greater than.." "0,1"
|
|
newline
|
|
bitfld.long 0x1C 0. "VSYNC,Interrupt flag to indicate that the vertical synchronization phase has begun. If enabled an interrupt is generated at the beginning of a frame." "0,1"
|
|
line.long 0x20 "INT_MASK,Interrupt Mask Register"
|
|
bitfld.long 0x20 27. "M_P2_EMPTY,Mask for P2_EMPTY interrupt flag." "0,1"
|
|
newline
|
|
bitfld.long 0x20 26. "M_P1_EMPTY,Mask for P1_EMPTY interrupt flag." "0,1"
|
|
newline
|
|
bitfld.long 0x20 14. "M_DMA_TRANS_FINISH,Mask for DMA_TRANS_FINISH interrupt flag." "0,1"
|
|
newline
|
|
bitfld.long 0x20 12. "M_LYR_TRANS_FINISH,Mask for LYR_TRANS_FINISH interrupt flag." "0,1"
|
|
newline
|
|
bitfld.long 0x20 11. "M_IPM_ERROR,Mask for IPM_ERROR interrupt flag." "0,1"
|
|
newline
|
|
bitfld.long 0x20 10. "M_PROG_END,Mask for PROG_END interrupt flag." "0,1"
|
|
newline
|
|
bitfld.long 0x20 9. "M_P2_FIFO_HI_FLAG,Mask for P2_FIFO_HI_FLAG interrupt flag." "0,1"
|
|
newline
|
|
bitfld.long 0x20 8. "M_P2_FIFO_LO_FLAG,Mask for P2_FIFO_LO_FLAG interrupt flag." "0,1"
|
|
newline
|
|
bitfld.long 0x20 7. "M_P1_FIFO_HI_FLAG,Mask for P1_FIFO_HI_FLAG interrupt flag." "0,1"
|
|
newline
|
|
bitfld.long 0x20 6. "M_P1_FIFO_LO_FLAG,Mask for P1_FIFO_LO_FLAG interrupt flag." "0,1"
|
|
newline
|
|
bitfld.long 0x20 5. "M_CRC_OVERFLOW,Mask for CRC_OVERFLOW interrupt flag." "0,1"
|
|
newline
|
|
bitfld.long 0x20 4. "M_CRC_READY,Mask for CRC_READY interrupt flag." "0,1"
|
|
newline
|
|
bitfld.long 0x20 3. "M_VS_BLANK,Mask for VS_BLANK interrupt flag" "0,1"
|
|
newline
|
|
bitfld.long 0x20 2. "M_LS_BF_VS,Mask for LS_BF_VS interrupt flag." "0,1"
|
|
newline
|
|
bitfld.long 0x20 1. "M_UNDRUN,Mask for M_UNDRUN interrupt flag." "0,1"
|
|
newline
|
|
bitfld.long 0x20 0. "M_VSYNC,Mask for VSYNC interrupt flag." "0,1"
|
|
line.long 0x24 "COLBAR_1,COLBAR_1 Register"
|
|
hexmask.long.byte 0x24 16.--23. 1. "COLBAR_R,Red component value."
|
|
newline
|
|
hexmask.long.byte 0x24 8.--15. 1. "COLBAR_G,Green component value."
|
|
newline
|
|
hexmask.long.byte 0x24 0.--7. 1. "COLBAR_B,Blue component value."
|
|
line.long 0x28 "COLBAR_2,COLBAR_2 Register"
|
|
hexmask.long.byte 0x28 16.--23. 1. "COLBAR_R,Red component value."
|
|
newline
|
|
hexmask.long.byte 0x28 8.--15. 1. "COLBAR_G,Green component value."
|
|
newline
|
|
hexmask.long.byte 0x28 0.--7. 1. "COLBAR_B,Blue component value."
|
|
line.long 0x2C "COLBAR_3,COLBAR_3 Register"
|
|
hexmask.long.byte 0x2C 16.--23. 1. "COLBAR_R,Red component value."
|
|
newline
|
|
hexmask.long.byte 0x2C 8.--15. 1. "COLBAR_G,Green component value."
|
|
newline
|
|
hexmask.long.byte 0x2C 0.--7. 1. "COLBAR_B,Blue component value."
|
|
line.long 0x30 "COLBAR_4,COLBAR_4 Register"
|
|
hexmask.long.byte 0x30 16.--23. 1. "COLBAR_R,Red component value."
|
|
newline
|
|
hexmask.long.byte 0x30 8.--15. 1. "COLBAR_G,Green component value."
|
|
newline
|
|
hexmask.long.byte 0x30 0.--7. 1. "COLBAR_B,Blue component value."
|
|
line.long 0x34 "COLBAR_5,COLBAR_5 Register"
|
|
hexmask.long.byte 0x34 16.--23. 1. "COLBAR_R,Red component value."
|
|
newline
|
|
hexmask.long.byte 0x34 8.--15. 1. "COLBAR_G,Green component value."
|
|
newline
|
|
hexmask.long.byte 0x34 0.--7. 1. "COLBAR_B,Blue component value."
|
|
line.long 0x38 "COLBAR_6,COLBAR_6 Register"
|
|
hexmask.long.byte 0x38 16.--23. 1. "COLBAR_R,Red component value."
|
|
newline
|
|
hexmask.long.byte 0x38 8.--15. 1. "COLBAR_G,Green component value."
|
|
newline
|
|
hexmask.long.byte 0x38 0.--7. 1. "COLBAR_B,Blue component value."
|
|
line.long 0x3C "COLBAR_7,COLBAR_7 Register"
|
|
hexmask.long.byte 0x3C 16.--23. 1. "COLBAR_R,Red component value."
|
|
newline
|
|
hexmask.long.byte 0x3C 8.--15. 1. "COLBAR_G,Green component value."
|
|
newline
|
|
hexmask.long.byte 0x3C 0.--7. 1. "COLBAR_B,Blue component value."
|
|
line.long 0x40 "COLBAR_8,COLBAR_8 Register"
|
|
hexmask.long.byte 0x40 16.--23. 1. "COLBAR_R,Red component value."
|
|
newline
|
|
hexmask.long.byte 0x40 8.--15. 1. "COLBAR_G,Green component value."
|
|
newline
|
|
hexmask.long.byte 0x40 0.--7. 1. "COLBAR_B,Blue component value."
|
|
line.long 0x44 "DIV_RATIO,Divide Ratio Register"
|
|
bitfld.long 0x44 31. "DUAL_EDGE_EN,When set to 1 the frequency of pixel clock driving the display is reduced by factor 2. Both rising and falling edges are used for providing the pixel data (RGB) and other control signals." "0,1"
|
|
newline
|
|
hexmask.long.byte 0x44 0.--7. 1. "DIV_RATIO,Specifies the divide value for the input clock. Used to generate the pixel clock to support different types of displays. To divide by N set the DIV_RATIO to (N - 1)."
|
|
line.long 0x48 "SIGN_CALC_1,Sign Calculation 1 Register"
|
|
hexmask.long.word 0x48 16.--27. 1. "SIG_VER_SIZE,Vertical size of the window of interest of pixels for CRC calculation (in pixels)."
|
|
newline
|
|
hexmask.long.word 0x48 0.--11. 1. "SIG_HOR_SIZE,Horizontal size of window of interest of pixels for CRC calculations (in pixels)."
|
|
line.long 0x4C "SIGN_CALC_2,Sign Calculation 2 Register"
|
|
hexmask.long.word 0x4C 16.--27. 1. "SIG_VER_POS,Vertical position of the window of interest of pixels for CRC calculation (in pixels)."
|
|
newline
|
|
hexmask.long.word 0x4C 0.--11. 1. "SIG_HOR_POS,Horizontal position of window of interest of pixels for CRC calculation (in pixels)."
|
|
rgroup.long 0x60++0x3
|
|
line.long 0x0 "CRC_VAL,CRC Value Register"
|
|
hexmask.long 0x0 0.--31. 1. "CRC_VAL,The result of the CRC calculation for the value of the pixels on the safety layers"
|
|
group.long 0x6C++0x3
|
|
line.long 0x0 "PARR_ERR_STATUS1,Parameter Error Status 1 Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "L7_0,A value of 1 indicates that a parameter error exists for the corresponding layer"
|
|
group.long 0x7C++0x7
|
|
line.long 0x0 "PARR_ERR_STATUS3,Parameter Error Status 3 Register"
|
|
bitfld.long 0x0 2. "HWC_ERR,Interrupt signal to indicate HWC error. This can occur if HWC position is out of display area or cursor memory is bigger than the HWC size. When this occurs the HWC is disabled." "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "SIG_ERR,Interrupt occurs whenever the area of interest specified by SIG_CALC register is outside the display size." "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "DISP_ERR,Interrupt occurs whenever width and height of display pulse width (both vertical and horizontal sync) value is 0." "0,1"
|
|
line.long 0x4 "MASK_PARR_ERR_STATUS1,Mask Parameter Error Status 1 Register"
|
|
hexmask.long.byte 0x4 0.--7. 1. "ML7_0,Mask for L[7:0] interrupt flag."
|
|
group.long 0x90++0x7
|
|
line.long 0x0 "MASK_PARR_ERR_STATUS3,Mask Parameter Error Status 3 Register"
|
|
bitfld.long 0x0 2. "M_HWC_ERR,Mask for HWC_ERR interrupt flag." "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "M_SIG_ERR,Mask for SIG_ERR interrupt flag." "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "M_DISP_ERR,Mask for DISP_ERR interrupt flag." "0,1"
|
|
line.long 0x4 "THRESHOLD_INP_BUF_1,Threshold Input 1 Register"
|
|
hexmask.long.byte 0x4 24.--30. 1. "INP_BUF_P2_HI,High threshold for the FIFO in position 2 in the pixel blend stack."
|
|
newline
|
|
hexmask.long.byte 0x4 16.--22. 1. "INP_BUF_P2_LO,Low threshold for the FIFO in position 2 in the pixel blend stack."
|
|
newline
|
|
hexmask.long.byte 0x4 8.--14. 1. "INP_BUF_P1_HI,High threshold for the FIFO in position 1 (lowest) in the pixel blend stack."
|
|
newline
|
|
hexmask.long.byte 0x4 0.--6. 1. "INP_BUF_P1_LO,Low threshold for the FIFO in position 1 (lowest) in the pixel blend stack."
|
|
group.long 0xA0++0xF
|
|
line.long 0x0 "LUMA_COMP,LUMA Component Register"
|
|
hexmask.long.word 0x0 22.--31. 1. "Y_RED,Luminance coefficient for red component."
|
|
newline
|
|
hexmask.long.word 0x0 11.--20. 1. "Y_GREEN,Luminance coefficient for green component."
|
|
newline
|
|
hexmask.long.word 0x0 0.--9. 1. "Y_BLUE,Luminance coefficient for blue component."
|
|
line.long 0x4 "CHROMA_RED,Red Chroma Components Register"
|
|
hexmask.long.word 0x4 16.--26. 1. "CR_RED,Cr coefficient for calculation of red component."
|
|
newline
|
|
hexmask.long.word 0x4 0.--11. 1. "CB_RED,Cb coefficient for calculation of red component."
|
|
line.long 0x8 "CHROMA_GREEN,Green Chroma Components Register"
|
|
hexmask.long.word 0x8 16.--26. 1. "CR_GREEN,Cr coefficient for calculation of green component."
|
|
newline
|
|
hexmask.long.word 0x8 0.--11. 1. "CB_GREEN,Cb coefficient for calculation of green component."
|
|
line.long 0xC "CHROMA_BLUE,Blue Chroma Components Register"
|
|
hexmask.long.word 0xC 16.--26. 1. "CR_BLUE,Cr coefficient for calculation of blue component."
|
|
newline
|
|
hexmask.long.word 0xC 0.--11. 1. "CB_BLUE,Cb coefficient for calculation of blue component."
|
|
rgroup.long 0xB0++0x3
|
|
line.long 0x0 "CRC_POS,CRC Position Register"
|
|
hexmask.long 0x0 0.--31. 1. "CRC_POS,The result of the CRC calculation for the position of the pixels on the safety layers."
|
|
group.long 0xB4++0x13
|
|
line.long 0x0 "LYR_INTPOL_EN,Layer Interpolation Enable Register"
|
|
bitfld.long 0x0 31. "EN,Interpolation Enable bit for DCU3 Layer coded in YCbCr422 format." "0: Chroma value is same for two pixels,1: Interpolation is enabled"
|
|
line.long 0x4 "LYR_LUMA_COMP,Layer Luminance Component Register"
|
|
hexmask.long.word 0x4 22.--31. 1. "Y_RED,Luminance coefficient for red component."
|
|
newline
|
|
hexmask.long.word 0x4 11.--20. 1. "Y_GREEN,Luminance coefficient for green component."
|
|
newline
|
|
hexmask.long.word 0x4 0.--9. 1. "Y_BLUE,Luminance coefficient for blue component."
|
|
line.long 0x8 "LYR_CHRM_RED,Layer Chroma Red Register"
|
|
hexmask.long.word 0x8 16.--26. 1. "Cr_RED,Cr coefficient for calculation of red component."
|
|
newline
|
|
hexmask.long.word 0x8 0.--11. 1. "Cb_RED,Cb coefficient for calculation of red component."
|
|
line.long 0xC "LYR_CHRM_GRN,Layer Chroma Green Register"
|
|
hexmask.long.word 0xC 16.--26. 1. "Cr_GREEN,Cr coefficient for calculation of green component."
|
|
newline
|
|
hexmask.long.word 0xC 0.--11. 1. "Cb_GREEN,Cr coefficient for calculation of green component."
|
|
line.long 0x10 "LYR_CHRM_BLUE,Layer Chroma Blue Register"
|
|
hexmask.long.word 0x10 16.--26. 1. "Cr_BLUE,Cr coefficient for calculation of blue component."
|
|
newline
|
|
hexmask.long.word 0x10 0.--11. 1. "Cb_BLUE,Cb coefficient for calculation of blue component."
|
|
group.long 0xCC++0x3
|
|
line.long 0x0 "UPDATE_MODE,Update Mode Register"
|
|
bitfld.long 0x0 31. "MODE,Do not set the MODE bit while the READREG is also set as this will block automatic updates. Do not set the MODE bit and the READREG register in the same write operation." "0: Transfer of register values during vertical..,1: Automatic transfer of register values during.."
|
|
newline
|
|
bitfld.long 0x0 30. "READREG,When the MODE bit is clear this bit is a control bit which can be written to initiate a transfer of register value during the next vertical blanking period." "0: (MODE=0) No transfer scheduled. When the MODE..,1: (MODE=0) Transfer register values on next.."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "TRIG_PROG_END,This field defines when the 2D-ACE begins fetching pixel data for each new frame"
|
|
rgroup.long 0xD0++0x3
|
|
line.long 0x0 "UNDERRUN,Underrun Register"
|
|
hexmask.long.word 0x0 16.--26. 1. "LINE,Line number where the underrun occured."
|
|
newline
|
|
hexmask.long.word 0x0 0.--10. 1. "PIXEL,Pixel number where the under run occured."
|
|
group.long 0xE0++0x3
|
|
line.long 0x0 "FRM_CRC_CTRL,Frame CRC Control"
|
|
bitfld.long 0x0 0. "FRM_CRC_EN,Enable bit for calculation of Frame CRC" "0: Frame CRC calculation is disabled,1: Frame CRC calculation is enabled"
|
|
rgroup.long 0xE4++0x3
|
|
line.long 0x0 "FRM_CRC_VAL,Frame CRC Value"
|
|
hexmask.long 0x0 0.--31. 1. "FRM_CRC_VAL,32 bit Calculated CRC for the whole frame"
|
|
group.long 0xE8++0x3
|
|
line.long 0x0 "TX_ESCAL_LVL,QoS Level"
|
|
hexmask.long.byte 0x0 0.--3. 1. "TX_ESCAL_LVL,This field along with the Threshold Input Register controls the Quality of Service (QoS) on the system bus"
|
|
group.long 0x100++0x1F
|
|
line.long 0x0 "GPR,Global Protection Register"
|
|
bitfld.long 0x0 31. "HLB,Hard Lock Bit. This bit cannot be cleared once it is set by software. It can only be cleared by a system reset." "0: All SLB's are accessible and can be modified,1: All SLB's are write protected and cannot be.."
|
|
line.long 0x4 "SLR_L0,Soft Lock Bit Layer 0 Register"
|
|
bitfld.long 0x4 31. "WEN_LO_1,Write Enable for Soft Lock Bit SLB_L0_1." "0: SLB is not modified,1: Value is written to SLB"
|
|
newline
|
|
bitfld.long 0x4 30. "WEN_LO_2,Write Enable for Soft Lock Bit SLB_L0_2." "0: SLB is not modified,1: Value is written to SLB"
|
|
newline
|
|
bitfld.long 0x4 29. "WEN_LO_3,Write Enable for Soft Lock Bit SLB_L0_3." "0: SLB is not modified,1: Value is written to SLB"
|
|
newline
|
|
bitfld.long 0x4 28. "WEN_LO_4,Write Enable for Soft Lock Bit SLB_L0_4." "0: SLB is not modified,1: Value is written to SLB"
|
|
newline
|
|
bitfld.long 0x4 27. "SLB_L0_1,Soft Lock Bit for Control Desc L0_1 Register." "0: Associated protected register is not locked and..,1: Associated protected register is locked for.."
|
|
newline
|
|
bitfld.long 0x4 26. "SLB_L0_2,Soft Lock Bit for Control Desc L0_2 Register." "0: Associated protected register is not locked and..,1: Associated protected register is locked for.."
|
|
newline
|
|
bitfld.long 0x4 25. "SLB_L0_3,Soft Lock Bit for Control Desc L0_3 Register." "0: Associated protected register is not locked and..,1: Associated protected register is locked for.."
|
|
newline
|
|
bitfld.long 0x4 24. "SLB_L0_4,Soft Lock Bit for Control Desc L0_4 Register." "0: Associated protected register is not locked and..,1: Associated protected register is locked for.."
|
|
newline
|
|
bitfld.long 0x4 23. "WEN_LO_5,Write Enable for Soft Lock Bit SLB_L0_5." "0: SLB is not modified,1: Value is written to SLB"
|
|
newline
|
|
bitfld.long 0x4 22. "WEN_LO_6,Write Enable for Soft Lock Bit SLB_L0_6." "0: SLB is not modified,1: Value is written to SLB"
|
|
newline
|
|
bitfld.long 0x4 21. "WEN_LO_7,Write Enable for Soft Lock Bit SLB_L0_7." "0: SLB is not modified,1: Value is written to SLB"
|
|
newline
|
|
bitfld.long 0x4 20. "WEN_L0_10,Write Enable for Soft Lock Bit SLB_L0_10." "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "SLB_L0_5,Soft Lock Bit for Control Desc L0_5 Register." "0: Associated protected register is not locked and..,1: Associated protected register is locked for.."
|
|
newline
|
|
bitfld.long 0x4 18. "SLB_L0_6,Soft Lock Bit for Control Desc L0_6 Register." "0: Associated protected register is not locked and..,1: Associated protected register is locked for.."
|
|
newline
|
|
bitfld.long 0x4 17. "SLB_L0_7,Soft Lock Bit for Control Desc L0_7 Register." "0: Associated protected register is not locked and..,1: Associated protected register is locked for.."
|
|
newline
|
|
bitfld.long 0x4 16. "SLB_L0_10,Soft Lock Bit for Control Desc L0_10 Register." "0: Associated protected register is not locked and..,1: Associated protected register is locked for.."
|
|
newline
|
|
bitfld.long 0x4 15. "WEN_L0_11,Write Enable for Soft Lock Bit SLB_L0_11." "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "SLB_L0_11,Soft Lock Bit for Control Desc L0_11 Register." "0: Associated protected register is not locked and..,1: Associated protected register is locked for.."
|
|
line.long 0x8 "SLR_L1,Soft Lock Bit Layer 1 Register"
|
|
bitfld.long 0x8 31. "WEN_L1_1,Write Enable for Soft Lock Bit SLB_L1_1." "0: SLB is not modified,1: Value is written to SLB"
|
|
newline
|
|
bitfld.long 0x8 30. "WEN_L1_2,Write Enable for Soft Lock Bit SLB_L1_2." "0: SLB is not modified,1: Value is written to SLB"
|
|
newline
|
|
bitfld.long 0x8 29. "WEN_L1_3,Write Enable for Soft Lock Bit SLB_L1_3." "0: SLB is not modified,1: Value is written to SLB"
|
|
newline
|
|
bitfld.long 0x8 28. "WEN_L1_4,Write Enable for Soft Lock Bit SLB_L1_4." "0: SLB is not modified,1: Value is written to SLB"
|
|
newline
|
|
bitfld.long 0x8 27. "SLB_L1_1,Soft Lock Bit for Control Desc L1_1 Register." "0: Associated protected register is not locked and..,1: Associated protected register is locked for.."
|
|
newline
|
|
bitfld.long 0x8 26. "SLB_L1_2,Soft Lock Bit for Control Desc L1_2 Register." "0: Associated protected register is not locked and..,1: Associated protected register is locked for.."
|
|
newline
|
|
bitfld.long 0x8 25. "SLB_L1_3,Soft Lock Bit for Control Desc L1_3 Register." "0: Associated protected register is not locked and..,1: Associated protected register is locked for.."
|
|
newline
|
|
bitfld.long 0x8 24. "SLB_L1_4,Soft Lock Bit for Control Desc L1_4 Register." "0: Associated protected register is not locked and..,1: Associated protected register is locked for.."
|
|
newline
|
|
bitfld.long 0x8 23. "WEN_L1_5,Write Enable for Soft Lock Bit SLB_L1_5." "0: SLB is not modified,1: Value is written to SLB"
|
|
newline
|
|
bitfld.long 0x8 22. "WEN_L1_6,Write Enable for Soft Lock Bit SLB_L1_6." "0: SLB is not modified,1: Value is written to SLB"
|
|
newline
|
|
bitfld.long 0x8 21. "WEN_L1_7,Write Enable for Soft Lock Bit SLB_L1_7." "0: SLB is not modified,1: Value is written to SLB"
|
|
newline
|
|
bitfld.long 0x8 20. "WEN_L1_10,Write Enable for Soft Lock Bit SLB_L1_10." "0,1"
|
|
newline
|
|
bitfld.long 0x8 19. "SLB_L1_5,Soft Lock Bit for Control Desc L1_5 Register." "0: Associated protected register is not locked and..,1: Associated protected register is locked for.."
|
|
newline
|
|
bitfld.long 0x8 18. "SLB_L1_6,Soft Lock Bit for Control Desc L1_6 Register." "0: Associated protected register is not locked and..,1: Associated protected register is locked for.."
|
|
newline
|
|
bitfld.long 0x8 17. "SLB_L1_7,Soft Lock Bit for Control Desc L1_7 Register." "0: Associated protected register is not locked and..,1: Associated protected register is locked for.."
|
|
newline
|
|
bitfld.long 0x8 16. "SLB_L1_10,Soft Lock Bit for Control Desc L1_10 Register." "0: Associated protected register is not locked and..,1: Associated protected register is locked for.."
|
|
newline
|
|
bitfld.long 0x8 15. "WEN_L1_11,Write Enable for Soft Lock Bit SLB_L1_11." "0,1"
|
|
newline
|
|
bitfld.long 0x8 11. "SLB_L1_11,Soft Lock Bit for Control Desc L1_11 Register." "0: Associated protected register is not locked and..,1: Associated protected register is locked for.."
|
|
line.long 0xC "SLR_DISP_SIZE,Soft Lock Display Size Register"
|
|
bitfld.long 0xC 31. "WEN_DISP,Write Enable for Soft Lock Bit SLB_DISP." "0: SLB is not modified,1: Value is written to SLB"
|
|
newline
|
|
bitfld.long 0xC 27. "SLB_DISP,Soft Lock Bit for DISP_SIZE Register. This bit cannot be cleared once set by software. Can only be cleared by system reset." "0: Associated protected register is not locked and..,1: Associated protected register is locked for.."
|
|
line.long 0x10 "SLR_HVSYNC_PARA,Soft Lock Hsync/Vsync Parameter Register"
|
|
bitfld.long 0x10 31. "WEN_HSYNC,Write Enable for Soft Lock Bit SLB_HSYNC." "0: SLB is not modified,1: Value is written to SLB"
|
|
newline
|
|
bitfld.long 0x10 30. "WEN_VSYNC,Write Enable for Soft Lock Bit SLB_VSYNC" "0: SLB is not modified,1: Value is written to SLB"
|
|
newline
|
|
bitfld.long 0x10 27. "SLB_HSYNC,Soft Lock Bit for HSYNC Register." "0: Associated protected register is not locked and..,1: Associated protected register is locked for.."
|
|
newline
|
|
bitfld.long 0x10 26. "SLB_VSYNC,Soft Lock Bit for VSYNC Register." "0: Associated protected register is not locked and..,1: Associated protected register is locked for.."
|
|
line.long 0x14 "SLR_POL,Soft Lock POL Register"
|
|
bitfld.long 0x14 31. "WEN_POL,Write Enable for Soft Lock Bit SLB_POL" "0: SLB is not modified,1: Value is written to SLB"
|
|
newline
|
|
bitfld.long 0x14 27. "SLB_POL,Soft Lock Bit for SYN_POL Register." "0: Associated protected register is not locked and..,1: Associated protected register is locked for.."
|
|
line.long 0x18 "SLR_L0_TRANSP,Soft Lock L0 Transparency Register"
|
|
bitfld.long 0x18 31. "WEN_L0_FCOLOR,Write Enable for Soft Lock Bit SLB_L0_FCOLOR" "0: SLB is not modified,1: Value is written to SLB"
|
|
newline
|
|
bitfld.long 0x18 30. "WEN_L0_BCOLOR,Write Enable for Soft Lock Bit SLB_L0_BCOLOR" "0: SLB is not modified,1: Value is written to SLB"
|
|
newline
|
|
bitfld.long 0x18 27. "SLB_L0_FCOLOR,Soft Lock Bit for L0_FCOLOR Register." "0: Associated protected register is not locked and..,1: Associated protected register is locked for.."
|
|
newline
|
|
bitfld.long 0x18 26. "SLB_L0_BCOLOR,Soft Lock Bit for L0_BCOLOR Register." "0: Associated protected register is not locked and..,1: Associated protected register is locked for.."
|
|
line.long 0x1C "SLR_L1_TRANSP,Soft Lock L1 Transparency Register"
|
|
bitfld.long 0x1C 31. "WEN_L1_FCOLOR,Write Enable for Soft Lock Bit SLB_L1_FCOLOR" "0: SLB is not modified,1: Value is written to SLB"
|
|
newline
|
|
bitfld.long 0x1C 30. "WEN_L1_BCOLOR,Write Enable for Soft Lock Bit SLB_L1_BCOLOR" "0: SLB is not modified,1: Value is written to SLB"
|
|
newline
|
|
bitfld.long 0x1C 27. "SLB_L1_FCOLOR,Soft Lock Bit for L1_FCOLOR Register." "0: Associated protected register is not locked and..,1: Associated protected register is locked for.."
|
|
newline
|
|
bitfld.long 0x1C 26. "SLB_L1_BCOLOR,Soft Lock Bit for L1_BCOLOR Register." "0: Associated protected register is not locked and..,1: Associated protected register is locked for.."
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x40)
|
|
group.long ($2+0x200)++0x3
|
|
line.long 0x0 "CTRLDESCL$1_1,Control Descriptor Layer 1 Register"
|
|
hexmask.long.word 0x0 16.--27. 1. "HEIGHT,Height of the layer in pixels."
|
|
newline
|
|
hexmask.long.word 0x0 0.--11. 1. "WIDTH,Width of the layer (in pixels)."
|
|
repeat.end
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x40)
|
|
group.long ($2+0x204)++0x3
|
|
line.long 0x0 "CTRLDESCL$1_2,Control Descriptor Layer 2 Register"
|
|
hexmask.long.word 0x0 16.--28. 1. "POSY,Two's complement signed value setting the vertical position of top row of the layer where 0 is the top row of the panel. Positive values are below and negative values are above the top row of the panel."
|
|
newline
|
|
hexmask.long.word 0x0 0.--12. 1. "POSX,Two's complement signed value setting the horizontal position of left hand column of the layer where 0 is the left-hand column of the panel. Positive values are to the right and negative values are to the left the left-hand column of the panel."
|
|
repeat.end
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x40)
|
|
group.long ($2+0x208)++0x3
|
|
line.long 0x0 "CTRLDESCL$1_3,Control Descriptor Layer 3 Register"
|
|
hexmask.long 0x0 0.--31. 1. "ADDR,Address of layer data in the memory. The address programmed should be 64-bit aligned."
|
|
repeat.end
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x40)
|
|
group.long ($2+0x20C)++0x3
|
|
line.long 0x0 "CTRLDESCL$1_4,Control Descriptor Layer 4 Register"
|
|
bitfld.long 0x0 31. "EN,Enable the layer." "0: OFF,1: ON"
|
|
newline
|
|
bitfld.long 0x0 28. "SAFETY_EN,Safety Mode Enable Bit. Valid only for layer 0 and layer 1. For registers of all other layers this should be set to 0." "0: Safety Mode is disabled,1: Safety Mode is enabled for this layer"
|
|
newline
|
|
hexmask.long.byte 0x0 20.--27. 1. "TRANS,Transparency Level. Specifies the alpha value for the layer. This value may be used by the blending engine to blend pixels on this layer. Value can vary between 0-255 where 0 is completely transparent and 255 is completely opaque."
|
|
newline
|
|
hexmask.long.byte 0x0 16.--19. 1. "BPP,Layer encoding format (bit per pixel)"
|
|
newline
|
|
hexmask.long.word 0x0 4.--14. 1. "LUOFFS,Look Up Table offset."
|
|
newline
|
|
bitfld.long 0x0 2. "BB,Chroma Keying." "0: OFF,1: ON"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "AB,Alpha Blending." "0: No alpha Blending,1: Blend only the pixels selected by chroma keying..,2: Blend the whole frame,3: Same functionality as 2'b00"
|
|
repeat.end
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x40)
|
|
group.long ($2+0x210)++0x3
|
|
line.long 0x0 "CTRLDESCL$1_5,Control Descriptor Layer 5 Register"
|
|
hexmask.long.byte 0x0 16.--23. 1. "CKMAX_R,Chroma Keying Max Red Component."
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "CKMAX_G,Chroma Keying Max Green Component"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "CKMAX_B,Chroma Keying Max Blue Component."
|
|
repeat.end
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x40)
|
|
group.long ($2+0x214)++0x3
|
|
line.long 0x0 "CTRLDESCL$1_6,Control Descriptor Layer 6 Register"
|
|
hexmask.long.byte 0x0 16.--23. 1. "CKMIN_R,Chroma Keying Minimum Red Component"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "CKMIN_G,Chroma Keying Minimum Green Component."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "CKMIN_B,Chroma Keying Minimum Blue Component."
|
|
repeat.end
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x40)
|
|
group.long ($2+0x21C)++0x3
|
|
line.long 0x0 "CTRLDESCL$1_8,Control Descriptor Layer 8 Register"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "FGn_FCOLOR,Foreground color to use when the layer is configured to use a transparency mode."
|
|
repeat.end
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x40)
|
|
group.long ($2+0x220)++0x3
|
|
line.long 0x0 "CTRLDESCL$1_9,Control Descriptor Layer 9 Register"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "FGn_BCOLOR,Background color to use when the layer is configured to use a transparency mode"
|
|
repeat.end
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x40)
|
|
group.long ($2+0x224)++0x3
|
|
line.long 0x0 "CTRLDESCL$1_10,Control Descriptor Layer 10 Register"
|
|
bitfld.long 0x0 31. "EN_GPUTILE,Bit for enabling the GPU Tile Format. This is only supported for layer with 32 bpp format." "0: GPUTile format is disabled,1: GPUTile Format is Enabled."
|
|
newline
|
|
hexmask.long.word 0x0 16.--27. 1. "POST_SKIP,This field indicates the number of pixels to be skipped before the end of each line of the rectangular layer. The number of pixels specified by the POST_SKIP field do not take part in arbitration and blending stage. POST_SKIP field along with.."
|
|
newline
|
|
hexmask.long.word 0x0 0.--11. 1. "PRE_SKIP,This field indicates the number of pixels to be skipped from the start at each line of the rectangular layer. The number of pixels specified by the PRE_SKIP field do not take part in arbitration and blending stage. PRE_SKIP field along with.."
|
|
repeat.end
|
|
tree.end
|
|
tree "DEC200 (DEC200 Compression/Decompression Engine)"
|
|
base ad:0x40026000
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x800)++0x3
|
|
line.long 0x0 "gcregDECReadConfig$1,no description available"
|
|
bitfld.long 0x0 20.--21. "SWIZZLE,Color channel swizzles." "0: ARGB,1: RGBA,?,?"
|
|
hexmask.long.byte 0x0 3.--6. 1. "COMPRESSION_FORMAT,Compression color format"
|
|
bitfld.long 0x0 1.--2. "COMPRESSION_SIZE,There are three compression size supported 64Byte/128Byte/256Byte" "0: SIZE64_BYTE,1: SIZE128_BYTE,?,?"
|
|
newline
|
|
bitfld.long 0x0 0. "COMPRESSION_ENABLE,Compression enable bit" "0: Disable,1: Enable"
|
|
repeat.end
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x840)++0x3
|
|
line.long 0x0 "gcregDECWriteConfig$1,no description available"
|
|
bitfld.long 0x0 20.--21. "SWIZZLE,Color channel swizzles." "0: ARGB,1: RGBA,?,?"
|
|
hexmask.long.byte 0x0 3.--6. 1. "COMPRESSION_FORMAT,Compression color format"
|
|
bitfld.long 0x0 1.--2. "COMPRESSION_SIZE,There are three compression size supported 64Byte/128Byte/256Byte" "0: SIZE64_BYTE,1: SIZE128_BYTE,?,?"
|
|
newline
|
|
bitfld.long 0x0 0. "COMPRESSION_ENABLE,Compression enable bit" "0: Disable,1: Enable"
|
|
repeat.end
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x880)++0x3
|
|
line.long 0x0 "gcregDECReadBufferBase$1,no description available"
|
|
hexmask.long 0x0 0.--31. 1. "ADDRESS,Base address for pixel buffer for read ID"
|
|
repeat.end
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x8C0)++0x3
|
|
line.long 0x0 "gcregDECReadCacheBase$1,no description available"
|
|
hexmask.long 0x0 0.--31. 1. "ADDRESS,Base address for tile status cache for read ID"
|
|
repeat.end
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x900)++0x3
|
|
line.long 0x0 "gcregDECWriteBufferBase$1,no description available"
|
|
hexmask.long 0x0 0.--31. 1. "ADDRESS,Base address for pixel buffer for write ID"
|
|
repeat.end
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x940)++0x3
|
|
line.long 0x0 "gcregDECWriteCacheBase$1,no description available"
|
|
hexmask.long 0x0 0.--31. 1. "ADDRESS,Base address for pixel cache for write ID"
|
|
repeat.end
|
|
group.long 0x980++0x3
|
|
line.long 0x0 "gcregDECControl,no description available"
|
|
hexmask.long.byte 0x0 18.--21. 1. "SW_FLUSH_ID,ID of tile status flush"
|
|
bitfld.long 0x0 17. "CLK_DIS,Disable clock" "0,1"
|
|
bitfld.long 0x0 16. "DISABLE_HW_FLUSH,The tile status cache flush through frame end pin will be disabled when this bit set." "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 12.--15. 1. "TILE_STATUS_WRITE_ID,Tile status cache's AXI write ID"
|
|
hexmask.long.byte 0x0 8.--11. 1. "TILE_STATUS_READ_ID,Tile status cache's AXI read ID"
|
|
bitfld.long 0x0 7. "ENABLE96_BYTE_YUV_COMP,This bit control whether encoder can output 96Byte or not for YUV planar format." "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "ENABLE_WRITE_SYNC,Enable input write address channel and write data channel sync" "0,1"
|
|
bitfld.long 0x0 4. "SOFT_RESET,Soft resets the IP. This bit will be auto recovery to '0' when set to enabled." "0,1"
|
|
bitfld.long 0x0 3. "DISABLE_DEBUG_REGISTERS,Disable debug registers. If this bit is 1 debug registers are clock gated." "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "DISABLE_RAM_CLOCK_GATING,Disables clock gating for rams." "0,1"
|
|
bitfld.long 0x0 1. "DISABLE_COMPRESSION,Bypass compression" "0,1"
|
|
bitfld.long 0x0 0. "FLUSH,Flush the tile status cache. This bit will be auto recovery to '0' when set to enabled." "0: DISABLE,1: ENABLE"
|
|
rgroup.long 0x984++0x3
|
|
line.long 0x0 "gcregDECIntrAcknowledge,no description available"
|
|
bitfld.long 0x0 31. "FLUSH_DN_INT,This bit provides the flag for the tile status flush done interrupt." "0,1"
|
|
bitfld.long 0x0 30. "AXI_ERR_INT,This bit provides the flag for the AXI bus error interrupt." "0,1"
|
|
group.long 0x988++0x3
|
|
line.long 0x0 "gcregDECIntrEnbl,no description available"
|
|
bitfld.long 0x0 31. "FLUSH_DN_INT_ENBL,This bit enables the tile status flush done interrupt." "0: Disable,1: Enable"
|
|
bitfld.long 0x0 30. "AXI_ERR_INT_ENBL,This bit enables the AXI bus error interrupt." "0: Disable,1: Enable"
|
|
rgroup.long 0x998++0x3F
|
|
line.long 0x0 "gcDECTotalReadsIn,no description available"
|
|
hexmask.long 0x0 0.--31. 1. "COUNT,Count of total reads request in terms of 128bits/64bits in input (pixel engine) side"
|
|
line.long 0x4 "gcDECTotalWritesIn,no description available"
|
|
hexmask.long 0x4 0.--31. 1. "COUNT,Count of total writes request in terms of 128bits/64bits in input (pixel engine) side"
|
|
line.long 0x8 "gcDECTotalReadBurstsIn,no description available"
|
|
hexmask.long 0x8 0.--31. 1. "COUNT,Count of total read data in terms of 128bits/64bits in input (pixel engine) side."
|
|
line.long 0xC "gcDECTotalWriteBurstsIn,no description available"
|
|
hexmask.long 0xC 0.--31. 1. "COUNT,Count of total write data in terms of 128bits/64bits in input (pixel engine) side."
|
|
line.long 0x10 "gcDECTotalReadsReqIn,no description available"
|
|
hexmask.long 0x10 0.--31. 1. "COUNT,Count of total reads request number in input (pixel engine) side"
|
|
line.long 0x14 "gcDECTotalWritesReqIn,no description available"
|
|
hexmask.long 0x14 0.--31. 1. "COUNT,Count of total writes request number in input (pixel engine) side"
|
|
line.long 0x18 "gcDECTotalReadLastsIn,no description available"
|
|
hexmask.long 0x18 0.--31. 1. "COUNT,Count of total input read last number in input (pixel engine) side"
|
|
line.long 0x1C "gcDECTotalWriteLastsIn,no description available"
|
|
hexmask.long 0x1C 0.--31. 1. "COUNT,Count of total write last number in input (pixel engine) side"
|
|
line.long 0x20 "gcDECTotalReadsOUT,no description available"
|
|
hexmask.long 0x20 0.--31. 1. "COUNT,Count of total reads request in terms of 128bits/64bits in output (DDR) side"
|
|
line.long 0x24 "gcDECTotalWritesOUT,no description available"
|
|
hexmask.long 0x24 0.--31. 1. "COUNT,Count of total writes request in terms of 128bits/64bits in output (DDR) side"
|
|
line.long 0x28 "gcDECTotalReadBurstsOUT,no description available"
|
|
hexmask.long 0x28 0.--31. 1. "COUNT,Count of total read data count in terms of 128bits/64bits in output (DDR) side"
|
|
line.long 0x2C "gcDECTotalWriteBurstsOUT,no description available"
|
|
hexmask.long 0x2C 0.--31. 1. "COUNT,Count of total write data count in terms of 128bits/64bits in output (DDR) side"
|
|
line.long 0x30 "gcDECTotalReadsReqOUT,no description available"
|
|
hexmask.long 0x30 0.--31. 1. "COUNT,Count of total reads request number in output (DDR) side."
|
|
line.long 0x34 "gcDECTotalWritesReqOUT,no description available"
|
|
hexmask.long 0x34 0.--31. 1. "COUNT,Count of total writes request number in output (DDR) side."
|
|
line.long 0x38 "gcDECTotalReadLastsOUT,no description available"
|
|
hexmask.long 0x38 0.--31. 1. "COUNT,Count of total read last number in output (DDR) side"
|
|
line.long 0x3C "gcDECTotalWriteLastsOUT,no description available"
|
|
hexmask.long 0x3C 0.--31. 1. "COUNT,Count of total write last number in output (DDR) side"
|
|
tree.end
|
|
tree "DFS (Digital Frequency Synthesizer)"
|
|
base ad:0x0
|
|
tree "DFS_0"
|
|
base ad:0x4003C040
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "DLLPRG1,DFS DLL Program Register 1"
|
|
bitfld.long 0x0 12.--14. "CPICTRL,Controls charge pump current" "0: Not allowed,1: Not allowed,2: Not allowed,3: Not allowed,4: Not allowed,5: Not allowed,6: Not allowed,7: Use case charge pump current"
|
|
bitfld.long 0x0 10.--11. "VSETTLCTRL,Controls initial voltage settling time during calibration" "0: 128 * 8 cycles,1: 256 * 8 cycles (recommended),2: 384 * 8 cycles,3: 512 * 8 cycles"
|
|
newline
|
|
bitfld.long 0x0 9. "CALBYPEN,If set it enables calibration bypass mode" "0: Calibration bypass mode disabled (recommended),1: Calibration bypass mode enabled"
|
|
bitfld.long 0x0 6.--8. "DACIN,DAC in value for all calibration logic These inputs control the initial bias voltage for starting the calibration algorithm" "0: Forces starting bit of calibration to 000 if..,1: Forces starting bit of calibration to 001 if..,2: Forces starting bit of calibration to 010 if..,3: Forces starting bit of calibration to 011 if..,4: Forces starting bit of calibration to 100 if..,5: Forces starting bit of calibration to 101 if..,6: Forces starting bit of calibration to 110 if..,7: Forces starting bit of calibration to 111 if.."
|
|
newline
|
|
bitfld.long 0x0 4.--5. "LCKWT,Controls lock wait time after DLL loop is enabled after calibration" "0: 64 * 8 cycles (recommended),1: 128 * 8 cycles,2: 192 * 8 cycles,3: 256 * 8 cycles"
|
|
bitfld.long 0x0 0.--2. "V2IGC,Controls voltage to current gain for different frequency ranges" "0: Not allowed,1: Not allowed,2: Not allowed,3: Not allowed,4: Not allowed,5: Use case voltage to current gain,6: Not allowed,7: Not allowed"
|
|
rgroup.long 0x8++0x7
|
|
line.long 0x0 "CLKOUTEN,DFS Clockout Enable Register"
|
|
hexmask.long.byte 0x0 0.--3. 1. "CLKOUTEN,This field reflects the status of clock-out enables to the DFS analog block."
|
|
line.long 0x4 "PORTSR,DFS Port Status Register"
|
|
hexmask.long.byte 0x4 0.--3. 1. "PORTSTAT,This field reflects the lock status of the DFS output ports of the DFS analog block"
|
|
group.long 0x10++0xB
|
|
line.long 0x0 "PORTLOLSR,DFS Port Loss of Lock Status Register"
|
|
hexmask.long.byte 0x0 0.--3. 1. "LOLF,This field provides the interrupt request flag for a loss of lock condition"
|
|
line.long 0x4 "PORTRESET,DFS Port Reset register"
|
|
hexmask.long.byte 0x4 0.--3. 1. "PORTRESET,This field provides control for port reset signal of each port."
|
|
line.long 0x8 "CTRL,DFS Control Register"
|
|
bitfld.long 0x8 1. "DLL_RESET,This field controls the DLL reset signal of the analog DFS." "0: DFS DLL reset is not asserted,1: DFS DLL reset is asserted"
|
|
bitfld.long 0x8 0. "LOLIE,This bit enables a loss of lock interrupt request when the corresponding LOLF is asserted." "0: Interrupt not requested even if corresponding..,1: Interrupt requested if corresponding LOLF is set"
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x1C)++0x3
|
|
line.long 0x0 "DVPORT$1,DFS Divide Register Portn"
|
|
hexmask.long.byte 0x0 8.--15. 1. "MFI,This field provides the integer part of division factor for portn"
|
|
hexmask.long.byte 0x0 0.--7. 1. "MFN,This field provides the numerator of fractional part of division factor for portn."
|
|
repeat.end
|
|
tree.end
|
|
tree "DFS_1"
|
|
base ad:0x4003C140
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "DLLPRG1,DFS DLL Program Register 1"
|
|
bitfld.long 0x0 12.--14. "CPICTRL,Controls charge pump current" "0: Not allowed,1: Not allowed,2: Not allowed,3: Not allowed,4: Not allowed,5: Not allowed,6: Not allowed,7: Use case charge pump current"
|
|
bitfld.long 0x0 10.--11. "VSETTLCTRL,Controls initial voltage settling time during calibration" "0: 128 * 8 cycles,1: 256 * 8 cycles (recommended),2: 384 * 8 cycles,3: 512 * 8 cycles"
|
|
newline
|
|
bitfld.long 0x0 9. "CALBYPEN,If set it enables calibration bypass mode" "0: Calibration bypass mode disabled (recommended),1: Calibration bypass mode enabled"
|
|
bitfld.long 0x0 6.--8. "DACIN,DAC in value for all calibration logic These inputs control the initial bias voltage for starting the calibration algorithm" "0: Forces starting bit of calibration to 000 if..,1: Forces starting bit of calibration to 001 if..,2: Forces starting bit of calibration to 010 if..,3: Forces starting bit of calibration to 011 if..,4: Forces starting bit of calibration to 100 if..,5: Forces starting bit of calibration to 101 if..,6: Forces starting bit of calibration to 110 if..,7: Forces starting bit of calibration to 111 if.."
|
|
newline
|
|
bitfld.long 0x0 4.--5. "LCKWT,Controls lock wait time after DLL loop is enabled after calibration" "0: 64 * 8 cycles (recommended),1: 128 * 8 cycles,2: 192 * 8 cycles,3: 256 * 8 cycles"
|
|
bitfld.long 0x0 0.--2. "V2IGC,Controls voltage to current gain for different frequency ranges" "0: Not allowed,1: Not allowed,2: Not allowed,3: Not allowed,4: Not allowed,5: Use case voltage to current gain,6: Not allowed,7: Not allowed"
|
|
rgroup.long 0x8++0x7
|
|
line.long 0x0 "CLKOUTEN,DFS Clockout Enable Register"
|
|
hexmask.long.byte 0x0 0.--3. 1. "CLKOUTEN,This field reflects the status of clock-out enables to the DFS analog block."
|
|
line.long 0x4 "PORTSR,DFS Port Status Register"
|
|
hexmask.long.byte 0x4 0.--3. 1. "PORTSTAT,This field reflects the lock status of the DFS output ports of the DFS analog block"
|
|
group.long 0x10++0xB
|
|
line.long 0x0 "PORTLOLSR,DFS Port Loss of Lock Status Register"
|
|
hexmask.long.byte 0x0 0.--3. 1. "LOLF,This field provides the interrupt request flag for a loss of lock condition"
|
|
line.long 0x4 "PORTRESET,DFS Port Reset register"
|
|
hexmask.long.byte 0x4 0.--3. 1. "PORTRESET,This field provides control for port reset signal of each port."
|
|
line.long 0x8 "CTRL,DFS Control Register"
|
|
bitfld.long 0x8 1. "DLL_RESET,This field controls the DLL reset signal of the analog DFS." "0: DFS DLL reset is not asserted,1: DFS DLL reset is asserted"
|
|
bitfld.long 0x8 0. "LOLIE,This bit enables a loss of lock interrupt request when the corresponding LOLF is asserted." "0: Interrupt not requested even if corresponding..,1: Interrupt requested if corresponding LOLF is set"
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x1C)++0x3
|
|
line.long 0x0 "DVPORT$1,DFS Divide Register Portn"
|
|
hexmask.long.byte 0x0 8.--15. 1. "MFI,This field provides the integer part of division factor for portn"
|
|
hexmask.long.byte 0x0 0.--7. 1. "MFN,This field provides the numerator of fractional part of division factor for portn."
|
|
repeat.end
|
|
tree.end
|
|
tree "DFS_2"
|
|
base ad:0x4003C1C0
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "DLLPRG1,DFS DLL Program Register 1"
|
|
bitfld.long 0x0 12.--14. "CPICTRL,Controls charge pump current" "0: Not allowed,1: Not allowed,2: Not allowed,3: Not allowed,4: Not allowed,5: Not allowed,6: Not allowed,7: Use case charge pump current"
|
|
bitfld.long 0x0 10.--11. "VSETTLCTRL,Controls initial voltage settling time during calibration" "0: 128 * 8 cycles,1: 256 * 8 cycles (recommended),2: 384 * 8 cycles,3: 512 * 8 cycles"
|
|
newline
|
|
bitfld.long 0x0 9. "CALBYPEN,If set it enables calibration bypass mode" "0: Calibration bypass mode disabled (recommended),1: Calibration bypass mode enabled"
|
|
bitfld.long 0x0 6.--8. "DACIN,DAC in value for all calibration logic These inputs control the initial bias voltage for starting the calibration algorithm" "0: Forces starting bit of calibration to 000 if..,1: Forces starting bit of calibration to 001 if..,2: Forces starting bit of calibration to 010 if..,3: Forces starting bit of calibration to 011 if..,4: Forces starting bit of calibration to 100 if..,5: Forces starting bit of calibration to 101 if..,6: Forces starting bit of calibration to 110 if..,7: Forces starting bit of calibration to 111 if.."
|
|
newline
|
|
bitfld.long 0x0 4.--5. "LCKWT,Controls lock wait time after DLL loop is enabled after calibration" "0: 64 * 8 cycles (recommended),1: 128 * 8 cycles,2: 192 * 8 cycles,3: 256 * 8 cycles"
|
|
bitfld.long 0x0 0.--2. "V2IGC,Controls voltage to current gain for different frequency ranges" "0: Not allowed,1: Not allowed,2: Not allowed,3: Not allowed,4: Not allowed,5: Use case voltage to current gain,6: Not allowed,7: Not allowed"
|
|
rgroup.long 0x8++0x7
|
|
line.long 0x0 "CLKOUTEN,DFS Clockout Enable Register"
|
|
hexmask.long.byte 0x0 0.--3. 1. "CLKOUTEN,This field reflects the status of clock-out enables to the DFS analog block."
|
|
line.long 0x4 "PORTSR,DFS Port Status Register"
|
|
hexmask.long.byte 0x4 0.--3. 1. "PORTSTAT,This field reflects the lock status of the DFS output ports of the DFS analog block"
|
|
group.long 0x10++0xB
|
|
line.long 0x0 "PORTLOLSR,DFS Port Loss of Lock Status Register"
|
|
hexmask.long.byte 0x0 0.--3. 1. "LOLF,This field provides the interrupt request flag for a loss of lock condition"
|
|
line.long 0x4 "PORTRESET,DFS Port Reset register"
|
|
hexmask.long.byte 0x4 0.--3. 1. "PORTRESET,This field provides control for port reset signal of each port."
|
|
line.long 0x8 "CTRL,DFS Control Register"
|
|
bitfld.long 0x8 1. "DLL_RESET,This field controls the DLL reset signal of the analog DFS." "0: DFS DLL reset is not asserted,1: DFS DLL reset is asserted"
|
|
bitfld.long 0x8 0. "LOLIE,This bit enables a loss of lock interrupt request when the corresponding LOLF is asserted." "0: Interrupt not requested even if corresponding..,1: Interrupt requested if corresponding LOLF is set"
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x1C)++0x3
|
|
line.long 0x0 "DVPORT$1,DFS Divide Register Portn"
|
|
hexmask.long.byte 0x0 8.--15. 1. "MFI,This field provides the integer part of division factor for portn"
|
|
hexmask.long.byte 0x0 0.--7. 1. "MFN,This field provides the numerator of fractional part of division factor for portn."
|
|
repeat.end
|
|
tree.end
|
|
tree.end
|
|
tree "DMA (Enhanced Direct Memory Access Controller)"
|
|
base ad:0x40002000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CR,Control Register"
|
|
bitfld.long 0x0 17. "CX,Cancel Transfer" "0: Normal operation,1: Cancel the remaining data transfer. Stop the.."
|
|
bitfld.long 0x0 16. "ECX,Error Cancel Transfer" "0: Normal operation,1: Cancel the remaining data transfer in the same.."
|
|
newline
|
|
bitfld.long 0x0 10. "GRP1PRI,Channel Group 1 Priority" "0,1"
|
|
bitfld.long 0x0 8. "GRP0PRI,Channel Group 0 Priority" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "EMLM,Enable Minor Loop Mapping" "0: Disabled. TCDn.word2 is defined as a 32-bit..,1: Enabled. TCDn.word2 is redefined to include.."
|
|
bitfld.long 0x0 6. "CLM,Continuous Link Mode" "0: A minor loop channel link made to itself goes..,1: A minor loop channel link made to itself does.."
|
|
newline
|
|
bitfld.long 0x0 5. "HALT,Halt DMA Operations" "0: Normal operation,1: Stall the start of any new channels. Executing.."
|
|
bitfld.long 0x0 4. "HOE,Halt On Error" "0: Normal operation,1: Any error causes the HALT bit to set."
|
|
newline
|
|
bitfld.long 0x0 3. "ERGA,Enable Round Robin Group Arbitration" "0: Fixed priority arbitration is used for selection..,1: Round robin arbitration is used for selection.."
|
|
bitfld.long 0x0 2. "ERCA,Enable Round Robin Channel Arbitration" "0: Fixed priority arbitration is used for channel..,1: Round robin arbitration is used for channel.."
|
|
newline
|
|
bitfld.long 0x0 1. "EDBG,Enable Debug" "0: When in debug mode the DMA continues to operate.,1: When in debug mode the DMA stalls the start of a.."
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "ES,Error Status Register"
|
|
bitfld.long 0x0 31. "VLD,Logical OR of all ERR status bits" "0: No ERR bits are set.,1: At least one ERR bit is set indicating a valid.."
|
|
bitfld.long 0x0 17. "UCE,Uncorrectable ECC error during channel execution." "0: No uncorrectable ECC error,1: The last recorded error was an uncorrectable TCD.."
|
|
newline
|
|
bitfld.long 0x0 16. "ECX,Transfer Canceled" "0: No canceled transfers,1: The last recorded entry was a canceled transfer.."
|
|
bitfld.long 0x0 15. "GPE,Group Priority Error" "0: No group priority error,1: The last recorded error was a configuration.."
|
|
newline
|
|
bitfld.long 0x0 14. "CPE,Channel Priority Error" "0: No channel priority error,1: The last recorded error was a configuration.."
|
|
hexmask.long.byte 0x0 8.--12. 1. "ERRCHN,Error Channel Number or Canceled Channel Number"
|
|
newline
|
|
bitfld.long 0x0 7. "SAE,Source Address Error" "0: No source address configuration error.,1: The last recorded error was a configuration.."
|
|
bitfld.long 0x0 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: The last recorded error was a configuration.."
|
|
newline
|
|
bitfld.long 0x0 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: The last recorded error was a configuration.."
|
|
bitfld.long 0x0 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: The last recorded error was a configuration.."
|
|
newline
|
|
bitfld.long 0x0 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: The last recorded error was a configuration.."
|
|
bitfld.long 0x0 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: The last recorded error was a configuration.."
|
|
newline
|
|
bitfld.long 0x0 1. "SBE,Source Bus Error" "0: No source bus error,1: The last recorded error was a bus error on a.."
|
|
bitfld.long 0x0 0. "DBE,Destination Bus Error" "0: No destination bus error,1: The last recorded error was a bus error on a.."
|
|
group.long 0xC++0x3
|
|
line.long 0x0 "ERQ,Enable Request Register"
|
|
bitfld.long 0x0 31. "ERQ31,Enable DMA Request 31" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x0 30. "ERQ30,Enable DMA Request 30" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 29. "ERQ29,Enable DMA Request 29" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x0 28. "ERQ28,Enable DMA Request 28" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 27. "ERQ27,Enable DMA Request 27" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x0 26. "ERQ26,Enable DMA Request 26" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 25. "ERQ25,Enable DMA Request 25" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x0 24. "ERQ24,Enable DMA Request 24" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 23. "ERQ23,Enable DMA Request 23" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x0 22. "ERQ22,Enable DMA Request 22" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 21. "ERQ21,Enable DMA Request 21" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x0 20. "ERQ20,Enable DMA Request 20" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 19. "ERQ19,Enable DMA Request 19" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x0 18. "ERQ18,Enable DMA Request 18" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 17. "ERQ17,Enable DMA Request 17" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x0 16. "ERQ16,Enable DMA Request 16" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 15. "ERQ15,Enable DMA Request 15" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x0 14. "ERQ14,Enable DMA Request 14" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 13. "ERQ13,Enable DMA Request 13" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x0 12. "ERQ12,Enable DMA Request 12" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 11. "ERQ11,Enable DMA Request 11" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x0 10. "ERQ10,Enable DMA Request 10" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 9. "ERQ9,Enable DMA Request 9" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x0 8. "ERQ8,Enable DMA Request 8" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 7. "ERQ7,Enable DMA Request 7" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x0 6. "ERQ6,Enable DMA Request 6" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 5. "ERQ5,Enable DMA Request 5" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x0 4. "ERQ4,Enable DMA Request 4" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 3. "ERQ3,Enable DMA Request 3" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x0 2. "ERQ2,Enable DMA Request 2" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 1. "ERQ1,Enable DMA Request 1" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x0 0. "ERQ0,Enable DMA Request 0" "0: Disabled,1: Enabled"
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "EEI,Enable Error Interrupt Register"
|
|
bitfld.long 0x0 31. "EEI31,Enable Error Interrupt 31" "0: Do not generate an error interrupt,1: Generate an error interrupt"
|
|
bitfld.long 0x0 30. "EEI30,Enable Error Interrupt 30" "0: Do not generate an error interrupt,1: Generate an error interrupt"
|
|
newline
|
|
bitfld.long 0x0 29. "EEI29,Enable Error Interrupt 29" "0: Do not generate an error interrupt,1: Generate an error interrupt"
|
|
bitfld.long 0x0 28. "EEI28,Enable Error Interrupt 28" "0: Do not generate an error interrupt,1: Generate an error interrupt"
|
|
newline
|
|
bitfld.long 0x0 27. "EEI27,Enable Error Interrupt 27" "0: Do not generate an error interrupt,1: Generate an error interrupt"
|
|
bitfld.long 0x0 26. "EEI26,Enable Error Interrupt 26" "0: Do not generate an error interrupt,1: Generate an error interrupt"
|
|
newline
|
|
bitfld.long 0x0 25. "EEI25,Enable Error Interrupt 25" "0: Do not generate an error interrupt,1: Generate an error interrupt"
|
|
bitfld.long 0x0 24. "EEI24,Enable Error Interrupt 24" "0: Do not generate an error interrupt,1: Generate an error interrupt"
|
|
newline
|
|
bitfld.long 0x0 23. "EEI23,Enable Error Interrupt 23" "0: Do not generate an error interrupt,1: Generate an error interrupt"
|
|
bitfld.long 0x0 22. "EEI22,Enable Error Interrupt 22" "0: Do not generate an error interrupt,1: Generate an error interrupt"
|
|
newline
|
|
bitfld.long 0x0 21. "EEI21,Enable Error Interrupt 21" "0: Do not generate an error interrupt,1: Generate an error interrupt"
|
|
bitfld.long 0x0 20. "EEI20,Enable Error Interrupt 20" "0: Do not generate an error interrupt,1: Generate an error interrupt"
|
|
newline
|
|
bitfld.long 0x0 19. "EEI19,Enable Error Interrupt 19" "0: Do not generate an error interrupt,1: Generate an error interrupt"
|
|
bitfld.long 0x0 18. "EEI18,Enable Error Interrupt 18" "0: Do not generate an error interrupt,1: Generate an error interrupt"
|
|
newline
|
|
bitfld.long 0x0 17. "EEI17,Enable Error Interrupt 17" "0: Do not generate an error interrupt,1: Generate an error interrupt"
|
|
bitfld.long 0x0 16. "EEI16,Enable Error Interrupt 16" "0: Do not generate an error interrupt,1: Generate an error interrupt"
|
|
newline
|
|
bitfld.long 0x0 15. "EEI15,Enable Error Interrupt 15" "0: Do not generate an error interrupt,1: Generate an error interrupt"
|
|
bitfld.long 0x0 14. "EEI14,Enable Error Interrupt 14" "0: Do not generate an error interrupt,1: Generate an error interrupt"
|
|
newline
|
|
bitfld.long 0x0 13. "EEI13,Enable Error Interrupt 13" "0: Do not generate an error interrupt,1: Generate an error interrupt"
|
|
bitfld.long 0x0 12. "EEI12,Enable Error Interrupt 12" "0: Do not generate an error interrupt,1: Generate an error interrupt"
|
|
newline
|
|
bitfld.long 0x0 11. "EEI11,Enable Error Interrupt 11" "0: Do not generate an error interrupt,1: Generate an error interrupt"
|
|
bitfld.long 0x0 10. "EEI10,Enable Error Interrupt 10" "0: Do not generate an error interrupt,1: Generate an error interrupt"
|
|
newline
|
|
bitfld.long 0x0 9. "EEI9,Enable Error Interrupt 9" "0: Do not generate an error interrupt,1: Generate an error interrupt"
|
|
bitfld.long 0x0 8. "EEI8,Enable Error Interrupt 8" "0: Do not generate an error interrupt,1: Generate an error interrupt"
|
|
newline
|
|
bitfld.long 0x0 7. "EEI7,Enable Error Interrupt 7" "0: Do not generate an error interrupt,1: Generate an error interrupt"
|
|
bitfld.long 0x0 6. "EEI6,Enable Error Interrupt 6" "0: Do not generate an error interrupt,1: Generate an error interrupt"
|
|
newline
|
|
bitfld.long 0x0 5. "EEI5,Enable Error Interrupt 5" "0: Do not generate an error interrupt,1: Generate an error interrupt"
|
|
bitfld.long 0x0 4. "EEI4,Enable Error Interrupt 4" "0: Do not generate an error interrupt,1: Generate an error interrupt"
|
|
newline
|
|
bitfld.long 0x0 3. "EEI3,Enable Error Interrupt 3" "0: Do not generate an error interrupt,1: Generate an error interrupt"
|
|
bitfld.long 0x0 2. "EEI2,Enable Error Interrupt 2" "0: Do not generate an error interrupt,1: Generate an error interrupt"
|
|
newline
|
|
bitfld.long 0x0 1. "EEI1,Enable Error Interrupt 1" "0: Do not generate an error interrupt,1: Generate an error interrupt"
|
|
bitfld.long 0x0 0. "EEI0,Enable Error Interrupt 0" "0: Do not generate an error interrupt,1: Generate an error interrupt"
|
|
wgroup.byte 0x18++0x7
|
|
line.byte 0x0 "CEEI,Clear Enable Error Interrupt Register"
|
|
bitfld.byte 0x0 7. "NOP,No Op enable" "0: Normal operation,1: No operation ignore the other bits in this.."
|
|
bitfld.byte 0x0 6. "CAEE,Clear All Enable Error Interrupts" "0: Clear only the EEI bit specified in the CEEI field,1: Clear all bits in EEI"
|
|
newline
|
|
hexmask.byte 0x0 0.--4. 1. "CEEI,Clear Enable Error Interrupt"
|
|
line.byte 0x1 "SEEI,Set Enable Error Interrupt Register"
|
|
bitfld.byte 0x1 7. "NOP,No Op enable" "0: Normal operation,1: No operation ignore the other bits in this.."
|
|
bitfld.byte 0x1 6. "SAEE,Sets All Enable Error Interrupts" "0: Set only the EEI bit specified in the SEEI field.,1: Sets all bits in EEI"
|
|
newline
|
|
hexmask.byte 0x1 0.--4. 1. "SEEI,Set Enable Error Interrupt"
|
|
line.byte 0x2 "CERQ,Clear Enable Request Register"
|
|
bitfld.byte 0x2 7. "NOP,No Op enable" "0: Normal operation,1: No operation ignore the other bits in this.."
|
|
bitfld.byte 0x2 6. "CAER,Clear All Enable Requests" "0: Clear only the ERQ bit specified in the CERQ field,1: Clear all bits in ERQ"
|
|
newline
|
|
hexmask.byte 0x2 0.--4. 1. "CERQ,Clear Enable Request"
|
|
line.byte 0x3 "SERQ,Set Enable Request Register"
|
|
bitfld.byte 0x3 7. "NOP,No Op enable" "0: Normal operation,1: No operation ignore the other bits in this.."
|
|
bitfld.byte 0x3 6. "SAER,Set All Enable Requests" "0: Set only the ERQ bit specified in the SERQ field,1: Set all bits in ERQ"
|
|
newline
|
|
hexmask.byte 0x3 0.--4. 1. "SERQ,Set Enable Request"
|
|
line.byte 0x4 "CDNE,Clear DONE Status Bit Register"
|
|
bitfld.byte 0x4 7. "NOP,No Op enable" "0: Normal operation,1: No operation ignore the other bits in this.."
|
|
bitfld.byte 0x4 6. "CADN,Clears All DONE Bits" "0: Clears only the TCDn_CSR[DONE] bit specified in..,1: Clears all bits in TCDn_CSR[DONE]"
|
|
newline
|
|
hexmask.byte 0x4 0.--4. 1. "CDNE,Clear DONE Bit"
|
|
line.byte 0x5 "SSRT,Set START Bit Register"
|
|
bitfld.byte 0x5 7. "NOP,No Op enable" "0: Normal operation,1: No operation ignore the other bits in this.."
|
|
bitfld.byte 0x5 6. "SAST,Set All START Bits (activates all channels)" "0: Set only the TCDn_CSR[START] bit specified in..,1: Set all bits in TCDn_CSR[START]"
|
|
newline
|
|
hexmask.byte 0x5 0.--4. 1. "SSRT,Set START Bit"
|
|
line.byte 0x6 "CERR,Clear Error Register"
|
|
bitfld.byte 0x6 7. "NOP,No Op enable" "0: Normal operation,1: No operation ignore the other bits in this.."
|
|
bitfld.byte 0x6 6. "CAEI,Clear All Error Indicators" "0: Clear only the ERR bit specified in the CERR field,1: Clear all bits in ERR"
|
|
newline
|
|
hexmask.byte 0x6 0.--4. 1. "CERR,Clear Error Indicator"
|
|
line.byte 0x7 "CINT,Clear Interrupt Request Register"
|
|
bitfld.byte 0x7 7. "NOP,No Op enable" "0: Normal operation,1: No operation ignore the other bits in this.."
|
|
bitfld.byte 0x7 6. "CAIR,Clear All Interrupt Requests" "0: Clear only the INT bit specified in the CINT field,1: Clear all bits in INT"
|
|
newline
|
|
hexmask.byte 0x7 0.--4. 1. "CINT,Clear Interrupt Request"
|
|
group.long 0x24++0x3
|
|
line.long 0x0 "INT,Interrupt Request Register"
|
|
bitfld.long 0x0 31. "INT31,Interrupt Request 31" "0: Interrupt request is cleared,1: Interrupt request is active"
|
|
bitfld.long 0x0 30. "INT30,Interrupt Request 30" "0: Interrupt request is cleared,1: Interrupt request is active"
|
|
newline
|
|
bitfld.long 0x0 29. "INT29,Interrupt Request 29" "0: Interrupt request is cleared,1: Interrupt request is active"
|
|
bitfld.long 0x0 28. "INT28,Interrupt Request 28" "0: Interrupt request is cleared,1: Interrupt request is active"
|
|
newline
|
|
bitfld.long 0x0 27. "INT27,Interrupt Request 27" "0: Interrupt request is cleared,1: Interrupt request is active"
|
|
bitfld.long 0x0 26. "INT26,Interrupt Request 26" "0: Interrupt request is cleared,1: Interrupt request is active"
|
|
newline
|
|
bitfld.long 0x0 25. "INT25,Interrupt Request 25" "0: Interrupt request is cleared,1: Interrupt request is active"
|
|
bitfld.long 0x0 24. "INT24,Interrupt Request 24" "0: Interrupt request is cleared,1: Interrupt request is active"
|
|
newline
|
|
bitfld.long 0x0 23. "INT23,Interrupt Request 23" "0: Interrupt request is cleared,1: Interrupt request is active"
|
|
bitfld.long 0x0 22. "INT22,Interrupt Request 22" "0: Interrupt request is cleared,1: Interrupt request is active"
|
|
newline
|
|
bitfld.long 0x0 21. "INT21,Interrupt Request 21" "0: Interrupt request is cleared,1: Interrupt request is active"
|
|
bitfld.long 0x0 20. "INT20,Interrupt Request 20" "0: Interrupt request is cleared,1: Interrupt request is active"
|
|
newline
|
|
bitfld.long 0x0 19. "INT19,Interrupt Request 19" "0: Interrupt request is cleared,1: Interrupt request is active"
|
|
bitfld.long 0x0 18. "INT18,Interrupt Request 18" "0: Interrupt request is cleared,1: Interrupt request is active"
|
|
newline
|
|
bitfld.long 0x0 17. "INT17,Interrupt Request 17" "0: Interrupt request is cleared,1: Interrupt request is active"
|
|
bitfld.long 0x0 16. "INT16,Interrupt Request 16" "0: Interrupt request is cleared,1: Interrupt request is active"
|
|
newline
|
|
bitfld.long 0x0 15. "INT15,Interrupt Request 15" "0: Interrupt request is cleared,1: Interrupt request is active"
|
|
bitfld.long 0x0 14. "INT14,Interrupt Request 14" "0: Interrupt request is cleared,1: Interrupt request is active"
|
|
newline
|
|
bitfld.long 0x0 13. "INT13,Interrupt Request 13" "0: Interrupt request is cleared,1: Interrupt request is active"
|
|
bitfld.long 0x0 12. "INT12,Interrupt Request 12" "0: Interrupt request is cleared,1: Interrupt request is active"
|
|
newline
|
|
bitfld.long 0x0 11. "INT11,Interrupt Request 11" "0: Interrupt request is cleared,1: Interrupt request is active"
|
|
bitfld.long 0x0 10. "INT10,Interrupt Request 10" "0: Interrupt request is cleared,1: Interrupt request is active"
|
|
newline
|
|
bitfld.long 0x0 9. "INT9,Interrupt Request 9" "0: Interrupt request is cleared,1: Interrupt request is active"
|
|
bitfld.long 0x0 8. "INT8,Interrupt Request 8" "0: Interrupt request is cleared,1: Interrupt request is active"
|
|
newline
|
|
bitfld.long 0x0 7. "INT7,Interrupt Request 7" "0: Interrupt request is cleared,1: Interrupt request is active"
|
|
bitfld.long 0x0 6. "INT6,Interrupt Request 6" "0: Interrupt request is cleared,1: Interrupt request is active"
|
|
newline
|
|
bitfld.long 0x0 5. "INT5,Interrupt Request 5" "0: Interrupt request is cleared,1: Interrupt request is active"
|
|
bitfld.long 0x0 4. "INT4,Interrupt Request 4" "0: Interrupt request is cleared,1: Interrupt request is active"
|
|
newline
|
|
bitfld.long 0x0 3. "INT3,Interrupt Request 3" "0: Interrupt request is cleared,1: Interrupt request is active"
|
|
bitfld.long 0x0 2. "INT2,Interrupt Request 2" "0: Interrupt request is cleared,1: Interrupt request is active"
|
|
newline
|
|
bitfld.long 0x0 1. "INT1,Interrupt Request 1" "0: Interrupt request is cleared,1: Interrupt request is active"
|
|
bitfld.long 0x0 0. "INT0,Interrupt Request 0" "0: Interrupt request is cleared,1: Interrupt request is active"
|
|
group.long 0x2C++0x3
|
|
line.long 0x0 "ERR,Error Register"
|
|
bitfld.long 0x0 31. "ERR31,Error In Channel 31" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
bitfld.long 0x0 30. "ERR30,Error In Channel 30" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
newline
|
|
bitfld.long 0x0 29. "ERR29,Error In Channel 29" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
bitfld.long 0x0 28. "ERR28,Error In Channel 28" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
newline
|
|
bitfld.long 0x0 27. "ERR27,Error In Channel 27" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
bitfld.long 0x0 26. "ERR26,Error In Channel 26" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
newline
|
|
bitfld.long 0x0 25. "ERR25,Error In Channel 25" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
bitfld.long 0x0 24. "ERR24,Error In Channel 24" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
newline
|
|
bitfld.long 0x0 23. "ERR23,Error In Channel 23" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
bitfld.long 0x0 22. "ERR22,Error In Channel 22" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
newline
|
|
bitfld.long 0x0 21. "ERR21,Error In Channel 21" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
bitfld.long 0x0 20. "ERR20,Error In Channel 20" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
newline
|
|
bitfld.long 0x0 19. "ERR19,Error In Channel 19" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
bitfld.long 0x0 18. "ERR18,Error In Channel 18" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
newline
|
|
bitfld.long 0x0 17. "ERR17,Error In Channel 17" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
bitfld.long 0x0 16. "ERR16,Error In Channel 16" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
newline
|
|
bitfld.long 0x0 15. "ERR15,Error In Channel 15" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
bitfld.long 0x0 14. "ERR14,Error In Channel 14" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
newline
|
|
bitfld.long 0x0 13. "ERR13,Error In Channel 13" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
bitfld.long 0x0 12. "ERR12,Error In Channel 12" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
newline
|
|
bitfld.long 0x0 11. "ERR11,Error In Channel 11" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
bitfld.long 0x0 10. "ERR10,Error In Channel 10" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
newline
|
|
bitfld.long 0x0 9. "ERR9,Error In Channel 9" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
bitfld.long 0x0 8. "ERR8,Error In Channel 8" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
newline
|
|
bitfld.long 0x0 7. "ERR7,Error In Channel 7" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
bitfld.long 0x0 6. "ERR6,Error In Channel 6" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
newline
|
|
bitfld.long 0x0 5. "ERR5,Error In Channel 5" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
bitfld.long 0x0 4. "ERR4,Error In Channel 4" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
newline
|
|
bitfld.long 0x0 3. "ERR3,Error In Channel 3" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
bitfld.long 0x0 2. "ERR2,Error In Channel 2" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
newline
|
|
bitfld.long 0x0 1. "ERR1,Error In Channel 1" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
bitfld.long 0x0 0. "ERR0,Error In Channel 0" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
rgroup.long 0x34++0x3
|
|
line.long 0x0 "HRS,Hardware Request Status Register"
|
|
bitfld.long 0x0 31. "HRS31,Hardware Request Status Channel 31" "0: Not present,1: Present"
|
|
bitfld.long 0x0 30. "HRS30,Hardware Request Status Channel 30" "0: Not present,1: Present"
|
|
newline
|
|
bitfld.long 0x0 29. "HRS29,Hardware Request Status Channel 29" "0: Not present,1: Present"
|
|
bitfld.long 0x0 28. "HRS28,Hardware Request Status Channel 28" "0: Not present,1: Present"
|
|
newline
|
|
bitfld.long 0x0 27. "HRS27,Hardware Request Status Channel 27" "0: Not present,1: Present"
|
|
bitfld.long 0x0 26. "HRS26,Hardware Request Status Channel 26" "0: Not present,1: Present"
|
|
newline
|
|
bitfld.long 0x0 25. "HRS25,Hardware Request Status Channel 25" "0: Not present,1: Present"
|
|
bitfld.long 0x0 24. "HRS24,Hardware Request Status Channel 24" "0: Not present,1: Present"
|
|
newline
|
|
bitfld.long 0x0 23. "HRS23,Hardware Request Status Channel 23" "0: Not present,1: Present"
|
|
bitfld.long 0x0 22. "HRS22,Hardware Request Status Channel 22" "0: Not present,1: Present"
|
|
newline
|
|
bitfld.long 0x0 21. "HRS21,Hardware Request Status Channel 21" "0: Not present,1: Present"
|
|
bitfld.long 0x0 20. "HRS20,Hardware Request Status Channel 20" "0: Not present,1: Present"
|
|
newline
|
|
bitfld.long 0x0 19. "HRS19,Hardware Request Status Channel 19" "0: Not present,1: Present"
|
|
bitfld.long 0x0 18. "HRS18,Hardware Request Status Channel 18" "0: Not present,1: Present"
|
|
newline
|
|
bitfld.long 0x0 17. "HRS17,Hardware Request Status Channel 17" "0: Not present,1: Present"
|
|
bitfld.long 0x0 16. "HRS16,Hardware Request Status Channel 16" "0: Not present,1: Present"
|
|
newline
|
|
bitfld.long 0x0 15. "HRS15,Hardware Request Status Channel 15" "0: Not present,1: Present"
|
|
bitfld.long 0x0 14. "HRS14,Hardware Request Status Channel 14" "0: Not present,1: Present"
|
|
newline
|
|
bitfld.long 0x0 13. "HRS13,Hardware Request Status Channel 13" "0: Not present,1: Present"
|
|
bitfld.long 0x0 12. "HRS12,Hardware Request Status Channel 12" "0: Not present,1: Present"
|
|
newline
|
|
bitfld.long 0x0 11. "HRS11,Hardware Request Status Channel 11" "0: Not present,1: Present"
|
|
bitfld.long 0x0 10. "HRS10,Hardware Request Status Channel 10" "0: Not present,1: Present"
|
|
newline
|
|
bitfld.long 0x0 9. "HRS9,Hardware Request Status Channel 9" "0: Not present,1: Present"
|
|
bitfld.long 0x0 8. "HRS8,Hardware Request Status Channel 8" "0: Not present,1: Present"
|
|
newline
|
|
bitfld.long 0x0 7. "HRS7,Hardware Request Status Channel 7" "0: Not present,1: Present"
|
|
bitfld.long 0x0 6. "HRS6,Hardware Request Status Channel 6" "0: Not present,1: Present"
|
|
newline
|
|
bitfld.long 0x0 5. "HRS5,Hardware Request Status Channel 5" "0: Not present,1: Present"
|
|
bitfld.long 0x0 4. "HRS4,Hardware Request Status Channel 4" "0: Not present,1: Present"
|
|
newline
|
|
bitfld.long 0x0 3. "HRS3,Hardware Request Status Channel 3" "0: Not present,1: Present"
|
|
bitfld.long 0x0 2. "HRS2,Hardware Request Status Channel 2" "0: Not present,1: Present"
|
|
newline
|
|
bitfld.long 0x0 1. "HRS1,Hardware Request Status Channel 1" "0: Not present,1: Present"
|
|
bitfld.long 0x0 0. "HRS0,Hardware Request Status Channel 0" "0: Not present,1: Present"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x38)++0x3
|
|
line.long 0x0 "GPOR$1,General-Purpose Output Register"
|
|
hexmask.long 0x0 0.--31. 1. "GPOR,General-purpose output"
|
|
repeat.end
|
|
repeat 32. (increment 0x0 0x1)(increment 0x0 0x1)
|
|
group.byte ($2+0x100)++0x0
|
|
line.byte 0x0 "DCHPRI$1,Channel n Priority Register"
|
|
bitfld.byte 0x0 7. "ECP,Enable Channel Preemption." "0: Can't be suspended by HP channel's SR,1: Can be temporarily suspended by HP channel's SR"
|
|
bitfld.byte 0x0 6. "DPA,Disable Preempt Ability." "0: Can suspend a lower priority channel,1: Can't suspend any channel regardless of priority"
|
|
newline
|
|
rbitfld.byte 0x0 4.--5. "GRPPRI,Channel n Current Group Priority" "0,1,2,3"
|
|
hexmask.byte 0x0 0.--3. 1. "CHPRI,Channel n Arbitration Priority"
|
|
repeat.end
|
|
repeat 32. (increment 0x0 0x1)(increment 0x0 0x1)
|
|
group.byte ($2+0x140)++0x0
|
|
line.byte 0x0 "DCHMID$1,Channel n Master ID Register"
|
|
bitfld.byte 0x0 7. "EMI,Enable Master ID replication" "0: Master ID replication is disabled,1: Master ID replication is enabled"
|
|
rbitfld.byte 0x0 6. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers"
|
|
newline
|
|
hexmask.byte 0x0 0.--3. 1. "MID,Master ID"
|
|
repeat.end
|
|
repeat 32. (increment 0x0 0x1)(increment 0x0 0x20)
|
|
group.long ($2+0x1000)++0x3
|
|
line.long 0x0 "TCD$1_SADDR,TCD Source Address"
|
|
hexmask.long 0x0 0.--31. 1. "SADDR,Source Address"
|
|
repeat.end
|
|
repeat 32. (increment 0x0 0x1)(increment 0x0 0x20)
|
|
group.word ($2+0x1004)++0x1
|
|
line.word 0x0 "TCD$1_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset"
|
|
repeat.end
|
|
repeat 32. (increment 0x0 0x1)(increment 0x0 0x20)
|
|
group.word ($2+0x1006)++0x1
|
|
line.word 0x0 "TCD$1_ATTR,TCD Transfer Attributes"
|
|
hexmask.word.byte 0x0 11.--15. 1. "SMOD,Source Address Modulo"
|
|
bitfld.word 0x0 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,?,5: 32-byte burst (4 beats of 64 bits),?,?"
|
|
newline
|
|
hexmask.word.byte 0x0 3.--7. 1. "DMOD,Destination Address Modulo"
|
|
bitfld.word 0x0 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
repeat.end
|
|
repeat 32. (increment 0x0 0x1)(increment 0x0 0x20)
|
|
group.long ($2+0x1008)++0x3
|
|
line.long 0x0 "TCD$1_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
repeat.end
|
|
repeat 32. (increment 0x0 0x1)(increment 0x0 0x20)
|
|
group.long ($2+0x1008)++0x3
|
|
line.long 0x0 "TCD$1_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
repeat.end
|
|
repeat 32. (increment 0x0 0x1)(increment 0x0 0x20)
|
|
group.long ($2+0x1008)++0x3
|
|
line.long 0x0 "TCD$1_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE or DMLOE is set this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."
|
|
hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
repeat.end
|
|
repeat 32. (increment 0x0 0x1)(increment 0x0 0x20)
|
|
group.long ($2+0x100C)++0x3
|
|
line.long 0x0 "TCD$1_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x0 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
repeat.end
|
|
repeat 32. (increment 0x0 0x1)(increment 0x0 0x20)
|
|
group.long ($2+0x1010)++0x3
|
|
line.long 0x0 "TCD$1_DADDR,TCD Destination Address"
|
|
hexmask.long 0x0 0.--31. 1. "DADDR,Destination Address"
|
|
repeat.end
|
|
repeat 32. (increment 0x0 0x1)(increment 0x0 0x20)
|
|
group.word ($2+0x1014)++0x1
|
|
line.word 0x0 "TCD$1_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
repeat.end
|
|
repeat 32. (increment 0x0 0x1)(increment 0x0 0x20)
|
|
group.word ($2+0x1016)++0x1
|
|
line.word 0x0 "TCD$1_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x0 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
repeat.end
|
|
repeat 32. (increment 0x0 0x1)(increment 0x0 0x20)
|
|
group.word ($2+0x1016)++0x1
|
|
line.word 0x0 "TCD$1_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Minor Loop Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
repeat.end
|
|
repeat 32. (increment 0x0 0x1)(increment 0x0 0x20)
|
|
group.long ($2+0x1018)++0x3
|
|
line.long 0x0 "TCD$1_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x0 0.--31. 1. "DLASTSGA,Destination last address adjustment or the memory address for the next transfer control descriptor to be loaded into this channel (scatter/gather)"
|
|
repeat.end
|
|
repeat 32. (increment 0x0 0x1)(increment 0x0 0x20)
|
|
group.word ($2+0x101C)++0x1
|
|
line.word 0x0 "TCD$1_CSR,TCD Control and Status"
|
|
bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls.,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W.,3: eDMA engine stalls for 8 cycles after each R/W."
|
|
hexmask.word.byte 0x0 8.--12. 1. "MAJORLINKCH,Major Loop Link Channel Number"
|
|
newline
|
|
bitfld.word 0x0 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: The channel-to-channel linking is disabled.,1: The channel-to-channel linking is enabled."
|
|
bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format.,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x0 3. "DREQ,Disable Request" "0: The channel's ERQ bit is not affected.,1: The channel's ERQ bit is cleared when the major.."
|
|
bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: The half-point interrupt is disabled.,1: The half-point interrupt is enabled."
|
|
newline
|
|
bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: The end-of-major loop interrupt is disabled.,1: The end-of-major loop interrupt is enabled."
|
|
bitfld.word 0x0 0. "START,Channel Start" "0: The channel is not explicitly started.,1: The channel is explicitly started via a software.."
|
|
repeat.end
|
|
repeat 32. (increment 0x0 0x1)(increment 0x0 0x20)
|
|
group.word ($2+0x101E)++0x1
|
|
line.word 0x0 "TCD$1_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word 0x0 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
repeat.end
|
|
repeat 32. (increment 0x0 0x1)(increment 0x0 0x20)
|
|
group.word ($2+0x101E)++0x1
|
|
line.word 0x0 "TCD$1_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: The channel-to-channel linking is disabled,1: The channel-to-channel linking is enabled"
|
|
hexmask.word.byte 0x0 9.--13. 1. "LINKCH,Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count"
|
|
repeat.end
|
|
tree.end
|
|
tree "DMAMUX (Direct Memory Access Multiplexer)"
|
|
base ad:0x0
|
|
tree "DMAMUX_0"
|
|
base ad:0x40031000
|
|
repeat 16. (increment 0x0 0x1)(increment 0x0 0x1)
|
|
group.byte ($2)++0x0
|
|
line.byte 0x0 "CHCFG$1,Channel Configuration register"
|
|
bitfld.byte 0x0 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled"
|
|
bitfld.byte 0x0 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.."
|
|
hexmask.byte 0x0 0.--5. 1. "SOURCE,DMA Channel Source (Slot)"
|
|
repeat.end
|
|
tree.end
|
|
tree "DMAMUX_1"
|
|
base ad:0x400A1000
|
|
repeat 16. (increment 0x0 0x1)(increment 0x0 0x1)
|
|
group.byte ($2)++0x0
|
|
line.byte 0x0 "CHCFG$1,Channel Configuration register"
|
|
bitfld.byte 0x0 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled"
|
|
bitfld.byte 0x0 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.."
|
|
hexmask.byte 0x0 0.--5. 1. "SOURCE,DMA Channel Source (Slot)"
|
|
repeat.end
|
|
tree.end
|
|
tree.end
|
|
tree "EIM (Error Injection Module)"
|
|
base ad:0x40088000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "EIMCR,Error Injection Module Configuration Register"
|
|
bitfld.long 0x0 0. "GEIEN,Global Error Injection Enable" "0: Disabled,1: Enabled"
|
|
line.long 0x4 "EICHEN,Error Injection Channel Enable register"
|
|
bitfld.long 0x4 31. "EICH0EN,Error Injection Channel 0 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.."
|
|
bitfld.long 0x4 30. "EICH1EN,Error Injection Channel 1 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.."
|
|
newline
|
|
bitfld.long 0x4 29. "EICH2EN,Error Injection Channel 2 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.."
|
|
bitfld.long 0x4 28. "EICH3EN,Error Injection Channel 3 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.."
|
|
newline
|
|
bitfld.long 0x4 27. "EICH4EN,Error Injection Channel 4 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.."
|
|
bitfld.long 0x4 26. "EICH5EN,Error Injection Channel 5 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.."
|
|
newline
|
|
bitfld.long 0x4 25. "EICH6EN,Error Injection Channel 6 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.."
|
|
bitfld.long 0x4 24. "EICH7EN,Error Injection Channel 7 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.."
|
|
newline
|
|
bitfld.long 0x4 23. "EICH8EN,Error Injection Channel 8 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.."
|
|
bitfld.long 0x4 22. "EICH9EN,Error Injection Channel 9 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.."
|
|
newline
|
|
bitfld.long 0x4 21. "EICH10EN,Error Injection Channel 10 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.."
|
|
bitfld.long 0x4 20. "EICH11EN,Error Injection Channel 11 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.."
|
|
newline
|
|
bitfld.long 0x4 19. "EICH12EN,Error Injection Channel 12 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.."
|
|
repeat 13. (increment 0x0 0x1)(increment 0x0 0x100)
|
|
group.long ($2+0x100)++0x3
|
|
line.long 0x0 "EICHD$1_WORD0,Error Injection Channel Descriptor. Word0"
|
|
hexmask.long.tbyte 0x0 12.--31. 1. "CHKBIT_MASK,Checkbit Mask"
|
|
repeat.end
|
|
repeat 13. (increment 0x0 0x1)(increment 0x0 0x100)
|
|
group.long ($2+0x104)++0x3
|
|
line.long 0x0 "EICHD$1_WORD1,Error Injection Channel Descriptor. Word1"
|
|
hexmask.long 0x0 0.--31. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3"
|
|
repeat.end
|
|
repeat 13. (increment 0x0 0x1)(increment 0x0 0x100)
|
|
group.long ($2+0x108)++0x3
|
|
line.long 0x0 "EICHD$1_WORD2,Error Injection Channel Descriptor. Word2"
|
|
hexmask.long 0x0 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7"
|
|
repeat.end
|
|
tree.end
|
|
tree "ENET (Ethernet MAC-NET Core)"
|
|
base ad:0x40032000
|
|
group.long 0x4++0x7
|
|
line.long 0x0 "EIR,Interrupt Event Register"
|
|
bitfld.long 0x0 30. "BABR,Babbling Receive Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "BABT,Babbling Transmit Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "GRA,Graceful Stop Complete" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "TXF,Transmit Frame Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "TXB,Transmit Buffer Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "RXF,Receive Frame Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "RXB,Receive Buffer Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "MII,MII Interrupt." "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "EBERR,Ethernet Bus Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "LC,Late Collision" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20. "RL,Collision Retry Limit" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "UN,Transmit FIFO Underrun" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "PLR,Payload Receive Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "WAKEUP,Node Wakeup Request Indication" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "TS_AVAIL,Transmit Timestamp Available" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "TS_TIMER,Timestamp Timer" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "RXFLUSH_2,RX DMA Ring 2 flush indication" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "RXFLUSH_1,RX DMA Ring 1 flush indication" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "RXFLUSH_0,RX DMA Ring 0 flush indication" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "PARSERR,Receive parser error or all entries of the match table checked without any match." "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "PARSRF,Receive frame rejected due to the match with the table entry with MCONFIG[RF] = 1." "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "TXF2,Transmit frame interrupt class 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "TXB2,Transmit buffer interrupt class 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "RXF2,Receive frame interrupt class 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "RXB2,Receive buffer interrupt class 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "TXF1,Transmit frame interrupt class 1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "TXB1,Transmit buffer interrupt class 1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "RXF1,Receive frame interrupt class 1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RXB1,Receive buffer interrupt class 1" "0,1"
|
|
line.long 0x4 "EIMR,Interrupt Mask Register"
|
|
bitfld.long 0x4 30. "BABR,BABR Interrupt Mask" "0: The corresponding interrupt source is masked.,1: The corresponding interrupt source is not masked."
|
|
newline
|
|
bitfld.long 0x4 29. "BABT,BABT Interrupt Mask" "0: The corresponding interrupt source is masked.,1: The corresponding interrupt source is not masked."
|
|
newline
|
|
bitfld.long 0x4 28. "GRA,GRA Interrupt Mask" "0: The corresponding interrupt source is masked.,1: The corresponding interrupt source is not masked."
|
|
newline
|
|
bitfld.long 0x4 27. "TXF,TXF Interrupt Mask" "0: The corresponding interrupt source is masked.,1: The corresponding interrupt source is not masked."
|
|
newline
|
|
bitfld.long 0x4 26. "TXB,TXB Interrupt Mask" "0: The corresponding interrupt source is masked.,1: The corresponding interrupt source is not masked."
|
|
newline
|
|
bitfld.long 0x4 25. "RXF,RXF Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x4 24. "RXB,RXB Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "MII,MII Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "EBERR,EBERR Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "LC,LC Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x4 20. "RL,RL Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "UN,UN Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "PLR,PLR Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "WAKEUP,WAKEUP Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "TS_AVAIL,TS_AVAIL Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "TS_TIMER,TS_TIMER Interrupt Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x4 14. "RXFLUSH_2,Corresponds to interrupt source EIR[RXFLUSH_2] and determines whether an interrupt condition can generate an interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "RXFLUSH_1,Corresponds to interrupt source EIR[RXFLUSH_1] and determines whether an interrupt condition can generate an interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "RXFLUSH_0,Corresponds to interrupt source EIR[RXFLUSH_0] and determines whether an interrupt condition can generate an interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "PARSERR,Interrupt mask bit corresponding to EIR[PARSERR]" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "PARSRF,Interrupt mask bit corresponding to EIR[PARSRF]" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "TXF2,Transmit frame interrupt class 2" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "TXB2,Transmit buffer interrupt class 2" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "RXF2,Receive frame interrupt class 2" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "RXB2,Receive buffer interrupt class 2" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "TXF1,Transmit frame interrupt class 1" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "TXB1,Transmit buffer interrupt class 1" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "RXF1,Receive frame interrupt class 1" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "RXB1,Receive buffer interrupt class 1" "0,1"
|
|
group.long 0x10++0x7
|
|
line.long 0x0 "RDAR,Receive Descriptor Active Register - Ring 0"
|
|
bitfld.long 0x0 24. "RDAR,Receive Descriptor Active" "0,1"
|
|
line.long 0x4 "TDAR,Transmit Descriptor Active Register - Ring 0"
|
|
bitfld.long 0x4 24. "TDAR,Transmit Descriptor Active" "0,1"
|
|
group.long 0x24++0x3
|
|
line.long 0x0 "ECR,Ethernet Control Register"
|
|
bitfld.long 0x0 11. "SVLANDBL,S-VLAN double tag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "VLANUSE2ND,VLAN use second tag" "0: Always extract data from the first VLAN tag if..,1: When a double-tagged frame is detected the data.."
|
|
newline
|
|
bitfld.long 0x0 9. "SVLANEN,S-VLAN enable" "0: Only the EtherType 0x8100 will be considered for..,1: The EtherType 0x88a8 will be considered in.."
|
|
newline
|
|
bitfld.long 0x0 8. "DBSWP,Descriptor Byte Swapping Enable" "0: The buffer descriptor bytes are not swapped to..,1: The buffer descriptor bytes are swapped to.."
|
|
newline
|
|
bitfld.long 0x0 6. "DBGEN,Debug Enable" "0: MAC continues operation in debug mode.,1: MAC enters hardware freeze mode when the.."
|
|
newline
|
|
bitfld.long 0x0 5. "SPEED,Selects between 10/100-Mbit/s and 1000-Mbit/s modes of operation." "0: 10/100-Mbit/s mode,1: 1000-Mbit/s mode"
|
|
newline
|
|
bitfld.long 0x0 4. "EN1588,EN1588 Enable" "0: Legacy FEC buffer descriptors and functions..,1: Enhanced frame time-stamping functions enabled."
|
|
newline
|
|
bitfld.long 0x0 3. "SLEEP,Sleep Mode Enable" "0: Normal operating mode.,1: Sleep mode."
|
|
newline
|
|
bitfld.long 0x0 2. "MAGICEN,Magic Packet Detection Enable" "0: Magic detection logic disabled.,1: The MAC core detects magic packets and asserts.."
|
|
newline
|
|
bitfld.long 0x0 1. "ETHEREN,Ethernet Enable" "0: Reception immediately stops and transmission..,1: MAC is enabled and reception and transmission.."
|
|
newline
|
|
bitfld.long 0x0 0. "RESET,Ethernet MAC Reset" "0,1"
|
|
group.long 0x40++0x7
|
|
line.long 0x0 "MMFR,MII Management Frame Register"
|
|
bitfld.long 0x0 30.--31. "ST,Start Of Frame Delimiter" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 28.--29. "OP,Operation Code" "0,1,2,3"
|
|
newline
|
|
hexmask.long.byte 0x0 23.--27. 1. "PA,PHY Address"
|
|
newline
|
|
hexmask.long.byte 0x0 18.--22. 1. "RA,Register Address"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "TA,Turn Around" "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "DATA,Management Frame Data"
|
|
line.long 0x4 "MSCR,MII Speed Control Register"
|
|
bitfld.long 0x4 8.--10. "HOLDTIME,Hold time On MDIO Output" "0: 1 internal module clock cycle,1: 2 internal module clock cycles,2: 3 internal module clock cycles,?,?,?,?,7: 8 internal module clock cycles"
|
|
newline
|
|
bitfld.long 0x4 7. "DIS_PRE,Disable Preamble" "0: Preamble enabled.,1: Preamble (32 ones) is not prepended to the MII.."
|
|
newline
|
|
hexmask.long.byte 0x4 1.--6. 1. "MII_SPEED,MII Speed"
|
|
group.long 0x64++0x3
|
|
line.long 0x0 "MIBC,MIB Control Register"
|
|
bitfld.long 0x0 31. "MIB_DIS,Disable MIB Logic" "0: MIB logic is enabled.,1: MIB logic is disabled. The MIB logic halts and.."
|
|
newline
|
|
rbitfld.long 0x0 30. "MIB_IDLE,MIB Idle" "0: The MIB block is updating MIB counters.,1: The MIB block is not currently updating any MIB.."
|
|
newline
|
|
bitfld.long 0x0 29. "MIB_CLEAR,MIB Clear" "0: See note above.,1: All statistics counters are reset to 0."
|
|
group.long 0x84++0x3
|
|
line.long 0x0 "RCR,Receive Control Register"
|
|
rbitfld.long 0x0 31. "GRS,Graceful Receive Stopped" "0,1"
|
|
newline
|
|
bitfld.long 0x0 30. "NLC,Payload Length Check Disable" "0: The payload length check is disabled.,1: The core checks the frame's payload length with.."
|
|
newline
|
|
hexmask.long.word 0x0 16.--29. 1. "MAX_FL,Maximum Frame Length"
|
|
newline
|
|
bitfld.long 0x0 15. "CFEN,MAC Control Frame Enable" "0: MAC control frames with any opcode other than..,1: MAC control frames with any opcode other than.."
|
|
newline
|
|
bitfld.long 0x0 14. "CRCFWD,Terminate/Forward Received CRC" "0: The CRC field of received frames is transmitted..,1: The CRC field is stripped from the frame."
|
|
newline
|
|
bitfld.long 0x0 13. "PAUFWD,Terminate/Forward Pause Frames" "0: Pause frames are terminated and discarded in the..,1: Pause frames are forwarded to the user.."
|
|
newline
|
|
bitfld.long 0x0 12. "PADEN,Enable Frame Padding Remove On Receive" "0: No padding is removed on receive by the MAC.,1: Padding is removed from received frames."
|
|
newline
|
|
bitfld.long 0x0 9. "RMII_10T,Enables 10-Mbit/s mode of the RMII or RGMII ." "0: 100-Mbit/s operation.,1: 10-Mbit/s operation."
|
|
newline
|
|
bitfld.long 0x0 8. "RMII_MODE,RMII Mode Enable" "0: MAC configured for MII mode.,1: MAC configured for RMII operation."
|
|
newline
|
|
bitfld.long 0x0 6. "RGMII_EN,RGMII Mode Enable" "0: MAC configured for non-RGMII operation,1: MAC configured for RGMII operation. If.."
|
|
newline
|
|
bitfld.long 0x0 5. "FCE,Flow Control Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "BC_REJ,Broadcast Frame Reject" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "PROM,Promiscuous Mode" "0: Disabled.,1: Enabled."
|
|
newline
|
|
bitfld.long 0x0 2. "MII_MODE,Media Independent Interface Mode" "?,1: MII or RMII mode as indicated by the RMII_MODE.."
|
|
newline
|
|
bitfld.long 0x0 1. "DRT,Disable Receive On Transmit" "0: Receive path operates independently of transmit..,1: Disable reception of frames while transmitting."
|
|
newline
|
|
bitfld.long 0x0 0. "LOOP,Internal Loopback" "0: Loopback disabled.,1: Transmitted frames are looped back internal to.."
|
|
group.long 0xC4++0x3
|
|
line.long 0x0 "TCR,Transmit Control Register"
|
|
bitfld.long 0x0 9. "CRCFWD,Forward Frame From Application With CRC" "0: TxBD[TC] controls whether the frame has a CRC..,1: The transmitter does not append any CRC to.."
|
|
newline
|
|
bitfld.long 0x0 8. "ADDINS,Set MAC Address On Transmit" "0: The source MAC address is not modified by the MAC.,1: The MAC overwrites the source MAC address with.."
|
|
newline
|
|
bitfld.long 0x0 5.--7. "ADDSEL,Source MAC Address Select On Transmit" "0: Node MAC address programmed on PADDR1/2 registers.,?,?,?,?,?,?,?"
|
|
newline
|
|
rbitfld.long 0x0 4. "RFC_PAUSE,Receive Frame Control Pause" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "TFC_PAUSE,Transmit Frame Control Pause" "0: No PAUSE frame transmitted.,1: The MAC stops transmission of data frames after.."
|
|
newline
|
|
bitfld.long 0x0 2. "FDEN,Full-Duplex Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "GTS,Graceful Transmit Stop" "0,1"
|
|
group.long 0xE4++0xB
|
|
line.long 0x0 "PALR,Physical Address Lower Register"
|
|
hexmask.long 0x0 0.--31. 1. "PADDR1,Pause Address"
|
|
line.long 0x4 "PAUR,Physical Address Upper Register"
|
|
hexmask.long.word 0x4 16.--31. 1. "PADDR2,Bytes 4 (bits 31:24) and 5 (bits 23:16) of the 6-byte individual address used for exact match and the source address field in PAUSE frames"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "TYPE,Type Field In PAUSE Frames"
|
|
line.long 0x8 "OPD,Opcode/Pause Duration Register"
|
|
hexmask.long.word 0x8 16.--31. 1. "OPCODE,Opcode Field In PAUSE Frames"
|
|
newline
|
|
hexmask.long.word 0x8 0.--15. 1. "PAUSE_DUR,Pause Duration"
|
|
repeat 3. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0xF0)++0x3
|
|
line.long 0x0 "TXIC$1,Transmit Interrupt Coalescing Register"
|
|
bitfld.long 0x0 31. "ICEN,Interrupt Coalescing Enable" "0: Disable Interrupt coalescing.,1: Enable Interrupt coalescing."
|
|
newline
|
|
bitfld.long 0x0 30. "ICCS,Interrupt Coalescing Timer Clock Source Select" "0: Use MII/GMII TX clocks.,1: Use ENET system clock."
|
|
newline
|
|
hexmask.long.byte 0x0 20.--27. 1. "ICFT,Interrupt coalescing frame count threshold"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "ICTT,Interrupt coalescing timer threshold"
|
|
repeat.end
|
|
repeat 3. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x100)++0x3
|
|
line.long 0x0 "RXIC$1,Receive Interrupt Coalescing Register"
|
|
bitfld.long 0x0 31. "ICEN,Interrupt Coalescing Enable" "0: Disable Interrupt coalescing.,1: Enable Interrupt coalescing."
|
|
newline
|
|
bitfld.long 0x0 30. "ICCS,Interrupt Coalescing Timer Clock Source Select" "0: Use MII/GMII TX clocks.,1: Use ENET system clock."
|
|
newline
|
|
hexmask.long.byte 0x0 20.--27. 1. "ICFT,Interrupt coalescing frame count threshold"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "ICTT,Interrupt coalescing timer threshold"
|
|
repeat.end
|
|
group.long 0x118++0xF
|
|
line.long 0x0 "IAUR,Descriptor Individual Upper Address Register"
|
|
hexmask.long 0x0 0.--31. 1. "IADDR1,Contains the upper 32 bits of the 64-bit hash table used in the address recognition process for receive frames with a unicast address"
|
|
line.long 0x4 "IALR,Descriptor Individual Lower Address Register"
|
|
hexmask.long 0x4 0.--31. 1. "IADDR2,Contains the lower 32 bits of the 64-bit hash table used in the address recognition process for receive frames with a unicast address"
|
|
line.long 0x8 "GAUR,Descriptor Group Upper Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "GADDR1,Contains the upper 32 bits of the 64-bit hash table used in the address recognition process for receive frames with a multicast address"
|
|
line.long 0xC "GALR,Descriptor Group Lower Address Register"
|
|
hexmask.long 0xC 0.--31. 1. "GADDR2,Contains the lower 32 bits of the 64-bit hash table used in the address recognition process for receive frames with a multicast address"
|
|
group.long 0x144++0x3
|
|
line.long 0x0 "TFWR,Transmit FIFO Watermark Register"
|
|
bitfld.long 0x0 8. "STRFWD,Store And Forward Enable" "0: Reset. The transmission start threshold is..,1: Enabled."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--5. 1. "TFWR,Transmit FIFO Write"
|
|
group.long 0x160++0x17
|
|
line.long 0x0 "RDSR1,Receive Descriptor Ring 1 Start Register"
|
|
hexmask.long 0x0 3.--31. 1. "R_DES_START,Pointer to the beginning of the receive buffer descriptor queue 1."
|
|
line.long 0x4 "TDSR1,Transmit Buffer Descriptor Ring 1 Start Register"
|
|
hexmask.long 0x4 3.--31. 1. "X_DES_START,Pointer to the beginning of transmit buffer descriptor queue 1."
|
|
line.long 0x8 "MRBR1,Maximum Receive Buffer Size Register - Ring 1"
|
|
hexmask.long.word 0x8 4.--13. 1. "R_BUF_SIZE,Receive buffer size in bytes"
|
|
line.long 0xC "RDSR2,Receive Descriptor Ring 2 Start Register"
|
|
hexmask.long 0xC 3.--31. 1. "R_DES_START,Pointer to the beginning of receive buffer descriptor queue 2."
|
|
line.long 0x10 "TDSR2,Transmit Buffer Descriptor Ring 2 Start Register"
|
|
hexmask.long 0x10 3.--31. 1. "X_DES_START,Pointer to the beginning of transmit buffer descriptor queue 2."
|
|
line.long 0x14 "MRBR2,Maximum Receive Buffer Size Register - Ring 2"
|
|
hexmask.long.word 0x14 4.--13. 1. "R_BUF_SIZE,Receive buffer size in bytes"
|
|
group.long 0x180++0xB
|
|
line.long 0x0 "RDSR,Receive Descriptor Ring 0 Start Register"
|
|
hexmask.long 0x0 3.--31. 1. "R_DES_START,Pointer to the beginning of the receive buffer descriptor queue. 0"
|
|
line.long 0x4 "TDSR,Transmit Buffer Descriptor Ring 0 Start Register"
|
|
hexmask.long 0x4 3.--31. 1. "X_DES_START,Pointer to the beginning of the transmit buffer descriptor queue."
|
|
line.long 0x8 "MRBR,Maximum Receive Buffer Size Register - Ring 0"
|
|
hexmask.long.word 0x8 4.--13. 1. "R_BUF_SIZE,Receive buffer size in bytes"
|
|
group.long 0x190++0x23
|
|
line.long 0x0 "RSFL,Receive FIFO Section Full Threshold"
|
|
hexmask.long.word 0x0 0.--9. 1. "RX_SECTION_FULL,Value Of Receive FIFO Section Full Threshold"
|
|
line.long 0x4 "RSEM,Receive FIFO Section Empty Threshold"
|
|
hexmask.long.byte 0x4 16.--20. 1. "STAT_SECTION_EMPTY,RX Status FIFO Section Empty Threshold"
|
|
newline
|
|
hexmask.long.word 0x4 0.--9. 1. "RX_SECTION_EMPTY,Value Of The Receive FIFO Section Empty Threshold"
|
|
line.long 0x8 "RAEM,Receive FIFO Almost Empty Threshold"
|
|
hexmask.long.word 0x8 0.--9. 1. "RX_ALMOST_EMPTY,Value Of The Receive FIFO Almost Empty Threshold"
|
|
line.long 0xC "RAFL,Receive FIFO Almost Full Threshold"
|
|
hexmask.long.word 0xC 0.--9. 1. "RX_ALMOST_FULL,Value Of The Receive FIFO Almost Full Threshold"
|
|
line.long 0x10 "TSEM,Transmit FIFO Section Empty Threshold"
|
|
hexmask.long.word 0x10 0.--9. 1. "TX_SECTION_EMPTY,Value Of The Transmit FIFO Section Empty Threshold"
|
|
line.long 0x14 "TAEM,Transmit FIFO Almost Empty Threshold"
|
|
hexmask.long.word 0x14 0.--9. 1. "TX_ALMOST_EMPTY,Value of Transmit FIFO Almost Empty Threshold"
|
|
line.long 0x18 "TAFL,Transmit FIFO Almost Full Threshold"
|
|
hexmask.long.word 0x18 0.--9. 1. "TX_ALMOST_FULL,Value Of The Transmit FIFO Almost Full Threshold"
|
|
line.long 0x1C "TIPG,Transmit Inter-Packet Gap"
|
|
hexmask.long.byte 0x1C 0.--4. 1. "IPG,Transmit Inter-Packet Gap"
|
|
line.long 0x20 "FTRL,Frame Truncation Length"
|
|
hexmask.long.word 0x20 0.--13. 1. "TRUNC_FL,Frame Truncation Length"
|
|
group.long 0x1C0++0x7
|
|
line.long 0x0 "TACC,Transmit Accelerator Function Configuration"
|
|
bitfld.long 0x0 4. "PROCHK,Enables insertion of protocol checksum." "0: Checksum not inserted.,1: If an IP frame with a known protocol is.."
|
|
newline
|
|
bitfld.long 0x0 3. "IPCHK,Enables insertion of IP header checksum." "0: Checksum is not inserted.,1: If an IP frame is transmitted the checksum is.."
|
|
newline
|
|
bitfld.long 0x0 0. "SHIFT16,TX FIFO Shift-16" "0: Disabled.,1: Indicates to the transmit data FIFO that the.."
|
|
line.long 0x4 "RACC,Receive Accelerator Function Configuration"
|
|
bitfld.long 0x4 7. "SHIFT16,RX FIFO Shift-16" "0: Disabled.,1: Instructs the MAC to write two additional bytes.."
|
|
newline
|
|
bitfld.long 0x4 6. "LINEDIS,Enable Discard Of Frames With MAC Layer Errors" "0: Frames with errors are not discarded.,1: Any frame received with a CRC length or PHY.."
|
|
newline
|
|
bitfld.long 0x4 2. "PRODIS,Enable Discard Of Frames With Wrong Protocol Checksum" "0: Frames with wrong checksum are not discarded.,1: If a TCP/IP UDP/IP or ICMP/IP frame is received.."
|
|
newline
|
|
bitfld.long 0x4 1. "IPDIS,Enable Discard Of Frames With Wrong IPv4 Header Checksum" "0: Frames with wrong IPv4 header checksum are not..,1: If an IPv4 frame is received with a mismatching.."
|
|
newline
|
|
bitfld.long 0x4 0. "PADREM,Enable Padding Removal For Short IP Frames" "0: Padding not removed.,1: Any bytes following the IP payload section of.."
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x1C8)++0x3
|
|
line.long 0x0 "RCMR$1,Receive Classification Match Register for Class n"
|
|
bitfld.long 0x0 16. "MATCHEN,Match Enable" "0: Disabled (default): no compares will occur and..,1: The register contents are valid and a comparison.."
|
|
newline
|
|
bitfld.long 0x0 12.--14. "CMP3,Compare 3" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "CMP2,Compare 2" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 4.--6. "CMP1,Compare 1" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "CMP0,Compare 0" "0,1,2,3,4,5,6,7"
|
|
repeat.end
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x1D8)++0x3
|
|
line.long 0x0 "DMA$1CFG,DMA Class Based Configuration"
|
|
bitfld.long 0x0 17. "CALC_NOIPG,Calculate no IPG" "0: The traffic shaper function should consider 12..,1: Addition of 12 bytes for the IPG should be.."
|
|
newline
|
|
bitfld.long 0x0 16. "DMA_CLASS_EN,DMA class enable" "0: The DMA controller's channel for the class is..,1: Enable the DMA controller to support the.."
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "IDLE_SLOPE,Idle slope"
|
|
repeat.end
|
|
group.long 0x1E0++0x13
|
|
line.long 0x0 "RDAR1,Receive Descriptor Active Register - Ring 1"
|
|
bitfld.long 0x0 24. "RDAR,Receive Descriptor Active" "0,1"
|
|
line.long 0x4 "TDAR1,Transmit Descriptor Active Register - Ring 1"
|
|
bitfld.long 0x4 24. "TDAR,Transmit Descriptor Active" "0,1"
|
|
line.long 0x8 "RDAR2,Receive Descriptor Active Register - Ring 2"
|
|
bitfld.long 0x8 24. "RDAR,Receive Descriptor Active" "0,1"
|
|
line.long 0xC "TDAR2,Transmit Descriptor Active Register - Ring 2"
|
|
bitfld.long 0xC 24. "TDAR,Transmit Descriptor Active" "0,1"
|
|
line.long 0x10 "QOS,QOS Scheme"
|
|
bitfld.long 0x10 5. "RX_FLUSH2,RX Flush Ring 2" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x10 4. "RX_FLUSH1,RX Flush Ring 1" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x10 3. "RX_FLUSH0,RX Flush Ring 0" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x10 0.--2. "TX_SCHEME,TX scheme configuration" "0: Credit-based scheme,1: Round-robin scheme,?,?,?,?,?,?"
|
|
rgroup.long 0x200++0x77
|
|
line.long 0x0 "RMON_T_DROP,Reserved Statistic Register"
|
|
line.long 0x4 "RMON_T_PACKETS,Tx Packet Count Statistic Register"
|
|
hexmask.long.word 0x4 0.--15. 1. "TXPKTS,Packet count"
|
|
line.long 0x8 "RMON_T_BC_PKT,Tx Broadcast Packets Statistic Register"
|
|
hexmask.long.word 0x8 0.--15. 1. "TXPKTS,Broadcast packets"
|
|
line.long 0xC "RMON_T_MC_PKT,Tx Multicast Packets Statistic Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "TXPKTS,Multicast packets"
|
|
line.long 0x10 "RMON_T_CRC_ALIGN,Tx Packets with CRC/Align Error Statistic Register"
|
|
hexmask.long.word 0x10 0.--15. 1. "TXPKTS,Packets with CRC/align error"
|
|
line.long 0x14 "RMON_T_UNDERSIZE,Tx Packets Less Than Bytes and Good CRC Statistic Register"
|
|
hexmask.long.word 0x14 0.--15. 1. "TXPKTS,Number of transmit packets less than 64 bytes with good CRC"
|
|
line.long 0x18 "RMON_T_OVERSIZE,Tx Packets GT MAX_FL bytes and Good CRC Statistic Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "TXPKTS,Number of transmit packets greater than MAX_FL bytes with good CRC"
|
|
line.long 0x1C "RMON_T_FRAG,Tx Packets Less Than 64 Bytes and Bad CRC Statistic Register"
|
|
hexmask.long.word 0x1C 0.--15. 1. "TXPKTS,Number of packets less than 64 bytes with bad CRC"
|
|
line.long 0x20 "RMON_T_JAB,Tx Packets Greater Than MAX_FL bytes and Bad CRC Statistic Register"
|
|
hexmask.long.word 0x20 0.--15. 1. "TXPKTS,Number of transmit packets greater than MAX_FL bytes and bad CRC"
|
|
line.long 0x24 "RMON_T_COL,Tx Collision Count Statistic Register"
|
|
hexmask.long.word 0x24 0.--15. 1. "TXPKTS,Number of transmit collisions"
|
|
line.long 0x28 "RMON_T_P64,Tx 64-Byte Packets Statistic Register"
|
|
hexmask.long.word 0x28 0.--15. 1. "TXPKTS,Number of 64-byte transmit packets"
|
|
line.long 0x2C "RMON_T_P65TO127,Tx 65- to 127-byte Packets Statistic Register"
|
|
hexmask.long.word 0x2C 0.--15. 1. "TXPKTS,Number of 65- to 127-byte transmit packets"
|
|
line.long 0x30 "RMON_T_P128TO255,Tx 128- to 255-byte Packets Statistic Register"
|
|
hexmask.long.word 0x30 0.--15. 1. "TXPKTS,Number of 128- to 255-byte transmit packets"
|
|
line.long 0x34 "RMON_T_P256TO511,Tx 256- to 511-byte Packets Statistic Register"
|
|
hexmask.long.word 0x34 0.--15. 1. "TXPKTS,Number of 256- to 511-byte transmit packets"
|
|
line.long 0x38 "RMON_T_P512TO1023,Tx 512- to 1023-byte Packets Statistic Register"
|
|
hexmask.long.word 0x38 0.--15. 1. "TXPKTS,Number of 512- to 1023-byte transmit packets"
|
|
line.long 0x3C "RMON_T_P1024TO2047,Tx 1024- to 2047-byte Packets Statistic Register"
|
|
hexmask.long.word 0x3C 0.--15. 1. "TXPKTS,Number of 1024- to 2047-byte transmit packets"
|
|
line.long 0x40 "RMON_T_P_GTE2048,Tx Packets Greater Than 2048 Bytes Statistic Register"
|
|
hexmask.long.word 0x40 0.--15. 1. "TXPKTS,Number of transmit packets greater than 2048 bytes"
|
|
line.long 0x44 "RMON_T_OCTETS,Tx Octets Statistic Register"
|
|
hexmask.long 0x44 0.--31. 1. "TXOCTS,Number of transmit octets"
|
|
line.long 0x48 "IEEE_T_DROP,Reserved Statistic Register"
|
|
line.long 0x4C "IEEE_T_FRAME_OK,Frames Transmitted OK Statistic Register"
|
|
hexmask.long.word 0x4C 0.--15. 1. "COUNT,Number of frames transmitted OK"
|
|
line.long 0x50 "IEEE_T_1COL,Frames Transmitted with Single Collision Statistic Register"
|
|
hexmask.long.word 0x50 0.--15. 1. "COUNT,Number of frames transmitted with one collision"
|
|
line.long 0x54 "IEEE_T_MCOL,Frames Transmitted with Multiple Collisions Statistic Register"
|
|
hexmask.long.word 0x54 0.--15. 1. "COUNT,Number of frames transmitted with multiple collisions"
|
|
line.long 0x58 "IEEE_T_DEF,Frames Transmitted after Deferral Delay Statistic Register"
|
|
hexmask.long.word 0x58 0.--15. 1. "COUNT,Number of frames transmitted with deferral delay"
|
|
line.long 0x5C "IEEE_T_LCOL,Frames Transmitted with Late Collision Statistic Register"
|
|
hexmask.long.word 0x5C 0.--15. 1. "COUNT,Number of frames transmitted with late collision"
|
|
line.long 0x60 "IEEE_T_EXCOL,Frames Transmitted with Excessive Collisions Statistic Register"
|
|
hexmask.long.word 0x60 0.--15. 1. "COUNT,Number of frames transmitted with excessive collisions"
|
|
line.long 0x64 "IEEE_T_MACERR,Frames Transmitted with Tx FIFO Underrun Statistic Register"
|
|
hexmask.long.word 0x64 0.--15. 1. "COUNT,Number of frames transmitted with transmit FIFO underrun"
|
|
line.long 0x68 "IEEE_T_CSERR,Frames Transmitted with Carrier Sense Error Statistic Register"
|
|
hexmask.long.word 0x68 0.--15. 1. "COUNT,Number of frames transmitted with carrier sense error"
|
|
line.long 0x6C "IEEE_T_SQE,Reserved Statistic Register"
|
|
hexmask.long.word 0x6C 0.--15. 1. "COUNT,This read-only field is reserved and always has the value 0"
|
|
line.long 0x70 "IEEE_T_FDXFC,Flow Control Pause Frames Transmitted Statistic Register"
|
|
hexmask.long.word 0x70 0.--15. 1. "COUNT,Number of flow-control pause frames transmitted"
|
|
line.long 0x74 "IEEE_T_OCTETS_OK,Octet Count for Frames Transmitted w/o Error Statistic Register"
|
|
hexmask.long 0x74 0.--31. 1. "COUNT,Octet count for frames transmitted without error Counts total octets (includes header and FCS fields)."
|
|
rgroup.long 0x284++0x5F
|
|
line.long 0x0 "RMON_R_PACKETS,Rx Packet Count Statistic Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "COUNT,Number of packets received"
|
|
line.long 0x4 "RMON_R_BC_PKT,Rx Broadcast Packets Statistic Register"
|
|
hexmask.long.word 0x4 0.--15. 1. "COUNT,Number of receive broadcast packets"
|
|
line.long 0x8 "RMON_R_MC_PKT,Rx Multicast Packets Statistic Register"
|
|
hexmask.long.word 0x8 0.--15. 1. "COUNT,Number of receive multicast packets"
|
|
line.long 0xC "RMON_R_CRC_ALIGN,Rx Packets with CRC/Align Error Statistic Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "COUNT,Number of receive packets with CRC or align error"
|
|
line.long 0x10 "RMON_R_UNDERSIZE,Rx Packets with Less Than 64 Bytes and Good CRC Statistic Register"
|
|
hexmask.long.word 0x10 0.--15. 1. "COUNT,Number of receive packets with less than 64 bytes and good CRC"
|
|
line.long 0x14 "RMON_R_OVERSIZE,Rx Packets Greater Than MAX_FL and Good CRC Statistic Register"
|
|
hexmask.long.word 0x14 0.--15. 1. "COUNT,Number of receive packets greater than MAX_FL and good CRC"
|
|
line.long 0x18 "RMON_R_FRAG,Rx Packets Less Than 64 Bytes and Bad CRC Statistic Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "COUNT,Number of receive packets with less than 64 bytes and bad CRC"
|
|
line.long 0x1C "RMON_R_JAB,Rx Packets Greater Than MAX_FL Bytes and Bad CRC Statistic Register"
|
|
hexmask.long.word 0x1C 0.--15. 1. "COUNT,Number of receive packets greater than MAX_FL and bad CRC"
|
|
line.long 0x20 "RMON_R_RESVD_0,Reserved Statistic Register"
|
|
line.long 0x24 "RMON_R_P64,Rx 64-Byte Packets Statistic Register"
|
|
hexmask.long.word 0x24 0.--15. 1. "COUNT,Number of 64-byte receive packets"
|
|
line.long 0x28 "RMON_R_P65TO127,Rx 65- to 127-Byte Packets Statistic Register"
|
|
hexmask.long.word 0x28 0.--15. 1. "COUNT,Number of 65- to 127-byte recieve packets"
|
|
line.long 0x2C "RMON_R_P128TO255,Rx 128- to 255-Byte Packets Statistic Register"
|
|
hexmask.long.word 0x2C 0.--15. 1. "COUNT,Number of 128- to 255-byte recieve packets"
|
|
line.long 0x30 "RMON_R_P256TO511,Rx 256- to 511-Byte Packets Statistic Register"
|
|
hexmask.long.word 0x30 0.--15. 1. "COUNT,Number of 256- to 511-byte recieve packets"
|
|
line.long 0x34 "RMON_R_P512TO1023,Rx 512- to 1023-Byte Packets Statistic Register"
|
|
hexmask.long.word 0x34 0.--15. 1. "COUNT,Number of 512- to 1023-byte recieve packets"
|
|
line.long 0x38 "RMON_R_P1024TO2047,Rx 1024- to 2047-Byte Packets Statistic Register"
|
|
hexmask.long.word 0x38 0.--15. 1. "COUNT,Number of 1024- to 2047-byte recieve packets"
|
|
line.long 0x3C "RMON_R_P_GTE2048,Rx Packets Greater than 2048 Bytes Statistic Register"
|
|
hexmask.long.word 0x3C 0.--15. 1. "COUNT,Number of greater-than-2048-byte recieve packets"
|
|
line.long 0x40 "RMON_R_OCTETS,Rx Octets Statistic Register"
|
|
hexmask.long 0x40 0.--31. 1. "COUNT,Number of receive octets"
|
|
line.long 0x44 "IEEE_R_DROP,Frames not Counted Correctly Statistic Register"
|
|
hexmask.long.word 0x44 0.--15. 1. "COUNT,Frame count"
|
|
line.long 0x48 "IEEE_R_FRAME_OK,Frames Received OK Statistic Register"
|
|
hexmask.long.word 0x48 0.--15. 1. "COUNT,Number of frames received OK"
|
|
line.long 0x4C "IEEE_R_CRC,Frames Received with CRC Error Statistic Register"
|
|
hexmask.long.word 0x4C 0.--15. 1. "COUNT,Number of frames received with CRC error"
|
|
line.long 0x50 "IEEE_R_ALIGN,Frames Received with Alignment Error Statistic Register"
|
|
hexmask.long.word 0x50 0.--15. 1. "COUNT,Number of frames received with alignment error"
|
|
line.long 0x54 "IEEE_R_MACERR,Receive FIFO Overflow Count Statistic Register"
|
|
hexmask.long.word 0x54 0.--15. 1. "COUNT,Receive FIFO overflow count"
|
|
line.long 0x58 "IEEE_R_FDXFC,Flow Control Pause Frames Received Statistic Register"
|
|
hexmask.long.word 0x58 0.--15. 1. "COUNT,Number of flow-control pause frames received"
|
|
line.long 0x5C "IEEE_R_OCTETS_OK,Octet Count for Frames Received without Error Statistic Register"
|
|
hexmask.long 0x5C 0.--31. 1. "COUNT,Number of octets for frames received without error"
|
|
group.long 0x400++0x17
|
|
line.long 0x0 "ATCR,Adjustable Timer Control Register"
|
|
bitfld.long 0x0 13. "SLAVE,Enable Timer Slave Mode" "0: The timer is active and all configuration fields..,1: The internal timer is disabled and the.."
|
|
newline
|
|
bitfld.long 0x0 11. "CAPTURE,Capture Timer Value" "0: No effect.,1: The current time is captured and can be read.."
|
|
newline
|
|
bitfld.long 0x0 9. "RESTART,Reset Timer" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "PINPER,Enables event signal output assertion on period event" "0: Disable.,1: Enable."
|
|
newline
|
|
bitfld.long 0x0 4. "PEREN,Enable Periodical Event" "0: Disable.,1: A period event interrupt can be generated.."
|
|
newline
|
|
bitfld.long 0x0 3. "OFFRST,Reset Timer On Offset Event" "0: The timer is not affected and no action occurs..,1: If OFFEN is set the timer resets to zero when.."
|
|
newline
|
|
bitfld.long 0x0 2. "OFFEN,Enable One-Shot Offset Event" "0: Disable.,1: The timer can be reset to zero when the given.."
|
|
newline
|
|
bitfld.long 0x0 0. "EN,Enable Timer" "0: The timer stops at the current value.,1: The timer starts incrementing."
|
|
line.long 0x4 "ATVR,Timer Value Register"
|
|
hexmask.long 0x4 0.--31. 1. "ATIME,A write sets the timer"
|
|
line.long 0x8 "ATOFF,Timer Offset Register"
|
|
hexmask.long 0x8 0.--31. 1. "OFFSET,Offset value for one-shot event generation"
|
|
line.long 0xC "ATPER,Timer Period Register"
|
|
hexmask.long 0xC 0.--31. 1. "PERIOD,Value for generating periodic events"
|
|
line.long 0x10 "ATCOR,Timer Correction Register"
|
|
hexmask.long 0x10 0.--30. 1. "COR,Correction Counter Wrap-Around Value"
|
|
line.long 0x14 "ATINC,Time-Stamping Clock Period Register"
|
|
hexmask.long.byte 0x14 8.--14. 1. "INC_CORR,Correction Increment Value"
|
|
newline
|
|
hexmask.long.byte 0x14 0.--6. 1. "INC,Clock Period Of The Timestamping Clock (ts_clk) In Nanoseconds"
|
|
rgroup.long 0x418++0x3
|
|
line.long 0x0 "ATSTMP,Timestamp of Last Transmitted Frame"
|
|
hexmask.long 0x0 0.--31. 1. "TIMESTAMP,Timestamp of the last frame transmitted by the core that had TxBD[TS] set"
|
|
group.long 0x580++0x17
|
|
line.long 0x0 "MDATA,Pattern Match Data Register"
|
|
hexmask.long 0x0 0.--31. 1. "MATCHDATA,Match Data"
|
|
line.long 0x4 "MMASK,Match Entry Mask Register"
|
|
hexmask.long 0x4 0.--31. 1. "MATCHMASK,Match Mask"
|
|
line.long 0x8 "MCONFIG,Match Entry Rules Configuration Register"
|
|
bitfld.long 0x8 31. "AF,Accept Frame" "0,1"
|
|
newline
|
|
bitfld.long 0x8 30. "RF,Reject Frame" "0,1"
|
|
newline
|
|
bitfld.long 0x8 29. "IM,Invert Match" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x8 16.--23. 1. "OK_INDEX,When AF = 0 and RF = 0 this value shows the next entry of the matching table to be used for comparison instead of using the next entry sequentially"
|
|
newline
|
|
hexmask.long.byte 0x8 2.--7. 1. "FRMOFF,Frame Offset"
|
|
line.long 0xC "MENTRYRW,Match Entry Read/Write Command Register"
|
|
bitfld.long 0xC 9. "RD,Entry Read Command" "0,1"
|
|
newline
|
|
bitfld.long 0xC 8. "WR,Entry write command" "0,1"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--7. 1. "ENTRYADD,Entry Address"
|
|
line.long 0x10 "RXPCTL,Receive Parser Control Register"
|
|
bitfld.long 0x10 24. "ACPTEERR,Accept End Error" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x10 16.--23. 1. "ENDERRQ,End Error Queue"
|
|
newline
|
|
hexmask.long.byte 0x10 8.--15. 1. "MAXINDEX,Maximum Index"
|
|
newline
|
|
bitfld.long 0x10 4. "PRSRSCLR,Clear Parser Statistics Counter" "0,1"
|
|
newline
|
|
bitfld.long 0x10 1. "INVBYTORD,Inverse Frame Byte Order" "0,1"
|
|
newline
|
|
bitfld.long 0x10 0. "ENPARSER,Enable Receive Parser" "0: Parser is disabled.,1: Parser is enabled."
|
|
line.long 0x14 "MAXFRMOFF,Maximum Frame Offset"
|
|
hexmask.long.byte 0x14 0.--5. 1. "MXFRMOFF,Max. Frame Offset"
|
|
rgroup.long 0x598++0x3
|
|
line.long 0x0 "RXPARST,Receive Parser Status"
|
|
bitfld.long 0x0 8. "RXPRSDN,Receive Parser Done" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "INVMAXIDX,Invalid Value of MAXINDEX" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "PRSENDERR,Parser End Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "FMOFFERR,Maximum Frame Offset Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "NOMTCERR,No Match Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "TBLDPTERR,Table Depth Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "MXINDERR,Maximum Index Error" "0,1"
|
|
rgroup.long 0x5A0++0x1B
|
|
line.long 0x0 "PARSDSCD,Parser Discard Count"
|
|
hexmask.long 0x0 0.--31. 1. "COUNT,Count"
|
|
line.long 0x4 "PRSACPT0,Parser Accept Count 0"
|
|
hexmask.long 0x4 0.--31. 1. "COUNT,Count"
|
|
line.long 0x8 "PRSRJCT0,Parser Reject Count 0"
|
|
hexmask.long 0x8 0.--31. 1. "COUNT,Count"
|
|
line.long 0xC "PRSACPT1,Parser Accept Count 1"
|
|
hexmask.long 0xC 0.--31. 1. "COUNT,Count"
|
|
line.long 0x10 "PRSRJCT1,Parser Reject Count 1"
|
|
hexmask.long 0x10 0.--31. 1. "COUNT,Count"
|
|
line.long 0x14 "PRSACPT2,Parser Accept Count 2"
|
|
hexmask.long 0x14 0.--31. 1. "COUNT,Count"
|
|
line.long 0x18 "PRSRJCT2,Parser Reject Count 2"
|
|
hexmask.long 0x18 0.--31. 1. "COUNT,Count"
|
|
group.long 0x604++0x3
|
|
line.long 0x0 "TGSR,Timer Global Status Register"
|
|
bitfld.long 0x0 3. "TF3,Copy Of Timer Flag For Channel 3" "0: Timer Flag for Channel 3 is clear,1: Timer Flag for Channel 3 is set"
|
|
newline
|
|
bitfld.long 0x0 2. "TF2,Copy Of Timer Flag For Channel 2" "0: Timer Flag for Channel 2 is clear,1: Timer Flag for Channel 2 is set"
|
|
newline
|
|
bitfld.long 0x0 1. "TF1,Copy Of Timer Flag For Channel 1" "0: Timer Flag for Channel 1 is clear,1: Timer Flag for Channel 1 is set"
|
|
newline
|
|
bitfld.long 0x0 0. "TF0,Copy Of Timer Flag For Channel 0" "0: Timer Flag for Channel 0 is clear,1: Timer Flag for Channel 0 is set"
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x8)
|
|
group.long ($2+0x608)++0x3
|
|
line.long 0x0 "TCSR$1,Timer Control Status Register"
|
|
bitfld.long 0x0 7. "TF,Timer Flag" "0: Input Capture or Output Compare has not occurred.,1: Input Capture or Output Compare has occurred."
|
|
newline
|
|
bitfld.long 0x0 6. "TIE,Timer Interrupt Enable" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
newline
|
|
hexmask.long.byte 0x0 2.--5. 1. "TMODE,Timer Mode"
|
|
newline
|
|
bitfld.long 0x0 0. "TDRE,Timer DMA Request Enable" "0: DMA request is disabled,1: DMA request is enabled"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x8)
|
|
group.long ($2+0x60C)++0x3
|
|
line.long 0x0 "TCCR$1,Timer Compare Capture Register"
|
|
hexmask.long 0x0 0.--31. 1. "TCC,Timer Capture Compare"
|
|
repeat.end
|
|
tree.end
|
|
tree "ERM (Error Reporting Module)"
|
|
base ad:0x40080000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CR,ERM Configuration Register"
|
|
bitfld.long 0x0 31. "ESCIE0,Enable Memory 0 Single Correction Interrupt Notification This field is initialized by hardware reset" "0: Interrupt notification of Memory 0 single-bit..,1: Interrupt notification of Memory 0 single-bit.."
|
|
bitfld.long 0x0 30. "ENCIE0,Enable Memory 0 Non-Correctable Interrupt Notification This field is initialized by hardware reset" "0: Interrupt notification of Memory 0..,1: Interrupt notification of Memory 0.."
|
|
newline
|
|
bitfld.long 0x0 27. "ESCIE1,Enable Memory 1 Single Correction Interrupt Notification This field is initialized by hardware reset" "0: Interrupt notification of Memory 1 single-bit..,1: Interrupt notification of Memory 1 single-bit.."
|
|
bitfld.long 0x0 26. "ENCIE1,Enable Memory 1 Non-Correctable Interrupt Notification This field is initialized by hardware reset" "0: Interrupt notification of Memory 1..,1: Interrupt notification of Memory 1.."
|
|
newline
|
|
bitfld.long 0x0 23. "ESCIE2,Enable Memory 2 Single Correction Interrupt Notification This field is initialized by hardware reset" "0: Interrupt notification of Memory 2 single-bit..,1: Interrupt notification of Memory 2 single-bit.."
|
|
bitfld.long 0x0 22. "ENCIE2,Enable Memory 2 Non-Correctable Interrupt Notification This field is initialized by hardware reset" "0: Interrupt notification of Memory 2..,1: Interrupt notification of Memory 2.."
|
|
newline
|
|
bitfld.long 0x0 19. "ESCIE3,Enable Memory 3 Single Correction Interrupt Notification This field is initialized by hardware reset" "0: Interrupt notification of Memory 3 single-bit..,1: Interrupt notification of Memory 3 single-bit.."
|
|
bitfld.long 0x0 18. "ENCIE3,Enable Memory 3 Non-Correctable Interrupt Notification This field is initialized by hardware reset" "0: Interrupt notification of Memory 3..,1: Interrupt notification of Memory 3.."
|
|
newline
|
|
bitfld.long 0x0 15. "ESCIE4,Enable Memory 4 Single Correction Interrupt Notification This field is initialized by hardware reset" "0: Interrupt notification of Memory 4 single-bit..,1: Interrupt notification of Memory 4 single-bit.."
|
|
bitfld.long 0x0 14. "ENCIE4,Enable Memory 4 Non-Correctable Interrupt Notification This field is initialized by hardware reset" "0: Interrupt notification of Memory 4..,1: Interrupt notification of Memory 4.."
|
|
newline
|
|
bitfld.long 0x0 11. "ESCIE5,Enable Memory 5 Single Correction Interrupt Notification This field is initialized by hardware reset" "0: Interrupt notification of Memory 5 single-bit..,1: Interrupt notification of Memory 5 single-bit.."
|
|
bitfld.long 0x0 10. "ENCIE5,Enable Memory 5 Non-Correctable Interrupt Notification This field is initialized by hardware reset" "0: Interrupt notification of Memory 5..,1: Interrupt notification of Memory 5.."
|
|
newline
|
|
bitfld.long 0x0 7. "ESCIE6,Enable Memory 6 Single Correction Interrupt Notification This field is initialized by hardware reset" "0: Interrupt notification of Memory 6 single-bit..,1: Interrupt notification of Memory 6 single-bit.."
|
|
bitfld.long 0x0 6. "ENCIE6,Enable Memory 6 Non-Correctable Interrupt Notification This field is initialized by hardware reset" "0: Interrupt notification of Memory 6..,1: Interrupt notification of Memory 6.."
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "SR,ERM Status Register"
|
|
bitfld.long 0x0 31. "SBC0,Memory 0 Single-Bit Correction Event This field is initialized by hardware reset" "0: No single-bit correction event on Memory 0..,1: Single-bit correction event on Memory 0 detected"
|
|
bitfld.long 0x0 30. "NCE0,Memory 0 Non-Correctable Error Event This field is initialized by hardware reset" "0: No non-correctable error event on Memory 0..,1: Non-correctable error event on Memory 0 detected"
|
|
newline
|
|
bitfld.long 0x0 27. "SBC1,Memory 1 Single-Bit Correction Event This field is initialized by hardware reset" "0: No single-bit correction event on Memory 1..,1: Single-bit correction event on Memory 1 detected"
|
|
bitfld.long 0x0 26. "NCE1,Memory 1 Non-Correctable Error Event This field is initialized by hardware reset" "0: No non-correctable error event on Memory 1..,1: Non-correctable error event on Memory 1 detected"
|
|
newline
|
|
bitfld.long 0x0 23. "SBC2,Memory 2 Single-Bit Correction Event This field is initialized by hardware reset" "0: No single-bit correction event on Memory 2..,1: Single-bit correction event on Memory 2 detected"
|
|
bitfld.long 0x0 22. "NCE2,Memory 2 Non-Correctable Error Event This field is initialized by hardware reset" "0: No non-correctable error event on Memory 2..,1: Non-correctable error event on Memory 2 detected"
|
|
newline
|
|
bitfld.long 0x0 19. "SBC3,Memory 3 Single-Bit Correction Event This field is initialized by hardware reset" "0: No single-bit correction event on Memory 3..,1: Single-bit correction event on Memory 3 detected"
|
|
bitfld.long 0x0 18. "NCE3,Memory 3 Non-Correctable Error Event This field is initialized by hardware reset" "0: No non-correctable error event on Memory 3..,1: Non-correctable error event on Memory 3 detected"
|
|
newline
|
|
bitfld.long 0x0 15. "SBC4,Memory 4 Single-Bit Correction Event This field is initialized by hardware reset" "0: No single-bit correction event on Memory 4..,1: Single-bit correction event on Memory 4 detected"
|
|
bitfld.long 0x0 14. "NCE4,Memory 4 Non-Correctable Error Event This field is initialized by hardware reset" "0: No non-correctable error event on Memory 4..,1: Non-correctable error event on Memory 4 detected"
|
|
newline
|
|
bitfld.long 0x0 11. "SBC5,Memory 5 Single-Bit Correction Event This field is initialized by hardware reset" "0: No single-bit correction event on Memory 5..,1: Single-bit correction event on Memory 5 detected"
|
|
bitfld.long 0x0 10. "NCE5,Memory 5 Non-Correctable Error Event This field is initialized by hardware reset" "0: No non-correctable error event on Memory 5..,1: Non-correctable error event on Memory 5 detected"
|
|
newline
|
|
bitfld.long 0x0 7. "SBC6,Memory 6 Single-Bit Correction Event This field is initialized by hardware reset" "0: No single-bit correction event on Memory 6..,1: Single-bit correction event on Memory 6 detected"
|
|
bitfld.long 0x0 6. "NCE6,Memory 6 Non-Correctable Error Event This field is initialized by hardware reset" "0: No non-correctable error event on Memory 6..,1: Non-correctable error event on Memory 6 detected"
|
|
repeat 7. (increment 0x0 0x1)(increment 0x0 0x10)
|
|
rgroup.long ($2+0x100)++0x3
|
|
line.long 0x0 "EAR$1,ERM Memory n Error Address Register"
|
|
hexmask.long 0x0 0.--31. 1. "EAR,Memory n Error Address - This field contains the faulting system address of the last recorded ECC event on Memory n"
|
|
repeat.end
|
|
repeat 7. (increment 0x0 0x1)(increment 0x0 0x10)
|
|
rgroup.long ($2+0x104)++0x3
|
|
line.long 0x0 "SYN$1,ERM Memory n Syndrome Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "SYNDROME,Memory n Syndrome - This field contains the ECC syndrome associated with the last recorded ECC event on Memory n"
|
|
repeat.end
|
|
tree.end
|
|
tree "FCCU (Fault Collection and Control Unit)"
|
|
base ad:0x400B0000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRL,Control"
|
|
bitfld.long 0x0 31. "FILTER_BYPASS,Filter bypass" "0: glitch filter not bypassed,1: glitch filter bypassed"
|
|
newline
|
|
bitfld.long 0x0 29.--30. "FILTER_WIDTH,Filter width" "0: filters glitches up to 50 us,1: filters glitches up to 75 us,2: filters glitches up to 100 us,3: filters glitches up to 100 us"
|
|
newline
|
|
bitfld.long 0x0 9. "DEBUG,Debug Mode Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
rbitfld.long 0x0 6.--7. "OPS,Operation status. This bit can be read and cleared (via OP15 operation) by the software." "0: Idle,1: In progress,2: Aborted,3: Successful"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--4. 1. "OPR,Operation Run"
|
|
wgroup.long 0x4++0x3
|
|
line.long 0x0 "CTRLK,Control Key"
|
|
hexmask.long 0x0 0.--31. 1. "CTRLK,Locked-Operation Control Key"
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "CFG,Configuration"
|
|
bitfld.long 0x0 24. "FCCU_SET_AFTER_RESET,Fault-Output (EOUT) Activate" "0: Inactive (the EOUT signals are in a..,1: Active (the EOUT signals indicate FCCU's.."
|
|
newline
|
|
bitfld.long 0x0 22.--23. "FCCU_SET_CLEAR,Fault-Output (EOUT) Control" "0: Controlled by the FSM,1: Always low,2: Controlled by the FSM,3: High until a fault occurs on a channel.."
|
|
newline
|
|
bitfld.long 0x0 15. "FOPE,Fault-Output (EOUT) Prescaler Extension" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "OD,Open-Drain Mechanism to select between Push-pull and Open drain(OD) mode for the error indicating pin(s)" "0: Push-pull,1: Open-drain"
|
|
newline
|
|
bitfld.long 0x0 10. "SM,Fault-Output (EOUT) Switching Mode" "0: Slow: No EOUT frequency violation during the..,1: Fast: The indication transition (Normal to Fault.."
|
|
newline
|
|
bitfld.long 0x0 9. "PS,Fault-Output (EOUT) Polarity Selection" "0: For the faulty indication EOUT1 is high and..,1: For the faulty indication EOUT1 is low and EOUT0.."
|
|
newline
|
|
bitfld.long 0x0 6.--8. "FOM,Fault-Output (EOUT) Mode" "0: Dual-Rail (default state) [EOUT[1:0]= outputs],1: Time-Switching [EOUT[1:0]= output to be used],2: Bistable,?,?,5: Test 0 (controlled by the FCCU_EINOUT register;..,6: Test 1 (controlled by the FCCU_EINOUT register;..,7: Test 2 (controlled by the FCCU_EINOUT register;.."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--5. 1. "FOP,Fault-Output (EOUT) Prescaler"
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x1C)++0x3
|
|
line.long 0x0 "NCF_CFG$1,Noncritical Fault Configuration"
|
|
hexmask.long 0x0 0.--31. 1. "NCFCx,Noncritical Fault Configuration"
|
|
repeat.end
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x4C)++0x3
|
|
line.long 0x0 "NCFS_CFG$1,Noncritical Fault State Configuration"
|
|
hexmask.long 0x0 0.--31. 1. "NCFSCx,Noncritical fault state configuration See for register offset to channel number relationship."
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x80)++0x3
|
|
line.long 0x0 "NCF_S$1,Noncritical Fault Status"
|
|
hexmask.long 0x0 0.--31. 1. "NCFSx,Noncritical fault status"
|
|
repeat.end
|
|
wgroup.long 0x90++0x3
|
|
line.long 0x0 "NCFK,Noncritical Fault Key"
|
|
hexmask.long 0x0 0.--31. 1. "NCFK,Noncritical fault key = AB34_98FEh"
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x94)++0x3
|
|
line.long 0x0 "NCF_E$1,Noncritical Fault Enable"
|
|
hexmask.long 0x0 0.--31. 1. "NCFEx,Noncritical fault enable For the mapping of the NCFEx fields among registers see the earlier table in this register description"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0xA4)++0x3
|
|
line.long 0x0 "NCF_TOE$1,Noncritical Fault Timeout Enable"
|
|
hexmask.long 0x0 0.--31. 1. "NCFTOEx,Fault timeout enable For the mapping of the NCFTOEx fields among registers see the earlier table in this register description"
|
|
repeat.end
|
|
group.long 0xB4++0xB
|
|
line.long 0x0 "NCF_TO,Noncritical Fault Timeout"
|
|
hexmask.long 0x0 0.--31. 1. "TO,Noncritical Fault Timeout Timeout = (TO) * T RC16MHz"
|
|
line.long 0x4 "CFG_TO,Configuration-State Timer Interval"
|
|
bitfld.long 0x4 0.--2. "TO,Configuration-State Timer Interval" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "EINOUT,IO Control"
|
|
rbitfld.long 0x8 5. "EIN1,Error Input 1" "0: Low,1: High"
|
|
newline
|
|
rbitfld.long 0x8 4. "EIN0,Error Input 0" "0: Low,1: High"
|
|
newline
|
|
bitfld.long 0x8 1. "EOUT1,Error out 1 (significant only if the FCCU_CFG" "0: force EOUT[1] = 0,1: force EOUT[1] = 1"
|
|
newline
|
|
bitfld.long 0x8 0. "EOUT0,Error out 0 (significative only if the FCCU_CFG" "0: force EOUT[0] = 0,1: force EOUT[0] = 1"
|
|
rgroup.long 0xC0++0x13
|
|
line.long 0x0 "STAT,Status"
|
|
bitfld.long 0x0 4.--5. "PhysicErrorPin,Fault Output (EOUT) States" "0: EOUT1 is low; EOUT0 is low.,1: EOUT1 is low; EOUT0 is high.,2: EOUT1 is high; EOUT0 is low.,3: EOUT1 is high; EOUT0 is high."
|
|
newline
|
|
bitfld.long 0x0 3. "ESTAT,Fault State" "0: Not in Fault state (in Normal Alarm or..,1: In Fault state"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "STATUS,FCCU State" "0: Normal,1: Configuration,2: Alarm,3: Fault,?,?,?,?"
|
|
line.long 0x4 "N2AF_STATUS,NA Freeze Status"
|
|
hexmask.long.byte 0x4 0.--7. 1. "NAFS,Normal to Alarm Frozen Status 00000000 No transition from NORMAL to ALARM state 00000001 NORMAL to ALARM state transition cause => fccu_ncf[0] fault 00000010 NORMAL to ALARM state transition cause => fccu_ncf[1] fault 00000011 NORMAL to ALARM state.."
|
|
line.long 0x8 "A2FF_STATUS,AF Freeze Status"
|
|
bitfld.long 0x8 8.--9. "AF_SRC,Fault source" "0: No fault,?,2: 'Noncritical' fault,3: Multiple and/or 'noncritical' faults"
|
|
newline
|
|
hexmask.long.byte 0x8 0.--7. 1. "AFFS,Alarm to Fault Frozen Status 00h: No transition from ALARM to FAULT state 01h: ALARM to FAULT state transition cause => fccu_ncf[0]/ fault timeout fault 02h: ALARM to FAULT state transition cause => fccu_ncf[1]/ fault timeout fault 03h: ALARM to.."
|
|
line.long 0xC "N2FF_STATUS,NF Freeze Status"
|
|
bitfld.long 0xC 8.--9. "NF_SRC,NF_SRC: Fault source" "0: No fault,?,2: 'Noncritical' fault,3: Multiple 'noncritical' faults"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--7. 1. "NFFS,Normal to Fault Frozen Status 00h: No transition from NORMAL to FAULT state 01h: NORMAL to FAULT state transition cause => fccu_ncf[0] fault 02h: NORMAL to FAULT state transition cause => fccu_ncf[1] fault 03h: NORMAL to FAULT state transition cause.."
|
|
line.long 0x10 "F2A_STATUS,FA Freeze Status"
|
|
hexmask.long.word 0x10 0.--8. 1. "FAFS,Fault to Normal Frozen Status 00h: No transition from FAULT to ALARM state 01h: FAULT to ALARM state transition cause => fccu_ncf[0]/ fault 02h: FAULT to ALARM state transition cause => fccu_ncf[1]/ fault 03h: FAULT to ALARM state transition cause.."
|
|
wgroup.long 0xDC++0x3
|
|
line.long 0x0 "NCFF,Noncritical Fault Fake"
|
|
hexmask.long.byte 0x0 0.--6. 1. "FNCFC,FNCFC/ : Fake noncritical fault code Only writing to this register fake fault injection occurs writing 00 and default value being zero give different results"
|
|
group.long 0xE0++0x7
|
|
line.long 0x0 "IRQ_STAT,IRQ Status"
|
|
rbitfld.long 0x0 2. "NMI_STAT,NMI Interrupt Status" "0: NMI interrupt is OFF,1: NMI interrupt is ON"
|
|
newline
|
|
rbitfld.long 0x0 1. "ALRM_STAT,Alarm Interrupt Status" "0: Alarm interrupt is OFF,1: Alarm interrupt is ON"
|
|
newline
|
|
bitfld.long 0x0 0. "CFG_TO_STAT,Configuration Timeout Status" "0: No configuration timeout error,1: Configuration timeout error"
|
|
line.long 0x4 "IRQ_EN,IRQ Enable"
|
|
bitfld.long 0x4 0. "CFG_TO_IEN,Configuration Timeout Interrupt Enable" "0: Configuration timeout interrupt disabled,1: Configuration timeout interrupt enabled"
|
|
rgroup.long 0xE8++0x7
|
|
line.long 0x0 "XTMR,X Timer"
|
|
hexmask.long 0x0 0.--31. 1. "XTMR,X Timer"
|
|
line.long 0x4 "MCS,Mode Controller Status"
|
|
bitfld.long 0x4 31. "VL3,Valid 3-Indicates whether MCS3 and FS3 are valid." "0: Invalid,1: Valid"
|
|
newline
|
|
bitfld.long 0x4 30. "FS3,Fault Status 3" "0: Not in Fault state or NMIOUT not asserted,1: In Fault state and NMIOUT asserted"
|
|
newline
|
|
hexmask.long.byte 0x4 24.--27. 1. "MCS3,Mode Controller State 3-Indicates the fourth most recent chip mode."
|
|
newline
|
|
bitfld.long 0x4 23. "VL2,Valid 2-Indicates whether MCS2 and FS2 are valid." "0: Invalid,1: Valid"
|
|
newline
|
|
bitfld.long 0x4 22. "FS2,Fault Status 2" "0: Not in Fault state or NMIOUT not asserted,1: In Fault state and NMIOUT asserted"
|
|
newline
|
|
hexmask.long.byte 0x4 16.--19. 1. "MCS2,Mode Controller State 2-Indicates the third most recent chip mode."
|
|
newline
|
|
bitfld.long 0x4 15. "VL1,Valid 1-Indicates whether MCS1 and FS1 are valid." "0: Invalid,1: Valid"
|
|
newline
|
|
bitfld.long 0x4 14. "FS1,Fault Status 1" "0: Not in Fault state or NMIOUT not asserted,1: In Fault state and NMIOUT asserted"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--11. 1. "MCS1,Mode Controller State 1-Indicates the second most recent chip mode."
|
|
newline
|
|
bitfld.long 0x4 7. "VL0,Valid 0-Indicates whether MCS0 and FS0 are valid." "0: Invalid,1: Valid"
|
|
newline
|
|
bitfld.long 0x4 6. "FS0,Fault Status 0" "0: Not in Fault state or NMIOUT not asserted,1: In Fault state and NMIOUT asserted"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--3. 1. "MCS0,Mode Controller State 0-Indicates the most recent (current) chip mode."
|
|
wgroup.long 0xF0++0x7
|
|
line.long 0x0 "TRANS_LOCK,Transient Configuration Lock"
|
|
hexmask.long.word 0x0 0.--8. 1. "TRANSKEY,Transient Configuration Lock"
|
|
line.long 0x4 "PERMNT_LOCK,Permanent Configuration Lock"
|
|
hexmask.long.word 0x4 0.--8. 1. "PERMNTKEY,Permanent Configuration Lock"
|
|
group.long 0xF8++0x3
|
|
line.long 0x0 "DELTA_T,Delta T"
|
|
hexmask.long.word 0x0 0.--13. 1. "DELTA_T,Bistable Minimum Fault-Output (EOUT) Faulty Interval"
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0xFC)++0x3
|
|
line.long 0x0 "IRQ_ALARM_EN$1,IRQ Alarm Enable"
|
|
hexmask.long 0x0 0.--31. 1. "IRQENx,IRQ alarm enable For the mapping of the IRQENx fields among registers see the earlier table in this register description"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x10C)++0x3
|
|
line.long 0x0 "NMI_EN$1,NMI Enable"
|
|
hexmask.long 0x0 0.--31. 1. "NMIENx,NMI enable See for register offset to channel number relationship."
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x11C)++0x3
|
|
line.long 0x0 "EOUT_SIG_EN$1,Noncritical Fault-State EOUT Signaling Enable"
|
|
hexmask.long 0x0 0.--31. 1. "EOUTENx,Noncritical Fault-State EOUT Signaling Enable x Writable only when FCCU is in Configuration state"
|
|
repeat.end
|
|
tree.end
|
|
tree "FDMA (FastDMA)"
|
|
base ad:0x7C040000
|
|
group.long 0x0++0x1B
|
|
line.long 0x0 "XFR_REC_LIST_PTR,Transfer Records List Pointer register"
|
|
hexmask.long 0x0 0.--31. 1. "XFR_REC_LIST_PTR,Transfer Records List Pointer"
|
|
line.long 0x4 "XFR_REC_CNT,Total entries in Transfer Record List"
|
|
hexmask.long.byte 0x4 0.--6. 1. "XFR_REC_CNT,Total entries in the Transfer Record List"
|
|
line.long 0x8 "XFR_REC_NUM,Transfer Record number for current Line transfer"
|
|
hexmask.long.byte 0x8 0.--6. 1. "XFR_REC_NUM,Transfer Record number to be used for current Line transfer"
|
|
line.long 0xC "XFR_LINE_NUM,DDR and SRAM Line numbers for current transfer"
|
|
hexmask.long.word 0xC 16.--29. 1. "SRAM_LINE_NUM,Image Line number to be accessed from the selected Image Slice in SRAM"
|
|
hexmask.long.word 0xC 0.--15. 1. "DDR_IMG_LINE_NUM,Image Line number to be accessed from the selected Image in DDR"
|
|
line.long 0x10 "LINE_INCR,Line increment value for SRAM and DDR"
|
|
hexmask.long.byte 0x10 16.--23. 1. "SRAM_LINE_INCR,SRAM Line increment value"
|
|
hexmask.long.byte 0x10 0.--7. 1. "DDR_LINE_INCR,DDR Line increment value"
|
|
line.long 0x14 "IRQ_EN,Interrupt enable register"
|
|
bitfld.long 0x14 3. "EDMA_TRIG_EN,eDMA Trigger enable" "0: Disable Trigger output to eDMA.,1: Enable Trigger output to eDMA."
|
|
bitfld.long 0x14 2. "FDMA_CRC_ERR_IRQ_EN,FastDMA CRC Error interrupt enable" "0: Disable FastDMA CRC error interrupt.,1: Enable FastDMA CRC error interrupt."
|
|
newline
|
|
bitfld.long 0x14 1. "FDMA_ERR_IRQ_EN,FastDMA error interrupt enable" "0: Disable FastDMA error (configuration/transfer..,1: Enable FastDMA error (configuration/transfer.."
|
|
bitfld.long 0x14 0. "FDMA_DONE_IRQ_EN,FastDMA Done interrupt enable" "0: Disable FastDMA Done interrupt to Host.,1: Enable FastDMA Done interrupt to Host."
|
|
line.long 0x18 "XFR_STAT,Status register"
|
|
hexmask.long.byte 0x18 24.--31. 1. "DONE_CNT,Counter to track number of completed FastDMA Transfers"
|
|
bitfld.long 0x18 16. "XFR_DONE,Write-1-to-clear status bit indicating a completed Transfer." "0,1"
|
|
newline
|
|
bitfld.long 0x18 10. "TR_WBACK_ERR,Error during Transfer Record Write-back access" "0,1"
|
|
bitfld.long 0x18 9. "CRC_WR_ERR,Error during CRC Write to SRAM" "0,1"
|
|
newline
|
|
bitfld.long 0x18 8. "XFR_ERR_SRAM,Transfer error during AXI read/write on SRAM interface" "0,1"
|
|
bitfld.long 0x18 7. "XFR_ERR_DDR,Transfer error during AXI read/write on DDR interface" "0,1"
|
|
newline
|
|
bitfld.long 0x18 6. "XFR_CFG_ERR,Transfer Record configuration error" "0,1"
|
|
bitfld.long 0x18 5. "CRC_RD_ERR,Error during CRC Read from SRAM" "0,1"
|
|
newline
|
|
bitfld.long 0x18 4. "TR_RD_ERR,Transfer setup error during Transfer Record List read" "0,1"
|
|
bitfld.long 0x18 3. "CMD_CFG_ERR,Transfer Command configuration Error" "0: No Error,1: Invalid Transfer command configuration"
|
|
newline
|
|
bitfld.long 0x18 2. "CRC_ERR,CRC Error" "0: No CRC Error,1: Calculated CRC does not match with the.."
|
|
rbitfld.long 0x18 1. "XFR_CMD_QUEUE_FULL,Transfer Command Queue Full indicator" "0: FastDMA can accept new Transfer Commands,1: Transfer Command Queue Full."
|
|
newline
|
|
rbitfld.long 0x18 0. "XFR_CMD_QUEUE_EMPTY,Transfer Command Queue Empty indicator" "0: Transfer Command Queue is not empty.,1: Queue is Empty."
|
|
rgroup.long 0x1C++0x17
|
|
line.long 0x0 "CALC_CRC_VAL,Calculated CRC value"
|
|
hexmask.long 0x0 0.--31. 1. "CALC_CRC_VAL,Calculated 32-bit CRC value for the current Line data"
|
|
line.long 0x4 "CURR_DDR_PTR,Current DDR address"
|
|
hexmask.long 0x4 0.--31. 1. "CURR_DDR_PTR,Current DDR address"
|
|
line.long 0x8 "CURR_SRAM_PTR,Current SRAM address"
|
|
hexmask.long 0x8 0.--31. 1. "CURR_SRAM_PTR,Current SRAM address"
|
|
line.long 0xC "XFR_REC_NUM_DONE,Last completed Transfer Record Number"
|
|
hexmask.long.byte 0xC 0.--6. 1. "XFR_REC_NUM_DONE,Last completed Transfer Record number"
|
|
line.long 0x10 "ERR_XFR_REC_NUM,Transfer Record Number of an Erroneous Transfer"
|
|
hexmask.long.byte 0x10 0.--6. 1. "ERR_XFR_REC_NUM,Transfer Record number of an Erroneous Transfer"
|
|
line.long 0x14 "NEXT_LINE,SRAM and DDR next Line number"
|
|
hexmask.long.word 0x14 16.--29. 1. "SRAM_NEXT_LINE_NUM,Next Line number to be accessed from the selected Image slice in SRAM"
|
|
hexmask.long.word 0x14 0.--15. 1. "DDR_NEXT_LINE_NUM,Next Line number to be accessed from the selected Image in DDR"
|
|
group.long 0x34++0x3
|
|
line.long 0x0 "CTRL,Control register"
|
|
bitfld.long 0x0 0. "SOFT_RST,Soft Reset bit" "0,1"
|
|
tree.end
|
|
tree "FlexCAN (Controller Area Network)"
|
|
base ad:0x0
|
|
tree "CAN_0"
|
|
base ad:0x40055000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "MCR,Module Configuration Register"
|
|
bitfld.long 0x0 31. "MDIS,Module Disable" "0: Enable the FlexCAN module.,1: Disable the FlexCAN module."
|
|
bitfld.long 0x0 30. "FRZ,Freeze Enable" "0: Not enabled to enter Freeze mode.,1: Enabled to enter Freeze mode."
|
|
newline
|
|
bitfld.long 0x0 29. "RFEN,Rx FIFO Enable" "0: Rx FIFO not enabled.,1: Rx FIFO enabled."
|
|
bitfld.long 0x0 28. "HALT,Halt FlexCAN" "0: No Freeze mode request.,1: Enters Freeze mode if the FRZ bit is asserted."
|
|
newline
|
|
rbitfld.long 0x0 27. "NOTRDY,FlexCAN Not Ready" "0: FlexCAN module is either in Normal mode..,1: FlexCAN module is either in Disable mode Stop.."
|
|
bitfld.long 0x0 25. "SOFTRST,Soft Reset" "0: No reset request.,1: Resets the registers affected by soft reset."
|
|
newline
|
|
rbitfld.long 0x0 24. "FRZACK,Freeze Mode Acknowledge" "0: FlexCAN not in Freeze mode prescaler running.,1: FlexCAN in Freeze mode prescaler stopped."
|
|
bitfld.long 0x0 21. "WRNEN,Warning Interrupt Enable" "0: TWRNINT and RWRNINT bits are zero independent of..,1: TWRNINT and RWRNINT bits are set when the.."
|
|
newline
|
|
rbitfld.long 0x0 20. "LPMACK,Low-Power Mode Acknowledge" "0: FlexCAN is not in a low-power mode.,1: FlexCAN is in a low-power mode."
|
|
bitfld.long 0x0 17. "SRXDIS,Self Reception Disable" "0: Self reception enabled.,1: Self reception disabled."
|
|
newline
|
|
bitfld.long 0x0 16. "IRMQ,Individual Rx Masking And Queue Enable" "0: Individual Rx masking and queue feature are..,1: Individual Rx masking and queue feature are.."
|
|
bitfld.long 0x0 15. "DMA,DMA Enable" "0: DMA feature for RX FIFO disabled.,1: DMA feature for RX FIFO enabled."
|
|
newline
|
|
bitfld.long 0x0 13. "LPRIOEN,Local Priority Enable" "0: Local Priority disabled.,1: Local Priority enabled."
|
|
bitfld.long 0x0 12. "AEN,Abort Enable" "0: Abort disabled.,1: Abort enabled."
|
|
newline
|
|
bitfld.long 0x0 11. "FDEN,CAN FD operation enable" "0: CAN FD is disabled. FlexCAN is able to receive..,1: CAN FD is enabled. FlexCAN is able to receive.."
|
|
bitfld.long 0x0 8.--9. "IDAM,ID Acceptance Mode" "0: Format A: One full ID (standard and extended)..,1: Format B: Two full standard IDs or two partial..,2: Format C: Four partial 8-bit Standard IDs per ID..,3: Format D: All frames rejected."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "MAXMB,Number Of The Last Message Buffer"
|
|
line.long 0x4 "CTRL1,Control 1 register"
|
|
hexmask.long.byte 0x4 24.--31. 1. "PRESDIV,Prescaler Division Factor"
|
|
bitfld.long 0x4 22.--23. "RJW,Resync Jump Width" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 19.--21. "PSEG1,Phase Segment 1" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 16.--18. "PSEG2,Phase Segment 2" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 15. "BOFFMSK,Bus Off Interrupt Mask" "0: Bus Off interrupt disabled.,1: Bus Off interrupt enabled."
|
|
bitfld.long 0x4 14. "ERRMSK,Error Interrupt Mask" "0: Error interrupt disabled.,1: Error interrupt enabled."
|
|
newline
|
|
bitfld.long 0x4 12. "LPB,Loop Back Mode" "0: Loop Back disabled.,1: Loop Back enabled."
|
|
bitfld.long 0x4 11. "TWRNMSK,Tx Warning Interrupt Mask" "0: Tx Warning Interrupt disabled.,1: Tx Warning Interrupt enabled."
|
|
newline
|
|
bitfld.long 0x4 10. "RWRNMSK,Rx Warning Interrupt Mask" "0: Rx Warning Interrupt disabled.,1: Rx Warning Interrupt enabled."
|
|
bitfld.long 0x4 7. "SMP,CAN Bit Sampling" "0: Just one sample is used to determine the bit..,1: Three samples are used to determine the value of.."
|
|
newline
|
|
bitfld.long 0x4 6. "BOFFREC,Bus Off Recovery" "0: Automatic recovering from Bus Off state enabled.,1: Automatic recovering from Bus Off state disabled."
|
|
bitfld.long 0x4 5. "TSYN,Timer Sync" "0: Timer Sync feature disabled,1: Timer Sync feature enabled"
|
|
newline
|
|
bitfld.long 0x4 4. "LBUF,Lowest Buffer Transmitted First" "0: Buffer with highest priority is transmitted first.,1: Lowest number buffer is transmitted first."
|
|
bitfld.long 0x4 3. "LOM,Listen-Only Mode" "0: Listen-Only mode is deactivated.,1: FlexCAN module operates in Listen-Only mode."
|
|
newline
|
|
bitfld.long 0x4 0.--2. "PROPSEG,Propagation Segment" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "TIMER,Free Running Timer"
|
|
hexmask.long.word 0x8 0.--15. 1. "TIMER,Timer Value"
|
|
group.long 0x10++0x27
|
|
line.long 0x0 "RXMGMASK,Rx Mailboxes Global Mask Register"
|
|
hexmask.long 0x0 0.--31. 1. "MG,Rx Mailboxes Global Mask Bits"
|
|
line.long 0x4 "RX14MASK,Rx 14 Mask register"
|
|
hexmask.long 0x4 0.--31. 1. "RX14M,Rx Buffer 14 Mask Bits"
|
|
line.long 0x8 "RX15MASK,Rx 15 Mask register"
|
|
hexmask.long 0x8 0.--31. 1. "RX15M,Rx Buffer 15 Mask Bits"
|
|
line.long 0xC "ECR,Error Counter"
|
|
hexmask.long.byte 0xC 24.--31. 1. "RXERRCNT_FAST,Receive Error Counter for fast bits"
|
|
hexmask.long.byte 0xC 16.--23. 1. "TXERRCNT_FAST,Transmit Error Counter for fast bits"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--15. 1. "RXERRCNT,Receive Error Counter"
|
|
hexmask.long.byte 0xC 0.--7. 1. "TXERRCNT,Transmit Error Counter"
|
|
line.long 0x10 "ESR1,Error and Status 1 register"
|
|
rbitfld.long 0x10 31. "BIT1ERR_FAST,Bit1 Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: At least one bit sent as recessive is received.."
|
|
rbitfld.long 0x10 30. "BIT0ERR_FAST,Bit0 Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: At least one bit sent as dominant is received as.."
|
|
newline
|
|
rbitfld.long 0x10 28. "CRCERR_FAST,Cyclic Redundancy Check Error in the CRC field of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: A CRC error occurred since last read of this.."
|
|
rbitfld.long 0x10 27. "FRMERR_FAST,Form Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: A Form Error occurred since last read of this.."
|
|
newline
|
|
rbitfld.long 0x10 26. "STFERR_FAST,Stuffing Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: A Stuffing Error occurred since last read of.."
|
|
bitfld.long 0x10 21. "ERROVR,Error Overrun bit" "0: Overrun has not occurred.,1: Overrun has occurred."
|
|
newline
|
|
bitfld.long 0x10 20. "ERRINT_FAST,Error Interrupt for errors detected in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: Indicates setting of any Error Bit detected in.."
|
|
bitfld.long 0x10 19. "BOFFDONEINT,Bus Off Done Interrupt" "0: No such occurrence.,1: FlexCAN module has completed Bus Off process."
|
|
newline
|
|
rbitfld.long 0x10 18. "SYNCH,CAN Synchronization Status" "0: FlexCAN is not synchronized to the CAN bus.,1: FlexCAN is synchronized to the CAN bus."
|
|
bitfld.long 0x10 17. "TWRNINT,Tx Warning Interrupt Flag" "0: No such occurrence.,1: The Tx error counter transitioned from less than.."
|
|
newline
|
|
bitfld.long 0x10 16. "RWRNINT,Rx Warning Interrupt Flag" "0: No such occurrence.,1: The Rx error counter transitioned from less than.."
|
|
rbitfld.long 0x10 15. "BIT1ERR,Bit1 Error" "0: No such occurrence.,1: At least one bit sent as recessive is received.."
|
|
newline
|
|
rbitfld.long 0x10 14. "BIT0ERR,Bit0 Error" "0: No such occurrence.,1: At least one bit sent as dominant is received as.."
|
|
rbitfld.long 0x10 13. "ACKERR,Acknowledge Error" "0: No such occurrence.,1: An ACK error occurred since last read of this.."
|
|
newline
|
|
rbitfld.long 0x10 12. "CRCERR,Cyclic Redundancy Check Error" "0: No such occurrence.,1: A CRC error occurred since last read of this.."
|
|
rbitfld.long 0x10 11. "FRMERR,Form Error" "0: No such occurrence.,1: A Form Error occurred since last read of this.."
|
|
newline
|
|
rbitfld.long 0x10 10. "STFERR,Stuffing Error" "0: No such occurrence.,1: A Stuffing Error occurred since last read of.."
|
|
rbitfld.long 0x10 9. "TXWRN,TX Error Warning" "0: No such occurrence.,1: TXERRCNT is greater than or equal to 96."
|
|
newline
|
|
rbitfld.long 0x10 8. "RXWRN,Rx Error Warning" "0: No such occurrence.,1: RXERRCNT is greater than or equal to 96."
|
|
rbitfld.long 0x10 7. "IDLE,This bit indicates when CAN bus is in IDLE state" "0: No such occurrence.,1: CAN bus is now IDLE."
|
|
newline
|
|
rbitfld.long 0x10 6. "TX,FlexCAN In Transmission" "0: FlexCAN is not transmitting a message.,1: FlexCAN is transmitting a message."
|
|
rbitfld.long 0x10 4.--5. "FLTCONF,Fault Confinement State" "0: Bus Off,1: Error Passive,2: Bus Off,3: Bus Off"
|
|
newline
|
|
rbitfld.long 0x10 3. "RX,FlexCAN In Reception" "0: FlexCAN is not receiving a message.,1: FlexCAN is receiving a message."
|
|
bitfld.long 0x10 2. "BOFFINT,Bus Off Interrupt" "0: No such occurrence.,1: FlexCAN module entered Bus Off state."
|
|
newline
|
|
bitfld.long 0x10 1. "ERRINT,Error Interrupt" "0: No such occurrence.,1: Indicates setting of any Error Bit in the Error.."
|
|
line.long 0x14 "IMASK2,Interrupt Masks 2 register"
|
|
hexmask.long 0x14 0.--31. 1. "BUF63TO32M,Buffer MB i Mask"
|
|
line.long 0x18 "IMASK1,Interrupt Masks 1 register"
|
|
hexmask.long 0x18 0.--31. 1. "BUF31TO0M,Buffer MB i Mask"
|
|
line.long 0x1C "IFLAG2,Interrupt Flags 2 register"
|
|
hexmask.long 0x1C 0.--31. 1. "BUF63TO32I,Buffer MB i Interrupt"
|
|
line.long 0x20 "IFLAG1,Interrupt Flags 1 register"
|
|
hexmask.long.tbyte 0x20 8.--31. 1. "BUF31TO8I,Buffer MBi Interrupt"
|
|
bitfld.long 0x20 7. "BUF7I,Buffer MB7 Interrupt Or 'Rx FIFO Overflow'" "0: No occurrence of MB7 completing..,1: MB7 completed transmission/reception when.."
|
|
newline
|
|
bitfld.long 0x20 6. "BUF6I,Buffer MB6 Interrupt Or 'Rx FIFO Warning'" "0: No occurrence of MB6 completing..,1: MB6 completed transmission/reception when.."
|
|
bitfld.long 0x20 5. "BUF5I,Buffer MB5 Interrupt Or 'Frames available in Rx FIFO'" "0: No occurrence of MB5 completing..,1: MB5 completed transmission/reception when.."
|
|
newline
|
|
hexmask.long.byte 0x20 1.--4. 1. "BUF4TO1I,Buffer MB i Interrupt Or 'reserved'"
|
|
bitfld.long 0x20 0. "BUF0I,Buffer MB0 Interrupt Or Clear FIFO bit" "0: The corresponding buffer has no occurrence of..,1: The corresponding buffer has successfully.."
|
|
line.long 0x24 "CTRL2,Control 2 register"
|
|
bitfld.long 0x24 31. "ERRMSK_FAST,Error Interrupt Mask for errors detected in the Data Phase of fast CAN FD frames" "0: ERRINT_FAST Error interrupt disabled.,1: ERRINT_FAST Error interrupt enabled."
|
|
bitfld.long 0x24 30. "BOFFDONEMSK,Bus Off Done Interrupt Mask" "0: Bus Off Done interrupt disabled.,1: Bus Off Done interrupt enabled."
|
|
newline
|
|
bitfld.long 0x24 29. "ECRWRE,Error-correction Configuration Register Write Enable" "0: Disable update.,1: Enable update."
|
|
bitfld.long 0x24 28. "WRMFRZ,Write-Access To Memory In Freeze Mode" "0: Maintain the write access restrictions.,1: Enable unrestricted write access to FlexCAN.."
|
|
newline
|
|
hexmask.long.byte 0x24 24.--27. 1. "RFFN,Number Of Rx FIFO Filters"
|
|
hexmask.long.byte 0x24 19.--23. 1. "TASD,Tx Arbitration Start Delay"
|
|
newline
|
|
bitfld.long 0x24 18. "MRP,Mailboxes Reception Priority" "0: Matching starts from Rx FIFO and continues on..,1: Matching starts from Mailboxes and continues on.."
|
|
bitfld.long 0x24 17. "RRS,Remote Request Storing" "0: Remote Response Frame is generated.,1: Remote Request Frame is stored."
|
|
newline
|
|
bitfld.long 0x24 16. "EACEN,Entire Frame Arbitration Field Comparison Enable For Rx Mailboxes" "0: Rx Mailbox filter's IDE bit is always compared..,1: Enables the comparison of both Rx Mailbox.."
|
|
bitfld.long 0x24 15. "TIMER_SRC,Timer Source" "0: The Free Running Timer is clocked by the CAN bit..,1: The Free Running Timer is clocked by an external.."
|
|
newline
|
|
bitfld.long 0x24 14. "PREXCEN,Protocol Exception Enable" "0: Protocol Exception is disabled.,1: Protocol Exception is enabled."
|
|
bitfld.long 0x24 12. "ISOCANFDEN,ISO CAN FD Enable" "0: FlexCAN operates using the non-ISO CAN FD..,1: FlexCAN operates using the ISO CAN FD protocol.."
|
|
newline
|
|
bitfld.long 0x24 11. "EDFLTDIS,Edge Filter Disable" "0: Edge Filter is enabled.,1: Edge Filter is disabled."
|
|
rgroup.long 0x38++0x3
|
|
line.long 0x0 "ESR2,Error and Status 2 register"
|
|
hexmask.long.byte 0x0 16.--22. 1. "LPTM,Lowest Priority Tx Mailbox"
|
|
bitfld.long 0x0 14. "VPS,Valid Priority Status" "0: Contents of IMB and LPTM are invalid.,1: Contents of IMB and LPTM are valid."
|
|
newline
|
|
bitfld.long 0x0 13. "IMB,Inactive Mailbox" "0: If ESR2[VPS] is asserted the ESR2[LPTM] is not..,1: If ESR2[VPS] is asserted there is at least one.."
|
|
rgroup.long 0x44++0x3
|
|
line.long 0x0 "CRCR,CRC Register"
|
|
hexmask.long.byte 0x0 16.--22. 1. "MBCRC,CRC Mailbox"
|
|
hexmask.long.word 0x0 0.--14. 1. "TXCRC,Transmitted CRC value"
|
|
group.long 0x48++0x3
|
|
line.long 0x0 "RXFGMASK,Rx FIFO Global Mask register"
|
|
hexmask.long 0x0 0.--31. 1. "FGM,Rx FIFO Global Mask Bits"
|
|
rgroup.long 0x4C++0x3
|
|
line.long 0x0 "RXFIR,Rx FIFO Information Register"
|
|
hexmask.long.word 0x0 0.--8. 1. "IDHIT,Identifier Acceptance Filter Hit Indicator"
|
|
group.long 0x50++0x3
|
|
line.long 0x0 "CBT,CAN Bit Timing Register"
|
|
bitfld.long 0x0 31. "BTF,Bit Timing Format Enable" "0: Extended bit time definitions disabled.,1: Extended bit time definitions enabled."
|
|
hexmask.long.word 0x0 21.--30. 1. "EPRESDIV,Extended Prescaler Division Factor"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--20. 1. "ERJW,Extended Resync Jump Width"
|
|
hexmask.long.byte 0x0 10.--15. 1. "EPROPSEG,Extended Propagation Segment"
|
|
newline
|
|
hexmask.long.byte 0x0 5.--9. 1. "EPSEG1,Extended Phase Segment 1"
|
|
hexmask.long.byte 0x0 0.--4. 1. "EPSEG2,Extended Phase Segment 2"
|
|
repeat 64. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x880)++0x3
|
|
line.long 0x0 "RXIMR$1,Rx Individual Mask Registers"
|
|
hexmask.long 0x0 0.--31. 1. "MI,Individual Mask Bits"
|
|
repeat.end
|
|
group.long 0xAE0++0xF
|
|
line.long 0x0 "MECR,Memory Error Control Register"
|
|
bitfld.long 0x0 31. "ECRWRDIS,Error Configuration Register Write Disable" "0: Write is enabled.,1: Write is disabled."
|
|
bitfld.long 0x0 19. "HANCEI_MSK,Host Access With Non-Correctable Errors Interrupt Mask" "0: Interrupt is disabled.,1: Interrupt is enabled."
|
|
newline
|
|
bitfld.long 0x0 18. "FANCEI_MSK,FlexCAN Access With Non-Correctable Errors Interrupt Mask" "0: Interrupt is disabled.,1: Interrupt is enabled."
|
|
bitfld.long 0x0 16. "CEI_MSK,Correctable Errors Interrupt Mask" "0: Interrupt is disabled.,1: Interrupt is enabled."
|
|
newline
|
|
bitfld.long 0x0 15. "HAERRIE,Host Access Error Injection Enable" "0: Injection is disabled.,1: Injection is enabled."
|
|
bitfld.long 0x0 14. "FAERRIE,FlexCAN Access Error Injection Enable" "0: Injection is disabled.,1: Injection is enabled."
|
|
newline
|
|
bitfld.long 0x0 13. "EXTERRIE,Extended Error Injection Enable" "0: Error injection is applied only to the 32-bit..,1: Error injection is applied to the 64-bit word."
|
|
bitfld.long 0x0 9. "RERRDIS,Error Report Disable" "0: Enable updates of the error report registers.,1: Disable updates of the error report registers."
|
|
newline
|
|
bitfld.long 0x0 8. "ECCDIS,Error Correction Disable" "0: Enable memory error correction.,1: Disable memory error correction."
|
|
bitfld.long 0x0 7. "NCEFAFRZ,Non-Correctable Errors In FlexCAN Access Put Device In Freeze Mode" "0: Keep normal operation.,1: Put FlexCAN in Freeze mode (according to the.."
|
|
line.long 0x4 "ERRIAR,Error Injection Address Register"
|
|
hexmask.long.word 0x4 2.--13. 1. "INJADDR_H,Error Injection Address High"
|
|
rbitfld.long 0x4 0.--1. "INJADDR_L,Error Injection Address Low" "0,1,2,3"
|
|
line.long 0x8 "ERRIDPR,Error Injection Data Pattern Register"
|
|
hexmask.long 0x8 0.--31. 1. "DFLIP,Data flip pattern"
|
|
line.long 0xC "ERRIPPR,Error Injection Parity Pattern Register"
|
|
hexmask.long.byte 0xC 24.--28. 1. "PFLIP3,Parity Flip Pattern For Byte 3 (most significant)"
|
|
hexmask.long.byte 0xC 16.--20. 1. "PFLIP2,Parity Flip Pattern For Byte 2"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--12. 1. "PFLIP1,Parity Flip Pattern For Byte 1"
|
|
hexmask.long.byte 0xC 0.--4. 1. "PFLIP0,Parity Flip Pattern For Byte 0 (Least Significant)"
|
|
rgroup.long 0xAF0++0xB
|
|
line.long 0x0 "RERRAR,Error Report Address Register"
|
|
bitfld.long 0x0 24. "NCE,Non-Correctable Error" "0: Reporting a correctable-error,1: Reporting a non-correctable error"
|
|
bitfld.long 0x0 16.--18. "SAID,SAID[2] - Identification of the requestor of the memory read request: 0 = Requested by FlexCAN internal processes 1 = Requested by Host (CPU) SAID[1] - Details of FlexCAN operation: 0 = Move 1 = Scanning SAID[0] - Operation that requested the memory.." "0: Transmission,1: Reception Source of memory access SAID[2:0]..,?,?,?,?,?,?"
|
|
newline
|
|
hexmask.long.word 0x0 0.--13. 1. "ERRADDR,Address Where The Error Was Detected"
|
|
line.long 0x4 "RERRDR,Error Report Data Register"
|
|
hexmask.long 0x4 0.--31. 1. "RDATA,Raw data word read from memory with error"
|
|
line.long 0x8 "RERRSYNR,Error Report Syndrome Register"
|
|
bitfld.long 0x8 31. "BE3,Byte Enabled For Byte 3 (Most Significant)" "0: The byte was not read.,1: The byte was read."
|
|
hexmask.long.byte 0x8 24.--28. 1. "SYND3,Error Syndrome For Byte 3 (Most Significant)"
|
|
newline
|
|
bitfld.long 0x8 23. "BE2,Byte Enabled For Byte 2" "0: The byte was not read.,1: The byte was read."
|
|
hexmask.long.byte 0x8 16.--20. 1. "SYND2,Error Syndrome For Byte 2"
|
|
newline
|
|
bitfld.long 0x8 15. "BE1,Byte Enabled For Byte 1" "0: The byte was not read.,1: The byte was read."
|
|
hexmask.long.byte 0x8 8.--12. 1. "SYND1,Error Syndrome for Byte 1"
|
|
newline
|
|
bitfld.long 0x8 7. "BE0,Byte Enabled For Byte 0 (least significant)" "0: The byte was not read.,1: The byte was read."
|
|
hexmask.long.byte 0x8 0.--4. 1. "SYND0,Error Syndrome For Byte 0 (least significant)"
|
|
group.long 0xAFC++0x3
|
|
line.long 0x0 "ERRSR,Error Status Register"
|
|
bitfld.long 0x0 19. "HANCEIF,Host Access With Non-Correctable Error Interrupt Flag" "0: No non-correctable errors were detected in Host..,1: A non-correctable error was detected in a Host.."
|
|
bitfld.long 0x0 18. "FANCEIF,FlexCAN Access With Non-Correctable Error Interrupt Flag" "0: No non-correctable errors were detected in..,1: A non-correctable error was detected in a.."
|
|
newline
|
|
bitfld.long 0x0 16. "CEIF,Correctable Error Interrupt Flag" "0: No correctable errors were detected so far.,1: A correctable error was detected."
|
|
bitfld.long 0x0 3. "HANCEIOF,Host Access With Non-Correctable Error Interrupt Overrun Flag" "0: No overrun on non-correctable errors in Host..,1: Overrun on non-correctable errors in Host access"
|
|
newline
|
|
bitfld.long 0x0 2. "FANCEIOF,FlexCAN Access With Non-Correctable Error Interrupt Overrun Flag" "0: No overrun on non-correctable errors in FlexCAN..,1: Overrun on non-correctable errors in FlexCAN.."
|
|
bitfld.long 0x0 0. "CEIOF,Correctable Error Interrupt Overrun Flag" "0: No overrun on correctable errors,1: Overrun on correctable errors"
|
|
group.long 0xC00++0x7
|
|
line.long 0x0 "FDCTRL,CAN FD Control Register"
|
|
bitfld.long 0x0 31. "FDRATE,Bit Rate Switch Enable" "0: Transmit a frame in nominal rate. The BRS bit in..,1: Transmit a frame with bit rate switching if the.."
|
|
bitfld.long 0x0 19.--20. "MBDSR1,Message Buffer Data Size for Region 1" "0: Selects 8 bytes per Message Buffer.,1: Selects 16 bytes per Message Buffer.,2: Selects 32 bytes per Message Buffer.,3: Selects 64 bytes per Message Buffer."
|
|
newline
|
|
bitfld.long 0x0 16.--17. "MBDSR0,Message Buffer Data Size for Region 0" "0: Selects 8 bytes per Message Buffer.,1: Selects 16 bytes per Message Buffer.,2: Selects 32 bytes per Message Buffer.,3: Selects 64 bytes per Message Buffer."
|
|
bitfld.long 0x0 15. "TDCEN,Transceiver Delay Compensation Enable" "0: TDC is disabled,1: TDC is enabled"
|
|
newline
|
|
bitfld.long 0x0 14. "TDCFAIL,Transceiver Delay Compensation Fail" "0: Measured loop delay is in range.,1: Measured loop delay is out of range."
|
|
hexmask.long.byte 0x0 8.--12. 1. "TDCOFF,Transceiver Delay Compensation Offset"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--5. 1. "TDCVAL,Transceiver Delay Compensation Value"
|
|
line.long 0x4 "FDCBT,CAN FD Bit Timing Register"
|
|
hexmask.long.word 0x4 20.--29. 1. "FPRESDIV,Fast Prescaler Division Factor"
|
|
bitfld.long 0x4 16.--18. "FRJW,Fast Resync Jump Width" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x4 10.--14. 1. "FPROPSEG,Fast Propagation Segment"
|
|
bitfld.long 0x4 5.--7. "FPSEG1,Fast Phase Segment 1" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 0.--2. "FPSEG2,Fast Phase Segment 2" "0,1,2,3,4,5,6,7"
|
|
rgroup.long 0xC08++0x3
|
|
line.long 0x0 "FDCRC,CAN FD CRC Register"
|
|
hexmask.long.byte 0x0 24.--30. 1. "FD_MBCRC,CRC Mailbox Number for FD_TXCRC"
|
|
hexmask.long.tbyte 0x0 0.--20. 1. "FD_TXCRC,Extended Transmitted CRC value"
|
|
tree.end
|
|
tree "CAN_1"
|
|
base ad:0x400BE000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "MCR,Module Configuration Register"
|
|
bitfld.long 0x0 31. "MDIS,Module Disable" "0: Enable the FlexCAN module.,1: Disable the FlexCAN module."
|
|
bitfld.long 0x0 30. "FRZ,Freeze Enable" "0: Not enabled to enter Freeze mode.,1: Enabled to enter Freeze mode."
|
|
newline
|
|
bitfld.long 0x0 29. "RFEN,Rx FIFO Enable" "0: Rx FIFO not enabled.,1: Rx FIFO enabled."
|
|
bitfld.long 0x0 28. "HALT,Halt FlexCAN" "0: No Freeze mode request.,1: Enters Freeze mode if the FRZ bit is asserted."
|
|
newline
|
|
rbitfld.long 0x0 27. "NOTRDY,FlexCAN Not Ready" "0: FlexCAN module is either in Normal mode..,1: FlexCAN module is either in Disable mode Stop.."
|
|
bitfld.long 0x0 25. "SOFTRST,Soft Reset" "0: No reset request.,1: Resets the registers affected by soft reset."
|
|
newline
|
|
rbitfld.long 0x0 24. "FRZACK,Freeze Mode Acknowledge" "0: FlexCAN not in Freeze mode prescaler running.,1: FlexCAN in Freeze mode prescaler stopped."
|
|
bitfld.long 0x0 21. "WRNEN,Warning Interrupt Enable" "0: TWRNINT and RWRNINT bits are zero independent of..,1: TWRNINT and RWRNINT bits are set when the.."
|
|
newline
|
|
rbitfld.long 0x0 20. "LPMACK,Low-Power Mode Acknowledge" "0: FlexCAN is not in a low-power mode.,1: FlexCAN is in a low-power mode."
|
|
bitfld.long 0x0 17. "SRXDIS,Self Reception Disable" "0: Self reception enabled.,1: Self reception disabled."
|
|
newline
|
|
bitfld.long 0x0 16. "IRMQ,Individual Rx Masking And Queue Enable" "0: Individual Rx masking and queue feature are..,1: Individual Rx masking and queue feature are.."
|
|
bitfld.long 0x0 15. "DMA,DMA Enable" "0: DMA feature for RX FIFO disabled.,1: DMA feature for RX FIFO enabled."
|
|
newline
|
|
bitfld.long 0x0 13. "LPRIOEN,Local Priority Enable" "0: Local Priority disabled.,1: Local Priority enabled."
|
|
bitfld.long 0x0 12. "AEN,Abort Enable" "0: Abort disabled.,1: Abort enabled."
|
|
newline
|
|
bitfld.long 0x0 11. "FDEN,CAN FD operation enable" "0: CAN FD is disabled. FlexCAN is able to receive..,1: CAN FD is enabled. FlexCAN is able to receive.."
|
|
bitfld.long 0x0 8.--9. "IDAM,ID Acceptance Mode" "0: Format A: One full ID (standard and extended)..,1: Format B: Two full standard IDs or two partial..,2: Format C: Four partial 8-bit Standard IDs per ID..,3: Format D: All frames rejected."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "MAXMB,Number Of The Last Message Buffer"
|
|
line.long 0x4 "CTRL1,Control 1 register"
|
|
hexmask.long.byte 0x4 24.--31. 1. "PRESDIV,Prescaler Division Factor"
|
|
bitfld.long 0x4 22.--23. "RJW,Resync Jump Width" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 19.--21. "PSEG1,Phase Segment 1" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 16.--18. "PSEG2,Phase Segment 2" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 15. "BOFFMSK,Bus Off Interrupt Mask" "0: Bus Off interrupt disabled.,1: Bus Off interrupt enabled."
|
|
bitfld.long 0x4 14. "ERRMSK,Error Interrupt Mask" "0: Error interrupt disabled.,1: Error interrupt enabled."
|
|
newline
|
|
bitfld.long 0x4 12. "LPB,Loop Back Mode" "0: Loop Back disabled.,1: Loop Back enabled."
|
|
bitfld.long 0x4 11. "TWRNMSK,Tx Warning Interrupt Mask" "0: Tx Warning Interrupt disabled.,1: Tx Warning Interrupt enabled."
|
|
newline
|
|
bitfld.long 0x4 10. "RWRNMSK,Rx Warning Interrupt Mask" "0: Rx Warning Interrupt disabled.,1: Rx Warning Interrupt enabled."
|
|
bitfld.long 0x4 7. "SMP,CAN Bit Sampling" "0: Just one sample is used to determine the bit..,1: Three samples are used to determine the value of.."
|
|
newline
|
|
bitfld.long 0x4 6. "BOFFREC,Bus Off Recovery" "0: Automatic recovering from Bus Off state enabled.,1: Automatic recovering from Bus Off state disabled."
|
|
bitfld.long 0x4 5. "TSYN,Timer Sync" "0: Timer Sync feature disabled,1: Timer Sync feature enabled"
|
|
newline
|
|
bitfld.long 0x4 4. "LBUF,Lowest Buffer Transmitted First" "0: Buffer with highest priority is transmitted first.,1: Lowest number buffer is transmitted first."
|
|
bitfld.long 0x4 3. "LOM,Listen-Only Mode" "0: Listen-Only mode is deactivated.,1: FlexCAN module operates in Listen-Only mode."
|
|
newline
|
|
bitfld.long 0x4 0.--2. "PROPSEG,Propagation Segment" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "TIMER,Free Running Timer"
|
|
hexmask.long.word 0x8 0.--15. 1. "TIMER,Timer Value"
|
|
group.long 0x10++0x27
|
|
line.long 0x0 "RXMGMASK,Rx Mailboxes Global Mask Register"
|
|
hexmask.long 0x0 0.--31. 1. "MG,Rx Mailboxes Global Mask Bits"
|
|
line.long 0x4 "RX14MASK,Rx 14 Mask register"
|
|
hexmask.long 0x4 0.--31. 1. "RX14M,Rx Buffer 14 Mask Bits"
|
|
line.long 0x8 "RX15MASK,Rx 15 Mask register"
|
|
hexmask.long 0x8 0.--31. 1. "RX15M,Rx Buffer 15 Mask Bits"
|
|
line.long 0xC "ECR,Error Counter"
|
|
hexmask.long.byte 0xC 24.--31. 1. "RXERRCNT_FAST,Receive Error Counter for fast bits"
|
|
hexmask.long.byte 0xC 16.--23. 1. "TXERRCNT_FAST,Transmit Error Counter for fast bits"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--15. 1. "RXERRCNT,Receive Error Counter"
|
|
hexmask.long.byte 0xC 0.--7. 1. "TXERRCNT,Transmit Error Counter"
|
|
line.long 0x10 "ESR1,Error and Status 1 register"
|
|
rbitfld.long 0x10 31. "BIT1ERR_FAST,Bit1 Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: At least one bit sent as recessive is received.."
|
|
rbitfld.long 0x10 30. "BIT0ERR_FAST,Bit0 Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: At least one bit sent as dominant is received as.."
|
|
newline
|
|
rbitfld.long 0x10 28. "CRCERR_FAST,Cyclic Redundancy Check Error in the CRC field of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: A CRC error occurred since last read of this.."
|
|
rbitfld.long 0x10 27. "FRMERR_FAST,Form Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: A Form Error occurred since last read of this.."
|
|
newline
|
|
rbitfld.long 0x10 26. "STFERR_FAST,Stuffing Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: A Stuffing Error occurred since last read of.."
|
|
bitfld.long 0x10 21. "ERROVR,Error Overrun bit" "0: Overrun has not occurred.,1: Overrun has occurred."
|
|
newline
|
|
bitfld.long 0x10 20. "ERRINT_FAST,Error Interrupt for errors detected in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: Indicates setting of any Error Bit detected in.."
|
|
bitfld.long 0x10 19. "BOFFDONEINT,Bus Off Done Interrupt" "0: No such occurrence.,1: FlexCAN module has completed Bus Off process."
|
|
newline
|
|
rbitfld.long 0x10 18. "SYNCH,CAN Synchronization Status" "0: FlexCAN is not synchronized to the CAN bus.,1: FlexCAN is synchronized to the CAN bus."
|
|
bitfld.long 0x10 17. "TWRNINT,Tx Warning Interrupt Flag" "0: No such occurrence.,1: The Tx error counter transitioned from less than.."
|
|
newline
|
|
bitfld.long 0x10 16. "RWRNINT,Rx Warning Interrupt Flag" "0: No such occurrence.,1: The Rx error counter transitioned from less than.."
|
|
rbitfld.long 0x10 15. "BIT1ERR,Bit1 Error" "0: No such occurrence.,1: At least one bit sent as recessive is received.."
|
|
newline
|
|
rbitfld.long 0x10 14. "BIT0ERR,Bit0 Error" "0: No such occurrence.,1: At least one bit sent as dominant is received as.."
|
|
rbitfld.long 0x10 13. "ACKERR,Acknowledge Error" "0: No such occurrence.,1: An ACK error occurred since last read of this.."
|
|
newline
|
|
rbitfld.long 0x10 12. "CRCERR,Cyclic Redundancy Check Error" "0: No such occurrence.,1: A CRC error occurred since last read of this.."
|
|
rbitfld.long 0x10 11. "FRMERR,Form Error" "0: No such occurrence.,1: A Form Error occurred since last read of this.."
|
|
newline
|
|
rbitfld.long 0x10 10. "STFERR,Stuffing Error" "0: No such occurrence.,1: A Stuffing Error occurred since last read of.."
|
|
rbitfld.long 0x10 9. "TXWRN,TX Error Warning" "0: No such occurrence.,1: TXERRCNT is greater than or equal to 96."
|
|
newline
|
|
rbitfld.long 0x10 8. "RXWRN,Rx Error Warning" "0: No such occurrence.,1: RXERRCNT is greater than or equal to 96."
|
|
rbitfld.long 0x10 7. "IDLE,This bit indicates when CAN bus is in IDLE state" "0: No such occurrence.,1: CAN bus is now IDLE."
|
|
newline
|
|
rbitfld.long 0x10 6. "TX,FlexCAN In Transmission" "0: FlexCAN is not transmitting a message.,1: FlexCAN is transmitting a message."
|
|
rbitfld.long 0x10 4.--5. "FLTCONF,Fault Confinement State" "0: Bus Off,1: Error Passive,2: Bus Off,3: Bus Off"
|
|
newline
|
|
rbitfld.long 0x10 3. "RX,FlexCAN In Reception" "0: FlexCAN is not receiving a message.,1: FlexCAN is receiving a message."
|
|
bitfld.long 0x10 2. "BOFFINT,Bus Off Interrupt" "0: No such occurrence.,1: FlexCAN module entered Bus Off state."
|
|
newline
|
|
bitfld.long 0x10 1. "ERRINT,Error Interrupt" "0: No such occurrence.,1: Indicates setting of any Error Bit in the Error.."
|
|
line.long 0x14 "IMASK2,Interrupt Masks 2 register"
|
|
hexmask.long 0x14 0.--31. 1. "BUF63TO32M,Buffer MB i Mask"
|
|
line.long 0x18 "IMASK1,Interrupt Masks 1 register"
|
|
hexmask.long 0x18 0.--31. 1. "BUF31TO0M,Buffer MB i Mask"
|
|
line.long 0x1C "IFLAG2,Interrupt Flags 2 register"
|
|
hexmask.long 0x1C 0.--31. 1. "BUF63TO32I,Buffer MB i Interrupt"
|
|
line.long 0x20 "IFLAG1,Interrupt Flags 1 register"
|
|
hexmask.long.tbyte 0x20 8.--31. 1. "BUF31TO8I,Buffer MBi Interrupt"
|
|
bitfld.long 0x20 7. "BUF7I,Buffer MB7 Interrupt Or 'Rx FIFO Overflow'" "0: No occurrence of MB7 completing..,1: MB7 completed transmission/reception when.."
|
|
newline
|
|
bitfld.long 0x20 6. "BUF6I,Buffer MB6 Interrupt Or 'Rx FIFO Warning'" "0: No occurrence of MB6 completing..,1: MB6 completed transmission/reception when.."
|
|
bitfld.long 0x20 5. "BUF5I,Buffer MB5 Interrupt Or 'Frames available in Rx FIFO'" "0: No occurrence of MB5 completing..,1: MB5 completed transmission/reception when.."
|
|
newline
|
|
hexmask.long.byte 0x20 1.--4. 1. "BUF4TO1I,Buffer MB i Interrupt Or 'reserved'"
|
|
bitfld.long 0x20 0. "BUF0I,Buffer MB0 Interrupt Or Clear FIFO bit" "0: The corresponding buffer has no occurrence of..,1: The corresponding buffer has successfully.."
|
|
line.long 0x24 "CTRL2,Control 2 register"
|
|
bitfld.long 0x24 31. "ERRMSK_FAST,Error Interrupt Mask for errors detected in the Data Phase of fast CAN FD frames" "0: ERRINT_FAST Error interrupt disabled.,1: ERRINT_FAST Error interrupt enabled."
|
|
bitfld.long 0x24 30. "BOFFDONEMSK,Bus Off Done Interrupt Mask" "0: Bus Off Done interrupt disabled.,1: Bus Off Done interrupt enabled."
|
|
newline
|
|
bitfld.long 0x24 29. "ECRWRE,Error-correction Configuration Register Write Enable" "0: Disable update.,1: Enable update."
|
|
bitfld.long 0x24 28. "WRMFRZ,Write-Access To Memory In Freeze Mode" "0: Maintain the write access restrictions.,1: Enable unrestricted write access to FlexCAN.."
|
|
newline
|
|
hexmask.long.byte 0x24 24.--27. 1. "RFFN,Number Of Rx FIFO Filters"
|
|
hexmask.long.byte 0x24 19.--23. 1. "TASD,Tx Arbitration Start Delay"
|
|
newline
|
|
bitfld.long 0x24 18. "MRP,Mailboxes Reception Priority" "0: Matching starts from Rx FIFO and continues on..,1: Matching starts from Mailboxes and continues on.."
|
|
bitfld.long 0x24 17. "RRS,Remote Request Storing" "0: Remote Response Frame is generated.,1: Remote Request Frame is stored."
|
|
newline
|
|
bitfld.long 0x24 16. "EACEN,Entire Frame Arbitration Field Comparison Enable For Rx Mailboxes" "0: Rx Mailbox filter's IDE bit is always compared..,1: Enables the comparison of both Rx Mailbox.."
|
|
bitfld.long 0x24 15. "TIMER_SRC,Timer Source" "0: The Free Running Timer is clocked by the CAN bit..,1: The Free Running Timer is clocked by an external.."
|
|
newline
|
|
bitfld.long 0x24 14. "PREXCEN,Protocol Exception Enable" "0: Protocol Exception is disabled.,1: Protocol Exception is enabled."
|
|
bitfld.long 0x24 12. "ISOCANFDEN,ISO CAN FD Enable" "0: FlexCAN operates using the non-ISO CAN FD..,1: FlexCAN operates using the ISO CAN FD protocol.."
|
|
newline
|
|
bitfld.long 0x24 11. "EDFLTDIS,Edge Filter Disable" "0: Edge Filter is enabled.,1: Edge Filter is disabled."
|
|
rgroup.long 0x38++0x3
|
|
line.long 0x0 "ESR2,Error and Status 2 register"
|
|
hexmask.long.byte 0x0 16.--22. 1. "LPTM,Lowest Priority Tx Mailbox"
|
|
bitfld.long 0x0 14. "VPS,Valid Priority Status" "0: Contents of IMB and LPTM are invalid.,1: Contents of IMB and LPTM are valid."
|
|
newline
|
|
bitfld.long 0x0 13. "IMB,Inactive Mailbox" "0: If ESR2[VPS] is asserted the ESR2[LPTM] is not..,1: If ESR2[VPS] is asserted there is at least one.."
|
|
rgroup.long 0x44++0x3
|
|
line.long 0x0 "CRCR,CRC Register"
|
|
hexmask.long.byte 0x0 16.--22. 1. "MBCRC,CRC Mailbox"
|
|
hexmask.long.word 0x0 0.--14. 1. "TXCRC,Transmitted CRC value"
|
|
group.long 0x48++0x3
|
|
line.long 0x0 "RXFGMASK,Rx FIFO Global Mask register"
|
|
hexmask.long 0x0 0.--31. 1. "FGM,Rx FIFO Global Mask Bits"
|
|
rgroup.long 0x4C++0x3
|
|
line.long 0x0 "RXFIR,Rx FIFO Information Register"
|
|
hexmask.long.word 0x0 0.--8. 1. "IDHIT,Identifier Acceptance Filter Hit Indicator"
|
|
group.long 0x50++0x3
|
|
line.long 0x0 "CBT,CAN Bit Timing Register"
|
|
bitfld.long 0x0 31. "BTF,Bit Timing Format Enable" "0: Extended bit time definitions disabled.,1: Extended bit time definitions enabled."
|
|
hexmask.long.word 0x0 21.--30. 1. "EPRESDIV,Extended Prescaler Division Factor"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--20. 1. "ERJW,Extended Resync Jump Width"
|
|
hexmask.long.byte 0x0 10.--15. 1. "EPROPSEG,Extended Propagation Segment"
|
|
newline
|
|
hexmask.long.byte 0x0 5.--9. 1. "EPSEG1,Extended Phase Segment 1"
|
|
hexmask.long.byte 0x0 0.--4. 1. "EPSEG2,Extended Phase Segment 2"
|
|
repeat 64. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x880)++0x3
|
|
line.long 0x0 "RXIMR$1,Rx Individual Mask Registers"
|
|
hexmask.long 0x0 0.--31. 1. "MI,Individual Mask Bits"
|
|
repeat.end
|
|
group.long 0xAE0++0xF
|
|
line.long 0x0 "MECR,Memory Error Control Register"
|
|
bitfld.long 0x0 31. "ECRWRDIS,Error Configuration Register Write Disable" "0: Write is enabled.,1: Write is disabled."
|
|
bitfld.long 0x0 19. "HANCEI_MSK,Host Access With Non-Correctable Errors Interrupt Mask" "0: Interrupt is disabled.,1: Interrupt is enabled."
|
|
newline
|
|
bitfld.long 0x0 18. "FANCEI_MSK,FlexCAN Access With Non-Correctable Errors Interrupt Mask" "0: Interrupt is disabled.,1: Interrupt is enabled."
|
|
bitfld.long 0x0 16. "CEI_MSK,Correctable Errors Interrupt Mask" "0: Interrupt is disabled.,1: Interrupt is enabled."
|
|
newline
|
|
bitfld.long 0x0 15. "HAERRIE,Host Access Error Injection Enable" "0: Injection is disabled.,1: Injection is enabled."
|
|
bitfld.long 0x0 14. "FAERRIE,FlexCAN Access Error Injection Enable" "0: Injection is disabled.,1: Injection is enabled."
|
|
newline
|
|
bitfld.long 0x0 13. "EXTERRIE,Extended Error Injection Enable" "0: Error injection is applied only to the 32-bit..,1: Error injection is applied to the 64-bit word."
|
|
bitfld.long 0x0 9. "RERRDIS,Error Report Disable" "0: Enable updates of the error report registers.,1: Disable updates of the error report registers."
|
|
newline
|
|
bitfld.long 0x0 8. "ECCDIS,Error Correction Disable" "0: Enable memory error correction.,1: Disable memory error correction."
|
|
bitfld.long 0x0 7. "NCEFAFRZ,Non-Correctable Errors In FlexCAN Access Put Device In Freeze Mode" "0: Keep normal operation.,1: Put FlexCAN in Freeze mode (according to the.."
|
|
line.long 0x4 "ERRIAR,Error Injection Address Register"
|
|
hexmask.long.word 0x4 2.--13. 1. "INJADDR_H,Error Injection Address High"
|
|
rbitfld.long 0x4 0.--1. "INJADDR_L,Error Injection Address Low" "0,1,2,3"
|
|
line.long 0x8 "ERRIDPR,Error Injection Data Pattern Register"
|
|
hexmask.long 0x8 0.--31. 1. "DFLIP,Data flip pattern"
|
|
line.long 0xC "ERRIPPR,Error Injection Parity Pattern Register"
|
|
hexmask.long.byte 0xC 24.--28. 1. "PFLIP3,Parity Flip Pattern For Byte 3 (most significant)"
|
|
hexmask.long.byte 0xC 16.--20. 1. "PFLIP2,Parity Flip Pattern For Byte 2"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--12. 1. "PFLIP1,Parity Flip Pattern For Byte 1"
|
|
hexmask.long.byte 0xC 0.--4. 1. "PFLIP0,Parity Flip Pattern For Byte 0 (Least Significant)"
|
|
rgroup.long 0xAF0++0xB
|
|
line.long 0x0 "RERRAR,Error Report Address Register"
|
|
bitfld.long 0x0 24. "NCE,Non-Correctable Error" "0: Reporting a correctable-error,1: Reporting a non-correctable error"
|
|
bitfld.long 0x0 16.--18. "SAID,SAID[2] - Identification of the requestor of the memory read request: 0 = Requested by FlexCAN internal processes 1 = Requested by Host (CPU) SAID[1] - Details of FlexCAN operation: 0 = Move 1 = Scanning SAID[0] - Operation that requested the memory.." "0: Transmission,1: Reception Source of memory access SAID[2:0]..,?,?,?,?,?,?"
|
|
newline
|
|
hexmask.long.word 0x0 0.--13. 1. "ERRADDR,Address Where The Error Was Detected"
|
|
line.long 0x4 "RERRDR,Error Report Data Register"
|
|
hexmask.long 0x4 0.--31. 1. "RDATA,Raw data word read from memory with error"
|
|
line.long 0x8 "RERRSYNR,Error Report Syndrome Register"
|
|
bitfld.long 0x8 31. "BE3,Byte Enabled For Byte 3 (Most Significant)" "0: The byte was not read.,1: The byte was read."
|
|
hexmask.long.byte 0x8 24.--28. 1. "SYND3,Error Syndrome For Byte 3 (Most Significant)"
|
|
newline
|
|
bitfld.long 0x8 23. "BE2,Byte Enabled For Byte 2" "0: The byte was not read.,1: The byte was read."
|
|
hexmask.long.byte 0x8 16.--20. 1. "SYND2,Error Syndrome For Byte 2"
|
|
newline
|
|
bitfld.long 0x8 15. "BE1,Byte Enabled For Byte 1" "0: The byte was not read.,1: The byte was read."
|
|
hexmask.long.byte 0x8 8.--12. 1. "SYND1,Error Syndrome for Byte 1"
|
|
newline
|
|
bitfld.long 0x8 7. "BE0,Byte Enabled For Byte 0 (least significant)" "0: The byte was not read.,1: The byte was read."
|
|
hexmask.long.byte 0x8 0.--4. 1. "SYND0,Error Syndrome For Byte 0 (least significant)"
|
|
group.long 0xAFC++0x3
|
|
line.long 0x0 "ERRSR,Error Status Register"
|
|
bitfld.long 0x0 19. "HANCEIF,Host Access With Non-Correctable Error Interrupt Flag" "0: No non-correctable errors were detected in Host..,1: A non-correctable error was detected in a Host.."
|
|
bitfld.long 0x0 18. "FANCEIF,FlexCAN Access With Non-Correctable Error Interrupt Flag" "0: No non-correctable errors were detected in..,1: A non-correctable error was detected in a.."
|
|
newline
|
|
bitfld.long 0x0 16. "CEIF,Correctable Error Interrupt Flag" "0: No correctable errors were detected so far.,1: A correctable error was detected."
|
|
bitfld.long 0x0 3. "HANCEIOF,Host Access With Non-Correctable Error Interrupt Overrun Flag" "0: No overrun on non-correctable errors in Host..,1: Overrun on non-correctable errors in Host access"
|
|
newline
|
|
bitfld.long 0x0 2. "FANCEIOF,FlexCAN Access With Non-Correctable Error Interrupt Overrun Flag" "0: No overrun on non-correctable errors in FlexCAN..,1: Overrun on non-correctable errors in FlexCAN.."
|
|
bitfld.long 0x0 0. "CEIOF,Correctable Error Interrupt Overrun Flag" "0: No overrun on correctable errors,1: Overrun on correctable errors"
|
|
group.long 0xC00++0x7
|
|
line.long 0x0 "FDCTRL,CAN FD Control Register"
|
|
bitfld.long 0x0 31. "FDRATE,Bit Rate Switch Enable" "0: Transmit a frame in nominal rate. The BRS bit in..,1: Transmit a frame with bit rate switching if the.."
|
|
bitfld.long 0x0 19.--20. "MBDSR1,Message Buffer Data Size for Region 1" "0: Selects 8 bytes per Message Buffer.,1: Selects 16 bytes per Message Buffer.,2: Selects 32 bytes per Message Buffer.,3: Selects 64 bytes per Message Buffer."
|
|
newline
|
|
bitfld.long 0x0 16.--17. "MBDSR0,Message Buffer Data Size for Region 0" "0: Selects 8 bytes per Message Buffer.,1: Selects 16 bytes per Message Buffer.,2: Selects 32 bytes per Message Buffer.,3: Selects 64 bytes per Message Buffer."
|
|
bitfld.long 0x0 15. "TDCEN,Transceiver Delay Compensation Enable" "0: TDC is disabled,1: TDC is enabled"
|
|
newline
|
|
bitfld.long 0x0 14. "TDCFAIL,Transceiver Delay Compensation Fail" "0: Measured loop delay is in range.,1: Measured loop delay is out of range."
|
|
hexmask.long.byte 0x0 8.--12. 1. "TDCOFF,Transceiver Delay Compensation Offset"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--5. 1. "TDCVAL,Transceiver Delay Compensation Value"
|
|
line.long 0x4 "FDCBT,CAN FD Bit Timing Register"
|
|
hexmask.long.word 0x4 20.--29. 1. "FPRESDIV,Fast Prescaler Division Factor"
|
|
bitfld.long 0x4 16.--18. "FRJW,Fast Resync Jump Width" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x4 10.--14. 1. "FPROPSEG,Fast Propagation Segment"
|
|
bitfld.long 0x4 5.--7. "FPSEG1,Fast Phase Segment 1" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 0.--2. "FPSEG2,Fast Phase Segment 2" "0,1,2,3,4,5,6,7"
|
|
rgroup.long 0xC08++0x3
|
|
line.long 0x0 "FDCRC,CAN FD CRC Register"
|
|
hexmask.long.byte 0x0 24.--30. 1. "FD_MBCRC,CRC Mailbox Number for FD_TXCRC"
|
|
hexmask.long.tbyte 0x0 0.--20. 1. "FD_TXCRC,Extended Transmitted CRC value"
|
|
tree.end
|
|
tree.end
|
|
tree "FlexRay (FlexRay Communication Controller)"
|
|
base ad:0x40034000
|
|
rgroup.word 0x0++0x1
|
|
line.word 0x0 "MVR,Module Version Register"
|
|
hexmask.word.byte 0x0 8.--15. 1. "CHIVER,CHI Version Number. This field provides the version number of the controller host interface."
|
|
newline
|
|
hexmask.word.byte 0x0 0.--7. 1. "PEVER,PE Version Number. This field provides the version number of the protocol engine."
|
|
group.word 0x2++0x7
|
|
line.word 0x0 "MCR,Module Configuration Register"
|
|
bitfld.word 0x0 15. "MEN,Module Enable" "0: Write: only during POC:default config CC disable..,1: Write: enable CC Read: CC enabled"
|
|
newline
|
|
bitfld.word 0x0 14. "SBFF,System Bus Failure Freeze" "0: Continue normal operation,1: Transition to freeze mode"
|
|
newline
|
|
bitfld.word 0x0 13. "SCM,Single Channel Device Mode" "0: CC works in dual channel device mode,1: CC works in single channel device mode"
|
|
newline
|
|
bitfld.word 0x0 12. "CHB,Channel B Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 11. "CHA,Channel A Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 10. "SFFE,Synchronization Frame Filter Enable" "0: Synchronization frame filtering disabled,1: Synchronization frame filtering enabled"
|
|
newline
|
|
bitfld.word 0x0 9. "ECCE,ECC Functionality Enable" "0: ECC functionality (injection detection reporting..,1: ECC functionality enabled"
|
|
newline
|
|
bitfld.word 0x0 7. "FUM,FIFO Update Mode" "0: FIFOA/FIFOB is updated on writing 1 to..,1: FIFOA/FIFOB) is not updated on writing 1 to.."
|
|
newline
|
|
bitfld.word 0x0 6. "FAM,FIFO Address Mode" "0: FIFO Base Address located in SYMBADHRSystem..,1: FIFO Base Address located in RFSYMBADHRReceive.."
|
|
newline
|
|
bitfld.word 0x0 4. "CLKSEL,Protocol Engine Clock Source Select" "0: PE clock source is generated by on-chip crystal..,1: PE clock source is generated by on-chip PLL."
|
|
newline
|
|
bitfld.word 0x0 1.--3. "BITRATE,FlexRay Bus Bit Rate. This bit field defines the FlexRay Bus Bit Rate." "0: 10.0 Mbit/sec,1: 5.0 Mbit/sec,2: 2.5 Mbit/sec,3: 8.0 Mbit/sec,?,?,?,?"
|
|
line.word 0x2 "SYMBADHR,System Memory Base Address High Register"
|
|
hexmask.word 0x2 0.--15. 1. "SMBA,System Memory Base Address high. This is the value of the system memory base address for the individual message buffers and sync frame table. This is the value of the system memory base address for the receive FIFO if the FIFO address mode bit.."
|
|
line.word 0x4 "SYMBADLR,System Memory Base Address Low Register"
|
|
hexmask.word 0x4 4.--15. 1. "SMBA,System Memory Base Address low"
|
|
line.word 0x6 "STBSCR,Strobe Signal Control Register"
|
|
bitfld.word 0x6 15. "WMD,Write Mode. This control bit defines the write mode of this register." "0: Write to all fields in this register on write..,1: Write to SEL field only on write access."
|
|
newline
|
|
hexmask.word.byte 0x6 8.--11. 1. "SEL,Strobe Signal Select"
|
|
newline
|
|
bitfld.word 0x6 4. "ENB,Strobe Signal Enable" "0: Strobe signal is disabled and not assigned to..,1: Strobe signal is enabled and assigned to the.."
|
|
newline
|
|
bitfld.word 0x6 0.--1. "STBPSEL,Strobe Port Select" "0: assign selected signal to FR_DBG[0],1: assign selected signal to FR_DBG[1],2: assign selected signal to FR_DBG[2],3: assign selected signal to FR_DBG[3]"
|
|
group.word 0xC++0x17
|
|
line.word 0x0 "MBDSR,Message Buffer Data Size Register"
|
|
hexmask.word.byte 0x0 8.--14. 1. "MBSEG2DS,Message Buffer Segment 2 Data Size"
|
|
newline
|
|
hexmask.word.byte 0x0 0.--6. 1. "MBSEG1DS,Message Buffer Segment 1 Data Size"
|
|
line.word 0x2 "MBSSUTR,Message Buffer Segment Size and Utilization Register"
|
|
hexmask.word.byte 0x2 8.--14. 1. "LAST_MB_SEG1,Last Message Buffer In Segment 1"
|
|
newline
|
|
hexmask.word.byte 0x2 0.--6. 1. "LAST_MB_UTIL,Last Message Buffer Utilized"
|
|
line.word 0x4 "PEDRAR,PE DRAM Access Register"
|
|
hexmask.word.byte 0x4 12.--15. 1. "INST,PE DRAM Access Instruction"
|
|
newline
|
|
hexmask.word 0x4 1.--11. 1. "ADDR,PE DRAM Access Address"
|
|
newline
|
|
rbitfld.word 0x4 0. "DAD,PE DRAM Access Done" "0: PE DRAM access running,1: PE DRAM access done"
|
|
line.word 0x6 "PEDRDR,PE DRAM Data Register"
|
|
hexmask.word 0x6 0.--15. 1. "DATA,Data to be written to or read from the PE DRAM by the access initiated by write access to the FR_PEDRAR"
|
|
line.word 0x8 "POCR,Protocol Operation Control Register"
|
|
bitfld.word 0x8 15. "WME,Write Mode External Correction. This bit controls the write mode of the EOC_AP and ERC_AP fields." "0: Write to EOC_AP and ERC_AP fields on register..,1: No write to EOC_AP and ERC_AP fields on register.."
|
|
newline
|
|
bitfld.word 0x8 10.--11. "EOC_AP,External Offset Correction Application" "0: do not apply external offset correction value,?,2: subtract external offset correction value,3: add external offset correction value"
|
|
newline
|
|
bitfld.word 0x8 8.--9. "ERC_AP,External Rate Correction Application" "0: do not apply external rate correction value,?,2: subtract external rate correction value,3: add external rate correction value"
|
|
newline
|
|
bitfld.word 0x8 7. "BSY_WMC,The name and function of this field varies depending on whether it is being read or written" "0: (Write-Only) Write to POCCMD field on register..,1: (Write-Only) Do not write to POCCMD field on.."
|
|
newline
|
|
hexmask.word.byte 0x8 0.--3. 1. "POCCMD,Protocol Control Command"
|
|
line.word 0xA "GIFER,Global Interrupt Flag and Enable Register"
|
|
rbitfld.word 0xA 15. "MIF,Module Interrupt Flag" "0: No interrupt flag and related interrupt enable..,1: At least one of the other interrupt flags in.."
|
|
newline
|
|
rbitfld.word 0xA 14. "PRIF,Protocol Interrupt Flag" "0: No individual protocol interrupt flag and..,1: At least one of the individual protocol.."
|
|
newline
|
|
rbitfld.word 0xA 13. "CHIF,CHI Interrupt Flag" "0: All CHI error flags are equal to 0 or the chi..,1: At least one CHI error flag and the chi error.."
|
|
newline
|
|
bitfld.word 0xA 12. "WUPIF,Wakeup Interrupt Flag" "0: No Wakeup symbol received on FlexRay bus,1: Wakeup symbol received on FlexRay bus"
|
|
newline
|
|
bitfld.word 0xA 11. "FAFBIF,Receive FIFO Channel B Almost Full Interrupt Flag" "0: no such event,1: FIFO B almost full event has occurred"
|
|
newline
|
|
bitfld.word 0xA 10. "FAFAIF,Receive FIFO Channel A Almost Full Interrupt Flag" "0: no such event,1: FIFO A almost full event has occurred"
|
|
newline
|
|
rbitfld.word 0xA 9. "RBIF,Receive Message Buffer Interrupt Flag" "0: None of the individual receive message buffers..,1: At least one individual receive message buffer.."
|
|
newline
|
|
rbitfld.word 0xA 8. "TBIF,Transmit Message Buffer Interrupt Flag" "0: None of the individual transmit message buffers..,1: At least one individual transmit message buffer.."
|
|
newline
|
|
bitfld.word 0xA 7. "MIE,Module Interrupt Enable" "0: Disable interrupt line,1: Enable interrupt line"
|
|
newline
|
|
bitfld.word 0xA 6. "PRIE,Protocol Interrupt Enable" "0: Disable interrupt line,1: Enable interrupt line"
|
|
newline
|
|
bitfld.word 0xA 5. "CHIE,CHI Interrupt Enable" "0: Disable interrupt line,1: Enable interrupt line"
|
|
newline
|
|
bitfld.word 0xA 4. "WUPIE,Wakeup Interrupt Enable" "0: Disable interrupt line,1: Enable interrupt line"
|
|
newline
|
|
bitfld.word 0xA 3. "FAFBIE,Receive FIFO Channel B Almost Full Interrupt Enable" "0: Disable interrupt line,1: Enable interrupt line"
|
|
newline
|
|
bitfld.word 0xA 2. "FAFAIE,Receive FIFO Channel A Almost Full Interrupt Enable" "0: Disable interrupt line,1: Enable interrupt line"
|
|
newline
|
|
bitfld.word 0xA 1. "RBIE,Receive Message Buffer Interrupt Enable" "0: Disable interrupt line,1: Enable interrupt line"
|
|
newline
|
|
bitfld.word 0xA 0. "TBIE,Transmit Message Buffer Interrupt Enable" "0: Disable interrupt line,1: Enable interrupt line"
|
|
line.word 0xC "PIFR0,Protocol Interrupt Flag Register 0"
|
|
bitfld.word 0xC 15. "FATL_IF,Fatal Protocol Error Interrupt Flag" "0: No such event.,1: Fatal protocol error detected."
|
|
newline
|
|
bitfld.word 0xC 14. "INTL_IF,Internal Protocol Error Interrupt Flag" "0: No such event.,1: Internal protocol error detected."
|
|
newline
|
|
bitfld.word 0xC 13. "ILCF_IF,Illegal Protocol Configuration Interrupt Flag" "0: No such event.,1: Illegal protocol configuration detected."
|
|
newline
|
|
bitfld.word 0xC 12. "CSA_IF,Cold Start Abort Interrupt Flag" "0: No such event.,1: Cold start aborted and no more coldstart.."
|
|
newline
|
|
bitfld.word 0xC 11. "MRC_IF,Missing Rate Correction Interrupt Flag" "0: No such event,1: Insufficient number of measurements for rate.."
|
|
newline
|
|
bitfld.word 0xC 10. "MOC_IF,Missing Offset Correction Interrupt Flag" "0: No such event.,1: Insufficient number of measurements for offset.."
|
|
newline
|
|
bitfld.word 0xC 9. "CCL_IF,Clock Correction Limit Reached Interrupt Flag" "0: No such event.,1: Offset or rate correction limit reached."
|
|
newline
|
|
bitfld.word 0xC 8. "MXS_IF,Max Sync Frames Detected Interrupt Flag" "0: No such event.,1: More than node_sync_max sync frames detected."
|
|
newline
|
|
bitfld.word 0xC 7. "MTX_IF,Media Access Test Symbol Received Interrupt Flag" "0: No such event.,1: MTS symbol received."
|
|
newline
|
|
bitfld.word 0xC 6. "LTXB_IF,pLatestTx Violation on Channel B Interrupt Flag" "0: No such event.,1: pLatestTx violation occurred on channel B."
|
|
newline
|
|
bitfld.word 0xC 5. "LTXA_IF,pLatestTx Violation on Channel A Interrupt Flag" "0: No such event.,1: pLatestTx violation occurred on channel A."
|
|
newline
|
|
bitfld.word 0xC 4. "TBVB_IF,Transmission across boundary on channel B Interrupt Flag" "0: No such event.,1: Transmission across boundary violation occurred.."
|
|
newline
|
|
bitfld.word 0xC 3. "TBVA_IF,Transmission across boundary on channel A Interrupt Flag" "0: No such event.,1: Transmission across boundary violation occurred.."
|
|
newline
|
|
bitfld.word 0xC 2. "TI2_IF,Timer 2 Expired Interrupt Flag. This flag is set whenever timer 2 expires." "0: No such event.,1: Timer 2 has reached its time limit."
|
|
newline
|
|
bitfld.word 0xC 1. "TI1_IF,Timer 1 Expired Interrupt Flag. This flag is set whenever timer 1 expires." "0: No such event,1: Timer 1 has reached its time limit"
|
|
newline
|
|
bitfld.word 0xC 0. "CYS_IF,Cycle Start Interrupt Flag. This flag is set when a communication cycle starts." "0: No such event,1: Communication cycle started."
|
|
line.word 0xE "PIFR1,Protocol Interrupt Flag Register 1"
|
|
bitfld.word 0xE 15. "EMC_IF,Error Mode Changed Interrupt Flag" "0: No such event.,1: ERRMODE field changed."
|
|
newline
|
|
bitfld.word 0xE 14. "IPC_IF,Illegal Protocol Control Command Interrupt Flag" "0: No such event.,1: Illegal protocol control command detected."
|
|
newline
|
|
bitfld.word 0xE 13. "PECF_IF,Protocol Engine Communication Failure Interrupt Flag" "0: No such event.,1: Protocol Engine Communication Failure detected."
|
|
newline
|
|
bitfld.word 0xE 12. "PSC_IF,Protocol State Changed Interrupt Flag" "0: No such event.,1: Protocol state changed."
|
|
newline
|
|
bitfld.word 0xE 11. "SSI3_IF,Slot Status Counter Incremented Interrupt Flag" "0: No such event.,1: The corresponding slot status counter has.."
|
|
newline
|
|
bitfld.word 0xE 10. "SSI2_IF,Slot Status Counter Incremented Interrupt Flag" "0: No such event.,1: The corresponding slot status counter has.."
|
|
newline
|
|
bitfld.word 0xE 9. "SSI1_IF,Slot Status Counter Incremented Interrupt Flag" "0: No such event.,1: The corresponding slot status counter has.."
|
|
newline
|
|
bitfld.word 0xE 8. "SSI0_IF,Slot Status Counter Incremented Interrupt Flag" "0: No such event.,1: The corresponding slot status counter has.."
|
|
newline
|
|
bitfld.word 0xE 5. "EVT_IF,Even Cycle Table Written Interrupt Flag" "0: No such event.,1: Sync frame measurement table written"
|
|
newline
|
|
bitfld.word 0xE 4. "ODT_IF,Odd Cycle Table Written Interrupt Flag" "0: No such event.,1: Sync frame measurement table written"
|
|
line.word 0x10 "PIER0,Protocol Interrupt Enable Register 0"
|
|
bitfld.word 0x10 15. "FATL_IE,Fatal Protocol Error Interrupt Enable. This bit controls FATL_IF interrupt request generation." "0: interrupt request generation disabled,1: interrupt request generation enabled"
|
|
newline
|
|
bitfld.word 0x10 14. "INTL_IE,Internal Protocol Error Interrupt Enable. This bit controls INTL_IF interrupt request generation." "0: interrupt request generation disabled,1: interrupt request generation enabled"
|
|
newline
|
|
bitfld.word 0x10 13. "ILCF_IE,Illegal Protocol Configuration Interrupt Enable" "0: interrupt request generation disabled,1: interrupt request generation enabled"
|
|
newline
|
|
bitfld.word 0x10 12. "CSA_IE,Cold Start Abort Interrupt Enable. This bit controls CSA_IF interrupt request generation." "0: interrupt request generation disabled,1: interrupt request generation enabled"
|
|
newline
|
|
bitfld.word 0x10 11. "MRC_IE,Missing Rate Correction Interrupt Enable. This bit controls MRC_IF interrupt request generation." "0: interrupt request generation disabled,1: interrupt request generation enabled"
|
|
newline
|
|
bitfld.word 0x10 10. "MOC_IE,Missing Offset Correction Interrupt Enable. This bit controls MOC_IF interrupt request generation." "0: interrupt request generation disabled,1: interrupt request generation enabled"
|
|
newline
|
|
bitfld.word 0x10 9. "CCL_IE,Clock Correction Limit Reached Interrupt Enable" "0: interrupt request generation disabled,1: interrupt request generation enabled"
|
|
newline
|
|
bitfld.word 0x10 8. "MXS_IE,Max Sync Frames Detected Interrupt Enable. This bit controls MXS_IF interrupt request generation." "0: interrupt request generation disabled,1: interrupt request generation enabled"
|
|
newline
|
|
bitfld.word 0x10 7. "MTX_IE,Media Access Test Symbol Received Interrupt Enable" "0: interrupt request generation disabled,1: interrupt request generation enabled"
|
|
newline
|
|
bitfld.word 0x10 6. "LTXB_IE,pLatestTx Violation on Channel B Interrupt Enable" "0: interrupt request generation disabled,1: interrupt request generation enabled"
|
|
newline
|
|
bitfld.word 0x10 5. "LTXA_IE,pLatestTx Violation on Channel A Interrupt Enable" "0: interrupt request generation disabled,1: interrupt request generation enabled"
|
|
newline
|
|
bitfld.word 0x10 4. "TBVB_IE,Transmission across boundary on channel B Interrupt Enable" "0: interrupt request generation disabled,1: interrupt request generation enabled"
|
|
newline
|
|
bitfld.word 0x10 3. "TBVA_IE,Transmission across boundary on channel A Interrupt Enable" "0: interrupt request generation disabled,1: interrupt request generation enabled"
|
|
newline
|
|
bitfld.word 0x10 2. "TI2_IE,Timer 2 Expired Interrupt Enable. This bit controls TI1_IF interrupt request generation." "0: interrupt request generation disabled,1: interrupt request generation enabled"
|
|
newline
|
|
bitfld.word 0x10 1. "TI1_IE,Timer 1 Expired Interrupt Enable. This bit controls TI1_IF interrupt request generation." "0: interrupt request generation disabled,1: interrupt request generation enabled"
|
|
newline
|
|
bitfld.word 0x10 0. "CYS_IE,Cycle Start Interrupt Enable. This bit controls CYC_IF interrupt request generation." "0: interrupt request generation disabled,1: interrupt request generation enabled"
|
|
line.word 0x12 "PIER1,Protocol Interrupt Enable Register 1"
|
|
bitfld.word 0x12 15. "EMC_IE,Error Mode Changed Interrupt Enable. This bit controls EMC_IF interrupt request generation." "0: interrupt request generation disabled,1: interrupt request generation enabled"
|
|
newline
|
|
bitfld.word 0x12 14. "IPC_IE,Illegal Protocol Control Command Interrupt Enable" "0: interrupt request generation disabled,1: interrupt request generation enabled"
|
|
newline
|
|
bitfld.word 0x12 13. "PECF_IE,Protocol Engine Communication Failure Interrupt Enable" "0: interrupt request generation disabled,1: interrupt request generation enabled"
|
|
newline
|
|
bitfld.word 0x12 12. "PSC_IE,Protocol State Changed Interrupt Enable. This bit controls PSC_IF interrupt request generation." "0: interrupt request generation disabled,1: interrupt request generation enabled"
|
|
newline
|
|
bitfld.word 0x12 11. "SSI3_IE,Slot Status Counter Incremented Interrupt Enable" "0: interrupt request generation disabled,1: interrupt request generation enabled"
|
|
newline
|
|
bitfld.word 0x12 10. "SSI2_IE,Slot Status Counter Incremented Interrupt Enable" "0: interrupt request generation disabled,1: interrupt request generation enabled"
|
|
newline
|
|
bitfld.word 0x12 9. "SSI1_IE,Slot Status Counter Incremented Interrupt Enable" "0: interrupt request generation disabled,1: interrupt request generation enabled"
|
|
newline
|
|
bitfld.word 0x12 8. "SSI0_IE,Slot Status Counter Incremented Interrupt Enable" "0: interrupt request generation disabled,1: interrupt request generation enabled"
|
|
newline
|
|
bitfld.word 0x12 5. "EVT_IE,Even Cycle Table Written Interrupt Enable. This bit controls EVT_IF interrupt request generation." "0: interrupt request generation disabled,1: interrupt request generation enabled"
|
|
newline
|
|
bitfld.word 0x12 4. "ODT_IE,Odd Cycle Table Written Interrupt Enable. This bit controls ODT_IF interrupt request generation." "0: interrupt request generation disabled,1: interrupt request generation enabled"
|
|
line.word 0x14 "CHIERFR,CHI Error Flag Register"
|
|
bitfld.word 0x14 15. "FRLB_EF,Frame Lost Channel B Error Flag" "0: No such event,1: Frame lost on channel B detected"
|
|
newline
|
|
bitfld.word 0x14 14. "FRLA_EF,Frame Lost Channel A Error Flag" "0: No such error,1: Frame lost on channel A detected"
|
|
newline
|
|
bitfld.word 0x14 13. "PCMI_EF,Protocol Command Ignored Error Flag" "0: No such error,1: POC command ignored"
|
|
newline
|
|
bitfld.word 0x14 12. "FOVB_EF,Receive FIFO Overrun Channel B Error Flag" "0: No such error,1: FIFO overrun on channel B has been detected"
|
|
newline
|
|
bitfld.word 0x14 11. "FOVA_EF,Receive FIFO Overrun Channel A Error Flag" "0: No such error,1: FIFO overrun on channel B has been detected"
|
|
newline
|
|
bitfld.word 0x14 10. "MBS_EF,Message Buffer Search Error Flag" "0: No such event,1: Search engine active while search start appears.."
|
|
newline
|
|
bitfld.word 0x14 9. "MBU_EF,Message Buffer Utilization Error Flag" "0: No such event,1: Non-utilized message buffer enabled"
|
|
newline
|
|
bitfld.word 0x14 8. "LCK_EF,Lock Error Flag" "0: No such error,1: Lock error detected"
|
|
newline
|
|
bitfld.word 0x14 6. "SBCF_EF,System Bus Communication Failure Error Flag" "0: No such event,1: System bus access not finished in time"
|
|
newline
|
|
bitfld.word 0x14 5. "FID_EF,Frame ID Error Flag" "0: No such error occurred,1: Frame ID error occurred"
|
|
newline
|
|
bitfld.word 0x14 4. "DPL_EF,Dynamic Payload Length Error Flag" "0: No such error occurred,1: Dynamic payload length error occurred"
|
|
newline
|
|
bitfld.word 0x14 3. "SPL_EF,Static Payload Length Error Flag" "0: No such error occurred,1: Static payload length error occurred"
|
|
newline
|
|
bitfld.word 0x14 2. "NML_EF,Network Management Length Error Flag" "0: No such error occurred,1: Network management length error occurred"
|
|
newline
|
|
bitfld.word 0x14 1. "NMF_EF,Network Management Frame Error Flag" "0: No such error occurred,1: Network management frame error occurred"
|
|
newline
|
|
bitfld.word 0x14 0. "ILSA_EF,Illegal System Bus Address Error Flag" "0: No such event,1: Illegal system bus address accessed"
|
|
line.word 0x16 "MBIVEC,Message Buffer Interrupt Vector Register"
|
|
hexmask.word.byte 0x16 8.--14. 1. "TBIVEC,Transmit Buffer Interrupt Vector"
|
|
newline
|
|
hexmask.word.byte 0x16 0.--6. 1. "RBIVEC,Receive Buffer Interrupt Vector"
|
|
rgroup.word 0x24++0x5
|
|
line.word 0x0 "CASERCR,Channel A Status Error Counter Register"
|
|
hexmask.word 0x0 0.--15. 1. "CHAERSCNT,Channel A Status Error Counter"
|
|
line.word 0x2 "CBSERCR,Channel B Status Error Counter Register"
|
|
hexmask.word 0x2 0.--15. 1. "CHBERSCNT,Channel B Status Error Counter"
|
|
line.word 0x4 "PSR0,Protocol Status Register 0"
|
|
bitfld.word 0x4 14.--15. "ERRMODE,Error Mode" "0: ACTIVE,1: PASSIVE,2: COMM_HALT,?"
|
|
newline
|
|
bitfld.word 0x4 12.--13. "SLOTMODE,Slot Mode" "0: SINGLE,1: ALL_PENDING,2: ALL,?"
|
|
newline
|
|
bitfld.word 0x4 8.--10. "PROTSTATE,Protocol State" "0: POC:default config,1: POC:config,2: POC:wakeup,3: POC:ready,4: POC:normal passive,5: POC:normal active,6: POC:halt,7: POC:startup"
|
|
newline
|
|
hexmask.word.byte 0x4 4.--7. 1. "STARTUPSTATE,Startup State"
|
|
newline
|
|
bitfld.word 0x4 0.--2. "WAKEUPSTATUS,Wakeup Status" "0: UNDEFINED,1: RECEIVED_HEADER,2: RECEIVED_WUP,3: COLLISION_ HEADER,4: COLLISION_WUP,5: COLLISION_UNKNOWN,6: TRANSMITTED,?"
|
|
group.word 0x2A++0x1
|
|
line.word 0x0 "PSR1,Protocol Status Register 1"
|
|
bitfld.word 0x0 15. "CSAA,Cold Start Attempt Aborted Flag" "0: No such event,1: Cold start attempt aborted"
|
|
newline
|
|
rbitfld.word 0x0 14. "CSP,Leading Cold Start Path" "0: No such event,1: POC:normal active reached from POC:startup state.."
|
|
newline
|
|
hexmask.word.byte 0x0 8.--12. 1. "REMCSAT,Remaining Coldstart Attempts"
|
|
newline
|
|
rbitfld.word 0x0 7. "CPN,Leading Cold Start Path Noise" "0: No such event,1: POC:normal active state was reached from.."
|
|
newline
|
|
rbitfld.word 0x0 6. "HHR,Host Halt Request Pending" "0: No such event,1: HALT command received"
|
|
newline
|
|
rbitfld.word 0x0 5. "FRZ,Freeze Occurred" "0: No such event,1: Immediate halt due to FREEZE or internal error.."
|
|
newline
|
|
hexmask.word.byte 0x0 0.--4. 1. "APTAC,Allow Passive to Active Counter"
|
|
rgroup.word 0x2C++0x1
|
|
line.word 0x0 "PSR2,Protocol Status Register 2"
|
|
bitfld.word 0x0 15. "NBVB,NIT Boundary Violation on Channel B" "0: No such event,1: Media activity at boundaries detected"
|
|
newline
|
|
bitfld.word 0x0 14. "NSEB,NIT Syntax Error on Channel B" "0: No such event,1: Syntax error detected"
|
|
newline
|
|
bitfld.word 0x0 13. "STCB,Symbol Window Transmit Conflict on Channel B" "0: No such event,1: Transmission conflict detected"
|
|
newline
|
|
bitfld.word 0x0 12. "SBVB,Symbol Window Boundary Violation on Channel B" "0: No such event,1: Media activity at boundaries detected"
|
|
newline
|
|
bitfld.word 0x0 11. "SSEB,Symbol Window Syntax Error on Channel B" "0: No such event,1: Syntax error detected"
|
|
newline
|
|
bitfld.word 0x0 10. "MTB,Media Access Test Symbol MTS Received on Channel B" "0: No such event,1: MTS symbol received"
|
|
newline
|
|
bitfld.word 0x0 9. "NBVA,NIT Boundary Violation on Channel A" "0: No such event,1: Media activity at boundaries detected"
|
|
newline
|
|
bitfld.word 0x0 8. "NSEA,NIT Syntax Error on Channel A" "0: No such event,1: Syntax error detected"
|
|
newline
|
|
bitfld.word 0x0 7. "STCA,Symbol Window Transmit Conflict on Channel A" "0: No such event,1: Transmission conflict detected"
|
|
newline
|
|
bitfld.word 0x0 6. "SBVA,Symbol Window Boundary Violation on Channel A" "0: No such event,1: Media activity at boundaries detected"
|
|
newline
|
|
bitfld.word 0x0 5. "SSEA,Symbol Window Syntax Error on Channel A" "0: No such event,1: Syntax error detected"
|
|
newline
|
|
bitfld.word 0x0 4. "MTA,Media Access Test Symbol MTS Received on Channel A" "0: No such event,1: MTS symbol received"
|
|
newline
|
|
hexmask.word.byte 0x0 0.--3. 1. "CKCORFCNT,Clock Correction Failed Counter"
|
|
group.word 0x2E++0x1
|
|
line.word 0x0 "PSR3,Protocol Status Register 3"
|
|
bitfld.word 0x0 13. "WUB,Wakeup Symbol Received on Channel B" "0: No wakeup symbol received,1: Wakeup symbol received"
|
|
newline
|
|
bitfld.word 0x0 12. "ABVB,Aggregated Boundary Violation on Channel B" "0: No boundary violation detected,1: Boundary violation detected"
|
|
newline
|
|
bitfld.word 0x0 11. "AACB,Aggregated Additional Communication on Channel B" "0: No additional communication detected,1: Additional communication detected"
|
|
newline
|
|
bitfld.word 0x0 10. "ACEB,Aggregated Content Error on Channel B" "0: No content error detected,1: Content error detected"
|
|
newline
|
|
bitfld.word 0x0 9. "ASEB,Aggregated Syntax Error on Channel B" "0: No syntax error detected,1: Syntax errors detected"
|
|
newline
|
|
bitfld.word 0x0 8. "AVFB,Aggregated Valid Frame on Channel B" "0: No syntactically valid frames received,1: At least one syntactically valid frame received"
|
|
newline
|
|
bitfld.word 0x0 5. "WUA,Wakeup Symbol Received on Channel A" "0: No wakeup symbol received,1: Wakeup symbol received"
|
|
newline
|
|
bitfld.word 0x0 4. "ABVA,Aggregated Boundary Violation on Channel A" "0: No boundary violation detected,1: Boundary violation detected"
|
|
newline
|
|
bitfld.word 0x0 3. "AACA,Aggregated Additional Communication on Channel A" "0: No additional communication detected,1: Additional communication detected"
|
|
newline
|
|
bitfld.word 0x0 2. "ACEA,Aggregated Content Error on Channel A" "0: No content error detected,1: Content error detected"
|
|
newline
|
|
bitfld.word 0x0 1. "ASEA,Aggregated Syntax Error on Channel A" "0: No syntax error detected,1: Syntax errors detected"
|
|
newline
|
|
bitfld.word 0x0 0. "AVFA,Aggregated Valid Frame on Channel A" "0: No syntactically valid frames received,1: At least one syntactically valid frame received"
|
|
rgroup.word 0x30++0xD
|
|
line.word 0x0 "MTCTR,Macrotick Counter Register"
|
|
hexmask.word 0x0 0.--13. 1. "MTCT,Macrotick Counter"
|
|
line.word 0x2 "CYCTR,Cycle Counter Register"
|
|
hexmask.word.byte 0x2 0.--5. 1. "CYCCNT,Cycle Counter"
|
|
line.word 0x4 "SLTCTAR,Slot Counter Channel A Register"
|
|
hexmask.word 0x4 0.--10. 1. "SLOTCNTA,Slot Counter Value for Channel A"
|
|
line.word 0x6 "SLTCTBR,Slot Counter Channel B Register"
|
|
hexmask.word 0x6 0.--10. 1. "SLOTCNTB,Slot Counter Value for Channel B"
|
|
line.word 0x8 "RTCORVR,Rate Correction Value Register"
|
|
hexmask.word 0x8 0.--15. 1. "RATECORR,Rate Correction Value"
|
|
line.word 0xA "OFCORVR,Offset Correction Value Register"
|
|
hexmask.word 0xA 0.--15. 1. "OFFSETCORR,Offset Correction Value"
|
|
line.word 0xC "CIFR,Combined Interrupt Flag Register"
|
|
bitfld.word 0xC 7. "MIF,Module Interrupt Flag" "0: No interrupt source has its interrupt flag..,1: At least one interrupt source has its interrupt.."
|
|
newline
|
|
bitfld.word 0xC 6. "PRIF,Protocol Interrupt Flag" "0: All individual protocol interrupt flags are..,1: At least one of the individual protocol.."
|
|
newline
|
|
bitfld.word 0xC 5. "CHIF,CHI Interrupt Flag" "0: All CHI error flags are equal to 0,1: At least one CHI error flag is equal to 1"
|
|
newline
|
|
bitfld.word 0xC 4. "WUPIF,Wakeup Interrupt Flag. Provides the same value as FR_GIFER[WUPIF]" "0,1"
|
|
newline
|
|
bitfld.word 0xC 3. "FAFBIF,Receive FIFO Channel B Almost Full Interrupt Flag. Provides the same value as FR_GIFER[FAFBIF]" "0,1"
|
|
newline
|
|
bitfld.word 0xC 2. "FAFAIF,Receive FIFO Channel A Almost Full Interrupt Flag. Provides the same value as FR_GIFER[FAFAIF]" "0,1"
|
|
newline
|
|
bitfld.word 0xC 1. "RBIF,Receive Message Buffer Interrupt Flag" "0: None of the individual receive message buffers..,1: At least one individual receive message buffers.."
|
|
newline
|
|
bitfld.word 0xC 0. "TBIF,Transmit Message Buffer Interrupt Flag" "0: None of the individual transmit message buffers..,1: At least one individual transmit message buffers.."
|
|
group.word 0x3E++0x1
|
|
line.word 0x0 "SYMATOR,System Memory Access Time-Out Register"
|
|
hexmask.word.byte 0x0 0.--7. 1. "TIMEOUT,System Memory Access Time-Out"
|
|
rgroup.word 0x40++0x1
|
|
line.word 0x0 "SFCNTR,Sync Frame Counter Register"
|
|
hexmask.word.byte 0x0 12.--15. 1. "SFEVB,Sync Frames Channel B even cycle"
|
|
newline
|
|
hexmask.word.byte 0x0 8.--11. 1. "SFEVA,Sync Frames Channel A even cycle"
|
|
newline
|
|
hexmask.word.byte 0x0 4.--7. 1. "SFODB,Sync Frames Channel B odd cycle"
|
|
newline
|
|
hexmask.word.byte 0x0 0.--3. 1. "SFODA,Sync Frames Channel A odd cycle"
|
|
group.word 0x42++0x9
|
|
line.word 0x0 "SFTOR,Sync Frame Table Offset Register"
|
|
hexmask.word 0x0 1.--15. 1. "SFT_OFFSET,Sync Frame Table Offset"
|
|
line.word 0x2 "SFTCCSR,Sync Frame Table Configuration. Control. Status Register"
|
|
bitfld.word 0x2 15. "ELKT,Even Cycle Tables Lock/Unlock Trigger" "0: No effect,1: Triggers lock/unlock of the even cycle tables."
|
|
newline
|
|
bitfld.word 0x2 14. "OLKT,Odd Cycle Tables Lock/Unlock Trigger" "0: No effect,1: Triggers lock/unlock of the odd cycle tables."
|
|
newline
|
|
hexmask.word.byte 0x2 8.--13. 1. "CYCNUM,Cycle Number"
|
|
newline
|
|
rbitfld.word 0x2 7. "ELKS,Even Cycle Tables Lock Status" "0: Application has not locked the even cycle tables.,1: Application has locked the even cycle tables."
|
|
newline
|
|
rbitfld.word 0x2 6. "OLKS,Odd Cycle Tables Lock Status" "0: Application has not locked the odd cycle tables.,1: Application has locked the odd cycle tables."
|
|
newline
|
|
rbitfld.word 0x2 5. "EVAL,Even Cycle Tables Valid" "0: Tables are not valid (update is ongoing),1: Tables are valid (consistent)."
|
|
newline
|
|
rbitfld.word 0x2 4. "OVAL,Odd Cycle Tables Valid" "0: Tables are not valid (update is ongoing),1: Tables are valid (consistent)."
|
|
newline
|
|
bitfld.word 0x2 2. "OPT,One Pair Trigger" "0: Write continuously pairs of enabled Sync Frame..,1: Write only one pair of enabled Sync Frame Tables.."
|
|
newline
|
|
bitfld.word 0x2 1. "SDVEN,Sync Frame Deviation Table Enable" "0: Do not write Sync Frame Deviation Tables,1: Write Sync Frame Deviation Tables into FlexRay.."
|
|
newline
|
|
bitfld.word 0x2 0. "SIDEN,Sync Frame ID Table Enable" "0: Do not write Sync Frame ID Tables,1: Write Sync Frame ID Tables into FlexRay memory.."
|
|
line.word 0x4 "SFIDRFR,Sync Frame ID Rejection Filter Register"
|
|
hexmask.word 0x4 0.--9. 1. "SYNFRID,Sync Frame Rejection ID"
|
|
line.word 0x6 "SFIDAFVR,Sync Frame ID Acceptance Filter Value Register"
|
|
hexmask.word 0x6 0.--9. 1. "FVAL,Filter Value. This field defines the value for the sync frame acceptance filtering."
|
|
line.word 0x8 "SFIDAFMR,Sync Frame ID Acceptance Filter Mask Register"
|
|
hexmask.word 0x8 0.--9. 1. "FMSK,Filter Mask. This field defines the mask for the sync frame acceptance filtering."
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x2)
|
|
rgroup.word ($2+0x4C)++0x1
|
|
line.word 0x0 "NMVR$1,Network Management Vector Register"
|
|
hexmask.word 0x0 0.--15. 1. "NMVP,Network Management Vector Part"
|
|
repeat.end
|
|
group.word 0x58++0x9
|
|
line.word 0x0 "NMVLR,Network Management Vector Length Register"
|
|
hexmask.word.byte 0x0 0.--3. 1. "NMVL,Network Management Vector Length"
|
|
line.word 0x2 "TICCR,Timer Configuration and Control Register"
|
|
bitfld.word 0x2 13. "T2_CFG,Timer T2 Configuration. This bit configures the timebase mode of Timer T2." "0: T2 is absolute timer.,1: T2 is relative timer."
|
|
newline
|
|
bitfld.word 0x2 12. "T2_REP,Timer T2 Repetitive Mode. This bit configures the repetition mode of Timer T2." "0: T2 is non repetitive,1: T2 is repetitive"
|
|
newline
|
|
bitfld.word 0x2 10. "T2SP,Timer T2 Stop. This trigger bit is used to stop timer T2." "0: no effect,1: stop timer T2"
|
|
newline
|
|
bitfld.word 0x2 9. "T2TR,Timer T2 Trigger. This trigger bit is used to start timer T2." "0: no effect,1: start timer T2"
|
|
newline
|
|
rbitfld.word 0x2 8. "T2ST,Timer T2 State. This status bit provides the current state of timer T2." "0: timer T2 is idle,1: timer T2 is running"
|
|
newline
|
|
bitfld.word 0x2 4. "T1_REP,Timer T1 Repetitive Mode. This bit configures the repetition mode of timer T1." "0: T1 is non repetitive,1: T1 is repetitive"
|
|
newline
|
|
bitfld.word 0x2 2. "T1SP,Timer T1 Stop. This trigger bit is used to stop timer T1." "0: no effect,1: stop timer T1"
|
|
newline
|
|
bitfld.word 0x2 1. "T1TR,Timer T1 Trigger. This trigger bit is used to start timer T1." "0: no effect,1: start timer T1"
|
|
newline
|
|
rbitfld.word 0x2 0. "T1ST,Timer T1 State. This status bit provides the current state of timer T1." "0: timer T1 is idle,1: timer T1 is running"
|
|
line.word 0x4 "TI1CYSR,Timer 1 Cycle Set Register"
|
|
hexmask.word.byte 0x4 8.--13. 1. "T1_CYC_VAL,Timer T1 Cycle Filter Value. This field defines the cycle filter value for timer T1."
|
|
newline
|
|
hexmask.word.byte 0x4 0.--5. 1. "T1_CYC_MSK,Timer T1 Cycle Filter Mask. This field defines the cycle filter mask for timer T1."
|
|
line.word 0x6 "TI1MTOR,Timer 1 Macrotick Offset Register"
|
|
hexmask.word 0x6 0.--13. 1. "T1_MTOFFSET,Timer 1 Macrotick Offset. This field defines the macrotick offset value for timer 1."
|
|
line.word 0x8 "TI2CR0_ABS,Timer 2 Configuration Register 0 (Absolute Timer Configuration)"
|
|
hexmask.word.byte 0x8 8.--13. 1. "T2CYCVAL,Timer T2 Cycle Filter Mask"
|
|
newline
|
|
hexmask.word.byte 0x8 0.--5. 1. "T2CYCMSK,Timer T2 Cycle Filter Mask"
|
|
group.word 0x60++0x3
|
|
line.word 0x0 "TI2CR0_REL,Timer 2 Configuration Register 0 (Relative Timer Configuration)"
|
|
hexmask.word 0x0 0.--15. 1. "T2MTCNT,Timer T2 Macrotick High Word"
|
|
line.word 0x2 "TI2CR1_ABS,Timer 2 Configuration Register 1 (Absolute Timer Configuration)"
|
|
hexmask.word 0x2 0.--13. 1. "T2MOFF,Timer T2 Macrotick Offset"
|
|
group.word 0x62++0x5
|
|
line.word 0x0 "TI2CR1_REL,Timer 2 Configuration Register 1 (Relative Timer Configuration)"
|
|
hexmask.word 0x0 0.--15. 1. "T2MTCNT,Timer T2 Macrotick Low Word"
|
|
line.word 0x2 "SSSR,Slot Status Selection Register"
|
|
bitfld.word 0x2 15. "WMD,Write Mode. This control bit defines the write mode of this register." "0: Write to all fields in this register on write..,1: Write to SEL field only on write access."
|
|
newline
|
|
bitfld.word 0x2 12.--13. "SEL,Selector. This field selects one of the four internal slot status selection registers for access." "0: select FR_SSSR0.,1: select FR_SSSR1.,2: select FR_SSSR2.,3: select FR_SSSR3."
|
|
newline
|
|
hexmask.word 0x2 0.--10. 1. "SLOTNUMBER,Slot Number"
|
|
line.word 0x4 "SSCCR,Slot Status Counter Condition Register"
|
|
bitfld.word 0x4 15. "WMD,Write Mode. This control bit defines the write mode of this register." "0: Write to all fields in this register on write..,1: Write to SEL field only on write access."
|
|
newline
|
|
bitfld.word 0x4 12.--13. "SEL,Selector. This field selects one of the four internal slot counter condition registers for access." "0: select FR_SSCCR0.,1: select FR_SSCCR1.,2: select FR_SSCCR2.,3: select FR_SSCCR3."
|
|
newline
|
|
bitfld.word 0x4 9.--10. "CNTCFG,Counter Configuration" "0: increment by 1 if condition is fulfilled on..,1: increment by 1 if condition is fulfilled on..,2: increment by 1 if condition is fulfilled on at..,3: increment by 2 if condition is fulfilled on both.."
|
|
newline
|
|
bitfld.word 0x4 8. "MCY,Multi Cycle Selection" "0: The Slot Status Counter provides information for..,1: The Slot Status Counter accumulates over.."
|
|
newline
|
|
bitfld.word 0x4 7. "VFR,Valid Frame Restriction. This bit is used to restrict the counter to received valid frames." "0: The counter is not restricted to valid frames..,1: The counter is restricted to valid frames only."
|
|
newline
|
|
bitfld.word 0x4 6. "SYF,Sync Frame Restriction" "0: The counter is not restricted with respect to..,1: The counter is restricted to frames with the.."
|
|
newline
|
|
bitfld.word 0x4 5. "NUF,Null Frame Restriction" "0: The counter is not restricted with respect to..,1: The counter is restricted to frames with the.."
|
|
newline
|
|
bitfld.word 0x4 4. "SUF,Startup Frame Restriction" "0: The counter is not restricted with respect to..,1: The counter is restricted to received frames.."
|
|
newline
|
|
hexmask.word.byte 0x4 0.--3. 1. "STATUSMASK,Slot Status Mask"
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x2)
|
|
rgroup.word ($2+0x68)++0x1
|
|
line.word 0x0 "SSR$1,Slot Status Register"
|
|
bitfld.word 0x0 15. "VFB,Valid Frame on Channel B. protocol related variable: vSS!ValidFrame channel B" "0: vSS!ValidFrame = 0,1: vSS!ValidFrame = 1"
|
|
newline
|
|
bitfld.word 0x0 14. "SYB,Sync Frame Indicator Channel B. protocol related variable: vRF!Header!SyFIndicator channel B" "0: vRF!Header!SyFIndicator = 0,1: vRF!Header!SyFIndicator = 1"
|
|
newline
|
|
bitfld.word 0x0 13. "NFB,Null Frame Indicator Channel B. protocol related variable: vRF!Header!NFIndicator channel B" "0: vRF!Header!NFIndicator = 0,1: vRF!Header!NFIndicator = 1"
|
|
newline
|
|
bitfld.word 0x0 12. "SUB,Startup Frame Indicator Channel B. protocol related variable: vRF!Header!SuFIndicator channel B" "0: vRF!Header!SuFIndicator = 0,1: vRF!Header!SuFIndicator = 1"
|
|
newline
|
|
bitfld.word 0x0 11. "SEB,Syntax Error on Channel B. protocol related variable: vSS!SyntaxError channel B" "0: vSS!SyntaxError = 0,1: vSS!SyntaxError = 1"
|
|
newline
|
|
bitfld.word 0x0 10. "CEB,Content Error on Channel B. protocol related variable: vSS!ContentError channel B" "0: vSS!ContentError = 0,1: vSS!ContentError = 1"
|
|
newline
|
|
bitfld.word 0x0 9. "BVB,Boundary Violation on Channel B. protocol related variable: vSS!BViolation channel B" "0: vSS!BViolation = 0,1: vSS!BViolation = 1"
|
|
newline
|
|
bitfld.word 0x0 8. "TCB,Transmission Conflict on Channel B. protocol related variable: vSS!TxConflict channel B" "0: vSS!TxConflict = 0,1: vSS!TxConflict = 1"
|
|
newline
|
|
bitfld.word 0x0 7. "VFA,Valid Frame on Channel A. protocol related variable: vSS!ValidFrame channel A" "0: vSS!ValidFrame = 0,1: vSS!ValidFrame = 1"
|
|
newline
|
|
bitfld.word 0x0 6. "SYA,Sync Frame Indicator Channel A. protocol related variable: vRF!Header!SyFIndicator channel A" "0: vRF!Header!SyFIndicator = 0,1: vRF!Header!SyFIndicator = 1"
|
|
newline
|
|
bitfld.word 0x0 5. "NFA,Null Frame Indicator Channel A. protocol related variable: vRF!Header!NFIndicator channel A" "0: vRF!Header!NFIndicator = 0,1: vRF!Header!NFIndicator = 1"
|
|
newline
|
|
bitfld.word 0x0 4. "SUA,Startup Frame Indicator Channel A. protocol related variable: vRF!Header!SuFIndicator channel A" "0: vRF!Header!SuFIndicator = 0,1: vRF!Header!SuFIndicator = 1"
|
|
newline
|
|
bitfld.word 0x0 3. "SEA,Syntax Error on Channel A. protocol related variable: vSS!SyntaxError channel A" "0: vSS!SyntaxError = 0,1: vSS!SyntaxError = 1"
|
|
newline
|
|
bitfld.word 0x0 2. "CEA,Content Error on Channel A. protocol related variable: vSS!ContentError channel A" "0: vSS!ContentError = 0,1: vSS!ContentError = 1"
|
|
newline
|
|
bitfld.word 0x0 1. "BVA,Boundary Violation on Channel A. protocol related variable: vSS!BViolation channel A" "0: vSS!BViolation = 0,1: vSS!BViolation = 1"
|
|
newline
|
|
bitfld.word 0x0 0. "TCA,Transmission Conflict on Channel A. protocol related variable: vSS!TxConflict channel A" "0: vSS!TxConflict = 0,1: vSS!TxConflict = 1"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x2)
|
|
rgroup.word ($2+0x78)++0x1
|
|
line.word 0x0 "SSCR$1,Slot Status Counter Register"
|
|
hexmask.word 0x0 0.--15. 1. "SLOTSTATUSCNT,Slot Status Counter. This field provides the current value of the Slot Status Counter."
|
|
repeat.end
|
|
group.word 0x80++0xB
|
|
line.word 0x0 "MTSACFR,MTS A Configuration Register"
|
|
bitfld.word 0x0 15. "MTE,Media Access Test Symbol Transmission Enable" "0: MTS transmission disabled,1: MTS transmission enabled"
|
|
newline
|
|
hexmask.word.byte 0x0 8.--13. 1. "CYCCNTMSK,Cycle Counter Mask. This field provides the filter mask for the MTS cycle count filter."
|
|
newline
|
|
hexmask.word.byte 0x0 0.--5. 1. "CYCCNTVAL,Cycle Counter Value. This field provides the filter value for the MTS cycle count filter."
|
|
line.word 0x2 "MTSBCFR,MTS B Configuration Register"
|
|
bitfld.word 0x2 15. "MTE,Media Access Test Symbol Transmission Enable" "0: MTS transmission disabled,1: MTS transmission enabled"
|
|
newline
|
|
hexmask.word.byte 0x2 8.--13. 1. "CYCCNTMSK,Cycle Counter Mask. This field provides the filter mask for the MTS cycle count filter."
|
|
newline
|
|
hexmask.word.byte 0x2 0.--5. 1. "CYCCNTVAL,Cycle Counter Value. This field provides the filter value for the MTS cycle count filter."
|
|
line.word 0x4 "RSBIR,Receive Shadow Buffer Index Register"
|
|
bitfld.word 0x4 15. "WMD,Write Mode. This bit controls the write mode for this register." "0: update SEL and RSBIDX field on register write,1: update only SEL field on register write"
|
|
newline
|
|
bitfld.word 0x4 12.--13. "SEL,Selector" "0: FR_RSBIR_A1. receive shadow buffer index..,1: FR_RSBIR_A2. receive shadow buffer index..,2: FR_RSBIR_B1. receive shadow buffer index..,3: FR_RSBIR_B2. receive shadow buffer index.."
|
|
newline
|
|
hexmask.word.byte 0x4 0.--7. 1. "RSBIDX,RSBIDXA1/RSBIDXA2/RSBIDXB1/RSBIDXB2- Receive Shadow Buffer Index"
|
|
line.word 0x6 "RFWMSR,Receive FIFO Watermark and Selection Register"
|
|
hexmask.word.byte 0x6 8.--15. 1. "WM,WMA/WMB - Watermark"
|
|
newline
|
|
bitfld.word 0x6 0. "SEL,Select. This control bit selects the receiver FIFO for subsequent programming." "0: Receiver FIFO for channel A selected,1: Receiver FIFO for channel B selected"
|
|
line.word 0x8 "RFSIR,Receive FIFO Start Index Register"
|
|
hexmask.word 0x8 0.--9. 1. "SIDX,SIDXA/SIDXB - Start Index"
|
|
line.word 0xA "RFDSR,Receive FIFO Depth and Size Register"
|
|
hexmask.word.byte 0xA 8.--15. 1. "FIFO_DEPTH,FIFO_DEPTHA/FIFO_DEPTHB - FIFO Depth"
|
|
newline
|
|
hexmask.word.byte 0xA 0.--6. 1. "ENTRY_SIZE,ENTRY_SIZEA/ENTRY_SIZEB - Entry Size"
|
|
rgroup.word 0x8C++0x3
|
|
line.word 0x0 "RFARIR,Receive FIFO A Read Index Register"
|
|
hexmask.word 0x0 0.--9. 1. "RDIDX,Read Index"
|
|
line.word 0x2 "RFBRIR,Receive FIFO B Read Index Register"
|
|
hexmask.word 0x2 0.--9. 1. "RDIDX,Read Index"
|
|
group.word 0x90++0xB
|
|
line.word 0x0 "RFMIDAFVR,Receive FIFO Message ID Acceptance Filter Value Register"
|
|
hexmask.word 0x0 0.--15. 1. "MIDAFVAL,MIDAFVALA/MIDAFVALB - Message ID Acceptance Filter Value"
|
|
line.word 0x2 "RFMIDAFMR,Receive FIFO Message ID Acceptance Filter Mask Register"
|
|
hexmask.word 0x2 0.--15. 1. "MIDAFMSK,MIDAFMSKA/MIDAFMSKB - Message ID Acceptance Filter Mask"
|
|
line.word 0x4 "RFFIDRFVR,Receive FIFO Frame ID Rejection Filter Value Register"
|
|
hexmask.word 0x4 0.--10. 1. "FIDRFVAL,FIDRFVALA/FIDRFVALB - Frame ID Rejection Filter Value"
|
|
line.word 0x6 "RFFIDRFMR,Receive FIFO Frame ID Rejection Filter Mask Register"
|
|
hexmask.word 0x6 0.--10. 1. "FIDRFMSK,Frame ID Rejection Filter Mask. Filter mask for the frame ID rejection filter."
|
|
line.word 0x8 "RFRFCFR,Receive FIFO Range Filter Configuration Register"
|
|
bitfld.word 0x8 15. "WMD,Write Mode. This control bit defines the write mode of this register." "0: Write to all fields in this register on write..,1: Write to SEL and IBD field only on write access."
|
|
newline
|
|
bitfld.word 0x8 14. "IBD,Interval Boundary" "0: program lower interval boundary,1: program upper interval boundary"
|
|
newline
|
|
bitfld.word 0x8 12.--13. "SEL,Filter Selector. This control field selects the frame ID range filter to be accessed." "0: select frame ID range filter 0.,1: select frame ID range filter 1.,2: select frame ID range filter 2.,3: select frame ID range filter 3."
|
|
newline
|
|
hexmask.word 0x8 0.--10. 1. "SID,Slot ID"
|
|
line.word 0xA "RFRFCTR,Receive FIFO Range Filter Control Register"
|
|
bitfld.word 0xA 11. "F3MD,Range Filter 3 Mode. This control bit defines the filter mode of the frame ID range filter 3." "0: range filter 3 runs as acceptance filter,1: range filter 3 runs as rejection filter"
|
|
newline
|
|
bitfld.word 0xA 10. "F2MD,Range Filter 2 Mode. This control bit defines the filter mode of the frame ID range filter 2." "0: range filter 2 runs as acceptance filter,1: range filter 2 runs as rejection filter"
|
|
newline
|
|
bitfld.word 0xA 9. "F1MD,Range Filter 1 Mode. This control bit defines the filter mode of the frame ID range filter 1." "0: range filter 1 runs as acceptance filter,1: range filter 1 runs as rejection filter"
|
|
newline
|
|
bitfld.word 0xA 8. "F0MD,Range Filter 0 Mode. This control bit defines the filter mode of the frame ID range filter 0." "0: range filter 0 runs as acceptance filter,1: range filter 0 runs as rejection filter"
|
|
newline
|
|
bitfld.word 0xA 3. "F3EN,Range Filter 3 Enable. This control bit is used to enable and disable the frame ID range filter 3." "0: range filter 3 disabled,1: range filter 3 enabled"
|
|
newline
|
|
bitfld.word 0xA 2. "F2EN,Range Filter 2 Enable. This control bit is used to enable and disable the frame ID range filter 2." "0: range filter 2 disabled,1: range filter 2 enabled"
|
|
newline
|
|
bitfld.word 0xA 1. "F1EN,Range Filter 1 Enable. This control bit is used to enable and disable the frame ID range filter 1." "0: range filter 1 disabled,1: range filter 1 enabled"
|
|
newline
|
|
bitfld.word 0xA 0. "F0EN,Range Filter 0 Enable. This control bit is used to enable and disable the frame ID range filter 0." "0: range filter 0 disabled,1: range filter 0 enabled"
|
|
rgroup.word 0x9C++0x3
|
|
line.word 0x0 "LDTXSLAR,Last Dynamic Transmit Slot Channel A Register"
|
|
hexmask.word 0x0 0.--10. 1. "LDYNTXSLOTA,Last Dynamic Transmission Slot Channel A"
|
|
line.word 0x2 "LDTXSLBR,Last Dynamic Transmit Slot Channel B Register"
|
|
hexmask.word 0x2 0.--10. 1. "LDYNTXSLOTB,Last Dynamic Transmission Slot Channel B"
|
|
group.word 0xA0++0x43
|
|
line.word 0x0 "PCR0,Protocol Configuration Register 0"
|
|
hexmask.word.byte 0x0 10.--15. 1. "action_point_offset,gdActionPointOffset - 1"
|
|
newline
|
|
hexmask.word 0x0 0.--9. 1. "static_slot_length,gdStaticSlot"
|
|
line.word 0x2 "PCR1,Protocol Configuration Register 1"
|
|
hexmask.word 0x2 0.--13. 1. "macro_after_first_static_slot,gMacroPerCycle - gdStaticSlot"
|
|
line.word 0x4 "PCR2,Protocol Configuration Register 2"
|
|
hexmask.word.byte 0x4 10.--15. 1. "minislot_after_action_point,gdMinislot - gdMinislotActionPointOffset - 1"
|
|
newline
|
|
hexmask.word 0x4 0.--9. 1. "number_of_static_slots,gNumberOfStaticSlots"
|
|
line.word 0x6 "PCR3,Protocol Configuration Register 3"
|
|
hexmask.word.byte 0x6 10.--15. 1. "wakeup_symbol_rx_low,gdWakeupSymbolRxLow"
|
|
newline
|
|
hexmask.word.byte 0x6 5.--9. 1. "minislot_action_point_offset,gdMinislotActionPointOffset - 1"
|
|
newline
|
|
hexmask.word.byte 0x6 0.--4. 1. "coldstart_attempts,gColdstartAttempts"
|
|
line.word 0x8 "PCR4,Protocol Configuration Register 4"
|
|
hexmask.word.byte 0x8 9.--15. 1. "cas_rx_low_max,gdCASRxLowMax - 1"
|
|
newline
|
|
hexmask.word 0x8 0.--8. 1. "wakeup_symbol_rx_window,gdWakeupSymbolRxWindow"
|
|
line.word 0xA "PCR5,Protocol Configuration Register 5"
|
|
hexmask.word.byte 0xA 12.--15. 1. "tss_transmitter,gdTSSTransmitter"
|
|
newline
|
|
hexmask.word.byte 0xA 6.--11. 1. "wakeup_symbol_tx_low,gdWakeupSymbolTxLow"
|
|
newline
|
|
hexmask.word.byte 0xA 0.--5. 1. "wakeup_symbol_rx_idle,gdWakeupSymbolRxIdle"
|
|
line.word 0xC "PCR6,Protocol Configuration Register 6"
|
|
hexmask.word.byte 0xC 7.--14. 1. "symbol_window_after_action_point,gdSymbolWindow - gdActionPointOffset - 1"
|
|
newline
|
|
hexmask.word.byte 0xC 0.--6. 1. "macro_initial_offset_a,pMacroInitialOffset[A]"
|
|
line.word 0xE "PCR7,Protocol Configuration Register 7"
|
|
hexmask.word 0xE 7.--15. 1. "decoding_correction_b,pDecodingCorrection + pDelayCompensation[B] + 2"
|
|
newline
|
|
hexmask.word.byte 0xE 0.--6. 1. "micro_per_macro_nom_half,round(pMicroPerMacroNom / 2)"
|
|
line.word 0x10 "PCR8,Protocol Configuration Register 8"
|
|
hexmask.word.byte 0x10 12.--15. 1. "max_without_clock_correction_fatal,gMaxWithoutClockCorrectionFatal"
|
|
newline
|
|
hexmask.word.byte 0x10 8.--11. 1. "max_without_clock_correction_passive,gMaxWithoutClockCorrectionPassive"
|
|
newline
|
|
hexmask.word.byte 0x10 0.--7. 1. "wakeup_symbol_tx_idle,gdWakeupSymbolTxIdle"
|
|
line.word 0x12 "PCR9,Protocol Configuration Register 9"
|
|
bitfld.word 0x12 15. "minislot_exists,gNumberOfMinislots!=0" "0,1"
|
|
newline
|
|
bitfld.word 0x12 14. "symbol_window_exists,gdSymbolWindow!=0" "0,1"
|
|
newline
|
|
hexmask.word 0x12 0.--13. 1. "offset_correction_out,pOffsetCorrectionOut"
|
|
line.word 0x14 "PCR10,Protocol Configuration Register 10"
|
|
bitfld.word 0x14 15. "single_slot_enabled,pSingleSlotEnabled" "0,1"
|
|
newline
|
|
bitfld.word 0x14 14. "wakeup_channel,pWakeupChannel" "0,1"
|
|
newline
|
|
hexmask.word 0x14 0.--13. 1. "macro_per_cycle,gMacroPerCycle"
|
|
line.word 0x16 "PCR11,Protocol Configuration Register 11"
|
|
bitfld.word 0x16 15. "key_slot_used_for_startup,pKeySlotUsedForStartup" "0,1"
|
|
newline
|
|
bitfld.word 0x16 14. "key_slot_used_for_sync,pKeySlotUsedForSync" "0,1"
|
|
newline
|
|
hexmask.word 0x16 0.--13. 1. "offset_correction_start,gOffsetCorrectionStart"
|
|
line.word 0x18 "PCR12,Protocol Configuration Register 12"
|
|
hexmask.word.byte 0x18 11.--15. 1. "allow_passive_to_active,pAllowPassiveToActive"
|
|
newline
|
|
hexmask.word 0x18 0.--10. 1. "key_slot_header_crc,header CRC for key slot"
|
|
line.word 0x1A "PCR13,Protocol Configuration Register 13"
|
|
hexmask.word.byte 0x1A 10.--15. 1. "first_minislot_action_point_offset,max(gdActionPointOffset gdMinislotActionPointOffset) - 1"
|
|
newline
|
|
hexmask.word 0x1A 0.--9. 1. "static_slot_after_action_point,gdStaticSlot - gdActionPointOffset - 1"
|
|
line.word 0x1C "PCR14,Protocol Configuration Register 14"
|
|
hexmask.word 0x1C 5.--15. 1. "rate_correction_out,pRateCorrectionOut"
|
|
newline
|
|
hexmask.word.byte 0x1C 0.--4. 1. "listen_timeout,pdListenTimeout - 1"
|
|
line.word 0x1E "PCR15,Protocol Configuration Register 15"
|
|
hexmask.word 0x1E 0.--15. 1. "listen_timeout,pdListenTimeout - 1"
|
|
line.word 0x20 "PCR16,Protocol Configuration Register 16"
|
|
hexmask.word.byte 0x20 9.--15. 1. "macro_initial_offset_b,pMacroInitialOffset[B]"
|
|
newline
|
|
hexmask.word 0x20 0.--8. 1. "noise_listen_timeout,(gListenNoise * pdListenTimeout) - 1"
|
|
line.word 0x22 "PCR17,Protocol Configuration Register 17"
|
|
hexmask.word 0x22 0.--15. 1. "noise_listen_timeout,(gListenNoise * pdListenTimeout) - 1"
|
|
line.word 0x24 "PCR18,Protocol Configuration Register 18"
|
|
hexmask.word.byte 0x24 10.--15. 1. "wakeup_pattern,pWakeupPattern"
|
|
newline
|
|
hexmask.word 0x24 0.--9. 1. "key_slot_id,pKeySlotId"
|
|
line.word 0x26 "PCR19,Protocol Configuration Register 19"
|
|
hexmask.word 0x26 7.--15. 1. "decoding_correction_a,pDecodingCorrection + pDelayCompensation[A] + 2"
|
|
newline
|
|
hexmask.word.byte 0x26 0.--6. 1. "payload_length_static,gPayloadLengthStatic"
|
|
line.word 0x28 "PCR20,Protocol Configuration Register 20"
|
|
hexmask.word.byte 0x28 8.--15. 1. "micro_initial_offset_b,pMicroInitialOffset[A]"
|
|
newline
|
|
hexmask.word.byte 0x28 0.--7. 1. "micro_initial_offset_a,pMicroInitialOffset[A]"
|
|
line.word 0x2A "PCR21,Protocol Configuration Register 21"
|
|
bitfld.word 0x2A 13.--15. "extern_rate_correction,pExternRateCorrection" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.word 0x2A 0.--12. 1. "latest_tx,gNumberOfMinislots - pLatestTx"
|
|
line.word 0x2C "PCR22,Protocol Configuration Register 22"
|
|
hexmask.word 0x2C 4.--14. 1. "comp_accepted_startup_range_a,pdAcceptedStartupRange - pDelayCompensation[A]"
|
|
newline
|
|
hexmask.word.byte 0x2C 0.--3. 1. "micro_per_cycle,pMicroPerCycle"
|
|
line.word 0x2E "PCR23,Protocol Configuration Register 23"
|
|
hexmask.word 0x2E 0.--15. 1. "micro_per_cycle,pMicroPerCycle"
|
|
line.word 0x30 "PCR24,Protocol Configuration Register 24"
|
|
hexmask.word.byte 0x30 11.--15. 1. "cluster_drift_damping,pClusterDriftDamping"
|
|
newline
|
|
hexmask.word.byte 0x30 4.--10. 1. "max_payload_length_dynamic,pPayloadLengthDynMax"
|
|
newline
|
|
hexmask.word.byte 0x30 0.--3. 1. "micro_per_cycle_min,pMicroPerCycle - pdMaxDrift"
|
|
line.word 0x32 "PCR25,Protocol Configuration Register 25"
|
|
hexmask.word 0x32 0.--15. 1. "micro_per_cycle_min,pMicroPerCycle - pdMaxDrift"
|
|
line.word 0x34 "PCR26,Protocol Configuration Register 26"
|
|
bitfld.word 0x34 15. "allow_halt_due_to_clock,pAllowHaltDueToClock" "0,1"
|
|
newline
|
|
hexmask.word 0x34 4.--14. 1. "comp_accepted_startup_range_b,pdAcceptedStartupRange - pDelayCompensation[B]"
|
|
newline
|
|
hexmask.word.byte 0x34 0.--3. 1. "micro_per_cycle_max,pMicroPerCycle + pdMaxDrift"
|
|
line.word 0x36 "PCR27,Protocol Configuration Register 27"
|
|
hexmask.word 0x36 0.--15. 1. "micro_per_cycle_max,pMicroPerCycle + pdMaxDrift"
|
|
line.word 0x38 "PCR28,Protocol Configuration Register 28"
|
|
bitfld.word 0x38 14.--15. "dynamic_slot_idle_phase,gdDynamicSlotIdlePhase." "0,1,2,3"
|
|
newline
|
|
hexmask.word 0x38 0.--13. 1. "macro_after_offset_correction,gMacroPerCycle - gOffsetCorrectionStart"
|
|
line.word 0x3A "PCR29,Protocol Configuration Register 29"
|
|
bitfld.word 0x3A 13.--15. "extern_offset_correction,pExternOffsetCorrection" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.word 0x3A 0.--12. 1. "minislots_max,gNumberOfMinislots - 1"
|
|
line.word 0x3C "PCR30,Protocol Configuration Register 30"
|
|
hexmask.word.byte 0x3C 0.--3. 1. "sync_node_max,gSyncNodeMax"
|
|
line.word 0x3E "STPWHR,StopWatch Count High Register"
|
|
hexmask.word 0x3E 0.--15. 1. "STPW_S_H,StopWatch Count High"
|
|
line.word 0x40 "STPWLR,Stop Watch Count Low Register"
|
|
hexmask.word 0x40 0.--15. 1. "STPW_S_L,StopWatch Count Low"
|
|
line.word 0x42 "PEOER,Protocol Event Output Enable and StopWatch Control Register"
|
|
bitfld.word 0x42 8. "STPW_EN,Stopwatch count Enable" "0: Stopwatch counter disabled,1: Stopwatch counter enabled"
|
|
newline
|
|
bitfld.word 0x42 2. "TIM2_EE,Timer 2 expired Event Output Enable- This bit controls the event on port 'fr_evt_tim2'" "0: Timer 2 expired event out disabled,1: Timer 2 expired event out enabled"
|
|
newline
|
|
bitfld.word 0x42 1. "TIM1_EE,Timer 1 expired Event Output Enable- This bit controls the event on port 'fr_evt_tim1'" "0: Timer 1 expired event out disabled,1: Timer 1 expired event out enabled"
|
|
newline
|
|
bitfld.word 0x42 0. "CYC_EE,Cycle Start Event Output Enable- This bit controls the event on port 'fr_evt_cyc'" "0: Cycle start event out disabled,1: Cycle start event out enabled"
|
|
group.word 0xE6++0xD
|
|
line.word 0x0 "RFSDOR,Receive FIFO Start Data Offset Register"
|
|
hexmask.word 0x0 0.--15. 1. "SDO,SDOA/SDOB - Start Data Field Offset"
|
|
line.word 0x2 "RFSYMBADHR,Receive FIFO System Memory Base Address High Register"
|
|
hexmask.word 0x2 0.--15. 1. "SMBA,System Memory Base Address"
|
|
line.word 0x4 "RFSYMBADLR,Receive FIFO System Memory Base Address Low Register"
|
|
hexmask.word 0x4 4.--15. 1. "SMBA,System Memory Base Address"
|
|
line.word 0x6 "RFPTR,Receive FIFO Periodic Timer Register"
|
|
hexmask.word 0x6 0.--13. 1. "PTD,Periodic Timer Duration"
|
|
line.word 0x8 "RFFLPCR,Receive FIFO Fill Level and POP Count Register"
|
|
hexmask.word.byte 0x8 8.--15. 1. "FLB_or_PCB,The name and function of the fields in this register vary depending on whether they are being read or written"
|
|
newline
|
|
hexmask.word.byte 0x8 0.--7. 1. "FLA_or_PCA,Operation Sub-Field Description Read - - 8-15 FLA Fill Level FIFO A- This field provides the current number of entries in the FIFO A"
|
|
line.word 0xA "EEIFER,ECC Error Interrupt Flag and Enable Register"
|
|
bitfld.word 0xA 15. "LRNE_OF,LRAM Non-Corrected Error Overflow Flag" "0: no such event,1: Non-Corrected Error overflow detected on CHI LRAM"
|
|
newline
|
|
bitfld.word 0xA 14. "LRCE_OF,LRAM Corrected Error Overflow Flag" "0: no such event,1: Corrected Error overflow detected on CHI LRAM"
|
|
newline
|
|
bitfld.word 0xA 13. "DRNE_OF,DRAM Non-Corrected Error Overflow Flag" "0: no such event,1: Non-Corrected Error overflow detected on PE DRAM"
|
|
newline
|
|
bitfld.word 0xA 12. "DRCE_OF,DRAM Corrected Error Overflow Flag" "0: no such event,1: Corrected Error overflow detected on PE DRAM"
|
|
newline
|
|
bitfld.word 0xA 11. "LRNE_IF,LRAM Non-Corrected Error Interrupt Flag" "0: no such event,1: Non-Corrected Error detected on CHI LRAM"
|
|
newline
|
|
bitfld.word 0xA 10. "LRCE_IF,LRAM Corrected Error Interrupt Flag" "0: no such event,1: Corrected Error detected on CHI LRAM"
|
|
newline
|
|
bitfld.word 0xA 9. "DRNE_IF,DRAM Non-Corrected Error Interrupt Flag" "0: no such event,1: Non-Corrected Error detected on PE DRAM"
|
|
newline
|
|
bitfld.word 0xA 8. "DRCE_IF,DRAM Corrected Error Interrupt Flag" "0: no such event,1: Corrected Error detected on PE DRAM"
|
|
newline
|
|
bitfld.word 0xA 3. "LRNE_IE,LRAM Non-Corrected Error Interrupt Enable" "0: Disable interrupt line,1: Enable interrupt line"
|
|
newline
|
|
bitfld.word 0xA 2. "LRCE_IE,LRAM Corrected Error Interrupt Enable" "0: Disable interrupt line,1: Enable interrupt line"
|
|
newline
|
|
bitfld.word 0xA 1. "DRNE_IE,DRAM Non-Corrected Error Interrupt Enable" "0: Disable interrupt line,1: Enable interrupt line"
|
|
newline
|
|
bitfld.word 0xA 0. "DRCE_IE,DRAM Corrected Error Interrupt Enable" "0: Disable interrupt line,1: Enable interrupt line"
|
|
line.word 0xC "EERICR,ECC Error Report and Injection Control Register"
|
|
rbitfld.word 0xC 15. "BSY,Register Update Busy- This field indicates the current state of the ECC configuration update and controls the register write access condition IDL specified in ' Register Write Access" "0: ECC configuration is idle,1: ECC configuration is running"
|
|
newline
|
|
bitfld.word 0xC 8.--9. "ERS,Error Report Select. This field selects the content of the ECC Error reporting registers." "0: show PE DRAM non-corrected error information,1: show PE DRAM corrected error information,2: show CHI LRAM non-corrected error information,3: show CHI LRAM corrected error information"
|
|
newline
|
|
bitfld.word 0xC 4. "ERM,Error Report Mode" "0: store data and code as delivered by ecc decoding..,1: store data and code as read from the memory."
|
|
newline
|
|
bitfld.word 0xC 1. "EIM,Error Injection Mode. This bit configures the ECC error injection mode." "0: use FR_EEIDR[DATA] and FR_EEICR[CODE] as XOR..,1: use FR_EEIDR[DATA] and FR_EEICR[CODE] as write.."
|
|
newline
|
|
bitfld.word 0xC 0. "EIE,Error Injection Enable. This bit configures the ECC error injection on the memories." "0: Error injection disabled,1: Error injection enabled"
|
|
rgroup.word 0xF4++0x5
|
|
line.word 0x0 "EERAR,ECC Error Report Address Register"
|
|
bitfld.word 0x0 15. "MID,Memory Identifier. This flag provides the memory instance for which the memory error is reported." "0: PE DRAM,1: CHI LRAM"
|
|
newline
|
|
bitfld.word 0x0 12.--14. "BANK,Memory Bank" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.word 0x0 0.--11. 1. "ADDR,Memory Address. This field provides the address of the failing memory location."
|
|
line.word 0x2 "EERDR,ECC Error Report Data Register"
|
|
hexmask.word 0x2 0.--15. 1. "DATA,Data"
|
|
line.word 0x4 "EERCR,ECC Error Report Code Register"
|
|
hexmask.word.byte 0x4 0.--4. 1. "CODE,Code"
|
|
group.word 0xFA++0x5
|
|
line.word 0x0 "EEIAR,ECC Error Injection Address Register"
|
|
bitfld.word 0x0 15. "MID,Memory Identifier. This flag defines the memory instance for ECC error injection." "0: PE DRAM,1: CHI LRAM"
|
|
newline
|
|
bitfld.word 0x0 12.--14. "BANK,Memory Bank" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.word 0x0 0.--11. 1. "ADDR,Memory Address. This flag defines the memory address for ECC error injection."
|
|
line.word 0x2 "EEIDR,ECC Error Injection Data Register"
|
|
hexmask.word 0x2 0.--15. 1. "DATA,Data"
|
|
line.word 0x4 "EEICR,ECC Error Injection Code Register"
|
|
hexmask.word.byte 0x4 0.--4. 1. "CODE,Code"
|
|
repeat 128. (increment 0x0 0x1)(increment 0x0 0x8)
|
|
group.word ($2+0x800)++0x1
|
|
line.word 0x0 "MBCCSR$1,Message Buffer Configuration. Control. Status Register"
|
|
bitfld.word 0x0 12. "MTD,Message Buffer Transfer Direction. This bit configures the transfer direction of a message buffer." "0: Receive message buffer,1: Transmit message buffer"
|
|
newline
|
|
bitfld.word 0x0 11. "CMT,Commit for Transmission" "0: Message buffer data not ready for transmission,1: Message buffer data ready for transmission"
|
|
newline
|
|
bitfld.word 0x0 10. "EDT,Enable/Disable Trigger" "0: No effect,1: Message buffer enable or disable is triggered"
|
|
newline
|
|
bitfld.word 0x0 9. "LCKT,Lock/Unlock Trigger" "0: No effect,1: Message buffer lock or unlock is triggered"
|
|
newline
|
|
bitfld.word 0x0 8. "MBIE,Message Buffer Interrupt Enable" "0: Interrupt request generation disabled,1: Interrupt request generation enabled"
|
|
newline
|
|
rbitfld.word 0x0 4. "DUP,Data Updated" "0: Frame Header and Message buffer data field not..,1: Frame Header and Message buffer data field updated"
|
|
newline
|
|
rbitfld.word 0x0 3. "DVAL,Data Valid" "0: receive message buffer contains no valid frame..,1: receive message buffer contains valid frame data.."
|
|
newline
|
|
rbitfld.word 0x0 2. "EDS,Enable/Disable Status. This status bit indicates whether the message buffer is enabled or disabled." "0: Message buffer is disabled.,1: Message buffer is enabled."
|
|
newline
|
|
rbitfld.word 0x0 1. "LCKS,Lock Status. This status bit indicates the current lock status of the message buffer." "0: Message buffer is not locked by the application.,1: Message buffer is locked by the application."
|
|
newline
|
|
bitfld.word 0x0 0. "MBIF,Message Buffer Interrupt Flag" "0: No such event,1: Slot status field updated or transmit message.."
|
|
repeat.end
|
|
repeat 128. (increment 0x0 0x1)(increment 0x0 0x8)
|
|
group.word ($2+0x802)++0x1
|
|
line.word 0x0 "MBCCFR$1,Message Buffer Cycle Counter Filter Register"
|
|
bitfld.word 0x0 15. "MTM,Message Buffer Transmission Mode" "0: Event transmission mode,1: State transmission mode"
|
|
newline
|
|
bitfld.word 0x0 14. "CHA,Channel Assignment" "0,1"
|
|
newline
|
|
bitfld.word 0x0 13. "CHB,Channel Assignment" "0,1"
|
|
newline
|
|
bitfld.word 0x0 12. "CCFE,Cycle Counter Filtering Enable" "0: Cycle counter filtering disabled,1: Cycle counter filtering enabled"
|
|
newline
|
|
hexmask.word.byte 0x0 6.--11. 1. "CCFMSK,Cycle Counter Filtering Mask. This field defines the filter mask for the cycle counter filtering."
|
|
newline
|
|
hexmask.word.byte 0x0 0.--5. 1. "CCFVAL,Cycle Counter Filtering Value. This field defines the filter value for the cycle counter filtering."
|
|
repeat.end
|
|
repeat 128. (increment 0x0 0x1)(increment 0x0 0x8)
|
|
group.word ($2+0x804)++0x1
|
|
line.word 0x0 "MBFIDR$1,Message Buffer Frame ID Register"
|
|
hexmask.word 0x0 0.--10. 1. "FID,Frame ID"
|
|
repeat.end
|
|
repeat 128. (increment 0x0 0x1)(increment 0x0 0x8)
|
|
group.word ($2+0x806)++0x1
|
|
line.word 0x0 "MBIDXR$1,Message Buffer Index Register"
|
|
hexmask.word.byte 0x0 0.--7. 1. "MBIDX,Message Buffer Index"
|
|
repeat.end
|
|
repeat 132. (increment 0x0 0x1)(increment 0x0 0x2)
|
|
group.word ($2+0x1000)++0x1
|
|
line.word 0x0 "MBDOR$1,Message Buffer Data Field Offset Register"
|
|
hexmask.word 0x0 0.--15. 1. "MBDO,Message Buffer Data Field Offset"
|
|
repeat.end
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x2)
|
|
group.word ($2+0x1108)++0x1
|
|
line.word 0x0 "LEETR$1,LRAM ECC Error Test Register"
|
|
hexmask.word 0x0 0.--15. 1. "LEETD,LRAM ECC Error Test Data"
|
|
repeat.end
|
|
tree.end
|
|
tree "FTM (FlexTimer Module)"
|
|
base ad:0x0
|
|
tree "FTM_0"
|
|
base ad:0x4004F000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "SC,Status And Control"
|
|
rbitfld.long 0x0 7. "TOF,Timer Overflow Flag" "0: FTM counter has not overflowed.,1: FTM counter has overflowed."
|
|
bitfld.long 0x0 6. "TOIE,Timer Overflow Interrupt Enable" "0: Disable TOF interrupts. Use software polling.,1: Enable TOF interrupts. An interrupt is generated.."
|
|
newline
|
|
bitfld.long 0x0 5. "CPWMS,Center-Aligned PWM Select" "0: FTM counter operates in Up Counting mode.,1: FTM counter operates in Up-Down Counting mode."
|
|
bitfld.long 0x0 3.--4. "CLKS,Clock Source Selection" "0: No clock selected. This in effect disables the..,1: System clock,?,3: External clock"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "PS,Prescale Factor Selection" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128"
|
|
line.long 0x4 "CNT,Counter"
|
|
hexmask.long.word 0x4 0.--15. 1. "COUNT,Counter Value"
|
|
line.long 0x8 "MOD,Modulo"
|
|
hexmask.long.word 0x8 0.--15. 1. "MOD,Modulo Value"
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x8)
|
|
group.long ($2+0xC)++0x3
|
|
line.long 0x0 "C$1SC,Channel (n) Status And Control"
|
|
rbitfld.long 0x0 7. "CHF,Channel Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
bitfld.long 0x0 6. "CHIE,Channel Interrupt Enable" "0: Disable channel interrupts. Use software polling.,1: Enable channel interrupts."
|
|
newline
|
|
bitfld.long 0x0 5. "MSB,Channel Mode Select" "0,1"
|
|
bitfld.long 0x0 4. "MSA,Channel Mode Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "ELSB,Edge or Level Select" "0,1"
|
|
bitfld.long 0x0 2. "ELSA,Edge or Level Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.."
|
|
bitfld.long 0x0 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers."
|
|
repeat.end
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x8)
|
|
group.long ($2+0x10)++0x3
|
|
line.long 0x0 "C$1V,Channel (n) Value"
|
|
hexmask.long.word 0x0 0.--15. 1. "VAL,Channel Value"
|
|
repeat.end
|
|
group.long 0x4C++0x3
|
|
line.long 0x0 "CNTIN,Counter Initial Value"
|
|
hexmask.long.word 0x0 0.--15. 1. "INIT,Initial Value Of The FTM Counter"
|
|
rgroup.long 0x50++0x3
|
|
line.long 0x0 "STATUS,Capture And Compare Status"
|
|
bitfld.long 0x0 7. "CH7F,Channel 7 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
bitfld.long 0x0 6. "CH6F,Channel 6 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
newline
|
|
bitfld.long 0x0 5. "CH5F,Channel 5 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
bitfld.long 0x0 4. "CH4F,Channel 4 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
newline
|
|
bitfld.long 0x0 3. "CH3F,Channel 3 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
bitfld.long 0x0 2. "CH2F,Channel 2 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
newline
|
|
bitfld.long 0x0 1. "CH1F,Channel 1 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
bitfld.long 0x0 0. "CH0F,Channel 0 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
group.long 0x54++0x27
|
|
line.long 0x0 "MODE,Features Mode Selection"
|
|
bitfld.long 0x0 4. "CAPTEST,Capture Test Mode Enable" "0: Capture test mode is disabled.,1: Capture test mode is enabled."
|
|
bitfld.long 0x0 3. "PWMSYNC,PWM Synchronization Mode" "0: No restrictions. Software and hardware triggers..,1: Software trigger can only be used by MOD and CnV.."
|
|
newline
|
|
bitfld.long 0x0 2. "WPDIS,Write Protection Disable" "0: Write protection is enabled.,1: Write protection is disabled."
|
|
bitfld.long 0x0 1. "INIT,Initialize The Channels Output" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "FTMEN,FTM Enable" "0: TPM compatibility. Free running counter and..,1: Free running counter and synchronization are.."
|
|
line.long 0x4 "SYNC,Synchronization"
|
|
bitfld.long 0x4 7. "SWSYNC,PWM Synchronization Software Trigger" "0: Software trigger is not selected.,1: Software trigger is selected."
|
|
bitfld.long 0x4 6. "TRIG2,PWM Synchronization Hardware Trigger 2" "0: Trigger is disabled.,1: Trigger is enabled."
|
|
newline
|
|
bitfld.long 0x4 5. "TRIG1,PWM Synchronization Hardware Trigger 1" "0: Trigger is disabled.,1: Trigger is enabled."
|
|
bitfld.long 0x4 4. "TRIG0,PWM Synchronization Hardware Trigger 0" "0: Trigger is disabled.,1: Trigger is enabled."
|
|
newline
|
|
bitfld.long 0x4 3. "SYNCHOM,Output Mask Synchronization" "0: OUTMASK register is updated with the value of..,1: OUTMASK register is updated with the value of.."
|
|
bitfld.long 0x4 2. "REINIT,FTM Counter Reinitialization By Synchronization (FTM counter synchronization)" "0: FTM counter continues to count normally.,1: FTM counter is updated with its initial value.."
|
|
newline
|
|
bitfld.long 0x4 1. "CNTMAX,Maximum Loading Point Enable" "0: The maximum loading point is disabled.,1: The maximum loading point is enabled."
|
|
bitfld.long 0x4 0. "CNTMIN,Minimum Loading Point Enable" "0: The minimum loading point is disabled.,1: The minimum loading point is enabled."
|
|
line.long 0x8 "OUTINIT,Initial State For Channels Output"
|
|
bitfld.long 0x8 7. "CH7OI,Channel 7 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
bitfld.long 0x8 6. "CH6OI,Channel 6 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
newline
|
|
bitfld.long 0x8 5. "CH5OI,Channel 5 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
bitfld.long 0x8 4. "CH4OI,Channel 4 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
newline
|
|
bitfld.long 0x8 3. "CH3OI,Channel 3 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
bitfld.long 0x8 2. "CH2OI,Channel 2 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
newline
|
|
bitfld.long 0x8 1. "CH1OI,Channel 1 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
bitfld.long 0x8 0. "CH0OI,Channel 0 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
line.long 0xC "OUTMASK,Output Mask"
|
|
bitfld.long 0xC 7. "CH7OM,Channel 7 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
bitfld.long 0xC 6. "CH6OM,Channel 6 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
newline
|
|
bitfld.long 0xC 5. "CH5OM,Channel 5 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
bitfld.long 0xC 4. "CH4OM,Channel 4 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
newline
|
|
bitfld.long 0xC 3. "CH3OM,Channel 3 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
bitfld.long 0xC 2. "CH2OM,Channel 2 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
newline
|
|
bitfld.long 0xC 1. "CH1OM,Channel 1 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
bitfld.long 0xC 0. "CH0OM,Channel 0 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
line.long 0x10 "COMBINE,Function For Linked Channels"
|
|
bitfld.long 0x10 29. "SYNCEN3,Synchronization Enable For n = 6" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.."
|
|
bitfld.long 0x10 28. "DTEN3,Deadtime Enable For n = 6" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.."
|
|
newline
|
|
bitfld.long 0x10 27. "DECAP3,Dual Edge Capture Mode Captures For n = 6" "0: The dual edge captures are inactive.,1: The dual edge captures are active."
|
|
bitfld.long 0x10 26. "DECAPEN3,Dual Edge Capture Mode Enable For n = 6" "0: The Dual Edge Capture mode in this pair of..,1: The Dual Edge Capture mode in this pair of.."
|
|
newline
|
|
bitfld.long 0x10 25. "COMP3,Complement Of Channel (n) for n = 6" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.."
|
|
bitfld.long 0x10 24. "COMBINE3,Combine Channels For n = 6" "0: Channels (n) and (n+1) are independent.,1: Channels (n) and (n+1) are combined."
|
|
newline
|
|
bitfld.long 0x10 21. "SYNCEN2,Synchronization Enable For n = 4" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.."
|
|
bitfld.long 0x10 20. "DTEN2,Deadtime Enable For n = 4" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.."
|
|
newline
|
|
bitfld.long 0x10 19. "DECAP2,Dual Edge Capture Mode Captures For n = 4" "0: The dual edge captures are inactive.,1: The dual edge captures are active."
|
|
bitfld.long 0x10 18. "DECAPEN2,Dual Edge Capture Mode Enable For n = 4" "0: The Dual Edge Capture mode in this pair of..,1: The Dual Edge Capture mode in this pair of.."
|
|
newline
|
|
bitfld.long 0x10 17. "COMP2,Complement Of Channel (n) For n = 4" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.."
|
|
bitfld.long 0x10 16. "COMBINE2,Combine Channels For n = 4" "0: Channels (n) and (n+1) are independent.,1: Channels (n) and (n+1) are combined."
|
|
newline
|
|
bitfld.long 0x10 13. "SYNCEN1,Synchronization Enable For n = 2" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.."
|
|
bitfld.long 0x10 12. "DTEN1,Deadtime Enable For n = 2" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.."
|
|
newline
|
|
bitfld.long 0x10 11. "DECAP1,Dual Edge Capture Mode Captures For n = 2" "0: The dual edge captures are inactive.,1: The dual edge captures are active."
|
|
bitfld.long 0x10 10. "DECAPEN1,Dual Edge Capture Mode Enable For n = 2" "0: The Dual Edge Capture mode in this pair of..,1: The Dual Edge Capture mode in this pair of.."
|
|
newline
|
|
bitfld.long 0x10 9. "COMP1,Complement Of Channel (n) For n = 2" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.."
|
|
bitfld.long 0x10 8. "COMBINE1,Combine Channels For n = 2" "0: Channels (n) and (n+1) are independent.,1: Channels (n) and (n+1) are combined."
|
|
newline
|
|
bitfld.long 0x10 5. "SYNCEN0,Synchronization Enable For n = 0" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.."
|
|
bitfld.long 0x10 4. "DTEN0,Deadtime Enable For n = 0" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.."
|
|
newline
|
|
bitfld.long 0x10 3. "DECAP0,Dual Edge Capture Mode Captures For n = 0" "0: The dual edge captures are inactive.,1: The dual edge captures are active."
|
|
bitfld.long 0x10 2. "DECAPEN0,Dual Edge Capture Mode Enable For n = 0" "0: The Dual Edge Capture mode in this pair of..,1: The Dual Edge Capture mode in this pair of.."
|
|
newline
|
|
bitfld.long 0x10 1. "COMP0,Complement Of Channel (n) For n = 0" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.."
|
|
bitfld.long 0x10 0. "COMBINE0,Combine Channels For n = 0" "0: Channels (n) and (n+1) are independent.,1: Channels (n) and (n+1) are combined."
|
|
line.long 0x14 "DEADTIME,Deadtime Insertion Control"
|
|
bitfld.long 0x14 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the system clock by 1.,1: Divide the system clock by 1.,2: Divide the system clock by 4.,3: Divide the system clock by 16."
|
|
hexmask.long.byte 0x14 0.--5. 1. "DTVAL,Deadtime Value"
|
|
line.long 0x18 "EXTTRIG,FTM External Trigger"
|
|
rbitfld.long 0x18 7. "TRIGF,Channel Trigger Flag" "0: No channel trigger was generated.,1: A channel trigger was generated."
|
|
bitfld.long 0x18 6. "INITTRIGEN,Initialization Trigger Enable" "0: The generation of initialization trigger is..,1: The generation of initialization trigger is.."
|
|
newline
|
|
bitfld.long 0x18 5. "CH1TRIG,Channel 1 Trigger Enable" "0: The generation of the channel trigger is disabled.,1: The generation of the channel trigger is enabled."
|
|
bitfld.long 0x18 4. "CH0TRIG,Channel 0 Trigger Enable" "0: The generation of the channel trigger is disabled.,1: The generation of the channel trigger is enabled."
|
|
newline
|
|
bitfld.long 0x18 3. "CH5TRIG,Channel 5 Trigger Enable" "0: The generation of the channel trigger is disabled.,1: The generation of the channel trigger is enabled."
|
|
bitfld.long 0x18 2. "CH4TRIG,Channel 4 Trigger Enable" "0: The generation of the channel trigger is disabled.,1: The generation of the channel trigger is enabled."
|
|
newline
|
|
bitfld.long 0x18 1. "CH3TRIG,Channel 3 Trigger Enable" "0: The generation of the channel trigger is disabled.,1: The generation of the channel trigger is enabled."
|
|
bitfld.long 0x18 0. "CH2TRIG,Channel 2 Trigger Enable" "0: The generation of the channel trigger is disabled.,1: The generation of the channel trigger is enabled."
|
|
line.long 0x1C "POL,Channels Polarity"
|
|
bitfld.long 0x1C 7. "POL7,Channel 7 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
bitfld.long 0x1C 6. "POL6,Channel 6 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
newline
|
|
bitfld.long 0x1C 5. "POL5,Channel 5 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
bitfld.long 0x1C 4. "POL4,Channel 4 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
newline
|
|
bitfld.long 0x1C 3. "POL3,Channel 3 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
bitfld.long 0x1C 2. "POL2,Channel 2 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
newline
|
|
bitfld.long 0x1C 1. "POL1,Channel 1 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
bitfld.long 0x1C 0. "POL0,Channel 0 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
line.long 0x20 "FMS,Fault Mode Status"
|
|
bitfld.long 0x20 6. "WPEN,Write Protection Enable" "0: Write protection is disabled. Write protected..,1: Write protection is enabled. Write protected.."
|
|
line.long 0x24 "FILTER,Input Capture Filter Control"
|
|
hexmask.long.byte 0x24 12.--15. 1. "CH3FVAL,Channel 3 Input Filter"
|
|
hexmask.long.byte 0x24 8.--11. 1. "CH2FVAL,Channel 2 Input Filter"
|
|
newline
|
|
hexmask.long.byte 0x24 4.--7. 1. "CH1FVAL,Channel 1 Input Filter"
|
|
hexmask.long.byte 0x24 0.--3. 1. "CH0FVAL,Channel 0 Input Filter"
|
|
group.long 0x80++0x7
|
|
line.long 0x0 "QDCTRL,Quadrature Decoder Control And Status"
|
|
bitfld.long 0x0 7. "PHAFLTREN,Phase A Input Filter Enable" "0: Phase A input filter is disabled.,1: Phase A input filter is enabled."
|
|
bitfld.long 0x0 6. "PHBFLTREN,Phase B Input Filter Enable" "0: Phase B input filter is disabled.,1: Phase B input filter is enabled."
|
|
newline
|
|
bitfld.long 0x0 5. "PHAPOL,Phase A Input Polarity" "0: Normal polarity. Phase A input signal is not..,1: Inverted polarity. Phase A input signal is.."
|
|
bitfld.long 0x0 4. "PHBPOL,Phase B Input Polarity" "0: Normal polarity. Phase B input signal is not..,1: Inverted polarity. Phase B input signal is.."
|
|
newline
|
|
bitfld.long 0x0 3. "QUADMODE,Quadrature Decoder Mode" "0: Phase A and phase B encoding mode.,1: Count and direction encoding mode."
|
|
rbitfld.long 0x0 2. "QUADIR,FTM Counter Direction In Quadrature Decoder Mode" "0: Counting direction is decreasing (FTM counter..,1: Counting direction is increasing (FTM counter.."
|
|
newline
|
|
rbitfld.long 0x0 1. "TOFDIR,Timer Overflow Direction In Quadrature Decoder Mode" "0: TOF bit was set on the bottom of counting. There..,1: TOF bit was set on the top of counting. There.."
|
|
bitfld.long 0x0 0. "QUADEN,Quadrature Decoder Mode Enable" "0: Quadrature Decoder mode is disabled.,1: Quadrature Decoder mode is enabled."
|
|
line.long 0x4 "CONF,Configuration"
|
|
bitfld.long 0x4 10. "GTBEOUT,Global Time Base Output" "0: A global time base signal generation is disabled.,1: A global time base signal generation is enabled."
|
|
bitfld.long 0x4 9. "GTBEEN,Global Time Base Enable" "0: Use of an external global time base is disabled.,1: Use of an external global time base is enabled."
|
|
newline
|
|
bitfld.long 0x4 6.--7. "BDMMODE,BDM Mode" "0,1,2,3"
|
|
hexmask.long.byte 0x4 0.--4. 1. "NUMTOF,TOF Frequency"
|
|
group.long 0x8C++0xF
|
|
line.long 0x0 "SYNCONF,Synchronization Configuration"
|
|
bitfld.long 0x0 20. "HWSOC,Software output control synchronization is activated by a hardware trigger." "0: A hardware trigger does not activate the SWOCTRL..,1: A hardware trigger activates the SWOCTRL.."
|
|
bitfld.long 0x0 19. "HWINVC,Inverting control synchronization is activated by a hardware trigger." "0: A hardware trigger does not activate the INVCTRL..,1: A hardware trigger activates the INVCTRL.."
|
|
newline
|
|
bitfld.long 0x0 18. "HWOM,Output mask synchronization is activated by a hardware trigger." "0: A hardware trigger does not activate the OUTMASK..,1: A hardware trigger activates the OUTMASK.."
|
|
bitfld.long 0x0 17. "HWWRBUF,MOD CNTIN and CV registers synchronization is activated by a hardware trigger." "0: A hardware trigger does not activate MOD CNTIN..,1: A hardware trigger activates MOD CNTIN and CV.."
|
|
newline
|
|
bitfld.long 0x0 16. "HWRSTCNT,FTM counter synchronization is activated by a hardware trigger." "0: A hardware trigger does not activate the FTM..,1: A hardware trigger activates the FTM counter.."
|
|
bitfld.long 0x0 12. "SWSOC,Software output control synchronization is activated by the software trigger." "0: The software trigger does not activate the..,1: The software trigger activates the SWOCTRL.."
|
|
newline
|
|
bitfld.long 0x0 11. "SWINVC,Inverting control synchronization is activated by the software trigger." "0: The software trigger does not activate the..,1: The software trigger activates the INVCTRL.."
|
|
bitfld.long 0x0 10. "SWOM,Output mask synchronization is activated by the software trigger." "0: The software trigger does not activate the..,1: The software trigger activates the OUTMASK.."
|
|
newline
|
|
bitfld.long 0x0 9. "SWWRBUF,MOD CNTIN and CV registers synchronization is activated by the software trigger." "0: The software trigger does not activate MOD CNTIN..,1: The software trigger activates MOD CNTIN and CV.."
|
|
bitfld.long 0x0 8. "SWRSTCNT,FTM counter synchronization is activated by the software trigger." "0: The software trigger does not activate the FTM..,1: The software trigger activates the FTM counter.."
|
|
newline
|
|
bitfld.long 0x0 7. "SYNCMODE,Synchronization Mode" "0: Legacy PWM synchronization is selected.,1: Enhanced PWM synchronization is selected."
|
|
bitfld.long 0x0 5. "SWOC,SWOCTRL Register Synchronization" "0: SWOCTRL register is updated with its buffer..,1: SWOCTRL register is updated with its buffer.."
|
|
newline
|
|
bitfld.long 0x0 4. "INVC,INVCTRL Register Synchronization" "0: INVCTRL register is updated with its buffer..,1: INVCTRL register is updated with its buffer.."
|
|
bitfld.long 0x0 2. "CNTINC,CNTIN Register Synchronization" "0: CNTIN register is updated with its buffer value..,1: CNTIN register is updated with its buffer value.."
|
|
newline
|
|
bitfld.long 0x0 0. "HWTRIGMODE,Hardware Trigger Mode" "0: FTM clears the TRIGj bit when the hardware..,1: FTM does not clear the TRIGj bit when the.."
|
|
line.long 0x4 "INVCTRL,FTM Inverting Control"
|
|
bitfld.long 0x4 3. "INV3EN,Pair Channels 3 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled."
|
|
bitfld.long 0x4 2. "INV2EN,Pair Channels 2 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled."
|
|
newline
|
|
bitfld.long 0x4 1. "INV1EN,Pair Channels 1 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled."
|
|
bitfld.long 0x4 0. "INV0EN,Pair Channels 0 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled."
|
|
line.long 0x8 "SWOCTRL,FTM Software Output Control"
|
|
bitfld.long 0x8 15. "CH7OCV,Channel 7 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
bitfld.long 0x8 14. "CH6OCV,Channel 6 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
newline
|
|
bitfld.long 0x8 13. "CH5OCV,Channel 5 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
bitfld.long 0x8 12. "CH4OCV,Channel 4 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
newline
|
|
bitfld.long 0x8 11. "CH3OCV,Channel 3 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
bitfld.long 0x8 10. "CH2OCV,Channel 2 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
newline
|
|
bitfld.long 0x8 9. "CH1OCV,Channel 1 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
bitfld.long 0x8 8. "CH0OCV,Channel 0 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
newline
|
|
bitfld.long 0x8 7. "CH7OC,Channel 7 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
bitfld.long 0x8 6. "CH6OC,Channel 6 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
newline
|
|
bitfld.long 0x8 5. "CH5OC,Channel 5 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
bitfld.long 0x8 4. "CH4OC,Channel 4 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
newline
|
|
bitfld.long 0x8 3. "CH3OC,Channel 3 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
bitfld.long 0x8 2. "CH2OC,Channel 2 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
newline
|
|
bitfld.long 0x8 1. "CH1OC,Channel 1 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
bitfld.long 0x8 0. "CH0OC,Channel 0 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
line.long 0xC "PWMLOAD,FTM PWM Load"
|
|
bitfld.long 0xC 9. "LDOK,Load Enable" "0: Loading updated values is disabled.,1: Loading updated values is enabled."
|
|
bitfld.long 0xC 7. "CH7SEL,Channel 7 Select" "0: Do not include the channel in the matching..,1: Include the channel in the matching process."
|
|
newline
|
|
bitfld.long 0xC 6. "CH6SEL,Channel 6 Select" "0: Do not include the channel in the matching..,1: Include the channel in the matching process."
|
|
bitfld.long 0xC 5. "CH5SEL,Channel 5 Select" "0: Do not include the channel in the matching..,1: Include the channel in the matching process."
|
|
newline
|
|
bitfld.long 0xC 4. "CH4SEL,Channel 4 Select" "0: Do not include the channel in the matching..,1: Include the channel in the matching process."
|
|
bitfld.long 0xC 3. "CH3SEL,Channel 3 Select" "0: Do not include the channel in the matching..,1: Include the channel in the matching process."
|
|
newline
|
|
bitfld.long 0xC 2. "CH2SEL,Channel 2 Select" "0: Do not include the channel in the matching..,1: Include the channel in the matching process."
|
|
bitfld.long 0xC 1. "CH1SEL,Channel 1 Select" "0: Do not include the channel in the matching..,1: Include the channel in the matching process."
|
|
newline
|
|
bitfld.long 0xC 0. "CH0SEL,Channel 0 Select" "0: Do not include the channel in the matching..,1: Include the channel in the matching process."
|
|
tree.end
|
|
tree "FTM_1"
|
|
base ad:0x400B6000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "SC,Status And Control"
|
|
rbitfld.long 0x0 7. "TOF,Timer Overflow Flag" "0: FTM counter has not overflowed.,1: FTM counter has overflowed."
|
|
bitfld.long 0x0 6. "TOIE,Timer Overflow Interrupt Enable" "0: Disable TOF interrupts. Use software polling.,1: Enable TOF interrupts. An interrupt is generated.."
|
|
newline
|
|
bitfld.long 0x0 5. "CPWMS,Center-Aligned PWM Select" "0: FTM counter operates in Up Counting mode.,1: FTM counter operates in Up-Down Counting mode."
|
|
bitfld.long 0x0 3.--4. "CLKS,Clock Source Selection" "0: No clock selected. This in effect disables the..,1: System clock,?,3: External clock"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "PS,Prescale Factor Selection" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128"
|
|
line.long 0x4 "CNT,Counter"
|
|
hexmask.long.word 0x4 0.--15. 1. "COUNT,Counter Value"
|
|
line.long 0x8 "MOD,Modulo"
|
|
hexmask.long.word 0x8 0.--15. 1. "MOD,Modulo Value"
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x8)
|
|
group.long ($2+0xC)++0x3
|
|
line.long 0x0 "C$1SC,Channel (n) Status And Control"
|
|
rbitfld.long 0x0 7. "CHF,Channel Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
bitfld.long 0x0 6. "CHIE,Channel Interrupt Enable" "0: Disable channel interrupts. Use software polling.,1: Enable channel interrupts."
|
|
newline
|
|
bitfld.long 0x0 5. "MSB,Channel Mode Select" "0,1"
|
|
bitfld.long 0x0 4. "MSA,Channel Mode Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "ELSB,Edge or Level Select" "0,1"
|
|
bitfld.long 0x0 2. "ELSA,Edge or Level Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.."
|
|
bitfld.long 0x0 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers."
|
|
repeat.end
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x8)
|
|
group.long ($2+0x10)++0x3
|
|
line.long 0x0 "C$1V,Channel (n) Value"
|
|
hexmask.long.word 0x0 0.--15. 1. "VAL,Channel Value"
|
|
repeat.end
|
|
group.long 0x4C++0x3
|
|
line.long 0x0 "CNTIN,Counter Initial Value"
|
|
hexmask.long.word 0x0 0.--15. 1. "INIT,Initial Value Of The FTM Counter"
|
|
rgroup.long 0x50++0x3
|
|
line.long 0x0 "STATUS,Capture And Compare Status"
|
|
bitfld.long 0x0 7. "CH7F,Channel 7 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
bitfld.long 0x0 6. "CH6F,Channel 6 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
newline
|
|
bitfld.long 0x0 5. "CH5F,Channel 5 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
bitfld.long 0x0 4. "CH4F,Channel 4 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
newline
|
|
bitfld.long 0x0 3. "CH3F,Channel 3 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
bitfld.long 0x0 2. "CH2F,Channel 2 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
newline
|
|
bitfld.long 0x0 1. "CH1F,Channel 1 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
bitfld.long 0x0 0. "CH0F,Channel 0 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
group.long 0x54++0x27
|
|
line.long 0x0 "MODE,Features Mode Selection"
|
|
bitfld.long 0x0 4. "CAPTEST,Capture Test Mode Enable" "0: Capture test mode is disabled.,1: Capture test mode is enabled."
|
|
bitfld.long 0x0 3. "PWMSYNC,PWM Synchronization Mode" "0: No restrictions. Software and hardware triggers..,1: Software trigger can only be used by MOD and CnV.."
|
|
newline
|
|
bitfld.long 0x0 2. "WPDIS,Write Protection Disable" "0: Write protection is enabled.,1: Write protection is disabled."
|
|
bitfld.long 0x0 1. "INIT,Initialize The Channels Output" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "FTMEN,FTM Enable" "0: TPM compatibility. Free running counter and..,1: Free running counter and synchronization are.."
|
|
line.long 0x4 "SYNC,Synchronization"
|
|
bitfld.long 0x4 7. "SWSYNC,PWM Synchronization Software Trigger" "0: Software trigger is not selected.,1: Software trigger is selected."
|
|
bitfld.long 0x4 6. "TRIG2,PWM Synchronization Hardware Trigger 2" "0: Trigger is disabled.,1: Trigger is enabled."
|
|
newline
|
|
bitfld.long 0x4 5. "TRIG1,PWM Synchronization Hardware Trigger 1" "0: Trigger is disabled.,1: Trigger is enabled."
|
|
bitfld.long 0x4 4. "TRIG0,PWM Synchronization Hardware Trigger 0" "0: Trigger is disabled.,1: Trigger is enabled."
|
|
newline
|
|
bitfld.long 0x4 3. "SYNCHOM,Output Mask Synchronization" "0: OUTMASK register is updated with the value of..,1: OUTMASK register is updated with the value of.."
|
|
bitfld.long 0x4 2. "REINIT,FTM Counter Reinitialization By Synchronization (FTM counter synchronization)" "0: FTM counter continues to count normally.,1: FTM counter is updated with its initial value.."
|
|
newline
|
|
bitfld.long 0x4 1. "CNTMAX,Maximum Loading Point Enable" "0: The maximum loading point is disabled.,1: The maximum loading point is enabled."
|
|
bitfld.long 0x4 0. "CNTMIN,Minimum Loading Point Enable" "0: The minimum loading point is disabled.,1: The minimum loading point is enabled."
|
|
line.long 0x8 "OUTINIT,Initial State For Channels Output"
|
|
bitfld.long 0x8 7. "CH7OI,Channel 7 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
bitfld.long 0x8 6. "CH6OI,Channel 6 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
newline
|
|
bitfld.long 0x8 5. "CH5OI,Channel 5 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
bitfld.long 0x8 4. "CH4OI,Channel 4 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
newline
|
|
bitfld.long 0x8 3. "CH3OI,Channel 3 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
bitfld.long 0x8 2. "CH2OI,Channel 2 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
newline
|
|
bitfld.long 0x8 1. "CH1OI,Channel 1 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
bitfld.long 0x8 0. "CH0OI,Channel 0 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
line.long 0xC "OUTMASK,Output Mask"
|
|
bitfld.long 0xC 7. "CH7OM,Channel 7 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
bitfld.long 0xC 6. "CH6OM,Channel 6 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
newline
|
|
bitfld.long 0xC 5. "CH5OM,Channel 5 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
bitfld.long 0xC 4. "CH4OM,Channel 4 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
newline
|
|
bitfld.long 0xC 3. "CH3OM,Channel 3 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
bitfld.long 0xC 2. "CH2OM,Channel 2 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
newline
|
|
bitfld.long 0xC 1. "CH1OM,Channel 1 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
bitfld.long 0xC 0. "CH0OM,Channel 0 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
line.long 0x10 "COMBINE,Function For Linked Channels"
|
|
bitfld.long 0x10 29. "SYNCEN3,Synchronization Enable For n = 6" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.."
|
|
bitfld.long 0x10 28. "DTEN3,Deadtime Enable For n = 6" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.."
|
|
newline
|
|
bitfld.long 0x10 27. "DECAP3,Dual Edge Capture Mode Captures For n = 6" "0: The dual edge captures are inactive.,1: The dual edge captures are active."
|
|
bitfld.long 0x10 26. "DECAPEN3,Dual Edge Capture Mode Enable For n = 6" "0: The Dual Edge Capture mode in this pair of..,1: The Dual Edge Capture mode in this pair of.."
|
|
newline
|
|
bitfld.long 0x10 25. "COMP3,Complement Of Channel (n) for n = 6" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.."
|
|
bitfld.long 0x10 24. "COMBINE3,Combine Channels For n = 6" "0: Channels (n) and (n+1) are independent.,1: Channels (n) and (n+1) are combined."
|
|
newline
|
|
bitfld.long 0x10 21. "SYNCEN2,Synchronization Enable For n = 4" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.."
|
|
bitfld.long 0x10 20. "DTEN2,Deadtime Enable For n = 4" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.."
|
|
newline
|
|
bitfld.long 0x10 19. "DECAP2,Dual Edge Capture Mode Captures For n = 4" "0: The dual edge captures are inactive.,1: The dual edge captures are active."
|
|
bitfld.long 0x10 18. "DECAPEN2,Dual Edge Capture Mode Enable For n = 4" "0: The Dual Edge Capture mode in this pair of..,1: The Dual Edge Capture mode in this pair of.."
|
|
newline
|
|
bitfld.long 0x10 17. "COMP2,Complement Of Channel (n) For n = 4" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.."
|
|
bitfld.long 0x10 16. "COMBINE2,Combine Channels For n = 4" "0: Channels (n) and (n+1) are independent.,1: Channels (n) and (n+1) are combined."
|
|
newline
|
|
bitfld.long 0x10 13. "SYNCEN1,Synchronization Enable For n = 2" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.."
|
|
bitfld.long 0x10 12. "DTEN1,Deadtime Enable For n = 2" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.."
|
|
newline
|
|
bitfld.long 0x10 11. "DECAP1,Dual Edge Capture Mode Captures For n = 2" "0: The dual edge captures are inactive.,1: The dual edge captures are active."
|
|
bitfld.long 0x10 10. "DECAPEN1,Dual Edge Capture Mode Enable For n = 2" "0: The Dual Edge Capture mode in this pair of..,1: The Dual Edge Capture mode in this pair of.."
|
|
newline
|
|
bitfld.long 0x10 9. "COMP1,Complement Of Channel (n) For n = 2" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.."
|
|
bitfld.long 0x10 8. "COMBINE1,Combine Channels For n = 2" "0: Channels (n) and (n+1) are independent.,1: Channels (n) and (n+1) are combined."
|
|
newline
|
|
bitfld.long 0x10 5. "SYNCEN0,Synchronization Enable For n = 0" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.."
|
|
bitfld.long 0x10 4. "DTEN0,Deadtime Enable For n = 0" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.."
|
|
newline
|
|
bitfld.long 0x10 3. "DECAP0,Dual Edge Capture Mode Captures For n = 0" "0: The dual edge captures are inactive.,1: The dual edge captures are active."
|
|
bitfld.long 0x10 2. "DECAPEN0,Dual Edge Capture Mode Enable For n = 0" "0: The Dual Edge Capture mode in this pair of..,1: The Dual Edge Capture mode in this pair of.."
|
|
newline
|
|
bitfld.long 0x10 1. "COMP0,Complement Of Channel (n) For n = 0" "0: The channel (n+1) output is the same as the..,1: The channel (n+1) output is the complement of.."
|
|
bitfld.long 0x10 0. "COMBINE0,Combine Channels For n = 0" "0: Channels (n) and (n+1) are independent.,1: Channels (n) and (n+1) are combined."
|
|
line.long 0x14 "DEADTIME,Deadtime Insertion Control"
|
|
bitfld.long 0x14 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the system clock by 1.,1: Divide the system clock by 1.,2: Divide the system clock by 4.,3: Divide the system clock by 16."
|
|
hexmask.long.byte 0x14 0.--5. 1. "DTVAL,Deadtime Value"
|
|
line.long 0x18 "EXTTRIG,FTM External Trigger"
|
|
rbitfld.long 0x18 7. "TRIGF,Channel Trigger Flag" "0: No channel trigger was generated.,1: A channel trigger was generated."
|
|
bitfld.long 0x18 6. "INITTRIGEN,Initialization Trigger Enable" "0: The generation of initialization trigger is..,1: The generation of initialization trigger is.."
|
|
newline
|
|
bitfld.long 0x18 5. "CH1TRIG,Channel 1 Trigger Enable" "0: The generation of the channel trigger is disabled.,1: The generation of the channel trigger is enabled."
|
|
bitfld.long 0x18 4. "CH0TRIG,Channel 0 Trigger Enable" "0: The generation of the channel trigger is disabled.,1: The generation of the channel trigger is enabled."
|
|
newline
|
|
bitfld.long 0x18 3. "CH5TRIG,Channel 5 Trigger Enable" "0: The generation of the channel trigger is disabled.,1: The generation of the channel trigger is enabled."
|
|
bitfld.long 0x18 2. "CH4TRIG,Channel 4 Trigger Enable" "0: The generation of the channel trigger is disabled.,1: The generation of the channel trigger is enabled."
|
|
newline
|
|
bitfld.long 0x18 1. "CH3TRIG,Channel 3 Trigger Enable" "0: The generation of the channel trigger is disabled.,1: The generation of the channel trigger is enabled."
|
|
bitfld.long 0x18 0. "CH2TRIG,Channel 2 Trigger Enable" "0: The generation of the channel trigger is disabled.,1: The generation of the channel trigger is enabled."
|
|
line.long 0x1C "POL,Channels Polarity"
|
|
bitfld.long 0x1C 7. "POL7,Channel 7 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
bitfld.long 0x1C 6. "POL6,Channel 6 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
newline
|
|
bitfld.long 0x1C 5. "POL5,Channel 5 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
bitfld.long 0x1C 4. "POL4,Channel 4 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
newline
|
|
bitfld.long 0x1C 3. "POL3,Channel 3 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
bitfld.long 0x1C 2. "POL2,Channel 2 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
newline
|
|
bitfld.long 0x1C 1. "POL1,Channel 1 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
bitfld.long 0x1C 0. "POL0,Channel 0 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
line.long 0x20 "FMS,Fault Mode Status"
|
|
bitfld.long 0x20 6. "WPEN,Write Protection Enable" "0: Write protection is disabled. Write protected..,1: Write protection is enabled. Write protected.."
|
|
line.long 0x24 "FILTER,Input Capture Filter Control"
|
|
hexmask.long.byte 0x24 12.--15. 1. "CH3FVAL,Channel 3 Input Filter"
|
|
hexmask.long.byte 0x24 8.--11. 1. "CH2FVAL,Channel 2 Input Filter"
|
|
newline
|
|
hexmask.long.byte 0x24 4.--7. 1. "CH1FVAL,Channel 1 Input Filter"
|
|
hexmask.long.byte 0x24 0.--3. 1. "CH0FVAL,Channel 0 Input Filter"
|
|
group.long 0x80++0x7
|
|
line.long 0x0 "QDCTRL,Quadrature Decoder Control And Status"
|
|
bitfld.long 0x0 7. "PHAFLTREN,Phase A Input Filter Enable" "0: Phase A input filter is disabled.,1: Phase A input filter is enabled."
|
|
bitfld.long 0x0 6. "PHBFLTREN,Phase B Input Filter Enable" "0: Phase B input filter is disabled.,1: Phase B input filter is enabled."
|
|
newline
|
|
bitfld.long 0x0 5. "PHAPOL,Phase A Input Polarity" "0: Normal polarity. Phase A input signal is not..,1: Inverted polarity. Phase A input signal is.."
|
|
bitfld.long 0x0 4. "PHBPOL,Phase B Input Polarity" "0: Normal polarity. Phase B input signal is not..,1: Inverted polarity. Phase B input signal is.."
|
|
newline
|
|
bitfld.long 0x0 3. "QUADMODE,Quadrature Decoder Mode" "0: Phase A and phase B encoding mode.,1: Count and direction encoding mode."
|
|
rbitfld.long 0x0 2. "QUADIR,FTM Counter Direction In Quadrature Decoder Mode" "0: Counting direction is decreasing (FTM counter..,1: Counting direction is increasing (FTM counter.."
|
|
newline
|
|
rbitfld.long 0x0 1. "TOFDIR,Timer Overflow Direction In Quadrature Decoder Mode" "0: TOF bit was set on the bottom of counting. There..,1: TOF bit was set on the top of counting. There.."
|
|
bitfld.long 0x0 0. "QUADEN,Quadrature Decoder Mode Enable" "0: Quadrature Decoder mode is disabled.,1: Quadrature Decoder mode is enabled."
|
|
line.long 0x4 "CONF,Configuration"
|
|
bitfld.long 0x4 10. "GTBEOUT,Global Time Base Output" "0: A global time base signal generation is disabled.,1: A global time base signal generation is enabled."
|
|
bitfld.long 0x4 9. "GTBEEN,Global Time Base Enable" "0: Use of an external global time base is disabled.,1: Use of an external global time base is enabled."
|
|
newline
|
|
bitfld.long 0x4 6.--7. "BDMMODE,BDM Mode" "0,1,2,3"
|
|
hexmask.long.byte 0x4 0.--4. 1. "NUMTOF,TOF Frequency"
|
|
group.long 0x8C++0xF
|
|
line.long 0x0 "SYNCONF,Synchronization Configuration"
|
|
bitfld.long 0x0 20. "HWSOC,Software output control synchronization is activated by a hardware trigger." "0: A hardware trigger does not activate the SWOCTRL..,1: A hardware trigger activates the SWOCTRL.."
|
|
bitfld.long 0x0 19. "HWINVC,Inverting control synchronization is activated by a hardware trigger." "0: A hardware trigger does not activate the INVCTRL..,1: A hardware trigger activates the INVCTRL.."
|
|
newline
|
|
bitfld.long 0x0 18. "HWOM,Output mask synchronization is activated by a hardware trigger." "0: A hardware trigger does not activate the OUTMASK..,1: A hardware trigger activates the OUTMASK.."
|
|
bitfld.long 0x0 17. "HWWRBUF,MOD CNTIN and CV registers synchronization is activated by a hardware trigger." "0: A hardware trigger does not activate MOD CNTIN..,1: A hardware trigger activates MOD CNTIN and CV.."
|
|
newline
|
|
bitfld.long 0x0 16. "HWRSTCNT,FTM counter synchronization is activated by a hardware trigger." "0: A hardware trigger does not activate the FTM..,1: A hardware trigger activates the FTM counter.."
|
|
bitfld.long 0x0 12. "SWSOC,Software output control synchronization is activated by the software trigger." "0: The software trigger does not activate the..,1: The software trigger activates the SWOCTRL.."
|
|
newline
|
|
bitfld.long 0x0 11. "SWINVC,Inverting control synchronization is activated by the software trigger." "0: The software trigger does not activate the..,1: The software trigger activates the INVCTRL.."
|
|
bitfld.long 0x0 10. "SWOM,Output mask synchronization is activated by the software trigger." "0: The software trigger does not activate the..,1: The software trigger activates the OUTMASK.."
|
|
newline
|
|
bitfld.long 0x0 9. "SWWRBUF,MOD CNTIN and CV registers synchronization is activated by the software trigger." "0: The software trigger does not activate MOD CNTIN..,1: The software trigger activates MOD CNTIN and CV.."
|
|
bitfld.long 0x0 8. "SWRSTCNT,FTM counter synchronization is activated by the software trigger." "0: The software trigger does not activate the FTM..,1: The software trigger activates the FTM counter.."
|
|
newline
|
|
bitfld.long 0x0 7. "SYNCMODE,Synchronization Mode" "0: Legacy PWM synchronization is selected.,1: Enhanced PWM synchronization is selected."
|
|
bitfld.long 0x0 5. "SWOC,SWOCTRL Register Synchronization" "0: SWOCTRL register is updated with its buffer..,1: SWOCTRL register is updated with its buffer.."
|
|
newline
|
|
bitfld.long 0x0 4. "INVC,INVCTRL Register Synchronization" "0: INVCTRL register is updated with its buffer..,1: INVCTRL register is updated with its buffer.."
|
|
bitfld.long 0x0 2. "CNTINC,CNTIN Register Synchronization" "0: CNTIN register is updated with its buffer value..,1: CNTIN register is updated with its buffer value.."
|
|
newline
|
|
bitfld.long 0x0 0. "HWTRIGMODE,Hardware Trigger Mode" "0: FTM clears the TRIGj bit when the hardware..,1: FTM does not clear the TRIGj bit when the.."
|
|
line.long 0x4 "INVCTRL,FTM Inverting Control"
|
|
bitfld.long 0x4 3. "INV3EN,Pair Channels 3 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled."
|
|
bitfld.long 0x4 2. "INV2EN,Pair Channels 2 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled."
|
|
newline
|
|
bitfld.long 0x4 1. "INV1EN,Pair Channels 1 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled."
|
|
bitfld.long 0x4 0. "INV0EN,Pair Channels 0 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled."
|
|
line.long 0x8 "SWOCTRL,FTM Software Output Control"
|
|
bitfld.long 0x8 15. "CH7OCV,Channel 7 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
bitfld.long 0x8 14. "CH6OCV,Channel 6 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
newline
|
|
bitfld.long 0x8 13. "CH5OCV,Channel 5 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
bitfld.long 0x8 12. "CH4OCV,Channel 4 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
newline
|
|
bitfld.long 0x8 11. "CH3OCV,Channel 3 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
bitfld.long 0x8 10. "CH2OCV,Channel 2 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
newline
|
|
bitfld.long 0x8 9. "CH1OCV,Channel 1 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
bitfld.long 0x8 8. "CH0OCV,Channel 0 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
newline
|
|
bitfld.long 0x8 7. "CH7OC,Channel 7 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
bitfld.long 0x8 6. "CH6OC,Channel 6 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
newline
|
|
bitfld.long 0x8 5. "CH5OC,Channel 5 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
bitfld.long 0x8 4. "CH4OC,Channel 4 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
newline
|
|
bitfld.long 0x8 3. "CH3OC,Channel 3 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
bitfld.long 0x8 2. "CH2OC,Channel 2 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
newline
|
|
bitfld.long 0x8 1. "CH1OC,Channel 1 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
bitfld.long 0x8 0. "CH0OC,Channel 0 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
line.long 0xC "PWMLOAD,FTM PWM Load"
|
|
bitfld.long 0xC 9. "LDOK,Load Enable" "0: Loading updated values is disabled.,1: Loading updated values is enabled."
|
|
bitfld.long 0xC 7. "CH7SEL,Channel 7 Select" "0: Do not include the channel in the matching..,1: Include the channel in the matching process."
|
|
newline
|
|
bitfld.long 0xC 6. "CH6SEL,Channel 6 Select" "0: Do not include the channel in the matching..,1: Include the channel in the matching process."
|
|
bitfld.long 0xC 5. "CH5SEL,Channel 5 Select" "0: Do not include the channel in the matching..,1: Include the channel in the matching process."
|
|
newline
|
|
bitfld.long 0xC 4. "CH4SEL,Channel 4 Select" "0: Do not include the channel in the matching..,1: Include the channel in the matching process."
|
|
bitfld.long 0xC 3. "CH3SEL,Channel 3 Select" "0: Do not include the channel in the matching..,1: Include the channel in the matching process."
|
|
newline
|
|
bitfld.long 0xC 2. "CH2SEL,Channel 2 Select" "0: Do not include the channel in the matching..,1: Include the channel in the matching process."
|
|
bitfld.long 0xC 1. "CH1SEL,Channel 1 Select" "0: Do not include the channel in the matching..,1: Include the channel in the matching process."
|
|
newline
|
|
bitfld.long 0xC 0. "CH0SEL,Channel 0 Select" "0: Do not include the channel in the matching..,1: Include the channel in the matching process."
|
|
tree.end
|
|
tree.end
|
|
tree "FXOSC (Fast OSC Digital Interface)"
|
|
base ad:0x4003C280
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTL,FXOSC Control Register"
|
|
bitfld.long 0x0 31. "OSCBYP,Crystal Oscillator bypass This bit specifies whether the oscillator should be bypassed or not" "0: Oscillator output is used as root clock.,1: EXTAL is used as root clock."
|
|
bitfld.long 0x0 24. "MISC_IN1,Miscellaneous input 1" "0: Comparator power down mode,1: Comparator enable"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--23. 1. "EOCV,End of Count Value"
|
|
bitfld.long 0x0 15. "M_OSC,Crystal oscillator clock interrupt mask" "0: Crystal oscillator clock interrupt is masked.,1: Crystal oscillator clock interrupt is enabled."
|
|
newline
|
|
bitfld.long 0x0 7. "I_OSC,Crystal oscillator clock interrupt This bit is set by hardware when OSCCNT counter reaches the count value EOCV * 512" "0: No oscillator clock interrupt occurred.,1: Oscillator clock interrupt pending."
|
|
bitfld.long 0x0 4.--6. "GM_SEL,Crystal overdrive protection" "0: 0x Oscillator will be non-functional in Normal..,1: 0.21x,2: 0.42x,3: 0.55x,4: 0.53x,5: 0.66x,6: 0.87x,7: 1x"
|
|
tree.end
|
|
tree "H264_DEC (H264 Decoder)"
|
|
base ad:0x400D8000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "MCR,MODULE CONFIGURATION REGISTER"
|
|
bitfld.long 0x0 31. "CLR_IPS_FIFO_3,Clear IPS FIFO Stream 3" "0: No action,1: Read and write pointers of the IPS FIFO for.."
|
|
newline
|
|
bitfld.long 0x0 30. "CLR_IPS_FIFO_2,Clear IPS FIFO Stream 2" "0: No action,1: Read and write pointers of the IPS FIFO for.."
|
|
newline
|
|
bitfld.long 0x0 29. "CLR_IPS_FIFO_1,Clear IPS FIFO Stream 1" "0: No action,1: Read and write pointers of the IPS FIFO for.."
|
|
newline
|
|
bitfld.long 0x0 28. "CLR_IPS_FIFO_0,Clear IPS FIFO Stream 0" "0: No action,1: Read and write pointers of the IPS FIFO for.."
|
|
newline
|
|
bitfld.long 0x0 24. "DATA_MODE_CHR,Data mode Chroma" "0: Offset Binary Format.,1: Two's Complement Format. Refer to Data Mode.."
|
|
newline
|
|
bitfld.long 0x0 23. "VO_COLOR_FMT_STR_3,Video Output Color Format Stream 3" "0: YUV420 format,1: Gray scale format"
|
|
newline
|
|
bitfld.long 0x0 22. "VO_COLOR_FMT_STR_2,Video Output Color Format Stream 2" "0: YUV420 format,1: Gray scale format"
|
|
newline
|
|
bitfld.long 0x0 21. "VO_COLOR_FMT_STR_1,Video Output Color Format Stream 1" "0: YUV420 format,1: Gray scale format"
|
|
newline
|
|
bitfld.long 0x0 20. "VO_COLOR_FMT_STR_0,Video Output Color Format Stream 0" "0: YUV420 format,1: Gray scale format"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "DATA_FLOW_MODE,Data Flow Mode" "0: Mode0 (Constrained Baseline Single Channel),1: Mode 1 (Intra Only Up to Four Channels),2: Mode 2 (Constrained Baseline Up to Four Channels..,?"
|
|
newline
|
|
bitfld.long 0x0 11. "VO_BIT_WIDTH_STR_3,Video Output Bit Width Stream 3" "0: 8 bit mode,1: 10/12 bit mode"
|
|
newline
|
|
bitfld.long 0x0 10. "VO_BIT_WIDTH_STR_2,Video Output Bit Width Stream 2" "0: 8 bit mode,1: 10/12 bit mode"
|
|
newline
|
|
bitfld.long 0x0 9. "VO_BIT_WIDTH_STR_1,Video Output Bit Width Stream 1" "0: 8 bit mode,1: 10/12 bit mode"
|
|
newline
|
|
bitfld.long 0x0 8. "VO_BIT_WIDTH_STR_0,Video Output Bit Width Stream 0" "0: 8 bit mode,1: 10/12 bit mode"
|
|
newline
|
|
bitfld.long 0x0 4. "VO_BUF_3_RSTRT,Video Ouput Buffer 3 Restart" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "VO_BUF_2_RSTRT,Video Output Buffer 2 Restart" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "VO_BUF_1_RSTRT,Video Output Buffer 1 Restart" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "VO_BUF_0_RSTRT,Video Output Buffer 0 restart" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SW_RESET,Software Reset" "0,1"
|
|
line.long 0x4 "TIMEOUT_CFG,TIMEOUT CONFIGURATION REGISTER"
|
|
bitfld.long 0x4 31. "EN_STR_3,Enable Stream 3" "0,1"
|
|
newline
|
|
bitfld.long 0x4 30. "EN_STR_2,Enable Stream 2" "0,1"
|
|
newline
|
|
bitfld.long 0x4 29. "EN_STR_1,Enable Stream 1" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "EN_STR_0,Enable Stream 0" "0,1"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "VAL,Value"
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x10)++0x3
|
|
line.long 0x0 "STR$1_VCR,STREAM VIDEO CONFIGURATION REGISTER"
|
|
hexmask.long.byte 0x0 20.--27. 1. "FR_HEIGHT,Frame Height"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--11. 1. "FR_WIDTH,Frame Width"
|
|
repeat.end
|
|
group.long 0x30++0xB
|
|
line.long 0x0 "STR_PKT_ADDR,STREAM PACKET ADDRESS REGISTER"
|
|
hexmask.long.tbyte 0x0 0.--21. 1. "ADDR,Address"
|
|
line.long 0x4 "STR_TRIG_PKT_CFG,STREAM TRIGGER AND PACKET CONFIGURATION REGISTER"
|
|
bitfld.long 0x4 30.--31. "STR_NUM,Stream number" "0: Stream 0,1: Stream 1,2: Stream 2,3: Stream 3"
|
|
newline
|
|
hexmask.long.word 0x4 0.--14. 1. "STR_PKT_LTH,Stream Packet Length"
|
|
line.long 0x8 "STR_PKT_FIFO_WMRK,STREAM PACKET FIFO WATERMARK REGISTER"
|
|
hexmask.long.byte 0x8 24.--31. 1. "STR_3,Stream 3"
|
|
newline
|
|
hexmask.long.byte 0x8 16.--23. 1. "STR_2,Stream 2"
|
|
newline
|
|
hexmask.long.byte 0x8 8.--15. 1. "STR_1,Stream 1"
|
|
newline
|
|
hexmask.long.byte 0x8 0.--7. 1. "STR_0,Stream 0"
|
|
rgroup.long 0x40++0x7
|
|
line.long 0x0 "STR_01_PKT_FIFO_STAT,STREAM 0 and 1 PACKET FIFO STATUS REGISTER"
|
|
hexmask.long.byte 0x0 24.--31. 1. "STR_1_ACTIV_LOC,Stream 1 Active Location"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--23. 1. "STR_0_ACTIV_LOC,Stream 0 FIFO Active Location"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "STR_1_LVL,Stream 1 Level"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "STR_0_LVL,Stream 0 Level"
|
|
line.long 0x4 "STR_23_PKT_FIFO_STAT,STREAM 2 and 3 PACKET FIFO STATUS REGISTER"
|
|
hexmask.long.byte 0x4 24.--31. 1. "STR_3_ACTIV_LOC,Stream 3 Active Location"
|
|
newline
|
|
hexmask.long.byte 0x4 16.--23. 1. "STR_2_ACTIV_LOC,Stream 2 Active Location"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--15. 1. "STR_3_LVL,Stream 2 Level"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--7. 1. "STR_2_LVL,Stream 2 Level"
|
|
repeat 16. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x50)++0x3
|
|
line.long 0x0 "STR_0_PKT$1_STATUS,STREAM 0 PACKET STATUS REGISTER"
|
|
hexmask.long.word 0x0 0.--15. 1. "ADDR_OFFSET,Address offset"
|
|
repeat.end
|
|
repeat 16. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0xD0)++0x3
|
|
line.long 0x0 "STR_1_PKT$1_STATUS,STREAM 1 PACKET STATUS REGISTER"
|
|
hexmask.long.word 0x0 0.--15. 1. "ADDR_OFFSET,Address offset"
|
|
repeat.end
|
|
repeat 16. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x150)++0x3
|
|
line.long 0x0 "STR_2_PKT$1_STATUS,STREAM 2 PACKET STATUS REGISTER"
|
|
hexmask.long.word 0x0 0.--15. 1. "ADDR_OFFSET,Address offset"
|
|
repeat.end
|
|
repeat 16. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x1D0)++0x3
|
|
line.long 0x0 "STR_3_PKT$1_STATUS,STREAM 3 PACKET STATUS REGISTER"
|
|
hexmask.long.word 0x0 0.--15. 1. "ADDR_OFFSET,Address offset"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x10)
|
|
group.long ($2+0x300)++0x3
|
|
line.long 0x0 "VO_STR$1_Y_ADDR,VIDEO OUTPUT STREAM LUMA ADDRESS REGISTER"
|
|
hexmask.long.tbyte 0x0 3.--21. 1. "ADDR,Address"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x10)
|
|
group.long ($2+0x304)++0x3
|
|
line.long 0x0 "VO_STR$1_CB_ADDR,VIDEO OUTPUT STREAM Cb ADDRESS REGISTER"
|
|
hexmask.long.tbyte 0x0 3.--21. 1. "ADDR,Address"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x10)
|
|
group.long ($2+0x308)++0x3
|
|
line.long 0x0 "VO_STR$1_CR_ADDR,VIDEO OUTPUT STREAM Cr ADDRESS REGISTER"
|
|
hexmask.long.tbyte 0x0 3.--21. 1. "ADDR,Address"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x10)
|
|
group.long ($2+0x30C)++0x3
|
|
line.long 0x0 "VO_STR$1_NRLINES,VIDEO OUTPUT STREAM NUMBER OF LINES REGISTER"
|
|
hexmask.long.word 0x0 0.--15. 1. "Y_LINES,Luma Lines"
|
|
repeat.end
|
|
group.long 0x360++0x3
|
|
line.long 0x0 "RATE_FLOW_CNTRL,RATE FLOW CONTROL REGISTER"
|
|
bitfld.long 0x0 31. "EN,Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "BANK_STRIDE_LTH,Bank Stride Length" "0: No stride,1: Line Stride by 1x8bytes,?,?,?,?,?,?"
|
|
rgroup.long 0x380++0x3
|
|
line.long 0x0 "LINE_CNT_STAT,LINE COUNT STATUS REGISTER"
|
|
hexmask.long.byte 0x0 24.--31. 1. "STR_3,Stream 3"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--23. 1. "STR_2,Stream 2"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "STR_1,Stream 1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "STR_0,Stream 0"
|
|
group.long 0x384++0x3
|
|
line.long 0x0 "STAT,STATUS REGISTER"
|
|
bitfld.long 0x0 3. "STR_3_TIMED_OUT,Stream 3 Timed Out" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "STR_2_TIMED_OUT,Stream 2 Timed Out" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "STR_1_TIMED_OUT,Stream 1 Timed Out" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "STR_0_TIMED_OUT,Stream 0 Timed Out" "0,1"
|
|
group.long 0x3E0++0x7
|
|
line.long 0x0 "ISR,INTERRUPT STATUS REGISTER"
|
|
bitfld.long 0x0 31. "ERR_REQ_INT,Error Request Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 30. "STR_TIMED_OUT_INT,Stream Timed Out Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "FRM_CYC_CNT_GRT_THR_2_CH_3_INT,Frame Cycle Counter Greater than Threshold 2 of Channel 3 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "FRM_CYC_CNT_GRT_THR_2_CH_2_INT,Frame Cycle Counter Greater than Threshold 2 of Channel 2 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "FRM_CYC_CNT_GRT_THR_2_CH_1_INT,Frame Cycle Counter Greater than Threshold 2 of Channel 1 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "FRM_CYC_CNT_GRT_THR_2_CH_0_INT,Frame Cycle Counter Greater than Threshold 2 of Channel 0 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "FRM_CYC_CNT_GRT_THR_1_CH_3_INT,Frame Cycle Counter Greater than Threshold 1 of Channel 3 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "FRM_CYC_CNT_GRT_THR_1_CH_2_INT,Frame Cycle Counter Greater than Threshold 1 of Channel 2 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "FRM_CYC_CNT_GRT_THR_1_CH_1_INT,Frame Cycle Counter Greater than Threshold 1 of Channel 1 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20. "FRM_CYC_CNT_GRT_THR_1_CH_0_INT,Frame Cycle Counter Greater than Threshold 1 of Channel 0 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "FRM_CYC_CNT_GRT_THR_0_CH_3_INT,Frame Cycle Counter Greater than Threshold 0 of Channel 3 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "FRM_CYC_CNT_GRT_THR_0_CH_2_INT,Frame Cycle Counter Greater than Threshold 0 of Channel 2 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "FRM_CYC_CNT_GRT_THR_0_CH_1_INT,Frame Cycle Counter Greater than Threshold 0 of Channel 1 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "FRM_CYC_CNT_GRT_THR_0_CH_0_INT,Frame Cycle Counter Greater than Threshold 0 of Channel 0 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "DEC_OOS_STR_3_INT,Decoder Out of Synch Stream 3 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "DEC_OOS_STR_2_INT,Decoder Out of Synch Stream 2 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "DEC_OOS_STR_1_INT,Decoder Out of Synch Stream 1 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "DEC_OOS_STR_0_INT,Decoder Out of Synch Stream 0 Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "STR_3_PKT_FIFO_WE_INT,Stream 3 Packet Fifo Watermark Enabled Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "STR_2_PKT_FIFO_WE_INT,Stream 2 Packet Fifo Watermark Enabled Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "STR_1_PKT_FIFO_WE_INT,Stream 1 Packet Fifo Watermark Enabled Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "STR_0_PKT_FIFO_WE_INT,Stream 0 Packet Fifo Watermark Enabled Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "MBROW_DONE_3_INT,Macroblock row done Interrupt for stream 3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "MBROW_DONE_2_INT,Macroblock row done Interrupt for stream 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "MBROW_DONE_1_INT,Macroblock row done Interrupt for stream 1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "MBROW_DONE_0_INT,Macroblock row done Interrupt for stream 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "EOF_3_INT,End of frame Interrupt for stream 3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "EOF_2_INT,End of frame Interrupt for stream 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "EOF_1_INT,End of frame for Interrupt stream 1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "EOF_0_INT,End of frame Interrupt for stream 0" "0: Not set,1: Set"
|
|
line.long 0x4 "IER,INTERRUPT ENABLE REGISTER"
|
|
bitfld.long 0x4 31. "ERR_REQ_EN,Error Request Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 30. "STR_TIMED_OUT_EN,Stream Timed Out Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 27. "FRM_CYC_CNT_GRT_THR_2_CH_3_EN,Frame Cycle Counter Greater than Threshold 2 of Channel 3 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 26. "FRM_CYC_CNT_GRT_THR_2_CH_2_EN,Frame Cycle Counter Greater than Threshold 2 of Channel 2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "FRM_CYC_CNT_GRT_THR_2_CH_1_EN,Frame Cycle Counter Greater than Threshold 2 of Channel 1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 24. "FRM_CYC_CNT_GRT_THR_2_CH_0_EN,Frame Cycle Counter Greater than Threshold 2 of Channel 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "FRM_CYC_CNT_GRT_THR_1_CH_3_EN,Frame Cycle Counter Greater than Threshold 1 of Channel 3 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "FRM_CYC_CNT_GRT_THR_1_CH_2_EN,Frame Cycle Counter Greater than Threshold 1 of Channel 2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "FRM_CYC_CNT_GRT_THR_1_CH_1_EN,Frame Cycle Counter Greater than Threshold 1 of Channel 1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 20. "FRM_CYC_CNT_GRT_THR_1_CH_0_EN,Frame Cycle Counter Greater than Threshold 1 of Channel 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "FRM_CYC_CNT_GRT_THR_0_CH_3_EN,Frame Cycle Counter Greater than Threshold 0 of Channel 3 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "FRM_CYC_CNT_GRT_THR_0_CH_2_EN,Frame Cycle Counter Greater than Threshold 0 of Channel 2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "FRM_CYC_CNT_GRT_THR_0_CH_1_EN,Frame Cycle Counter Greater than Threshold 0 of Channel 1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "FRM_CYC_CNT_GRT_THR_0_CH_0_EN,Frame Cycle Counter Greater than Threshold 0 of Channel 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "DEC_OOS_STR_3_EN,Decoder Out of Synch Stream 3 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 14. "DEC_OOS_STR_2_EN,Decoder Out of Synch Stream 2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "DEC_OOS_STR_1_EN,Decoder Out of Synch Stream 1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "DEC_OOS_STR_0_EN,Decoder Out of Synch Stream 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "STR_3_PKT_FIFO_WE_EN,Stream 3 Packet FIFO Watermark Enabled Interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "STR_2_PKT_FIFO_WE_EN,Stream 2 Packet FIFO Watermark Enabled Interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "STR_1_PKT_FIFO_WE_EN,Stream 1 Packet FIFO Watermark Enabled Interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "STR_0_PKT_FIFO_WE_EN,Stream 0 Packet FIFO Watermark Enabled Interrupt enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "MBROW_DONE_3_EN,Macroblock Row Done Stream 3 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "MBROW_DONE_2_EN,Macroblock Row Done Stream 2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "MBROW_DONE_1_EN,Macroblock Row Done Stream 1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "MBROW_DONE_0_EN,Macroblock Row Done Stream 0 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "EOF_3_EN,End of Frame Stream 3 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "EOF_2_EN,End of Frame Stream 2 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "EOF_1_EN,End of Frame Stream 1 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "EOF_0_EN,End of Frame Stream 0 Interrupt Enable" "0,1"
|
|
group.long 0x400++0x7
|
|
line.long 0x0 "TESTLINE_CFG,TESTLINE CONFIGURATION REGISTER"
|
|
bitfld.long 0x0 31. "EN,Enable" "0,1"
|
|
newline
|
|
hexmask.long.word 0x0 0.--11. 1. "STRT_LOC,Start Location"
|
|
line.long 0x4 "TESTLINE_PXL_LOC,TESTLINE PIXEL LOCATION REGISTER"
|
|
hexmask.long.byte 0x4 20.--27. 1. "LOC_2,Location 2"
|
|
newline
|
|
hexmask.long.byte 0x4 4.--11. 1. "LOC_1,Location 1"
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x10)
|
|
rgroup.long ($2+0x410)++0x3
|
|
line.long 0x0 "TESTLINE_STR$1_LUMA_VAL,TESTLINE STREAM LUMA PIXEL VALUE"
|
|
hexmask.long.word 0x0 16.--27. 1. "VAL_2,Value 2"
|
|
newline
|
|
hexmask.long.word 0x0 0.--11. 1. "VAL_1,Value 1"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x10)
|
|
rgroup.long ($2+0x414)++0x3
|
|
line.long 0x0 "TESTLINE_STR$1_CB_VAL,TESTLINE STREAM Cb PIXEL VALUE REGISTER"
|
|
hexmask.long.word 0x0 16.--27. 1. "VAL_2,Value 2"
|
|
newline
|
|
hexmask.long.word 0x0 0.--11. 1. "VAL_1,Value 1"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x10)
|
|
rgroup.long ($2+0x418)++0x3
|
|
line.long 0x0 "TESTLINE_STR$1_CR_VAL,TESTLINE STREAM Cr PIXEL VALUE REGISTER"
|
|
hexmask.long.word 0x0 16.--27. 1. "VAL_2,Value 2"
|
|
newline
|
|
hexmask.long.word 0x0 0.--11. 1. "VAL_1,Value 1"
|
|
repeat.end
|
|
group.long 0x500++0x3
|
|
line.long 0x0 "ELLVC_CFG,ELLVC CONFIGURATION REGISTER"
|
|
bitfld.long 0x0 27. "STOP_CH_3,Stop Channel 3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "STOP_CH_2,Stop Channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "STOP_CH_1,Stop Channel 1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "STOP_CH_0,Stop Channel 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "USE_SRAM_DDR,Use SRAM or DDR" "0: Use DDR,1: Use SRAM"
|
|
newline
|
|
bitfld.long 0x0 0. "DBF_FORCE_OFF,Deblocking Filter Force Off" "0,1"
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x510)++0x3
|
|
line.long 0x0 "ELLVC_REF_ADDR_CH$1,ELLVC REFERENCE ADDRESS CHANNEL REGISTER"
|
|
hexmask.long 0x0 0.--31. 1. "ADDR,Address"
|
|
repeat.end
|
|
repeat 3. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x530)++0x3
|
|
line.long 0x0 "ELLVC_DBG_FRAME_CYC_CNT_THR$1,ELLVC DEBUG FRAME CYCLE COUNTER THRESHOLD REGISTER"
|
|
hexmask.long 0x0 0.--31. 1. "VAL,Value"
|
|
repeat.end
|
|
rgroup.long 0x560++0x3B
|
|
line.long 0x0 "ELLVC_STATE,ELLVC STATE REGISTER"
|
|
hexmask.long.byte 0x0 24.--28. 1. "CH_3,Channel 3"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--20. 1. "CH_2,Channel 2"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--12. 1. "CH_1,Channel 1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--4. 1. "CH_0,Channel 0"
|
|
line.long 0x4 "ELLVC_PIC_BIT,ELLVC PIC BIT REGISTER"
|
|
bitfld.long 0x4 24.--25. "CH_3,Channel 3" "0: 8 bit,1: 10 bit,2: 12 bit,3: unused"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "CH_2,Channel 2" "0: 8 bit,1: 10 bit,2: 12 bit,3: unused"
|
|
newline
|
|
bitfld.long 0x4 8.--9. "CH_1,Channel 1" "0: 8 bit,1: 10 bit,2: 12 bit,3: unused"
|
|
newline
|
|
bitfld.long 0x4 0.--1. "CH_0,Channel 0" "0: 8 bit,1: 10 bit,2: 12 bit,3: unused"
|
|
line.long 0x8 "ELLVC_PIC_WIDTH_IN_MBS,ELLVC PIC WIDTH IN MBS REGISTER"
|
|
hexmask.long.byte 0x8 24.--31. 1. "CH_3,Channel 3"
|
|
newline
|
|
hexmask.long.byte 0x8 16.--23. 1. "CH_2,Channel 2"
|
|
newline
|
|
hexmask.long.byte 0x8 8.--15. 1. "CH_1,Channel 1"
|
|
newline
|
|
hexmask.long.byte 0x8 0.--7. 1. "CH_0,Channel 0"
|
|
line.long 0xC "ELLVC_PIC_HEIGHT_IN_MBS,ELLVC PIC HEIGHT IN MBS REGISTER"
|
|
hexmask.long.byte 0xC 24.--31. 1. "CH_3,Channel 3"
|
|
newline
|
|
hexmask.long.byte 0xC 16.--23. 1. "CH_2,Channel 2"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--15. 1. "CH_1,Channel 1"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--7. 1. "CH_0,Channel 0"
|
|
line.long 0x10 "ELLVC_PIC_CROP_LEFT_CH_01,ELLVC PIC CROP LEFT CHANNEL 0. 1 REGISTER"
|
|
hexmask.long.word 0x10 16.--27. 1. "CH_1,Channel 1"
|
|
newline
|
|
hexmask.long.word 0x10 0.--11. 1. "CH_0,Channel 0"
|
|
line.long 0x14 "ELLVC_PIC_CROP_LEFT_CH_23,ELLVC PIC CROP LEFT CHANNEL 2. 3 REGISTER"
|
|
hexmask.long.word 0x14 16.--27. 1. "CH_3,Channel 3"
|
|
newline
|
|
hexmask.long.word 0x14 0.--11. 1. "CH_2,Channel 2"
|
|
line.long 0x18 "ELLVC_PIC_CROP_RGHT_CH_01,ELLVC PIC CROP RIGHT CHANNEL 0. 1 REGISTER"
|
|
hexmask.long.word 0x18 16.--27. 1. "CH_1,Channel 1"
|
|
newline
|
|
hexmask.long.word 0x18 0.--11. 1. "CH_0,Channel 0"
|
|
line.long 0x1C "ELLVC_PIC_CROP_RGHT_CH_23,ELLVC PIC CROP RIGHT CHANNEL 2. 3 REGISTER"
|
|
hexmask.long.word 0x1C 16.--27. 1. "CH_3,Channel 3"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--11. 1. "CH_2,Channel 2"
|
|
line.long 0x20 "ELLVC_PIC_CROP_TOP_CH_01,ELLVC PIC CROP TOP CHANNEL 0. 1 REGISTER"
|
|
hexmask.long.word 0x20 16.--27. 1. "CH_1,Channel 1"
|
|
newline
|
|
hexmask.long.word 0x20 0.--11. 1. "CH_0,Channel 0"
|
|
line.long 0x24 "ELLVC_PIC_CROP_TOP_CH_23,ELLVC PIC CROP TOP CHANNEL 2. 3 REGISTER"
|
|
hexmask.long.word 0x24 16.--27. 1. "CH_3,Channel 3"
|
|
newline
|
|
hexmask.long.word 0x24 0.--11. 1. "CH_2,Channel 2"
|
|
line.long 0x28 "ELLVC_PIC_CROP_BTTM_CH_01,ELLVC PIC CROP BOTTOM CHANNEL 0. 1 REGISTER"
|
|
hexmask.long.word 0x28 16.--27. 1. "CH_1,Channel 1"
|
|
newline
|
|
hexmask.long.word 0x28 0.--11. 1. "CH_0,Channel 0"
|
|
line.long 0x2C "ELLVC_PIC_CROP_BTTM_CH_23,ELLVC PIC CROP BOTTOM CHANNEL 2. 3 REGISTER"
|
|
hexmask.long.word 0x2C 16.--27. 1. "CH_3,Channel 3"
|
|
newline
|
|
hexmask.long.word 0x2C 0.--11. 1. "CH_2,Channel 2"
|
|
line.long 0x30 "ELLVC_PIC_PARAM_VLD,ELLVC PIC PARAM VALID REGISTER"
|
|
bitfld.long 0x30 24. "CH_3,Channel 3" "0,1"
|
|
newline
|
|
bitfld.long 0x30 16. "CH_2,Channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0x30 8. "CH_1,Channel 1" "0,1"
|
|
newline
|
|
bitfld.long 0x30 0. "CH_0,Channel 0" "0,1"
|
|
line.long 0x34 "ELLVC_POC_VALUE,ELLVC PICTURE ORDER COUNT VALUE REGISTER"
|
|
hexmask.long 0x34 0.--31. 1. "CH_0,Channel 0"
|
|
line.long 0x38 "ELLVC_STAT,ELLVC STATUS REGISTER"
|
|
bitfld.long 0x38 17. "NEW_POC_CYC_CH_0,New Picture Order Count Cycle Channel 0" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x38 0.--4. 1. "MAX_NUM_REF_FRM_CH_0,Maximun Number Reference Frame Channel 0"
|
|
tree.end
|
|
tree "H264_ENC (H264 Encoder)"
|
|
base ad:0x400DC000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "MCR,Module Configuration Register"
|
|
bitfld.long 0x0 24. "DATA_MODE_CHR,Data Mode Chroma" "0: Binary offset format,1: Two's Complement format.Refer to Data Mode.."
|
|
newline
|
|
bitfld.long 0x0 16. "FETCH_TRIG,Fetch Trigger" "0: Only Vision Sequencer triggers are considered..,1: Only writes to H264_ENC_FETCH_MBRW[FETCH] are.."
|
|
newline
|
|
bitfld.long 0x0 12. "VI_COLOR_FMT,Video Input Color Format" "0: YUV420 format,1: Gray level only format"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "VI_BIT_WIDTH,Video Input Bit Width" "0: 8 Bit,1: 10 Bit,2: 12 Bit,?"
|
|
newline
|
|
bitfld.long 0x0 5. "OUT_BUF_RESTART,Ouput Buffer restart" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "VI_BUF_RESTART,Video Input Buffer restart" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SW_RESET,Software reset bit" "?,1: Software reset. This will reset the Encoder core.."
|
|
group.long 0x10++0x7
|
|
line.long 0x0 "VCR,Video Configuration Register"
|
|
hexmask.long.word 0x0 17.--27. 1. "FR_HEIGHT,Frame Height"
|
|
newline
|
|
hexmask.long.word 0x0 1.--11. 1. "FR_WIDTH,Frame Width"
|
|
line.long 0x4 "VI_ALARM,Video Input Alarm Register"
|
|
hexmask.long.byte 0x4 16.--23. 1. "MBRW_ALARM_THLD,Macroblock row alarm threshold"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--7. 1. "MBRW_THLD,Macroblock Row Threshold"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x0 "FETCH_MBRW,Fetch Macroblock Row Register"
|
|
bitfld.long 0x0 0. "FETCH,Fetch Macroblock Row" "0,1"
|
|
group.long 0x30++0x13
|
|
line.long 0x0 "VI_CBUF_Y_ADDR,Video Input Circular Buffer Luma Start Address Register"
|
|
hexmask.long.tbyte 0x0 3.--21. 1. "ADDR,Start address offset of the circular buffer for the incoming video luma samples."
|
|
line.long 0x4 "VI_CBUF_CB_ADDR,Video Input Circular Buffer Cb Start Address Register"
|
|
hexmask.long.tbyte 0x4 3.--21. 1. "ADDR,Start address offset of the circular buffer for the incoming video chroma Cb samples"
|
|
line.long 0x8 "VI_CBUF_CR_ADDR,Video Input Circular Buffer Cr Start Address Register"
|
|
hexmask.long.tbyte 0x8 3.--21. 1. "ADDR,Start address offset of the circular buffer for the incoming video chroma Cr samples"
|
|
line.long 0xC "VI_NRLINES,Video Input Number of Lines Register"
|
|
hexmask.long.byte 0xC 1.--7. 1. "Y_LINES,Y lines"
|
|
line.long 0x10 "RATE_FLOW_CTRL,Rate Flow Control Register"
|
|
bitfld.long 0x10 31. "EN,Rate Flow Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x10 0.--2. "BANK_STRIDE_LTH,Bank Stride Length" "0,1,2,3,4,5,6,7"
|
|
group.long 0x80++0xB
|
|
line.long 0x0 "OUT_CBUF_START_ADDR,Output Circular Buffer Start Address Register"
|
|
hexmask.long.tbyte 0x0 3.--21. 1. "ADDR,Circular Buffer Start Address"
|
|
line.long 0x4 "OUT_CBUF_END_ADDR,Output Circular Buffer End Address Register"
|
|
hexmask.long.tbyte 0x4 3.--21. 1. "ADDR,Circular Buffer End Address"
|
|
line.long 0x8 "OUT_CBUF_ALARM_ADDR,Ouput Circular Buffer Alarm Address Register"
|
|
bitfld.long 0x8 22. "WRAP,Circular Buffer Alarm Wrap" "0,1"
|
|
newline
|
|
hexmask.long.tbyte 0x8 3.--21. 1. "ADDR,Circular Buffer Alarm Address"
|
|
rgroup.long 0x90++0x7
|
|
line.long 0x0 "OUT_CBUF_CURR_ADDR,Output Circular Buffer Current Address Register"
|
|
bitfld.long 0x0 22. "WRAP,Internal Wrap" "0,1"
|
|
newline
|
|
hexmask.long.tbyte 0x0 3.--21. 1. "ADDR,Circular Buffer Current Address"
|
|
line.long 0x4 "OUT_CBUF_VEND_ADDR,Output Circular Buffer Vend Address Register"
|
|
hexmask.long.tbyte 0x4 3.--21. 1. "ADDR,Circular Buffer Frame End Address"
|
|
rgroup.long 0x104++0x3
|
|
line.long 0x0 "LINE_CNTR_STAT,Line Counter Status Register"
|
|
hexmask.long.word 0x0 0.--11. 1. "VAL,Line Counter Value."
|
|
group.long 0x11C++0x7
|
|
line.long 0x0 "ISR,Interrupt Status Register"
|
|
bitfld.long 0x0 12. "BS_FIFO_FULL_INT,Bitstream Fifo Full Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "BS_FIFO_ALMOST_FULL_INT,Bitstream Fifo Almost Full Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "BR_TOO_HIGH_INT,Bitrate Too High Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "OUT_CBUF_OVF_INT,Output Circular Buffer Overflow Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "BS_FRAME_DONE_INT,Bitstream Frame Done Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "MBRW_FF_OVF_INT,Macroblock Row Fifo Overflow Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "MBRW_DONE_INT,Macroblock Row Done Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "ENC_OOS_INT,Encoder Out of Synch Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "VI_LCOUNT_ALARM_INT,Video Input Line Count Alarm Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "VI_LINE_INT,Video Input Line Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CB_ALARM_INT,Circular Buffer Alarm Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "BS_NEW_ROW_INT,Bitstream New Row Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "VI_FRAME_DONE_INT,Video Input Frame Done Interrupt" "0,1"
|
|
line.long 0x4 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x4 12. "BS_FIFO_FULL_INT_EN,Bitstream Fifo Full Interrupt Enable" "0: Interrupt is disabled for..,1: Interrupt is enabled for.."
|
|
newline
|
|
bitfld.long 0x4 11. "BS_FIFO_ALMOST_FULL_INT_EN,Bitstream Fifo Almost Full Interrupt Enable" "0: Interrupt is disabled for..,1: Interrupt is enabled for.."
|
|
newline
|
|
bitfld.long 0x4 10. "BR_TOO_HIGH_INT_EN,Bitrate Too High Interrupt Enable" "0: Interrupt is disabled for..,1: Interrupt is enabled for.."
|
|
newline
|
|
bitfld.long 0x4 9. "OUT_CBUF_OVF_INT_EN,Output Circular Buffer Overflow Interrupt Enable" "0: Interrupt is disabled for..,1: Interrupt is enabled for.."
|
|
newline
|
|
bitfld.long 0x4 8. "BS_FRAME_DONE_INT_EN,Bitstream Frame Done Interrupt Enable" "0: Interrupt is disabled for..,1: Interrupt is enabled for.."
|
|
newline
|
|
bitfld.long 0x4 7. "MBRW_FF_OVF_EN,Macroblock Row FIFO Overflow Interrupt Enable" "0: Interrupt is disabled for..,1: Interrupt is enabled for.."
|
|
newline
|
|
bitfld.long 0x4 6. "MBRW_DONE_INT_EN,Macroblock Row Done Interrupt Enable" "0: Interrupt is disabled for..,1: Interrupt is enabled for.."
|
|
newline
|
|
bitfld.long 0x4 5. "ENC_OOS_INT_EN,Encoder Out of Synch Interrupt Enable" "0: Interrupt is disabled for..,1: Interrupt is enabled for H264_ENC_ISR[ENC_OOS_INT]"
|
|
newline
|
|
bitfld.long 0x4 4. "VI_LCOUNT_ALARM_INT_EN,Video Input Line Count Alarm Interrupt Enable" "0: Interrupt is disabled for..,1: Interrupt is enabled for.."
|
|
newline
|
|
bitfld.long 0x4 3. "VI_LINE_INT_EN,Video Input Line Interrupt Enable" "0: Interrupt is disabled for..,1: Interrupt is enabled for H264_ENC_ISR[VI_LINE_INT]"
|
|
newline
|
|
bitfld.long 0x4 2. "CB_ALARM_INT_EN,Circular Buffer Alarm Interrupt Enable" "0: Interrupt is disabled for..,1: Interrupt is enabled for.."
|
|
newline
|
|
bitfld.long 0x4 1. "BS_NEW_ROW_INT_EN,Bitstream New Row Interrupt Enable" "0: Interrupt is disabled for BS_NEW_ROW_INT,1: Interrupt is enabled for BS_NEW_ROW_INT"
|
|
newline
|
|
bitfld.long 0x4 0. "VI_FRAME_DONE_INT_EN,Video Input Frame Done Interrupt Enable" "0: Disables the interrupt for Frame done,1: Enables the interrupt for Frame done"
|
|
group.long 0x140++0x13
|
|
line.long 0x0 "TESTLINE_CFG,Testline Configuration Register"
|
|
bitfld.long 0x0 31. "EN,This bit enables the testline feature when asserted." "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--5. 1. "NR_W,Number of test-lines to be written"
|
|
line.long 0x4 "TESTLINE_STRT_LOC,Testline Start Location Register"
|
|
hexmask.long.word 0x4 0.--11. 1. "STRT_LOC,Test line Number Start Value"
|
|
line.long 0x8 "TESTLINE_LUMA_VAL,Testline Luma Value Register"
|
|
hexmask.long.word 0x8 16.--27. 1. "VAL_2,Second value of the Luma Pixel"
|
|
newline
|
|
hexmask.long.word 0x8 0.--11. 1. "VAL_1,First Value of the luma pixel"
|
|
line.long 0xC "TESTLINE_CB_VAL,Testline Chroma Cb Value Register"
|
|
hexmask.long.word 0xC 16.--27. 1. "VAL_2,Second Value of the Cb Pixel"
|
|
newline
|
|
hexmask.long.word 0xC 0.--11. 1. "VAL_1,First Value of the Cb pixel"
|
|
line.long 0x10 "TESTLINE_CR_VAL,Testline Chroma Cr Value Register"
|
|
hexmask.long.word 0x10 16.--27. 1. "VAL_2,Second Value of the Cr Pixel"
|
|
newline
|
|
hexmask.long.word 0x10 0.--11. 1. "VAL_1,First Value of the Cr pixel"
|
|
group.long 0x200++0x17
|
|
line.long 0x0 "ULLVC_FRAME_RATE,ULLVC Frame Rate Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "VAL,Value"
|
|
line.long 0x4 "ULLVC_QP_INIT,ULLVC Quantization Parameter Initial Register"
|
|
hexmask.long.byte 0x4 0.--6. 1. "INITIAL,Initial"
|
|
line.long 0x8 "ULLVC_QP_RANGE,ULLVC Quantization Parameter Range Register"
|
|
hexmask.long.byte 0x8 16.--22. 1. "MAX,Maximum"
|
|
newline
|
|
hexmask.long.byte 0x8 0.--6. 1. "MIN,Minimum"
|
|
line.long 0xC "ULLVC_BITS_PER_MB_ROW,ULLVC Bits Per Macroblock Row Register"
|
|
hexmask.long 0xC 0.--30. 1. "BITRATE,Bitrate"
|
|
line.long 0x10 "ULLVC_QP_FALLBACK_LIMIT,ULLVC Fallback QP Limit Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. "LIMIT,Limit"
|
|
line.long 0x14 "ULLVC_QP_INC,ULLVC Increment QP Register"
|
|
hexmask.long.byte 0x14 24.--30. 1. "DIFF_2,Difference 2"
|
|
newline
|
|
hexmask.long.byte 0x14 16.--22. 1. "DIFF_1,Increment QP Difference 1"
|
|
newline
|
|
hexmask.long.byte 0x14 8.--14. 1. "DIFF_0,Increment QP Difference 0"
|
|
newline
|
|
hexmask.long.byte 0x14 0.--6. 1. "OFFSET,Offset"
|
|
repeat 3. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x218)++0x3
|
|
line.long 0x0 "ULLVC_QP_INC_THLD$1,ULLVC Increment Threshold Register"
|
|
hexmask.long 0x0 0.--30. 1. "THLD,Threshold"
|
|
repeat.end
|
|
group.long 0x224++0x3
|
|
line.long 0x0 "ULLVC_QP_DEC,ULLVC Decrement QP Register"
|
|
hexmask.long.byte 0x0 24.--30. 1. "DIFF_2,Difference 2"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--22. 1. "DIFF_1,Difference 1"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--14. 1. "DIFF_0,Difference 0"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "OFFSET,Offset"
|
|
repeat 3. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x228)++0x3
|
|
line.long 0x0 "ULLVC_QP_DEC_THLD$1,ULLVC Decrement Threshold Register"
|
|
hexmask.long 0x0 0.--30. 1. "THLD,Threshold"
|
|
repeat.end
|
|
group.long 0x234++0x7
|
|
line.long 0x0 "ULLVC_WAIT_FRAMES,ULLVC Wait Frames Register"
|
|
hexmask.long.byte 0x0 0.--5. 1. "WAIT_FRAMES,Wait Frames"
|
|
line.long 0x4 "ULLVC_DISABLE_DBF,ULLVC Disable DBF Register"
|
|
bitfld.long 0x4 0. "DISABLE,Disable" "0,1"
|
|
rgroup.long 0x284++0x3
|
|
line.long 0x0 "ULLVC_BITRATE_STREAM,ULLVC Bitrate Stream Register"
|
|
hexmask.long 0x0 0.--31. 1. "VAL,Value"
|
|
tree.end
|
|
tree "HPSMI (High Performance Shared Memory Interconnect)"
|
|
base ad:0x40068000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "GBL_CTRL,HPSMI Global Control Register"
|
|
bitfld.long 0x0 1. "WR_ENABLE,HPSMI_ECC_ERROR_INJECT can be modified only when this bit is HIGH." "0,1"
|
|
group.long 0x10++0x13
|
|
line.long 0x0 "MPU_SEL0,HPSMI MPU Address Select 0 Register"
|
|
hexmask.long 0x0 0.--31. 1. "SELVAL,In the case of there being less than 16 write masters 2XNUMBER_OF_MASTERS bits of this register will be used"
|
|
line.long 0x4 "MPU_SEL1,HPSMI MPU Address Select 1 Register"
|
|
hexmask.long 0x4 0.--31. 1. "SELVAL,This register is used only in case of there being greater than 16 write masters else it will read zero"
|
|
line.long 0x8 "MPU_SEL2,HPSMI MPU Address Select 2 Register"
|
|
hexmask.long 0x8 0.--31. 1. "SELVAL,This register is used only in case of there being greater than 32 write masters else it will read zero"
|
|
line.long 0xC "MPU_SEL3,HPSMI MPU Address Select 3 Register"
|
|
hexmask.long 0xC 0.--31. 1. "SELVAL,This register is used only in case of there being greater than 48 write masters else it will read zero"
|
|
line.long 0x10 "PRIO_CHANGE,HPSMI Stream DMA Master Priority Change Register"
|
|
bitfld.long 0x10 16. "CNTR_MODE,This field selects the priority change mode" "0: static priority change mode,1: priority change using counter value"
|
|
newline
|
|
bitfld.long 0x10 15. "CNTR_EN,This field is used to enable the priority change counter. It is used in the counter mode only." "0,1"
|
|
newline
|
|
hexmask.long.byte 0x10 8.--14. 1. "PRIO_MASK,This field is applicable when the counter mode is selected and the priority change counter is enabled"
|
|
newline
|
|
hexmask.long.byte 0x10 0.--6. 1. "SEL_PRIO,This field allows to modify the priority of the stream DMA masters in the static priority change mode"
|
|
rgroup.long 0x24++0x7
|
|
line.long 0x0 "PROFILE_LSB2AXICYCCNTR_0,HPSMI LSB2AXI Master 0 Cycle counter Register"
|
|
hexmask.long 0x0 0.--31. 1. "CNTRVAL,The counter value is updated to this register when HPSMI_PROFILE_FREEZE[FREEZE_LSB2AXIMASTER] bit 0 isHIGH and a '1' is written to HPSMI_PROFILE_FREEZE[WEN]"
|
|
line.long 0x4 "PROFILE_LSB2AXICYCCNTR_1,HPSMI LSB2AXI Master 1 Cycle Counter Value Register"
|
|
hexmask.long 0x4 0.--31. 1. "CNTRVAL,The counter value is updated to this register when HPSMI_PROFILE_FREEZE[FREEZE_LSB2AXIMASTER] bit 1 is HIGH and a '1' is written to HPSMI_PROFILE_FREEZE[WEN]"
|
|
group.long 0x2C++0x7
|
|
line.long 0x0 "PROFILE_CYCCNTR_OVF,HPSMI Profile Cycle Counter Overflow Register"
|
|
bitfld.long 0x0 8. "LSB2AXI_CYCCNTR_OVF1,It is asserted whenever Cycle Counter Overflow occurred for LSB2AXI Channel1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "LSB2AXI_CYCCNTR_OVF0,This bit is asserted whenever Cycle Counter Overflow occurred for LSB2AXI Channel0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "AXI_CYCCNTR_OVF6,It is asserted whenever Cycle Counter Overflow occurred for 128-bit AXIMaster3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "AXI_CYCCNTR_OVF5,It is asserted whenever Cycle Counter Overflow occurred for 64-bit AXI-Master 2 128-bit AXI-Master 3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "AXI_CYCCNTR_OVF4,It is asserted whenever Cycle Counter Overflow occurred for 128-bit AXI-Master2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "AXi_CYCCNTR_OVF3,It is asserted whenever Cycle Counter Overflow occurred for 64-bit AXI-Master1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "AXI_CYCCNTR_OVF2,This bit is asserted whenever Cycle Counter Overflow occurred for 64-bit AXI-Master0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "AXI_CYCCNTR_OVF1,This bit is asserted whenever Cycle Counter Overflow occurred for 128-bit AXI-Master1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "AXI_CYCCNTR_OVF0,This bit is asserted whenever Cycle Counter Overflow occurred for 128-bit AXI-Master0" "0,1"
|
|
line.long 0x4 "PROFILE_STOP,HPSMI AXI Profile Stop Register"
|
|
bitfld.long 0x4 16.--17. "STOP_LSB2AXIMASTER,It stops the data beat access counter(both read and write access counter) as well as its corresponding total cycle counter of those LSB2AXI channel which have high bit in STOP_LSB2AXIMASTER" "0,1,2,3"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--14. 1. "STOP_AXIMASTER,It stops the data beat access counter(both read and write access counter) as well as its corresponding total cycle counter of those AXI master which have high bit in STOP_AXIMASTER"
|
|
newline
|
|
bitfld.long 0x4 1. "STOP_TOTAL,When a '1' is written to this bit then all counters(all AXI and LSB2AXI read and write beat counters and its corresponding cycle count counter) are stoped when field WEN is triggered" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "WEN,Write enable-This bit is auto-reset and goes to zero when proper synchronization takes place" "0,1"
|
|
group.long 0x50++0x1B
|
|
line.long 0x0 "INTR_EN0,HPSMI Interrupt Enable 0 Register"
|
|
bitfld.long 0x0 6. "ECC_ERR_SEG2,This bit is used to enable ECC error interrupt on memory segment2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "ECC_ERR_SEG1,This bit is used to enable ECC error interrupt on memory segment 1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "ECC_ERR_SEG0,This bit is used to enable ECC error interrupt on memory segment 0." "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "PM_ERR,This field is used to enable the 'Power Mode illegal access' interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "MPU_ERR,This field is used to enable the MPU Error Interrupt" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "ADDR_ERR,This field is used to enable the Address Error Interrupt for Stream DMA Master" "0,1"
|
|
line.long 0x4 "INTR_EN1,HPSMI Interrupt Enable 1 Register"
|
|
bitfld.long 0x4 5. "ECC_UNCORERR_SEG2_OVF,This field is used to enable the interrupt for HPSMI_ECC_UNCORR_ERRCNTR[OVF_SEG2]" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "ECC_UNCORRERR_SEG1_OVF,This field is used to enable the interrupt for HPSMI_ECC_UNCORR_ERRCNTR[OVF_SEG1]" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "ECC_UNCORRERR_SEG0_OVF,This field is used to enable the interrupt for HPSMI_ECC_UNCORR_ERRCNTR[OVF_SEG0]" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "ECC_SINGLEERR_SEG2_OVF,This field is used to enable the interrupt for HPSMI_ECC_SINGLE_ERRCNTR[OVF_SEG2]" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "ECC_SINGLEERR_SEG1_OVF,This field is used to enable the interrupt for HPSMI_ECC_SINGLE_ERRCNTR[OVF_SEG1]" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "ECC_SINGLEERR_SEG0_OVF,This field is used to enable the interrupt for HPSMI_ECC_SINGLE_ERRCNTR[OVF_SEG0]" "0,1"
|
|
line.long 0x8 "PROFILE_START,HPSMI AXI Profile Start Register"
|
|
bitfld.long 0x8 16.--17. "START_LSB2AXIMASTER,It starts the data beat access counter(both read and write access counter) as well as total cycle counter of those LSB2AXI channel which have a high bit in START_LSB2AXIMASTER field" "0,1,2,3"
|
|
newline
|
|
hexmask.long.byte 0x8 8.--14. 1. "START_AXIMASTER,It starts the data beat counters(both read and write access counter) as well as total cycle counter of those AXI Master which have high bits in START_AXIMASTER field"
|
|
newline
|
|
bitfld.long 0x8 1. "START_TOTAL,When a '1' is written to this bit then all counters(all AXI and LSB2AXI read and write beat accesses counter as well as its corresponding total cycle counter) are started when field WEN is triggered" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0. "WEN,Write enable-This bit is auto-reset and goes to zero when proper synchronization takes place" "0,1"
|
|
line.long 0xC "PROFILE_RESET,HPSMI AXI Profile Reset Register"
|
|
bitfld.long 0xC 16.--17. "RESET_LSB2AXIMASTER,It resets the data beat access counter(both read and write counter)as well as its corresponding total cycle counter of those LSB2AXI channel which have high bits in RESET_LSB2AXIMSTER" "0,1,2,3"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--14. 1. "RESET_AXIMASTER,It resets the data beat access counters(both read and write access counter) as well as its corresponding total cycle counter of those AXI master which have a high bit in RESET_AXIMASTER"
|
|
newline
|
|
bitfld.long 0xC 1. "RESET_TOTAL,When a '1' is written to this bit then all counters(all AXI and LSB2AXI read and write beat counters as well as its corresponding total cycle counter) are reset when field WEN is triggered" "0,1"
|
|
newline
|
|
bitfld.long 0xC 0. "WEN,Write enable-This bit is auto-reset and goes to zero when proper synchronization takes place" "0,1"
|
|
line.long 0x10 "PROFILE_FREEZE,HPSMI AXI Profile Freeze Register"
|
|
bitfld.long 0x10 16.--17. "FREEZE_LSB2AXIMASTER,It freezes/writes the data beat access counter(both read and write counter) as well as its total cycle counter of those LSB2AXI channel which have high bits in FREEZE_LSB2AXIMASTER to its config register.." "0,1,2,3"
|
|
newline
|
|
hexmask.long.byte 0x10 8.--14. 1. "FREEZE_AXIMASTER,It freezes/writes the data beat access counter(both read and write access counter) as well as its total cycle counter of those AXI master which have a high bit in FREEZE_AXIMASTER to its config register HPSMI_PROFILE_CNTRVAL_xx and.."
|
|
newline
|
|
bitfld.long 0x10 1. "FREEZE_TOTAL,When a '1' is written to this bit then all counters(all AXI and LSB2AXI read and write beat counters and its corresponding total cycle counter) are written to its config register HPSMI_PROFILE_CNTRVAL_xx and HPSMI_PROFILE_CYCLCNTR_xx.." "0,1"
|
|
newline
|
|
bitfld.long 0x10 0. "WEN,Write enable-This bit is auto-reset and goes to zero when proper synchronization takes place" "0,1"
|
|
line.long 0x14 "PROFILE_DECVAL,HPSMI AXI Profile Decrement Value Register"
|
|
hexmask.long 0x14 0.--31. 1. "DECVAL,This is the value by which a data beat counter is to be decremented"
|
|
line.long 0x18 "PROFILE_DECVAL_CNTRNUM,HPSMI AXI Profile Decrement Counter Information Register"
|
|
bitfld.long 0x18 4. "DEC,DEC : Decrementing command" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x18 0.--3. 1. "CNTRNUM,CNTRNUM indicates which master read and write counter is to decremented: 0-Counter for 128-bit AXIMASTER0"
|
|
rgroup.long 0x6C++0x6B
|
|
line.long 0x0 "PROFILE_AXIRDCNTRVAL_0,HPSMI AXI Master 0 Read Port Profile Counter Value Register"
|
|
hexmask.long 0x0 0.--31. 1. "CNTRVAL,The counter value is written to this register when HPSMI_PROFILE_FREEZE[FREEZE_AXIMASTER] bit 0 is HIGH and a '1' is written to HPSMI_PROFILE_FREEZE[WEN]"
|
|
line.long 0x4 "PROFILE_AXIWRCNTRVAL_0,HPSMI AXI Master 0 Write Port Profile Counter Value Register"
|
|
hexmask.long 0x4 0.--31. 1. "CNTRVAL,The counter value is written to this register when HPSMI_PROFILE_FREEZE[FREEZE_AXIMASTER] bit 0 is HIGH and a '1' is written to HPSMI_PROFILE_FREEZE[WEN]"
|
|
line.long 0x8 "PROFILE_AXIRDCNTRVAL_1,HPSMI AXI Master 1 Read Port Profile Counter Value Register"
|
|
hexmask.long 0x8 0.--31. 1. "CNTRVAL,The counter value is written to this register when HPSMI_PROFILE_FREEZE[FREEZE_AXIMASTER] bit 1 is HIGH and a '1' is written to HPSMI_PROFILE_FREEZE[WEN]"
|
|
line.long 0xC "PROFILE_AXIWRCNTRVAL_1,HPSMI AXI Master 1 Write Port Profile Counter Value Register"
|
|
hexmask.long 0xC 0.--31. 1. "CNTRVAL,The counter value is written to this register when HPSMI_PROFILE_FREEZE[FREEZE_AXIMASTER] bit 1 is HIGH and a '1' is written to HPSMI_PROFILE_FREEZE[WEN]"
|
|
line.long 0x10 "PROFILE_AXIRDCNTRVAL_2,HPSMI AXI Master 2 Read Port Profile Counter Value Register"
|
|
hexmask.long 0x10 0.--31. 1. "CNTRVAL,The counter value is written to this register when HPSMI_PROFILE_FREEZE[FREEZE_AXIMASTER] bit 2 is HIGH and a '1' is written to HPSMI_PROFILE_FREEZE[WEN]"
|
|
line.long 0x14 "PROFILE_AXIWRCNTRVAL_2,HPSMI AXI Master 2 Write Port Profile Counter Value Register"
|
|
hexmask.long 0x14 0.--31. 1. "CNTRVAL,The counter value is written to this register when HPSMI_PROFILE_FREEZE[FREEZE_AXIMASTER] bit 2 is HIGH and a '1' is written to HPSMI_PROFILE_FREEZE[WEN]"
|
|
line.long 0x18 "PROFILE_AXIRDCNTRVAL_3,HPSMI AXI Master 3 Read Port Profile Counter Value Register"
|
|
hexmask.long 0x18 0.--31. 1. "CNTRVAL,The counter value is written to this register when HPSMI_PROFILE_FREEZE[FREEZE_AXIMASTER] bit 3 is HIGH and a '1' is written to HPSMI_PROFILE_FREEZE[WEN]"
|
|
line.long 0x1C "PROFILE_AXIWRCNTRVAL_3,HPSMI AXI Master 3 Write Port Profile Counter Value Register"
|
|
hexmask.long 0x1C 0.--31. 1. "CNTRVAL,The counter value is written to this register when HPSMI_PROFILE_FREEZE[FREEZE_AXIMASTER] bit 3 is HIGH and a '1' is written to HPSMI_PROFILE_FREEZE[WEN]"
|
|
line.long 0x20 "PROFILE_AXIRDCNTRVAL_4,HPSMI AXI Master 4 Read Port Profile Counter Value Register"
|
|
hexmask.long 0x20 0.--31. 1. "CNTRVAL,The counter value is written to this register when HPSMI_PROFILE_FREEZE[FREEZE_AXIMASTER] bit 4 is HIGH and a '1' is written to HPSMI_PROFILE_FREEZE[WEN]"
|
|
line.long 0x24 "PROFILE_AXIWRCNTRVAL_4,HPSMI AXI Master 4 Write Port Profile Counter Value Register"
|
|
hexmask.long 0x24 0.--31. 1. "CNTRVAL,The counter value is written to this register when HPSMI_PROFILE_FREEZE[FREEZE_AXIMASTER] bit 4 is HIGH and a '1' is written to HPSMI_PROFILE_FREEZE[WEN]"
|
|
line.long 0x28 "PROFILE_AXIRDCNTRVAL_5,HPSMI AXI Master 5 Read Port Profile Counter Value Register"
|
|
hexmask.long 0x28 0.--31. 1. "CNTRVAL,The counter value is written to this register when HPSMI_PROFILE_FREEZE[FREEZE_AXIMASTER] bit 5 is HIGH and a '1' is written to HPSMI_PROFILE_FREEZE[WEN]"
|
|
line.long 0x2C "PROFILE_AXIWRCNTRVAL_5,HPSMI AXI Master 5 Write Port Profile Counter Value Register"
|
|
hexmask.long 0x2C 0.--31. 1. "CNTRVAL,The counter value is written to this register when HPSMI_PROFILE_FREEZE[FREEZE_AXIMASTER] bit 5 is HIGH and a '1' is written to HPSMI_PROFILE_FREEZE[WEN]"
|
|
line.long 0x30 "PROFILE_AXIRDCNTRVAL_6,HPSMI AXI Master 6 Read Port Profile Counter Value Register"
|
|
hexmask.long 0x30 0.--31. 1. "CNTRVAL,The counter value is written to this register when HPSMI_PROFILE_FREEZE[FREEZE_AXIMASTER] bit 6 is HIGH and a '1' is written to HPSMI_PROFILE_FREEZE[WEN]"
|
|
line.long 0x34 "PROFILE_AXIWRCNTRVAL_6,HPSMI AXI Master 6 Write Port Profile Counter Value Register"
|
|
hexmask.long 0x34 0.--31. 1. "CNTRVAL,The counter value is written to this register when HPSMI_PROFILE_FREEZE[FREEZE_AXIMASTER] bit 6 is HIGH and a '1' is written to HPSMI_PROFILE_FREEZE[WEN]"
|
|
line.long 0x38 "PROFILE_LSB2AXIRDCNTRVAL_0,HPSMI LSB2AXI Master 0 Read Port Profile Counter Value Register"
|
|
hexmask.long 0x38 0.--31. 1. "CNTRVAL,The counter value is written to this register when HPSMI_PROFILE_FREEZE[FREEZE_LSB2AXIMASTER] bit 0 isHIGH and a '1' is written to HPSMI_PROFILE_FREEZE[WEN]"
|
|
line.long 0x3C "PROFILE_LSB2AXIWRCNTRVAL_0,HPSMI LSB2AXI Master 0 Write Port Profile Counter Value Register"
|
|
hexmask.long 0x3C 0.--31. 1. "CNTRVAL,The counter value is written to this register when HPSMI_PROFILE_FREEZE[FREEZE_LSB2AXIMASTER] bit 0 isHIGH and a '1' is written to HPSMI_PROFILE_FREEZE[WEN]"
|
|
line.long 0x40 "PROFILE_LSB2AXIRDCNTRVAL_1,HPSMI LSB2AXI Master 1 Read Port Profile Counter Value Register"
|
|
hexmask.long 0x40 0.--31. 1. "CNTRVAL,The counter value is written to this register when HPSMI_PROFILE_FREEZE[FREEZE_LSB2AXIMASTER] bit 1 is HIGH and a '1' is written to HPSMI_PROFILE_FREEZE[WEN]"
|
|
line.long 0x44 "PROFILE_LSB2AXIWRCNTRVAL_1,HPSMI LSB2AXI Master 1 Write Port Profile Counter Value Register"
|
|
hexmask.long 0x44 0.--31. 1. "CNTRVAL,The counter value is written to this register when HPSMI_PROFILE_FREEZE[FREEZE_LSB2AXIMASTER] bit 1 isHIGH and a '1' is written to HPSMI_PROFILE_FREEZE[WEN]"
|
|
line.long 0x48 "PROFILE_AXICYCCNTRVAL_0,HPSMI AXI Master 0 Cycle Counter Value Register"
|
|
hexmask.long 0x48 0.--31. 1. "CNTRVAL,The counter value is updated to this register when HPSMI_PROFILE_FREEZE[FREEZE_AXIMASTER] bit 0 is HIGH and a '1' is written to HPSMI_PROFILE_FREEZE[WEN]"
|
|
line.long 0x4C "PROFILE_AXICYCCNTRVAL_1,HPSMI AXI Master 1 Cycle Counter Value Register"
|
|
hexmask.long 0x4C 0.--31. 1. "CNTRVAL,The counter value is updated to this register when HPSMI_PROFILE_FREEZE[FREEZE_AXIMASTER] bit 1 is HIGH and a '1' is written to HPSMI_PROFILE_FREEZE[WEN]"
|
|
line.long 0x50 "PROFILE_AXICYCCNTRVAL_2,HPSMI AXI Master 2 Cycle Counter Value Register"
|
|
hexmask.long 0x50 0.--31. 1. "CNTRVAL,The counter value is updated to this register when HPSMI_PROFILE_FREEZE[FREEZE_AXIMASTER] bit 2 is HIGH and a '1' is written to HPSMI_PROFILE_FREEZE[WEN]"
|
|
line.long 0x54 "PROFILE_AXICYCCNTRVAL_3,HPSMI AXI Master 3 Cycle Counter Value Register"
|
|
hexmask.long 0x54 0.--31. 1. "CNTRVAL,The counter value is updated to this register when HPSMI_PROFILE_FREEZE[FREEZE_AXIMASTER] bit 3 is HIGH and a '1' is written to HPSMI_PROFILE_FREEZE[WEN]"
|
|
line.long 0x58 "PROFILE_AXICYCCNTRVAL_4,HPSMI AXI Master 4 Cycle Counter Value Register"
|
|
hexmask.long 0x58 0.--31. 1. "CNTRVAL,The counter value is updated to this register when HPSMI_PROFILE_FREEZE[FREEZE_AXIMASTER] bit 4 is HIGH and a '1' is written to HPSMI_PROFILE_FREEZE[WEN]"
|
|
line.long 0x5C "PROFILE_AXICYCCNTRVAL_5,HPSMI AXI Master 5 Cycle Counter Value Register"
|
|
hexmask.long 0x5C 0.--31. 1. "CNTRVAL,The counter value is updated to this register when HPSMI_PROFILE_FREEZE[FREEZE_AXIMASTER] bit 5 is HIGH and a '1' is written to HPSMI_PROFILE_FREEZE[WEN]"
|
|
line.long 0x60 "PROFILE_AXICYCCNTRVAL_6,HPSMI AXI Master 6 Cycle Counter Value Register"
|
|
hexmask.long 0x60 0.--31. 1. "CNTRVAL,The counter value is updated to this register when HPSMI_PROFILE_FREEZE[FREEZE_AXIMASTER] bit 6 is HIGH and a '1' is written to HPSMI_PROFILE_FREEZE[WEN]"
|
|
line.long 0x64 "RD_PL_LVL_31_0,HPSMI Stream DMA Read Pipeline Level 31_0 Register"
|
|
hexmask.long 0x64 0.--31. 1. "MASTERNUM,Bit position indicates the master number. Bit0 corresponds to master number 0"
|
|
line.long 0x68 "RD_PL_LVL_63_32,HPSMI Stream DMA Read Pipeline Level 63_32 Register"
|
|
hexmask.long 0x68 0.--31. 1. "MASTERNUM,Bit position indicates the master number. Bit0 corresponds to master number 32"
|
|
rgroup.long 0xE0++0x7
|
|
line.long 0x0 "WR_PL_LVL_31_0,HPSMI Stream DMA Write Pipeline Level 31_0 Register"
|
|
hexmask.long 0x0 0.--31. 1. "MASTERNUM,Bit position indicates the master number. Bit0 corresponds to master number 0"
|
|
line.long 0x4 "WR_PL_LVL_63_32,HPSMI Stream DMA Write Pipeline Level 63_32 Register"
|
|
hexmask.long 0x4 0.--31. 1. "MASTERNUM,Bit position indicates the master number. Bit0 corresponds to master number 32"
|
|
group.long 0x100++0xF
|
|
line.long 0x0 "DSRD_ADDRESS_ERROR0,HPSMI Stream DMA Read Address Error 0 Register"
|
|
hexmask.long 0x0 0.--31. 1. "DMA_RD_ADDR_ERROR,Bit position gives master number. Bit position 0 corresponds to master number 0."
|
|
line.long 0x4 "DSRD_ADDRESS_ERROR1,HPSMI Stream DMA Read Address Error 1 Register"
|
|
hexmask.long 0x4 0.--31. 1. "DMA_RD_ADDR_ERROR,Bit position gives master number"
|
|
line.long 0x8 "DSWR_ADDRESS_ERROR0,HPSMI Stream DMA Write Address Error 0 Register"
|
|
hexmask.long 0x8 0.--31. 1. "DMA_WR_ADDR_ERROR,Bit position gives master number. Bit position 0 corresponds to master number 0."
|
|
line.long 0xC "DSWR_ADDRESS_ERROR1,HPSMI Stream DMA Write Address Error 1 Register"
|
|
hexmask.long 0xC 0.--31. 1. "DMA_WR_ADDR_ERROR,Bit position gives master number"
|
|
rgroup.long 0x11C++0x3
|
|
line.long 0x0 "ADDR_ERROR_ADDRVAL,HPSMI Addressing Error Address Register"
|
|
hexmask.long 0x0 0.--31. 1. "ERROR_ADDRESS,When an address error occurs this register gives the erroneous address provided by the highest priority master which caused error"
|
|
group.long 0x120++0x3
|
|
line.long 0x0 "ADDR_ERROR_INFO,HPSMI Addressing Error Information Register"
|
|
bitfld.long 0x0 9. "ADDR_ERR,This field goes HIGH when there is an addressing error" "0,1"
|
|
newline
|
|
rbitfld.long 0x0 6. "MASTER_TYPE,This field gives the highest priority master type causing addressing error" "0: stream DMA read master,1: stream DMA write master"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--5. 1. "MASTERNUM,This field gives the highest priority master number causing addressing error"
|
|
group.long 0x134++0x7
|
|
line.long 0x0 "WRMPU_ERROR0,HPSMI Stream DMA Write MPU Error 0 Register"
|
|
hexmask.long 0x0 0.--31. 1. "DMA_WR_MPU_ERR,Bit position gives the master number. Bit 0 corresponds to master number 0."
|
|
line.long 0x4 "WRMPU_ERROR1,HPSMI Stream DMA Write MPU Error 1 Register"
|
|
hexmask.long 0x4 0.--31. 1. "DMA_WR_MPU_ERR,Bit position gives the master number"
|
|
rgroup.long 0x13C++0x3
|
|
line.long 0x0 "WRMPU_ERROR_ADDR,HPSMI MPU Error Address Register"
|
|
hexmask.long 0x0 0.--31. 1. "ERROR_ADDRESS,This register gives the address which caused the MPU access error"
|
|
group.long 0x140++0x3
|
|
line.long 0x0 "WRMPU_ERROR_INFO,HPSMI MPU Error Information Register"
|
|
bitfld.long 0x0 9. "MPU_ERR,This bit goes HIGH when there is an MPU access error. An interupt is sent out simultaneously." "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--5. 1. "MASTERNUM,This field gives the highest priority write stream DMA master number causing MPU error"
|
|
group.long 0x150++0x3
|
|
line.long 0x0 "PM_ERROR_1_2,no description available"
|
|
hexmask.long.word 0x0 0.--15. 1. "ERROR_BANK,Each bit corresponds to a memory bank"
|
|
rgroup.long 0x154++0x3
|
|
line.long 0x0 "PM_ERROR_ADDR_1_2,no description available"
|
|
hexmask.long 0x0 0.--31. 1. "ERROR_ADDR,When a 'power mode illegal access' error occurs this register gives the erroneous address provided by the highest priority bank which caused error"
|
|
group.long 0x158++0x3
|
|
line.long 0x0 "PM_ERROR_INFO_1_2,no description available"
|
|
bitfld.long 0x0 13. "PM_ERR,This bit goes HIGH when there is a memory access while it is in power down or retention mode" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "BANKNUM,This field gives the bank number of the LSB segment bank which causes the error"
|
|
newline
|
|
rbitfld.long 0x0 6.--7. "MASTER_TYPE,This field gives the master type causing the error on the LSB segments" "0: Stream DMA read Master,1: Stream DMA write Master,2: AXI Master,?"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--5. 1. "MASTERNUM,This field indicates the master number causing the power mode violation on the LSB segments"
|
|
group.long 0x180++0x7
|
|
line.long 0x0 "ECC_ERR_INJECT,HPSMI Error Inject Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "ERR_INJECT,This field gives the error injection value"
|
|
line.long 0x4 "ECC_ERRCNTR_MASK,HPSMI ECC Error Counter Reset Mask"
|
|
bitfld.long 0x4 11. "SEG0_EVEN_MASK,When HPSMI_ECC_ERRINFO_SEG0[ECC_ERR_EVEN] is SET and also this bit is SET then.." "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "SEG0_ODD_MASK,When HPSMI_ECC_ERRINFO_SEG0[ECC_ERR_ODD] is SET and also this bit is SET then.." "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "SEG2_MASK,When HPSMI_ECC_ERRINFO_SEG2[ECC_ERR] is SET and '1' is written to it and also this bit is SET then HPSMI_ECC_SINGLE_ERRCNTR_1_2[ECCERR_OVF_SEG2] HPSMI_ECC_SINGLE_ERRCNTR_1_2[ERR_CNTR_SEG2] HPSMI_ECC_UNCORR_ERRCNTR_1_2[ECCERR_OVF_SEG2] and.." "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "SEG1_MASK,When HPSMI_ECC_ERRINFO_SEG1[ECC_ERR] is SET and '1' is written to it and also this bit is SET then HPSMI_ECC_SINGLE_ERRCNTR_1_2[ECCERR_OVF_SEG1] HPSMI_ECC_SINGLE_ERRCNTR_1_2[ERR_CNTR_SEG1] HPSMI_ECC_UNCORR_ERRCNTR_1_2[ECCERR_OVF_SEG1] and.." "0,1"
|
|
rgroup.long 0x188++0x7
|
|
line.long 0x0 "ECC_SINGLE_ERRCNTR_1_2,Single Error counter for SEG1_2 Register"
|
|
bitfld.long 0x0 14. "ECCERR_OVF_SEG2,This bit is set when counter counting number of single-bit ECC errors reaches count 63 and another error occurs" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--13. 1. "ERR_CNTR_SEG2,This register counts the number of ECC single-bit(correctable) errors that have occurred"
|
|
newline
|
|
bitfld.long 0x0 6. "ECCERR_OVF_SEG1,This bit is set when counter counting number of single-bit ECC errors reaches count 63 and another error occurs" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--5. 1. "ERR_CNTR_SEG1,This register counts the number of ECC single-bit(correctable) errors that have occurred for segment1"
|
|
line.long 0x4 "ECC_UNCORR_ERRCNTR_1_2,Uncorrectable Error Counter for Seg1_2 Register"
|
|
bitfld.long 0x4 14. "ECCERR_OVF_SEG2,This bit is set when counter counting number of uncorrectable ECC errors reaches count 63 and another error occurs" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--13. 1. "ERR_CNTR_SEG2,This register counts the number of ECC uncorrectable errors that have occurred in memory seg2"
|
|
newline
|
|
bitfld.long 0x4 6. "ECCERR_OVF_SEG1,This bit is set when counter counting number of uncorrectable ECC errors reaches count 63 and another error occurs" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--5. 1. "ERR_CNTR_SEG1,This register counts the number of ECC uncorrectable errors that have occurred in memory segment1"
|
|
rgroup.long 0x198++0xB
|
|
line.long 0x0 "ECC_ERRADDR_SEG1,HPSMI ECC Error Address Segment 1 Register"
|
|
hexmask.long 0x0 0.--31. 1. "ERROR_ADDR,This field reflects the address at which an ECC error occurred in segment 1"
|
|
line.long 0x4 "ECC_ERRDATA0_SEG1,HPSMI ECC Error Data 31:0 for Segment 1 Register"
|
|
hexmask.long 0x4 0.--31. 1. "ERROR_DATA0,This field reflects bits 31 down to 0 of the data for which an ECC error occurred in segment 1"
|
|
line.long 0x8 "ECC_ERRDATA1_SEG1,HPSMI ECC Error Data 63:32 for Segment 1 Register"
|
|
hexmask.long 0x8 0.--31. 1. "ERROR_DATA1,This field reflects bits 63 down to 32 of the data for which an ECC error occurred in segment 1"
|
|
group.long 0x1A4++0x3
|
|
line.long 0x0 "ECC_ERRINFO_SEG1,HPSMI ECC Error Information Segment 1 Register"
|
|
bitfld.long 0x0 12. "ECC_ERR,This bit goes HIGH when an ECC error occurs" "0,1"
|
|
newline
|
|
rbitfld.long 0x0 9.--11. "ERR_BANK,This field indicates the bank at which error occurred" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
rbitfld.long 0x0 8. "ERR_TYPE,This field indicates the type of ECC error The value in this field is valid only when HPSMI_ECC_ERRINFO_SEG1[ECC_ERR] bit is set" "0: Uncorrectable error,1: Correctable error"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "SYNDROME,This field reflects the syndrome when error occurs in segment 1"
|
|
rgroup.long 0x1A8++0xB
|
|
line.long 0x0 "ECC_ERRADDR_SEG2,HPSMI ECC Error Address Segment 2 Register"
|
|
hexmask.long 0x0 0.--31. 1. "ERROR_ADDR,This field reflects the address at which an ECC error occurred in segment 2"
|
|
line.long 0x4 "ECC_ERRDATA0_SEG2,HPSMI ECC Error Data 31:0 for Segment 2 Register"
|
|
hexmask.long 0x4 0.--31. 1. "ERROR_DATA0,This field reflects bits 31 down to 0 of the data for which an ECC error occurred in segment 2"
|
|
line.long 0x8 "ECC_ERRDATA1_SEG2,HPSMI ECC Error Data 63:32 for Segment 2 Register"
|
|
hexmask.long 0x8 0.--31. 1. "ERROR_DATA1,This field reflects bits 63 down to 32 of the data for which an ECC error occurred in segment 2"
|
|
group.long 0x1B4++0x7
|
|
line.long 0x0 "ECC_ERRINFO_SEG2,HPSMI ECC Error Information Segment 2 Register"
|
|
bitfld.long 0x0 12. "ECC_ERR,This bit goes HIGH when an ECC error occurs on segment 2" "0,1"
|
|
newline
|
|
rbitfld.long 0x0 9.--11. "ERR_BANK,This field indicates the bank at which error occurred" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
rbitfld.long 0x0 8. "ERR_TYPE,This field indicates the type of ECC error The value in this field is valid only when HPSMI_ECC_ERRINFO_SEG2[ECC_ERR] bit is set" "0: Uncorrectable error,1: Correctable error"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "SYNDROME,This field reflects the syndrome when error occurs in segment 2"
|
|
line.long 0x4 "ECC_ERROCCURRED_SEG1_2,no description available"
|
|
hexmask.long.word 0x4 0.--15. 1. "ERR,Each bit corresponds to a bank in segment 1 or 2."
|
|
rgroup.long 0x1BC++0x17
|
|
line.long 0x0 "ECC_ERRADDR_SEG0_EVEN,HPSMI ECC Error Address for Even Banks of Segment0 Register"
|
|
hexmask.long 0x0 0.--31. 1. "ERR_ADDR_EVEN,This field reflects the address at which an ECC error occurred in segment 0 for even banks"
|
|
line.long 0x4 "ECC_ERRADDR_SEG0_ODD,HPSMI ECC Error Address for Odd Banks of Segment0 Register"
|
|
hexmask.long 0x4 0.--31. 1. "ERR_ADDR_ODD,This field reflects the address at which an ECC error occurred in segment 0 for odd banks"
|
|
line.long 0x8 "ECC_ERRDATA0_SEG0_EVEN,HPSMI ECC Error Data 31:0 for even banks of Segment0 Register"
|
|
hexmask.long 0x8 0.--31. 1. "ERR_DATA0_EVEN,This field reflects bits 31:0 of the data for which an ECC error occurred in segment 0 for even banks"
|
|
line.long 0xC "ECC_ERRDATA1_SEG0_EVEN,HPSMI ECC Error Data 63:32 for even banks of Segment0 Register"
|
|
hexmask.long 0xC 0.--31. 1. "ERR_DATA1_EVEN,This field reflects bits 63:32 of the data for which an ECC error occurred in segment 0 for even banks"
|
|
line.long 0x10 "ECC_ERRDATA0_SEG0_ODD,HPSMI ECC Error Data 31:0 for odd banks of Segment0 Register"
|
|
hexmask.long 0x10 0.--31. 1. "ERR_DATA0_ODD,This field reflects bits 31:0 of the data for which an ECC error occurred in segment 0 for odd banks"
|
|
line.long 0x14 "ECC_ERRDATA1_SEG0_ODD,HPSMI ECC Error Data 63:32 for odd banks of Segment0 Register"
|
|
hexmask.long 0x14 0.--31. 1. "ERR_DATA1_ODD,This field reflects bits 63:32 of the data for which an ECC error occurred in segment 0 for odd banks"
|
|
group.long 0x1D4++0x7
|
|
line.long 0x0 "ECC_ERRINFO_SEG0,HPSMI ECC Error Information Segment 0 Register"
|
|
bitfld.long 0x0 29. "ECC_ERR_ODD,This bit goes HIGH when an ECC error occurs for odd cuts of segment0" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 25.--28. 1. "ERR_ODD_BANK,This field indicates the odd cuts of segment0 at which error occurred"
|
|
newline
|
|
rbitfld.long 0x0 24. "ERR_TYPE_ODD,This field indicates the type of ECC error for ODD banks 0-Uncorrectable error 1-Correctable The value in this field is valid only when HPSMI_ECC_ERRINFO_SEG0[ECC_ERR_EVEN] bit is set" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--23. 1. "SYND_ODD,This field reflects the syndrome when error occurs in segment0 for odd cuts"
|
|
newline
|
|
bitfld.long 0x0 13. "ECC_ERR_EVEN,This bit goes HIGH when an ECC error occurs for even cuts of segment0" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 9.--12. 1. "ERR_EVEN_BANK,This field indicates the even cuts of segment0 at which error occurred"
|
|
newline
|
|
rbitfld.long 0x0 8. "ERR_TYPE_EVEN,This field indicates the type of ECC error for EVEN banks 0-Uncorrectable error 1-Correctable The value in this field is valid only when HPSMI_ECC_ERRINFO_SEG0[ECC_ERR_EVEN] bit is set" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "SYND_EVEN,This field reflects the syndrome when error occurs in segment0 for even cut"
|
|
line.long 0x4 "ECC_ERROCCURED_SEG0,no description available"
|
|
hexmask.long.tbyte 0x4 0.--23. 1. "ERR,This field indicates when an ECC error has occurred for segment0 Bit 0 corresponds to even cut of bank0"
|
|
rgroup.long 0x1DC++0x7
|
|
line.long 0x0 "ECC_SINGLE_ERRCNTR_ODD_EVEN_0,ECC Single Error Counter for Odd and Even Bank Register"
|
|
bitfld.long 0x0 14. "ECC_ERR_OVF_EVEN,This bit is set when counter counting number of single-bit ECC errors reaches count 63 and another error occurs" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--13. 1. "ECC_ERR_CNTR_EVEN,This register counts the number of ECC single-bit(correctable) errors that have occurred for even banks of segment0"
|
|
newline
|
|
bitfld.long 0x0 6. "ECC_ERR_OVF_ODD,This bit is set when counter counting number of single-bit ECC errors reaches count 63 and another error occurs" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--5. 1. "ECC_ERR_CNTR_ODD,This register counts the number of ECC single-bit(correctable) errors that have occurred for odd banks of segment0"
|
|
line.long 0x4 "ECC_UNCORR_ERRCNTR_ODD_EVEN_0,ECC Uncorectable Error Conter for Odd and Even Bank Register"
|
|
bitfld.long 0x4 14. "ECC_ERR_OVF_EVEN,This bit is set when counter counting number of uncorrectable ECC errors reaches count 63 and another error occurs" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--13. 1. "ECC_ERR_CNTR_EVEN,This register counts the number of ECC un-correctable errors that have occurred for even banks of segment0"
|
|
newline
|
|
bitfld.long 0x4 6. "ECC_ERR_OVF_ODD,This bit is set when counter counting number of uncorrectable ECC errors reaches count 63 and another error occurs" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--5. 1. "ECC_ERR_CNTR_ODD,This register counts the number of ECC Uncorrectable errors that have occurred for odd banks of segment0"
|
|
group.long 0x1E4++0x3
|
|
line.long 0x0 "PM_ERROR_0,no description available"
|
|
hexmask.long.word 0x0 0.--11. 1. "ERROR_BANK,A bit in this field gets set when an access to the corresponding memory bank is attempted while the memory is in power down or retention mode Bit 0 corresponds to both even and odd bank of bank0 of segment 0 Bit 1 corresponds to both even and.."
|
|
rgroup.long 0x1E8++0x3
|
|
line.long 0x0 "PM_ERROR_ADDR_0,no description available"
|
|
hexmask.long 0x0 0.--31. 1. "ERROR_ADDR,When a 'power mode illegal access' error occurs this register gives the erroneous address provided by the highest priority bank which caused error"
|
|
group.long 0x1EC++0xB
|
|
line.long 0x0 "PM_ERROR_INFO_0,no description available"
|
|
hexmask.long.tbyte 0x0 11.--31. 1. "TRANSACTION_ID,This field identifies the transaction ID causing the power mode error for segment0"
|
|
newline
|
|
bitfld.long 0x0 4. "PM_ERR,This bit goes HIGH when there is a memory access while it is in power down or retention mode" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "BANKNUM,This field gives the LSB bank num which causes the error"
|
|
line.long 0x4 "POWMOD_CTRL_0,no description available"
|
|
bitfld.long 0x4 27.--29. "PM_BANK7,This field decides the power mode for bank7 for seg0 memories" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "PM_BANK6,This field decides the power mode for bank6 for seg0 memories" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 19.--21. "PM_BANK5,This field decides the power mode for bank5 for seg0 memories" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 16.--18. "PM_BANK4,This field decides the power mode for bank4 for seg0 memories" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 11.--13. "PM_BANK3,This field decides the power mode for bank3 for seg0 memories" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 8.--10. "PM_BANK2,This field decides the power mode for bank2 for seg0 memories" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 3.--5. "PM_BANK1,This field decides the power mode for bank1 for seg0 memories" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 0.--2. "PM_BANK0,This field decides the power mode for bank0 for seg0 memories" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "POWMOD_CTRL_0_8_11,no description available"
|
|
bitfld.long 0x8 11.--13. "PM_BANK11,This field decides the power mode for bank11 for seg0 memories" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x8 8.--10. "PM_BANK10,This field decides the power mode for bank10 for seg0 memories" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x8 3.--5. "PM_BANK9,This field decides the power mode for bank9 for seg0 memories." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x8 0.--2. "PM_BANK8,This field decides the power mode for bank8 for seg0 memories" "0,1,2,3,4,5,6,7"
|
|
group.long 0x200++0x3
|
|
line.long 0x0 "POWMOD_CTRL_1_2,no description available"
|
|
bitfld.long 0x0 3.--5. "PM_SEG2,This field decides the power mode for segment 2 memories" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "PM_SEG1,This field decides the power mode for segment 1 memories" "0,1,2,3,4,5,6,7"
|
|
group.long 0x20C++0x3
|
|
line.long 0x0 "QOS_PRIORITY,no description available"
|
|
bitfld.long 0x0 31. "WEN,Write enable-This bit is auto-reset and goes to zero when proper synchronization takes place" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--19. 1. "M_LSB1_AXI8,It contains the priority value of m_lsb1_axi8 master"
|
|
newline
|
|
hexmask.long.byte 0x0 12.--15. 1. "M_LSB0_AXI7,It contains the priority value of m_lsb0_axi7 master"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "M_FASTDMA_AXI6,It contains the priority value of m_fastdma_axi6 master"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "M_CORES_AXI4,It contains the priority value of m_cores_axi4 master"
|
|
group.long 0x224++0x17
|
|
line.long 0x0 "IPCGE,Interconnect Parity Checking Global Enable Register"
|
|
bitfld.long 0x0 0. "GLBL_EN,This bit globally enables or disables all interconnect parity checker modules." "0: Interconnect Parity Checkers are disabled.,1: Interconnect Parity Checkers are enabled."
|
|
line.long 0x4 "IPRCE,Interconnect Parity Read Checking Enable Register"
|
|
bitfld.long 0x4 17. "IPRE_LSB2AXI1,This bit enables or disables the read data parity checker module for the interconnect related to LSB2AXI Channel1" "0: Disabled the Interconnect Read Data Parity..,1: Enabled the Interconnect Write Data Parity.."
|
|
newline
|
|
bitfld.long 0x4 16. "IPRE_LSB2AXI0,This bit enables or disables the read data parity checker module for the interconnect related to LSB2AXI Channel0" "0: Disabled the Interconnect Read Parity Checker.,1: Enabled the Interconnect Read Parity Checker."
|
|
newline
|
|
bitfld.long 0x4 10. "IPRE_AXI6,This bit enables or disables the read data parity checker module for 64-bit AXIMASTER2." "0: Disabled the Interconnect Read Data Parity..,1: Enabled the Interconnect Read Data Parity Checker."
|
|
newline
|
|
bitfld.long 0x4 9. "IPRE_AXI5,This bit enables or disables the read data parity checker module for 64-bit AXIMASTER1." "0: Disabled the Interconnect Read Data Parity..,1: Enabled the Interconnect Read Data Parity Checker."
|
|
newline
|
|
bitfld.long 0x4 8. "IPRE_AXI4,This bit enables or disables the read data parity checker module for 64-bit AXIMASTER0." "0: Disabled the Interconnect Read Data Parity..,1: Enabled the Interconnect Read Data Parity Checker."
|
|
newline
|
|
bitfld.long 0x4 3. "IPRE_AXI3,This bit enables or disables the read data parity checker module for 128-bit AXIMASTER3." "0: Disabled the Interconnect Read Data Parity..,1: Enabled the Interconnect Read Data Parity Checker."
|
|
newline
|
|
bitfld.long 0x4 2. "IPRE_AXI2,This bit enables or disables the read data parity checker module for 128-bit AXIMASTER2." "0: Disabled the Interconnect Read Data parity..,1: Enabled the Interconnect Read Data parity checker."
|
|
newline
|
|
bitfld.long 0x4 1. "IPRE_AXI1,This bit enables or disables the read data parity checker module for 128-bit AXIMASTER1." "0: Disabled the Interconnect Read Data Parity..,1: Enabled the Interconnect Read Data Parity Checker."
|
|
newline
|
|
bitfld.long 0x4 0. "IPRE_AXI0,This bit enables or disables the read data parity checker module for 128-bit AXIMASTER0." "0: Disabled the Interconnect Read Data Parity..,1: Enabled the Interconnect Read Data Parity Checker."
|
|
line.long 0x8 "IPWCE,no description available"
|
|
bitfld.long 0x8 17. "IPWCE_S13,Interconnect Parity write data checking enable for AXI2LSB Channel1." "0: Interconnect Write Data Parity Checker is..,1: Interconnect Write Data parity Checker is enabled."
|
|
newline
|
|
bitfld.long 0x8 16. "IPWCE_S12,Interconnect Parity write data checking enable for AXI2LSB Channel0." "0: Interconnect Write Data Parity Checker is..,1: Interconnect Write Data parity Checker is enabled."
|
|
newline
|
|
bitfld.long 0x8 11. "IPWCE_S11,Interconnect Parity write data checking enable for bank11." "0: Interconnect Write Data Parity Checker is..,1: Interconnect Write Data parity Checker is enabled."
|
|
newline
|
|
bitfld.long 0x8 10. "IPWCE_S10,Interconnect Parity write data checking enable for bank10." "0: Interconnect Write Data Parity Checker is..,1: Interconnect Write Data parity Checker is enabled."
|
|
newline
|
|
bitfld.long 0x8 9. "IPWCE_S9,Interconnect Parity write data checking enable for bank9." "0: Interconnect Write Data Parity Checker is..,1: Interconnect Write Data parity Checker is enabled."
|
|
newline
|
|
bitfld.long 0x8 8. "IPWCE_S8,Interconnect Parity write data checking enable for bank8." "0: Interconnect Write Data Parity Checker is..,1: Interconnect Write Data parity Checker is enabled."
|
|
newline
|
|
bitfld.long 0x8 7. "IPWCE_S7,Interconnect Parity write data checking enable for bank7." "0: Interconnect Write Data Parity Checker is..,1: Interconnect Write Data parity Checker is enabled."
|
|
newline
|
|
bitfld.long 0x8 6. "IPWCE_S6,Interconnect Parity write data checking enable for bank6." "0: Interconnect Write Data Parity Checker is..,1: Interconnect Write Data parity Checker is enabled."
|
|
newline
|
|
bitfld.long 0x8 5. "IPWCE_S5,Interconnect Parity write data checking enable for bank5." "0: Interconnect Write Data Parity Checker is..,1: Interconnect Write Data parity Checker is enabled."
|
|
newline
|
|
bitfld.long 0x8 4. "IPWCE_S4,Interconnect Parity write data checking enable for bank4." "0: Interconnect Write Data Parity Checker is..,1: Interconnect Write Data parity Checker is enabled."
|
|
newline
|
|
bitfld.long 0x8 3. "IPWCE_S3,Interconnect Parity write data checking enable for bank3." "0: Interconnect Write Data Parity Checker is..,1: Interconnect Write Data Parity Checker is enabled."
|
|
newline
|
|
bitfld.long 0x8 2. "IPWCE_S2,Interconnect Parity write data checking enable for bank2." "0: Interconnect Write Data Parity Checker is..,1: Interconnect Write Data parity Checker is enabled."
|
|
newline
|
|
bitfld.long 0x8 1. "IPWCE_S1,Interconnect Parity write data checking enable for bank1." "0: Interconnect Write Data Parity Checker is..,1: Interconnect Write Data parity Checker is enabled."
|
|
newline
|
|
bitfld.long 0x8 0. "IPWCE_S0,Interconnect Parity write data checking enable for bank0." "0: Interconnect Write Data Parity Checker is..,1: Interconnect Write Data parity Checker is enabled."
|
|
line.long 0xC "IPWACE,Interconnect Parity Write Address Checking Enable Register"
|
|
bitfld.long 0xC 17. "IPWACE_S13,Interconnect Parity write address checking enable for AXI2LSB Channel1" "0: Interconnect Write address Parity Checker is..,1: Interconnect Write address parity Checker is.."
|
|
newline
|
|
bitfld.long 0xC 16. "IPWACE_S12,Interconnect Parity write address checking enable for AXI2LSB Channel0" "0: Interconnect Write address Parity Checker is..,1: Interconnect Write address parity Checker is.."
|
|
newline
|
|
bitfld.long 0xC 11. "IPWACE_S11,Interconnect Parity write address checking enable for bank11. Following are the bit details:" "0: Interconnect Write address Parity Checker is..,1: Interconnect Write address parity Checker is.."
|
|
newline
|
|
bitfld.long 0xC 10. "IPWACE_S10,Interconnect Parity write address checking enable for bank10. Following are the bit details:" "0: Interconnect Write address Parity Checker is..,1: Interconnect Write address parity Checker is.."
|
|
newline
|
|
bitfld.long 0xC 9. "IPWACE_S9,Interconnect Parity write address checking enable for bank9. Following are the bit details:" "0: Interconnect Write address Parity Checker is..,1: Interconnect Write address parity Checker is.."
|
|
newline
|
|
bitfld.long 0xC 8. "IPWACE_S8,Interconnect Parity write address checking enable for bank8. Following are the bit details:" "0: Interconnect Write address Parity Checker is..,1: Interconnect Write address parity Checker is.."
|
|
newline
|
|
bitfld.long 0xC 7. "IPWACE_S7,Interconnect Parity write address checking enable for bank7. Following are the bit details:" "0: Interconnect Write address Parity Checker is..,1: Interconnect Write address parity Checker is.."
|
|
newline
|
|
bitfld.long 0xC 6. "IPWACE_S6,Interconnect Parity write address checking enable for bank6. Following are the bit details:" "0: Interconnect Write address Parity Checker is..,1: Interconnect Write address parity Checker is.."
|
|
newline
|
|
bitfld.long 0xC 5. "IPWACE_S5,Interconnect Parity write address checking enable for bank5. Following are the bit details:" "0: Interconnect Write address Parity Checker is..,1: Interconnect Write address parity Checker is.."
|
|
newline
|
|
bitfld.long 0xC 4. "IPWACE_S4,Interconnect Parity write address checking enable for bank4. Following are the bit details:" "0: Interconnect Write address Parity Checker is..,1: Interconnect Write address parity Checker is.."
|
|
newline
|
|
bitfld.long 0xC 3. "IPWACE_S3,Interconnect Parity write address checking enable for bank3. Following are the bit details:" "0: Interconnect Write address Parity Checker is..,1: Interconnect Write address parity Checker is.."
|
|
newline
|
|
bitfld.long 0xC 2. "IPWACE_S2,Interconnect Parity write address checking enable for bank2. Following are the bit details:" "0: Interconnect Write address Parity Checker is..,1: Interconnect Write address parity Checker is.."
|
|
newline
|
|
bitfld.long 0xC 1. "IPWACE_S1,Interconnect Parity write address checking enable for bank1. Following are the bit details:" "0: Interconnect Write address Parity Checker is..,1: Interconnect Write address parity Checker is.."
|
|
newline
|
|
bitfld.long 0xC 0. "IPWACE_S0,Interconnect Parity write address checking enable for bank0. Following are the bit details:" "0: Interconnect Write address Parity Checker is..,1: Interconnect Write address parity Checker is.."
|
|
line.long 0x10 "IPRACE,Interconnect Parity Read Address Checking Enable Register"
|
|
bitfld.long 0x10 17. "IPRACE_S13,Interconnect Parity read address checking enable for AXI2LSB Channel1." "0: Interconnect Read address Parity Checker is..,1: Interconnect Read address parity Checker is.."
|
|
newline
|
|
bitfld.long 0x10 16. "IPRACE_S12,Interconnect Parity read address checking enable for AXI2LSB Channel0." "0: Interconnect Read address Parity Checker is..,1: Interconnect Read address parity Checker is.."
|
|
newline
|
|
bitfld.long 0x10 11. "IPRACE_S11,Interconnect Parity read address checking enable for bank11." "0: Interconnect Read address Parity Checker is..,1: Interconnect Read address parity Checker is.."
|
|
newline
|
|
bitfld.long 0x10 10. "IPRACE_S10,Interconnect Parity read address checking enable for bank10." "0: Interconnect Read address Parity Checker is..,1: Interconnect Read address parity Checker is.."
|
|
newline
|
|
bitfld.long 0x10 9. "IPRACE_S9,Interconnect Parity read address checking enable for bank9." "0: Interconnect Read address Parity Checker is..,1: Interconnect Read address parity Checker is.."
|
|
newline
|
|
bitfld.long 0x10 8. "IPRACE_S8,Interconnect Parity read address checking enable for bank8." "0: Interconnect Read address Parity Checker is..,1: Interconnect Read address parity Checker is.."
|
|
newline
|
|
bitfld.long 0x10 7. "IPRACE_S7,Interconnect Parity read address checking enable for bank7." "0: Interconnect Read address Parity Checker is..,1: Interconnect Read address parity Checker is.."
|
|
newline
|
|
bitfld.long 0x10 6. "IPRACE_S6,Interconnect Parity read address checking enable for bank6." "0: Interconnect Read address Parity Checker is..,1: Interconnect Read address parity Checker is.."
|
|
newline
|
|
bitfld.long 0x10 5. "IPRACE_S5,Interconnect Parity read address checking enable for bank5." "0: Interconnect Read address Parity Checker is..,1: Interconnect Read address parity Checker is.."
|
|
newline
|
|
bitfld.long 0x10 4. "IPRACE_S4,Interconnect Parity read address checking enable for bank4." "0: Interconnect Read address Parity Checker is..,1: Interconnect Read address parity Checker is.."
|
|
newline
|
|
bitfld.long 0x10 3. "IPRACE_S3,Interconnect Parity read address checking enable for bank3." "0: Interconnect Read address Parity Checker is..,1: Interconnect Read address parity Checker is.."
|
|
newline
|
|
bitfld.long 0x10 2. "IPRACE_S2,Interconnect Parity read address checking enable for bank2." "0: Interconnect Read address Parity Checker is..,1: Interconnect Read address parity Checker is.."
|
|
newline
|
|
bitfld.long 0x10 1. "IPRACE_S1,Interconnect Parity read address checking enable for bank1." "0: Interconnect Read address Parity Checker is..,1: Interconnect Read address parity Checker is.."
|
|
newline
|
|
bitfld.long 0x10 0. "IPRACE_S0,Interconnect Parity read address checking enable for bank0." "0: Interconnect Read address Parity Checker is..,1: Interconnect Read address parity Checker is.."
|
|
line.long 0x14 "IPCGIE,Interconnect Parity Checking Global Injection Enable Register"
|
|
bitfld.long 0x14 0. "GLBL_IEN,This bit globally enables or disables the error injection features of the parity checker modules." "0: Interconnect Parity Checkers Error Injection..,1: Interconnect Parity Checkers Error Injection.."
|
|
tree.end
|
|
tree "I2C (Inter-Integrated Circuit)"
|
|
base ad:0x0
|
|
tree "I2C_0"
|
|
base ad:0x40051000
|
|
group.byte 0x0++0x6
|
|
line.byte 0x0 "IBAD,I2C Bus Address Register"
|
|
hexmask.byte 0x0 1.--7. 1. "ADR,Slave Address"
|
|
line.byte 0x1 "IBFD,I2C Bus Frequency Divider Register"
|
|
hexmask.byte 0x1 0.--7. 1. "IBC,I-Bus Clock Rate"
|
|
line.byte 0x2 "IBCR,I2C Bus Control Register"
|
|
bitfld.byte 0x2 7. "MDIS,Module disable" "0: The I2C Bus module is enabled. This bit must be..,1: The module is reset and disabled. This is the.."
|
|
bitfld.byte 0x2 6. "IBIE,I-Bus Interrupt Enable." "0: Interrupts from the I2C Bus module are disabled.,1: Interrupts from the I2C Bus module are enabled."
|
|
newline
|
|
bitfld.byte 0x2 5. "MSSL,Master/Slave mode select" "0: Slave Mode,1: Master Mode"
|
|
bitfld.byte 0x2 4. "TXRX,Transmit/Receive mode select" "0: Receive,1: Transmit"
|
|
newline
|
|
bitfld.byte 0x2 3. "NOACK,Data Acknowledge disable" "0: An acknowledge signal will be sent out to the..,1: No acknowledge signal response is sent (i.e."
|
|
bitfld.byte 0x2 2. "RSTA,Repeat Start" "0: No effect,1: Generate repeat start cycle"
|
|
newline
|
|
bitfld.byte 0x2 1. "DMAEN,DMA Enable" "0: Disable the DMA TX/RX request signals,1: Enable the DMA TX/RX request signals"
|
|
line.byte 0x3 "IBSR,I2C Bus Status Register"
|
|
rbitfld.byte 0x3 7. "TCF,Transfer complete" "0: Transfer in progress,1: Transfer complete"
|
|
rbitfld.byte 0x3 6. "IAAS,Addressed as a slave" "0: Not addressed,1: Addressed as a slave"
|
|
newline
|
|
rbitfld.byte 0x3 5. "IBB,Bus busy" "0: Bus is Idle,1: Bus is busy"
|
|
bitfld.byte 0x3 4. "IBAL,Arbitration Lost" "0,1"
|
|
newline
|
|
rbitfld.byte 0x3 2. "SRW,Slave Read/Write" "0: Slave receive master writing to slave,1: Slave transmit master reading from slave"
|
|
bitfld.byte 0x3 1. "IBIF,I-Bus Interrupt Flag" "0,1"
|
|
newline
|
|
rbitfld.byte 0x3 0. "RXAK,Received Acknowledge" "0: Acknowledge received,1: No acknowledge received"
|
|
line.byte 0x4 "IBDR,I2C Bus Data I/O Register"
|
|
hexmask.byte 0x4 0.--7. 1. "DATA,Data transmitted or received"
|
|
line.byte 0x5 "IBIC,I2C Bus Interrupt Config Register"
|
|
bitfld.byte 0x5 7. "BIIE,Bus Idle Interrupt Enable bit" "0: Bus Idle Interrupts disabled,1: Bus Idle Interrupts enabled"
|
|
bitfld.byte 0x5 6. "BYTERXIE,Byte receive interrupt enable This field is used to generate an interrupt every time the I2C master/slave receives a new byte" "0,1"
|
|
line.byte 0x6 "IBDBG,I2C Bus Debug Register"
|
|
bitfld.byte 0x6 3. "GLFLT_EN,Glitch Filter Enable When GLFLT_EN = 1 the I2C module filters out any pulse (rising or falling) on the SCL or SDA input line that is less than 6 IPG clock cycles" "0: All pulses on the SCL or SDA input lines are..,1: The I2C module filters out any pulse (rising or.."
|
|
bitfld.byte 0x6 2. "BYTE_RX,This field gets set when an I2C master/slave receives a new byte" "0,1"
|
|
newline
|
|
rbitfld.byte 0x6 1. "IPG_DEBUG_HALTED,Debug Halted Bit: This is s status bit which can be read back after asserting the debug enable signal so as to know if the IP has entered the debug mode or not" "0: IP is still executing a transaction,1: IP has entered the debug mode"
|
|
bitfld.byte 0x6 0. "IPG_DEBUG_EN,Debug enable bit" "0: Normal operation Bus Idle Interrupts disabled,1: IP is in debug mode"
|
|
tree.end
|
|
tree "I2C_1"
|
|
base ad:0x400B8000
|
|
group.byte 0x0++0x6
|
|
line.byte 0x0 "IBAD,I2C Bus Address Register"
|
|
hexmask.byte 0x0 1.--7. 1. "ADR,Slave Address"
|
|
line.byte 0x1 "IBFD,I2C Bus Frequency Divider Register"
|
|
hexmask.byte 0x1 0.--7. 1. "IBC,I-Bus Clock Rate"
|
|
line.byte 0x2 "IBCR,I2C Bus Control Register"
|
|
bitfld.byte 0x2 7. "MDIS,Module disable" "0: The I2C Bus module is enabled. This bit must be..,1: The module is reset and disabled. This is the.."
|
|
bitfld.byte 0x2 6. "IBIE,I-Bus Interrupt Enable." "0: Interrupts from the I2C Bus module are disabled.,1: Interrupts from the I2C Bus module are enabled."
|
|
newline
|
|
bitfld.byte 0x2 5. "MSSL,Master/Slave mode select" "0: Slave Mode,1: Master Mode"
|
|
bitfld.byte 0x2 4. "TXRX,Transmit/Receive mode select" "0: Receive,1: Transmit"
|
|
newline
|
|
bitfld.byte 0x2 3. "NOACK,Data Acknowledge disable" "0: An acknowledge signal will be sent out to the..,1: No acknowledge signal response is sent (i.e."
|
|
bitfld.byte 0x2 2. "RSTA,Repeat Start" "0: No effect,1: Generate repeat start cycle"
|
|
newline
|
|
bitfld.byte 0x2 1. "DMAEN,DMA Enable" "0: Disable the DMA TX/RX request signals,1: Enable the DMA TX/RX request signals"
|
|
line.byte 0x3 "IBSR,I2C Bus Status Register"
|
|
rbitfld.byte 0x3 7. "TCF,Transfer complete" "0: Transfer in progress,1: Transfer complete"
|
|
rbitfld.byte 0x3 6. "IAAS,Addressed as a slave" "0: Not addressed,1: Addressed as a slave"
|
|
newline
|
|
rbitfld.byte 0x3 5. "IBB,Bus busy" "0: Bus is Idle,1: Bus is busy"
|
|
bitfld.byte 0x3 4. "IBAL,Arbitration Lost" "0,1"
|
|
newline
|
|
rbitfld.byte 0x3 2. "SRW,Slave Read/Write" "0: Slave receive master writing to slave,1: Slave transmit master reading from slave"
|
|
bitfld.byte 0x3 1. "IBIF,I-Bus Interrupt Flag" "0,1"
|
|
newline
|
|
rbitfld.byte 0x3 0. "RXAK,Received Acknowledge" "0: Acknowledge received,1: No acknowledge received"
|
|
line.byte 0x4 "IBDR,I2C Bus Data I/O Register"
|
|
hexmask.byte 0x4 0.--7. 1. "DATA,Data transmitted or received"
|
|
line.byte 0x5 "IBIC,I2C Bus Interrupt Config Register"
|
|
bitfld.byte 0x5 7. "BIIE,Bus Idle Interrupt Enable bit" "0: Bus Idle Interrupts disabled,1: Bus Idle Interrupts enabled"
|
|
bitfld.byte 0x5 6. "BYTERXIE,Byte receive interrupt enable This field is used to generate an interrupt every time the I2C master/slave receives a new byte" "0,1"
|
|
line.byte 0x6 "IBDBG,I2C Bus Debug Register"
|
|
bitfld.byte 0x6 3. "GLFLT_EN,Glitch Filter Enable When GLFLT_EN = 1 the I2C module filters out any pulse (rising or falling) on the SCL or SDA input line that is less than 6 IPG clock cycles" "0: All pulses on the SCL or SDA input lines are..,1: The I2C module filters out any pulse (rising or.."
|
|
bitfld.byte 0x6 2. "BYTE_RX,This field gets set when an I2C master/slave receives a new byte" "0,1"
|
|
newline
|
|
rbitfld.byte 0x6 1. "IPG_DEBUG_HALTED,Debug Halted Bit: This is s status bit which can be read back after asserting the debug enable signal so as to know if the IP has entered the debug mode or not" "0: IP is still executing a transaction,1: IP has entered the debug mode"
|
|
bitfld.byte 0x6 0. "IPG_DEBUG_EN,Debug enable bit" "0: Normal operation Bus Idle Interrupts disabled,1: IP is in debug mode"
|
|
tree.end
|
|
tree "I2C_2"
|
|
base ad:0x400BA000
|
|
group.byte 0x0++0x6
|
|
line.byte 0x0 "IBAD,I2C Bus Address Register"
|
|
hexmask.byte 0x0 1.--7. 1. "ADR,Slave Address"
|
|
line.byte 0x1 "IBFD,I2C Bus Frequency Divider Register"
|
|
hexmask.byte 0x1 0.--7. 1. "IBC,I-Bus Clock Rate"
|
|
line.byte 0x2 "IBCR,I2C Bus Control Register"
|
|
bitfld.byte 0x2 7. "MDIS,Module disable" "0: The I2C Bus module is enabled. This bit must be..,1: The module is reset and disabled. This is the.."
|
|
bitfld.byte 0x2 6. "IBIE,I-Bus Interrupt Enable." "0: Interrupts from the I2C Bus module are disabled.,1: Interrupts from the I2C Bus module are enabled."
|
|
newline
|
|
bitfld.byte 0x2 5. "MSSL,Master/Slave mode select" "0: Slave Mode,1: Master Mode"
|
|
bitfld.byte 0x2 4. "TXRX,Transmit/Receive mode select" "0: Receive,1: Transmit"
|
|
newline
|
|
bitfld.byte 0x2 3. "NOACK,Data Acknowledge disable" "0: An acknowledge signal will be sent out to the..,1: No acknowledge signal response is sent (i.e."
|
|
bitfld.byte 0x2 2. "RSTA,Repeat Start" "0: No effect,1: Generate repeat start cycle"
|
|
newline
|
|
bitfld.byte 0x2 1. "DMAEN,DMA Enable" "0: Disable the DMA TX/RX request signals,1: Enable the DMA TX/RX request signals"
|
|
line.byte 0x3 "IBSR,I2C Bus Status Register"
|
|
rbitfld.byte 0x3 7. "TCF,Transfer complete" "0: Transfer in progress,1: Transfer complete"
|
|
rbitfld.byte 0x3 6. "IAAS,Addressed as a slave" "0: Not addressed,1: Addressed as a slave"
|
|
newline
|
|
rbitfld.byte 0x3 5. "IBB,Bus busy" "0: Bus is Idle,1: Bus is busy"
|
|
bitfld.byte 0x3 4. "IBAL,Arbitration Lost" "0,1"
|
|
newline
|
|
rbitfld.byte 0x3 2. "SRW,Slave Read/Write" "0: Slave receive master writing to slave,1: Slave transmit master reading from slave"
|
|
bitfld.byte 0x3 1. "IBIF,I-Bus Interrupt Flag" "0,1"
|
|
newline
|
|
rbitfld.byte 0x3 0. "RXAK,Received Acknowledge" "0: Acknowledge received,1: No acknowledge received"
|
|
line.byte 0x4 "IBDR,I2C Bus Data I/O Register"
|
|
hexmask.byte 0x4 0.--7. 1. "DATA,Data transmitted or received"
|
|
line.byte 0x5 "IBIC,I2C Bus Interrupt Config Register"
|
|
bitfld.byte 0x5 7. "BIIE,Bus Idle Interrupt Enable bit" "0: Bus Idle Interrupts disabled,1: Bus Idle Interrupts enabled"
|
|
bitfld.byte 0x5 6. "BYTERXIE,Byte receive interrupt enable This field is used to generate an interrupt every time the I2C master/slave receives a new byte" "0,1"
|
|
line.byte 0x6 "IBDBG,I2C Bus Debug Register"
|
|
bitfld.byte 0x6 3. "GLFLT_EN,Glitch Filter Enable When GLFLT_EN = 1 the I2C module filters out any pulse (rising or falling) on the SCL or SDA input line that is less than 6 IPG clock cycles" "0: All pulses on the SCL or SDA input lines are..,1: The I2C module filters out any pulse (rising or.."
|
|
bitfld.byte 0x6 2. "BYTE_RX,This field gets set when an I2C master/slave receives a new byte" "0,1"
|
|
newline
|
|
rbitfld.byte 0x6 1. "IPG_DEBUG_HALTED,Debug Halted Bit: This is s status bit which can be read back after asserting the debug enable signal so as to know if the IP has entered the debug mode or not" "0: IP is still executing a transaction,1: IP has entered the debug mode"
|
|
bitfld.byte 0x6 0. "IPG_DEBUG_EN,Debug enable bit" "0: Normal operation Bus Idle Interrupts disabled,1: IP is in debug mode"
|
|
tree.end
|
|
tree.end
|
|
tree "IPL"
|
|
base ad:0x400C3000
|
|
group.long 0x0++0x27
|
|
line.long 0x0 "CFG,Configuration Register"
|
|
bitfld.long 0x0 25. "TXRXLB,TX-RX loop-back enable This field is to enable internal feed of the transmitting block outputs back to receiving block inputs through the I/O pins" "0: TX-RX loop-back is disabled.,1: TX-RX loop-back is enabled."
|
|
bitfld.long 0x0 24. "TEN,Test mode enable" "0: Test mode is disabled.,1: Test mode is enabled."
|
|
newline
|
|
bitfld.long 0x0 4. "EOTFE,End of data frame transfer based on TX FIFO empty This field is to configure condition to perform end of a data frame transfer (EOT)" "0: End of a data frame transfer based on TX FIFO..,1: End of data frame transfer based on TX FIFO.."
|
|
bitfld.long 0x0 2.--3. "ACP,Automatic CRC protection For reliable CRC word transfer if automatic CRC protection is enabled (ACP = 01b or ACP = 11b) the sum of the time period defined by SCOR[IFTIM] in transmitter and SCOR[COLTIM] in receiver must by larger than 3 module clock.." "0: CRC calculation is disabled.,1: Automatic transfer checksum enabled: CRC..,2: Automatic transfer checksum disabled: CRC..,3: Automatic transfer checksum enabled: CRC.."
|
|
newline
|
|
bitfld.long 0x0 0.--1. "PORT_SIZE,Selection of data bus size" "0: 16-bit data bus; transfer order of the 16-bit..,1: 8-bit data bus; transfer order of the 8-bit data..,2: 4-bit data bus; transfer order of the 4-bit data..,3: Reserved; do not use"
|
|
line.long 0x4 "SCOR,Sequencer Configuration Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. "IFTIM,Minimum inter-frame time This value determines a minimum inter-frame time period i"
|
|
hexmask.long.byte 0x4 16.--23. 1. "COLTIM,Collision detection phase This value determines a time period of the collision detection phase at the beginning of an IPL data frame transfer in terms of number of module clock periods"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--15. 1. "BCKO,Back-off value for collision resolution in master output mode This value is given in number of periods of the internal module clock MODCLK and defines period of transmitter's back-off time i"
|
|
bitfld.long 0x4 7. "POL,Polarity of the shift clock signal IPLCLK" "0: idle high; leading edges are falling edges,1: idle low; leading edges are rising edges"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--6. 1. "SSD,Transmission speed This value determines the transmission speed i"
|
|
line.long 0x8 "FFCR,FIFO Configuration and Control Register"
|
|
bitfld.long 0x8 24. "RFCLR,RX FIFO clear" "0: No action,1: Clear the RX FIFO"
|
|
bitfld.long 0x8 16. "TFCLR,TX FIFO clear" "0: No action,1: Clear the TX FIFO"
|
|
newline
|
|
hexmask.long.byte 0x8 12.--15. 1. "RFAFL,RX FIFO almost full level Defines a threshold level at which the almost full condition is signaled on IPLRDY pin"
|
|
hexmask.long.byte 0x8 8.--11. 1. "RFWL,RX FIFO watermark level Defines a threshold level for triggering interrupts and/or DMA requests if the fill level of the RX FIFO overrun the defined level i"
|
|
newline
|
|
hexmask.long.byte 0x8 0.--3. 1. "TFWL,Defines a threshold level for triggering interrupts and/or DMA requests if the fill level of the TX FIFO underrun the defined level i"
|
|
line.long 0xC "CR,Control Register"
|
|
bitfld.long 0xC 30. "TXDOE,Enable peripheral bus error on write access to TXDR resulting in TX FIFO overrun If enabled write access to TXDR resulting in TX FIFO overrun will be terminated with the peripheral bus error" "0: Bus error on the write access is disabled.,1: Bus error on the write access is enabled."
|
|
bitfld.long 0xC 29. "RXDUE,Enable peripheral bus error on read access to RXDR resulting in RX FIFO underrun If enabled read access to RXDR resulting in RX FIFO underrun will be terminated with the peripheral bus error" "0: Bus error on the read access is disabled.,1: Bus error on the read access is enabled."
|
|
newline
|
|
bitfld.long 0xC 28. "RXDOE,Enable peripheral bus error on read access to RXDR while RX FIFO is overrun If enabled read access to RXDR while RX FIFO is overrun will be terminated with the peripheral bus error" "0,1"
|
|
hexmask.long.byte 0xC 24.--27. 1. "RXDRWL,RX FIFO fill level threshold enabling peripheral bus wait states insertion on read accesses to RXDR Due to asynchronous implementation of the RX FIFO its write pointer value which is updated with the IPLCLK clock propagates to MODCLK module.."
|
|
newline
|
|
bitfld.long 0xC 0. "MEN,Module enable 0 IPL Module is disabled. 1 IPL Module is enabled." "0,1"
|
|
line.long 0x10 "SR,Status Register"
|
|
bitfld.long 0x10 31. "EOT,End of data frame transfer status and request The control field is to request end of a pending data frame transfer (EOT)" "0,1"
|
|
bitfld.long 0x10 30. "RXCEP,RX CRC error on previous transfers This flag is set if the RXCE field is set and a new RX transfer has been started" "0: No receiving of a data frame has been started..,1: Receiving of a data frame has been started while.."
|
|
newline
|
|
bitfld.long 0x10 29. "RXCE,RX CRC error This flag is set at receive CRC error detection on the end of a data frame transfer if automatic transfer checksum was enabled (CFG[ACP]=01b|11b)" "0: RX CRC error has not been detected.,1: RX CRC error has been detected."
|
|
bitfld.long 0x10 28. "COL,Collision detection" "0: Collision has not been detected.,1: Collision has been detected."
|
|
newline
|
|
bitfld.long 0x10 27. "RFWO,RX FIFO watermark overrun" "0: RX FIFO watermark has not been overrun.,1: RX FIFO watermark has been overrun."
|
|
bitfld.long 0x10 26. "TFWU,TX FIFO watermark underrun" "0: TX FIFO watermark has not been underrun.,1: TX FIFO watermark has been underrun."
|
|
newline
|
|
bitfld.long 0x10 25. "LRFAF,Local RX FIFO almost full while RX transfer" "0: Local RX FIFO almost full condition while RX..,1: Local RX FIFO almost full condition while RX.."
|
|
bitfld.long 0x10 24. "RRFAF,Remote RX FIFO almost full while TX transfer" "0: Remote RX FIFO almost full condition while TX..,1: Remote RX FIFO almost full condition while TX.."
|
|
newline
|
|
bitfld.long 0x10 23. "THER,Transfer handling error A transfer handling error occurs at read access to the empty TX FIFO and at write attempt to restricted registers (cf" "0: No transfer handling error detected.,1: Transfer handling error detected."
|
|
bitfld.long 0x10 22. "RFU,RX FIFO underrun" "0: RX FIFO has not been underrun.,1: RX FIFO has been underrun."
|
|
newline
|
|
bitfld.long 0x10 21. "RFO,RX FIFO overrun" "0: RX FIFO has not been overrun.,1: RX FIFO has been overrun."
|
|
bitfld.long 0x10 20. "TFO,TX FIFO overrun" "0: TX FIFO has not been overrun.,1: TX FIFO has been overrun."
|
|
newline
|
|
bitfld.long 0x10 19. "SORX,Start of RX transfer This flag is set at the beginning of a data frame receive with the first sample captured on the data port IPLD" "0: Receive of a data frame has not been started.,1: Receive of a data frame has been started."
|
|
bitfld.long 0x10 18. "EORX,End of RX transfer This flag is set at the end of a data frame receive at falling edge detection on the IPLLST input" "0: Receive of a data frame has not been finished.,1: Receive of a data frame has been finished."
|
|
newline
|
|
bitfld.long 0x10 17. "SOTX,End of TX transfer This flag is set at the beginning of a data frame transmission with the first data driven on the data port IPLD" "0: Transmission of a data frame has not been started.,1: Transmission of a data frame has been started."
|
|
bitfld.long 0x10 16. "EOTX,End of TX transfer This flag is set at the end of a data frame transmission at the time of the IPLRDY pin release" "0: Transmission of a data frame has not been..,1: Transmission of a data frame has been finished."
|
|
newline
|
|
hexmask.long.byte 0x10 11.--15. 1. "RFFL,RX FIFO fill level This is the running fill level of the receive FIFO"
|
|
rbitfld.long 0x10 10. "ODT1,Ongoing DMA transfer on channel 1" "0: No data transfer on DMA channel 1.,1: Active data transfer on DMA channel 1."
|
|
newline
|
|
rbitfld.long 0x10 9. "ODT0,Ongoing DMA transfer on channel 0" "0: No data transfer on DMA channel 0.,1: Active data transfer on DMA channel 0."
|
|
bitfld.long 0x10 8. "IPLLST,Mirror of the signal level on the IPLLST pin after a 2xFlip-Flop synchronizer." "0: Currently IPLLST is low.,1: Currently IPLLST is high."
|
|
newline
|
|
hexmask.long.byte 0x10 3.--7. 1. "TFFL,TX FIFO fill level This is the running fill level of the transmit FIFO"
|
|
rbitfld.long 0x10 1.--2. "TRS,Transfer status" "0: Idle state,1: Receive mode (RX transfer pending),2: Transmit mode (TX transfer pending),3: Transmit & receive mode (RX&TX transfer pending.."
|
|
newline
|
|
rbitfld.long 0x10 0. "IPLRDY,Internal feedback of the signal routed to the IPLRDY pin" "0: Currently IPLRDY pin is low.,1: Currently IPLRDY pin is high."
|
|
line.long 0x14 "TXWCNTR,Transmit Word Counter Register"
|
|
hexmask.long 0x14 0.--31. 1. "TXWCNT,Indicate the current number of transmitted words"
|
|
line.long 0x18 "RXWCNTR,Receive Word Counter Register"
|
|
hexmask.long 0x18 0.--31. 1. "RXWCNT,Indicate the current number of received words"
|
|
line.long 0x1C "FFDB,FIFO Debugging Register"
|
|
rbitfld.long 0x1C 31. "RFAF,RX FIFO almost full The almost full condition is signaled if RX FIFO level is equal to or greater than (16 - FFCR[RFAFL]) e" "0: RX FIFO is not in almost full state.,1: RX FIFO is in almost full state."
|
|
rbitfld.long 0x1C 30. "RFO,RX FIFO overrun This field is set at write access to RX FIFO resulting in overrun of its capacity" "0: RX FIFO is not in overrun state.,1: RX FIFO is in overrun state."
|
|
newline
|
|
rbitfld.long 0x1C 29. "RFF,RX FIFO full This field is set at write access to RX FIFO resulting in its fullness or overrun of its capacity" "0: RX FIFO is not full.,1: RX FIFO is full."
|
|
hexmask.long.byte 0x1C 24.--28. 1. "RFWRPTR,Write pointer of the RX FIFO The pointer points on a FIFO array element to be written"
|
|
newline
|
|
rbitfld.long 0x1C 22. "RFU,RX FIFO underrun This field is set at read access to RX FIFO resulting in its underrun" "0: RX FIFO is not in underrun state.,1: RX FIFO is in underrun state."
|
|
rbitfld.long 0x1C 21. "RFE,RX FIFO empty This field is set at read access to RX FIFO resulting in its empty state its underrun or upon FIFO clearing cf" "0: RX FIFO is not empty.,1: RX FIFO is empty."
|
|
newline
|
|
hexmask.long.byte 0x1C 16.--20. 1. "RFRDPTR,Read pointer of the RX FIFO The pointer points on a FIFO array element to be read"
|
|
rbitfld.long 0x1C 14. "TFO,TX FIFO overrun This field is set at write access to TX FIFO resulting in overrun of its capacity" "0: TX FIFO is not in overrun state.,1: TX FIFO is in overrun state."
|
|
newline
|
|
rbitfld.long 0x1C 13. "TFF,TX FIFO full This field is set at write access to TX FIFO resulting in its fullness or overrun of its capacity" "0: TX FIFO is not full.,1: TX FIFO is full."
|
|
hexmask.long.byte 0x1C 8.--12. 1. "TFWRPTR,Write pointer of the TX FIFO The pointer points on a FIFO array element to be written"
|
|
newline
|
|
rbitfld.long 0x1C 6. "TFU,TX FIFO underrun This field is set at read access to TX FIFO resulting in its underrun" "0,1"
|
|
rbitfld.long 0x1C 5. "TFE,TX FIFO empty This bit is set at read access to TX FIFO resulting in its empty state its underrun or upon FIFO clearing cf" "0: TX FIFO is not empty.,1: TX FIFO is empty."
|
|
newline
|
|
hexmask.long.byte 0x1C 0.--4. 1. "TFRDPTR,Read pointer of the TX FIFO The pointer points on a FIFO array element to be read"
|
|
line.long 0x20 "RQER,Request Enable Register"
|
|
bitfld.long 0x20 31. "RFWO_DMA1,DMA channel 1 request enable for RX FIFO watermark overrun (RFWO)" "0: RFWO DMA channel 1 request disabled.,1: RFWO DMA channel 1 request enabled."
|
|
bitfld.long 0x20 30. "RFWO_DMA0,DMA channel 0 request enable for RX FIFO watermark overrun (RFWO)" "0: RFWO DMA channel 0 request disabled.,1: RFWO DMA channel 0 request enabled."
|
|
newline
|
|
bitfld.long 0x20 29. "TFWU_DMA1,DMA channel 1 request enable for TX FIFO watermark underrun (TFWU)" "0: TFWU DMA channel 1 request disabled.,1: TFWU DMA channel 1 request enabled."
|
|
bitfld.long 0x20 28. "TFWU_DMA0,DMA channel 0 request enable for TX FIFO watermark underrun (TFWU)" "0: TFWU DMA channel 0 request disabled.,1: TFWU DMA channel 0 request enabled."
|
|
newline
|
|
bitfld.long 0x20 27. "RXCE_IRQ1,Interrupt request 1 enable for RX CRC error (RXCE)" "0: RXCE Interrupt request 1 disabled.,1: RXCE Interrupt request 1 enabled."
|
|
bitfld.long 0x20 26. "RXCE_IRQ0,Interrupt request 0 enable for RX CRC error (RXCE)" "0: RXCE Interrupt request 0 disabled.,1: RXCE Interrupt request 0 enabled."
|
|
newline
|
|
bitfld.long 0x20 25. "COL_IRQ1,Interrupt request 1 enable for collision detection (COL)" "0: COL interrupt request 1 disabled.,1: COL interrupt request 1 enabled."
|
|
bitfld.long 0x20 24. "COL_IRQ0,Interrupt request 0 enable for collision detection (COL)" "0: COL interrupt request 0 disabled.,1: COL interrupt request 0 enabled."
|
|
newline
|
|
bitfld.long 0x20 23. "RFWO_IRQ1,Interrupt request 1 enable for RX FIFO watermark overrun (RFWO)" "0: RFWO Interrupt request 1 disabled.,1: RFWO Interrupt request 1 enabled."
|
|
bitfld.long 0x20 22. "RFWO_IRQ0,Interrupt request 0 enable for RX FIFO watermark overrun (RFWO)" "0: RFWO Interrupt request 0 disabled.,1: RFWO Interrupt request 0 enabled."
|
|
newline
|
|
bitfld.long 0x20 21. "TFWU_IRQ1,Interrupt request 1 enable for TX FIFO watermark underrun (TFWU)" "0: TFWU Interrupt request 1 disabled.,1: TFWU Interrupt request 1 enabled."
|
|
bitfld.long 0x20 20. "TFWU_IRQ0,Interrupt request 0 enable for TX FIFO watermark underrun (TFWU)" "0: TFWU Interrupt request 0 disabled.,1: TFWU Interrupt request 0 enabled."
|
|
newline
|
|
bitfld.long 0x20 19. "LRFAF_IRQ1,Interrupt request 1 enable for local RX FIFO almost full while RX transfer (LRFAF)" "0: LRFAF interrupt request 1 disabled.,1: LRFAF interrupt request 1 enabled."
|
|
bitfld.long 0x20 18. "LRFAF_IRQ0,Interrupt request 0 enable for local RX FIFO almost full while RX transfer (LRFAF)" "0: LRFAF interrupt request 0 disabled.,1: LRFAF interrupt request 0 enabled."
|
|
newline
|
|
bitfld.long 0x20 17. "RRFAF_IRQ1,Interrupt request 1 enable for remote RX FIFO almost full while TX transfer (RRFAF)" "0: RRFAF interrupt request 1 disabled.,1: RRFAF interrupt request 1 enabled."
|
|
bitfld.long 0x20 16. "RRFAF_IRQ0,Interrupt request 0 enable for remote RX FIFO almost full while TX transfer (RRFAF)" "0: RRFAF interrupt request 0 disabled.,1: RRFAF interrupt request 0 enabled."
|
|
newline
|
|
bitfld.long 0x20 15. "THER_IRQ1,Interrupt request 1 enable for transfer handling error (THER)" "0: THER interrupt request 1 disabled.,1: THER interrupt request 1 enabled."
|
|
bitfld.long 0x20 14. "THER_IRQ0,Interrupt request 0 enable for transfer handling error (THER)" "0: THER interrupt request 0 disabled.,1: THER interrupt request 0 enabled."
|
|
newline
|
|
bitfld.long 0x20 13. "RFU_IRQ1,Interrupt request 1 enable for RX FIFO underrun (RFU)" "0: RFU Interrupt request 1 disabled.,1: RFU Interrupt request 1 enabled."
|
|
bitfld.long 0x20 12. "RFU_IRQ0,Interrupt request 0 enable for RX FIFO underrun (RFU)" "0: RFU Interrupt request 0 disabled.,1: RFU Interrupt request 0 enabled."
|
|
newline
|
|
bitfld.long 0x20 11. "RFO_IRQ1,Interrupt request 1 enable for RX FIFO overrun (RFO)" "0: RFO Interrupt request 1 disabled.,1: RFO Interrupt request 1 enabled."
|
|
bitfld.long 0x20 10. "RFO_IRQ0,Interrupt request 0 enable for RX FIFO overrun (RFO)" "0: RFO Interrupt request 0 disabled.,1: RFO Interrupt request 0 enabled."
|
|
newline
|
|
bitfld.long 0x20 9. "TFO_IRQ1,Interrupt request 1 enable for TX FIFO overrun (TFO)" "0: TFO Interrupt request 1 disabled.,1: TFO Interrupt request 1 enabled."
|
|
bitfld.long 0x20 8. "TFO_IRQ0,Interrupt request 0 enable for TX FIFO overrun (TFO)" "0: TFO Interrupt request 0 disabled.,1: TFO Interrupt request 0 enabled."
|
|
newline
|
|
bitfld.long 0x20 7. "SORX_IRQ1,Interrupt request 1 enable for start of RX transfer (SORX)" "0: SORX interrupt request 1 disabled.,1: SORX interrupt request 1 enabled."
|
|
bitfld.long 0x20 6. "SORX_IRQ0,Interrupt request 0 enable for start of RX transfer (SORX)" "0: SORX interrupt request 0 disabled.,1: SORX interrupt request 0 enabled."
|
|
newline
|
|
bitfld.long 0x20 5. "EORX_IRQ1,Interrupt request 1 enable for end of RX transfer (EORX)" "0: EORX interrupt request 1 disabled.,1: EORX interrupt request 1 enabled."
|
|
bitfld.long 0x20 4. "EORX_IRQ0,Interrupt request 0 enable for end of RX transfer (EORX)" "0: EORX interrupt request 0 disabled.,1: EORX interrupt request 0 enabled."
|
|
newline
|
|
bitfld.long 0x20 3. "SOTX_IRQ1,Interrupt request 1 enable for start of TX transfer (SOTX)" "0: SOTX interrupt request 1 disabled.,1: SOTX interrupt request 1 enabled."
|
|
bitfld.long 0x20 2. "SOTX_IRQ0,Interrupt request 0 enable for start of TX transfer (SOTX)" "0: SOTX interrupt request 0 disabled.,1: SOTX interrupt request 0 enabled."
|
|
newline
|
|
bitfld.long 0x20 1. "EOTX_IRQ1,Interrupt request 1 enable for end of TX transfer (EOTX)" "0: EOTX interrupt request 1 disabled.,1: EOTX interrupt request 1 enabled."
|
|
bitfld.long 0x20 0. "EOTX_IRQ0,Interrupt request 0 enable for end of TX transfer (EOTX)" "0: EOTX interrupt request 0 disabled.,1: EOTX interrupt request 0 enabled."
|
|
line.long 0x24 "RQSR,Request Status Register"
|
|
rbitfld.long 0x24 31. "RFWO_DMA1,DMA channel 1 request for RX FIFO watermark overrun (RFWO) pending" "0: No RFWO DMA channel 1 request pending.,1: RFWO DMA channel 1 request pending."
|
|
rbitfld.long 0x24 30. "RFWO_DMA0,DMA channel 0 request for RX FIFO watermark overrun (RFWO) pending" "0: No RFWO DMA channel 0 request pending.,1: RFWO DMA channel 0 request pending."
|
|
newline
|
|
rbitfld.long 0x24 29. "TFWU_DMA1,DMA channel 1 request for TX FIFO watermark underrun (TFWU) pending" "0: No TFWU DMA channel 1 request disabled.,1: TFWU DMA channel 1 request enabled."
|
|
rbitfld.long 0x24 28. "TFWU_DMA0,DMA channel 0 request enable for TX FIFO watermark underrun (TFWU) pending" "0: No TFWU DMA channel 0 request pending.,1: TFWU DMA channel 0 request pending."
|
|
newline
|
|
bitfld.long 0x24 27. "RXCE_IRQ1,Interrupt request 1 for RX CRC error (RXCE) pending" "0: No RXCE Interrupt request 1 pending.,1: RXCE Interrupt request 1 pending."
|
|
bitfld.long 0x24 26. "RXCE_IRQ0,Interrupt request 0 for RX CRC error (RXCE) pending" "0: No RXCE Interrupt request 0 pending.,1: RXCE Interrupt request 0 pending."
|
|
newline
|
|
bitfld.long 0x24 25. "COL_IRQ1,Interrupt request 1 for collision detection (COL) pending" "0: No COL interrupt request 1 pending.,1: COL interrupt request 1 pending."
|
|
bitfld.long 0x24 24. "COL_IRQ0,Interrupt request 0 for collision detection (COL) pending" "0: No COL interrupt request 0 pending.,1: COL interrupt request 0 pending."
|
|
newline
|
|
bitfld.long 0x24 23. "RFWO_IRQ1,Interrupt request 1 for RX FIFO watermark overrun (RFWO) pending" "0: No RFWO Interrupt request 1 pending.,1: RFWO Interrupt request 1 pending."
|
|
bitfld.long 0x24 22. "RFWO_IRQ0,Interrupt request 0 for RX FIFO watermark overrun (RFWO) pending" "0: No RFWO Interrupt request 0 pending.,1: RFWO Interrupt request 0 pending."
|
|
newline
|
|
bitfld.long 0x24 21. "TFWU_IRQ1,Interrupt request 1 for TX FIFO watermark underrun (TFWU) pending" "0: No TWU Interrupt request 1 pending.,1: TWU Interrupt request 1 pending."
|
|
bitfld.long 0x24 20. "TFWU_IRQ0,Interrupt request 0 for TX FIFO watermark underrun(TFWU) pending" "0: No TFWU Interrupt request 0 pending.,1: TFWU Interrupt request 0 pending."
|
|
newline
|
|
bitfld.long 0x24 19. "LRFAF_IRQ1,Interrupt request 1 for local RX FIFO almost full while RX transfer (LRFAF) pending" "0: No LRFAF interrupt request 1 pending.,1: LRFAF interrupt request 1 pending."
|
|
bitfld.long 0x24 18. "LRFAF_IRQ0,Interrupt request 0 for local RX FIFO almost full while RX transfer (LRFAF) pending" "0: No LRFAF interrupt request 0 pending.,1: LRFAF interrupt request 0 pending."
|
|
newline
|
|
bitfld.long 0x24 17. "RRFAF_IRQ1,Interrupt request 1 for remote RX FIFO almost full while TX transfer (RRFAF) pending" "0: No RRFAF interrupt request 1 pending.,1: RRFAF interrupt request 1 pending."
|
|
bitfld.long 0x24 16. "RRFAF_IRQ0,Interrupt request 0 for remote RX FIFO almost full while TX transfer (RRFAF) pending" "0: No RRFAF interrupt request 0 pending.,1: RRFAF interrupt request 0 pending."
|
|
newline
|
|
bitfld.long 0x24 15. "THER_IRQ1,Interrupt request 1 for transfer handling error (THER) pending" "0: No THER interrupt request 1 pending.,1: THER interrupt request 1 pending."
|
|
bitfld.long 0x24 14. "THER_IRQ0,Interrupt request 0 for transfer handling error (THER) pending" "0: No THER interrupt request 0 pending.,1: THER interrupt request 0 pending."
|
|
newline
|
|
bitfld.long 0x24 13. "RFU_IRQ1,Interrupt request 1 for RX FIFO underrun (RFU) pending" "0: No RFU Interrupt request 1 pending.,1: RFU Interrupt request 1 pending."
|
|
bitfld.long 0x24 12. "RFU_IRQ0,Interrupt request 0 for RX FIFO underrun (RFU) pending" "0: No RFU Interrupt request 0 pending.,1: RFU Interrupt request 0 pending."
|
|
newline
|
|
bitfld.long 0x24 11. "RFO_IRQ1,Interrupt request 1 for RX FIFO overrun (RFO) pending" "0: No RFO Interrupt request 1 pending.,1: RFO Interrupt request 1 pending."
|
|
bitfld.long 0x24 10. "RFO_IRQ0,Interrupt request 0 for RX FIFO overrun (RFO pending)" "0: No RFO Interrupt request 0 pending.,1: RFO Interrupt request 0 pending."
|
|
newline
|
|
bitfld.long 0x24 9. "TFO_IRQ1,Interrupt request 1 for TX FIFO overrun (TFO) pending" "0: No TFO Interrupt request 1 pending.,1: TFO Interrupt request 1 pending."
|
|
bitfld.long 0x24 8. "TFO_IRQ0,Interrupt request 0 for TX FIFO overrun (TFO) pending" "0: No TFO Interrupt request 0 pending.,1: TFO Interrupt request 0 pending."
|
|
newline
|
|
bitfld.long 0x24 7. "SORX_IRQ1,Interrupt request 1 for start of RX transfer (SORX) pending" "0: No SORX interrupt request 1 pending.,1: SORX interrupt request 1 pending."
|
|
bitfld.long 0x24 6. "SORX_IRQ0,Interrupt request 0 for start of RX transfer (SORX) pending" "0: No SORX interrupt request 0 pending.,1: SORX interrupt request 0 pending."
|
|
newline
|
|
bitfld.long 0x24 5. "EORX_IRQ1,Interrupt request 1 for end of RX transfer (EORX) pending" "0: No EORX interrupt request 1 pending.,1: EORX interrupt request 1 pending."
|
|
bitfld.long 0x24 4. "EORX_IRQ0,Interrupt request 0 for end of RX transfer (EORX pending)" "0: No EORX interrupt request 0 pending.,1: EORX interrupt request 0 pending."
|
|
newline
|
|
bitfld.long 0x24 3. "SOTX_IRQ1,Interrupt request 1 for start of TX transfer (SOTX) pending" "0: No SOTX interrupt request 1 pending.,1: SOTX interrupt request 1 pending."
|
|
bitfld.long 0x24 2. "SOTX_IRQ0,Interrupt request 0 for start of TX transfer (SOTX) pending" "0: No SOTX interrupt request 0 pending.,1: SOTX interrupt request 0 pending."
|
|
newline
|
|
bitfld.long 0x24 1. "EOTX_IRQ1,Interrupt request 1 for end of TX transfer (EOTX) pending" "0: No EOTX interrupt request 1 pending.,1: EOTX interrupt request 1 pending."
|
|
bitfld.long 0x24 0. "EOTX_IRQ0,Interrupt request 0 enable for end of TX transfer (EOTX) pending" "0: No EOTX interrupt request 0 pending.,1: EOTX interrupt request 0 pending."
|
|
group.long 0x30++0xB
|
|
line.long 0x0 "TXCIR,Transmit CRC Initial Value Register"
|
|
hexmask.long 0x0 0.--31. 1. "TXCIR,Initial value of the transmit CRC signature This field provides the initial value of the transmit CRC signature (TXCRC) i"
|
|
line.long 0x4 "TXCRC,Transmit CRC Signature Register"
|
|
hexmask.long 0x4 0.--31. 1. "TXCRC,Current value of the transmit CRC signature This field provides the running transmit CRC signature i"
|
|
line.long 0x8 "RXCIR,Receive CRC Initial Value Register"
|
|
hexmask.long 0x8 0.--31. 1. "RXCIR,Initial value of the receive CRC signature This field provides the initial value of the receive CRC signature (RXCRC) i"
|
|
rgroup.long 0x3C++0x3
|
|
line.long 0x0 "RXCRC,Receive CRC Signature Register"
|
|
hexmask.long 0x0 0.--31. 1. "RXCRC,Current value of the receive CRC signature This field provides the receive CRC signature after a data frame receiving has been completed"
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x40)++0x3
|
|
line.long 0x0 "TXDR$1,Transmit Data Register"
|
|
hexmask.long 0x0 0.--31. 1. "TXD,TX FIFO access Every write access to this field results in placing of a new data word in the TX FIFO if the FIFO is not full"
|
|
repeat.end
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x60)++0x3
|
|
line.long 0x0 "RXDR$1,Receive Data Register"
|
|
hexmask.long 0x0 0.--31. 1. "RXD,RX FIFO access Every read access to this field results in fetching of a data word from the RX FIFO if the FIFO is not empty"
|
|
repeat.end
|
|
tree.end
|
|
tree "IPUS (Image Processing Unit - Scalar)"
|
|
base ad:0x0
|
|
tree "IPUS_0"
|
|
base ad:0x7C042000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "HOST_START,Command and Start Register"
|
|
hexmask.long.byte 0x0 16.--23. 1. "CSA,This field provides as a status the start address for the ongoing line processing."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "NSA,This field provides the address location in IRAM from where the processing of the next line starts"
|
|
line.long 0x4 "HOST_STATUS,Core Status Register"
|
|
hexmask.long.word 0x4 16.--31. 1. "REMAIN_PIXELS,Indicates the number of the pixels remaining to be processed"
|
|
newline
|
|
rbitfld.long 0x4 10. "DEBUG_STATUS,This field provides the debug status of the IPUS core." "0: In execution mode,1: In debug mode"
|
|
newline
|
|
rbitfld.long 0x4 8.--9. "CORE_STATUS,This field indicates the IPUS core status and number of triggers that has been bufferred." "0: Idle,1: Running single command.,?,?"
|
|
newline
|
|
bitfld.long 0x4 0.--1. "N_EVENTS,This fields reflects the value of the event counter" "0,1,2,3"
|
|
line.long 0x8 "HOST_POS,Position Configuration Register"
|
|
hexmask.long.word 0x8 16.--31. 1. "XPOS,This field indicates the horizontal position of the next line."
|
|
newline
|
|
hexmask.long.word 0x8 0.--15. 1. "YPOS,This field indicates the line number of the next line to be processed."
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x0 "HOST_CURRPOS,Current Position Status Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "CURR_XPOS,Provides the horizontal pixel position (XPOS) for the currently processed line."
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "CURR_YPOS,Provides the status the line number of the currently processed line."
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "HOST_XCFG,Line Width and Step Configuration Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "XSIZE,This field provides the width in terms of number of pixel componenets of the next line to be processed"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "XSTEP,This field provides the next incremental step for the XPOS register" "0: XPOS increment step is 4,1: XPOS increment step is 1,?,?"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "HOST_CURRXCFG,Current Line Width and Step Status Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "CURR_XSIZE,This field provides the width of the pixel component line being currently processed."
|
|
newline
|
|
bitfld.long 0x0 0.--1. "CURR_XSTEP,This field indicates the current XSTEP being used for processing." "0: XPOS increment step is 4,1: XPOS increment step is 1,?,?"
|
|
group.long 0x18++0xF
|
|
line.long 0x0 "HOST_INACFG,INA Matrix Configuration Register"
|
|
rbitfld.long 0x0 26. "CURR_EN_LINE2,Enable status for third row vector in 3x3 neighbourhood mode of INA matrix for the current line being processsed" "0: Third row-vector for currently line processed is..,1: Third row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x0 25. "CURR_EN_LINE1,Enable status for second row vector in 3x3 neighbourhood mode of INA matrix for the current line being processsed" "0: Second row-vector for currently line processed..,1: Second row-vector for currently line processed.."
|
|
newline
|
|
rbitfld.long 0x0 24. "CURR_EN_LINE0,Enable status for first row vector in 3x3 neighbourhood mode or complete row-vector in 1x9 neighbourhood mode of INA matrix for the current line being processsed" "0: First row-vector for currently line processed is..,1: First row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x0 18. "CURR_NHOOD,This field provides the current neighbourhood position of the elements in INA matrix being used in execution" "0: For the ongoing execution INA Matrix is in 3x3..,1: For the ongoing execution INA Matrix is in 1x9.."
|
|
newline
|
|
rbitfld.long 0x0 16.--17. "CURR_SHIFT,This field indicates the value currently being used for shifting each 1x3 row-vector or one 1x9 row-vector in INA matrix" "?,1: Row-vector of INA matrix will be shifted by 1.,?,?"
|
|
newline
|
|
bitfld.long 0x0 10. "EN_LINE2,This field enables the third row-vector of INA matrix for next line to be processed" "0: Disable the third 1x3 row vector of INA matrix..,1: Enable the third 1x3 row vector of INA matrix.."
|
|
newline
|
|
bitfld.long 0x0 9. "EN_LINE1,This field enables the second row-vector of INA matrix for next line to be processed" "0: Disable the second 1x3 row vector of INA matrix..,1: Enable the second 1x3 row vector of INA matrix.."
|
|
newline
|
|
bitfld.long 0x0 8. "EN_LINE0,This field enables the first row-vector of INA matrix for next line to be processed" "0: Disable first 1x3 row vector or 1x9 row vector..,1: Enable the first 1x3 row vector or 1x9 row.."
|
|
newline
|
|
bitfld.long 0x0 2. "NHOOD,This field provides the neighbourhood position of the elements in INA matrix" "0: INA Matrix is in 3x3 neighbourhood mode.,1: INA Matrix is in 1x9 neighbourhood mode."
|
|
newline
|
|
rbitfld.long 0x0 0.--1. "SHIFT,This field indicates the value by which each 1x3 row-vector or one 1x9 row-vector in INA matrix will be shifted when execution for the next line begins" "?,1: For next line processing shift the row vector of..,?,?"
|
|
line.long 0x4 "HOST_INBCFG,INB Matrix Configuration Register"
|
|
rbitfld.long 0x4 26. "CURR_EN_LINE2,Enable status for third row vector in 3x3 neighbourhood mode of INB matrix for the current line being processsed" "0: Third row-vector for currently line processed is..,1: Third row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x4 25. "CURR_EN_LINE1,Enable status for second row vector in 3x3 neighbourhood mode of INB matrix for the current line being processsed" "0: Second row-vector for currently line processed..,1: Second row-vector for currently line processed.."
|
|
newline
|
|
rbitfld.long 0x4 24. "CURR_EN_LINE0,Enable status for first row vector in 3x3 neighbourhood mode or complete row-vector in 1x9 neighbourhood mode of INB matrix for the current line being processsed" "0: First row-vector for currently line processed is..,1: First row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x4 18. "CURR_NHOOD,This field provides the neighbourhood position of the elements in INB matrix" "0: For the ongoing execution INB Matrix is in 3x3..,1: For the ongoing execution INB Matrix is in 1x9.."
|
|
newline
|
|
rbitfld.long 0x4 16.--17. "CURR_SHIFT,This field indicates the value currently being used for shifting each 1x3 row-vector or one 1x9 row-vector in INB matrix" "?,1: Row-vector of INA matrix will be shifted by 1.,?,?"
|
|
newline
|
|
bitfld.long 0x4 10. "EN_LINE2,This field enables the third row-vector of INB matrix for next line to be processed" "0: Disable the third 1x3 row vector of INB matrix..,1: Enable the third 1x3 row vector of INB matrix.."
|
|
newline
|
|
bitfld.long 0x4 9. "EN_LINE1,This field enables the second row-vector of INB matrix for next line to be processed" "0: Disable the second 1x3 row vector of INB matrix..,1: Enable the second 1x3 row vector of INB matrix.."
|
|
newline
|
|
bitfld.long 0x4 8. "EN_LINE0,This field enables the first row-vector of INB matrix for next line to be processed" "0: Disable first 1x3 row vector or 1x9 row vector..,1: Enable the first 1x3 row vector or 1x9 row.."
|
|
newline
|
|
bitfld.long 0x4 2. "NHOOD,This field provides the neighbourhood position of the elements in INB matrix" "0: INB Matrix is in 3x3 neighbourhood mode.,1: INB Matrix is in 1x9 neighbourhood mode."
|
|
newline
|
|
rbitfld.long 0x4 0.--1. "SHIFT,This field indicates the value by which each 1x3 row-vector or one 1x9 row-vector in INB matrix will be shifted when execution for the next line begins" "?,1: For next line processing shift the row vector of..,?,?"
|
|
line.long 0x8 "HOST_INALPHACFG,INALPHA Configuration Register"
|
|
rbitfld.long 0x8 26. "CURR_EN_LINE2,Enable status for third row vector in 3x3 neighbourhood mode of INALPHA matrix for the current line being processsed" "0: Third row-vector for currently line processed is..,1: Third row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x8 25. "CURR_EN_LINE1,Enable status for second row vector in 3x3 neighbourhood mode of INALPHA matrix for the current line being processsed" "0: Second row-vector for currently line processed..,1: Second row-vector for currently line processed.."
|
|
newline
|
|
rbitfld.long 0x8 24. "CURR_EN_LINE0,Enable status for first row vector in 3x3 neighbourhood mode or complete row-vector in 1x9 neighbourhood mode of INALPHA matrix for the current line being processsed" "0: First row-vector for currently line processed is..,1: First row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x8 18. "CURR_NHOOD,This field provides the current neighbourhood position of the elements in INALPHA matrix" "0: For the ongoing execution INALPHA Matrix is in..,1: For the ongoing execution INALPHA Matrix is in.."
|
|
newline
|
|
rbitfld.long 0x8 16.--17. "CURR_SHIFT,This field indicates the value currently being used for shifting each 1x3 row-vector or one 1x9 row-vector in INALPHA matrix" "?,1: Row-vector of INA matrix will be shifted by 1.,?,?"
|
|
newline
|
|
bitfld.long 0x8 10. "EN_LINE2,This field enables the third row-vector of INALPHA matrix for next line to be processed" "0: Disable the third 1x3 row vector of INALPHA..,1: Enable the third 1x3 row vector of INALPHA.."
|
|
newline
|
|
bitfld.long 0x8 9. "EN_LINE1,This field enables the second row-vector of INALPHA matrix for next line to be processed" "0: Disable the second 1x3 row vector of INALPHA..,1: Enable the second 1x3 row vector of INALPHA.."
|
|
newline
|
|
bitfld.long 0x8 8. "EN_LINE0,This field enables the first row-vector of INALPHA matrix for next line to be processed" "0: Disable first 1x3 row vector or 1x9 row vector..,1: Enable the first 1x3 row vector or 1x9 row.."
|
|
newline
|
|
bitfld.long 0x8 2. "NHOOD,This field provides the neighbourhood position of the elements in INALPHA matrix" "0: INALPHA Matrix is in 3x3 neighbourhood mode.,1: INALPHA matrix is in 1x9 neighbourhood mode."
|
|
newline
|
|
rbitfld.long 0x8 0.--1. "SHIFT,This field indicates the value by which each 1x3 row-vector or one 1x9 row-vector in INALPHA matrix will be shifted when execution for the next line begins" "?,1: For next line processing shift the row vector of..,?,?"
|
|
line.long 0xC "HOST_OUTCFG,OUT Matrix Configuration Register"
|
|
rbitfld.long 0xC 27. "CURR_EN_OUT3,This field indicates the status of the stream-out channel corresponding to OUT3 element for the current line processing" "0: OUT3 stream-out interface is disabled.,1: OUT3 stream-out interface is enabled."
|
|
newline
|
|
rbitfld.long 0xC 26. "CURR_EN_OUT2,This field indicates the status of the stream-out channel corresponding to OUT2 element for the current line processing" "0: OUT2 stream-out interface is disabled.,1: OUT2 stream-out interface is enabled."
|
|
newline
|
|
rbitfld.long 0xC 25. "CURR_EN_OUT1,This field indicates the status of the stream-out channel corresponding to OUT1 element for the current line processing" "0: OUT1 stream-out interface is disabled.,1: OUT1 stream-out interface is enabled."
|
|
newline
|
|
rbitfld.long 0xC 24. "CURR_EN_OUT0,This field indicates the status of the stream-out channel corresponding to OUT0 element for the current line processing" "0: OUT0 stream-out interface is disabled.,1: OUT0 stream-out interface is enabled."
|
|
newline
|
|
bitfld.long 0xC 11. "EN_OUT3,Enables the stream-out channel corresponding to OUT3 element of OUT matrix for processing the next line" "0: OUT3 stream-out channel is disabled.,1: OUT3 stream-out channel is enabled."
|
|
newline
|
|
bitfld.long 0xC 10. "EN_OUT2,Enables the stream-out channel corresponding to OUT2 element of OUT matrix for processing the next line" "0: OUT2 stream-out channel is disabled.,1: OUT2 stream-out channel is enabled."
|
|
newline
|
|
bitfld.long 0xC 9. "EN_OUT1,Enables the stream-out channel corresponding to OUT1 element of OUT matrix for processing the next line" "0: OUT1 stream-out channel is disabled.,1: OUT1 stream-out channel is enabled."
|
|
newline
|
|
bitfld.long 0xC 8. "EN_OUT0,Enables the stream-out channel corresponding to OUT0 element of OUT matrix for processing the next line" "0: OUT0 stream-out channel is disabled.,1: OUT0 stream-out channel is enabled."
|
|
group.long 0x40++0x17
|
|
line.long 0x0 "HOST_IMEMA,Instruction Memory Address Register"
|
|
hexmask.long.byte 0x0 0.--5. 1. "IADDR,Pointer into IRAM - This field provides an address pointer to a location of IRAM."
|
|
line.long 0x4 "HOST_IMEMD,Instruction Memory Data Register"
|
|
hexmask.long 0x4 0.--31. 1. "DATA,Read/Write data of IRAM - This field specifies data to be read/written from/into IRAM"
|
|
line.long 0x8 "HOST_DREGA,Data Register-Bank Address Register"
|
|
hexmask.long.byte 0x8 0.--7. 1. "DMEMA,Data memory address pointer - This field provides the pointer to core register bank of the IPUS module"
|
|
line.long 0xC "HOST_DREGD,Data Register-Bank Datum Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "DMEMD,Read/Write data of SGPRs - This field specifies data to be read or written from/into SGPRs"
|
|
line.long 0x10 "HOST_HISTA,Histogram Memory Address Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. "HISTA,Pointer into Histogram memory - This field provides an address pointer to a location of Histogram memory"
|
|
line.long 0x14 "HOST_HISTD,Histogram Memory Data Register"
|
|
hexmask.long 0x14 0.--31. 1. "HISTD,Read data from Histogram memory - This field specifies data to be read from histogram memory"
|
|
rgroup.long 0x58++0x7
|
|
line.long 0x0 "HOST_HISTPEAK,Histogram Peak Value Register"
|
|
hexmask.long 0x0 0.--31. 1. "HISTPEAK,Peak value - Reads to this register provides the maximum value to the histogram engine"
|
|
line.long 0x4 "HOST_HISTAMAX,Histogram Maximum Value Address Register"
|
|
hexmask.long.byte 0x4 0.--7. 1. "HISTAMAX,Address - Reads to this register provides the address location (bin address) of the maximum value to the histogram engine"
|
|
group.long 0x60++0xF
|
|
line.long 0x0 "HOST_HISTCLEAR,Histogram Clear Register"
|
|
hexmask.long 0x0 0.--31. 1. "HISTCLEAR,Writes to this register with any value clears the histogram memory and re-initialize the histogram engine"
|
|
line.long 0x4 "HOST_STATA,Statistics Memory Address Register"
|
|
hexmask.long.word 0x4 0.--9. 1. "STATA,Pointer into statistics memory - This field provides an address pointer to a location of statistics memory"
|
|
line.long 0x8 "HOST_STATD,Statistics Memory Data Register"
|
|
hexmask.long 0x8 0.--31. 1. "STATD,Statistics memory data - This field specifies data to be read or written from/to statistics memory"
|
|
line.long 0xC "HOST_STATCLEAR,Statistics Memory Clear Register"
|
|
hexmask.long 0xC 0.--31. 1. "STATCLEAR,Writes to this register with any value clears the statistical memory and re-initialize the statistical engine"
|
|
group.long 0x78++0x7
|
|
line.long 0x0 "HOST_LUTA,LUT Memory Address Register"
|
|
hexmask.long.word 0x0 0.--11. 1. "LUTA,Pointer into LUT memory - This field provides an address pointer to a location of LUT memory."
|
|
line.long 0x4 "HOST_LUTD,LUT Memory Data Register"
|
|
hexmask.long 0x4 0.--31. 1. "LUTD,LUT memory data - This field specifies data to be read or written from/to LUT memory"
|
|
group.long 0x104++0x23
|
|
line.long 0x0 "S_LINE0_LEN_INA,INA Stream Line 0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of the stream."
|
|
line.long 0x4 "S_CH0_CFG_INA,INA Stream Line 0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifes decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x8 "S_LINE0_ADDR_INA,INA Stream Line 0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Stream start address"
|
|
line.long 0xC "S_LINE1_LEN_INA,INA Stream Line 1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of the stream."
|
|
line.long 0x10 "S_CH1_CFG_INA,INA Stream Line 1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifes decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeated loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x14 "S_LINE1_ADDR_INA,INA Stream Line 1 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Stream start address"
|
|
line.long 0x18 "S_LINE2_LEN_INA,INA Stream Line 2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Length of the stream."
|
|
line.long 0x1C "S_CH2_CFG_INA,INA Stream Line 2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifes decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeated loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x20 "S_LINE2_ADDR_INA,INA Stream Line 2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Stream start address"
|
|
group.long 0x144++0x23
|
|
line.long 0x0 "S_LINE0_LEN_INB,INB Stream Line 0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x4 "S_CH0_CFG_INB,INB Stream Line 0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Step count of channel - Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x8 "S_LINE0_ADDR_INB,INB Stream Line 0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Stream start address"
|
|
line.long 0xC "S_LINE1_LEN_INB,INB Stream Line 1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x10 "S_CH1_CFG_INB,INB Stream Line 1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Step count of channel - Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x14 "S_LINE1_ADDR_INB,INB Stream Line 1 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Stream start address"
|
|
line.long 0x18 "S_LINE2_LEN_INB,INB Stream Line 2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x1C "S_CH2_CFG_INB,INB Stream Line 2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Step count of channel - Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x20 "S_LINE2_ADDR_INB,INB Stream Line 2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Stream start address"
|
|
group.long 0x184++0x23
|
|
line.long 0x0 "S_LINE0_LEN_INALPHA,INALPHA Stream Line 0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x4 "S_CH0_CFG_INALPHA,INALPHA Stream 0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x8 "S_LINE0_ADDR_INALPHA,INALPHA Stream Line 0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Stream start address."
|
|
line.long 0xC "S_LINE1_LEN_INALPHA,INALPHA Stream Line 1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x10 "S_CH1_CFG_INALPHA,INALPHA Stream 1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x14 "S_LINE1_ADDR_INALPHA,INALPHA Stream Line 1 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Stream start address."
|
|
line.long 0x18 "S_LINE2_LEN_INALPHA,INALPHA Stream Line 2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x1C "S_CH2_CFG_INALPHA,INALPHA Stream 2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x20 "S_LINE2_ADDR_INALPHA,INALPHA Stream Line 2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Stream start address."
|
|
group.long 0x1C4++0x2F
|
|
line.long 0x0 "S_LINE0_LEN_OUT,Stream OUT 0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of the stream to be outputted."
|
|
line.long 0x4 "S_CH0_CFG_OUT,Stream OUT 0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the output stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "SKIP,Skip count of Channel - Specifies the stride of the stream output channel" "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x8 "S_LINE0_ADDR_OUT,Stream OUT 0 Address Register"
|
|
hexmask.long 0x8 3.--31. 1. "ADDR,Start address of the output stream"
|
|
line.long 0xC "S_LINE1_LEN_OUT,Stream OUT 1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of the stream to be outputted."
|
|
line.long 0x10 "S_CH1_CFG_OUT,Stream OUT 1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the output stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "SKIP,Skip count of Channel - Specifies the stride of the stream output channel" "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x14 "S_LINE1_ADDR_OUT,Stream OUT 1 Address Register"
|
|
hexmask.long 0x14 3.--31. 1. "ADDR,Start address of the output stream"
|
|
line.long 0x18 "S_LINE2_LEN_OUT,Stream OUT 2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Length of the stream to be outputted."
|
|
line.long 0x1C "S_CH2_CFG_OUT,Stream OUT 2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the output stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "SKIP,Skip count of Channel - Specifies the stride of the stream output channel" "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x20 "S_LINE2_ADDR_OUT,Stream OUT 2 Address Register"
|
|
hexmask.long 0x20 3.--31. 1. "ADDR,Start address of the output stream"
|
|
line.long 0x24 "S_LINE3_LEN_OUT,Stream OUT 3 Length Register"
|
|
hexmask.long.word 0x24 0.--15. 1. "LENGTH,Length of the stream to be outputted."
|
|
line.long 0x28 "S_CH3_CFG_OUT,Stream OUT 3 Configuration Register"
|
|
bitfld.long 0x28 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the output stream" "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x28 16.--17. "SKIP,Skip count of Channel - Specifies the stride of the stream output channel" "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x2C "S_LINE3_ADDR_OUT,Stream OUT 3 Address Register"
|
|
hexmask.long 0x2C 3.--31. 1. "ADDR,Start address of the output stream"
|
|
rgroup.long 0x204++0x23
|
|
line.long 0x0 "S_CURR_LINE0_LEN_INA,Current INA Stream Line0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x4 "S_CURR_CH0_CFG_INA,Current INA Stream Channel0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Current boundary width/size on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Current boundary substitution mode used by the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Current repeat value used by the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Current step value used by the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x8 "S_CURR_LINE0_ADDR_INA,Current Stream Line0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Current base address of the stream."
|
|
line.long 0xC "S_CURR_LINE1_LEN_INA,Current INA Stream Line1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Current length of the stream."
|
|
line.long 0x10 "S_CURR_CH1_CFG_INA,Current INA Stream Channel1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Current boundary width/size on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Current boundary substitution mode used by the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Current repeat value used on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Current step value used on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x14 "S_CURR_LINE1_ADDR_INA,Current INA Stream Line1 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Current base address."
|
|
line.long 0x18 "S_CURR_LINE2_LEN_INA,Current INA Stream Line2 Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Current length of the stream."
|
|
line.long 0x1C "S_CURR_CH2_CFG_INA,Current INA Stream Channel2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Current data-type being used on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Current boundary width/size on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Current repeat value used on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Current step value used on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x20 "S_CURR_LINE2_ADDR_INA,Current INA Stream Line2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Current base address."
|
|
rgroup.long 0x244++0x23
|
|
line.long 0x0 "S_CURR_LINE0_LEN_INB,Current INB Stream Line0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x4 "S_CURR_CH0_CFG_INB,Current INB Stream Channel0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Current data-type being used on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Current repeat value on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Current step value on stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x8 "S_CURR_LINE0_ADDR_INB,Current INB Stream Line0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Current base address."
|
|
line.long 0xC "S_CURR_LINE1_LEN_INB,Current INB Stream Line 1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x10 "S_CURR_CH1_CFG_INB,Current INB Stream Channel1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Current data-type being used on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPEAT_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Current repeat value on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Current step value on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel component."
|
|
line.long 0x14 "S_CURR_LINE1_ADDR_INB,Current INB Stream Line 1 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Current base address."
|
|
line.long 0x18 "S_CURR_LINE2_LEN_INB,Current INB Stream Line2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x1C "S_CURR_CH2_CFG_INB,Current INB Stream Channel2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Current repeat value on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Current step value on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x20 "S_CURR_LINE2_ADDR_INB,Current INB Stream Line2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Current base address."
|
|
rgroup.long 0x284++0x23
|
|
line.long 0x0 "S_CURR_LINE0_LEN_INALPHA,Current INALPHA Stream Line0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x4 "S_CURR_CH0_CFG_INALPHA,Current INALPHA Stream Channel0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Current repeat value on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Current step value on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x8 "S_CURR_LINE0_ADDR_INALPHA,Current INALPHA Stream Line0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Current base address"
|
|
line.long 0xC "S_CURR_LINE1_LEN_INALPHA,Current INALPHA Stream Line1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x10 "S_CURR_CH1_CFG_INALPHA,Current INALPHA Stream Channel1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Current repeat value on stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Current step value on stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x14 "S_CURR_LINE1_ADDR_INALPHA,Current INALPHA Stream Line 1 Address register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Current base address."
|
|
line.long 0x18 "S_CURR_LINE2_LEN_INALPHA,Current INALPHA Stream Line2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x1C "S_CURR_CH2_CFG_INALPHA,Current INALPHA Stream Channel2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Current repeat value on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Current step value on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x20 "S_CURR_LINE2_ADDR_INALPHA,Current INALPHA Stream Line2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Current base address"
|
|
rgroup.long 0x2C4++0x2F
|
|
line.long 0x0 "S_CURR_LINE0_LEN_OUT,Current OUT Stream Line0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x4 "S_CURR_CH0_CFG_OUT,Current OUT Stream Channel0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Current datatype on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "SKIP,Current skip value on stream interface." "0,1,2,3"
|
|
line.long 0x8 "S_CURR_LINE0_ADDR_OUT,Current OUT Stream Line0 Address Register"
|
|
hexmask.long 0x8 3.--31. 1. "ADDR,Current start address."
|
|
line.long 0xC "S_CURR_LINE1_LEN_OUT,Current OUT Stream Line1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Current stream length"
|
|
line.long 0x10 "S_CURR_CH1_CFG_OUT,Current OUT Stream Channel1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Current datatype on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "SKIP,Current skip value on the stream interface." "0,1,2,3"
|
|
line.long 0x14 "S_CURR_LINE1_ADDR_OUT,Current OUT Stream Line1 Address Register"
|
|
hexmask.long 0x14 3.--31. 1. "ADDR,Current start address."
|
|
line.long 0x18 "S_CURR_LINE2_LEN_OUT,Current OUT Stream Line2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x1C "S_CURR_CH2_CFG_OUT,Current OUT Stream Channel2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Current datatype on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "SKIP,Current skip value on stream interface." "0,1,2,3"
|
|
line.long 0x20 "S_CURR_LINE2_ADDR_OUT,Current OUT Stream Line2 Address Register"
|
|
hexmask.long 0x20 3.--31. 1. "ADDR,Current start address."
|
|
line.long 0x24 "S_CURR_LINE3_LEN_OUT,Current OUT Stream Line3 Length Register"
|
|
hexmask.long.word 0x24 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x28 "S_CURR_CH3_CFG_OUT,Current OUT Stream Channel3 Configuration Register"
|
|
bitfld.long 0x28 28.--29. "TYPE,Current datatype on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x28 16.--17. "SKIP,Current skip value on the stream interface." "0,1,2,3"
|
|
line.long 0x2C "S_CURR_LINE3_ADDR_OUT,Current OUT Stream Line3 Address Register"
|
|
hexmask.long 0x2C 3.--31. 1. "ADDR,Current start address."
|
|
group.long 0x400++0xF
|
|
line.long 0x0 "DEBUG_MS,Debug Mode and Step Register"
|
|
bitfld.long 0x0 31. "B_FINISH,Break on Finish - Writing 1 in this bit enables breakpoint on finish" "0,1"
|
|
newline
|
|
bitfld.long 0x0 30. "B_WADDR,Break point on Write address - Writing 1 in this bit enables breakpoint on write address" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "B_RADDR,Break point on Read address - Writing 1 in this bit enables breakpoint on read address" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "B_IADDR,Break point on Instruction Fetch - Writing 1 in this bit enables breakpoint on instruction fetch" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "B_POS,Break point on Pixel Position - Writing 1 in this bit enabels breakpoint on pixel position" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "B_YPOS,Break point on Line - Writing 1 in this bit enabels breakpoint on line" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "B_XPOS,Break point on Pixel Number - Writing 1 in this bit enabels breakpoint on pixel number" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--19. 1. "STEP,Step Size - This field is used for specifying the step size of IPUS module when in debug mode."
|
|
newline
|
|
bitfld.long 0x0 1. "CTI_EN,Cross-triggerring enable" "0: Disable cross-triggering with CTI.,1: Enable cross-triggering with CTI."
|
|
newline
|
|
bitfld.long 0x0 0. "DBG_ACT,Activate Debug Mode - Writing 1 in this bit makes the IPUS module to enter debug mode." "0,1"
|
|
line.long 0x4 "DEBUG_BKPT_STAT,Debug Breakpoint Status Register"
|
|
bitfld.long 0x4 25. "STEP_REQ,STEP Request - Writing 1 to this bit provides a step request to the IPUS core" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "FINISH,Breakpoint on finish status" "0: Breakpoint on finish not occurred.,1: Breakpoint on finish occurred."
|
|
newline
|
|
bitfld.long 0x4 22. "WADDR,Breakpoint on write status" "0: Breakpoint on write not occurred.,1: Breakpoint on write occurred."
|
|
newline
|
|
bitfld.long 0x4 21. "RADDR,Breakpoint on read status" "0: Breakpoint on read not occurred.,1: Breakpoint on read occurred."
|
|
newline
|
|
bitfld.long 0x4 20. "IADDR,Instruction fetch breakpoint status" "0: Instruction fetch breakpoint not occurred.,1: Instruction fetch breakpoint occurred."
|
|
newline
|
|
bitfld.long 0x4 19. "POS,Position breakpoint status" "0: Position breakpoint not occurred.,1: Position breakpoint occurred."
|
|
newline
|
|
bitfld.long 0x4 18. "YPOS,YPOS breakpoint status" "0: YPOS breakpoint not occurred.,1: YPOS breakpoint occurred."
|
|
newline
|
|
bitfld.long 0x4 17. "XPOS,XPOS breakpoint status" "0: Breakpoint XPOS not occurred.,1: Breakpoint XPOS occurred."
|
|
newline
|
|
bitfld.long 0x4 16. "DBG,Debug mode status: This bit provides the debug status of IPUS core" "0: In execution mode. (Instruction execution..,1: In debug mode. (Instruction execution stalled)"
|
|
newline
|
|
rbitfld.long 0x4 0. "H_DBG,This register provides the status of debug mode acknowledgement upon hardware debug request" "0: In execution mode (No hardware debug request..,1: In debug upon assertion debug request signal."
|
|
line.long 0x8 "DEBUG_BKPT_POS,Debug Breakpoint Position Register"
|
|
hexmask.long.word 0x8 16.--31. 1. "XPOS,Horizontal Pixel position - Specifies the horizontal pixel position for XPOS or POS breakpoint."
|
|
newline
|
|
hexmask.long.word 0x8 0.--15. 1. "YPOS,Vertical Pixel position - Specifies the vertical position (i"
|
|
line.long 0xC "DEBUG_BKPT_ADDR,Debug Breakpoint Address Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. "IADDR,Instruction fetch address - This field holds the instruction address where instruction fetch breakpoint should occur"
|
|
newline
|
|
hexmask.long.byte 0xC 16.--23. 1. "DRADDR,Data read address - This field holds the data address of the register bank from where when reads happens triggers breakpoint on read"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--15. 1. "DWADDR,Data Write address - This field holds the data address of the register bank to where when write happens triggers breakpoint on write"
|
|
rgroup.long 0x414++0x3
|
|
line.long 0x0 "DEBUG_CORE_STAT,Debug Core Status Register"
|
|
bitfld.long 0x0 27. "N,Status of scalar negative flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "Z,Status of scalar zero flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "C,Status of scalar carry flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "OV,Status of scalar overflow flag." "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "PC,This field holds the value of the program counter"
|
|
group.long 0x500++0x7
|
|
line.long 0x0 "PMONITOR_CTRL,Performance Monitor Control Register."
|
|
bitfld.long 0x0 20. "INIT_EX_CNT,This bit is used for clear the execution cycle counter" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "INIT_S_DH,This bit is used for clear the stall counter on data hazards" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "INIT_S_SINOUT,This bit is used for clear the stall counter on stream-in 'and' stream-out interface" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "INIT_S_SOUT,This bit is used for clear the stall counter on stream-out interface" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "INIT_S_SIN,This bit is used for clear the stall counter on stream-in interface" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "STOP_EX_CNT,This bit provides a secondary override for disabling the execution cycle counter." "0: Execution cycle counter is defreezed from..,1: Execution cycle counter is freezed from counting."
|
|
newline
|
|
bitfld.long 0x0 11. "STOP_S_DH,This bit provides a secondary override for disabling the stall counter on data hazard interface." "0: Stall counter on data hazard is defreezed from..,1: Stall counter on data hazard is freezed from.."
|
|
newline
|
|
bitfld.long 0x0 10. "STOP_S_SINOUT,This bit provides a secondary override for disabling the stall counter on stream-in and stream-out interface" "0: tall counter on stream-in 'and' stream-out is..,1: Stall counter on stream-in 'and' stream-out is.."
|
|
newline
|
|
bitfld.long 0x0 9. "STOP_S_SOUT,This bit provides a secondary override for disabling the stall counter on stream-out interface." "0: Stall counter on stream-in is defreezed from..,1: Stall counter on stream-out is freezed from.."
|
|
newline
|
|
bitfld.long 0x0 8. "STOP_S_SIN,This bit provides a secondary override for disabling the stall counter on stream-in interface." "0: Stall counter is defreezed from counting.,1: Stall counter on stream-in is freezed from.."
|
|
newline
|
|
bitfld.long 0x0 4. "EN_EX_CNT,This bit controls the execution cycle counter." "0: Execution counter is inactive. Counter does not..,1: Execution counter is enabled. Counter counts the.."
|
|
newline
|
|
bitfld.long 0x0 3. "EN_S_DH,This bit controls the stall counter that monitors the stalls due to data hazards in the pipeline." "0: Stall counter on stalls due to data hazard is..,1: Stall counter on stalls due to data hazard is.."
|
|
newline
|
|
bitfld.long 0x0 2. "EN_S_SINOUT,This bit controls the stall counter that monitor both stream-in and stream-out stalls occurring in same clock cycle" "0: Stall counter on stream-in and stream-out stalls..,1: Stall counter on stream-in and stream-out stalls.."
|
|
newline
|
|
bitfld.long 0x0 1. "EN_S_SOUT,This bit controls the stall counter on stream-out interface." "0: Stall counter on stream-out stalls is inactive.,1: Stall counter on stream-out stalls is enabled."
|
|
newline
|
|
bitfld.long 0x0 0. "EN_S_SIN,This bit controls the stall counter on stream-in interface." "0: Stall counter on stream-in stalls is inactive.,1: Stall counter on stream-in stalls is enabled."
|
|
line.long 0x4 "PMONITOR_SAMPLE,Performance Monitor Sample Register"
|
|
bitfld.long 0x4 4. "SAMPLE_EX_CNT,Sample execution counter" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "SAMPLE_S_DH,Sample stall counter on data hazard" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "SAMPLE_S_SINOUT,Sample stall counter on stream-in 'and' stream-out interface" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "SAMPLE_S_SOUT,Sample stall counter on stream-out interface" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "SAMPLE_S_SIN,Sample stall counter on stream-in interface" "0,1"
|
|
rgroup.long 0x508++0x13
|
|
line.long 0x0 "STALL_STREAMIN,Stream-in Stall Counter"
|
|
hexmask.long 0x0 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0x4 "STALL_STREAMOUT,Stream-out Stall Counter"
|
|
hexmask.long 0x4 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0x8 "STALL_STREAMINOUT,Stream-in and Stream-out Stall Counter"
|
|
hexmask.long 0x8 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0xC "STALL_DATAHAZARD,Data Hazard Stall Counter"
|
|
hexmask.long 0xC 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0x10 "EXEC_COUNTER,Execution Cycle Counter"
|
|
hexmask.long 0x10 0.--31. 1. "CYCLES,Number of execution cycles."
|
|
group.long 0x580++0xF
|
|
line.long 0x0 "IMEM_ERROR_INJECT_ADDR,Instruction Memory Error Injection Address"
|
|
hexmask.long.byte 0x0 0.--5. 1. "ADDR,Instruction memory address for error injection."
|
|
line.long 0x4 "IMEM_ERROR_VECTOR0,Instruction Memory Error Low Vector"
|
|
hexmask.long 0x4 0.--31. 1. "ERR_VEC0,Lower 32-bits of error vector."
|
|
line.long 0x8 "IMEM_ERROR_VECTOR1,Instruction Memory Error High Vector"
|
|
bitfld.long 0x8 31. "ERR_EN,Error injection enable" "0: No error is injected.,1: Error is injected. ECC syndrome and SEC-DED.."
|
|
newline
|
|
hexmask.long.byte 0x8 0.--6. 1. "ERR_VEC1,Higher 7-bits of error vector."
|
|
line.long 0xC "IMEM_ERROR_INJECT_STAT,Instruction Memory Error Inject Status Register"
|
|
bitfld.long 0xC 31. "LOC_ACC,This field provides the status of the location of instruction memory at which error is injected was accessed by IPUS core" "0: Instruction memory location was not accessed.,1: Instruction memory location was accessed and.."
|
|
newline
|
|
hexmask.long.byte 0xC 8.--14. 1. "SYNDROME,7-bit syndrome found when error was injected."
|
|
newline
|
|
rbitfld.long 0xC 1. "DED,Double bit error was detected." "0,1"
|
|
newline
|
|
rbitfld.long 0xC 0. "SEC,Single bit error was detected and corrected." "0,1"
|
|
group.long 0x600++0x3
|
|
line.long 0x0 "RESET_REG,Reset Register"
|
|
bitfld.long 0x0 1. "HARD_RESET,Writing 1 to this field provides a hard reset to the IPUS module" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SOFT_RESET,Writing 1 to this field provides a soft reset to the IPUS module" "0,1"
|
|
tree.end
|
|
tree "IPUS_1"
|
|
base ad:0x7C043000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "HOST_START,Command and Start Register"
|
|
hexmask.long.byte 0x0 16.--23. 1. "CSA,This field provides as a status the start address for the ongoing line processing."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "NSA,This field provides the address location in IRAM from where the processing of the next line starts"
|
|
line.long 0x4 "HOST_STATUS,Core Status Register"
|
|
hexmask.long.word 0x4 16.--31. 1. "REMAIN_PIXELS,Indicates the number of the pixels remaining to be processed"
|
|
newline
|
|
rbitfld.long 0x4 10. "DEBUG_STATUS,This field provides the debug status of the IPUS core." "0: In execution mode,1: In debug mode"
|
|
newline
|
|
rbitfld.long 0x4 8.--9. "CORE_STATUS,This field indicates the IPUS core status and number of triggers that has been bufferred." "0: Idle,1: Running single command.,?,?"
|
|
newline
|
|
bitfld.long 0x4 0.--1. "N_EVENTS,This fields reflects the value of the event counter" "0,1,2,3"
|
|
line.long 0x8 "HOST_POS,Position Configuration Register"
|
|
hexmask.long.word 0x8 16.--31. 1. "XPOS,This field indicates the horizontal position of the next line."
|
|
newline
|
|
hexmask.long.word 0x8 0.--15. 1. "YPOS,This field indicates the line number of the next line to be processed."
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x0 "HOST_CURRPOS,Current Position Status Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "CURR_XPOS,Provides the horizontal pixel position (XPOS) for the currently processed line."
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "CURR_YPOS,Provides the status the line number of the currently processed line."
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "HOST_XCFG,Line Width and Step Configuration Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "XSIZE,This field provides the width in terms of number of pixel componenets of the next line to be processed"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "XSTEP,This field provides the next incremental step for the XPOS register" "0: XPOS increment step is 4,1: XPOS increment step is 1,?,?"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "HOST_CURRXCFG,Current Line Width and Step Status Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "CURR_XSIZE,This field provides the width of the pixel component line being currently processed."
|
|
newline
|
|
bitfld.long 0x0 0.--1. "CURR_XSTEP,This field indicates the current XSTEP being used for processing." "0: XPOS increment step is 4,1: XPOS increment step is 1,?,?"
|
|
group.long 0x18++0xF
|
|
line.long 0x0 "HOST_INACFG,INA Matrix Configuration Register"
|
|
rbitfld.long 0x0 26. "CURR_EN_LINE2,Enable status for third row vector in 3x3 neighbourhood mode of INA matrix for the current line being processsed" "0: Third row-vector for currently line processed is..,1: Third row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x0 25. "CURR_EN_LINE1,Enable status for second row vector in 3x3 neighbourhood mode of INA matrix for the current line being processsed" "0: Second row-vector for currently line processed..,1: Second row-vector for currently line processed.."
|
|
newline
|
|
rbitfld.long 0x0 24. "CURR_EN_LINE0,Enable status for first row vector in 3x3 neighbourhood mode or complete row-vector in 1x9 neighbourhood mode of INA matrix for the current line being processsed" "0: First row-vector for currently line processed is..,1: First row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x0 18. "CURR_NHOOD,This field provides the current neighbourhood position of the elements in INA matrix being used in execution" "0: For the ongoing execution INA Matrix is in 3x3..,1: For the ongoing execution INA Matrix is in 1x9.."
|
|
newline
|
|
rbitfld.long 0x0 16.--17. "CURR_SHIFT,This field indicates the value currently being used for shifting each 1x3 row-vector or one 1x9 row-vector in INA matrix" "?,1: Row-vector of INA matrix will be shifted by 1.,?,?"
|
|
newline
|
|
bitfld.long 0x0 10. "EN_LINE2,This field enables the third row-vector of INA matrix for next line to be processed" "0: Disable the third 1x3 row vector of INA matrix..,1: Enable the third 1x3 row vector of INA matrix.."
|
|
newline
|
|
bitfld.long 0x0 9. "EN_LINE1,This field enables the second row-vector of INA matrix for next line to be processed" "0: Disable the second 1x3 row vector of INA matrix..,1: Enable the second 1x3 row vector of INA matrix.."
|
|
newline
|
|
bitfld.long 0x0 8. "EN_LINE0,This field enables the first row-vector of INA matrix for next line to be processed" "0: Disable first 1x3 row vector or 1x9 row vector..,1: Enable the first 1x3 row vector or 1x9 row.."
|
|
newline
|
|
bitfld.long 0x0 2. "NHOOD,This field provides the neighbourhood position of the elements in INA matrix" "0: INA Matrix is in 3x3 neighbourhood mode.,1: INA Matrix is in 1x9 neighbourhood mode."
|
|
newline
|
|
rbitfld.long 0x0 0.--1. "SHIFT,This field indicates the value by which each 1x3 row-vector or one 1x9 row-vector in INA matrix will be shifted when execution for the next line begins" "?,1: For next line processing shift the row vector of..,?,?"
|
|
line.long 0x4 "HOST_INBCFG,INB Matrix Configuration Register"
|
|
rbitfld.long 0x4 26. "CURR_EN_LINE2,Enable status for third row vector in 3x3 neighbourhood mode of INB matrix for the current line being processsed" "0: Third row-vector for currently line processed is..,1: Third row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x4 25. "CURR_EN_LINE1,Enable status for second row vector in 3x3 neighbourhood mode of INB matrix for the current line being processsed" "0: Second row-vector for currently line processed..,1: Second row-vector for currently line processed.."
|
|
newline
|
|
rbitfld.long 0x4 24. "CURR_EN_LINE0,Enable status for first row vector in 3x3 neighbourhood mode or complete row-vector in 1x9 neighbourhood mode of INB matrix for the current line being processsed" "0: First row-vector for currently line processed is..,1: First row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x4 18. "CURR_NHOOD,This field provides the neighbourhood position of the elements in INB matrix" "0: For the ongoing execution INB Matrix is in 3x3..,1: For the ongoing execution INB Matrix is in 1x9.."
|
|
newline
|
|
rbitfld.long 0x4 16.--17. "CURR_SHIFT,This field indicates the value currently being used for shifting each 1x3 row-vector or one 1x9 row-vector in INB matrix" "?,1: Row-vector of INA matrix will be shifted by 1.,?,?"
|
|
newline
|
|
bitfld.long 0x4 10. "EN_LINE2,This field enables the third row-vector of INB matrix for next line to be processed" "0: Disable the third 1x3 row vector of INB matrix..,1: Enable the third 1x3 row vector of INB matrix.."
|
|
newline
|
|
bitfld.long 0x4 9. "EN_LINE1,This field enables the second row-vector of INB matrix for next line to be processed" "0: Disable the second 1x3 row vector of INB matrix..,1: Enable the second 1x3 row vector of INB matrix.."
|
|
newline
|
|
bitfld.long 0x4 8. "EN_LINE0,This field enables the first row-vector of INB matrix for next line to be processed" "0: Disable first 1x3 row vector or 1x9 row vector..,1: Enable the first 1x3 row vector or 1x9 row.."
|
|
newline
|
|
bitfld.long 0x4 2. "NHOOD,This field provides the neighbourhood position of the elements in INB matrix" "0: INB Matrix is in 3x3 neighbourhood mode.,1: INB Matrix is in 1x9 neighbourhood mode."
|
|
newline
|
|
rbitfld.long 0x4 0.--1. "SHIFT,This field indicates the value by which each 1x3 row-vector or one 1x9 row-vector in INB matrix will be shifted when execution for the next line begins" "?,1: For next line processing shift the row vector of..,?,?"
|
|
line.long 0x8 "HOST_INALPHACFG,INALPHA Configuration Register"
|
|
rbitfld.long 0x8 26. "CURR_EN_LINE2,Enable status for third row vector in 3x3 neighbourhood mode of INALPHA matrix for the current line being processsed" "0: Third row-vector for currently line processed is..,1: Third row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x8 25. "CURR_EN_LINE1,Enable status for second row vector in 3x3 neighbourhood mode of INALPHA matrix for the current line being processsed" "0: Second row-vector for currently line processed..,1: Second row-vector for currently line processed.."
|
|
newline
|
|
rbitfld.long 0x8 24. "CURR_EN_LINE0,Enable status for first row vector in 3x3 neighbourhood mode or complete row-vector in 1x9 neighbourhood mode of INALPHA matrix for the current line being processsed" "0: First row-vector for currently line processed is..,1: First row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x8 18. "CURR_NHOOD,This field provides the current neighbourhood position of the elements in INALPHA matrix" "0: For the ongoing execution INALPHA Matrix is in..,1: For the ongoing execution INALPHA Matrix is in.."
|
|
newline
|
|
rbitfld.long 0x8 16.--17. "CURR_SHIFT,This field indicates the value currently being used for shifting each 1x3 row-vector or one 1x9 row-vector in INALPHA matrix" "?,1: Row-vector of INA matrix will be shifted by 1.,?,?"
|
|
newline
|
|
bitfld.long 0x8 10. "EN_LINE2,This field enables the third row-vector of INALPHA matrix for next line to be processed" "0: Disable the third 1x3 row vector of INALPHA..,1: Enable the third 1x3 row vector of INALPHA.."
|
|
newline
|
|
bitfld.long 0x8 9. "EN_LINE1,This field enables the second row-vector of INALPHA matrix for next line to be processed" "0: Disable the second 1x3 row vector of INALPHA..,1: Enable the second 1x3 row vector of INALPHA.."
|
|
newline
|
|
bitfld.long 0x8 8. "EN_LINE0,This field enables the first row-vector of INALPHA matrix for next line to be processed" "0: Disable first 1x3 row vector or 1x9 row vector..,1: Enable the first 1x3 row vector or 1x9 row.."
|
|
newline
|
|
bitfld.long 0x8 2. "NHOOD,This field provides the neighbourhood position of the elements in INALPHA matrix" "0: INALPHA Matrix is in 3x3 neighbourhood mode.,1: INALPHA matrix is in 1x9 neighbourhood mode."
|
|
newline
|
|
rbitfld.long 0x8 0.--1. "SHIFT,This field indicates the value by which each 1x3 row-vector or one 1x9 row-vector in INALPHA matrix will be shifted when execution for the next line begins" "?,1: For next line processing shift the row vector of..,?,?"
|
|
line.long 0xC "HOST_OUTCFG,OUT Matrix Configuration Register"
|
|
rbitfld.long 0xC 27. "CURR_EN_OUT3,This field indicates the status of the stream-out channel corresponding to OUT3 element for the current line processing" "0: OUT3 stream-out interface is disabled.,1: OUT3 stream-out interface is enabled."
|
|
newline
|
|
rbitfld.long 0xC 26. "CURR_EN_OUT2,This field indicates the status of the stream-out channel corresponding to OUT2 element for the current line processing" "0: OUT2 stream-out interface is disabled.,1: OUT2 stream-out interface is enabled."
|
|
newline
|
|
rbitfld.long 0xC 25. "CURR_EN_OUT1,This field indicates the status of the stream-out channel corresponding to OUT1 element for the current line processing" "0: OUT1 stream-out interface is disabled.,1: OUT1 stream-out interface is enabled."
|
|
newline
|
|
rbitfld.long 0xC 24. "CURR_EN_OUT0,This field indicates the status of the stream-out channel corresponding to OUT0 element for the current line processing" "0: OUT0 stream-out interface is disabled.,1: OUT0 stream-out interface is enabled."
|
|
newline
|
|
bitfld.long 0xC 11. "EN_OUT3,Enables the stream-out channel corresponding to OUT3 element of OUT matrix for processing the next line" "0: OUT3 stream-out channel is disabled.,1: OUT3 stream-out channel is enabled."
|
|
newline
|
|
bitfld.long 0xC 10. "EN_OUT2,Enables the stream-out channel corresponding to OUT2 element of OUT matrix for processing the next line" "0: OUT2 stream-out channel is disabled.,1: OUT2 stream-out channel is enabled."
|
|
newline
|
|
bitfld.long 0xC 9. "EN_OUT1,Enables the stream-out channel corresponding to OUT1 element of OUT matrix for processing the next line" "0: OUT1 stream-out channel is disabled.,1: OUT1 stream-out channel is enabled."
|
|
newline
|
|
bitfld.long 0xC 8. "EN_OUT0,Enables the stream-out channel corresponding to OUT0 element of OUT matrix for processing the next line" "0: OUT0 stream-out channel is disabled.,1: OUT0 stream-out channel is enabled."
|
|
group.long 0x40++0x17
|
|
line.long 0x0 "HOST_IMEMA,Instruction Memory Address Register"
|
|
hexmask.long.byte 0x0 0.--5. 1. "IADDR,Pointer into IRAM - This field provides an address pointer to a location of IRAM."
|
|
line.long 0x4 "HOST_IMEMD,Instruction Memory Data Register"
|
|
hexmask.long 0x4 0.--31. 1. "DATA,Read/Write data of IRAM - This field specifies data to be read/written from/into IRAM"
|
|
line.long 0x8 "HOST_DREGA,Data Register-Bank Address Register"
|
|
hexmask.long.byte 0x8 0.--7. 1. "DMEMA,Data memory address pointer - This field provides the pointer to core register bank of the IPUS module"
|
|
line.long 0xC "HOST_DREGD,Data Register-Bank Datum Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "DMEMD,Read/Write data of SGPRs - This field specifies data to be read or written from/into SGPRs"
|
|
line.long 0x10 "HOST_HISTA,Histogram Memory Address Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. "HISTA,Pointer into Histogram memory - This field provides an address pointer to a location of Histogram memory"
|
|
line.long 0x14 "HOST_HISTD,Histogram Memory Data Register"
|
|
hexmask.long 0x14 0.--31. 1. "HISTD,Read data from Histogram memory - This field specifies data to be read from histogram memory"
|
|
rgroup.long 0x58++0x7
|
|
line.long 0x0 "HOST_HISTPEAK,Histogram Peak Value Register"
|
|
hexmask.long 0x0 0.--31. 1. "HISTPEAK,Peak value - Reads to this register provides the maximum value to the histogram engine"
|
|
line.long 0x4 "HOST_HISTAMAX,Histogram Maximum Value Address Register"
|
|
hexmask.long.byte 0x4 0.--7. 1. "HISTAMAX,Address - Reads to this register provides the address location (bin address) of the maximum value to the histogram engine"
|
|
group.long 0x60++0xF
|
|
line.long 0x0 "HOST_HISTCLEAR,Histogram Clear Register"
|
|
hexmask.long 0x0 0.--31. 1. "HISTCLEAR,Writes to this register with any value clears the histogram memory and re-initialize the histogram engine"
|
|
line.long 0x4 "HOST_STATA,Statistics Memory Address Register"
|
|
hexmask.long.word 0x4 0.--9. 1. "STATA,Pointer into statistics memory - This field provides an address pointer to a location of statistics memory"
|
|
line.long 0x8 "HOST_STATD,Statistics Memory Data Register"
|
|
hexmask.long 0x8 0.--31. 1. "STATD,Statistics memory data - This field specifies data to be read or written from/to statistics memory"
|
|
line.long 0xC "HOST_STATCLEAR,Statistics Memory Clear Register"
|
|
hexmask.long 0xC 0.--31. 1. "STATCLEAR,Writes to this register with any value clears the statistical memory and re-initialize the statistical engine"
|
|
group.long 0x78++0x7
|
|
line.long 0x0 "HOST_LUTA,LUT Memory Address Register"
|
|
hexmask.long.word 0x0 0.--11. 1. "LUTA,Pointer into LUT memory - This field provides an address pointer to a location of LUT memory."
|
|
line.long 0x4 "HOST_LUTD,LUT Memory Data Register"
|
|
hexmask.long 0x4 0.--31. 1. "LUTD,LUT memory data - This field specifies data to be read or written from/to LUT memory"
|
|
group.long 0x104++0x23
|
|
line.long 0x0 "S_LINE0_LEN_INA,INA Stream Line 0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of the stream."
|
|
line.long 0x4 "S_CH0_CFG_INA,INA Stream Line 0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifes decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x8 "S_LINE0_ADDR_INA,INA Stream Line 0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Stream start address"
|
|
line.long 0xC "S_LINE1_LEN_INA,INA Stream Line 1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of the stream."
|
|
line.long 0x10 "S_CH1_CFG_INA,INA Stream Line 1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifes decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeated loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x14 "S_LINE1_ADDR_INA,INA Stream Line 1 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Stream start address"
|
|
line.long 0x18 "S_LINE2_LEN_INA,INA Stream Line 2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Length of the stream."
|
|
line.long 0x1C "S_CH2_CFG_INA,INA Stream Line 2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifes decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeated loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x20 "S_LINE2_ADDR_INA,INA Stream Line 2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Stream start address"
|
|
group.long 0x144++0x23
|
|
line.long 0x0 "S_LINE0_LEN_INB,INB Stream Line 0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x4 "S_CH0_CFG_INB,INB Stream Line 0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Step count of channel - Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x8 "S_LINE0_ADDR_INB,INB Stream Line 0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Stream start address"
|
|
line.long 0xC "S_LINE1_LEN_INB,INB Stream Line 1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x10 "S_CH1_CFG_INB,INB Stream Line 1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Step count of channel - Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x14 "S_LINE1_ADDR_INB,INB Stream Line 1 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Stream start address"
|
|
line.long 0x18 "S_LINE2_LEN_INB,INB Stream Line 2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x1C "S_CH2_CFG_INB,INB Stream Line 2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Step count of channel - Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x20 "S_LINE2_ADDR_INB,INB Stream Line 2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Stream start address"
|
|
group.long 0x184++0x23
|
|
line.long 0x0 "S_LINE0_LEN_INALPHA,INALPHA Stream Line 0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x4 "S_CH0_CFG_INALPHA,INALPHA Stream 0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x8 "S_LINE0_ADDR_INALPHA,INALPHA Stream Line 0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Stream start address."
|
|
line.long 0xC "S_LINE1_LEN_INALPHA,INALPHA Stream Line 1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x10 "S_CH1_CFG_INALPHA,INALPHA Stream 1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x14 "S_LINE1_ADDR_INALPHA,INALPHA Stream Line 1 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Stream start address."
|
|
line.long 0x18 "S_LINE2_LEN_INALPHA,INALPHA Stream Line 2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x1C "S_CH2_CFG_INALPHA,INALPHA Stream 2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x20 "S_LINE2_ADDR_INALPHA,INALPHA Stream Line 2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Stream start address."
|
|
group.long 0x1C4++0x2F
|
|
line.long 0x0 "S_LINE0_LEN_OUT,Stream OUT 0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of the stream to be outputted."
|
|
line.long 0x4 "S_CH0_CFG_OUT,Stream OUT 0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the output stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "SKIP,Skip count of Channel - Specifies the stride of the stream output channel" "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x8 "S_LINE0_ADDR_OUT,Stream OUT 0 Address Register"
|
|
hexmask.long 0x8 3.--31. 1. "ADDR,Start address of the output stream"
|
|
line.long 0xC "S_LINE1_LEN_OUT,Stream OUT 1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of the stream to be outputted."
|
|
line.long 0x10 "S_CH1_CFG_OUT,Stream OUT 1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the output stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "SKIP,Skip count of Channel - Specifies the stride of the stream output channel" "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x14 "S_LINE1_ADDR_OUT,Stream OUT 1 Address Register"
|
|
hexmask.long 0x14 3.--31. 1. "ADDR,Start address of the output stream"
|
|
line.long 0x18 "S_LINE2_LEN_OUT,Stream OUT 2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Length of the stream to be outputted."
|
|
line.long 0x1C "S_CH2_CFG_OUT,Stream OUT 2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the output stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "SKIP,Skip count of Channel - Specifies the stride of the stream output channel" "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x20 "S_LINE2_ADDR_OUT,Stream OUT 2 Address Register"
|
|
hexmask.long 0x20 3.--31. 1. "ADDR,Start address of the output stream"
|
|
line.long 0x24 "S_LINE3_LEN_OUT,Stream OUT 3 Length Register"
|
|
hexmask.long.word 0x24 0.--15. 1. "LENGTH,Length of the stream to be outputted."
|
|
line.long 0x28 "S_CH3_CFG_OUT,Stream OUT 3 Configuration Register"
|
|
bitfld.long 0x28 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the output stream" "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x28 16.--17. "SKIP,Skip count of Channel - Specifies the stride of the stream output channel" "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x2C "S_LINE3_ADDR_OUT,Stream OUT 3 Address Register"
|
|
hexmask.long 0x2C 3.--31. 1. "ADDR,Start address of the output stream"
|
|
rgroup.long 0x204++0x23
|
|
line.long 0x0 "S_CURR_LINE0_LEN_INA,Current INA Stream Line0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x4 "S_CURR_CH0_CFG_INA,Current INA Stream Channel0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Current boundary width/size on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Current boundary substitution mode used by the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Current repeat value used by the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Current step value used by the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x8 "S_CURR_LINE0_ADDR_INA,Current Stream Line0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Current base address of the stream."
|
|
line.long 0xC "S_CURR_LINE1_LEN_INA,Current INA Stream Line1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Current length of the stream."
|
|
line.long 0x10 "S_CURR_CH1_CFG_INA,Current INA Stream Channel1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Current boundary width/size on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Current boundary substitution mode used by the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Current repeat value used on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Current step value used on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x14 "S_CURR_LINE1_ADDR_INA,Current INA Stream Line1 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Current base address."
|
|
line.long 0x18 "S_CURR_LINE2_LEN_INA,Current INA Stream Line2 Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Current length of the stream."
|
|
line.long 0x1C "S_CURR_CH2_CFG_INA,Current INA Stream Channel2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Current data-type being used on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Current boundary width/size on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Current repeat value used on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Current step value used on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x20 "S_CURR_LINE2_ADDR_INA,Current INA Stream Line2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Current base address."
|
|
rgroup.long 0x244++0x23
|
|
line.long 0x0 "S_CURR_LINE0_LEN_INB,Current INB Stream Line0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x4 "S_CURR_CH0_CFG_INB,Current INB Stream Channel0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Current data-type being used on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Current repeat value on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Current step value on stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x8 "S_CURR_LINE0_ADDR_INB,Current INB Stream Line0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Current base address."
|
|
line.long 0xC "S_CURR_LINE1_LEN_INB,Current INB Stream Line 1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x10 "S_CURR_CH1_CFG_INB,Current INB Stream Channel1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Current data-type being used on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPEAT_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Current repeat value on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Current step value on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel component."
|
|
line.long 0x14 "S_CURR_LINE1_ADDR_INB,Current INB Stream Line 1 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Current base address."
|
|
line.long 0x18 "S_CURR_LINE2_LEN_INB,Current INB Stream Line2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x1C "S_CURR_CH2_CFG_INB,Current INB Stream Channel2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Current repeat value on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Current step value on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x20 "S_CURR_LINE2_ADDR_INB,Current INB Stream Line2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Current base address."
|
|
rgroup.long 0x284++0x23
|
|
line.long 0x0 "S_CURR_LINE0_LEN_INALPHA,Current INALPHA Stream Line0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x4 "S_CURR_CH0_CFG_INALPHA,Current INALPHA Stream Channel0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Current repeat value on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Current step value on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x8 "S_CURR_LINE0_ADDR_INALPHA,Current INALPHA Stream Line0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Current base address"
|
|
line.long 0xC "S_CURR_LINE1_LEN_INALPHA,Current INALPHA Stream Line1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x10 "S_CURR_CH1_CFG_INALPHA,Current INALPHA Stream Channel1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Current repeat value on stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Current step value on stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x14 "S_CURR_LINE1_ADDR_INALPHA,Current INALPHA Stream Line 1 Address register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Current base address."
|
|
line.long 0x18 "S_CURR_LINE2_LEN_INALPHA,Current INALPHA Stream Line2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x1C "S_CURR_CH2_CFG_INALPHA,Current INALPHA Stream Channel2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Current repeat value on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Current step value on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x20 "S_CURR_LINE2_ADDR_INALPHA,Current INALPHA Stream Line2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Current base address"
|
|
rgroup.long 0x2C4++0x2F
|
|
line.long 0x0 "S_CURR_LINE0_LEN_OUT,Current OUT Stream Line0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x4 "S_CURR_CH0_CFG_OUT,Current OUT Stream Channel0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Current datatype on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "SKIP,Current skip value on stream interface." "0,1,2,3"
|
|
line.long 0x8 "S_CURR_LINE0_ADDR_OUT,Current OUT Stream Line0 Address Register"
|
|
hexmask.long 0x8 3.--31. 1. "ADDR,Current start address."
|
|
line.long 0xC "S_CURR_LINE1_LEN_OUT,Current OUT Stream Line1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Current stream length"
|
|
line.long 0x10 "S_CURR_CH1_CFG_OUT,Current OUT Stream Channel1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Current datatype on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "SKIP,Current skip value on the stream interface." "0,1,2,3"
|
|
line.long 0x14 "S_CURR_LINE1_ADDR_OUT,Current OUT Stream Line1 Address Register"
|
|
hexmask.long 0x14 3.--31. 1. "ADDR,Current start address."
|
|
line.long 0x18 "S_CURR_LINE2_LEN_OUT,Current OUT Stream Line2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x1C "S_CURR_CH2_CFG_OUT,Current OUT Stream Channel2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Current datatype on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "SKIP,Current skip value on stream interface." "0,1,2,3"
|
|
line.long 0x20 "S_CURR_LINE2_ADDR_OUT,Current OUT Stream Line2 Address Register"
|
|
hexmask.long 0x20 3.--31. 1. "ADDR,Current start address."
|
|
line.long 0x24 "S_CURR_LINE3_LEN_OUT,Current OUT Stream Line3 Length Register"
|
|
hexmask.long.word 0x24 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x28 "S_CURR_CH3_CFG_OUT,Current OUT Stream Channel3 Configuration Register"
|
|
bitfld.long 0x28 28.--29. "TYPE,Current datatype on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x28 16.--17. "SKIP,Current skip value on the stream interface." "0,1,2,3"
|
|
line.long 0x2C "S_CURR_LINE3_ADDR_OUT,Current OUT Stream Line3 Address Register"
|
|
hexmask.long 0x2C 3.--31. 1. "ADDR,Current start address."
|
|
group.long 0x400++0xF
|
|
line.long 0x0 "DEBUG_MS,Debug Mode and Step Register"
|
|
bitfld.long 0x0 31. "B_FINISH,Break on Finish - Writing 1 in this bit enables breakpoint on finish" "0,1"
|
|
newline
|
|
bitfld.long 0x0 30. "B_WADDR,Break point on Write address - Writing 1 in this bit enables breakpoint on write address" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "B_RADDR,Break point on Read address - Writing 1 in this bit enables breakpoint on read address" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "B_IADDR,Break point on Instruction Fetch - Writing 1 in this bit enables breakpoint on instruction fetch" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "B_POS,Break point on Pixel Position - Writing 1 in this bit enabels breakpoint on pixel position" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "B_YPOS,Break point on Line - Writing 1 in this bit enabels breakpoint on line" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "B_XPOS,Break point on Pixel Number - Writing 1 in this bit enabels breakpoint on pixel number" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--19. 1. "STEP,Step Size - This field is used for specifying the step size of IPUS module when in debug mode."
|
|
newline
|
|
bitfld.long 0x0 1. "CTI_EN,Cross-triggerring enable" "0: Disable cross-triggering with CTI.,1: Enable cross-triggering with CTI."
|
|
newline
|
|
bitfld.long 0x0 0. "DBG_ACT,Activate Debug Mode - Writing 1 in this bit makes the IPUS module to enter debug mode." "0,1"
|
|
line.long 0x4 "DEBUG_BKPT_STAT,Debug Breakpoint Status Register"
|
|
bitfld.long 0x4 25. "STEP_REQ,STEP Request - Writing 1 to this bit provides a step request to the IPUS core" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "FINISH,Breakpoint on finish status" "0: Breakpoint on finish not occurred.,1: Breakpoint on finish occurred."
|
|
newline
|
|
bitfld.long 0x4 22. "WADDR,Breakpoint on write status" "0: Breakpoint on write not occurred.,1: Breakpoint on write occurred."
|
|
newline
|
|
bitfld.long 0x4 21. "RADDR,Breakpoint on read status" "0: Breakpoint on read not occurred.,1: Breakpoint on read occurred."
|
|
newline
|
|
bitfld.long 0x4 20. "IADDR,Instruction fetch breakpoint status" "0: Instruction fetch breakpoint not occurred.,1: Instruction fetch breakpoint occurred."
|
|
newline
|
|
bitfld.long 0x4 19. "POS,Position breakpoint status" "0: Position breakpoint not occurred.,1: Position breakpoint occurred."
|
|
newline
|
|
bitfld.long 0x4 18. "YPOS,YPOS breakpoint status" "0: YPOS breakpoint not occurred.,1: YPOS breakpoint occurred."
|
|
newline
|
|
bitfld.long 0x4 17. "XPOS,XPOS breakpoint status" "0: Breakpoint XPOS not occurred.,1: Breakpoint XPOS occurred."
|
|
newline
|
|
bitfld.long 0x4 16. "DBG,Debug mode status: This bit provides the debug status of IPUS core" "0: In execution mode. (Instruction execution..,1: In debug mode. (Instruction execution stalled)"
|
|
newline
|
|
rbitfld.long 0x4 0. "H_DBG,This register provides the status of debug mode acknowledgement upon hardware debug request" "0: In execution mode (No hardware debug request..,1: In debug upon assertion debug request signal."
|
|
line.long 0x8 "DEBUG_BKPT_POS,Debug Breakpoint Position Register"
|
|
hexmask.long.word 0x8 16.--31. 1. "XPOS,Horizontal Pixel position - Specifies the horizontal pixel position for XPOS or POS breakpoint."
|
|
newline
|
|
hexmask.long.word 0x8 0.--15. 1. "YPOS,Vertical Pixel position - Specifies the vertical position (i"
|
|
line.long 0xC "DEBUG_BKPT_ADDR,Debug Breakpoint Address Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. "IADDR,Instruction fetch address - This field holds the instruction address where instruction fetch breakpoint should occur"
|
|
newline
|
|
hexmask.long.byte 0xC 16.--23. 1. "DRADDR,Data read address - This field holds the data address of the register bank from where when reads happens triggers breakpoint on read"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--15. 1. "DWADDR,Data Write address - This field holds the data address of the register bank to where when write happens triggers breakpoint on write"
|
|
rgroup.long 0x414++0x3
|
|
line.long 0x0 "DEBUG_CORE_STAT,Debug Core Status Register"
|
|
bitfld.long 0x0 27. "N,Status of scalar negative flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "Z,Status of scalar zero flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "C,Status of scalar carry flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "OV,Status of scalar overflow flag." "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "PC,This field holds the value of the program counter"
|
|
group.long 0x500++0x7
|
|
line.long 0x0 "PMONITOR_CTRL,Performance Monitor Control Register."
|
|
bitfld.long 0x0 20. "INIT_EX_CNT,This bit is used for clear the execution cycle counter" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "INIT_S_DH,This bit is used for clear the stall counter on data hazards" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "INIT_S_SINOUT,This bit is used for clear the stall counter on stream-in 'and' stream-out interface" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "INIT_S_SOUT,This bit is used for clear the stall counter on stream-out interface" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "INIT_S_SIN,This bit is used for clear the stall counter on stream-in interface" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "STOP_EX_CNT,This bit provides a secondary override for disabling the execution cycle counter." "0: Execution cycle counter is defreezed from..,1: Execution cycle counter is freezed from counting."
|
|
newline
|
|
bitfld.long 0x0 11. "STOP_S_DH,This bit provides a secondary override for disabling the stall counter on data hazard interface." "0: Stall counter on data hazard is defreezed from..,1: Stall counter on data hazard is freezed from.."
|
|
newline
|
|
bitfld.long 0x0 10. "STOP_S_SINOUT,This bit provides a secondary override for disabling the stall counter on stream-in and stream-out interface" "0: tall counter on stream-in 'and' stream-out is..,1: Stall counter on stream-in 'and' stream-out is.."
|
|
newline
|
|
bitfld.long 0x0 9. "STOP_S_SOUT,This bit provides a secondary override for disabling the stall counter on stream-out interface." "0: Stall counter on stream-in is defreezed from..,1: Stall counter on stream-out is freezed from.."
|
|
newline
|
|
bitfld.long 0x0 8. "STOP_S_SIN,This bit provides a secondary override for disabling the stall counter on stream-in interface." "0: Stall counter is defreezed from counting.,1: Stall counter on stream-in is freezed from.."
|
|
newline
|
|
bitfld.long 0x0 4. "EN_EX_CNT,This bit controls the execution cycle counter." "0: Execution counter is inactive. Counter does not..,1: Execution counter is enabled. Counter counts the.."
|
|
newline
|
|
bitfld.long 0x0 3. "EN_S_DH,This bit controls the stall counter that monitors the stalls due to data hazards in the pipeline." "0: Stall counter on stalls due to data hazard is..,1: Stall counter on stalls due to data hazard is.."
|
|
newline
|
|
bitfld.long 0x0 2. "EN_S_SINOUT,This bit controls the stall counter that monitor both stream-in and stream-out stalls occurring in same clock cycle" "0: Stall counter on stream-in and stream-out stalls..,1: Stall counter on stream-in and stream-out stalls.."
|
|
newline
|
|
bitfld.long 0x0 1. "EN_S_SOUT,This bit controls the stall counter on stream-out interface." "0: Stall counter on stream-out stalls is inactive.,1: Stall counter on stream-out stalls is enabled."
|
|
newline
|
|
bitfld.long 0x0 0. "EN_S_SIN,This bit controls the stall counter on stream-in interface." "0: Stall counter on stream-in stalls is inactive.,1: Stall counter on stream-in stalls is enabled."
|
|
line.long 0x4 "PMONITOR_SAMPLE,Performance Monitor Sample Register"
|
|
bitfld.long 0x4 4. "SAMPLE_EX_CNT,Sample execution counter" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "SAMPLE_S_DH,Sample stall counter on data hazard" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "SAMPLE_S_SINOUT,Sample stall counter on stream-in 'and' stream-out interface" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "SAMPLE_S_SOUT,Sample stall counter on stream-out interface" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "SAMPLE_S_SIN,Sample stall counter on stream-in interface" "0,1"
|
|
rgroup.long 0x508++0x13
|
|
line.long 0x0 "STALL_STREAMIN,Stream-in Stall Counter"
|
|
hexmask.long 0x0 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0x4 "STALL_STREAMOUT,Stream-out Stall Counter"
|
|
hexmask.long 0x4 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0x8 "STALL_STREAMINOUT,Stream-in and Stream-out Stall Counter"
|
|
hexmask.long 0x8 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0xC "STALL_DATAHAZARD,Data Hazard Stall Counter"
|
|
hexmask.long 0xC 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0x10 "EXEC_COUNTER,Execution Cycle Counter"
|
|
hexmask.long 0x10 0.--31. 1. "CYCLES,Number of execution cycles."
|
|
group.long 0x580++0xF
|
|
line.long 0x0 "IMEM_ERROR_INJECT_ADDR,Instruction Memory Error Injection Address"
|
|
hexmask.long.byte 0x0 0.--5. 1. "ADDR,Instruction memory address for error injection."
|
|
line.long 0x4 "IMEM_ERROR_VECTOR0,Instruction Memory Error Low Vector"
|
|
hexmask.long 0x4 0.--31. 1. "ERR_VEC0,Lower 32-bits of error vector."
|
|
line.long 0x8 "IMEM_ERROR_VECTOR1,Instruction Memory Error High Vector"
|
|
bitfld.long 0x8 31. "ERR_EN,Error injection enable" "0: No error is injected.,1: Error is injected. ECC syndrome and SEC-DED.."
|
|
newline
|
|
hexmask.long.byte 0x8 0.--6. 1. "ERR_VEC1,Higher 7-bits of error vector."
|
|
line.long 0xC "IMEM_ERROR_INJECT_STAT,Instruction Memory Error Inject Status Register"
|
|
bitfld.long 0xC 31. "LOC_ACC,This field provides the status of the location of instruction memory at which error is injected was accessed by IPUS core" "0: Instruction memory location was not accessed.,1: Instruction memory location was accessed and.."
|
|
newline
|
|
hexmask.long.byte 0xC 8.--14. 1. "SYNDROME,7-bit syndrome found when error was injected."
|
|
newline
|
|
rbitfld.long 0xC 1. "DED,Double bit error was detected." "0,1"
|
|
newline
|
|
rbitfld.long 0xC 0. "SEC,Single bit error was detected and corrected." "0,1"
|
|
group.long 0x600++0x3
|
|
line.long 0x0 "RESET_REG,Reset Register"
|
|
bitfld.long 0x0 1. "HARD_RESET,Writing 1 to this field provides a hard reset to the IPUS module" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SOFT_RESET,Writing 1 to this field provides a soft reset to the IPUS module" "0,1"
|
|
tree.end
|
|
tree "IPUS_2"
|
|
base ad:0x7C044000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "HOST_START,Command and Start Register"
|
|
hexmask.long.byte 0x0 16.--23. 1. "CSA,This field provides as a status the start address for the ongoing line processing."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "NSA,This field provides the address location in IRAM from where the processing of the next line starts"
|
|
line.long 0x4 "HOST_STATUS,Core Status Register"
|
|
hexmask.long.word 0x4 16.--31. 1. "REMAIN_PIXELS,Indicates the number of the pixels remaining to be processed"
|
|
newline
|
|
rbitfld.long 0x4 10. "DEBUG_STATUS,This field provides the debug status of the IPUS core." "0: In execution mode,1: In debug mode"
|
|
newline
|
|
rbitfld.long 0x4 8.--9. "CORE_STATUS,This field indicates the IPUS core status and number of triggers that has been bufferred." "0: Idle,1: Running single command.,?,?"
|
|
newline
|
|
bitfld.long 0x4 0.--1. "N_EVENTS,This fields reflects the value of the event counter" "0,1,2,3"
|
|
line.long 0x8 "HOST_POS,Position Configuration Register"
|
|
hexmask.long.word 0x8 16.--31. 1. "XPOS,This field indicates the horizontal position of the next line."
|
|
newline
|
|
hexmask.long.word 0x8 0.--15. 1. "YPOS,This field indicates the line number of the next line to be processed."
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x0 "HOST_CURRPOS,Current Position Status Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "CURR_XPOS,Provides the horizontal pixel position (XPOS) for the currently processed line."
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "CURR_YPOS,Provides the status the line number of the currently processed line."
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "HOST_XCFG,Line Width and Step Configuration Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "XSIZE,This field provides the width in terms of number of pixel componenets of the next line to be processed"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "XSTEP,This field provides the next incremental step for the XPOS register" "0: XPOS increment step is 4,1: XPOS increment step is 1,?,?"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "HOST_CURRXCFG,Current Line Width and Step Status Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "CURR_XSIZE,This field provides the width of the pixel component line being currently processed."
|
|
newline
|
|
bitfld.long 0x0 0.--1. "CURR_XSTEP,This field indicates the current XSTEP being used for processing." "0: XPOS increment step is 4,1: XPOS increment step is 1,?,?"
|
|
group.long 0x18++0xF
|
|
line.long 0x0 "HOST_INACFG,INA Matrix Configuration Register"
|
|
rbitfld.long 0x0 26. "CURR_EN_LINE2,Enable status for third row vector in 3x3 neighbourhood mode of INA matrix for the current line being processsed" "0: Third row-vector for currently line processed is..,1: Third row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x0 25. "CURR_EN_LINE1,Enable status for second row vector in 3x3 neighbourhood mode of INA matrix for the current line being processsed" "0: Second row-vector for currently line processed..,1: Second row-vector for currently line processed.."
|
|
newline
|
|
rbitfld.long 0x0 24. "CURR_EN_LINE0,Enable status for first row vector in 3x3 neighbourhood mode or complete row-vector in 1x9 neighbourhood mode of INA matrix for the current line being processsed" "0: First row-vector for currently line processed is..,1: First row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x0 18. "CURR_NHOOD,This field provides the current neighbourhood position of the elements in INA matrix being used in execution" "0: For the ongoing execution INA Matrix is in 3x3..,1: For the ongoing execution INA Matrix is in 1x9.."
|
|
newline
|
|
rbitfld.long 0x0 16.--17. "CURR_SHIFT,This field indicates the value currently being used for shifting each 1x3 row-vector or one 1x9 row-vector in INA matrix" "?,1: Row-vector of INA matrix will be shifted by 1.,?,?"
|
|
newline
|
|
bitfld.long 0x0 10. "EN_LINE2,This field enables the third row-vector of INA matrix for next line to be processed" "0: Disable the third 1x3 row vector of INA matrix..,1: Enable the third 1x3 row vector of INA matrix.."
|
|
newline
|
|
bitfld.long 0x0 9. "EN_LINE1,This field enables the second row-vector of INA matrix for next line to be processed" "0: Disable the second 1x3 row vector of INA matrix..,1: Enable the second 1x3 row vector of INA matrix.."
|
|
newline
|
|
bitfld.long 0x0 8. "EN_LINE0,This field enables the first row-vector of INA matrix for next line to be processed" "0: Disable first 1x3 row vector or 1x9 row vector..,1: Enable the first 1x3 row vector or 1x9 row.."
|
|
newline
|
|
bitfld.long 0x0 2. "NHOOD,This field provides the neighbourhood position of the elements in INA matrix" "0: INA Matrix is in 3x3 neighbourhood mode.,1: INA Matrix is in 1x9 neighbourhood mode."
|
|
newline
|
|
rbitfld.long 0x0 0.--1. "SHIFT,This field indicates the value by which each 1x3 row-vector or one 1x9 row-vector in INA matrix will be shifted when execution for the next line begins" "?,1: For next line processing shift the row vector of..,?,?"
|
|
line.long 0x4 "HOST_INBCFG,INB Matrix Configuration Register"
|
|
rbitfld.long 0x4 26. "CURR_EN_LINE2,Enable status for third row vector in 3x3 neighbourhood mode of INB matrix for the current line being processsed" "0: Third row-vector for currently line processed is..,1: Third row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x4 25. "CURR_EN_LINE1,Enable status for second row vector in 3x3 neighbourhood mode of INB matrix for the current line being processsed" "0: Second row-vector for currently line processed..,1: Second row-vector for currently line processed.."
|
|
newline
|
|
rbitfld.long 0x4 24. "CURR_EN_LINE0,Enable status for first row vector in 3x3 neighbourhood mode or complete row-vector in 1x9 neighbourhood mode of INB matrix for the current line being processsed" "0: First row-vector for currently line processed is..,1: First row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x4 18. "CURR_NHOOD,This field provides the neighbourhood position of the elements in INB matrix" "0: For the ongoing execution INB Matrix is in 3x3..,1: For the ongoing execution INB Matrix is in 1x9.."
|
|
newline
|
|
rbitfld.long 0x4 16.--17. "CURR_SHIFT,This field indicates the value currently being used for shifting each 1x3 row-vector or one 1x9 row-vector in INB matrix" "?,1: Row-vector of INA matrix will be shifted by 1.,?,?"
|
|
newline
|
|
bitfld.long 0x4 10. "EN_LINE2,This field enables the third row-vector of INB matrix for next line to be processed" "0: Disable the third 1x3 row vector of INB matrix..,1: Enable the third 1x3 row vector of INB matrix.."
|
|
newline
|
|
bitfld.long 0x4 9. "EN_LINE1,This field enables the second row-vector of INB matrix for next line to be processed" "0: Disable the second 1x3 row vector of INB matrix..,1: Enable the second 1x3 row vector of INB matrix.."
|
|
newline
|
|
bitfld.long 0x4 8. "EN_LINE0,This field enables the first row-vector of INB matrix for next line to be processed" "0: Disable first 1x3 row vector or 1x9 row vector..,1: Enable the first 1x3 row vector or 1x9 row.."
|
|
newline
|
|
bitfld.long 0x4 2. "NHOOD,This field provides the neighbourhood position of the elements in INB matrix" "0: INB Matrix is in 3x3 neighbourhood mode.,1: INB Matrix is in 1x9 neighbourhood mode."
|
|
newline
|
|
rbitfld.long 0x4 0.--1. "SHIFT,This field indicates the value by which each 1x3 row-vector or one 1x9 row-vector in INB matrix will be shifted when execution for the next line begins" "?,1: For next line processing shift the row vector of..,?,?"
|
|
line.long 0x8 "HOST_INALPHACFG,INALPHA Configuration Register"
|
|
rbitfld.long 0x8 26. "CURR_EN_LINE2,Enable status for third row vector in 3x3 neighbourhood mode of INALPHA matrix for the current line being processsed" "0: Third row-vector for currently line processed is..,1: Third row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x8 25. "CURR_EN_LINE1,Enable status for second row vector in 3x3 neighbourhood mode of INALPHA matrix for the current line being processsed" "0: Second row-vector for currently line processed..,1: Second row-vector for currently line processed.."
|
|
newline
|
|
rbitfld.long 0x8 24. "CURR_EN_LINE0,Enable status for first row vector in 3x3 neighbourhood mode or complete row-vector in 1x9 neighbourhood mode of INALPHA matrix for the current line being processsed" "0: First row-vector for currently line processed is..,1: First row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x8 18. "CURR_NHOOD,This field provides the current neighbourhood position of the elements in INALPHA matrix" "0: For the ongoing execution INALPHA Matrix is in..,1: For the ongoing execution INALPHA Matrix is in.."
|
|
newline
|
|
rbitfld.long 0x8 16.--17. "CURR_SHIFT,This field indicates the value currently being used for shifting each 1x3 row-vector or one 1x9 row-vector in INALPHA matrix" "?,1: Row-vector of INA matrix will be shifted by 1.,?,?"
|
|
newline
|
|
bitfld.long 0x8 10. "EN_LINE2,This field enables the third row-vector of INALPHA matrix for next line to be processed" "0: Disable the third 1x3 row vector of INALPHA..,1: Enable the third 1x3 row vector of INALPHA.."
|
|
newline
|
|
bitfld.long 0x8 9. "EN_LINE1,This field enables the second row-vector of INALPHA matrix for next line to be processed" "0: Disable the second 1x3 row vector of INALPHA..,1: Enable the second 1x3 row vector of INALPHA.."
|
|
newline
|
|
bitfld.long 0x8 8. "EN_LINE0,This field enables the first row-vector of INALPHA matrix for next line to be processed" "0: Disable first 1x3 row vector or 1x9 row vector..,1: Enable the first 1x3 row vector or 1x9 row.."
|
|
newline
|
|
bitfld.long 0x8 2. "NHOOD,This field provides the neighbourhood position of the elements in INALPHA matrix" "0: INALPHA Matrix is in 3x3 neighbourhood mode.,1: INALPHA matrix is in 1x9 neighbourhood mode."
|
|
newline
|
|
rbitfld.long 0x8 0.--1. "SHIFT,This field indicates the value by which each 1x3 row-vector or one 1x9 row-vector in INALPHA matrix will be shifted when execution for the next line begins" "?,1: For next line processing shift the row vector of..,?,?"
|
|
line.long 0xC "HOST_OUTCFG,OUT Matrix Configuration Register"
|
|
rbitfld.long 0xC 27. "CURR_EN_OUT3,This field indicates the status of the stream-out channel corresponding to OUT3 element for the current line processing" "0: OUT3 stream-out interface is disabled.,1: OUT3 stream-out interface is enabled."
|
|
newline
|
|
rbitfld.long 0xC 26. "CURR_EN_OUT2,This field indicates the status of the stream-out channel corresponding to OUT2 element for the current line processing" "0: OUT2 stream-out interface is disabled.,1: OUT2 stream-out interface is enabled."
|
|
newline
|
|
rbitfld.long 0xC 25. "CURR_EN_OUT1,This field indicates the status of the stream-out channel corresponding to OUT1 element for the current line processing" "0: OUT1 stream-out interface is disabled.,1: OUT1 stream-out interface is enabled."
|
|
newline
|
|
rbitfld.long 0xC 24. "CURR_EN_OUT0,This field indicates the status of the stream-out channel corresponding to OUT0 element for the current line processing" "0: OUT0 stream-out interface is disabled.,1: OUT0 stream-out interface is enabled."
|
|
newline
|
|
bitfld.long 0xC 11. "EN_OUT3,Enables the stream-out channel corresponding to OUT3 element of OUT matrix for processing the next line" "0: OUT3 stream-out channel is disabled.,1: OUT3 stream-out channel is enabled."
|
|
newline
|
|
bitfld.long 0xC 10. "EN_OUT2,Enables the stream-out channel corresponding to OUT2 element of OUT matrix for processing the next line" "0: OUT2 stream-out channel is disabled.,1: OUT2 stream-out channel is enabled."
|
|
newline
|
|
bitfld.long 0xC 9. "EN_OUT1,Enables the stream-out channel corresponding to OUT1 element of OUT matrix for processing the next line" "0: OUT1 stream-out channel is disabled.,1: OUT1 stream-out channel is enabled."
|
|
newline
|
|
bitfld.long 0xC 8. "EN_OUT0,Enables the stream-out channel corresponding to OUT0 element of OUT matrix for processing the next line" "0: OUT0 stream-out channel is disabled.,1: OUT0 stream-out channel is enabled."
|
|
group.long 0x40++0x17
|
|
line.long 0x0 "HOST_IMEMA,Instruction Memory Address Register"
|
|
hexmask.long.byte 0x0 0.--5. 1. "IADDR,Pointer into IRAM - This field provides an address pointer to a location of IRAM."
|
|
line.long 0x4 "HOST_IMEMD,Instruction Memory Data Register"
|
|
hexmask.long 0x4 0.--31. 1. "DATA,Read/Write data of IRAM - This field specifies data to be read/written from/into IRAM"
|
|
line.long 0x8 "HOST_DREGA,Data Register-Bank Address Register"
|
|
hexmask.long.byte 0x8 0.--7. 1. "DMEMA,Data memory address pointer - This field provides the pointer to core register bank of the IPUS module"
|
|
line.long 0xC "HOST_DREGD,Data Register-Bank Datum Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "DMEMD,Read/Write data of SGPRs - This field specifies data to be read or written from/into SGPRs"
|
|
line.long 0x10 "HOST_HISTA,Histogram Memory Address Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. "HISTA,Pointer into Histogram memory - This field provides an address pointer to a location of Histogram memory"
|
|
line.long 0x14 "HOST_HISTD,Histogram Memory Data Register"
|
|
hexmask.long 0x14 0.--31. 1. "HISTD,Read data from Histogram memory - This field specifies data to be read from histogram memory"
|
|
rgroup.long 0x58++0x7
|
|
line.long 0x0 "HOST_HISTPEAK,Histogram Peak Value Register"
|
|
hexmask.long 0x0 0.--31. 1. "HISTPEAK,Peak value - Reads to this register provides the maximum value to the histogram engine"
|
|
line.long 0x4 "HOST_HISTAMAX,Histogram Maximum Value Address Register"
|
|
hexmask.long.byte 0x4 0.--7. 1. "HISTAMAX,Address - Reads to this register provides the address location (bin address) of the maximum value to the histogram engine"
|
|
group.long 0x60++0xF
|
|
line.long 0x0 "HOST_HISTCLEAR,Histogram Clear Register"
|
|
hexmask.long 0x0 0.--31. 1. "HISTCLEAR,Writes to this register with any value clears the histogram memory and re-initialize the histogram engine"
|
|
line.long 0x4 "HOST_STATA,Statistics Memory Address Register"
|
|
hexmask.long.word 0x4 0.--9. 1. "STATA,Pointer into statistics memory - This field provides an address pointer to a location of statistics memory"
|
|
line.long 0x8 "HOST_STATD,Statistics Memory Data Register"
|
|
hexmask.long 0x8 0.--31. 1. "STATD,Statistics memory data - This field specifies data to be read or written from/to statistics memory"
|
|
line.long 0xC "HOST_STATCLEAR,Statistics Memory Clear Register"
|
|
hexmask.long 0xC 0.--31. 1. "STATCLEAR,Writes to this register with any value clears the statistical memory and re-initialize the statistical engine"
|
|
group.long 0x78++0x7
|
|
line.long 0x0 "HOST_LUTA,LUT Memory Address Register"
|
|
hexmask.long.word 0x0 0.--11. 1. "LUTA,Pointer into LUT memory - This field provides an address pointer to a location of LUT memory."
|
|
line.long 0x4 "HOST_LUTD,LUT Memory Data Register"
|
|
hexmask.long 0x4 0.--31. 1. "LUTD,LUT memory data - This field specifies data to be read or written from/to LUT memory"
|
|
group.long 0x104++0x23
|
|
line.long 0x0 "S_LINE0_LEN_INA,INA Stream Line 0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of the stream."
|
|
line.long 0x4 "S_CH0_CFG_INA,INA Stream Line 0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifes decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x8 "S_LINE0_ADDR_INA,INA Stream Line 0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Stream start address"
|
|
line.long 0xC "S_LINE1_LEN_INA,INA Stream Line 1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of the stream."
|
|
line.long 0x10 "S_CH1_CFG_INA,INA Stream Line 1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifes decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeated loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x14 "S_LINE1_ADDR_INA,INA Stream Line 1 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Stream start address"
|
|
line.long 0x18 "S_LINE2_LEN_INA,INA Stream Line 2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Length of the stream."
|
|
line.long 0x1C "S_CH2_CFG_INA,INA Stream Line 2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifes decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeated loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x20 "S_LINE2_ADDR_INA,INA Stream Line 2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Stream start address"
|
|
group.long 0x144++0x23
|
|
line.long 0x0 "S_LINE0_LEN_INB,INB Stream Line 0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x4 "S_CH0_CFG_INB,INB Stream Line 0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Step count of channel - Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x8 "S_LINE0_ADDR_INB,INB Stream Line 0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Stream start address"
|
|
line.long 0xC "S_LINE1_LEN_INB,INB Stream Line 1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x10 "S_CH1_CFG_INB,INB Stream Line 1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Step count of channel - Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x14 "S_LINE1_ADDR_INB,INB Stream Line 1 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Stream start address"
|
|
line.long 0x18 "S_LINE2_LEN_INB,INB Stream Line 2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x1C "S_CH2_CFG_INB,INB Stream Line 2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Step count of channel - Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x20 "S_LINE2_ADDR_INB,INB Stream Line 2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Stream start address"
|
|
group.long 0x184++0x23
|
|
line.long 0x0 "S_LINE0_LEN_INALPHA,INALPHA Stream Line 0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x4 "S_CH0_CFG_INALPHA,INALPHA Stream 0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x8 "S_LINE0_ADDR_INALPHA,INALPHA Stream Line 0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Stream start address."
|
|
line.long 0xC "S_LINE1_LEN_INALPHA,INALPHA Stream Line 1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x10 "S_CH1_CFG_INALPHA,INALPHA Stream 1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x14 "S_LINE1_ADDR_INALPHA,INALPHA Stream Line 1 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Stream start address."
|
|
line.long 0x18 "S_LINE2_LEN_INALPHA,INALPHA Stream Line 2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x1C "S_CH2_CFG_INALPHA,INALPHA Stream 2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x20 "S_LINE2_ADDR_INALPHA,INALPHA Stream Line 2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Stream start address."
|
|
group.long 0x1C4++0x2F
|
|
line.long 0x0 "S_LINE0_LEN_OUT,Stream OUT 0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of the stream to be outputted."
|
|
line.long 0x4 "S_CH0_CFG_OUT,Stream OUT 0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the output stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "SKIP,Skip count of Channel - Specifies the stride of the stream output channel" "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x8 "S_LINE0_ADDR_OUT,Stream OUT 0 Address Register"
|
|
hexmask.long 0x8 3.--31. 1. "ADDR,Start address of the output stream"
|
|
line.long 0xC "S_LINE1_LEN_OUT,Stream OUT 1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of the stream to be outputted."
|
|
line.long 0x10 "S_CH1_CFG_OUT,Stream OUT 1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the output stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "SKIP,Skip count of Channel - Specifies the stride of the stream output channel" "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x14 "S_LINE1_ADDR_OUT,Stream OUT 1 Address Register"
|
|
hexmask.long 0x14 3.--31. 1. "ADDR,Start address of the output stream"
|
|
line.long 0x18 "S_LINE2_LEN_OUT,Stream OUT 2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Length of the stream to be outputted."
|
|
line.long 0x1C "S_CH2_CFG_OUT,Stream OUT 2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the output stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "SKIP,Skip count of Channel - Specifies the stride of the stream output channel" "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x20 "S_LINE2_ADDR_OUT,Stream OUT 2 Address Register"
|
|
hexmask.long 0x20 3.--31. 1. "ADDR,Start address of the output stream"
|
|
line.long 0x24 "S_LINE3_LEN_OUT,Stream OUT 3 Length Register"
|
|
hexmask.long.word 0x24 0.--15. 1. "LENGTH,Length of the stream to be outputted."
|
|
line.long 0x28 "S_CH3_CFG_OUT,Stream OUT 3 Configuration Register"
|
|
bitfld.long 0x28 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the output stream" "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x28 16.--17. "SKIP,Skip count of Channel - Specifies the stride of the stream output channel" "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x2C "S_LINE3_ADDR_OUT,Stream OUT 3 Address Register"
|
|
hexmask.long 0x2C 3.--31. 1. "ADDR,Start address of the output stream"
|
|
rgroup.long 0x204++0x23
|
|
line.long 0x0 "S_CURR_LINE0_LEN_INA,Current INA Stream Line0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x4 "S_CURR_CH0_CFG_INA,Current INA Stream Channel0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Current boundary width/size on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Current boundary substitution mode used by the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Current repeat value used by the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Current step value used by the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x8 "S_CURR_LINE0_ADDR_INA,Current Stream Line0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Current base address of the stream."
|
|
line.long 0xC "S_CURR_LINE1_LEN_INA,Current INA Stream Line1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Current length of the stream."
|
|
line.long 0x10 "S_CURR_CH1_CFG_INA,Current INA Stream Channel1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Current boundary width/size on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Current boundary substitution mode used by the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Current repeat value used on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Current step value used on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x14 "S_CURR_LINE1_ADDR_INA,Current INA Stream Line1 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Current base address."
|
|
line.long 0x18 "S_CURR_LINE2_LEN_INA,Current INA Stream Line2 Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Current length of the stream."
|
|
line.long 0x1C "S_CURR_CH2_CFG_INA,Current INA Stream Channel2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Current data-type being used on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Current boundary width/size on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Current repeat value used on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Current step value used on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x20 "S_CURR_LINE2_ADDR_INA,Current INA Stream Line2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Current base address."
|
|
rgroup.long 0x244++0x23
|
|
line.long 0x0 "S_CURR_LINE0_LEN_INB,Current INB Stream Line0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x4 "S_CURR_CH0_CFG_INB,Current INB Stream Channel0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Current data-type being used on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Current repeat value on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Current step value on stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x8 "S_CURR_LINE0_ADDR_INB,Current INB Stream Line0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Current base address."
|
|
line.long 0xC "S_CURR_LINE1_LEN_INB,Current INB Stream Line 1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x10 "S_CURR_CH1_CFG_INB,Current INB Stream Channel1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Current data-type being used on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPEAT_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Current repeat value on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Current step value on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel component."
|
|
line.long 0x14 "S_CURR_LINE1_ADDR_INB,Current INB Stream Line 1 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Current base address."
|
|
line.long 0x18 "S_CURR_LINE2_LEN_INB,Current INB Stream Line2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x1C "S_CURR_CH2_CFG_INB,Current INB Stream Channel2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Current repeat value on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Current step value on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x20 "S_CURR_LINE2_ADDR_INB,Current INB Stream Line2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Current base address."
|
|
rgroup.long 0x284++0x23
|
|
line.long 0x0 "S_CURR_LINE0_LEN_INALPHA,Current INALPHA Stream Line0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x4 "S_CURR_CH0_CFG_INALPHA,Current INALPHA Stream Channel0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Current repeat value on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Current step value on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x8 "S_CURR_LINE0_ADDR_INALPHA,Current INALPHA Stream Line0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Current base address"
|
|
line.long 0xC "S_CURR_LINE1_LEN_INALPHA,Current INALPHA Stream Line1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x10 "S_CURR_CH1_CFG_INALPHA,Current INALPHA Stream Channel1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Current repeat value on stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Current step value on stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x14 "S_CURR_LINE1_ADDR_INALPHA,Current INALPHA Stream Line 1 Address register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Current base address."
|
|
line.long 0x18 "S_CURR_LINE2_LEN_INALPHA,Current INALPHA Stream Line2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x1C "S_CURR_CH2_CFG_INALPHA,Current INALPHA Stream Channel2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Current repeat value on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Current step value on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x20 "S_CURR_LINE2_ADDR_INALPHA,Current INALPHA Stream Line2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Current base address"
|
|
rgroup.long 0x2C4++0x2F
|
|
line.long 0x0 "S_CURR_LINE0_LEN_OUT,Current OUT Stream Line0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x4 "S_CURR_CH0_CFG_OUT,Current OUT Stream Channel0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Current datatype on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "SKIP,Current skip value on stream interface." "0,1,2,3"
|
|
line.long 0x8 "S_CURR_LINE0_ADDR_OUT,Current OUT Stream Line0 Address Register"
|
|
hexmask.long 0x8 3.--31. 1. "ADDR,Current start address."
|
|
line.long 0xC "S_CURR_LINE1_LEN_OUT,Current OUT Stream Line1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Current stream length"
|
|
line.long 0x10 "S_CURR_CH1_CFG_OUT,Current OUT Stream Channel1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Current datatype on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "SKIP,Current skip value on the stream interface." "0,1,2,3"
|
|
line.long 0x14 "S_CURR_LINE1_ADDR_OUT,Current OUT Stream Line1 Address Register"
|
|
hexmask.long 0x14 3.--31. 1. "ADDR,Current start address."
|
|
line.long 0x18 "S_CURR_LINE2_LEN_OUT,Current OUT Stream Line2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x1C "S_CURR_CH2_CFG_OUT,Current OUT Stream Channel2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Current datatype on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "SKIP,Current skip value on stream interface." "0,1,2,3"
|
|
line.long 0x20 "S_CURR_LINE2_ADDR_OUT,Current OUT Stream Line2 Address Register"
|
|
hexmask.long 0x20 3.--31. 1. "ADDR,Current start address."
|
|
line.long 0x24 "S_CURR_LINE3_LEN_OUT,Current OUT Stream Line3 Length Register"
|
|
hexmask.long.word 0x24 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x28 "S_CURR_CH3_CFG_OUT,Current OUT Stream Channel3 Configuration Register"
|
|
bitfld.long 0x28 28.--29. "TYPE,Current datatype on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x28 16.--17. "SKIP,Current skip value on the stream interface." "0,1,2,3"
|
|
line.long 0x2C "S_CURR_LINE3_ADDR_OUT,Current OUT Stream Line3 Address Register"
|
|
hexmask.long 0x2C 3.--31. 1. "ADDR,Current start address."
|
|
group.long 0x400++0xF
|
|
line.long 0x0 "DEBUG_MS,Debug Mode and Step Register"
|
|
bitfld.long 0x0 31. "B_FINISH,Break on Finish - Writing 1 in this bit enables breakpoint on finish" "0,1"
|
|
newline
|
|
bitfld.long 0x0 30. "B_WADDR,Break point on Write address - Writing 1 in this bit enables breakpoint on write address" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "B_RADDR,Break point on Read address - Writing 1 in this bit enables breakpoint on read address" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "B_IADDR,Break point on Instruction Fetch - Writing 1 in this bit enables breakpoint on instruction fetch" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "B_POS,Break point on Pixel Position - Writing 1 in this bit enabels breakpoint on pixel position" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "B_YPOS,Break point on Line - Writing 1 in this bit enabels breakpoint on line" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "B_XPOS,Break point on Pixel Number - Writing 1 in this bit enabels breakpoint on pixel number" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--19. 1. "STEP,Step Size - This field is used for specifying the step size of IPUS module when in debug mode."
|
|
newline
|
|
bitfld.long 0x0 1. "CTI_EN,Cross-triggerring enable" "0: Disable cross-triggering with CTI.,1: Enable cross-triggering with CTI."
|
|
newline
|
|
bitfld.long 0x0 0. "DBG_ACT,Activate Debug Mode - Writing 1 in this bit makes the IPUS module to enter debug mode." "0,1"
|
|
line.long 0x4 "DEBUG_BKPT_STAT,Debug Breakpoint Status Register"
|
|
bitfld.long 0x4 25. "STEP_REQ,STEP Request - Writing 1 to this bit provides a step request to the IPUS core" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "FINISH,Breakpoint on finish status" "0: Breakpoint on finish not occurred.,1: Breakpoint on finish occurred."
|
|
newline
|
|
bitfld.long 0x4 22. "WADDR,Breakpoint on write status" "0: Breakpoint on write not occurred.,1: Breakpoint on write occurred."
|
|
newline
|
|
bitfld.long 0x4 21. "RADDR,Breakpoint on read status" "0: Breakpoint on read not occurred.,1: Breakpoint on read occurred."
|
|
newline
|
|
bitfld.long 0x4 20. "IADDR,Instruction fetch breakpoint status" "0: Instruction fetch breakpoint not occurred.,1: Instruction fetch breakpoint occurred."
|
|
newline
|
|
bitfld.long 0x4 19. "POS,Position breakpoint status" "0: Position breakpoint not occurred.,1: Position breakpoint occurred."
|
|
newline
|
|
bitfld.long 0x4 18. "YPOS,YPOS breakpoint status" "0: YPOS breakpoint not occurred.,1: YPOS breakpoint occurred."
|
|
newline
|
|
bitfld.long 0x4 17. "XPOS,XPOS breakpoint status" "0: Breakpoint XPOS not occurred.,1: Breakpoint XPOS occurred."
|
|
newline
|
|
bitfld.long 0x4 16. "DBG,Debug mode status: This bit provides the debug status of IPUS core" "0: In execution mode. (Instruction execution..,1: In debug mode. (Instruction execution stalled)"
|
|
newline
|
|
rbitfld.long 0x4 0. "H_DBG,This register provides the status of debug mode acknowledgement upon hardware debug request" "0: In execution mode (No hardware debug request..,1: In debug upon assertion debug request signal."
|
|
line.long 0x8 "DEBUG_BKPT_POS,Debug Breakpoint Position Register"
|
|
hexmask.long.word 0x8 16.--31. 1. "XPOS,Horizontal Pixel position - Specifies the horizontal pixel position for XPOS or POS breakpoint."
|
|
newline
|
|
hexmask.long.word 0x8 0.--15. 1. "YPOS,Vertical Pixel position - Specifies the vertical position (i"
|
|
line.long 0xC "DEBUG_BKPT_ADDR,Debug Breakpoint Address Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. "IADDR,Instruction fetch address - This field holds the instruction address where instruction fetch breakpoint should occur"
|
|
newline
|
|
hexmask.long.byte 0xC 16.--23. 1. "DRADDR,Data read address - This field holds the data address of the register bank from where when reads happens triggers breakpoint on read"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--15. 1. "DWADDR,Data Write address - This field holds the data address of the register bank to where when write happens triggers breakpoint on write"
|
|
rgroup.long 0x414++0x3
|
|
line.long 0x0 "DEBUG_CORE_STAT,Debug Core Status Register"
|
|
bitfld.long 0x0 27. "N,Status of scalar negative flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "Z,Status of scalar zero flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "C,Status of scalar carry flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "OV,Status of scalar overflow flag." "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "PC,This field holds the value of the program counter"
|
|
group.long 0x500++0x7
|
|
line.long 0x0 "PMONITOR_CTRL,Performance Monitor Control Register."
|
|
bitfld.long 0x0 20. "INIT_EX_CNT,This bit is used for clear the execution cycle counter" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "INIT_S_DH,This bit is used for clear the stall counter on data hazards" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "INIT_S_SINOUT,This bit is used for clear the stall counter on stream-in 'and' stream-out interface" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "INIT_S_SOUT,This bit is used for clear the stall counter on stream-out interface" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "INIT_S_SIN,This bit is used for clear the stall counter on stream-in interface" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "STOP_EX_CNT,This bit provides a secondary override for disabling the execution cycle counter." "0: Execution cycle counter is defreezed from..,1: Execution cycle counter is freezed from counting."
|
|
newline
|
|
bitfld.long 0x0 11. "STOP_S_DH,This bit provides a secondary override for disabling the stall counter on data hazard interface." "0: Stall counter on data hazard is defreezed from..,1: Stall counter on data hazard is freezed from.."
|
|
newline
|
|
bitfld.long 0x0 10. "STOP_S_SINOUT,This bit provides a secondary override for disabling the stall counter on stream-in and stream-out interface" "0: tall counter on stream-in 'and' stream-out is..,1: Stall counter on stream-in 'and' stream-out is.."
|
|
newline
|
|
bitfld.long 0x0 9. "STOP_S_SOUT,This bit provides a secondary override for disabling the stall counter on stream-out interface." "0: Stall counter on stream-in is defreezed from..,1: Stall counter on stream-out is freezed from.."
|
|
newline
|
|
bitfld.long 0x0 8. "STOP_S_SIN,This bit provides a secondary override for disabling the stall counter on stream-in interface." "0: Stall counter is defreezed from counting.,1: Stall counter on stream-in is freezed from.."
|
|
newline
|
|
bitfld.long 0x0 4. "EN_EX_CNT,This bit controls the execution cycle counter." "0: Execution counter is inactive. Counter does not..,1: Execution counter is enabled. Counter counts the.."
|
|
newline
|
|
bitfld.long 0x0 3. "EN_S_DH,This bit controls the stall counter that monitors the stalls due to data hazards in the pipeline." "0: Stall counter on stalls due to data hazard is..,1: Stall counter on stalls due to data hazard is.."
|
|
newline
|
|
bitfld.long 0x0 2. "EN_S_SINOUT,This bit controls the stall counter that monitor both stream-in and stream-out stalls occurring in same clock cycle" "0: Stall counter on stream-in and stream-out stalls..,1: Stall counter on stream-in and stream-out stalls.."
|
|
newline
|
|
bitfld.long 0x0 1. "EN_S_SOUT,This bit controls the stall counter on stream-out interface." "0: Stall counter on stream-out stalls is inactive.,1: Stall counter on stream-out stalls is enabled."
|
|
newline
|
|
bitfld.long 0x0 0. "EN_S_SIN,This bit controls the stall counter on stream-in interface." "0: Stall counter on stream-in stalls is inactive.,1: Stall counter on stream-in stalls is enabled."
|
|
line.long 0x4 "PMONITOR_SAMPLE,Performance Monitor Sample Register"
|
|
bitfld.long 0x4 4. "SAMPLE_EX_CNT,Sample execution counter" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "SAMPLE_S_DH,Sample stall counter on data hazard" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "SAMPLE_S_SINOUT,Sample stall counter on stream-in 'and' stream-out interface" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "SAMPLE_S_SOUT,Sample stall counter on stream-out interface" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "SAMPLE_S_SIN,Sample stall counter on stream-in interface" "0,1"
|
|
rgroup.long 0x508++0x13
|
|
line.long 0x0 "STALL_STREAMIN,Stream-in Stall Counter"
|
|
hexmask.long 0x0 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0x4 "STALL_STREAMOUT,Stream-out Stall Counter"
|
|
hexmask.long 0x4 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0x8 "STALL_STREAMINOUT,Stream-in and Stream-out Stall Counter"
|
|
hexmask.long 0x8 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0xC "STALL_DATAHAZARD,Data Hazard Stall Counter"
|
|
hexmask.long 0xC 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0x10 "EXEC_COUNTER,Execution Cycle Counter"
|
|
hexmask.long 0x10 0.--31. 1. "CYCLES,Number of execution cycles."
|
|
group.long 0x580++0xF
|
|
line.long 0x0 "IMEM_ERROR_INJECT_ADDR,Instruction Memory Error Injection Address"
|
|
hexmask.long.byte 0x0 0.--5. 1. "ADDR,Instruction memory address for error injection."
|
|
line.long 0x4 "IMEM_ERROR_VECTOR0,Instruction Memory Error Low Vector"
|
|
hexmask.long 0x4 0.--31. 1. "ERR_VEC0,Lower 32-bits of error vector."
|
|
line.long 0x8 "IMEM_ERROR_VECTOR1,Instruction Memory Error High Vector"
|
|
bitfld.long 0x8 31. "ERR_EN,Error injection enable" "0: No error is injected.,1: Error is injected. ECC syndrome and SEC-DED.."
|
|
newline
|
|
hexmask.long.byte 0x8 0.--6. 1. "ERR_VEC1,Higher 7-bits of error vector."
|
|
line.long 0xC "IMEM_ERROR_INJECT_STAT,Instruction Memory Error Inject Status Register"
|
|
bitfld.long 0xC 31. "LOC_ACC,This field provides the status of the location of instruction memory at which error is injected was accessed by IPUS core" "0: Instruction memory location was not accessed.,1: Instruction memory location was accessed and.."
|
|
newline
|
|
hexmask.long.byte 0xC 8.--14. 1. "SYNDROME,7-bit syndrome found when error was injected."
|
|
newline
|
|
rbitfld.long 0xC 1. "DED,Double bit error was detected." "0,1"
|
|
newline
|
|
rbitfld.long 0xC 0. "SEC,Single bit error was detected and corrected." "0,1"
|
|
group.long 0x600++0x3
|
|
line.long 0x0 "RESET_REG,Reset Register"
|
|
bitfld.long 0x0 1. "HARD_RESET,Writing 1 to this field provides a hard reset to the IPUS module" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SOFT_RESET,Writing 1 to this field provides a soft reset to the IPUS module" "0,1"
|
|
tree.end
|
|
tree "IPUS_3"
|
|
base ad:0x7C045000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "HOST_START,Command and Start Register"
|
|
hexmask.long.byte 0x0 16.--23. 1. "CSA,This field provides as a status the start address for the ongoing line processing."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "NSA,This field provides the address location in IRAM from where the processing of the next line starts"
|
|
line.long 0x4 "HOST_STATUS,Core Status Register"
|
|
hexmask.long.word 0x4 16.--31. 1. "REMAIN_PIXELS,Indicates the number of the pixels remaining to be processed"
|
|
newline
|
|
rbitfld.long 0x4 10. "DEBUG_STATUS,This field provides the debug status of the IPUS core." "0: In execution mode,1: In debug mode"
|
|
newline
|
|
rbitfld.long 0x4 8.--9. "CORE_STATUS,This field indicates the IPUS core status and number of triggers that has been bufferred." "0: Idle,1: Running single command.,?,?"
|
|
newline
|
|
bitfld.long 0x4 0.--1. "N_EVENTS,This fields reflects the value of the event counter" "0,1,2,3"
|
|
line.long 0x8 "HOST_POS,Position Configuration Register"
|
|
hexmask.long.word 0x8 16.--31. 1. "XPOS,This field indicates the horizontal position of the next line."
|
|
newline
|
|
hexmask.long.word 0x8 0.--15. 1. "YPOS,This field indicates the line number of the next line to be processed."
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x0 "HOST_CURRPOS,Current Position Status Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "CURR_XPOS,Provides the horizontal pixel position (XPOS) for the currently processed line."
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "CURR_YPOS,Provides the status the line number of the currently processed line."
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "HOST_XCFG,Line Width and Step Configuration Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "XSIZE,This field provides the width in terms of number of pixel componenets of the next line to be processed"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "XSTEP,This field provides the next incremental step for the XPOS register" "0: XPOS increment step is 4,1: XPOS increment step is 1,?,?"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "HOST_CURRXCFG,Current Line Width and Step Status Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "CURR_XSIZE,This field provides the width of the pixel component line being currently processed."
|
|
newline
|
|
bitfld.long 0x0 0.--1. "CURR_XSTEP,This field indicates the current XSTEP being used for processing." "0: XPOS increment step is 4,1: XPOS increment step is 1,?,?"
|
|
group.long 0x18++0xF
|
|
line.long 0x0 "HOST_INACFG,INA Matrix Configuration Register"
|
|
rbitfld.long 0x0 26. "CURR_EN_LINE2,Enable status for third row vector in 3x3 neighbourhood mode of INA matrix for the current line being processsed" "0: Third row-vector for currently line processed is..,1: Third row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x0 25. "CURR_EN_LINE1,Enable status for second row vector in 3x3 neighbourhood mode of INA matrix for the current line being processsed" "0: Second row-vector for currently line processed..,1: Second row-vector for currently line processed.."
|
|
newline
|
|
rbitfld.long 0x0 24. "CURR_EN_LINE0,Enable status for first row vector in 3x3 neighbourhood mode or complete row-vector in 1x9 neighbourhood mode of INA matrix for the current line being processsed" "0: First row-vector for currently line processed is..,1: First row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x0 18. "CURR_NHOOD,This field provides the current neighbourhood position of the elements in INA matrix being used in execution" "0: For the ongoing execution INA Matrix is in 3x3..,1: For the ongoing execution INA Matrix is in 1x9.."
|
|
newline
|
|
rbitfld.long 0x0 16.--17. "CURR_SHIFT,This field indicates the value currently being used for shifting each 1x3 row-vector or one 1x9 row-vector in INA matrix" "?,1: Row-vector of INA matrix will be shifted by 1.,?,?"
|
|
newline
|
|
bitfld.long 0x0 10. "EN_LINE2,This field enables the third row-vector of INA matrix for next line to be processed" "0: Disable the third 1x3 row vector of INA matrix..,1: Enable the third 1x3 row vector of INA matrix.."
|
|
newline
|
|
bitfld.long 0x0 9. "EN_LINE1,This field enables the second row-vector of INA matrix for next line to be processed" "0: Disable the second 1x3 row vector of INA matrix..,1: Enable the second 1x3 row vector of INA matrix.."
|
|
newline
|
|
bitfld.long 0x0 8. "EN_LINE0,This field enables the first row-vector of INA matrix for next line to be processed" "0: Disable first 1x3 row vector or 1x9 row vector..,1: Enable the first 1x3 row vector or 1x9 row.."
|
|
newline
|
|
bitfld.long 0x0 2. "NHOOD,This field provides the neighbourhood position of the elements in INA matrix" "0: INA Matrix is in 3x3 neighbourhood mode.,1: INA Matrix is in 1x9 neighbourhood mode."
|
|
newline
|
|
rbitfld.long 0x0 0.--1. "SHIFT,This field indicates the value by which each 1x3 row-vector or one 1x9 row-vector in INA matrix will be shifted when execution for the next line begins" "?,1: For next line processing shift the row vector of..,?,?"
|
|
line.long 0x4 "HOST_INBCFG,INB Matrix Configuration Register"
|
|
rbitfld.long 0x4 26. "CURR_EN_LINE2,Enable status for third row vector in 3x3 neighbourhood mode of INB matrix for the current line being processsed" "0: Third row-vector for currently line processed is..,1: Third row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x4 25. "CURR_EN_LINE1,Enable status for second row vector in 3x3 neighbourhood mode of INB matrix for the current line being processsed" "0: Second row-vector for currently line processed..,1: Second row-vector for currently line processed.."
|
|
newline
|
|
rbitfld.long 0x4 24. "CURR_EN_LINE0,Enable status for first row vector in 3x3 neighbourhood mode or complete row-vector in 1x9 neighbourhood mode of INB matrix for the current line being processsed" "0: First row-vector for currently line processed is..,1: First row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x4 18. "CURR_NHOOD,This field provides the neighbourhood position of the elements in INB matrix" "0: For the ongoing execution INB Matrix is in 3x3..,1: For the ongoing execution INB Matrix is in 1x9.."
|
|
newline
|
|
rbitfld.long 0x4 16.--17. "CURR_SHIFT,This field indicates the value currently being used for shifting each 1x3 row-vector or one 1x9 row-vector in INB matrix" "?,1: Row-vector of INA matrix will be shifted by 1.,?,?"
|
|
newline
|
|
bitfld.long 0x4 10. "EN_LINE2,This field enables the third row-vector of INB matrix for next line to be processed" "0: Disable the third 1x3 row vector of INB matrix..,1: Enable the third 1x3 row vector of INB matrix.."
|
|
newline
|
|
bitfld.long 0x4 9. "EN_LINE1,This field enables the second row-vector of INB matrix for next line to be processed" "0: Disable the second 1x3 row vector of INB matrix..,1: Enable the second 1x3 row vector of INB matrix.."
|
|
newline
|
|
bitfld.long 0x4 8. "EN_LINE0,This field enables the first row-vector of INB matrix for next line to be processed" "0: Disable first 1x3 row vector or 1x9 row vector..,1: Enable the first 1x3 row vector or 1x9 row.."
|
|
newline
|
|
bitfld.long 0x4 2. "NHOOD,This field provides the neighbourhood position of the elements in INB matrix" "0: INB Matrix is in 3x3 neighbourhood mode.,1: INB Matrix is in 1x9 neighbourhood mode."
|
|
newline
|
|
rbitfld.long 0x4 0.--1. "SHIFT,This field indicates the value by which each 1x3 row-vector or one 1x9 row-vector in INB matrix will be shifted when execution for the next line begins" "?,1: For next line processing shift the row vector of..,?,?"
|
|
line.long 0x8 "HOST_INALPHACFG,INALPHA Configuration Register"
|
|
rbitfld.long 0x8 26. "CURR_EN_LINE2,Enable status for third row vector in 3x3 neighbourhood mode of INALPHA matrix for the current line being processsed" "0: Third row-vector for currently line processed is..,1: Third row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x8 25. "CURR_EN_LINE1,Enable status for second row vector in 3x3 neighbourhood mode of INALPHA matrix for the current line being processsed" "0: Second row-vector for currently line processed..,1: Second row-vector for currently line processed.."
|
|
newline
|
|
rbitfld.long 0x8 24. "CURR_EN_LINE0,Enable status for first row vector in 3x3 neighbourhood mode or complete row-vector in 1x9 neighbourhood mode of INALPHA matrix for the current line being processsed" "0: First row-vector for currently line processed is..,1: First row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x8 18. "CURR_NHOOD,This field provides the current neighbourhood position of the elements in INALPHA matrix" "0: For the ongoing execution INALPHA Matrix is in..,1: For the ongoing execution INALPHA Matrix is in.."
|
|
newline
|
|
rbitfld.long 0x8 16.--17. "CURR_SHIFT,This field indicates the value currently being used for shifting each 1x3 row-vector or one 1x9 row-vector in INALPHA matrix" "?,1: Row-vector of INA matrix will be shifted by 1.,?,?"
|
|
newline
|
|
bitfld.long 0x8 10. "EN_LINE2,This field enables the third row-vector of INALPHA matrix for next line to be processed" "0: Disable the third 1x3 row vector of INALPHA..,1: Enable the third 1x3 row vector of INALPHA.."
|
|
newline
|
|
bitfld.long 0x8 9. "EN_LINE1,This field enables the second row-vector of INALPHA matrix for next line to be processed" "0: Disable the second 1x3 row vector of INALPHA..,1: Enable the second 1x3 row vector of INALPHA.."
|
|
newline
|
|
bitfld.long 0x8 8. "EN_LINE0,This field enables the first row-vector of INALPHA matrix for next line to be processed" "0: Disable first 1x3 row vector or 1x9 row vector..,1: Enable the first 1x3 row vector or 1x9 row.."
|
|
newline
|
|
bitfld.long 0x8 2. "NHOOD,This field provides the neighbourhood position of the elements in INALPHA matrix" "0: INALPHA Matrix is in 3x3 neighbourhood mode.,1: INALPHA matrix is in 1x9 neighbourhood mode."
|
|
newline
|
|
rbitfld.long 0x8 0.--1. "SHIFT,This field indicates the value by which each 1x3 row-vector or one 1x9 row-vector in INALPHA matrix will be shifted when execution for the next line begins" "?,1: For next line processing shift the row vector of..,?,?"
|
|
line.long 0xC "HOST_OUTCFG,OUT Matrix Configuration Register"
|
|
rbitfld.long 0xC 27. "CURR_EN_OUT3,This field indicates the status of the stream-out channel corresponding to OUT3 element for the current line processing" "0: OUT3 stream-out interface is disabled.,1: OUT3 stream-out interface is enabled."
|
|
newline
|
|
rbitfld.long 0xC 26. "CURR_EN_OUT2,This field indicates the status of the stream-out channel corresponding to OUT2 element for the current line processing" "0: OUT2 stream-out interface is disabled.,1: OUT2 stream-out interface is enabled."
|
|
newline
|
|
rbitfld.long 0xC 25. "CURR_EN_OUT1,This field indicates the status of the stream-out channel corresponding to OUT1 element for the current line processing" "0: OUT1 stream-out interface is disabled.,1: OUT1 stream-out interface is enabled."
|
|
newline
|
|
rbitfld.long 0xC 24. "CURR_EN_OUT0,This field indicates the status of the stream-out channel corresponding to OUT0 element for the current line processing" "0: OUT0 stream-out interface is disabled.,1: OUT0 stream-out interface is enabled."
|
|
newline
|
|
bitfld.long 0xC 11. "EN_OUT3,Enables the stream-out channel corresponding to OUT3 element of OUT matrix for processing the next line" "0: OUT3 stream-out channel is disabled.,1: OUT3 stream-out channel is enabled."
|
|
newline
|
|
bitfld.long 0xC 10. "EN_OUT2,Enables the stream-out channel corresponding to OUT2 element of OUT matrix for processing the next line" "0: OUT2 stream-out channel is disabled.,1: OUT2 stream-out channel is enabled."
|
|
newline
|
|
bitfld.long 0xC 9. "EN_OUT1,Enables the stream-out channel corresponding to OUT1 element of OUT matrix for processing the next line" "0: OUT1 stream-out channel is disabled.,1: OUT1 stream-out channel is enabled."
|
|
newline
|
|
bitfld.long 0xC 8. "EN_OUT0,Enables the stream-out channel corresponding to OUT0 element of OUT matrix for processing the next line" "0: OUT0 stream-out channel is disabled.,1: OUT0 stream-out channel is enabled."
|
|
group.long 0x40++0x17
|
|
line.long 0x0 "HOST_IMEMA,Instruction Memory Address Register"
|
|
hexmask.long.byte 0x0 0.--5. 1. "IADDR,Pointer into IRAM - This field provides an address pointer to a location of IRAM."
|
|
line.long 0x4 "HOST_IMEMD,Instruction Memory Data Register"
|
|
hexmask.long 0x4 0.--31. 1. "DATA,Read/Write data of IRAM - This field specifies data to be read/written from/into IRAM"
|
|
line.long 0x8 "HOST_DREGA,Data Register-Bank Address Register"
|
|
hexmask.long.byte 0x8 0.--7. 1. "DMEMA,Data memory address pointer - This field provides the pointer to core register bank of the IPUS module"
|
|
line.long 0xC "HOST_DREGD,Data Register-Bank Datum Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "DMEMD,Read/Write data of SGPRs - This field specifies data to be read or written from/into SGPRs"
|
|
line.long 0x10 "HOST_HISTA,Histogram Memory Address Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. "HISTA,Pointer into Histogram memory - This field provides an address pointer to a location of Histogram memory"
|
|
line.long 0x14 "HOST_HISTD,Histogram Memory Data Register"
|
|
hexmask.long 0x14 0.--31. 1. "HISTD,Read data from Histogram memory - This field specifies data to be read from histogram memory"
|
|
rgroup.long 0x58++0x7
|
|
line.long 0x0 "HOST_HISTPEAK,Histogram Peak Value Register"
|
|
hexmask.long 0x0 0.--31. 1. "HISTPEAK,Peak value - Reads to this register provides the maximum value to the histogram engine"
|
|
line.long 0x4 "HOST_HISTAMAX,Histogram Maximum Value Address Register"
|
|
hexmask.long.byte 0x4 0.--7. 1. "HISTAMAX,Address - Reads to this register provides the address location (bin address) of the maximum value to the histogram engine"
|
|
group.long 0x60++0xF
|
|
line.long 0x0 "HOST_HISTCLEAR,Histogram Clear Register"
|
|
hexmask.long 0x0 0.--31. 1. "HISTCLEAR,Writes to this register with any value clears the histogram memory and re-initialize the histogram engine"
|
|
line.long 0x4 "HOST_STATA,Statistics Memory Address Register"
|
|
hexmask.long.word 0x4 0.--9. 1. "STATA,Pointer into statistics memory - This field provides an address pointer to a location of statistics memory"
|
|
line.long 0x8 "HOST_STATD,Statistics Memory Data Register"
|
|
hexmask.long 0x8 0.--31. 1. "STATD,Statistics memory data - This field specifies data to be read or written from/to statistics memory"
|
|
line.long 0xC "HOST_STATCLEAR,Statistics Memory Clear Register"
|
|
hexmask.long 0xC 0.--31. 1. "STATCLEAR,Writes to this register with any value clears the statistical memory and re-initialize the statistical engine"
|
|
group.long 0x78++0x7
|
|
line.long 0x0 "HOST_LUTA,LUT Memory Address Register"
|
|
hexmask.long.word 0x0 0.--11. 1. "LUTA,Pointer into LUT memory - This field provides an address pointer to a location of LUT memory."
|
|
line.long 0x4 "HOST_LUTD,LUT Memory Data Register"
|
|
hexmask.long 0x4 0.--31. 1. "LUTD,LUT memory data - This field specifies data to be read or written from/to LUT memory"
|
|
group.long 0x104++0x23
|
|
line.long 0x0 "S_LINE0_LEN_INA,INA Stream Line 0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of the stream."
|
|
line.long 0x4 "S_CH0_CFG_INA,INA Stream Line 0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifes decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x8 "S_LINE0_ADDR_INA,INA Stream Line 0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Stream start address"
|
|
line.long 0xC "S_LINE1_LEN_INA,INA Stream Line 1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of the stream."
|
|
line.long 0x10 "S_CH1_CFG_INA,INA Stream Line 1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifes decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeated loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x14 "S_LINE1_ADDR_INA,INA Stream Line 1 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Stream start address"
|
|
line.long 0x18 "S_LINE2_LEN_INA,INA Stream Line 2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Length of the stream."
|
|
line.long 0x1C "S_CH2_CFG_INA,INA Stream Line 2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifes decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeated loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x20 "S_LINE2_ADDR_INA,INA Stream Line 2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Stream start address"
|
|
group.long 0x144++0x23
|
|
line.long 0x0 "S_LINE0_LEN_INB,INB Stream Line 0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x4 "S_CH0_CFG_INB,INB Stream Line 0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Step count of channel - Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x8 "S_LINE0_ADDR_INB,INB Stream Line 0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Stream start address"
|
|
line.long 0xC "S_LINE1_LEN_INB,INB Stream Line 1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x10 "S_CH1_CFG_INB,INB Stream Line 1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Step count of channel - Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x14 "S_LINE1_ADDR_INB,INB Stream Line 1 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Stream start address"
|
|
line.long 0x18 "S_LINE2_LEN_INB,INB Stream Line 2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x1C "S_CH2_CFG_INB,INB Stream Line 2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Step count of channel - Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x20 "S_LINE2_ADDR_INB,INB Stream Line 2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Stream start address"
|
|
group.long 0x184++0x23
|
|
line.long 0x0 "S_LINE0_LEN_INALPHA,INALPHA Stream Line 0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x4 "S_CH0_CFG_INALPHA,INALPHA Stream 0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x8 "S_LINE0_ADDR_INALPHA,INALPHA Stream Line 0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Stream start address."
|
|
line.long 0xC "S_LINE1_LEN_INALPHA,INALPHA Stream Line 1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x10 "S_CH1_CFG_INALPHA,INALPHA Stream 1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x14 "S_LINE1_ADDR_INALPHA,INALPHA Stream Line 1 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Stream start address."
|
|
line.long 0x18 "S_LINE2_LEN_INALPHA,INALPHA Stream Line 2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x1C "S_CH2_CFG_INALPHA,INALPHA Stream 2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x20 "S_LINE2_ADDR_INALPHA,INALPHA Stream Line 2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Stream start address."
|
|
group.long 0x1C4++0x2F
|
|
line.long 0x0 "S_LINE0_LEN_OUT,Stream OUT 0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of the stream to be outputted."
|
|
line.long 0x4 "S_CH0_CFG_OUT,Stream OUT 0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the output stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "SKIP,Skip count of Channel - Specifies the stride of the stream output channel" "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x8 "S_LINE0_ADDR_OUT,Stream OUT 0 Address Register"
|
|
hexmask.long 0x8 3.--31. 1. "ADDR,Start address of the output stream"
|
|
line.long 0xC "S_LINE1_LEN_OUT,Stream OUT 1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of the stream to be outputted."
|
|
line.long 0x10 "S_CH1_CFG_OUT,Stream OUT 1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the output stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "SKIP,Skip count of Channel - Specifies the stride of the stream output channel" "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x14 "S_LINE1_ADDR_OUT,Stream OUT 1 Address Register"
|
|
hexmask.long 0x14 3.--31. 1. "ADDR,Start address of the output stream"
|
|
line.long 0x18 "S_LINE2_LEN_OUT,Stream OUT 2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Length of the stream to be outputted."
|
|
line.long 0x1C "S_CH2_CFG_OUT,Stream OUT 2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the output stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "SKIP,Skip count of Channel - Specifies the stride of the stream output channel" "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x20 "S_LINE2_ADDR_OUT,Stream OUT 2 Address Register"
|
|
hexmask.long 0x20 3.--31. 1. "ADDR,Start address of the output stream"
|
|
line.long 0x24 "S_LINE3_LEN_OUT,Stream OUT 3 Length Register"
|
|
hexmask.long.word 0x24 0.--15. 1. "LENGTH,Length of the stream to be outputted."
|
|
line.long 0x28 "S_CH3_CFG_OUT,Stream OUT 3 Configuration Register"
|
|
bitfld.long 0x28 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the output stream" "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x28 16.--17. "SKIP,Skip count of Channel - Specifies the stride of the stream output channel" "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x2C "S_LINE3_ADDR_OUT,Stream OUT 3 Address Register"
|
|
hexmask.long 0x2C 3.--31. 1. "ADDR,Start address of the output stream"
|
|
rgroup.long 0x204++0x23
|
|
line.long 0x0 "S_CURR_LINE0_LEN_INA,Current INA Stream Line0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x4 "S_CURR_CH0_CFG_INA,Current INA Stream Channel0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Current boundary width/size on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Current boundary substitution mode used by the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Current repeat value used by the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Current step value used by the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x8 "S_CURR_LINE0_ADDR_INA,Current Stream Line0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Current base address of the stream."
|
|
line.long 0xC "S_CURR_LINE1_LEN_INA,Current INA Stream Line1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Current length of the stream."
|
|
line.long 0x10 "S_CURR_CH1_CFG_INA,Current INA Stream Channel1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Current boundary width/size on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Current boundary substitution mode used by the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Current repeat value used on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Current step value used on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x14 "S_CURR_LINE1_ADDR_INA,Current INA Stream Line1 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Current base address."
|
|
line.long 0x18 "S_CURR_LINE2_LEN_INA,Current INA Stream Line2 Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Current length of the stream."
|
|
line.long 0x1C "S_CURR_CH2_CFG_INA,Current INA Stream Channel2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Current data-type being used on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Current boundary width/size on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Current repeat value used on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Current step value used on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x20 "S_CURR_LINE2_ADDR_INA,Current INA Stream Line2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Current base address."
|
|
rgroup.long 0x244++0x23
|
|
line.long 0x0 "S_CURR_LINE0_LEN_INB,Current INB Stream Line0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x4 "S_CURR_CH0_CFG_INB,Current INB Stream Channel0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Current data-type being used on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Current repeat value on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Current step value on stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x8 "S_CURR_LINE0_ADDR_INB,Current INB Stream Line0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Current base address."
|
|
line.long 0xC "S_CURR_LINE1_LEN_INB,Current INB Stream Line 1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x10 "S_CURR_CH1_CFG_INB,Current INB Stream Channel1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Current data-type being used on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPEAT_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Current repeat value on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Current step value on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel component."
|
|
line.long 0x14 "S_CURR_LINE1_ADDR_INB,Current INB Stream Line 1 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Current base address."
|
|
line.long 0x18 "S_CURR_LINE2_LEN_INB,Current INB Stream Line2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x1C "S_CURR_CH2_CFG_INB,Current INB Stream Channel2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Current repeat value on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Current step value on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x20 "S_CURR_LINE2_ADDR_INB,Current INB Stream Line2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Current base address."
|
|
rgroup.long 0x284++0x23
|
|
line.long 0x0 "S_CURR_LINE0_LEN_INALPHA,Current INALPHA Stream Line0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x4 "S_CURR_CH0_CFG_INALPHA,Current INALPHA Stream Channel0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Current repeat value on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Current step value on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x8 "S_CURR_LINE0_ADDR_INALPHA,Current INALPHA Stream Line0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Current base address"
|
|
line.long 0xC "S_CURR_LINE1_LEN_INALPHA,Current INALPHA Stream Line1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x10 "S_CURR_CH1_CFG_INALPHA,Current INALPHA Stream Channel1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Current repeat value on stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Current step value on stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x14 "S_CURR_LINE1_ADDR_INALPHA,Current INALPHA Stream Line 1 Address register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Current base address."
|
|
line.long 0x18 "S_CURR_LINE2_LEN_INALPHA,Current INALPHA Stream Line2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x1C "S_CURR_CH2_CFG_INALPHA,Current INALPHA Stream Channel2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Current repeat value on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Current step value on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x20 "S_CURR_LINE2_ADDR_INALPHA,Current INALPHA Stream Line2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Current base address"
|
|
rgroup.long 0x2C4++0x2F
|
|
line.long 0x0 "S_CURR_LINE0_LEN_OUT,Current OUT Stream Line0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x4 "S_CURR_CH0_CFG_OUT,Current OUT Stream Channel0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Current datatype on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "SKIP,Current skip value on stream interface." "0,1,2,3"
|
|
line.long 0x8 "S_CURR_LINE0_ADDR_OUT,Current OUT Stream Line0 Address Register"
|
|
hexmask.long 0x8 3.--31. 1. "ADDR,Current start address."
|
|
line.long 0xC "S_CURR_LINE1_LEN_OUT,Current OUT Stream Line1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Current stream length"
|
|
line.long 0x10 "S_CURR_CH1_CFG_OUT,Current OUT Stream Channel1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Current datatype on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "SKIP,Current skip value on the stream interface." "0,1,2,3"
|
|
line.long 0x14 "S_CURR_LINE1_ADDR_OUT,Current OUT Stream Line1 Address Register"
|
|
hexmask.long 0x14 3.--31. 1. "ADDR,Current start address."
|
|
line.long 0x18 "S_CURR_LINE2_LEN_OUT,Current OUT Stream Line2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x1C "S_CURR_CH2_CFG_OUT,Current OUT Stream Channel2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Current datatype on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "SKIP,Current skip value on stream interface." "0,1,2,3"
|
|
line.long 0x20 "S_CURR_LINE2_ADDR_OUT,Current OUT Stream Line2 Address Register"
|
|
hexmask.long 0x20 3.--31. 1. "ADDR,Current start address."
|
|
line.long 0x24 "S_CURR_LINE3_LEN_OUT,Current OUT Stream Line3 Length Register"
|
|
hexmask.long.word 0x24 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x28 "S_CURR_CH3_CFG_OUT,Current OUT Stream Channel3 Configuration Register"
|
|
bitfld.long 0x28 28.--29. "TYPE,Current datatype on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x28 16.--17. "SKIP,Current skip value on the stream interface." "0,1,2,3"
|
|
line.long 0x2C "S_CURR_LINE3_ADDR_OUT,Current OUT Stream Line3 Address Register"
|
|
hexmask.long 0x2C 3.--31. 1. "ADDR,Current start address."
|
|
group.long 0x400++0xF
|
|
line.long 0x0 "DEBUG_MS,Debug Mode and Step Register"
|
|
bitfld.long 0x0 31. "B_FINISH,Break on Finish - Writing 1 in this bit enables breakpoint on finish" "0,1"
|
|
newline
|
|
bitfld.long 0x0 30. "B_WADDR,Break point on Write address - Writing 1 in this bit enables breakpoint on write address" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "B_RADDR,Break point on Read address - Writing 1 in this bit enables breakpoint on read address" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "B_IADDR,Break point on Instruction Fetch - Writing 1 in this bit enables breakpoint on instruction fetch" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "B_POS,Break point on Pixel Position - Writing 1 in this bit enabels breakpoint on pixel position" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "B_YPOS,Break point on Line - Writing 1 in this bit enabels breakpoint on line" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "B_XPOS,Break point on Pixel Number - Writing 1 in this bit enabels breakpoint on pixel number" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--19. 1. "STEP,Step Size - This field is used for specifying the step size of IPUS module when in debug mode."
|
|
newline
|
|
bitfld.long 0x0 1. "CTI_EN,Cross-triggerring enable" "0: Disable cross-triggering with CTI.,1: Enable cross-triggering with CTI."
|
|
newline
|
|
bitfld.long 0x0 0. "DBG_ACT,Activate Debug Mode - Writing 1 in this bit makes the IPUS module to enter debug mode." "0,1"
|
|
line.long 0x4 "DEBUG_BKPT_STAT,Debug Breakpoint Status Register"
|
|
bitfld.long 0x4 25. "STEP_REQ,STEP Request - Writing 1 to this bit provides a step request to the IPUS core" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "FINISH,Breakpoint on finish status" "0: Breakpoint on finish not occurred.,1: Breakpoint on finish occurred."
|
|
newline
|
|
bitfld.long 0x4 22. "WADDR,Breakpoint on write status" "0: Breakpoint on write not occurred.,1: Breakpoint on write occurred."
|
|
newline
|
|
bitfld.long 0x4 21. "RADDR,Breakpoint on read status" "0: Breakpoint on read not occurred.,1: Breakpoint on read occurred."
|
|
newline
|
|
bitfld.long 0x4 20. "IADDR,Instruction fetch breakpoint status" "0: Instruction fetch breakpoint not occurred.,1: Instruction fetch breakpoint occurred."
|
|
newline
|
|
bitfld.long 0x4 19. "POS,Position breakpoint status" "0: Position breakpoint not occurred.,1: Position breakpoint occurred."
|
|
newline
|
|
bitfld.long 0x4 18. "YPOS,YPOS breakpoint status" "0: YPOS breakpoint not occurred.,1: YPOS breakpoint occurred."
|
|
newline
|
|
bitfld.long 0x4 17. "XPOS,XPOS breakpoint status" "0: Breakpoint XPOS not occurred.,1: Breakpoint XPOS occurred."
|
|
newline
|
|
bitfld.long 0x4 16. "DBG,Debug mode status: This bit provides the debug status of IPUS core" "0: In execution mode. (Instruction execution..,1: In debug mode. (Instruction execution stalled)"
|
|
newline
|
|
rbitfld.long 0x4 0. "H_DBG,This register provides the status of debug mode acknowledgement upon hardware debug request" "0: In execution mode (No hardware debug request..,1: In debug upon assertion debug request signal."
|
|
line.long 0x8 "DEBUG_BKPT_POS,Debug Breakpoint Position Register"
|
|
hexmask.long.word 0x8 16.--31. 1. "XPOS,Horizontal Pixel position - Specifies the horizontal pixel position for XPOS or POS breakpoint."
|
|
newline
|
|
hexmask.long.word 0x8 0.--15. 1. "YPOS,Vertical Pixel position - Specifies the vertical position (i"
|
|
line.long 0xC "DEBUG_BKPT_ADDR,Debug Breakpoint Address Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. "IADDR,Instruction fetch address - This field holds the instruction address where instruction fetch breakpoint should occur"
|
|
newline
|
|
hexmask.long.byte 0xC 16.--23. 1. "DRADDR,Data read address - This field holds the data address of the register bank from where when reads happens triggers breakpoint on read"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--15. 1. "DWADDR,Data Write address - This field holds the data address of the register bank to where when write happens triggers breakpoint on write"
|
|
rgroup.long 0x414++0x3
|
|
line.long 0x0 "DEBUG_CORE_STAT,Debug Core Status Register"
|
|
bitfld.long 0x0 27. "N,Status of scalar negative flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "Z,Status of scalar zero flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "C,Status of scalar carry flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "OV,Status of scalar overflow flag." "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "PC,This field holds the value of the program counter"
|
|
group.long 0x500++0x7
|
|
line.long 0x0 "PMONITOR_CTRL,Performance Monitor Control Register."
|
|
bitfld.long 0x0 20. "INIT_EX_CNT,This bit is used for clear the execution cycle counter" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "INIT_S_DH,This bit is used for clear the stall counter on data hazards" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "INIT_S_SINOUT,This bit is used for clear the stall counter on stream-in 'and' stream-out interface" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "INIT_S_SOUT,This bit is used for clear the stall counter on stream-out interface" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "INIT_S_SIN,This bit is used for clear the stall counter on stream-in interface" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "STOP_EX_CNT,This bit provides a secondary override for disabling the execution cycle counter." "0: Execution cycle counter is defreezed from..,1: Execution cycle counter is freezed from counting."
|
|
newline
|
|
bitfld.long 0x0 11. "STOP_S_DH,This bit provides a secondary override for disabling the stall counter on data hazard interface." "0: Stall counter on data hazard is defreezed from..,1: Stall counter on data hazard is freezed from.."
|
|
newline
|
|
bitfld.long 0x0 10. "STOP_S_SINOUT,This bit provides a secondary override for disabling the stall counter on stream-in and stream-out interface" "0: tall counter on stream-in 'and' stream-out is..,1: Stall counter on stream-in 'and' stream-out is.."
|
|
newline
|
|
bitfld.long 0x0 9. "STOP_S_SOUT,This bit provides a secondary override for disabling the stall counter on stream-out interface." "0: Stall counter on stream-in is defreezed from..,1: Stall counter on stream-out is freezed from.."
|
|
newline
|
|
bitfld.long 0x0 8. "STOP_S_SIN,This bit provides a secondary override for disabling the stall counter on stream-in interface." "0: Stall counter is defreezed from counting.,1: Stall counter on stream-in is freezed from.."
|
|
newline
|
|
bitfld.long 0x0 4. "EN_EX_CNT,This bit controls the execution cycle counter." "0: Execution counter is inactive. Counter does not..,1: Execution counter is enabled. Counter counts the.."
|
|
newline
|
|
bitfld.long 0x0 3. "EN_S_DH,This bit controls the stall counter that monitors the stalls due to data hazards in the pipeline." "0: Stall counter on stalls due to data hazard is..,1: Stall counter on stalls due to data hazard is.."
|
|
newline
|
|
bitfld.long 0x0 2. "EN_S_SINOUT,This bit controls the stall counter that monitor both stream-in and stream-out stalls occurring in same clock cycle" "0: Stall counter on stream-in and stream-out stalls..,1: Stall counter on stream-in and stream-out stalls.."
|
|
newline
|
|
bitfld.long 0x0 1. "EN_S_SOUT,This bit controls the stall counter on stream-out interface." "0: Stall counter on stream-out stalls is inactive.,1: Stall counter on stream-out stalls is enabled."
|
|
newline
|
|
bitfld.long 0x0 0. "EN_S_SIN,This bit controls the stall counter on stream-in interface." "0: Stall counter on stream-in stalls is inactive.,1: Stall counter on stream-in stalls is enabled."
|
|
line.long 0x4 "PMONITOR_SAMPLE,Performance Monitor Sample Register"
|
|
bitfld.long 0x4 4. "SAMPLE_EX_CNT,Sample execution counter" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "SAMPLE_S_DH,Sample stall counter on data hazard" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "SAMPLE_S_SINOUT,Sample stall counter on stream-in 'and' stream-out interface" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "SAMPLE_S_SOUT,Sample stall counter on stream-out interface" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "SAMPLE_S_SIN,Sample stall counter on stream-in interface" "0,1"
|
|
rgroup.long 0x508++0x13
|
|
line.long 0x0 "STALL_STREAMIN,Stream-in Stall Counter"
|
|
hexmask.long 0x0 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0x4 "STALL_STREAMOUT,Stream-out Stall Counter"
|
|
hexmask.long 0x4 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0x8 "STALL_STREAMINOUT,Stream-in and Stream-out Stall Counter"
|
|
hexmask.long 0x8 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0xC "STALL_DATAHAZARD,Data Hazard Stall Counter"
|
|
hexmask.long 0xC 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0x10 "EXEC_COUNTER,Execution Cycle Counter"
|
|
hexmask.long 0x10 0.--31. 1. "CYCLES,Number of execution cycles."
|
|
group.long 0x580++0xF
|
|
line.long 0x0 "IMEM_ERROR_INJECT_ADDR,Instruction Memory Error Injection Address"
|
|
hexmask.long.byte 0x0 0.--5. 1. "ADDR,Instruction memory address for error injection."
|
|
line.long 0x4 "IMEM_ERROR_VECTOR0,Instruction Memory Error Low Vector"
|
|
hexmask.long 0x4 0.--31. 1. "ERR_VEC0,Lower 32-bits of error vector."
|
|
line.long 0x8 "IMEM_ERROR_VECTOR1,Instruction Memory Error High Vector"
|
|
bitfld.long 0x8 31. "ERR_EN,Error injection enable" "0: No error is injected.,1: Error is injected. ECC syndrome and SEC-DED.."
|
|
newline
|
|
hexmask.long.byte 0x8 0.--6. 1. "ERR_VEC1,Higher 7-bits of error vector."
|
|
line.long 0xC "IMEM_ERROR_INJECT_STAT,Instruction Memory Error Inject Status Register"
|
|
bitfld.long 0xC 31. "LOC_ACC,This field provides the status of the location of instruction memory at which error is injected was accessed by IPUS core" "0: Instruction memory location was not accessed.,1: Instruction memory location was accessed and.."
|
|
newline
|
|
hexmask.long.byte 0xC 8.--14. 1. "SYNDROME,7-bit syndrome found when error was injected."
|
|
newline
|
|
rbitfld.long 0xC 1. "DED,Double bit error was detected." "0,1"
|
|
newline
|
|
rbitfld.long 0xC 0. "SEC,Single bit error was detected and corrected." "0,1"
|
|
group.long 0x600++0x3
|
|
line.long 0x0 "RESET_REG,Reset Register"
|
|
bitfld.long 0x0 1. "HARD_RESET,Writing 1 to this field provides a hard reset to the IPUS module" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SOFT_RESET,Writing 1 to this field provides a soft reset to the IPUS module" "0,1"
|
|
tree.end
|
|
tree "IPUS_4"
|
|
base ad:0x7C046000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "HOST_START,Command and Start Register"
|
|
hexmask.long.byte 0x0 16.--23. 1. "CSA,This field provides as a status the start address for the ongoing line processing."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "NSA,This field provides the address location in IRAM from where the processing of the next line starts"
|
|
line.long 0x4 "HOST_STATUS,Core Status Register"
|
|
hexmask.long.word 0x4 16.--31. 1. "REMAIN_PIXELS,Indicates the number of the pixels remaining to be processed"
|
|
newline
|
|
rbitfld.long 0x4 10. "DEBUG_STATUS,This field provides the debug status of the IPUS core." "0: In execution mode,1: In debug mode"
|
|
newline
|
|
rbitfld.long 0x4 8.--9. "CORE_STATUS,This field indicates the IPUS core status and number of triggers that has been bufferred." "0: Idle,1: Running single command.,?,?"
|
|
newline
|
|
bitfld.long 0x4 0.--1. "N_EVENTS,This fields reflects the value of the event counter" "0,1,2,3"
|
|
line.long 0x8 "HOST_POS,Position Configuration Register"
|
|
hexmask.long.word 0x8 16.--31. 1. "XPOS,This field indicates the horizontal position of the next line."
|
|
newline
|
|
hexmask.long.word 0x8 0.--15. 1. "YPOS,This field indicates the line number of the next line to be processed."
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x0 "HOST_CURRPOS,Current Position Status Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "CURR_XPOS,Provides the horizontal pixel position (XPOS) for the currently processed line."
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "CURR_YPOS,Provides the status the line number of the currently processed line."
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "HOST_XCFG,Line Width and Step Configuration Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "XSIZE,This field provides the width in terms of number of pixel componenets of the next line to be processed"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "XSTEP,This field provides the next incremental step for the XPOS register" "0: XPOS increment step is 4,1: XPOS increment step is 1,?,?"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "HOST_CURRXCFG,Current Line Width and Step Status Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "CURR_XSIZE,This field provides the width of the pixel component line being currently processed."
|
|
newline
|
|
bitfld.long 0x0 0.--1. "CURR_XSTEP,This field indicates the current XSTEP being used for processing." "0: XPOS increment step is 4,1: XPOS increment step is 1,?,?"
|
|
group.long 0x18++0xF
|
|
line.long 0x0 "HOST_INACFG,INA Matrix Configuration Register"
|
|
rbitfld.long 0x0 26. "CURR_EN_LINE2,Enable status for third row vector in 3x3 neighbourhood mode of INA matrix for the current line being processsed" "0: Third row-vector for currently line processed is..,1: Third row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x0 25. "CURR_EN_LINE1,Enable status for second row vector in 3x3 neighbourhood mode of INA matrix for the current line being processsed" "0: Second row-vector for currently line processed..,1: Second row-vector for currently line processed.."
|
|
newline
|
|
rbitfld.long 0x0 24. "CURR_EN_LINE0,Enable status for first row vector in 3x3 neighbourhood mode or complete row-vector in 1x9 neighbourhood mode of INA matrix for the current line being processsed" "0: First row-vector for currently line processed is..,1: First row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x0 18. "CURR_NHOOD,This field provides the current neighbourhood position of the elements in INA matrix being used in execution" "0: For the ongoing execution INA Matrix is in 3x3..,1: For the ongoing execution INA Matrix is in 1x9.."
|
|
newline
|
|
rbitfld.long 0x0 16.--17. "CURR_SHIFT,This field indicates the value currently being used for shifting each 1x3 row-vector or one 1x9 row-vector in INA matrix" "?,1: Row-vector of INA matrix will be shifted by 1.,?,?"
|
|
newline
|
|
bitfld.long 0x0 10. "EN_LINE2,This field enables the third row-vector of INA matrix for next line to be processed" "0: Disable the third 1x3 row vector of INA matrix..,1: Enable the third 1x3 row vector of INA matrix.."
|
|
newline
|
|
bitfld.long 0x0 9. "EN_LINE1,This field enables the second row-vector of INA matrix for next line to be processed" "0: Disable the second 1x3 row vector of INA matrix..,1: Enable the second 1x3 row vector of INA matrix.."
|
|
newline
|
|
bitfld.long 0x0 8. "EN_LINE0,This field enables the first row-vector of INA matrix for next line to be processed" "0: Disable first 1x3 row vector or 1x9 row vector..,1: Enable the first 1x3 row vector or 1x9 row.."
|
|
newline
|
|
bitfld.long 0x0 2. "NHOOD,This field provides the neighbourhood position of the elements in INA matrix" "0: INA Matrix is in 3x3 neighbourhood mode.,1: INA Matrix is in 1x9 neighbourhood mode."
|
|
newline
|
|
rbitfld.long 0x0 0.--1. "SHIFT,This field indicates the value by which each 1x3 row-vector or one 1x9 row-vector in INA matrix will be shifted when execution for the next line begins" "?,1: For next line processing shift the row vector of..,?,?"
|
|
line.long 0x4 "HOST_INBCFG,INB Matrix Configuration Register"
|
|
rbitfld.long 0x4 26. "CURR_EN_LINE2,Enable status for third row vector in 3x3 neighbourhood mode of INB matrix for the current line being processsed" "0: Third row-vector for currently line processed is..,1: Third row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x4 25. "CURR_EN_LINE1,Enable status for second row vector in 3x3 neighbourhood mode of INB matrix for the current line being processsed" "0: Second row-vector for currently line processed..,1: Second row-vector for currently line processed.."
|
|
newline
|
|
rbitfld.long 0x4 24. "CURR_EN_LINE0,Enable status for first row vector in 3x3 neighbourhood mode or complete row-vector in 1x9 neighbourhood mode of INB matrix for the current line being processsed" "0: First row-vector for currently line processed is..,1: First row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x4 18. "CURR_NHOOD,This field provides the neighbourhood position of the elements in INB matrix" "0: For the ongoing execution INB Matrix is in 3x3..,1: For the ongoing execution INB Matrix is in 1x9.."
|
|
newline
|
|
rbitfld.long 0x4 16.--17. "CURR_SHIFT,This field indicates the value currently being used for shifting each 1x3 row-vector or one 1x9 row-vector in INB matrix" "?,1: Row-vector of INA matrix will be shifted by 1.,?,?"
|
|
newline
|
|
bitfld.long 0x4 10. "EN_LINE2,This field enables the third row-vector of INB matrix for next line to be processed" "0: Disable the third 1x3 row vector of INB matrix..,1: Enable the third 1x3 row vector of INB matrix.."
|
|
newline
|
|
bitfld.long 0x4 9. "EN_LINE1,This field enables the second row-vector of INB matrix for next line to be processed" "0: Disable the second 1x3 row vector of INB matrix..,1: Enable the second 1x3 row vector of INB matrix.."
|
|
newline
|
|
bitfld.long 0x4 8. "EN_LINE0,This field enables the first row-vector of INB matrix for next line to be processed" "0: Disable first 1x3 row vector or 1x9 row vector..,1: Enable the first 1x3 row vector or 1x9 row.."
|
|
newline
|
|
bitfld.long 0x4 2. "NHOOD,This field provides the neighbourhood position of the elements in INB matrix" "0: INB Matrix is in 3x3 neighbourhood mode.,1: INB Matrix is in 1x9 neighbourhood mode."
|
|
newline
|
|
rbitfld.long 0x4 0.--1. "SHIFT,This field indicates the value by which each 1x3 row-vector or one 1x9 row-vector in INB matrix will be shifted when execution for the next line begins" "?,1: For next line processing shift the row vector of..,?,?"
|
|
line.long 0x8 "HOST_INALPHACFG,INALPHA Configuration Register"
|
|
rbitfld.long 0x8 26. "CURR_EN_LINE2,Enable status for third row vector in 3x3 neighbourhood mode of INALPHA matrix for the current line being processsed" "0: Third row-vector for currently line processed is..,1: Third row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x8 25. "CURR_EN_LINE1,Enable status for second row vector in 3x3 neighbourhood mode of INALPHA matrix for the current line being processsed" "0: Second row-vector for currently line processed..,1: Second row-vector for currently line processed.."
|
|
newline
|
|
rbitfld.long 0x8 24. "CURR_EN_LINE0,Enable status for first row vector in 3x3 neighbourhood mode or complete row-vector in 1x9 neighbourhood mode of INALPHA matrix for the current line being processsed" "0: First row-vector for currently line processed is..,1: First row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x8 18. "CURR_NHOOD,This field provides the current neighbourhood position of the elements in INALPHA matrix" "0: For the ongoing execution INALPHA Matrix is in..,1: For the ongoing execution INALPHA Matrix is in.."
|
|
newline
|
|
rbitfld.long 0x8 16.--17. "CURR_SHIFT,This field indicates the value currently being used for shifting each 1x3 row-vector or one 1x9 row-vector in INALPHA matrix" "?,1: Row-vector of INA matrix will be shifted by 1.,?,?"
|
|
newline
|
|
bitfld.long 0x8 10. "EN_LINE2,This field enables the third row-vector of INALPHA matrix for next line to be processed" "0: Disable the third 1x3 row vector of INALPHA..,1: Enable the third 1x3 row vector of INALPHA.."
|
|
newline
|
|
bitfld.long 0x8 9. "EN_LINE1,This field enables the second row-vector of INALPHA matrix for next line to be processed" "0: Disable the second 1x3 row vector of INALPHA..,1: Enable the second 1x3 row vector of INALPHA.."
|
|
newline
|
|
bitfld.long 0x8 8. "EN_LINE0,This field enables the first row-vector of INALPHA matrix for next line to be processed" "0: Disable first 1x3 row vector or 1x9 row vector..,1: Enable the first 1x3 row vector or 1x9 row.."
|
|
newline
|
|
bitfld.long 0x8 2. "NHOOD,This field provides the neighbourhood position of the elements in INALPHA matrix" "0: INALPHA Matrix is in 3x3 neighbourhood mode.,1: INALPHA matrix is in 1x9 neighbourhood mode."
|
|
newline
|
|
rbitfld.long 0x8 0.--1. "SHIFT,This field indicates the value by which each 1x3 row-vector or one 1x9 row-vector in INALPHA matrix will be shifted when execution for the next line begins" "?,1: For next line processing shift the row vector of..,?,?"
|
|
line.long 0xC "HOST_OUTCFG,OUT Matrix Configuration Register"
|
|
rbitfld.long 0xC 27. "CURR_EN_OUT3,This field indicates the status of the stream-out channel corresponding to OUT3 element for the current line processing" "0: OUT3 stream-out interface is disabled.,1: OUT3 stream-out interface is enabled."
|
|
newline
|
|
rbitfld.long 0xC 26. "CURR_EN_OUT2,This field indicates the status of the stream-out channel corresponding to OUT2 element for the current line processing" "0: OUT2 stream-out interface is disabled.,1: OUT2 stream-out interface is enabled."
|
|
newline
|
|
rbitfld.long 0xC 25. "CURR_EN_OUT1,This field indicates the status of the stream-out channel corresponding to OUT1 element for the current line processing" "0: OUT1 stream-out interface is disabled.,1: OUT1 stream-out interface is enabled."
|
|
newline
|
|
rbitfld.long 0xC 24. "CURR_EN_OUT0,This field indicates the status of the stream-out channel corresponding to OUT0 element for the current line processing" "0: OUT0 stream-out interface is disabled.,1: OUT0 stream-out interface is enabled."
|
|
newline
|
|
bitfld.long 0xC 11. "EN_OUT3,Enables the stream-out channel corresponding to OUT3 element of OUT matrix for processing the next line" "0: OUT3 stream-out channel is disabled.,1: OUT3 stream-out channel is enabled."
|
|
newline
|
|
bitfld.long 0xC 10. "EN_OUT2,Enables the stream-out channel corresponding to OUT2 element of OUT matrix for processing the next line" "0: OUT2 stream-out channel is disabled.,1: OUT2 stream-out channel is enabled."
|
|
newline
|
|
bitfld.long 0xC 9. "EN_OUT1,Enables the stream-out channel corresponding to OUT1 element of OUT matrix for processing the next line" "0: OUT1 stream-out channel is disabled.,1: OUT1 stream-out channel is enabled."
|
|
newline
|
|
bitfld.long 0xC 8. "EN_OUT0,Enables the stream-out channel corresponding to OUT0 element of OUT matrix for processing the next line" "0: OUT0 stream-out channel is disabled.,1: OUT0 stream-out channel is enabled."
|
|
group.long 0x40++0x17
|
|
line.long 0x0 "HOST_IMEMA,Instruction Memory Address Register"
|
|
hexmask.long.byte 0x0 0.--5. 1. "IADDR,Pointer into IRAM - This field provides an address pointer to a location of IRAM."
|
|
line.long 0x4 "HOST_IMEMD,Instruction Memory Data Register"
|
|
hexmask.long 0x4 0.--31. 1. "DATA,Read/Write data of IRAM - This field specifies data to be read/written from/into IRAM"
|
|
line.long 0x8 "HOST_DREGA,Data Register-Bank Address Register"
|
|
hexmask.long.byte 0x8 0.--7. 1. "DMEMA,Data memory address pointer - This field provides the pointer to core register bank of the IPUS module"
|
|
line.long 0xC "HOST_DREGD,Data Register-Bank Datum Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "DMEMD,Read/Write data of SGPRs - This field specifies data to be read or written from/into SGPRs"
|
|
line.long 0x10 "HOST_HISTA,Histogram Memory Address Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. "HISTA,Pointer into Histogram memory - This field provides an address pointer to a location of Histogram memory"
|
|
line.long 0x14 "HOST_HISTD,Histogram Memory Data Register"
|
|
hexmask.long 0x14 0.--31. 1. "HISTD,Read data from Histogram memory - This field specifies data to be read from histogram memory"
|
|
rgroup.long 0x58++0x7
|
|
line.long 0x0 "HOST_HISTPEAK,Histogram Peak Value Register"
|
|
hexmask.long 0x0 0.--31. 1. "HISTPEAK,Peak value - Reads to this register provides the maximum value to the histogram engine"
|
|
line.long 0x4 "HOST_HISTAMAX,Histogram Maximum Value Address Register"
|
|
hexmask.long.byte 0x4 0.--7. 1. "HISTAMAX,Address - Reads to this register provides the address location (bin address) of the maximum value to the histogram engine"
|
|
group.long 0x60++0xF
|
|
line.long 0x0 "HOST_HISTCLEAR,Histogram Clear Register"
|
|
hexmask.long 0x0 0.--31. 1. "HISTCLEAR,Writes to this register with any value clears the histogram memory and re-initialize the histogram engine"
|
|
line.long 0x4 "HOST_STATA,Statistics Memory Address Register"
|
|
hexmask.long.word 0x4 0.--9. 1. "STATA,Pointer into statistics memory - This field provides an address pointer to a location of statistics memory"
|
|
line.long 0x8 "HOST_STATD,Statistics Memory Data Register"
|
|
hexmask.long 0x8 0.--31. 1. "STATD,Statistics memory data - This field specifies data to be read or written from/to statistics memory"
|
|
line.long 0xC "HOST_STATCLEAR,Statistics Memory Clear Register"
|
|
hexmask.long 0xC 0.--31. 1. "STATCLEAR,Writes to this register with any value clears the statistical memory and re-initialize the statistical engine"
|
|
group.long 0x78++0x7
|
|
line.long 0x0 "HOST_LUTA,LUT Memory Address Register"
|
|
hexmask.long.word 0x0 0.--11. 1. "LUTA,Pointer into LUT memory - This field provides an address pointer to a location of LUT memory."
|
|
line.long 0x4 "HOST_LUTD,LUT Memory Data Register"
|
|
hexmask.long 0x4 0.--31. 1. "LUTD,LUT memory data - This field specifies data to be read or written from/to LUT memory"
|
|
group.long 0x104++0x23
|
|
line.long 0x0 "S_LINE0_LEN_INA,INA Stream Line 0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of the stream."
|
|
line.long 0x4 "S_CH0_CFG_INA,INA Stream Line 0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifes decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x8 "S_LINE0_ADDR_INA,INA Stream Line 0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Stream start address"
|
|
line.long 0xC "S_LINE1_LEN_INA,INA Stream Line 1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of the stream."
|
|
line.long 0x10 "S_CH1_CFG_INA,INA Stream Line 1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifes decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeated loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x14 "S_LINE1_ADDR_INA,INA Stream Line 1 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Stream start address"
|
|
line.long 0x18 "S_LINE2_LEN_INA,INA Stream Line 2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Length of the stream."
|
|
line.long 0x1C "S_CH2_CFG_INA,INA Stream Line 2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifes decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeated loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x20 "S_LINE2_ADDR_INA,INA Stream Line 2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Stream start address"
|
|
group.long 0x144++0x23
|
|
line.long 0x0 "S_LINE0_LEN_INB,INB Stream Line 0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x4 "S_CH0_CFG_INB,INB Stream Line 0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Step count of channel - Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x8 "S_LINE0_ADDR_INB,INB Stream Line 0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Stream start address"
|
|
line.long 0xC "S_LINE1_LEN_INB,INB Stream Line 1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x10 "S_CH1_CFG_INB,INB Stream Line 1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Step count of channel - Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x14 "S_LINE1_ADDR_INB,INB Stream Line 1 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Stream start address"
|
|
line.long 0x18 "S_LINE2_LEN_INB,INB Stream Line 2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x1C "S_CH2_CFG_INB,INB Stream Line 2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Step count of channel - Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x20 "S_LINE2_ADDR_INB,INB Stream Line 2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Stream start address"
|
|
group.long 0x184++0x23
|
|
line.long 0x0 "S_LINE0_LEN_INALPHA,INALPHA Stream Line 0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x4 "S_CH0_CFG_INALPHA,INALPHA Stream 0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x8 "S_LINE0_ADDR_INALPHA,INALPHA Stream Line 0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Stream start address."
|
|
line.long 0xC "S_LINE1_LEN_INALPHA,INALPHA Stream Line 1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x10 "S_CH1_CFG_INALPHA,INALPHA Stream 1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x14 "S_LINE1_ADDR_INALPHA,INALPHA Stream Line 1 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Stream start address."
|
|
line.long 0x18 "S_LINE2_LEN_INALPHA,INALPHA Stream Line 2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x1C "S_CH2_CFG_INALPHA,INALPHA Stream 2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x20 "S_LINE2_ADDR_INALPHA,INALPHA Stream Line 2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Stream start address."
|
|
group.long 0x1C4++0x2F
|
|
line.long 0x0 "S_LINE0_LEN_OUT,Stream OUT 0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of the stream to be outputted."
|
|
line.long 0x4 "S_CH0_CFG_OUT,Stream OUT 0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the output stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "SKIP,Skip count of Channel - Specifies the stride of the stream output channel" "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x8 "S_LINE0_ADDR_OUT,Stream OUT 0 Address Register"
|
|
hexmask.long 0x8 3.--31. 1. "ADDR,Start address of the output stream"
|
|
line.long 0xC "S_LINE1_LEN_OUT,Stream OUT 1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of the stream to be outputted."
|
|
line.long 0x10 "S_CH1_CFG_OUT,Stream OUT 1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the output stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "SKIP,Skip count of Channel - Specifies the stride of the stream output channel" "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x14 "S_LINE1_ADDR_OUT,Stream OUT 1 Address Register"
|
|
hexmask.long 0x14 3.--31. 1. "ADDR,Start address of the output stream"
|
|
line.long 0x18 "S_LINE2_LEN_OUT,Stream OUT 2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Length of the stream to be outputted."
|
|
line.long 0x1C "S_CH2_CFG_OUT,Stream OUT 2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the output stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "SKIP,Skip count of Channel - Specifies the stride of the stream output channel" "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x20 "S_LINE2_ADDR_OUT,Stream OUT 2 Address Register"
|
|
hexmask.long 0x20 3.--31. 1. "ADDR,Start address of the output stream"
|
|
line.long 0x24 "S_LINE3_LEN_OUT,Stream OUT 3 Length Register"
|
|
hexmask.long.word 0x24 0.--15. 1. "LENGTH,Length of the stream to be outputted."
|
|
line.long 0x28 "S_CH3_CFG_OUT,Stream OUT 3 Configuration Register"
|
|
bitfld.long 0x28 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the output stream" "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x28 16.--17. "SKIP,Skip count of Channel - Specifies the stride of the stream output channel" "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x2C "S_LINE3_ADDR_OUT,Stream OUT 3 Address Register"
|
|
hexmask.long 0x2C 3.--31. 1. "ADDR,Start address of the output stream"
|
|
rgroup.long 0x204++0x23
|
|
line.long 0x0 "S_CURR_LINE0_LEN_INA,Current INA Stream Line0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x4 "S_CURR_CH0_CFG_INA,Current INA Stream Channel0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Current boundary width/size on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Current boundary substitution mode used by the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Current repeat value used by the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Current step value used by the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x8 "S_CURR_LINE0_ADDR_INA,Current Stream Line0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Current base address of the stream."
|
|
line.long 0xC "S_CURR_LINE1_LEN_INA,Current INA Stream Line1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Current length of the stream."
|
|
line.long 0x10 "S_CURR_CH1_CFG_INA,Current INA Stream Channel1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Current boundary width/size on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Current boundary substitution mode used by the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Current repeat value used on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Current step value used on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x14 "S_CURR_LINE1_ADDR_INA,Current INA Stream Line1 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Current base address."
|
|
line.long 0x18 "S_CURR_LINE2_LEN_INA,Current INA Stream Line2 Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Current length of the stream."
|
|
line.long 0x1C "S_CURR_CH2_CFG_INA,Current INA Stream Channel2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Current data-type being used on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Current boundary width/size on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Current repeat value used on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Current step value used on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x20 "S_CURR_LINE2_ADDR_INA,Current INA Stream Line2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Current base address."
|
|
rgroup.long 0x244++0x23
|
|
line.long 0x0 "S_CURR_LINE0_LEN_INB,Current INB Stream Line0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x4 "S_CURR_CH0_CFG_INB,Current INB Stream Channel0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Current data-type being used on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Current repeat value on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Current step value on stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x8 "S_CURR_LINE0_ADDR_INB,Current INB Stream Line0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Current base address."
|
|
line.long 0xC "S_CURR_LINE1_LEN_INB,Current INB Stream Line 1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x10 "S_CURR_CH1_CFG_INB,Current INB Stream Channel1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Current data-type being used on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPEAT_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Current repeat value on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Current step value on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel component."
|
|
line.long 0x14 "S_CURR_LINE1_ADDR_INB,Current INB Stream Line 1 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Current base address."
|
|
line.long 0x18 "S_CURR_LINE2_LEN_INB,Current INB Stream Line2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x1C "S_CURR_CH2_CFG_INB,Current INB Stream Channel2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Current repeat value on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Current step value on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x20 "S_CURR_LINE2_ADDR_INB,Current INB Stream Line2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Current base address."
|
|
rgroup.long 0x284++0x23
|
|
line.long 0x0 "S_CURR_LINE0_LEN_INALPHA,Current INALPHA Stream Line0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x4 "S_CURR_CH0_CFG_INALPHA,Current INALPHA Stream Channel0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Current repeat value on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Current step value on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x8 "S_CURR_LINE0_ADDR_INALPHA,Current INALPHA Stream Line0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Current base address"
|
|
line.long 0xC "S_CURR_LINE1_LEN_INALPHA,Current INALPHA Stream Line1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x10 "S_CURR_CH1_CFG_INALPHA,Current INALPHA Stream Channel1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Current repeat value on stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Current step value on stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x14 "S_CURR_LINE1_ADDR_INALPHA,Current INALPHA Stream Line 1 Address register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Current base address."
|
|
line.long 0x18 "S_CURR_LINE2_LEN_INALPHA,Current INALPHA Stream Line2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x1C "S_CURR_CH2_CFG_INALPHA,Current INALPHA Stream Channel2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Current repeat value on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Current step value on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x20 "S_CURR_LINE2_ADDR_INALPHA,Current INALPHA Stream Line2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Current base address"
|
|
rgroup.long 0x2C4++0x2F
|
|
line.long 0x0 "S_CURR_LINE0_LEN_OUT,Current OUT Stream Line0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x4 "S_CURR_CH0_CFG_OUT,Current OUT Stream Channel0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Current datatype on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "SKIP,Current skip value on stream interface." "0,1,2,3"
|
|
line.long 0x8 "S_CURR_LINE0_ADDR_OUT,Current OUT Stream Line0 Address Register"
|
|
hexmask.long 0x8 3.--31. 1. "ADDR,Current start address."
|
|
line.long 0xC "S_CURR_LINE1_LEN_OUT,Current OUT Stream Line1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Current stream length"
|
|
line.long 0x10 "S_CURR_CH1_CFG_OUT,Current OUT Stream Channel1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Current datatype on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "SKIP,Current skip value on the stream interface." "0,1,2,3"
|
|
line.long 0x14 "S_CURR_LINE1_ADDR_OUT,Current OUT Stream Line1 Address Register"
|
|
hexmask.long 0x14 3.--31. 1. "ADDR,Current start address."
|
|
line.long 0x18 "S_CURR_LINE2_LEN_OUT,Current OUT Stream Line2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x1C "S_CURR_CH2_CFG_OUT,Current OUT Stream Channel2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Current datatype on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "SKIP,Current skip value on stream interface." "0,1,2,3"
|
|
line.long 0x20 "S_CURR_LINE2_ADDR_OUT,Current OUT Stream Line2 Address Register"
|
|
hexmask.long 0x20 3.--31. 1. "ADDR,Current start address."
|
|
line.long 0x24 "S_CURR_LINE3_LEN_OUT,Current OUT Stream Line3 Length Register"
|
|
hexmask.long.word 0x24 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x28 "S_CURR_CH3_CFG_OUT,Current OUT Stream Channel3 Configuration Register"
|
|
bitfld.long 0x28 28.--29. "TYPE,Current datatype on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x28 16.--17. "SKIP,Current skip value on the stream interface." "0,1,2,3"
|
|
line.long 0x2C "S_CURR_LINE3_ADDR_OUT,Current OUT Stream Line3 Address Register"
|
|
hexmask.long 0x2C 3.--31. 1. "ADDR,Current start address."
|
|
group.long 0x400++0xF
|
|
line.long 0x0 "DEBUG_MS,Debug Mode and Step Register"
|
|
bitfld.long 0x0 31. "B_FINISH,Break on Finish - Writing 1 in this bit enables breakpoint on finish" "0,1"
|
|
newline
|
|
bitfld.long 0x0 30. "B_WADDR,Break point on Write address - Writing 1 in this bit enables breakpoint on write address" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "B_RADDR,Break point on Read address - Writing 1 in this bit enables breakpoint on read address" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "B_IADDR,Break point on Instruction Fetch - Writing 1 in this bit enables breakpoint on instruction fetch" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "B_POS,Break point on Pixel Position - Writing 1 in this bit enabels breakpoint on pixel position" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "B_YPOS,Break point on Line - Writing 1 in this bit enabels breakpoint on line" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "B_XPOS,Break point on Pixel Number - Writing 1 in this bit enabels breakpoint on pixel number" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--19. 1. "STEP,Step Size - This field is used for specifying the step size of IPUS module when in debug mode."
|
|
newline
|
|
bitfld.long 0x0 1. "CTI_EN,Cross-triggerring enable" "0: Disable cross-triggering with CTI.,1: Enable cross-triggering with CTI."
|
|
newline
|
|
bitfld.long 0x0 0. "DBG_ACT,Activate Debug Mode - Writing 1 in this bit makes the IPUS module to enter debug mode." "0,1"
|
|
line.long 0x4 "DEBUG_BKPT_STAT,Debug Breakpoint Status Register"
|
|
bitfld.long 0x4 25. "STEP_REQ,STEP Request - Writing 1 to this bit provides a step request to the IPUS core" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "FINISH,Breakpoint on finish status" "0: Breakpoint on finish not occurred.,1: Breakpoint on finish occurred."
|
|
newline
|
|
bitfld.long 0x4 22. "WADDR,Breakpoint on write status" "0: Breakpoint on write not occurred.,1: Breakpoint on write occurred."
|
|
newline
|
|
bitfld.long 0x4 21. "RADDR,Breakpoint on read status" "0: Breakpoint on read not occurred.,1: Breakpoint on read occurred."
|
|
newline
|
|
bitfld.long 0x4 20. "IADDR,Instruction fetch breakpoint status" "0: Instruction fetch breakpoint not occurred.,1: Instruction fetch breakpoint occurred."
|
|
newline
|
|
bitfld.long 0x4 19. "POS,Position breakpoint status" "0: Position breakpoint not occurred.,1: Position breakpoint occurred."
|
|
newline
|
|
bitfld.long 0x4 18. "YPOS,YPOS breakpoint status" "0: YPOS breakpoint not occurred.,1: YPOS breakpoint occurred."
|
|
newline
|
|
bitfld.long 0x4 17. "XPOS,XPOS breakpoint status" "0: Breakpoint XPOS not occurred.,1: Breakpoint XPOS occurred."
|
|
newline
|
|
bitfld.long 0x4 16. "DBG,Debug mode status: This bit provides the debug status of IPUS core" "0: In execution mode. (Instruction execution..,1: In debug mode. (Instruction execution stalled)"
|
|
newline
|
|
rbitfld.long 0x4 0. "H_DBG,This register provides the status of debug mode acknowledgement upon hardware debug request" "0: In execution mode (No hardware debug request..,1: In debug upon assertion debug request signal."
|
|
line.long 0x8 "DEBUG_BKPT_POS,Debug Breakpoint Position Register"
|
|
hexmask.long.word 0x8 16.--31. 1. "XPOS,Horizontal Pixel position - Specifies the horizontal pixel position for XPOS or POS breakpoint."
|
|
newline
|
|
hexmask.long.word 0x8 0.--15. 1. "YPOS,Vertical Pixel position - Specifies the vertical position (i"
|
|
line.long 0xC "DEBUG_BKPT_ADDR,Debug Breakpoint Address Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. "IADDR,Instruction fetch address - This field holds the instruction address where instruction fetch breakpoint should occur"
|
|
newline
|
|
hexmask.long.byte 0xC 16.--23. 1. "DRADDR,Data read address - This field holds the data address of the register bank from where when reads happens triggers breakpoint on read"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--15. 1. "DWADDR,Data Write address - This field holds the data address of the register bank to where when write happens triggers breakpoint on write"
|
|
rgroup.long 0x414++0x3
|
|
line.long 0x0 "DEBUG_CORE_STAT,Debug Core Status Register"
|
|
bitfld.long 0x0 27. "N,Status of scalar negative flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "Z,Status of scalar zero flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "C,Status of scalar carry flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "OV,Status of scalar overflow flag." "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "PC,This field holds the value of the program counter"
|
|
group.long 0x500++0x7
|
|
line.long 0x0 "PMONITOR_CTRL,Performance Monitor Control Register."
|
|
bitfld.long 0x0 20. "INIT_EX_CNT,This bit is used for clear the execution cycle counter" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "INIT_S_DH,This bit is used for clear the stall counter on data hazards" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "INIT_S_SINOUT,This bit is used for clear the stall counter on stream-in 'and' stream-out interface" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "INIT_S_SOUT,This bit is used for clear the stall counter on stream-out interface" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "INIT_S_SIN,This bit is used for clear the stall counter on stream-in interface" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "STOP_EX_CNT,This bit provides a secondary override for disabling the execution cycle counter." "0: Execution cycle counter is defreezed from..,1: Execution cycle counter is freezed from counting."
|
|
newline
|
|
bitfld.long 0x0 11. "STOP_S_DH,This bit provides a secondary override for disabling the stall counter on data hazard interface." "0: Stall counter on data hazard is defreezed from..,1: Stall counter on data hazard is freezed from.."
|
|
newline
|
|
bitfld.long 0x0 10. "STOP_S_SINOUT,This bit provides a secondary override for disabling the stall counter on stream-in and stream-out interface" "0: tall counter on stream-in 'and' stream-out is..,1: Stall counter on stream-in 'and' stream-out is.."
|
|
newline
|
|
bitfld.long 0x0 9. "STOP_S_SOUT,This bit provides a secondary override for disabling the stall counter on stream-out interface." "0: Stall counter on stream-in is defreezed from..,1: Stall counter on stream-out is freezed from.."
|
|
newline
|
|
bitfld.long 0x0 8. "STOP_S_SIN,This bit provides a secondary override for disabling the stall counter on stream-in interface." "0: Stall counter is defreezed from counting.,1: Stall counter on stream-in is freezed from.."
|
|
newline
|
|
bitfld.long 0x0 4. "EN_EX_CNT,This bit controls the execution cycle counter." "0: Execution counter is inactive. Counter does not..,1: Execution counter is enabled. Counter counts the.."
|
|
newline
|
|
bitfld.long 0x0 3. "EN_S_DH,This bit controls the stall counter that monitors the stalls due to data hazards in the pipeline." "0: Stall counter on stalls due to data hazard is..,1: Stall counter on stalls due to data hazard is.."
|
|
newline
|
|
bitfld.long 0x0 2. "EN_S_SINOUT,This bit controls the stall counter that monitor both stream-in and stream-out stalls occurring in same clock cycle" "0: Stall counter on stream-in and stream-out stalls..,1: Stall counter on stream-in and stream-out stalls.."
|
|
newline
|
|
bitfld.long 0x0 1. "EN_S_SOUT,This bit controls the stall counter on stream-out interface." "0: Stall counter on stream-out stalls is inactive.,1: Stall counter on stream-out stalls is enabled."
|
|
newline
|
|
bitfld.long 0x0 0. "EN_S_SIN,This bit controls the stall counter on stream-in interface." "0: Stall counter on stream-in stalls is inactive.,1: Stall counter on stream-in stalls is enabled."
|
|
line.long 0x4 "PMONITOR_SAMPLE,Performance Monitor Sample Register"
|
|
bitfld.long 0x4 4. "SAMPLE_EX_CNT,Sample execution counter" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "SAMPLE_S_DH,Sample stall counter on data hazard" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "SAMPLE_S_SINOUT,Sample stall counter on stream-in 'and' stream-out interface" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "SAMPLE_S_SOUT,Sample stall counter on stream-out interface" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "SAMPLE_S_SIN,Sample stall counter on stream-in interface" "0,1"
|
|
rgroup.long 0x508++0x13
|
|
line.long 0x0 "STALL_STREAMIN,Stream-in Stall Counter"
|
|
hexmask.long 0x0 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0x4 "STALL_STREAMOUT,Stream-out Stall Counter"
|
|
hexmask.long 0x4 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0x8 "STALL_STREAMINOUT,Stream-in and Stream-out Stall Counter"
|
|
hexmask.long 0x8 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0xC "STALL_DATAHAZARD,Data Hazard Stall Counter"
|
|
hexmask.long 0xC 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0x10 "EXEC_COUNTER,Execution Cycle Counter"
|
|
hexmask.long 0x10 0.--31. 1. "CYCLES,Number of execution cycles."
|
|
group.long 0x580++0xF
|
|
line.long 0x0 "IMEM_ERROR_INJECT_ADDR,Instruction Memory Error Injection Address"
|
|
hexmask.long.byte 0x0 0.--5. 1. "ADDR,Instruction memory address for error injection."
|
|
line.long 0x4 "IMEM_ERROR_VECTOR0,Instruction Memory Error Low Vector"
|
|
hexmask.long 0x4 0.--31. 1. "ERR_VEC0,Lower 32-bits of error vector."
|
|
line.long 0x8 "IMEM_ERROR_VECTOR1,Instruction Memory Error High Vector"
|
|
bitfld.long 0x8 31. "ERR_EN,Error injection enable" "0: No error is injected.,1: Error is injected. ECC syndrome and SEC-DED.."
|
|
newline
|
|
hexmask.long.byte 0x8 0.--6. 1. "ERR_VEC1,Higher 7-bits of error vector."
|
|
line.long 0xC "IMEM_ERROR_INJECT_STAT,Instruction Memory Error Inject Status Register"
|
|
bitfld.long 0xC 31. "LOC_ACC,This field provides the status of the location of instruction memory at which error is injected was accessed by IPUS core" "0: Instruction memory location was not accessed.,1: Instruction memory location was accessed and.."
|
|
newline
|
|
hexmask.long.byte 0xC 8.--14. 1. "SYNDROME,7-bit syndrome found when error was injected."
|
|
newline
|
|
rbitfld.long 0xC 1. "DED,Double bit error was detected." "0,1"
|
|
newline
|
|
rbitfld.long 0xC 0. "SEC,Single bit error was detected and corrected." "0,1"
|
|
group.long 0x600++0x3
|
|
line.long 0x0 "RESET_REG,Reset Register"
|
|
bitfld.long 0x0 1. "HARD_RESET,Writing 1 to this field provides a hard reset to the IPUS module" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SOFT_RESET,Writing 1 to this field provides a soft reset to the IPUS module" "0,1"
|
|
tree.end
|
|
tree "IPUS_5"
|
|
base ad:0x7C047000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "HOST_START,Command and Start Register"
|
|
hexmask.long.byte 0x0 16.--23. 1. "CSA,This field provides as a status the start address for the ongoing line processing."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "NSA,This field provides the address location in IRAM from where the processing of the next line starts"
|
|
line.long 0x4 "HOST_STATUS,Core Status Register"
|
|
hexmask.long.word 0x4 16.--31. 1. "REMAIN_PIXELS,Indicates the number of the pixels remaining to be processed"
|
|
newline
|
|
rbitfld.long 0x4 10. "DEBUG_STATUS,This field provides the debug status of the IPUS core." "0: In execution mode,1: In debug mode"
|
|
newline
|
|
rbitfld.long 0x4 8.--9. "CORE_STATUS,This field indicates the IPUS core status and number of triggers that has been bufferred." "0: Idle,1: Running single command.,?,?"
|
|
newline
|
|
bitfld.long 0x4 0.--1. "N_EVENTS,This fields reflects the value of the event counter" "0,1,2,3"
|
|
line.long 0x8 "HOST_POS,Position Configuration Register"
|
|
hexmask.long.word 0x8 16.--31. 1. "XPOS,This field indicates the horizontal position of the next line."
|
|
newline
|
|
hexmask.long.word 0x8 0.--15. 1. "YPOS,This field indicates the line number of the next line to be processed."
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x0 "HOST_CURRPOS,Current Position Status Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "CURR_XPOS,Provides the horizontal pixel position (XPOS) for the currently processed line."
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "CURR_YPOS,Provides the status the line number of the currently processed line."
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "HOST_XCFG,Line Width and Step Configuration Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "XSIZE,This field provides the width in terms of number of pixel componenets of the next line to be processed"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "XSTEP,This field provides the next incremental step for the XPOS register" "0: XPOS increment step is 4,1: XPOS increment step is 1,?,?"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "HOST_CURRXCFG,Current Line Width and Step Status Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "CURR_XSIZE,This field provides the width of the pixel component line being currently processed."
|
|
newline
|
|
bitfld.long 0x0 0.--1. "CURR_XSTEP,This field indicates the current XSTEP being used for processing." "0: XPOS increment step is 4,1: XPOS increment step is 1,?,?"
|
|
group.long 0x18++0xF
|
|
line.long 0x0 "HOST_INACFG,INA Matrix Configuration Register"
|
|
rbitfld.long 0x0 26. "CURR_EN_LINE2,Enable status for third row vector in 3x3 neighbourhood mode of INA matrix for the current line being processsed" "0: Third row-vector for currently line processed is..,1: Third row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x0 25. "CURR_EN_LINE1,Enable status for second row vector in 3x3 neighbourhood mode of INA matrix for the current line being processsed" "0: Second row-vector for currently line processed..,1: Second row-vector for currently line processed.."
|
|
newline
|
|
rbitfld.long 0x0 24. "CURR_EN_LINE0,Enable status for first row vector in 3x3 neighbourhood mode or complete row-vector in 1x9 neighbourhood mode of INA matrix for the current line being processsed" "0: First row-vector for currently line processed is..,1: First row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x0 18. "CURR_NHOOD,This field provides the current neighbourhood position of the elements in INA matrix being used in execution" "0: For the ongoing execution INA Matrix is in 3x3..,1: For the ongoing execution INA Matrix is in 1x9.."
|
|
newline
|
|
rbitfld.long 0x0 16.--17. "CURR_SHIFT,This field indicates the value currently being used for shifting each 1x3 row-vector or one 1x9 row-vector in INA matrix" "?,1: Row-vector of INA matrix will be shifted by 1.,?,?"
|
|
newline
|
|
bitfld.long 0x0 10. "EN_LINE2,This field enables the third row-vector of INA matrix for next line to be processed" "0: Disable the third 1x3 row vector of INA matrix..,1: Enable the third 1x3 row vector of INA matrix.."
|
|
newline
|
|
bitfld.long 0x0 9. "EN_LINE1,This field enables the second row-vector of INA matrix for next line to be processed" "0: Disable the second 1x3 row vector of INA matrix..,1: Enable the second 1x3 row vector of INA matrix.."
|
|
newline
|
|
bitfld.long 0x0 8. "EN_LINE0,This field enables the first row-vector of INA matrix for next line to be processed" "0: Disable first 1x3 row vector or 1x9 row vector..,1: Enable the first 1x3 row vector or 1x9 row.."
|
|
newline
|
|
bitfld.long 0x0 2. "NHOOD,This field provides the neighbourhood position of the elements in INA matrix" "0: INA Matrix is in 3x3 neighbourhood mode.,1: INA Matrix is in 1x9 neighbourhood mode."
|
|
newline
|
|
rbitfld.long 0x0 0.--1. "SHIFT,This field indicates the value by which each 1x3 row-vector or one 1x9 row-vector in INA matrix will be shifted when execution for the next line begins" "?,1: For next line processing shift the row vector of..,?,?"
|
|
line.long 0x4 "HOST_INBCFG,INB Matrix Configuration Register"
|
|
rbitfld.long 0x4 26. "CURR_EN_LINE2,Enable status for third row vector in 3x3 neighbourhood mode of INB matrix for the current line being processsed" "0: Third row-vector for currently line processed is..,1: Third row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x4 25. "CURR_EN_LINE1,Enable status for second row vector in 3x3 neighbourhood mode of INB matrix for the current line being processsed" "0: Second row-vector for currently line processed..,1: Second row-vector for currently line processed.."
|
|
newline
|
|
rbitfld.long 0x4 24. "CURR_EN_LINE0,Enable status for first row vector in 3x3 neighbourhood mode or complete row-vector in 1x9 neighbourhood mode of INB matrix for the current line being processsed" "0: First row-vector for currently line processed is..,1: First row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x4 18. "CURR_NHOOD,This field provides the neighbourhood position of the elements in INB matrix" "0: For the ongoing execution INB Matrix is in 3x3..,1: For the ongoing execution INB Matrix is in 1x9.."
|
|
newline
|
|
rbitfld.long 0x4 16.--17. "CURR_SHIFT,This field indicates the value currently being used for shifting each 1x3 row-vector or one 1x9 row-vector in INB matrix" "?,1: Row-vector of INA matrix will be shifted by 1.,?,?"
|
|
newline
|
|
bitfld.long 0x4 10. "EN_LINE2,This field enables the third row-vector of INB matrix for next line to be processed" "0: Disable the third 1x3 row vector of INB matrix..,1: Enable the third 1x3 row vector of INB matrix.."
|
|
newline
|
|
bitfld.long 0x4 9. "EN_LINE1,This field enables the second row-vector of INB matrix for next line to be processed" "0: Disable the second 1x3 row vector of INB matrix..,1: Enable the second 1x3 row vector of INB matrix.."
|
|
newline
|
|
bitfld.long 0x4 8. "EN_LINE0,This field enables the first row-vector of INB matrix for next line to be processed" "0: Disable first 1x3 row vector or 1x9 row vector..,1: Enable the first 1x3 row vector or 1x9 row.."
|
|
newline
|
|
bitfld.long 0x4 2. "NHOOD,This field provides the neighbourhood position of the elements in INB matrix" "0: INB Matrix is in 3x3 neighbourhood mode.,1: INB Matrix is in 1x9 neighbourhood mode."
|
|
newline
|
|
rbitfld.long 0x4 0.--1. "SHIFT,This field indicates the value by which each 1x3 row-vector or one 1x9 row-vector in INB matrix will be shifted when execution for the next line begins" "?,1: For next line processing shift the row vector of..,?,?"
|
|
line.long 0x8 "HOST_INALPHACFG,INALPHA Configuration Register"
|
|
rbitfld.long 0x8 26. "CURR_EN_LINE2,Enable status for third row vector in 3x3 neighbourhood mode of INALPHA matrix for the current line being processsed" "0: Third row-vector for currently line processed is..,1: Third row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x8 25. "CURR_EN_LINE1,Enable status for second row vector in 3x3 neighbourhood mode of INALPHA matrix for the current line being processsed" "0: Second row-vector for currently line processed..,1: Second row-vector for currently line processed.."
|
|
newline
|
|
rbitfld.long 0x8 24. "CURR_EN_LINE0,Enable status for first row vector in 3x3 neighbourhood mode or complete row-vector in 1x9 neighbourhood mode of INALPHA matrix for the current line being processsed" "0: First row-vector for currently line processed is..,1: First row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x8 18. "CURR_NHOOD,This field provides the current neighbourhood position of the elements in INALPHA matrix" "0: For the ongoing execution INALPHA Matrix is in..,1: For the ongoing execution INALPHA Matrix is in.."
|
|
newline
|
|
rbitfld.long 0x8 16.--17. "CURR_SHIFT,This field indicates the value currently being used for shifting each 1x3 row-vector or one 1x9 row-vector in INALPHA matrix" "?,1: Row-vector of INA matrix will be shifted by 1.,?,?"
|
|
newline
|
|
bitfld.long 0x8 10. "EN_LINE2,This field enables the third row-vector of INALPHA matrix for next line to be processed" "0: Disable the third 1x3 row vector of INALPHA..,1: Enable the third 1x3 row vector of INALPHA.."
|
|
newline
|
|
bitfld.long 0x8 9. "EN_LINE1,This field enables the second row-vector of INALPHA matrix for next line to be processed" "0: Disable the second 1x3 row vector of INALPHA..,1: Enable the second 1x3 row vector of INALPHA.."
|
|
newline
|
|
bitfld.long 0x8 8. "EN_LINE0,This field enables the first row-vector of INALPHA matrix for next line to be processed" "0: Disable first 1x3 row vector or 1x9 row vector..,1: Enable the first 1x3 row vector or 1x9 row.."
|
|
newline
|
|
bitfld.long 0x8 2. "NHOOD,This field provides the neighbourhood position of the elements in INALPHA matrix" "0: INALPHA Matrix is in 3x3 neighbourhood mode.,1: INALPHA matrix is in 1x9 neighbourhood mode."
|
|
newline
|
|
rbitfld.long 0x8 0.--1. "SHIFT,This field indicates the value by which each 1x3 row-vector or one 1x9 row-vector in INALPHA matrix will be shifted when execution for the next line begins" "?,1: For next line processing shift the row vector of..,?,?"
|
|
line.long 0xC "HOST_OUTCFG,OUT Matrix Configuration Register"
|
|
rbitfld.long 0xC 27. "CURR_EN_OUT3,This field indicates the status of the stream-out channel corresponding to OUT3 element for the current line processing" "0: OUT3 stream-out interface is disabled.,1: OUT3 stream-out interface is enabled."
|
|
newline
|
|
rbitfld.long 0xC 26. "CURR_EN_OUT2,This field indicates the status of the stream-out channel corresponding to OUT2 element for the current line processing" "0: OUT2 stream-out interface is disabled.,1: OUT2 stream-out interface is enabled."
|
|
newline
|
|
rbitfld.long 0xC 25. "CURR_EN_OUT1,This field indicates the status of the stream-out channel corresponding to OUT1 element for the current line processing" "0: OUT1 stream-out interface is disabled.,1: OUT1 stream-out interface is enabled."
|
|
newline
|
|
rbitfld.long 0xC 24. "CURR_EN_OUT0,This field indicates the status of the stream-out channel corresponding to OUT0 element for the current line processing" "0: OUT0 stream-out interface is disabled.,1: OUT0 stream-out interface is enabled."
|
|
newline
|
|
bitfld.long 0xC 11. "EN_OUT3,Enables the stream-out channel corresponding to OUT3 element of OUT matrix for processing the next line" "0: OUT3 stream-out channel is disabled.,1: OUT3 stream-out channel is enabled."
|
|
newline
|
|
bitfld.long 0xC 10. "EN_OUT2,Enables the stream-out channel corresponding to OUT2 element of OUT matrix for processing the next line" "0: OUT2 stream-out channel is disabled.,1: OUT2 stream-out channel is enabled."
|
|
newline
|
|
bitfld.long 0xC 9. "EN_OUT1,Enables the stream-out channel corresponding to OUT1 element of OUT matrix for processing the next line" "0: OUT1 stream-out channel is disabled.,1: OUT1 stream-out channel is enabled."
|
|
newline
|
|
bitfld.long 0xC 8. "EN_OUT0,Enables the stream-out channel corresponding to OUT0 element of OUT matrix for processing the next line" "0: OUT0 stream-out channel is disabled.,1: OUT0 stream-out channel is enabled."
|
|
group.long 0x40++0x17
|
|
line.long 0x0 "HOST_IMEMA,Instruction Memory Address Register"
|
|
hexmask.long.byte 0x0 0.--5. 1. "IADDR,Pointer into IRAM - This field provides an address pointer to a location of IRAM."
|
|
line.long 0x4 "HOST_IMEMD,Instruction Memory Data Register"
|
|
hexmask.long 0x4 0.--31. 1. "DATA,Read/Write data of IRAM - This field specifies data to be read/written from/into IRAM"
|
|
line.long 0x8 "HOST_DREGA,Data Register-Bank Address Register"
|
|
hexmask.long.byte 0x8 0.--7. 1. "DMEMA,Data memory address pointer - This field provides the pointer to core register bank of the IPUS module"
|
|
line.long 0xC "HOST_DREGD,Data Register-Bank Datum Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "DMEMD,Read/Write data of SGPRs - This field specifies data to be read or written from/into SGPRs"
|
|
line.long 0x10 "HOST_HISTA,Histogram Memory Address Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. "HISTA,Pointer into Histogram memory - This field provides an address pointer to a location of Histogram memory"
|
|
line.long 0x14 "HOST_HISTD,Histogram Memory Data Register"
|
|
hexmask.long 0x14 0.--31. 1. "HISTD,Read data from Histogram memory - This field specifies data to be read from histogram memory"
|
|
rgroup.long 0x58++0x7
|
|
line.long 0x0 "HOST_HISTPEAK,Histogram Peak Value Register"
|
|
hexmask.long 0x0 0.--31. 1. "HISTPEAK,Peak value - Reads to this register provides the maximum value to the histogram engine"
|
|
line.long 0x4 "HOST_HISTAMAX,Histogram Maximum Value Address Register"
|
|
hexmask.long.byte 0x4 0.--7. 1. "HISTAMAX,Address - Reads to this register provides the address location (bin address) of the maximum value to the histogram engine"
|
|
group.long 0x60++0xF
|
|
line.long 0x0 "HOST_HISTCLEAR,Histogram Clear Register"
|
|
hexmask.long 0x0 0.--31. 1. "HISTCLEAR,Writes to this register with any value clears the histogram memory and re-initialize the histogram engine"
|
|
line.long 0x4 "HOST_STATA,Statistics Memory Address Register"
|
|
hexmask.long.word 0x4 0.--9. 1. "STATA,Pointer into statistics memory - This field provides an address pointer to a location of statistics memory"
|
|
line.long 0x8 "HOST_STATD,Statistics Memory Data Register"
|
|
hexmask.long 0x8 0.--31. 1. "STATD,Statistics memory data - This field specifies data to be read or written from/to statistics memory"
|
|
line.long 0xC "HOST_STATCLEAR,Statistics Memory Clear Register"
|
|
hexmask.long 0xC 0.--31. 1. "STATCLEAR,Writes to this register with any value clears the statistical memory and re-initialize the statistical engine"
|
|
group.long 0x78++0x7
|
|
line.long 0x0 "HOST_LUTA,LUT Memory Address Register"
|
|
hexmask.long.word 0x0 0.--11. 1. "LUTA,Pointer into LUT memory - This field provides an address pointer to a location of LUT memory."
|
|
line.long 0x4 "HOST_LUTD,LUT Memory Data Register"
|
|
hexmask.long 0x4 0.--31. 1. "LUTD,LUT memory data - This field specifies data to be read or written from/to LUT memory"
|
|
group.long 0x104++0x23
|
|
line.long 0x0 "S_LINE0_LEN_INA,INA Stream Line 0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of the stream."
|
|
line.long 0x4 "S_CH0_CFG_INA,INA Stream Line 0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifes decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x8 "S_LINE0_ADDR_INA,INA Stream Line 0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Stream start address"
|
|
line.long 0xC "S_LINE1_LEN_INA,INA Stream Line 1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of the stream."
|
|
line.long 0x10 "S_CH1_CFG_INA,INA Stream Line 1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifes decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeated loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x14 "S_LINE1_ADDR_INA,INA Stream Line 1 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Stream start address"
|
|
line.long 0x18 "S_LINE2_LEN_INA,INA Stream Line 2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Length of the stream."
|
|
line.long 0x1C "S_CH2_CFG_INA,INA Stream Line 2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifes decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeated loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x20 "S_LINE2_ADDR_INA,INA Stream Line 2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Stream start address"
|
|
group.long 0x144++0x23
|
|
line.long 0x0 "S_LINE0_LEN_INB,INB Stream Line 0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x4 "S_CH0_CFG_INB,INB Stream Line 0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Step count of channel - Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x8 "S_LINE0_ADDR_INB,INB Stream Line 0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Stream start address"
|
|
line.long 0xC "S_LINE1_LEN_INB,INB Stream Line 1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x10 "S_CH1_CFG_INB,INB Stream Line 1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Step count of channel - Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x14 "S_LINE1_ADDR_INB,INB Stream Line 1 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Stream start address"
|
|
line.long 0x18 "S_LINE2_LEN_INB,INB Stream Line 2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x1C "S_CH2_CFG_INB,INB Stream Line 2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Step count of channel - Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x20 "S_LINE2_ADDR_INB,INB Stream Line 2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Stream start address"
|
|
group.long 0x184++0x23
|
|
line.long 0x0 "S_LINE0_LEN_INALPHA,INALPHA Stream Line 0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x4 "S_CH0_CFG_INALPHA,INALPHA Stream 0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x8 "S_LINE0_ADDR_INALPHA,INALPHA Stream Line 0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Stream start address."
|
|
line.long 0xC "S_LINE1_LEN_INALPHA,INALPHA Stream Line 1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x10 "S_CH1_CFG_INALPHA,INALPHA Stream 1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x14 "S_LINE1_ADDR_INALPHA,INALPHA Stream Line 1 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Stream start address."
|
|
line.long 0x18 "S_LINE2_LEN_INALPHA,INALPHA Stream Line 2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x1C "S_CH2_CFG_INALPHA,INALPHA Stream 2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x20 "S_LINE2_ADDR_INALPHA,INALPHA Stream Line 2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Stream start address."
|
|
group.long 0x1C4++0x2F
|
|
line.long 0x0 "S_LINE0_LEN_OUT,Stream OUT 0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of the stream to be outputted."
|
|
line.long 0x4 "S_CH0_CFG_OUT,Stream OUT 0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the output stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "SKIP,Skip count of Channel - Specifies the stride of the stream output channel" "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x8 "S_LINE0_ADDR_OUT,Stream OUT 0 Address Register"
|
|
hexmask.long 0x8 3.--31. 1. "ADDR,Start address of the output stream"
|
|
line.long 0xC "S_LINE1_LEN_OUT,Stream OUT 1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of the stream to be outputted."
|
|
line.long 0x10 "S_CH1_CFG_OUT,Stream OUT 1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the output stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "SKIP,Skip count of Channel - Specifies the stride of the stream output channel" "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x14 "S_LINE1_ADDR_OUT,Stream OUT 1 Address Register"
|
|
hexmask.long 0x14 3.--31. 1. "ADDR,Start address of the output stream"
|
|
line.long 0x18 "S_LINE2_LEN_OUT,Stream OUT 2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Length of the stream to be outputted."
|
|
line.long 0x1C "S_CH2_CFG_OUT,Stream OUT 2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the output stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "SKIP,Skip count of Channel - Specifies the stride of the stream output channel" "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x20 "S_LINE2_ADDR_OUT,Stream OUT 2 Address Register"
|
|
hexmask.long 0x20 3.--31. 1. "ADDR,Start address of the output stream"
|
|
line.long 0x24 "S_LINE3_LEN_OUT,Stream OUT 3 Length Register"
|
|
hexmask.long.word 0x24 0.--15. 1. "LENGTH,Length of the stream to be outputted."
|
|
line.long 0x28 "S_CH3_CFG_OUT,Stream OUT 3 Configuration Register"
|
|
bitfld.long 0x28 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the output stream" "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x28 16.--17. "SKIP,Skip count of Channel - Specifies the stride of the stream output channel" "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x2C "S_LINE3_ADDR_OUT,Stream OUT 3 Address Register"
|
|
hexmask.long 0x2C 3.--31. 1. "ADDR,Start address of the output stream"
|
|
rgroup.long 0x204++0x23
|
|
line.long 0x0 "S_CURR_LINE0_LEN_INA,Current INA Stream Line0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x4 "S_CURR_CH0_CFG_INA,Current INA Stream Channel0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Current boundary width/size on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Current boundary substitution mode used by the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Current repeat value used by the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Current step value used by the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x8 "S_CURR_LINE0_ADDR_INA,Current Stream Line0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Current base address of the stream."
|
|
line.long 0xC "S_CURR_LINE1_LEN_INA,Current INA Stream Line1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Current length of the stream."
|
|
line.long 0x10 "S_CURR_CH1_CFG_INA,Current INA Stream Channel1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Current boundary width/size on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Current boundary substitution mode used by the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Current repeat value used on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Current step value used on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x14 "S_CURR_LINE1_ADDR_INA,Current INA Stream Line1 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Current base address."
|
|
line.long 0x18 "S_CURR_LINE2_LEN_INA,Current INA Stream Line2 Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Current length of the stream."
|
|
line.long 0x1C "S_CURR_CH2_CFG_INA,Current INA Stream Channel2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Current data-type being used on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Current boundary width/size on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Current repeat value used on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Current step value used on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x20 "S_CURR_LINE2_ADDR_INA,Current INA Stream Line2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Current base address."
|
|
rgroup.long 0x244++0x23
|
|
line.long 0x0 "S_CURR_LINE0_LEN_INB,Current INB Stream Line0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x4 "S_CURR_CH0_CFG_INB,Current INB Stream Channel0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Current data-type being used on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Current repeat value on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Current step value on stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x8 "S_CURR_LINE0_ADDR_INB,Current INB Stream Line0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Current base address."
|
|
line.long 0xC "S_CURR_LINE1_LEN_INB,Current INB Stream Line 1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x10 "S_CURR_CH1_CFG_INB,Current INB Stream Channel1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Current data-type being used on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPEAT_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Current repeat value on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Current step value on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel component."
|
|
line.long 0x14 "S_CURR_LINE1_ADDR_INB,Current INB Stream Line 1 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Current base address."
|
|
line.long 0x18 "S_CURR_LINE2_LEN_INB,Current INB Stream Line2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x1C "S_CURR_CH2_CFG_INB,Current INB Stream Channel2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Current repeat value on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Current step value on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x20 "S_CURR_LINE2_ADDR_INB,Current INB Stream Line2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Current base address."
|
|
rgroup.long 0x284++0x23
|
|
line.long 0x0 "S_CURR_LINE0_LEN_INALPHA,Current INALPHA Stream Line0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x4 "S_CURR_CH0_CFG_INALPHA,Current INALPHA Stream Channel0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Current repeat value on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Current step value on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x8 "S_CURR_LINE0_ADDR_INALPHA,Current INALPHA Stream Line0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Current base address"
|
|
line.long 0xC "S_CURR_LINE1_LEN_INALPHA,Current INALPHA Stream Line1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x10 "S_CURR_CH1_CFG_INALPHA,Current INALPHA Stream Channel1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Current repeat value on stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Current step value on stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x14 "S_CURR_LINE1_ADDR_INALPHA,Current INALPHA Stream Line 1 Address register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Current base address."
|
|
line.long 0x18 "S_CURR_LINE2_LEN_INALPHA,Current INALPHA Stream Line2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x1C "S_CURR_CH2_CFG_INALPHA,Current INALPHA Stream Channel2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Current repeat value on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Current step value on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x20 "S_CURR_LINE2_ADDR_INALPHA,Current INALPHA Stream Line2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Current base address"
|
|
rgroup.long 0x2C4++0x2F
|
|
line.long 0x0 "S_CURR_LINE0_LEN_OUT,Current OUT Stream Line0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x4 "S_CURR_CH0_CFG_OUT,Current OUT Stream Channel0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Current datatype on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "SKIP,Current skip value on stream interface." "0,1,2,3"
|
|
line.long 0x8 "S_CURR_LINE0_ADDR_OUT,Current OUT Stream Line0 Address Register"
|
|
hexmask.long 0x8 3.--31. 1. "ADDR,Current start address."
|
|
line.long 0xC "S_CURR_LINE1_LEN_OUT,Current OUT Stream Line1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Current stream length"
|
|
line.long 0x10 "S_CURR_CH1_CFG_OUT,Current OUT Stream Channel1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Current datatype on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "SKIP,Current skip value on the stream interface." "0,1,2,3"
|
|
line.long 0x14 "S_CURR_LINE1_ADDR_OUT,Current OUT Stream Line1 Address Register"
|
|
hexmask.long 0x14 3.--31. 1. "ADDR,Current start address."
|
|
line.long 0x18 "S_CURR_LINE2_LEN_OUT,Current OUT Stream Line2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x1C "S_CURR_CH2_CFG_OUT,Current OUT Stream Channel2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Current datatype on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "SKIP,Current skip value on stream interface." "0,1,2,3"
|
|
line.long 0x20 "S_CURR_LINE2_ADDR_OUT,Current OUT Stream Line2 Address Register"
|
|
hexmask.long 0x20 3.--31. 1. "ADDR,Current start address."
|
|
line.long 0x24 "S_CURR_LINE3_LEN_OUT,Current OUT Stream Line3 Length Register"
|
|
hexmask.long.word 0x24 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x28 "S_CURR_CH3_CFG_OUT,Current OUT Stream Channel3 Configuration Register"
|
|
bitfld.long 0x28 28.--29. "TYPE,Current datatype on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x28 16.--17. "SKIP,Current skip value on the stream interface." "0,1,2,3"
|
|
line.long 0x2C "S_CURR_LINE3_ADDR_OUT,Current OUT Stream Line3 Address Register"
|
|
hexmask.long 0x2C 3.--31. 1. "ADDR,Current start address."
|
|
group.long 0x400++0xF
|
|
line.long 0x0 "DEBUG_MS,Debug Mode and Step Register"
|
|
bitfld.long 0x0 31. "B_FINISH,Break on Finish - Writing 1 in this bit enables breakpoint on finish" "0,1"
|
|
newline
|
|
bitfld.long 0x0 30. "B_WADDR,Break point on Write address - Writing 1 in this bit enables breakpoint on write address" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "B_RADDR,Break point on Read address - Writing 1 in this bit enables breakpoint on read address" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "B_IADDR,Break point on Instruction Fetch - Writing 1 in this bit enables breakpoint on instruction fetch" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "B_POS,Break point on Pixel Position - Writing 1 in this bit enabels breakpoint on pixel position" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "B_YPOS,Break point on Line - Writing 1 in this bit enabels breakpoint on line" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "B_XPOS,Break point on Pixel Number - Writing 1 in this bit enabels breakpoint on pixel number" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--19. 1. "STEP,Step Size - This field is used for specifying the step size of IPUS module when in debug mode."
|
|
newline
|
|
bitfld.long 0x0 1. "CTI_EN,Cross-triggerring enable" "0: Disable cross-triggering with CTI.,1: Enable cross-triggering with CTI."
|
|
newline
|
|
bitfld.long 0x0 0. "DBG_ACT,Activate Debug Mode - Writing 1 in this bit makes the IPUS module to enter debug mode." "0,1"
|
|
line.long 0x4 "DEBUG_BKPT_STAT,Debug Breakpoint Status Register"
|
|
bitfld.long 0x4 25. "STEP_REQ,STEP Request - Writing 1 to this bit provides a step request to the IPUS core" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "FINISH,Breakpoint on finish status" "0: Breakpoint on finish not occurred.,1: Breakpoint on finish occurred."
|
|
newline
|
|
bitfld.long 0x4 22. "WADDR,Breakpoint on write status" "0: Breakpoint on write not occurred.,1: Breakpoint on write occurred."
|
|
newline
|
|
bitfld.long 0x4 21. "RADDR,Breakpoint on read status" "0: Breakpoint on read not occurred.,1: Breakpoint on read occurred."
|
|
newline
|
|
bitfld.long 0x4 20. "IADDR,Instruction fetch breakpoint status" "0: Instruction fetch breakpoint not occurred.,1: Instruction fetch breakpoint occurred."
|
|
newline
|
|
bitfld.long 0x4 19. "POS,Position breakpoint status" "0: Position breakpoint not occurred.,1: Position breakpoint occurred."
|
|
newline
|
|
bitfld.long 0x4 18. "YPOS,YPOS breakpoint status" "0: YPOS breakpoint not occurred.,1: YPOS breakpoint occurred."
|
|
newline
|
|
bitfld.long 0x4 17. "XPOS,XPOS breakpoint status" "0: Breakpoint XPOS not occurred.,1: Breakpoint XPOS occurred."
|
|
newline
|
|
bitfld.long 0x4 16. "DBG,Debug mode status: This bit provides the debug status of IPUS core" "0: In execution mode. (Instruction execution..,1: In debug mode. (Instruction execution stalled)"
|
|
newline
|
|
rbitfld.long 0x4 0. "H_DBG,This register provides the status of debug mode acknowledgement upon hardware debug request" "0: In execution mode (No hardware debug request..,1: In debug upon assertion debug request signal."
|
|
line.long 0x8 "DEBUG_BKPT_POS,Debug Breakpoint Position Register"
|
|
hexmask.long.word 0x8 16.--31. 1. "XPOS,Horizontal Pixel position - Specifies the horizontal pixel position for XPOS or POS breakpoint."
|
|
newline
|
|
hexmask.long.word 0x8 0.--15. 1. "YPOS,Vertical Pixel position - Specifies the vertical position (i"
|
|
line.long 0xC "DEBUG_BKPT_ADDR,Debug Breakpoint Address Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. "IADDR,Instruction fetch address - This field holds the instruction address where instruction fetch breakpoint should occur"
|
|
newline
|
|
hexmask.long.byte 0xC 16.--23. 1. "DRADDR,Data read address - This field holds the data address of the register bank from where when reads happens triggers breakpoint on read"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--15. 1. "DWADDR,Data Write address - This field holds the data address of the register bank to where when write happens triggers breakpoint on write"
|
|
rgroup.long 0x414++0x3
|
|
line.long 0x0 "DEBUG_CORE_STAT,Debug Core Status Register"
|
|
bitfld.long 0x0 27. "N,Status of scalar negative flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "Z,Status of scalar zero flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "C,Status of scalar carry flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "OV,Status of scalar overflow flag." "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "PC,This field holds the value of the program counter"
|
|
group.long 0x500++0x7
|
|
line.long 0x0 "PMONITOR_CTRL,Performance Monitor Control Register."
|
|
bitfld.long 0x0 20. "INIT_EX_CNT,This bit is used for clear the execution cycle counter" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "INIT_S_DH,This bit is used for clear the stall counter on data hazards" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "INIT_S_SINOUT,This bit is used for clear the stall counter on stream-in 'and' stream-out interface" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "INIT_S_SOUT,This bit is used for clear the stall counter on stream-out interface" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "INIT_S_SIN,This bit is used for clear the stall counter on stream-in interface" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "STOP_EX_CNT,This bit provides a secondary override for disabling the execution cycle counter." "0: Execution cycle counter is defreezed from..,1: Execution cycle counter is freezed from counting."
|
|
newline
|
|
bitfld.long 0x0 11. "STOP_S_DH,This bit provides a secondary override for disabling the stall counter on data hazard interface." "0: Stall counter on data hazard is defreezed from..,1: Stall counter on data hazard is freezed from.."
|
|
newline
|
|
bitfld.long 0x0 10. "STOP_S_SINOUT,This bit provides a secondary override for disabling the stall counter on stream-in and stream-out interface" "0: tall counter on stream-in 'and' stream-out is..,1: Stall counter on stream-in 'and' stream-out is.."
|
|
newline
|
|
bitfld.long 0x0 9. "STOP_S_SOUT,This bit provides a secondary override for disabling the stall counter on stream-out interface." "0: Stall counter on stream-in is defreezed from..,1: Stall counter on stream-out is freezed from.."
|
|
newline
|
|
bitfld.long 0x0 8. "STOP_S_SIN,This bit provides a secondary override for disabling the stall counter on stream-in interface." "0: Stall counter is defreezed from counting.,1: Stall counter on stream-in is freezed from.."
|
|
newline
|
|
bitfld.long 0x0 4. "EN_EX_CNT,This bit controls the execution cycle counter." "0: Execution counter is inactive. Counter does not..,1: Execution counter is enabled. Counter counts the.."
|
|
newline
|
|
bitfld.long 0x0 3. "EN_S_DH,This bit controls the stall counter that monitors the stalls due to data hazards in the pipeline." "0: Stall counter on stalls due to data hazard is..,1: Stall counter on stalls due to data hazard is.."
|
|
newline
|
|
bitfld.long 0x0 2. "EN_S_SINOUT,This bit controls the stall counter that monitor both stream-in and stream-out stalls occurring in same clock cycle" "0: Stall counter on stream-in and stream-out stalls..,1: Stall counter on stream-in and stream-out stalls.."
|
|
newline
|
|
bitfld.long 0x0 1. "EN_S_SOUT,This bit controls the stall counter on stream-out interface." "0: Stall counter on stream-out stalls is inactive.,1: Stall counter on stream-out stalls is enabled."
|
|
newline
|
|
bitfld.long 0x0 0. "EN_S_SIN,This bit controls the stall counter on stream-in interface." "0: Stall counter on stream-in stalls is inactive.,1: Stall counter on stream-in stalls is enabled."
|
|
line.long 0x4 "PMONITOR_SAMPLE,Performance Monitor Sample Register"
|
|
bitfld.long 0x4 4. "SAMPLE_EX_CNT,Sample execution counter" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "SAMPLE_S_DH,Sample stall counter on data hazard" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "SAMPLE_S_SINOUT,Sample stall counter on stream-in 'and' stream-out interface" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "SAMPLE_S_SOUT,Sample stall counter on stream-out interface" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "SAMPLE_S_SIN,Sample stall counter on stream-in interface" "0,1"
|
|
rgroup.long 0x508++0x13
|
|
line.long 0x0 "STALL_STREAMIN,Stream-in Stall Counter"
|
|
hexmask.long 0x0 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0x4 "STALL_STREAMOUT,Stream-out Stall Counter"
|
|
hexmask.long 0x4 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0x8 "STALL_STREAMINOUT,Stream-in and Stream-out Stall Counter"
|
|
hexmask.long 0x8 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0xC "STALL_DATAHAZARD,Data Hazard Stall Counter"
|
|
hexmask.long 0xC 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0x10 "EXEC_COUNTER,Execution Cycle Counter"
|
|
hexmask.long 0x10 0.--31. 1. "CYCLES,Number of execution cycles."
|
|
group.long 0x580++0xF
|
|
line.long 0x0 "IMEM_ERROR_INJECT_ADDR,Instruction Memory Error Injection Address"
|
|
hexmask.long.byte 0x0 0.--5. 1. "ADDR,Instruction memory address for error injection."
|
|
line.long 0x4 "IMEM_ERROR_VECTOR0,Instruction Memory Error Low Vector"
|
|
hexmask.long 0x4 0.--31. 1. "ERR_VEC0,Lower 32-bits of error vector."
|
|
line.long 0x8 "IMEM_ERROR_VECTOR1,Instruction Memory Error High Vector"
|
|
bitfld.long 0x8 31. "ERR_EN,Error injection enable" "0: No error is injected.,1: Error is injected. ECC syndrome and SEC-DED.."
|
|
newline
|
|
hexmask.long.byte 0x8 0.--6. 1. "ERR_VEC1,Higher 7-bits of error vector."
|
|
line.long 0xC "IMEM_ERROR_INJECT_STAT,Instruction Memory Error Inject Status Register"
|
|
bitfld.long 0xC 31. "LOC_ACC,This field provides the status of the location of instruction memory at which error is injected was accessed by IPUS core" "0: Instruction memory location was not accessed.,1: Instruction memory location was accessed and.."
|
|
newline
|
|
hexmask.long.byte 0xC 8.--14. 1. "SYNDROME,7-bit syndrome found when error was injected."
|
|
newline
|
|
rbitfld.long 0xC 1. "DED,Double bit error was detected." "0,1"
|
|
newline
|
|
rbitfld.long 0xC 0. "SEC,Single bit error was detected and corrected." "0,1"
|
|
group.long 0x600++0x3
|
|
line.long 0x0 "RESET_REG,Reset Register"
|
|
bitfld.long 0x0 1. "HARD_RESET,Writing 1 to this field provides a hard reset to the IPUS module" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SOFT_RESET,Writing 1 to this field provides a soft reset to the IPUS module" "0,1"
|
|
tree.end
|
|
tree "IPUS_6"
|
|
base ad:0x7C048000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "HOST_START,Command and Start Register"
|
|
hexmask.long.byte 0x0 16.--23. 1. "CSA,This field provides as a status the start address for the ongoing line processing."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "NSA,This field provides the address location in IRAM from where the processing of the next line starts"
|
|
line.long 0x4 "HOST_STATUS,Core Status Register"
|
|
hexmask.long.word 0x4 16.--31. 1. "REMAIN_PIXELS,Indicates the number of the pixels remaining to be processed"
|
|
newline
|
|
rbitfld.long 0x4 10. "DEBUG_STATUS,This field provides the debug status of the IPUS core." "0: In execution mode,1: In debug mode"
|
|
newline
|
|
rbitfld.long 0x4 8.--9. "CORE_STATUS,This field indicates the IPUS core status and number of triggers that has been bufferred." "0: Idle,1: Running single command.,?,?"
|
|
newline
|
|
bitfld.long 0x4 0.--1. "N_EVENTS,This fields reflects the value of the event counter" "0,1,2,3"
|
|
line.long 0x8 "HOST_POS,Position Configuration Register"
|
|
hexmask.long.word 0x8 16.--31. 1. "XPOS,This field indicates the horizontal position of the next line."
|
|
newline
|
|
hexmask.long.word 0x8 0.--15. 1. "YPOS,This field indicates the line number of the next line to be processed."
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x0 "HOST_CURRPOS,Current Position Status Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "CURR_XPOS,Provides the horizontal pixel position (XPOS) for the currently processed line."
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "CURR_YPOS,Provides the status the line number of the currently processed line."
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "HOST_XCFG,Line Width and Step Configuration Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "XSIZE,This field provides the width in terms of number of pixel componenets of the next line to be processed"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "XSTEP,This field provides the next incremental step for the XPOS register" "0: XPOS increment step is 4,1: XPOS increment step is 1,?,?"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "HOST_CURRXCFG,Current Line Width and Step Status Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "CURR_XSIZE,This field provides the width of the pixel component line being currently processed."
|
|
newline
|
|
bitfld.long 0x0 0.--1. "CURR_XSTEP,This field indicates the current XSTEP being used for processing." "0: XPOS increment step is 4,1: XPOS increment step is 1,?,?"
|
|
group.long 0x18++0xF
|
|
line.long 0x0 "HOST_INACFG,INA Matrix Configuration Register"
|
|
rbitfld.long 0x0 26. "CURR_EN_LINE2,Enable status for third row vector in 3x3 neighbourhood mode of INA matrix for the current line being processsed" "0: Third row-vector for currently line processed is..,1: Third row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x0 25. "CURR_EN_LINE1,Enable status for second row vector in 3x3 neighbourhood mode of INA matrix for the current line being processsed" "0: Second row-vector for currently line processed..,1: Second row-vector for currently line processed.."
|
|
newline
|
|
rbitfld.long 0x0 24. "CURR_EN_LINE0,Enable status for first row vector in 3x3 neighbourhood mode or complete row-vector in 1x9 neighbourhood mode of INA matrix for the current line being processsed" "0: First row-vector for currently line processed is..,1: First row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x0 18. "CURR_NHOOD,This field provides the current neighbourhood position of the elements in INA matrix being used in execution" "0: For the ongoing execution INA Matrix is in 3x3..,1: For the ongoing execution INA Matrix is in 1x9.."
|
|
newline
|
|
rbitfld.long 0x0 16.--17. "CURR_SHIFT,This field indicates the value currently being used for shifting each 1x3 row-vector or one 1x9 row-vector in INA matrix" "?,1: Row-vector of INA matrix will be shifted by 1.,?,?"
|
|
newline
|
|
bitfld.long 0x0 10. "EN_LINE2,This field enables the third row-vector of INA matrix for next line to be processed" "0: Disable the third 1x3 row vector of INA matrix..,1: Enable the third 1x3 row vector of INA matrix.."
|
|
newline
|
|
bitfld.long 0x0 9. "EN_LINE1,This field enables the second row-vector of INA matrix for next line to be processed" "0: Disable the second 1x3 row vector of INA matrix..,1: Enable the second 1x3 row vector of INA matrix.."
|
|
newline
|
|
bitfld.long 0x0 8. "EN_LINE0,This field enables the first row-vector of INA matrix for next line to be processed" "0: Disable first 1x3 row vector or 1x9 row vector..,1: Enable the first 1x3 row vector or 1x9 row.."
|
|
newline
|
|
bitfld.long 0x0 2. "NHOOD,This field provides the neighbourhood position of the elements in INA matrix" "0: INA Matrix is in 3x3 neighbourhood mode.,1: INA Matrix is in 1x9 neighbourhood mode."
|
|
newline
|
|
rbitfld.long 0x0 0.--1. "SHIFT,This field indicates the value by which each 1x3 row-vector or one 1x9 row-vector in INA matrix will be shifted when execution for the next line begins" "?,1: For next line processing shift the row vector of..,?,?"
|
|
line.long 0x4 "HOST_INBCFG,INB Matrix Configuration Register"
|
|
rbitfld.long 0x4 26. "CURR_EN_LINE2,Enable status for third row vector in 3x3 neighbourhood mode of INB matrix for the current line being processsed" "0: Third row-vector for currently line processed is..,1: Third row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x4 25. "CURR_EN_LINE1,Enable status for second row vector in 3x3 neighbourhood mode of INB matrix for the current line being processsed" "0: Second row-vector for currently line processed..,1: Second row-vector for currently line processed.."
|
|
newline
|
|
rbitfld.long 0x4 24. "CURR_EN_LINE0,Enable status for first row vector in 3x3 neighbourhood mode or complete row-vector in 1x9 neighbourhood mode of INB matrix for the current line being processsed" "0: First row-vector for currently line processed is..,1: First row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x4 18. "CURR_NHOOD,This field provides the neighbourhood position of the elements in INB matrix" "0: For the ongoing execution INB Matrix is in 3x3..,1: For the ongoing execution INB Matrix is in 1x9.."
|
|
newline
|
|
rbitfld.long 0x4 16.--17. "CURR_SHIFT,This field indicates the value currently being used for shifting each 1x3 row-vector or one 1x9 row-vector in INB matrix" "?,1: Row-vector of INA matrix will be shifted by 1.,?,?"
|
|
newline
|
|
bitfld.long 0x4 10. "EN_LINE2,This field enables the third row-vector of INB matrix for next line to be processed" "0: Disable the third 1x3 row vector of INB matrix..,1: Enable the third 1x3 row vector of INB matrix.."
|
|
newline
|
|
bitfld.long 0x4 9. "EN_LINE1,This field enables the second row-vector of INB matrix for next line to be processed" "0: Disable the second 1x3 row vector of INB matrix..,1: Enable the second 1x3 row vector of INB matrix.."
|
|
newline
|
|
bitfld.long 0x4 8. "EN_LINE0,This field enables the first row-vector of INB matrix for next line to be processed" "0: Disable first 1x3 row vector or 1x9 row vector..,1: Enable the first 1x3 row vector or 1x9 row.."
|
|
newline
|
|
bitfld.long 0x4 2. "NHOOD,This field provides the neighbourhood position of the elements in INB matrix" "0: INB Matrix is in 3x3 neighbourhood mode.,1: INB Matrix is in 1x9 neighbourhood mode."
|
|
newline
|
|
rbitfld.long 0x4 0.--1. "SHIFT,This field indicates the value by which each 1x3 row-vector or one 1x9 row-vector in INB matrix will be shifted when execution for the next line begins" "?,1: For next line processing shift the row vector of..,?,?"
|
|
line.long 0x8 "HOST_INALPHACFG,INALPHA Configuration Register"
|
|
rbitfld.long 0x8 26. "CURR_EN_LINE2,Enable status for third row vector in 3x3 neighbourhood mode of INALPHA matrix for the current line being processsed" "0: Third row-vector for currently line processed is..,1: Third row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x8 25. "CURR_EN_LINE1,Enable status for second row vector in 3x3 neighbourhood mode of INALPHA matrix for the current line being processsed" "0: Second row-vector for currently line processed..,1: Second row-vector for currently line processed.."
|
|
newline
|
|
rbitfld.long 0x8 24. "CURR_EN_LINE0,Enable status for first row vector in 3x3 neighbourhood mode or complete row-vector in 1x9 neighbourhood mode of INALPHA matrix for the current line being processsed" "0: First row-vector for currently line processed is..,1: First row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x8 18. "CURR_NHOOD,This field provides the current neighbourhood position of the elements in INALPHA matrix" "0: For the ongoing execution INALPHA Matrix is in..,1: For the ongoing execution INALPHA Matrix is in.."
|
|
newline
|
|
rbitfld.long 0x8 16.--17. "CURR_SHIFT,This field indicates the value currently being used for shifting each 1x3 row-vector or one 1x9 row-vector in INALPHA matrix" "?,1: Row-vector of INA matrix will be shifted by 1.,?,?"
|
|
newline
|
|
bitfld.long 0x8 10. "EN_LINE2,This field enables the third row-vector of INALPHA matrix for next line to be processed" "0: Disable the third 1x3 row vector of INALPHA..,1: Enable the third 1x3 row vector of INALPHA.."
|
|
newline
|
|
bitfld.long 0x8 9. "EN_LINE1,This field enables the second row-vector of INALPHA matrix for next line to be processed" "0: Disable the second 1x3 row vector of INALPHA..,1: Enable the second 1x3 row vector of INALPHA.."
|
|
newline
|
|
bitfld.long 0x8 8. "EN_LINE0,This field enables the first row-vector of INALPHA matrix for next line to be processed" "0: Disable first 1x3 row vector or 1x9 row vector..,1: Enable the first 1x3 row vector or 1x9 row.."
|
|
newline
|
|
bitfld.long 0x8 2. "NHOOD,This field provides the neighbourhood position of the elements in INALPHA matrix" "0: INALPHA Matrix is in 3x3 neighbourhood mode.,1: INALPHA matrix is in 1x9 neighbourhood mode."
|
|
newline
|
|
rbitfld.long 0x8 0.--1. "SHIFT,This field indicates the value by which each 1x3 row-vector or one 1x9 row-vector in INALPHA matrix will be shifted when execution for the next line begins" "?,1: For next line processing shift the row vector of..,?,?"
|
|
line.long 0xC "HOST_OUTCFG,OUT Matrix Configuration Register"
|
|
rbitfld.long 0xC 27. "CURR_EN_OUT3,This field indicates the status of the stream-out channel corresponding to OUT3 element for the current line processing" "0: OUT3 stream-out interface is disabled.,1: OUT3 stream-out interface is enabled."
|
|
newline
|
|
rbitfld.long 0xC 26. "CURR_EN_OUT2,This field indicates the status of the stream-out channel corresponding to OUT2 element for the current line processing" "0: OUT2 stream-out interface is disabled.,1: OUT2 stream-out interface is enabled."
|
|
newline
|
|
rbitfld.long 0xC 25. "CURR_EN_OUT1,This field indicates the status of the stream-out channel corresponding to OUT1 element for the current line processing" "0: OUT1 stream-out interface is disabled.,1: OUT1 stream-out interface is enabled."
|
|
newline
|
|
rbitfld.long 0xC 24. "CURR_EN_OUT0,This field indicates the status of the stream-out channel corresponding to OUT0 element for the current line processing" "0: OUT0 stream-out interface is disabled.,1: OUT0 stream-out interface is enabled."
|
|
newline
|
|
bitfld.long 0xC 11. "EN_OUT3,Enables the stream-out channel corresponding to OUT3 element of OUT matrix for processing the next line" "0: OUT3 stream-out channel is disabled.,1: OUT3 stream-out channel is enabled."
|
|
newline
|
|
bitfld.long 0xC 10. "EN_OUT2,Enables the stream-out channel corresponding to OUT2 element of OUT matrix for processing the next line" "0: OUT2 stream-out channel is disabled.,1: OUT2 stream-out channel is enabled."
|
|
newline
|
|
bitfld.long 0xC 9. "EN_OUT1,Enables the stream-out channel corresponding to OUT1 element of OUT matrix for processing the next line" "0: OUT1 stream-out channel is disabled.,1: OUT1 stream-out channel is enabled."
|
|
newline
|
|
bitfld.long 0xC 8. "EN_OUT0,Enables the stream-out channel corresponding to OUT0 element of OUT matrix for processing the next line" "0: OUT0 stream-out channel is disabled.,1: OUT0 stream-out channel is enabled."
|
|
group.long 0x40++0x17
|
|
line.long 0x0 "HOST_IMEMA,Instruction Memory Address Register"
|
|
hexmask.long.byte 0x0 0.--5. 1. "IADDR,Pointer into IRAM - This field provides an address pointer to a location of IRAM."
|
|
line.long 0x4 "HOST_IMEMD,Instruction Memory Data Register"
|
|
hexmask.long 0x4 0.--31. 1. "DATA,Read/Write data of IRAM - This field specifies data to be read/written from/into IRAM"
|
|
line.long 0x8 "HOST_DREGA,Data Register-Bank Address Register"
|
|
hexmask.long.byte 0x8 0.--7. 1. "DMEMA,Data memory address pointer - This field provides the pointer to core register bank of the IPUS module"
|
|
line.long 0xC "HOST_DREGD,Data Register-Bank Datum Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "DMEMD,Read/Write data of SGPRs - This field specifies data to be read or written from/into SGPRs"
|
|
line.long 0x10 "HOST_HISTA,Histogram Memory Address Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. "HISTA,Pointer into Histogram memory - This field provides an address pointer to a location of Histogram memory"
|
|
line.long 0x14 "HOST_HISTD,Histogram Memory Data Register"
|
|
hexmask.long 0x14 0.--31. 1. "HISTD,Read data from Histogram memory - This field specifies data to be read from histogram memory"
|
|
rgroup.long 0x58++0x7
|
|
line.long 0x0 "HOST_HISTPEAK,Histogram Peak Value Register"
|
|
hexmask.long 0x0 0.--31. 1. "HISTPEAK,Peak value - Reads to this register provides the maximum value to the histogram engine"
|
|
line.long 0x4 "HOST_HISTAMAX,Histogram Maximum Value Address Register"
|
|
hexmask.long.byte 0x4 0.--7. 1. "HISTAMAX,Address - Reads to this register provides the address location (bin address) of the maximum value to the histogram engine"
|
|
group.long 0x60++0xF
|
|
line.long 0x0 "HOST_HISTCLEAR,Histogram Clear Register"
|
|
hexmask.long 0x0 0.--31. 1. "HISTCLEAR,Writes to this register with any value clears the histogram memory and re-initialize the histogram engine"
|
|
line.long 0x4 "HOST_STATA,Statistics Memory Address Register"
|
|
hexmask.long.word 0x4 0.--9. 1. "STATA,Pointer into statistics memory - This field provides an address pointer to a location of statistics memory"
|
|
line.long 0x8 "HOST_STATD,Statistics Memory Data Register"
|
|
hexmask.long 0x8 0.--31. 1. "STATD,Statistics memory data - This field specifies data to be read or written from/to statistics memory"
|
|
line.long 0xC "HOST_STATCLEAR,Statistics Memory Clear Register"
|
|
hexmask.long 0xC 0.--31. 1. "STATCLEAR,Writes to this register with any value clears the statistical memory and re-initialize the statistical engine"
|
|
group.long 0x78++0x7
|
|
line.long 0x0 "HOST_LUTA,LUT Memory Address Register"
|
|
hexmask.long.word 0x0 0.--11. 1. "LUTA,Pointer into LUT memory - This field provides an address pointer to a location of LUT memory."
|
|
line.long 0x4 "HOST_LUTD,LUT Memory Data Register"
|
|
hexmask.long 0x4 0.--31. 1. "LUTD,LUT memory data - This field specifies data to be read or written from/to LUT memory"
|
|
group.long 0x104++0x23
|
|
line.long 0x0 "S_LINE0_LEN_INA,INA Stream Line 0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of the stream."
|
|
line.long 0x4 "S_CH0_CFG_INA,INA Stream Line 0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifes decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x8 "S_LINE0_ADDR_INA,INA Stream Line 0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Stream start address"
|
|
line.long 0xC "S_LINE1_LEN_INA,INA Stream Line 1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of the stream."
|
|
line.long 0x10 "S_CH1_CFG_INA,INA Stream Line 1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifes decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeated loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x14 "S_LINE1_ADDR_INA,INA Stream Line 1 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Stream start address"
|
|
line.long 0x18 "S_LINE2_LEN_INA,INA Stream Line 2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Length of the stream."
|
|
line.long 0x1C "S_CH2_CFG_INA,INA Stream Line 2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifes decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeated loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x20 "S_LINE2_ADDR_INA,INA Stream Line 2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Stream start address"
|
|
group.long 0x144++0x23
|
|
line.long 0x0 "S_LINE0_LEN_INB,INB Stream Line 0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x4 "S_CH0_CFG_INB,INB Stream Line 0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Step count of channel - Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x8 "S_LINE0_ADDR_INB,INB Stream Line 0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Stream start address"
|
|
line.long 0xC "S_LINE1_LEN_INB,INB Stream Line 1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x10 "S_CH1_CFG_INB,INB Stream Line 1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Step count of channel - Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x14 "S_LINE1_ADDR_INB,INB Stream Line 1 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Stream start address"
|
|
line.long 0x18 "S_LINE2_LEN_INB,INB Stream Line 2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x1C "S_CH2_CFG_INB,INB Stream Line 2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Step count of channel - Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x20 "S_LINE2_ADDR_INB,INB Stream Line 2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Stream start address"
|
|
group.long 0x184++0x23
|
|
line.long 0x0 "S_LINE0_LEN_INALPHA,INALPHA Stream Line 0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x4 "S_CH0_CFG_INALPHA,INALPHA Stream 0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x8 "S_LINE0_ADDR_INALPHA,INALPHA Stream Line 0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Stream start address."
|
|
line.long 0xC "S_LINE1_LEN_INALPHA,INALPHA Stream Line 1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x10 "S_CH1_CFG_INALPHA,INALPHA Stream 1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x14 "S_LINE1_ADDR_INALPHA,INALPHA Stream Line 1 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Stream start address."
|
|
line.long 0x18 "S_LINE2_LEN_INALPHA,INALPHA Stream Line 2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x1C "S_CH2_CFG_INALPHA,INALPHA Stream 2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x20 "S_LINE2_ADDR_INALPHA,INALPHA Stream Line 2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Stream start address."
|
|
group.long 0x1C4++0x2F
|
|
line.long 0x0 "S_LINE0_LEN_OUT,Stream OUT 0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of the stream to be outputted."
|
|
line.long 0x4 "S_CH0_CFG_OUT,Stream OUT 0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the output stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "SKIP,Skip count of Channel - Specifies the stride of the stream output channel" "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x8 "S_LINE0_ADDR_OUT,Stream OUT 0 Address Register"
|
|
hexmask.long 0x8 3.--31. 1. "ADDR,Start address of the output stream"
|
|
line.long 0xC "S_LINE1_LEN_OUT,Stream OUT 1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of the stream to be outputted."
|
|
line.long 0x10 "S_CH1_CFG_OUT,Stream OUT 1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the output stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "SKIP,Skip count of Channel - Specifies the stride of the stream output channel" "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x14 "S_LINE1_ADDR_OUT,Stream OUT 1 Address Register"
|
|
hexmask.long 0x14 3.--31. 1. "ADDR,Start address of the output stream"
|
|
line.long 0x18 "S_LINE2_LEN_OUT,Stream OUT 2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Length of the stream to be outputted."
|
|
line.long 0x1C "S_CH2_CFG_OUT,Stream OUT 2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the output stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "SKIP,Skip count of Channel - Specifies the stride of the stream output channel" "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x20 "S_LINE2_ADDR_OUT,Stream OUT 2 Address Register"
|
|
hexmask.long 0x20 3.--31. 1. "ADDR,Start address of the output stream"
|
|
line.long 0x24 "S_LINE3_LEN_OUT,Stream OUT 3 Length Register"
|
|
hexmask.long.word 0x24 0.--15. 1. "LENGTH,Length of the stream to be outputted."
|
|
line.long 0x28 "S_CH3_CFG_OUT,Stream OUT 3 Configuration Register"
|
|
bitfld.long 0x28 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the output stream" "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x28 16.--17. "SKIP,Skip count of Channel - Specifies the stride of the stream output channel" "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x2C "S_LINE3_ADDR_OUT,Stream OUT 3 Address Register"
|
|
hexmask.long 0x2C 3.--31. 1. "ADDR,Start address of the output stream"
|
|
rgroup.long 0x204++0x23
|
|
line.long 0x0 "S_CURR_LINE0_LEN_INA,Current INA Stream Line0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x4 "S_CURR_CH0_CFG_INA,Current INA Stream Channel0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Current boundary width/size on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Current boundary substitution mode used by the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Current repeat value used by the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Current step value used by the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x8 "S_CURR_LINE0_ADDR_INA,Current Stream Line0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Current base address of the stream."
|
|
line.long 0xC "S_CURR_LINE1_LEN_INA,Current INA Stream Line1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Current length of the stream."
|
|
line.long 0x10 "S_CURR_CH1_CFG_INA,Current INA Stream Channel1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Current boundary width/size on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Current boundary substitution mode used by the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Current repeat value used on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Current step value used on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x14 "S_CURR_LINE1_ADDR_INA,Current INA Stream Line1 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Current base address."
|
|
line.long 0x18 "S_CURR_LINE2_LEN_INA,Current INA Stream Line2 Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Current length of the stream."
|
|
line.long 0x1C "S_CURR_CH2_CFG_INA,Current INA Stream Channel2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Current data-type being used on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Current boundary width/size on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Current repeat value used on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Current step value used on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x20 "S_CURR_LINE2_ADDR_INA,Current INA Stream Line2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Current base address."
|
|
rgroup.long 0x244++0x23
|
|
line.long 0x0 "S_CURR_LINE0_LEN_INB,Current INB Stream Line0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x4 "S_CURR_CH0_CFG_INB,Current INB Stream Channel0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Current data-type being used on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Current repeat value on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Current step value on stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x8 "S_CURR_LINE0_ADDR_INB,Current INB Stream Line0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Current base address."
|
|
line.long 0xC "S_CURR_LINE1_LEN_INB,Current INB Stream Line 1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x10 "S_CURR_CH1_CFG_INB,Current INB Stream Channel1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Current data-type being used on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPEAT_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Current repeat value on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Current step value on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel component."
|
|
line.long 0x14 "S_CURR_LINE1_ADDR_INB,Current INB Stream Line 1 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Current base address."
|
|
line.long 0x18 "S_CURR_LINE2_LEN_INB,Current INB Stream Line2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x1C "S_CURR_CH2_CFG_INB,Current INB Stream Channel2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Current repeat value on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Current step value on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x20 "S_CURR_LINE2_ADDR_INB,Current INB Stream Line2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Current base address."
|
|
rgroup.long 0x284++0x23
|
|
line.long 0x0 "S_CURR_LINE0_LEN_INALPHA,Current INALPHA Stream Line0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x4 "S_CURR_CH0_CFG_INALPHA,Current INALPHA Stream Channel0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Current repeat value on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Current step value on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x8 "S_CURR_LINE0_ADDR_INALPHA,Current INALPHA Stream Line0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Current base address"
|
|
line.long 0xC "S_CURR_LINE1_LEN_INALPHA,Current INALPHA Stream Line1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x10 "S_CURR_CH1_CFG_INALPHA,Current INALPHA Stream Channel1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Current repeat value on stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Current step value on stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x14 "S_CURR_LINE1_ADDR_INALPHA,Current INALPHA Stream Line 1 Address register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Current base address."
|
|
line.long 0x18 "S_CURR_LINE2_LEN_INALPHA,Current INALPHA Stream Line2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x1C "S_CURR_CH2_CFG_INALPHA,Current INALPHA Stream Channel2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Current repeat value on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Current step value on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x20 "S_CURR_LINE2_ADDR_INALPHA,Current INALPHA Stream Line2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Current base address"
|
|
rgroup.long 0x2C4++0x2F
|
|
line.long 0x0 "S_CURR_LINE0_LEN_OUT,Current OUT Stream Line0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x4 "S_CURR_CH0_CFG_OUT,Current OUT Stream Channel0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Current datatype on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "SKIP,Current skip value on stream interface." "0,1,2,3"
|
|
line.long 0x8 "S_CURR_LINE0_ADDR_OUT,Current OUT Stream Line0 Address Register"
|
|
hexmask.long 0x8 3.--31. 1. "ADDR,Current start address."
|
|
line.long 0xC "S_CURR_LINE1_LEN_OUT,Current OUT Stream Line1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Current stream length"
|
|
line.long 0x10 "S_CURR_CH1_CFG_OUT,Current OUT Stream Channel1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Current datatype on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "SKIP,Current skip value on the stream interface." "0,1,2,3"
|
|
line.long 0x14 "S_CURR_LINE1_ADDR_OUT,Current OUT Stream Line1 Address Register"
|
|
hexmask.long 0x14 3.--31. 1. "ADDR,Current start address."
|
|
line.long 0x18 "S_CURR_LINE2_LEN_OUT,Current OUT Stream Line2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x1C "S_CURR_CH2_CFG_OUT,Current OUT Stream Channel2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Current datatype on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "SKIP,Current skip value on stream interface." "0,1,2,3"
|
|
line.long 0x20 "S_CURR_LINE2_ADDR_OUT,Current OUT Stream Line2 Address Register"
|
|
hexmask.long 0x20 3.--31. 1. "ADDR,Current start address."
|
|
line.long 0x24 "S_CURR_LINE3_LEN_OUT,Current OUT Stream Line3 Length Register"
|
|
hexmask.long.word 0x24 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x28 "S_CURR_CH3_CFG_OUT,Current OUT Stream Channel3 Configuration Register"
|
|
bitfld.long 0x28 28.--29. "TYPE,Current datatype on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x28 16.--17. "SKIP,Current skip value on the stream interface." "0,1,2,3"
|
|
line.long 0x2C "S_CURR_LINE3_ADDR_OUT,Current OUT Stream Line3 Address Register"
|
|
hexmask.long 0x2C 3.--31. 1. "ADDR,Current start address."
|
|
group.long 0x400++0xF
|
|
line.long 0x0 "DEBUG_MS,Debug Mode and Step Register"
|
|
bitfld.long 0x0 31. "B_FINISH,Break on Finish - Writing 1 in this bit enables breakpoint on finish" "0,1"
|
|
newline
|
|
bitfld.long 0x0 30. "B_WADDR,Break point on Write address - Writing 1 in this bit enables breakpoint on write address" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "B_RADDR,Break point on Read address - Writing 1 in this bit enables breakpoint on read address" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "B_IADDR,Break point on Instruction Fetch - Writing 1 in this bit enables breakpoint on instruction fetch" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "B_POS,Break point on Pixel Position - Writing 1 in this bit enabels breakpoint on pixel position" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "B_YPOS,Break point on Line - Writing 1 in this bit enabels breakpoint on line" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "B_XPOS,Break point on Pixel Number - Writing 1 in this bit enabels breakpoint on pixel number" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--19. 1. "STEP,Step Size - This field is used for specifying the step size of IPUS module when in debug mode."
|
|
newline
|
|
bitfld.long 0x0 1. "CTI_EN,Cross-triggerring enable" "0: Disable cross-triggering with CTI.,1: Enable cross-triggering with CTI."
|
|
newline
|
|
bitfld.long 0x0 0. "DBG_ACT,Activate Debug Mode - Writing 1 in this bit makes the IPUS module to enter debug mode." "0,1"
|
|
line.long 0x4 "DEBUG_BKPT_STAT,Debug Breakpoint Status Register"
|
|
bitfld.long 0x4 25. "STEP_REQ,STEP Request - Writing 1 to this bit provides a step request to the IPUS core" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "FINISH,Breakpoint on finish status" "0: Breakpoint on finish not occurred.,1: Breakpoint on finish occurred."
|
|
newline
|
|
bitfld.long 0x4 22. "WADDR,Breakpoint on write status" "0: Breakpoint on write not occurred.,1: Breakpoint on write occurred."
|
|
newline
|
|
bitfld.long 0x4 21. "RADDR,Breakpoint on read status" "0: Breakpoint on read not occurred.,1: Breakpoint on read occurred."
|
|
newline
|
|
bitfld.long 0x4 20. "IADDR,Instruction fetch breakpoint status" "0: Instruction fetch breakpoint not occurred.,1: Instruction fetch breakpoint occurred."
|
|
newline
|
|
bitfld.long 0x4 19. "POS,Position breakpoint status" "0: Position breakpoint not occurred.,1: Position breakpoint occurred."
|
|
newline
|
|
bitfld.long 0x4 18. "YPOS,YPOS breakpoint status" "0: YPOS breakpoint not occurred.,1: YPOS breakpoint occurred."
|
|
newline
|
|
bitfld.long 0x4 17. "XPOS,XPOS breakpoint status" "0: Breakpoint XPOS not occurred.,1: Breakpoint XPOS occurred."
|
|
newline
|
|
bitfld.long 0x4 16. "DBG,Debug mode status: This bit provides the debug status of IPUS core" "0: In execution mode. (Instruction execution..,1: In debug mode. (Instruction execution stalled)"
|
|
newline
|
|
rbitfld.long 0x4 0. "H_DBG,This register provides the status of debug mode acknowledgement upon hardware debug request" "0: In execution mode (No hardware debug request..,1: In debug upon assertion debug request signal."
|
|
line.long 0x8 "DEBUG_BKPT_POS,Debug Breakpoint Position Register"
|
|
hexmask.long.word 0x8 16.--31. 1. "XPOS,Horizontal Pixel position - Specifies the horizontal pixel position for XPOS or POS breakpoint."
|
|
newline
|
|
hexmask.long.word 0x8 0.--15. 1. "YPOS,Vertical Pixel position - Specifies the vertical position (i"
|
|
line.long 0xC "DEBUG_BKPT_ADDR,Debug Breakpoint Address Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. "IADDR,Instruction fetch address - This field holds the instruction address where instruction fetch breakpoint should occur"
|
|
newline
|
|
hexmask.long.byte 0xC 16.--23. 1. "DRADDR,Data read address - This field holds the data address of the register bank from where when reads happens triggers breakpoint on read"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--15. 1. "DWADDR,Data Write address - This field holds the data address of the register bank to where when write happens triggers breakpoint on write"
|
|
rgroup.long 0x414++0x3
|
|
line.long 0x0 "DEBUG_CORE_STAT,Debug Core Status Register"
|
|
bitfld.long 0x0 27. "N,Status of scalar negative flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "Z,Status of scalar zero flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "C,Status of scalar carry flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "OV,Status of scalar overflow flag." "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "PC,This field holds the value of the program counter"
|
|
group.long 0x500++0x7
|
|
line.long 0x0 "PMONITOR_CTRL,Performance Monitor Control Register."
|
|
bitfld.long 0x0 20. "INIT_EX_CNT,This bit is used for clear the execution cycle counter" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "INIT_S_DH,This bit is used for clear the stall counter on data hazards" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "INIT_S_SINOUT,This bit is used for clear the stall counter on stream-in 'and' stream-out interface" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "INIT_S_SOUT,This bit is used for clear the stall counter on stream-out interface" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "INIT_S_SIN,This bit is used for clear the stall counter on stream-in interface" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "STOP_EX_CNT,This bit provides a secondary override for disabling the execution cycle counter." "0: Execution cycle counter is defreezed from..,1: Execution cycle counter is freezed from counting."
|
|
newline
|
|
bitfld.long 0x0 11. "STOP_S_DH,This bit provides a secondary override for disabling the stall counter on data hazard interface." "0: Stall counter on data hazard is defreezed from..,1: Stall counter on data hazard is freezed from.."
|
|
newline
|
|
bitfld.long 0x0 10. "STOP_S_SINOUT,This bit provides a secondary override for disabling the stall counter on stream-in and stream-out interface" "0: tall counter on stream-in 'and' stream-out is..,1: Stall counter on stream-in 'and' stream-out is.."
|
|
newline
|
|
bitfld.long 0x0 9. "STOP_S_SOUT,This bit provides a secondary override for disabling the stall counter on stream-out interface." "0: Stall counter on stream-in is defreezed from..,1: Stall counter on stream-out is freezed from.."
|
|
newline
|
|
bitfld.long 0x0 8. "STOP_S_SIN,This bit provides a secondary override for disabling the stall counter on stream-in interface." "0: Stall counter is defreezed from counting.,1: Stall counter on stream-in is freezed from.."
|
|
newline
|
|
bitfld.long 0x0 4. "EN_EX_CNT,This bit controls the execution cycle counter." "0: Execution counter is inactive. Counter does not..,1: Execution counter is enabled. Counter counts the.."
|
|
newline
|
|
bitfld.long 0x0 3. "EN_S_DH,This bit controls the stall counter that monitors the stalls due to data hazards in the pipeline." "0: Stall counter on stalls due to data hazard is..,1: Stall counter on stalls due to data hazard is.."
|
|
newline
|
|
bitfld.long 0x0 2. "EN_S_SINOUT,This bit controls the stall counter that monitor both stream-in and stream-out stalls occurring in same clock cycle" "0: Stall counter on stream-in and stream-out stalls..,1: Stall counter on stream-in and stream-out stalls.."
|
|
newline
|
|
bitfld.long 0x0 1. "EN_S_SOUT,This bit controls the stall counter on stream-out interface." "0: Stall counter on stream-out stalls is inactive.,1: Stall counter on stream-out stalls is enabled."
|
|
newline
|
|
bitfld.long 0x0 0. "EN_S_SIN,This bit controls the stall counter on stream-in interface." "0: Stall counter on stream-in stalls is inactive.,1: Stall counter on stream-in stalls is enabled."
|
|
line.long 0x4 "PMONITOR_SAMPLE,Performance Monitor Sample Register"
|
|
bitfld.long 0x4 4. "SAMPLE_EX_CNT,Sample execution counter" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "SAMPLE_S_DH,Sample stall counter on data hazard" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "SAMPLE_S_SINOUT,Sample stall counter on stream-in 'and' stream-out interface" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "SAMPLE_S_SOUT,Sample stall counter on stream-out interface" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "SAMPLE_S_SIN,Sample stall counter on stream-in interface" "0,1"
|
|
rgroup.long 0x508++0x13
|
|
line.long 0x0 "STALL_STREAMIN,Stream-in Stall Counter"
|
|
hexmask.long 0x0 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0x4 "STALL_STREAMOUT,Stream-out Stall Counter"
|
|
hexmask.long 0x4 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0x8 "STALL_STREAMINOUT,Stream-in and Stream-out Stall Counter"
|
|
hexmask.long 0x8 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0xC "STALL_DATAHAZARD,Data Hazard Stall Counter"
|
|
hexmask.long 0xC 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0x10 "EXEC_COUNTER,Execution Cycle Counter"
|
|
hexmask.long 0x10 0.--31. 1. "CYCLES,Number of execution cycles."
|
|
group.long 0x580++0xF
|
|
line.long 0x0 "IMEM_ERROR_INJECT_ADDR,Instruction Memory Error Injection Address"
|
|
hexmask.long.byte 0x0 0.--5. 1. "ADDR,Instruction memory address for error injection."
|
|
line.long 0x4 "IMEM_ERROR_VECTOR0,Instruction Memory Error Low Vector"
|
|
hexmask.long 0x4 0.--31. 1. "ERR_VEC0,Lower 32-bits of error vector."
|
|
line.long 0x8 "IMEM_ERROR_VECTOR1,Instruction Memory Error High Vector"
|
|
bitfld.long 0x8 31. "ERR_EN,Error injection enable" "0: No error is injected.,1: Error is injected. ECC syndrome and SEC-DED.."
|
|
newline
|
|
hexmask.long.byte 0x8 0.--6. 1. "ERR_VEC1,Higher 7-bits of error vector."
|
|
line.long 0xC "IMEM_ERROR_INJECT_STAT,Instruction Memory Error Inject Status Register"
|
|
bitfld.long 0xC 31. "LOC_ACC,This field provides the status of the location of instruction memory at which error is injected was accessed by IPUS core" "0: Instruction memory location was not accessed.,1: Instruction memory location was accessed and.."
|
|
newline
|
|
hexmask.long.byte 0xC 8.--14. 1. "SYNDROME,7-bit syndrome found when error was injected."
|
|
newline
|
|
rbitfld.long 0xC 1. "DED,Double bit error was detected." "0,1"
|
|
newline
|
|
rbitfld.long 0xC 0. "SEC,Single bit error was detected and corrected." "0,1"
|
|
group.long 0x600++0x3
|
|
line.long 0x0 "RESET_REG,Reset Register"
|
|
bitfld.long 0x0 1. "HARD_RESET,Writing 1 to this field provides a hard reset to the IPUS module" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SOFT_RESET,Writing 1 to this field provides a soft reset to the IPUS module" "0,1"
|
|
tree.end
|
|
tree "IPUS_7"
|
|
base ad:0x7C049000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "HOST_START,Command and Start Register"
|
|
hexmask.long.byte 0x0 16.--23. 1. "CSA,This field provides as a status the start address for the ongoing line processing."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "NSA,This field provides the address location in IRAM from where the processing of the next line starts"
|
|
line.long 0x4 "HOST_STATUS,Core Status Register"
|
|
hexmask.long.word 0x4 16.--31. 1. "REMAIN_PIXELS,Indicates the number of the pixels remaining to be processed"
|
|
newline
|
|
rbitfld.long 0x4 10. "DEBUG_STATUS,This field provides the debug status of the IPUS core." "0: In execution mode,1: In debug mode"
|
|
newline
|
|
rbitfld.long 0x4 8.--9. "CORE_STATUS,This field indicates the IPUS core status and number of triggers that has been bufferred." "0: Idle,1: Running single command.,?,?"
|
|
newline
|
|
bitfld.long 0x4 0.--1. "N_EVENTS,This fields reflects the value of the event counter" "0,1,2,3"
|
|
line.long 0x8 "HOST_POS,Position Configuration Register"
|
|
hexmask.long.word 0x8 16.--31. 1. "XPOS,This field indicates the horizontal position of the next line."
|
|
newline
|
|
hexmask.long.word 0x8 0.--15. 1. "YPOS,This field indicates the line number of the next line to be processed."
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x0 "HOST_CURRPOS,Current Position Status Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "CURR_XPOS,Provides the horizontal pixel position (XPOS) for the currently processed line."
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "CURR_YPOS,Provides the status the line number of the currently processed line."
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "HOST_XCFG,Line Width and Step Configuration Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "XSIZE,This field provides the width in terms of number of pixel componenets of the next line to be processed"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "XSTEP,This field provides the next incremental step for the XPOS register" "0: XPOS increment step is 4,1: XPOS increment step is 1,?,?"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "HOST_CURRXCFG,Current Line Width and Step Status Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "CURR_XSIZE,This field provides the width of the pixel component line being currently processed."
|
|
newline
|
|
bitfld.long 0x0 0.--1. "CURR_XSTEP,This field indicates the current XSTEP being used for processing." "0: XPOS increment step is 4,1: XPOS increment step is 1,?,?"
|
|
group.long 0x18++0xF
|
|
line.long 0x0 "HOST_INACFG,INA Matrix Configuration Register"
|
|
rbitfld.long 0x0 26. "CURR_EN_LINE2,Enable status for third row vector in 3x3 neighbourhood mode of INA matrix for the current line being processsed" "0: Third row-vector for currently line processed is..,1: Third row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x0 25. "CURR_EN_LINE1,Enable status for second row vector in 3x3 neighbourhood mode of INA matrix for the current line being processsed" "0: Second row-vector for currently line processed..,1: Second row-vector for currently line processed.."
|
|
newline
|
|
rbitfld.long 0x0 24. "CURR_EN_LINE0,Enable status for first row vector in 3x3 neighbourhood mode or complete row-vector in 1x9 neighbourhood mode of INA matrix for the current line being processsed" "0: First row-vector for currently line processed is..,1: First row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x0 18. "CURR_NHOOD,This field provides the current neighbourhood position of the elements in INA matrix being used in execution" "0: For the ongoing execution INA Matrix is in 3x3..,1: For the ongoing execution INA Matrix is in 1x9.."
|
|
newline
|
|
rbitfld.long 0x0 16.--17. "CURR_SHIFT,This field indicates the value currently being used for shifting each 1x3 row-vector or one 1x9 row-vector in INA matrix" "?,1: Row-vector of INA matrix will be shifted by 1.,?,?"
|
|
newline
|
|
bitfld.long 0x0 10. "EN_LINE2,This field enables the third row-vector of INA matrix for next line to be processed" "0: Disable the third 1x3 row vector of INA matrix..,1: Enable the third 1x3 row vector of INA matrix.."
|
|
newline
|
|
bitfld.long 0x0 9. "EN_LINE1,This field enables the second row-vector of INA matrix for next line to be processed" "0: Disable the second 1x3 row vector of INA matrix..,1: Enable the second 1x3 row vector of INA matrix.."
|
|
newline
|
|
bitfld.long 0x0 8. "EN_LINE0,This field enables the first row-vector of INA matrix for next line to be processed" "0: Disable first 1x3 row vector or 1x9 row vector..,1: Enable the first 1x3 row vector or 1x9 row.."
|
|
newline
|
|
bitfld.long 0x0 2. "NHOOD,This field provides the neighbourhood position of the elements in INA matrix" "0: INA Matrix is in 3x3 neighbourhood mode.,1: INA Matrix is in 1x9 neighbourhood mode."
|
|
newline
|
|
rbitfld.long 0x0 0.--1. "SHIFT,This field indicates the value by which each 1x3 row-vector or one 1x9 row-vector in INA matrix will be shifted when execution for the next line begins" "?,1: For next line processing shift the row vector of..,?,?"
|
|
line.long 0x4 "HOST_INBCFG,INB Matrix Configuration Register"
|
|
rbitfld.long 0x4 26. "CURR_EN_LINE2,Enable status for third row vector in 3x3 neighbourhood mode of INB matrix for the current line being processsed" "0: Third row-vector for currently line processed is..,1: Third row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x4 25. "CURR_EN_LINE1,Enable status for second row vector in 3x3 neighbourhood mode of INB matrix for the current line being processsed" "0: Second row-vector for currently line processed..,1: Second row-vector for currently line processed.."
|
|
newline
|
|
rbitfld.long 0x4 24. "CURR_EN_LINE0,Enable status for first row vector in 3x3 neighbourhood mode or complete row-vector in 1x9 neighbourhood mode of INB matrix for the current line being processsed" "0: First row-vector for currently line processed is..,1: First row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x4 18. "CURR_NHOOD,This field provides the neighbourhood position of the elements in INB matrix" "0: For the ongoing execution INB Matrix is in 3x3..,1: For the ongoing execution INB Matrix is in 1x9.."
|
|
newline
|
|
rbitfld.long 0x4 16.--17. "CURR_SHIFT,This field indicates the value currently being used for shifting each 1x3 row-vector or one 1x9 row-vector in INB matrix" "?,1: Row-vector of INA matrix will be shifted by 1.,?,?"
|
|
newline
|
|
bitfld.long 0x4 10. "EN_LINE2,This field enables the third row-vector of INB matrix for next line to be processed" "0: Disable the third 1x3 row vector of INB matrix..,1: Enable the third 1x3 row vector of INB matrix.."
|
|
newline
|
|
bitfld.long 0x4 9. "EN_LINE1,This field enables the second row-vector of INB matrix for next line to be processed" "0: Disable the second 1x3 row vector of INB matrix..,1: Enable the second 1x3 row vector of INB matrix.."
|
|
newline
|
|
bitfld.long 0x4 8. "EN_LINE0,This field enables the first row-vector of INB matrix for next line to be processed" "0: Disable first 1x3 row vector or 1x9 row vector..,1: Enable the first 1x3 row vector or 1x9 row.."
|
|
newline
|
|
bitfld.long 0x4 2. "NHOOD,This field provides the neighbourhood position of the elements in INB matrix" "0: INB Matrix is in 3x3 neighbourhood mode.,1: INB Matrix is in 1x9 neighbourhood mode."
|
|
newline
|
|
rbitfld.long 0x4 0.--1. "SHIFT,This field indicates the value by which each 1x3 row-vector or one 1x9 row-vector in INB matrix will be shifted when execution for the next line begins" "?,1: For next line processing shift the row vector of..,?,?"
|
|
line.long 0x8 "HOST_INALPHACFG,INALPHA Configuration Register"
|
|
rbitfld.long 0x8 26. "CURR_EN_LINE2,Enable status for third row vector in 3x3 neighbourhood mode of INALPHA matrix for the current line being processsed" "0: Third row-vector for currently line processed is..,1: Third row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x8 25. "CURR_EN_LINE1,Enable status for second row vector in 3x3 neighbourhood mode of INALPHA matrix for the current line being processsed" "0: Second row-vector for currently line processed..,1: Second row-vector for currently line processed.."
|
|
newline
|
|
rbitfld.long 0x8 24. "CURR_EN_LINE0,Enable status for first row vector in 3x3 neighbourhood mode or complete row-vector in 1x9 neighbourhood mode of INALPHA matrix for the current line being processsed" "0: First row-vector for currently line processed is..,1: First row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x8 18. "CURR_NHOOD,This field provides the current neighbourhood position of the elements in INALPHA matrix" "0: For the ongoing execution INALPHA Matrix is in..,1: For the ongoing execution INALPHA Matrix is in.."
|
|
newline
|
|
rbitfld.long 0x8 16.--17. "CURR_SHIFT,This field indicates the value currently being used for shifting each 1x3 row-vector or one 1x9 row-vector in INALPHA matrix" "?,1: Row-vector of INA matrix will be shifted by 1.,?,?"
|
|
newline
|
|
bitfld.long 0x8 10. "EN_LINE2,This field enables the third row-vector of INALPHA matrix for next line to be processed" "0: Disable the third 1x3 row vector of INALPHA..,1: Enable the third 1x3 row vector of INALPHA.."
|
|
newline
|
|
bitfld.long 0x8 9. "EN_LINE1,This field enables the second row-vector of INALPHA matrix for next line to be processed" "0: Disable the second 1x3 row vector of INALPHA..,1: Enable the second 1x3 row vector of INALPHA.."
|
|
newline
|
|
bitfld.long 0x8 8. "EN_LINE0,This field enables the first row-vector of INALPHA matrix for next line to be processed" "0: Disable first 1x3 row vector or 1x9 row vector..,1: Enable the first 1x3 row vector or 1x9 row.."
|
|
newline
|
|
bitfld.long 0x8 2. "NHOOD,This field provides the neighbourhood position of the elements in INALPHA matrix" "0: INALPHA Matrix is in 3x3 neighbourhood mode.,1: INALPHA matrix is in 1x9 neighbourhood mode."
|
|
newline
|
|
rbitfld.long 0x8 0.--1. "SHIFT,This field indicates the value by which each 1x3 row-vector or one 1x9 row-vector in INALPHA matrix will be shifted when execution for the next line begins" "?,1: For next line processing shift the row vector of..,?,?"
|
|
line.long 0xC "HOST_OUTCFG,OUT Matrix Configuration Register"
|
|
rbitfld.long 0xC 27. "CURR_EN_OUT3,This field indicates the status of the stream-out channel corresponding to OUT3 element for the current line processing" "0: OUT3 stream-out interface is disabled.,1: OUT3 stream-out interface is enabled."
|
|
newline
|
|
rbitfld.long 0xC 26. "CURR_EN_OUT2,This field indicates the status of the stream-out channel corresponding to OUT2 element for the current line processing" "0: OUT2 stream-out interface is disabled.,1: OUT2 stream-out interface is enabled."
|
|
newline
|
|
rbitfld.long 0xC 25. "CURR_EN_OUT1,This field indicates the status of the stream-out channel corresponding to OUT1 element for the current line processing" "0: OUT1 stream-out interface is disabled.,1: OUT1 stream-out interface is enabled."
|
|
newline
|
|
rbitfld.long 0xC 24. "CURR_EN_OUT0,This field indicates the status of the stream-out channel corresponding to OUT0 element for the current line processing" "0: OUT0 stream-out interface is disabled.,1: OUT0 stream-out interface is enabled."
|
|
newline
|
|
bitfld.long 0xC 11. "EN_OUT3,Enables the stream-out channel corresponding to OUT3 element of OUT matrix for processing the next line" "0: OUT3 stream-out channel is disabled.,1: OUT3 stream-out channel is enabled."
|
|
newline
|
|
bitfld.long 0xC 10. "EN_OUT2,Enables the stream-out channel corresponding to OUT2 element of OUT matrix for processing the next line" "0: OUT2 stream-out channel is disabled.,1: OUT2 stream-out channel is enabled."
|
|
newline
|
|
bitfld.long 0xC 9. "EN_OUT1,Enables the stream-out channel corresponding to OUT1 element of OUT matrix for processing the next line" "0: OUT1 stream-out channel is disabled.,1: OUT1 stream-out channel is enabled."
|
|
newline
|
|
bitfld.long 0xC 8. "EN_OUT0,Enables the stream-out channel corresponding to OUT0 element of OUT matrix for processing the next line" "0: OUT0 stream-out channel is disabled.,1: OUT0 stream-out channel is enabled."
|
|
group.long 0x40++0x17
|
|
line.long 0x0 "HOST_IMEMA,Instruction Memory Address Register"
|
|
hexmask.long.byte 0x0 0.--5. 1. "IADDR,Pointer into IRAM - This field provides an address pointer to a location of IRAM."
|
|
line.long 0x4 "HOST_IMEMD,Instruction Memory Data Register"
|
|
hexmask.long 0x4 0.--31. 1. "DATA,Read/Write data of IRAM - This field specifies data to be read/written from/into IRAM"
|
|
line.long 0x8 "HOST_DREGA,Data Register-Bank Address Register"
|
|
hexmask.long.byte 0x8 0.--7. 1. "DMEMA,Data memory address pointer - This field provides the pointer to core register bank of the IPUS module"
|
|
line.long 0xC "HOST_DREGD,Data Register-Bank Datum Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "DMEMD,Read/Write data of SGPRs - This field specifies data to be read or written from/into SGPRs"
|
|
line.long 0x10 "HOST_HISTA,Histogram Memory Address Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. "HISTA,Pointer into Histogram memory - This field provides an address pointer to a location of Histogram memory"
|
|
line.long 0x14 "HOST_HISTD,Histogram Memory Data Register"
|
|
hexmask.long 0x14 0.--31. 1. "HISTD,Read data from Histogram memory - This field specifies data to be read from histogram memory"
|
|
rgroup.long 0x58++0x7
|
|
line.long 0x0 "HOST_HISTPEAK,Histogram Peak Value Register"
|
|
hexmask.long 0x0 0.--31. 1. "HISTPEAK,Peak value - Reads to this register provides the maximum value to the histogram engine"
|
|
line.long 0x4 "HOST_HISTAMAX,Histogram Maximum Value Address Register"
|
|
hexmask.long.byte 0x4 0.--7. 1. "HISTAMAX,Address - Reads to this register provides the address location (bin address) of the maximum value to the histogram engine"
|
|
group.long 0x60++0xF
|
|
line.long 0x0 "HOST_HISTCLEAR,Histogram Clear Register"
|
|
hexmask.long 0x0 0.--31. 1. "HISTCLEAR,Writes to this register with any value clears the histogram memory and re-initialize the histogram engine"
|
|
line.long 0x4 "HOST_STATA,Statistics Memory Address Register"
|
|
hexmask.long.word 0x4 0.--9. 1. "STATA,Pointer into statistics memory - This field provides an address pointer to a location of statistics memory"
|
|
line.long 0x8 "HOST_STATD,Statistics Memory Data Register"
|
|
hexmask.long 0x8 0.--31. 1. "STATD,Statistics memory data - This field specifies data to be read or written from/to statistics memory"
|
|
line.long 0xC "HOST_STATCLEAR,Statistics Memory Clear Register"
|
|
hexmask.long 0xC 0.--31. 1. "STATCLEAR,Writes to this register with any value clears the statistical memory and re-initialize the statistical engine"
|
|
group.long 0x78++0x7
|
|
line.long 0x0 "HOST_LUTA,LUT Memory Address Register"
|
|
hexmask.long.word 0x0 0.--11. 1. "LUTA,Pointer into LUT memory - This field provides an address pointer to a location of LUT memory."
|
|
line.long 0x4 "HOST_LUTD,LUT Memory Data Register"
|
|
hexmask.long 0x4 0.--31. 1. "LUTD,LUT memory data - This field specifies data to be read or written from/to LUT memory"
|
|
group.long 0x104++0x23
|
|
line.long 0x0 "S_LINE0_LEN_INA,INA Stream Line 0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of the stream."
|
|
line.long 0x4 "S_CH0_CFG_INA,INA Stream Line 0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifes decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x8 "S_LINE0_ADDR_INA,INA Stream Line 0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Stream start address"
|
|
line.long 0xC "S_LINE1_LEN_INA,INA Stream Line 1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of the stream."
|
|
line.long 0x10 "S_CH1_CFG_INA,INA Stream Line 1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifes decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeated loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x14 "S_LINE1_ADDR_INA,INA Stream Line 1 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Stream start address"
|
|
line.long 0x18 "S_LINE2_LEN_INA,INA Stream Line 2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Length of the stream."
|
|
line.long 0x1C "S_CH2_CFG_INA,INA Stream Line 2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifes decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeated loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x20 "S_LINE2_ADDR_INA,INA Stream Line 2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Stream start address"
|
|
group.long 0x144++0x23
|
|
line.long 0x0 "S_LINE0_LEN_INB,INB Stream Line 0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x4 "S_CH0_CFG_INB,INB Stream Line 0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Step count of channel - Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x8 "S_LINE0_ADDR_INB,INB Stream Line 0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Stream start address"
|
|
line.long 0xC "S_LINE1_LEN_INB,INB Stream Line 1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x10 "S_CH1_CFG_INB,INB Stream Line 1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Step count of channel - Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x14 "S_LINE1_ADDR_INB,INB Stream Line 1 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Stream start address"
|
|
line.long 0x18 "S_LINE2_LEN_INB,INB Stream Line 2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x1C "S_CH2_CFG_INB,INB Stream Line 2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Step count of channel - Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x20 "S_LINE2_ADDR_INB,INB Stream Line 2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Stream start address"
|
|
group.long 0x184++0x23
|
|
line.long 0x0 "S_LINE0_LEN_INALPHA,INALPHA Stream Line 0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x4 "S_CH0_CFG_INALPHA,INALPHA Stream 0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x8 "S_LINE0_ADDR_INALPHA,INALPHA Stream Line 0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Stream start address."
|
|
line.long 0xC "S_LINE1_LEN_INALPHA,INALPHA Stream Line 1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x10 "S_CH1_CFG_INALPHA,INALPHA Stream 1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x14 "S_LINE1_ADDR_INALPHA,INALPHA Stream Line 1 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Stream start address."
|
|
line.long 0x18 "S_LINE2_LEN_INALPHA,INALPHA Stream Line 2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x1C "S_CH2_CFG_INALPHA,INALPHA Stream 2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel componenets" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component 1 time.,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Step count of channel -- Specfies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel component i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x20 "S_LINE2_ADDR_INALPHA,INALPHA Stream Line 2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Stream start address."
|
|
group.long 0x1C4++0x2F
|
|
line.long 0x0 "S_LINE0_LEN_OUT,Stream OUT 0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of the stream to be outputted."
|
|
line.long 0x4 "S_CH0_CFG_OUT,Stream OUT 0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the output stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "SKIP,Skip count of Channel - Specifies the stride of the stream output channel" "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x8 "S_LINE0_ADDR_OUT,Stream OUT 0 Address Register"
|
|
hexmask.long 0x8 3.--31. 1. "ADDR,Start address of the output stream"
|
|
line.long 0xC "S_LINE1_LEN_OUT,Stream OUT 1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of the stream to be outputted."
|
|
line.long 0x10 "S_CH1_CFG_OUT,Stream OUT 1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the output stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "SKIP,Skip count of Channel - Specifies the stride of the stream output channel" "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x14 "S_LINE1_ADDR_OUT,Stream OUT 1 Address Register"
|
|
hexmask.long 0x14 3.--31. 1. "ADDR,Start address of the output stream"
|
|
line.long 0x18 "S_LINE2_LEN_OUT,Stream OUT 2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Length of the stream to be outputted."
|
|
line.long 0x1C "S_CH2_CFG_OUT,Stream OUT 2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the output stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "SKIP,Skip count of Channel - Specifies the stride of the stream output channel" "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x20 "S_LINE2_ADDR_OUT,Stream OUT 2 Address Register"
|
|
hexmask.long 0x20 3.--31. 1. "ADDR,Start address of the output stream"
|
|
line.long 0x24 "S_LINE3_LEN_OUT,Stream OUT 3 Length Register"
|
|
hexmask.long.word 0x24 0.--15. 1. "LENGTH,Length of the stream to be outputted."
|
|
line.long 0x28 "S_CH3_CFG_OUT,Stream OUT 3 Configuration Register"
|
|
bitfld.long 0x28 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the output stream" "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x28 16.--17. "SKIP,Skip count of Channel - Specifies the stride of the stream output channel" "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x2C "S_LINE3_ADDR_OUT,Stream OUT 3 Address Register"
|
|
hexmask.long 0x2C 3.--31. 1. "ADDR,Start address of the output stream"
|
|
rgroup.long 0x204++0x23
|
|
line.long 0x0 "S_CURR_LINE0_LEN_INA,Current INA Stream Line0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of stream."
|
|
line.long 0x4 "S_CURR_CH0_CFG_INA,Current INA Stream Channel0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Current boundary width/size on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Current boundary substitution mode used by the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Current repeat value used by the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Current step value used by the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x8 "S_CURR_LINE0_ADDR_INA,Current Stream Line0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Current base address of the stream."
|
|
line.long 0xC "S_CURR_LINE1_LEN_INA,Current INA Stream Line1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Current length of the stream."
|
|
line.long 0x10 "S_CURR_CH1_CFG_INA,Current INA Stream Channel1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Current boundary width/size on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Current boundary substitution mode used by the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Current repeat value used on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Current step value used on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x14 "S_CURR_LINE1_ADDR_INA,Current INA Stream Line1 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Current base address."
|
|
line.long 0x18 "S_CURR_LINE2_LEN_INA,Current INA Stream Line2 Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Current length of the stream."
|
|
line.long 0x1C "S_CURR_CH2_CFG_INA,Current INA Stream Channel2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Current data-type being used on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Current boundary width/size on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Current repeat value used on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Current step value used on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x20 "S_CURR_LINE2_ADDR_INA,Current INA Stream Line2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Current base address."
|
|
rgroup.long 0x244++0x23
|
|
line.long 0x0 "S_CURR_LINE0_LEN_INB,Current INB Stream Line0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x4 "S_CURR_CH0_CFG_INB,Current INB Stream Channel0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Current data-type being used on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Current repeat value on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Current step value on stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x8 "S_CURR_LINE0_ADDR_INB,Current INB Stream Line0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Current base address."
|
|
line.long 0xC "S_CURR_LINE1_LEN_INB,Current INB Stream Line 1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x10 "S_CURR_CH1_CFG_INB,Current INB Stream Channel1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Current data-type being used on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPEAT_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Current repeat value on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Current step value on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel component."
|
|
line.long 0x14 "S_CURR_LINE1_ADDR_INB,Current INB Stream Line 1 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Current base address."
|
|
line.long 0x18 "S_CURR_LINE2_LEN_INB,Current INB Stream Line2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x1C "S_CURR_CH2_CFG_INB,Current INB Stream Channel2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Current repeat value on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Current step value on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x20 "S_CURR_LINE2_ADDR_INB,Current INB Stream Line2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Current base address."
|
|
rgroup.long 0x284++0x23
|
|
line.long 0x0 "S_CURR_LINE0_LEN_INALPHA,Current INALPHA Stream Line0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x4 "S_CURR_CH0_CFG_INALPHA,Current INALPHA Stream Channel0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Current repeat value on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Current step value on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x8 "S_CURR_LINE0_ADDR_INALPHA,Current INALPHA Stream Line0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Current base address"
|
|
line.long 0xC "S_CURR_LINE1_LEN_INALPHA,Current INALPHA Stream Line1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x10 "S_CURR_CH1_CFG_INALPHA,Current INALPHA Stream Channel1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Current repeat value on stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Current step value on stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x14 "S_CURR_LINE1_ADDR_INALPHA,Current INALPHA Stream Line 1 Address register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Current base address."
|
|
line.long 0x18 "S_CURR_LINE2_LEN_INALPHA,Current INALPHA Stream Line2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x1C "S_CURR_CH2_CFG_INALPHA,Current INALPHA Stream Channel2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Current data-type on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Current scan direction on the stream interface." "0,1"
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Current repeat value on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Current step value on the stream interface." "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel componenent."
|
|
line.long 0x20 "S_CURR_LINE2_ADDR_INALPHA,Current INALPHA Stream Line2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Current base address"
|
|
rgroup.long 0x2C4++0x2F
|
|
line.long 0x0 "S_CURR_LINE0_LEN_OUT,Current OUT Stream Line0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x4 "S_CURR_CH0_CFG_OUT,Current OUT Stream Channel0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Current datatype on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "SKIP,Current skip value on stream interface." "0,1,2,3"
|
|
line.long 0x8 "S_CURR_LINE0_ADDR_OUT,Current OUT Stream Line0 Address Register"
|
|
hexmask.long 0x8 3.--31. 1. "ADDR,Current start address."
|
|
line.long 0xC "S_CURR_LINE1_LEN_OUT,Current OUT Stream Line1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Current stream length"
|
|
line.long 0x10 "S_CURR_CH1_CFG_OUT,Current OUT Stream Channel1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Current datatype on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "SKIP,Current skip value on the stream interface." "0,1,2,3"
|
|
line.long 0x14 "S_CURR_LINE1_ADDR_OUT,Current OUT Stream Line1 Address Register"
|
|
hexmask.long 0x14 3.--31. 1. "ADDR,Current start address."
|
|
line.long 0x18 "S_CURR_LINE2_LEN_OUT,Current OUT Stream Line2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x1C "S_CURR_CH2_CFG_OUT,Current OUT Stream Channel2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Current datatype on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "SKIP,Current skip value on stream interface." "0,1,2,3"
|
|
line.long 0x20 "S_CURR_LINE2_ADDR_OUT,Current OUT Stream Line2 Address Register"
|
|
hexmask.long 0x20 3.--31. 1. "ADDR,Current start address."
|
|
line.long 0x24 "S_CURR_LINE3_LEN_OUT,Current OUT Stream Line3 Length Register"
|
|
hexmask.long.word 0x24 0.--15. 1. "LENGTH,Current stream length."
|
|
line.long 0x28 "S_CURR_CH3_CFG_OUT,Current OUT Stream Channel3 Configuration Register"
|
|
bitfld.long 0x28 28.--29. "TYPE,Current datatype on the stream interface." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x28 16.--17. "SKIP,Current skip value on the stream interface." "0,1,2,3"
|
|
line.long 0x2C "S_CURR_LINE3_ADDR_OUT,Current OUT Stream Line3 Address Register"
|
|
hexmask.long 0x2C 3.--31. 1. "ADDR,Current start address."
|
|
group.long 0x400++0xF
|
|
line.long 0x0 "DEBUG_MS,Debug Mode and Step Register"
|
|
bitfld.long 0x0 31. "B_FINISH,Break on Finish - Writing 1 in this bit enables breakpoint on finish" "0,1"
|
|
newline
|
|
bitfld.long 0x0 30. "B_WADDR,Break point on Write address - Writing 1 in this bit enables breakpoint on write address" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "B_RADDR,Break point on Read address - Writing 1 in this bit enables breakpoint on read address" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "B_IADDR,Break point on Instruction Fetch - Writing 1 in this bit enables breakpoint on instruction fetch" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "B_POS,Break point on Pixel Position - Writing 1 in this bit enabels breakpoint on pixel position" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "B_YPOS,Break point on Line - Writing 1 in this bit enabels breakpoint on line" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "B_XPOS,Break point on Pixel Number - Writing 1 in this bit enabels breakpoint on pixel number" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--19. 1. "STEP,Step Size - This field is used for specifying the step size of IPUS module when in debug mode."
|
|
newline
|
|
bitfld.long 0x0 1. "CTI_EN,Cross-triggerring enable" "0: Disable cross-triggering with CTI.,1: Enable cross-triggering with CTI."
|
|
newline
|
|
bitfld.long 0x0 0. "DBG_ACT,Activate Debug Mode - Writing 1 in this bit makes the IPUS module to enter debug mode." "0,1"
|
|
line.long 0x4 "DEBUG_BKPT_STAT,Debug Breakpoint Status Register"
|
|
bitfld.long 0x4 25. "STEP_REQ,STEP Request - Writing 1 to this bit provides a step request to the IPUS core" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "FINISH,Breakpoint on finish status" "0: Breakpoint on finish not occurred.,1: Breakpoint on finish occurred."
|
|
newline
|
|
bitfld.long 0x4 22. "WADDR,Breakpoint on write status" "0: Breakpoint on write not occurred.,1: Breakpoint on write occurred."
|
|
newline
|
|
bitfld.long 0x4 21. "RADDR,Breakpoint on read status" "0: Breakpoint on read not occurred.,1: Breakpoint on read occurred."
|
|
newline
|
|
bitfld.long 0x4 20. "IADDR,Instruction fetch breakpoint status" "0: Instruction fetch breakpoint not occurred.,1: Instruction fetch breakpoint occurred."
|
|
newline
|
|
bitfld.long 0x4 19. "POS,Position breakpoint status" "0: Position breakpoint not occurred.,1: Position breakpoint occurred."
|
|
newline
|
|
bitfld.long 0x4 18. "YPOS,YPOS breakpoint status" "0: YPOS breakpoint not occurred.,1: YPOS breakpoint occurred."
|
|
newline
|
|
bitfld.long 0x4 17. "XPOS,XPOS breakpoint status" "0: Breakpoint XPOS not occurred.,1: Breakpoint XPOS occurred."
|
|
newline
|
|
bitfld.long 0x4 16. "DBG,Debug mode status: This bit provides the debug status of IPUS core" "0: In execution mode. (Instruction execution..,1: In debug mode. (Instruction execution stalled)"
|
|
newline
|
|
rbitfld.long 0x4 0. "H_DBG,This register provides the status of debug mode acknowledgement upon hardware debug request" "0: In execution mode (No hardware debug request..,1: In debug upon assertion debug request signal."
|
|
line.long 0x8 "DEBUG_BKPT_POS,Debug Breakpoint Position Register"
|
|
hexmask.long.word 0x8 16.--31. 1. "XPOS,Horizontal Pixel position - Specifies the horizontal pixel position for XPOS or POS breakpoint."
|
|
newline
|
|
hexmask.long.word 0x8 0.--15. 1. "YPOS,Vertical Pixel position - Specifies the vertical position (i"
|
|
line.long 0xC "DEBUG_BKPT_ADDR,Debug Breakpoint Address Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. "IADDR,Instruction fetch address - This field holds the instruction address where instruction fetch breakpoint should occur"
|
|
newline
|
|
hexmask.long.byte 0xC 16.--23. 1. "DRADDR,Data read address - This field holds the data address of the register bank from where when reads happens triggers breakpoint on read"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--15. 1. "DWADDR,Data Write address - This field holds the data address of the register bank to where when write happens triggers breakpoint on write"
|
|
rgroup.long 0x414++0x3
|
|
line.long 0x0 "DEBUG_CORE_STAT,Debug Core Status Register"
|
|
bitfld.long 0x0 27. "N,Status of scalar negative flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "Z,Status of scalar zero flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "C,Status of scalar carry flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "OV,Status of scalar overflow flag." "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "PC,This field holds the value of the program counter"
|
|
group.long 0x500++0x7
|
|
line.long 0x0 "PMONITOR_CTRL,Performance Monitor Control Register."
|
|
bitfld.long 0x0 20. "INIT_EX_CNT,This bit is used for clear the execution cycle counter" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "INIT_S_DH,This bit is used for clear the stall counter on data hazards" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "INIT_S_SINOUT,This bit is used for clear the stall counter on stream-in 'and' stream-out interface" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "INIT_S_SOUT,This bit is used for clear the stall counter on stream-out interface" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "INIT_S_SIN,This bit is used for clear the stall counter on stream-in interface" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "STOP_EX_CNT,This bit provides a secondary override for disabling the execution cycle counter." "0: Execution cycle counter is defreezed from..,1: Execution cycle counter is freezed from counting."
|
|
newline
|
|
bitfld.long 0x0 11. "STOP_S_DH,This bit provides a secondary override for disabling the stall counter on data hazard interface." "0: Stall counter on data hazard is defreezed from..,1: Stall counter on data hazard is freezed from.."
|
|
newline
|
|
bitfld.long 0x0 10. "STOP_S_SINOUT,This bit provides a secondary override for disabling the stall counter on stream-in and stream-out interface" "0: tall counter on stream-in 'and' stream-out is..,1: Stall counter on stream-in 'and' stream-out is.."
|
|
newline
|
|
bitfld.long 0x0 9. "STOP_S_SOUT,This bit provides a secondary override for disabling the stall counter on stream-out interface." "0: Stall counter on stream-in is defreezed from..,1: Stall counter on stream-out is freezed from.."
|
|
newline
|
|
bitfld.long 0x0 8. "STOP_S_SIN,This bit provides a secondary override for disabling the stall counter on stream-in interface." "0: Stall counter is defreezed from counting.,1: Stall counter on stream-in is freezed from.."
|
|
newline
|
|
bitfld.long 0x0 4. "EN_EX_CNT,This bit controls the execution cycle counter." "0: Execution counter is inactive. Counter does not..,1: Execution counter is enabled. Counter counts the.."
|
|
newline
|
|
bitfld.long 0x0 3. "EN_S_DH,This bit controls the stall counter that monitors the stalls due to data hazards in the pipeline." "0: Stall counter on stalls due to data hazard is..,1: Stall counter on stalls due to data hazard is.."
|
|
newline
|
|
bitfld.long 0x0 2. "EN_S_SINOUT,This bit controls the stall counter that monitor both stream-in and stream-out stalls occurring in same clock cycle" "0: Stall counter on stream-in and stream-out stalls..,1: Stall counter on stream-in and stream-out stalls.."
|
|
newline
|
|
bitfld.long 0x0 1. "EN_S_SOUT,This bit controls the stall counter on stream-out interface." "0: Stall counter on stream-out stalls is inactive.,1: Stall counter on stream-out stalls is enabled."
|
|
newline
|
|
bitfld.long 0x0 0. "EN_S_SIN,This bit controls the stall counter on stream-in interface." "0: Stall counter on stream-in stalls is inactive.,1: Stall counter on stream-in stalls is enabled."
|
|
line.long 0x4 "PMONITOR_SAMPLE,Performance Monitor Sample Register"
|
|
bitfld.long 0x4 4. "SAMPLE_EX_CNT,Sample execution counter" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "SAMPLE_S_DH,Sample stall counter on data hazard" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "SAMPLE_S_SINOUT,Sample stall counter on stream-in 'and' stream-out interface" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "SAMPLE_S_SOUT,Sample stall counter on stream-out interface" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "SAMPLE_S_SIN,Sample stall counter on stream-in interface" "0,1"
|
|
rgroup.long 0x508++0x13
|
|
line.long 0x0 "STALL_STREAMIN,Stream-in Stall Counter"
|
|
hexmask.long 0x0 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0x4 "STALL_STREAMOUT,Stream-out Stall Counter"
|
|
hexmask.long 0x4 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0x8 "STALL_STREAMINOUT,Stream-in and Stream-out Stall Counter"
|
|
hexmask.long 0x8 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0xC "STALL_DATAHAZARD,Data Hazard Stall Counter"
|
|
hexmask.long 0xC 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0x10 "EXEC_COUNTER,Execution Cycle Counter"
|
|
hexmask.long 0x10 0.--31. 1. "CYCLES,Number of execution cycles."
|
|
group.long 0x580++0xF
|
|
line.long 0x0 "IMEM_ERROR_INJECT_ADDR,Instruction Memory Error Injection Address"
|
|
hexmask.long.byte 0x0 0.--5. 1. "ADDR,Instruction memory address for error injection."
|
|
line.long 0x4 "IMEM_ERROR_VECTOR0,Instruction Memory Error Low Vector"
|
|
hexmask.long 0x4 0.--31. 1. "ERR_VEC0,Lower 32-bits of error vector."
|
|
line.long 0x8 "IMEM_ERROR_VECTOR1,Instruction Memory Error High Vector"
|
|
bitfld.long 0x8 31. "ERR_EN,Error injection enable" "0: No error is injected.,1: Error is injected. ECC syndrome and SEC-DED.."
|
|
newline
|
|
hexmask.long.byte 0x8 0.--6. 1. "ERR_VEC1,Higher 7-bits of error vector."
|
|
line.long 0xC "IMEM_ERROR_INJECT_STAT,Instruction Memory Error Inject Status Register"
|
|
bitfld.long 0xC 31. "LOC_ACC,This field provides the status of the location of instruction memory at which error is injected was accessed by IPUS core" "0: Instruction memory location was not accessed.,1: Instruction memory location was accessed and.."
|
|
newline
|
|
hexmask.long.byte 0xC 8.--14. 1. "SYNDROME,7-bit syndrome found when error was injected."
|
|
newline
|
|
rbitfld.long 0xC 1. "DED,Double bit error was detected." "0,1"
|
|
newline
|
|
rbitfld.long 0xC 0. "SEC,Single bit error was detected and corrected." "0,1"
|
|
group.long 0x600++0x3
|
|
line.long 0x0 "RESET_REG,Reset Register"
|
|
bitfld.long 0x0 1. "HARD_RESET,Writing 1 to this field provides a hard reset to the IPUS module" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SOFT_RESET,Writing 1 to this field provides a soft reset to the IPUS module" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "IPUV (Image Processing Unit - Vector)"
|
|
base ad:0x0
|
|
tree "IPUV_0"
|
|
base ad:0x7C062000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "HOST_START,Command and Start Register"
|
|
hexmask.long.byte 0x0 16.--23. 1. "CSA,This field provides as a status the start address for the ongoing line processing."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "NSA,This field provides the address location in IRAM from where the processing of the next line starts"
|
|
line.long 0x4 "HOST_STATUS,Core Status Register"
|
|
hexmask.long.word 0x4 16.--31. 1. "REMAIN_PIXELS,Indicates the number of the pixels remaining to be processed"
|
|
newline
|
|
rbitfld.long 0x4 10. "DEBUG_STATUS,This field provides the debug status of the IPUV core." "0: In execution Mode,1: In Debug Mode"
|
|
newline
|
|
rbitfld.long 0x4 8.--9. "CORE_STATUS,This field indicates the IPUV core status and number of triggers that has been buffered." "0: Idle,1: Running,?,?"
|
|
newline
|
|
bitfld.long 0x4 0.--1. "N_EVENTS,This fields reflects the value of the event counter" "0,1,2,3"
|
|
line.long 0x8 "HOST_POS,Position Configuration Register"
|
|
hexmask.long.word 0x8 16.--31. 1. "XPOS,This Field indicates the horizontal position of the next line."
|
|
newline
|
|
hexmask.long.word 0x8 0.--15. 1. "YPOS,This field indicates the line number of the next line to be processed."
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x0 "HOST_CURRPOS,Current Position Status Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "CURR_XPOS,Provides the horizontal pixel position (XPOS) for the currently processed line."
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "CURR_YPOS,Provides the status the line number of the currently processed line."
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "HOST_XCFG,Line Width and Step configuration Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "XSIZE,This field provides the width in terms of number of pixel components of the next line to be processed"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "XSTEP,This field provides the next incremental step for the XPOS counter" "0: XPOS increment step is 4,1: XPOS increment step is 1,?,?"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "HOST_CURRXCFG,Current Line width and Step Status Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "CURR_XSIZE,This field provides the width in terms of number of pixel components of the current line to be processed"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "CURR_XSTEP,This field indicates the current XSTEP being used for processing." "0: XPOS increment step is 4,1: XPOS increment step is 1,?,?"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "HOST_INCFG,IN Matrix Configuration Register"
|
|
rbitfld.long 0x0 28. "CURR_EN_LINE4,Enable status for fifth row vector in 5x8 neighbourhood mode" "0: Fifth row-vector for currently line processed is..,1: Fifth row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x0 27. "CURR_EN_LINE3,Enable status for fourth row vector in 5x8 neighbourhood mode" "0: Fourth row-vector for currently line processed..,1: Fourth row-vector for currently line processed.."
|
|
newline
|
|
rbitfld.long 0x0 26. "CURR_EN_LINE2,Enable status for third row vector in 5x8 neighbourhood mode" "0: Third row-vector for currently line processed is..,1: Third row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x0 25. "CURR_EN_LINE1,Enable status for second row vector in 5x8 neighbourhood mode" "0: Second row-vector for currently line processed..,1: Second row-vector for currently line processed.."
|
|
newline
|
|
rbitfld.long 0x0 24. "CURR_EN_LINE0,Enable status for first row vector in 5x8 neighbourhood mode" "0: First row-vector for currently line processed is..,1: First row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x0 18. "CURR_NHOOD,This field provides the neighbourhood position of the elements in IN matrix" "0: For the ongoing execution IN Matrix is in 5x8..,?"
|
|
newline
|
|
rbitfld.long 0x0 16.--17. "CURR_IN_SHIFT,This field indicates the value currently being used for shifting each 1x8 row-vector in IN matrix" "0: Row vector of IN Matrix would be shifted by 4,1: Row vector of IN Matrix would be shifted by 1,?,?"
|
|
newline
|
|
bitfld.long 0x0 12. "EN_LINE4,This field enables the first row-vector of IN matrix for next line to be processed" "0: Disable fifth 1x8 line of IN matrix for..,1: Enable fifth 1x8 line of IN matrix for next-line.."
|
|
newline
|
|
bitfld.long 0x0 11. "EN_LINE3,This field enables the first row-vector of IN matrix for next line to be processed" "0: Disable fourth 1x8 line of IN matrix for..,1: Enable fourth 1x8 line of IN matrix for.."
|
|
newline
|
|
bitfld.long 0x0 10. "EN_LINE2,This field enables the first row-vector of IN matrix for next line to be processed" "0: Disable third 1x8 line of IN matrix for..,1: Enable third 1x8 line of IN matrix for next-line.."
|
|
newline
|
|
bitfld.long 0x0 9. "EN_LINE1,This field enables the first row-vector of IN matrix for next line to be processed" "0: Disable second 1x8 line of IN matrix for..,1: Enable second 1x8 line of IN matrix for.."
|
|
newline
|
|
bitfld.long 0x0 8. "EN_LINE0,This field enables the first row-vector of IN matrix for next line to be processed" "0: Disable first 1x8 line of IN matrix for..,1: Enable first 1x8 line of IN matrix for next-line.."
|
|
newline
|
|
bitfld.long 0x0 2. "NHOOD,This field provides the neighbourhood position of the elements in IN matrix" "0: For the ongoing execution IN Matrix is in 5x8..,?"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "IN_SHIFT,This field indicates the value by which input 1x8 vector will be shifted when execution for the next line begins" "0: For next line processing shift the row vector of..,1: For next line processing shift the row vector of..,?,?"
|
|
group.long 0x24++0x3
|
|
line.long 0x0 "HOST_OUTCFG,OUT Matrix Configuration Register"
|
|
rbitfld.long 0x0 26. "CURR_EN_OUT2,This field indicates the status of the stream-out channel corresponding to OUT8-OUT11 vector for the current line processing" "0: Stream-out 2 interface is disabled.,1: Stream-out 2 interface is enabled."
|
|
newline
|
|
rbitfld.long 0x0 25. "CURR_EN_OUT1,This field indicates the status of the stream-out channel corresponding to OUT4-OUT7 vector for the current line processing" "0: Stream-out 1 interface is disabled.,1: Stream-out 1 interface is enabled."
|
|
newline
|
|
rbitfld.long 0x0 24. "CURR_EN_OUT0,This field indicates the status of the stream-out channel corresponding to OUT0-OUT3 vector for the current line processing" "0: Stream-out 0 interface is disabled.,1: Stream-out 0 interface is enabled."
|
|
newline
|
|
rbitfld.long 0x0 16.--17. "CURR_OUT_SHIFT,This field indicates the value currently being used for shifting each 1x4 row-vector in OUT matrix." "0: For next line processing shift the row vector of..,1: For next line processing shift the row vector of..,?,?"
|
|
newline
|
|
bitfld.long 0x0 10. "EN_OUT2,Enables the stream-out channel corresponding to OUT2 element of OUT8-OUT11 vector for processing the next line" "0: Stream-out 2 channel is disabled.,1: Stream-out 2 channel is enabled."
|
|
newline
|
|
bitfld.long 0x0 9. "EN_OUT1,Enables the stream-out channel corresponding to OUT1 element of OUT4-OUT7 vector for processing the next line" "0: Stream-out 1 channel is disabled.,1: Stream-out 1 channel is enabled."
|
|
newline
|
|
bitfld.long 0x0 8. "EN_OUT0,Enables the stream-out channel corresponding to OUT0 element of OUT0-OUT3 vector for processing the next line" "0: Stream-out 0 channel is disabled.,1: Stream-out 0 channel is enabled."
|
|
newline
|
|
bitfld.long 0x0 0.--1. "OUT_SHIFT,This field indicates the number of elements in the OUT matrix 1x4 vector that will be shifted on the stream interface while execution of the next line. Shift of OUT matrix happens when a DONE instruction with 'o' flag set is executed and the.." "0: For next line processing shift the row vector of..,1: For next line processing shift the row vector of..,?,?"
|
|
group.long 0x40++0xF
|
|
line.long 0x0 "HOST_IMEMA,Instruction Memory Address Register"
|
|
hexmask.long.byte 0x0 0.--5. 1. "IADDR,Pointer into IRAM - This field provides an address pointer to a location of IRAM."
|
|
line.long 0x4 "HOST_IMEMD,Instruction Memory Data Register"
|
|
hexmask.long 0x4 0.--31. 1. "DATA,Read/Write data of IRAM - This field specifies data to be read/written from/into IRAM"
|
|
line.long 0x8 "HOST_DREGA,Data Register-Bank Address Register"
|
|
hexmask.long.byte 0x8 0.--7. 1. "DMEMA,Data memory address pointer - This field provides the pointer to register bank of the IPUV module"
|
|
line.long 0xC "HOST_DREGD,Data Register-Bank Datum Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "DMEMD,Read/Write data of SGPRs - This field specifies data to be read or written from/into SGPRs"
|
|
group.long 0x104++0x23
|
|
line.long 0x0 "S_LINE0_LEN_IN,IN Stream Line0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of the stream"
|
|
line.long 0x4 "S_CH0_CFG_IN,IN Stream Line0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel components" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Step count of channel -- Specifies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x8 "S_LINE0_ADDR_IN,IN Stream Line0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Stream0 start address"
|
|
line.long 0xC "S_LINE1_LEN_IN,IN Stream Line1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of the stream"
|
|
line.long 0x10 "S_CH1_CFG_IN,IN Stream Line1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel components" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Step count of channel -Specifies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x14 "S_LINE1_ADDR_IN,IN Stream Line1 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Stream1 start address"
|
|
line.long 0x18 "S_LINE2_LEN_IN,IN Stream Line2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Length of the stream"
|
|
line.long 0x1C "S_CH2_CFG_IN,IN Stream Line2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel components" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Step count of channel -- Specifies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x20 "S_LINE2_ADDR_IN,IN Stream Line2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Stream2 start address"
|
|
group.long 0x144++0x17
|
|
line.long 0x0 "S_LINE3_LEN_IN,IN Stream Line3 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of the stream"
|
|
line.long 0x4 "S_CH3_CFG_IN,IN Stream Line3 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel components" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Step count of channel -- Specifies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x8 "S_LINE3_ADDR_IN,IN Stream Line3 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Stream3 start address"
|
|
line.long 0xC "S_LINE4_LEN_IN,IN Stream Line4 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of the stream"
|
|
line.long 0x10 "S_CH4_CFG_IN,IN Stream Line4 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel components" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Step count of channel -- Specifies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x14 "S_LINE4_ADDR_IN,IN Stream Line4 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Stream4 start address"
|
|
group.long 0x1C4++0x23
|
|
line.long 0x0 "S_LINE0_LEN_OUT,Stream Out0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of the output stream"
|
|
line.long 0x4 "S_CH0_CFG_OUT,Stream Out0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the output stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "SKIP,Skip count of Channel - Specifies the stride of the stream output channel" "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x8 "S_LINE0_ADDR_OUT,Stream Out0 Address Register"
|
|
hexmask.long 0x8 3.--31. 1. "ADDR,Start address of the output stream"
|
|
line.long 0xC "S_LINE1_LEN_OUT,Stream Out1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of the output stream"
|
|
line.long 0x10 "S_CH1_CFG_OUT,Stream Out1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the output stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "SKIP,Skip count of Channel - Specifies the stride of the stream output channel" "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel components i.e. every..,?,?"
|
|
line.long 0x14 "S_LINE1_ADDR_OUT,Stream Out1 Address Register"
|
|
hexmask.long 0x14 3.--31. 1. "ADDR,Start address of the output stream"
|
|
line.long 0x18 "S_LINE2_LEN_OUT,Stream Out2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Length of the output stream"
|
|
line.long 0x1C "S_CH2_CFG_OUT,Stream Out2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the output stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "SKIP,Skip count of Channel - Specifies the stride of the stream output channel" "0: Stride value is 1 pixel components i.e. every..,1: Stride value is 2 pixel components i.e. every..,?,?"
|
|
line.long 0x20 "S_LINE2_ADDR_OUT,Stream Out2 Address Register"
|
|
hexmask.long 0x20 3.--31. 1. "ADDR,Start address of the output stream"
|
|
rgroup.long 0x204++0x23
|
|
line.long 0x0 "S_CURR_LINE0_LEN_IN,IN Stream Line0 Current Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of stream0"
|
|
line.long 0x4 "S_CURR_CH0_CFG_IN,IN Stream Line0 Current Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Current data-type being used on the streaming interface for stream channel 0" "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the streaming interface for stream 0" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Current scan direction on the streaming interface for stream channel 0" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the streaming interface for stream channel 0" "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Current repeat value on the streaming interface for stream channel 0" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Current step value on streaming interface for stream channel 0" "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel component."
|
|
line.long 0x8 "S_CURR_LINE0_ADDR_IN,IN Stream Line0 Current Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Stream0 start address"
|
|
line.long 0xC "S_CURR_LINE1_LEN_IN,IN Stream Line1 Current Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of the stream1"
|
|
line.long 0x10 "S_CURR_CH1_CFG_IN,IN Stream Line1 Current Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Current data-type being used on the streaming interface for stream channel 1" "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Current boundary width/size on the streaming interface for stream channel 1" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Current scan direction on the streaming interface for stream channel 1." "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Current boundary substitution mode used by the streaming interface for stream channel 1." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Current repeat value used by the streaming interface for stream channel 1." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Current step value used by the streaming interface for stream channel 1" "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel component for stream channel 1"
|
|
line.long 0x14 "S_CURR_LINE1_ADDR_IN,IN Stream Line1 Current Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Stream1 start address"
|
|
line.long 0x18 "S_CURR_LINE2_LEN_IN,IN Stream Line2 Current Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Length of the stream2"
|
|
line.long 0x1C "S_CURR_CH2_CFG_IN,IN Stream Line2 Current Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Current data-type being used on the streaming interface for stream channel 2" "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the streaming interface for stream channel 2" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Current scan direction on the streaming interface for stream channel2" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface for stream channel 2." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Current repeat value on the stream interface for stream channel 2" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Current step value on stream interface for Stream channel 2" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel component."
|
|
line.long 0x20 "S_CURR_LINE2_ADDR_IN,IN Stream Line2 Current Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Stream2 start address"
|
|
rgroup.long 0x244++0x17
|
|
line.long 0x0 "S_CURR_LINE3_LEN_IN,IN Stream Line3 Current Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of the stream3"
|
|
line.long 0x4 "S_CURR_CH3_CFG_IN,IN Stream Line3 Current Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Current data-type being used on the stream interface for stream channel 3" "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface for stream channel 3" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Current scan direction on the streaming interface for stream channel 3." "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the streaming interface for stream channel 3." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Current repeat value on the streaming interface for stream channel 3" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Current step value on streaming interface for stream channel 3" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel component."
|
|
line.long 0x8 "S_CURR_LINE3_ADDR_IN,IN Stream Line3 Current Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Stream3 start address"
|
|
line.long 0xC "S_CURR_LINE4_LEN_IN,IN Stream Line4 Current Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of the stream4"
|
|
line.long 0x10 "S_CURR_CH4_CFG_IN,IN Stream Line4 Current Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Current data-type being used on the stream interface for stream channel 4" "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface for stream channel 4" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Current scan direction on the streaming interface for stream channel 4." "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the streaming interface for stream channel 4." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Current repeat value on the streaming interface for stream channel 4" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Current step value on streaming interface for stream channel 4" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel component."
|
|
line.long 0x14 "S_CURR_LINE4_ADDR_IN,IN Stream Line4 Current Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Stream4 start address"
|
|
rgroup.long 0x2C4++0x23
|
|
line.long 0x0 "S_CURR_LINE0_LEN_OUT,Stream Out0 Current Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Current Length of the output stream for channel 0"
|
|
line.long 0x4 "S_CURR_CH0_CFG_OUT,Stream Out0 Current Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Current datatype on the stream out interface for channel 0." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "SKIP,Current skip value on stream out interface for channel 0." "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x8 "S_CURR_LINE0_ADDR_OUT,Stream Out0 Current Address Register"
|
|
hexmask.long 0x8 3.--31. 1. "ADDR,Current Start address of the output stream for channel 0"
|
|
line.long 0xC "S_CURR_LINE1_LEN_OUT,Stream Out1 Current Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Current Length of the output stream for channel 1"
|
|
line.long 0x10 "S_CURR_CH1_CFG_OUT,Stream Out1 Current Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Current datatype on the streamout interface for channel 1." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "SKIP,Current skip value on stream out interface for channel 1." "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x14 "S_CURR_LINE1_ADDR_OUT,Stream Out1 Current Address Register"
|
|
hexmask.long 0x14 3.--31. 1. "ADDR,Current Start address of the for channel 1"
|
|
line.long 0x18 "S_CURR_LINE2_LEN_OUT,Stream Out2 Current Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Current Length of the channel 2"
|
|
line.long 0x1C "S_CURR_CH2_CFG_OUT,Stream Out2 Current Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Current datatype on the stream out interface for channel 2." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "SKIP,Current skip value on stream out interface for channel 2." "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x20 "S_CURR_LINE2_ADDR_OUT,Stream Out2 Current Address Register"
|
|
hexmask.long 0x20 3.--31. 1. "ADDR,Current Start address of the output for channel 2"
|
|
group.long 0x400++0xF
|
|
line.long 0x0 "DEBUG_MS,Debug Mode and Step Register"
|
|
bitfld.long 0x0 31. "B_FINISH,Break on Finish - Writing 1 in this bit enables breakpoint on finish" "0,1"
|
|
newline
|
|
bitfld.long 0x0 30. "B_WADDR,Break point on Write address - Writing 1 in this bit enables breakpoint on write address" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "B_RADDR,Break point on Read address - Writing 1 in this bit enables breakpoint on read address" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "B_IADDR,Break point on Instruction Fetch - Writing 1 in this bit enables breakpoint on instruction fetch" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "B_POS,Break point on Pixel Position - Writing 1 in this bit enables breakpoint on pixel position" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "B_YPOS,Break point on Line - Writing 1 in this bit enables breakpoint on line" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "B_XPOS,Break point on Pixel Number - Writing 1 in this bit enables breakpoint on pixel number" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--19. 1. "STEP,Step Size - This field is used for specifying the step size of IPUV module when in debug mode."
|
|
newline
|
|
bitfld.long 0x0 1. "CTI_EN,Cross-triggering enable" "0: Disable cross-triggering with CTI.,1: Enable cross-triggering with CTI."
|
|
newline
|
|
bitfld.long 0x0 0. "DBG_ACT,Activate Debug Mode - Writing 1 in this bit makes the IPUV module to enter debug mode." "0,1"
|
|
line.long 0x4 "DEBUG_BKPT_STAT,Debug Breakpoint Status Register"
|
|
bitfld.long 0x4 25. "STEP_REQ,STEP Request - Writing 1 to this bit provides a step request to the IPUV core" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "FINISH,Breakpoint on finish status" "0: Breakpoint on finish did not occur,1: Breakpoint on finish occurred."
|
|
newline
|
|
bitfld.long 0x4 22. "WADDR,Breakpoint on write status" "0: Breakpoint on write did not occur,1: Breakpoint on write occurred"
|
|
newline
|
|
bitfld.long 0x4 21. "RADDR,Breakpoint on read status" "0: Breakpoint on read did not occur.,1: Breakpoint on read occurred."
|
|
newline
|
|
bitfld.long 0x4 20. "IADDR,Instruction fetch breakpoint status" "0: Instruction fetch breakpoint not occurred.,1: Instruction fetch breakpoint occurred."
|
|
newline
|
|
bitfld.long 0x4 19. "POS,Position breakpoint status" "0: Position breakpoint not occurred,1: Position breakpoint occurred"
|
|
newline
|
|
bitfld.long 0x4 18. "YPOS,YPOS breakpoint status" "0: YPOS breakpoint not occurred.,1: YPOS breakpoint occurred."
|
|
newline
|
|
bitfld.long 0x4 17. "XPOS,XPOS breakpoint status" "0: Breakpoint XPOS not occurred.,1: Breakpoint XPOS occurred."
|
|
newline
|
|
bitfld.long 0x4 16. "DBG,Debug mode status: This bit provides the debug status of IPUV core" "0: In execution mode. (Instruction execution..,1: In debug mode. (Instruction execution stalled)"
|
|
newline
|
|
rbitfld.long 0x4 0. "H_DBG,This register provides the status of debug mode acknowledgement upon hardware debug request" "0: In execution mode (No hardware debug request..,1: In debug upon assertion debug request signal."
|
|
line.long 0x8 "DEBUG_BKPT_POS,Debug Breakpoint Position Register"
|
|
hexmask.long.word 0x8 16.--31. 1. "XPOS,Horizontal Pixel position - Specifies the horizontal pixel position for XPOS or POS breakpoint."
|
|
newline
|
|
hexmask.long.word 0x8 0.--15. 1. "YPOS,Vertical Pixel position - Specifies the vertical position (i"
|
|
line.long 0xC "DEBUG_BKPT_ADDR,Debug Breakpoint Address Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. "IADDR,Instruction fetch address - This field holds the instruction address where instruction fetch breakpoint should occur"
|
|
newline
|
|
hexmask.long.byte 0xC 16.--23. 1. "DRADDR,Data read address - This field holds the data address of the register bank from where when reads happens triggers breakpoint on read"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--15. 1. "DWADDR,Data Write address - This field holds the data address of the register bank to where when write happens triggers breakpoint on write"
|
|
rgroup.long 0x414++0x3
|
|
line.long 0x0 "DEBUG_CORE_STAT,Debug Core Status Register"
|
|
bitfld.long 0x0 27. "N,Status of scalar negative flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "Z,Status of scalar zero flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "C,Status of scalar carry flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "OV,Status of scalar overflow flag." "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "PC,This field holds the value of the program counter"
|
|
group.long 0x500++0x7
|
|
line.long 0x0 "PMONITOR_CTRL,Performance Monitor Control Register"
|
|
bitfld.long 0x0 20. "INIT_EX_CNT,This bit is used for clear the execution cycle counter" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "INIT_S_DH,This bit is used for clear the stall counter on data hazards" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "INIT_S_SINOUT,This bit is used for clear the stall counter on stream-in 'and' stream-out interface" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "INIT_S_SOUT,This bit is used for clear the stall counter on stream-out interface" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "INIT_S_SIN,This bit is used for clear the stall counter on stream-in interface" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "STOP_EX_CNT,This bit provides a secondary override for disabling the execution cycle counter." "0: Execution cycle counter is defreezed from..,1: Execution cycle counter is freezed from counting."
|
|
newline
|
|
bitfld.long 0x0 11. "STOP_S_DH,This bit provides a secondary override for disabling the stall counter on data hazard interface." "0: Stall counter on data hazard is defreezed from..,1: Stall counter on data hazard is freezed from.."
|
|
newline
|
|
bitfld.long 0x0 10. "STOP_S_SINOUT,This bit provides a secondary override for disabling the stall counter on stream-in and stream-out interface" "0: stall counter on stream-in 'and' stream-out is..,1: Stall counter on stream-in 'and' stream-out is.."
|
|
newline
|
|
bitfld.long 0x0 9. "STOP_S_SOUT,This bit provides a secondary override for disabling the stall counter on stream-out interface." "0: Stall counter on stream-in is defreezed from..,1: Stall counter on stream-out is freezed from.."
|
|
newline
|
|
bitfld.long 0x0 8. "STOP_S_SIN,This bit provides a secondary override for disabling the stall counter on stream-in interface." "0: Stall counter is defreezed from counting.,1: Stall counter on stream-in is freezed from.."
|
|
newline
|
|
bitfld.long 0x0 4. "EN_EX_CNT,This bit controls the execution cycle counter." "0: Execution counter is inactive. Counter does not..,1: Execution counter is enabled. Counter counts the.."
|
|
newline
|
|
bitfld.long 0x0 3. "EN_S_DH,This bit controls the stall counter that monitors the stalls due to data hazards in the pipeline." "0: Stall counter on stalls due to data hazard is..,1: Stall counter on stalls due to data hazard is.."
|
|
newline
|
|
bitfld.long 0x0 2. "EN_S_SINOUT,This bit controls the stall counter that monitor both stream-in and stream-out stalls occurring in same clock cycle" "0: Stall counter on stream-in and stream-out stalls..,1: Stall counter on stream-in and stream-out stalls.."
|
|
newline
|
|
bitfld.long 0x0 1. "EN_S_SOUT,This bit controls the stall counter on stream-out interface." "0: Stall counter on stream-out stalls is inactive.,1: Stall counter on stream-out stalls is enabled."
|
|
newline
|
|
bitfld.long 0x0 0. "EN_S_SIN,This bit controls the stall counter on stream-in interface." "0: Stall counter on stream-in stalls is inactive.,1: Stall counter on stream-in stalls is enabled."
|
|
line.long 0x4 "PMONITOR_SAMPLE,Performance Monitor Sample Register"
|
|
bitfld.long 0x4 4. "SAMPLE_EX_CNT,Sample execution counter" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "SAMPLE_S_DH,Sample stall counter on data hazard" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "SAMPLE_S_SINOUT,Sample stall counter on stream-in 'and' stream-out interface." "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "SAMPLE_S_SOUT,Sample stall counter on stream-out interface." "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "SAMPLE_S_SIN,Sample stall counter on stream-in interface." "0,1"
|
|
rgroup.long 0x508++0x13
|
|
line.long 0x0 "STALL_STREAMIN,Stream-in Stall Counter"
|
|
hexmask.long 0x0 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0x4 "STALL_STREAMOUT,Stream-out Stall Counter"
|
|
hexmask.long 0x4 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0x8 "STALL_STREAMINOUT,Stream-in and Stream-out Stall Counter"
|
|
hexmask.long 0x8 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0xC "STALL_DATAHAZARD,Data Hazard Stall Counter"
|
|
hexmask.long 0xC 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0x10 "EXEC_COUNTER,Execution Cycle Counter"
|
|
hexmask.long 0x10 0.--31. 1. "CYCLES,Number of execution cycles."
|
|
group.long 0x580++0xF
|
|
line.long 0x0 "IMEM_ERROR_INJECT_ADDR,IMEM Error Inject Address Register"
|
|
hexmask.long.byte 0x0 0.--5. 1. "ADDR,Instruction memory address for error injection."
|
|
line.long 0x4 "IMEM_ERROR_VECTOR0,IMEM Error Inject Vector0"
|
|
hexmask.long 0x4 0.--31. 1. "ERR_VEC0,Lower 32-bits of error vector."
|
|
line.long 0x8 "IMEM_ERROR_VECTOR1,IMEM Error Inject Vector1"
|
|
bitfld.long 0x8 31. "ERR_EN,Error injection enable" "0: No error is injected,1: Error is injected. ECC syndrome and SEC-DED.."
|
|
newline
|
|
hexmask.long.byte 0x8 0.--6. 1. "ERR_VEC1,Upper 7-bits of error vector."
|
|
line.long 0xC "IMEM_ERROR_INJECT_STAT,IMEM Error Injection Status register"
|
|
bitfld.long 0xC 31. "LOC_ACC,This field provides the status of the location of instruction memory at which error is injected was accessed by IPUV core" "0: Instruction memory location was not accessed.,1: Instruction memory location was accessed and.."
|
|
newline
|
|
hexmask.long.byte 0xC 8.--14. 1. "SYNDROME,7-bit syndrome found when error was injected."
|
|
newline
|
|
rbitfld.long 0xC 1. "DED,Double bit error was detected" "0,1"
|
|
newline
|
|
rbitfld.long 0xC 0. "SEC,Single bit error was detected and corrected." "0,1"
|
|
group.long 0x600++0x3
|
|
line.long 0x0 "RESET_REG,Reset Register"
|
|
bitfld.long 0x0 1. "HARD_RESET,Writing 1 to this field provides a hard reset to the IPUV module" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SOFT_RESET,Writing 1 to this field provides a soft reset to the IPUV module" "0,1"
|
|
tree.end
|
|
tree "IPUV_1"
|
|
base ad:0x7C063000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "HOST_START,Command and Start Register"
|
|
hexmask.long.byte 0x0 16.--23. 1. "CSA,This field provides as a status the start address for the ongoing line processing."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "NSA,This field provides the address location in IRAM from where the processing of the next line starts"
|
|
line.long 0x4 "HOST_STATUS,Core Status Register"
|
|
hexmask.long.word 0x4 16.--31. 1. "REMAIN_PIXELS,Indicates the number of the pixels remaining to be processed"
|
|
newline
|
|
rbitfld.long 0x4 10. "DEBUG_STATUS,This field provides the debug status of the IPUV core." "0: In execution Mode,1: In Debug Mode"
|
|
newline
|
|
rbitfld.long 0x4 8.--9. "CORE_STATUS,This field indicates the IPUV core status and number of triggers that has been buffered." "0: Idle,1: Running,?,?"
|
|
newline
|
|
bitfld.long 0x4 0.--1. "N_EVENTS,This fields reflects the value of the event counter" "0,1,2,3"
|
|
line.long 0x8 "HOST_POS,Position Configuration Register"
|
|
hexmask.long.word 0x8 16.--31. 1. "XPOS,This Field indicates the horizontal position of the next line."
|
|
newline
|
|
hexmask.long.word 0x8 0.--15. 1. "YPOS,This field indicates the line number of the next line to be processed."
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x0 "HOST_CURRPOS,Current Position Status Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "CURR_XPOS,Provides the horizontal pixel position (XPOS) for the currently processed line."
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "CURR_YPOS,Provides the status the line number of the currently processed line."
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "HOST_XCFG,Line Width and Step configuration Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "XSIZE,This field provides the width in terms of number of pixel components of the next line to be processed"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "XSTEP,This field provides the next incremental step for the XPOS counter" "0: XPOS increment step is 4,1: XPOS increment step is 1,?,?"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "HOST_CURRXCFG,Current Line width and Step Status Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "CURR_XSIZE,This field provides the width in terms of number of pixel components of the current line to be processed"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "CURR_XSTEP,This field indicates the current XSTEP being used for processing." "0: XPOS increment step is 4,1: XPOS increment step is 1,?,?"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "HOST_INCFG,IN Matrix Configuration Register"
|
|
rbitfld.long 0x0 28. "CURR_EN_LINE4,Enable status for fifth row vector in 5x8 neighbourhood mode" "0: Fifth row-vector for currently line processed is..,1: Fifth row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x0 27. "CURR_EN_LINE3,Enable status for fourth row vector in 5x8 neighbourhood mode" "0: Fourth row-vector for currently line processed..,1: Fourth row-vector for currently line processed.."
|
|
newline
|
|
rbitfld.long 0x0 26. "CURR_EN_LINE2,Enable status for third row vector in 5x8 neighbourhood mode" "0: Third row-vector for currently line processed is..,1: Third row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x0 25. "CURR_EN_LINE1,Enable status for second row vector in 5x8 neighbourhood mode" "0: Second row-vector for currently line processed..,1: Second row-vector for currently line processed.."
|
|
newline
|
|
rbitfld.long 0x0 24. "CURR_EN_LINE0,Enable status for first row vector in 5x8 neighbourhood mode" "0: First row-vector for currently line processed is..,1: First row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x0 18. "CURR_NHOOD,This field provides the neighbourhood position of the elements in IN matrix" "0: For the ongoing execution IN Matrix is in 5x8..,?"
|
|
newline
|
|
rbitfld.long 0x0 16.--17. "CURR_IN_SHIFT,This field indicates the value currently being used for shifting each 1x8 row-vector in IN matrix" "0: Row vector of IN Matrix would be shifted by 4,1: Row vector of IN Matrix would be shifted by 1,?,?"
|
|
newline
|
|
bitfld.long 0x0 12. "EN_LINE4,This field enables the first row-vector of IN matrix for next line to be processed" "0: Disable fifth 1x8 line of IN matrix for..,1: Enable fifth 1x8 line of IN matrix for next-line.."
|
|
newline
|
|
bitfld.long 0x0 11. "EN_LINE3,This field enables the first row-vector of IN matrix for next line to be processed" "0: Disable fourth 1x8 line of IN matrix for..,1: Enable fourth 1x8 line of IN matrix for.."
|
|
newline
|
|
bitfld.long 0x0 10. "EN_LINE2,This field enables the first row-vector of IN matrix for next line to be processed" "0: Disable third 1x8 line of IN matrix for..,1: Enable third 1x8 line of IN matrix for next-line.."
|
|
newline
|
|
bitfld.long 0x0 9. "EN_LINE1,This field enables the first row-vector of IN matrix for next line to be processed" "0: Disable second 1x8 line of IN matrix for..,1: Enable second 1x8 line of IN matrix for.."
|
|
newline
|
|
bitfld.long 0x0 8. "EN_LINE0,This field enables the first row-vector of IN matrix for next line to be processed" "0: Disable first 1x8 line of IN matrix for..,1: Enable first 1x8 line of IN matrix for next-line.."
|
|
newline
|
|
bitfld.long 0x0 2. "NHOOD,This field provides the neighbourhood position of the elements in IN matrix" "0: For the ongoing execution IN Matrix is in 5x8..,?"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "IN_SHIFT,This field indicates the value by which input 1x8 vector will be shifted when execution for the next line begins" "0: For next line processing shift the row vector of..,1: For next line processing shift the row vector of..,?,?"
|
|
group.long 0x24++0x3
|
|
line.long 0x0 "HOST_OUTCFG,OUT Matrix Configuration Register"
|
|
rbitfld.long 0x0 26. "CURR_EN_OUT2,This field indicates the status of the stream-out channel corresponding to OUT8-OUT11 vector for the current line processing" "0: Stream-out 2 interface is disabled.,1: Stream-out 2 interface is enabled."
|
|
newline
|
|
rbitfld.long 0x0 25. "CURR_EN_OUT1,This field indicates the status of the stream-out channel corresponding to OUT4-OUT7 vector for the current line processing" "0: Stream-out 1 interface is disabled.,1: Stream-out 1 interface is enabled."
|
|
newline
|
|
rbitfld.long 0x0 24. "CURR_EN_OUT0,This field indicates the status of the stream-out channel corresponding to OUT0-OUT3 vector for the current line processing" "0: Stream-out 0 interface is disabled.,1: Stream-out 0 interface is enabled."
|
|
newline
|
|
rbitfld.long 0x0 16.--17. "CURR_OUT_SHIFT,This field indicates the value currently being used for shifting each 1x4 row-vector in OUT matrix." "0: For next line processing shift the row vector of..,1: For next line processing shift the row vector of..,?,?"
|
|
newline
|
|
bitfld.long 0x0 10. "EN_OUT2,Enables the stream-out channel corresponding to OUT2 element of OUT8-OUT11 vector for processing the next line" "0: Stream-out 2 channel is disabled.,1: Stream-out 2 channel is enabled."
|
|
newline
|
|
bitfld.long 0x0 9. "EN_OUT1,Enables the stream-out channel corresponding to OUT1 element of OUT4-OUT7 vector for processing the next line" "0: Stream-out 1 channel is disabled.,1: Stream-out 1 channel is enabled."
|
|
newline
|
|
bitfld.long 0x0 8. "EN_OUT0,Enables the stream-out channel corresponding to OUT0 element of OUT0-OUT3 vector for processing the next line" "0: Stream-out 0 channel is disabled.,1: Stream-out 0 channel is enabled."
|
|
newline
|
|
bitfld.long 0x0 0.--1. "OUT_SHIFT,This field indicates the number of elements in the OUT matrix 1x4 vector that will be shifted on the stream interface while execution of the next line. Shift of OUT matrix happens when a DONE instruction with 'o' flag set is executed and the.." "0: For next line processing shift the row vector of..,1: For next line processing shift the row vector of..,?,?"
|
|
group.long 0x40++0xF
|
|
line.long 0x0 "HOST_IMEMA,Instruction Memory Address Register"
|
|
hexmask.long.byte 0x0 0.--5. 1. "IADDR,Pointer into IRAM - This field provides an address pointer to a location of IRAM."
|
|
line.long 0x4 "HOST_IMEMD,Instruction Memory Data Register"
|
|
hexmask.long 0x4 0.--31. 1. "DATA,Read/Write data of IRAM - This field specifies data to be read/written from/into IRAM"
|
|
line.long 0x8 "HOST_DREGA,Data Register-Bank Address Register"
|
|
hexmask.long.byte 0x8 0.--7. 1. "DMEMA,Data memory address pointer - This field provides the pointer to register bank of the IPUV module"
|
|
line.long 0xC "HOST_DREGD,Data Register-Bank Datum Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "DMEMD,Read/Write data of SGPRs - This field specifies data to be read or written from/into SGPRs"
|
|
group.long 0x104++0x23
|
|
line.long 0x0 "S_LINE0_LEN_IN,IN Stream Line0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of the stream"
|
|
line.long 0x4 "S_CH0_CFG_IN,IN Stream Line0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel components" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Step count of channel -- Specifies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x8 "S_LINE0_ADDR_IN,IN Stream Line0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Stream0 start address"
|
|
line.long 0xC "S_LINE1_LEN_IN,IN Stream Line1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of the stream"
|
|
line.long 0x10 "S_CH1_CFG_IN,IN Stream Line1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel components" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Step count of channel -Specifies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x14 "S_LINE1_ADDR_IN,IN Stream Line1 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Stream1 start address"
|
|
line.long 0x18 "S_LINE2_LEN_IN,IN Stream Line2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Length of the stream"
|
|
line.long 0x1C "S_CH2_CFG_IN,IN Stream Line2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel components" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Step count of channel -- Specifies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x20 "S_LINE2_ADDR_IN,IN Stream Line2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Stream2 start address"
|
|
group.long 0x144++0x17
|
|
line.long 0x0 "S_LINE3_LEN_IN,IN Stream Line3 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of the stream"
|
|
line.long 0x4 "S_CH3_CFG_IN,IN Stream Line3 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel components" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Step count of channel -- Specifies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x8 "S_LINE3_ADDR_IN,IN Stream Line3 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Stream3 start address"
|
|
line.long 0xC "S_LINE4_LEN_IN,IN Stream Line4 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of the stream"
|
|
line.long 0x10 "S_CH4_CFG_IN,IN Stream Line4 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel components" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Step count of channel -- Specifies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x14 "S_LINE4_ADDR_IN,IN Stream Line4 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Stream4 start address"
|
|
group.long 0x1C4++0x23
|
|
line.long 0x0 "S_LINE0_LEN_OUT,Stream Out0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of the output stream"
|
|
line.long 0x4 "S_CH0_CFG_OUT,Stream Out0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the output stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "SKIP,Skip count of Channel - Specifies the stride of the stream output channel" "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x8 "S_LINE0_ADDR_OUT,Stream Out0 Address Register"
|
|
hexmask.long 0x8 3.--31. 1. "ADDR,Start address of the output stream"
|
|
line.long 0xC "S_LINE1_LEN_OUT,Stream Out1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of the output stream"
|
|
line.long 0x10 "S_CH1_CFG_OUT,Stream Out1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the output stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "SKIP,Skip count of Channel - Specifies the stride of the stream output channel" "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel components i.e. every..,?,?"
|
|
line.long 0x14 "S_LINE1_ADDR_OUT,Stream Out1 Address Register"
|
|
hexmask.long 0x14 3.--31. 1. "ADDR,Start address of the output stream"
|
|
line.long 0x18 "S_LINE2_LEN_OUT,Stream Out2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Length of the output stream"
|
|
line.long 0x1C "S_CH2_CFG_OUT,Stream Out2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the output stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "SKIP,Skip count of Channel - Specifies the stride of the stream output channel" "0: Stride value is 1 pixel components i.e. every..,1: Stride value is 2 pixel components i.e. every..,?,?"
|
|
line.long 0x20 "S_LINE2_ADDR_OUT,Stream Out2 Address Register"
|
|
hexmask.long 0x20 3.--31. 1. "ADDR,Start address of the output stream"
|
|
rgroup.long 0x204++0x23
|
|
line.long 0x0 "S_CURR_LINE0_LEN_IN,IN Stream Line0 Current Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of stream0"
|
|
line.long 0x4 "S_CURR_CH0_CFG_IN,IN Stream Line0 Current Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Current data-type being used on the streaming interface for stream channel 0" "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the streaming interface for stream 0" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Current scan direction on the streaming interface for stream channel 0" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the streaming interface for stream channel 0" "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Current repeat value on the streaming interface for stream channel 0" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Current step value on streaming interface for stream channel 0" "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel component."
|
|
line.long 0x8 "S_CURR_LINE0_ADDR_IN,IN Stream Line0 Current Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Stream0 start address"
|
|
line.long 0xC "S_CURR_LINE1_LEN_IN,IN Stream Line1 Current Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of the stream1"
|
|
line.long 0x10 "S_CURR_CH1_CFG_IN,IN Stream Line1 Current Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Current data-type being used on the streaming interface for stream channel 1" "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Current boundary width/size on the streaming interface for stream channel 1" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Current scan direction on the streaming interface for stream channel 1." "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Current boundary substitution mode used by the streaming interface for stream channel 1." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Current repeat value used by the streaming interface for stream channel 1." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Current step value used by the streaming interface for stream channel 1" "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel component for stream channel 1"
|
|
line.long 0x14 "S_CURR_LINE1_ADDR_IN,IN Stream Line1 Current Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Stream1 start address"
|
|
line.long 0x18 "S_CURR_LINE2_LEN_IN,IN Stream Line2 Current Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Length of the stream2"
|
|
line.long 0x1C "S_CURR_CH2_CFG_IN,IN Stream Line2 Current Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Current data-type being used on the streaming interface for stream channel 2" "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the streaming interface for stream channel 2" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Current scan direction on the streaming interface for stream channel2" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface for stream channel 2." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Current repeat value on the stream interface for stream channel 2" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Current step value on stream interface for Stream channel 2" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel component."
|
|
line.long 0x20 "S_CURR_LINE2_ADDR_IN,IN Stream Line2 Current Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Stream2 start address"
|
|
rgroup.long 0x244++0x17
|
|
line.long 0x0 "S_CURR_LINE3_LEN_IN,IN Stream Line3 Current Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of the stream3"
|
|
line.long 0x4 "S_CURR_CH3_CFG_IN,IN Stream Line3 Current Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Current data-type being used on the stream interface for stream channel 3" "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface for stream channel 3" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Current scan direction on the streaming interface for stream channel 3." "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the streaming interface for stream channel 3." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Current repeat value on the streaming interface for stream channel 3" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Current step value on streaming interface for stream channel 3" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel component."
|
|
line.long 0x8 "S_CURR_LINE3_ADDR_IN,IN Stream Line3 Current Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Stream3 start address"
|
|
line.long 0xC "S_CURR_LINE4_LEN_IN,IN Stream Line4 Current Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of the stream4"
|
|
line.long 0x10 "S_CURR_CH4_CFG_IN,IN Stream Line4 Current Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Current data-type being used on the stream interface for stream channel 4" "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface for stream channel 4" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Current scan direction on the streaming interface for stream channel 4." "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the streaming interface for stream channel 4." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Current repeat value on the streaming interface for stream channel 4" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Current step value on streaming interface for stream channel 4" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel component."
|
|
line.long 0x14 "S_CURR_LINE4_ADDR_IN,IN Stream Line4 Current Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Stream4 start address"
|
|
rgroup.long 0x2C4++0x23
|
|
line.long 0x0 "S_CURR_LINE0_LEN_OUT,Stream Out0 Current Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Current Length of the output stream for channel 0"
|
|
line.long 0x4 "S_CURR_CH0_CFG_OUT,Stream Out0 Current Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Current datatype on the stream out interface for channel 0." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "SKIP,Current skip value on stream out interface for channel 0." "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x8 "S_CURR_LINE0_ADDR_OUT,Stream Out0 Current Address Register"
|
|
hexmask.long 0x8 3.--31. 1. "ADDR,Current Start address of the output stream for channel 0"
|
|
line.long 0xC "S_CURR_LINE1_LEN_OUT,Stream Out1 Current Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Current Length of the output stream for channel 1"
|
|
line.long 0x10 "S_CURR_CH1_CFG_OUT,Stream Out1 Current Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Current datatype on the streamout interface for channel 1." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "SKIP,Current skip value on stream out interface for channel 1." "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x14 "S_CURR_LINE1_ADDR_OUT,Stream Out1 Current Address Register"
|
|
hexmask.long 0x14 3.--31. 1. "ADDR,Current Start address of the for channel 1"
|
|
line.long 0x18 "S_CURR_LINE2_LEN_OUT,Stream Out2 Current Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Current Length of the channel 2"
|
|
line.long 0x1C "S_CURR_CH2_CFG_OUT,Stream Out2 Current Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Current datatype on the stream out interface for channel 2." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "SKIP,Current skip value on stream out interface for channel 2." "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x20 "S_CURR_LINE2_ADDR_OUT,Stream Out2 Current Address Register"
|
|
hexmask.long 0x20 3.--31. 1. "ADDR,Current Start address of the output for channel 2"
|
|
group.long 0x400++0xF
|
|
line.long 0x0 "DEBUG_MS,Debug Mode and Step Register"
|
|
bitfld.long 0x0 31. "B_FINISH,Break on Finish - Writing 1 in this bit enables breakpoint on finish" "0,1"
|
|
newline
|
|
bitfld.long 0x0 30. "B_WADDR,Break point on Write address - Writing 1 in this bit enables breakpoint on write address" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "B_RADDR,Break point on Read address - Writing 1 in this bit enables breakpoint on read address" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "B_IADDR,Break point on Instruction Fetch - Writing 1 in this bit enables breakpoint on instruction fetch" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "B_POS,Break point on Pixel Position - Writing 1 in this bit enables breakpoint on pixel position" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "B_YPOS,Break point on Line - Writing 1 in this bit enables breakpoint on line" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "B_XPOS,Break point on Pixel Number - Writing 1 in this bit enables breakpoint on pixel number" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--19. 1. "STEP,Step Size - This field is used for specifying the step size of IPUV module when in debug mode."
|
|
newline
|
|
bitfld.long 0x0 1. "CTI_EN,Cross-triggering enable" "0: Disable cross-triggering with CTI.,1: Enable cross-triggering with CTI."
|
|
newline
|
|
bitfld.long 0x0 0. "DBG_ACT,Activate Debug Mode - Writing 1 in this bit makes the IPUV module to enter debug mode." "0,1"
|
|
line.long 0x4 "DEBUG_BKPT_STAT,Debug Breakpoint Status Register"
|
|
bitfld.long 0x4 25. "STEP_REQ,STEP Request - Writing 1 to this bit provides a step request to the IPUV core" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "FINISH,Breakpoint on finish status" "0: Breakpoint on finish did not occur,1: Breakpoint on finish occurred."
|
|
newline
|
|
bitfld.long 0x4 22. "WADDR,Breakpoint on write status" "0: Breakpoint on write did not occur,1: Breakpoint on write occurred"
|
|
newline
|
|
bitfld.long 0x4 21. "RADDR,Breakpoint on read status" "0: Breakpoint on read did not occur.,1: Breakpoint on read occurred."
|
|
newline
|
|
bitfld.long 0x4 20. "IADDR,Instruction fetch breakpoint status" "0: Instruction fetch breakpoint not occurred.,1: Instruction fetch breakpoint occurred."
|
|
newline
|
|
bitfld.long 0x4 19. "POS,Position breakpoint status" "0: Position breakpoint not occurred,1: Position breakpoint occurred"
|
|
newline
|
|
bitfld.long 0x4 18. "YPOS,YPOS breakpoint status" "0: YPOS breakpoint not occurred.,1: YPOS breakpoint occurred."
|
|
newline
|
|
bitfld.long 0x4 17. "XPOS,XPOS breakpoint status" "0: Breakpoint XPOS not occurred.,1: Breakpoint XPOS occurred."
|
|
newline
|
|
bitfld.long 0x4 16. "DBG,Debug mode status: This bit provides the debug status of IPUV core" "0: In execution mode. (Instruction execution..,1: In debug mode. (Instruction execution stalled)"
|
|
newline
|
|
rbitfld.long 0x4 0. "H_DBG,This register provides the status of debug mode acknowledgement upon hardware debug request" "0: In execution mode (No hardware debug request..,1: In debug upon assertion debug request signal."
|
|
line.long 0x8 "DEBUG_BKPT_POS,Debug Breakpoint Position Register"
|
|
hexmask.long.word 0x8 16.--31. 1. "XPOS,Horizontal Pixel position - Specifies the horizontal pixel position for XPOS or POS breakpoint."
|
|
newline
|
|
hexmask.long.word 0x8 0.--15. 1. "YPOS,Vertical Pixel position - Specifies the vertical position (i"
|
|
line.long 0xC "DEBUG_BKPT_ADDR,Debug Breakpoint Address Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. "IADDR,Instruction fetch address - This field holds the instruction address where instruction fetch breakpoint should occur"
|
|
newline
|
|
hexmask.long.byte 0xC 16.--23. 1. "DRADDR,Data read address - This field holds the data address of the register bank from where when reads happens triggers breakpoint on read"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--15. 1. "DWADDR,Data Write address - This field holds the data address of the register bank to where when write happens triggers breakpoint on write"
|
|
rgroup.long 0x414++0x3
|
|
line.long 0x0 "DEBUG_CORE_STAT,Debug Core Status Register"
|
|
bitfld.long 0x0 27. "N,Status of scalar negative flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "Z,Status of scalar zero flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "C,Status of scalar carry flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "OV,Status of scalar overflow flag." "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "PC,This field holds the value of the program counter"
|
|
group.long 0x500++0x7
|
|
line.long 0x0 "PMONITOR_CTRL,Performance Monitor Control Register"
|
|
bitfld.long 0x0 20. "INIT_EX_CNT,This bit is used for clear the execution cycle counter" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "INIT_S_DH,This bit is used for clear the stall counter on data hazards" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "INIT_S_SINOUT,This bit is used for clear the stall counter on stream-in 'and' stream-out interface" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "INIT_S_SOUT,This bit is used for clear the stall counter on stream-out interface" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "INIT_S_SIN,This bit is used for clear the stall counter on stream-in interface" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "STOP_EX_CNT,This bit provides a secondary override for disabling the execution cycle counter." "0: Execution cycle counter is defreezed from..,1: Execution cycle counter is freezed from counting."
|
|
newline
|
|
bitfld.long 0x0 11. "STOP_S_DH,This bit provides a secondary override for disabling the stall counter on data hazard interface." "0: Stall counter on data hazard is defreezed from..,1: Stall counter on data hazard is freezed from.."
|
|
newline
|
|
bitfld.long 0x0 10. "STOP_S_SINOUT,This bit provides a secondary override for disabling the stall counter on stream-in and stream-out interface" "0: stall counter on stream-in 'and' stream-out is..,1: Stall counter on stream-in 'and' stream-out is.."
|
|
newline
|
|
bitfld.long 0x0 9. "STOP_S_SOUT,This bit provides a secondary override for disabling the stall counter on stream-out interface." "0: Stall counter on stream-in is defreezed from..,1: Stall counter on stream-out is freezed from.."
|
|
newline
|
|
bitfld.long 0x0 8. "STOP_S_SIN,This bit provides a secondary override for disabling the stall counter on stream-in interface." "0: Stall counter is defreezed from counting.,1: Stall counter on stream-in is freezed from.."
|
|
newline
|
|
bitfld.long 0x0 4. "EN_EX_CNT,This bit controls the execution cycle counter." "0: Execution counter is inactive. Counter does not..,1: Execution counter is enabled. Counter counts the.."
|
|
newline
|
|
bitfld.long 0x0 3. "EN_S_DH,This bit controls the stall counter that monitors the stalls due to data hazards in the pipeline." "0: Stall counter on stalls due to data hazard is..,1: Stall counter on stalls due to data hazard is.."
|
|
newline
|
|
bitfld.long 0x0 2. "EN_S_SINOUT,This bit controls the stall counter that monitor both stream-in and stream-out stalls occurring in same clock cycle" "0: Stall counter on stream-in and stream-out stalls..,1: Stall counter on stream-in and stream-out stalls.."
|
|
newline
|
|
bitfld.long 0x0 1. "EN_S_SOUT,This bit controls the stall counter on stream-out interface." "0: Stall counter on stream-out stalls is inactive.,1: Stall counter on stream-out stalls is enabled."
|
|
newline
|
|
bitfld.long 0x0 0. "EN_S_SIN,This bit controls the stall counter on stream-in interface." "0: Stall counter on stream-in stalls is inactive.,1: Stall counter on stream-in stalls is enabled."
|
|
line.long 0x4 "PMONITOR_SAMPLE,Performance Monitor Sample Register"
|
|
bitfld.long 0x4 4. "SAMPLE_EX_CNT,Sample execution counter" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "SAMPLE_S_DH,Sample stall counter on data hazard" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "SAMPLE_S_SINOUT,Sample stall counter on stream-in 'and' stream-out interface." "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "SAMPLE_S_SOUT,Sample stall counter on stream-out interface." "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "SAMPLE_S_SIN,Sample stall counter on stream-in interface." "0,1"
|
|
rgroup.long 0x508++0x13
|
|
line.long 0x0 "STALL_STREAMIN,Stream-in Stall Counter"
|
|
hexmask.long 0x0 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0x4 "STALL_STREAMOUT,Stream-out Stall Counter"
|
|
hexmask.long 0x4 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0x8 "STALL_STREAMINOUT,Stream-in and Stream-out Stall Counter"
|
|
hexmask.long 0x8 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0xC "STALL_DATAHAZARD,Data Hazard Stall Counter"
|
|
hexmask.long 0xC 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0x10 "EXEC_COUNTER,Execution Cycle Counter"
|
|
hexmask.long 0x10 0.--31. 1. "CYCLES,Number of execution cycles."
|
|
group.long 0x580++0xF
|
|
line.long 0x0 "IMEM_ERROR_INJECT_ADDR,IMEM Error Inject Address Register"
|
|
hexmask.long.byte 0x0 0.--5. 1. "ADDR,Instruction memory address for error injection."
|
|
line.long 0x4 "IMEM_ERROR_VECTOR0,IMEM Error Inject Vector0"
|
|
hexmask.long 0x4 0.--31. 1. "ERR_VEC0,Lower 32-bits of error vector."
|
|
line.long 0x8 "IMEM_ERROR_VECTOR1,IMEM Error Inject Vector1"
|
|
bitfld.long 0x8 31. "ERR_EN,Error injection enable" "0: No error is injected,1: Error is injected. ECC syndrome and SEC-DED.."
|
|
newline
|
|
hexmask.long.byte 0x8 0.--6. 1. "ERR_VEC1,Upper 7-bits of error vector."
|
|
line.long 0xC "IMEM_ERROR_INJECT_STAT,IMEM Error Injection Status register"
|
|
bitfld.long 0xC 31. "LOC_ACC,This field provides the status of the location of instruction memory at which error is injected was accessed by IPUV core" "0: Instruction memory location was not accessed.,1: Instruction memory location was accessed and.."
|
|
newline
|
|
hexmask.long.byte 0xC 8.--14. 1. "SYNDROME,7-bit syndrome found when error was injected."
|
|
newline
|
|
rbitfld.long 0xC 1. "DED,Double bit error was detected" "0,1"
|
|
newline
|
|
rbitfld.long 0xC 0. "SEC,Single bit error was detected and corrected." "0,1"
|
|
group.long 0x600++0x3
|
|
line.long 0x0 "RESET_REG,Reset Register"
|
|
bitfld.long 0x0 1. "HARD_RESET,Writing 1 to this field provides a hard reset to the IPUV module" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SOFT_RESET,Writing 1 to this field provides a soft reset to the IPUV module" "0,1"
|
|
tree.end
|
|
tree "IPUV_2"
|
|
base ad:0x7C064000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "HOST_START,Command and Start Register"
|
|
hexmask.long.byte 0x0 16.--23. 1. "CSA,This field provides as a status the start address for the ongoing line processing."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "NSA,This field provides the address location in IRAM from where the processing of the next line starts"
|
|
line.long 0x4 "HOST_STATUS,Core Status Register"
|
|
hexmask.long.word 0x4 16.--31. 1. "REMAIN_PIXELS,Indicates the number of the pixels remaining to be processed"
|
|
newline
|
|
rbitfld.long 0x4 10. "DEBUG_STATUS,This field provides the debug status of the IPUV core." "0: In execution Mode,1: In Debug Mode"
|
|
newline
|
|
rbitfld.long 0x4 8.--9. "CORE_STATUS,This field indicates the IPUV core status and number of triggers that has been buffered." "0: Idle,1: Running,?,?"
|
|
newline
|
|
bitfld.long 0x4 0.--1. "N_EVENTS,This fields reflects the value of the event counter" "0,1,2,3"
|
|
line.long 0x8 "HOST_POS,Position Configuration Register"
|
|
hexmask.long.word 0x8 16.--31. 1. "XPOS,This Field indicates the horizontal position of the next line."
|
|
newline
|
|
hexmask.long.word 0x8 0.--15. 1. "YPOS,This field indicates the line number of the next line to be processed."
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x0 "HOST_CURRPOS,Current Position Status Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "CURR_XPOS,Provides the horizontal pixel position (XPOS) for the currently processed line."
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "CURR_YPOS,Provides the status the line number of the currently processed line."
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "HOST_XCFG,Line Width and Step configuration Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "XSIZE,This field provides the width in terms of number of pixel components of the next line to be processed"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "XSTEP,This field provides the next incremental step for the XPOS counter" "0: XPOS increment step is 4,1: XPOS increment step is 1,?,?"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "HOST_CURRXCFG,Current Line width and Step Status Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "CURR_XSIZE,This field provides the width in terms of number of pixel components of the current line to be processed"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "CURR_XSTEP,This field indicates the current XSTEP being used for processing." "0: XPOS increment step is 4,1: XPOS increment step is 1,?,?"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "HOST_INCFG,IN Matrix Configuration Register"
|
|
rbitfld.long 0x0 28. "CURR_EN_LINE4,Enable status for fifth row vector in 5x8 neighbourhood mode" "0: Fifth row-vector for currently line processed is..,1: Fifth row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x0 27. "CURR_EN_LINE3,Enable status for fourth row vector in 5x8 neighbourhood mode" "0: Fourth row-vector for currently line processed..,1: Fourth row-vector for currently line processed.."
|
|
newline
|
|
rbitfld.long 0x0 26. "CURR_EN_LINE2,Enable status for third row vector in 5x8 neighbourhood mode" "0: Third row-vector for currently line processed is..,1: Third row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x0 25. "CURR_EN_LINE1,Enable status for second row vector in 5x8 neighbourhood mode" "0: Second row-vector for currently line processed..,1: Second row-vector for currently line processed.."
|
|
newline
|
|
rbitfld.long 0x0 24. "CURR_EN_LINE0,Enable status for first row vector in 5x8 neighbourhood mode" "0: First row-vector for currently line processed is..,1: First row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x0 18. "CURR_NHOOD,This field provides the neighbourhood position of the elements in IN matrix" "0: For the ongoing execution IN Matrix is in 5x8..,?"
|
|
newline
|
|
rbitfld.long 0x0 16.--17. "CURR_IN_SHIFT,This field indicates the value currently being used for shifting each 1x8 row-vector in IN matrix" "0: Row vector of IN Matrix would be shifted by 4,1: Row vector of IN Matrix would be shifted by 1,?,?"
|
|
newline
|
|
bitfld.long 0x0 12. "EN_LINE4,This field enables the first row-vector of IN matrix for next line to be processed" "0: Disable fifth 1x8 line of IN matrix for..,1: Enable fifth 1x8 line of IN matrix for next-line.."
|
|
newline
|
|
bitfld.long 0x0 11. "EN_LINE3,This field enables the first row-vector of IN matrix for next line to be processed" "0: Disable fourth 1x8 line of IN matrix for..,1: Enable fourth 1x8 line of IN matrix for.."
|
|
newline
|
|
bitfld.long 0x0 10. "EN_LINE2,This field enables the first row-vector of IN matrix for next line to be processed" "0: Disable third 1x8 line of IN matrix for..,1: Enable third 1x8 line of IN matrix for next-line.."
|
|
newline
|
|
bitfld.long 0x0 9. "EN_LINE1,This field enables the first row-vector of IN matrix for next line to be processed" "0: Disable second 1x8 line of IN matrix for..,1: Enable second 1x8 line of IN matrix for.."
|
|
newline
|
|
bitfld.long 0x0 8. "EN_LINE0,This field enables the first row-vector of IN matrix for next line to be processed" "0: Disable first 1x8 line of IN matrix for..,1: Enable first 1x8 line of IN matrix for next-line.."
|
|
newline
|
|
bitfld.long 0x0 2. "NHOOD,This field provides the neighbourhood position of the elements in IN matrix" "0: For the ongoing execution IN Matrix is in 5x8..,?"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "IN_SHIFT,This field indicates the value by which input 1x8 vector will be shifted when execution for the next line begins" "0: For next line processing shift the row vector of..,1: For next line processing shift the row vector of..,?,?"
|
|
group.long 0x24++0x3
|
|
line.long 0x0 "HOST_OUTCFG,OUT Matrix Configuration Register"
|
|
rbitfld.long 0x0 26. "CURR_EN_OUT2,This field indicates the status of the stream-out channel corresponding to OUT8-OUT11 vector for the current line processing" "0: Stream-out 2 interface is disabled.,1: Stream-out 2 interface is enabled."
|
|
newline
|
|
rbitfld.long 0x0 25. "CURR_EN_OUT1,This field indicates the status of the stream-out channel corresponding to OUT4-OUT7 vector for the current line processing" "0: Stream-out 1 interface is disabled.,1: Stream-out 1 interface is enabled."
|
|
newline
|
|
rbitfld.long 0x0 24. "CURR_EN_OUT0,This field indicates the status of the stream-out channel corresponding to OUT0-OUT3 vector for the current line processing" "0: Stream-out 0 interface is disabled.,1: Stream-out 0 interface is enabled."
|
|
newline
|
|
rbitfld.long 0x0 16.--17. "CURR_OUT_SHIFT,This field indicates the value currently being used for shifting each 1x4 row-vector in OUT matrix." "0: For next line processing shift the row vector of..,1: For next line processing shift the row vector of..,?,?"
|
|
newline
|
|
bitfld.long 0x0 10. "EN_OUT2,Enables the stream-out channel corresponding to OUT2 element of OUT8-OUT11 vector for processing the next line" "0: Stream-out 2 channel is disabled.,1: Stream-out 2 channel is enabled."
|
|
newline
|
|
bitfld.long 0x0 9. "EN_OUT1,Enables the stream-out channel corresponding to OUT1 element of OUT4-OUT7 vector for processing the next line" "0: Stream-out 1 channel is disabled.,1: Stream-out 1 channel is enabled."
|
|
newline
|
|
bitfld.long 0x0 8. "EN_OUT0,Enables the stream-out channel corresponding to OUT0 element of OUT0-OUT3 vector for processing the next line" "0: Stream-out 0 channel is disabled.,1: Stream-out 0 channel is enabled."
|
|
newline
|
|
bitfld.long 0x0 0.--1. "OUT_SHIFT,This field indicates the number of elements in the OUT matrix 1x4 vector that will be shifted on the stream interface while execution of the next line. Shift of OUT matrix happens when a DONE instruction with 'o' flag set is executed and the.." "0: For next line processing shift the row vector of..,1: For next line processing shift the row vector of..,?,?"
|
|
group.long 0x40++0xF
|
|
line.long 0x0 "HOST_IMEMA,Instruction Memory Address Register"
|
|
hexmask.long.byte 0x0 0.--5. 1. "IADDR,Pointer into IRAM - This field provides an address pointer to a location of IRAM."
|
|
line.long 0x4 "HOST_IMEMD,Instruction Memory Data Register"
|
|
hexmask.long 0x4 0.--31. 1. "DATA,Read/Write data of IRAM - This field specifies data to be read/written from/into IRAM"
|
|
line.long 0x8 "HOST_DREGA,Data Register-Bank Address Register"
|
|
hexmask.long.byte 0x8 0.--7. 1. "DMEMA,Data memory address pointer - This field provides the pointer to register bank of the IPUV module"
|
|
line.long 0xC "HOST_DREGD,Data Register-Bank Datum Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "DMEMD,Read/Write data of SGPRs - This field specifies data to be read or written from/into SGPRs"
|
|
group.long 0x104++0x23
|
|
line.long 0x0 "S_LINE0_LEN_IN,IN Stream Line0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of the stream"
|
|
line.long 0x4 "S_CH0_CFG_IN,IN Stream Line0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel components" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Step count of channel -- Specifies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x8 "S_LINE0_ADDR_IN,IN Stream Line0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Stream0 start address"
|
|
line.long 0xC "S_LINE1_LEN_IN,IN Stream Line1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of the stream"
|
|
line.long 0x10 "S_CH1_CFG_IN,IN Stream Line1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel components" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Step count of channel -Specifies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x14 "S_LINE1_ADDR_IN,IN Stream Line1 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Stream1 start address"
|
|
line.long 0x18 "S_LINE2_LEN_IN,IN Stream Line2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Length of the stream"
|
|
line.long 0x1C "S_CH2_CFG_IN,IN Stream Line2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel components" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Step count of channel -- Specifies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x20 "S_LINE2_ADDR_IN,IN Stream Line2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Stream2 start address"
|
|
group.long 0x144++0x17
|
|
line.long 0x0 "S_LINE3_LEN_IN,IN Stream Line3 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of the stream"
|
|
line.long 0x4 "S_CH3_CFG_IN,IN Stream Line3 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel components" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Step count of channel -- Specifies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x8 "S_LINE3_ADDR_IN,IN Stream Line3 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Stream3 start address"
|
|
line.long 0xC "S_LINE4_LEN_IN,IN Stream Line4 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of the stream"
|
|
line.long 0x10 "S_CH4_CFG_IN,IN Stream Line4 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel components" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Step count of channel -- Specifies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x14 "S_LINE4_ADDR_IN,IN Stream Line4 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Stream4 start address"
|
|
group.long 0x1C4++0x23
|
|
line.long 0x0 "S_LINE0_LEN_OUT,Stream Out0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of the output stream"
|
|
line.long 0x4 "S_CH0_CFG_OUT,Stream Out0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the output stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "SKIP,Skip count of Channel - Specifies the stride of the stream output channel" "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x8 "S_LINE0_ADDR_OUT,Stream Out0 Address Register"
|
|
hexmask.long 0x8 3.--31. 1. "ADDR,Start address of the output stream"
|
|
line.long 0xC "S_LINE1_LEN_OUT,Stream Out1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of the output stream"
|
|
line.long 0x10 "S_CH1_CFG_OUT,Stream Out1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the output stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "SKIP,Skip count of Channel - Specifies the stride of the stream output channel" "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel components i.e. every..,?,?"
|
|
line.long 0x14 "S_LINE1_ADDR_OUT,Stream Out1 Address Register"
|
|
hexmask.long 0x14 3.--31. 1. "ADDR,Start address of the output stream"
|
|
line.long 0x18 "S_LINE2_LEN_OUT,Stream Out2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Length of the output stream"
|
|
line.long 0x1C "S_CH2_CFG_OUT,Stream Out2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the output stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "SKIP,Skip count of Channel - Specifies the stride of the stream output channel" "0: Stride value is 1 pixel components i.e. every..,1: Stride value is 2 pixel components i.e. every..,?,?"
|
|
line.long 0x20 "S_LINE2_ADDR_OUT,Stream Out2 Address Register"
|
|
hexmask.long 0x20 3.--31. 1. "ADDR,Start address of the output stream"
|
|
rgroup.long 0x204++0x23
|
|
line.long 0x0 "S_CURR_LINE0_LEN_IN,IN Stream Line0 Current Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of stream0"
|
|
line.long 0x4 "S_CURR_CH0_CFG_IN,IN Stream Line0 Current Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Current data-type being used on the streaming interface for stream channel 0" "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the streaming interface for stream 0" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Current scan direction on the streaming interface for stream channel 0" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the streaming interface for stream channel 0" "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Current repeat value on the streaming interface for stream channel 0" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Current step value on streaming interface for stream channel 0" "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel component."
|
|
line.long 0x8 "S_CURR_LINE0_ADDR_IN,IN Stream Line0 Current Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Stream0 start address"
|
|
line.long 0xC "S_CURR_LINE1_LEN_IN,IN Stream Line1 Current Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of the stream1"
|
|
line.long 0x10 "S_CURR_CH1_CFG_IN,IN Stream Line1 Current Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Current data-type being used on the streaming interface for stream channel 1" "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Current boundary width/size on the streaming interface for stream channel 1" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Current scan direction on the streaming interface for stream channel 1." "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Current boundary substitution mode used by the streaming interface for stream channel 1." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Current repeat value used by the streaming interface for stream channel 1." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Current step value used by the streaming interface for stream channel 1" "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel component for stream channel 1"
|
|
line.long 0x14 "S_CURR_LINE1_ADDR_IN,IN Stream Line1 Current Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Stream1 start address"
|
|
line.long 0x18 "S_CURR_LINE2_LEN_IN,IN Stream Line2 Current Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Length of the stream2"
|
|
line.long 0x1C "S_CURR_CH2_CFG_IN,IN Stream Line2 Current Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Current data-type being used on the streaming interface for stream channel 2" "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the streaming interface for stream channel 2" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Current scan direction on the streaming interface for stream channel2" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface for stream channel 2." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Current repeat value on the stream interface for stream channel 2" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Current step value on stream interface for Stream channel 2" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel component."
|
|
line.long 0x20 "S_CURR_LINE2_ADDR_IN,IN Stream Line2 Current Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Stream2 start address"
|
|
rgroup.long 0x244++0x17
|
|
line.long 0x0 "S_CURR_LINE3_LEN_IN,IN Stream Line3 Current Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of the stream3"
|
|
line.long 0x4 "S_CURR_CH3_CFG_IN,IN Stream Line3 Current Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Current data-type being used on the stream interface for stream channel 3" "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface for stream channel 3" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Current scan direction on the streaming interface for stream channel 3." "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the streaming interface for stream channel 3." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Current repeat value on the streaming interface for stream channel 3" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Current step value on streaming interface for stream channel 3" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel component."
|
|
line.long 0x8 "S_CURR_LINE3_ADDR_IN,IN Stream Line3 Current Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Stream3 start address"
|
|
line.long 0xC "S_CURR_LINE4_LEN_IN,IN Stream Line4 Current Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of the stream4"
|
|
line.long 0x10 "S_CURR_CH4_CFG_IN,IN Stream Line4 Current Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Current data-type being used on the stream interface for stream channel 4" "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface for stream channel 4" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Current scan direction on the streaming interface for stream channel 4." "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the streaming interface for stream channel 4." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Current repeat value on the streaming interface for stream channel 4" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Current step value on streaming interface for stream channel 4" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel component."
|
|
line.long 0x14 "S_CURR_LINE4_ADDR_IN,IN Stream Line4 Current Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Stream4 start address"
|
|
rgroup.long 0x2C4++0x23
|
|
line.long 0x0 "S_CURR_LINE0_LEN_OUT,Stream Out0 Current Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Current Length of the output stream for channel 0"
|
|
line.long 0x4 "S_CURR_CH0_CFG_OUT,Stream Out0 Current Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Current datatype on the stream out interface for channel 0." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "SKIP,Current skip value on stream out interface for channel 0." "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x8 "S_CURR_LINE0_ADDR_OUT,Stream Out0 Current Address Register"
|
|
hexmask.long 0x8 3.--31. 1. "ADDR,Current Start address of the output stream for channel 0"
|
|
line.long 0xC "S_CURR_LINE1_LEN_OUT,Stream Out1 Current Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Current Length of the output stream for channel 1"
|
|
line.long 0x10 "S_CURR_CH1_CFG_OUT,Stream Out1 Current Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Current datatype on the streamout interface for channel 1." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "SKIP,Current skip value on stream out interface for channel 1." "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x14 "S_CURR_LINE1_ADDR_OUT,Stream Out1 Current Address Register"
|
|
hexmask.long 0x14 3.--31. 1. "ADDR,Current Start address of the for channel 1"
|
|
line.long 0x18 "S_CURR_LINE2_LEN_OUT,Stream Out2 Current Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Current Length of the channel 2"
|
|
line.long 0x1C "S_CURR_CH2_CFG_OUT,Stream Out2 Current Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Current datatype on the stream out interface for channel 2." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "SKIP,Current skip value on stream out interface for channel 2." "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x20 "S_CURR_LINE2_ADDR_OUT,Stream Out2 Current Address Register"
|
|
hexmask.long 0x20 3.--31. 1. "ADDR,Current Start address of the output for channel 2"
|
|
group.long 0x400++0xF
|
|
line.long 0x0 "DEBUG_MS,Debug Mode and Step Register"
|
|
bitfld.long 0x0 31. "B_FINISH,Break on Finish - Writing 1 in this bit enables breakpoint on finish" "0,1"
|
|
newline
|
|
bitfld.long 0x0 30. "B_WADDR,Break point on Write address - Writing 1 in this bit enables breakpoint on write address" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "B_RADDR,Break point on Read address - Writing 1 in this bit enables breakpoint on read address" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "B_IADDR,Break point on Instruction Fetch - Writing 1 in this bit enables breakpoint on instruction fetch" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "B_POS,Break point on Pixel Position - Writing 1 in this bit enables breakpoint on pixel position" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "B_YPOS,Break point on Line - Writing 1 in this bit enables breakpoint on line" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "B_XPOS,Break point on Pixel Number - Writing 1 in this bit enables breakpoint on pixel number" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--19. 1. "STEP,Step Size - This field is used for specifying the step size of IPUV module when in debug mode."
|
|
newline
|
|
bitfld.long 0x0 1. "CTI_EN,Cross-triggering enable" "0: Disable cross-triggering with CTI.,1: Enable cross-triggering with CTI."
|
|
newline
|
|
bitfld.long 0x0 0. "DBG_ACT,Activate Debug Mode - Writing 1 in this bit makes the IPUV module to enter debug mode." "0,1"
|
|
line.long 0x4 "DEBUG_BKPT_STAT,Debug Breakpoint Status Register"
|
|
bitfld.long 0x4 25. "STEP_REQ,STEP Request - Writing 1 to this bit provides a step request to the IPUV core" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "FINISH,Breakpoint on finish status" "0: Breakpoint on finish did not occur,1: Breakpoint on finish occurred."
|
|
newline
|
|
bitfld.long 0x4 22. "WADDR,Breakpoint on write status" "0: Breakpoint on write did not occur,1: Breakpoint on write occurred"
|
|
newline
|
|
bitfld.long 0x4 21. "RADDR,Breakpoint on read status" "0: Breakpoint on read did not occur.,1: Breakpoint on read occurred."
|
|
newline
|
|
bitfld.long 0x4 20. "IADDR,Instruction fetch breakpoint status" "0: Instruction fetch breakpoint not occurred.,1: Instruction fetch breakpoint occurred."
|
|
newline
|
|
bitfld.long 0x4 19. "POS,Position breakpoint status" "0: Position breakpoint not occurred,1: Position breakpoint occurred"
|
|
newline
|
|
bitfld.long 0x4 18. "YPOS,YPOS breakpoint status" "0: YPOS breakpoint not occurred.,1: YPOS breakpoint occurred."
|
|
newline
|
|
bitfld.long 0x4 17. "XPOS,XPOS breakpoint status" "0: Breakpoint XPOS not occurred.,1: Breakpoint XPOS occurred."
|
|
newline
|
|
bitfld.long 0x4 16. "DBG,Debug mode status: This bit provides the debug status of IPUV core" "0: In execution mode. (Instruction execution..,1: In debug mode. (Instruction execution stalled)"
|
|
newline
|
|
rbitfld.long 0x4 0. "H_DBG,This register provides the status of debug mode acknowledgement upon hardware debug request" "0: In execution mode (No hardware debug request..,1: In debug upon assertion debug request signal."
|
|
line.long 0x8 "DEBUG_BKPT_POS,Debug Breakpoint Position Register"
|
|
hexmask.long.word 0x8 16.--31. 1. "XPOS,Horizontal Pixel position - Specifies the horizontal pixel position for XPOS or POS breakpoint."
|
|
newline
|
|
hexmask.long.word 0x8 0.--15. 1. "YPOS,Vertical Pixel position - Specifies the vertical position (i"
|
|
line.long 0xC "DEBUG_BKPT_ADDR,Debug Breakpoint Address Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. "IADDR,Instruction fetch address - This field holds the instruction address where instruction fetch breakpoint should occur"
|
|
newline
|
|
hexmask.long.byte 0xC 16.--23. 1. "DRADDR,Data read address - This field holds the data address of the register bank from where when reads happens triggers breakpoint on read"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--15. 1. "DWADDR,Data Write address - This field holds the data address of the register bank to where when write happens triggers breakpoint on write"
|
|
rgroup.long 0x414++0x3
|
|
line.long 0x0 "DEBUG_CORE_STAT,Debug Core Status Register"
|
|
bitfld.long 0x0 27. "N,Status of scalar negative flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "Z,Status of scalar zero flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "C,Status of scalar carry flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "OV,Status of scalar overflow flag." "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "PC,This field holds the value of the program counter"
|
|
group.long 0x500++0x7
|
|
line.long 0x0 "PMONITOR_CTRL,Performance Monitor Control Register"
|
|
bitfld.long 0x0 20. "INIT_EX_CNT,This bit is used for clear the execution cycle counter" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "INIT_S_DH,This bit is used for clear the stall counter on data hazards" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "INIT_S_SINOUT,This bit is used for clear the stall counter on stream-in 'and' stream-out interface" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "INIT_S_SOUT,This bit is used for clear the stall counter on stream-out interface" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "INIT_S_SIN,This bit is used for clear the stall counter on stream-in interface" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "STOP_EX_CNT,This bit provides a secondary override for disabling the execution cycle counter." "0: Execution cycle counter is defreezed from..,1: Execution cycle counter is freezed from counting."
|
|
newline
|
|
bitfld.long 0x0 11. "STOP_S_DH,This bit provides a secondary override for disabling the stall counter on data hazard interface." "0: Stall counter on data hazard is defreezed from..,1: Stall counter on data hazard is freezed from.."
|
|
newline
|
|
bitfld.long 0x0 10. "STOP_S_SINOUT,This bit provides a secondary override for disabling the stall counter on stream-in and stream-out interface" "0: stall counter on stream-in 'and' stream-out is..,1: Stall counter on stream-in 'and' stream-out is.."
|
|
newline
|
|
bitfld.long 0x0 9. "STOP_S_SOUT,This bit provides a secondary override for disabling the stall counter on stream-out interface." "0: Stall counter on stream-in is defreezed from..,1: Stall counter on stream-out is freezed from.."
|
|
newline
|
|
bitfld.long 0x0 8. "STOP_S_SIN,This bit provides a secondary override for disabling the stall counter on stream-in interface." "0: Stall counter is defreezed from counting.,1: Stall counter on stream-in is freezed from.."
|
|
newline
|
|
bitfld.long 0x0 4. "EN_EX_CNT,This bit controls the execution cycle counter." "0: Execution counter is inactive. Counter does not..,1: Execution counter is enabled. Counter counts the.."
|
|
newline
|
|
bitfld.long 0x0 3. "EN_S_DH,This bit controls the stall counter that monitors the stalls due to data hazards in the pipeline." "0: Stall counter on stalls due to data hazard is..,1: Stall counter on stalls due to data hazard is.."
|
|
newline
|
|
bitfld.long 0x0 2. "EN_S_SINOUT,This bit controls the stall counter that monitor both stream-in and stream-out stalls occurring in same clock cycle" "0: Stall counter on stream-in and stream-out stalls..,1: Stall counter on stream-in and stream-out stalls.."
|
|
newline
|
|
bitfld.long 0x0 1. "EN_S_SOUT,This bit controls the stall counter on stream-out interface." "0: Stall counter on stream-out stalls is inactive.,1: Stall counter on stream-out stalls is enabled."
|
|
newline
|
|
bitfld.long 0x0 0. "EN_S_SIN,This bit controls the stall counter on stream-in interface." "0: Stall counter on stream-in stalls is inactive.,1: Stall counter on stream-in stalls is enabled."
|
|
line.long 0x4 "PMONITOR_SAMPLE,Performance Monitor Sample Register"
|
|
bitfld.long 0x4 4. "SAMPLE_EX_CNT,Sample execution counter" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "SAMPLE_S_DH,Sample stall counter on data hazard" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "SAMPLE_S_SINOUT,Sample stall counter on stream-in 'and' stream-out interface." "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "SAMPLE_S_SOUT,Sample stall counter on stream-out interface." "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "SAMPLE_S_SIN,Sample stall counter on stream-in interface." "0,1"
|
|
rgroup.long 0x508++0x13
|
|
line.long 0x0 "STALL_STREAMIN,Stream-in Stall Counter"
|
|
hexmask.long 0x0 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0x4 "STALL_STREAMOUT,Stream-out Stall Counter"
|
|
hexmask.long 0x4 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0x8 "STALL_STREAMINOUT,Stream-in and Stream-out Stall Counter"
|
|
hexmask.long 0x8 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0xC "STALL_DATAHAZARD,Data Hazard Stall Counter"
|
|
hexmask.long 0xC 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0x10 "EXEC_COUNTER,Execution Cycle Counter"
|
|
hexmask.long 0x10 0.--31. 1. "CYCLES,Number of execution cycles."
|
|
group.long 0x580++0xF
|
|
line.long 0x0 "IMEM_ERROR_INJECT_ADDR,IMEM Error Inject Address Register"
|
|
hexmask.long.byte 0x0 0.--5. 1. "ADDR,Instruction memory address for error injection."
|
|
line.long 0x4 "IMEM_ERROR_VECTOR0,IMEM Error Inject Vector0"
|
|
hexmask.long 0x4 0.--31. 1. "ERR_VEC0,Lower 32-bits of error vector."
|
|
line.long 0x8 "IMEM_ERROR_VECTOR1,IMEM Error Inject Vector1"
|
|
bitfld.long 0x8 31. "ERR_EN,Error injection enable" "0: No error is injected,1: Error is injected. ECC syndrome and SEC-DED.."
|
|
newline
|
|
hexmask.long.byte 0x8 0.--6. 1. "ERR_VEC1,Upper 7-bits of error vector."
|
|
line.long 0xC "IMEM_ERROR_INJECT_STAT,IMEM Error Injection Status register"
|
|
bitfld.long 0xC 31. "LOC_ACC,This field provides the status of the location of instruction memory at which error is injected was accessed by IPUV core" "0: Instruction memory location was not accessed.,1: Instruction memory location was accessed and.."
|
|
newline
|
|
hexmask.long.byte 0xC 8.--14. 1. "SYNDROME,7-bit syndrome found when error was injected."
|
|
newline
|
|
rbitfld.long 0xC 1. "DED,Double bit error was detected" "0,1"
|
|
newline
|
|
rbitfld.long 0xC 0. "SEC,Single bit error was detected and corrected." "0,1"
|
|
group.long 0x600++0x3
|
|
line.long 0x0 "RESET_REG,Reset Register"
|
|
bitfld.long 0x0 1. "HARD_RESET,Writing 1 to this field provides a hard reset to the IPUV module" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SOFT_RESET,Writing 1 to this field provides a soft reset to the IPUV module" "0,1"
|
|
tree.end
|
|
tree "IPUV_3"
|
|
base ad:0x7C065000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "HOST_START,Command and Start Register"
|
|
hexmask.long.byte 0x0 16.--23. 1. "CSA,This field provides as a status the start address for the ongoing line processing."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "NSA,This field provides the address location in IRAM from where the processing of the next line starts"
|
|
line.long 0x4 "HOST_STATUS,Core Status Register"
|
|
hexmask.long.word 0x4 16.--31. 1. "REMAIN_PIXELS,Indicates the number of the pixels remaining to be processed"
|
|
newline
|
|
rbitfld.long 0x4 10. "DEBUG_STATUS,This field provides the debug status of the IPUV core." "0: In execution Mode,1: In Debug Mode"
|
|
newline
|
|
rbitfld.long 0x4 8.--9. "CORE_STATUS,This field indicates the IPUV core status and number of triggers that has been buffered." "0: Idle,1: Running,?,?"
|
|
newline
|
|
bitfld.long 0x4 0.--1. "N_EVENTS,This fields reflects the value of the event counter" "0,1,2,3"
|
|
line.long 0x8 "HOST_POS,Position Configuration Register"
|
|
hexmask.long.word 0x8 16.--31. 1. "XPOS,This Field indicates the horizontal position of the next line."
|
|
newline
|
|
hexmask.long.word 0x8 0.--15. 1. "YPOS,This field indicates the line number of the next line to be processed."
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x0 "HOST_CURRPOS,Current Position Status Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "CURR_XPOS,Provides the horizontal pixel position (XPOS) for the currently processed line."
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "CURR_YPOS,Provides the status the line number of the currently processed line."
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "HOST_XCFG,Line Width and Step configuration Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "XSIZE,This field provides the width in terms of number of pixel components of the next line to be processed"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "XSTEP,This field provides the next incremental step for the XPOS counter" "0: XPOS increment step is 4,1: XPOS increment step is 1,?,?"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "HOST_CURRXCFG,Current Line width and Step Status Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "CURR_XSIZE,This field provides the width in terms of number of pixel components of the current line to be processed"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "CURR_XSTEP,This field indicates the current XSTEP being used for processing." "0: XPOS increment step is 4,1: XPOS increment step is 1,?,?"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "HOST_INCFG,IN Matrix Configuration Register"
|
|
rbitfld.long 0x0 28. "CURR_EN_LINE4,Enable status for fifth row vector in 5x8 neighbourhood mode" "0: Fifth row-vector for currently line processed is..,1: Fifth row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x0 27. "CURR_EN_LINE3,Enable status for fourth row vector in 5x8 neighbourhood mode" "0: Fourth row-vector for currently line processed..,1: Fourth row-vector for currently line processed.."
|
|
newline
|
|
rbitfld.long 0x0 26. "CURR_EN_LINE2,Enable status for third row vector in 5x8 neighbourhood mode" "0: Third row-vector for currently line processed is..,1: Third row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x0 25. "CURR_EN_LINE1,Enable status for second row vector in 5x8 neighbourhood mode" "0: Second row-vector for currently line processed..,1: Second row-vector for currently line processed.."
|
|
newline
|
|
rbitfld.long 0x0 24. "CURR_EN_LINE0,Enable status for first row vector in 5x8 neighbourhood mode" "0: First row-vector for currently line processed is..,1: First row-vector for currently line processed is.."
|
|
newline
|
|
rbitfld.long 0x0 18. "CURR_NHOOD,This field provides the neighbourhood position of the elements in IN matrix" "0: For the ongoing execution IN Matrix is in 5x8..,?"
|
|
newline
|
|
rbitfld.long 0x0 16.--17. "CURR_IN_SHIFT,This field indicates the value currently being used for shifting each 1x8 row-vector in IN matrix" "0: Row vector of IN Matrix would be shifted by 4,1: Row vector of IN Matrix would be shifted by 1,?,?"
|
|
newline
|
|
bitfld.long 0x0 12. "EN_LINE4,This field enables the first row-vector of IN matrix for next line to be processed" "0: Disable fifth 1x8 line of IN matrix for..,1: Enable fifth 1x8 line of IN matrix for next-line.."
|
|
newline
|
|
bitfld.long 0x0 11. "EN_LINE3,This field enables the first row-vector of IN matrix for next line to be processed" "0: Disable fourth 1x8 line of IN matrix for..,1: Enable fourth 1x8 line of IN matrix for.."
|
|
newline
|
|
bitfld.long 0x0 10. "EN_LINE2,This field enables the first row-vector of IN matrix for next line to be processed" "0: Disable third 1x8 line of IN matrix for..,1: Enable third 1x8 line of IN matrix for next-line.."
|
|
newline
|
|
bitfld.long 0x0 9. "EN_LINE1,This field enables the first row-vector of IN matrix for next line to be processed" "0: Disable second 1x8 line of IN matrix for..,1: Enable second 1x8 line of IN matrix for.."
|
|
newline
|
|
bitfld.long 0x0 8. "EN_LINE0,This field enables the first row-vector of IN matrix for next line to be processed" "0: Disable first 1x8 line of IN matrix for..,1: Enable first 1x8 line of IN matrix for next-line.."
|
|
newline
|
|
bitfld.long 0x0 2. "NHOOD,This field provides the neighbourhood position of the elements in IN matrix" "0: For the ongoing execution IN Matrix is in 5x8..,?"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "IN_SHIFT,This field indicates the value by which input 1x8 vector will be shifted when execution for the next line begins" "0: For next line processing shift the row vector of..,1: For next line processing shift the row vector of..,?,?"
|
|
group.long 0x24++0x3
|
|
line.long 0x0 "HOST_OUTCFG,OUT Matrix Configuration Register"
|
|
rbitfld.long 0x0 26. "CURR_EN_OUT2,This field indicates the status of the stream-out channel corresponding to OUT8-OUT11 vector for the current line processing" "0: Stream-out 2 interface is disabled.,1: Stream-out 2 interface is enabled."
|
|
newline
|
|
rbitfld.long 0x0 25. "CURR_EN_OUT1,This field indicates the status of the stream-out channel corresponding to OUT4-OUT7 vector for the current line processing" "0: Stream-out 1 interface is disabled.,1: Stream-out 1 interface is enabled."
|
|
newline
|
|
rbitfld.long 0x0 24. "CURR_EN_OUT0,This field indicates the status of the stream-out channel corresponding to OUT0-OUT3 vector for the current line processing" "0: Stream-out 0 interface is disabled.,1: Stream-out 0 interface is enabled."
|
|
newline
|
|
rbitfld.long 0x0 16.--17. "CURR_OUT_SHIFT,This field indicates the value currently being used for shifting each 1x4 row-vector in OUT matrix." "0: For next line processing shift the row vector of..,1: For next line processing shift the row vector of..,?,?"
|
|
newline
|
|
bitfld.long 0x0 10. "EN_OUT2,Enables the stream-out channel corresponding to OUT2 element of OUT8-OUT11 vector for processing the next line" "0: Stream-out 2 channel is disabled.,1: Stream-out 2 channel is enabled."
|
|
newline
|
|
bitfld.long 0x0 9. "EN_OUT1,Enables the stream-out channel corresponding to OUT1 element of OUT4-OUT7 vector for processing the next line" "0: Stream-out 1 channel is disabled.,1: Stream-out 1 channel is enabled."
|
|
newline
|
|
bitfld.long 0x0 8. "EN_OUT0,Enables the stream-out channel corresponding to OUT0 element of OUT0-OUT3 vector for processing the next line" "0: Stream-out 0 channel is disabled.,1: Stream-out 0 channel is enabled."
|
|
newline
|
|
bitfld.long 0x0 0.--1. "OUT_SHIFT,This field indicates the number of elements in the OUT matrix 1x4 vector that will be shifted on the stream interface while execution of the next line. Shift of OUT matrix happens when a DONE instruction with 'o' flag set is executed and the.." "0: For next line processing shift the row vector of..,1: For next line processing shift the row vector of..,?,?"
|
|
group.long 0x40++0xF
|
|
line.long 0x0 "HOST_IMEMA,Instruction Memory Address Register"
|
|
hexmask.long.byte 0x0 0.--5. 1. "IADDR,Pointer into IRAM - This field provides an address pointer to a location of IRAM."
|
|
line.long 0x4 "HOST_IMEMD,Instruction Memory Data Register"
|
|
hexmask.long 0x4 0.--31. 1. "DATA,Read/Write data of IRAM - This field specifies data to be read/written from/into IRAM"
|
|
line.long 0x8 "HOST_DREGA,Data Register-Bank Address Register"
|
|
hexmask.long.byte 0x8 0.--7. 1. "DMEMA,Data memory address pointer - This field provides the pointer to register bank of the IPUV module"
|
|
line.long 0xC "HOST_DREGD,Data Register-Bank Datum Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "DMEMD,Read/Write data of SGPRs - This field specifies data to be read or written from/into SGPRs"
|
|
group.long 0x104++0x23
|
|
line.long 0x0 "S_LINE0_LEN_IN,IN Stream Line0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of the stream"
|
|
line.long 0x4 "S_CH0_CFG_IN,IN Stream Line0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel components" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Step count of channel -- Specifies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x8 "S_LINE0_ADDR_IN,IN Stream Line0 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Stream0 start address"
|
|
line.long 0xC "S_LINE1_LEN_IN,IN Stream Line1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of the stream"
|
|
line.long 0x10 "S_CH1_CFG_IN,IN Stream Line1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel components" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Step count of channel -Specifies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x14 "S_LINE1_ADDR_IN,IN Stream Line1 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Stream1 start address"
|
|
line.long 0x18 "S_LINE2_LEN_IN,IN Stream Line2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Length of the stream"
|
|
line.long 0x1C "S_CH2_CFG_IN,IN Stream Line2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel components" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Step count of channel -- Specifies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x20 "S_LINE2_ADDR_IN,IN Stream Line2 Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Stream2 start address"
|
|
group.long 0x144++0x17
|
|
line.long 0x0 "S_LINE3_LEN_IN,IN Stream Line3 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of the stream"
|
|
line.long 0x4 "S_CH3_CFG_IN,IN Stream Line3 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel components" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Step count of channel -- Specifies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x8 "S_LINE3_ADDR_IN,IN Stream Line3 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Stream3 start address"
|
|
line.long 0xC "S_LINE4_LEN_IN,IN Stream Line4 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of the stream"
|
|
line.long 0x10 "S_CH4_CFG_IN,IN Stream Line4 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the input stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Boundary Size - Specifies the size/width of the boundary in terms of number of pixel components" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Scan Direction - This field specifies the direction of scan for input line processing i" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Boundary Substitution - Enables the boundary substitution mode on the matrix." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Repeat count of channel - Specifies the number of times the strided pixel of the input stream should be repeatedly loaded into the matrix" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Step count of channel -- Specifies the stride of the channel of the matrix" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Boundary Constant: Specifies the constant value for boundary substitution"
|
|
line.long 0x14 "S_LINE4_ADDR_IN,IN Stream Line4 Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Stream4 start address"
|
|
group.long 0x1C4++0x23
|
|
line.long 0x0 "S_LINE0_LEN_OUT,Stream Out0 Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of the output stream"
|
|
line.long 0x4 "S_CH0_CFG_OUT,Stream Out0 Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the output stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "SKIP,Skip count of Channel - Specifies the stride of the stream output channel" "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x8 "S_LINE0_ADDR_OUT,Stream Out0 Address Register"
|
|
hexmask.long 0x8 3.--31. 1. "ADDR,Start address of the output stream"
|
|
line.long 0xC "S_LINE1_LEN_OUT,Stream Out1 Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of the output stream"
|
|
line.long 0x10 "S_CH1_CFG_OUT,Stream Out1 Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the output stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "SKIP,Skip count of Channel - Specifies the stride of the stream output channel" "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel components i.e. every..,?,?"
|
|
line.long 0x14 "S_LINE1_ADDR_OUT,Stream Out1 Address Register"
|
|
hexmask.long 0x14 3.--31. 1. "ADDR,Start address of the output stream"
|
|
line.long 0x18 "S_LINE2_LEN_OUT,Stream Out2 Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Length of the output stream"
|
|
line.long 0x1C "S_CH2_CFG_OUT,Stream Out2 Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Stream Data type: Provides the size of pixel components of the output stream." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "SKIP,Skip count of Channel - Specifies the stride of the stream output channel" "0: Stride value is 1 pixel components i.e. every..,1: Stride value is 2 pixel components i.e. every..,?,?"
|
|
line.long 0x20 "S_LINE2_ADDR_OUT,Stream Out2 Address Register"
|
|
hexmask.long 0x20 3.--31. 1. "ADDR,Start address of the output stream"
|
|
rgroup.long 0x204++0x23
|
|
line.long 0x0 "S_CURR_LINE0_LEN_IN,IN Stream Line0 Current Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of stream0"
|
|
line.long 0x4 "S_CURR_CH0_CFG_IN,IN Stream Line0 Current Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Current data-type being used on the streaming interface for stream channel 0" "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the streaming interface for stream 0" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Current scan direction on the streaming interface for stream channel 0" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the streaming interface for stream channel 0" "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Current repeat value on the streaming interface for stream channel 0" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Current step value on streaming interface for stream channel 0" "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel component."
|
|
line.long 0x8 "S_CURR_LINE0_ADDR_IN,IN Stream Line0 Current Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Stream0 start address"
|
|
line.long 0xC "S_CURR_LINE1_LEN_IN,IN Stream Line1 Current Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of the stream1"
|
|
line.long 0x10 "S_CURR_CH1_CFG_IN,IN Stream Line1 Current Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Current data-type being used on the streaming interface for stream channel 1" "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Current boundary width/size on the streaming interface for stream channel 1" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Current scan direction on the streaming interface for stream channel 1." "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Current boundary substitution mode used by the streaming interface for stream channel 1." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Current repeat value used by the streaming interface for stream channel 1." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Current step value used by the streaming interface for stream channel 1" "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel component for stream channel 1"
|
|
line.long 0x14 "S_CURR_LINE1_ADDR_IN,IN Stream Line1 Current Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Stream1 start address"
|
|
line.long 0x18 "S_CURR_LINE2_LEN_IN,IN Stream Line2 Current Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Length of the stream2"
|
|
line.long 0x1C "S_CURR_CH2_CFG_IN,IN Stream Line2 Current Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Current data-type being used on the streaming interface for stream channel 2" "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the streaming interface for stream channel 2" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 23. "REVERSE,Current scan direction on the streaming interface for stream channel2" "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x1C 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the stream interface for stream channel 2." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x1C 18.--19. "RPT,Current repeat value on the stream interface for stream channel 2" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "STEP,Current step value on stream interface for Stream channel 2" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel component."
|
|
line.long 0x20 "S_CURR_LINE2_ADDR_IN,IN Stream Line2 Current Address Register"
|
|
hexmask.long 0x20 0.--31. 1. "ADDR,Stream2 start address"
|
|
rgroup.long 0x244++0x17
|
|
line.long 0x0 "S_CURR_LINE3_LEN_IN,IN Stream Line3 Current Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Length of the stream3"
|
|
line.long 0x4 "S_CURR_CH3_CFG_IN,IN Stream Line3 Current Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Current data-type being used on the stream interface for stream channel 3" "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface for stream channel 3" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 23. "REVERSE,Current scan direction on the streaming interface for stream channel 3." "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x4 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the streaming interface for stream channel 3." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "RPT,Current repeat value on the streaming interface for stream channel 3" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "STEP,Current step value on streaming interface for stream channel 3" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel component."
|
|
line.long 0x8 "S_CURR_LINE3_ADDR_IN,IN Stream Line3 Current Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR,Stream3 start address"
|
|
line.long 0xC "S_CURR_LINE4_LEN_IN,IN Stream Line4 Current Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Length of the stream4"
|
|
line.long 0x10 "S_CURR_CH4_CFG_IN,IN Stream Line4 Current Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Current data-type being used on the stream interface for stream channel 4" "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 24.--26. "REPLACE_WIDTH,Current boundary width/size used on the stream interface for stream channel 4" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 23. "REVERSE,Current scan direction on the streaming interface for stream channel 4." "0: Specifies incrementing index of pixels scan i.e..,1: Specifies decrementing index of pixels scan i.e.."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "REPLACE_MODE,Current boundary substitution mode used on the streaming interface for stream channel 4." "0: Configured pixel component stream is fetched..,1: Configured pixel component stream is fetched..,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x10 18.--19. "RPT,Current repeat value on the streaming interface for stream channel 4" "0: Repeat each streamed pixel component 4 times.,1: Repeat each streamed pixel component only once.,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "STEP,Current step value on streaming interface for stream channel 4" "0: Stride value is 4 pixel components i.e. every..,1: Stride value is 1 pixel components i.e. every..,?,?"
|
|
newline
|
|
hexmask.long.word 0x10 0.--15. 1. "REPLACE_VAL,Current constant value used as boundary pixel component."
|
|
line.long 0x14 "S_CURR_LINE4_ADDR_IN,IN Stream Line4 Current Address Register"
|
|
hexmask.long 0x14 0.--31. 1. "ADDR,Stream4 start address"
|
|
rgroup.long 0x2C4++0x23
|
|
line.long 0x0 "S_CURR_LINE0_LEN_OUT,Stream Out0 Current Length Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "LENGTH,Current Length of the output stream for channel 0"
|
|
line.long 0x4 "S_CURR_CH0_CFG_OUT,Stream Out0 Current Configuration Register"
|
|
bitfld.long 0x4 28.--29. "TYPE,Current datatype on the stream out interface for channel 0." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "SKIP,Current skip value on stream out interface for channel 0." "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x8 "S_CURR_LINE0_ADDR_OUT,Stream Out0 Current Address Register"
|
|
hexmask.long 0x8 3.--31. 1. "ADDR,Current Start address of the output stream for channel 0"
|
|
line.long 0xC "S_CURR_LINE1_LEN_OUT,Stream Out1 Current Length Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "LENGTH,Current Length of the output stream for channel 1"
|
|
line.long 0x10 "S_CURR_CH1_CFG_OUT,Stream Out1 Current Configuration Register"
|
|
bitfld.long 0x10 28.--29. "TYPE,Current datatype on the streamout interface for channel 1." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "SKIP,Current skip value on stream out interface for channel 1." "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x14 "S_CURR_LINE1_ADDR_OUT,Stream Out1 Current Address Register"
|
|
hexmask.long 0x14 3.--31. 1. "ADDR,Current Start address of the for channel 1"
|
|
line.long 0x18 "S_CURR_LINE2_LEN_OUT,Stream Out2 Current Length Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "LENGTH,Current Length of the channel 2"
|
|
line.long 0x1C "S_CURR_CH2_CFG_OUT,Stream Out2 Current Configuration Register"
|
|
bitfld.long 0x1C 28.--29. "TYPE,Current datatype on the stream out interface for channel 2." "0: Pixel components are 16-bits in size.,1: Pixel components are 8-bits in size and should..,?,?"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "SKIP,Current skip value on stream out interface for channel 2." "0: Stride value is 1 pixel component i.e. every..,1: Stride value is 2 pixel component i.e. every 2nd..,?,?"
|
|
line.long 0x20 "S_CURR_LINE2_ADDR_OUT,Stream Out2 Current Address Register"
|
|
hexmask.long 0x20 3.--31. 1. "ADDR,Current Start address of the output for channel 2"
|
|
group.long 0x400++0xF
|
|
line.long 0x0 "DEBUG_MS,Debug Mode and Step Register"
|
|
bitfld.long 0x0 31. "B_FINISH,Break on Finish - Writing 1 in this bit enables breakpoint on finish" "0,1"
|
|
newline
|
|
bitfld.long 0x0 30. "B_WADDR,Break point on Write address - Writing 1 in this bit enables breakpoint on write address" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "B_RADDR,Break point on Read address - Writing 1 in this bit enables breakpoint on read address" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "B_IADDR,Break point on Instruction Fetch - Writing 1 in this bit enables breakpoint on instruction fetch" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "B_POS,Break point on Pixel Position - Writing 1 in this bit enables breakpoint on pixel position" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "B_YPOS,Break point on Line - Writing 1 in this bit enables breakpoint on line" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "B_XPOS,Break point on Pixel Number - Writing 1 in this bit enables breakpoint on pixel number" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--19. 1. "STEP,Step Size - This field is used for specifying the step size of IPUV module when in debug mode."
|
|
newline
|
|
bitfld.long 0x0 1. "CTI_EN,Cross-triggering enable" "0: Disable cross-triggering with CTI.,1: Enable cross-triggering with CTI."
|
|
newline
|
|
bitfld.long 0x0 0. "DBG_ACT,Activate Debug Mode - Writing 1 in this bit makes the IPUV module to enter debug mode." "0,1"
|
|
line.long 0x4 "DEBUG_BKPT_STAT,Debug Breakpoint Status Register"
|
|
bitfld.long 0x4 25. "STEP_REQ,STEP Request - Writing 1 to this bit provides a step request to the IPUV core" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "FINISH,Breakpoint on finish status" "0: Breakpoint on finish did not occur,1: Breakpoint on finish occurred."
|
|
newline
|
|
bitfld.long 0x4 22. "WADDR,Breakpoint on write status" "0: Breakpoint on write did not occur,1: Breakpoint on write occurred"
|
|
newline
|
|
bitfld.long 0x4 21. "RADDR,Breakpoint on read status" "0: Breakpoint on read did not occur.,1: Breakpoint on read occurred."
|
|
newline
|
|
bitfld.long 0x4 20. "IADDR,Instruction fetch breakpoint status" "0: Instruction fetch breakpoint not occurred.,1: Instruction fetch breakpoint occurred."
|
|
newline
|
|
bitfld.long 0x4 19. "POS,Position breakpoint status" "0: Position breakpoint not occurred,1: Position breakpoint occurred"
|
|
newline
|
|
bitfld.long 0x4 18. "YPOS,YPOS breakpoint status" "0: YPOS breakpoint not occurred.,1: YPOS breakpoint occurred."
|
|
newline
|
|
bitfld.long 0x4 17. "XPOS,XPOS breakpoint status" "0: Breakpoint XPOS not occurred.,1: Breakpoint XPOS occurred."
|
|
newline
|
|
bitfld.long 0x4 16. "DBG,Debug mode status: This bit provides the debug status of IPUV core" "0: In execution mode. (Instruction execution..,1: In debug mode. (Instruction execution stalled)"
|
|
newline
|
|
rbitfld.long 0x4 0. "H_DBG,This register provides the status of debug mode acknowledgement upon hardware debug request" "0: In execution mode (No hardware debug request..,1: In debug upon assertion debug request signal."
|
|
line.long 0x8 "DEBUG_BKPT_POS,Debug Breakpoint Position Register"
|
|
hexmask.long.word 0x8 16.--31. 1. "XPOS,Horizontal Pixel position - Specifies the horizontal pixel position for XPOS or POS breakpoint."
|
|
newline
|
|
hexmask.long.word 0x8 0.--15. 1. "YPOS,Vertical Pixel position - Specifies the vertical position (i"
|
|
line.long 0xC "DEBUG_BKPT_ADDR,Debug Breakpoint Address Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. "IADDR,Instruction fetch address - This field holds the instruction address where instruction fetch breakpoint should occur"
|
|
newline
|
|
hexmask.long.byte 0xC 16.--23. 1. "DRADDR,Data read address - This field holds the data address of the register bank from where when reads happens triggers breakpoint on read"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--15. 1. "DWADDR,Data Write address - This field holds the data address of the register bank to where when write happens triggers breakpoint on write"
|
|
rgroup.long 0x414++0x3
|
|
line.long 0x0 "DEBUG_CORE_STAT,Debug Core Status Register"
|
|
bitfld.long 0x0 27. "N,Status of scalar negative flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "Z,Status of scalar zero flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "C,Status of scalar carry flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "OV,Status of scalar overflow flag." "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "PC,This field holds the value of the program counter"
|
|
group.long 0x500++0x7
|
|
line.long 0x0 "PMONITOR_CTRL,Performance Monitor Control Register"
|
|
bitfld.long 0x0 20. "INIT_EX_CNT,This bit is used for clear the execution cycle counter" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "INIT_S_DH,This bit is used for clear the stall counter on data hazards" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "INIT_S_SINOUT,This bit is used for clear the stall counter on stream-in 'and' stream-out interface" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "INIT_S_SOUT,This bit is used for clear the stall counter on stream-out interface" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "INIT_S_SIN,This bit is used for clear the stall counter on stream-in interface" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "STOP_EX_CNT,This bit provides a secondary override for disabling the execution cycle counter." "0: Execution cycle counter is defreezed from..,1: Execution cycle counter is freezed from counting."
|
|
newline
|
|
bitfld.long 0x0 11. "STOP_S_DH,This bit provides a secondary override for disabling the stall counter on data hazard interface." "0: Stall counter on data hazard is defreezed from..,1: Stall counter on data hazard is freezed from.."
|
|
newline
|
|
bitfld.long 0x0 10. "STOP_S_SINOUT,This bit provides a secondary override for disabling the stall counter on stream-in and stream-out interface" "0: stall counter on stream-in 'and' stream-out is..,1: Stall counter on stream-in 'and' stream-out is.."
|
|
newline
|
|
bitfld.long 0x0 9. "STOP_S_SOUT,This bit provides a secondary override for disabling the stall counter on stream-out interface." "0: Stall counter on stream-in is defreezed from..,1: Stall counter on stream-out is freezed from.."
|
|
newline
|
|
bitfld.long 0x0 8. "STOP_S_SIN,This bit provides a secondary override for disabling the stall counter on stream-in interface." "0: Stall counter is defreezed from counting.,1: Stall counter on stream-in is freezed from.."
|
|
newline
|
|
bitfld.long 0x0 4. "EN_EX_CNT,This bit controls the execution cycle counter." "0: Execution counter is inactive. Counter does not..,1: Execution counter is enabled. Counter counts the.."
|
|
newline
|
|
bitfld.long 0x0 3. "EN_S_DH,This bit controls the stall counter that monitors the stalls due to data hazards in the pipeline." "0: Stall counter on stalls due to data hazard is..,1: Stall counter on stalls due to data hazard is.."
|
|
newline
|
|
bitfld.long 0x0 2. "EN_S_SINOUT,This bit controls the stall counter that monitor both stream-in and stream-out stalls occurring in same clock cycle" "0: Stall counter on stream-in and stream-out stalls..,1: Stall counter on stream-in and stream-out stalls.."
|
|
newline
|
|
bitfld.long 0x0 1. "EN_S_SOUT,This bit controls the stall counter on stream-out interface." "0: Stall counter on stream-out stalls is inactive.,1: Stall counter on stream-out stalls is enabled."
|
|
newline
|
|
bitfld.long 0x0 0. "EN_S_SIN,This bit controls the stall counter on stream-in interface." "0: Stall counter on stream-in stalls is inactive.,1: Stall counter on stream-in stalls is enabled."
|
|
line.long 0x4 "PMONITOR_SAMPLE,Performance Monitor Sample Register"
|
|
bitfld.long 0x4 4. "SAMPLE_EX_CNT,Sample execution counter" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "SAMPLE_S_DH,Sample stall counter on data hazard" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "SAMPLE_S_SINOUT,Sample stall counter on stream-in 'and' stream-out interface." "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "SAMPLE_S_SOUT,Sample stall counter on stream-out interface." "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "SAMPLE_S_SIN,Sample stall counter on stream-in interface." "0,1"
|
|
rgroup.long 0x508++0x13
|
|
line.long 0x0 "STALL_STREAMIN,Stream-in Stall Counter"
|
|
hexmask.long 0x0 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0x4 "STALL_STREAMOUT,Stream-out Stall Counter"
|
|
hexmask.long 0x4 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0x8 "STALL_STREAMINOUT,Stream-in and Stream-out Stall Counter"
|
|
hexmask.long 0x8 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0xC "STALL_DATAHAZARD,Data Hazard Stall Counter"
|
|
hexmask.long 0xC 0.--31. 1. "STALLS,Number of stall cycles."
|
|
line.long 0x10 "EXEC_COUNTER,Execution Cycle Counter"
|
|
hexmask.long 0x10 0.--31. 1. "CYCLES,Number of execution cycles."
|
|
group.long 0x580++0xF
|
|
line.long 0x0 "IMEM_ERROR_INJECT_ADDR,IMEM Error Inject Address Register"
|
|
hexmask.long.byte 0x0 0.--5. 1. "ADDR,Instruction memory address for error injection."
|
|
line.long 0x4 "IMEM_ERROR_VECTOR0,IMEM Error Inject Vector0"
|
|
hexmask.long 0x4 0.--31. 1. "ERR_VEC0,Lower 32-bits of error vector."
|
|
line.long 0x8 "IMEM_ERROR_VECTOR1,IMEM Error Inject Vector1"
|
|
bitfld.long 0x8 31. "ERR_EN,Error injection enable" "0: No error is injected,1: Error is injected. ECC syndrome and SEC-DED.."
|
|
newline
|
|
hexmask.long.byte 0x8 0.--6. 1. "ERR_VEC1,Upper 7-bits of error vector."
|
|
line.long 0xC "IMEM_ERROR_INJECT_STAT,IMEM Error Injection Status register"
|
|
bitfld.long 0xC 31. "LOC_ACC,This field provides the status of the location of instruction memory at which error is injected was accessed by IPUV core" "0: Instruction memory location was not accessed.,1: Instruction memory location was accessed and.."
|
|
newline
|
|
hexmask.long.byte 0xC 8.--14. 1. "SYNDROME,7-bit syndrome found when error was injected."
|
|
newline
|
|
rbitfld.long 0xC 1. "DED,Double bit error was detected" "0,1"
|
|
newline
|
|
rbitfld.long 0xC 0. "SEC,Single bit error was detected and corrected." "0,1"
|
|
group.long 0x600++0x3
|
|
line.long 0x0 "RESET_REG,Reset Register"
|
|
bitfld.long 0x0 1. "HARD_RESET,Writing 1 to this field provides a hard reset to the IPUV module" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SOFT_RESET,Writing 1 to this field provides a soft reset to the IPUV module" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "JPEG (JPEG Decoder)"
|
|
base ad:0x400D4000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "ST1_SRAM_PTR,Stream 1 SRAM Pointer Register"
|
|
hexmask.long 0x0 0.--31. 1. "POINTER,Pointer"
|
|
line.long 0x4 "ST1_SRAM_LEN_VAL,Stream 1 SRAM Length Value Register"
|
|
hexmask.long.word 0x4 0.--15. 1. "PKT_LENGTH,Packet Length."
|
|
repeat 16. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x8)++0x3
|
|
line.long 0x0 "ST1_PTR_FIFO$1,Stream 1 Pointer FIFO Register"
|
|
hexmask.long 0x0 0.--31. 1. "POINTER,Pointer"
|
|
repeat.end
|
|
repeat 16. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x48)++0x3
|
|
line.long 0x0 "ST1_LEN_VAL_FIFO$1,Stream 1 Length Value FIFO register"
|
|
hexmask.long.word 0x0 0.--15. 1. "PKT_LENGTH,Packet Length"
|
|
repeat.end
|
|
group.long 0x88++0x7
|
|
line.long 0x0 "ST2_SRAM_PTR,Stream 2 SRAM Pointer register"
|
|
hexmask.long 0x0 0.--31. 1. "POINTER,Pointer"
|
|
line.long 0x4 "ST2_SRAM_LEN_VAL,Stream 2 SRAM Length Value Register"
|
|
hexmask.long.word 0x4 0.--15. 1. "PKT_LENGTH,Packet Length"
|
|
repeat 16. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x90)++0x3
|
|
line.long 0x0 "ST2_PTR_FIFO$1,Stream 2 Pointer FIFO Register"
|
|
hexmask.long 0x0 0.--31. 1. "POINTER,Pointer"
|
|
repeat.end
|
|
repeat 16. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0xD0)++0x3
|
|
line.long 0x0 "ST2_LEN_VAL_FIFO$1,Stream 2 Length Value FIFO Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "PKT_LENGTH,Packet Length"
|
|
repeat.end
|
|
group.long 0x110++0x7
|
|
line.long 0x0 "ST3_SRAM_PTR,Stream 3 SRAM Pointer Register"
|
|
hexmask.long 0x0 0.--31. 1. "POINTER,Pointer"
|
|
line.long 0x4 "ST3_SRAM_LEN_VAL,Stream 3 SRAM Length Value Register"
|
|
hexmask.long.word 0x4 0.--15. 1. "PKT_LENGTH,Packet Length"
|
|
repeat 16. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x118)++0x3
|
|
line.long 0x0 "ST3_PTR_FIFO$1,Stream 3 Pointer FIFO Register"
|
|
hexmask.long 0x0 0.--31. 1. "POINTER,Pointer"
|
|
repeat.end
|
|
repeat 16. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x158)++0x3
|
|
line.long 0x0 "ST3_LEN_VAL_FIFO$1,Stream 3 Length Value FIFO Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "PKT_LENGTH,Packet Length"
|
|
repeat.end
|
|
group.long 0x198++0x7
|
|
line.long 0x0 "ST4_SRAM_PTR,Stream 4 SRAM Pointer Register"
|
|
hexmask.long 0x0 0.--31. 1. "POINTER,Pointer"
|
|
line.long 0x4 "ST4_SRAM_LEN_VAL,Stream 4 SRAM Length Value Register"
|
|
hexmask.long.word 0x4 0.--15. 1. "PKT_LENGTH,Packet Length"
|
|
repeat 16. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x1A0)++0x3
|
|
line.long 0x0 "ST4_PTR_FIFO$1,Stream 4 Pointer FIFO Register"
|
|
hexmask.long 0x0 0.--31. 1. "POINTER,Pointer"
|
|
repeat.end
|
|
repeat 16. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x1E0)++0x3
|
|
line.long 0x0 "ST4_LEN_VAL_FIFO$1,Stream 4 Length Value FIFO Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "PKT_LENGTH,Packet Length"
|
|
repeat.end
|
|
group.long 0x230++0x1B
|
|
line.long 0x0 "BUF_C1_ADDR,Buffer Component 1 Address Register"
|
|
hexmask.long 0x0 0.--31. 1. "C1_ADDR,Component 1 Address"
|
|
line.long 0x4 "BUF_C2_ADDR,Buffer Component 2 Address Register"
|
|
hexmask.long 0x4 0.--31. 1. "C2_ADDR,Component 2 Address"
|
|
line.long 0x8 "BUF_C3_ADDR,Buffer Component 3 Address Register"
|
|
hexmask.long 0x8 0.--31. 1. "C3_ADDR,Component 3 Address"
|
|
line.long 0xC "BUF_C4_ADDR,Buffer Component 4 Address Register"
|
|
hexmask.long 0xC 0.--31. 1. "C4_ADDR,Component 4 Address"
|
|
line.long 0x10 "NRLINES_B2L,Block to Lines Number of Lines Register"
|
|
hexmask.long.word 0x10 16.--31. 1. "NRLINES_B2L_C23,Component 2 and 3"
|
|
hexmask.long.word 0x10 0.--15. 1. "NRLINES_B2L_C1,Component 1"
|
|
line.long 0x14 "NRLINES_B2L_C4,Block to Lines Number of Lines for Component 4 Register"
|
|
hexmask.long.word 0x14 0.--15. 1. "NRLINES_B2L_C4,Component 4"
|
|
line.long 0x18 "TIMEOUT,Timeout Register"
|
|
hexmask.long 0x18 0.--31. 1. "TIMEOUT_VAL,Timeout Value"
|
|
group.long 0x250++0x7
|
|
line.long 0x0 "W_CTRL1,Wrapper Control Register"
|
|
bitfld.long 0x0 8.--10. "N_STREAM,Number of streams" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 1.--3. "BNK_STRD,Bank stride value" "0: No stride.,1: Stride by 1x8 bytes.,?,?,?,?,?,?"
|
|
line.long 0x4 "W_CTRL2,Wrapper Control Register 2"
|
|
bitfld.long 0x4 30. "COM_MODE,Compatibility mode" "0: Context Switch mode.,1: Compatibility mode."
|
|
bitfld.long 0x4 29. "SMPL_O_BF,Sample Output Buffers" "0,1"
|
|
bitfld.long 0x4 19. "P_JPEG_ST4,Precision Stream 4" "0: 8 bits,1: 12 bits"
|
|
newline
|
|
bitfld.long 0x4 16.--18. "NF_JPEG_ST4,Number of Image Components in Stream 4" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 14. "P_JPEG_ST3,Precision Stream 3" "0: 8 bits,1: 12 bits"
|
|
bitfld.long 0x4 11.--13. "NF_JPEG_ST3,No of Image Components in Stream 3" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 9. "P_JPEG_ST2,Precision Stream 2" "0: 8 bits,1: 12 bits"
|
|
bitfld.long 0x4 6.--8. "NF_JPEG_ST2,Number of Image Components in Stream 2" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 4. "P_JPEG_ST1,Precision Stream 1" "0: 8 bit precision,1: 12 bit precision"
|
|
newline
|
|
bitfld.long 0x4 1.--3. "NF_JPEG_ST1,Number of Image Components in Stream 1" "0,1,2,3,4,5,6,7"
|
|
group.long 0x25C++0x7
|
|
line.long 0x0 "INTR_EN,Interrupt Enable"
|
|
bitfld.long 0x0 31. "CONFIG_ERR_EN,Config Error Enable" "0,1"
|
|
hexmask.long.byte 0x0 27.--30. 1. "WTR_MRK_LVL,Water Mark Level"
|
|
bitfld.long 0x0 26. "STRT_OF_FRME_DN_EN,Start of Frame Done Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "END_OF_FRME_DN_EN,End of Frame Done Enable" "0,1"
|
|
bitfld.long 0x0 24. "MCU_ROW_DN_EN,One MCU Row Done Enable" "0,1"
|
|
bitfld.long 0x0 18. "PKT4_FIFO_WATERMARK,Stream 4 Packet FIFO Watermark" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "PKT3_FIFO_WATERMARK,Stream 3 Packet FIFO Watermark" "0,1"
|
|
bitfld.long 0x0 6. "PKT2_FIFO_WATERMARK,Stream 2 Packet FIFO Watermark" "0,1"
|
|
bitfld.long 0x0 0. "PKT1_FIFO_WATERMARK,Stream 1 Packet FIFO Watermark" "0,1"
|
|
line.long 0x4 "W_STATUS,Wrapper Status Register"
|
|
rbitfld.long 0x4 29.--31. "ST_WR,Stream Write" "0: invalid,1: stream 1,2: stream 2,3: stream 3,4: stream 4,5: invalid,6: invalid,7: invalid"
|
|
bitfld.long 0x4 26. "STRT_OF_FRME,Start of Frame" "0,1"
|
|
bitfld.long 0x4 25. "End_of_Frame,End of Frame" "0,1"
|
|
newline
|
|
bitfld.long 0x4 24. "MCU_ROW_DN,One MCU Row Done" "0,1"
|
|
hexmask.long.byte 0x4 19.--23. 1. "PKT4_FIFO_SPACE,Space in FIFO of Stream 4"
|
|
bitfld.long 0x4 18. "PKT4_FIFO_WATERMARK,Watermark for FIFO of ethernet packets information of stream 4" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x4 13.--17. 1. "PKT3_FIFO_SPACE,Space in FIFO of Stream 3"
|
|
bitfld.long 0x4 12. "PKT3_FIFO_WATERMARK,Watermark for FIFO of ethernet packets information of stream 3" "0,1"
|
|
hexmask.long.byte 0x4 7.--11. 1. "PKT2_FIFO_SPACE,Space in FIFO of Stream 2"
|
|
newline
|
|
bitfld.long 0x4 6. "PKT2_FIFO_WATERMARK,Watermark for FIFO of ethernet packets information of stream 2" "0,1"
|
|
hexmask.long.byte 0x4 1.--5. 1. "PKT1_FIFO_SPACE,Space in FIFO of Stream 1"
|
|
bitfld.long 0x4 0. "PKT1_FIFO_WATERMARK,Watermark for FIFO of ethernet packets information of stream 1" "0,1"
|
|
rgroup.long 0x264++0x3
|
|
line.long 0x0 "E_STATUS,Error Status Register"
|
|
bitfld.long 0x0 0. "CR_ERR,Core Error" "0,1"
|
|
group.long 0x268++0x2B
|
|
line.long 0x0 "RST_INTVL,Restart Interval"
|
|
hexmask.long.word 0x0 0.--15. 1. "INTVAL,Interval Val"
|
|
line.long 0x4 "IMG_SZ_ST1,Image Size of Stream 1"
|
|
hexmask.long.word 0x4 16.--31. 1. "Y_JPEG_ST1,Number of lines per frame for stream 1"
|
|
hexmask.long.word 0x4 0.--15. 1. "X_JPEG_ST1,Number of pixels per line for stream 1"
|
|
line.long 0x8 "IMG_SZ_ST2,Image Size of Stream 2"
|
|
hexmask.long.word 0x8 16.--31. 1. "Y_JPEG_ST2,Number of lines per frame for stream 2"
|
|
hexmask.long.word 0x8 0.--15. 1. "X_JPEG_ST2,Number of Pixels per frame for stream 2"
|
|
line.long 0xC "IMG_SZ_ST3,Image Size of Stream 3"
|
|
hexmask.long.word 0xC 16.--31. 1. "Y_JPEG_ST3,Number of lines per frame for stream 3"
|
|
hexmask.long.word 0xC 0.--15. 1. "X_JPEG_ST3,Number of Pixels per frame for stream 3"
|
|
line.long 0x10 "IMG_SZ_ST4,Image Size of Stream 4"
|
|
hexmask.long.word 0x10 16.--31. 1. "Y_JPEG_ST4,Number of lines per frame for stream 4"
|
|
hexmask.long.word 0x10 0.--15. 1. "X_JPEG_ST4,Number of Pixels per frame for stream 4"
|
|
line.long 0x14 "SMPL_FCTR_ST1,Sampling Factor Stream 1"
|
|
hexmask.long.byte 0x14 28.--31. 1. "V4_JPEG_ST1,Vertical sampling factor of image component 4 of stream 1"
|
|
hexmask.long.byte 0x14 24.--27. 1. "V3_JPEG_ST1,Vertical sampling factor of image component 3 of stream 1"
|
|
hexmask.long.byte 0x14 20.--23. 1. "V2_JPEG_ST1,Vertical sampling factor of image component 2 of stream 1"
|
|
newline
|
|
hexmask.long.byte 0x14 16.--19. 1. "V1_JPEG_ST1,Vertical sampling factor of image component 1 of stream 1"
|
|
hexmask.long.byte 0x14 12.--15. 1. "H4_JPEG_ST1,Horizontal sampling factor of image component 4 of stream 1"
|
|
hexmask.long.byte 0x14 8.--11. 1. "H3_JPEG_ST1,Horizontal sampling factor of image component 3 of stream 1"
|
|
newline
|
|
hexmask.long.byte 0x14 4.--7. 1. "H2_JPEG_ST1,Horizontal sampling factor of image component 2 of stream 1"
|
|
hexmask.long.byte 0x14 0.--3. 1. "H1_JPEG_ST1,Horizontal sampling factor of image component 1 of stream 1"
|
|
line.long 0x18 "SMPL_FCTR_ST2,Sampling Factor Stream 2"
|
|
hexmask.long.byte 0x18 28.--31. 1. "V4_JPEG_ST2,Vertical sampling factor of image component 4 of stream 2"
|
|
hexmask.long.byte 0x18 24.--27. 1. "V3_JPEG_ST2,Vertical sampling factor of image component 3 of stream 2"
|
|
hexmask.long.byte 0x18 20.--23. 1. "V2_JPEG_ST2,Vertical sampling factor of image component 2 of stream 2"
|
|
newline
|
|
hexmask.long.byte 0x18 16.--19. 1. "V1_JPEG_ST2,Vertical sampling factor of image component 1 of stream 2"
|
|
hexmask.long.byte 0x18 12.--15. 1. "H4_JPEG_ST2,Horizontal sampling factor of image component 4 of stream 2"
|
|
hexmask.long.byte 0x18 8.--11. 1. "H3_JPEG_ST2,Horizontal sampling factor of image component 3 of stream 2"
|
|
newline
|
|
hexmask.long.byte 0x18 4.--7. 1. "H2_JPEG_ST2,Horizontal sampling factor of image component 2 of stream 2"
|
|
hexmask.long.byte 0x18 0.--3. 1. "H1_JPEG_ST2,Horizontal sampling factor of image component 1 of stream 2"
|
|
line.long 0x1C "SMPL_FCTR_ST3,Sampling Factor Stream 3"
|
|
hexmask.long.byte 0x1C 28.--31. 1. "V4_JPEG_ST3,Vertical sampling factor of image component 4 of stream 3"
|
|
hexmask.long.byte 0x1C 24.--27. 1. "V3_JPEG_ST3,Vertical sampling factor of image component 3 of stream 3"
|
|
hexmask.long.byte 0x1C 20.--23. 1. "V2_JPEG_ST3,Vertical sampling factor of image component 2 of stream 3"
|
|
newline
|
|
hexmask.long.byte 0x1C 16.--19. 1. "V1_JPEG_ST3,Vertical sampling factor of image component 1 of stream 3"
|
|
hexmask.long.byte 0x1C 12.--15. 1. "H4_JPEG_ST3,Horizontal sampling factor of image component 4 of stream 3"
|
|
hexmask.long.byte 0x1C 8.--11. 1. "H3_JPEG_ST3,Horizontal sampling factor of image component 3 of stream 3"
|
|
newline
|
|
hexmask.long.byte 0x1C 4.--7. 1. "H2_JPEG_ST3,Horizontal sampling factor of image component 2 of stream 3"
|
|
hexmask.long.byte 0x1C 0.--3. 1. "H1_JPEG_ST3,Horizontal sampling factor of image component 1 of stream 3"
|
|
line.long 0x20 "SMPL_FCTR_ST4,Sampling Factor Stream 4"
|
|
hexmask.long.byte 0x20 28.--31. 1. "V4_JPEG_ST4,Vertical sampling factor of image component 4 of stream 4"
|
|
hexmask.long.byte 0x20 24.--27. 1. "V3_JPEG_ST4,Vertical sampling factor of image component 3 of stream 4"
|
|
hexmask.long.byte 0x20 20.--23. 1. "V2_JPEG_ST4,Vertical sampling factor of image component 2 of stream 4"
|
|
newline
|
|
hexmask.long.byte 0x20 16.--19. 1. "V1_JPEG_ST4,Vertical sampling factor of image component 1 of stream 4"
|
|
hexmask.long.byte 0x20 12.--15. 1. "H4_JPEG_ST4,Horizontal sampling factor of image component 4 of stream 4"
|
|
hexmask.long.byte 0x20 8.--11. 1. "H3_JPEG_ST4,Horizontal sampling factor of image component 3 of stream 4"
|
|
newline
|
|
hexmask.long.byte 0x20 4.--7. 1. "H2_JPEG_ST4,Horizontal sampling factor of image component 2 of stream 4"
|
|
hexmask.long.byte 0x20 0.--3. 1. "H1_JPEG_ST4,Horizontal sampling factor of image component 1 of stream 4"
|
|
line.long 0x24 "TST_PXL_LOC,Test Pixel Location"
|
|
bitfld.long 0x24 31. "TST_LINE_EN,Test line enable" "0,1"
|
|
bitfld.long 0x24 26.--28. "TST_LINE,Test line for pixel 1 and 2" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.tbyte 0x24 0.--17. 1. "TST_BLK_PXL1,MCU block location for test pixel 1"
|
|
line.long 0x28 "TST_PXL_LOC1,Test Pixel Location 1"
|
|
hexmask.long.tbyte 0x28 0.--17. 1. "TST_BLK_PXL2,MCU block location for test pixel 2"
|
|
rgroup.long 0x294++0x2F
|
|
line.long 0x0 "TST_LINE_LUMA_ST1,Test Line Luma Pixel Value for Stream 1"
|
|
hexmask.long.word 0x0 16.--27. 1. "LUMA2_VAL,Luma Value of Pixel 2"
|
|
hexmask.long.word 0x0 0.--11. 1. "LUMA1_VAL,Luma Value of Pixel 1"
|
|
line.long 0x4 "TST_LINE_Cb_ST1,Test Line Cb Pixel Value for Stream 1"
|
|
hexmask.long.word 0x4 16.--27. 1. "Cb2_VAL,Cb Value of Pixel 2"
|
|
hexmask.long.word 0x4 0.--11. 1. "Cb1_VAL,Cb Value of Pixel 1"
|
|
line.long 0x8 "TST_LINE_Cr_ST1,Test Line Cr Pixel Value for Stream 1"
|
|
hexmask.long.word 0x8 16.--27. 1. "Cr2_VAL,Cr Value of Pixel 2"
|
|
hexmask.long.word 0x8 0.--11. 1. "Cr1_VAL,Cr Value of Pixel 1"
|
|
line.long 0xC "TST_LINE_LUMA_ST2,Test Line Luma Pixel Value for Stream 2"
|
|
hexmask.long.word 0xC 16.--27. 1. "LUMA2_VAL,Luma Value of Pixel 2"
|
|
hexmask.long.word 0xC 0.--11. 1. "LUMA1_VAL,Luma Value of Pixel 1"
|
|
line.long 0x10 "TST_LINE_Cb_ST2,Test Line Cb Pixel Value for Stream 2"
|
|
hexmask.long.word 0x10 16.--27. 1. "Cb2_VAL,Cb Value of Pixel 2"
|
|
hexmask.long.word 0x10 0.--11. 1. "Cb1_VAL,Cb Value of Pixel 1"
|
|
line.long 0x14 "TST_LINE_Cr_ST2,Test Line Cr Pixel Value for Stream 2"
|
|
hexmask.long.word 0x14 16.--27. 1. "Cr2_VAL,Cr Value of Pixel 2"
|
|
hexmask.long.word 0x14 0.--11. 1. "Cr1_VAL,Cr Value of Pixel 1"
|
|
line.long 0x18 "TST_LINE_LUMA_ST3,Test Line Luma Pixel Value for Stream 3"
|
|
hexmask.long.word 0x18 16.--27. 1. "LUMA2_VAL,Luma Value of Pixel 2"
|
|
hexmask.long.word 0x18 0.--11. 1. "LUMA1_VAL,Luma Value of Pixel 1"
|
|
line.long 0x1C "TST_LINE_Cb_ST3,Test Line Cb Pixel Value for Stream 3"
|
|
hexmask.long.word 0x1C 16.--27. 1. "Cb2_VAL,Cb Value of Pixel 2"
|
|
hexmask.long.word 0x1C 0.--11. 1. "Cb1_VAL,Cb Value of Pixel 1"
|
|
line.long 0x20 "TST_LINE_Cr_ST3,Test Line Cr Pixel Value for Stream 3"
|
|
hexmask.long.word 0x20 16.--27. 1. "Cr2_VAL,Cr Value of Pixel 2"
|
|
hexmask.long.word 0x20 0.--11. 1. "Cr1_VAL,Cr Value of Pixel 1"
|
|
line.long 0x24 "TST_LINE_LUMA_ST4,Test Line Luma Pixel Value for Stream 4"
|
|
hexmask.long.word 0x24 16.--27. 1. "LUMA2_VAL,Luma Value of Pixel 2"
|
|
hexmask.long.word 0x24 0.--11. 1. "LUMA1_VAL,Luma Value of Pixel 1"
|
|
line.long 0x28 "TST_LINE_Cb_ST4,Test Line Luma Cb Pixel Value for Stream 4"
|
|
hexmask.long.word 0x28 16.--27. 1. "Cb2_VAL,Cb Value of Pixel 2"
|
|
hexmask.long.word 0x28 0.--11. 1. "Cb1_VAL,Cb Value of Pixel 1"
|
|
line.long 0x2C "TST_LINE_Cr_ST4,Test Line Cr Pixel Value for Stream 4"
|
|
hexmask.long.word 0x2C 16.--27. 1. "Cr2_VAL,Cr Value of Pixel 2"
|
|
hexmask.long.word 0x2C 0.--11. 1. "Cr1_VAL,Cr Value of Pixel 1"
|
|
group.long 0x2E0++0x3
|
|
line.long 0x0 "CTRL,Control Register"
|
|
bitfld.long 0x0 2. "GO,Go" "0,1"
|
|
bitfld.long 0x0 1. "SWR,Soft reset" "0,1"
|
|
bitfld.long 0x0 0. "LP,Low Power" "0,1"
|
|
rgroup.long 0x2E4++0x33
|
|
line.long 0x0 "STATUS1,Status 1 Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "IMAGE_WIDTH,Image width"
|
|
line.long 0x4 "STATUS2,Status 2 Register"
|
|
hexmask.long.word 0x4 0.--15. 1. "IMAGE_HEIGHT,Image height"
|
|
line.long 0x8 "STATUS3,Status 3 Register"
|
|
hexmask.long.word 0x8 0.--15. 1. "HMCU,Horizontal MCUs"
|
|
line.long 0xC "STATUS4,Status 4 Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "VMCU,Vertical MCUs"
|
|
line.long 0x10 "STATUS5,Status 5 Register"
|
|
hexmask.long.byte 0x10 8.--15. 1. "C0,Component identifier for scan component 0"
|
|
bitfld.long 0x10 5.--7. "H0,Horizontal sampling for scan component 0" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 2.--4. "V0,Vertical sampling for scan component 0" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 0.--1. "Tq0,Quantization table identifier for scan component 0" "0,1,2,3"
|
|
line.long 0x14 "STATUS6,Status 6 Register"
|
|
hexmask.long.byte 0x14 8.--15. 1. "C1,Component identifier for scan component 1"
|
|
bitfld.long 0x14 5.--7. "H1,Horizontal sampling for scan component 1" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 2.--4. "V1,Vertical sampling for scan component 1" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x14 0.--1. "TQ1,Quantization table identifier for scan component 1" "0,1,2,3"
|
|
line.long 0x18 "STATUS7,Status 7 Register"
|
|
hexmask.long.byte 0x18 8.--15. 1. "C2,Component identifier for scan component 2"
|
|
bitfld.long 0x18 5.--7. "H2,Horizontal sampling for scan component 2" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 2.--4. "V2,Vertical sampling for scan component 2" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x18 0.--1. "Tq2,Quantization table identifier for scan component 2" "0,1,2,3"
|
|
line.long 0x1C "STATUS8,Status 8 Register"
|
|
hexmask.long.byte 0x1C 8.--15. 1. "C3,Component identifier for scan component 3"
|
|
bitfld.long 0x1C 5.--7. "H3,Horizontal sampling for scan component 3" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x1C 2.--4. "V3,Vertical sampling for scan component 3" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 0.--1. "TQ3,Quantization table identifier for scan component 3" "0,1,2,3"
|
|
line.long 0x20 "STATUS9,Status 9 Register"
|
|
hexmask.long.byte 0x20 8.--15. 1. "SMPL_PRESN,Sample Precision"
|
|
hexmask.long.byte 0x20 0.--7. 1. "NF,Number of components in frame"
|
|
line.long 0x24 "STATUS10,Status 10 Register"
|
|
hexmask.long.word 0x24 0.--15. 1. "DRI,Restart interval"
|
|
line.long 0x28 "STATUS11,Status 11 Register"
|
|
hexmask.long.byte 0x28 12.--15. 1. "Hmax,Horizontal Maximum"
|
|
hexmask.long.byte 0x28 8.--11. 1. "Vmax,Vertical Maximum"
|
|
hexmask.long.byte 0x28 4.--7. 1. "NBMCU,Number of blocks per MCU."
|
|
newline
|
|
hexmask.long.byte 0x28 0.--3. 1. "Ns,Number of components in current scan"
|
|
line.long 0x2C "STATUS12,Status 12 Register"
|
|
hexmask.long.byte 0x2C 12.--15. 1. "VHS3,This bitfield defines the number of blocks of fourth component in MCU."
|
|
hexmask.long.byte 0x2C 8.--11. 1. "VHS2,This bitfield defines the number of blocks of third component in MCU."
|
|
hexmask.long.byte 0x2C 4.--7. 1. "VHS1,This bitfield defines the number of blocks of second component in MCU."
|
|
newline
|
|
hexmask.long.byte 0x2C 0.--3. 1. "VHS0,This bitfield defines the number of blocks of second component in MCU."
|
|
line.long 0x30 "STATUS13,Status 13 Register"
|
|
bitfld.long 0x30 7. "SOF_E,Start of Frame Marker Error" "0,1"
|
|
bitfld.long 0x30 6. "SOS_E,Start of Scan Marker Error" "0,1"
|
|
bitfld.long 0x30 5. "DQT_E,Define Quantization Table Marker Error" "0,1"
|
|
newline
|
|
bitfld.long 0x30 4. "DHT_E,Define Huffman Table Marker Error" "0,1"
|
|
bitfld.long 0x30 3. "DNL_E,Define Number of Lines Marker Error" "0,1"
|
|
bitfld.long 0x30 2. "DRI_E,Define Restart Interval Marker Error" "0,1"
|
|
newline
|
|
bitfld.long 0x30 1. "APPn_E,Application Data Marker Error" "0,1"
|
|
bitfld.long 0x30 0. "COM_E,Comment Marker Error" "0,1"
|
|
tree.end
|
|
tree "LFAST (LVDS Fast Asynchronous Serial Transmission)"
|
|
base ad:0x40078000
|
|
group.long 0x0++0x23
|
|
line.long 0x0 "MCR,LFAST Mode Configuration Register"
|
|
bitfld.long 0x0 31. "MSEN,LFAST Master or Slave mode Enable. This bit selects either the LFAST master or slave functionality." "0: Enable the modules LFAST Slave functionality only.,1: Enable the modules LFAST Master functionality.."
|
|
bitfld.long 0x0 24. "IPGDBG,Control bit to enable support for IPG Debug mode" "0: IPG debug mode enable signal will be ignored.,1: IPG debug mode enable signal will not be ignored."
|
|
newline
|
|
bitfld.long 0x0 16. "LSSEL,Selects the fraction of sysclk in Low Speed Select mode (see Slow speed clock for details)." "0: Low Speed Mode in which the lfast_sysclk input..,1: Low Speed Mode in which the lfast_sysclk input.."
|
|
bitfld.long 0x0 15. "DRFEN,LFAST Enable. This bit enables/disables the reception and transfer of LFAST device." "0: LFAST is immediately disabled. All..,1: LFAST is Enabled."
|
|
newline
|
|
bitfld.long 0x0 14. "RXEN,LFAST Receiver Enable" "0: Receiver Interface is disabled. If this bit is..,1: Receiver Interface is Enabled."
|
|
bitfld.long 0x0 13. "TXEN,LFAST Transmitter Enable" "0: LFAST transmitter Interface is disabled. No new..,1: LFAST transmitter Interface is enabled. New.."
|
|
newline
|
|
bitfld.long 0x0 4. "TXARBD,Tx Arbiter Disable" "0: Enable Tx arbiter and framer. When enabled it..,1: Disable Tx arbiter and framer. All frame.."
|
|
bitfld.long 0x0 3. "CTSEN,CTS Enable" "0: CTS mode is disabled. Indicates that the device..,1: CTS mode is enabled. The CTS bit of all transmit.."
|
|
newline
|
|
bitfld.long 0x0 1. "DRFRST,LFAST Soft Reset. This bit is automatically cleared after Reset.." "0: No Soft Reset,1: Soft Reset to LFAST is asserted. When set it.."
|
|
bitfld.long 0x0 0. "DATAEN,DATA Frame Enable" "0: Data frame transmission and reception is..,1: Data frame transmission and reception is.."
|
|
line.long 0x4 "SCR,LFAST Speed Control Register"
|
|
bitfld.long 0x4 16. "DRMD,Data Rate Controller mode. Defines the mode setting for LFAST slave device by S/W or LFAST master." "0: S/W controls the Data Rate controller mode. In..,1: In LFAST Slave the reception of ICLC frame for.."
|
|
bitfld.long 0x4 8. "RDR,Receiver Data Rate" "0: Data rate of Rx block is low speed.,1: Data rate of Rx block is high speed."
|
|
newline
|
|
bitfld.long 0x4 0. "TDR,Transmit Data Rate" "0: Data rate of Tx block is low speed.,1: Data rate of Tx block is high speed."
|
|
line.long 0x8 "COCR,LFAST Correlator Control Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. "SMPSEL,Sampler Data Path Selector (overrides the correlator selection)"
|
|
bitfld.long 0x8 1.--3. "CORRTH,Correlator threshold level" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x8 0. "PHSSEL,Polyphase 8 or 4 phase selection" "0: 8 phases,1: 4 phases"
|
|
line.long 0xC "TMCR,LFAST Test Mode Control Register"
|
|
bitfld.long 0xC 25. "CLKTST,Clock Test mode" "0: Clock Test mode disabled,1: Clock Test mode enabled"
|
|
bitfld.long 0xC 24. "LPON,Loopback mode Logic Enable" "0: Loopback mode is disabled,1: Loopback mode is enabled"
|
|
newline
|
|
bitfld.long 0xC 16.--18. "LPMOD,Loopback mode" "0: Rx loopback,1: Rx LVDS loopback,2: Tx loopback without automatic frame generation,3: Tx loopback with automatic frame generation,4: Tx LVDS loopback (external) with automatic frame..,?,?,?"
|
|
hexmask.long.word 0xC 0.--15. 1. "LPFRMTH,Loopback check mode valid pass frames threshold value"
|
|
line.long 0x10 "ALCR,LFAST Auto Loopback Control Register"
|
|
bitfld.long 0x10 16. "LPCNTEN,Auto Loopback Frame Transmission Count Enable" "0: Infinite pre-defined loopback frame transmission..,1: Fixed count of pre-defined loopback frame.."
|
|
hexmask.long.word 0x10 0.--15. 1. "LPFMCNT,Auto Loopback Frame Transmission Count"
|
|
line.long 0x14 "RCDCR,LFAST Rate Change Delay Control Register"
|
|
hexmask.long.byte 0x14 16.--19. 1. "DRCNT,Data Rate Controller Counter Value"
|
|
line.long 0x18 "SLCR,LFAST Wakeup Delay Control Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. "HSCNT,High Speed Sleep mode Exit Time"
|
|
hexmask.long.byte 0x18 16.--19. 1. "LSCNT,Low Speed Sleep mode Exit Time"
|
|
newline
|
|
hexmask.long.byte 0x18 8.--15. 1. "HWKCNT,Wake Up time for the LD"
|
|
hexmask.long.byte 0x18 0.--3. 1. "LWKCNT,Wake Up time for the LD"
|
|
line.long 0x1C "ICR,LFAST ICLC Control Register"
|
|
bitfld.long 0x1C 17. "ICLCSEQ,ICLC enabled" "0: Single ICLC frame transfer.,1: S/W is performing ICLC frame transfers. Only the.."
|
|
bitfld.long 0x1C 16. "SNDICLC,ICLC frame request" "0: No Valid ICLC frame for transfer.,1: Valid ICLC frame for transfer."
|
|
newline
|
|
hexmask.long.byte 0x1C 0.--7. 1. "ICLCPLD,ICLC Payload"
|
|
line.long 0x20 "PICR,LFAST Ping Control Register"
|
|
bitfld.long 0x20 16. "PNGREQ,Ping Response Frame Request" "0: No pending Ping response frame transmission..,1: Ping response frame transmission request is queued"
|
|
bitfld.long 0x20 15. "PNGAUTO,Ping Response Enable" "0: Ping response should not be automatically sent.,1: Ping response should be automatically sent."
|
|
newline
|
|
hexmask.long.byte 0x20 0.--7. 1. "PNGPYLD,LFAST Slave: Defines the LFAST slaves ping reply frame payload content"
|
|
group.long 0x2C++0x1B
|
|
line.long 0x0 "RFCR,LFAST Rx FIFO CTS Control Register"
|
|
hexmask.long.byte 0x0 16.--21. 1. "RCTSMX,Rx FIFO Maximum Threshold"
|
|
hexmask.long.byte 0x0 0.--5. 1. "RCTSMN,Rx FIFO Minimum Threshold"
|
|
line.long 0x4 "TIER,LFAST Tx Interrupt Enable Register"
|
|
bitfld.long 0x4 17. "TXIIE,Tx Data Interface Not Enabled - (Mask) Enables or disables the interrupt" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
bitfld.long 0x4 16. "TXOVIE,Transmit Data FIFO Overflow Interrupt Enable." "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
newline
|
|
bitfld.long 0x4 4. "TXPNGIE,Ping Response Frame Transmitted Interrupt Enable." "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
bitfld.long 0x4 2. "TXUNSIE,Unsolicited Frame transmitted Interrupt Enable" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
newline
|
|
bitfld.long 0x4 1. "TXICLCIE,ICLC Frame transmitted Interrupt Enable" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
bitfld.long 0x4 0. "TXDTIE,Data Frame transmitted Interrupt Enable" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
line.long 0x8 "RIER,LFAST Rx Interrupt Enable Register"
|
|
bitfld.long 0x8 23. "RXUOIE,Unsolicited frame register overflow" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
bitfld.long 0x8 22. "RXMNIE,Rx Data FIFO Min Threshold reached" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
newline
|
|
bitfld.long 0x8 21. "RXMXIE,Rx Data FIFO Max Threshold reached" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
bitfld.long 0x8 20. "RXUFIE,Rx Data FIFO Underflow" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
newline
|
|
bitfld.long 0x8 19. "RXOFIE,Rx Data FIFO Overflow" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
bitfld.long 0x8 18. "RXSZIE,Frame with unsupported frame size received. Valid frame sizes are defined in" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
newline
|
|
bitfld.long 0x8 17. "RXICIE,Invalid ICLC code Received" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
bitfld.long 0x8 16. "RXLCEIE,Invalid Logical Channel Type" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
newline
|
|
bitfld.long 0x8 3. "RXCTSIE,Frame with CTS bit Low Received" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
bitfld.long 0x8 2. "RXDIE,Data frame received" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
newline
|
|
bitfld.long 0x8 1. "RXUNSIE,Unsolicited Frame received" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
line.long 0xC "RIIER,LFAST Rx ICLC Interrupt Enable Register"
|
|
bitfld.long 0xC 13. "ICPFIE,Ping Frame Response failed" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
bitfld.long 0xC 12. "ICPSIE,Ping Frame Response successful" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
newline
|
|
bitfld.long 0xC 11. "ICPRIE,ICLC frame for Ping Frame Request received" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
bitfld.long 0xC 10. "ICTOIE,ICLC frame for Test mode off received" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
newline
|
|
bitfld.long 0xC 9. "ICLPIE,ICLC frame for Loopback On received" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
bitfld.long 0xC 8. "ICCTIE,ICLC frame for Clk Test mode on received" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
newline
|
|
bitfld.long 0xC 7. "ICTDIE,ICLC frame for LFAST Slaves Tx Interface Disable received" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
bitfld.long 0xC 6. "ICTEIE,ICLC frame for LFAST Slaves Tx Interface Enable received" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
newline
|
|
bitfld.long 0xC 5. "ICRFIE,ICLC frame for LFAST Slaves Rx Interface fast mode switch received" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
bitfld.long 0xC 4. "ICRSIE,ICLC frame for LFAST Slaves Rx Interface slow mode switch received" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
newline
|
|
bitfld.long 0xC 3. "ICTFIE,ICLC frame for LFAST Slaves Tx Interface fast mode switch received" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
bitfld.long 0xC 2. "ICTSIE,ICLC frame for LFAST Slaves Tx Interface slow mode switch received" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
newline
|
|
bitfld.long 0xC 1. "ICPOFIE,ICLC frame for PLL OFF received" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
bitfld.long 0xC 0. "ICPONIE,ICLC frame for PLL ON received" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
line.long 0x10 "PLLCR,LFAST PLL Control Register"
|
|
bitfld.long 0x10 29.--31. "IPTMOD,Test mode programmability 000 Functional mode 001 Closed Loop 1 010 Force Vctrl 011 Charge Pump Up 100 Charge Pump Up Internal Test 101 Charge Pump Idle 110 Charge Pump Down 111 Closed Loop 2" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 17. "SWPOFF,SW signal to turn OFF the PLL. Set by user software and cleared by system hardware." "0: No effect,1: PLL will be turned OFF."
|
|
newline
|
|
bitfld.long 0x10 16. "SWPON,SW signal to turn ON the PLL. Set by user software and cleared by system hardware." "0: No effect,1: PLL will be turned ON"
|
|
bitfld.long 0x10 15. "REFINV,Inverts reference clock edge to PFD" "0: Do not inverted,1: Invert"
|
|
newline
|
|
bitfld.long 0x10 8. "FDIVEN,Enable fraction division mode in feedback divider" "0: Fraction division mode not enabled,1: Fraction division mode enabled"
|
|
hexmask.long.byte 0x10 2.--7. 1. "FBDIV,Feedback Division factor for VCO output clock"
|
|
newline
|
|
bitfld.long 0x10 0.--1. "PREDIV,Division factor for PLL Reference Clock input" "0: Direct clock passed,1: Divide by 2,2: Divide by 3,3: Divide by 4"
|
|
line.long 0x14 "LCR,LFAST LVDS Control Register"
|
|
bitfld.long 0x14 23. "SWWKLD,SW signal to take LVDS LD out of Sleep mode" "0: No effect,1: LVDS LD will be taken out of sleep (provided no.."
|
|
bitfld.long 0x14 22. "SWSLPLD,SW signal to put LVDS LD into Sleep mode" "0: No effect,1: LVDS LD will be put in sleep"
|
|
newline
|
|
bitfld.long 0x14 21. "SWWKLR,SW signal to take LVDS LR out of Sleep mode" "0: No effect,1: LVDS LR will be taken out of sleep (provided no.."
|
|
bitfld.long 0x14 20. "SWSLPLR,SW signal to put LVDS LR into Sleep mode" "0: No effect,1: LVDS LR will be put in sleep (provided no other.."
|
|
newline
|
|
bitfld.long 0x14 19. "SWOFFLD,SW signal to turn OFF the LVDS LD" "0: No effect,1: LVDS LD will be turned OFF(provided no other.."
|
|
bitfld.long 0x14 18. "SWONLD,SW signal to turn ON the LVDS LD" "0: No effect,1: LVDS LD will be turned ON"
|
|
newline
|
|
bitfld.long 0x14 17. "SWOFFLR,SW signal to turn OFF the LVDS LR" "0: No effect,1: LVDS LR will be turned OFF (provided no other.."
|
|
bitfld.long 0x14 16. "SWONLR,SW signal to turn ON the LVDS LR" "0: No effect,1: LVDS LR will be turned ON"
|
|
newline
|
|
bitfld.long 0x14 15. "LVRXOFF,Indicates the value driven onto LVDS LR output when in shutdown mode" "0,1"
|
|
bitfld.long 0x14 14. "LVTXOE,LVDS LD output buffer enable" "0,1"
|
|
newline
|
|
bitfld.long 0x14 13. "TXCMUX,Tx and Clock Mux" "0,1"
|
|
bitfld.long 0x14 12. "LVRFEN,LVDS pad reference enable 0 LVDS reference pad disabled 1 LVDS reference pad enabled" "0,1"
|
|
newline
|
|
bitfld.long 0x14 11. "LVLPEN,Tx LVDS internal loopback enable" "0: Tx LVDS normal mode enabled,1: Tx LVDS internal loopback mode enabled"
|
|
bitfld.long 0x14 5. "LVRXOP_TR,Used to enable or disable the on-chip receiver termination resistor in LFAST mode (applies to LVDS pad use for LFAST only): 1 Disable on-chip LFAST receiver termination 0 Enable on-chip LFAST receiver termination" "0,1"
|
|
line.long 0x18 "UNSTCR,LFAST Unsolicited Tx Control Register"
|
|
bitfld.long 0x18 16. "USNDRQ,Tx Unsolicited send request" "0: No valid Unsolicited frame exists,1: Valid Unsolicited frame exists for transmission"
|
|
hexmask.long.byte 0x18 0.--6. 1. "UNSHDR,Tx Unsolicited message header. This field can only be written when LFAST_UNSTCR[USNDRQ] = 0"
|
|
repeat 9. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x48)++0x3
|
|
line.long 0x0 "UNSTDR$1,LFAST Unsolicited Tx Data Registers"
|
|
hexmask.long 0x0 0.--31. 1. "UNTXD,Unsolicited Transmit Data 8-0"
|
|
repeat.end
|
|
rgroup.long 0x80++0x7
|
|
line.long 0x0 "GSR,LFAST Global Status Register"
|
|
bitfld.long 0x0 31. "DUALMD,Indicates the LFAST module is in Dual mode" "0: LFAST Module in Slave only mode,1: LFAST Module in Dual mode"
|
|
bitfld.long 0x0 18. "LRMD,Indicates if the Rx Controller is idle/active and that the Rx clocks are enabled" "0: Rx Controller is in Idle state,1: Rx Controller is active"
|
|
newline
|
|
bitfld.long 0x0 17. "LDSM,Transmit Interface Data Rate Status. Indicates the current speed rate of the Tx controller" "0: Data rate of LOW speed mode,1: Data rate of HIGH speed mode"
|
|
bitfld.long 0x0 16. "DRSM,Receive Interface Data Rate Status. Indicates the current speed rate of the Rx controller" "0: Data rate of LOW speed mode,1: Data rate of HIGH speed mode"
|
|
newline
|
|
bitfld.long 0x0 4. "LPTXDN,Auto loopback frame transmission count reached" "0: Auto loopback frame transmission count not..,1: Auto loopback frame transmission count reached."
|
|
bitfld.long 0x0 3. "LPFPDV,Loopback frame pass threshold reached." "0: Pass frame threshold not reached.,1: Pass frame threshold achieved"
|
|
newline
|
|
bitfld.long 0x0 2. "LPCPDV,Valid payload received during loopback check mode" "0: Payload received is not CBh,1: Payload received is CBh"
|
|
bitfld.long 0x0 1. "LPCHDV,Valid header received during loopback check mode" "0: Header received is not 13h,1: Header received is 13h"
|
|
newline
|
|
bitfld.long 0x0 0. "LPCSDV,Valid synchronization received." "0: Valid Synchronization pattern not detected,1: Valid Synchronization pattern detected"
|
|
line.long 0x4 "PISR,LFAST Ping Status Register"
|
|
hexmask.long.byte 0x4 0.--7. 1. "RXPNGD,Ping Data Register"
|
|
rgroup.long 0x94++0x3
|
|
line.long 0x0 "DFSR,LFAST Data Frame Status Register"
|
|
hexmask.long.byte 0x0 24.--29. 1. "RXDCNT,Unread Rx Frame Data Count. Indicates the number of unread data stored in the Rx Data FIFO."
|
|
bitfld.long 0x0 16.--18. "RXFCNT,Unread Rx Frame Count. Indicates the number of unread data frames stored in the Rx Data FIFO." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--13. 1. "TXDCNT,Unread Tx Frame Data Count. Indicates the number of unread data stored in the Tx Data FIFO."
|
|
bitfld.long 0x0 0.--2. "TXFCNT,Unread Tx Frame Count.Count of pending Data Frames programed by System Side Module." "0,1,2,3,4,5,6,7"
|
|
group.long 0x98++0xB
|
|
line.long 0x0 "TISR,LFAST Tx Interrupt Status Register"
|
|
bitfld.long 0x0 17. "TXIEF,TxData Interface not enabled. Tx Data Interface not enabled and a frame is ready to be transmitted" "0: Interrupt event has not occurred,1: Interrupt event has occurred"
|
|
bitfld.long 0x0 16. "TXOVF,Transmit Data FIFO Overflow Interrupt" "0: Interrupt event has not occurred,1: Interrupt event has occurred"
|
|
newline
|
|
bitfld.long 0x0 4. "TXPNGF,Ping response frame transmitted interrupt 0 Interrupt event has not occurred 1 Interrupt event has occurred" "0,1"
|
|
bitfld.long 0x0 2. "TXUNSF,Unsolicited Frame transmitted Interrupt" "0: Interrupt event has not occurred,1: Interrupt event has occurred"
|
|
newline
|
|
bitfld.long 0x0 1. "TXICLCF,ICLC Frame transmitted Interrupt" "0: Interrupt event has not occurred,1: Interrupt event has occurred"
|
|
bitfld.long 0x0 0. "TXDTF,Data Frame transmitted Interrupt" "0: Interrupt event has not occurred,1: Interrupt event has occurred"
|
|
line.long 0x4 "RISR,LFAST Rx Interrupt Status Register"
|
|
bitfld.long 0x4 23. "RXUOF,Unsolicited frame register overflow" "0: Interrupt event has not occurred,1: Interrupt event has occurred"
|
|
bitfld.long 0x4 22. "RXMNF,Rx Data FIFO Min Threshold reached." "0: Interrupt event has not occurred,1: Interrupt event has occurred"
|
|
newline
|
|
bitfld.long 0x4 21. "RXMXF,Rx Data FIFO Max Threshold reached." "0: Interrupt event has not occurred,1: Interrupt event has occurred"
|
|
bitfld.long 0x4 20. "RXUFF,Rx Data FIFO Underflow." "0: Interrupt event has not occurred,1: Interrupt event has occurred"
|
|
newline
|
|
bitfld.long 0x4 19. "RXOFF,Rx Data FIFO Overflow." "0: Interrupt event has not occurred,1: Interrupt event has occurred"
|
|
bitfld.long 0x4 18. "RXSZF,Frame with unsupported frame size received" "0: Interrupt event has not occurred,1: Interrupt event has occurred - On reception of.."
|
|
newline
|
|
bitfld.long 0x4 17. "RXICF,Invalid ICLC code Received." "0: Interrupt event has not occurred,1: Interrupt event has occurred"
|
|
bitfld.long 0x4 16. "RXLCEF,Invalid Logical Channel Type." "0: Interrupt event has not occurred,1: Interrupt event has occurred - On reception of.."
|
|
newline
|
|
bitfld.long 0x4 3. "RXCTSF,Frame with CTS bit Low Received." "0: Interrupt event has not occurred,1: Interrupt event has occurred"
|
|
bitfld.long 0x4 2. "RXDF,Data frame received." "0: Interrupt event has not occurred,1: Interrupt event has occurred"
|
|
newline
|
|
bitfld.long 0x4 1. "RXUNSF,Unsolicited Frame received." "0: Interrupt event has not occurred,1: Interrupt event has occurred"
|
|
line.long 0x8 "RIISR,LFAST Rx ICLC Interrupt Status Register"
|
|
bitfld.long 0x8 13. "ICPFF,Ping Frame Response failed" "0: Interrupt event has not occurred,1: Interrupt event has occurred"
|
|
bitfld.long 0x8 12. "ICPSF,Ping Frame Response successful" "0: Interrupt event has not occurred,1: Interrupt event has occurred"
|
|
newline
|
|
bitfld.long 0x8 11. "ICPRF,ICLC Ping Frame Request received" "0: Interrupt event has not occurred,1: Interrupt event has occurred"
|
|
bitfld.long 0x8 10. "ICTOF,ICLC frame for Test mode off received" "0: Interrupt event has not occurred,1: Interrupt event has occurred"
|
|
newline
|
|
bitfld.long 0x8 9. "ICLPF,ICLC frame for Loopback On received" "0: Interrupt event has not occurred,1: Interrupt event has occurred"
|
|
bitfld.long 0x8 8. "ICCTF,ICLC frame for Clk Test mode received" "0: Interrupt event has not occurred,1: Interrupt event has occurred"
|
|
newline
|
|
bitfld.long 0x8 7. "ICTDF,ICLC frame for LFAST Slaves Tx Interface Disable received" "0: Interrupt event has not occurred,1: Interrupt event has occurred"
|
|
bitfld.long 0x8 6. "ICTEF,ICLC frame for LFAST Slaves Tx Interface Enable received" "0: Interrupt event has not occurred,1: Interrupt event has occurred"
|
|
newline
|
|
bitfld.long 0x8 5. "ICRFF,ICLC frame for LFAST Slaves Rx Interface fast mode switch received" "0: Interrupt event has not occurred,1: Interrupt event has occurred"
|
|
bitfld.long 0x8 4. "ICRSF,ICLC frame for LFAST Slaves Rx Interface slow mode switch received" "0: Interrupt event has not occurred,1: Interrupt event has occurred"
|
|
newline
|
|
bitfld.long 0x8 3. "ICTFF,ICLC frame for LFAST Slaves Tx Interface fast mode switch received" "0: Interrupt event has not occurred,1: Interrupt event has occurred"
|
|
bitfld.long 0x8 2. "ICTSF,ICLC frame for LFAST Slaves Tx Interface slow mode switch received" "0: Interrupt event has not occurred,1: Interrupt event has occurred"
|
|
newline
|
|
bitfld.long 0x8 1. "ICPOFF,ICLC frame for PLL OFF received" "0: Interrupt event has not occurred,1: Interrupt event has occurred"
|
|
bitfld.long 0x8 0. "ICPONF,ICLC frame for PLL ON received" "0: Interrupt event has not occurred,1: Interrupt event has occurred"
|
|
rgroup.long 0xA4++0x7
|
|
line.long 0x0 "PLLLSR,LFAST PLL and LVDS Status Register"
|
|
bitfld.long 0x0 17. "PLLDIS,PLL disable Status. When asserted PLL is put in the power down state." "0: PLL disable signal is negated.,1: PLL disable signal is asserted."
|
|
bitfld.long 0x0 3. "LRSLPS,This bit indicates the real time status of LR sleep signal" "0: LR power sleep signal is negated.,1: LR power sleep signal is asserted."
|
|
newline
|
|
bitfld.long 0x0 2. "LDSLPS,This bit indicates the real time status of LD sleep signal" "0: LD sleep signal is negated.,1: LD sleep signal is asserted."
|
|
bitfld.long 0x0 1. "LDPDS,This bit indicates the real time status of LD power down signal When asserted LD is put in the power down state" "0: LD power down signal is negated.,1: LD power down signal is asserted."
|
|
newline
|
|
bitfld.long 0x0 0. "LRPDS,This bit indicates the real time status of LR power down signal When asserted LR is put in the power down state" "0: LR power down signal is negated.,1: LR power down signal is asserted."
|
|
line.long 0x4 "UNSRSR,LFAST Unsolicited Rx Status Register"
|
|
bitfld.long 0x4 8. "URXDV,Unsolicited data valid" "0,1"
|
|
bitfld.long 0x4 0.--2. "URPCNT,Rx Unsolicited payload" "0,1,2,3,4,5,6,7"
|
|
repeat 9. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0xAC)++0x3
|
|
line.long 0x0 "UNSRDR$1,LFAST Unsolicited Rx Data Register"
|
|
hexmask.long 0x0 0.--31. 1. "UNRXD,Unsolicited Receive Data"
|
|
repeat.end
|
|
tree.end
|
|
tree "LINFlexD"
|
|
base ad:0x0
|
|
tree "LINFlexD_0"
|
|
base ad:0x40053000
|
|
group.long 0x0++0x43
|
|
line.long 0x0 "LINCR1,LIN Control Register 1"
|
|
bitfld.long 0x0 15. "CCD,Checksum Calculation disable This bit can be written during Initialization mode only" "0: Checksum calculation is done by hardware. When..,1: Checksum calculation is disabled. When this bit.."
|
|
bitfld.long 0x0 14. "CFD,Checksum field disable This bit can be configured during Initialization mode only" "0: Checksum field is sent after the required number..,1: No checksum field is sent in the frame"
|
|
newline
|
|
bitfld.long 0x0 13. "LASE,LIN Autosynchronization Enable This bit can be programmed in Initialization mode only" "0: Autosynchronization disabled,1: Autosynchronization enabled"
|
|
bitfld.long 0x0 12. "AUTOWU,Auto Wakeup This bit can be configured during Initialization mode only" "0: Sleep bit is cleared by software only,1: Sleep bit gets cleared by hardware whenever WUF.."
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "MBL,Master Break Length These bits choose the length of the Sync break to be generated by the master"
|
|
bitfld.long 0x0 7. "BF,By-pass filter This bit can be programmed during Initialization mode only" "0: Receiver ignores incoming frame either if ID..,1: If no ID filters are active receiver responds to.."
|
|
newline
|
|
bitfld.long 0x0 5. "LBKM,Loop Back mode Refer to 'Loop back mode' in Test mode" "0: Loop Back Mode disabled,1: Loop Back mode enabled"
|
|
bitfld.long 0x0 4. "MME,Master mode enable This bit can be programmed in Initialization mode only" "0: Slave Mode,1: Master Mode"
|
|
newline
|
|
bitfld.long 0x0 3. "SSBL,Slave Mode Sync Break Length This bit can be programmed in Initialization mode only" "0: 11 bit break length,1: 10 bit break length"
|
|
bitfld.long 0x0 2. "RBLM,Receiver Buffer Locked mode This bit can be programmed in Initialization mode only" "0: Receiver Buffer not locked next incoming message..,1: Receiver buffer locked against overrun. Once the.."
|
|
newline
|
|
bitfld.long 0x0 1. "SLEEP,Sleep Mode Request This bit is set by software to request LINFlexD to enter Sleep mode" "0,1"
|
|
bitfld.long 0x0 0. "INIT,Initialization Mode Request The software sets this bit to switch the hardware into Initialization mode" "0,1"
|
|
line.long 0x4 "LINIER,LIN Interrupt enable register"
|
|
bitfld.long 0x4 15. "SZIE,Stuck at zero Interrupt Enable An interrupt is generated if this bit is set and the Stuck at Zero Flag (SZF) in LINESR or UARTSR is set" "0: No interrupt,1: Interrupt enabled"
|
|
bitfld.long 0x4 14. "OCIE,Output Compare Interrupt Enable" "0: No interrupt,1: Interrupt generated when OCF bit in LINESR or.."
|
|
newline
|
|
bitfld.long 0x4 13. "BEIE,Bit Error Interrupt Enable" "0: No interrupt,1: Interrupt generated when BEF bit in LINESR is set"
|
|
bitfld.long 0x4 12. "CEIE,Checksum Error Interrupt Enable An interrupt is generated if this bit is set and the Checksum Error Flag (CEF) is set in LINESR" "0: No interrupt,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x4 11. "HEIE,Header Error Interrupt Enable An interrupt is generated when this bit is set and either of the following flags are set SFEF SDEF IDPEF in LINESR are set" "0: No interrupt,1: Interrupt enabled"
|
|
bitfld.long 0x4 8. "FEIE,Frame Error Interrupt Enable" "0: No interrupt,1: Interrupt generated if Frame Error Flag (FEF).."
|
|
newline
|
|
bitfld.long 0x4 7. "BOIE,Buffer Overrun Error Interrupt Enable An interrupt is generated if this bit is set and the Buffer Overrun Flag (BOF) is set in LINESR or UARTSR" "0: No interrupt,1: Interrupt enabled"
|
|
bitfld.long 0x4 6. "LSIE,LIN state Interrupt enable Interrupt is generated only when entering the above fields" "0: No interrupt,1: Interrupt generated on entering the following.."
|
|
newline
|
|
bitfld.long 0x4 5. "WUIE,Wakeup interrupt enable If this bit is set and the WUF in LINSR or UARTSR is set then an interrupt is generated" "0: No interrupt,1: Interrupt enabled"
|
|
bitfld.long 0x4 3. "TOIE,Timeout Interrupt Enable An interrupt is generated if this bit is set and UARTSR[TO] status bit is set (in UART mode)" "0: No interrupt,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x4 2. "DRIE,Data Reception complete Interrupt enable An interrupt is generated when this bit is set and Data Received flag (DRF) in LINSR or UARTSR is set" "0: No interrupt,1: Interrupt enabled"
|
|
bitfld.long 0x4 1. "DTIE,Data Transmitted Interrupt enable An interrupt is generated when this bit is set and Data Transmitted flag (DTF) in LINSR or UARTSR is set" "0: No interrupt,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x4 0. "HRIE,Header Received Interrupt An interrupt is generated when this bit is set and the Header Received flag (HRF) in LINSR is set" "0: No interrupt,1: Interrupt enabled"
|
|
line.long 0x8 "LINSR,LIN Status Register"
|
|
rbitfld.long 0x8 16.--18. "RDC,Receive Data Byte Count RDC contains the number of entries (bytes) in the Receive data buffer in LIN mode" "0: 1 byte,1: 2 bytes,2: 3 bytes,3: 4 bytes,4: 5 bytes,5: 6 bytes,6: 7 bytes,7: 8 bytes"
|
|
hexmask.long.byte 0x8 12.--15. 1. "LINS,LIN state"
|
|
newline
|
|
bitfld.long 0x8 9. "RMB,Release Message Buffer" "0: Buffer data is free. Reset by hardware in when..,1: Buffer data ready to be read by software. This.."
|
|
bitfld.long 0x8 8. "DRBNE,Data Reception Buffer Not Empty Flag This bit is set by hardware as soon as the first byte of response has been received and stored in BDRL (when there is at least one data byte in reception buffer)" "0,1"
|
|
newline
|
|
rbitfld.long 0x8 7. "RXbusy,Receiver Busy flag In Slave mode after header reception if DIR bit is reset and reception starts then this bit is set" "0: Receiver is idle,1: Reception ongoing"
|
|
rbitfld.long 0x8 6. "RDI,LIN Receive signal This bit reflects the current status of the Rx pin" "0,1"
|
|
newline
|
|
bitfld.long 0x8 5. "WUF,Wakeup flag This bit is set by hardware when a falling edge is detected on the Rx pin" "0,1"
|
|
bitfld.long 0x8 2. "DRF,Data Reception Completed flag This bit is set by hardware and indicates that data reception has been completed" "0,1"
|
|
newline
|
|
bitfld.long 0x8 1. "DTF,Data Transmission Completed flag This bit is set by hardware and indicates that data transmission is completed" "0,1"
|
|
bitfld.long 0x8 0. "HRF,Header Received flag This bit is set when the header reception is completed" "0,1"
|
|
line.long 0xC "LINESR,LIN Error Status Register"
|
|
bitfld.long 0xC 15. "SZF,Stuck at Zero flag This bit is set when there is a stuck-at-zero timeout error" "0,1"
|
|
bitfld.long 0xC 14. "OCF,Output Compare Flag 0: No output compare event occurred 1: In master mode LINESR[OCF] flag is set when counter LINTCSR[CNT] has matched the content of LINOCR[OC2]" "0: No output compare event occurred,1: In master mode"
|
|
newline
|
|
bitfld.long 0xC 13. "BEF,Bit Error flag This bit is set by hardware when there is a bit error" "0,1"
|
|
bitfld.long 0xC 12. "CEF,Checksum Error flag This bit is set by hardware if the received checksum does not match the hardware-calculated checksum" "0,1"
|
|
newline
|
|
bitfld.long 0xC 11. "SFEF,Sync Field Error flag This bit is set by hardware when the received Sync Field is inconsistent" "0,1"
|
|
bitfld.long 0xC 10. "SDEF,Sync Delimiter Error flag This bit is set by hardware when the delimiter is too short (in other words less than one bit time)" "0,1"
|
|
newline
|
|
bitfld.long 0xC 9. "IDPEF,ID Parity Error flag This bit is set by hardware when there is an error in the ID parity" "0,1"
|
|
bitfld.long 0xC 8. "FEF,Framing Error flag This bit is set by hardware when there is a framing error (invalid stop bit)" "0,1"
|
|
newline
|
|
bitfld.long 0xC 7. "BOF,Buffer overrun flag This bit is set by hardware when there is a new byte received and RMB bit is not cleared" "0,1"
|
|
bitfld.long 0xC 0. "NF,Noise flag This bit is set by hardware when noise is detected in the received character" "0,1"
|
|
line.long 0x10 "UARTCR,UART Mode Control Register"
|
|
bitfld.long 0x10 31. "MIS,Monitor Idle State" "0: UARTCTO monitors the number of bits to be..,1: UARTCTO monitors the idle state of the reception.."
|
|
bitfld.long 0x10 28.--30. "CSP,Configurable Sample Point (i) These bits will decide the sample point during reduced over sampling" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x10 24.--27. 1. "OSR,Over Sampling Rate These bits are programmable by the user to configure the number of samples taken for a bit when reduced over sampling is enabled"
|
|
bitfld.long 0x10 23. "ROSE,Reduced Over Sampling Enable" "0: Each bit is over sampled sixteen times.,1: OSR bits decide the over sampling rate."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "NEF,Number of expected frame These bits are used to configure the number of expected frames in UART reception mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 19. "DTU_PCETX,Disable Timeout in UART mode" "0: Timeout has to be handled by software,1: Timeout in UART mode is disabled after the.."
|
|
newline
|
|
bitfld.long 0x10 17.--18. "SBUR,Stop bits in UART reception mode When the UART is used for transmission and reception we have to set the same number of stop bits in GCR and SBUR" "0: 1 stop bit,1: 2 stop bits,2: 3 stop bits,?"
|
|
bitfld.long 0x10 13.--15. "TDFL_TFC,Transmitter Data Field Length/TX FIFO Counter TDFL defines the number of bytes to be transmitted in UART buffer mode (TFBM = 0)" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 10.--12. "RDFL_RFC,Reception Data Field Length /RX FIFO Counter RDFL defines the number of bytes to be received in UART buffer mode (RFBM = 0)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 9. "RFBM,RFBM Rx Fifo/Buffer mode This bit can be programmed in Initialization mode only when the UART bit is set" "0: Rx Buffer mode enabled,1: Rx Fifo mode enabled (mandatory in DMA Rx mode)"
|
|
newline
|
|
bitfld.long 0x10 8. "TFBM,Tx Fifo/Buffer mode This bit can be programmed in initialization mode only when the UART bit is set" "0: Tx Buffer mode enabled,1: Tx Fifo mode enabled (mandatory in DMA Tx mode)"
|
|
bitfld.long 0x10 7. "WL1,Word Length in UART mode This bit can be programmed in Initialization mode only when the UART bit is set" "0,1"
|
|
newline
|
|
bitfld.long 0x10 6. "PC1,Parity Control This bit can be programmed in Initialization mode only when UART bit is set" "0,1"
|
|
bitfld.long 0x10 5. "RxEn,Receiver Enable This bit can be programmed only when the UART bit is set." "0: Receiver disabled,1: Receiver enabled"
|
|
newline
|
|
bitfld.long 0x10 4. "TxEn,Transmitter Enable This bit can be programmed only when UART bit is set." "0: Transmitter disabled,1: Transmitter enabled transmission starts only.."
|
|
bitfld.long 0x10 3. "PC0,Parity Control This bit can be programmed in Initialization mode only when UART bit is set" "0,1"
|
|
newline
|
|
bitfld.long 0x10 2. "PCE,Parity Control Enable This bit can be programmed in Initialization mode only when the UART bit is set" "0: Parity transmit/check Disable,1: Parity transmit/check Enable"
|
|
bitfld.long 0x10 1. "WL0,Word Length in UART mode This bit can be programmed in Initialization mode only when UART bit is set" "0,1"
|
|
newline
|
|
bitfld.long 0x10 0. "UART,UART Mode This bit can be programmed in Initialization mode only" "0: LIN mode,1: UART mode"
|
|
line.long 0x14 "UARTSR,UART Mode Status Register"
|
|
bitfld.long 0x14 15. "SZF,Stuck at Zero flag This bit is set by hardware when 100 dominant bits are detected" "0,1"
|
|
bitfld.long 0x14 14. "OCF,Output Compare Flag An interrupt will be generated if the OCIE bit in LINIER is set" "0: No output compare event occurred,1: The content of the counter has matched the.."
|
|
newline
|
|
hexmask.long.byte 0x14 10.--13. 1. "PE,Parity Error flag These bits indicate if there is a Parity Error in the corresponding byte"
|
|
bitfld.long 0x14 9. "RMB,Release Message Buffer This bit should be cleared by software" "0: Buffer data is free,1: Buffer data ready to be read by software"
|
|
newline
|
|
bitfld.long 0x14 8. "FEF,Framing Error flag This bit is set by hardware when there is a framing error (invalid stop bit)" "0,1"
|
|
bitfld.long 0x14 7. "BOF,FIFO/Buffer overrun flag This bit is set by hardware when there is a new byte received and the RMB bit is not cleared in UART buffer mode" "0,1"
|
|
newline
|
|
rbitfld.long 0x14 6. "RDI,Receiver Data Input signal This bit reflects the current status of the RX pin." "0,1"
|
|
bitfld.long 0x14 5. "WUF,Wakeup flag This bit is set by hardware when a falling edge is detected on the RX pin in sleep mode" "0,1"
|
|
newline
|
|
rbitfld.long 0x14 4. "RFNE,Receive FIFO Not Empty RFNE bit is set by hardware in UART FIFO mode (RFBM = 1) when there is at least one data byte present in the receive FIFO" "0,1"
|
|
bitfld.long 0x14 3. "TO,Timeout This bit is set by hardware when a UART timeout occurs - in other words the value of UARTCTO becomes equal to the preset value of the timeout (UARTPTO register setting)" "0,1"
|
|
newline
|
|
bitfld.long 0x14 2. "DRFRFE,Data Reception Completed Flag /Rx FIFO Empty Flag DRF is set by hardware in UART buffer mode (RFBM = 0) and indicates that the number of bytes programmed in RDFL have been received" "0,1"
|
|
bitfld.long 0x14 1. "DTFTFF,Data Transmission Completed Flag/ TX FIFO Full Flag DTF is set by hardware in UART buffer mode (TFBM = 0) and indicates that data transmission is completed" "0,1"
|
|
newline
|
|
bitfld.long 0x14 0. "NF,Noise flag This bit is set by hardware when noise is detected in the received character" "0,1"
|
|
line.long 0x18 "LINTCSR,LIN Time-Out Control Status Register"
|
|
bitfld.long 0x18 10. "MODE,Time-out counter mode This bit can be configured only during initialization" "0: LIN mode,1: Output compare mode"
|
|
bitfld.long 0x18 9. "IOT,Idle on timeout Register bit can be read in any mode written only in initialization mode" "0: LIN state machine does not reset to Idle on..,1: LIN state machine resets to Idle on timeout event"
|
|
newline
|
|
bitfld.long 0x18 8. "TOCE,Time-out counter enable TOCE is always configurable by software in Initialization mode" "0: Time-out counter disable. OCF flag is not set on..,1: Time-out counter enable. OCF flag is set if an.."
|
|
hexmask.long.byte 0x18 0.--7. 1. "CNT,Counter Value These bits reflect the value of a counter used for timeout"
|
|
line.long 0x1C "LINOCR,LIN Output Compare Register"
|
|
hexmask.long.byte 0x1C 8.--15. 1. "OC2,Output compare value 2"
|
|
hexmask.long.byte 0x1C 0.--7. 1. "OC1,Output compare value 1"
|
|
line.long 0x20 "LINTOCR,LIN Time-Out Control Register"
|
|
hexmask.long.byte 0x20 8.--11. 1. "RTO,Response timeout value This is the response timeout duration (in bit time) for 1 byte"
|
|
hexmask.long.byte 0x20 0.--6. 1. "HTO,Header timeout value This register contains the header timeout duration (in bit time)"
|
|
line.long 0x24 "LINFBRR,LIN Fractional Baud Rate Register"
|
|
hexmask.long.byte 0x24 0.--3. 1. "FBR,Fractional Baud rates Register bit can be read in any mode written only in initialization mode."
|
|
line.long 0x28 "LINIBRR,LIN Integer Baud Rate Register"
|
|
hexmask.long.tbyte 0x28 0.--19. 1. "IBR,Integer Baud rates These bits along with the fractional baud rate bits decide the LIN baud rate"
|
|
line.long 0x2C "LINCFR,LIN Checksum Field Register"
|
|
hexmask.long.byte 0x2C 0.--7. 1. "CF,Checksum bits When the CCD bit is reset these bits are read-only and are calculated by hardware"
|
|
line.long 0x30 "LINCR2,LIN Control Register 2"
|
|
bitfld.long 0x30 15. "TBDE,Two Bit delimiter bit This bit can be set in Initialization mode only" "0: Delimiter length in break field is 1 bit,1: Delimiter length in break field is 2 bits"
|
|
bitfld.long 0x30 14. "IOBE,Idle on Bit Error This bit can be set in Initialization mode only" "0: Bit Error does not reset LIN state machine,1: Bit Error resets LIN state machine"
|
|
newline
|
|
bitfld.long 0x30 13. "IOPE,Idle on Identifier Parity Error This bit can be set in Initialization mode only" "0: Parity Error does not reset LIN state machine,1: Parity Error resets LIN state machine"
|
|
bitfld.long 0x30 12. "WURQ,Wakeup Generate Request Setting this bit will generate a wakeup pulse" "0,1"
|
|
newline
|
|
bitfld.long 0x30 11. "DDRQ,Data Discard request Set by software to stop data reception if the frame does not concern the node" "0,1"
|
|
bitfld.long 0x30 10. "DTRQ,Data Transmission Request Set by software in slave mode to request the transmission of the LIN Data field stored in the Buffer data register" "0,1"
|
|
newline
|
|
bitfld.long 0x30 9. "ABRQ,Abort Request Set by software to abort the current transmission" "0,1"
|
|
bitfld.long 0x30 8. "HTRQ,Header Transmission Request Set by software to request the transmission of the LIN Header" "0,1"
|
|
line.long 0x34 "BIDR,Buffer Identifier Register"
|
|
bitfld.long 0x34 10.--12. "DFL,Data Field Length Number of data bytes in the response part of the frame" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x34 9. "DIR,Direction This bit controls the direction of the data field." "0: LINFlexD receives the data and copy them in the..,1: LINFlexD transmits the data from the BDR registers"
|
|
newline
|
|
bitfld.long 0x34 8. "CCS,Classic Checksum This bit controls the type of checksum applied on the current message." "0: Enhanced Checksum covering Identifier and Data..,1: Classic Checksum covering Data filed only. This.."
|
|
hexmask.long.byte 0x34 0.--5. 1. "ID,Identifier Identifier part of the identifier field without the identifier parity"
|
|
line.long 0x38 "BDRL,Buffer Data Register Least Significant"
|
|
hexmask.long.byte 0x38 24.--31. 1. "DATA3,Data Byte 3 Data byte 3 of the data field."
|
|
hexmask.long.byte 0x38 16.--23. 1. "DATA2,Data Byte 2 Data byte 2 of the data field."
|
|
newline
|
|
hexmask.long.byte 0x38 8.--15. 1. "DATA1,Data Byte 1 Data byte 1of the data field."
|
|
hexmask.long.byte 0x38 0.--7. 1. "DATA0,Data Byte 0 Data byte 0 of the data field."
|
|
line.long 0x3C "BDRM,Buffer Data Register Most Significant"
|
|
hexmask.long.byte 0x3C 24.--31. 1. "DATA7,Data Byte 7 Data byte 7 of the data field."
|
|
hexmask.long.byte 0x3C 16.--23. 1. "DATA6,Data Byte 6 Data byte 6 of the data field."
|
|
newline
|
|
hexmask.long.byte 0x3C 8.--15. 1. "DATA5,Data Byte 5 Data byte 5of the data field."
|
|
hexmask.long.byte 0x3C 0.--7. 1. "DATA4,Data Byte 4 Data byte 4 of the data field."
|
|
line.long 0x40 "IFER,Identifier Filter Enable Register"
|
|
hexmask.long.word 0x40 0.--15. 1. "FACT,Filter active The software sets the bit FACT[x] to activate the filter x in Identifier list mode"
|
|
rgroup.long 0x44++0x3
|
|
line.long 0x0 "IFMI,Identifier Filter Match Index"
|
|
hexmask.long.byte 0x0 0.--4. 1. "IFMI,Filter match index Upon a filter match with xth filter - IFMI[4:0] = x+1"
|
|
group.long 0x48++0x3
|
|
line.long 0x0 "IFMR,Identifier Filter Mode Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "IFM,Filter mode Register bit can be read in any mode written only in initialization mode."
|
|
repeat 16. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x4C)++0x3
|
|
line.long 0x0 "IFCR$1,Identifier Filter Control Register"
|
|
bitfld.long 0x0 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 9. "DIR,Direction" "0: LINFlexD receives data and copies to the BDR..,1: LINFlexD transmits data from the BDR registers"
|
|
newline
|
|
bitfld.long 0x0 8. "CCS,Classic Checksum" "0: Enhanced Checksum covering Identifier and Data..,1: Classic Checksum covering Data field only. This.."
|
|
hexmask.long.byte 0x0 0.--5. 1. "ID,Identifier"
|
|
repeat.end
|
|
group.long 0x8C++0x7
|
|
line.long 0x0 "GCR,Global Control Register"
|
|
bitfld.long 0x0 5. "TDFBM,Transmit data first bit MSB This bit controls the first bit of transmit data (payload only) as MSB/LSB in both UART and LIN modes" "0: The first bit of transmitted data is LSB - in..,1: The first bit of transmitted data is MSB - in.."
|
|
bitfld.long 0x0 4. "RDFBM,Received data first bit MSB This bit controls the first bit of received data (payload only) as MSB/LSB both in UART and LIN modes" "0: The first bit of received data is LSB - in other..,1: The first bit of received data is MSB - in other.."
|
|
newline
|
|
bitfld.long 0x0 3. "TDLIS,Transmit data level inversion selection This bit controls the data inversion of transmitted data (payload only) in both UART and LIN modes" "0: Transmitted data is not inverted,1: Transmitted data is inverted"
|
|
bitfld.long 0x0 2. "RDLIS,Received data level inversion selection This bit controls the data inversion of received data (payload only) in both UART and LIN modes" "0: Received data is not inverted,1: Received data is inverted"
|
|
newline
|
|
bitfld.long 0x0 1. "STOP,1/2 stop bit configuration This bit controls the number of stop bit transmitted data in both UART and LIN modes" "0: 1 stop bit,1: 2 stop bits"
|
|
bitfld.long 0x0 0. "SR,Soft reset SR executes a soft reset of the LINFlexD controller (FSMs FIFO pointers counters timers status and error registers) without modifying the configuration registers when a 1 write operation is performed" "0,1"
|
|
line.long 0x4 "UARTPTO,UART Preset Timeout Register"
|
|
hexmask.long.word 0x4 0.--11. 1. "PTO,Preset Timeout PTO defines the preset value of timeout counter"
|
|
rgroup.long 0x94++0x3
|
|
line.long 0x0 "UARTCTO,UART Current Timeout Register"
|
|
hexmask.long.word 0x0 0.--11. 1. "CTO,Current Timeout CTO defines the current value of the timeout counter"
|
|
group.long 0x98++0x7
|
|
line.long 0x0 "DMATXE,DMA Tx Enable Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "DTE,DMA Tx channel Y enable The number of DTE bits varies and is equal to DMA_TX_CH_NUM"
|
|
line.long 0x4 "DMARXE,DMA Rx Enable Register"
|
|
hexmask.long.word 0x4 0.--15. 1. "DRE,DMA Rx channel Y enable The number of DRE bits varies and is equal to DMA_RX_CH_NUM"
|
|
tree.end
|
|
tree "LINFlexD_1"
|
|
base ad:0x400BC000
|
|
group.long 0x0++0x43
|
|
line.long 0x0 "LINCR1,LIN Control Register 1"
|
|
bitfld.long 0x0 15. "CCD,Checksum Calculation disable This bit can be written during Initialization mode only" "0: Checksum calculation is done by hardware. When..,1: Checksum calculation is disabled. When this bit.."
|
|
bitfld.long 0x0 14. "CFD,Checksum field disable This bit can be configured during Initialization mode only" "0: Checksum field is sent after the required number..,1: No checksum field is sent in the frame"
|
|
newline
|
|
bitfld.long 0x0 13. "LASE,LIN Autosynchronization Enable This bit can be programmed in Initialization mode only" "0: Autosynchronization disabled,1: Autosynchronization enabled"
|
|
bitfld.long 0x0 12. "AUTOWU,Auto Wakeup This bit can be configured during Initialization mode only" "0: Sleep bit is cleared by software only,1: Sleep bit gets cleared by hardware whenever WUF.."
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "MBL,Master Break Length These bits choose the length of the Sync break to be generated by the master"
|
|
bitfld.long 0x0 7. "BF,By-pass filter This bit can be programmed during Initialization mode only" "0: Receiver ignores incoming frame either if ID..,1: If no ID filters are active receiver responds to.."
|
|
newline
|
|
bitfld.long 0x0 5. "LBKM,Loop Back mode Refer to 'Loop back mode' in Test mode" "0: Loop Back Mode disabled,1: Loop Back mode enabled"
|
|
bitfld.long 0x0 4. "MME,Master mode enable This bit can be programmed in Initialization mode only" "0: Slave Mode,1: Master Mode"
|
|
newline
|
|
bitfld.long 0x0 3. "SSBL,Slave Mode Sync Break Length This bit can be programmed in Initialization mode only" "0: 11 bit break length,1: 10 bit break length"
|
|
bitfld.long 0x0 2. "RBLM,Receiver Buffer Locked mode This bit can be programmed in Initialization mode only" "0: Receiver Buffer not locked next incoming message..,1: Receiver buffer locked against overrun. Once the.."
|
|
newline
|
|
bitfld.long 0x0 1. "SLEEP,Sleep Mode Request This bit is set by software to request LINFlexD to enter Sleep mode" "0,1"
|
|
bitfld.long 0x0 0. "INIT,Initialization Mode Request The software sets this bit to switch the hardware into Initialization mode" "0,1"
|
|
line.long 0x4 "LINIER,LIN Interrupt enable register"
|
|
bitfld.long 0x4 15. "SZIE,Stuck at zero Interrupt Enable An interrupt is generated if this bit is set and the Stuck at Zero Flag (SZF) in LINESR or UARTSR is set" "0: No interrupt,1: Interrupt enabled"
|
|
bitfld.long 0x4 14. "OCIE,Output Compare Interrupt Enable" "0: No interrupt,1: Interrupt generated when OCF bit in LINESR or.."
|
|
newline
|
|
bitfld.long 0x4 13. "BEIE,Bit Error Interrupt Enable" "0: No interrupt,1: Interrupt generated when BEF bit in LINESR is set"
|
|
bitfld.long 0x4 12. "CEIE,Checksum Error Interrupt Enable An interrupt is generated if this bit is set and the Checksum Error Flag (CEF) is set in LINESR" "0: No interrupt,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x4 11. "HEIE,Header Error Interrupt Enable An interrupt is generated when this bit is set and either of the following flags are set SFEF SDEF IDPEF in LINESR are set" "0: No interrupt,1: Interrupt enabled"
|
|
bitfld.long 0x4 8. "FEIE,Frame Error Interrupt Enable" "0: No interrupt,1: Interrupt generated if Frame Error Flag (FEF).."
|
|
newline
|
|
bitfld.long 0x4 7. "BOIE,Buffer Overrun Error Interrupt Enable An interrupt is generated if this bit is set and the Buffer Overrun Flag (BOF) is set in LINESR or UARTSR" "0: No interrupt,1: Interrupt enabled"
|
|
bitfld.long 0x4 6. "LSIE,LIN state Interrupt enable Interrupt is generated only when entering the above fields" "0: No interrupt,1: Interrupt generated on entering the following.."
|
|
newline
|
|
bitfld.long 0x4 5. "WUIE,Wakeup interrupt enable If this bit is set and the WUF in LINSR or UARTSR is set then an interrupt is generated" "0: No interrupt,1: Interrupt enabled"
|
|
bitfld.long 0x4 3. "TOIE,Timeout Interrupt Enable An interrupt is generated if this bit is set and UARTSR[TO] status bit is set (in UART mode)" "0: No interrupt,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x4 2. "DRIE,Data Reception complete Interrupt enable An interrupt is generated when this bit is set and Data Received flag (DRF) in LINSR or UARTSR is set" "0: No interrupt,1: Interrupt enabled"
|
|
bitfld.long 0x4 1. "DTIE,Data Transmitted Interrupt enable An interrupt is generated when this bit is set and Data Transmitted flag (DTF) in LINSR or UARTSR is set" "0: No interrupt,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x4 0. "HRIE,Header Received Interrupt An interrupt is generated when this bit is set and the Header Received flag (HRF) in LINSR is set" "0: No interrupt,1: Interrupt enabled"
|
|
line.long 0x8 "LINSR,LIN Status Register"
|
|
rbitfld.long 0x8 16.--18. "RDC,Receive Data Byte Count RDC contains the number of entries (bytes) in the Receive data buffer in LIN mode" "0: 1 byte,1: 2 bytes,2: 3 bytes,3: 4 bytes,4: 5 bytes,5: 6 bytes,6: 7 bytes,7: 8 bytes"
|
|
hexmask.long.byte 0x8 12.--15. 1. "LINS,LIN state"
|
|
newline
|
|
bitfld.long 0x8 9. "RMB,Release Message Buffer" "0: Buffer data is free. Reset by hardware in when..,1: Buffer data ready to be read by software. This.."
|
|
bitfld.long 0x8 8. "DRBNE,Data Reception Buffer Not Empty Flag This bit is set by hardware as soon as the first byte of response has been received and stored in BDRL (when there is at least one data byte in reception buffer)" "0,1"
|
|
newline
|
|
rbitfld.long 0x8 7. "RXbusy,Receiver Busy flag In Slave mode after header reception if DIR bit is reset and reception starts then this bit is set" "0: Receiver is idle,1: Reception ongoing"
|
|
rbitfld.long 0x8 6. "RDI,LIN Receive signal This bit reflects the current status of the Rx pin" "0,1"
|
|
newline
|
|
bitfld.long 0x8 5. "WUF,Wakeup flag This bit is set by hardware when a falling edge is detected on the Rx pin" "0,1"
|
|
bitfld.long 0x8 2. "DRF,Data Reception Completed flag This bit is set by hardware and indicates that data reception has been completed" "0,1"
|
|
newline
|
|
bitfld.long 0x8 1. "DTF,Data Transmission Completed flag This bit is set by hardware and indicates that data transmission is completed" "0,1"
|
|
bitfld.long 0x8 0. "HRF,Header Received flag This bit is set when the header reception is completed" "0,1"
|
|
line.long 0xC "LINESR,LIN Error Status Register"
|
|
bitfld.long 0xC 15. "SZF,Stuck at Zero flag This bit is set when there is a stuck-at-zero timeout error" "0,1"
|
|
bitfld.long 0xC 14. "OCF,Output Compare Flag 0: No output compare event occurred 1: In master mode LINESR[OCF] flag is set when counter LINTCSR[CNT] has matched the content of LINOCR[OC2]" "0: No output compare event occurred,1: In master mode"
|
|
newline
|
|
bitfld.long 0xC 13. "BEF,Bit Error flag This bit is set by hardware when there is a bit error" "0,1"
|
|
bitfld.long 0xC 12. "CEF,Checksum Error flag This bit is set by hardware if the received checksum does not match the hardware-calculated checksum" "0,1"
|
|
newline
|
|
bitfld.long 0xC 11. "SFEF,Sync Field Error flag This bit is set by hardware when the received Sync Field is inconsistent" "0,1"
|
|
bitfld.long 0xC 10. "SDEF,Sync Delimiter Error flag This bit is set by hardware when the delimiter is too short (in other words less than one bit time)" "0,1"
|
|
newline
|
|
bitfld.long 0xC 9. "IDPEF,ID Parity Error flag This bit is set by hardware when there is an error in the ID parity" "0,1"
|
|
bitfld.long 0xC 8. "FEF,Framing Error flag This bit is set by hardware when there is a framing error (invalid stop bit)" "0,1"
|
|
newline
|
|
bitfld.long 0xC 7. "BOF,Buffer overrun flag This bit is set by hardware when there is a new byte received and RMB bit is not cleared" "0,1"
|
|
bitfld.long 0xC 0. "NF,Noise flag This bit is set by hardware when noise is detected in the received character" "0,1"
|
|
line.long 0x10 "UARTCR,UART Mode Control Register"
|
|
bitfld.long 0x10 31. "MIS,Monitor Idle State" "0: UARTCTO monitors the number of bits to be..,1: UARTCTO monitors the idle state of the reception.."
|
|
bitfld.long 0x10 28.--30. "CSP,Configurable Sample Point (i) These bits will decide the sample point during reduced over sampling" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x10 24.--27. 1. "OSR,Over Sampling Rate These bits are programmable by the user to configure the number of samples taken for a bit when reduced over sampling is enabled"
|
|
bitfld.long 0x10 23. "ROSE,Reduced Over Sampling Enable" "0: Each bit is over sampled sixteen times.,1: OSR bits decide the over sampling rate."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "NEF,Number of expected frame These bits are used to configure the number of expected frames in UART reception mode" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 19. "DTU_PCETX,Disable Timeout in UART mode" "0: Timeout has to be handled by software,1: Timeout in UART mode is disabled after the.."
|
|
newline
|
|
bitfld.long 0x10 17.--18. "SBUR,Stop bits in UART reception mode When the UART is used for transmission and reception we have to set the same number of stop bits in GCR and SBUR" "0: 1 stop bit,1: 2 stop bits,2: 3 stop bits,?"
|
|
bitfld.long 0x10 13.--15. "TDFL_TFC,Transmitter Data Field Length/TX FIFO Counter TDFL defines the number of bytes to be transmitted in UART buffer mode (TFBM = 0)" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 10.--12. "RDFL_RFC,Reception Data Field Length /RX FIFO Counter RDFL defines the number of bytes to be received in UART buffer mode (RFBM = 0)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 9. "RFBM,RFBM Rx Fifo/Buffer mode This bit can be programmed in Initialization mode only when the UART bit is set" "0: Rx Buffer mode enabled,1: Rx Fifo mode enabled (mandatory in DMA Rx mode)"
|
|
newline
|
|
bitfld.long 0x10 8. "TFBM,Tx Fifo/Buffer mode This bit can be programmed in initialization mode only when the UART bit is set" "0: Tx Buffer mode enabled,1: Tx Fifo mode enabled (mandatory in DMA Tx mode)"
|
|
bitfld.long 0x10 7. "WL1,Word Length in UART mode This bit can be programmed in Initialization mode only when the UART bit is set" "0,1"
|
|
newline
|
|
bitfld.long 0x10 6. "PC1,Parity Control This bit can be programmed in Initialization mode only when UART bit is set" "0,1"
|
|
bitfld.long 0x10 5. "RxEn,Receiver Enable This bit can be programmed only when the UART bit is set." "0: Receiver disabled,1: Receiver enabled"
|
|
newline
|
|
bitfld.long 0x10 4. "TxEn,Transmitter Enable This bit can be programmed only when UART bit is set." "0: Transmitter disabled,1: Transmitter enabled transmission starts only.."
|
|
bitfld.long 0x10 3. "PC0,Parity Control This bit can be programmed in Initialization mode only when UART bit is set" "0,1"
|
|
newline
|
|
bitfld.long 0x10 2. "PCE,Parity Control Enable This bit can be programmed in Initialization mode only when the UART bit is set" "0: Parity transmit/check Disable,1: Parity transmit/check Enable"
|
|
bitfld.long 0x10 1. "WL0,Word Length in UART mode This bit can be programmed in Initialization mode only when UART bit is set" "0,1"
|
|
newline
|
|
bitfld.long 0x10 0. "UART,UART Mode This bit can be programmed in Initialization mode only" "0: LIN mode,1: UART mode"
|
|
line.long 0x14 "UARTSR,UART Mode Status Register"
|
|
bitfld.long 0x14 15. "SZF,Stuck at Zero flag This bit is set by hardware when 100 dominant bits are detected" "0,1"
|
|
bitfld.long 0x14 14. "OCF,Output Compare Flag An interrupt will be generated if the OCIE bit in LINIER is set" "0: No output compare event occurred,1: The content of the counter has matched the.."
|
|
newline
|
|
hexmask.long.byte 0x14 10.--13. 1. "PE,Parity Error flag These bits indicate if there is a Parity Error in the corresponding byte"
|
|
bitfld.long 0x14 9. "RMB,Release Message Buffer This bit should be cleared by software" "0: Buffer data is free,1: Buffer data ready to be read by software"
|
|
newline
|
|
bitfld.long 0x14 8. "FEF,Framing Error flag This bit is set by hardware when there is a framing error (invalid stop bit)" "0,1"
|
|
bitfld.long 0x14 7. "BOF,FIFO/Buffer overrun flag This bit is set by hardware when there is a new byte received and the RMB bit is not cleared in UART buffer mode" "0,1"
|
|
newline
|
|
rbitfld.long 0x14 6. "RDI,Receiver Data Input signal This bit reflects the current status of the RX pin." "0,1"
|
|
bitfld.long 0x14 5. "WUF,Wakeup flag This bit is set by hardware when a falling edge is detected on the RX pin in sleep mode" "0,1"
|
|
newline
|
|
rbitfld.long 0x14 4. "RFNE,Receive FIFO Not Empty RFNE bit is set by hardware in UART FIFO mode (RFBM = 1) when there is at least one data byte present in the receive FIFO" "0,1"
|
|
bitfld.long 0x14 3. "TO,Timeout This bit is set by hardware when a UART timeout occurs - in other words the value of UARTCTO becomes equal to the preset value of the timeout (UARTPTO register setting)" "0,1"
|
|
newline
|
|
bitfld.long 0x14 2. "DRFRFE,Data Reception Completed Flag /Rx FIFO Empty Flag DRF is set by hardware in UART buffer mode (RFBM = 0) and indicates that the number of bytes programmed in RDFL have been received" "0,1"
|
|
bitfld.long 0x14 1. "DTFTFF,Data Transmission Completed Flag/ TX FIFO Full Flag DTF is set by hardware in UART buffer mode (TFBM = 0) and indicates that data transmission is completed" "0,1"
|
|
newline
|
|
bitfld.long 0x14 0. "NF,Noise flag This bit is set by hardware when noise is detected in the received character" "0,1"
|
|
line.long 0x18 "LINTCSR,LIN Time-Out Control Status Register"
|
|
bitfld.long 0x18 10. "MODE,Time-out counter mode This bit can be configured only during initialization" "0: LIN mode,1: Output compare mode"
|
|
bitfld.long 0x18 9. "IOT,Idle on timeout Register bit can be read in any mode written only in initialization mode" "0: LIN state machine does not reset to Idle on..,1: LIN state machine resets to Idle on timeout event"
|
|
newline
|
|
bitfld.long 0x18 8. "TOCE,Time-out counter enable TOCE is always configurable by software in Initialization mode" "0: Time-out counter disable. OCF flag is not set on..,1: Time-out counter enable. OCF flag is set if an.."
|
|
hexmask.long.byte 0x18 0.--7. 1. "CNT,Counter Value These bits reflect the value of a counter used for timeout"
|
|
line.long 0x1C "LINOCR,LIN Output Compare Register"
|
|
hexmask.long.byte 0x1C 8.--15. 1. "OC2,Output compare value 2"
|
|
hexmask.long.byte 0x1C 0.--7. 1. "OC1,Output compare value 1"
|
|
line.long 0x20 "LINTOCR,LIN Time-Out Control Register"
|
|
hexmask.long.byte 0x20 8.--11. 1. "RTO,Response timeout value This is the response timeout duration (in bit time) for 1 byte"
|
|
hexmask.long.byte 0x20 0.--6. 1. "HTO,Header timeout value This register contains the header timeout duration (in bit time)"
|
|
line.long 0x24 "LINFBRR,LIN Fractional Baud Rate Register"
|
|
hexmask.long.byte 0x24 0.--3. 1. "FBR,Fractional Baud rates Register bit can be read in any mode written only in initialization mode."
|
|
line.long 0x28 "LINIBRR,LIN Integer Baud Rate Register"
|
|
hexmask.long.tbyte 0x28 0.--19. 1. "IBR,Integer Baud rates These bits along with the fractional baud rate bits decide the LIN baud rate"
|
|
line.long 0x2C "LINCFR,LIN Checksum Field Register"
|
|
hexmask.long.byte 0x2C 0.--7. 1. "CF,Checksum bits When the CCD bit is reset these bits are read-only and are calculated by hardware"
|
|
line.long 0x30 "LINCR2,LIN Control Register 2"
|
|
bitfld.long 0x30 15. "TBDE,Two Bit delimiter bit This bit can be set in Initialization mode only" "0: Delimiter length in break field is 1 bit,1: Delimiter length in break field is 2 bits"
|
|
bitfld.long 0x30 14. "IOBE,Idle on Bit Error This bit can be set in Initialization mode only" "0: Bit Error does not reset LIN state machine,1: Bit Error resets LIN state machine"
|
|
newline
|
|
bitfld.long 0x30 13. "IOPE,Idle on Identifier Parity Error This bit can be set in Initialization mode only" "0: Parity Error does not reset LIN state machine,1: Parity Error resets LIN state machine"
|
|
bitfld.long 0x30 12. "WURQ,Wakeup Generate Request Setting this bit will generate a wakeup pulse" "0,1"
|
|
newline
|
|
bitfld.long 0x30 11. "DDRQ,Data Discard request Set by software to stop data reception if the frame does not concern the node" "0,1"
|
|
bitfld.long 0x30 10. "DTRQ,Data Transmission Request Set by software in slave mode to request the transmission of the LIN Data field stored in the Buffer data register" "0,1"
|
|
newline
|
|
bitfld.long 0x30 9. "ABRQ,Abort Request Set by software to abort the current transmission" "0,1"
|
|
bitfld.long 0x30 8. "HTRQ,Header Transmission Request Set by software to request the transmission of the LIN Header" "0,1"
|
|
line.long 0x34 "BIDR,Buffer Identifier Register"
|
|
bitfld.long 0x34 10.--12. "DFL,Data Field Length Number of data bytes in the response part of the frame" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x34 9. "DIR,Direction This bit controls the direction of the data field." "0: LINFlexD receives the data and copy them in the..,1: LINFlexD transmits the data from the BDR registers"
|
|
newline
|
|
bitfld.long 0x34 8. "CCS,Classic Checksum This bit controls the type of checksum applied on the current message." "0: Enhanced Checksum covering Identifier and Data..,1: Classic Checksum covering Data filed only. This.."
|
|
hexmask.long.byte 0x34 0.--5. 1. "ID,Identifier Identifier part of the identifier field without the identifier parity"
|
|
line.long 0x38 "BDRL,Buffer Data Register Least Significant"
|
|
hexmask.long.byte 0x38 24.--31. 1. "DATA3,Data Byte 3 Data byte 3 of the data field."
|
|
hexmask.long.byte 0x38 16.--23. 1. "DATA2,Data Byte 2 Data byte 2 of the data field."
|
|
newline
|
|
hexmask.long.byte 0x38 8.--15. 1. "DATA1,Data Byte 1 Data byte 1of the data field."
|
|
hexmask.long.byte 0x38 0.--7. 1. "DATA0,Data Byte 0 Data byte 0 of the data field."
|
|
line.long 0x3C "BDRM,Buffer Data Register Most Significant"
|
|
hexmask.long.byte 0x3C 24.--31. 1. "DATA7,Data Byte 7 Data byte 7 of the data field."
|
|
hexmask.long.byte 0x3C 16.--23. 1. "DATA6,Data Byte 6 Data byte 6 of the data field."
|
|
newline
|
|
hexmask.long.byte 0x3C 8.--15. 1. "DATA5,Data Byte 5 Data byte 5of the data field."
|
|
hexmask.long.byte 0x3C 0.--7. 1. "DATA4,Data Byte 4 Data byte 4 of the data field."
|
|
line.long 0x40 "IFER,Identifier Filter Enable Register"
|
|
hexmask.long.word 0x40 0.--15. 1. "FACT,Filter active The software sets the bit FACT[x] to activate the filter x in Identifier list mode"
|
|
rgroup.long 0x44++0x3
|
|
line.long 0x0 "IFMI,Identifier Filter Match Index"
|
|
hexmask.long.byte 0x0 0.--4. 1. "IFMI,Filter match index Upon a filter match with xth filter - IFMI[4:0] = x+1"
|
|
group.long 0x48++0x3
|
|
line.long 0x0 "IFMR,Identifier Filter Mode Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "IFM,Filter mode Register bit can be read in any mode written only in initialization mode."
|
|
repeat 16. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x4C)++0x3
|
|
line.long 0x0 "IFCR$1,Identifier Filter Control Register"
|
|
bitfld.long 0x0 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 9. "DIR,Direction" "0: LINFlexD receives data and copies to the BDR..,1: LINFlexD transmits data from the BDR registers"
|
|
newline
|
|
bitfld.long 0x0 8. "CCS,Classic Checksum" "0: Enhanced Checksum covering Identifier and Data..,1: Classic Checksum covering Data field only. This.."
|
|
hexmask.long.byte 0x0 0.--5. 1. "ID,Identifier"
|
|
repeat.end
|
|
group.long 0x8C++0x7
|
|
line.long 0x0 "GCR,Global Control Register"
|
|
bitfld.long 0x0 5. "TDFBM,Transmit data first bit MSB This bit controls the first bit of transmit data (payload only) as MSB/LSB in both UART and LIN modes" "0: The first bit of transmitted data is LSB - in..,1: The first bit of transmitted data is MSB - in.."
|
|
bitfld.long 0x0 4. "RDFBM,Received data first bit MSB This bit controls the first bit of received data (payload only) as MSB/LSB both in UART and LIN modes" "0: The first bit of received data is LSB - in other..,1: The first bit of received data is MSB - in other.."
|
|
newline
|
|
bitfld.long 0x0 3. "TDLIS,Transmit data level inversion selection This bit controls the data inversion of transmitted data (payload only) in both UART and LIN modes" "0: Transmitted data is not inverted,1: Transmitted data is inverted"
|
|
bitfld.long 0x0 2. "RDLIS,Received data level inversion selection This bit controls the data inversion of received data (payload only) in both UART and LIN modes" "0: Received data is not inverted,1: Received data is inverted"
|
|
newline
|
|
bitfld.long 0x0 1. "STOP,1/2 stop bit configuration This bit controls the number of stop bit transmitted data in both UART and LIN modes" "0: 1 stop bit,1: 2 stop bits"
|
|
bitfld.long 0x0 0. "SR,Soft reset SR executes a soft reset of the LINFlexD controller (FSMs FIFO pointers counters timers status and error registers) without modifying the configuration registers when a 1 write operation is performed" "0,1"
|
|
line.long 0x4 "UARTPTO,UART Preset Timeout Register"
|
|
hexmask.long.word 0x4 0.--11. 1. "PTO,Preset Timeout PTO defines the preset value of timeout counter"
|
|
rgroup.long 0x94++0x3
|
|
line.long 0x0 "UARTCTO,UART Current Timeout Register"
|
|
hexmask.long.word 0x0 0.--11. 1. "CTO,Current Timeout CTO defines the current value of the timeout counter"
|
|
group.long 0x98++0x7
|
|
line.long 0x0 "DMATXE,DMA Tx Enable Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "DTE,DMA Tx channel Y enable The number of DTE bits varies and is equal to DMA_TX_CH_NUM"
|
|
line.long 0x4 "DMARXE,DMA Rx Enable Register"
|
|
hexmask.long.word 0x4 0.--15. 1. "DRE,DMA Rx channel Y enable The number of DRE bits varies and is equal to DMA_RX_CH_NUM"
|
|
tree.end
|
|
tree.end
|
|
tree "LMEM (Local Memory Controller)"
|
|
base ad:0x0
|
|
tree "LMEM_0"
|
|
base ad:0xE0082000
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "PCCCR,Processor Code Cache Control Register"
|
|
bitfld.long 0x0 31. "GO,Initiate Cache Command" "0: Write: no effect. Read: no cache command active.,1: Write: initiate command indicated by bits 27-24."
|
|
bitfld.long 0x0 27. "PUSHW1,Push Way 1" "0: No operation,1: When setting the GO bit push all modified lines.."
|
|
newline
|
|
bitfld.long 0x0 26. "INVW1,Invalidate Way 1" "0: No operation,1: When setting the GO bit invalidate all lines in.."
|
|
bitfld.long 0x0 25. "PUSHW0,Push Way 0" "0: No operation,1: When setting the GO bit push all modified lines.."
|
|
newline
|
|
bitfld.long 0x0 24. "INVW0,Invalidate Way 0" "0: No operation,1: When setting the GO bit invalidate all lines in.."
|
|
bitfld.long 0x0 3. "PCCR3,Forces no allocation on cache misses (must also have the PCCR2 bit asserted)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "PCCR2,Forces all cacheable spaces to write through" "0,1"
|
|
bitfld.long 0x0 1. "ENWRBUF,Enable Write Buffer" "0: Write buffer disabled,1: Write buffer enabled"
|
|
newline
|
|
bitfld.long 0x0 0. "ENCACHE,Cache enable" "0: Cache disabled,1: Cache enabled"
|
|
line.long 0x4 "PCCLCR,Processor Code Cache Line Control Register"
|
|
bitfld.long 0x4 27. "LACC,Line access type" "0: Read,1: Write"
|
|
bitfld.long 0x4 26. "LADSEL,Line Address Select" "0: Cache address,1: Physical address"
|
|
newline
|
|
bitfld.long 0x4 24.--25. "LCMD,Line Command" "0: Search and read or write,1: Invalidate,2: Push,3: Clear"
|
|
rbitfld.long 0x4 22. "LCWAY,Line Command Way" "0,1"
|
|
newline
|
|
rbitfld.long 0x4 21. "LCIMB,Line Command Initial Modified Bit" "0,1"
|
|
rbitfld.long 0x4 20. "LCIVB,Line Command Initial Valid Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "TDSEL,Tag/Data Select" "0: Data,1: Tag"
|
|
bitfld.long 0x4 14. "WSEL,Way select" "0: Way 0,1: Way 1"
|
|
newline
|
|
hexmask.long.word 0x4 2.--12. 1. "CACHEADDR,Cache address"
|
|
bitfld.long 0x4 0. "LGO,Initiate Cache Line Command" "0: Write: no effect. Read: no line command active.,1: Write: initiate line command indicated by bits.."
|
|
line.long 0x8 "PCCSAR,Processor Code Cache Search Address Register"
|
|
hexmask.long 0x8 2.--31. 1. "PHYADDR,Physical Address"
|
|
bitfld.long 0x8 0. "LGO,Initiate Cache Line Command" "0: Write: no effect. Read: no line command active.,1: Write: initiate line command indicated by bits.."
|
|
line.long 0xC "PCCCVR,Processor Code Cache Read/Write Value Register"
|
|
hexmask.long 0xC 0.--31. 1. "DATA,Cache read/write Data"
|
|
group.long 0x800++0xF
|
|
line.long 0x0 "PSCCR,Processor System Cache Control Register"
|
|
bitfld.long 0x0 31. "GO,Initiate Cache Command" "0: Write: no effect. Read: no cache command active.,1: Write: initiate command indicated by bits 27-24."
|
|
bitfld.long 0x0 27. "PUSHW1,Push Way 1" "0: No operation,1: When setting the GO bit push all modified lines.."
|
|
newline
|
|
bitfld.long 0x0 26. "INVW1,Invalidate Way 1" "0: No operation,1: When setting the GO bit invalidate all lines in.."
|
|
bitfld.long 0x0 25. "PUSHW0,Push Way 0" "0: No operation,1: When setting the GO bit push all modified lines.."
|
|
newline
|
|
bitfld.long 0x0 24. "INVW0,Invalidate Way 0" "0: No operation,1: When setting the GO bit invalidate all lines in.."
|
|
bitfld.long 0x0 1. "ENWRBUF,Enable Write Buffer" "0: Write buffer disabled,1: Write buffer enabled"
|
|
newline
|
|
bitfld.long 0x0 0. "ENCACHE,Cache enable" "0: Cache disabled,1: Cache enabled"
|
|
line.long 0x4 "PSCLCR,Processor System Cache Line Control Register"
|
|
bitfld.long 0x4 27. "LACC,Line access type" "0: Read,1: Write"
|
|
bitfld.long 0x4 26. "LADSEL,Line Address Select" "0: Cache address,1: Physical address"
|
|
newline
|
|
bitfld.long 0x4 24.--25. "LCMD,Line Command" "0: Search and read or write,1: Invalidate,2: Push,3: Clear"
|
|
rbitfld.long 0x4 22. "LCWAY,Line Command Way" "0,1"
|
|
newline
|
|
rbitfld.long 0x4 21. "LCIMB,Line Command Initial Modified Bit" "0,1"
|
|
rbitfld.long 0x4 20. "LCIVB,Line Command Initial Valid Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "TDSEL,Tag/Data Select" "0: Data,1: Tag"
|
|
bitfld.long 0x4 14. "WSEL,Way select" "0: Way 0,1: Way 1"
|
|
newline
|
|
hexmask.long.word 0x4 2.--12. 1. "CACHEADDR,Cache address"
|
|
bitfld.long 0x4 0. "LGO,Initiate Cache Line Command" "0: Write: no effect. Read: no line command active.,1: Write: initiate line command indicated by bits.."
|
|
line.long 0x8 "PSCSAR,Processor System Cache Search Address Register"
|
|
hexmask.long 0x8 2.--31. 1. "PHYADDR,Physical Address"
|
|
bitfld.long 0x8 0. "LGO,Initiate Cache Line Command" "0: Write: no effect. Read: no line command active.,1: Write: initiate line command indicated by bits.."
|
|
line.long 0xC "PSCCVR,Processor System Cache Read/Write Value Register"
|
|
hexmask.long 0xC 0.--31. 1. "DATA,Cache read/write Data"
|
|
tree.end
|
|
tree "LMEM_1"
|
|
base ad:0xFF882000
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "PCCCR,Processor Code Cache Control Register"
|
|
bitfld.long 0x0 31. "GO,Initiate Cache Command" "0: Write: no effect. Read: no cache command active.,1: Write: initiate command indicated by bits 27-24."
|
|
bitfld.long 0x0 27. "PUSHW1,Push Way 1" "0: No operation,1: When setting the GO bit push all modified lines.."
|
|
newline
|
|
bitfld.long 0x0 26. "INVW1,Invalidate Way 1" "0: No operation,1: When setting the GO bit invalidate all lines in.."
|
|
bitfld.long 0x0 25. "PUSHW0,Push Way 0" "0: No operation,1: When setting the GO bit push all modified lines.."
|
|
newline
|
|
bitfld.long 0x0 24. "INVW0,Invalidate Way 0" "0: No operation,1: When setting the GO bit invalidate all lines in.."
|
|
bitfld.long 0x0 3. "PCCR3,Forces no allocation on cache misses (must also have the PCCR2 bit asserted)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "PCCR2,Forces all cacheable spaces to write through" "0,1"
|
|
bitfld.long 0x0 1. "ENWRBUF,Enable Write Buffer" "0: Write buffer disabled,1: Write buffer enabled"
|
|
newline
|
|
bitfld.long 0x0 0. "ENCACHE,Cache enable" "0: Cache disabled,1: Cache enabled"
|
|
line.long 0x4 "PCCLCR,Processor Code Cache Line Control Register"
|
|
bitfld.long 0x4 27. "LACC,Line access type" "0: Read,1: Write"
|
|
bitfld.long 0x4 26. "LADSEL,Line Address Select" "0: Cache address,1: Physical address"
|
|
newline
|
|
bitfld.long 0x4 24.--25. "LCMD,Line Command" "0: Search and read or write,1: Invalidate,2: Push,3: Clear"
|
|
rbitfld.long 0x4 22. "LCWAY,Line Command Way" "0,1"
|
|
newline
|
|
rbitfld.long 0x4 21. "LCIMB,Line Command Initial Modified Bit" "0,1"
|
|
rbitfld.long 0x4 20. "LCIVB,Line Command Initial Valid Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "TDSEL,Tag/Data Select" "0: Data,1: Tag"
|
|
bitfld.long 0x4 14. "WSEL,Way select" "0: Way 0,1: Way 1"
|
|
newline
|
|
hexmask.long.word 0x4 2.--12. 1. "CACHEADDR,Cache address"
|
|
bitfld.long 0x4 0. "LGO,Initiate Cache Line Command" "0: Write: no effect. Read: no line command active.,1: Write: initiate line command indicated by bits.."
|
|
line.long 0x8 "PCCSAR,Processor Code Cache Search Address Register"
|
|
hexmask.long 0x8 2.--31. 1. "PHYADDR,Physical Address"
|
|
bitfld.long 0x8 0. "LGO,Initiate Cache Line Command" "0: Write: no effect. Read: no line command active.,1: Write: initiate line command indicated by bits.."
|
|
line.long 0xC "PCCCVR,Processor Code Cache Read/Write Value Register"
|
|
hexmask.long 0xC 0.--31. 1. "DATA,Cache read/write Data"
|
|
group.long 0x800++0xF
|
|
line.long 0x0 "PSCCR,Processor System Cache Control Register"
|
|
bitfld.long 0x0 31. "GO,Initiate Cache Command" "0: Write: no effect. Read: no cache command active.,1: Write: initiate command indicated by bits 27-24."
|
|
bitfld.long 0x0 27. "PUSHW1,Push Way 1" "0: No operation,1: When setting the GO bit push all modified lines.."
|
|
newline
|
|
bitfld.long 0x0 26. "INVW1,Invalidate Way 1" "0: No operation,1: When setting the GO bit invalidate all lines in.."
|
|
bitfld.long 0x0 25. "PUSHW0,Push Way 0" "0: No operation,1: When setting the GO bit push all modified lines.."
|
|
newline
|
|
bitfld.long 0x0 24. "INVW0,Invalidate Way 0" "0: No operation,1: When setting the GO bit invalidate all lines in.."
|
|
bitfld.long 0x0 1. "ENWRBUF,Enable Write Buffer" "0: Write buffer disabled,1: Write buffer enabled"
|
|
newline
|
|
bitfld.long 0x0 0. "ENCACHE,Cache enable" "0: Cache disabled,1: Cache enabled"
|
|
line.long 0x4 "PSCLCR,Processor System Cache Line Control Register"
|
|
bitfld.long 0x4 27. "LACC,Line access type" "0: Read,1: Write"
|
|
bitfld.long 0x4 26. "LADSEL,Line Address Select" "0: Cache address,1: Physical address"
|
|
newline
|
|
bitfld.long 0x4 24.--25. "LCMD,Line Command" "0: Search and read or write,1: Invalidate,2: Push,3: Clear"
|
|
rbitfld.long 0x4 22. "LCWAY,Line Command Way" "0,1"
|
|
newline
|
|
rbitfld.long 0x4 21. "LCIMB,Line Command Initial Modified Bit" "0,1"
|
|
rbitfld.long 0x4 20. "LCIVB,Line Command Initial Valid Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "TDSEL,Tag/Data Select" "0: Data,1: Tag"
|
|
bitfld.long 0x4 14. "WSEL,Way select" "0: Way 0,1: Way 1"
|
|
newline
|
|
hexmask.long.word 0x4 2.--12. 1. "CACHEADDR,Cache address"
|
|
bitfld.long 0x4 0. "LGO,Initiate Cache Line Command" "0: Write: no effect. Read: no line command active.,1: Write: initiate line command indicated by bits.."
|
|
line.long 0x8 "PSCSAR,Processor System Cache Search Address Register"
|
|
hexmask.long 0x8 2.--31. 1. "PHYADDR,Physical Address"
|
|
bitfld.long 0x8 0. "LGO,Initiate Cache Line Command" "0: Write: no effect. Read: no line command active.,1: Write: initiate line command indicated by bits.."
|
|
line.long 0xC "PSCCVR,Processor System Cache Read/Write Value Register"
|
|
hexmask.long 0xC 0.--31. 1. "DATA,Cache read/write Data"
|
|
tree.end
|
|
tree.end
|
|
tree "MC_CGM (Clock Generation Module)"
|
|
base ad:0x0
|
|
tree "MC_CGM_0"
|
|
base ad:0x4003C000
|
|
group.byte 0x703++0x0
|
|
line.byte 0x0 "PCS_SDUR,PCS Switch Duration Register"
|
|
hexmask.byte 0x0 0.--7. 1. "SDUR,Switch Duration - This value defines the duration of one PCS clock switch step in terms of system clock source 0 cycles"
|
|
group.long 0x710++0xB
|
|
line.long 0x0 "PCS_DIVC2,PCS Divider Change Register 2"
|
|
hexmask.long.word 0x0 16.--31. 1. "INIT,Divider Change Initial Value - This is initial change value of the clock divider for the clock ramp-up phase when switching to ARM PLL DFS 1"
|
|
hexmask.long.byte 0x0 0.--7. 1. "RATE,Divider Change Rate - This value controls the change value of the clock divider for the clock ramp-up and ramp-down phase when switching from ARM PLL DFS 1"
|
|
line.long 0x4 "PCS_DIVE2,PCS Divider End Register 2"
|
|
hexmask.long.tbyte 0x4 0.--19. 1. "DIVE,Divider End Value - This is the clock divider end value for the clock ramp-down phase when switching from the ARM PLL DFS 1"
|
|
line.long 0x8 "PCS_DIVS2,PCS Divider Start Register 2"
|
|
hexmask.long.tbyte 0x8 0.--19. 1. "DIVS,Divider Start Value - This is the start value of the clock divider for the clock ramp-up phase when switching to the ARM PLL DFS 1"
|
|
group.long 0x7D4++0x3
|
|
line.long 0x0 "DIV_UPD_TYPE,Divider Update Type Register"
|
|
bitfld.long 0x0 31. "SYS_UPD_TYPE,System Clock Divider Update Type" "0: the configuration for each system clock divider..,1: the configuration for each system clock divider.."
|
|
wgroup.long 0x7D8++0x3
|
|
line.long 0x0 "DIV_UPD_TRIG,Divider Update Trigger Register"
|
|
hexmask.long 0x0 0.--31. 1. "DIV_UPD_TRIGGER,Divider update trigger Writing any non-zero value to this register triggers the divider update"
|
|
rgroup.long 0x7DC++0x3
|
|
line.long 0x0 "DIV_UPD_STAT,Divider Update Status Register"
|
|
bitfld.long 0x0 31. "SYS_UPD_STAT,System Clock Divider Update Status" "0: the configuration for none of the system clock..,1: the configuration for at least one system clock.."
|
|
rgroup.long 0x7E4++0x3
|
|
line.long 0x0 "SC_SS,System Clock Select Status Register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SELSTAT,System Clock Source Selection Status - This value indicates the current source for the system clock"
|
|
bitfld.long 0x0 17.--19. "SWTRG,Switch Trigger cause - This value indicates the cause for the latest clock source switch." "?,1: switch after request from MC_ME succeeded,2: switch after request from MC_ME failed due..,3: switch after request from MC_ME failed due..,4: switch to system clock source 0 due to reset..,5: switch to system clock source 0 due to reset..,?,?"
|
|
newline
|
|
bitfld.long 0x0 16. "SWIP,Switch In Progress" "0: clock source switching has completed,1: clock source switching is in progress"
|
|
group.long 0x7E8++0xB
|
|
line.long 0x0 "SC_DC0,System Clock Divider 0 Configuration Register"
|
|
bitfld.long 0x0 31. "DE,Divider 0 Enable" "0: Disable system clock divider 0,1: Enable system clock divider 0"
|
|
bitfld.long 0x0 16.--17. "DIV,Divider 0 Division Value - The resultant SYS3_CLK will have a period 'DIV + 1' times that of the system clock" "0,1,2,3"
|
|
line.long 0x4 "SC_DC1,System Clock Divider 1 Configuration Register"
|
|
bitfld.long 0x4 31. "DE,Divider 0 Enable" "0: Disable system clock divider 0,1: Enable system clock divider 0"
|
|
bitfld.long 0x4 16.--17. "DIV,Divider 1 Division Value - The resultant SYS6_CLK will have a period 'DIV + 1' times that of the system clock" "0,1,2,3"
|
|
line.long 0x8 "SC_DC2,System Clock Divider 2 Configuration Register"
|
|
bitfld.long 0x8 31. "DE,Divider 2 Enable" "0: Disable system clock divider 0,1: Enable system clock divider 0"
|
|
bitfld.long 0x8 16.--18. "DIV,Divider 2 Division Value - The resultant SYS6_DIV2_CLK will have a period 'DIV + 1' times that of the system clock" "0,1,2,3,4,5,6,7"
|
|
group.long 0x800++0x3
|
|
line.long 0x0 "AC0_SC,Auxiliary Clock 0 Select Control Register"
|
|
bitfld.long 0x0 24.--26. "SELCTL,Auxiliary Clock 0 Source Selection Control - This value selects the current source for auxiliary clock 0" "0: FIRC,1: FXOSC,?,?,?,5: DDR PLL DFS1,?,?"
|
|
rgroup.long 0x804++0x3
|
|
line.long 0x0 "AC0_SS,Auxiliary Clock 0 Select Status Register"
|
|
bitfld.long 0x0 24.--26. "SELSTAT,Auxiliary Clock 0 Source Selection Status - This value indicates the current source for auxiliary clock 0" "0: FIRC,1: FXOSC,?,?,?,5: DDR PLL DFS1,?,?"
|
|
group.long 0x808++0x3
|
|
line.long 0x0 "AC0_DC0,Auxiliary Clock 0 Divider 0 Configuration Register"
|
|
bitfld.long 0x0 31. "DE,Divider 0 Enable" "0: Disable auxiliary clock 0 divider 0,1: Enable auxiliary clock 0 divider 0"
|
|
bitfld.long 0x0 16.--17. "DIV,Divider 0 Division Value - The resultant ISP CLK will have a period 'DIV + 1' times that of auxiliary clock 0" "0,1,2,3"
|
|
group.long 0x820++0x3
|
|
line.long 0x0 "AC1_SC,Auxiliary Clock 1 Select Control Register"
|
|
bitfld.long 0x0 24.--26. "SELCTL,Auxiliary Clock 1 Source Selection Control - This value selects the current source for auxiliary clock 1" "0: FIRC,1: FXOSC,?,?,?,5: DDR PLL DFS2,?,?"
|
|
rgroup.long 0x824++0x3
|
|
line.long 0x0 "AC1_SS,Auxiliary Clock 1 Select Status Register"
|
|
bitfld.long 0x0 24.--26. "SELSTAT,Auxiliary Clock 1 Source Selection Control - This value provides the current source for auxiliary clock 1" "0: FIRC,1: FXOSC,?,?,?,5: DDR PLL DFS2,?,?"
|
|
group.long 0x828++0x3
|
|
line.long 0x0 "AC1_DC0,Auxiliary Clock 1 Divider 0 Configuration Register"
|
|
bitfld.long 0x0 31. "DE,Divider 0 Enable" "0: Disable auxiliary clock 1 divider 0,1: Enable auxiliary clock 1 divider 0"
|
|
bitfld.long 0x0 16.--17. "DIV,Divider 0 Division Value - The resultant APEX APU CLK will have a period 'DIV + 1' times that of auxiliary clock 1" "0,1,2,3"
|
|
group.long 0x840++0x3
|
|
line.long 0x0 "AC2_SC,Auxiliary Clock 2 Select Control Register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SELCTL,Auxiliary Clock 2 Source Selection Control - This value selects the current source for auxiliary clock 2"
|
|
rgroup.long 0x844++0x3
|
|
line.long 0x0 "AC2_SS,Auxiliary Clock 2 Select Status Register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SELSTAT,Auxiliary Clock 2 Source Selection Status - This value indicates the current source for auxiliary clock 2"
|
|
group.long 0x848++0x3
|
|
line.long 0x0 "AC2_DC0,Auxiliary Clock 2 Divider 0 Configuration Register"
|
|
bitfld.long 0x0 31. "DE,Divider 0 Enable" "0: Disable auxiliary clock 2 divider 0,1: Enable auxiliary clock 2 divider 0"
|
|
bitfld.long 0x0 16.--17. "DIV,Divider 0 Division Value - The resultant MJPEG CLK will have a period 'DIV + 1' times that of auxiliary clock 2" "0,1,2,3"
|
|
group.long 0x860++0x3
|
|
line.long 0x0 "AC3_SC,Auxiliary Clock 3 Select Control Register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SELCTL,Auxiliary Clock 3 Source Selection Control - This value selects the current source for auxiliary clock 3"
|
|
rgroup.long 0x864++0x3
|
|
line.long 0x0 "AC3_SS,Auxiliary Clock 3 Select Status Register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SELSTAT,Auxiliary Clock 3 Source Selection Status- This value provides the current source for auxiliary clock 3"
|
|
group.long 0x868++0x3
|
|
line.long 0x0 "AC3_DC0,Auxiliary Clock 3 Divider 0 Configuration Register"
|
|
bitfld.long 0x0 31. "DE,Divider 0 Enable" "0: Disable auxiliary clock 3 divider 0,1: Enable auxiliary clock 3 divider 0"
|
|
bitfld.long 0x0 16.--17. "DIV,Divider 0 Division Value - The resultant LIN CLK will have a period 'DIV + 1' times that of auxiliary clock 3" "0,1,2,3"
|
|
group.long 0x880++0x3
|
|
line.long 0x0 "AC4_SC,Auxiliary Clock 4 Select Control Register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SELCTL,Auxiliary Clock 4 Source Selection Control - This value provides the current source for auxiliary clock 4"
|
|
rgroup.long 0x884++0x3
|
|
line.long 0x0 "AC4_SS,Auxiliary Clock 4 Select Status Register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SELSTAT,Auxiliary Clock 4 Source Selection Status - This value indicates the current source for auxiliary clock 4"
|
|
group.long 0x888++0x3
|
|
line.long 0x0 "AC4_DC0,Auxiliary Clock 4 Divider 0 Configuration Register"
|
|
bitfld.long 0x0 31. "DE,Divider 0 Enable" "0: Disable auxiliary clock 4 divider 0,1: Enable auxiliary clock 4 divider 0"
|
|
hexmask.long.byte 0x0 16.--19. 1. "DIV,Divider 0 Division Value - The resultant FLEXTIMER0_EXT CLK will have a period 'DIV + 1' times that of auxiliary clock 4"
|
|
group.long 0x8A0++0x3
|
|
line.long 0x0 "AC5_SC,Auxiliary Clock 5 Select Control Register"
|
|
bitfld.long 0x0 24.--25. "SELCTL,Auxiliary Clock 5 Source Selection Control - This value selects the current source for auxiliary clock 5" "0: FIRC,1: FXOSC,?,3: DIV by 5 PERIPH_PLL PHI 0"
|
|
rgroup.long 0x8A4++0x3
|
|
line.long 0x0 "AC5_SS,Auxiliary Clock 5 Select Status Register"
|
|
bitfld.long 0x0 24.--25. "SELSTAT,Auxiliary Clock 5 Source Selection Status - This value indicates the current source for auxiliary clock 5" "0: FIRC,1: FXOSC,?,3: DIV by 5 PERIPH_PLL PHI 0"
|
|
group.long 0x8A8++0x7
|
|
line.long 0x0 "AC5_DC0,Auxiliary Clock 5 Divider 0 Configuration Register"
|
|
bitfld.long 0x0 31. "DE,Divider Enable" "0: Disable auxiliary clock 5 divider 0,1: Enable auxiliary clock 5 divider 0"
|
|
bitfld.long 0x0 16.--17. "DIV,Divider Division Value - The resultant PERI CLK will have a period 'DIV + 1' times that of auxiliary clock 5" "0,1,2,3"
|
|
line.long 0x4 "AC5_DC1,Auxiliary Clock 5 Divider 1 Configuration Register"
|
|
bitfld.long 0x4 31. "DE,Divider Enable" "0: Disable auxiliary clock 5 divider 1,1: Enable auxiliary clock 5 divider 1"
|
|
bitfld.long 0x4 16.--17. "DIV,Divider Division Value - The resultant FRAY_PLL_CLK will have a period 'DIV + 1' times that of auxiliary clock 5" "0,1,2,3"
|
|
group.long 0x8C0++0x3
|
|
line.long 0x0 "AC6_SC,Auxiliary Clock 6 Select Control Register"
|
|
bitfld.long 0x0 24.--25. "SELCTL,Auxiliary Clock 6 Source Selection Control - This value selects the current source for auxiliary clock 6" "0: FIRC.,1: FXOSC,?,3: DIV by 5 PERIPH_PLL PHI 0"
|
|
rgroup.long 0x8C4++0x3
|
|
line.long 0x0 "AC6_SS,Auxiliary Clock 6 Select Status Register"
|
|
bitfld.long 0x0 24.--25. "SELSTAT,Auxiliary Clock 6 Source Selection Status - This value indicates the current source for auxiliary clock 6" "0: FIRC.,1: FXOSC,?,3: DIV by 5 PERIPH_PLL PHI 0"
|
|
group.long 0x8C8++0x3
|
|
line.long 0x0 "AC6_DC0,Auxiliary Clock 6 Divider 0 Configuration Register"
|
|
bitfld.long 0x0 31. "DE,Divider Enable" "0: Disable auxiliary clock 6 divider 0,1: Enable auxiliary clock 6 divider 0"
|
|
bitfld.long 0x0 16.--17. "DIV,Divider Division Value - The resultant CAN CLK will have a period 'DIV + 1' times that of auxiliary clock 6" "0,1,2,3"
|
|
group.long 0x8E0++0x3
|
|
line.long 0x0 "AC7_SC,Auxiliary Clock 7 Select Control Register"
|
|
bitfld.long 0x0 24.--26. "SELCTL,Auxiliary Clock 7 Source Selection Control - This value selects the current source for auxiliary clock 7" "0: FIRC,1: FXOSC,?,?,4: ENET PLL PHI 0,?,?,?"
|
|
rgroup.long 0x8E4++0x3
|
|
line.long 0x0 "AC7_SS,Auxiliary Clock 7 Select Status Register"
|
|
bitfld.long 0x0 24.--26. "SELSTAT,Auxiliary Clock 7 Source Selection Status - This value indicates the current source for auxiliary clock 7" "0: FIRC,1: FXOSC,?,?,4: ENET PLL PHI 0,?,?,?"
|
|
group.long 0x8EC++0x3
|
|
line.long 0x0 "AC7_DC1,Auxiliary Clock 7 Divider 1 Configuration Register"
|
|
bitfld.long 0x0 31. "DE,Divider Enable" "0: Disable auxiliary clock 7 divider 1,1: Enable auxiliary clock 7 divider 1"
|
|
hexmask.long.byte 0x0 16.--20. 1. "DIV,Divider Division Value - The resultant ENET TIME CLK will have a period 'DIV + 1' times that of auxiliary clock 7"
|
|
group.long 0x900++0x3
|
|
line.long 0x0 "AC8_SC,Auxiliary Clock 8 Select Control Register"
|
|
bitfld.long 0x0 24.--26. "SELCTL,Auxiliary Clock 8 Source Selection Control - This value selects the current source for auxiliary clock 8" "0: FIRC,1: FXOSC,?,?,?,5: DDR PLL PHI 0,?,?"
|
|
rgroup.long 0x904++0x3
|
|
line.long 0x0 "AC8_SS,Auxiliary Clock 8 Select Status Register"
|
|
bitfld.long 0x0 24.--26. "SELSTAT,Auxiliary Clock 8 Source Selection Status - This value indicates the current source for auxiliary clock 8" "0: FIRC,1: FXOSC,?,?,?,5: DDR PLL PHI 0,?,?"
|
|
group.long 0x908++0x7
|
|
line.long 0x0 "AC8_DC0,Auxiliary Clock 8 Divider 0 Configuration Register"
|
|
bitfld.long 0x0 31. "DE,Divider Enable" "0: Disable auxiliary clock 8 divider 0,1: Enable auxiliary clock 8 divider 0"
|
|
bitfld.long 0x0 16.--17. "DIV,Divider Division Value - The resultant DDR CLK will have a period 'DIV + 1' times that of auxiliary clock 8" "0,1,2,3"
|
|
line.long 0x4 "AC8_DC1,Auxiliary Clock 8 Divider 1 Configuration Register"
|
|
bitfld.long 0x4 31. "DE,Divider Enable" "0: Disable auxiliary clock 8 divider 1,1: Enable auxiliary clock 8 divider 1"
|
|
hexmask.long.byte 0x4 16.--19. 1. "DIV,Divider Division Value - The resultant DDR4 CLK will have a period 'DIV + 1' times that of auxiliary clock 8"
|
|
group.long 0x920++0x3
|
|
line.long 0x0 "AC9_SC,Auxiliary Clock 9 Select Control Register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SELCTL,Auxiliary Clock 9 Source Selection Control - This value selects the current source for auxiliary clock 9"
|
|
rgroup.long 0x924++0x3
|
|
line.long 0x0 "AC9_SS,Auxiliary Clock 9 Select Status Register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SELSTAT,Auxiliary Clock 9 Source Selection Status - This value indicates the current source for auxiliary clock 9"
|
|
group.long 0x928++0x7
|
|
line.long 0x0 "AC9_DC0,Auxiliary Clock 9 Divider 0 Configuration Register"
|
|
bitfld.long 0x0 31. "DE,Divider Enable" "0: Disable auxiliary clock 9 divider 0,1: Enable auxiliary clock 9 divider 0"
|
|
bitfld.long 0x0 16.--18. "DIV,Divider Division Value - The resultant DCU AXI CLK will have a period 'DIV + 1' times that of auxiliary clock 9" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "AC9_DC1,Auxiliary Clock 9 Divider 1 Configuration Register"
|
|
bitfld.long 0x4 31. "DE,Divider Enable" "0: Disable auxiliary clock 9 divider 1,1: Enable auxiliary clock 9 divider 1"
|
|
bitfld.long 0x4 16.--18. "DIV,Divider Division Value - The resultant DCU PIX CLK will have a period 'DIV + 1' times that of auxiliary clock 9" "0,1,2,3,4,5,6,7"
|
|
group.long 0x940++0x3
|
|
line.long 0x0 "AC10_SC,Auxiliary Clock 10 Select Control Register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SELCTL,Auxiliary Clock 10 Source Selection Control - This value selects the current source for auxiliary clock 10"
|
|
rgroup.long 0x944++0x3
|
|
line.long 0x0 "AC10_SS,Auxiliary Clock 10 Select Status Register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SELSTAT,Auxiliary Clock 10 Source Selection Status - This value indicates the current source for auxiliary clock 10"
|
|
group.long 0x948++0x7
|
|
line.long 0x0 "AC10_DC0,Auxiliary Clock 10 Divider 0 Configuration Register"
|
|
bitfld.long 0x0 31. "DE,Divider Enable" "0: Disable auxiliary clock 10 divider 0,1: Enable auxiliary clock 10 divider 0"
|
|
hexmask.long.byte 0x0 16.--19. 1. "DIV,Divider Division Value - The resultant CLKOUT will have a period 'DIV + 1' times that of auxiliary clock 10"
|
|
line.long 0x4 "AC10_DC1,Auxiliary Clock 10 Divider 1 Configuration Register"
|
|
bitfld.long 0x4 31. "DE,Divider Enable" "0: Disable auxiliary clock 10 divider 1,1: Enable auxiliary clock 10 divider 1"
|
|
hexmask.long.byte 0x4 16.--19. 1. "DIV,Divider Division Value - The resultant LBIST_FAST_CLK will have a period 'DIV + 1' times that of auxiliary clock 10"
|
|
group.long 0x960++0x3
|
|
line.long 0x0 "AC11_SC,Auxiliary Clock 11 Select Control Register"
|
|
bitfld.long 0x0 24. "SELCTL,Auxiliary Clock 11 Source Selection Control - This value selects the current source for auxiliary clock 11" "0: 32KHz Divided FIRC,1: 32KHZ Divided FXOSC"
|
|
rgroup.long 0x964++0x3
|
|
line.long 0x0 "AC11_SS,Auxiliary Clock 11 Select Status Register"
|
|
bitfld.long 0x0 24. "SELSTAT,Auxiliary Clock 11 Source Selection Status - This value indicates the current source for auxiliary clock 11" "0: 32KHz derived from FIRC,1: 32KHZ derived from FXOSC"
|
|
group.long 0x968++0x3
|
|
line.long 0x0 "AC11_DC0,Auxiliary Clock 11 Divider 0 Configuration Register"
|
|
bitfld.long 0x0 31. "DE,Divider Enable" "0: Disable auxiliary clock 11 divider 0,1: Enable auxiliary clock 11 divider 0"
|
|
bitfld.long 0x0 16.--17. "DIV,Divider Division Value - The resultant DDR 32KHz CLK will have a period 'DIV + 1' times that of auxiliary clock 11" "0,1,2,3"
|
|
group.long 0x980++0x3
|
|
line.long 0x0 "AC12_SC,Auxiliary Clock 12 Select Control Register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SELCTL,Auxiliary Clock 12 Source Selection Control - This value selects the current source for auxiliary clock 12"
|
|
rgroup.long 0x984++0x3
|
|
line.long 0x0 "AC12_SS,Auxiliary Clock 12 Select Status Register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SELSTAT,Auxiliary Clock 12 Source Selection Status - This value indicates the current source for auxiliary clock 12"
|
|
group.long 0x988++0x3
|
|
line.long 0x0 "AC12_DC0,Auxiliary Clock 12 Divider 0 Configuration Register"
|
|
bitfld.long 0x0 31. "DE,Divider Enable" "0: Disable auxiliary clock 12 divider 0,1: Enable auxiliary clock 12 divider 0"
|
|
bitfld.long 0x0 16.--17. "DIV,Divider Division Value - The resultant H264 DEC CLK will have a period 'DIV + 1' times that of auxiliary clock 12" "0,1,2,3"
|
|
group.long 0x9A0++0x3
|
|
line.long 0x0 "AC13_SC,Auxiliary Clock 13 Select Control Register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SELCTL,Auxiliary Clock 13 Source Selection Control - This value selects the current source for auxiliary clock 13"
|
|
rgroup.long 0x9A4++0x3
|
|
line.long 0x0 "AC13_SS,Auxiliary Clock 13 Select Status Register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SELSTAT,Auxiliary Clock 13 Source Selection Status - This value indicates the current source for auxiliary clock 13"
|
|
group.long 0x9A8++0x3
|
|
line.long 0x0 "AC13_DC0,Auxiliary Clock 13 Divider 0 Configuration Register"
|
|
bitfld.long 0x0 31. "DE,Divider Enable" "0: Disable auxiliary clock 13 divider 0,1: Enable auxiliary clock 13 divider 0"
|
|
bitfld.long 0x0 16.--17. "DIV,Divider Division Value - The resultant H264 ENC CLK will have a period 'DIV + 1' times that of auxiliary clock 13" "0,1,2,3"
|
|
group.long 0x9C0++0x3
|
|
line.long 0x0 "AC14_SC,Auxiliary Clock 14 Select Control Register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SELCTL,Auxiliary Clock 14 Source Selection Control - This value selects the current source for auxiliary clock 14"
|
|
rgroup.long 0x9C4++0x3
|
|
line.long 0x0 "AC14_SS,Auxiliary Clock 14 Select Status Register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SELSTAT,Auxiliary Clock 14 Source Selection Status - This value indicates the current source for auxiliary clock 14"
|
|
group.long 0x9C8++0x3
|
|
line.long 0x0 "AC14_DC0,Auxiliary Clock 14 Divider 0 Configuration Register"
|
|
bitfld.long 0x0 31. "DE,Divider Enable" "0: Disable auxiliary clock 14 divider 0,1: Enable auxiliary clock 14 divider 0"
|
|
hexmask.long.byte 0x0 16.--19. 1. "DIV,Divider Division Value - The resultant QSPI CLK will have a period 'DIV + 1' times that of auxiliary clock 14"
|
|
group.long 0x9E0++0x3
|
|
line.long 0x0 "AC15_SC,Auxiliary Clock 15 Select Control Register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SELCTL,Auxiliary Clock 15 Source Selection Control - This value selects the current source for auxiliary clock 15"
|
|
rgroup.long 0x9E4++0x3
|
|
line.long 0x0 "AC15_SS,Auxiliary Clock 15 Select Status Register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SELSTAT,Auxiliary Clock 15 Source Selection Status - This value indicates the current source for auxiliary clock 15"
|
|
group.long 0x9E8++0x3
|
|
line.long 0x0 "AC15_DC0,Auxiliary Clock 15 Divider 0 Configuration Register"
|
|
bitfld.long 0x0 31. "DE,Divider Enable" "0: Disable auxiliary clock 15 divider 0,1: Enable auxiliary clock 15 divider 0"
|
|
hexmask.long.byte 0x0 16.--19. 1. "DIV,Divider Division Value - The resultant SDHC CLK will have a period 'DIV + 1' times that of auxiliary clock 15"
|
|
tree.end
|
|
tree "MC_CGM_1"
|
|
base ad:0x4003F000
|
|
group.byte 0x703++0x0
|
|
line.byte 0x0 "PCS_SDUR,PCS Switch Duration Register"
|
|
hexmask.byte 0x0 0.--7. 1. "SDUR,Switch Duration - This value defines the duration of one PCS clock switch step in terms of system clock source 0 cycles"
|
|
group.long 0x710++0xB
|
|
line.long 0x0 "PCS_DIVC2,PCS Divider Change Register 2"
|
|
hexmask.long.word 0x0 16.--31. 1. "INIT,Divider Change Initial Value - This is initial change value of the clock divider for the clock ramp-up phase when switching to ARM PLL PHI 0"
|
|
hexmask.long.byte 0x0 0.--7. 1. "RATE,Divider Change Rate - This value controls the change value of the clock divider for the clock ramp-up and ramp-down phase when switching from ARM PLL PHI 0"
|
|
line.long 0x4 "PCS_DIVE2,PCS Divider End Register 2"
|
|
hexmask.long.tbyte 0x4 0.--19. 1. "DIVE,Divider End Value - This is the clock divider end value for the clock ramp-down phase when switching from the ARM PLL PHI 0"
|
|
line.long 0x8 "PCS_DIVS2,PCS Divider Start Register 2"
|
|
hexmask.long.tbyte 0x8 0.--19. 1. "DIVS,Divider Start Value - This is the start value of the clock divider for the clock ramp-up phase when switching to the ARM PLL PHI 0"
|
|
group.long 0x7D4++0x3
|
|
line.long 0x0 "DIV_UPD_TYPE,Divider Update Type Register"
|
|
bitfld.long 0x0 31. "SYS_UPD_TYPE,System Clock Divider Update Type" "0: the configuration for each system clock divider..,1: the configuration for each system clock divider.."
|
|
wgroup.long 0x7D8++0x3
|
|
line.long 0x0 "DIV_UPD_TRIG,Divider Update Trigger Register"
|
|
hexmask.long 0x0 0.--31. 1. "DIV_UPD_TRIGGER,Divider update trigger Writing any non-zero value to this register triggers the divider update"
|
|
rgroup.long 0x7DC++0x3
|
|
line.long 0x0 "DIV_UPD_STAT,Divider Update Status Register"
|
|
bitfld.long 0x0 31. "SYS_UPD_STAT,System Clock Divider Update Status" "0: the configuration for none of the system clock..,1: the configuration for at least one system clock.."
|
|
rgroup.long 0x7E4++0x3
|
|
line.long 0x0 "SC_SS,System Clock Select Status Register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SELSTAT,System Clock Source Selection Status - This value indicates the current source for the system clock"
|
|
bitfld.long 0x0 17.--19. "SWTRG,Switch Trigger cause - This value indicates the cause for the latest clock source switch." "?,1: switch after request from MC_ME succeeded,2: switch after request from MC_ME failed due..,3: switch after request from MC_ME failed due..,4: switch to system clock source 0 due to reset..,5: switch to system clock source 0 due to reset..,?,?"
|
|
newline
|
|
bitfld.long 0x0 16. "SWIP,Switch In Progress" "0: clock source switching has completed,1: clock source switching is in progress"
|
|
group.long 0x7E8++0xB
|
|
line.long 0x0 "SC_DC0,System Clock Divider 0 Configuration Register"
|
|
bitfld.long 0x0 31. "DE,Divider 0 Enable" "0: Disable system clock divider 0,1: Enable system clock divider 0"
|
|
bitfld.long 0x0 16.--17. "DIV,Divider 0 Division Value - The resultant CORE CLK will have a period 'DIV + 1' times that of the system clock" "0,1,2,3"
|
|
line.long 0x4 "SC_DC1,System Clock Divider 1 Configuration Register"
|
|
bitfld.long 0x4 31. "DE,Divider 0 Enable" "0: Disable system clock divider 0,1: Enable system clock divider 0"
|
|
bitfld.long 0x4 16.--17. "DIV,Divider 0 Division Value - The resultant CORE 2 CLK will have a period 'DIV + 1' times that of the system clock" "0,1,2,3"
|
|
line.long 0x8 "SC_DC2,System Clock Divider 2 Configuration Register"
|
|
bitfld.long 0x8 31. "DE,Divider 0 Enable" "0: Disable system clock divider 0,1: Enable system clock divider 0"
|
|
hexmask.long.byte 0x8 16.--19. 1. "DIV,Divider 0 Division Value - The resultant PCLKDBGEN will have a period 'DIV + 1' times that of the system clock"
|
|
tree.end
|
|
tree "MC_CGM_2"
|
|
base ad:0x40042000
|
|
group.byte 0x703++0x0
|
|
line.byte 0x0 "PCS_SDUR,PCS Switch Duration Register"
|
|
hexmask.byte 0x0 0.--7. 1. "SDUR,Switch Duration - This value defines the duration of one PCS clock switch step in terms of system clock source 0 cycles"
|
|
group.long 0x710++0xB
|
|
line.long 0x0 "PCS_DIVC2,PCS Divider Change Register 2"
|
|
hexmask.long.word 0x0 16.--31. 1. "INIT,Divider Change Initial Value - This is initial change value of the clock divider for the clock ramp-up phase when switching to ARM PLL DFS 2"
|
|
hexmask.long.byte 0x0 0.--7. 1. "RATE,Divider Change Rate - This value controls the change value of the clock divider for the clock ramp-up and ramp-down phase when switching from ARM PLL DFS 2"
|
|
line.long 0x4 "PCS_DIVE2,PCS Divider End Register 2"
|
|
hexmask.long.tbyte 0x4 0.--19. 1. "DIVE,Divider End Value - This is the clock divider end value for the clock ramp-down phase when switching from the ARM PLL DFS 2"
|
|
line.long 0x8 "PCS_DIVS2,PCS Divider Start Register 2"
|
|
hexmask.long.tbyte 0x8 0.--19. 1. "DIVS,Divider Start Value - This is the start value of the clock divider for the clock ramp-up phase when switching to the ARM PLL DFS 2"
|
|
group.long 0x7D4++0x3
|
|
line.long 0x0 "DIV_UPD_TYPE,Divider Update Type Register"
|
|
bitfld.long 0x0 31. "SYS_UPD_TYPE,System Clock Divider Update Type" "0: the configuration for each system clock divider..,1: the configuration for each system clock divider.."
|
|
wgroup.long 0x7D8++0x3
|
|
line.long 0x0 "DIV_UPD_TRIG,Divider Update Trigger Register"
|
|
hexmask.long 0x0 0.--31. 1. "DIV_UPD_TRIGGER,Divider update trigger Writing any non-zero value to this register triggers the divider update"
|
|
rgroup.long 0x7DC++0x3
|
|
line.long 0x0 "DIV_UPD_STAT,Divider Update Status Register"
|
|
bitfld.long 0x0 31. "SYS_UPD_STAT,System Clock Divider Update Status" "0: the configuration for none of the system clock..,1: the configuration for at least one system clock.."
|
|
rgroup.long 0x7E4++0x3
|
|
line.long 0x0 "SC_SS,System Clock Select Status Register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SELSTAT,System Clock Source Selection Status - This value indicates the current source for the system clock"
|
|
bitfld.long 0x0 17.--19. "SWTRG,Switch Trigger cause - This value indicates the cause for the latest clock source switch." "?,1: switch after request from MC_ME succeeded,2: switch after request from MC_ME failed due..,3: switch after request from MC_ME failed due..,4: switch to system clock source 0 due to reset..,5: switch to system clock source 0 due to reset..,?,?"
|
|
newline
|
|
bitfld.long 0x0 16. "SWIP,Switch In Progress" "0: clock source switching has completed,1: clock source switching is in progress"
|
|
group.long 0x7E8++0x3
|
|
line.long 0x0 "SC_DC0,System Clock Divider 0 Configuration Register"
|
|
bitfld.long 0x0 31. "DE,Divider 0 Enable" "0: Disable system clock divider 0,1: Enable system clock divider 0"
|
|
bitfld.long 0x0 16.--17. "DIV,Divider 0 Division Value - The resultant GPU CLK will have a period 'DIV + 1' times that of the system clock" "0,1,2,3"
|
|
group.long 0x800++0x3
|
|
line.long 0x0 "AC0_SC,Auxiliary Clock 0 Select Control Register"
|
|
bitfld.long 0x0 24.--26. "SELCTL,Auxiliary Clock 0 Source Selection Control - This value selects the current source for auxiliary clock 0" "0: FIRC,1: FXOSC,?,3: Div By 5 PERIPH PLL PHI 0,?,?,?,7: External Source from PAD"
|
|
rgroup.long 0x804++0x3
|
|
line.long 0x0 "AC0_SS,Auxiliary Clock 0 Select Status Register"
|
|
bitfld.long 0x0 24.--26. "SELSTAT,Auxiliary Clock 0 Source Selection Status - This value indicates the current source for auxiliary clock 0" "0: FIRC,1: FXOSC,?,3: Div By 5 PERIPH PLL PHI 0,?,?,?,7: External Source from PAD"
|
|
group.long 0x808++0x3
|
|
line.long 0x0 "AC0_DC0,Auxiliary Clock 0 Divider 0 Configuration Register"
|
|
bitfld.long 0x0 31. "DE,Divider 0 Enable" "0: Disable auxiliary clock 0 divider 0,1: Enable auxiliary clock 0 divider 0"
|
|
hexmask.long.byte 0x0 16.--19. 1. "DIV,Divider 0 Division Value - The resultant LFAST PLL REFCLK will have a period 'DIV + 1' times that of auxiliary clock 0"
|
|
group.long 0x840++0x3
|
|
line.long 0x0 "AC2_SC,Auxiliary Clock 2 Select Control Register"
|
|
bitfld.long 0x0 24.--26. "SELCTL,Auxiliary Clock 2 Source Selection Control - This value selects the current source for auxiliary clock 2" "0: FIRC,1: FXOSC,?,?,4: ENET PLL PHI 0,?,?,?"
|
|
rgroup.long 0x844++0x3
|
|
line.long 0x0 "AC2_SS,Auxiliary Clock 2 Select Status Register"
|
|
bitfld.long 0x0 24.--26. "SELSTAT,Auxiliary Clock 2 Source Selection Status - This value indicates the current source for auxiliary clock 2" "0: FIRC,1: FXOSC,?,?,4: ENET PLL PHI 0,?,?,?"
|
|
group.long 0x848++0x3
|
|
line.long 0x0 "AC2_DC0,Auxiliary Clock 2 Divider 0 Configuration Register"
|
|
bitfld.long 0x0 31. "DE,Divider 0 Enable" "0: Disable auxiliary clock 2 divider 0,1: Enable auxiliary clock 2 divider 0"
|
|
hexmask.long.byte 0x0 16.--19. 1. "DIV,Divider 0 Division Value - The resultant ENET CLK will have a period 'DIV + 1' times that of auxiliary clock 2"
|
|
group.long 0x860++0x3
|
|
line.long 0x0 "AC3_SC,Auxiliary Clock 3 Select Control Register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SELCTL,Auxiliary Clock 3 Source Selection Control - This value selects the current source for auxiliary clock 3"
|
|
rgroup.long 0x864++0x3
|
|
line.long 0x0 "AC3_SS,Auxiliary Clock 3 Select Status Register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SELSTAT,Auxiliary Clock 3 Source Selection Status- This value provides the current source for auxiliary clock 3"
|
|
group.long 0x868++0x3
|
|
line.long 0x0 "AC3_DC0,Auxiliary Clock 3 Divider 0 Configuration Register"
|
|
bitfld.long 0x0 31. "DE,Divider 0 Enable" "0: Disable auxiliary clock 3 divider 0,1: Enable auxiliary clock 3 divider 0"
|
|
hexmask.long.byte 0x0 16.--19. 1. "DIV,Divider 0 Division Value - The resultant FLEXTIMER1 EXT CLK will have a period 'DIV + 1' times that of auxiliary clock 3"
|
|
group.long 0x880++0x3
|
|
line.long 0x0 "AC4_SC,Auxiliary Clock 4 Select Control Register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SELCTL,Auxiliary Clock 3 Source Selection Control - This value selects the current source for auxiliary clock 3"
|
|
rgroup.long 0x884++0x3
|
|
line.long 0x0 "AC4_SS,Auxiliary Clock 4 Select Status Register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SELSTAT,Auxiliary Clock 3 Source Selection Status- This value provides the current source for auxiliary clock 3"
|
|
group.long 0x888++0x3
|
|
line.long 0x0 "AC4_DC0,Auxiliary Clock 4 Divider 0 Configuration Register"
|
|
bitfld.long 0x0 31. "DE,Divider 0 Enable" "0: Disable auxiliary clock 3 divider 0,1: Enable auxiliary clock 3 divider 0"
|
|
hexmask.long.byte 0x0 16.--19. 1. "DIV,Divider 0 Division Value - The resultant TPIU TRACECLKIN will have a period 'DIV + 1' times that of auxiliary clock 3"
|
|
tree.end
|
|
tree "MC_CGM_3"
|
|
base ad:0x40045000
|
|
group.byte 0x703++0x0
|
|
line.byte 0x0 "PCS_SDUR,PCS Switch Duration Register"
|
|
hexmask.byte 0x0 0.--7. 1. "SDUR,Switch Duration - This value defines the duration of one PCS clock switch step in terms of system clock source 0 cycles"
|
|
group.long 0x710++0xB
|
|
line.long 0x0 "PCS_DIVC2,PCS Divider Change Register 2"
|
|
hexmask.long.word 0x0 16.--31. 1. "INIT,Divider Change Initial Value - This is initial change value of the clock divider for the clock ramp-up phase when switching to ARM PLL DFS 3"
|
|
hexmask.long.byte 0x0 0.--7. 1. "RATE,Divider Change Rate - This value controls the change value of the clock divider for the clock ramp-up and ramp-down phase when switching from ARM PLL DFS 3"
|
|
line.long 0x4 "PCS_DIVE2,PCS Divider End Register 2"
|
|
hexmask.long.tbyte 0x4 0.--19. 1. "DIVE,Divider End Value - This is the clock divider end value for the clock ramp-down phase when switching from the ARM PLL DFS 3"
|
|
line.long 0x8 "PCS_DIVS2,PCS Divider Start Register 2"
|
|
hexmask.long.tbyte 0x8 0.--19. 1. "DIVS,Divider Start Value - This is the start value of the clock divider for the clock ramp-up phase when switching to the ARM PLL DFS 3"
|
|
group.long 0x7D4++0x3
|
|
line.long 0x0 "DIV_UPD_TYPE,Divider Update Type Register"
|
|
bitfld.long 0x0 31. "SYS_UPD_TYPE,System Clock Divider Update Type" "0: the configuration for each system clock divider..,1: the configuration for each system clock divider.."
|
|
wgroup.long 0x7D8++0x3
|
|
line.long 0x0 "DIV_UPD_TRIG,Divider Update Trigger Register"
|
|
hexmask.long 0x0 0.--31. 1. "DIV_UPD_TRIGGER,Divider update trigger Writing any non-zero value to this register triggers the divider update"
|
|
rgroup.long 0x7DC++0x3
|
|
line.long 0x0 "DIV_UPD_STAT,Divider Update Status Register"
|
|
bitfld.long 0x0 31. "SYS_UPD_STAT,System Clock Divider Update Status" "0: the configuration for none of the system clock..,1: the configuration for at least one system clock.."
|
|
rgroup.long 0x7E4++0x3
|
|
line.long 0x0 "SC_SS,System Clock Select Status Register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SELSTAT,System Clock Source Selection Status - This value indicates the current source for the system clock"
|
|
bitfld.long 0x0 17.--19. "SWTRG,Switch Trigger cause - This value indicates the cause for the latest clock source switch." "?,1: switch after request from MC_ME succeeded,2: switch after request from MC_ME failed due..,3: switch after request from MC_ME failed due..,4: switch to system clock source 0 due to reset..,5: switch to system clock source 0 due to reset..,?,?"
|
|
newline
|
|
bitfld.long 0x0 16. "SWIP,Switch In Progress" "0: clock source switching has completed,1: clock source switching is in progress"
|
|
group.long 0x7E8++0x7
|
|
line.long 0x0 "SC_DC0,System Clock Divider 0 Configuration Register"
|
|
bitfld.long 0x0 31. "DE,Divider 0 Enable" "0: Disable system clock divider 0,1: Enable system clock divider 0"
|
|
bitfld.long 0x0 16.--17. "DIV,Divider 0 Division Value - The resultant GPU SHD CLK will have a period 'DIV + 1' times that of the system clock" "0,1,2,3"
|
|
line.long 0x4 "SC_DC1,System Clock Divider 1 Configuration Register"
|
|
bitfld.long 0x4 31. "DE,Divider 0 Enable" "0: Disable system clock divider 0,1: Enable system clock divider 0"
|
|
bitfld.long 0x4 16.--17. "DIV,Divider 0 Division Value - The resultant MIPI LI CLK will have a period 'DIV + 1' times that of the system clock" "0,1,2,3"
|
|
tree.end
|
|
tree.end
|
|
tree "MC_ME (Mode Entry Module)"
|
|
base ad:0x4004A000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "GS,Global Status Register"
|
|
hexmask.long.byte 0x0 28.--31. 1. "S_CURRENT_MODE,Current Chip Mode Status"
|
|
bitfld.long 0x0 27. "S_MTRANS,Mode Transition Status" "0: Mode transition process is not active,1: Mode transition is ongoing"
|
|
newline
|
|
bitfld.long 0x0 10. "S_VIDEOPLL,Video PLL status" "0: Video PLL is not stable,1: VIDEO PLL is providing a stable clock"
|
|
bitfld.long 0x0 9. "S_DDRPLL,DDR PLL status" "0: DDR PLL is not stable,1: DDR PLL is providing a stable clock"
|
|
newline
|
|
bitfld.long 0x0 8. "S_ENETPLL,ENET PLL status" "0: ENET PLL DFS is not stable,1: ENET PLL DFS is providing a stable clock"
|
|
bitfld.long 0x0 7. "S_PERIPHPLL,PERIPH_PLL status" "0: PERIPH_PLL is not stable,1: PERIPH_PLL is providing a stable clock"
|
|
newline
|
|
bitfld.long 0x0 6. "S_ARMPLL,ARM PLL status" "0: ARM PLL is not stable,1: ARM PLL is providing a stable clock"
|
|
bitfld.long 0x0 5. "S_FXOSC,FXOSC status" "0: FXOSC is not stable,1: FXOSC is providing a stable clock"
|
|
newline
|
|
bitfld.long 0x0 4. "S_FIRC,System RC oscillator status" "0: System RC oscillator is not stable,1: System RC oscillator is providing a stable clock"
|
|
hexmask.long.byte 0x0 0.--3. 1. "S_SYSCLK,System Clock Switch Status specifies the system clock(MC_CGM_0) currently used by the system."
|
|
group.long 0x4++0x13
|
|
line.long 0x0 "MCTL,Mode Control Register"
|
|
hexmask.long.byte 0x0 28.--31. 1. "TARGET_MODE,Target chip mode - provides the target chip mode to be entered by software programming"
|
|
hexmask.long.word 0x0 0.--15. 1. "KEY,Control Key - enables write access to this register"
|
|
line.long 0x4 "ME,Mode Enable Register"
|
|
rbitfld.long 0x4 15. "RESET_DEST,Destructive RESET Mode Enabled" "?,1: Destructive RESET mode is enabled"
|
|
bitfld.long 0x4 7. "RUN3,RUN3 Mode Enable" "0: RUN3 mode is disabled,1: RUN3 mode is enabled"
|
|
newline
|
|
bitfld.long 0x4 6. "RUN2,RUN2 Mode Enable" "0: RUN2 mode is disabled,1: RUN2 mode is enabled"
|
|
bitfld.long 0x4 5. "RUN1,RUN1 Mode Enable" "0: RUN1 mode is disabled,1: RUN1 mode is enabled"
|
|
newline
|
|
rbitfld.long 0x4 4. "RUN0,RUN0 Mode Enable" "?,1: RUN0 mode is enabled"
|
|
rbitfld.long 0x4 3. "DRUN,DRUN Mode Enable" "?,1: DRUN mode is enabled"
|
|
newline
|
|
rbitfld.long 0x4 0. "RESET_FUNC,Functional RESET Mode Enable" "?,1: 'Functional' RESET mode is enabled"
|
|
line.long 0x8 "IS,Interrupt Status Register"
|
|
bitfld.long 0x8 6. "I_ICONF_SCC,Invalid Mode Configuration Interrupt (Secondary Clock Configuration) - is set if the source for any of the secondary sysclks have been configured to be turned off in the target mode" "0,1"
|
|
bitfld.long 0x8 5. "I_ICONF_CC,Invalid Mode Configuration Interrupt (Core Configuration) is set if a write access to one of the CADDRn registers is attempted when a mode transition is in progress" "0: No write to an CADDRn register was attempted..,1: A write to an CADDRn register was attempted.."
|
|
newline
|
|
bitfld.long 0x8 3. "I_ICONF,Invalid Mode Configuration Interrupt is set whenever a write operation to <mode>_MC registers with invalid mode configuration is attempted" "0: No invalid mode configuration interrupt occurred,1: Invalid mode configuration interrupt is pending"
|
|
bitfld.long 0x8 2. "I_IMODE,Invalid Mode Interrupt is set whenever an invalid mode transition is requested" "0: No invalid mode interrupt occurred,1: Invalid mode interrupt is pending"
|
|
newline
|
|
bitfld.long 0x8 0. "I_MTC,Mode Transition Complete Interrupt is set whenever the mode transition process completes (S_MTRANS transits from 1 to 0)" "0: No mode transition complete interrupt occurred,1: Mode transition complete interrupt is pending"
|
|
line.long 0xC "IM,Interrupt Mask Register"
|
|
bitfld.long 0xC 6. "M_ICONF_SCC,Invalid Mode Configuration (Secondary Clock Configuration) Interrupt Mask" "0: Invalid mode interrupt is masked,1: Invalid mode interrupt is enabled"
|
|
bitfld.long 0xC 5. "M_ICONF_CC,Invalid Mode Configuration (Core Configuration) Interrupt Mask" "0: Invalid mode interrupt is masked,1: Invalid mode interrupt is enabled"
|
|
newline
|
|
bitfld.long 0xC 3. "M_ICONF,Invalid Mode Configuration Interrupt Mask" "0: Invalid mode interrupt is masked,1: Invalid mode interrupt is enabled"
|
|
bitfld.long 0xC 2. "M_IMODE,Invalid Mode Interrupt Mask" "0: Invalid mode interrupt is masked,1: Invalid mode interrupt is enabled"
|
|
newline
|
|
bitfld.long 0xC 0. "M_MTC,Mode Transition Complete Interrupt Mask" "0: Mode transition complete interrupt is masked,1: Mode transition complete interrupt is enabled"
|
|
line.long 0x10 "IMTS,Invalid Mode Transition Status Register"
|
|
bitfld.long 0x10 4. "S_MTI,Mode Transition Illegal Status is set whenever a new mode is requested when some other mode transition process is active (S_MTRANS is 1)" "0: Mode transition requested is not illegal,1: Mode transition requested is illegal"
|
|
bitfld.long 0x10 2. "S_DMA,Disabled Mode Access Status - is set whenever the target mode requested is one of those disabled modes determined by ME register" "0: Target mode requested is not a disabled mode,1: Target mode requested is a disabled mode"
|
|
newline
|
|
bitfld.long 0x10 1. "S_NMA,Non-Existing Mode Access Status is set whenever the target mode requested is one of those non existing modes determined by ME register" "0: Target mode requested is an existing mode,1: Target mode requested is a non-existing mode"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x0 "DMTS,Debug Mode Transition Status Register"
|
|
hexmask.long.byte 0x0 28.--31. 1. "PREVIOUS_MODE,Previous Chip Mode-shows the mode in which the chip was prior to the latest change to the current mode"
|
|
bitfld.long 0x0 19. "DBG_MODE,Debug Mode Indicator-is set when the chip is in debug mode." "0: The chip is not in debug mode,1: The chip is in debug mode"
|
|
newline
|
|
bitfld.long 0x0 18. "CCKL_PROG,Core Clock Enable/Disable In Progress-Is set when any core's clock is in the process of being enabled or disabled" "0: No core clock is being enabled or disabled,1: A core clock is being enabled or disabled"
|
|
bitfld.long 0x0 17. "PCS_PROG,Progressive System Clock Switching In Progress-is set when the progressive system clock switching process is in progress or the peripheral clock switching is ongoing or core clock switching is ongoing" "0: PCS is not in progress,1: PCS is in progress"
|
|
newline
|
|
bitfld.long 0x0 15. "CDP_PRPH_0_255,Clock Disable Process Pending Status For Peripherals 0 to 255-is set when any peripheral appearing has been requested to have its clock disabled" "0: No peripheral clock disabling is pending,1: Clock disabling is pending for at least one.."
|
|
bitfld.long 0x0 12. "FIRC_SC,FIRC State Change During Mode Transition Indicator-is set when the system RC oscillator is requested to change its power up/down state" "0: No state change is taking place,1: A state change is taking place"
|
|
newline
|
|
bitfld.long 0x0 11. "SCSRC_SC,Secondary Clock Sources State Change During Mode Transition Indicator-is set when a secondary clock source is requested to change its power up/down state" "0: No state change is taking place,1: A state change is taking place"
|
|
bitfld.long 0x0 10. "SYSCLK_SW,System Clock Switching Pending Status" "0: No system clock source switching is pending,1: A system clock source switching is pending"
|
|
newline
|
|
bitfld.long 0x0 6. "CDP_PRPH_192_223,Clock Disable Process Pending Status For Peripherals 192 to 223-is set when any peripheral appearing in PS6 has been requested to have its clock disabled" "0: No peripheral clock disabling is pending,1: Clock disabling is pending for at least one.."
|
|
bitfld.long 0x0 5. "CDP_PRPH_160_191,Clock Disable Process Pending Status For Peripherals 160 to 191-is set when any peripheral appearing in PS5 has been requested to have its clock disabled" "0: No peripheral clock disabling is pending,1: Clock disabling is pending for at least one.."
|
|
newline
|
|
bitfld.long 0x0 4. "CDP_PRPH_128_159,Clock Disable Process Pending Status For Peripherals 128 to 159-is set when any peripheral appearing in PS4 has been requested to have its clock disabled" "0: No peripheral clock disabling is pending,1: Clock disabling is pending for at least one.."
|
|
bitfld.long 0x0 3. "CDP_PRPH_96_127,Clock Disable Process Pending Status For Peripherals 96 to 127-is set when any peripheral appearing in PS3 has been requested to have its clock disabled" "0: No peripheral clock disabling is pending,1: Clock disabling is pending for at least one.."
|
|
newline
|
|
bitfld.long 0x0 2. "CDP_PRPH_64_95,Clock Disable Process Pending Status For Peripherals 64 to 95-is set when any peripheral appearing in PS2 has been requested to have its clock disabled" "0: No peripheral clock disabling is pending,1: Clock disabling is pending for at least one.."
|
|
bitfld.long 0x0 1. "CDP_PRPH_32_63,Clock Disable Process Pending Status For Peripherals 32 to 63-is set when any peripheral appearing in PS1 has been requested to have its clock disabled" "0: No peripheral clock disabling is pending,1: Clock disabling is pending for at least one.."
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x0 "RESET_MC,RESET Mode Configuration Register"
|
|
bitfld.long 0x0 28.--30. "PWRLVL,Power level-indicates the relative power consumption level of this mode with respect to that of other modes" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 10. "VIDEOPLLON,VIDEO PLL Control" "0: VIDEO PLL is switched on,1: VIDEO PLL is switched off"
|
|
newline
|
|
bitfld.long 0x0 9. "DDRPLLON,DDR PLL control" "0: DDR PLL is switched off,1: DDR PLL is switched on"
|
|
bitfld.long 0x0 8. "ENETPLLON,ENET PLL control" "0: ENET PLL is switched off,1: ENET PLL is switched on"
|
|
newline
|
|
bitfld.long 0x0 7. "PERIPHPLLON,PERIPH_PLL control" "0: PERIPH_PLL is switched off,1: PERIPH_PLL is switched on"
|
|
bitfld.long 0x0 6. "ARMPLLON,ARM PLL control" "0: ARM PLL is switched off,1: ARM PLL is switched on"
|
|
newline
|
|
bitfld.long 0x0 5. "FXOSCON,FXOSC control" "0: FXOSC is switched off,1: FXOSC is switched on"
|
|
bitfld.long 0x0 4. "FIRCON,System RC oscillator control" "0: System RC oscillator is switched off,1: System RC oscillator is switched on"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "SYSCLK,System clock switch control-Specifies the system clock (MC_CGM_0) to be used by the system."
|
|
group.long 0x2C++0x3
|
|
line.long 0x0 "DRUN_MC,DRUN Mode Configuration Register"
|
|
bitfld.long 0x0 28.--30. "PWRLVL,Power level-indicates the relative power consumption level of this mode with respect to that of other modes" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 10. "VIDEOPLLON,VIDEO PLL Control" "0: VIDEO PLL switched on,1: VIDEO PLL switched off"
|
|
newline
|
|
bitfld.long 0x0 9. "DDRPLLON,DDR PLL control" "0: DDR PLL is switched off,1: DDR PLL is switched on"
|
|
bitfld.long 0x0 8. "ENETPLLON,ENET PLL control" "0: ENET PLL is switched off,1: ENET PLL is switched on"
|
|
newline
|
|
bitfld.long 0x0 7. "PERIPHPLLON,PERIPH_PLL control" "0: PERIPH_PLL is switched off,1: PERIPH_PLL is switched on"
|
|
bitfld.long 0x0 6. "ARMPLLON,ARM PLL control" "0: ARM PLL is switched off,1: ARM PLL is switched on"
|
|
newline
|
|
bitfld.long 0x0 5. "FXOSCON,FXOSC control" "0: FXOSC is switched off,1: FXOSC is switched on"
|
|
rbitfld.long 0x0 4. "FIRCON,System RC oscillator control" "0: System RC oscillator is switched off,1: System RC oscillator is switched on"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "SYSCLK,System clock switch control-Specifies the system clock (MC_CGM_0) to be used by the system."
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x30)++0x3
|
|
line.long 0x0 "RUN$1_MC,RUN Mode Configuration Register"
|
|
bitfld.long 0x0 28.--30. "PWRLVL,Power level-indicates the relative power consumption level of this mode with respect to that of other modes" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 10. "VIDEOPLLON,VIDEO PLL control" "0: VIDEO PLL switched on,1: VIDEO PLL switched off"
|
|
newline
|
|
bitfld.long 0x0 9. "DDRPLLON,DDR PLL control" "0: DDR PLL is switched off,1: DDR PLL is switched on"
|
|
bitfld.long 0x0 8. "ENETPLLON,ENET PLL control" "0: ENET PLL is switched off,1: ENET PLL is switched on"
|
|
newline
|
|
bitfld.long 0x0 7. "PERIPHPLLON,PERIPH_PLL control" "0: PERIPH_PLL is switched off,1: PERIPH_PLL is switched on"
|
|
bitfld.long 0x0 6. "ARMPLLON,ARM PLL control" "0: ARM PLL is switched off,1: ARM PLL is switched on"
|
|
newline
|
|
bitfld.long 0x0 5. "FXOSCON,FXOSC control" "0: FXOSC is switched off,1: FXOSC is switched on"
|
|
rbitfld.long 0x0 4. "FIRCON,System RC oscillator control" "0: System RC oscillator is switched off,1: System RC oscillator is switched on"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "SYSCLK,System clock switch control-Specifies the system clock (MC_CGM_0) to be used by the system."
|
|
repeat.end
|
|
rgroup.long 0x64++0xB
|
|
line.long 0x0 "PS1,Peripheral Status Register 1"
|
|
bitfld.long 0x0 26. "S_PIT0,Peripheral Status-specifies the current status of the peripheral that is controlled by the MC_ME." "0: Peripheral is frozen,1: Peripheral is active"
|
|
bitfld.long 0x0 22. "S_MMDC0,Peripheral Status-specifies the current status of the peripheral that is controlled by the MC_ME." "0: Peripheral is frozen,1: Peripheral is active"
|
|
newline
|
|
bitfld.long 0x0 20. "S_FLEXRAY,Peripheral Status-specifies the current status of the peripheral that is controlled by the MC_ME." "0: Peripheral is frozen,1: Peripheral is active"
|
|
bitfld.long 0x0 18. "S_ENET,Peripheral Status-specifies the current status of the peripheral that is controlled by the MC_ME." "0: Peripheral is frozen,1: Peripheral is active"
|
|
newline
|
|
bitfld.long 0x0 17. "S_DMACHMUX0,Peripheral Status-specifies the current status of the peripheral that is controlled by the MC_ME." "0: Peripheral is frozen,1: Peripheral is active"
|
|
bitfld.long 0x0 16. "S_CSI0,Peripheral Status-specifies the current status of the peripheral that is controlled by the MC_ME." "0: Peripheral is frozen,1: Peripheral is active"
|
|
newline
|
|
bitfld.long 0x0 8. "S_2D_ACE,Peripheral Status-specifies the current status of the peripheral that is controlled by the MC_ME." "0: Peripheral is frozen,1: Peripheral is active"
|
|
bitfld.long 0x0 7. "S_DEC200_ENC,Peripheral Status-specifies the current status of the peripheral that is controlled by the MC_ME." "0: Peripheral is frozen,1: Peripheral is active"
|
|
line.long 0x4 "PS2,Peripheral Status Register 2"
|
|
bitfld.long 0x4 29. "S_SDHC,Peripheral Status-specifies the current status of the peripheral that is controlled by the MC_ME." "0: Peripheral is frozen,1: Peripheral is active"
|
|
bitfld.long 0x4 27. "S_CRC0,Peripheral Status-specifies the current status of the peripheral that is controlled by the MC_ME." "0: Peripheral is frozen,1: Peripheral is active"
|
|
newline
|
|
bitfld.long 0x4 25. "S_SPI2,Peripheral Status-specifies the current status of the peripheral that is controlled by the MC_ME." "0: Peripheral is frozen,1: Peripheral is active"
|
|
bitfld.long 0x4 23. "S_SPI0,Peripheral Status-specifies the current status of the peripheral that is controlled by the MC_ME." "0: Peripheral is frozen,1: Peripheral is active"
|
|
newline
|
|
bitfld.long 0x4 21. "S_CANFD0,Peripheral Status-specifies the current status of the peripheral that is controlled by the MC_ME." "0: Peripheral is frozen,1: Peripheral is active"
|
|
bitfld.long 0x4 19. "S_LINFLEX0,Peripheral Status-specifies the current status of the peripheral that is controlled by the MC_ME." "0: Peripheral is frozen,1: Peripheral is active"
|
|
newline
|
|
bitfld.long 0x4 17. "S_IIC0,Peripheral Status-specifies the current status of the peripheral that is controlled by the MC_ME." "0: Peripheral is frozen,1: Peripheral is active"
|
|
bitfld.long 0x4 15. "S_FlexTIMER0,Peripheral Status-specifies the current status of the peripheral that is controlled by the MC_ME." "0: Peripheral is frozen,1: Peripheral is active"
|
|
newline
|
|
bitfld.long 0x4 13. "S_SARADC0,Peripheral Status-specifies the current status of the peripheral that is controlled by the MC_ME." "0: Peripheral is frozen,1: Peripheral is active"
|
|
line.long 0x8 "PS3,Peripheral Status Register 3"
|
|
bitfld.long 0x8 24. "S_LFAST,Peripheral Status-specifies the current status of the peripheral that is controlled by the MC_ME." "0: Peripheral is frozen,1: Peripheral is active"
|
|
bitfld.long 0x8 20. "S_SIPI,Peripheral Status-specifies the current status of the peripheral that is controlled by the MC_ME." "0: Peripheral is frozen,1: Peripheral is active"
|
|
newline
|
|
bitfld.long 0x8 8. "S_HPSMI,Peripheral Status-specifies the current status of the peripheral that is controlled by the MC_ME." "0: Peripheral is frozen,1: Peripheral is active"
|
|
bitfld.long 0x8 4. "S_VIU0,Peripheral Status-specifies the current status of the peripheral that is controlled by the MC_ME." "0: Peripheral is frozen,1: Peripheral is active"
|
|
rgroup.long 0x74++0xB
|
|
line.long 0x0 "PS5,Peripheral Status Register 5"
|
|
bitfld.long 0x0 30. "S_CANFD1,Peripheral Status-specifies the current status of the peripheral that is controlled by the MC_ME." "0: Peripheral is frozen,1: Peripheral is active"
|
|
bitfld.long 0x0 28. "S_LINFLEX1,Peripheral Status-specifies the current status of the peripheral that is controlled by the MC_ME." "0: Peripheral is frozen,1: Peripheral is active"
|
|
newline
|
|
bitfld.long 0x0 26. "S_IIC2,Peripheral Status-specifies the current status of the peripheral that is controlled by the MC_ME." "0: Peripheral is frozen,1: Peripheral is active"
|
|
bitfld.long 0x0 24. "S_IIC1,Peripheral Status-specifies the current status of the peripheral that is controlled by the MC_ME." "0: Peripheral is frozen,1: Peripheral is active"
|
|
newline
|
|
bitfld.long 0x0 22. "S_FlexTIMER1,Peripheral Status-specifies the current status of the peripheral that is controlled by the MC_ME." "0: Peripheral is frozen,1: Peripheral is active"
|
|
bitfld.long 0x0 10. "S_PIT1,Peripheral Status-specifies the current status of the peripheral that is controlled by the MC_ME." "0: Peripheral is frozen,1: Peripheral is active"
|
|
newline
|
|
bitfld.long 0x0 6. "S_QUADSPI0,Peripheral Status-specifies the current status of the peripheral that is controlled by the MC_ME" "0: Peripheral is frozen,1: Peripheral is active"
|
|
bitfld.long 0x0 2. "S_MMDC1,Peripheral Status-specifies the current status of the peripheral that is controlled by the MC_ME." "0: Peripheral is frozen,1: Peripheral is active"
|
|
newline
|
|
bitfld.long 0x0 1. "S_DMACHMUX1,Peripheral Status-specifies the current status of the peripheral that is controlled by the MC_ME." "0: Peripheral is frozen,1: Peripheral is active"
|
|
bitfld.long 0x0 0. "S_CSI1,Peripheral Status-specifies the current status of the peripheral that is controlled by the MC_ME." "0: Peripheral is frozen,1: Peripheral is active"
|
|
line.long 0x4 "PS6,Peripheral Status Register 6"
|
|
bitfld.long 0x4 28. "S_H264ENC,Peripheral Status-specifies the current status of the peripheral that is controlled by the MC_ME." "0: Peripheral is frozen,1: Peripheral is active"
|
|
bitfld.long 0x4 24. "S_H264DEC,Peripheral Status-specifies the current status of the peripheral that is controlled by the MC_ME." "0: Peripheral is frozen,1: Peripheral is active"
|
|
newline
|
|
bitfld.long 0x4 20. "S_JPEGDEC,Peripheral Status-specifies the current status of the peripheral that is controlled by the MC_ME." "0: Peripheral is frozen,1: Peripheral is active"
|
|
bitfld.long 0x4 16. "S_VIU1,Peripheral Status-specifies the current status of the peripheral that is controlled by the MC_ME." "0: Peripheral is frozen,1: Peripheral is active"
|
|
newline
|
|
bitfld.long 0x4 14. "S_TSENS,Peripheral Status-specifies the current status of the peripheral that is controlled by the MC_ME." "0: Peripheral is frozen,1: Peripheral is active"
|
|
bitfld.long 0x4 12. "S_CRC1,Peripheral Status-specifies the current status of the peripheral that is controlled by the MC_ME." "0: Peripheral is frozen,1: Peripheral is active"
|
|
newline
|
|
bitfld.long 0x4 2. "S_SPI3,Peripheral Status-specifies the current status of the peripheral that is controlled by the MC_ME." "0: Peripheral is frozen,1: Peripheral is active"
|
|
bitfld.long 0x4 0. "S_SPI1,Peripheral Status-specifies the current status of the peripheral that is controlled by the MC_ME." "0: Peripheral is frozen,1: Peripheral is active"
|
|
line.long 0x8 "PS7,Peripheral Status Register 7"
|
|
bitfld.long 0x8 12. "MTR_IPS_Bridge,MTR IPS Bridge control" "0: Peripheral is frozen,1: Peripheral is active"
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x80)++0x3
|
|
line.long 0x0 "RUN_PC$1,Run Peripheral Configuration Register"
|
|
bitfld.long 0x0 7. "RUN3,Peripheral Control During RUN3" "0: Peripheral is frozen with clock gated,1: Peripheral is active"
|
|
bitfld.long 0x0 6. "RUN2,Peripheral Control During RUN2" "0: Peripheral is frozen with clock gated,1: Peripheral is active"
|
|
newline
|
|
bitfld.long 0x0 5. "RUN1,Peripheral Control During RUN1" "0: Peripheral is frozen with clock gated,1: Peripheral is active"
|
|
bitfld.long 0x0 4. "RUN0,Peripheral Control During RUN0" "0: Peripheral is frozen with clock gated,1: Peripheral is active"
|
|
newline
|
|
bitfld.long 0x0 3. "DRUN,Peripheral Control During DRUN" "0: Peripheral is frozen with clock gated,1: Peripheral is active"
|
|
rbitfld.long 0x0 0. "RESET,Peripheral Control During RESET" "0: Peripheral is frozen with clock gated,1: Peripheral is active"
|
|
repeat.end
|
|
group.byte 0xE4++0x0
|
|
line.byte 0x0 "PCTL39,DEC200 Encoder Peripheral Control Register"
|
|
bitfld.byte 0x0 0.--2. "RUN_CFG,Peripheral Configuration Select For Run Modes-associates a configuration as defined in the RUN_PC0 to 7 registers to the peripheral" "0: Selects RUN_PC0 configuration,1: Selects RUN_PC1 configuration,2: Selects RUN_PC2 configuration,3: Selects RUN_PC3 configuration,4: Selects RUN_PC4 configuration,5: Selects RUN_PC5 configuration,6: Selects RUN_PC6 configuration,7: Selects RUN_PC7 configuration"
|
|
group.byte 0xEB++0x0
|
|
line.byte 0x0 "PCTL40,2D-ACE Peripheral Control Register"
|
|
bitfld.byte 0x0 0.--2. "RUN_CFG,Peripheral Configuration Select For Run Modes-associates a configuration as defined in the RUN_PC0 to 7 registers to the peripheral" "0: Selects RUN_PC0 configuration,1: Selects RUN_PC1 configuration,2: Selects RUN_PC2 configuration,3: Selects RUN_PC3 configuration,4: Selects RUN_PC4 configuration,5: Selects RUN_PC5 configuration,6: Selects RUN_PC6 configuration,7: Selects RUN_PC7 configuration"
|
|
group.byte 0xF1++0x2
|
|
line.byte 0x0 "PCTL50,ENET Peripheral Control Register"
|
|
bitfld.byte 0x0 0.--2. "RUN_CFG,Peripheral Configuration Select For Run Modes-associates a configuration as defined in the RUN_PC0 to 7 registers to the peripheral" "0: Selects RUN_PC0 configuration,1: Selects RUN_PC1 configuration,2: Selects RUN_PC2 configuration,3: Selects RUN_PC3 configuration,4: Selects RUN_PC4 configuration,5: Selects RUN_PC5 configuration,6: Selects RUN_PC6 configuration,7: Selects RUN_PC7 configuration"
|
|
line.byte 0x1 "PCTL49,DMACHMUX0 Peripheral Control Register"
|
|
bitfld.byte 0x1 0.--2. "RUN_CFG,Peripheral Configuration Select For Run Modes-associates a configuration as defined in the RUN_PC0 to 7 registers to the peripheral" "0: Selects RUN_PC0 configuration,1: Selects RUN_PC1 configuration,2: Selects RUN_PC2 configuration,3: Selects RUN_PC3 configuration,4: Selects RUN_PC4 configuration,5: Selects RUN_PC5 configuration,6: Selects RUN_PC6 configuration,7: Selects RUN_PC7 configuration"
|
|
line.byte 0x2 "PCTL48,CSI0 Peripheral Control Register"
|
|
bitfld.byte 0x2 0.--2. "RUN_CFG,Peripheral Configuration Select For Run Modes-associates a configuration as defined in the RUN_PC0 to 7 registers to the peripheral" "0: Selects RUN_PC0 configuration,1: Selects RUN_PC1 configuration,2: Selects RUN_PC2 configuration,3: Selects RUN_PC3 configuration,4: Selects RUN_PC4 configuration,5: Selects RUN_PC5 configuration,6: Selects RUN_PC6 configuration,7: Selects RUN_PC7 configuration"
|
|
group.byte 0xF5++0x0
|
|
line.byte 0x0 "PCTL54,MMDC0 Peripheral Control Register"
|
|
bitfld.byte 0x0 0.--2. "RUN_CFG,Peripheral Configuration Select For Run Modes-associates a configuration as defined in the RUN_PC0 to 7 registers to the peripheral" "0: Selects RUN_PC0 configuration,1: Selects RUN_PC1 configuration,2: Selects RUN_PC2 configuration,3: Selects RUN_PC3 configuration,4: Selects RUN_PC4 configuration,5: Selects RUN_PC5 configuration,6: Selects RUN_PC6 configuration,7: Selects RUN_PC7 configuration"
|
|
group.byte 0xF7++0x0
|
|
line.byte 0x0 "PCTL52,FlexRay Peripheral Control Register"
|
|
bitfld.byte 0x0 0.--2. "RUN_CFG,Peripheral Configuration Select For Run Modes-associates a configuration as defined in the RUN_PC0 to 7 registers to the peripheral" "0: Selects RUN_PC0 configuration,1: Selects RUN_PC1 configuration,2: Selects RUN_PC2 configuration,3: Selects RUN_PC3 configuration,4: Selects RUN_PC4 configuration,5: Selects RUN_PC5 configuration,6: Selects RUN_PC6 configuration,7: Selects RUN_PC7 configuration"
|
|
group.byte 0xF9++0x0
|
|
line.byte 0x0 "PCTL58,PIT0 Peripheral Control Register"
|
|
bitfld.byte 0x0 0.--2. "RUN_CFG,Peripheral Configuration Select For Run Modes-associates a configuration as defined in the RUN_PC0 to 7 registers to the peripheral" "0: Selects RUN_PC0 configuration,1: Selects RUN_PC1 configuration,2: Selects RUN_PC2 configuration,3: Selects RUN_PC3 configuration,4: Selects RUN_PC4 configuration,5: Selects RUN_PC5 configuration,6: Selects RUN_PC6 configuration,7: Selects RUN_PC7 configuration"
|
|
group.byte 0x10C++0x0
|
|
line.byte 0x0 "PCTL79,FlexTIMER0 Peripheral Control Register"
|
|
bitfld.byte 0x0 0.--2. "RUN_CFG,Peripheral Configuration Select For Run Modes-associates a configuration as defined in the RUN_PC0 to 7 registers to the peripheral" "0: Selects RUN_PC0 configuration,1: Selects RUN_PC1 configuration,2: Selects RUN_PC2 configuration,3: Selects RUN_PC3 configuration,4: Selects RUN_PC4 configuration,5: Selects RUN_PC5 configuration,6: Selects RUN_PC6 configuration,7: Selects RUN_PC7 configuration"
|
|
group.byte 0x10E++0x0
|
|
line.byte 0x0 "PCTL77,SARADC0 Peripheral Control Register"
|
|
bitfld.byte 0x0 0.--2. "RUN_CFG,Peripheral Configuration Select For Run Modes-associates a configuration as defined in the RUN_PC0 to 7 registers to the peripheral" "0: Selects RUN_PC0 configuration,1: Selects RUN_PC1 configuration,2: Selects RUN_PC2 configuration,3: Selects RUN_PC3 configuration,4: Selects RUN_PC4 configuration,5: Selects RUN_PC5 configuration,6: Selects RUN_PC6 configuration,7: Selects RUN_PC7 configuration"
|
|
group.byte 0x110++0x0
|
|
line.byte 0x0 "PCTL83,LINFLEX0 Peripheral Control Register"
|
|
bitfld.byte 0x0 0.--2. "RUN_CFG,Peripheral Configuration Select For Run Modes-associates a configuration as defined in the RUN_PC0 to 7 registers to the peripheral" "0: Selects RUN_PC0 configuration,1: Selects RUN_PC1 configuration,2: Selects RUN_PC2 configuration,3: Selects RUN_PC3 configuration,4: Selects RUN_PC4 configuration,5: Selects RUN_PC5 configuration,6: Selects RUN_PC6 configuration,7: Selects RUN_PC7 configuration"
|
|
group.byte 0x112++0x0
|
|
line.byte 0x0 "PCTL81,IIC0 Peripheral Control Register"
|
|
bitfld.byte 0x0 0.--2. "RUN_CFG,Peripheral Configuration Select For Run Modes-associates a configuration as defined in the RUN_PC0 to 7 registers to the peripheral" "0: Selects RUN_PC0 configuration,1: Selects RUN_PC1 configuration,2: Selects RUN_PC2 configuration,3: Selects RUN_PC3 configuration,4: Selects RUN_PC4 configuration,5: Selects RUN_PC5 configuration,6: Selects RUN_PC6 configuration,7: Selects RUN_PC7 configuration"
|
|
group.byte 0x114++0x0
|
|
line.byte 0x0 "PCTL87,SPI0 Peripheral Control Register"
|
|
bitfld.byte 0x0 0.--2. "RUN_CFG,Peripheral Configuration Select For Run Modes-associates a configuration as defined in the RUN_PC0 to 7 registers to the peripheral" "0: Selects RUN_PC0 configuration,1: Selects RUN_PC1 configuration,2: Selects RUN_PC2 configuration,3: Selects RUN_PC3 configuration,4: Selects RUN_PC4 configuration,5: Selects RUN_PC5 configuration,6: Selects RUN_PC6 configuration,7: Selects RUN_PC7 configuration"
|
|
group.byte 0x116++0x0
|
|
line.byte 0x0 "PCTL85,CANFD0 Peripheral Control Register"
|
|
bitfld.byte 0x0 0.--2. "RUN_CFG,Peripheral Configuration Select For Run Modes-associates a configuration as defined in the RUN_PC0 to 7 registers to the peripheral" "0: Selects RUN_PC0 configuration,1: Selects RUN_PC1 configuration,2: Selects RUN_PC2 configuration,3: Selects RUN_PC3 configuration,4: Selects RUN_PC4 configuration,5: Selects RUN_PC5 configuration,6: Selects RUN_PC6 configuration,7: Selects RUN_PC7 configuration"
|
|
group.byte 0x118++0x0
|
|
line.byte 0x0 "PCTL91,CRC0 Peripheral Control Register"
|
|
bitfld.byte 0x0 0.--2. "RUN_CFG,Peripheral Configuration Select For Run Modes-associates a configuration as defined in the RUN_PC0 to 7 registers to the peripheral" "0: Selects RUN_PC0 configuration,1: Selects RUN_PC1 configuration,2: Selects RUN_PC2 configuration,3: Selects RUN_PC3 configuration,4: Selects RUN_PC4 configuration,5: Selects RUN_PC5 configuration,6: Selects RUN_PC6 configuration,7: Selects RUN_PC7 configuration"
|
|
group.byte 0x11A++0x0
|
|
line.byte 0x0 "PCTL89,SPI2 Peripheral Control Register"
|
|
bitfld.byte 0x0 0.--2. "RUN_CFG,Peripheral Configuration Select For Run Modes-associates a configuration as defined in the RUN_PC0 to 7 registers to the peripheral" "0: Selects RUN_PC0 configuration,1: Selects RUN_PC1 configuration,2: Selects RUN_PC2 configuration,3: Selects RUN_PC3 configuration,4: Selects RUN_PC4 configuration,5: Selects RUN_PC5 configuration,6: Selects RUN_PC6 configuration,7: Selects RUN_PC7 configuration"
|
|
group.byte 0x11E++0x0
|
|
line.byte 0x0 "PCTL93,SDHC Peripheral Control Register"
|
|
bitfld.byte 0x0 0.--2. "RUN_CFG,Peripheral Configuration Select For Run Modes-associates a configuration as defined in the RUN_PC0 to 7 registers to the peripheral" "0: Selects RUN_PC0 configuration,1: Selects RUN_PC1 configuration,2: Selects RUN_PC2 configuration,3: Selects RUN_PC3 configuration,4: Selects RUN_PC4 configuration,5: Selects RUN_PC5 configuration,6: Selects RUN_PC6 configuration,7: Selects RUN_PC7 configuration"
|
|
group.byte 0x127++0x0
|
|
line.byte 0x0 "PCTL100,VIU0 Peripheral Control Register"
|
|
bitfld.byte 0x0 0.--2. "RUN_CFG,Peripheral Configuration Select For Run Modes-associates a configuration as defined in the RUN_PC0 to 7 registers to the peripheral" "0: Selects RUN_PC0 configuration,1: Selects RUN_PC1 configuration,2: Selects RUN_PC2 configuration,3: Selects RUN_PC3 configuration,4: Selects RUN_PC4 configuration,5: Selects RUN_PC5 configuration,6: Selects RUN_PC6 configuration,7: Selects RUN_PC7 configuration"
|
|
group.byte 0x12B++0x0
|
|
line.byte 0x0 "PCTL104,HPSMI Peripheral Control Register"
|
|
bitfld.byte 0x0 0.--2. "RUN_CFG,Peripheral Configuration Select For Run Modes-associates a configuration as defined in the RUN_PC0 to 7 registers to the peripheral" "0: Selects RUN_PC0 configuration,1: Selects RUN_PC1 configuration,2: Selects RUN_PC2 configuration,3: Selects RUN_PC3 configuration,4: Selects RUN_PC4 configuration,5: Selects RUN_PC5 configuration,6: Selects RUN_PC6 configuration,7: Selects RUN_PC7 configuration"
|
|
group.byte 0x137++0x0
|
|
line.byte 0x0 "PCTL116,SIPI Peripheral Control Register"
|
|
bitfld.byte 0x0 0.--2. "RUN_CFG,Peripheral Configuration Select For Run Modes-associates a configuration as defined in the RUN_PC0 to 7 registers to the peripheral" "0: Selects RUN_PC0 configuration,1: Selects RUN_PC1 configuration,2: Selects RUN_PC2 configuration,3: Selects RUN_PC3 configuration,4: Selects RUN_PC4 configuration,5: Selects RUN_PC5 configuration,6: Selects RUN_PC6 configuration,7: Selects RUN_PC7 configuration"
|
|
group.byte 0x13B++0x0
|
|
line.byte 0x0 "PCTL120,LFAST Peripheral Control Register"
|
|
bitfld.byte 0x0 0.--2. "RUN_CFG,Peripheral Configuration Select For Run Modes-associates a configuration as defined in the RUN_PC0 to 7 registers to the peripheral" "0: Selects RUN_PC0 configuration,1: Selects RUN_PC1 configuration,2: Selects RUN_PC2 configuration,3: Selects RUN_PC3 configuration,4: Selects RUN_PC4 configuration,5: Selects RUN_PC5 configuration,6: Selects RUN_PC6 configuration,7: Selects RUN_PC7 configuration"
|
|
group.byte 0x161++0x2
|
|
line.byte 0x0 "PCTL162,MMDC1 Peripheral Control Register"
|
|
bitfld.byte 0x0 0.--2. "RUN_CFG,Peripheral Configuration Select For Run Modes-associates a configuration as defined in the RUN_PC0 to 7 registers to the peripheral" "0: Selects RUN_PC0 configuration,1: Selects RUN_PC1 configuration,2: Selects RUN_PC2 configuration,3: Selects RUN_PC3 configuration,4: Selects RUN_PC4 configuration,5: Selects RUN_PC5 configuration,6: Selects RUN_PC6 configuration,7: Selects RUN_PC7 configuration"
|
|
line.byte 0x1 "PCTL161,DMACHMUX1 Peripheral Control Register"
|
|
bitfld.byte 0x1 0.--2. "RUN_CFG,Peripheral Configuration Select For Run Modes-associates a configuration as defined in the RUN_PC0 to 7 registers to the peripheral" "0: Selects RUN_PC0 configuration,1: Selects RUN_PC1 configuration,2: Selects RUN_PC2 configuration,3: Selects RUN_PC3 configuration,4: Selects RUN_PC4 configuration,5: Selects RUN_PC5 configuration,6: Selects RUN_PC6 configuration,7: Selects RUN_PC7 configuration"
|
|
line.byte 0x2 "PCTL160,CSI1 Peripheral Control Register"
|
|
bitfld.byte 0x2 0.--2. "RUN_CFG,Peripheral Configuration Select For Run Modes-associates a configuration as defined in the RUN_PC0 to 7 registers to the peripheral" "0: Selects RUN_PC0 configuration,1: Selects RUN_PC1 configuration,2: Selects RUN_PC2 configuration,3: Selects RUN_PC3 configuration,4: Selects RUN_PC4 configuration,5: Selects RUN_PC5 configuration,6: Selects RUN_PC6 configuration,7: Selects RUN_PC7 configuration"
|
|
group.byte 0x165++0x0
|
|
line.byte 0x0 "PCTL166,QUADSPI0 Peripheral Control Register"
|
|
bitfld.byte 0x0 0.--2. "RUN_CFG,Peripheral Configuration Select For Run Modes-associates a configuration as defined in the RUN_PC0 to 7 registers to the peripheral" "0: Selects RUN_PC0 configuration,1: Selects RUN_PC1 configuration,2: Selects RUN_PC2 configuration,3: Selects RUN_PC3 configuration,4: Selects RUN_PC4 configuration,5: Selects RUN_PC5 configuration,6: Selects RUN_PC6 configuration,7: Selects RUN_PC7 configuration"
|
|
group.byte 0x169++0x0
|
|
line.byte 0x0 "PCTL170,PIT1 Peripheral Control Register"
|
|
bitfld.byte 0x0 0.--2. "RUN_CFG,Peripheral Configuration Select For Run Modes-associates a configuration as defined in the RUN_PC0 to 7 registers to the peripheral" "0: Selects RUN_PC0 configuration,1: Selects RUN_PC1 configuration,2: Selects RUN_PC2 configuration,3: Selects RUN_PC3 configuration,4: Selects RUN_PC4 configuration,5: Selects RUN_PC5 configuration,6: Selects RUN_PC6 configuration,7: Selects RUN_PC7 configuration"
|
|
group.byte 0x175++0x0
|
|
line.byte 0x0 "PCTL182,FlexTIMER1 Peripheral Control Register"
|
|
bitfld.byte 0x0 0.--2. "RUN_CFG,Peripheral Configuration Select For Run Modes-associates a configuration as defined in the RUN_PC0 to 7 registers to the peripheral" "0: Selects RUN_PC0 configuration,1: Selects RUN_PC1 configuration,2: Selects RUN_PC2 configuration,3: Selects RUN_PC3 configuration,4: Selects RUN_PC4 configuration,5: Selects RUN_PC5 configuration,6: Selects RUN_PC6 configuration,7: Selects RUN_PC7 configuration"
|
|
group.byte 0x179++0x0
|
|
line.byte 0x0 "PCTL186,IIC2 Peripheral Control Register"
|
|
bitfld.byte 0x0 0.--2. "RUN_CFG,Peripheral Configuration Select For Run Modes-associates a configuration as defined in the RUN_PC0 to 7 registers to the peripheral" "0: Selects RUN_PC0 configuration,1: Selects RUN_PC1 configuration,2: Selects RUN_PC2 configuration,3: Selects RUN_PC3 configuration,4: Selects RUN_PC4 configuration,5: Selects RUN_PC5 configuration,6: Selects RUN_PC6 configuration,7: Selects RUN_PC7 configuration"
|
|
group.byte 0x17B++0x0
|
|
line.byte 0x0 "PCTL184,IIC1 Peripheral Control Register"
|
|
bitfld.byte 0x0 0.--2. "RUN_CFG,Peripheral Configuration Select For Run Modes-associates a configuration as defined in the RUN_PC0 to 7 registers to the peripheral" "0: Selects RUN_PC0 configuration,1: Selects RUN_PC1 configuration,2: Selects RUN_PC2 configuration,3: Selects RUN_PC3 configuration,4: Selects RUN_PC4 configuration,5: Selects RUN_PC5 configuration,6: Selects RUN_PC6 configuration,7: Selects RUN_PC7 configuration"
|
|
group.byte 0x17D++0x0
|
|
line.byte 0x0 "PCTL190,CANFD1 Peripheral Control Register"
|
|
bitfld.byte 0x0 0.--2. "RUN_CFG,Peripheral Configuration Select For Run Modes-associates a configuration as defined in the RUN_PC0 to 7 registers to the peripheral" "0: Selects RUN_PC0 configuration,1: Selects RUN_PC1 configuration,2: Selects RUN_PC2 configuration,3: Selects RUN_PC3 configuration,4: Selects RUN_PC4 configuration,5: Selects RUN_PC5 configuration,6: Selects RUN_PC6 configuration,7: Selects RUN_PC7 configuration"
|
|
group.byte 0x17F++0x0
|
|
line.byte 0x0 "PCTL188,LINFLEX1 Peripheral Control Register"
|
|
bitfld.byte 0x0 0.--2. "RUN_CFG,Peripheral Configuration Select For Run Modes-associates a configuration as defined in the RUN_PC0 to 7 registers to the peripheral" "0: Selects RUN_PC0 configuration,1: Selects RUN_PC1 configuration,2: Selects RUN_PC2 configuration,3: Selects RUN_PC3 configuration,4: Selects RUN_PC4 configuration,5: Selects RUN_PC5 configuration,6: Selects RUN_PC6 configuration,7: Selects RUN_PC7 configuration"
|
|
group.byte 0x181++0x0
|
|
line.byte 0x0 "PCTL194,SPI3 Peripheral Control Register"
|
|
bitfld.byte 0x0 0.--2. "RUN_CFG,Peripheral Configuration Select For Run Modes-associates a configuration as defined in the RUN_PC0 to 7 registers to the peripheral" "0: Selects RUN_PC0 configuration,1: Selects RUN_PC1 configuration,2: Selects RUN_PC2 configuration,3: Selects RUN_PC3 configuration,4: Selects RUN_PC4 configuration,5: Selects RUN_PC5 configuration,6: Selects RUN_PC6 configuration,7: Selects RUN_PC7 configuration"
|
|
group.byte 0x183++0x0
|
|
line.byte 0x0 "PCTL192,SPI1 Peripheral Control Register"
|
|
bitfld.byte 0x0 0.--2. "RUN_CFG,Peripheral Configuration Select For Run Modes-associates a configuration as defined in the RUN_PC0 to 7 registers to the peripheral" "0: Selects RUN_PC0 configuration,1: Selects RUN_PC1 configuration,2: Selects RUN_PC2 configuration,3: Selects RUN_PC3 configuration,4: Selects RUN_PC4 configuration,5: Selects RUN_PC5 configuration,6: Selects RUN_PC6 configuration,7: Selects RUN_PC7 configuration"
|
|
group.byte 0x18D++0x0
|
|
line.byte 0x0 "PCTL206,TSENS Peripheral Control Register"
|
|
bitfld.byte 0x0 0.--2. "RUN_CFG,Peripheral Configuration Select For Run Modes-associates a configuration as defined in the RUN_PC0 to 7 registers to the peripheral" "0: Selects RUN_PC0 configuration,1: Selects RUN_PC1 configuration,2: Selects RUN_PC2 configuration,3: Selects RUN_PC3 configuration,4: Selects RUN_PC4 configuration,5: Selects RUN_PC5 configuration,6: Selects RUN_PC6 configuration,7: Selects RUN_PC7 configuration"
|
|
group.byte 0x18F++0x0
|
|
line.byte 0x0 "PCTL204,CRC1 Peripheral Control Register"
|
|
bitfld.byte 0x0 0.--2. "RUN_CFG,Peripheral Configuration Select For Run Modes-associates a configuration as defined in the RUN_PC0 to 7 registers to the peripheral" "0: Selects RUN_PC0 configuration,1: Selects RUN_PC1 configuration,2: Selects RUN_PC2 configuration,3: Selects RUN_PC3 configuration,4: Selects RUN_PC4 configuration,5: Selects RUN_PC5 configuration,6: Selects RUN_PC6 configuration,7: Selects RUN_PC7 configuration"
|
|
group.byte 0x193++0x0
|
|
line.byte 0x0 "PCTL208,VIU1 Peripheral Control Register"
|
|
bitfld.byte 0x0 0.--2. "RUN_CFG,Peripheral Configuration Select For Run Modes-associates a configuration as defined in the RUN_PC0 to 7 registers to the peripheral" "0: Selects RUN_PC0 configuration,1: Selects RUN_PC1 configuration,2: Selects RUN_PC2 configuration,3: Selects RUN_PC3 configuration,4: Selects RUN_PC4 configuration,5: Selects RUN_PC5 configuration,6: Selects RUN_PC6 configuration,7: Selects RUN_PC7 configuration"
|
|
group.byte 0x197++0x0
|
|
line.byte 0x0 "PCTL212,JPEG Peripheral Control Register"
|
|
bitfld.byte 0x0 0.--2. "RUN_CFG,Peripheral Configuration Select For Run Modes-associates a configuration as defined in the RUN_PC0 to 7 registers to the peripheral" "0: Selects RUN_PC0 configuration,1: Selects RUN_PC1 configuration,2: Selects RUN_PC2 configuration,3: Selects RUN_PC3 configuration,4: Selects RUN_PC4 configuration,5: Selects RUN_PC5 configuration,6: Selects RUN_PC6 configuration,7: Selects RUN_PC7 configuration"
|
|
group.byte 0x19B++0x0
|
|
line.byte 0x0 "PCTL216,H264_DEC Peripheral Control Register"
|
|
bitfld.byte 0x0 0.--2. "RUN_CFG,Peripheral Configuration Select For Run Modes-associates a configuration as defined in the RUN_PC0 to 7 registers to the peripheral" "0: Selects RUN_PC0 configuration,1: Selects RUN_PC1 configuration,2: Selects RUN_PC2 configuration,3: Selects RUN_PC3 configuration,4: Selects RUN_PC4 configuration,5: Selects RUN_PC5 configuration,6: Selects RUN_PC6 configuration,7: Selects RUN_PC7 configuration"
|
|
group.byte 0x19F++0x0
|
|
line.byte 0x0 "PCTL220,H264_ENC Peripheral Control Register"
|
|
bitfld.byte 0x0 0.--2. "RUN_CFG,Peripheral Configuration Select For Run Modes-associates a configuration as defined in the RUN_PC0 to 7 registers to the peripheral" "0: Selects RUN_PC0 configuration,1: Selects RUN_PC1 configuration,2: Selects RUN_PC2 configuration,3: Selects RUN_PC3 configuration,4: Selects RUN_PC4 configuration,5: Selects RUN_PC5 configuration,6: Selects RUN_PC6 configuration,7: Selects RUN_PC7 configuration"
|
|
group.byte 0x1AF++0x0
|
|
line.byte 0x0 "PCTL236,MBIST Peripheral Control Register"
|
|
bitfld.byte 0x0 0.--2. "RUN_CFG,Peripheral Configuration Select For Run Modes-associates a configuration as defined in the RUN_PC0 to 7 registers to the peripheral" "0: Selects RUN_PC0 configuration,1: Selects RUN_PC1 configuration,2: Selects RUN_PC2 configuration,3: Selects RUN_PC3 configuration,4: Selects RUN_PC4 configuration,5: Selects RUN_PC5 configuration,6: Selects RUN_PC6 configuration,7: Selects RUN_PC7 configuration"
|
|
rgroup.long 0x1C0++0x3
|
|
line.long 0x0 "CS,Core Status Register"
|
|
bitfld.long 0x0 4. "S_CA53_CORE3,Core Status-specifies the current status of the core which is controlled by the MC_ME ." "0: Core is inactive,1: Core is running"
|
|
bitfld.long 0x0 3. "S_CA53_CORE2,Core Status-specifies the current status of the core which is controlled by the MC_ME ." "0: Core is inactive,1: Core is running"
|
|
newline
|
|
bitfld.long 0x0 2. "S_CA53_CORE1,Core Status-specifies the current status of the core which is controlled by the MC_ME ." "0: Core is inactive,1: Core is running"
|
|
bitfld.long 0x0 1. "S_CA53_CORE0,Core Status-specifies the current status of the core which is controlled by the MC_ME ." "0: Core is inactive,1: Core is running"
|
|
newline
|
|
bitfld.long 0x0 0. "S_CM4,Core Status-specifies the current status of the core which is controlled by the MC_ME ." "0: Core is inactive,1: Core is running"
|
|
group.word 0x1C4++0x7
|
|
line.word 0x0 "CCTL1,Cortex-A53_CORE0 Control Register"
|
|
bitfld.word 0x0 7. "RUN3,Core Control During RUN3" "?,1: Deassert Cortex-A53-CORE0 reset."
|
|
bitfld.word 0x0 6. "RUN2,Core Control During RUN2" "?,1: Deassert Cortex-A53-CORE0 reset."
|
|
newline
|
|
bitfld.word 0x0 5. "RUN1,Core Control During RUN1" "?,1: Deassert Cortex-A53-CORE0 reset."
|
|
bitfld.word 0x0 4. "RUN0,Core Control During RUN0" "?,1: Deassert Cortex-A53-CORE0 reset."
|
|
newline
|
|
bitfld.word 0x0 3. "DRUN,Core Control During DRUN" "?,1: Deassert Cortex-A53-CORE0 reset."
|
|
rbitfld.word 0x0 0. "RESET,Core Control During RESET-the core is always disabled during RESET." "0,1"
|
|
line.word 0x2 "CCTL0,Cortex-M4 Core Control Register"
|
|
bitfld.word 0x2 7. "RUN3,Core Control During RUN3" "0: Cortex-M4 is inactive,1: Cortex-M4 is active"
|
|
bitfld.word 0x2 6. "RUN2,Core Control During RUN2" "0: Cortex-M4 is inactive,1: Cortex-M4 is active"
|
|
newline
|
|
bitfld.word 0x2 5. "RUN1,Core Control During RUN1" "0: Cortex-M4 is inactive,1: Cortex-M4 is active"
|
|
bitfld.word 0x2 4. "RUN0,Core Control During RUN0" "0: Cortex-M4 is inactive,1: Cortex-M4 is active"
|
|
newline
|
|
bitfld.word 0x2 3. "DRUN,Core Control During DRUN" "0: Cortex-M4 is inactive,1: Cortex-M4 is active"
|
|
rbitfld.word 0x2 0. "RESET,Core Control During RESET-the core is always disabled during RESET." "0,1"
|
|
line.word 0x4 "CCTL3,Cortex-A53_CORE2 Control Register"
|
|
bitfld.word 0x4 7. "RUN3,Core Control During RUN3" "?,1: Deassert Cortex-A53-CORE2 reset"
|
|
bitfld.word 0x4 6. "RUN2,Core Control During RUN2" "?,1: Deassert Cortex-A53-CORE2 reset"
|
|
newline
|
|
bitfld.word 0x4 5. "RUN1,Core Control During RUN1" "?,1: Deassert Cortex-A53-CORE2 reset"
|
|
bitfld.word 0x4 4. "RUN0,Core Control During RUN0" "?,1: Deassert Cortex-A53-CORE2 reset"
|
|
newline
|
|
bitfld.word 0x4 3. "DRUN,Core Control During DRUN" "?,1: Deassert Cortex-A53-CORE2 reset"
|
|
rbitfld.word 0x4 0. "RESET,Core Control During RESET-the core is always disabled during RESET." "0,1"
|
|
line.word 0x6 "CCTL2,Cortex-A53_CORE1 Control Register"
|
|
bitfld.word 0x6 7. "RUN3,Core Control During RUN3" "?,1: Deassert Cortex-A53-CORE1 reset."
|
|
bitfld.word 0x6 6. "RUN2,Core Control During RUN2" "?,1: Deassert Cortex-A53-CORE1 reset."
|
|
newline
|
|
bitfld.word 0x6 5. "RUN1,Core Control During RUN1" "?,1: Deassert Cortex-A53-CORE1 reset."
|
|
bitfld.word 0x6 4. "RUN0,Core Control During RUN0" "?,1: Deassert Cortex-A53-CORE1 reset."
|
|
newline
|
|
bitfld.word 0x6 3. "DRUN,Core Control During DRUN" "?,1: Deassert Cortex-A53-CORE1 reset."
|
|
rbitfld.word 0x6 0. "RESET,Core Control During RESET-the core is always disabled during RESET." "0,1"
|
|
group.word 0x1CE++0x1
|
|
line.word 0x0 "CCTL4,Cortex-A53_CORE3 Control Register"
|
|
bitfld.word 0x0 7. "RUN3,Core Control During RUN3" "?,1: Deassert Cortex-A53-CORE3 reset"
|
|
bitfld.word 0x0 6. "RUN2,Core Control During RUN2" "?,1: Deassert Cortex-A53-CORE3 reset"
|
|
newline
|
|
bitfld.word 0x0 5. "RUN1,Core Control During RUN1" "?,1: Deassert Cortex-A53-CORE3 reset"
|
|
bitfld.word 0x0 4. "RUN0,Core Control During RUN0" "?,1: Deassert Cortex-A53-CORE3 reset"
|
|
newline
|
|
bitfld.word 0x0 3. "DRUN,Core Control During DRUN" "?,1: Deassert Cortex-A53-CORE3 reset"
|
|
rbitfld.word 0x0 0. "RESET,Core Control During RESET-the core is always disabled during RESET." "0,1"
|
|
group.long 0x1E0++0x13
|
|
line.long 0x0 "CADDR0,Cortex-M4 Core Address Register"
|
|
hexmask.long 0x0 2.--31. 1. "ADDR,Core Address-used by Cortex-M4 CORE as the boot address (32-bit word aligned) when Cortex-M4 CORE next exits reset"
|
|
bitfld.long 0x0 0. "RMC,Reset On Mode Change - The core will be reset on the next mode change" "0: CORE Cortex-M4 will not be reset on the next..,1: CORE Cortex-M4 will be reset on the next mode.."
|
|
line.long 0x4 "CADDR1,Cortex-A53_CORE0 Core Address Register"
|
|
hexmask.long 0x4 2.--31. 1. "ADDR,Core Address-used by Cortex-A53_CORE0 as the boot address (32-bit word aligned) when Cortex-A53_CORE0 next exits reset"
|
|
bitfld.long 0x4 0. "ADDR_EN,Address enable bit When the address is properly configured." "0: Write to ADDR bits are not enabled.,1: Write to ADDR bits is enabled."
|
|
line.long 0x8 "CADDR2,Cortex-A53_CORE1 Core Address Register"
|
|
hexmask.long 0x8 2.--31. 1. "ADDR,Core Address-used by Cortex-A53_CORE1 as the boot address (32-bit word aligned) when Cortex-A53_CORE1 next exits reset"
|
|
bitfld.long 0x8 0. "ADDR_EN,Address enable bit -When the address is properly configured." "0: Write to ADDR bits are not enabled,1: Write to ADDR bits is enabled."
|
|
line.long 0xC "CADDR3,Cortex-A53_CORE2 Core Address Register"
|
|
hexmask.long 0xC 2.--31. 1. "ADDR,Core Address-used by Cortex-A53_CORE2 as the boot address (32-bit word aligned) when Cortex-A53_CORE2 next exits reset"
|
|
bitfld.long 0xC 0. "ADDR_EN,Address enable bit -When the address is properly configured." "0: Writing to ADDR bits are not enabled,1: Write to ADDR bits is enabled."
|
|
line.long 0x10 "CADDR4,Cortex-A53_CORE3 Core Address Register"
|
|
hexmask.long 0x10 2.--31. 1. "ADDR,Core Address-used by Cortex-A53_CORE3 as the boot address (32-bit word aligned) when Cortex-A53_CORE3 next exits reset"
|
|
bitfld.long 0x10 0. "ADDR_EN,Address enable bit-When the address is properly configured." "0: Write to ADDR bits are not enabled,1: Write to ADDR bits is enabled"
|
|
group.long 0x260++0x3
|
|
line.long 0x0 "DRUN_SEC_CC_I,DRUN Secondary Clock Configuration Register"
|
|
bitfld.long 0x0 28.--30. "PWRLVL3,Power level indicates the relative power consumption level of this mode with respect to that of other modes for CGM 3(CGM 0 is default CGM)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 24.--26. "PWRLVL2,Power level indicates the relative power consumption level of this mode with respect to that of other modes for CGM 2(CGM 0 is default CGM)" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 20.--22. "PWRLVL1,Power level indicates the relative power consumption level of this mode with respect to that of other modes for CGM 1(CGM 0 is default CGM)" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x0 12.--15. 1. "SYSCLK3,System clock switch control - Specifies the system clock to be used by MC_CGM_3"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "SYSCLK2,System clock switch control - Specifies the system clock to be used by MC_CGM_2"
|
|
hexmask.long.byte 0x0 4.--7. 1. "SYSCLK1,System clock switch control - Specifies the system clock to be used by MC_CGM_1"
|
|
group.long 0x270++0x3
|
|
line.long 0x0 "RUN0_SEC_CC_I,RUN0 Secondary Clock Configuration Register"
|
|
bitfld.long 0x0 28.--30. "PWRLVL3,Power level indicates the relative power consumption level of this mode with respect to that of other modes for CGM 3(CGM 0 is default CGM)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 24.--26. "PWRLVL2,Power level indicates the relative power consumption level of this mode with respect to that of other modes for CGM 2(CGM 0 is default CGM)" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 20.--22. "PWRLVL1,Power level indicates the relative power consumption level of this mode with respect to that of other modes for CGM 1(CGM 0 is default CGM)" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x0 12.--15. 1. "SYSCLK3,System clock switch control - Specifies the system clock to be used by MC_CGM_3"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "SYSCLK2,System clock switch control - Specifies the system clock to be used by MC_CGM_2"
|
|
hexmask.long.byte 0x0 4.--7. 1. "SYSCLK1,System clock switch control - Specifies the system clock to be used by MC_CGM_1"
|
|
group.long 0x280++0x3
|
|
line.long 0x0 "RUN1_SEC_CC_I,RUN1 Secondary Clock Configuration Register"
|
|
bitfld.long 0x0 28.--30. "PWRLVL3,Power level indicates the relative power consumption level of this mode with respect to that of other modes for CGM 3(CGM 0 is default CGM)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 24.--26. "PWRLVL2,Power level indicates the relative power consumption level of this mode with respect to that of other modes for CGM 2(CGM 0 is default CGM)" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 20.--22. "PWRLVL1,Power level indicates the relative power consumption level of this mode with respect to that of other modes for CGM 1(CGM 0 is default CGM)" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x0 12.--15. 1. "SYSCLK3,System clock switch control - Specifies the system clock to be used by MC_CGM_3"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "SYSCLK2,System clock switch control - Specifies the system clock to be used by MC_CGM_2"
|
|
hexmask.long.byte 0x0 4.--7. 1. "SYSCLK1,System clock switch control - Specifies the system clock to be used by MC_CGM_1"
|
|
group.long 0x290++0x3
|
|
line.long 0x0 "RUN2_SEC_CC_I,RUN2 Secondary Clock Configuration Register"
|
|
bitfld.long 0x0 28.--30. "PWRLVL3,Power level indicates the relative power consumption level of this mode with respect to that of other modes for CGM 3(CGM 0 is default CGM)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 24.--26. "PWRLVL2,Power level indicates the relative power consumption level of this mode with respect to that of other modes for CGM 2(CGM 0 is default CGM)" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 20.--22. "PWRLVL1,Power level indicates the relative power consumption level of this mode with respect to that of other modes for CGM 1(CGM 0 is default CGM)" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x0 12.--15. 1. "SYSCLK3,System clock switch control - Specifies the system clock to be used by MC_CGM_3"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "SYSCLK2,System clock switch control - Specifies the system clock to be used by MC_CGM_2"
|
|
hexmask.long.byte 0x0 4.--7. 1. "SYSCLK1,System clock switch control - Specifies the system clock to be used by MC_CGM_1"
|
|
group.long 0x2A0++0x3
|
|
line.long 0x0 "RUN3_SEC_CC_I,RUN3 Secondary Clock Configuration Register"
|
|
bitfld.long 0x0 28.--30. "PWRLVL3,Power level indicates the relative power consumption level of this mode with respect to that of other modes for CGM 3(CGM 0 is default CGM)" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 24.--26. "PWRLVL2,Power level indicates the relative power consumption level of this mode with respect to that of other modes for CGM 2(CGM 0 is default CGM)" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 20.--22. "PWRLVL1,Power level indicates the relative power consumption level of this mode with respect to that of other modes for CGM 1(CGM 0 is default CGM)" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x0 12.--15. 1. "SYSCLK3,System clock switch control - Specifies the system clock to be used by MC_CGM_3"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "SYSCLK2,System clock switch control - Specifies the system clock to be used by MC_CGM_2"
|
|
hexmask.long.byte 0x0 4.--7. 1. "SYSCLK1,System clock switch control - Specifies the system clock to be used by MC_CGM_1"
|
|
rgroup.long 0x2D0++0x3
|
|
line.long 0x0 "SEC_CS,Secondary Clock Status Register"
|
|
hexmask.long.byte 0x0 12.--15. 1. "S_SYSCLK3,System Clock Switch Status specifies the system clock currently used by MC_CGM_3."
|
|
hexmask.long.byte 0x0 8.--11. 1. "S_SYSCLK2,System Clock Switch Status specifies the system clock currently used by MC_CGM_2"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--7. 1. "S_SYSCLK1,System Clock Switch Status specifies the system clock currently used by MC_CGM_1"
|
|
tree.end
|
|
tree "MC_RGM (Reset Generation Module)"
|
|
base ad:0x40048000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "DES,'Destructive' Event Status Register"
|
|
bitfld.long 0x0 30. "F_HVD_18,HVD of VDD_HV_PMC supply" "0: No HVD of VDD_HV_PMC supply event has occurred..,1: HVD of VDD_HV_PMC supply event has occurred"
|
|
bitfld.long 0x0 29. "F_LVD_33_PMC,LVD of VDD_GPIO0 supply" "0: No LVD of VDD_GPIO0 supply event has occurred..,1: LVD of VDD_GPIO0 supply event has occurred"
|
|
newline
|
|
bitfld.long 0x0 28. "F_LVD_CORE,LVD of VDD_LV_CORE_SOC supply" "0: No LVD of VDD_LV_CORE_SOC supply event has..,1: LVD of VDD_LV_CORE_SOC supply event has occurred"
|
|
bitfld.long 0x0 27. "F_HVD_CORE,HVD of VDD_LV_CORE_SOC supply" "0: No HVD of VDD_LV_CORE_SOC event has occurred..,1: HVD of VDD_LV_CORE_SOC supply event has occurred"
|
|
newline
|
|
bitfld.long 0x0 12. "F_DBGRST,Flag for Debugger destructive reset" "0: No Debugger destructive reset event has occurred..,1: A Debugger destructive reset event has occurred"
|
|
bitfld.long 0x0 8. "F_EFR,Flag for Functional reset escalation" "0: No Functional reset escalation event has..,1: A Functional reset escalation event has occurred"
|
|
newline
|
|
bitfld.long 0x0 6. "F_DDR_HNDSHK_TO,Flag for DDR handshake timeout" "0: No DDR handshake failed event has occurred since..,1: A DDR handshake failed event has occurred"
|
|
bitfld.long 0x0 5. "F_SUF,Flag for STCU unrecoverable fault reset" "0: No STCU unrecoverable fault reset event has..,1: A STCU unrecoverable fault reset event has.."
|
|
newline
|
|
bitfld.long 0x0 4. "F_FFRR,Flag for FCCU failure to react reset" "0: No FCCU failure to react reset event has..,1: A FCCU failure to react reset event has occurred"
|
|
bitfld.long 0x0 3. "F_SOFT_DEST,Flag for Software destructive reset" "0: No Software destructive reset event has occurred..,1: A Software destructive reset event has occurred"
|
|
newline
|
|
bitfld.long 0x0 0. "F_POR,Flag for Power-On reset" "0: No power-on event has occurred since the last..,1: A power-on event has occurred"
|
|
group.long 0x300++0x3
|
|
line.long 0x0 "FES,'Functional' Event Status Register"
|
|
bitfld.long 0x0 15. "F_SWT4,Flag for SWT4 Timeout reset request." "0: No SWT4 timeout reset has occurred since either..,1: A SWT4 timeout reset event has occurred"
|
|
bitfld.long 0x0 10. "F_JTAG_OR_DBG,Flag for JTAG or debugger Functional reset" "0: No JTAG or debugger Functional reset event has..,1: A JTAG or debugger Functional reset event has.."
|
|
newline
|
|
bitfld.long 0x0 6. "F_FCCU_SOFT,Flag for FCCU Soft reaction request" "0: No FCCU Soft reaction request event has occurred..,1: A FCCU Soft reaction request event has occurred"
|
|
bitfld.long 0x0 5. "F_FCCU_HARD,Flag for FCCU Hard reaction request" "0: No FCCU Hard reaction request event has occurred..,1: A FCCU Hard reaction request event has occurred"
|
|
newline
|
|
bitfld.long 0x0 3. "F_SOFT_FUNC,Flag for Software Functional reset" "0: No Software Functional reset event has occurred..,1: A Software Functional reset event has occurred"
|
|
bitfld.long 0x0 2. "F_ST_DONE,Flag for Self Test done reset" "0: No Self Test done reset event has occurred since..,1: A Self Test done reset event has occurred"
|
|
newline
|
|
bitfld.long 0x0 0. "F_EXT_RST,Flag for External Reset" "0: No external reset event has occurred since..,1: An external reset event has occurred"
|
|
group.long 0x310++0x3
|
|
line.long 0x0 "FERD,'Functional' Event Reset Disable Register"
|
|
bitfld.long 0x0 10. "D_JTAG_OR_DBG,Disable JTAG or debugger Functional reset" "0: A JTAG or debugger Functional reset event..,1: A JTAG or debugger Functional reset event.."
|
|
group.long 0x330++0x3
|
|
line.long 0x0 "FBRE,'Functional' Bidirectional Reset Enable Register"
|
|
bitfld.long 0x0 15. "BE_SWT4,Bidirectional reset enable for SWT4 timeout reset request" "0: RESET pin is asserted on a SWT4 timeout reset..,1: RESET pin is not asserted on a SWT4 timeout.."
|
|
bitfld.long 0x0 10. "BE_JTAG_OR_DBG,Bidirectional Reset Enable for JTAG or debugger Functional reset 0 RESET pin is asserted on a JTAG or debugger Functional reset event if the reset is enabled 1 RESET pin is not asserted on a JTAG or debugger Functional reset event" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "BE_FCCU_SOFT,Bidirectional Reset Enable for FCCU Soft reaction request 0 RESET pin is asserted on a FCCU Soft reaction request event 1 RESET pin is not asserted on a FCCU Soft reaction request event" "0,1"
|
|
bitfld.long 0x0 5. "BE_FCCU_HARD,Bidirectional Reset Enable for FCCU Hard reaction request 0 RESET pin is asserted on a FCCU Hard reaction request event 1 RESET pin is not asserted on a FCCU Hard reaction request event" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "BE_SOFT_FUNC,Bidirectional Reset Enable for Software Functional reset 0 RESET pin is asserted on a Software Functional reset event 1 RESET pin is not asserted on a Software Functional reset event" "0,1"
|
|
bitfld.long 0x0 2. "BE_ST_DONE,Bidirectional reset enable for Self Test done reset" "0: RESET pin is asserted on a Self Test done reset..,1: RESET pin is not asserted on a Self Test done.."
|
|
newline
|
|
rbitfld.long 0x0 0. "BE_EXT_RST,Bidirectional reset enable for external reset." "0: RESET pin is asserted on an external reset event,?"
|
|
group.long 0x340++0x3
|
|
line.long 0x0 "FESS,Functional' Event Short Sequence Register"
|
|
bitfld.long 0x0 15. "SS_SWT4,Short sequence for SWT4 timeout reset request." "0: The reset sequence triggered by a SWT4 timeout..,1: The reset sequence triggered by a SWT4 timeout.."
|
|
bitfld.long 0x0 10. "SS_JTAG_OR_DBG,Short Sequence for JTAG or debugger Functional reset" "0: The reset sequence triggered by a JTAG or..,1: The reset sequence triggered by a JTAG or.."
|
|
newline
|
|
rbitfld.long 0x0 6. "SS_FCCU_SOFT,Short sequence for for FCCU Soft reaction request." "?,1: The reset sequence triggered by a FCCU Soft.."
|
|
rbitfld.long 0x0 5. "SS_FCCU_HARD,Short Sequence for FCCU Hard reaction request" "0: The reset sequence triggered by a FCCU Hard..,?"
|
|
newline
|
|
bitfld.long 0x0 3. "SS_SOFT_FUNC,Short Sequence for Software Functional reset" "0: The reset sequence triggered by a Software..,1: The reset sequence triggered by a Software.."
|
|
rbitfld.long 0x0 2. "SS_ST_DONE,Short Sequence for Self Test done reset" "0: The reset sequence triggered by a Self Test done..,?"
|
|
newline
|
|
bitfld.long 0x0 0. "SS_EXT_RST,Short Sequence for external reset" "0: The reset sequence triggered by a external reset..,1: The reset sequence triggered by a external reset.."
|
|
group.long 0x350++0xB
|
|
line.long 0x0 "DDR_HE,DDR Handshake Enable Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "HNDSHK_TO_VAL,Handshake Timeout Value provides the number of clock cycles in terms of IRC clocks after which the DDR handshake would be timed out and reset asserted"
|
|
bitfld.long 0x0 0. "HANDSHK_EN,Handshake Enable" "0: DDR handshake feature is disabled.,1: DDR handshake feature is enabled. For.."
|
|
line.long 0x4 "DDR_HS,DDR Handshake Status Register"
|
|
bitfld.long 0x4 1. "HNDSHK_DONE,Handshake Done" "0: DDR Handshake not completed,1: DDR Handshake completed"
|
|
line.long 0x8 "FRHE,Functional Reset Handshake Enable"
|
|
bitfld.long 0x8 15. "HE_SWT4,DDR Handshake enable for SWT4 timeout reset request." "0: DDR Handshake is not enabled on the SWT4 timeout..,1: DDR Handshake is enabled on the SWT4 timeout.."
|
|
bitfld.long 0x8 10. "HE_JTAG_OR_DBG,DDR Handshake enable for JTAG or Debugger Functional reset." "0: DDR Handshake is not enabled on the JTAG or..,1: DDR Handshake is enabled on the JTAG or Debugger.."
|
|
newline
|
|
bitfld.long 0x8 6. "HE_FCCU_SOFT,DDR Handshake enable for FCCU soft reaction request." "0: DDR Handshake is not enabled on the FCCU soft..,1: DDR Handshake is enabled on the FCCU soft.."
|
|
bitfld.long 0x8 5. "HE_FCCU_HARD,DDR Handshake enable for FCCU hard reaction request." "0: DDR Handshake is not enabled on the FCCU hard..,1: DDR Handshake is enabled on the FCCU hard.."
|
|
newline
|
|
bitfld.long 0x8 3. "HE_SOFT_FUNC,DDR Handshake enable for Software Functional reset" "0: DDR Handshake is not enabled on the Software..,1: DDR Handshake is enabled on the Software.."
|
|
bitfld.long 0x8 2. "HE_ST_DONE,DDR Handshake enable for Self Test done reset" "0: DDR Handshake is not enabled on the Self test..,1: DDR Handshake is enabled on the Self test done.."
|
|
newline
|
|
bitfld.long 0x8 0. "HE_EXT_RST,DDR Handshake enable for external reset request." "0: DDR Handshake is not enabled on the external..,1: DDR Handshake is enabled on the external reset.."
|
|
rgroup.long 0x600++0x3
|
|
line.long 0x0 "FREC,Functional Reset Escalation Counter"
|
|
hexmask.long.byte 0x0 0.--3. 1. "FREC,'Functional' Reset Escalation Counter - This field provides the value of functional reset escalation counter"
|
|
group.byte 0x607++0x0
|
|
line.byte 0x0 "FRET,'Functional' Reset Escalation Threshold Register"
|
|
hexmask.byte 0x0 0.--3. 1. "FRET,'Functional' Reset Escalation Threshold - If the value of this field is 0 the 'functional' reset escalation function is disabled"
|
|
group.byte 0x60B++0x0
|
|
line.byte 0x0 "DRET,'Destructive' Reset Escalation Threshold Register"
|
|
hexmask.byte 0x0 0.--3. 1. "DRET,'Destructive' Reset Escalation Threshold - If the value of this field is 0 the 'destructive' reset escalation function is disabled"
|
|
tree.end
|
|
tree "MCM (Core Platform Miscellaneous Control Module)"
|
|
base ad:0xE0080000
|
|
rgroup.word 0x8++0x1
|
|
line.word 0x0 "PLASC,Crossbar Switch (AXBS) Slave Configuration"
|
|
hexmask.word.byte 0x0 0.--6. 1. "ASC,Each bit in the ASC field indicates whether there is a corresponding connection to the crossbar switch's slave input port."
|
|
group.long 0xC++0x7
|
|
line.long 0x0 "CR,Control Register"
|
|
bitfld.long 0x0 30. "SRAMLWP,TCRAM_L Write Protect" "0,1"
|
|
bitfld.long 0x0 28.--29. "SRAMLAP,TCRAM_L arbitration priority" "0: Round robin,1: Special round robin (favors SRAM backoor..,2: Fixed priority. Processor has highest backdoor..,3: Fixed priority. Backdoor has highest processor.."
|
|
newline
|
|
bitfld.long 0x0 26. "SRAMUWP,TCRAM_U write protect" "0,1"
|
|
bitfld.long 0x0 24.--25. "SRAMUAP,TCRAM_U arbitration priority" "0: Round robin,1: Special round robin (favors SRAM backoor..,2: Fixed priority. Processor has highest backdoor..,3: Fixed priority. Backdoor has highest processor.."
|
|
line.long 0x4 "ISCR,Interrupt Status and Control Register"
|
|
bitfld.long 0x4 31. "FIDCE,FPU input denormal interrupt enable" "0: Disable interrupt,1: Enable interrupt"
|
|
bitfld.long 0x4 28. "FIXCE,FPU inexact interrupt enable" "0: Disable interrupt,1: Enable interrupt"
|
|
newline
|
|
bitfld.long 0x4 27. "FUFCE,FPU underflow interrupt enable" "0: Disable interrupt,1: Enable interrupt"
|
|
bitfld.long 0x4 26. "FOFCE,FPU overflow interrupt enable" "0: Disable interrupt,1: Enable interrupt"
|
|
newline
|
|
bitfld.long 0x4 25. "FDZCE,FPU divide-by-zero interrupt enable" "0: Disable interrupt,1: Enable interrupt"
|
|
bitfld.long 0x4 24. "FIOCE,FPU invalid operation interrupt enable" "0: Disable interrupt,1: Enable interrupt"
|
|
newline
|
|
bitfld.long 0x4 20. "CWBEE,Cache write buffer error enable" "0: Disable error interrupt,1: Enable error interrupt"
|
|
rbitfld.long 0x4 15. "FIDC,FPU input denormal interrupt status" "0: No interrupt,1: Interrupt occurred"
|
|
newline
|
|
rbitfld.long 0x4 12. "FIXC,FPU inexact interrupt status" "0: No interrupt,1: Interrupt occurred"
|
|
rbitfld.long 0x4 11. "FUFC,FPU underflow interrupt status" "0: No interrupt,1: Interrupt occurred"
|
|
newline
|
|
rbitfld.long 0x4 10. "FOFC,FPU overflow interrupt status" "0: No interrupt,1: Interrupt occurred"
|
|
rbitfld.long 0x4 9. "FDZC,FPU divide-by-zero interrupt status" "0: No interrupt,1: Interrupt occurred"
|
|
newline
|
|
rbitfld.long 0x4 8. "FIOC,FPU invalid operation interrupt status" "0: No interrupt,1: Interrupt occurred"
|
|
bitfld.long 0x4 4. "CWBER,Cache write buffer error status" "0: No error,1: Error occurred"
|
|
rgroup.long 0x20++0xB
|
|
line.long 0x0 "FADR,Fault address register"
|
|
hexmask.long 0x0 0.--31. 1. "ADDRESS,Fault address"
|
|
line.long 0x4 "FATR,Fault attributes register"
|
|
bitfld.long 0x4 31. "BEOVR,Bus error overrun" "0: No bus error overrun,1: Bus error overrun occurred. The FADR and FDR.."
|
|
hexmask.long.byte 0x4 8.--11. 1. "BEMN,Bus error master number"
|
|
newline
|
|
bitfld.long 0x4 7. "BEWT,Bus error write" "0: Read access,1: Write access"
|
|
bitfld.long 0x4 4.--5. "BESZ,Bus error size" "0: 8-bit access,1: 16-bit access,2: 32-bit access,?"
|
|
newline
|
|
bitfld.long 0x4 1. "BEMD,Bus error privilege level" "0: User mode,1: Supervisor/privileged mode"
|
|
bitfld.long 0x4 0. "BEDA,Bus error access type" "0: Instruction,1: Data"
|
|
line.long 0x8 "FDR,Fault data register"
|
|
hexmask.long 0x8 0.--31. 1. "DATA,Fault data"
|
|
tree.end
|
|
tree "MCT (MTR Controller)"
|
|
base ad:0x400E8000
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "ALGOSEL,MCT Algorithm Select Register"
|
|
bitfld.long 0x0 31. "MEMINIT,Memory Initialisation" "0: Algorithm disabled (no initialization),1: Algorithm enabled (will result in initialization)"
|
|
bitfld.long 0x0 13. "BSCCHK,Basic Check" "0: Algorithm disabled,1: Algorithm enabled"
|
|
newline
|
|
bitfld.long 0x0 3. "MCPS,March C+ Single" "0: Algorithm disabled,1: Algorithm enabled"
|
|
group.long 0x5C++0x7
|
|
line.long 0x0 "BSTART,BIST Start register"
|
|
bitfld.long 0x0 31. "CLKEN,IPS clock enable enables the programming clock for the BISTs." "0,1"
|
|
bitfld.long 0x0 0.--2. "BSTRT,BIST start" "0: NOP (reset value),1: RUN_ONLY: Run BISTs MCT will run the selected..,?,?,4: PROG_ONLY: Program BISTs only MCT will only..,5: PROG_RUN: Program BISTs and start them,?,?"
|
|
line.long 0x4 "STAG_D,Stagger delay register"
|
|
hexmask.long 0x4 0.--31. 1. "STAG,Stagger delay value This value is the number of clock (SYS6_CLK) cycles between starting one BIST and going to next BIST."
|
|
tree.end
|
|
tree "MEMU (Memory Error Management Unit)"
|
|
base ad:0x400E0000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "CTRL,Control register"
|
|
bitfld.long 0x0 15. "SWR,Software Reset bit" "0: No reset.,1: Reset asserted."
|
|
line.long 0x4 "ERR_FLAG,Error flag register"
|
|
bitfld.long 0x4 20. "PR_CE,Peripheral RAM ECC Correctable Error detect flag" "0: No new and unique error detected.,1: New entry in correctable error reporting table.."
|
|
bitfld.long 0x4 19. "PR_UCE,Peripheral RAM ECC Uncorrectable Error Detect flag" "0: No new and unique error detected.,1: New entry in uncorrectable error reporting table.."
|
|
newline
|
|
bitfld.long 0x4 18. "PR_CEO,Peripheral RAM ECC Correctable error Overflow flag" "0: No Overflow.,1: Overflow in the correctable error reporting.."
|
|
bitfld.long 0x4 17. "PR_UCO,Peripheral RAM ECC Uncorrectable error Overflow flag" "0: No Overflow.,1: Overflow in the uncorrectable error reporting.."
|
|
newline
|
|
bitfld.long 0x4 16. "PR_EBO,Peripheral RAM ECC Error buffer Overflow flag" "0,1"
|
|
group.long 0xC++0x3
|
|
line.long 0x0 "DEBUG,Debug register"
|
|
bitfld.long 0x0 20. "FR_PR_CE,Force Peripheral RAM Correctable Error detect flag." "0: Forcing is disabled.,1: Forces PR_CE flag going towards FCCU to 1."
|
|
bitfld.long 0x0 19. "FR_PR_UCE,Force Peripheral RAM Uncorrectable Error detect flag." "0: Forcing is disabled.,1: Forces PR_UCE flag going towards FCCU to 1."
|
|
newline
|
|
bitfld.long 0x0 18. "FR_PR_CEO,Force Peripheral RAM Correctable Error overflow flag" "0: Forcing is disabled.,1: Forces PR_CEO flag going towards FCCU to 1."
|
|
bitfld.long 0x0 17. "FR_PR_UCO,Forces Peripheral RAM Uncorrectable Error overflow flag." "0: Forcing is disabled.,1: Forces PR_UCO flag going towards FCCU to 1."
|
|
newline
|
|
bitfld.long 0x0 16. "FR_PR_EBO,Forces Peripheral RAM Error Buffer Overflow Flag." "0: Forcing is disabled.,1: Forces PR_EBO flag going towards FCCU to 1."
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x8)
|
|
group.long ($2+0x620)++0x3
|
|
line.long 0x0 "PERIPH_RAM_CERR_STS$1,Peripheral RAM correctable error reporting table status register"
|
|
bitfld.long 0x0 31. "VLD,Valid bit" "0: Entry in table is invalid.,1: Entry in table is valid."
|
|
hexmask.long.byte 0x0 0.--7. 1. "BAD_BIT,Bad bit field"
|
|
repeat.end
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x8)
|
|
group.long ($2+0x624)++0x3
|
|
line.long 0x0 "PERIPH_RAM_CERR_ADDR$1,Peripheral RAM correctable error reporting table address register"
|
|
hexmask.long 0x0 0.--31. 1. "ERR_ADD,Error address field Indicates the address on which the error was detected."
|
|
repeat.end
|
|
group.long 0x630++0xB
|
|
line.long 0x0 "PERIPH_RAM_UNCERR_STS,Peripheral RAM uncorrectable error reporting table status register"
|
|
bitfld.long 0x0 31. "VLD,Valid bit" "0: Entry in table is invalid.,1: Entry in table is valid."
|
|
line.long 0x4 "PERIPH_RAM_UNCERR_ADDR,Peripheral RAM uncorrectable error reporting table address register"
|
|
hexmask.long 0x4 0.--31. 1. "ERR_ADD,Error address field. Indicates the address on which the error was detected."
|
|
line.long 0x8 "PERIPH_RAM_OFLW,Peripheral RAM concurrent overflow register"
|
|
hexmask.long 0x8 0.--31. 1. "OFLW,Overflow Bit"
|
|
tree.end
|
|
tree "MEW (MMDC ECC and Debug Watchpoint)"
|
|
base ad:0x0
|
|
tree "MEW_AXI"
|
|
tree "MEW_AXI_0"
|
|
base ad:0x40037000
|
|
group.long 0x0++0x13
|
|
line.long 0x0 "ECC_GLBL_CTRL,AXI ECC Global Control Register"
|
|
bitfld.long 0x0 19. "WR_EDCEN,Enable EDC module on write data path." "0: Disable the EDC module,1: Enable the EDC module"
|
|
bitfld.long 0x0 16. "WR_EN,Enable the module on write data path." "0: Direct path from QoS 301 to DDR without enabling..,1: Enable the ECC path on write."
|
|
newline
|
|
bitfld.long 0x0 3. "RD_EDCEN,Enable signal for EDC module(EDC_R) during read." "0: Disable the EDC module,1: Enable the EDC module"
|
|
bitfld.long 0x0 0. "RD_EN,Enable the module on read data path." "0: Direct path from MMDC to QoS 301 without..,1: Enable the ECCpath"
|
|
line.long 0x4 "ECC_MX_EPA,AXI ECC Maximum ECC protected address register"
|
|
hexmask.long 0x4 0.--31. 1. "MX_EPA,High Address boundary for ECC protected memory region"
|
|
line.long 0x8 "ECC_MN_EPA,AXI ECC Minimum ECC protected address register"
|
|
hexmask.long 0x8 0.--31. 1. "MN_EPA,Lower Address boundary for ECC protected memory region"
|
|
line.long 0xC "ECC_LK_PTN,AXI ECC Lock Pattern Register"
|
|
hexmask.long 0xC 0.--31. 1. "LK_PTN,Lock Pattern is to lock certain bits of the MEW registers to protect against any unwanted altering during run time"
|
|
line.long 0x10 "ECC_ULK_PTN,AXI ECC Unlock Pattern Register"
|
|
hexmask.long 0x10 0.--31. 1. "ULK_PTN,Unlock Pattern is to unlock certain bits of this IPS register which was locked by locking pattern register"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x0 "ECC_EERAR,ECC Error Report Address Register"
|
|
hexmask.long 0x0 0.--31. 1. "EERA,This register gives address-bits 31:0 which caused ECC error"
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x1C)++0x3
|
|
line.long 0x0 "ECC_EERDSR$1,AXI ECC Error Report Data and Syndrome Register"
|
|
hexmask.long.byte 0x0 16.--23. 1. "EERS,This register gives syndrome-bits 7:0 which caused ECC error."
|
|
hexmask.long.byte 0x0 8.--15. 1. "EECC,This register gives ECC bits which caused ECC Error."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "EERD,This register gives data-bits 7:0 which caused ECC error."
|
|
repeat.end
|
|
group.long 0x2C++0xF
|
|
line.long 0x0 "ECC_ERR_IE,AXI ECC error interrupt enable"
|
|
bitfld.long 0x0 19. "CE_IE4,Correctable Error logging and Interrupt Enable for ECC module4" "0: Disable Error monitor and interrupt line,1: Enable Error monitor and interrupt line"
|
|
bitfld.long 0x0 18. "CE_IE3,Correctable Error logging and Interrupt Enable for ECC module3" "0: Disable Error monitor and interrupt line,1: Enable Error monitor and interrupt line"
|
|
newline
|
|
bitfld.long 0x0 17. "CE_IE2,Correctable Error logging and Interrupt Enable for ECC module2" "0: Disable Error monitor and interrupt line,1: Enable Error monitor and interrupt line"
|
|
bitfld.long 0x0 16. "CE_IE1,Correctable Error logging and Interrupt Enable for ECC module1" "0: Disable Error monitor and interrupt line,1: Enable Error monitor and interrupt line"
|
|
newline
|
|
bitfld.long 0x0 3. "NCE_IE4,Non-Correctable Error logging and Interrupt Enable for ECC module4" "0: Disable Error monitor and interrupt line,1: Enable Error monitor and interrupt line"
|
|
bitfld.long 0x0 2. "NCE_IE3,Non-Correctable Error logging and Interrupt Enable for ECC module3" "0: Disable Error monitor and interrupt line,1: Enable Error monitor and interrupt line"
|
|
newline
|
|
bitfld.long 0x0 1. "NCE_IE2,Non-Correctable Error logging and Interrupt Enable for ECC module2" "0: Disable Error monitor and interrupt line,1: Enable Error monitor and interrupt line"
|
|
bitfld.long 0x0 0. "NCE_IE1,Non-Correctable Error logging and Interrupt Enable for ECC module1" "0: Disable Error monitor and interrupt line,1: Enable Error monitor and interrupt line"
|
|
line.long 0x4 "ECC_ERR_IN_STCLR,AXI ECC error Interupt status and clear register"
|
|
bitfld.long 0x4 19. "CE_IF4,Corrected Error Interrupt Flag for ECC module4" "0,1"
|
|
bitfld.long 0x4 18. "CE_IF3,Corrected Error Interrupt Flag for ECC module3" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "CE_IF2,Corrected Error Interrupt Flag for ECC module2" "0,1"
|
|
bitfld.long 0x4 16. "CE_IF1,Corrected Error Interrupt Flag for ECC module1" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "NCE_IF4,Non-Corrected Error Interrupt Flag for ECC module4" "0,1"
|
|
bitfld.long 0x4 2. "NCE_IF3,Non-Corrected Error Interrupt Flag for ECC module3" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "NCE_IF2,Non-Corrected Error Interrupt Flag for ECC module2" "0,1"
|
|
bitfld.long 0x4 0. "NCE_IF1,Non-Corrected Error Interrupt Flag for ECC module1" "0,1"
|
|
line.long 0x8 "EDC_ERR_IE,AXI EDC Error interrupt enable register"
|
|
bitfld.long 0x8 19. "EDC_DIE4,EDC Decoder Error Interrupt Enable" "0: Disable interrupt line,1: Enable interrupt line"
|
|
bitfld.long 0x8 18. "EDC_DIE3,EDC Decoder Error Interrupt Enable" "0: Disable interrupt line,1: Enable interrupt line"
|
|
newline
|
|
bitfld.long 0x8 17. "EDC_DIE2,EDC Decoder Error Interrupt Enable" "0: Disable interrupt line,1: Enable interrupt line"
|
|
bitfld.long 0x8 16. "EDC_DIE1,EDC Decoder Error Interrupt Enable" "0: Disable interrupt line,1: Enable interrupt line"
|
|
newline
|
|
bitfld.long 0x8 3. "EDC_EIE4,EDC Encoder Error Interrupt Enable" "0: Disable interrupt line,1: Enable interrupt line"
|
|
bitfld.long 0x8 2. "EDC_EIE3,EDC Encoder Error Interrupt Enable" "0: Disable interrupt line,1: Enable interrupt line"
|
|
newline
|
|
bitfld.long 0x8 1. "EDC_EIE2,EDC Encoder Error Interrupt Enable" "0: Disable interrupt line,1: Enable interrupt line"
|
|
bitfld.long 0x8 0. "EDC_EIE1,EDC Encoder Error Interrupt Enable" "0: Disable interrupt line,1: Enable interrupt line"
|
|
line.long 0xC "EDC_ERR_IN_STCLR,AXI EDC Error Interrupt Status and Clear register"
|
|
bitfld.long 0xC 19. "EDC_DEC4,This interrupt flag is set to 1 when decoder of ECC module4 is not working fine." "0,1"
|
|
bitfld.long 0xC 18. "EDC_DEC3,This interrupt flag is set to 1 when decoder of ECC module3 is not working fine." "0,1"
|
|
newline
|
|
bitfld.long 0xC 17. "EDC_DEC2,This interrupt flag is set to 1 when decoder of ECC module2 is not working fine." "0,1"
|
|
bitfld.long 0xC 16. "EDC_DEC1,This interrupt flag is set to 1 when decoder of ECC module1 is not working fine." "0,1"
|
|
newline
|
|
bitfld.long 0xC 3. "EDC_ENC4,This interrupt flag is set to 1 when encoder of ECC module4 is not working fine." "0,1"
|
|
bitfld.long 0xC 2. "EDC_ENC3,This interrupt flag is set to 1 when encoder of ECC module3 is not working fine." "0,1"
|
|
newline
|
|
bitfld.long 0xC 1. "EDC_ENC2,This interrupt flag is set to 1 when encoder of ECC module2 is not working fine." "0,1"
|
|
bitfld.long 0xC 0. "EDC_ENC1,This interrupt flag is set to 1 when encoder of ECC module1 is not working fine." "0,1"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "ECC_SHD_STAT_CTRL,Shadow Control. RW path Status and Status Clear Register"
|
|
bitfld.long 0x0 24. "SHD_RGN_SLT,Shadow-Region-Select" "0: Shadow points to first region,1: Shadow points to second region"
|
|
rbitfld.long 0x0 18. "WR_RES_EMP,Write Region Resp-Table Empty" "0: Not Empty,1: Empty"
|
|
newline
|
|
rbitfld.long 0x0 17. "WR_TX_EMP,Write Region Tx-Table Empty" "0: Not Empty,1: Empty"
|
|
rbitfld.long 0x0 16. "RD_TX_EMP,Read Region Tx-Table Empty" "0: Not Empty,1: Empty"
|
|
newline
|
|
rbitfld.long 0x0 10. "WR_RES_FULL,Write Region Resp-Table Full" "0: Not Full,1: Full"
|
|
rbitfld.long 0x0 9. "WR_TX_FULL,Write Region Tx-Table Full" "0: Not Full,1: Full"
|
|
newline
|
|
rbitfld.long 0x0 8. "RD_TX_FULL,Read Region Tx-Table Full" "0: Not Full,1: Full"
|
|
bitfld.long 0x0 1. "COUNT_CLR,All-Counter Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "STAT_CLR,All Stat Clear" "0,1"
|
|
rgroup.long 0x44++0x7
|
|
line.long 0x0 "ECC_CBL_UNCBL_BIT_EC,Correctable and un-correctable bit error counter"
|
|
bitfld.long 0x0 31. "UCBL_BIT_OF,Un-correctable Bit Over-Flow" "0,1"
|
|
hexmask.long.word 0x0 16.--30. 1. "UCBL_BIT_EC,Un-correctable bit error count"
|
|
newline
|
|
bitfld.long 0x0 15. "CBL_BIT_OF,Correctable Bit Over-Flow" "0,1"
|
|
hexmask.long.word 0x0 0.--14. 1. "CLB_BIT_EC,Correctable bit error count"
|
|
line.long 0x4 "ECC_CBL_UCBL_BEAT_EC,Correctable and un-correctable beat error counter"
|
|
bitfld.long 0x4 31. "UCBL_BEAT_OF,Un-correctable Beat Over-Flow" "0,1"
|
|
hexmask.long.word 0x4 16.--30. 1. "UCBL_BEAT_EC,Un-correctable beat error count"
|
|
newline
|
|
bitfld.long 0x4 15. "CBL_BEAT_OF,Correctable Beat Over-Flow" "0,1"
|
|
hexmask.long.word 0x4 0.--14. 1. "CBL_BEAT_EC,Correctable beat error count"
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "ECC_DBG_CTRL,Debug and Debug Control Register"
|
|
bitfld.long 0x0 0. "ADD_EN_ECC_DIS,Address Mapper Enabled but ECC Disabled" "0,1"
|
|
tree.end
|
|
tree "MEW_AXI_1"
|
|
base ad:0x400A3000
|
|
group.long 0x0++0x13
|
|
line.long 0x0 "ECC_GLBL_CTRL,AXI ECC Global Control Register"
|
|
bitfld.long 0x0 19. "WR_EDCEN,Enable EDC module on write data path." "0: Disable the EDC module,1: Enable the EDC module"
|
|
bitfld.long 0x0 16. "WR_EN,Enable the module on write data path." "0: Direct path from QoS 301 to DDR without enabling..,1: Enable the ECC path on write."
|
|
newline
|
|
bitfld.long 0x0 3. "RD_EDCEN,Enable signal for EDC module(EDC_R) during read." "0: Disable the EDC module,1: Enable the EDC module"
|
|
bitfld.long 0x0 0. "RD_EN,Enable the module on read data path." "0: Direct path from MMDC to QoS 301 without..,1: Enable the ECCpath"
|
|
line.long 0x4 "ECC_MX_EPA,AXI ECC Maximum ECC protected address register"
|
|
hexmask.long 0x4 0.--31. 1. "MX_EPA,High Address boundary for ECC protected memory region"
|
|
line.long 0x8 "ECC_MN_EPA,AXI ECC Minimum ECC protected address register"
|
|
hexmask.long 0x8 0.--31. 1. "MN_EPA,Lower Address boundary for ECC protected memory region"
|
|
line.long 0xC "ECC_LK_PTN,AXI ECC Lock Pattern Register"
|
|
hexmask.long 0xC 0.--31. 1. "LK_PTN,Lock Pattern is to lock certain bits of the MEW registers to protect against any unwanted altering during run time"
|
|
line.long 0x10 "ECC_ULK_PTN,AXI ECC Unlock Pattern Register"
|
|
hexmask.long 0x10 0.--31. 1. "ULK_PTN,Unlock Pattern is to unlock certain bits of this IPS register which was locked by locking pattern register"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x0 "ECC_EERAR,ECC Error Report Address Register"
|
|
hexmask.long 0x0 0.--31. 1. "EERA,This register gives address-bits 31:0 which caused ECC error"
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x1C)++0x3
|
|
line.long 0x0 "ECC_EERDSR$1,AXI ECC Error Report Data and Syndrome Register"
|
|
hexmask.long.byte 0x0 16.--23. 1. "EERS,This register gives syndrome-bits 7:0 which caused ECC error."
|
|
hexmask.long.byte 0x0 8.--15. 1. "EECC,This register gives ECC bits which caused ECC Error."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "EERD,This register gives data-bits 7:0 which caused ECC error."
|
|
repeat.end
|
|
group.long 0x2C++0xF
|
|
line.long 0x0 "ECC_ERR_IE,AXI ECC error interrupt enable"
|
|
bitfld.long 0x0 19. "CE_IE4,Correctable Error logging and Interrupt Enable for ECC module4" "0: Disable Error monitor and interrupt line,1: Enable Error monitor and interrupt line"
|
|
bitfld.long 0x0 18. "CE_IE3,Correctable Error logging and Interrupt Enable for ECC module3" "0: Disable Error monitor and interrupt line,1: Enable Error monitor and interrupt line"
|
|
newline
|
|
bitfld.long 0x0 17. "CE_IE2,Correctable Error logging and Interrupt Enable for ECC module2" "0: Disable Error monitor and interrupt line,1: Enable Error monitor and interrupt line"
|
|
bitfld.long 0x0 16. "CE_IE1,Correctable Error logging and Interrupt Enable for ECC module1" "0: Disable Error monitor and interrupt line,1: Enable Error monitor and interrupt line"
|
|
newline
|
|
bitfld.long 0x0 3. "NCE_IE4,Non-Correctable Error logging and Interrupt Enable for ECC module4" "0: Disable Error monitor and interrupt line,1: Enable Error monitor and interrupt line"
|
|
bitfld.long 0x0 2. "NCE_IE3,Non-Correctable Error logging and Interrupt Enable for ECC module3" "0: Disable Error monitor and interrupt line,1: Enable Error monitor and interrupt line"
|
|
newline
|
|
bitfld.long 0x0 1. "NCE_IE2,Non-Correctable Error logging and Interrupt Enable for ECC module2" "0: Disable Error monitor and interrupt line,1: Enable Error monitor and interrupt line"
|
|
bitfld.long 0x0 0. "NCE_IE1,Non-Correctable Error logging and Interrupt Enable for ECC module1" "0: Disable Error monitor and interrupt line,1: Enable Error monitor and interrupt line"
|
|
line.long 0x4 "ECC_ERR_IN_STCLR,AXI ECC error Interupt status and clear register"
|
|
bitfld.long 0x4 19. "CE_IF4,Corrected Error Interrupt Flag for ECC module4" "0,1"
|
|
bitfld.long 0x4 18. "CE_IF3,Corrected Error Interrupt Flag for ECC module3" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "CE_IF2,Corrected Error Interrupt Flag for ECC module2" "0,1"
|
|
bitfld.long 0x4 16. "CE_IF1,Corrected Error Interrupt Flag for ECC module1" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "NCE_IF4,Non-Corrected Error Interrupt Flag for ECC module4" "0,1"
|
|
bitfld.long 0x4 2. "NCE_IF3,Non-Corrected Error Interrupt Flag for ECC module3" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "NCE_IF2,Non-Corrected Error Interrupt Flag for ECC module2" "0,1"
|
|
bitfld.long 0x4 0. "NCE_IF1,Non-Corrected Error Interrupt Flag for ECC module1" "0,1"
|
|
line.long 0x8 "EDC_ERR_IE,AXI EDC Error interrupt enable register"
|
|
bitfld.long 0x8 19. "EDC_DIE4,EDC Decoder Error Interrupt Enable" "0: Disable interrupt line,1: Enable interrupt line"
|
|
bitfld.long 0x8 18. "EDC_DIE3,EDC Decoder Error Interrupt Enable" "0: Disable interrupt line,1: Enable interrupt line"
|
|
newline
|
|
bitfld.long 0x8 17. "EDC_DIE2,EDC Decoder Error Interrupt Enable" "0: Disable interrupt line,1: Enable interrupt line"
|
|
bitfld.long 0x8 16. "EDC_DIE1,EDC Decoder Error Interrupt Enable" "0: Disable interrupt line,1: Enable interrupt line"
|
|
newline
|
|
bitfld.long 0x8 3. "EDC_EIE4,EDC Encoder Error Interrupt Enable" "0: Disable interrupt line,1: Enable interrupt line"
|
|
bitfld.long 0x8 2. "EDC_EIE3,EDC Encoder Error Interrupt Enable" "0: Disable interrupt line,1: Enable interrupt line"
|
|
newline
|
|
bitfld.long 0x8 1. "EDC_EIE2,EDC Encoder Error Interrupt Enable" "0: Disable interrupt line,1: Enable interrupt line"
|
|
bitfld.long 0x8 0. "EDC_EIE1,EDC Encoder Error Interrupt Enable" "0: Disable interrupt line,1: Enable interrupt line"
|
|
line.long 0xC "EDC_ERR_IN_STCLR,AXI EDC Error Interrupt Status and Clear register"
|
|
bitfld.long 0xC 19. "EDC_DEC4,This interrupt flag is set to 1 when decoder of ECC module4 is not working fine." "0,1"
|
|
bitfld.long 0xC 18. "EDC_DEC3,This interrupt flag is set to 1 when decoder of ECC module3 is not working fine." "0,1"
|
|
newline
|
|
bitfld.long 0xC 17. "EDC_DEC2,This interrupt flag is set to 1 when decoder of ECC module2 is not working fine." "0,1"
|
|
bitfld.long 0xC 16. "EDC_DEC1,This interrupt flag is set to 1 when decoder of ECC module1 is not working fine." "0,1"
|
|
newline
|
|
bitfld.long 0xC 3. "EDC_ENC4,This interrupt flag is set to 1 when encoder of ECC module4 is not working fine." "0,1"
|
|
bitfld.long 0xC 2. "EDC_ENC3,This interrupt flag is set to 1 when encoder of ECC module3 is not working fine." "0,1"
|
|
newline
|
|
bitfld.long 0xC 1. "EDC_ENC2,This interrupt flag is set to 1 when encoder of ECC module2 is not working fine." "0,1"
|
|
bitfld.long 0xC 0. "EDC_ENC1,This interrupt flag is set to 1 when encoder of ECC module1 is not working fine." "0,1"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "ECC_SHD_STAT_CTRL,Shadow Control. RW path Status and Status Clear Register"
|
|
bitfld.long 0x0 24. "SHD_RGN_SLT,Shadow-Region-Select" "0: Shadow points to first region,1: Shadow points to second region"
|
|
rbitfld.long 0x0 18. "WR_RES_EMP,Write Region Resp-Table Empty" "0: Not Empty,1: Empty"
|
|
newline
|
|
rbitfld.long 0x0 17. "WR_TX_EMP,Write Region Tx-Table Empty" "0: Not Empty,1: Empty"
|
|
rbitfld.long 0x0 16. "RD_TX_EMP,Read Region Tx-Table Empty" "0: Not Empty,1: Empty"
|
|
newline
|
|
rbitfld.long 0x0 10. "WR_RES_FULL,Write Region Resp-Table Full" "0: Not Full,1: Full"
|
|
rbitfld.long 0x0 9. "WR_TX_FULL,Write Region Tx-Table Full" "0: Not Full,1: Full"
|
|
newline
|
|
rbitfld.long 0x0 8. "RD_TX_FULL,Read Region Tx-Table Full" "0: Not Full,1: Full"
|
|
bitfld.long 0x0 1. "COUNT_CLR,All-Counter Clear" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "STAT_CLR,All Stat Clear" "0,1"
|
|
rgroup.long 0x44++0x7
|
|
line.long 0x0 "ECC_CBL_UNCBL_BIT_EC,Correctable and un-correctable bit error counter"
|
|
bitfld.long 0x0 31. "UCBL_BIT_OF,Un-correctable Bit Over-Flow" "0,1"
|
|
hexmask.long.word 0x0 16.--30. 1. "UCBL_BIT_EC,Un-correctable bit error count"
|
|
newline
|
|
bitfld.long 0x0 15. "CBL_BIT_OF,Correctable Bit Over-Flow" "0,1"
|
|
hexmask.long.word 0x0 0.--14. 1. "CLB_BIT_EC,Correctable bit error count"
|
|
line.long 0x4 "ECC_CBL_UCBL_BEAT_EC,Correctable and un-correctable beat error counter"
|
|
bitfld.long 0x4 31. "UCBL_BEAT_OF,Un-correctable Beat Over-Flow" "0,1"
|
|
hexmask.long.word 0x4 16.--30. 1. "UCBL_BEAT_EC,Un-correctable beat error count"
|
|
newline
|
|
bitfld.long 0x4 15. "CBL_BEAT_OF,Correctable Beat Over-Flow" "0,1"
|
|
hexmask.long.word 0x4 0.--14. 1. "CBL_BEAT_EC,Correctable beat error count"
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "ECC_DBG_CTRL,Debug and Debug Control Register"
|
|
bitfld.long 0x0 0. "ADD_EN_ECC_DIS,Address Mapper Enabled but ECC Disabled" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "MEW_WPT"
|
|
tree "MEW_WPT_0"
|
|
base ad:0x4008F000
|
|
group.long 0x500++0x3
|
|
line.long 0x0 "CTRL,Watchpoint Control register"
|
|
bitfld.long 0x0 3.--4. "RD_CTRL,FIFO Read Control" "?,1: FIFO Read clock is divided by 2.,2: FIFO Read clock is divided by 3.,3: FIFO Read clock is divided by 4."
|
|
bitfld.long 0x0 2. "COMP_MOD,Comparator Mode" "0: Comparator is in range mode.,1: Comparators are in individual comparator mode."
|
|
newline
|
|
bitfld.long 0x0 1. "TR_RW_SEL,Trace transaction select." "0: Trace the write transaction,1: Trace the read transaction"
|
|
bitfld.long 0x0 0. "TR_EN,Trace Enable" "0: Tracing the AHB transaction is disabled.,1: Tracing the AHB transaction is enabled."
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x504)++0x3
|
|
line.long 0x0 "MST_ID_COM$1,Master ID reference register"
|
|
hexmask.long.word 0x0 0.--15. 1. "MID_REF,Master ID reference"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x514)++0x3
|
|
line.long 0x0 "MST_ID_MSK$1,Master ID compare mask register"
|
|
hexmask.long.word 0x0 0.--15. 1. "ID_COM_MSK,ID comparison mask"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x524)++0x3
|
|
line.long 0x0 "MST_ID_SEL$1,Master ID select register"
|
|
hexmask.long.byte 0x0 12.--15. 1. "MID_SEL3,Master ID select3"
|
|
hexmask.long.byte 0x0 8.--11. 1. "MID_SEL2,Master ID select2"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--7. 1. "MID_SEL1,Master ID select1"
|
|
hexmask.long.byte 0x0 0.--3. 1. "MID_SEL0,Master ID select0"
|
|
repeat.end
|
|
group.long 0x534++0x1B
|
|
line.long 0x0 "ADDR_R1,Address Range1 Register"
|
|
hexmask.long 0x0 0.--31. 1. "ADDR_ST,Address Trace Start"
|
|
line.long 0x4 "ADDR_R1_MASK,Address Range1 Mask Register"
|
|
hexmask.long 0x4 0.--31. 1. "MASK_R1,Start address mask"
|
|
line.long 0x8 "ADDR_R2,Address Range2 Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR_END,Address Trace End"
|
|
line.long 0xC "ADDR_R2_MASK,Address Range2 Mask Register"
|
|
hexmask.long 0xC 0.--31. 1. "MASK_R2,End address mask"
|
|
line.long 0x10 "FIFO_EMPTY_TH,FIFO Empty Threshold"
|
|
hexmask.long.byte 0x10 0.--5. 1. "EMP_TH,FIFO Empty Threshold"
|
|
line.long 0x14 "INT_EN,Watchpoint Interrupt Enable register"
|
|
bitfld.long 0x14 0. "EXTOUTST_IE,External Event Out interrupt enable" "0: No interrupt will be generated on the..,1: An interrupt will be generated when.."
|
|
line.long 0x18 "STATUS,Watchpoint Status register"
|
|
rbitfld.long 0x18 2. "FIFO_EMPTY,FIFO Empty Status" "0: FIFO not empty,1: FIFO empty"
|
|
bitfld.long 0x18 1. "EXTOUTST,External Event Out Status" "0: External output event from HTM has not occurred,1: External output event from HTM has occurred"
|
|
newline
|
|
bitfld.long 0x18 0. "FIFO_OVF,FIFO overflow status" "0: No FIFO overflow event has occured.,1: FIFO overflow event has occured."
|
|
tree.end
|
|
tree "MEW_WPT_1"
|
|
base ad:0x40090000
|
|
group.long 0x500++0x3
|
|
line.long 0x0 "CTRL,Watchpoint Control register"
|
|
bitfld.long 0x0 3.--4. "RD_CTRL,FIFO Read Control" "?,1: FIFO Read clock is divided by 2.,2: FIFO Read clock is divided by 3.,3: FIFO Read clock is divided by 4."
|
|
bitfld.long 0x0 2. "COMP_MOD,Comparator Mode" "0: Comparator is in range mode.,1: Comparators are in individual comparator mode."
|
|
newline
|
|
bitfld.long 0x0 1. "TR_RW_SEL,Trace transaction select." "0: Trace the write transaction,1: Trace the read transaction"
|
|
bitfld.long 0x0 0. "TR_EN,Trace Enable" "0: Tracing the AHB transaction is disabled.,1: Tracing the AHB transaction is enabled."
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x504)++0x3
|
|
line.long 0x0 "MST_ID_COM$1,Master ID reference register"
|
|
hexmask.long.word 0x0 0.--15. 1. "MID_REF,Master ID reference"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x514)++0x3
|
|
line.long 0x0 "MST_ID_MSK$1,Master ID compare mask register"
|
|
hexmask.long.word 0x0 0.--15. 1. "ID_COM_MSK,ID comparison mask"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x524)++0x3
|
|
line.long 0x0 "MST_ID_SEL$1,Master ID select register"
|
|
hexmask.long.byte 0x0 12.--15. 1. "MID_SEL3,Master ID select3"
|
|
hexmask.long.byte 0x0 8.--11. 1. "MID_SEL2,Master ID select2"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--7. 1. "MID_SEL1,Master ID select1"
|
|
hexmask.long.byte 0x0 0.--3. 1. "MID_SEL0,Master ID select0"
|
|
repeat.end
|
|
group.long 0x534++0x1B
|
|
line.long 0x0 "ADDR_R1,Address Range1 Register"
|
|
hexmask.long 0x0 0.--31. 1. "ADDR_ST,Address Trace Start"
|
|
line.long 0x4 "ADDR_R1_MASK,Address Range1 Mask Register"
|
|
hexmask.long 0x4 0.--31. 1. "MASK_R1,Start address mask"
|
|
line.long 0x8 "ADDR_R2,Address Range2 Register"
|
|
hexmask.long 0x8 0.--31. 1. "ADDR_END,Address Trace End"
|
|
line.long 0xC "ADDR_R2_MASK,Address Range2 Mask Register"
|
|
hexmask.long 0xC 0.--31. 1. "MASK_R2,End address mask"
|
|
line.long 0x10 "FIFO_EMPTY_TH,FIFO Empty Threshold"
|
|
hexmask.long.byte 0x10 0.--5. 1. "EMP_TH,FIFO Empty Threshold"
|
|
line.long 0x14 "INT_EN,Watchpoint Interrupt Enable register"
|
|
bitfld.long 0x14 0. "EXTOUTST_IE,External Event Out interrupt enable" "0: No interrupt will be generated on the..,1: An interrupt will be generated when.."
|
|
line.long 0x18 "STATUS,Watchpoint Status register"
|
|
rbitfld.long 0x18 2. "FIFO_EMPTY,FIFO Empty Status" "0: FIFO not empty,1: FIFO empty"
|
|
bitfld.long 0x18 1. "EXTOUTST,External Event Out Status" "0: External output event from HTM has not occurred,1: External output event from HTM has occurred"
|
|
newline
|
|
bitfld.long 0x18 0. "FIFO_OVF,FIFO overflow status" "0: No FIFO overflow event has occured.,1: FIFO overflow event has occured."
|
|
tree.end
|
|
tree.end
|
|
tree.end
|
|
tree "MIPICSI2 (Camera Serial Interface)"
|
|
base ad:0x0
|
|
tree "MIPICSI2_0"
|
|
base ad:0x40030000
|
|
group.long 0x0++0x1B
|
|
line.long 0x0 "CONC,RX Controller Configuration Register"
|
|
bitfld.long 0x0 0.--1. "NULANE,Number Of active Lanes being used to receive MIPICSI2 Data" "0: One Lane to recieve MIPICSI2 data,1: Two Lanes to Receive MIPICSI2 Data,2: Three Lanes to Receive MIPICSI2 Data,3: Four Lanes to Receive MIPICSI2 Data"
|
|
line.long 0x4 "PHYC,PHY Configuration Register"
|
|
bitfld.long 0x4 1. "PDRX,Power Down Receiver" "0: Power down disabled,1: Power down enabled for all blocks inside PHY"
|
|
bitfld.long 0x4 0. "HSEL,High Speed Select" "0: DPHY clock and data lane 1Gbps,1: DPHY clock and data lane 1.5Gbps"
|
|
line.long 0x8 "CLKCS,Clock Configuration Status Register"
|
|
hexmask.long.byte 0x8 5.--10. 1. "HSSETL,Clock Lane Program RX HS Settle"
|
|
rbitfld.long 0x8 4. "CULPMA,Clock Lane ULPS mark Active State" "0: Clock Lane not in Mark active state,1: Clock Lane is in mark active state"
|
|
newline
|
|
rbitfld.long 0x8 3. "CULPSA,Clock Lane ULPS Active" "0: Clock Lane not in ULPS mode,1: Clock Lane in ULPS mode"
|
|
rbitfld.long 0x8 2. "CSTOP,Clock Lane Stop State" "0: Clock Lane not in stop state,1: Clock Lane in stop state"
|
|
newline
|
|
rbitfld.long 0x8 1. "ULPSC,Clock Lane ULPS" "0: Clock lane not in ultra low power state.,1: Clock Lane in ultra low power state."
|
|
rbitfld.long 0x8 0. "HSRA,High Speed Clock Receive Active" "0: DDR clock not being received on the clock lane..,1: Clock lane is receiving DDR clock"
|
|
line.long 0xC "LAN0CS,D-PHY Lane 0 Configuration Status Register"
|
|
hexmask.long.byte 0xC 6.--11. 1. "D0HSET,Data lane 0 Program RX HS Settle time"
|
|
rbitfld.long 0xC 5. "D0ULMA,Data Lane 0 ULPS Mark Active" "0: Data lane 0 is not in Mark 1 state,1: Data lane 0 is in mark 1 state"
|
|
newline
|
|
rbitfld.long 0xC 4. "D0ULPA,Data lane 0 ULPS Active" "0: Data Lane 0 ULPS not active,1: Data lane 0 ULPS Active"
|
|
rbitfld.long 0xC 3. "D0STOP,Data Lane 0 Stop State" "0: Data lane 0 not in stop state,1: Data lane 0 in stop state."
|
|
newline
|
|
rbitfld.long 0xC 1. "RXACTH,D-PHY Data lane 0 RX active High Speed data" "0: No High Speed data reception ongoing from the..,1: High speed data reception ongoing from lane.."
|
|
rbitfld.long 0xC 0. "RXVALH,Data Lane 0 RX Valid HS" "0: No Valid High Speed data being driven from data..,1: Valid High Speed data being driven from data.."
|
|
line.long 0x10 "LAN1CS,D-PHY Data LANE 1 Configuration Status Register"
|
|
hexmask.long.byte 0x10 6.--11. 1. "D1HSET,D_PHY Data Lane 1 PRG HS Settle time"
|
|
rbitfld.long 0x10 5. "D1ULMA,D_PHY Data Lane 1 ULPS Mark active" "0: Data Lane 1 not in ULPS mark active state,1: Data Lane 1 in ULPS Mark Active state"
|
|
newline
|
|
rbitfld.long 0x10 4. "D1ULPA,D-PHY Data Lane 1 ULPS Active" "0: Data lane not in ULPS state,1: Data Lane 1 in ULPS state"
|
|
rbitfld.long 0x10 3. "D1STOP,D-PHY Data Lane 1 Stop" "0: Data lane 1 is not in stop state,1: Data lane 1 is in stop state"
|
|
newline
|
|
rbitfld.long 0x10 1. "RXACTH,D-PHY Data lane 1 Active HS" "0: Data lane 1 not receiving high speed active data..,1: Data Lane 1 receiving active high speed data on.."
|
|
rbitfld.long 0x10 0. "RXVALH,D-PHY Data lane 1 Receive Valid High speed" "0: No Valid High speed data being driven from data..,1: Valid HS data being transmitted from data lane 1.."
|
|
line.long 0x14 "LAN2CS,LANE 2 Configuration/Status Register"
|
|
hexmask.long.byte 0x14 6.--11. 1. "D2HSET,DPHY Data Lane 2 Sette Time"
|
|
rbitfld.long 0x14 5. "D2ULMA,DPHY Data Lane 2 Mark One state" "0,1"
|
|
newline
|
|
rbitfld.long 0x14 4. "D2ULPA,DPHY Dat aLane 2 in Ulps State" "0,1"
|
|
rbitfld.long 0x14 3. "D2STOP,DPHY Data Lane 2 Stop State" "0,1"
|
|
newline
|
|
rbitfld.long 0x14 1. "RXACTH,DPHY Data Lane 2 High Speed Receive Active" "0,1"
|
|
rbitfld.long 0x14 0. "RXVALH,High Speed Receive Data Valid" "0,1"
|
|
line.long 0x18 "LAN3CS,LANE3 Configuration Status Register"
|
|
hexmask.long.byte 0x18 6.--11. 1. "D3HSET,DPHY Data Lane 3 High Speed Receive Settle Time"
|
|
rbitfld.long 0x18 5. "D3ULMA,DPHY Data Lane 3 Mark One State" "0,1"
|
|
newline
|
|
rbitfld.long 0x18 4. "D3ULPA,DPHY Data Lane 3 ULPS State" "0,1"
|
|
rbitfld.long 0x18 3. "D3STOP,DPHY Data Lane 3 Stop State" "0,1"
|
|
newline
|
|
rbitfld.long 0x18 1. "RXACTH,DPHY Data Lane3 High Speed Receive Active" "0,1"
|
|
rbitfld.long 0x18 0. "RXVALH,High Speed Receive Data Vaild" "0,1"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "RESCS,External Resistor Configuration Status Register"
|
|
rbitfld.long 0x0 6.--7. "CALOUT,Calibrator output" "0,1,2,3"
|
|
rbitfld.long 0x0 5. "CALCOM,Calibration Complete" "0: Calibration incomplete,1: Calibration Complete"
|
|
newline
|
|
bitfld.long 0x0 3.--4. "RCALI,Resistor Calibration Input" "0,1,2,3"
|
|
bitfld.long 0x0 0. "NOCAL,No Calibration" "0: Auto Calibration,1: No auto Calibration manual calibration."
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "SR,Status Register"
|
|
bitfld.long 0x0 31. "SOFRST,Software reset" "0: No soft reset requested,1: Soft Reset requested by Software. When set it.."
|
|
rgroup.long 0x2C++0x3
|
|
line.long 0x0 "DATAVCR,DATAID VC Report Register"
|
|
bitfld.long 0x0 6.--7. "VCID,VC ID of the currently received data" "0: VC ID 0,1: VC ID 1,2: VC ID 2,3: VC ID 3"
|
|
hexmask.long.byte 0x0 0.--5. 1. "DATAID,Data ID of the data being currently received from the controller"
|
|
group.long 0x34++0x3
|
|
line.long 0x0 "ERRPPREG,Protocol and Packet Error Register"
|
|
bitfld.long 0x0 4. "CRCERR,CRC Error" "0,1"
|
|
bitfld.long 0x0 3. "ERFDAT,Frame data error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "ECCTWO,ECC Two Bit Error" "0,1"
|
|
bitfld.long 0x0 0. "ECCONE,ECC one bit error" "0,1"
|
|
rgroup.long 0x38++0x3
|
|
line.long 0x0 "ERRPOS,Error Position"
|
|
hexmask.long.byte 0x0 0.--4. 1. "ERRPOS,Error Position"
|
|
group.long 0x3C++0x3
|
|
line.long 0x0 "ERPPINTEN,Protocol Packet Error Interrupt Enable"
|
|
bitfld.long 0x0 4. "CRCEIE,CRC Error Interrupt Enable" "0: Interrupt on CRC error disabled,1: Interrupt on CRC error enabled"
|
|
bitfld.long 0x0 3. "ERFDIE,Error Frame Data Interrupt Enable" "0: Interrupt on frame data error disabled,1: Interrupt on frame data error enabled"
|
|
newline
|
|
bitfld.long 0x0 1. "ECCTIE,ECC Two Interrupt Enable" "0: Interrupt on ECC two bit error disabled,1: Interrupt on ECC two bit error enabled"
|
|
bitfld.long 0x0 0. "ECCOIE,ECC One Interrupt Enable" "0: Interrupt on ECC one bit error disabled,1: Interrupt on ECC one bit error enabled"
|
|
group.long 0x44++0xB
|
|
line.long 0x0 "ERRPHY,PHY Error Report Register"
|
|
bitfld.long 0x0 19. "ERCTRL3,Control Error on lane 3" "0,1"
|
|
bitfld.long 0x0 18. "ERSYES3,Synchronization error in Escape mode on lane 3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "ERRESC3,Escape Mode Entry Error on lane 3" "0,1"
|
|
bitfld.long 0x0 16. "NOSYN3,No Synchronization Error Lane 3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "ERRSY3,Error in the synchronization pattern detected by PHY in lane3" "0,1"
|
|
bitfld.long 0x0 14. "ERCTRL2,Control Error on lane 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "ERSYES2,Synchronization error in Escape mode on lane 2" "0,1"
|
|
bitfld.long 0x0 12. "ERRESC2,Escape Mode Entry Error on lane 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "NOSYN2,No Synchronization Error Lane 2" "0,1"
|
|
bitfld.long 0x0 10. "ERRSY2,Error in the synchronization pattern detected by PHY in lane2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "ERCTRL1,Control Error on lane 1" "0,1"
|
|
bitfld.long 0x0 8. "ERSYES1,Synchronization error in Escape mode on lane 1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "ERRESC1,Escape Mode Entry Error on lane 1" "0,1"
|
|
bitfld.long 0x0 6. "NOSYN1,No Synchronization Error Lane 1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "ERRSYN1,Error in the synchronization pattern detected by PHY in lane1" "0,1"
|
|
bitfld.long 0x0 4. "ERCTRL0,Control Error on lane 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "ERSYES0,Synchronization error in Escape mode on lane 0" "0,1"
|
|
bitfld.long 0x0 2. "ERRESC0,Escape Mode Entry Error on lane 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "NOSYN0,No Synchronization Error Lane 0 on HS entry" "0,1"
|
|
bitfld.long 0x0 0. "ERRSY0,Error in the synchronization pattern detected by PHY in lane0" "0,1"
|
|
line.long 0x4 "ERPHYIE,Phy Error Interrupt Enable Register"
|
|
bitfld.long 0x4 19. "ERCLIE3,This field allows interrupt to be enabled when an incorrect line state sequence transition has been observed" "0: Interrupt disabled on control errors encountered..,1: Interrupt enabled on control errors encountered.."
|
|
bitfld.long 0x4 18. "ERSYIE3,This field is used to enable the interrupt when a synchronization error is observed in the escape mode" "0: interrupt disabled on Synchronization errors in..,1: interrupt enabled on Synchronization errors in.."
|
|
newline
|
|
bitfld.long 0x4 17. "ESERIE3,This field is used for enabling interrupt on detection of an escape mode entry error" "0: Interrupt disabled on escape mode entry error on..,1: Interrupt enabled on escape mode entry error on.."
|
|
bitfld.long 0x4 16. "NOSIE3,This field enables interrupt generation when the NOSYN3 field in the error register is set" "0: Interrupt disabled on multibit errors in..,1: Interrupt enabled on multibit errors in.."
|
|
newline
|
|
bitfld.long 0x4 15. "ERSIE3,This field enables interrupt generation when the ERSYN3 field in the error register is set" "0: Interrupt on One bit Synchronization error in..,1: Interrupt on One bit Synchronization error in.."
|
|
bitfld.long 0x4 14. "ERCLIE2,This field allows interrupt to be enabled when an incorrect line state sequence transition has been observed" "0: Interrupt disabled on control errors encountered..,1: Interrupt enabled on control errors encountered.."
|
|
newline
|
|
bitfld.long 0x4 13. "ERSYIE2,This field is used to enable the interrupt when a synchronization error is observed in the escape mode" "0: interrupt disabled on Synchronization errors in..,1: interrupt enabled on Synchronization errors in.."
|
|
bitfld.long 0x4 12. "ESERIE2,This field is used for enabling interrupt on detection of an escape mode entry error" "0: Interrupt disabled on escape mode entry error on..,1: Interrupt enabled on escape mode entry error on.."
|
|
newline
|
|
bitfld.long 0x4 11. "NOSIE2,This field enables interrupt generation when the NOSYN2 field in the error register is set" "0: Interrupt disabled on multibit errors in..,1: Interrupt enabled on multibit errors in.."
|
|
bitfld.long 0x4 10. "ERSIE2,This field enables interrupt generation when the ERSYN2 field in the error register is set" "0: Interrupt on One bit Synchronization error in..,1: Interrupt on One bit Synchronization error in.."
|
|
newline
|
|
bitfld.long 0x4 9. "ERCLIE1,This field allows interrupt to be enabled when an incorrect line state sequence transition has been observed" "0: Interrupt disabled on control errors encountered..,1: Interrupt enabled on control errors encountered.."
|
|
bitfld.long 0x4 8. "ERSYIE1,This field is used to enable the interrupt when a synchronization error is observed in the escape mode" "0: interrupt disabled on Synchronization errors in..,1: interrupt enabled on Synchronization errors in.."
|
|
newline
|
|
bitfld.long 0x4 7. "ESERIE1,This field is used for enabling interrupt on detection of an escape mode entry error" "0: Interrupt disabled on escape mode entry error on..,1: Interrupt enabled on escape mode entry error on.."
|
|
bitfld.long 0x4 6. "NOSIE1,This field enables interrupt generation when the NOSYN1 field in the error register is set" "0: Interrupt disabled on multibit errors in..,1: Interrupt enabled on multibit errors in.."
|
|
newline
|
|
bitfld.long 0x4 5. "ERSIE1,This field enables interrupt generation when the ERSYN1 field in the error register is set" "0: Interrupt on One bit Synchronization error in..,1: Interrupt on One bit Synchronization error in.."
|
|
bitfld.long 0x4 4. "ERCLIE0,This field allows interrupt to be enabled when an incorrect line state sequence transition has been observed" "0: Interrupt disabled on control errors encountered..,1: Interrupt enabled on control errors encountered.."
|
|
newline
|
|
bitfld.long 0x4 3. "ERSYIE0,This field is used to enable the interrupt when a synchronization error is observed in the escape mode" "0: interrupt disabled on Synchronization errors in..,1: interrupt enabled on Synchronization errors in.."
|
|
bitfld.long 0x4 2. "ESERIE0,This field is used for enabling interrupt on detection of an escape mode entry error" "0: Interrupt disabled on escape mode entry error,1: Interrupt enabled on escape mode entry error"
|
|
newline
|
|
bitfld.long 0x4 1. "NOSIE0,This field enables interrupt generation when the NOSYN0 field in the error register is set" "0: Interrupt disabled on multibit errors in..,1: Interrupt enabled on multibit errors in.."
|
|
bitfld.long 0x4 0. "ERSIE0,This field enables interrupt generation when the ERSYN0 field in the error register is set" "0: Interrupt on One bit Synchronization error in..,1: Interrupt on One bit Synchronization error in.."
|
|
line.long 0x8 "RXEN,RX Enable Register"
|
|
bitfld.long 0x8 0. "RXEN,Receive enable" "0: RX disabled,1: RX enabled"
|
|
group.long 0x58++0x3
|
|
line.long 0x0 "ALPHAVAL,Alpha Value Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "ALPHA,Alpha Value"
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x2C)
|
|
group.long ($2+0x5C)++0x3
|
|
line.long 0x0 "SRTPTR$1,Start Pointer for Virtual Channel data in SRAM"
|
|
hexmask.long.tbyte 0x0 0.--21. 1. "SRTPTR,Start Pointer for a Virtual Channel"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x2C)
|
|
group.long ($2+0x60)++0x3
|
|
line.long 0x0 "BUFLLEN$1,Buffer Line Length for Virtual Channel Data"
|
|
hexmask.long.word 0x0 0.--15. 1. "BUFLLEN,Buffer Line length"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x2C)
|
|
group.long ($2+0x64)++0x3
|
|
line.long 0x0 "LINLEN$1,LINE LENGTH for Virtual Channel data"
|
|
hexmask.long.word 0x0 0.--15. 1. "LINLEN,LINE LENGTH of an image line for a particular virtual channel"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x2C)
|
|
group.long ($2+0x68)++0x3
|
|
line.long 0x0 "NUMLINE$1,NUMBER OF LINES ON A VC"
|
|
hexmask.long.word 0x0 0.--9. 1. "NULINE,Number of Lines in Circular buffer for each Virtual Channel"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x2C)
|
|
rgroup.long ($2+0x6C)++0x3
|
|
line.long 0x0 "NXTLIN$1,Next Line In SRAM for a particular VC"
|
|
hexmask.long.word 0x0 0.--9. 1. "NXTLINE,Next line indicator in Cicrcular buffer for a virtual channel"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x2C)
|
|
rgroup.long ($2+0x70)++0x3
|
|
line.long 0x0 "TOTLIN$1,Total Lines received for Virtual Channel"
|
|
hexmask.long.word 0x0 0.--15. 1. "TOTLINE,Total number of image lines received for a virtual channel"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x2C)
|
|
group.long ($2+0x74)++0x3
|
|
line.long 0x0 "EXPCTDL$1,Expected Number of Lines on a VC"
|
|
hexmask.long.word 0x0 0.--15. 1. "EXPLINES,Expected Number Of Lines In a Frame"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x2C)
|
|
group.long ($2+0x78)++0x3
|
|
line.long 0x0 "LPDI$1,Lines Per Done Indication for a VC"
|
|
hexmask.long.byte 0x0 0.--7. 1. "LPDI,Lines Per Done Indication"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x2C)
|
|
rgroup.long ($2+0x7C)++0x3
|
|
line.long 0x0 "STRMDT$1,Stream Data Type for VC"
|
|
hexmask.long.byte 0x0 0.--5. 1. "STRMDT,Stream Data Type"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x2C)
|
|
rgroup.long ($2+0x80)++0x3
|
|
line.long 0x0 "ERRLEN$1,ERROR LENGTH"
|
|
hexmask.long.word 0x0 0.--15. 1. "ERRLEN,Error Length"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x2C)
|
|
rgroup.long ($2+0x84)++0x3
|
|
line.long 0x0 "ERRLINE$1,Error Line"
|
|
hexmask.long.word 0x0 0.--15. 1. "LINNUM,Line Number"
|
|
repeat.end
|
|
group.long 0x10C++0x13
|
|
line.long 0x0 "ENABLECH,Enable Channel"
|
|
bitfld.long 0x0 3. "CH3EN,Channel Three Enable" "0,1"
|
|
bitfld.long 0x0 2. "CH2EN,Channel Two Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CH1EN,Channel One Enable" "0,1"
|
|
bitfld.long 0x0 0. "CHOEN,Enable Virtual Channel Zero" "0,1"
|
|
line.long 0x4 "INTRENVC,Interrupt Enable on Virtual Channel"
|
|
bitfld.long 0x4 15. "LNCNT3IE,Number Of Line Error on Virtual Channel three Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 14. "LINERR3IE,Line Length Error on Virtual Channel Tghree Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "FE3IE,Frame End on Virtual Channel 3 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 12. "FS3IE,Frma eStart on Virtual Channel 3 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "LNCNT2IE,Number Of Line Error on Virtual Channel two Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 10. "LINERR2IE,Line Length Error on Virtual Channel two Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "FE2IE,Frmae End On Virtual Channel One Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 8. "FS2IE,Frame Start On Virtual channel two Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "LNCNT1IE,Line Count Error On Virtual Channel One Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 6. "LINERR1IE,Incorrect Line Length On Virtual Channel One Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "FE1IE,Frame End On Virtual Channel One Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 4. "FS1IE,Frame Start Error on Virtual Channel one Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "LNCNT0IE,Line Count Error On Virtual Channel0 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 2. "LINERR0IE,Line Length Error On Virtual Channel Zero Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "FE0IE,Frame End Virtual channel 0 Inetrrupt Enable" "0,1"
|
|
bitfld.long 0x4 0. "FS0IE,Frame Satrt Virtual Channel0 Interrupt Enable" "0,1"
|
|
line.long 0x8 "INTRSVC,Interrupt Status For Virtual Channel"
|
|
bitfld.long 0x8 15. "LCNTE3,Line Count error on Virtual Channel Three" "0,1"
|
|
bitfld.long 0x8 14. "LLENE3,Line Length Error on Virtual Channel Three" "0,1"
|
|
newline
|
|
bitfld.long 0x8 13. "FE3,Frma end On Virtual Channel Three" "0,1"
|
|
bitfld.long 0x8 12. "FS3,Frame Start on virtual Channel 3" "0,1"
|
|
newline
|
|
bitfld.long 0x8 11. "LCNTE2,Line Count Error On Virtual Channel Two" "0,1"
|
|
bitfld.long 0x8 10. "LLENE2,Line Length error On Virtual Channel Two" "0,1"
|
|
newline
|
|
bitfld.long 0x8 9. "FE2,Frma eEnd On Virtual Channel Two" "0,1"
|
|
bitfld.long 0x8 8. "FS2,Frame Start On Virtual Channel Two" "0,1"
|
|
newline
|
|
bitfld.long 0x8 7. "LCNTE1,Line Count error On Virtual Channel One" "0,1"
|
|
bitfld.long 0x8 6. "LLENE1,Line Length Error On Virtual Channel One" "0,1"
|
|
newline
|
|
bitfld.long 0x8 5. "FE1,Frame End On Virtual Channel 1" "0,1"
|
|
bitfld.long 0x8 4. "FS1,Frame Start on Virtual Channel One" "0,1"
|
|
newline
|
|
bitfld.long 0x8 3. "LCNTE0,Line Count Error On Virtual Channel Zero" "0,1"
|
|
bitfld.long 0x8 2. "LLENE0,Line Length Error Virtual Channel Zero" "0,1"
|
|
newline
|
|
bitfld.long 0x8 1. "FE0,Frmae End On Virtual Channel Zero" "0,1"
|
|
bitfld.long 0x8 0. "FS0,Frame Start On Virtual Channel Zero" "0,1"
|
|
line.long 0xC "EMBEDSP,Embedded Data Start Pointer"
|
|
hexmask.long.tbyte 0xC 0.--21. 1. "STRPTR,Start Pointer for Embedded data"
|
|
line.long 0x10 "EMBEDLEN,Embedded Data Length"
|
|
hexmask.long.tbyte 0x10 0.--21. 1. "LENSTP,Length Of Embedded Data chunk Written to SRAM"
|
|
rgroup.long 0x120++0x3
|
|
line.long 0x0 "EMBEDNP,Embedded Data Next Pointer"
|
|
hexmask.long.tbyte 0x0 0.--21. 1. "NXTPTR,Next Pointer For Embedded Data"
|
|
group.long 0x124++0x3
|
|
line.long 0x0 "EMBEDENB,Embedded Data Enable"
|
|
hexmask.long.byte 0x0 0.--3. 1. "ENABLEVC,Enable Embedded Data reception for Virtual Channel"
|
|
rgroup.long 0x128++0x3
|
|
line.long 0x0 "EMBEDRCVD,Embedded data Received Count"
|
|
bitfld.long 0x0 4. "ERROR,Error in embedded data capture" "0: No error in embedded data capture,1: Error occurred during embedded data capture"
|
|
hexmask.long.byte 0x0 0.--3. 1. "DATARCVD,Embedded data received"
|
|
group.long 0x12C++0x13
|
|
line.long 0x0 "EMBMSTR,Embedded Data Master Channel"
|
|
bitfld.long 0x0 0.--1. "MSTRCHNL,Master Channel Selection For Embedded Data Capture" "0: Virtual Channel 0 acts as master channel,1: Virtual Channel 1 acts as master channel,2: Virtual Channel 2 acts as master channel,3: Virtual Channel 3 acts as master channel"
|
|
line.long 0x4 "EMBEDIE,Embedded Data Interrupt Enable"
|
|
bitfld.long 0x4 1. "EMBIE2,Embedded Data Interrupt Enable 2" "0: Interrupt Disabled on receiving the reuired..,1: Interrupt Enabled on receiving the reuired.."
|
|
bitfld.long 0x4 0. "EMBIE1,Embedded Data Intrerrupt Enable 1" "0: Interrupt Disabled on receiving the required..,1: Interrupt Enabled on receiving the reuired.."
|
|
line.long 0x8 "EMBEDINTS,Embedded Data Interrupt Status Register"
|
|
bitfld.long 0x8 1. "EMBIS1,Embedded Data Interrupt Status 1" "0: Embedded lines not reached required number at..,1: Embedded lines reached required number at the.."
|
|
bitfld.long 0x8 0. "EMBIS0,Embedded Data Interrupt Status 0" "0: Embedded lines not reached required number at..,1: Embedded lines reached required number at the.."
|
|
line.long 0xC "EMBEDIRQ1,Embedded Lines for genertaion of first interrupt"
|
|
hexmask.long.byte 0xC 0.--3. 1. "LINESIRQ1,Embedded lines after which first interrupt is generated"
|
|
line.long 0x10 "EMBEDIRQ2,Embedded Lines after which second interrpt is generated"
|
|
hexmask.long.byte 0x10 0.--3. 1. "LINESIRQ2,Embedded Lines after which second interrupt is generated"
|
|
tree.end
|
|
tree "MIPICSI2_1"
|
|
base ad:0x400A0000
|
|
group.long 0x0++0x1B
|
|
line.long 0x0 "CONC,RX Controller Configuration Register"
|
|
bitfld.long 0x0 0.--1. "NULANE,Number Of active Lanes being used to receive MIPICSI2 Data" "0: One Lane to recieve MIPICSI2 data,1: Two Lanes to Receive MIPICSI2 Data,2: Three Lanes to Receive MIPICSI2 Data,3: Four Lanes to Receive MIPICSI2 Data"
|
|
line.long 0x4 "PHYC,PHY Configuration Register"
|
|
bitfld.long 0x4 1. "PDRX,Power Down Receiver" "0: Power down disabled,1: Power down enabled for all blocks inside PHY"
|
|
bitfld.long 0x4 0. "HSEL,High Speed Select" "0: DPHY clock and data lane 1Gbps,1: DPHY clock and data lane 1.5Gbps"
|
|
line.long 0x8 "CLKCS,Clock Configuration Status Register"
|
|
hexmask.long.byte 0x8 5.--10. 1. "HSSETL,Clock Lane Program RX HS Settle"
|
|
rbitfld.long 0x8 4. "CULPMA,Clock Lane ULPS mark Active State" "0: Clock Lane not in Mark active state,1: Clock Lane is in mark active state"
|
|
newline
|
|
rbitfld.long 0x8 3. "CULPSA,Clock Lane ULPS Active" "0: Clock Lane not in ULPS mode,1: Clock Lane in ULPS mode"
|
|
rbitfld.long 0x8 2. "CSTOP,Clock Lane Stop State" "0: Clock Lane not in stop state,1: Clock Lane in stop state"
|
|
newline
|
|
rbitfld.long 0x8 1. "ULPSC,Clock Lane ULPS" "0: Clock lane not in ultra low power state.,1: Clock Lane in ultra low power state."
|
|
rbitfld.long 0x8 0. "HSRA,High Speed Clock Receive Active" "0: DDR clock not being received on the clock lane..,1: Clock lane is receiving DDR clock"
|
|
line.long 0xC "LAN0CS,D-PHY Lane 0 Configuration Status Register"
|
|
hexmask.long.byte 0xC 6.--11. 1. "D0HSET,Data lane 0 Program RX HS Settle time"
|
|
rbitfld.long 0xC 5. "D0ULMA,Data Lane 0 ULPS Mark Active" "0: Data lane 0 is not in Mark 1 state,1: Data lane 0 is in mark 1 state"
|
|
newline
|
|
rbitfld.long 0xC 4. "D0ULPA,Data lane 0 ULPS Active" "0: Data Lane 0 ULPS not active,1: Data lane 0 ULPS Active"
|
|
rbitfld.long 0xC 3. "D0STOP,Data Lane 0 Stop State" "0: Data lane 0 not in stop state,1: Data lane 0 in stop state."
|
|
newline
|
|
rbitfld.long 0xC 1. "RXACTH,D-PHY Data lane 0 RX active High Speed data" "0: No High Speed data reception ongoing from the..,1: High speed data reception ongoing from lane.."
|
|
rbitfld.long 0xC 0. "RXVALH,Data Lane 0 RX Valid HS" "0: No Valid High Speed data being driven from data..,1: Valid High Speed data being driven from data.."
|
|
line.long 0x10 "LAN1CS,D-PHY Data LANE 1 Configuration Status Register"
|
|
hexmask.long.byte 0x10 6.--11. 1. "D1HSET,D_PHY Data Lane 1 PRG HS Settle time"
|
|
rbitfld.long 0x10 5. "D1ULMA,D_PHY Data Lane 1 ULPS Mark active" "0: Data Lane 1 not in ULPS mark active state,1: Data Lane 1 in ULPS Mark Active state"
|
|
newline
|
|
rbitfld.long 0x10 4. "D1ULPA,D-PHY Data Lane 1 ULPS Active" "0: Data lane not in ULPS state,1: Data Lane 1 in ULPS state"
|
|
rbitfld.long 0x10 3. "D1STOP,D-PHY Data Lane 1 Stop" "0: Data lane 1 is not in stop state,1: Data lane 1 is in stop state"
|
|
newline
|
|
rbitfld.long 0x10 1. "RXACTH,D-PHY Data lane 1 Active HS" "0: Data lane 1 not receiving high speed active data..,1: Data Lane 1 receiving active high speed data on.."
|
|
rbitfld.long 0x10 0. "RXVALH,D-PHY Data lane 1 Receive Valid High speed" "0: No Valid High speed data being driven from data..,1: Valid HS data being transmitted from data lane 1.."
|
|
line.long 0x14 "LAN2CS,LANE 2 Configuration/Status Register"
|
|
hexmask.long.byte 0x14 6.--11. 1. "D2HSET,DPHY Data Lane 2 Sette Time"
|
|
rbitfld.long 0x14 5. "D2ULMA,DPHY Data Lane 2 Mark One state" "0,1"
|
|
newline
|
|
rbitfld.long 0x14 4. "D2ULPA,DPHY Dat aLane 2 in Ulps State" "0,1"
|
|
rbitfld.long 0x14 3. "D2STOP,DPHY Data Lane 2 Stop State" "0,1"
|
|
newline
|
|
rbitfld.long 0x14 1. "RXACTH,DPHY Data Lane 2 High Speed Receive Active" "0,1"
|
|
rbitfld.long 0x14 0. "RXVALH,High Speed Receive Data Valid" "0,1"
|
|
line.long 0x18 "LAN3CS,LANE3 Configuration Status Register"
|
|
hexmask.long.byte 0x18 6.--11. 1. "D3HSET,DPHY Data Lane 3 High Speed Receive Settle Time"
|
|
rbitfld.long 0x18 5. "D3ULMA,DPHY Data Lane 3 Mark One State" "0,1"
|
|
newline
|
|
rbitfld.long 0x18 4. "D3ULPA,DPHY Data Lane 3 ULPS State" "0,1"
|
|
rbitfld.long 0x18 3. "D3STOP,DPHY Data Lane 3 Stop State" "0,1"
|
|
newline
|
|
rbitfld.long 0x18 1. "RXACTH,DPHY Data Lane3 High Speed Receive Active" "0,1"
|
|
rbitfld.long 0x18 0. "RXVALH,High Speed Receive Data Vaild" "0,1"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "RESCS,External Resistor Configuration Status Register"
|
|
rbitfld.long 0x0 6.--7. "CALOUT,Calibrator output" "0,1,2,3"
|
|
rbitfld.long 0x0 5. "CALCOM,Calibration Complete" "0: Calibration incomplete,1: Calibration Complete"
|
|
newline
|
|
bitfld.long 0x0 3.--4. "RCALI,Resistor Calibration Input" "0,1,2,3"
|
|
bitfld.long 0x0 0. "NOCAL,No Calibration" "0: Auto Calibration,1: No auto Calibration manual calibration."
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "SR,Status Register"
|
|
bitfld.long 0x0 31. "SOFRST,Software reset" "0: No soft reset requested,1: Soft Reset requested by Software. When set it.."
|
|
rgroup.long 0x2C++0x3
|
|
line.long 0x0 "DATAVCR,DATAID VC Report Register"
|
|
bitfld.long 0x0 6.--7. "VCID,VC ID of the currently received data" "0: VC ID 0,1: VC ID 1,2: VC ID 2,3: VC ID 3"
|
|
hexmask.long.byte 0x0 0.--5. 1. "DATAID,Data ID of the data being currently received from the controller"
|
|
group.long 0x34++0x3
|
|
line.long 0x0 "ERRPPREG,Protocol and Packet Error Register"
|
|
bitfld.long 0x0 4. "CRCERR,CRC Error" "0,1"
|
|
bitfld.long 0x0 3. "ERFDAT,Frame data error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "ECCTWO,ECC Two Bit Error" "0,1"
|
|
bitfld.long 0x0 0. "ECCONE,ECC one bit error" "0,1"
|
|
rgroup.long 0x38++0x3
|
|
line.long 0x0 "ERRPOS,Error Position"
|
|
hexmask.long.byte 0x0 0.--4. 1. "ERRPOS,Error Position"
|
|
group.long 0x3C++0x3
|
|
line.long 0x0 "ERPPINTEN,Protocol Packet Error Interrupt Enable"
|
|
bitfld.long 0x0 4. "CRCEIE,CRC Error Interrupt Enable" "0: Interrupt on CRC error disabled,1: Interrupt on CRC error enabled"
|
|
bitfld.long 0x0 3. "ERFDIE,Error Frame Data Interrupt Enable" "0: Interrupt on frame data error disabled,1: Interrupt on frame data error enabled"
|
|
newline
|
|
bitfld.long 0x0 1. "ECCTIE,ECC Two Interrupt Enable" "0: Interrupt on ECC two bit error disabled,1: Interrupt on ECC two bit error enabled"
|
|
bitfld.long 0x0 0. "ECCOIE,ECC One Interrupt Enable" "0: Interrupt on ECC one bit error disabled,1: Interrupt on ECC one bit error enabled"
|
|
group.long 0x44++0xB
|
|
line.long 0x0 "ERRPHY,PHY Error Report Register"
|
|
bitfld.long 0x0 19. "ERCTRL3,Control Error on lane 3" "0,1"
|
|
bitfld.long 0x0 18. "ERSYES3,Synchronization error in Escape mode on lane 3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "ERRESC3,Escape Mode Entry Error on lane 3" "0,1"
|
|
bitfld.long 0x0 16. "NOSYN3,No Synchronization Error Lane 3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "ERRSY3,Error in the synchronization pattern detected by PHY in lane3" "0,1"
|
|
bitfld.long 0x0 14. "ERCTRL2,Control Error on lane 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "ERSYES2,Synchronization error in Escape mode on lane 2" "0,1"
|
|
bitfld.long 0x0 12. "ERRESC2,Escape Mode Entry Error on lane 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "NOSYN2,No Synchronization Error Lane 2" "0,1"
|
|
bitfld.long 0x0 10. "ERRSY2,Error in the synchronization pattern detected by PHY in lane2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "ERCTRL1,Control Error on lane 1" "0,1"
|
|
bitfld.long 0x0 8. "ERSYES1,Synchronization error in Escape mode on lane 1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "ERRESC1,Escape Mode Entry Error on lane 1" "0,1"
|
|
bitfld.long 0x0 6. "NOSYN1,No Synchronization Error Lane 1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "ERRSYN1,Error in the synchronization pattern detected by PHY in lane1" "0,1"
|
|
bitfld.long 0x0 4. "ERCTRL0,Control Error on lane 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "ERSYES0,Synchronization error in Escape mode on lane 0" "0,1"
|
|
bitfld.long 0x0 2. "ERRESC0,Escape Mode Entry Error on lane 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "NOSYN0,No Synchronization Error Lane 0 on HS entry" "0,1"
|
|
bitfld.long 0x0 0. "ERRSY0,Error in the synchronization pattern detected by PHY in lane0" "0,1"
|
|
line.long 0x4 "ERPHYIE,Phy Error Interrupt Enable Register"
|
|
bitfld.long 0x4 19. "ERCLIE3,This field allows interrupt to be enabled when an incorrect line state sequence transition has been observed" "0: Interrupt disabled on control errors encountered..,1: Interrupt enabled on control errors encountered.."
|
|
bitfld.long 0x4 18. "ERSYIE3,This field is used to enable the interrupt when a synchronization error is observed in the escape mode" "0: interrupt disabled on Synchronization errors in..,1: interrupt enabled on Synchronization errors in.."
|
|
newline
|
|
bitfld.long 0x4 17. "ESERIE3,This field is used for enabling interrupt on detection of an escape mode entry error" "0: Interrupt disabled on escape mode entry error on..,1: Interrupt enabled on escape mode entry error on.."
|
|
bitfld.long 0x4 16. "NOSIE3,This field enables interrupt generation when the NOSYN3 field in the error register is set" "0: Interrupt disabled on multibit errors in..,1: Interrupt enabled on multibit errors in.."
|
|
newline
|
|
bitfld.long 0x4 15. "ERSIE3,This field enables interrupt generation when the ERSYN3 field in the error register is set" "0: Interrupt on One bit Synchronization error in..,1: Interrupt on One bit Synchronization error in.."
|
|
bitfld.long 0x4 14. "ERCLIE2,This field allows interrupt to be enabled when an incorrect line state sequence transition has been observed" "0: Interrupt disabled on control errors encountered..,1: Interrupt enabled on control errors encountered.."
|
|
newline
|
|
bitfld.long 0x4 13. "ERSYIE2,This field is used to enable the interrupt when a synchronization error is observed in the escape mode" "0: interrupt disabled on Synchronization errors in..,1: interrupt enabled on Synchronization errors in.."
|
|
bitfld.long 0x4 12. "ESERIE2,This field is used for enabling interrupt on detection of an escape mode entry error" "0: Interrupt disabled on escape mode entry error on..,1: Interrupt enabled on escape mode entry error on.."
|
|
newline
|
|
bitfld.long 0x4 11. "NOSIE2,This field enables interrupt generation when the NOSYN2 field in the error register is set" "0: Interrupt disabled on multibit errors in..,1: Interrupt enabled on multibit errors in.."
|
|
bitfld.long 0x4 10. "ERSIE2,This field enables interrupt generation when the ERSYN2 field in the error register is set" "0: Interrupt on One bit Synchronization error in..,1: Interrupt on One bit Synchronization error in.."
|
|
newline
|
|
bitfld.long 0x4 9. "ERCLIE1,This field allows interrupt to be enabled when an incorrect line state sequence transition has been observed" "0: Interrupt disabled on control errors encountered..,1: Interrupt enabled on control errors encountered.."
|
|
bitfld.long 0x4 8. "ERSYIE1,This field is used to enable the interrupt when a synchronization error is observed in the escape mode" "0: interrupt disabled on Synchronization errors in..,1: interrupt enabled on Synchronization errors in.."
|
|
newline
|
|
bitfld.long 0x4 7. "ESERIE1,This field is used for enabling interrupt on detection of an escape mode entry error" "0: Interrupt disabled on escape mode entry error on..,1: Interrupt enabled on escape mode entry error on.."
|
|
bitfld.long 0x4 6. "NOSIE1,This field enables interrupt generation when the NOSYN1 field in the error register is set" "0: Interrupt disabled on multibit errors in..,1: Interrupt enabled on multibit errors in.."
|
|
newline
|
|
bitfld.long 0x4 5. "ERSIE1,This field enables interrupt generation when the ERSYN1 field in the error register is set" "0: Interrupt on One bit Synchronization error in..,1: Interrupt on One bit Synchronization error in.."
|
|
bitfld.long 0x4 4. "ERCLIE0,This field allows interrupt to be enabled when an incorrect line state sequence transition has been observed" "0: Interrupt disabled on control errors encountered..,1: Interrupt enabled on control errors encountered.."
|
|
newline
|
|
bitfld.long 0x4 3. "ERSYIE0,This field is used to enable the interrupt when a synchronization error is observed in the escape mode" "0: interrupt disabled on Synchronization errors in..,1: interrupt enabled on Synchronization errors in.."
|
|
bitfld.long 0x4 2. "ESERIE0,This field is used for enabling interrupt on detection of an escape mode entry error" "0: Interrupt disabled on escape mode entry error,1: Interrupt enabled on escape mode entry error"
|
|
newline
|
|
bitfld.long 0x4 1. "NOSIE0,This field enables interrupt generation when the NOSYN0 field in the error register is set" "0: Interrupt disabled on multibit errors in..,1: Interrupt enabled on multibit errors in.."
|
|
bitfld.long 0x4 0. "ERSIE0,This field enables interrupt generation when the ERSYN0 field in the error register is set" "0: Interrupt on One bit Synchronization error in..,1: Interrupt on One bit Synchronization error in.."
|
|
line.long 0x8 "RXEN,RX Enable Register"
|
|
bitfld.long 0x8 0. "RXEN,Receive enable" "0: RX disabled,1: RX enabled"
|
|
group.long 0x58++0x3
|
|
line.long 0x0 "ALPHAVAL,Alpha Value Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "ALPHA,Alpha Value"
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x2C)
|
|
group.long ($2+0x5C)++0x3
|
|
line.long 0x0 "SRTPTR$1,Start Pointer for Virtual Channel data in SRAM"
|
|
hexmask.long.tbyte 0x0 0.--21. 1. "SRTPTR,Start Pointer for a Virtual Channel"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x2C)
|
|
group.long ($2+0x60)++0x3
|
|
line.long 0x0 "BUFLLEN$1,Buffer Line Length for Virtual Channel Data"
|
|
hexmask.long.word 0x0 0.--15. 1. "BUFLLEN,Buffer Line length"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x2C)
|
|
group.long ($2+0x64)++0x3
|
|
line.long 0x0 "LINLEN$1,LINE LENGTH for Virtual Channel data"
|
|
hexmask.long.word 0x0 0.--15. 1. "LINLEN,LINE LENGTH of an image line for a particular virtual channel"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x2C)
|
|
group.long ($2+0x68)++0x3
|
|
line.long 0x0 "NUMLINE$1,NUMBER OF LINES ON A VC"
|
|
hexmask.long.word 0x0 0.--9. 1. "NULINE,Number of Lines in Circular buffer for each Virtual Channel"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x2C)
|
|
rgroup.long ($2+0x6C)++0x3
|
|
line.long 0x0 "NXTLIN$1,Next Line In SRAM for a particular VC"
|
|
hexmask.long.word 0x0 0.--9. 1. "NXTLINE,Next line indicator in Cicrcular buffer for a virtual channel"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x2C)
|
|
rgroup.long ($2+0x70)++0x3
|
|
line.long 0x0 "TOTLIN$1,Total Lines received for Virtual Channel"
|
|
hexmask.long.word 0x0 0.--15. 1. "TOTLINE,Total number of image lines received for a virtual channel"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x2C)
|
|
group.long ($2+0x74)++0x3
|
|
line.long 0x0 "EXPCTDL$1,Expected Number of Lines on a VC"
|
|
hexmask.long.word 0x0 0.--15. 1. "EXPLINES,Expected Number Of Lines In a Frame"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x2C)
|
|
group.long ($2+0x78)++0x3
|
|
line.long 0x0 "LPDI$1,Lines Per Done Indication for a VC"
|
|
hexmask.long.byte 0x0 0.--7. 1. "LPDI,Lines Per Done Indication"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x2C)
|
|
rgroup.long ($2+0x7C)++0x3
|
|
line.long 0x0 "STRMDT$1,Stream Data Type for VC"
|
|
hexmask.long.byte 0x0 0.--5. 1. "STRMDT,Stream Data Type"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x2C)
|
|
rgroup.long ($2+0x80)++0x3
|
|
line.long 0x0 "ERRLEN$1,ERROR LENGTH"
|
|
hexmask.long.word 0x0 0.--15. 1. "ERRLEN,Error Length"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x2C)
|
|
rgroup.long ($2+0x84)++0x3
|
|
line.long 0x0 "ERRLINE$1,Error Line"
|
|
hexmask.long.word 0x0 0.--15. 1. "LINNUM,Line Number"
|
|
repeat.end
|
|
group.long 0x10C++0x13
|
|
line.long 0x0 "ENABLECH,Enable Channel"
|
|
bitfld.long 0x0 3. "CH3EN,Channel Three Enable" "0,1"
|
|
bitfld.long 0x0 2. "CH2EN,Channel Two Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "CH1EN,Channel One Enable" "0,1"
|
|
bitfld.long 0x0 0. "CHOEN,Enable Virtual Channel Zero" "0,1"
|
|
line.long 0x4 "INTRENVC,Interrupt Enable on Virtual Channel"
|
|
bitfld.long 0x4 15. "LNCNT3IE,Number Of Line Error on Virtual Channel three Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 14. "LINERR3IE,Line Length Error on Virtual Channel Tghree Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "FE3IE,Frame End on Virtual Channel 3 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 12. "FS3IE,Frma eStart on Virtual Channel 3 Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "LNCNT2IE,Number Of Line Error on Virtual Channel two Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 10. "LINERR2IE,Line Length Error on Virtual Channel two Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "FE2IE,Frmae End On Virtual Channel One Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 8. "FS2IE,Frame Start On Virtual channel two Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "LNCNT1IE,Line Count Error On Virtual Channel One Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 6. "LINERR1IE,Incorrect Line Length On Virtual Channel One Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "FE1IE,Frame End On Virtual Channel One Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 4. "FS1IE,Frame Start Error on Virtual Channel one Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "LNCNT0IE,Line Count Error On Virtual Channel0 Interrupt Enable" "0,1"
|
|
bitfld.long 0x4 2. "LINERR0IE,Line Length Error On Virtual Channel Zero Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "FE0IE,Frame End Virtual channel 0 Inetrrupt Enable" "0,1"
|
|
bitfld.long 0x4 0. "FS0IE,Frame Satrt Virtual Channel0 Interrupt Enable" "0,1"
|
|
line.long 0x8 "INTRSVC,Interrupt Status For Virtual Channel"
|
|
bitfld.long 0x8 15. "LCNTE3,Line Count error on Virtual Channel Three" "0,1"
|
|
bitfld.long 0x8 14. "LLENE3,Line Length Error on Virtual Channel Three" "0,1"
|
|
newline
|
|
bitfld.long 0x8 13. "FE3,Frma end On Virtual Channel Three" "0,1"
|
|
bitfld.long 0x8 12. "FS3,Frame Start on virtual Channel 3" "0,1"
|
|
newline
|
|
bitfld.long 0x8 11. "LCNTE2,Line Count Error On Virtual Channel Two" "0,1"
|
|
bitfld.long 0x8 10. "LLENE2,Line Length error On Virtual Channel Two" "0,1"
|
|
newline
|
|
bitfld.long 0x8 9. "FE2,Frma eEnd On Virtual Channel Two" "0,1"
|
|
bitfld.long 0x8 8. "FS2,Frame Start On Virtual Channel Two" "0,1"
|
|
newline
|
|
bitfld.long 0x8 7. "LCNTE1,Line Count error On Virtual Channel One" "0,1"
|
|
bitfld.long 0x8 6. "LLENE1,Line Length Error On Virtual Channel One" "0,1"
|
|
newline
|
|
bitfld.long 0x8 5. "FE1,Frame End On Virtual Channel 1" "0,1"
|
|
bitfld.long 0x8 4. "FS1,Frame Start on Virtual Channel One" "0,1"
|
|
newline
|
|
bitfld.long 0x8 3. "LCNTE0,Line Count Error On Virtual Channel Zero" "0,1"
|
|
bitfld.long 0x8 2. "LLENE0,Line Length Error Virtual Channel Zero" "0,1"
|
|
newline
|
|
bitfld.long 0x8 1. "FE0,Frmae End On Virtual Channel Zero" "0,1"
|
|
bitfld.long 0x8 0. "FS0,Frame Start On Virtual Channel Zero" "0,1"
|
|
line.long 0xC "EMBEDSP,Embedded Data Start Pointer"
|
|
hexmask.long.tbyte 0xC 0.--21. 1. "STRPTR,Start Pointer for Embedded data"
|
|
line.long 0x10 "EMBEDLEN,Embedded Data Length"
|
|
hexmask.long.tbyte 0x10 0.--21. 1. "LENSTP,Length Of Embedded Data chunk Written to SRAM"
|
|
rgroup.long 0x120++0x3
|
|
line.long 0x0 "EMBEDNP,Embedded Data Next Pointer"
|
|
hexmask.long.tbyte 0x0 0.--21. 1. "NXTPTR,Next Pointer For Embedded Data"
|
|
group.long 0x124++0x3
|
|
line.long 0x0 "EMBEDENB,Embedded Data Enable"
|
|
hexmask.long.byte 0x0 0.--3. 1. "ENABLEVC,Enable Embedded Data reception for Virtual Channel"
|
|
rgroup.long 0x128++0x3
|
|
line.long 0x0 "EMBEDRCVD,Embedded data Received Count"
|
|
bitfld.long 0x0 4. "ERROR,Error in embedded data capture" "0: No error in embedded data capture,1: Error occurred during embedded data capture"
|
|
hexmask.long.byte 0x0 0.--3. 1. "DATARCVD,Embedded data received"
|
|
group.long 0x12C++0x13
|
|
line.long 0x0 "EMBMSTR,Embedded Data Master Channel"
|
|
bitfld.long 0x0 0.--1. "MSTRCHNL,Master Channel Selection For Embedded Data Capture" "0: Virtual Channel 0 acts as master channel,1: Virtual Channel 1 acts as master channel,2: Virtual Channel 2 acts as master channel,3: Virtual Channel 3 acts as master channel"
|
|
line.long 0x4 "EMBEDIE,Embedded Data Interrupt Enable"
|
|
bitfld.long 0x4 1. "EMBIE2,Embedded Data Interrupt Enable 2" "0: Interrupt Disabled on receiving the reuired..,1: Interrupt Enabled on receiving the reuired.."
|
|
bitfld.long 0x4 0. "EMBIE1,Embedded Data Intrerrupt Enable 1" "0: Interrupt Disabled on receiving the required..,1: Interrupt Enabled on receiving the reuired.."
|
|
line.long 0x8 "EMBEDINTS,Embedded Data Interrupt Status Register"
|
|
bitfld.long 0x8 1. "EMBIS1,Embedded Data Interrupt Status 1" "0: Embedded lines not reached required number at..,1: Embedded lines reached required number at the.."
|
|
bitfld.long 0x8 0. "EMBIS0,Embedded Data Interrupt Status 0" "0: Embedded lines not reached required number at..,1: Embedded lines reached required number at the.."
|
|
line.long 0xC "EMBEDIRQ1,Embedded Lines for genertaion of first interrupt"
|
|
hexmask.long.byte 0xC 0.--3. 1. "LINESIRQ1,Embedded lines after which first interrupt is generated"
|
|
line.long 0x10 "EMBEDIRQ2,Embedded Lines after which second interrpt is generated"
|
|
hexmask.long.byte 0x10 0.--3. 1. "LINESIRQ2,Embedded Lines after which second interrupt is generated"
|
|
tree.end
|
|
tree.end
|
|
tree "MMDC (Multi Mode DDR Controller)"
|
|
base ad:0x0
|
|
tree "MMDC_0"
|
|
base ad:0x40036000
|
|
group.long 0x0++0x23
|
|
line.long 0x0 "MDCTL,MMDC Core Control Register"
|
|
bitfld.long 0x0 31. "SDE_0,MMDC Enable CS0" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 30. "SDE_1,MMDC Enable CS1" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 24.--26. "ROW,Row Address Width" "0: 11 bits Row,1: 12 bits Row,2: 13 bits Row,3: 14 bits Row,4: 15 bits Row,5: 16 bits Row,?,?"
|
|
newline
|
|
bitfld.long 0x0 20.--22. "COL,Column Address Width" "0: 9 bits column,1: 10 bits column,2: 11 bits column,3: 8 bits column,4: 12 bits column,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 19. "BL,Burst Length" "0: Burst Length 4 is used,1: Burst Length 8 is used"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "DSIZ,DDR data bus size. This field determines the size of the data bus of the DDR memory" "0: 16-bit data bus,1: 32-bit data bus,?,?"
|
|
line.long 0x4 "MDPDC,MMDC Core Power Down Control Register"
|
|
bitfld.long 0x4 28.--30. "PRCT_1,Precharge Timer - Chip Select 1" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "PRCT_0,Precharge Timer - Chip Select 0" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 16.--18. "tCKE,CKE minimum pulse width. This field determines the minimum pulse width of CKE." "0: 1 cycle,1: 2 cycles,?,?,?,?,6: 7 cycles,7: 8 cycles"
|
|
newline
|
|
hexmask.long.byte 0x4 12.--15. 1. "PWDT_1,Power Down Timer - Chip Select 1"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--11. 1. "PWDT_0,Power Down Timer - Chip Select 0"
|
|
newline
|
|
bitfld.long 0x4 7. "SLOW_PD,Slow/fast power down" "0: Fast mode.,1: Slow mode."
|
|
newline
|
|
bitfld.long 0x4 6. "BOTH_CS_PD,Parallel power down entry to both chip selects" "0: Each chip select can enter power down..,1: Chip selects can enter power down only if the.."
|
|
newline
|
|
bitfld.long 0x4 3.--5. "tCKSRX,Valid clock cycles before self-refresh exit" "0: 0 cycle,1: 1 cycles,?,?,?,?,6: 6 cycles,7: 7 cycles"
|
|
newline
|
|
bitfld.long 0x4 0.--2. "tCKSRE,Valid clock cycles after self-refresh entry" "0: 0 cycle,1: 1 cycles,?,?,?,?,6: 6cycles,7: 7cycles"
|
|
line.long 0x8 "MDOTC,MMDC Core ODT Timing Control Register"
|
|
bitfld.long 0x8 27.--29. "tAOFPD,Asynchronous RTT turn-off delay (power down with DLL frozen)" "0: 1 cycle,1: 2 cycles,?,?,?,?,6: 7 cycles,7: 8 cycles"
|
|
newline
|
|
bitfld.long 0x8 24.--26. "tAONPD,Asynchronous RTT turn-on delay (power down with DLL frozen)" "0: 1 cycle,1: 2 cycles,?,?,?,?,6: 7 cycles,7: 8 cycles"
|
|
newline
|
|
hexmask.long.byte 0x8 20.--23. 1. "tANPD,Asynchronous ODT to power down entry delay"
|
|
newline
|
|
hexmask.long.byte 0x8 16.--19. 1. "tAXPD,Asynchronous ODT to power down exit delay"
|
|
newline
|
|
bitfld.long 0x8 12.--14. "tODTLon,ODT turn on latency" "0: - 0x1 Reserved,?,2: 2 cycles,3: 3 cycles,4: 4 cycles,5: 5 cycles,6: 6 cycles,?"
|
|
newline
|
|
hexmask.long.byte 0x8 4.--8. 1. "tODT_idle_off,ODT turn off latency"
|
|
line.long 0xC "MDCFG0,MMDC Core Timing Configuration Register 0"
|
|
hexmask.long.byte 0xC 24.--31. 1. "tRFC,Refresh command to Active or Refresh command time"
|
|
newline
|
|
hexmask.long.byte 0xC 16.--23. 1. "tXS,Exit self refresh to non READ command"
|
|
newline
|
|
bitfld.long 0xC 13.--15. "tXP,Exit power down with DLL-on to any valid command" "0: 1 cycle,1: 2 cycles,?,?,?,?,6: 7 cycles,7: 8 cycles"
|
|
newline
|
|
hexmask.long.byte 0xC 9.--12. 1. "tXPDLL,Exit precharge power down with DLL frozen to commands requiring DLL"
|
|
newline
|
|
hexmask.long.byte 0xC 4.--8. 1. "tFAW,Four Active Window (all banks)"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--3. 1. "tCL,CAS Read Latency"
|
|
line.long 0x10 "MDCFG1,MMDC Core Timing Configuration Register 1"
|
|
bitfld.long 0x10 29.--31. "tRCD,Active command to internal read or write delay time (same bank)" "0: 1 clock,1: 2 clocks,2: 3 clocks,3: 4 clocks,4: 5 clocks,5: 6 clocks,6: 7 clocks,7: 8 clocks"
|
|
newline
|
|
bitfld.long 0x10 26.--28. "tRP,Precharge command period (same bank)" "0: 1 clock,1: 2 clocks,2: 3 clocks,3: 4 clocks,4: 5 clocks,5: 6 clocks,6: 7 clocks,7: 8 clocks"
|
|
newline
|
|
hexmask.long.byte 0x10 21.--25. 1. "tRC,Active to Active or Refresh command period (same bank)"
|
|
newline
|
|
hexmask.long.byte 0x10 16.--20. 1. "tRAS,Active to Precharge command period (same bank)"
|
|
newline
|
|
bitfld.long 0x10 15. "tRPA,Precharge-all command period" "0: Will be equal to: tRP.,1: Will be equal to: tRP+1."
|
|
newline
|
|
bitfld.long 0x10 9.--11. "tWR,WRITE recovery time (same bank)" "0: 1cycle,1: 2cycles,2: 3cycles,3: 4cycles,4: 5cycles,5: 6cycles,6: 7cycles,7: 8 cycles"
|
|
newline
|
|
hexmask.long.byte 0x10 5.--8. 1. "tMRD,Mode Register Set command cycle (all banks)"
|
|
newline
|
|
bitfld.long 0x10 0.--2. "tCWL,CAS Write Latency" "0: 2cycles ( DDR3) 1 cycle (LPDDR2),1: 3cycles ( DDR3) 2 cycles (LPDDR2),2: 4cycles ( DDR3) 3 cycles (LPDDR2),3: 5cycles ( DDR3) 4 cycles (LPDDR2),4: 6cycles ( DDR3) 5 cycles (LPDDR2),5: 7cycles ( DDR3) 6 cycles (LPDDR2),6: 8cycles ( DDR3) 7 cycles (LPDDR2),?"
|
|
line.long 0x14 "MDCFG2,MMDC Core Timing Configuration Register 2"
|
|
hexmask.long.word 0x14 16.--24. 1. "tDLLK,DLL locking time"
|
|
newline
|
|
bitfld.long 0x14 6.--8. "tRTP,Internal READ command to Precharge command delay (same bank)" "0: 1cycle,1: 2cycles,2: 3cycles,3: 4cycles,4: 5cycles,5: 6cycles,6: 7cycles,7: 8 cycles"
|
|
newline
|
|
bitfld.long 0x14 3.--5. "tWTR,Internal WRITE to READ command delay (same bank)" "0: 1cycle,1: 2cycles,2: 3cycles,3: 4cycles,4: 5cycles,5: 6cycles,6: 7cycles,7: 8 cycles"
|
|
newline
|
|
bitfld.long 0x14 0.--2. "tRRD,Active to Active command period (all banks)" "0: 1cycle,1: 2cycles,2: 3cycles,3: 4cycles,4: 5cycles,5: 6cycles,6: 7cycles,?"
|
|
line.long 0x18 "MDMISC,MMDC Core Miscellaneous Register"
|
|
rbitfld.long 0x18 31. "CS0_RDY,External status device on CS0" "0: Device in wake-up period.,1: Device is ready for initialization."
|
|
newline
|
|
rbitfld.long 0x18 30. "CS1_RDY,External status device on CS1" "0: Device in wake-up period.,1: Device is ready for initialization."
|
|
newline
|
|
bitfld.long 0x18 20. "CALIB_PER_CS,Number of chip-select for calibration process" "0: Calibration is targetted to CS0,1: Calibration is targetted to CS1"
|
|
newline
|
|
bitfld.long 0x18 19. "ADDR_MIRROR,Address mirroring" "0: Address mirroring disabled.,1: Address mirroring enabled."
|
|
newline
|
|
bitfld.long 0x18 18. "LHD,Latency hiding disable" "0: Latency hiding on.,1: Latency hiding disable."
|
|
newline
|
|
bitfld.long 0x18 16.--17. "WALAT,Write Additional latency" "0: No additional latency required.,1: 1 cycle additional delay,2: 2 cycles additional delay,3: 3 cycles additional delay"
|
|
newline
|
|
bitfld.long 0x18 12. "BI_ON,Bank Interleaving On" "0: Banks are not interleaved and address will be..,1: Banks are interleaved and address will be.."
|
|
newline
|
|
bitfld.long 0x18 11. "LPDDR2_S2,LPDDR2 S2 device type indication" "0: LPDDR2-S4 device is used.,1: LPDDR2-S2 device is used."
|
|
newline
|
|
bitfld.long 0x18 9.--10. "MIF3_MODE,Command prediction working mode" "0: Disable prediction.,1: Enable prediction based on : Valid access on..,2: Enable prediction based on: Valid access on..,3: Enable prediction based on: Valid access on.."
|
|
newline
|
|
bitfld.long 0x18 6.--8. "RALAT,Read Additional Latency" "0: no additional latency.,1: 1 cycle additional latency.,2: 2 cycles additional latency.,3: 3 cycles additional latency.,4: 4 cycles additional latency.,5: 5 cycles additional latency.,6: 6 cycles additional latency.,7: 7 cycles additional latency."
|
|
newline
|
|
bitfld.long 0x18 5. "DDR_4_BANK,Number of banks per DDR device" "0: 8 banks device is being used. (Default),1: 4 banks device is being used"
|
|
newline
|
|
bitfld.long 0x18 3.--4. "DDR_TYPE,DDR TYPE. This field determines the type of the external DDR device." "0: DDR3 device is used. (Default),1: LPDDR2 device is used.,?,?"
|
|
newline
|
|
bitfld.long 0x18 1. "RST,Software Reset" "0: Do nothing.,1: Assert reset to the MMDC."
|
|
line.long 0x1C "MDSCR,MMDC Core Special Command Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. "CMD_ADDR_MSB_MR_OP,Command/Address MSB"
|
|
newline
|
|
hexmask.long.byte 0x1C 16.--23. 1. "CMD_ADDR_LSB_MR_ADDR,Command/Address LSB"
|
|
newline
|
|
bitfld.long 0x1C 15. "CON_REQ,Configuration request" "0: No request to configure MMDC.,1: A request to configure MMDC is valid"
|
|
newline
|
|
rbitfld.long 0x1C 14. "CON_ACK,Configuration acknowledge" "0: Configuration of MMDC registers is forbidden.,1: Configuration of MMDC registers is permitted."
|
|
newline
|
|
rbitfld.long 0x1C 10. "MRR_READ_DATA_VALID,MRR read data valid" "0: Cleared upon the assertion of MRR command,1: Set after MRR data is valid and stored at MDMRR.."
|
|
newline
|
|
bitfld.long 0x1C 9. "WL_EN,DQS pads direction" "0: Exit write leveling mode or stay in normal mode.,1: Write leveling entry command was sent."
|
|
newline
|
|
bitfld.long 0x1C 4.--6. "CMD,Command" "0: Normal operation,1: Precharge all command is sent independently of..,2: Auto-Refresh Command (set correct CMD_CS).,3: Load Mode Register Command ( DDR3 set correct..,4: ZQ calibration ( DDR3 set correct CMD_CS..,5: Precharge all only if banks open (set correct..,6: MRR command (LPDDR2 set correct CMD_CS MR_ADDR),?"
|
|
newline
|
|
bitfld.long 0x1C 3. "CMD_CS,Chip Select. This field determines which chip select the command is targeted to" "0: to Chip-select 0,1: to Chip-select 1"
|
|
newline
|
|
bitfld.long 0x1C 0.--2. "CMD_BA,Bank Address" "0: bank address 0,1: bank address 1,2: bank address 2,?,?,?,?,7: bank address 7"
|
|
line.long 0x20 "MDREF,MMDC Core Refresh Control Register"
|
|
hexmask.long.word 0x20 16.--31. 1. "REF_CNT,Refresh Counter at DDR clock period If REF_SEL equals '2' a refresh cycle will begin every amount of DDR cycles configured in this field"
|
|
newline
|
|
bitfld.long 0x20 14.--15. "REF_SEL,Refresh Selector. This bit selects the source of the clock that will trigger each refresh cycle:" "0: Periodic refresh cycles will be triggered in..,1: Periodic refresh cycles will be triggered in..,?,?"
|
|
newline
|
|
bitfld.long 0x20 11.--13. "REFR,Refresh Rate" "0: 1 refresh,1: 2 refreshes,2: 3 refreshes,3: 4 refreshes,4: 5 refreshes,5: 6 refreshes,6: 7 refreshes,7: 8 refreshes"
|
|
newline
|
|
bitfld.long 0x20 0. "START_REF,Manual start of refresh cycle" "0: Do nothing.,1: Start a refresh cycle."
|
|
group.long 0x2C++0x7
|
|
line.long 0x0 "MDRWD,MMDC Core Read/Write Command Delay Register"
|
|
hexmask.long.word 0x0 16.--28. 1. "tDAI,Device auto initialization period.(maximum) This field is relevant only to LPDDR2 mode"
|
|
newline
|
|
bitfld.long 0x0 12.--14. "RTW_SAME,Read to write delay for the same chip-select" "0: 0 cycle,1: 1 cycle,2: 2 cycles (Default),3: 3 cycles,4: 4 cycles,5: 5 cycles,6: 6 cycles,7: 7 cycles"
|
|
newline
|
|
bitfld.long 0x0 9.--11. "WTR_DIFF,Write to read delay for different chip-select" "0: 0 cycle,1: 1 cycle,2: 2 cycles,3: 3 cycles (Default),4: 4 cycles,5: 5 cycles,6: 6 cycles,7: 7 cycles"
|
|
newline
|
|
bitfld.long 0x0 6.--8. "WTW_DIFF,Write to write delay for different chip-select" "0: 0 cycle,1: 1 cycle,2: 2 cycles,3: 3 cycles (Default),4: 4 cycles,5: 5 cycles,6: 6 cycles,7: 7 cycles"
|
|
newline
|
|
bitfld.long 0x0 3.--5. "RTW_DIFF,Read to write delay for different chip-select" "0: 0 cycle,1: 1 cycle,2: 2 cycles (Default),3: 3 cycles,4: 4 cycles,5: 5 cycles,6: 6 cycles,7: 7 cycles"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "RTR_DIFF,Read to read delay for different chip-select" "0: 0 cycle,1: 1 cycle,2: 2 cycles (Default),3: 3 cycles,4: 4 cycles,5: 5 cycles,6: 6 cycles,7: 7 cycles"
|
|
line.long 0x4 "MDOR,MMDC Core Out of Reset Delays Register"
|
|
hexmask.long.byte 0x4 16.--23. 1. "tXPR,DDR3: CKE HIGH to a valid command"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--13. 1. "SDE_to_RST,DDR3: Time from SDE enable until DDR reset# is high"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--5. 1. "RST_to_CKE,DDR3: Time from SDE enable to CKE rise"
|
|
rgroup.long 0x34++0x3
|
|
line.long 0x0 "MDMRR,MMDC Core MRR Data Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "MRR_READ_DATA3,MRR DATA that arrived on DQ[31:24]"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--23. 1. "MRR_READ_DATA2,MRR DATA that arrived on DQ[23:16]"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "MRR_READ_DATA1,MRR DATA that arrived on DQ[15:8]"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "MRR_READ_DATA0,MRR DATA that arrived on DQ[7:0]"
|
|
group.long 0x38++0xB
|
|
line.long 0x0 "MDCFG3LP,MMDC Core Timing Configuration Register 3"
|
|
hexmask.long.byte 0x0 16.--21. 1. "RC_LP,Active to Active or Refresh command period (same bank)"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "tRCD_LP,Active command to internal read or write delay time (same bank)"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--7. 1. "tRPpb_LP,Precharge (per bank) command period (same bank). (This field is valid only for LPDDR2 memories)"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "tRPab_LP,Precharge (all banks) command period. (This field is valid only for LPDDR2 memories)"
|
|
line.long 0x4 "MDMR4,MMDC Core MR4 Derating Register"
|
|
bitfld.long 0x4 8. "tRRD_DE,tRRD derating value." "0: Original tRRD is used.,1: tRRD is derated in 1 cycle."
|
|
newline
|
|
bitfld.long 0x4 7. "tRP_DE,tRP derating value." "0: Original tRP is used.,1: tRP is derated in 1 cycle."
|
|
newline
|
|
bitfld.long 0x4 6. "tRAS_DE,tRAS derating value." "0: Original tRAS is used.,1: tRAS is derated in 1 cycle."
|
|
newline
|
|
bitfld.long 0x4 5. "tRC_DE,tRC derating value." "0: Original tRC is used.,1: tRC is derated in 1 cycle."
|
|
newline
|
|
bitfld.long 0x4 4. "tRCD_DE,tRCD derating value." "0: Original tRCD is used.,1: tRCD is derated in 1 cycle."
|
|
newline
|
|
rbitfld.long 0x4 1. "UPDATE_DE_ACK,Update Derated Values Acknowledge" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "UPDATE_DE_REQ,Update Derated Values Request" "0: Do nothing.,1: Request to update the following values: tRRD.."
|
|
line.long 0x8 "MDASP,MMDC Core Address Space Partition Register"
|
|
hexmask.long.byte 0x8 0.--6. 1. "CS0_END,CS0_END"
|
|
group.long 0x400++0x17
|
|
line.long 0x0 "MAARCR,MMDC Core AXI Reordering Control Regsiter"
|
|
bitfld.long 0x0 31. "ARCR_SEC_ERR_LOCK,Once set this bit locks ARCR_SEC_ERR_EN and prevents from its updating" "0: ARCR_SEC_ERR_EN is unlocked so can be updated..,1: ARCR_SEC_ERR_EN is locked so it can't be updated"
|
|
newline
|
|
bitfld.long 0x0 30. "ARCR_SEC_ERR_EN,This bit defines whether security read/write access violation result in SLV Error response or in OKAY response Default value is 0x1 - encoding 1(response is SLV Error rresp/bresp=2'b10)" "0: security violation results in OKAY response..,1: security violation results in SLAVE Error.."
|
|
newline
|
|
bitfld.long 0x0 28. "ARCR_EXC_ERR_EN,This bit defines whether exclusive read/write access violation of AXI 6" "0: violation of AXI exclusive rules (6.2.4) result..,1: violation of AXI exclusive rules (6.2.4) result.."
|
|
newline
|
|
bitfld.long 0x0 24. "ARCR_RCH_EN,This bit defines whether Real time channel is activated and bypassed all other pending accesses So accesses with QoS=='F' will be granted the highest prioritiy in the optimization/reordering mechanism Default value is 0x1 - encoding 1.." "0: normal prioritization no bypassing,1: accesses with QoS=='F' bypass the arbitration"
|
|
newline
|
|
bitfld.long 0x0 20.--22. "ARCR_PAG_HIT,ARCR Page Hit Rate" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 16.--18. "ARCR_ACC_HIT,ARCR Access Hit Rate" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "ARCR_DYN_JMP,ARCR Dynamic Jump"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--7. 1. "ARCR_DYN_MAX,ARCR Dynamic Maximum"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "ARCR_GUARD,ARCR Guard"
|
|
line.long 0x4 "MAPSR,MMDC Core Power Saving Control and Status Register"
|
|
rbitfld.long 0x4 25. "DVACK,General DVFS acknowledge" "0,1"
|
|
newline
|
|
rbitfld.long 0x4 24. "LPACK,General low-power acknowledge" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "DVFS,General DVFS request" "0: no dvfs request,1: dvfs request"
|
|
newline
|
|
bitfld.long 0x4 20. "LPMD,General LPMD request" "0: no lpmd request,1: lpmd request"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--15. 1. "PST,Automatic Power saving timer"
|
|
newline
|
|
rbitfld.long 0x4 6. "WIS,Write Idle Status.This read only bit indicates whether write request buffer is idle (empty) or not." "0: idle,1: not idle"
|
|
newline
|
|
rbitfld.long 0x4 5. "RIS,Read Idle Status.This read only bit indicates whether read request buffer is idle (empty) or not." "0: idle,1: not idle"
|
|
newline
|
|
rbitfld.long 0x4 4. "PSS,Power Saving Status" "0: not in power saving,1: power saving"
|
|
newline
|
|
bitfld.long 0x4 0. "PSD,Automatic Power Saving Disable" "0: power saving enabled,1: power saving disabled (default)"
|
|
line.long 0x8 "MAEXIDR0,MMDC Core Exclusive ID Monitor Register0"
|
|
hexmask.long.word 0x8 16.--31. 1. "EXC_ID_MONITOR1,This feild defines ID for Exclusive monitor#1. Default value is 0x0020"
|
|
newline
|
|
hexmask.long.word 0x8 0.--15. 1. "EXC_ID_MONITOR0,This feild defines ID for Exclusive monitor#0. Default value is 0x0000"
|
|
line.long 0xC "MAEXIDR1,MMDC Core Exclusive ID Monitor Register1"
|
|
hexmask.long.word 0xC 16.--31. 1. "EXC_ID_MONITOR3,This feild defines ID for Exclusive monitor#3. Default value is 0x0060"
|
|
newline
|
|
hexmask.long.word 0xC 0.--15. 1. "EXC_ID_MONITOR2,This feild defines ID for Exclusive monitor#2. Default value is 0x0040"
|
|
line.long 0x10 "MADPCR0,MMDC Core Debug and Profiling Control Register 0"
|
|
bitfld.long 0x10 9. "SBS,Step By Step trigger" "0: No access will be launced toward the DDR,1: Lanuch AXI pending access toward the DDR"
|
|
newline
|
|
bitfld.long 0x10 8. "SBS_EN,Step By Step debug Enable" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x10 3. "CYC_OVF,Total Profiling Cycles Count Overflow" "0: no overflow,1: overflow"
|
|
newline
|
|
bitfld.long 0x10 2. "PRF_FRZ,Profiling freeze" "0: profiling counters are not frozen,1: profiling counters are frozen"
|
|
newline
|
|
bitfld.long 0x10 1. "DBG_RST,Debug and Profiling Reset. Reset all debug and profiling counters and components." "0: no reset,1: reset"
|
|
newline
|
|
bitfld.long 0x10 0. "DBG_EN,Debug and Profiling Enable" "0: disable,1: enable"
|
|
line.long 0x14 "MADPCR1,MMDC Core Debug and Profiling Control Register 1"
|
|
hexmask.long.word 0x14 16.--31. 1. "PRF_AXI_ID_MASK,Profiling AXI ID Mask. AXI ID bits which masked by this value are chosen for profiling."
|
|
newline
|
|
hexmask.long.word 0x14 0.--15. 1. "PRF_AXI_ID,Profiling AXI ID"
|
|
rgroup.long 0x418++0x1F
|
|
line.long 0x0 "MADPSR0,MMDC Core Debug and Profiling Status Register 0"
|
|
hexmask.long 0x0 0.--31. 1. "CYC_COUNT,Total Profiling cycle Count"
|
|
line.long 0x4 "MADPSR1,MMDC Core Debug and Profiling Status Register 1"
|
|
hexmask.long 0x4 0.--31. 1. "BUSY_COUNT,Profiling Busy Cycles Count"
|
|
line.long 0x8 "MADPSR2,MMDC Core Debug and Profiling Status Register 2"
|
|
hexmask.long 0x8 0.--31. 1. "RD_ACC_COUNT,Profiling Read Access Count"
|
|
line.long 0xC "MADPSR3,MMDC Core Debug and Profiling Status Register 3"
|
|
hexmask.long 0xC 0.--31. 1. "WR_ACC_COUNT,Profiling Write Access Count"
|
|
line.long 0x10 "MADPSR4,MMDC Core Debug and Profiling Status Register 4"
|
|
hexmask.long 0x10 0.--31. 1. "RD_BYTES_COUNT,Profiling Read Bytes Count"
|
|
line.long 0x14 "MADPSR5,MMDC Core Debug and Profiling Status Register 5"
|
|
hexmask.long 0x14 0.--31. 1. "WR_BYTES_COUNT,Profiling Write Bytes Count"
|
|
line.long 0x18 "MASBS0,MMDC Core Step By Step Address Register"
|
|
hexmask.long 0x18 0.--31. 1. "SBS_ADDR,Step By Step Address"
|
|
line.long 0x1C "MASBS1,MMDC Core Step By Step Address Attributes Register"
|
|
hexmask.long.word 0x1C 16.--31. 1. "SBS_AXI_ID,Step By Step AXI ID"
|
|
newline
|
|
bitfld.long 0x1C 13.--15. "SBS_LEN,Step By Step Length" "0: burst of length 1,1: burst of length 2,?,?,?,?,?,7: burst of length 8"
|
|
newline
|
|
bitfld.long 0x1C 12. "SBS_BUFF,Step By Step Buffered" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 10.--11. "SBS_BURST,Step By Step Burst" "0: FIXED,1: INCR burst,2: WRAP burst,?"
|
|
newline
|
|
bitfld.long 0x1C 7.--9. "SBS_SIZE,Step By Step Size" "0: 8 bits,1: 16 bits,2: 32 bits,3: 64 bits,4: 128bits,?,?,?"
|
|
newline
|
|
bitfld.long 0x1C 4.--6. "SBS_PROT,Step By Step Protection" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 2.--3. "SBS_LOCK,Step By Step Lock" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 1. "SBS_TYPE,Step By Step Request Type" "0: write,1: read"
|
|
newline
|
|
bitfld.long 0x1C 0. "SBS_VLD,Step By Step Valid" "0: not valid,1: valid"
|
|
group.long 0x440++0x3
|
|
line.long 0x0 "MAGENP,MMDC Core General Purpose Register"
|
|
hexmask.long 0x0 0.--31. 1. "GP31_GP0,General purpose read/write bits."
|
|
group.long 0x800++0x13
|
|
line.long 0x0 "MPZQHWCTRL,MMDC PHY ZQ HW control register"
|
|
hexmask.long.byte 0x0 27.--31. 1. "ZQ_EARLY_COMPARATOR_EN_TIMER,ZQ early comparator enable timer"
|
|
newline
|
|
bitfld.long 0x0 23.--25. "TZQ_CS,Device ZQ short time" "?,?,2: 128 cycles (Default),3: 256 cycles,4: 512 cycles,5: 1024 cycles,?,?"
|
|
newline
|
|
bitfld.long 0x0 20.--22. "TZQ_OPER,Device ZQ long/oper time" "?,?,2: 128 cycles,3: 256 cycles - Default (JEDEC value for DDR3),4: 512 cycles,5: 1024 cycles,?,?"
|
|
newline
|
|
bitfld.long 0x0 17.--19. "TZQ_INIT,Device ZQ long/init time" "?,?,2: 128 cycles,3: 256 cycles,4: 512 cycles - Default (JEDEC value for DDR3),5: 1024 cycles,?,?"
|
|
newline
|
|
bitfld.long 0x0 16. "ZQ_HW_FOR,Force ZQ automatic calibration process with the S32V234 ZQ calibration pad" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 11.--15. 1. "ZQ_HW_PD_RES,ZQ HW calibration pull-down result"
|
|
newline
|
|
hexmask.long.byte 0x0 6.--10. 1. "ZQ_HW_PU_RES,ZQ automatic calibration pull-up result"
|
|
newline
|
|
hexmask.long.byte 0x0 2.--5. 1. "ZQ_HW_PER,ZQ periodic calibration time"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "ZQ_MODE,ZQ calibration mode:" "0: No ZQ calibration is issued. (Default),1: ZQ calibration is issued to S32V234 ZQ..,2: ZQ calibration command long/short is issued only..,3: ZQ calibration is issued to S32V234 ZQ.."
|
|
line.long 0x4 "MPZQSWCTRL,MMDC PHY ZQ SW control register"
|
|
bitfld.long 0x4 16.--17. "ZQ_CMP_OUT_SMP,Defines the amount of cycles between driving the ZQ signals to the ZQ pad and till sampling the comparator enable output while performing ZQ calibration process with the S32V234 ZQ calibration pad" "0: 7 cycles,1: 15 cycles,2: 23 cycles,3: 31 cycles"
|
|
newline
|
|
bitfld.long 0x4 13. "USE_ZQ_SW_VAL,Use SW ZQ configured value for I/O pads resistor controls" "0: Fields ZQ_HW_PD_VAL & ZQ_HW_PU_VAL will be..,1: Fields ZQ_SW_PD_VAL & ZQ_SW_PU_VAL will be.."
|
|
newline
|
|
bitfld.long 0x4 12. "ZQ_SW_PD,ZQ software PU/PD calibration. This bit determines the calibration stage (PU or PD)." "0: PU resistor calibration,1: PD resistor calibration"
|
|
newline
|
|
hexmask.long.byte 0x4 7.--11. 1. "ZQ_SW_PD_VAL,ZQ software pull-down resistence"
|
|
newline
|
|
hexmask.long.byte 0x4 2.--6. 1. "ZQ_SW_PU_VAL,ZQ software pull-up resistence"
|
|
newline
|
|
rbitfld.long 0x4 1. "ZQ_SW_RES,ZQ software calibration result. This bit reflects the ZQ calibration voltage comparator value." "0: Current ZQ calibration voltage is less than VDD/2.,1: Current ZQ calibration voltage is more than VDD/2"
|
|
newline
|
|
bitfld.long 0x4 0. "ZQ_SW_FOR,ZQ SW calibration enable" "0,1"
|
|
line.long 0x8 "MPWLGCR,MMDC PHY Write Leveling Configuration and Error Status Register"
|
|
rbitfld.long 0x8 11. "WL_HW_ERR3,Byte3 write-leveling HW calibration error" "0: No error was found on byte3 during..,1: An error was found on byte3 during.."
|
|
newline
|
|
rbitfld.long 0x8 10. "WL_HW_ERR2,Byte2 write-leveling HW calibration error" "0: No error was found on byte2 during..,1: An error was found on byte2 during.."
|
|
newline
|
|
rbitfld.long 0x8 9. "WL_HW_ERR1,Byte1 write-leveling HW calibration error" "0: No error was found on byte1 during..,1: An error was found on byte1 during.."
|
|
newline
|
|
rbitfld.long 0x8 8. "WL_HW_ERR0,Byte0 write-leveling HW calibration error" "0: No error was found on byte0 during..,1: An error was found on byte0 during.."
|
|
newline
|
|
rbitfld.long 0x8 7. "WL_SW_RES3,Byte3 write-leveling software result" "0: DQS3 sampled low CK during SW write-leveling.,1: DQS3 sampled high CK during SW write-leveling."
|
|
newline
|
|
rbitfld.long 0x8 6. "WL_SW_RES2,Byte2 write-leveling software result" "0: DQS2 sampled low CK during SW write-leveling.,1: DQS2 sampled high CK during SW write-leveling."
|
|
newline
|
|
rbitfld.long 0x8 5. "WL_SW_RES1,Byte1 write-leveling software result" "0: DQS1 sampled low CK during SW write-leveling.,1: DQS1 sampled high CK during SW write-leveling."
|
|
newline
|
|
rbitfld.long 0x8 4. "WL_SW_RES0,Byte0 write-leveling software result" "0: DQS0 sampled low CK during SW write-leveling.,1: DQS0 sampled high CK during SW write-leveling."
|
|
newline
|
|
bitfld.long 0x8 2. "SW_WL_CNT_EN,SW write-leveling count down enable" "0: MMDC doesn't count 25+15 cycles before issuing..,1: MMDC counts 25+15 cycles before issuing.."
|
|
newline
|
|
bitfld.long 0x8 1. "SW_WL_EN,Write-Leveling SW enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0. "HW_WL_EN,Write-Leveling HW (automatic) enable" "0,1"
|
|
line.long 0xC "MPWLDECTRL0,MMDC PHY Write Leveling Delay Control Register 0"
|
|
bitfld.long 0xC 25.--26. "WL_CYC_DEL1,Write leveling cycle delay for Byte 1" "0: No delay is added.,1: 1 cycle delay is added.,?,?"
|
|
newline
|
|
bitfld.long 0xC 24. "WL_HC_DEL1,Write leveling half cycle delay for Byte 1" "0: No delay is added.,1: Half cycle delay is added."
|
|
newline
|
|
hexmask.long.byte 0xC 16.--22. 1. "WL_DL_ABS_OFFSET1,Absolute write-leveling delay offset for Byte 1"
|
|
newline
|
|
bitfld.long 0xC 9.--10. "WL_CYC_DEL0,Write leveling cycle delay for Byte 0" "0: No delay is added.,1: 1 cycle delay is added.,?,?"
|
|
newline
|
|
bitfld.long 0xC 8. "WL_HC_DEL0,Write leveling half cycle delay for Byte 0" "0: No delay is added.,1: Half cycle delay is added."
|
|
newline
|
|
hexmask.long.byte 0xC 0.--6. 1. "WL_DL_ABS_OFFSET0,Absolute write-leveling delay offset for Byte 0"
|
|
line.long 0x10 "MPWLDECTRL1,MMDC PHY Write Leveling Delay Control Register 1"
|
|
bitfld.long 0x10 25.--26. "WL_CYC_DEL3,Write leveling cycle delay for Byte 3" "0: No delay is added.,1: 1 cycle delay is added.,?,?"
|
|
newline
|
|
bitfld.long 0x10 24. "WL_HC_DEL3,Write leveling half cycle delay for Byte 3" "0: No delay is added.,1: Half cycle delay is added."
|
|
newline
|
|
hexmask.long.byte 0x10 16.--22. 1. "WL_DL_ABS_OFFSET3,Absolute write-leveling delay offset for Byte 3"
|
|
newline
|
|
bitfld.long 0x10 9.--10. "WL_CYC_DEL2,Write leveling cycle delay for Byte 2" "0: No delay is added.,1: 1 cycle delay is added.,?,?"
|
|
newline
|
|
bitfld.long 0x10 8. "WL_HC_DEL2,Write leveling half cycle delay for Byte 2" "0: No delay is added.,1: Half cycle delay is added."
|
|
newline
|
|
hexmask.long.byte 0x10 0.--6. 1. "WL_DL_ABS_OFFSET2,Absolute write-leveling delay offset for Byte 2"
|
|
rgroup.long 0x814++0x3
|
|
line.long 0x0 "MPWLDLST,MMDC PHY Write Leveling delay-line Status Register"
|
|
hexmask.long.byte 0x0 24.--30. 1. "WL_DL_UNIT_NUM3,This field reflects the number of delay units that are actually used by write leveling delay-line 3"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--22. 1. "WL_DL_UNIT_NUM2,This field reflects the number of delay units that are actually used by write leveling delay-line 2"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--14. 1. "WL_DL_UNIT_NUM1,This field reflects the number of delay units that are actually used by write leveling delay-line 1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "WL_DL_UNIT_NUM0,This field reflects the number of delay units that are actually used by write leveling delay-line 0"
|
|
group.long 0x818++0x13
|
|
line.long 0x0 "MPODTCTRL,MMDC PHY ODT control register"
|
|
bitfld.long 0x0 16.--18. "ODT3_INT_RES,On chip ODT byte3 resistor - This field determines the Rtt_Nom of the on chip ODT byte3 resistor during read accesses" "0: Rtt_Nom Disabled.,1: Rtt_Nom 120 Ohm,2: Rtt_Nom 60 Ohm,3: Rtt_Nom 40 Ohm,4: Rtt_Nom 30 Ohm,5: Rtt_Nom 24 Ohm,6: Rtt_Nom 20 Ohm,7: Rtt_Nom 17 Ohm"
|
|
newline
|
|
bitfld.long 0x0 12.--14. "ODT2_INT_RES,On chip ODT byte2 resistor - This field determines the Rtt_Nom of the on chip ODT byte2 resistor during read accesses" "0: Rtt_Nom Disabled.,1: Rtt_Nom 120 Ohm,2: Rtt_Nom 60 Ohm,3: Rtt_Nom 40 Ohm,4: Rtt_Nom 30 Ohm,5: Rtt_Nom 24 Ohm,6: Rtt_Nom 20 Ohm,7: Rtt_Nom 17 Ohm"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "ODT1_INT_RES,On chip ODT byte1 resistor - This field determines the Rtt_Nom of the on chip ODT byte1 resistor during read accesses" "0: Rtt_Nom Disabled.,1: Rtt_Nom 120 Ohm,2: Rtt_Nom 60 Ohm,3: Rtt_Nom 40 Ohm,4: Rtt_Nom 30 Ohm,5: Rtt_Nom 24 Ohm,6: Rtt_Nom 20 Ohm,7: Rtt_Nom 17 Ohm"
|
|
newline
|
|
bitfld.long 0x0 4.--6. "ODT0_INT_RES,On chip ODT byte0 resistor - This field determines the Rtt_Nom of the on chip ODT byte0 resistor during read accesses" "0: Rtt_Nom Disabled.,1: Rtt_Nom 120 Ohm,2: Rtt_Nom 60 Ohm,3: Rtt_Nom 40 Ohm,4: Rtt_Nom 30 Ohm,5: Rtt_Nom 24 Ohm,6: Rtt_Nom 20 Ohm,7: Rtt_Nom 17 Ohm"
|
|
newline
|
|
bitfld.long 0x0 3. "ODT_RD_ACT_EN,Active read CS ODT enable" "0: Active CS ODT pin is disabled during read access.,1: Active CS ODT pin is enabled during read access."
|
|
newline
|
|
bitfld.long 0x0 2. "ODT_RD_PAS_EN,Inactive read CS ODT enable" "0: Inactive CS ODT pin is disabled during read..,1: Inactive CS ODT pin is enabled during read.."
|
|
newline
|
|
bitfld.long 0x0 1. "ODT_WR_ACT_EN,Active write CS ODT enable" "0: Active CS ODT pin is disabled during write access.,1: Active CS ODT pin is enabled during write access."
|
|
newline
|
|
bitfld.long 0x0 0. "ODT_WR_PAS_EN,Inactive write CS ODT enable" "0: Inactive CS ODT pin is disabled during write..,1: Inactive CS ODT pin is enabled during write.."
|
|
line.long 0x4 "MPRDDQBY0DL,MMDC PHY Read DQ Byte0 Delay Register"
|
|
bitfld.long 0x4 28.--30. "rd_dq7_del,Read dqs0 to dq7 delay fine-tuning" "0: No change in dq7 delay,1: Add dq7 delay of 1 delay unit,2: Add dq7 delay of 2 delay units.,3: Add dq7 delay of 3 delay units.,4: Add dq7 delay of 4 delay units.,5: Add dq7 delay of 5 delay units.,6: Add dq7 delay of 6 delay units.,7: Add dq7 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0x4 24.--26. "rd_dq6_del,Read dqs0 to dq6 delay fine-tuning" "0: No change in dq6 delay,1: Add dq6 delay of 1 delay unit,2: Add dq6 delay of 2 delay units.,3: Add dq6 delay of 3 delay units.,4: Add dq6 delay of 4 delay units.,5: Add dq6 delay of 5 delay units.,6: Add dq6 delay of 6 delay units.,7: Add dq6 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0x4 20.--22. "rd_dq5_del,Read dqs0 to dq5 delay fine-tuning" "0: No change in dq5 delay,1: Add dq5 delay of 1 delay unit,2: Add dq5 delay of 2 delay units.,3: Add dq5 delay of 3 delay units.,4: Add dq5 delay of 4 delay units.,5: Add dq5 delay of 5 delay units.,6: Add dq5 delay of 6 delay units.,7: Add dq5 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0x4 16.--18. "rd_dq4_del,Read dqs0 to dq4 delay fine-tuning" "0: No change in dq4 delay,1: Add dq4 delay of 1 delay unit,2: Add dq4 delay of 2 delay units.,3: Add dq4 delay of 3 delay units.,4: Add dq4 delay of 4 delay units.,5: Add dq4 delay of 5 delay units.,6: Add dq4 delay of 6 delay units.,7: Add dq4 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0x4 12.--14. "rd_dq3_del,Read dqs0 to dq3 delay fine-tuning" "0: No change in dq3 delay,1: Add dq3 delay of 1 delay unit,2: Add dq3 delay of 2 delay units.,3: Add dq3 delay of 3 delay units.,4: Add dq3 delay of 4 delay units.,5: Add dq3 delay of 5 delay units.,6: Add dq3 delay of 6 delay units.,7: Add dq3 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0x4 8.--10. "rd_dq2_del,Read dqs0 to dq2 delay fine-tuning" "0: No change in dq2 delay,1: Add dq2 delay of 1 delay unit,2: Add dq2 delay of 2 delay units.,3: Add dq2 delay of 3 delay units.,4: Add dq2 delay of 4 delay units.,5: Add dq2 delay of 5 delay units.,6: Add dq2 delay of 6 delay units.,7: Add dq2 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0x4 4.--6. "rd_dq1_del,Read dqs0 to dq1 delay fine-tuning" "0: No change in dq1 delay,1: Add dq1 delay of 1 delay unit,2: Add dq1 delay of 2 delay units.,3: Add dq1 delay of 3 delay units.,4: Add dq1 delay of 4 delay units.,5: Add dq1 delay of 5 delay units.,6: Add dq1 delay of 6 delay units.,7: Add dq1 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0x4 0.--2. "rd_dq0_del,Read dqs0 to dq0 delay fine-tuning" "0: No change in dq0 delay,1: Add dq0 delay of 1 delay unit,2: Add dq0 delay of 2 delay units.,3: Add dq0 delay of 3 delay units.,4: Add dq0 delay of 4 delay units.,5: Add dq0 delay of 5 delay units.,6: Add dq0 delay of 6 delay units.,7: Add dq0 delay of 7 delay units."
|
|
line.long 0x8 "MPRDDQBY1DL,MMDC PHY Read DQ Byte1 Delay Register"
|
|
bitfld.long 0x8 28.--30. "rd_dq15_del,Read dqs1 to dq15 delay fine-tuning" "0: No change in dq15 delay,1: Add dq15 delay of 1 delay unit,2: Add dq15 delay of 2 delay units.,3: Add dq15 delay of 3 delay units.,4: Add dq15 delay of 4 delay units.,5: Add dq15 delay of 5 delay units.,6: Add dq15 delay of 6 delay units.,7: Add dq15 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0x8 24.--26. "rd_dq14_del,Read dqs1 to dq14 delay fine-tuning" "0: No change in dq14 delay,1: Add dq14 delay of 1 delay unit,2: Add dq14 delay of 2 delay units.,3: Add dq14 delay of 3 delay units.,4: Add dq14 delay of 4 delay units.,5: Add dq14 delay of 5 delay units.,6: Add dq14 delay of 6 delay units.,7: Add dq14 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0x8 20.--22. "rd_dq13_del,Read dqs1 to dq13 delay fine-tuning" "0: No change in dq13 delay,1: Add dq13 delay of 1 delay unit,2: Add dq13 delay of 2 delay units.,3: Add dq13 delay of 3 delay units.,4: Add dq13 delay of 4 delay units.,5: Add dq13 delay of 5 delay units.,6: Add dq13 delay of 6 delay units.,7: Add dq13 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0x8 16.--18. "rd_dq12_del,Read dqs1 to dq12 delay fine-tuning" "0: No change in dq12 delay,1: Add dq12 delay of 1 delay unit,2: Add dq12 delay of 2 delay units.,3: Add dq12 delay of 3 delay units.,4: Add dq12 delay of 4 delay units.,5: Add dq12 delay of 5 delay units.,6: Add dq12 delay of 6 delay units.,7: Add dq12 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0x8 12.--14. "rd_dq11_del,Read dqs1 to dq11 delay fine-tuning" "0: No change in dq11 delay,1: Add dq11 delay of 1 delay unit,2: Add dq11 delay of 2 delay units.,3: Add dq11 delay of 3 delay units.,4: Add dq11 delay of 4 delay units.,5: Add dq11 delay of 5 delay units.,6: Add dq11 delay of 6 delay units.,7: Add dq11 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0x8 8.--10. "rd_dq10_del,Read dqs1 to dq10 delay fine-tuning" "0: No change in dq10 delay,1: Add dq10 delay of 1 delay unit,2: Add dq10 delay of 2 delay units.,3: Add dq10 delay of 3 delay units.,4: Add dq10 delay of 4 delay units.,5: Add dq10 delay of 5 delay unit,6: Add dq10 delay of 6 delay units.,7: Add dq10 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0x8 4.--6. "rd_dq9_del,Read dqs1 to dq9 delay fine-tuning" "0: No change in dq9 delay,1: Add dq9 delay of 1 delay unit,2: Add dq9 delay of 2 delay units.,3: Add dq9 delay of 3 delay units.,4: Add dq9 delay of 4 delay units.,5: Add dq9 delay of 5 delay units.,6: Add dq9 delay of 6 delay units.,7: Add dq9 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0x8 0.--2. "rd_dq8_del,Read dqs1 to dq8 delay fine-tuning" "0: No change in dq8 delay,1: Add dq8 delay of 1 delay unit,2: Add dq8 delay of 2 delay units.,3: Add dq8 delay of 3 delay units.,4: Add dq8 delay of 4 delay units.,5: Add dq8 delay of 5 delay units.,6: Add dq8 delay of 6 delay units.,7: Add dq8 delay of 7 delay units."
|
|
line.long 0xC "MPRDDQBY2DL,MMDC PHY Read DQ Byte2 Delay Register"
|
|
bitfld.long 0xC 28.--30. "rd_dq23_del,Read dqs2 to dq23 delay fine-tuning" "0: No change in dq23 delay,1: Add dq23 delay of 1 delay unit,2: Add dq23 delay of 2 delay units.,3: Add dq23 delay of 3 delay units.,4: Add dq23 delay of 4 delay units.,5: Add dq23 delay of 5 delay units.,6: Add dq23 delay of 6 delay units.,7: Add dq23 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0xC 24.--26. "rd_dq22_del,Read dqs2 to dq22 delay fine-tuning" "0: No change in dq22 delay,1: Add dq22 delay of 1 delay unit,2: Add dq22 delay of 2 delay units.,3: Add dq22 delay of 3 delay units.,4: Add dq22 delay of 4 delay units.,5: Add dq22 delay of 5 delay units.,6: Add dq22 delay of 6 delay units.,7: Add dq22 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0xC 20.--22. "rd_dq21_del,Read dqs2 to dq21 delay fine-tuning" "0: No change in dq21 delay,1: Add dq21 delay of 1 delay unit,2: Add dq21 delay of 2 delay units.,3: Add dq21 delay of 3 delay units.,4: Add dq21 delay of 4 delay units.,5: Add dq21 delay of 5 delay units.,6: Add dq21 delay of 6 delay units.,7: Add dq21 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0xC 16.--18. "rd_dq20_del,Read dqs2 to dq20 delay fine-tuning" "0: No change in dq20 delay,1: Add dq20 delay of 1 delay unit,2: Add dq20 delay of 2 delay units.,3: Add dq20 delay of 3 delay units.,4: Add dq20 delay of 4 delay units.,5: Add dq20 delay of 5 delay units.,6: Add dq20 delay of 6 delay units.,7: Add dq20 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0xC 12.--14. "rd_dq19_del,Read dqs2 to dq19 delay fine-tuning" "0: No change in dq19 delay,1: Add dq19 delay of 1 delay unit,2: Add dq19 delay of 2 delay units.,3: Add dq19 delay of 3 delay units.,4: Add dq19 delay of 4 delay units.,5: Add dq19 delay of 5 delay units.,6: Add dq19 delay of 6 delay units.,7: Add dq19 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0xC 8.--10. "rd_dq18_del,Read dqs2 to dq18 delay fine-tuning" "0: No change in dq18 delay,1: Add dq18 delay of 1 delay unit,2: Add dq18 delay of 2 delay units.,3: Add dq18 delay of 3 delay units.,4: Add dq18 delay of 4 delay units.,5: Add dq18 delay of 5 delay units.,6: Add dq18 delay of 6 delay units.,7: Add dq18 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0xC 4.--6. "rd_dq17_del,Read dqs2 to dq17 delay fine-tuning" "0: No change in dq17 delay,1: Add dq17 delay of 1 delay unit,2: Add dq17 delay of 2 delay units.,3: Add dq17 delay of 3 delay units.,4: Add dq17 delay of 4 delay units.,5: Add dq17 delay of 5 delay units.,6: Add dq17 delay of 6 delay units.,7: Add dq17 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0xC 0.--2. "rd_dq16_del,Read dqs2 to dq16 delay fine-tuning" "0: No change in dq16 delay,1: Add dq16 delay of 1 delay unit,2: Add dq16 delay of 2 delay units.,3: Add dq16 delay of 3 delay units.,4: Add dq16 delay of 4 delay units.,5: Add dq16 delay of 5 delay units.,6: Add dq16 delay of 6 delay units.,7: Add dq16 delay of 7 delay units."
|
|
line.long 0x10 "MPRDDQBY3DL,MMDC PHY Read DQ Byte3 Delay Register"
|
|
bitfld.long 0x10 28.--30. "rd_dq31_del,Read dqs3 to dq31 delay fine-tuning" "0: No change in dq31 delay,1: Add dq31 delay of 1 delay unit,2: Add dq31 delay of 2 delay units.,3: Add dq31 delay of 3 delay units.,4: Add dq31 delay of 4 delay units.,5: Add dq31 delay of 5 delay units.,6: Add dq31 delay of 6 delay units.,7: Add dq31 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0x10 24.--26. "rd_dq30_del,Read dqs3 to dq30 delay fine-tuning" "0: No change in dq30 delay,1: Add dq30 delay of 1 delay unit,2: Add dq30 delay of 2 delay units.,3: Add dq30 delay of 3 delay units.,4: Add dq30 delay of 4 delay units.,5: Add dq30 delay of 5 delay units.,6: Add dq30 delay of 6 delay units.,7: Add dq30 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "rd_dq29_del,Read dqs3 to dq29 delay fine-tuning" "0: No change in dq29 delay,1: Add dq29 delay of 1 delay unit,2: Add dq29 delay of 2 delay units.,3: Add dq29 delay of 3 delay units.,4: Add dq29 delay of 4 delay units.,5: Add dq29 delay of 5 delay units.,6: Add dq29 delay of 6 delay units.,7: Add dq29 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0x10 16.--18. "rd_dq28_del,Read dqs3 to dq28 delay fine-tuning" "0: No change in dq28 delay,1: Add dq28 delay of 1 delay unit,2: Add dq28 delay of 2 delay units.,3: Add dq28 delay of 3 delay units.,4: Add dq28 delay of 4 delay units.,5: Add dq28 delay of 5 delay units.,6: Add dq28 delay of 6 delay units.,7: Add dq28 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0x10 12.--14. "rd_dq27_del,Read dqs3 to dq27 delay fine-tuning" "0: No change in dq27 delay,1: Add dq27 delay of 1 delay unit,2: Add dq27 delay of 2 delay units.,3: Add dq27 delay of 3 delay units.,4: Add dq27 delay of 4 delay units.,5: Add dq27 delay of 5 delay units.,6: Add dq27 delay of 6 delay units.,7: Add dq27 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0x10 8.--10. "rd_dq26_del,Read dqs3 to dq26 delay fine-tuning" "0: No change in dq26 delay,1: Add dq26 delay of 1 delay unit,2: Add dq26 delay of 2 delay units.,3: Add dq26 delay of 3 delay units.,4: Add dq26 delay of 4 delay units.,5: Add dq26 delay of 5 delay units.,6: Add dq26 delay of 6 delay units.,7: Add dq26 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0x10 4.--6. "rd_dq25_del,Read dqs3 to dq25 delay fine-tuning" "0: No change in dq25 delay,1: Add dq25 delay of 1 delay unit,2: Add dq25 delay of 2 delay units.,3: Add dq25 delay of 3 delay units.,4: Add dq25 delay of 4 delay units.,5: Add dq25 delay of 5 delay units.,6: Add dq25 delay of 6 delay units.,7: Add dq25 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0x10 0.--2. "rd_dq24_del,Read dqs3 to dq24 delay fine-tuning" "0: No change in dq24 delay,1: Add dq24 delay of 1 delay unit,2: Add dq24 delay of 2 delay units.,3: Add dq24 delay of 3 delay units.,4: Add dq24 delay of 4 delay units.,5: Add dq24 delay of 5 delay units.,6: Add dq24 delay of 6 delay units.,7: Add dq24 delay of 7 delay units."
|
|
group.long 0x83C++0x7
|
|
line.long 0x0 "MPDGCTRL0,MMDC PHY Read DQS Gating Control Register 0"
|
|
bitfld.long 0x0 31. "RST_RD_FIFO,Reset Read Data FIFO and associated pointers" "0,1"
|
|
newline
|
|
bitfld.long 0x0 30. "DG_CMP_CYC,Read DQS gating sample cycle" "0: MMDC waits 16 DDR cycles,1: MMDC waits 32 DDR cycles"
|
|
newline
|
|
bitfld.long 0x0 29. "DG_DIS,Read DQS gating disable" "0: Read DQS gating mechanism is enbled,1: Read DQS gating mechanism is disabled"
|
|
newline
|
|
bitfld.long 0x0 28. "HW_DG_EN,Enable automatic read DQS gating calibration" "0: Disable automatic read DQS gating calibration,1: Start automatic read DQS gating calibration"
|
|
newline
|
|
hexmask.long.byte 0x0 24.--27. 1. "DG_HC_DEL1,Read DQS gating half cycles delay for Byte1"
|
|
newline
|
|
bitfld.long 0x0 23. "DG_EXT_UP,DG extend upper boundary" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--22. 1. "DG_DL_ABS_OFFSET1,Absolute read DQS gating delay offset for Byte1"
|
|
newline
|
|
rbitfld.long 0x0 12. "HW_DG_ERR,HW DQS gating error" "0: No error was found during the DQS gating HW..,1: An error was found during the DQS gating HW.."
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "DG_HC_DEL0,Read DQS gating half cycles delay for Byte0"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "DG_DL_ABS_OFFSET0,Absolute read DQS gating delay offset for Byte0"
|
|
line.long 0x4 "MPDGCTRL1,MMDC PHY Read DQS Gating Control Register 1"
|
|
hexmask.long.byte 0x4 24.--27. 1. "DG_HC_DEL3,Read DQS gating half cycles delay for Byte3"
|
|
newline
|
|
hexmask.long.byte 0x4 16.--22. 1. "DG_DL_ABS_OFFSET3,Absolute read DQS gating delay offset for Byte3"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--11. 1. "DG_HC_DEL2,Read DQS gating half cycles delay for Byte2"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--6. 1. "DG_DL_ABS_OFFSET2,Absolute read DQS gating delay offset for Byte2"
|
|
rgroup.long 0x844++0x3
|
|
line.long 0x0 "MPDGDLST0,MMDC PHY Read DQS Gating delay-line Status Register"
|
|
hexmask.long.byte 0x0 24.--30. 1. "DG_DL_UNIT_NUM3,This field reflects the number of delay units that are actually used by read DQS gating delay-line 3"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--22. 1. "DG_DL_UNIT_NUM2,This field reflects the number of delay units that are actually used by read DQS gating delay-line 2"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--14. 1. "DG_DL_UNIT_NUM1,This field reflects the number of delay units that are actually used by read DQS gating delay-line 1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "DG_DL_UNIT_NUM0,This field reflects the number of delay units that are actually used by read DQS gating delay-line 0"
|
|
group.long 0x848++0x3
|
|
line.long 0x0 "MPRDDLCTL,MMDC PHY Read delay-lines Configuration Register"
|
|
hexmask.long.byte 0x0 24.--30. 1. "RD_DL_ABS_OFFSET3,Absolute read delay offset for Byte3"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--22. 1. "RD_DL_ABS_OFFSET2,Absolute read delay offset for Byte2"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--14. 1. "RD_DL_ABS_OFFSET1,Absolute read delay offset for Byte1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "RD_DL_ABS_OFFSET0,Absolute read delay offset for Byte0"
|
|
rgroup.long 0x84C++0x3
|
|
line.long 0x0 "MPRDDLST,MMDC PHY Read delay-lines Status Register"
|
|
hexmask.long.byte 0x0 24.--30. 1. "RD_DL_UNIT_NUM3,This field reflects the number of delay units that are actually used by read delay-line 3."
|
|
newline
|
|
hexmask.long.byte 0x0 16.--22. 1. "RD_DL_UNIT_NUM2,This field reflects the number of delay units that are actually used by read delay-line 2."
|
|
newline
|
|
hexmask.long.byte 0x0 8.--14. 1. "RD_DL_UNIT_NUM1,This field reflects the number of delay units that are actually used by read delay-line 1."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "RD_DL_UNIT_NUM0,This field reflects the number of delay units that are actually used by read delay-line 0."
|
|
group.long 0x850++0x3
|
|
line.long 0x0 "MPWRDLCTL,MMDC PHY Write delay-lines Configuration Register"
|
|
hexmask.long.byte 0x0 24.--30. 1. "WR_DL_ABS_OFFSET3,Absolute write delay offset for Byte3"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--22. 1. "WR_DL_ABS_OFFSET2,Absolute write delay offset for Byte2"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--14. 1. "WR_DL_ABS_OFFSET1,Absolute write delay offset for Byte1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "WR_DL_ABS_OFFSET0,Absolute write delay offset for Byte0"
|
|
rgroup.long 0x854++0x3
|
|
line.long 0x0 "MPWRDLST,MMDC PHY Write delay-lines Status Register"
|
|
hexmask.long.byte 0x0 24.--30. 1. "WR_DL_UNIT_NUM3,This field reflects the number of delay units that are actually used by write delay-line 3."
|
|
newline
|
|
hexmask.long.byte 0x0 16.--22. 1. "WR_DL_UNIT_NUM2,This field reflects the number of delay units that are actually used by write delay-line 2."
|
|
newline
|
|
hexmask.long.byte 0x0 8.--14. 1. "WR_DL_UNIT_NUM1,This field reflects the number of delay units that are actually used by write delay-line 1."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "WR_DL_UNIT_NUM0,This field reflects the number of delay units that are actually used by write delay-line 0."
|
|
group.long 0x85C++0xB
|
|
line.long 0x0 "MPZQLP2CTL,MMDC ZQ LPDDR2 HW Control Register"
|
|
hexmask.long.byte 0x0 24.--30. 1. "ZQ_LP2_HW_ZQCS,This register defines the period in cycles that it takes the memory device to perform a Short ZQ calibration"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--23. 1. "ZQ_LP2_HW_ZQCL,This register defines the period in cycles that it takes the memory device to perform a long ZQ calibration"
|
|
newline
|
|
hexmask.long.word 0x0 0.--8. 1. "ZQ_LP2_HW_ZQINIT,This register defines the period in cycles that it takes the memory device to perform a Init ZQ calibration"
|
|
line.long 0x4 "MPRDDLHWCTL,MMDC PHY Read Delay HW Calibration Control Register"
|
|
bitfld.long 0x4 5. "HW_RD_DL_CMP_CYC,Automatic (HW) read sample cycle" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "HW_RD_DL_EN,Enable automatic (HW) read calibration" "0,1"
|
|
newline
|
|
rbitfld.long 0x4 3. "HW_RD_DL_ERR3,Automatic (HW) read calibration error of Byte3" "0: No error was found in read delay-line 3 during..,1: An error was found in read delay-line 3 during.."
|
|
newline
|
|
rbitfld.long 0x4 2. "HW_RD_DL_ERR2,Automatic (HW) read calibration error of Byte2" "0: No error was found in read delay-line 2 during..,1: An error was found in read delay-line 2 during.."
|
|
newline
|
|
rbitfld.long 0x4 1. "HW_RD_DL_ERR1,Automatic (HW) read calibration error of Byte1" "0: No error was found in read delay-line 1 during..,1: An error was found in read delay-line 1 during.."
|
|
newline
|
|
rbitfld.long 0x4 0. "HW_RD_DL_ERR0,Automatic (HW) read calibration error of Byte0" "0: No error was found in read delay-line 0 during..,1: An error was found in read delay-line 0 during.."
|
|
line.long 0x8 "MPWRDLHWCTL,MMDC PHY Write Delay HW Calibration Control Register"
|
|
bitfld.long 0x8 5. "HW_WR_DL_CMP_CYC,Write sample cycle" "0,1"
|
|
newline
|
|
bitfld.long 0x8 4. "HW_WR_DL_EN,Enable automatic (HW) write calibration" "0,1"
|
|
newline
|
|
rbitfld.long 0x8 3. "HW_WR_DL_ERR3,Automatic (HW) write calibration error of Byte3" "0: No error was found during the automatic (HW)..,1: An error was found during the automatic (HW).."
|
|
newline
|
|
rbitfld.long 0x8 2. "HW_WR_DL_ERR2,Automatic (HW) write calibration error of Byte2" "0: No error was found during the automatic (HW)..,1: An error was found during the automatic (HW).."
|
|
newline
|
|
rbitfld.long 0x8 1. "HW_WR_DL_ERR1,Automatic (HW) write calibration error of Byte1" "0: No error was found during the automatic (HW)..,1: An error was found during the automatic (HW).."
|
|
newline
|
|
rbitfld.long 0x8 0. "HW_WR_DL_ERR0,Automatic (HW) write calibration error of Byte0" "0: No error was found during the automatic (HW)..,1: An error was found during the automatic (HW).."
|
|
rgroup.long 0x868++0x23
|
|
line.long 0x0 "MPRDDLHWST0,MMDC PHY Read Delay HW Calibration Status Register 0"
|
|
hexmask.long.byte 0x0 24.--30. 1. "HW_RD_DL_UP1,Automatic (HW) read calibration result of the upper boundary of Byte1"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--22. 1. "HW_RD_DL_LOW1,Automatic (HW) read calibration result of the lower boundary of Byte1"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--14. 1. "HW_RD_DL_UP0,Automatic (HW) read calibration result of the upper boundary of Byte0"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "HW_RD_DL_LOW0,Automatic (HW) read calibration result of the lower boundary of Byte0"
|
|
line.long 0x4 "MPRDDLHWST1,MMDC PHY Read Delay HW Calibration Status Register 1"
|
|
hexmask.long.byte 0x4 24.--30. 1. "HW_RD_DL_UP3,Automatic (HW) read calibration result of the upper boundary of Byte3"
|
|
newline
|
|
hexmask.long.byte 0x4 16.--22. 1. "HW_RD_DL_LOW3,Automatic (HW) read calibration result of the lower boundary of Byte3"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--14. 1. "HW_RD_DL_UP2,Automatic (HW) read calibration result of the upper boundary of Byte2"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--6. 1. "HW_RD_DL_LOW2,Automatic (HW) read calibration result of the lower boundary of Byte2"
|
|
line.long 0x8 "MPWRDLHWST0,MMDC PHY Write Delay HW Calibration Status Register 0"
|
|
hexmask.long.byte 0x8 24.--30. 1. "HW_WR_DL_UP1,Aautomatic (HW) write utomatic (HW) write calibration result of the upper boundary of Byte1"
|
|
newline
|
|
hexmask.long.byte 0x8 16.--22. 1. "HW_WR_DL_LOW1,Automatic (HW) write calibration result of the lower boundary of Byte1"
|
|
newline
|
|
hexmask.long.byte 0x8 8.--14. 1. "HW_WR_DL_UP0,Automatic (HW) write calibration result of the upper boundary of Byte0"
|
|
newline
|
|
hexmask.long.byte 0x8 0.--6. 1. "HW_WR_DL_LOW0,Automatic (HW) write calibration result of the lower boundary of Byte0"
|
|
line.long 0xC "MPWRDLHWST1,MMDC PHY Write Delay HW Calibration Status Register 1"
|
|
hexmask.long.byte 0xC 24.--30. 1. "HW_WR_DL_UP3,Automatic (HW) write calibration result of the upper boundary of Byte3"
|
|
newline
|
|
hexmask.long.byte 0xC 16.--22. 1. "HW_WR_DL_LOW3,Automatic (HW) write calibration result of the lower boundary of Byte3"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--14. 1. "HW_WR_DL_UP2,Automatic (HW) write calibration result of the upper boundary of Byte2"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--6. 1. "HW_WR_DL_LOW2,Automatic (HW) write calibration result of the lower boundary of Byte2"
|
|
line.long 0x10 "MPWLHWERR,MMDC PHY Write Leveling HW Error Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. "HW_WL3_DQ,HW write-leveling calibration result of Byte3"
|
|
newline
|
|
hexmask.long.byte 0x10 16.--23. 1. "HW_WL2_DQ,HW write-leveling calibration result of Byte2"
|
|
newline
|
|
hexmask.long.byte 0x10 8.--15. 1. "HW_WL1_DQ,HW write-leveling calibration result of Byte1"
|
|
newline
|
|
hexmask.long.byte 0x10 0.--7. 1. "HW_WL0_DQ,HW write-leveling calibration result of Byte0"
|
|
line.long 0x14 "MPDGHWST0,MMDC PHY Read DQS Gating HW Status Register 0"
|
|
hexmask.long.word 0x14 16.--26. 1. "HW_DG_UP0,HW DQS gating calibration result of the upper boundary of Byte0"
|
|
newline
|
|
hexmask.long.word 0x14 0.--10. 1. "HW_DG_LOW0,HW DQS gating calibration result of the lower boundary of Byte0"
|
|
line.long 0x18 "MPDGHWST1,MMDC PHY Read DQS Gating HW Status Register 1"
|
|
hexmask.long.word 0x18 16.--26. 1. "HW_DG_UP1,HW DQS gating calibration result of the upper boundary of Byte1"
|
|
newline
|
|
hexmask.long.word 0x18 0.--10. 1. "HW_DG_LOW1,HW DQS gating calibration result of the lower boundary of Byte1"
|
|
line.long 0x1C "MPDGHWST2,MMDC PHY Read DQS Gating HW Status Register 2"
|
|
hexmask.long.word 0x1C 16.--26. 1. "HW_DG_UP2,HW DQS gating calibration result of the upper boundary of Byte2"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--10. 1. "HW_DG_LOW2,HW DQS gating calibration result of the lower boundary of Byte2"
|
|
line.long 0x20 "MPDGHWST3,MMDC PHY Read DQS Gating HW Status Register 3"
|
|
hexmask.long.word 0x20 16.--26. 1. "HW_DG_UP3,HW DQS gating calibration result of the upper boundary of Byte3"
|
|
newline
|
|
hexmask.long.word 0x20 0.--10. 1. "HW_DG_LOW3,HW DQS gating calibration result of the lower boundary of Byte3"
|
|
group.long 0x88C++0xB
|
|
line.long 0x0 "MPPDCMPR1,MMDC PHY Pre-defined Compare Register 1"
|
|
hexmask.long.word 0x0 16.--31. 1. "PDV2,MMDC Pre defined compare value2"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "PDV1,MMDC Pre defined compare value2"
|
|
line.long 0x4 "MPPDCMPR2,MMDC PHY Pre-defined Compare and CA delay-line Configuration Register"
|
|
hexmask.long.byte 0x4 24.--30. 1. "PHY_CA_DL_UNIT,This field reflects the number of delay units that are actually used by CA (Command/Address of LPDDR2) delay-line"
|
|
newline
|
|
hexmask.long.byte 0x4 16.--22. 1. "CA_DL_ABS_OFFSET,Absolute CA (Command/Address of LPDDRR2) offset"
|
|
newline
|
|
bitfld.long 0x4 2. "READ_LEVEL_PATTERN,MPR(DDR3)/DQ calibration(LPDDR2) read compare pattern" "0: Compare with read pattern 1010,1: Compare with read pattern 0011 (Used only in.."
|
|
newline
|
|
bitfld.long 0x4 1. "MPR_FULL_CMP,MPR(DDR3)/DQ calibration (LPDDR2) full compare enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "MPR_CMP,MPR(DDR3)/DQ calibration (LPDDR2) compare enable" "0,1"
|
|
line.long 0x8 "MPSWDAR0,MMDC PHY SW Dummy Access Register"
|
|
rbitfld.long 0x8 5. "SW_DUM_CMP3,SW dummy read byte3 compare results" "0: Dummy read fail,1: Dummy read pass"
|
|
newline
|
|
rbitfld.long 0x8 4. "SW_DUM_CMP2,SW dummy read byte2 compare results" "0: Dummy read fail,1: Dummy read pass"
|
|
newline
|
|
rbitfld.long 0x8 3. "SW_DUM_CMP1,SW dummy read byte1 compare results" "0: Dummy read fail,1: Dummy read pass"
|
|
newline
|
|
rbitfld.long 0x8 2. "SW_DUM_CMP0,SW dummy read byte0 compare results" "0: Dummy read fail,1: Dummy read pass"
|
|
newline
|
|
bitfld.long 0x8 1. "SW_DUMMY_RD,SW dummy read" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0. "SW_DUMMY_WR,SW dummy write" "0,1"
|
|
rgroup.long 0x898++0x1F
|
|
line.long 0x0 "MPSWDRDR0,MMDC PHY SW Dummy Read Data Register 0"
|
|
hexmask.long 0x0 0.--31. 1. "DUM_RD0,Dummy read data0"
|
|
line.long 0x4 "MPSWDRDR1,MMDC PHY SW Dummy Read Data Register 1"
|
|
hexmask.long 0x4 0.--31. 1. "DUM_RD1,Dummy read data1"
|
|
line.long 0x8 "MPSWDRDR2,MMDC PHY SW Dummy Read Data Register 2"
|
|
hexmask.long 0x8 0.--31. 1. "DUM_RD2,Dummy read data2"
|
|
line.long 0xC "MPSWDRDR3,MMDC PHY SW Dummy Read Data Register 3"
|
|
hexmask.long 0xC 0.--31. 1. "DUM_RD3,Dummy read data3"
|
|
line.long 0x10 "MPSWDRDR4,MMDC PHY SW Dummy Read Data Register 4"
|
|
hexmask.long 0x10 0.--31. 1. "DUM_RD4,Dummy read data4"
|
|
line.long 0x14 "MPSWDRDR5,MMDC PHY SW Dummy Read Data Register 5"
|
|
hexmask.long 0x14 0.--31. 1. "DUM_RD5,Dummy read data5"
|
|
line.long 0x18 "MPSWDRDR6,MMDC PHY SW Dummy Read Data Register 6"
|
|
hexmask.long 0x18 0.--31. 1. "DUM_RD6,Dummy read data6"
|
|
line.long 0x1C "MPSWDRDR7,MMDC PHY SW Dummy Read Data Register 7"
|
|
hexmask.long 0x1C 0.--31. 1. "DUM_RD7,Dummy read data7"
|
|
group.long 0x8B8++0x3
|
|
line.long 0x0 "MPMUR0,MMDC PHY Measure Unit Register"
|
|
hexmask.long.word 0x0 16.--25. 1. "MU_UNIT_DEL_NUM,Number of delay units measured per cycle"
|
|
newline
|
|
bitfld.long 0x0 11. "FRC_MSR,Force measuement on delay-lines" "0: No measurement is performed,1: Perform measurement process"
|
|
newline
|
|
bitfld.long 0x0 10. "MU_BYP_EN,Measure unit bypass enable" "0: The delay-lines use delay units as indicated at..,1: The delay-lines use delay units as indicated at.."
|
|
newline
|
|
hexmask.long.word 0x0 0.--9. 1. "MU_BYP_VAL,Number of delay units for measurement bypass"
|
|
group.long 0x8C0++0x3
|
|
line.long 0x0 "MPDCCR,MMDC Duty Cycle Control Register"
|
|
bitfld.long 0x0 28.--30. "RD_DQS3_FT_DCC,Read DQS duty cycle fine tuning control of Byte3" "?,1: 48.5% low 51.5% high,2: 50% duty cycle (default),?,4: 51.5% low 48.5% high,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 25.--27. "RD_DQS2_FT_DCC,Read DQS duty cycle fine tuning control of Byte2" "?,1: 48.5% low 51.5% high,2: 50% duty cycle (default),?,4: 51.5% low 48.5% high,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 22.--24. "RD_DQS1_FT_DCC,Read DQS duty cycle fine tuning control of Byte1" "?,1: 48.5% low 51.5% high,2: 50% duty cycle (default),?,4: 51.5% low 48.5% high,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 19.--21. "RD_DQS0_FT_DCC,Read DQS duty cycle fine tuning control of Byte0" "?,1: 48.5% low 51.5% high,2: 50% duty cycle (default),?,4: 51.5% low 48.5% high,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 16.--18. "CK_FT1_DCC,Secondary duty cycle fine tuning control of DDR clock" "?,1: 48.5% low 51.5% high,2: 50% duty cycle (default),?,4: 51.5% low 48.5% high,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 12.--14. "CK_FT0_DCC,Primary duty cycle fine tuning control of DDR clock" "?,1: 48.5% low 51.5% high,2: 50% duty cycle (default),?,4: 51.5% low 48.5% high,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 9.--11. "WR_DQS3_FT_DCC,Write DQS duty cycle fine tuning control of Byte0" "?,1: 48.5% low 51.5% high,2: 50% duty cycle (default),?,4: 51.5% low 48.5% high,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 6.--8. "WR_DQS2_FT_DCC,Write DQS duty cycle fine tuning control of Byte1" "?,1: 48.5% low 51.5% high,2: 50% duty cycle (default),?,4: 51.5% low 48.5% high,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 3.--5. "WR_DQS1_FT_DCC,Write DQS duty cycle fine tuning control of Byte1" "?,1: 48.5% low 51.5% high,2: 50% duty cycle (default),?,4: 51.5% low 48.5% high,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "WR_DQS0_FT_DCC,Write DQS duty cycle fine tuning control of Byte0" "?,1: 48.5% low 51.5% high,2: 50% duty cycle (default),?,4: 51.5% low 48.5% high,?,?,?"
|
|
tree.end
|
|
tree "MMDC_1"
|
|
base ad:0x400A2000
|
|
group.long 0x0++0x23
|
|
line.long 0x0 "MDCTL,MMDC Core Control Register"
|
|
bitfld.long 0x0 31. "SDE_0,MMDC Enable CS0" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 30. "SDE_1,MMDC Enable CS1" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 24.--26. "ROW,Row Address Width" "0: 11 bits Row,1: 12 bits Row,2: 13 bits Row,3: 14 bits Row,4: 15 bits Row,5: 16 bits Row,?,?"
|
|
newline
|
|
bitfld.long 0x0 20.--22. "COL,Column Address Width" "0: 9 bits column,1: 10 bits column,2: 11 bits column,3: 8 bits column,4: 12 bits column,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 19. "BL,Burst Length" "0: Burst Length 4 is used,1: Burst Length 8 is used"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "DSIZ,DDR data bus size. This field determines the size of the data bus of the DDR memory" "0: 16-bit data bus,1: 32-bit data bus,?,?"
|
|
line.long 0x4 "MDPDC,MMDC Core Power Down Control Register"
|
|
bitfld.long 0x4 28.--30. "PRCT_1,Precharge Timer - Chip Select 1" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 24.--26. "PRCT_0,Precharge Timer - Chip Select 0" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 16.--18. "tCKE,CKE minimum pulse width. This field determines the minimum pulse width of CKE." "0: 1 cycle,1: 2 cycles,?,?,?,?,6: 7 cycles,7: 8 cycles"
|
|
newline
|
|
hexmask.long.byte 0x4 12.--15. 1. "PWDT_1,Power Down Timer - Chip Select 1"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--11. 1. "PWDT_0,Power Down Timer - Chip Select 0"
|
|
newline
|
|
bitfld.long 0x4 7. "SLOW_PD,Slow/fast power down" "0: Fast mode.,1: Slow mode."
|
|
newline
|
|
bitfld.long 0x4 6. "BOTH_CS_PD,Parallel power down entry to both chip selects" "0: Each chip select can enter power down..,1: Chip selects can enter power down only if the.."
|
|
newline
|
|
bitfld.long 0x4 3.--5. "tCKSRX,Valid clock cycles before self-refresh exit" "0: 0 cycle,1: 1 cycles,?,?,?,?,6: 6 cycles,7: 7 cycles"
|
|
newline
|
|
bitfld.long 0x4 0.--2. "tCKSRE,Valid clock cycles after self-refresh entry" "0: 0 cycle,1: 1 cycles,?,?,?,?,6: 6cycles,7: 7cycles"
|
|
line.long 0x8 "MDOTC,MMDC Core ODT Timing Control Register"
|
|
bitfld.long 0x8 27.--29. "tAOFPD,Asynchronous RTT turn-off delay (power down with DLL frozen)" "0: 1 cycle,1: 2 cycles,?,?,?,?,6: 7 cycles,7: 8 cycles"
|
|
newline
|
|
bitfld.long 0x8 24.--26. "tAONPD,Asynchronous RTT turn-on delay (power down with DLL frozen)" "0: 1 cycle,1: 2 cycles,?,?,?,?,6: 7 cycles,7: 8 cycles"
|
|
newline
|
|
hexmask.long.byte 0x8 20.--23. 1. "tANPD,Asynchronous ODT to power down entry delay"
|
|
newline
|
|
hexmask.long.byte 0x8 16.--19. 1. "tAXPD,Asynchronous ODT to power down exit delay"
|
|
newline
|
|
bitfld.long 0x8 12.--14. "tODTLon,ODT turn on latency" "0: - 0x1 Reserved,?,2: 2 cycles,3: 3 cycles,4: 4 cycles,5: 5 cycles,6: 6 cycles,?"
|
|
newline
|
|
hexmask.long.byte 0x8 4.--8. 1. "tODT_idle_off,ODT turn off latency"
|
|
line.long 0xC "MDCFG0,MMDC Core Timing Configuration Register 0"
|
|
hexmask.long.byte 0xC 24.--31. 1. "tRFC,Refresh command to Active or Refresh command time"
|
|
newline
|
|
hexmask.long.byte 0xC 16.--23. 1. "tXS,Exit self refresh to non READ command"
|
|
newline
|
|
bitfld.long 0xC 13.--15. "tXP,Exit power down with DLL-on to any valid command" "0: 1 cycle,1: 2 cycles,?,?,?,?,6: 7 cycles,7: 8 cycles"
|
|
newline
|
|
hexmask.long.byte 0xC 9.--12. 1. "tXPDLL,Exit precharge power down with DLL frozen to commands requiring DLL"
|
|
newline
|
|
hexmask.long.byte 0xC 4.--8. 1. "tFAW,Four Active Window (all banks)"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--3. 1. "tCL,CAS Read Latency"
|
|
line.long 0x10 "MDCFG1,MMDC Core Timing Configuration Register 1"
|
|
bitfld.long 0x10 29.--31. "tRCD,Active command to internal read or write delay time (same bank)" "0: 1 clock,1: 2 clocks,2: 3 clocks,3: 4 clocks,4: 5 clocks,5: 6 clocks,6: 7 clocks,7: 8 clocks"
|
|
newline
|
|
bitfld.long 0x10 26.--28. "tRP,Precharge command period (same bank)" "0: 1 clock,1: 2 clocks,2: 3 clocks,3: 4 clocks,4: 5 clocks,5: 6 clocks,6: 7 clocks,7: 8 clocks"
|
|
newline
|
|
hexmask.long.byte 0x10 21.--25. 1. "tRC,Active to Active or Refresh command period (same bank)"
|
|
newline
|
|
hexmask.long.byte 0x10 16.--20. 1. "tRAS,Active to Precharge command period (same bank)"
|
|
newline
|
|
bitfld.long 0x10 15. "tRPA,Precharge-all command period" "0: Will be equal to: tRP.,1: Will be equal to: tRP+1."
|
|
newline
|
|
bitfld.long 0x10 9.--11. "tWR,WRITE recovery time (same bank)" "0: 1cycle,1: 2cycles,2: 3cycles,3: 4cycles,4: 5cycles,5: 6cycles,6: 7cycles,7: 8 cycles"
|
|
newline
|
|
hexmask.long.byte 0x10 5.--8. 1. "tMRD,Mode Register Set command cycle (all banks)"
|
|
newline
|
|
bitfld.long 0x10 0.--2. "tCWL,CAS Write Latency" "0: 2cycles ( DDR3) 1 cycle (LPDDR2),1: 3cycles ( DDR3) 2 cycles (LPDDR2),2: 4cycles ( DDR3) 3 cycles (LPDDR2),3: 5cycles ( DDR3) 4 cycles (LPDDR2),4: 6cycles ( DDR3) 5 cycles (LPDDR2),5: 7cycles ( DDR3) 6 cycles (LPDDR2),6: 8cycles ( DDR3) 7 cycles (LPDDR2),?"
|
|
line.long 0x14 "MDCFG2,MMDC Core Timing Configuration Register 2"
|
|
hexmask.long.word 0x14 16.--24. 1. "tDLLK,DLL locking time"
|
|
newline
|
|
bitfld.long 0x14 6.--8. "tRTP,Internal READ command to Precharge command delay (same bank)" "0: 1cycle,1: 2cycles,2: 3cycles,3: 4cycles,4: 5cycles,5: 6cycles,6: 7cycles,7: 8 cycles"
|
|
newline
|
|
bitfld.long 0x14 3.--5. "tWTR,Internal WRITE to READ command delay (same bank)" "0: 1cycle,1: 2cycles,2: 3cycles,3: 4cycles,4: 5cycles,5: 6cycles,6: 7cycles,7: 8 cycles"
|
|
newline
|
|
bitfld.long 0x14 0.--2. "tRRD,Active to Active command period (all banks)" "0: 1cycle,1: 2cycles,2: 3cycles,3: 4cycles,4: 5cycles,5: 6cycles,6: 7cycles,?"
|
|
line.long 0x18 "MDMISC,MMDC Core Miscellaneous Register"
|
|
rbitfld.long 0x18 31. "CS0_RDY,External status device on CS0" "0: Device in wake-up period.,1: Device is ready for initialization."
|
|
newline
|
|
rbitfld.long 0x18 30. "CS1_RDY,External status device on CS1" "0: Device in wake-up period.,1: Device is ready for initialization."
|
|
newline
|
|
bitfld.long 0x18 20. "CALIB_PER_CS,Number of chip-select for calibration process" "0: Calibration is targetted to CS0,1: Calibration is targetted to CS1"
|
|
newline
|
|
bitfld.long 0x18 19. "ADDR_MIRROR,Address mirroring" "0: Address mirroring disabled.,1: Address mirroring enabled."
|
|
newline
|
|
bitfld.long 0x18 18. "LHD,Latency hiding disable" "0: Latency hiding on.,1: Latency hiding disable."
|
|
newline
|
|
bitfld.long 0x18 16.--17. "WALAT,Write Additional latency" "0: No additional latency required.,1: 1 cycle additional delay,2: 2 cycles additional delay,3: 3 cycles additional delay"
|
|
newline
|
|
bitfld.long 0x18 12. "BI_ON,Bank Interleaving On" "0: Banks are not interleaved and address will be..,1: Banks are interleaved and address will be.."
|
|
newline
|
|
bitfld.long 0x18 11. "LPDDR2_S2,LPDDR2 S2 device type indication" "0: LPDDR2-S4 device is used.,1: LPDDR2-S2 device is used."
|
|
newline
|
|
bitfld.long 0x18 9.--10. "MIF3_MODE,Command prediction working mode" "0: Disable prediction.,1: Enable prediction based on : Valid access on..,2: Enable prediction based on: Valid access on..,3: Enable prediction based on: Valid access on.."
|
|
newline
|
|
bitfld.long 0x18 6.--8. "RALAT,Read Additional Latency" "0: no additional latency.,1: 1 cycle additional latency.,2: 2 cycles additional latency.,3: 3 cycles additional latency.,4: 4 cycles additional latency.,5: 5 cycles additional latency.,6: 6 cycles additional latency.,7: 7 cycles additional latency."
|
|
newline
|
|
bitfld.long 0x18 5. "DDR_4_BANK,Number of banks per DDR device" "0: 8 banks device is being used. (Default),1: 4 banks device is being used"
|
|
newline
|
|
bitfld.long 0x18 3.--4. "DDR_TYPE,DDR TYPE. This field determines the type of the external DDR device." "0: DDR3 device is used. (Default),1: LPDDR2 device is used.,?,?"
|
|
newline
|
|
bitfld.long 0x18 1. "RST,Software Reset" "0: Do nothing.,1: Assert reset to the MMDC."
|
|
line.long 0x1C "MDSCR,MMDC Core Special Command Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. "CMD_ADDR_MSB_MR_OP,Command/Address MSB"
|
|
newline
|
|
hexmask.long.byte 0x1C 16.--23. 1. "CMD_ADDR_LSB_MR_ADDR,Command/Address LSB"
|
|
newline
|
|
bitfld.long 0x1C 15. "CON_REQ,Configuration request" "0: No request to configure MMDC.,1: A request to configure MMDC is valid"
|
|
newline
|
|
rbitfld.long 0x1C 14. "CON_ACK,Configuration acknowledge" "0: Configuration of MMDC registers is forbidden.,1: Configuration of MMDC registers is permitted."
|
|
newline
|
|
rbitfld.long 0x1C 10. "MRR_READ_DATA_VALID,MRR read data valid" "0: Cleared upon the assertion of MRR command,1: Set after MRR data is valid and stored at MDMRR.."
|
|
newline
|
|
bitfld.long 0x1C 9. "WL_EN,DQS pads direction" "0: Exit write leveling mode or stay in normal mode.,1: Write leveling entry command was sent."
|
|
newline
|
|
bitfld.long 0x1C 4.--6. "CMD,Command" "0: Normal operation,1: Precharge all command is sent independently of..,2: Auto-Refresh Command (set correct CMD_CS).,3: Load Mode Register Command ( DDR3 set correct..,4: ZQ calibration ( DDR3 set correct CMD_CS..,5: Precharge all only if banks open (set correct..,6: MRR command (LPDDR2 set correct CMD_CS MR_ADDR),?"
|
|
newline
|
|
bitfld.long 0x1C 3. "CMD_CS,Chip Select. This field determines which chip select the command is targeted to" "0: to Chip-select 0,1: to Chip-select 1"
|
|
newline
|
|
bitfld.long 0x1C 0.--2. "CMD_BA,Bank Address" "0: bank address 0,1: bank address 1,2: bank address 2,?,?,?,?,7: bank address 7"
|
|
line.long 0x20 "MDREF,MMDC Core Refresh Control Register"
|
|
hexmask.long.word 0x20 16.--31. 1. "REF_CNT,Refresh Counter at DDR clock period If REF_SEL equals '2' a refresh cycle will begin every amount of DDR cycles configured in this field"
|
|
newline
|
|
bitfld.long 0x20 14.--15. "REF_SEL,Refresh Selector. This bit selects the source of the clock that will trigger each refresh cycle:" "0: Periodic refresh cycles will be triggered in..,1: Periodic refresh cycles will be triggered in..,?,?"
|
|
newline
|
|
bitfld.long 0x20 11.--13. "REFR,Refresh Rate" "0: 1 refresh,1: 2 refreshes,2: 3 refreshes,3: 4 refreshes,4: 5 refreshes,5: 6 refreshes,6: 7 refreshes,7: 8 refreshes"
|
|
newline
|
|
bitfld.long 0x20 0. "START_REF,Manual start of refresh cycle" "0: Do nothing.,1: Start a refresh cycle."
|
|
group.long 0x2C++0x7
|
|
line.long 0x0 "MDRWD,MMDC Core Read/Write Command Delay Register"
|
|
hexmask.long.word 0x0 16.--28. 1. "tDAI,Device auto initialization period.(maximum) This field is relevant only to LPDDR2 mode"
|
|
newline
|
|
bitfld.long 0x0 12.--14. "RTW_SAME,Read to write delay for the same chip-select" "0: 0 cycle,1: 1 cycle,2: 2 cycles (Default),3: 3 cycles,4: 4 cycles,5: 5 cycles,6: 6 cycles,7: 7 cycles"
|
|
newline
|
|
bitfld.long 0x0 9.--11. "WTR_DIFF,Write to read delay for different chip-select" "0: 0 cycle,1: 1 cycle,2: 2 cycles,3: 3 cycles (Default),4: 4 cycles,5: 5 cycles,6: 6 cycles,7: 7 cycles"
|
|
newline
|
|
bitfld.long 0x0 6.--8. "WTW_DIFF,Write to write delay for different chip-select" "0: 0 cycle,1: 1 cycle,2: 2 cycles,3: 3 cycles (Default),4: 4 cycles,5: 5 cycles,6: 6 cycles,7: 7 cycles"
|
|
newline
|
|
bitfld.long 0x0 3.--5. "RTW_DIFF,Read to write delay for different chip-select" "0: 0 cycle,1: 1 cycle,2: 2 cycles (Default),3: 3 cycles,4: 4 cycles,5: 5 cycles,6: 6 cycles,7: 7 cycles"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "RTR_DIFF,Read to read delay for different chip-select" "0: 0 cycle,1: 1 cycle,2: 2 cycles (Default),3: 3 cycles,4: 4 cycles,5: 5 cycles,6: 6 cycles,7: 7 cycles"
|
|
line.long 0x4 "MDOR,MMDC Core Out of Reset Delays Register"
|
|
hexmask.long.byte 0x4 16.--23. 1. "tXPR,DDR3: CKE HIGH to a valid command"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--13. 1. "SDE_to_RST,DDR3: Time from SDE enable until DDR reset# is high"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--5. 1. "RST_to_CKE,DDR3: Time from SDE enable to CKE rise"
|
|
rgroup.long 0x34++0x3
|
|
line.long 0x0 "MDMRR,MMDC Core MRR Data Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "MRR_READ_DATA3,MRR DATA that arrived on DQ[31:24]"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--23. 1. "MRR_READ_DATA2,MRR DATA that arrived on DQ[23:16]"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "MRR_READ_DATA1,MRR DATA that arrived on DQ[15:8]"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "MRR_READ_DATA0,MRR DATA that arrived on DQ[7:0]"
|
|
group.long 0x38++0xB
|
|
line.long 0x0 "MDCFG3LP,MMDC Core Timing Configuration Register 3"
|
|
hexmask.long.byte 0x0 16.--21. 1. "RC_LP,Active to Active or Refresh command period (same bank)"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "tRCD_LP,Active command to internal read or write delay time (same bank)"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--7. 1. "tRPpb_LP,Precharge (per bank) command period (same bank). (This field is valid only for LPDDR2 memories)"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "tRPab_LP,Precharge (all banks) command period. (This field is valid only for LPDDR2 memories)"
|
|
line.long 0x4 "MDMR4,MMDC Core MR4 Derating Register"
|
|
bitfld.long 0x4 8. "tRRD_DE,tRRD derating value." "0: Original tRRD is used.,1: tRRD is derated in 1 cycle."
|
|
newline
|
|
bitfld.long 0x4 7. "tRP_DE,tRP derating value." "0: Original tRP is used.,1: tRP is derated in 1 cycle."
|
|
newline
|
|
bitfld.long 0x4 6. "tRAS_DE,tRAS derating value." "0: Original tRAS is used.,1: tRAS is derated in 1 cycle."
|
|
newline
|
|
bitfld.long 0x4 5. "tRC_DE,tRC derating value." "0: Original tRC is used.,1: tRC is derated in 1 cycle."
|
|
newline
|
|
bitfld.long 0x4 4. "tRCD_DE,tRCD derating value." "0: Original tRCD is used.,1: tRCD is derated in 1 cycle."
|
|
newline
|
|
rbitfld.long 0x4 1. "UPDATE_DE_ACK,Update Derated Values Acknowledge" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "UPDATE_DE_REQ,Update Derated Values Request" "0: Do nothing.,1: Request to update the following values: tRRD.."
|
|
line.long 0x8 "MDASP,MMDC Core Address Space Partition Register"
|
|
hexmask.long.byte 0x8 0.--6. 1. "CS0_END,CS0_END"
|
|
group.long 0x400++0x17
|
|
line.long 0x0 "MAARCR,MMDC Core AXI Reordering Control Regsiter"
|
|
bitfld.long 0x0 31. "ARCR_SEC_ERR_LOCK,Once set this bit locks ARCR_SEC_ERR_EN and prevents from its updating" "0: ARCR_SEC_ERR_EN is unlocked so can be updated..,1: ARCR_SEC_ERR_EN is locked so it can't be updated"
|
|
newline
|
|
bitfld.long 0x0 30. "ARCR_SEC_ERR_EN,This bit defines whether security read/write access violation result in SLV Error response or in OKAY response Default value is 0x1 - encoding 1(response is SLV Error rresp/bresp=2'b10)" "0: security violation results in OKAY response..,1: security violation results in SLAVE Error.."
|
|
newline
|
|
bitfld.long 0x0 28. "ARCR_EXC_ERR_EN,This bit defines whether exclusive read/write access violation of AXI 6" "0: violation of AXI exclusive rules (6.2.4) result..,1: violation of AXI exclusive rules (6.2.4) result.."
|
|
newline
|
|
bitfld.long 0x0 24. "ARCR_RCH_EN,This bit defines whether Real time channel is activated and bypassed all other pending accesses So accesses with QoS=='F' will be granted the highest prioritiy in the optimization/reordering mechanism Default value is 0x1 - encoding 1.." "0: normal prioritization no bypassing,1: accesses with QoS=='F' bypass the arbitration"
|
|
newline
|
|
bitfld.long 0x0 20.--22. "ARCR_PAG_HIT,ARCR Page Hit Rate" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 16.--18. "ARCR_ACC_HIT,ARCR Access Hit Rate" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "ARCR_DYN_JMP,ARCR Dynamic Jump"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--7. 1. "ARCR_DYN_MAX,ARCR Dynamic Maximum"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "ARCR_GUARD,ARCR Guard"
|
|
line.long 0x4 "MAPSR,MMDC Core Power Saving Control and Status Register"
|
|
rbitfld.long 0x4 25. "DVACK,General DVFS acknowledge" "0,1"
|
|
newline
|
|
rbitfld.long 0x4 24. "LPACK,General low-power acknowledge" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "DVFS,General DVFS request" "0: no dvfs request,1: dvfs request"
|
|
newline
|
|
bitfld.long 0x4 20. "LPMD,General LPMD request" "0: no lpmd request,1: lpmd request"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--15. 1. "PST,Automatic Power saving timer"
|
|
newline
|
|
rbitfld.long 0x4 6. "WIS,Write Idle Status.This read only bit indicates whether write request buffer is idle (empty) or not." "0: idle,1: not idle"
|
|
newline
|
|
rbitfld.long 0x4 5. "RIS,Read Idle Status.This read only bit indicates whether read request buffer is idle (empty) or not." "0: idle,1: not idle"
|
|
newline
|
|
rbitfld.long 0x4 4. "PSS,Power Saving Status" "0: not in power saving,1: power saving"
|
|
newline
|
|
bitfld.long 0x4 0. "PSD,Automatic Power Saving Disable" "0: power saving enabled,1: power saving disabled (default)"
|
|
line.long 0x8 "MAEXIDR0,MMDC Core Exclusive ID Monitor Register0"
|
|
hexmask.long.word 0x8 16.--31. 1. "EXC_ID_MONITOR1,This feild defines ID for Exclusive monitor#1. Default value is 0x0020"
|
|
newline
|
|
hexmask.long.word 0x8 0.--15. 1. "EXC_ID_MONITOR0,This feild defines ID for Exclusive monitor#0. Default value is 0x0000"
|
|
line.long 0xC "MAEXIDR1,MMDC Core Exclusive ID Monitor Register1"
|
|
hexmask.long.word 0xC 16.--31. 1. "EXC_ID_MONITOR3,This feild defines ID for Exclusive monitor#3. Default value is 0x0060"
|
|
newline
|
|
hexmask.long.word 0xC 0.--15. 1. "EXC_ID_MONITOR2,This feild defines ID for Exclusive monitor#2. Default value is 0x0040"
|
|
line.long 0x10 "MADPCR0,MMDC Core Debug and Profiling Control Register 0"
|
|
bitfld.long 0x10 9. "SBS,Step By Step trigger" "0: No access will be launced toward the DDR,1: Lanuch AXI pending access toward the DDR"
|
|
newline
|
|
bitfld.long 0x10 8. "SBS_EN,Step By Step debug Enable" "0: disable,1: enable"
|
|
newline
|
|
bitfld.long 0x10 3. "CYC_OVF,Total Profiling Cycles Count Overflow" "0: no overflow,1: overflow"
|
|
newline
|
|
bitfld.long 0x10 2. "PRF_FRZ,Profiling freeze" "0: profiling counters are not frozen,1: profiling counters are frozen"
|
|
newline
|
|
bitfld.long 0x10 1. "DBG_RST,Debug and Profiling Reset. Reset all debug and profiling counters and components." "0: no reset,1: reset"
|
|
newline
|
|
bitfld.long 0x10 0. "DBG_EN,Debug and Profiling Enable" "0: disable,1: enable"
|
|
line.long 0x14 "MADPCR1,MMDC Core Debug and Profiling Control Register 1"
|
|
hexmask.long.word 0x14 16.--31. 1. "PRF_AXI_ID_MASK,Profiling AXI ID Mask. AXI ID bits which masked by this value are chosen for profiling."
|
|
newline
|
|
hexmask.long.word 0x14 0.--15. 1. "PRF_AXI_ID,Profiling AXI ID"
|
|
rgroup.long 0x418++0x1F
|
|
line.long 0x0 "MADPSR0,MMDC Core Debug and Profiling Status Register 0"
|
|
hexmask.long 0x0 0.--31. 1. "CYC_COUNT,Total Profiling cycle Count"
|
|
line.long 0x4 "MADPSR1,MMDC Core Debug and Profiling Status Register 1"
|
|
hexmask.long 0x4 0.--31. 1. "BUSY_COUNT,Profiling Busy Cycles Count"
|
|
line.long 0x8 "MADPSR2,MMDC Core Debug and Profiling Status Register 2"
|
|
hexmask.long 0x8 0.--31. 1. "RD_ACC_COUNT,Profiling Read Access Count"
|
|
line.long 0xC "MADPSR3,MMDC Core Debug and Profiling Status Register 3"
|
|
hexmask.long 0xC 0.--31. 1. "WR_ACC_COUNT,Profiling Write Access Count"
|
|
line.long 0x10 "MADPSR4,MMDC Core Debug and Profiling Status Register 4"
|
|
hexmask.long 0x10 0.--31. 1. "RD_BYTES_COUNT,Profiling Read Bytes Count"
|
|
line.long 0x14 "MADPSR5,MMDC Core Debug and Profiling Status Register 5"
|
|
hexmask.long 0x14 0.--31. 1. "WR_BYTES_COUNT,Profiling Write Bytes Count"
|
|
line.long 0x18 "MASBS0,MMDC Core Step By Step Address Register"
|
|
hexmask.long 0x18 0.--31. 1. "SBS_ADDR,Step By Step Address"
|
|
line.long 0x1C "MASBS1,MMDC Core Step By Step Address Attributes Register"
|
|
hexmask.long.word 0x1C 16.--31. 1. "SBS_AXI_ID,Step By Step AXI ID"
|
|
newline
|
|
bitfld.long 0x1C 13.--15. "SBS_LEN,Step By Step Length" "0: burst of length 1,1: burst of length 2,?,?,?,?,?,7: burst of length 8"
|
|
newline
|
|
bitfld.long 0x1C 12. "SBS_BUFF,Step By Step Buffered" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 10.--11. "SBS_BURST,Step By Step Burst" "0: FIXED,1: INCR burst,2: WRAP burst,?"
|
|
newline
|
|
bitfld.long 0x1C 7.--9. "SBS_SIZE,Step By Step Size" "0: 8 bits,1: 16 bits,2: 32 bits,3: 64 bits,4: 128bits,?,?,?"
|
|
newline
|
|
bitfld.long 0x1C 4.--6. "SBS_PROT,Step By Step Protection" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 2.--3. "SBS_LOCK,Step By Step Lock" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x1C 1. "SBS_TYPE,Step By Step Request Type" "0: write,1: read"
|
|
newline
|
|
bitfld.long 0x1C 0. "SBS_VLD,Step By Step Valid" "0: not valid,1: valid"
|
|
group.long 0x440++0x3
|
|
line.long 0x0 "MAGENP,MMDC Core General Purpose Register"
|
|
hexmask.long 0x0 0.--31. 1. "GP31_GP0,General purpose read/write bits."
|
|
group.long 0x800++0x13
|
|
line.long 0x0 "MPZQHWCTRL,MMDC PHY ZQ HW control register"
|
|
hexmask.long.byte 0x0 27.--31. 1. "ZQ_EARLY_COMPARATOR_EN_TIMER,ZQ early comparator enable timer"
|
|
newline
|
|
bitfld.long 0x0 23.--25. "TZQ_CS,Device ZQ short time" "?,?,2: 128 cycles (Default),3: 256 cycles,4: 512 cycles,5: 1024 cycles,?,?"
|
|
newline
|
|
bitfld.long 0x0 20.--22. "TZQ_OPER,Device ZQ long/oper time" "?,?,2: 128 cycles,3: 256 cycles - Default (JEDEC value for DDR3),4: 512 cycles,5: 1024 cycles,?,?"
|
|
newline
|
|
bitfld.long 0x0 17.--19. "TZQ_INIT,Device ZQ long/init time" "?,?,2: 128 cycles,3: 256 cycles,4: 512 cycles - Default (JEDEC value for DDR3),5: 1024 cycles,?,?"
|
|
newline
|
|
bitfld.long 0x0 16. "ZQ_HW_FOR,Force ZQ automatic calibration process with the S32V234 ZQ calibration pad" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 11.--15. 1. "ZQ_HW_PD_RES,ZQ HW calibration pull-down result"
|
|
newline
|
|
hexmask.long.byte 0x0 6.--10. 1. "ZQ_HW_PU_RES,ZQ automatic calibration pull-up result"
|
|
newline
|
|
hexmask.long.byte 0x0 2.--5. 1. "ZQ_HW_PER,ZQ periodic calibration time"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "ZQ_MODE,ZQ calibration mode:" "0: No ZQ calibration is issued. (Default),1: ZQ calibration is issued to S32V234 ZQ..,2: ZQ calibration command long/short is issued only..,3: ZQ calibration is issued to S32V234 ZQ.."
|
|
line.long 0x4 "MPZQSWCTRL,MMDC PHY ZQ SW control register"
|
|
bitfld.long 0x4 16.--17. "ZQ_CMP_OUT_SMP,Defines the amount of cycles between driving the ZQ signals to the ZQ pad and till sampling the comparator enable output while performing ZQ calibration process with the S32V234 ZQ calibration pad" "0: 7 cycles,1: 15 cycles,2: 23 cycles,3: 31 cycles"
|
|
newline
|
|
bitfld.long 0x4 13. "USE_ZQ_SW_VAL,Use SW ZQ configured value for I/O pads resistor controls" "0: Fields ZQ_HW_PD_VAL & ZQ_HW_PU_VAL will be..,1: Fields ZQ_SW_PD_VAL & ZQ_SW_PU_VAL will be.."
|
|
newline
|
|
bitfld.long 0x4 12. "ZQ_SW_PD,ZQ software PU/PD calibration. This bit determines the calibration stage (PU or PD)." "0: PU resistor calibration,1: PD resistor calibration"
|
|
newline
|
|
hexmask.long.byte 0x4 7.--11. 1. "ZQ_SW_PD_VAL,ZQ software pull-down resistence"
|
|
newline
|
|
hexmask.long.byte 0x4 2.--6. 1. "ZQ_SW_PU_VAL,ZQ software pull-up resistence"
|
|
newline
|
|
rbitfld.long 0x4 1. "ZQ_SW_RES,ZQ software calibration result. This bit reflects the ZQ calibration voltage comparator value." "0: Current ZQ calibration voltage is less than VDD/2.,1: Current ZQ calibration voltage is more than VDD/2"
|
|
newline
|
|
bitfld.long 0x4 0. "ZQ_SW_FOR,ZQ SW calibration enable" "0,1"
|
|
line.long 0x8 "MPWLGCR,MMDC PHY Write Leveling Configuration and Error Status Register"
|
|
rbitfld.long 0x8 11. "WL_HW_ERR3,Byte3 write-leveling HW calibration error" "0: No error was found on byte3 during..,1: An error was found on byte3 during.."
|
|
newline
|
|
rbitfld.long 0x8 10. "WL_HW_ERR2,Byte2 write-leveling HW calibration error" "0: No error was found on byte2 during..,1: An error was found on byte2 during.."
|
|
newline
|
|
rbitfld.long 0x8 9. "WL_HW_ERR1,Byte1 write-leveling HW calibration error" "0: No error was found on byte1 during..,1: An error was found on byte1 during.."
|
|
newline
|
|
rbitfld.long 0x8 8. "WL_HW_ERR0,Byte0 write-leveling HW calibration error" "0: No error was found on byte0 during..,1: An error was found on byte0 during.."
|
|
newline
|
|
rbitfld.long 0x8 7. "WL_SW_RES3,Byte3 write-leveling software result" "0: DQS3 sampled low CK during SW write-leveling.,1: DQS3 sampled high CK during SW write-leveling."
|
|
newline
|
|
rbitfld.long 0x8 6. "WL_SW_RES2,Byte2 write-leveling software result" "0: DQS2 sampled low CK during SW write-leveling.,1: DQS2 sampled high CK during SW write-leveling."
|
|
newline
|
|
rbitfld.long 0x8 5. "WL_SW_RES1,Byte1 write-leveling software result" "0: DQS1 sampled low CK during SW write-leveling.,1: DQS1 sampled high CK during SW write-leveling."
|
|
newline
|
|
rbitfld.long 0x8 4. "WL_SW_RES0,Byte0 write-leveling software result" "0: DQS0 sampled low CK during SW write-leveling.,1: DQS0 sampled high CK during SW write-leveling."
|
|
newline
|
|
bitfld.long 0x8 2. "SW_WL_CNT_EN,SW write-leveling count down enable" "0: MMDC doesn't count 25+15 cycles before issuing..,1: MMDC counts 25+15 cycles before issuing.."
|
|
newline
|
|
bitfld.long 0x8 1. "SW_WL_EN,Write-Leveling SW enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0. "HW_WL_EN,Write-Leveling HW (automatic) enable" "0,1"
|
|
line.long 0xC "MPWLDECTRL0,MMDC PHY Write Leveling Delay Control Register 0"
|
|
bitfld.long 0xC 25.--26. "WL_CYC_DEL1,Write leveling cycle delay for Byte 1" "0: No delay is added.,1: 1 cycle delay is added.,?,?"
|
|
newline
|
|
bitfld.long 0xC 24. "WL_HC_DEL1,Write leveling half cycle delay for Byte 1" "0: No delay is added.,1: Half cycle delay is added."
|
|
newline
|
|
hexmask.long.byte 0xC 16.--22. 1. "WL_DL_ABS_OFFSET1,Absolute write-leveling delay offset for Byte 1"
|
|
newline
|
|
bitfld.long 0xC 9.--10. "WL_CYC_DEL0,Write leveling cycle delay for Byte 0" "0: No delay is added.,1: 1 cycle delay is added.,?,?"
|
|
newline
|
|
bitfld.long 0xC 8. "WL_HC_DEL0,Write leveling half cycle delay for Byte 0" "0: No delay is added.,1: Half cycle delay is added."
|
|
newline
|
|
hexmask.long.byte 0xC 0.--6. 1. "WL_DL_ABS_OFFSET0,Absolute write-leveling delay offset for Byte 0"
|
|
line.long 0x10 "MPWLDECTRL1,MMDC PHY Write Leveling Delay Control Register 1"
|
|
bitfld.long 0x10 25.--26. "WL_CYC_DEL3,Write leveling cycle delay for Byte 3" "0: No delay is added.,1: 1 cycle delay is added.,?,?"
|
|
newline
|
|
bitfld.long 0x10 24. "WL_HC_DEL3,Write leveling half cycle delay for Byte 3" "0: No delay is added.,1: Half cycle delay is added."
|
|
newline
|
|
hexmask.long.byte 0x10 16.--22. 1. "WL_DL_ABS_OFFSET3,Absolute write-leveling delay offset for Byte 3"
|
|
newline
|
|
bitfld.long 0x10 9.--10. "WL_CYC_DEL2,Write leveling cycle delay for Byte 2" "0: No delay is added.,1: 1 cycle delay is added.,?,?"
|
|
newline
|
|
bitfld.long 0x10 8. "WL_HC_DEL2,Write leveling half cycle delay for Byte 2" "0: No delay is added.,1: Half cycle delay is added."
|
|
newline
|
|
hexmask.long.byte 0x10 0.--6. 1. "WL_DL_ABS_OFFSET2,Absolute write-leveling delay offset for Byte 2"
|
|
rgroup.long 0x814++0x3
|
|
line.long 0x0 "MPWLDLST,MMDC PHY Write Leveling delay-line Status Register"
|
|
hexmask.long.byte 0x0 24.--30. 1. "WL_DL_UNIT_NUM3,This field reflects the number of delay units that are actually used by write leveling delay-line 3"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--22. 1. "WL_DL_UNIT_NUM2,This field reflects the number of delay units that are actually used by write leveling delay-line 2"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--14. 1. "WL_DL_UNIT_NUM1,This field reflects the number of delay units that are actually used by write leveling delay-line 1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "WL_DL_UNIT_NUM0,This field reflects the number of delay units that are actually used by write leveling delay-line 0"
|
|
group.long 0x818++0x13
|
|
line.long 0x0 "MPODTCTRL,MMDC PHY ODT control register"
|
|
bitfld.long 0x0 16.--18. "ODT3_INT_RES,On chip ODT byte3 resistor - This field determines the Rtt_Nom of the on chip ODT byte3 resistor during read accesses" "0: Rtt_Nom Disabled.,1: Rtt_Nom 120 Ohm,2: Rtt_Nom 60 Ohm,3: Rtt_Nom 40 Ohm,4: Rtt_Nom 30 Ohm,5: Rtt_Nom 24 Ohm,6: Rtt_Nom 20 Ohm,7: Rtt_Nom 17 Ohm"
|
|
newline
|
|
bitfld.long 0x0 12.--14. "ODT2_INT_RES,On chip ODT byte2 resistor - This field determines the Rtt_Nom of the on chip ODT byte2 resistor during read accesses" "0: Rtt_Nom Disabled.,1: Rtt_Nom 120 Ohm,2: Rtt_Nom 60 Ohm,3: Rtt_Nom 40 Ohm,4: Rtt_Nom 30 Ohm,5: Rtt_Nom 24 Ohm,6: Rtt_Nom 20 Ohm,7: Rtt_Nom 17 Ohm"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "ODT1_INT_RES,On chip ODT byte1 resistor - This field determines the Rtt_Nom of the on chip ODT byte1 resistor during read accesses" "0: Rtt_Nom Disabled.,1: Rtt_Nom 120 Ohm,2: Rtt_Nom 60 Ohm,3: Rtt_Nom 40 Ohm,4: Rtt_Nom 30 Ohm,5: Rtt_Nom 24 Ohm,6: Rtt_Nom 20 Ohm,7: Rtt_Nom 17 Ohm"
|
|
newline
|
|
bitfld.long 0x0 4.--6. "ODT0_INT_RES,On chip ODT byte0 resistor - This field determines the Rtt_Nom of the on chip ODT byte0 resistor during read accesses" "0: Rtt_Nom Disabled.,1: Rtt_Nom 120 Ohm,2: Rtt_Nom 60 Ohm,3: Rtt_Nom 40 Ohm,4: Rtt_Nom 30 Ohm,5: Rtt_Nom 24 Ohm,6: Rtt_Nom 20 Ohm,7: Rtt_Nom 17 Ohm"
|
|
newline
|
|
bitfld.long 0x0 3. "ODT_RD_ACT_EN,Active read CS ODT enable" "0: Active CS ODT pin is disabled during read access.,1: Active CS ODT pin is enabled during read access."
|
|
newline
|
|
bitfld.long 0x0 2. "ODT_RD_PAS_EN,Inactive read CS ODT enable" "0: Inactive CS ODT pin is disabled during read..,1: Inactive CS ODT pin is enabled during read.."
|
|
newline
|
|
bitfld.long 0x0 1. "ODT_WR_ACT_EN,Active write CS ODT enable" "0: Active CS ODT pin is disabled during write access.,1: Active CS ODT pin is enabled during write access."
|
|
newline
|
|
bitfld.long 0x0 0. "ODT_WR_PAS_EN,Inactive write CS ODT enable" "0: Inactive CS ODT pin is disabled during write..,1: Inactive CS ODT pin is enabled during write.."
|
|
line.long 0x4 "MPRDDQBY0DL,MMDC PHY Read DQ Byte0 Delay Register"
|
|
bitfld.long 0x4 28.--30. "rd_dq7_del,Read dqs0 to dq7 delay fine-tuning" "0: No change in dq7 delay,1: Add dq7 delay of 1 delay unit,2: Add dq7 delay of 2 delay units.,3: Add dq7 delay of 3 delay units.,4: Add dq7 delay of 4 delay units.,5: Add dq7 delay of 5 delay units.,6: Add dq7 delay of 6 delay units.,7: Add dq7 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0x4 24.--26. "rd_dq6_del,Read dqs0 to dq6 delay fine-tuning" "0: No change in dq6 delay,1: Add dq6 delay of 1 delay unit,2: Add dq6 delay of 2 delay units.,3: Add dq6 delay of 3 delay units.,4: Add dq6 delay of 4 delay units.,5: Add dq6 delay of 5 delay units.,6: Add dq6 delay of 6 delay units.,7: Add dq6 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0x4 20.--22. "rd_dq5_del,Read dqs0 to dq5 delay fine-tuning" "0: No change in dq5 delay,1: Add dq5 delay of 1 delay unit,2: Add dq5 delay of 2 delay units.,3: Add dq5 delay of 3 delay units.,4: Add dq5 delay of 4 delay units.,5: Add dq5 delay of 5 delay units.,6: Add dq5 delay of 6 delay units.,7: Add dq5 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0x4 16.--18. "rd_dq4_del,Read dqs0 to dq4 delay fine-tuning" "0: No change in dq4 delay,1: Add dq4 delay of 1 delay unit,2: Add dq4 delay of 2 delay units.,3: Add dq4 delay of 3 delay units.,4: Add dq4 delay of 4 delay units.,5: Add dq4 delay of 5 delay units.,6: Add dq4 delay of 6 delay units.,7: Add dq4 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0x4 12.--14. "rd_dq3_del,Read dqs0 to dq3 delay fine-tuning" "0: No change in dq3 delay,1: Add dq3 delay of 1 delay unit,2: Add dq3 delay of 2 delay units.,3: Add dq3 delay of 3 delay units.,4: Add dq3 delay of 4 delay units.,5: Add dq3 delay of 5 delay units.,6: Add dq3 delay of 6 delay units.,7: Add dq3 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0x4 8.--10. "rd_dq2_del,Read dqs0 to dq2 delay fine-tuning" "0: No change in dq2 delay,1: Add dq2 delay of 1 delay unit,2: Add dq2 delay of 2 delay units.,3: Add dq2 delay of 3 delay units.,4: Add dq2 delay of 4 delay units.,5: Add dq2 delay of 5 delay units.,6: Add dq2 delay of 6 delay units.,7: Add dq2 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0x4 4.--6. "rd_dq1_del,Read dqs0 to dq1 delay fine-tuning" "0: No change in dq1 delay,1: Add dq1 delay of 1 delay unit,2: Add dq1 delay of 2 delay units.,3: Add dq1 delay of 3 delay units.,4: Add dq1 delay of 4 delay units.,5: Add dq1 delay of 5 delay units.,6: Add dq1 delay of 6 delay units.,7: Add dq1 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0x4 0.--2. "rd_dq0_del,Read dqs0 to dq0 delay fine-tuning" "0: No change in dq0 delay,1: Add dq0 delay of 1 delay unit,2: Add dq0 delay of 2 delay units.,3: Add dq0 delay of 3 delay units.,4: Add dq0 delay of 4 delay units.,5: Add dq0 delay of 5 delay units.,6: Add dq0 delay of 6 delay units.,7: Add dq0 delay of 7 delay units."
|
|
line.long 0x8 "MPRDDQBY1DL,MMDC PHY Read DQ Byte1 Delay Register"
|
|
bitfld.long 0x8 28.--30. "rd_dq15_del,Read dqs1 to dq15 delay fine-tuning" "0: No change in dq15 delay,1: Add dq15 delay of 1 delay unit,2: Add dq15 delay of 2 delay units.,3: Add dq15 delay of 3 delay units.,4: Add dq15 delay of 4 delay units.,5: Add dq15 delay of 5 delay units.,6: Add dq15 delay of 6 delay units.,7: Add dq15 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0x8 24.--26. "rd_dq14_del,Read dqs1 to dq14 delay fine-tuning" "0: No change in dq14 delay,1: Add dq14 delay of 1 delay unit,2: Add dq14 delay of 2 delay units.,3: Add dq14 delay of 3 delay units.,4: Add dq14 delay of 4 delay units.,5: Add dq14 delay of 5 delay units.,6: Add dq14 delay of 6 delay units.,7: Add dq14 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0x8 20.--22. "rd_dq13_del,Read dqs1 to dq13 delay fine-tuning" "0: No change in dq13 delay,1: Add dq13 delay of 1 delay unit,2: Add dq13 delay of 2 delay units.,3: Add dq13 delay of 3 delay units.,4: Add dq13 delay of 4 delay units.,5: Add dq13 delay of 5 delay units.,6: Add dq13 delay of 6 delay units.,7: Add dq13 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0x8 16.--18. "rd_dq12_del,Read dqs1 to dq12 delay fine-tuning" "0: No change in dq12 delay,1: Add dq12 delay of 1 delay unit,2: Add dq12 delay of 2 delay units.,3: Add dq12 delay of 3 delay units.,4: Add dq12 delay of 4 delay units.,5: Add dq12 delay of 5 delay units.,6: Add dq12 delay of 6 delay units.,7: Add dq12 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0x8 12.--14. "rd_dq11_del,Read dqs1 to dq11 delay fine-tuning" "0: No change in dq11 delay,1: Add dq11 delay of 1 delay unit,2: Add dq11 delay of 2 delay units.,3: Add dq11 delay of 3 delay units.,4: Add dq11 delay of 4 delay units.,5: Add dq11 delay of 5 delay units.,6: Add dq11 delay of 6 delay units.,7: Add dq11 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0x8 8.--10. "rd_dq10_del,Read dqs1 to dq10 delay fine-tuning" "0: No change in dq10 delay,1: Add dq10 delay of 1 delay unit,2: Add dq10 delay of 2 delay units.,3: Add dq10 delay of 3 delay units.,4: Add dq10 delay of 4 delay units.,5: Add dq10 delay of 5 delay unit,6: Add dq10 delay of 6 delay units.,7: Add dq10 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0x8 4.--6. "rd_dq9_del,Read dqs1 to dq9 delay fine-tuning" "0: No change in dq9 delay,1: Add dq9 delay of 1 delay unit,2: Add dq9 delay of 2 delay units.,3: Add dq9 delay of 3 delay units.,4: Add dq9 delay of 4 delay units.,5: Add dq9 delay of 5 delay units.,6: Add dq9 delay of 6 delay units.,7: Add dq9 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0x8 0.--2. "rd_dq8_del,Read dqs1 to dq8 delay fine-tuning" "0: No change in dq8 delay,1: Add dq8 delay of 1 delay unit,2: Add dq8 delay of 2 delay units.,3: Add dq8 delay of 3 delay units.,4: Add dq8 delay of 4 delay units.,5: Add dq8 delay of 5 delay units.,6: Add dq8 delay of 6 delay units.,7: Add dq8 delay of 7 delay units."
|
|
line.long 0xC "MPRDDQBY2DL,MMDC PHY Read DQ Byte2 Delay Register"
|
|
bitfld.long 0xC 28.--30. "rd_dq23_del,Read dqs2 to dq23 delay fine-tuning" "0: No change in dq23 delay,1: Add dq23 delay of 1 delay unit,2: Add dq23 delay of 2 delay units.,3: Add dq23 delay of 3 delay units.,4: Add dq23 delay of 4 delay units.,5: Add dq23 delay of 5 delay units.,6: Add dq23 delay of 6 delay units.,7: Add dq23 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0xC 24.--26. "rd_dq22_del,Read dqs2 to dq22 delay fine-tuning" "0: No change in dq22 delay,1: Add dq22 delay of 1 delay unit,2: Add dq22 delay of 2 delay units.,3: Add dq22 delay of 3 delay units.,4: Add dq22 delay of 4 delay units.,5: Add dq22 delay of 5 delay units.,6: Add dq22 delay of 6 delay units.,7: Add dq22 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0xC 20.--22. "rd_dq21_del,Read dqs2 to dq21 delay fine-tuning" "0: No change in dq21 delay,1: Add dq21 delay of 1 delay unit,2: Add dq21 delay of 2 delay units.,3: Add dq21 delay of 3 delay units.,4: Add dq21 delay of 4 delay units.,5: Add dq21 delay of 5 delay units.,6: Add dq21 delay of 6 delay units.,7: Add dq21 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0xC 16.--18. "rd_dq20_del,Read dqs2 to dq20 delay fine-tuning" "0: No change in dq20 delay,1: Add dq20 delay of 1 delay unit,2: Add dq20 delay of 2 delay units.,3: Add dq20 delay of 3 delay units.,4: Add dq20 delay of 4 delay units.,5: Add dq20 delay of 5 delay units.,6: Add dq20 delay of 6 delay units.,7: Add dq20 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0xC 12.--14. "rd_dq19_del,Read dqs2 to dq19 delay fine-tuning" "0: No change in dq19 delay,1: Add dq19 delay of 1 delay unit,2: Add dq19 delay of 2 delay units.,3: Add dq19 delay of 3 delay units.,4: Add dq19 delay of 4 delay units.,5: Add dq19 delay of 5 delay units.,6: Add dq19 delay of 6 delay units.,7: Add dq19 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0xC 8.--10. "rd_dq18_del,Read dqs2 to dq18 delay fine-tuning" "0: No change in dq18 delay,1: Add dq18 delay of 1 delay unit,2: Add dq18 delay of 2 delay units.,3: Add dq18 delay of 3 delay units.,4: Add dq18 delay of 4 delay units.,5: Add dq18 delay of 5 delay units.,6: Add dq18 delay of 6 delay units.,7: Add dq18 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0xC 4.--6. "rd_dq17_del,Read dqs2 to dq17 delay fine-tuning" "0: No change in dq17 delay,1: Add dq17 delay of 1 delay unit,2: Add dq17 delay of 2 delay units.,3: Add dq17 delay of 3 delay units.,4: Add dq17 delay of 4 delay units.,5: Add dq17 delay of 5 delay units.,6: Add dq17 delay of 6 delay units.,7: Add dq17 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0xC 0.--2. "rd_dq16_del,Read dqs2 to dq16 delay fine-tuning" "0: No change in dq16 delay,1: Add dq16 delay of 1 delay unit,2: Add dq16 delay of 2 delay units.,3: Add dq16 delay of 3 delay units.,4: Add dq16 delay of 4 delay units.,5: Add dq16 delay of 5 delay units.,6: Add dq16 delay of 6 delay units.,7: Add dq16 delay of 7 delay units."
|
|
line.long 0x10 "MPRDDQBY3DL,MMDC PHY Read DQ Byte3 Delay Register"
|
|
bitfld.long 0x10 28.--30. "rd_dq31_del,Read dqs3 to dq31 delay fine-tuning" "0: No change in dq31 delay,1: Add dq31 delay of 1 delay unit,2: Add dq31 delay of 2 delay units.,3: Add dq31 delay of 3 delay units.,4: Add dq31 delay of 4 delay units.,5: Add dq31 delay of 5 delay units.,6: Add dq31 delay of 6 delay units.,7: Add dq31 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0x10 24.--26. "rd_dq30_del,Read dqs3 to dq30 delay fine-tuning" "0: No change in dq30 delay,1: Add dq30 delay of 1 delay unit,2: Add dq30 delay of 2 delay units.,3: Add dq30 delay of 3 delay units.,4: Add dq30 delay of 4 delay units.,5: Add dq30 delay of 5 delay units.,6: Add dq30 delay of 6 delay units.,7: Add dq30 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0x10 20.--22. "rd_dq29_del,Read dqs3 to dq29 delay fine-tuning" "0: No change in dq29 delay,1: Add dq29 delay of 1 delay unit,2: Add dq29 delay of 2 delay units.,3: Add dq29 delay of 3 delay units.,4: Add dq29 delay of 4 delay units.,5: Add dq29 delay of 5 delay units.,6: Add dq29 delay of 6 delay units.,7: Add dq29 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0x10 16.--18. "rd_dq28_del,Read dqs3 to dq28 delay fine-tuning" "0: No change in dq28 delay,1: Add dq28 delay of 1 delay unit,2: Add dq28 delay of 2 delay units.,3: Add dq28 delay of 3 delay units.,4: Add dq28 delay of 4 delay units.,5: Add dq28 delay of 5 delay units.,6: Add dq28 delay of 6 delay units.,7: Add dq28 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0x10 12.--14. "rd_dq27_del,Read dqs3 to dq27 delay fine-tuning" "0: No change in dq27 delay,1: Add dq27 delay of 1 delay unit,2: Add dq27 delay of 2 delay units.,3: Add dq27 delay of 3 delay units.,4: Add dq27 delay of 4 delay units.,5: Add dq27 delay of 5 delay units.,6: Add dq27 delay of 6 delay units.,7: Add dq27 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0x10 8.--10. "rd_dq26_del,Read dqs3 to dq26 delay fine-tuning" "0: No change in dq26 delay,1: Add dq26 delay of 1 delay unit,2: Add dq26 delay of 2 delay units.,3: Add dq26 delay of 3 delay units.,4: Add dq26 delay of 4 delay units.,5: Add dq26 delay of 5 delay units.,6: Add dq26 delay of 6 delay units.,7: Add dq26 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0x10 4.--6. "rd_dq25_del,Read dqs3 to dq25 delay fine-tuning" "0: No change in dq25 delay,1: Add dq25 delay of 1 delay unit,2: Add dq25 delay of 2 delay units.,3: Add dq25 delay of 3 delay units.,4: Add dq25 delay of 4 delay units.,5: Add dq25 delay of 5 delay units.,6: Add dq25 delay of 6 delay units.,7: Add dq25 delay of 7 delay units."
|
|
newline
|
|
bitfld.long 0x10 0.--2. "rd_dq24_del,Read dqs3 to dq24 delay fine-tuning" "0: No change in dq24 delay,1: Add dq24 delay of 1 delay unit,2: Add dq24 delay of 2 delay units.,3: Add dq24 delay of 3 delay units.,4: Add dq24 delay of 4 delay units.,5: Add dq24 delay of 5 delay units.,6: Add dq24 delay of 6 delay units.,7: Add dq24 delay of 7 delay units."
|
|
group.long 0x83C++0x7
|
|
line.long 0x0 "MPDGCTRL0,MMDC PHY Read DQS Gating Control Register 0"
|
|
bitfld.long 0x0 31. "RST_RD_FIFO,Reset Read Data FIFO and associated pointers" "0,1"
|
|
newline
|
|
bitfld.long 0x0 30. "DG_CMP_CYC,Read DQS gating sample cycle" "0: MMDC waits 16 DDR cycles,1: MMDC waits 32 DDR cycles"
|
|
newline
|
|
bitfld.long 0x0 29. "DG_DIS,Read DQS gating disable" "0: Read DQS gating mechanism is enbled,1: Read DQS gating mechanism is disabled"
|
|
newline
|
|
bitfld.long 0x0 28. "HW_DG_EN,Enable automatic read DQS gating calibration" "0: Disable automatic read DQS gating calibration,1: Start automatic read DQS gating calibration"
|
|
newline
|
|
hexmask.long.byte 0x0 24.--27. 1. "DG_HC_DEL1,Read DQS gating half cycles delay for Byte1"
|
|
newline
|
|
bitfld.long 0x0 23. "DG_EXT_UP,DG extend upper boundary" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--22. 1. "DG_DL_ABS_OFFSET1,Absolute read DQS gating delay offset for Byte1"
|
|
newline
|
|
rbitfld.long 0x0 12. "HW_DG_ERR,HW DQS gating error" "0: No error was found during the DQS gating HW..,1: An error was found during the DQS gating HW.."
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "DG_HC_DEL0,Read DQS gating half cycles delay for Byte0"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "DG_DL_ABS_OFFSET0,Absolute read DQS gating delay offset for Byte0"
|
|
line.long 0x4 "MPDGCTRL1,MMDC PHY Read DQS Gating Control Register 1"
|
|
hexmask.long.byte 0x4 24.--27. 1. "DG_HC_DEL3,Read DQS gating half cycles delay for Byte3"
|
|
newline
|
|
hexmask.long.byte 0x4 16.--22. 1. "DG_DL_ABS_OFFSET3,Absolute read DQS gating delay offset for Byte3"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--11. 1. "DG_HC_DEL2,Read DQS gating half cycles delay for Byte2"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--6. 1. "DG_DL_ABS_OFFSET2,Absolute read DQS gating delay offset for Byte2"
|
|
rgroup.long 0x844++0x3
|
|
line.long 0x0 "MPDGDLST0,MMDC PHY Read DQS Gating delay-line Status Register"
|
|
hexmask.long.byte 0x0 24.--30. 1. "DG_DL_UNIT_NUM3,This field reflects the number of delay units that are actually used by read DQS gating delay-line 3"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--22. 1. "DG_DL_UNIT_NUM2,This field reflects the number of delay units that are actually used by read DQS gating delay-line 2"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--14. 1. "DG_DL_UNIT_NUM1,This field reflects the number of delay units that are actually used by read DQS gating delay-line 1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "DG_DL_UNIT_NUM0,This field reflects the number of delay units that are actually used by read DQS gating delay-line 0"
|
|
group.long 0x848++0x3
|
|
line.long 0x0 "MPRDDLCTL,MMDC PHY Read delay-lines Configuration Register"
|
|
hexmask.long.byte 0x0 24.--30. 1. "RD_DL_ABS_OFFSET3,Absolute read delay offset for Byte3"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--22. 1. "RD_DL_ABS_OFFSET2,Absolute read delay offset for Byte2"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--14. 1. "RD_DL_ABS_OFFSET1,Absolute read delay offset for Byte1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "RD_DL_ABS_OFFSET0,Absolute read delay offset for Byte0"
|
|
rgroup.long 0x84C++0x3
|
|
line.long 0x0 "MPRDDLST,MMDC PHY Read delay-lines Status Register"
|
|
hexmask.long.byte 0x0 24.--30. 1. "RD_DL_UNIT_NUM3,This field reflects the number of delay units that are actually used by read delay-line 3."
|
|
newline
|
|
hexmask.long.byte 0x0 16.--22. 1. "RD_DL_UNIT_NUM2,This field reflects the number of delay units that are actually used by read delay-line 2."
|
|
newline
|
|
hexmask.long.byte 0x0 8.--14. 1. "RD_DL_UNIT_NUM1,This field reflects the number of delay units that are actually used by read delay-line 1."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "RD_DL_UNIT_NUM0,This field reflects the number of delay units that are actually used by read delay-line 0."
|
|
group.long 0x850++0x3
|
|
line.long 0x0 "MPWRDLCTL,MMDC PHY Write delay-lines Configuration Register"
|
|
hexmask.long.byte 0x0 24.--30. 1. "WR_DL_ABS_OFFSET3,Absolute write delay offset for Byte3"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--22. 1. "WR_DL_ABS_OFFSET2,Absolute write delay offset for Byte2"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--14. 1. "WR_DL_ABS_OFFSET1,Absolute write delay offset for Byte1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "WR_DL_ABS_OFFSET0,Absolute write delay offset for Byte0"
|
|
rgroup.long 0x854++0x3
|
|
line.long 0x0 "MPWRDLST,MMDC PHY Write delay-lines Status Register"
|
|
hexmask.long.byte 0x0 24.--30. 1. "WR_DL_UNIT_NUM3,This field reflects the number of delay units that are actually used by write delay-line 3."
|
|
newline
|
|
hexmask.long.byte 0x0 16.--22. 1. "WR_DL_UNIT_NUM2,This field reflects the number of delay units that are actually used by write delay-line 2."
|
|
newline
|
|
hexmask.long.byte 0x0 8.--14. 1. "WR_DL_UNIT_NUM1,This field reflects the number of delay units that are actually used by write delay-line 1."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "WR_DL_UNIT_NUM0,This field reflects the number of delay units that are actually used by write delay-line 0."
|
|
group.long 0x85C++0xB
|
|
line.long 0x0 "MPZQLP2CTL,MMDC ZQ LPDDR2 HW Control Register"
|
|
hexmask.long.byte 0x0 24.--30. 1. "ZQ_LP2_HW_ZQCS,This register defines the period in cycles that it takes the memory device to perform a Short ZQ calibration"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--23. 1. "ZQ_LP2_HW_ZQCL,This register defines the period in cycles that it takes the memory device to perform a long ZQ calibration"
|
|
newline
|
|
hexmask.long.word 0x0 0.--8. 1. "ZQ_LP2_HW_ZQINIT,This register defines the period in cycles that it takes the memory device to perform a Init ZQ calibration"
|
|
line.long 0x4 "MPRDDLHWCTL,MMDC PHY Read Delay HW Calibration Control Register"
|
|
bitfld.long 0x4 5. "HW_RD_DL_CMP_CYC,Automatic (HW) read sample cycle" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "HW_RD_DL_EN,Enable automatic (HW) read calibration" "0,1"
|
|
newline
|
|
rbitfld.long 0x4 3. "HW_RD_DL_ERR3,Automatic (HW) read calibration error of Byte3" "0: No error was found in read delay-line 3 during..,1: An error was found in read delay-line 3 during.."
|
|
newline
|
|
rbitfld.long 0x4 2. "HW_RD_DL_ERR2,Automatic (HW) read calibration error of Byte2" "0: No error was found in read delay-line 2 during..,1: An error was found in read delay-line 2 during.."
|
|
newline
|
|
rbitfld.long 0x4 1. "HW_RD_DL_ERR1,Automatic (HW) read calibration error of Byte1" "0: No error was found in read delay-line 1 during..,1: An error was found in read delay-line 1 during.."
|
|
newline
|
|
rbitfld.long 0x4 0. "HW_RD_DL_ERR0,Automatic (HW) read calibration error of Byte0" "0: No error was found in read delay-line 0 during..,1: An error was found in read delay-line 0 during.."
|
|
line.long 0x8 "MPWRDLHWCTL,MMDC PHY Write Delay HW Calibration Control Register"
|
|
bitfld.long 0x8 5. "HW_WR_DL_CMP_CYC,Write sample cycle" "0,1"
|
|
newline
|
|
bitfld.long 0x8 4. "HW_WR_DL_EN,Enable automatic (HW) write calibration" "0,1"
|
|
newline
|
|
rbitfld.long 0x8 3. "HW_WR_DL_ERR3,Automatic (HW) write calibration error of Byte3" "0: No error was found during the automatic (HW)..,1: An error was found during the automatic (HW).."
|
|
newline
|
|
rbitfld.long 0x8 2. "HW_WR_DL_ERR2,Automatic (HW) write calibration error of Byte2" "0: No error was found during the automatic (HW)..,1: An error was found during the automatic (HW).."
|
|
newline
|
|
rbitfld.long 0x8 1. "HW_WR_DL_ERR1,Automatic (HW) write calibration error of Byte1" "0: No error was found during the automatic (HW)..,1: An error was found during the automatic (HW).."
|
|
newline
|
|
rbitfld.long 0x8 0. "HW_WR_DL_ERR0,Automatic (HW) write calibration error of Byte0" "0: No error was found during the automatic (HW)..,1: An error was found during the automatic (HW).."
|
|
rgroup.long 0x868++0x23
|
|
line.long 0x0 "MPRDDLHWST0,MMDC PHY Read Delay HW Calibration Status Register 0"
|
|
hexmask.long.byte 0x0 24.--30. 1. "HW_RD_DL_UP1,Automatic (HW) read calibration result of the upper boundary of Byte1"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--22. 1. "HW_RD_DL_LOW1,Automatic (HW) read calibration result of the lower boundary of Byte1"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--14. 1. "HW_RD_DL_UP0,Automatic (HW) read calibration result of the upper boundary of Byte0"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "HW_RD_DL_LOW0,Automatic (HW) read calibration result of the lower boundary of Byte0"
|
|
line.long 0x4 "MPRDDLHWST1,MMDC PHY Read Delay HW Calibration Status Register 1"
|
|
hexmask.long.byte 0x4 24.--30. 1. "HW_RD_DL_UP3,Automatic (HW) read calibration result of the upper boundary of Byte3"
|
|
newline
|
|
hexmask.long.byte 0x4 16.--22. 1. "HW_RD_DL_LOW3,Automatic (HW) read calibration result of the lower boundary of Byte3"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--14. 1. "HW_RD_DL_UP2,Automatic (HW) read calibration result of the upper boundary of Byte2"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--6. 1. "HW_RD_DL_LOW2,Automatic (HW) read calibration result of the lower boundary of Byte2"
|
|
line.long 0x8 "MPWRDLHWST0,MMDC PHY Write Delay HW Calibration Status Register 0"
|
|
hexmask.long.byte 0x8 24.--30. 1. "HW_WR_DL_UP1,Aautomatic (HW) write utomatic (HW) write calibration result of the upper boundary of Byte1"
|
|
newline
|
|
hexmask.long.byte 0x8 16.--22. 1. "HW_WR_DL_LOW1,Automatic (HW) write calibration result of the lower boundary of Byte1"
|
|
newline
|
|
hexmask.long.byte 0x8 8.--14. 1. "HW_WR_DL_UP0,Automatic (HW) write calibration result of the upper boundary of Byte0"
|
|
newline
|
|
hexmask.long.byte 0x8 0.--6. 1. "HW_WR_DL_LOW0,Automatic (HW) write calibration result of the lower boundary of Byte0"
|
|
line.long 0xC "MPWRDLHWST1,MMDC PHY Write Delay HW Calibration Status Register 1"
|
|
hexmask.long.byte 0xC 24.--30. 1. "HW_WR_DL_UP3,Automatic (HW) write calibration result of the upper boundary of Byte3"
|
|
newline
|
|
hexmask.long.byte 0xC 16.--22. 1. "HW_WR_DL_LOW3,Automatic (HW) write calibration result of the lower boundary of Byte3"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--14. 1. "HW_WR_DL_UP2,Automatic (HW) write calibration result of the upper boundary of Byte2"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--6. 1. "HW_WR_DL_LOW2,Automatic (HW) write calibration result of the lower boundary of Byte2"
|
|
line.long 0x10 "MPWLHWERR,MMDC PHY Write Leveling HW Error Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. "HW_WL3_DQ,HW write-leveling calibration result of Byte3"
|
|
newline
|
|
hexmask.long.byte 0x10 16.--23. 1. "HW_WL2_DQ,HW write-leveling calibration result of Byte2"
|
|
newline
|
|
hexmask.long.byte 0x10 8.--15. 1. "HW_WL1_DQ,HW write-leveling calibration result of Byte1"
|
|
newline
|
|
hexmask.long.byte 0x10 0.--7. 1. "HW_WL0_DQ,HW write-leveling calibration result of Byte0"
|
|
line.long 0x14 "MPDGHWST0,MMDC PHY Read DQS Gating HW Status Register 0"
|
|
hexmask.long.word 0x14 16.--26. 1. "HW_DG_UP0,HW DQS gating calibration result of the upper boundary of Byte0"
|
|
newline
|
|
hexmask.long.word 0x14 0.--10. 1. "HW_DG_LOW0,HW DQS gating calibration result of the lower boundary of Byte0"
|
|
line.long 0x18 "MPDGHWST1,MMDC PHY Read DQS Gating HW Status Register 1"
|
|
hexmask.long.word 0x18 16.--26. 1. "HW_DG_UP1,HW DQS gating calibration result of the upper boundary of Byte1"
|
|
newline
|
|
hexmask.long.word 0x18 0.--10. 1. "HW_DG_LOW1,HW DQS gating calibration result of the lower boundary of Byte1"
|
|
line.long 0x1C "MPDGHWST2,MMDC PHY Read DQS Gating HW Status Register 2"
|
|
hexmask.long.word 0x1C 16.--26. 1. "HW_DG_UP2,HW DQS gating calibration result of the upper boundary of Byte2"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--10. 1. "HW_DG_LOW2,HW DQS gating calibration result of the lower boundary of Byte2"
|
|
line.long 0x20 "MPDGHWST3,MMDC PHY Read DQS Gating HW Status Register 3"
|
|
hexmask.long.word 0x20 16.--26. 1. "HW_DG_UP3,HW DQS gating calibration result of the upper boundary of Byte3"
|
|
newline
|
|
hexmask.long.word 0x20 0.--10. 1. "HW_DG_LOW3,HW DQS gating calibration result of the lower boundary of Byte3"
|
|
group.long 0x88C++0xB
|
|
line.long 0x0 "MPPDCMPR1,MMDC PHY Pre-defined Compare Register 1"
|
|
hexmask.long.word 0x0 16.--31. 1. "PDV2,MMDC Pre defined compare value2"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "PDV1,MMDC Pre defined compare value2"
|
|
line.long 0x4 "MPPDCMPR2,MMDC PHY Pre-defined Compare and CA delay-line Configuration Register"
|
|
hexmask.long.byte 0x4 24.--30. 1. "PHY_CA_DL_UNIT,This field reflects the number of delay units that are actually used by CA (Command/Address of LPDDR2) delay-line"
|
|
newline
|
|
hexmask.long.byte 0x4 16.--22. 1. "CA_DL_ABS_OFFSET,Absolute CA (Command/Address of LPDDRR2) offset"
|
|
newline
|
|
bitfld.long 0x4 2. "READ_LEVEL_PATTERN,MPR(DDR3)/DQ calibration(LPDDR2) read compare pattern" "0: Compare with read pattern 1010,1: Compare with read pattern 0011 (Used only in.."
|
|
newline
|
|
bitfld.long 0x4 1. "MPR_FULL_CMP,MPR(DDR3)/DQ calibration (LPDDR2) full compare enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "MPR_CMP,MPR(DDR3)/DQ calibration (LPDDR2) compare enable" "0,1"
|
|
line.long 0x8 "MPSWDAR0,MMDC PHY SW Dummy Access Register"
|
|
rbitfld.long 0x8 5. "SW_DUM_CMP3,SW dummy read byte3 compare results" "0: Dummy read fail,1: Dummy read pass"
|
|
newline
|
|
rbitfld.long 0x8 4. "SW_DUM_CMP2,SW dummy read byte2 compare results" "0: Dummy read fail,1: Dummy read pass"
|
|
newline
|
|
rbitfld.long 0x8 3. "SW_DUM_CMP1,SW dummy read byte1 compare results" "0: Dummy read fail,1: Dummy read pass"
|
|
newline
|
|
rbitfld.long 0x8 2. "SW_DUM_CMP0,SW dummy read byte0 compare results" "0: Dummy read fail,1: Dummy read pass"
|
|
newline
|
|
bitfld.long 0x8 1. "SW_DUMMY_RD,SW dummy read" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0. "SW_DUMMY_WR,SW dummy write" "0,1"
|
|
rgroup.long 0x898++0x1F
|
|
line.long 0x0 "MPSWDRDR0,MMDC PHY SW Dummy Read Data Register 0"
|
|
hexmask.long 0x0 0.--31. 1. "DUM_RD0,Dummy read data0"
|
|
line.long 0x4 "MPSWDRDR1,MMDC PHY SW Dummy Read Data Register 1"
|
|
hexmask.long 0x4 0.--31. 1. "DUM_RD1,Dummy read data1"
|
|
line.long 0x8 "MPSWDRDR2,MMDC PHY SW Dummy Read Data Register 2"
|
|
hexmask.long 0x8 0.--31. 1. "DUM_RD2,Dummy read data2"
|
|
line.long 0xC "MPSWDRDR3,MMDC PHY SW Dummy Read Data Register 3"
|
|
hexmask.long 0xC 0.--31. 1. "DUM_RD3,Dummy read data3"
|
|
line.long 0x10 "MPSWDRDR4,MMDC PHY SW Dummy Read Data Register 4"
|
|
hexmask.long 0x10 0.--31. 1. "DUM_RD4,Dummy read data4"
|
|
line.long 0x14 "MPSWDRDR5,MMDC PHY SW Dummy Read Data Register 5"
|
|
hexmask.long 0x14 0.--31. 1. "DUM_RD5,Dummy read data5"
|
|
line.long 0x18 "MPSWDRDR6,MMDC PHY SW Dummy Read Data Register 6"
|
|
hexmask.long 0x18 0.--31. 1. "DUM_RD6,Dummy read data6"
|
|
line.long 0x1C "MPSWDRDR7,MMDC PHY SW Dummy Read Data Register 7"
|
|
hexmask.long 0x1C 0.--31. 1. "DUM_RD7,Dummy read data7"
|
|
group.long 0x8B8++0x3
|
|
line.long 0x0 "MPMUR0,MMDC PHY Measure Unit Register"
|
|
hexmask.long.word 0x0 16.--25. 1. "MU_UNIT_DEL_NUM,Number of delay units measured per cycle"
|
|
newline
|
|
bitfld.long 0x0 11. "FRC_MSR,Force measuement on delay-lines" "0: No measurement is performed,1: Perform measurement process"
|
|
newline
|
|
bitfld.long 0x0 10. "MU_BYP_EN,Measure unit bypass enable" "0: The delay-lines use delay units as indicated at..,1: The delay-lines use delay units as indicated at.."
|
|
newline
|
|
hexmask.long.word 0x0 0.--9. 1. "MU_BYP_VAL,Number of delay units for measurement bypass"
|
|
group.long 0x8C0++0x3
|
|
line.long 0x0 "MPDCCR,MMDC Duty Cycle Control Register"
|
|
bitfld.long 0x0 28.--30. "RD_DQS3_FT_DCC,Read DQS duty cycle fine tuning control of Byte3" "?,1: 48.5% low 51.5% high,2: 50% duty cycle (default),?,4: 51.5% low 48.5% high,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 25.--27. "RD_DQS2_FT_DCC,Read DQS duty cycle fine tuning control of Byte2" "?,1: 48.5% low 51.5% high,2: 50% duty cycle (default),?,4: 51.5% low 48.5% high,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 22.--24. "RD_DQS1_FT_DCC,Read DQS duty cycle fine tuning control of Byte1" "?,1: 48.5% low 51.5% high,2: 50% duty cycle (default),?,4: 51.5% low 48.5% high,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 19.--21. "RD_DQS0_FT_DCC,Read DQS duty cycle fine tuning control of Byte0" "?,1: 48.5% low 51.5% high,2: 50% duty cycle (default),?,4: 51.5% low 48.5% high,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 16.--18. "CK_FT1_DCC,Secondary duty cycle fine tuning control of DDR clock" "?,1: 48.5% low 51.5% high,2: 50% duty cycle (default),?,4: 51.5% low 48.5% high,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 12.--14. "CK_FT0_DCC,Primary duty cycle fine tuning control of DDR clock" "?,1: 48.5% low 51.5% high,2: 50% duty cycle (default),?,4: 51.5% low 48.5% high,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 9.--11. "WR_DQS3_FT_DCC,Write DQS duty cycle fine tuning control of Byte0" "?,1: 48.5% low 51.5% high,2: 50% duty cycle (default),?,4: 51.5% low 48.5% high,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 6.--8. "WR_DQS2_FT_DCC,Write DQS duty cycle fine tuning control of Byte1" "?,1: 48.5% low 51.5% high,2: 50% duty cycle (default),?,4: 51.5% low 48.5% high,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 3.--5. "WR_DQS1_FT_DCC,Write DQS duty cycle fine tuning control of Byte1" "?,1: 48.5% low 51.5% high,2: 50% duty cycle (default),?,4: 51.5% low 48.5% high,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "WR_DQS0_FT_DCC,Write DQS duty cycle fine tuning control of Byte0" "?,1: 48.5% low 51.5% high,2: 50% duty cycle (default),?,4: 51.5% low 48.5% high,?,?,?"
|
|
tree.end
|
|
tree.end
|
|
tree "MSCM (Miscellaneous System Control Module)"
|
|
base ad:0x40081000
|
|
rgroup.long 0x0++0x5F
|
|
line.long 0x0 "CPXTYPE,Processor x Type Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "PERSONALITY,Processor x Personality"
|
|
hexmask.long.byte 0x0 0.--7. 1. "RYPZ,Processor x Revision"
|
|
line.long 0x4 "CPXNUM,Processor x Number Register"
|
|
bitfld.long 0x4 0. "CPN,Processor x Number" "0,1"
|
|
line.long 0x8 "CPXMASTER,Processor x Master Number Register"
|
|
hexmask.long.byte 0x8 0.--4. 1. "PPN,Processor x Physical Port Number"
|
|
line.long 0xC "CPXCOUNT,Processor x Count Register"
|
|
bitfld.long 0xC 0. "PCNT,Processor Count" "0,1"
|
|
line.long 0x10 "CPXCFG0,Processor x Configuration 0 Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. "ICSZ,Level 1 Instruction Cache Size"
|
|
hexmask.long.byte 0x10 16.--23. 1. "ICWY,Level 1 Instruction Cache Ways"
|
|
newline
|
|
hexmask.long.byte 0x10 8.--15. 1. "DCSZ,Level 1 Data Cache Size"
|
|
hexmask.long.byte 0x10 0.--7. 1. "DCWY,Level 1 Data Cache Ways"
|
|
line.long 0x14 "CPXCFG1,Processor x Configuration 1 Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. "L2SZ,Level 2 Cache Size"
|
|
hexmask.long.byte 0x14 16.--23. 1. "L2WY,Level 2 Cache Ways"
|
|
line.long 0x18 "CPXCFG2,Processor x Configuration 2 Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. "TMLSZ,Tightly-coupled Memory Lower Size"
|
|
hexmask.long.byte 0x18 8.--15. 1. "TMUSZ,Tightly-coupled Memory Upper Size"
|
|
line.long 0x1C "CPXCFG3,Processor x Configuration 3 Register"
|
|
bitfld.long 0x1C 8.--9. "SBP,System Bus Ports" "0,1,2,3"
|
|
bitfld.long 0x1C 6. "BB,Bit Banding" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 5. "CMP,Core Memory Protection unit" "0,1"
|
|
bitfld.long 0x1C 4. "TZ,Trust Zone" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 3. "MMU,Memory Management Unit" "0,1"
|
|
bitfld.long 0x1C 2. "JAZ,Jazelle" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 1. "SIMD,SIMD/NEON instruction support" "0,1"
|
|
bitfld.long 0x1C 0. "FPU,Floating Point Unit" "0,1"
|
|
line.long 0x20 "CP0TYPE,Processor 0 Type Register"
|
|
hexmask.long.tbyte 0x20 8.--31. 1. "PERSONALITY,Processor x Personality"
|
|
hexmask.long.byte 0x20 0.--7. 1. "RYPZ,Processor x Revision"
|
|
line.long 0x24 "CP0NUM,Processor 0 Number Register"
|
|
bitfld.long 0x24 0. "CPN,Processor x Number" "0,1"
|
|
line.long 0x28 "CP0MASTER,Processor 0 Master Number Register"
|
|
hexmask.long.byte 0x28 0.--4. 1. "PPN,Processor x Physical Port Number"
|
|
line.long 0x2C "CP0COUNT,Processor 0 Count Register"
|
|
bitfld.long 0x2C 0. "PCNT,Processor Count" "0,1"
|
|
line.long 0x30 "CP0CFG0,Processor 0 Configuration 0 Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. "ICSZ,Level 1 Instruction Cache Size"
|
|
hexmask.long.byte 0x30 16.--23. 1. "ICWY,Level 1 Instruction Cache Ways"
|
|
newline
|
|
hexmask.long.byte 0x30 8.--15. 1. "DCSZ,Level 1 Data Cache Size"
|
|
hexmask.long.byte 0x30 0.--7. 1. "DCWY,Level 1 Data Cache Ways"
|
|
line.long 0x34 "CP0CFG1,Processor 0 Configuration 1 Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. "L2SZ,Level 2 Cache Size"
|
|
hexmask.long.byte 0x34 16.--23. 1. "L2WY,Level 2 Cache Ways"
|
|
line.long 0x38 "CP0CFG2,Processor 0 Configuration 2 Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. "TMLSZ,Tightly-coupled Memory Lower Size"
|
|
hexmask.long.byte 0x38 8.--15. 1. "TMUSZ,Tightly-coupled Memory Upper Size"
|
|
line.long 0x3C "CP0CFG3,Processor 0 Configuration 3 Register"
|
|
bitfld.long 0x3C 8.--9. "SBP,System Bus Ports" "0,1,2,3"
|
|
bitfld.long 0x3C 6. "BB,Bit Banding" "0,1"
|
|
newline
|
|
bitfld.long 0x3C 5. "CMP,Core Memory Protection unit" "0,1"
|
|
bitfld.long 0x3C 4. "TZ,Trust Zone" "0,1"
|
|
newline
|
|
bitfld.long 0x3C 3. "MMU,Memory Management Unit" "0,1"
|
|
bitfld.long 0x3C 2. "JAZ,Jazelle" "0,1"
|
|
newline
|
|
bitfld.long 0x3C 1. "SIMD,SIMD/NEON instruction support" "0,1"
|
|
bitfld.long 0x3C 0. "FPU,Floating Point Unit" "0,1"
|
|
line.long 0x40 "CP1TYPE,Processor 1 Type Register"
|
|
hexmask.long.tbyte 0x40 8.--31. 1. "PERSONALITY,Processor x Personality"
|
|
hexmask.long.byte 0x40 0.--7. 1. "RYPZ,Processor x Revision"
|
|
line.long 0x44 "CP1NUM,Processor 1 Number Register"
|
|
bitfld.long 0x44 0. "CPN,Processor x Number" "0,1"
|
|
line.long 0x48 "CP1MASTER,Processor 1 Master Number Register"
|
|
hexmask.long.byte 0x48 0.--4. 1. "PPN,Processor x Physical Port Number"
|
|
line.long 0x4C "CP1COUNT,Processor 1 Count Register"
|
|
bitfld.long 0x4C 0. "PCNT,Processor Count" "0,1"
|
|
line.long 0x50 "CP1CFG0,Processor 1 Configuration 0 Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. "ICSZ,Level 1 Instruction Cache Size"
|
|
hexmask.long.byte 0x50 16.--23. 1. "ICWY,Level 1 Instruction Cache Ways"
|
|
newline
|
|
hexmask.long.byte 0x50 8.--15. 1. "DCSZ,Level 1 Data Cache Size"
|
|
hexmask.long.byte 0x50 0.--7. 1. "DCWY,Level 1 Data Cache Ways"
|
|
line.long 0x54 "CP1CFG1,Processor 1 Configuration 1 Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. "L2SZ,Level 2 Cache Size"
|
|
hexmask.long.byte 0x54 16.--23. 1. "L2WY,Level 2 Cache Ways"
|
|
line.long 0x58 "CP1CFG2,Processor 1 Configuration 2 Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. "TMLSZ,Tightly-coupled Memory Lower Size"
|
|
hexmask.long.byte 0x58 8.--15. 1. "TMUSZ,Tightly-coupled Memory Upper Size"
|
|
line.long 0x5C "CP1CFG3,Processor 1 Configuration 3 Register"
|
|
bitfld.long 0x5C 8.--9. "SBP,System Bus Ports" "0,1,2,3"
|
|
bitfld.long 0x5C 6. "BB,Bit Banding" "0,1"
|
|
newline
|
|
bitfld.long 0x5C 5. "CMP,Core Memory Protection unit" "0,1"
|
|
bitfld.long 0x5C 4. "TZ,Trust Zone" "0,1"
|
|
newline
|
|
bitfld.long 0x5C 3. "MMU,Memory Management Unit" "0,1"
|
|
bitfld.long 0x5C 2. "JAZ,Jazelle" "0,1"
|
|
newline
|
|
bitfld.long 0x5C 1. "SIMD,SIMD/NEON instruction support" "0,1"
|
|
bitfld.long 0x5C 0. "FPU,Floating Point Unit" "0,1"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0xC)
|
|
group.long ($2+0x400)++0x3
|
|
line.long 0x0 "OCMDR$1,On-Chip Memory Descriptor Register"
|
|
rbitfld.long 0x0 31. "V,OCMEM Valid bit. This field defines the validity (presence) of the on-chip memory:" "0: OCMEMn is not present.,1: OCMEMn is present."
|
|
rbitfld.long 0x0 28. "OCMSZH,OCMEM Size 'Hole'" "0: The OCMEMn is a power-of-2 capacity.,1: The OCMEMn is not a power-of-2 with a capacity.."
|
|
newline
|
|
hexmask.long.byte 0x0 24.--27. 1. "OCMSZ,OCMEM Size"
|
|
rbitfld.long 0x0 17.--19. "OCMW,OCMEM datapath Width" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 16. "RO,Read-Only" "0: Writes to the MSCM_OCMDR[11:0] are allowed,1: Writes to the MSCM_OCMDR[11:0] are ignored"
|
|
rbitfld.long 0x0 14.--15. "OCMT,OCMEM Type. This field defines the type of the on-chip memory:" "0: OCMEMn is a system RAM.,1: OCMEMn is a graphics RAM.,2: OCMEMn is a system RAM with no ECC.,3: OCMEMn is a ROM."
|
|
newline
|
|
rbitfld.long 0x0 13. "OCMTZ,OCMEM Trust Zone Protection" "0,1"
|
|
rbitfld.long 0x0 12. "OCMPU,OCMEM Memory Protection Unit. This field identifies a memory protected by a Memory Protection Unit." "0: OCMEMn is not protected by a Memory Protection..,1: OCMEMn is protected by a Memory Protection Unit."
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "OCMC2,OCMEM Control Field 2"
|
|
hexmask.long.byte 0x0 4.--7. 1. "OCMC1,OCMEM Control Field 1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "OCMC0,OCMEM Control Field 0"
|
|
repeat.end
|
|
group.long 0x480++0x3
|
|
line.long 0x0 "TCMDR0,Generic Tightly Coupled Memory Descriptor Register"
|
|
rbitfld.long 0x0 31. "V,TCMEM Valid bit" "0,1"
|
|
hexmask.long.byte 0x0 24.--27. 1. "TCMUSZ,Tightly-coupled Memory Upper Size"
|
|
newline
|
|
hexmask.long.byte 0x0 20.--23. 1. "TCMLSZ,Tightly-coupled Memory Lower Size"
|
|
rbitfld.long 0x0 17.--19. "TCMW,TCMEM datapath Width" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 16. "RO,Read-Only" "0: Writes to the MSCM_TCMDR[11:0] are allowed,1: Writes to the MSCM_TCMDR[11:0] are ignored"
|
|
rbitfld.long 0x0 13. "TCMTZ,TCMEM Trust Zone Protection" "0,1"
|
|
newline
|
|
rbitfld.long 0x0 12. "TCMPU,TCMEM Memory Protection Unit" "0,1"
|
|
hexmask.long.byte 0x0 0.--3. 1. "TCMC0,TCMEM Control Field 0"
|
|
group.long 0x500++0x3
|
|
line.long 0x0 "CPCE0,Core Parity Checking Enable Register 0"
|
|
rbitfld.long 0x0 9. "CPRE_M9,Interconnect Parity read data checking enable for Cortex-M4 System bus Cache miss on Parity Fault enabl This bit enables or disables the read data parity checker module for the interconnect related to described master" "0: Core Read Data Parity Cache Miss on Parity Fault..,1: Core Read Data Parity Cache Miss on Parity Fault.."
|
|
rbitfld.long 0x0 8. "CPRE_M8,Interconnect Parity read data checking enable for Cortex-M4 System bus Cache Parity Fault enable This bit enables or disables the read data parity checker module for the interconnect related to described master" "0: Core Read Data Parity Checker is disabled.,1: Core Read Data Parity Checker is enabled."
|
|
newline
|
|
rbitfld.long 0x0 5. "CPRE_M5,Interconnect Parity read data checking enable for Cortex-M4 Code bus Cache miss on Parity Fault enable This bit enables or disables the read data parity checker module for the interconnect related to described master" "0: Core Read Data Parity Cache Miss on Parity Fault..,1: Core Read Data Parity Cache Miss on Parity Fault.."
|
|
rbitfld.long 0x0 4. "CPRE_M4,Interconnect Parity read data checking enable for Cortex-M4 Code bus Cache Parity Fault enable This bit enables or disables the read data parity checker module for the interconnect related to described master" "0: Core Read Data Parity Checker is disabled.,?"
|
|
newline
|
|
bitfld.long 0x0 0. "CPRE_M0,Core Parity read data checking enable for TCRAM This bit enables or disables the read data parity checker module for the interconnect related to described master" "0: Core Read Data Parity Checker is disabled.,1: Core Read Data Parity Checker is enabled."
|
|
group.long 0x800++0x7
|
|
line.long 0x0 "IRCP0IR,Interrupt Router CP0 Interrupt Register"
|
|
bitfld.long 0x0 3. "INT3,Interrupt 3" "0: No interrupt is asserted.,1: Interrupt 3 to CP0 is asserted"
|
|
bitfld.long 0x0 2. "INT2,Interrupt 2" "0: No interrupt is asserted.,1: Interrupt 2 to CP0 is asserted."
|
|
newline
|
|
bitfld.long 0x0 1. "INT1,Interrupt 1" "0: No interrupt is asserted.,1: Interrupt 1 to CP0 is asserted."
|
|
bitfld.long 0x0 0. "INT0,Interrupt 0" "0: No interrupt is asserted.,1: Interrupt 0 to CP0 is asserted."
|
|
line.long 0x4 "IRCP1IR,Interrupt Router CP1 Interrupt Register"
|
|
bitfld.long 0x4 3. "INT3,Interrupt 3" "0: No interrupt is asserted.,1: Interrupt 3 to CP1 is asserted."
|
|
bitfld.long 0x4 2. "INT2,Interrupt 2" "0: No interrupt is asserted,1: Interrupt 2 to CP1 is asserted"
|
|
newline
|
|
bitfld.long 0x4 1. "INT1,Interrupt 1" "0,1"
|
|
bitfld.long 0x4 0. "INT0,Interrupt 0" "0: No interrupt is asserted.,1: Interrupt 0 to CP1 is asserted."
|
|
wgroup.long 0x820++0x3
|
|
line.long 0x0 "IRCPGIR,Interrupt Router CPU Generate Interrupt Register"
|
|
bitfld.long 0x0 24.--25. "TLF,Target List Field. This field is used to assert directed CPU interrupts." "0: Use the CPUTL (CPU Target List) field to assert..,1: Assert directed CPU interrupts for all..,2: Assert the directed CPU interrupt for only the..,?"
|
|
bitfld.long 0x0 16.--17. "CPUTL,CPU Target List" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "INTID,Interrupt ID" "0: MSCM_IRCPnIR[0] loaded as defined by TLF & CPUTL,1: MSCM_IRCPnIR[1] loaded as defined by TLF & CPUTL,2: MSCM_IRCPnIR[2] loaded as defined by TLF & CPUTL,3: MSCM_IRCPnIR[3] loaded as defined by TLF & CPUTL"
|
|
repeat 176. (increment 0x0 0x1)(increment 0x0 0x2)
|
|
group.word ($2+0x880)++0x1
|
|
line.word 0x0 "IRSPRC$1,Interrupt Router Shared Peripheral Routing Control Register"
|
|
bitfld.word 0x0 15. "RO,Read-Only" "0: Writes to the MSCM_IRSPRCn are allowed.,1: Writes to the MSCM_IRSPRCn are ignored."
|
|
bitfld.word 0x0 1. "CP1E,Enable CP1 Interrupt" "0: Routing to CP1 for the corresponding interrupt..,1: Routing to CP1 for the corresponding interrupt.."
|
|
newline
|
|
bitfld.word 0x0 0. "CP0E,Enable CP0 Interrupt" "0: Routing to CP0 for the corresponding interrupt..,1: Routing to CP0 for the corresponding interrupt.."
|
|
repeat.end
|
|
group.long 0xD00++0x3
|
|
line.long 0x0 "IPCGE,Interconnect Parity Checking Global Enable Register"
|
|
bitfld.long 0x0 0. "GE,Global Enable This field globally enables or disables all interconnect parity checker modules." "0: Interconnect Parity Checkers are disabled.,1: Interconnect Parity Checkers are enabled."
|
|
group.long 0xD10++0xF
|
|
line.long 0x0 "IPCE0,Interconnect Parity Checking Enable Register 0"
|
|
bitfld.long 0x0 28. "IPRE_CCI_M1,CCI Interconnect Parity read data checking enable for Cortex-A53 cluster 1" "0: CCI Interconnect Read Data Parity Checker is..,1: CCI Interconnect Read Data Parity Checker is.."
|
|
bitfld.long 0x0 27. "IPRE_CCI_M0,CCI Interconnect Parity read data checking enable for Cortex-A53 cluster 0" "0: CCI Interconnect Read Data Parity Checker is..,1: CCI Interconnect Read Data Parity Checker is.."
|
|
newline
|
|
bitfld.long 0x0 26. "IPRE_M26,Interconnect Parity read data checking enable for NIC cross-connect to XBAR bus This bit enables or disables the read data parity checker module for the interconnect related to described master" "0: Interconnect Read Data Parity Checker is disabled.,1: Interconnect Read Data Parity Checker is enabled."
|
|
bitfld.long 0x0 25. "IPRE_M25,Interconnect Parity read data checking enable for SIPI/debug concentrator This field enables or disables the read data parity checker module for the interconnect related to described master" "0: Interconnect Read Data Parity Checker is disabled.,1: Interconnect Read Data Parity Checker is enabled."
|
|
newline
|
|
bitfld.long 0x0 24. "IPRE_M24,Interconnect Parity read data checking enable for Flexray This field enables or disables the read data parity checker module for the interconnect related to described master" "0: Interconnect Read Data Parity Checker is disabled.,1: Interconnect Read Data Parity Checker is enabled."
|
|
bitfld.long 0x0 23. "IPRE_M23,Interconnect Parity read data checking enable for SDHC This field enables or disables the read data parity checker module for the interconnect related to described master" "0: Interconnect Read Data Parity Checker is disabled.,1: Interconnect Read Data Parity Checker is enabled."
|
|
newline
|
|
bitfld.long 0x0 22. "IPRE_M22,Interconnect Parity read data checking enable for DMA This field enables or disables the read data parity checker module for the interconnect related to described master" "0: Interconnect Read Data Parity Checker is disabled.,1: Interconnect Read Data Parity Checker is enabled."
|
|
bitfld.long 0x0 21. "IPRE_M21,Interconnect Parity read data checking enable for CSE This field enables or disables the read data parity checker module for the interconnect related to described master" "0: Interconnect Read Data Parity Checker is disabled.,1: Interconnect Read Data Parity Checker is enabled."
|
|
newline
|
|
bitfld.long 0x0 20. "IPRE_M20,Interconnect Parity read data checking enable for Cortex-M4 System bus This field enables or disables the read data parity checker module for the interconnect related to described master" "0: Interconnect Read Data Parity Checker is disabled.,1: Interconnect Read Data Parity Checker is enabled."
|
|
bitfld.long 0x0 19. "IPRE_M19,Interconnect Parity read data checking enable for Cortex-M4 Code bus This field enables or disables the read data parity checker module for the interconnect related to described master" "0: Interconnect Read Data Parity Checker is disabled.,1: Interconnect Read Data Parity Checker is enabled."
|
|
newline
|
|
bitfld.long 0x0 18. "IPRE_M18,Interconnect Parity read data checking enable for XBAR cross-connect to NIC for ram accesses This field enables or disables the read data parity checker module for the interconnect related to described master" "0: Interconnect Read Data Parity Checker is disabled.,1: Interconnect Read Data Parity Checker is enabled."
|
|
bitfld.long 0x0 17. "IPRE_M17,Interconnect Parity read data checking enable for XBAR cross-connect to NIC for non-ram accesses This field enables or disables the read data parity checker module for the interconnect related to described master" "0: Interconnect Read Data Parity Checker is disabled.,1: Interconnect Read Data Parity Checker is enabled."
|
|
newline
|
|
bitfld.long 0x0 16. "IPRE_M16,Interconnect Parity read data checking enable for Cortex-A53-CCi1 This field enables or disables the read data parity checker module for the interconnect related to described master" "0: Interconnect Read Data Parity Checker is disabled.,1: Interconnect Read Data Parity Checker is enabled."
|
|
bitfld.long 0x0 15. "IPRE_M15,Interconnect Parity read data checking enable for Cortex-A53-CCI0 bus This field enables or disables the read data parity checker module for the interconnect related to described master" "0: Interconnect Read Data Parity Checker is disabled.,1: Interconnect Read Data Parity Checker is enabled."
|
|
newline
|
|
bitfld.long 0x0 14. "IPRE_M14,Interconnect Parity read data checking enable for ENET1 This field enables or disables the read data parity checker module for the interconnect related to described master" "0: Interconnect Read Data Parity Checker is disabled.,1: Interconnect Read Data Parity Checker is enabled."
|
|
bitfld.long 0x0 13. "IPRE_M13,Interconnect Parity read data checking enable for ENET0 This field enables or disables the read data parity checker module for the interconnect related to described master" "0: Interconnect Read Data Parity Checker is disabled.,1: Interconnect Read Data Parity Checker is enabled."
|
|
newline
|
|
bitfld.long 0x0 12. "IPRE_M12,Interconnect Parity read data checking enable for PCIE This field enables or disables the read data parity checker module for the interconnect related to described master" "0: Interconnect Read Data Parity Checker is disabled.,1: Interconnect Read Data Parity Checker is enabled."
|
|
bitfld.long 0x0 11. "IPRE_M11,Interconnect Parity read data checking enable for FastDMA1 This field enables or disables the read data parity checker module for the interconnect related to described master" "0: Interconnect Read Data Parity Checker is disabled.,1: Interconnect Read Data Parity Checker is enabled."
|
|
newline
|
|
bitfld.long 0x0 10. "IPRE_M10,Interconnect Parity read data checking enable for FastDMA0 This field enables or disables the read data parity checker module for the interconnect related to described master" "0: Interconnect Read Data Parity Checker is disabled.,1: Interconnect Read Data Parity Checker is enabled."
|
|
bitfld.long 0x0 9. "IPRE_M9,Interconnect Parity read data checking enable for GPU1 This field enables or disables the read data parity checker module for the interconnect related to described master" "0: Interconnect Read Data Parity Checker is disabled.,1: Interconnect Read Data Parity Checker is enabled."
|
|
newline
|
|
bitfld.long 0x0 8. "IPRE_M8,Interconnect Parity read data checking enable for GPU0 This field enables or disables the read data parity checker module for the interconnect related to described master" "0: Interconnect Read Data Parity Checker is disabled.,1: Interconnect Read Data Parity Checker is enabled."
|
|
bitfld.long 0x0 7. "IPRE_M7,Interconnect Parity read data checking enable for APEX1 BLKDMA This field enables or disables the read data parity checker module for the interconnect related to described master" "0: Interconnect Read Data Parity Checker is disabled.,1: Interconnect Read Data Parity Checker is enabled."
|
|
newline
|
|
bitfld.long 0x0 6. "IPRE_M6,Interconnect Parity read data checking enable for APEX1 DMA This field enables or disables the read data parity checker module for the interconnect related to described master" "0: Interconnect Read Data Parity Checker is disabled.,1: Interconnect Read Data Parity Checker is enabled."
|
|
bitfld.long 0x0 5. "IPRE_M5,Interconnect Parity read data checking enable for APEX0 BLKDMA This field enables or disables the read data parity checker module for the interconnect related to described master" "0: Interconnect Read Data Parity Checker is disabled.,1: Interconnect Read Data Parity Checker is enabled."
|
|
newline
|
|
bitfld.long 0x0 4. "IPRE_M4,Interconnect Parity read data checking enable for APEX0 DMA This field enables or disables the read data parity checker module for the interconnect related to described master" "0: Interconnect Read Data Parity Checker is disabled.,1: Interconnect Read Data Parity Checker is enabled."
|
|
bitfld.long 0x0 3. "IPRE_M3,Interconnect Parity read data checking enable for DCU This field enables or disables the read data parity checker module for the interconnect related to described master" "0: Interconnect Read Data Parity Checker is disabled.,1: Interconnect Read Data Parity Checker is enabled."
|
|
newline
|
|
bitfld.long 0x0 2. "IPRE_M2,Interconnect Parity read data checking enable for H264dec This field enables or disables the read data parity checker module for the interconnect related to described master" "0: Interconnect Read Data Parity Checker is disabled.,1: Interconnect Read Data Parity Checker is enabled."
|
|
line.long 0x4 "IPCE1,Interconnect Parity Checking Enable Register 1"
|
|
bitfld.long 0x4 23. "IPWE_CCI_S1,CCI Interconnect Parity write data checking enable for CA53_CCI_1" "0: CCI Interconnect Write Data Parity Checker is..,1: CCI Interconnect Write Data Parity Checker is.."
|
|
bitfld.long 0x4 22. "IPWE_CCI_S0,CCI Interconnect Parity write data checking enable for CA53_CCI_0" "0: CCI Interconnect Write Data Parity Checker is..,1: CCI Interconnect Write Data Parity Checker is.."
|
|
newline
|
|
bitfld.long 0x4 21. "IPWE_S21,Interconnect Parity write data checking enable for XBAR cross-connect to NIC for non-ram accesses This field enables or disables the write data parity checker module for the interconnect related to described slave" "0: Interconnect Write Data Parity Checker is..,1: Interconnect Write Data Parity Checker is enabled."
|
|
bitfld.long 0x4 20. "IPWE_S20,Interconnect Parity write data checking enable for Peripheral Bridge 1 This field enables or disables the write data parity checker module for the interconnect related to described slave" "0: Interconnect Write Data Parity Checker is..,1: Interconnect Write Data Parity Checker is enabled."
|
|
newline
|
|
bitfld.long 0x4 19. "IPWE_S19,Interconnect Parity write data checking enable for Peripheral Bridge 0 This field enables or disables the write data parity checker module for the interconnect related to described slave" "0: Interconnect Write Data Parity Checker is..,1: Interconnect Write Data Parity Checker is enabled."
|
|
bitfld.long 0x4 18. "IPWE_S18,Interconnect Parity write data checking enable for XBAR cross-connect to NIC for ram accesses This field enables or disables the write data parity checker module for the interconnect related to described slave" "0: Interconnect Write Data Parity Checker is..,1: Interconnect Write Data Parity Checker is enabled."
|
|
newline
|
|
bitfld.long 0x4 17. "IPWE_S17,Interconnect Parity write data checking enable for QSPI This field enables or disables the write data parity checker module for the interconnect related to described slave" "0: Interconnect Write Data Parity Checker is..,1: Interconnect Write Data Parity Checker is enabled."
|
|
bitfld.long 0x4 16. "IPWE_S16,Interconnect Parity write data checking enable for Cortex-M4 TCM This field enables or disables the write data parity checker module for the interconnect related to described slave" "0: Interconnect Write Data Parity Checker is..,1: Interconnect Write Data Parity Checker is enabled."
|
|
newline
|
|
bitfld.long 0x4 14. "IPWE_S14,Interconnect Parity write data checking enable for NIC cross-connect to XBAR bus This field enables or disables the write data parity checker module for the interconnect related to described slave" "0: Interconnect Write Data Parity Checker is..,1: Interconnect Write Data Parity Checker is enabled."
|
|
bitfld.long 0x4 13. "IPWE_S13,Interconnect Parity write data checking enable for GIC This field enables or disables the write data parity checker module for the interconnect related to described slave" "0: Interconnect Write Data Parity Checker is..,1: Interconnect Write Data Parity Checker is enabled."
|
|
newline
|
|
bitfld.long 0x4 12. "IPWE_S12,Interconnect Parity write data checking enable for SEQ This field enables or disables the write data parity checker module for the interconnect related to described slave" "0: Interconnect Write Data Parity Checker is..,1: Interconnect Write Data Parity Checker is enabled."
|
|
bitfld.long 0x4 11. "IPWE_S11,Interconnect Parity write data checking enable for PCIE This field enables or disables the write data parity checker module for the interconnect related to described slave" "0: Interconnect Write Data Parity Checker is..,1: Interconnect Write Data Parity Checker is enabled."
|
|
newline
|
|
bitfld.long 0x4 10. "IPWE_S10,Interconnect Parity write data checking enable for APEX1 ram This field enables or disables the write data parity checker module for the interconnect related to described slave" "0: Interconnect Write Data Parity Checker is..,1: Interconnect Write Data Parity Checker is enabled."
|
|
bitfld.long 0x4 9. "IPWE_S9,Interconnect Parity write data checking enable for APEX0 ram This field enables or disables the write data parity checker module for the interconnect related to described slave" "0: Interconnect Write Data Parity Checker is..,1: Interconnect Write Data Parity Checker is enabled."
|
|
newline
|
|
bitfld.long 0x4 8. "IPWE_S8,Interconnect Parity write data checking enable for SRAM from others This field enables or disables the write data parity checker module for the interconnect related to described slave" "0: Interconnect Write Data Parity Checker is..,1: Interconnect Write Data Parity Checker is enabled."
|
|
bitfld.long 0x4 7. "IPWE_S7,Interconnect Parity write data checking enable for SRAM from cores This field enables or disables the write data parity checker module for the interconnect related to described slave" "0: Interconnect Write Data Parity Checker is..,1: Interconnect Write Data Parity Checker is enabled."
|
|
newline
|
|
bitfld.long 0x4 6. "IPWE_S6,Interconnect Parity write data checking enable for SRAM from PCIE This field enables or disables the write data parity checker module for the interconnect related to described slave" "0: Interconnect Write Data Parity Checker is..,1: Interconnect Write Data Parity Checker is enabled."
|
|
bitfld.long 0x4 5. "IPWE_S5,Interconnect Parity write data checking enable for SRAM from FastDMA This field enables or disables the write data parity checker module for the interconnect related to described slave" "0: Interconnect Write Data Parity Checker is..,1: Interconnect Write Data Parity Checker is enabled."
|
|
newline
|
|
bitfld.long 0x4 4. "IPWE_S4,Interconnect Parity write data checking enable for SRAM from APEX1 This field enables or disables the write data parity checker module for the interconnect related to described slave" "0: Interconnect Write Data Parity Checker is..,1: Interconnect Write Data Parity Checker is enabled."
|
|
bitfld.long 0x4 3. "IPWE_S3,Interconnect Parity write data checking enable for SRAM from APEX0 This field enables or disables the write data parity checker module for the interconnect related to described slave" "0: Interconnect Write Data Parity Checker is..,1: Interconnect Write Data Parity Checker is enabled."
|
|
newline
|
|
bitfld.long 0x4 2. "IPWE_S2,Interconnect Parity write data checking enable for SRAM from VIU/H264dec This field enables or disables the write data parity checker module for the interconnect related to described slave" "0: Interconnect Write Data Parity Checker is..,1: Interconnect Write Data Parity Checker is enabled."
|
|
bitfld.long 0x4 1. "IPWE_S1,Interconnect Parity write data checking enable for DDR1 This field enables or disables the write data parity checker module for the interconnect related to described slave" "0: Interconnect Write Data Parity Checker is..,1: Interconnect Write Data Parity Checker is enabled."
|
|
newline
|
|
bitfld.long 0x4 0. "IPWE_S0,Interconnect Parity write data checking enable for DDR0 This field enables or disables the write data parity checker module for the interconnect related to described slave" "0: Interconnect Write Data Parity Checker is..,1: Interconnect Write Data Parity Checker is enabled."
|
|
line.long 0x8 "IPCE2,Interconnect Parity Checking Enable Register 2"
|
|
bitfld.long 0x8 16. "IPRAE_CCI_S1,CCI Interconnect Parity read address checking enable for CA53_CCI_1" "0: CCI Interconnect Read Address Parity Checker is..,1: CCI Interconnect Read Address Parity Checker is.."
|
|
bitfld.long 0x8 15. "IPRAE_CCI_S0,CCI Interconnect Parity read address checking enable for CA53_CCI_0" "0: CCI Interconnect Read Address Parity Checker is..,1: CCI Interconnect Read Address Parity Checker is.."
|
|
newline
|
|
bitfld.long 0x8 14. "IPRAE_S14,Interconnect Parity read address checking enable for NIC cross-connect to XBAR bus This field enables or disables the read address parity checker module for the interconnect related to described slave" "0: Interconnect Read Address Parity Checker is..,1: Interconnect Read Address Parity Checker is.."
|
|
bitfld.long 0x8 13. "IPRAE_S13,Interconnect Parity read address checking enable for GIC This field enables or disables the read address parity checker module for the interconnect related to described slave" "0: Interconnect Read Address Parity Checker is..,1: Interconnect Read Address Parity Checker is.."
|
|
newline
|
|
bitfld.long 0x8 12. "IPRAE_S12,Interconnect Parity read address checking enable for SEQ This field enables or disables the read address parity checker module for the interconnect related to described slave" "0: Interconnect Read Address Parity Checker is..,1: Interconnect Read Address Parity Checker is.."
|
|
bitfld.long 0x8 11. "IPRAE_S11,Interconnect Parity read address checking enable for PCIE This field enables or disables the read address parity checker module for the interconnect related to described slave" "0: Interconnect Read Address Parity Checker is..,1: Interconnect Read Address Parity Checker is.."
|
|
newline
|
|
bitfld.long 0x8 10. "IPRAE_S10,Interconnect Parity read address checking enable for APEX1 ram This field enables or disables the read address parity checker module for the interconnect related to described slave" "0: Interconnect Read Address Parity Checker is..,1: Interconnect Read Address Parity Checker is.."
|
|
bitfld.long 0x8 9. "IPRAE_S9,Interconnect Parity read address checking enable for APEX0 ram This field enables or disables the read address parity checker module for the interconnect related to described slave" "0: Interconnect Read Address Parity Checker is..,1: Interconnect Read Address Parity Checker is.."
|
|
newline
|
|
bitfld.long 0x8 8. "IPRAE_S8,Interconnect Parity read address checking enable for SRAM from others This field enables or disables the read address parity checker module for the interconnect related to described slave" "0: Interconnect Read Address Parity Checker is..,1: Interconnect Read Address Parity Checker is.."
|
|
bitfld.long 0x8 7. "IPRAE_S7,Interconnect Parity read address checking enable for SRAM from cores This field enables or disables the read address parity checker module for the interconnect related to described slave" "0: Interconnect Read Address Parity Checker is..,1: Interconnect Read Address Parity Checker is.."
|
|
newline
|
|
bitfld.long 0x8 6. "IPRAE_S6,Interconnect Parity read address checking enable for SRAM from PCIE This field enables or disables the read address parity checker module for the interconnect related to described slave" "0: Interconnect Read Address Parity Checker is..,1: Interconnect Read Address Parity Checker is.."
|
|
bitfld.long 0x8 5. "IPRAE_S5,Interconnect Parity read address checking enable for SRAM from FastDMA This field enables or disables the read address parity checker module for the interconnect related to described slave" "0: Interconnect Read Address Parity Checker is..,1: Interconnect Read Address Parity Checker is.."
|
|
newline
|
|
bitfld.long 0x8 4. "IPRAE_S4,Interconnect Parity read address checking enable for SRAM from APEX1 This field enables or disables the read address parity checker module for the interconnect related to described slave" "0: Interconnect Read Address Parity Checker is..,1: Interconnect Read Address Parity Checker is.."
|
|
bitfld.long 0x8 3. "IPRAE_S3,Interconnect Parity read address checking enable for SRAM from APEX0 This field enables or disables the read address parity checker module for the interconnect related to described slave" "0: Interconnect Read Address Parity Checker is..,1: Interconnect Read Address Parity Checker is.."
|
|
newline
|
|
bitfld.long 0x8 2. "IPRAE_S2,Interconnect Parity read address checking enable for SRAM from VIU/H264dec This field enables or disables the read address parity checker module for the interconnect related to described slave" "0: Interconnect Read Address Parity Checker is..,1: Interconnect Read Address Parity Checker is.."
|
|
bitfld.long 0x8 1. "IPRAE_S1,Interconnect Parity read address checking enable for DDR1 This field enables or disables the read address parity checker module for the interconnect related to described slave" "0: Interconnect Read Address Parity Checker is..,1: Interconnect Read Address Parity Checker is.."
|
|
newline
|
|
bitfld.long 0x8 0. "IPRAE_S0,Interconnect Parity read address checking enable for DDR0 This field enables or disables the read address parity checker module for the interconnect related to described slave" "0: Interconnect Read Address Parity Checker is..,1: Interconnect Read Address Parity Checker is.."
|
|
line.long 0xC "IPCE3,Interconnect Parity Checking Enable Register 3"
|
|
bitfld.long 0xC 16. "IPWAE_CCI_S1,CCI Interconnect Parity write address checking enable for CA53_CCI_1" "0: CCI Interconnect Write Address Parity Checker is..,1: CCI Interconnect Write Address Parity Checker is.."
|
|
bitfld.long 0xC 15. "IPWAE_CCI_S0,CCI Interconnect Parity write address checking enable for CA53_CCI_0" "0: CCI Interconnect Write Address Parity Checker is..,1: CCI Interconnect Write Address Parity Checker is.."
|
|
newline
|
|
bitfld.long 0xC 13. "IPWAE_S13,Interconnect Parity write address checking enable for GIC This field enables or disables the write address parity checker module for the interconnect related to described slave" "0: Interconnect Write Address Parity Checker is..,1: Interconnect Write Address Parity Checker is.."
|
|
bitfld.long 0xC 11. "IPWAE_S11,Interconnect Parity write address checking enable for PCIE This field enables or disables the write address parity checker module for the interconnect related to described slave" "0: Interconnect Write Address Parity Checker is..,1: Interconnect Write Address Parity Checker is.."
|
|
newline
|
|
bitfld.long 0xC 10. "IPWAE_S10,Interconnect Parity write address checking enable for APEX1 ram This field enables or disables the write address parity checker module for the interconnect related to described slave" "0: Interconnect Write Address Parity Checker is..,1: Interconnect Write Address Parity Checker is.."
|
|
bitfld.long 0xC 9. "IPWAE_S9,Interconnect Parity write address checking enable for APEX0 ram This field enables or disables the write address parity checker module for the interconnect related to described slave" "0: Interconnect Write Address Parity Checker is..,1: Interconnect Write Address Parity Checker is.."
|
|
newline
|
|
bitfld.long 0xC 8. "IPWAE_S8,Interconnect Parity write address checking enable for SRAM from others This field enables or disables the write address parity checker module for the interconnect related to described slave" "0: Interconnect Write Address Parity Checker is..,1: Interconnect Write Address Parity Checker is.."
|
|
bitfld.long 0xC 7. "IPWAE_S7,Interconnect Parity write address checking enable for SRAM from cores This field enables or disables the write address parity checker module for the interconnect related to described slave" "0: Interconnect Write Address Parity Checker is..,1: Interconnect Write Address Parity Checker is.."
|
|
newline
|
|
bitfld.long 0xC 6. "IPWAE_S6,Interconnect Parity write address checking enable for SRAM from PCIE This field enables or disables the write address parity checker module for the interconnect related to described slave" "0: Interconnect Write Address Parity Checker is..,1: Interconnect Write Address Parity Checker is.."
|
|
bitfld.long 0xC 5. "IPWAE_S5,Interconnect Parity write address checking enable for SRAM from FastDMA This field enables or disables the write address parity checker module for the interconnect related to described slave" "0: Interconnect Write Address Parity Checker is..,1: Interconnect Write Address Parity Checker is.."
|
|
newline
|
|
bitfld.long 0xC 4. "IPWAE_S4,Interconnect Parity write address checking enable for SRAM from APEX1 This field enables or disables the write address parity checker module for the interconnect related to described slave" "0: Interconnect Write Address Parity Checker is..,1: Interconnect Write Address Parity Checker is.."
|
|
bitfld.long 0xC 3. "IPWAE_S3,Interconnect Parity write address checking enable for SRAM from APEX0 This field enables or disables the write address parity checker module for the interconnect related to described slave" "0: Interconnect Write Address Parity Checker is..,1: Interconnect Write Address Parity Checker is.."
|
|
newline
|
|
bitfld.long 0xC 2. "IPWAE_S2,Interconnect Parity write address checking enable for SRAM from VIU/H264dec This field enables or disables the write address parity checker module for the interconnect related to described slave" "0: Interconnect Write Address Parity Checker is..,1: Interconnect Write Address Parity Checker is.."
|
|
bitfld.long 0xC 1. "IPWAE_S1,Interconnect Parity write address checking enable for DDR1 This field enables or disables the write address parity checker module for the interconnect related to described slave" "0: Interconnect Write Address Parity Checker is..,1: Interconnect Write Address Parity Checker is.."
|
|
newline
|
|
bitfld.long 0xC 0. "IPWAE_S0,Interconnect Parity write address checking enable for DDR0 This field enables or disables the write address parity checker module for the interconnect related to described slave" "0: Interconnect Write Address Parity Checker is..,1: Interconnect Write Address Parity Checker is.."
|
|
group.long 0xD40++0x3
|
|
line.long 0x0 "IPCGIE,Interconnect Parity Checking Global Injection Enable Register"
|
|
bitfld.long 0x0 0. "GIE,Global Injection Enable This field globally enables or disables the error injection feature of the parity checker modules" "0: Interconnect Parity Checkers Error Injection..,1: Interconnect Parity Checkers Error Injection.."
|
|
group.long 0xD50++0xF
|
|
line.long 0x0 "IPCIE0,Interconnect Parity Checking Injection Enable Register 0"
|
|
bitfld.long 0x0 28. "IPRIE_CCI_M1,CCI Interconnect Parity read data checking injection enable for Cortex-A53 cluster 1" "0: CCI Interconnect Read Data Parity Checker..,1: CCI Interconnect Read Data Parity Checker.."
|
|
bitfld.long 0x0 27. "IPRIE_CCI_M0,CCI Interconnect Parity read data checking injection enable for Cortex-A53 cluster 0" "0: CCI Interconnect Read Data Parity Checker..,1: CCI Interconnect Read Data Parity Checker.."
|
|
newline
|
|
bitfld.long 0x0 26. "IPRIE_M26,Interconnect Parity read data checking injection enable for NIC cross-connect to XBAR bus This field enables or disables the read data parity checker injection mechanism for the interconnect related to described master" "0: Interconnect Read Data Parity Checker Injection..,1: Interconnect Read Data Parity Checker Injection.."
|
|
bitfld.long 0x0 25. "IPRIE_M25,Interconnect Parity read data checking injection enable for SIPI/debug concentrator This field enables or disables the read data parity checker injection mechanism for the interconnect related to described master" "0: Interconnect Read Data Parity Checker Injection..,1: Interconnect Read Data Parity Checker Injection.."
|
|
newline
|
|
bitfld.long 0x0 24. "IPRIE_M24,Interconnect Parity read data checking injection enable for Flexray This field enables or disables the read data parity checker injection mechanism for the interconnect related to described master" "0: Interconnect Read Data Parity Checker Injection..,1: Interconnect Read Data Parity Checker Injection.."
|
|
bitfld.long 0x0 23. "IPRIE_M23,Interconnect Parity read data checking injection enable for SDHC This field enables or disables the read data parity checker injection mechanism for the interconnect related to described master" "0: Interconnect Read Data Parity Checker Injection..,1: Interconnect Read Data Parity Checker Injection.."
|
|
newline
|
|
bitfld.long 0x0 22. "IPRIE_M22,Interconnect Parity read data checking injection enable for DMA This field enables or disables the read data parity checker injection mechanism for the interconnect related to described master" "0: Interconnect Read Data Parity Checker Injection..,1: Interconnect Read Data Parity Checker Injection.."
|
|
bitfld.long 0x0 21. "IPRIE_M21,Interconnect Parity read data checking injection enable for CSE This field enables or disables the read data parity checker injection mechanism for the interconnect related to described master" "0: Interconnect Read Data Parity Checker Injection..,1: Interconnect Read Data Parity Checker Injection.."
|
|
newline
|
|
bitfld.long 0x0 20. "IPRIE_M20,Interconnect Parity read data checking injection enable for Cortex-M4 System bus This field enables or disables the read data parity checker injection mechanism for the interconnect related to described master" "0: Interconnect Read Data Parity Checker Injection..,1: Interconnect Read Data Parity Checker Injection.."
|
|
bitfld.long 0x0 19. "IPRIE_M19,Interconnect Parity read data checking injection enable for Cortex-M4 Code bus This field enables or disables the read data parity checker injection mechanism for the interconnect related to described master" "0: Interconnect Read Data Parity Checker Injection..,1: Interconnect Read Data Parity Checker Injection.."
|
|
newline
|
|
bitfld.long 0x0 18. "IPRIE_M18,Interconnect Parity read data checking injection enable for XBAR cross-connect to NIC for ram accesses This field enables or disables the read data parity checker injection mechanism for the interconnect related to described master" "0: Interconnect Read Data Parity Checker Injection..,1: Interconnect Read Data Parity Checker Injection.."
|
|
bitfld.long 0x0 17. "IPRIE_M17,Interconnect Parity read data checking injection enable for XBAR cross-connect to NIC for non-ram accesses This field enables or disables the read data parity checker injection mechanism for the interconnect related to described master" "0: Interconnect Read Data Parity Checker Injection..,1: Interconnect Read Data Parity Checker Injection.."
|
|
newline
|
|
bitfld.long 0x0 16. "IPRIE_M16,Interconnect Parity read data checking injection enable for Cortex-A53-CCi1 This field enables or disables the read data parity checker injection mechanism for the interconnect related to described master" "0: Interconnect Read Data Parity Checker Injection..,1: Interconnect Read Data Parity Checker Injection.."
|
|
bitfld.long 0x0 15. "IPRIE_M15,Interconnect Parity read data checking injection enable for Cortex-A53-CCI0 bus This field enables or disables the read data parity checker injection mechanism for the interconnect related to described master" "0: Interconnect Read Data Parity Checker Injection..,1: Interconnect Read Data Parity Checker Injection.."
|
|
newline
|
|
bitfld.long 0x0 14. "IPRIE_M14,Interconnect Parity read data checking injection enable for ENET1 This field enables or disables the read data parity checker injection mechanism for the interconnect related to described master" "0: Interconnect Read Data Parity Checker Injection..,1: Interconnect Read Data Parity Checker Injection.."
|
|
bitfld.long 0x0 13. "IPRIE_M13,Interconnect Parity read data checking injection enable for ENET0 This field enables or disables the read data parity checker injection mechanism for the interconnect related to described master" "0: Interconnect Read Data Parity Checker Injection..,1: Interconnect Read Data Parity Checker Injection.."
|
|
newline
|
|
bitfld.long 0x0 12. "IPRIE_M12,Interconnect Parity read data checking injection enable for PCIE This field enables or disables the read data parity checker injection mechanism for the interconnect related to described master" "0: Interconnect Read Data Parity Checker Injection..,1: Interconnect Read Data Parity Checker Injection.."
|
|
bitfld.long 0x0 11. "IPRIE_M11,Interconnect Parity read data checking injection enable for FastDMA1 This field enables or disables the read data parity checker injection mechanism for the interconnect related to described master" "0: Interconnect Read Data Parity Checker Injection..,1: Interconnect Read Data Parity Checker Injection.."
|
|
newline
|
|
bitfld.long 0x0 10. "IPRIE_M10,Interconnect Parity read data checking injection enable for FastDMA0 This field enables or disables the read data parity checker injection mechanism for the interconnect related to described master" "0: Interconnect Read Data Parity Checker Injection..,1: Interconnect Read Data Parity Checker Injection.."
|
|
bitfld.long 0x0 9. "IPRIE_M9,Interconnect Parity read data checking injection enable for GPU1 This field enables or disables the read data parity checker injection mechanism for the interconnect related to described master" "0: Interconnect Read Data Parity Checker Injection..,1: Interconnect Read Data Parity Checker Injection.."
|
|
newline
|
|
bitfld.long 0x0 8. "IPRIE_M8,Interconnect Parity read data checking injection enable for GPU0 This field enables or disables the read data parity checker injection mechanism for the interconnect related to described master" "0: Interconnect Read Data Parity Checker Injection..,1: Interconnect Read Data Parity Checker Injection.."
|
|
bitfld.long 0x0 7. "IPRIE_M7,Interconnect Parity read data checking injection enable for APEX1 BLKDMA This field enables or disables the read data parity checker injection mechanism for the interconnect related to described master" "0: Interconnect Read Data Parity Checker Injection..,1: Interconnect Read Data Parity Checker Injection.."
|
|
newline
|
|
bitfld.long 0x0 6. "IPRIE_M6,Interconnect Parity read data checking injection enable for APEX1 DMA This field enables or disables the read data parity checker injection mechanism for the interconnect related to described master" "0: Interconnect Read Data Parity Checker Injection..,1: Interconnect Read Data Parity Checker Injection.."
|
|
bitfld.long 0x0 5. "IPRIE_M5,Interconnect Parity read data checking injection enable for APEX0 BLKDMA This field enables or disables the read data parity checker injection mechanism for the interconnect related to described master" "0: Interconnect Read Data Parity Checker Injection..,1: Interconnect Read Data Parity Checker Injection.."
|
|
newline
|
|
bitfld.long 0x0 4. "IPRIE_M4,Interconnect Parity read data checking injection enable for APEX0 DMA This field enables or disables the read data parity checker injection mechanism for the interconnect related to described master" "0: Interconnect Read Data Parity Checker Injection..,1: Interconnect Read Data Parity Checker Injection.."
|
|
bitfld.long 0x0 3. "IPRIE_M3,Interconnect Parity read data checking injection enable for DCU This field enables or disables the read data parity checker injection mechanism for the interconnect related to described master" "0: Interconnect Read Data Parity Checker Injection..,1: Interconnect Read Data Parity Checker Injection.."
|
|
newline
|
|
bitfld.long 0x0 2. "IPRIE_M2,Interconnect Parity read data checking injection enable for H264dec This field enables or disables the read data parity checker injection mechanism for the interconnect related to described master" "0: Interconnect Read Data Parity Checker Injection..,1: Interconnect Read Data Parity Checker Injection.."
|
|
line.long 0x4 "IPCIE1,Interconnect Parity Checking Injection Enable Register 1"
|
|
bitfld.long 0x4 23. "IPWIE_CCI_S1,CCI Interconnect Parity write data checking injection enable for CA53_CCI_1" "0: CCI Interconnect Write Data Parity Checker..,1: CCI Interconnect Write Data Parity Checker.."
|
|
bitfld.long 0x4 22. "IPWIE_CCI_S0,CCI Interconnect Parity write data checking injection enable for CA53_CCI_0" "0: CCI Interconnect Write Data Parity Checker..,1: CCI Interconnect Write Data Parity Checker.."
|
|
newline
|
|
bitfld.long 0x4 21. "IPWIE_S21,Interconnect Parity write data checking injection enable for XBAR cross-connect to NIC for non-ram accesses This field enables or disables the write data parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Write Data Parity Checker Injection..,1: Interconnect Write Data Parity Checker Injection.."
|
|
bitfld.long 0x4 20. "IPWIE_S20,Interconnect Parity write data checking injection enable for Peripheral Bridge 1 This field enables or disables the write data parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Write Data Parity Checker Injection..,1: Interconnect Write Data Parity Checker Injection.."
|
|
newline
|
|
bitfld.long 0x4 19. "IPWIE_S19,Interconnect Parity write data checking injection enable for Peripheral Bridge 0 This field enables or disables the write data parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Write Data Parity Checker Injection..,1: Interconnect Write Data Parity Checker Injection.."
|
|
bitfld.long 0x4 18. "IPWIE_S18,Interconnect Parity write data checking injection enable for XBAR cross-connect to NIC for ram accesses This field enables or disables the write data parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Write Data Parity Checker Injection..,1: Interconnect Write Data Parity Checker Injection.."
|
|
newline
|
|
bitfld.long 0x4 17. "IPWIE_S17,Interconnect Parity write data checking injection enable for QSPI This field enables or disables the write data parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Write Data Parity Checker Injection..,1: Interconnect Write Data Parity Checker Injection.."
|
|
bitfld.long 0x4 16. "IPWIE_S16,Interconnect Parity write data checking injection enable for Cortex-M4 TCM This field enables or disables the write data parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Write Data Parity Checker Injection..,1: Interconnect Write Data Parity Checker Injection.."
|
|
newline
|
|
bitfld.long 0x4 14. "IPWIE_S14,Interconnect Parity write data checking injection enable for NIC cross-connect to XBAR bus This field enables or disables the write data parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Write Data Parity Checker Injection..,1: Interconnect Write Data Parity Checker Injection.."
|
|
bitfld.long 0x4 13. "IPWIE_S13,Interconnect Parity write data checking injection enable for GIC This field enables or disables the write data parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Write Data Parity Checker Injection..,1: Interconnect Write Data Parity Checker Injection.."
|
|
newline
|
|
bitfld.long 0x4 12. "IPWIE_S12,Interconnect Parity write data checking injection enable for SEQ This field enables or disables the write data parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Write Data Parity Checker Injection..,1: Interconnect Write Data Parity Checker Injection.."
|
|
bitfld.long 0x4 11. "IPWIE_S11,Interconnect Parity write data checking injection enable for PCIE This field enables or disables the write data parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Write Data Parity Checker Injection..,1: Interconnect Write Data Parity Checker Injection.."
|
|
newline
|
|
bitfld.long 0x4 10. "IPWIE_S10,Interconnect Parity write data checking injection enable for APEX1 ram This field enables or disables the write data parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Write Data Parity Checker Injection..,1: Interconnect Write Data Parity Checker Injection.."
|
|
bitfld.long 0x4 9. "IPWIE_S9,Interconnect Parity write data checking injection enable for APEX0 ram This field enables or disables the write data parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Write Data Parity Checker Injection..,1: Interconnect Write Data Parity Checker Injection.."
|
|
newline
|
|
bitfld.long 0x4 8. "IPWIE_S8,Interconnect Parity write data checking injection enable for SRAM from others This field enables or disables the write data parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Write Data Parity Checker Injection..,1: Interconnect Write Data Parity Checker Injection.."
|
|
bitfld.long 0x4 7. "IPWIE_S7,Interconnect Parity write data checking injection enable for SRAM from cores This field enables or disables the write data parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Write Data Parity Checker Injection..,1: Interconnect Write Data Parity Checker Injection.."
|
|
newline
|
|
bitfld.long 0x4 6. "IPWIE_S6,Interconnect Parity write data checking injection enable for SRAM from PCIE This field enables or disables the write data parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Write Data Parity Checker Injection..,1: Interconnect Write Data Parity Checker Injection.."
|
|
bitfld.long 0x4 5. "IPWIE_S5,Interconnect Parity write data checking injection enable for SRAM from FastDMA This field enables or disables the write data parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Write Data Parity Checker Injection..,1: Interconnect Write Data Parity Checker Injection.."
|
|
newline
|
|
bitfld.long 0x4 4. "IPWIE_S4,Interconnect Parity write data checking injection enable for SRAM from APEX1 This field enables or disables the write data parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Write Data Parity Checker Injection..,1: Interconnect Write Data Parity Checker Injection.."
|
|
bitfld.long 0x4 3. "IPWIE_S3,Interconnect Parity write data checking injection enable for SRAM from APEX0 This field enables or disables the write data parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Write Data Parity Checker Injection..,1: Interconnect Write Data Parity Checker Injection.."
|
|
newline
|
|
bitfld.long 0x4 2. "IPWIE_S2,Interconnect Parity write data checking injection enable for SRAM from VIU/H264dec This field enables or disables the write data parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Write Data Parity Checker Injection..,1: Interconnect Write Data Parity Checker Injection.."
|
|
bitfld.long 0x4 1. "IPWIE_S1,Interconnect Parity write data checking injection enable for DDR1 This field enables or disables the write data parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Write Data Parity Checker Injection..,1: Interconnect Write Data Parity Checker Injection.."
|
|
newline
|
|
bitfld.long 0x4 0. "IPWIE_S0,Interconnect Parity write data checking injection enable for DDR0 This field enables or disables the write data parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Write Data Parity Checker Injection..,1: Interconnect Write Data Parity Checker Injection.."
|
|
line.long 0x8 "IPCIE2,Interconnect Parity Checking Injection Enable Register 2"
|
|
bitfld.long 0x8 16. "IPRAIE_CCI_S1,CCI Interconnect Parity read address checking injection enable for CA53_CCI_1" "0: CCI Interconnect Read Address Parity Checker..,1: CCI Interconnect Read Address Parity Checker.."
|
|
bitfld.long 0x8 15. "IPRAIE_CCI_S0,CCI Interconnect Parity read address checking injection enable for CA53_CCI_0" "0: CCI Interconnect Read Address Parity Checker..,1: CCI Interconnect Read Address Parity Checker.."
|
|
newline
|
|
bitfld.long 0x8 14. "IPRAIE_S14,Interconnect Parity read address checking injection enable for NIC cross-connect to XBAR bus This field enables or disables the read address parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Read Address Parity Checker..,1: Interconnect Read Address Parity Checker.."
|
|
bitfld.long 0x8 13. "IPRAIE_S13,Interconnect Parity read address checking injection enable for GIC This field enables or disables the read address parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Read Address Parity Checker..,1: Interconnect Read Address Parity Checker.."
|
|
newline
|
|
bitfld.long 0x8 12. "IPRAIE_S12,Interconnect Parity read address checking injection enable for SEQ This field enables or disables the read address parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Read Address Parity Checker..,1: Interconnect Read Address Parity Checker.."
|
|
bitfld.long 0x8 11. "IPRAIE_S11,Interconnect Parity read address checking injection enable for PCIE This field enables or disables the read address parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Read Address Parity Checker..,1: Interconnect Read Address Parity Checker.."
|
|
newline
|
|
bitfld.long 0x8 10. "IPRAIE_S10,Interconnect Parity read address checking injection enable for APEX1 ram This field enables or disables the read address parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Read Address Parity Checker..,1: Interconnect Read Address Parity Checker.."
|
|
bitfld.long 0x8 9. "IPRAIE_S9,Interconnect Parity read address checking injection enable for APEX0 ram This field enables or disables the read address parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Read Address Parity Checker..,1: Interconnect Read Address Parity Checker.."
|
|
newline
|
|
bitfld.long 0x8 8. "IPRAIE_S8,Interconnect Parity read address checking injection enable for SRAM from others This field enables or disables the read address parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Read Address Parity Checker..,1: Interconnect Read Address Parity Checker.."
|
|
bitfld.long 0x8 7. "IPRAIE_S7,Interconnect Parity read address checking injection enable for SRAM from cores This field enables or disables the read address parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Read Address Parity Checker..,1: Interconnect Read Address Parity Checker.."
|
|
newline
|
|
bitfld.long 0x8 6. "IPRAIE_S6,Interconnect Parity read address checking injection enable for SRAM from PCIE This field enables or disables the read address parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Read Address Parity Checker..,1: Interconnect Read Address Parity Checker.."
|
|
bitfld.long 0x8 5. "IPRAIE_S5,Interconnect Parity read address checking injection enable for SRAM from FastDMA This field enables or disables the read address parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Read Address Parity Checker..,1: Interconnect Read Address Parity Checker.."
|
|
newline
|
|
bitfld.long 0x8 4. "IPRAIE_S4,Interconnect Parity read address checking injection enable for SRAM from APEX1 This field enables or disables the read address parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Read Address Parity Checker..,1: Interconnect Read Address Parity Checker.."
|
|
bitfld.long 0x8 3. "IPRAIE_S3,Interconnect Parity read address checking injection enable for SRAM from APEX0 This field enables or disables the read address parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Read Address Parity Checker..,1: Interconnect Read Address Parity Checker.."
|
|
newline
|
|
bitfld.long 0x8 2. "IPRAIE_S2,Interconnect Parity read address checking injection enable for SRAM from VIU/H264dec This field enables or disables the read address parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Read Address Parity Checker..,1: Interconnect Read Address Parity Checker.."
|
|
bitfld.long 0x8 1. "IPRAIE_S1,Interconnect Parity read address checking injection enable for DDR1 This field enables or disables the read address parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Read Address Parity Checker..,1: Interconnect Read Address Parity Checker.."
|
|
newline
|
|
bitfld.long 0x8 0. "IPRAIE_S0,Interconnect Parity read address checking injection enable for DDR0 This field enables or disables the read address parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Read Address Parity Checker..,1: Interconnect Read Address Parity Checker.."
|
|
line.long 0xC "IPCIE3,Interconnect Parity Checking Injection Enable Register 3"
|
|
bitfld.long 0xC 16. "IPWAIE_CCI_S1,CCI Interconnect Parity write address checking injection enable for CA53_CCI_1" "0: CCI Interconnect Write Address Parity Checker..,1: CCI Interconnect Write Address Parity Checker.."
|
|
bitfld.long 0xC 15. "IPWAIE_CCI_S0,CCI Interconnect Parity write address checking injection enable for CA53_CCI_0" "0: CCI Interconnect Write Address Parity Checker..,1: CCI Interconnect Write Address Parity Checker.."
|
|
newline
|
|
bitfld.long 0xC 13. "IPWAIE_S13,Interconnect Parity write address checking injection enable for GIC This bit enables or disables the write address parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Write Address Parity Checker..,1: Interconnect Write Address Parity Checker.."
|
|
bitfld.long 0xC 11. "IPWAIE_S11,Interconnect Parity write address checking injection enable for PCIE This bit enables or disables the write address parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Write Address Parity Checker..,1: Interconnect Write Address Parity Checker.."
|
|
newline
|
|
bitfld.long 0xC 10. "IPWAIE_S10,Interconnect Parity write address checking injection enable for APEX1 ram This bit enables or disables the write address parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Write Address Parity Checker..,1: Interconnect Write Address Parity Checker.."
|
|
bitfld.long 0xC 9. "IPWAIE_S9,Interconnect Parity write address checking injection enable for APEX0 ram This bit enables or disables the write address parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Write Address Parity Checker..,1: Interconnect Write Address Parity Checker.."
|
|
newline
|
|
bitfld.long 0xC 8. "IPWAIE_S8,Interconnect Parity write address checking injection enable for SRAM from others This bit enables or disables the write address parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Write Address Parity Checker..,1: Interconnect Write Address Parity Checker.."
|
|
bitfld.long 0xC 7. "IPWAIE_S7,Interconnect Parity write address checking injection enable for SRAM from cores This bit enables or disables the write address parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Write Address Parity Checker..,1: Interconnect Write Address Parity Checker.."
|
|
newline
|
|
bitfld.long 0xC 6. "IPWAIE_S6,Interconnect Parity write address checking injection enable for SRAM from PCIE This bit enables or disables the write address parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Write Address Parity Checker..,1: Interconnect Write Address Parity Checker.."
|
|
bitfld.long 0xC 5. "IPWAIE_S5,Interconnect Parity write address checking injection enable for SRAM from FastDMA This bit enables or disables the write address parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Write Address Parity Checker..,1: Interconnect Write Address Parity Checker.."
|
|
newline
|
|
bitfld.long 0xC 4. "IPWAIE_S4,Interconnect Parity write address checking injection enable for SRAM from APEX1 This bit enables or disables the write address parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Write Address Parity Checker..,1: Interconnect Write Address Parity Checker.."
|
|
bitfld.long 0xC 3. "IPWAIE_S3,Interconnect Parity write address checking injection enable for SRAM from APEX0 This bit enables or disables the write address parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Write Address Parity Checker..,1: Interconnect Write Address Parity Checker.."
|
|
newline
|
|
bitfld.long 0xC 2. "IPWAIE_S2,Interconnect Parity write address checking injection enable for SRAM from VIU/H264dec This bit enables or disables the write address parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Write Address Parity Checker..,1: Interconnect Write Address Parity Checker.."
|
|
bitfld.long 0xC 1. "IPWAIE_S1,Interconnect Parity write address checking injection enable for DDR1 This bit enables or disables the write address parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Write Address Parity Checker..,1: Interconnect Write Address Parity Checker.."
|
|
newline
|
|
bitfld.long 0xC 0. "IPWAIE_S0,Interconnect Parity write address checking injection enable for DDR0 This bit enables or disables the write address parity checker injection mechanism for the interconnect related to described slave" "0: Interconnect Write Address Parity Checker..,1: Interconnect Write Address Parity Checker.."
|
|
tree.end
|
|
tree "OCOTP (On-Chip One Time Programmable Controller)"
|
|
base ad:0x4005F000
|
|
group.long 0x0++0x13
|
|
line.long 0x0 "CTRL,OTP Controller Control Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "WR_UNLOCK,Write 0x3E77 to enable OTP write accesses"
|
|
bitfld.long 0x0 13. "CRC_FAIL,Set by controller when calculated CRC value is not equal to appointed CRC fuse word" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "CRC_TEST,Set to calculate CRC according to start address and end address in CRC_ADDR register" "0,1"
|
|
bitfld.long 0x0 10. "RELOAD_SHADOWS,Set to force re-loading the shadow registers (HW/SW capability and LOCK)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "ERROR,Set by the controller when an access to a locked region(OTP or shadow register) is requested" "0,1"
|
|
rbitfld.long 0x0 8. "BUSY,OTP controller status bit" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "ADDR,OTP write and read access address register"
|
|
line.long 0x4 "CTRL_SET,OTP Controller Control Register"
|
|
hexmask.long.word 0x4 16.--31. 1. "WR_UNLOCK,Write 0x3E77 to enable OTP write accesses"
|
|
bitfld.long 0x4 13. "CRC_FAIL,Set by controller when calculated CRC value is not equal to appointed CRC fuse word" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "CRC_TEST,Set to calculate CRC according to start address and end address in CRC_ADDR register" "0,1"
|
|
bitfld.long 0x4 10. "RELOAD_SHADOWS,Set to force re-loading the shadow registers (HW/SW capability and LOCK)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "ERROR,Set by the controller when an access to a locked region(OTP or shadow register) is requested" "0,1"
|
|
rbitfld.long 0x4 8. "BUSY,OTP controller status bit" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--7. 1. "ADDR,OTP write and read access address register"
|
|
line.long 0x8 "CTRL_CLR,OTP Controller Control Register"
|
|
hexmask.long.word 0x8 16.--31. 1. "WR_UNLOCK,Write 0x3E77 to enable OTP write accesses"
|
|
bitfld.long 0x8 13. "CRC_FAIL,Set by controller when calculated CRC value is not equal to appointed CRC fuse word" "0,1"
|
|
newline
|
|
bitfld.long 0x8 12. "CRC_TEST,Set to calculate CRC according to start address and end address in CRC_ADDR register" "0,1"
|
|
bitfld.long 0x8 10. "RELOAD_SHADOWS,Set to force re-loading the shadow registers (HW/SW capability and LOCK)" "0,1"
|
|
newline
|
|
bitfld.long 0x8 9. "ERROR,Set by the controller when an access to a locked region(OTP or shadow register) is requested" "0,1"
|
|
rbitfld.long 0x8 8. "BUSY,OTP controller status bit" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x8 0.--7. 1. "ADDR,OTP write and read access address register"
|
|
line.long 0xC "CTRL_TOG,OTP Controller Control Register"
|
|
hexmask.long.word 0xC 16.--31. 1. "WR_UNLOCK,Write 0x3E77 to enable OTP write accesses"
|
|
bitfld.long 0xC 13. "CRC_FAIL,Set by controller when calculated CRC value is not equal to appointed CRC fuse word" "0,1"
|
|
newline
|
|
bitfld.long 0xC 12. "CRC_TEST,Set to calculate CRC according to start address and end address in CRC_ADDR register" "0,1"
|
|
bitfld.long 0xC 10. "RELOAD_SHADOWS,Set to force re-loading the shadow registers (HW/SW capability and LOCK)" "0,1"
|
|
newline
|
|
bitfld.long 0xC 9. "ERROR,Set by the controller when an access to a locked region(OTP or shadow register) is requested" "0,1"
|
|
rbitfld.long 0xC 8. "BUSY,OTP controller status bit" "0,1"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--7. 1. "ADDR,OTP write and read access address register"
|
|
line.long 0x10 "TIMING,OTP Controller Timing Register"
|
|
hexmask.long.byte 0x10 28.--31. 1. "RSRVD0,These bits always read back zero"
|
|
hexmask.long.byte 0x10 22.--27. 1. "WAIT,This count value specifies time interval between auto read and write access in one time program"
|
|
newline
|
|
hexmask.long.byte 0x10 16.--21. 1. "STROBE_READ,This count value specifies the strobe period in one time read OTP"
|
|
hexmask.long.byte 0x10 12.--15. 1. "RELAX,This count value specifies the time to add to all default timing parameters other than the Tpgm and Trd"
|
|
newline
|
|
hexmask.long.word 0x10 0.--11. 1. "STROBE_PROG,This count value specifies the strobe period in one time write OTP"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "DATA,OTP Controller Write Data Register"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Used to initiate a write to OTP"
|
|
group.long 0x30++0x3
|
|
line.long 0x0 "READ_CTRL,OTP Controller Read Control Register"
|
|
bitfld.long 0x0 0. "READ_FUSE,Used to initiate a read to OTP" "0,1"
|
|
rgroup.long 0x40++0x3
|
|
line.long 0x0 "READ_FUSE_DATA,OTP Controller Read Data Register"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,The data read from OTP"
|
|
group.long 0x50++0x3
|
|
line.long 0x0 "SW_STICKY,Sticky bit Register"
|
|
bitfld.long 0x0 2. "FIELD_RETURN_LOCK,Shadow register write and OTP write lock for FIELD_RETURN region" "0,1"
|
|
group.long 0x70++0x3
|
|
line.long 0x0 "CRC_ADDR,OTP Controller CRC test address"
|
|
bitfld.long 0x0 16.--18. "CRC_ADDR,Address of 32-bit CRC result for comparing" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x0 8.--15. 1. "DATA_END_ADDR,Start address of fuse location for CRC calculation"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "DATA_START_ADDR,End address of fuse location for CRC calculation"
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "CRC_VALUE,OTP Controller CRC Value Register"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,The crc32 value based on CRC_ADDR."
|
|
rgroup.long 0x90++0x3
|
|
line.long 0x0 "VERSION,OTP Controller Version Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Fixed read-only value reflecting the MAJOR field of the RTL version of the OCOTP module"
|
|
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Fixed read-only value reflecting the MINOR field of the RTL version of the OCOTP module"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "STEP,Fixed read-only value reflecting the stepping of the RTL version of the OCOTP module."
|
|
group.long 0x620++0x3
|
|
line.long 0x0 "MAC0,Value of OTP Bank4 Word2 (MAC Address0)"
|
|
hexmask.long 0x0 0.--31. 1. "MAC_ADDR31_0,RESERVED for customers/SW"
|
|
group.long 0x630++0x3
|
|
line.long 0x0 "MAC1,Value of OTP Bank4 Word3 (MAC Address)"
|
|
hexmask.long.word 0x0 0.--15. 1. "MAC_ADDR47_32,RESERVED for customers/SW"
|
|
group.long 0x660++0x3
|
|
line.long 0x0 "GP1,Value of OTP Bank4 Word6 (HW Capabilities)"
|
|
hexmask.long 0x0 0.--31. 1. "BITS,Reflects value of OTP Bank 4 word 6 (ADDR = 0x26)."
|
|
group.long 0x670++0x3
|
|
line.long 0x0 "GP2,Value of OTP Bank4 Word7 (HW Capabilities)"
|
|
hexmask.long 0x0 0.--31. 1. "BITS,Reflects value of OTP Bank 4 word 7 (ADDR = 0x27)."
|
|
group.long 0x6A0++0x3
|
|
line.long 0x0 "MISC_CONF,Value of OTP Bank5 Word2"
|
|
hexmask.long.byte 0x0 0.--5. 1. "PAD_SETTINGS,Used with conjunction of MMC/SD/Nand 'Override Pad Settings' fuse value as follow:'0' - Use IO default settings for boot device IO pads"
|
|
group.long 0x6B0++0x3
|
|
line.long 0x0 "FIELD_RTN,Value of OTP Bank5 Word3"
|
|
bitfld.long 0x0 1. "FIELD_RETURN_Copy,Configure device for field return testing" "0: Device is in functional / secure mode.,1: Device is open for 'field-return' testing."
|
|
bitfld.long 0x0 0. "FIELD_RETURN,Configure device for field return testing" "0: Device is in functional / secure mode.,1: Device is open for 'field-return' testing."
|
|
group.long 0x6C0++0x3
|
|
line.long 0x0 "MISC2,Value of OTP Bank5 Word4"
|
|
group.long 0x6D0++0x3
|
|
line.long 0x0 "CRC0,Value of OTP Bank5 Word5 (CRC0)"
|
|
hexmask.long 0x0 0.--31. 1. "CRC32,Reflects the calculated CRC32 for the pre-defined fuse area"
|
|
group.long 0x6E0++0x3
|
|
line.long 0x0 "CRC1,Value of OTP Bank5 Word6 (CRC1)"
|
|
hexmask.long 0x0 0.--31. 1. "CRC32,Reflects the calculated CRC32 for the pre-defined fuse area"
|
|
group.long 0x6F0++0x3
|
|
line.long 0x0 "CRC2,Value of OTP Bank5 Word7 (CRC2)"
|
|
hexmask.long 0x0 0.--31. 1. "CRC32,Reflects the calculated CRC32 for the pre-defined fuse area"
|
|
group.long 0x700++0x3
|
|
line.long 0x0 "CRC3,Value of OTP Bank6 Word0 (CRC3)"
|
|
hexmask.long 0x0 0.--31. 1. "CRC32,Reflects the calculated CRC32 for the pre-defined fuse area"
|
|
group.long 0x710++0x3
|
|
line.long 0x0 "CRC4,Value of OTP Bank6 Word1 (CRC4)"
|
|
hexmask.long 0x0 0.--31. 1. "CRC32,Reflects the calculated CRC32 for the pre-defined fuse area"
|
|
group.long 0x720++0x3
|
|
line.long 0x0 "CRC5,Value of OTP Bank6 Word2 (CRC5)"
|
|
hexmask.long 0x0 0.--31. 1. "CRC32,Reflects the calculated CRC32 for the pre-defined fuse area"
|
|
repeat 13. (increment 0x0 0x1)(increment 0x0 0x10)
|
|
group.long ($2+0x730)++0x3
|
|
line.long 0x0 "ECC_FUSE$1,ECC Fuse words"
|
|
hexmask.long 0x0 0.--31. 1. "ECC,ECC Fuse bits"
|
|
repeat.end
|
|
repeat 64. (increment 0x0 0x1)(increment 0x0 0x10)
|
|
group.long ($2+0x800)++0x3
|
|
line.long 0x0 "REDUNDANT_FUSE$1,Redundant Fuse words"
|
|
hexmask.long 0x0 0.--31. 1. "Redundant,Redundant Fuse bits"
|
|
repeat.end
|
|
group.long 0xC00++0x3
|
|
line.long 0x0 "SEC0,Single Bit ECC Error status"
|
|
hexmask.long 0x0 0.--31. 1. "FUSE_WRD_SECC31_0,Single bit ECC error status"
|
|
group.long 0xC10++0x3
|
|
line.long 0x0 "SEC1,Single Bit ECC Error status"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "FUSE_WRD_SECC50_32,Single bit ECC error status"
|
|
group.long 0xC20++0x3
|
|
line.long 0x0 "DEC0,Single Bit ECC Error status"
|
|
hexmask.long 0x0 0.--31. 1. "FUSE_WRD_DECC31_0,Double bit ECC error status"
|
|
group.long 0xC30++0x3
|
|
line.long 0x0 "DEC1,Double Bit ECC Error status"
|
|
hexmask.long.tbyte 0x0 0.--18. 1. "FUSE_WRD_DECC50_32,Double bit ECC error status"
|
|
tree.end
|
|
tree "OTFAD (On-the-Fly AES Decryption Module)"
|
|
base ad:0x400A6000
|
|
group.long 0xC00++0xB
|
|
line.long 0x0 "CR,Control Register"
|
|
bitfld.long 0x0 31. "GE,Global OTFAD Enable" "0: OTFAD has decryption disabled and bypasses all..,1: OTFAD has decryption enabled and processes.."
|
|
bitfld.long 0x0 30. "SKBP,Start key blob processing" "0: Key blob processing is not initiated.,1: Properly-enabled key blob processing is initiated."
|
|
newline
|
|
bitfld.long 0x0 21. "CRCI,CRC Initialization" "0: CRC data register is unaffected.,1: CRC data register is immediately initialized.."
|
|
bitfld.long 0x0 20. "CRCE,CRC Enable" "0: CRC-32 is disabled.,1: CRC-32 for the context defined by CR[CCTRX] is.."
|
|
newline
|
|
bitfld.long 0x0 16.--17. "CCTX,CRC Context" "0: Enable CTX0 CRC check.,1: Enable CTX1 CRC check.,2: Enable CTX2 CRC check.,3: Enable CTX3 CRC check."
|
|
bitfld.long 0x0 7. "RRAE,Restricted Register Access Enable" "0: Register access is fully enabled. The OTFAD..,1: Register access is restricted and only the CR SR.."
|
|
newline
|
|
bitfld.long 0x0 6. "KBCE,Key Blob CRC Enable" "0: CRC-32 during key blob processing is disabled.,1: CRC-32 during key blob processing is enabled."
|
|
bitfld.long 0x0 5. "KBPE,Key Blob Processing Enable" "0: Key blob processing is disabled.,1: Key blob processing is enabled."
|
|
newline
|
|
bitfld.long 0x0 4. "KBSE,Key Blob Scramble Enable" "0: Key blob KEK scrambling is disabled.,1: Key blob KEK scrambling is enabled."
|
|
bitfld.long 0x0 3. "FLDM,Force Logically Disabled Mode" "0: No effect on the operating mode.,1: Force entry into LDM after a write with this.."
|
|
newline
|
|
bitfld.long 0x0 1. "FERR,Force Error" "0: No effect on the SR[KBERE] indicator.,1: SR[KBERR] is immediately set after a write with.."
|
|
bitfld.long 0x0 0. "IRQE,Interrupt Request Enable" "0: SR[KBERR] = 1 does not generate an interrupt..,1: SR[KBERR] = 1 generates an interrupt request."
|
|
line.long 0x4 "SR,Status Register"
|
|
rbitfld.long 0x4 31. "KBD,Key Blob Processing Done" "0: Key blob processing was not enabled or is not..,1: Key blob processing was enabled and is complete."
|
|
rbitfld.long 0x4 30. "KBPE,Key Blob Processing Enable" "0: Key blob processing is not enabled.,1: Key blob processing is enabled."
|
|
newline
|
|
rbitfld.long 0x4 29. "GEM,Global Enable Mode" "0: OTFAD is disabled and bypasses all data fetched..,1: OTFAD is enabled and processes data fetched by.."
|
|
rbitfld.long 0x4 28. "RRAM,Restricted Register Access Mode" "0: Register access is fully enabled. The OTFAD..,1: Register access is restricted and only the CR SR.."
|
|
newline
|
|
hexmask.long.byte 0x4 24.--27. 1. "HRL,Hardware Revision Level"
|
|
hexmask.long.byte 0x4 16.--19. 1. "CTXIE,Context Integrity Error"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--11. 1. "CTXER,Context Error"
|
|
hexmask.long.byte 0x4 4.--7. 1. "NCTX,Number of Contexts"
|
|
newline
|
|
rbitfld.long 0x4 2.--3. "MODE,Operating Mode" "0: Operating in Normal mode (NRM),1: Unused (reserved),2: Unused (reserved),3: Operating in Logically Disabled Mode (LDM)"
|
|
rbitfld.long 0x4 1. "MDPCP,MDPC Present" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "KBERR,Key Blob Error" "0: No key blob error detected.,1: One or more key blob errors has been detected."
|
|
line.long 0x8 "CRC,Cyclic Redundancy Check Register"
|
|
hexmask.long 0x8 0.--31. 1. "CRCD,CRC Data."
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x40)
|
|
group.long ($2+0xD00)++0x3
|
|
line.long 0x0 "CTX$1_KEY_W0,AES Key Word0"
|
|
hexmask.long 0x0 0.--31. 1. "W0KEY,AES Key"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x40)
|
|
group.long ($2+0xD04)++0x3
|
|
line.long 0x0 "CTX$1_KEY_W1,AES Key Word1"
|
|
hexmask.long 0x0 0.--31. 1. "W1KEY,AES Key"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x40)
|
|
group.long ($2+0xD08)++0x3
|
|
line.long 0x0 "CTX$1_KEY_W2,AES Key Word2"
|
|
hexmask.long 0x0 0.--31. 1. "W2KEY,AES Key"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x40)
|
|
group.long ($2+0xD0C)++0x3
|
|
line.long 0x0 "CTX$1_KEY_W3,AES Key Word3"
|
|
hexmask.long 0x0 0.--31. 1. "W3KEY,AES Key"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x40)
|
|
group.long ($2+0xD10)++0x3
|
|
line.long 0x0 "CTX$1_CTR_W0,AES Counter Word0"
|
|
hexmask.long 0x0 0.--31. 1. "W0CTR,AES Counter"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x40)
|
|
group.long ($2+0xD14)++0x3
|
|
line.long 0x0 "CTX$1_CTR_W1,AES Counter Word1"
|
|
hexmask.long 0x0 0.--31. 1. "W1CTR,AES Counter"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x40)
|
|
group.long ($2+0xD18)++0x3
|
|
line.long 0x0 "CTX$1_RGD_W0,AES Region Descriptor Word0"
|
|
hexmask.long.tbyte 0x0 10.--31. 1. "SRTADDR,Start Address"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x40)
|
|
group.long ($2+0xD1C)++0x3
|
|
line.long 0x0 "CTX$1_RGD_W1,AES Region Descriptor Word1"
|
|
hexmask.long.tbyte 0x0 10.--31. 1. "ENDADDR,End Address"
|
|
bitfld.long 0x0 2. "RO,Read-Only" "0: The context registers can be accessed normally..,1: The context registers are read-only and accesses.."
|
|
newline
|
|
bitfld.long 0x0 1. "ADE,Aes Decryption Enable." "0: Bypass the fetched data.,1: Perform the CTR-AES128 mode decryption on the.."
|
|
bitfld.long 0x0 0. "VLD,Valid" "0: Context is invalid.,1: Context is valid."
|
|
repeat.end
|
|
group.long 0xEF0++0xB
|
|
line.long 0x0 "MDPC_CSR,MDPC Control and Status Register"
|
|
hexmask.long.byte 0x0 28.--31. 1. "SYNDST,Syndrome State"
|
|
rbitfld.long 0x0 23. "BSY,Busy" "0: MDPC is disabled or idle.,1: MDPC is busy."
|
|
newline
|
|
rbitfld.long 0x0 20.--22. "HRL,Hardware Revision Level" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x0 16.--19. 1. "HCFG,Hardware Configuration"
|
|
newline
|
|
bitfld.long 0x0 6. "E45,Enable a hardware-controlled transition from OPMODE = 4 -> 5" "0: Hardware-controlled mode transition is disabled.,1: Hardware-controlled mode transition is enabled.."
|
|
bitfld.long 0x0 5. "E34,Enable a hardware-controlled transition from OPMODE = 3 -> 4." "0: Hardware-controlled mode transition is disabled.,1: Hardware-controlled mode transition is enabled.."
|
|
newline
|
|
bitfld.long 0x0 4. "E23,Enable a hardware-controlled transition from OPMODE = 2 -> 3." "0: Hardware-controlled mode transition is disabled.,1: Hardware-controlled mode transition is enabled.."
|
|
bitfld.long 0x0 0.--2. "OPMODE,OPeration MODE." "0: Disabled,1: Software reset (control registers + COLPn and..,2: COLPn and ROWPn registers are cleared,3: Read data and accumulate parity bits in COLPn..,4: Read expected COLP bits from memory and..,5: Read expected ROWP bits from memory and..,6: Unused reserved,7: Data correction mode"
|
|
line.long 0x4 "MDPC_SRTAR,MDPC Start Address Register"
|
|
hexmask.long.tbyte 0x4 10.--31. 1. "SRTADDR,Start Address"
|
|
bitfld.long 0x4 8. "DMNC,Disable Master Number Comparison" "0: The master number is included in the system bus..,1: The master number is not included in the system.."
|
|
newline
|
|
hexmask.long.byte 0x4 0.--5. 1. "MNUM,Master Number"
|
|
line.long 0x8 "MDPC_ENDAR,MDPC End Address Register"
|
|
hexmask.long.tbyte 0x8 10.--31. 1. "ENDADDR,End Address"
|
|
bitfld.long 0x8 0. "VLD,Valid" "0: Memory region is invalid,1: Memory region is valid"
|
|
repeat 32. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0xF00)++0x3
|
|
line.long 0x0 "MDPC_COLP$1,MDPC Column Parity Register"
|
|
hexmask.long 0x0 0.--31. 1. "EPAR,Even Parity"
|
|
repeat.end
|
|
repeat 32. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0xF80)++0x3
|
|
line.long 0x0 "MDPC_ROWP$1,MDPC Row Parity Register"
|
|
hexmask.long 0x0 0.--31. 1. "EPAR,Even Parity"
|
|
repeat.end
|
|
tree.end
|
|
tree "PCIe (PCI Express)"
|
|
base ad:0x0
|
|
tree "PCIE_EP"
|
|
base ad:0x72FFC000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "DeviceID,Device ID and Vendor ID Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "Vendor_ID,Vendor ID-16C3"
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "Command,Command and Status Register"
|
|
bitfld.long 0x0 31. "Signaled_System_Error,Set whenever a device sends a ERR_FATAL or ERR_NONFATAL message and the SERR enable bit in the command register is set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 30. "Detected_Parity_Error,Set whenever a device receives a poisoned TLP regardless of the state of bit 6 in the command register" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "Received_Master_Abort,Set whenever a requestor receives a completion with unsupported request completion status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "Received_Target_Abort,Set whenever a device receives a completion with completer abort completion status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "Signaled_Target_Abort,Set whenever a device completes a request using completer abort completion status" "0,1"
|
|
newline
|
|
rbitfld.long 0x0 25.--26. "DEVSEL_Timing,DEVSEL Timing Does not apply to PCI Express. Hardwired to 00." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 24. "Master_Data_Parity_Error,Master Data Parity Error" "0,1"
|
|
newline
|
|
rbitfld.long 0x0 23. "Fast_Back_to_Back_Capable,Fast Back-to-Back Capable Does not apply to PCI Express. Hardwired to 00." "0,1"
|
|
newline
|
|
rbitfld.long 0x0 21. "SixtySix_MHz_Capable,66 MHz Capable Does not apply to PCI Express. Hardwired to 00." "0,1"
|
|
newline
|
|
rbitfld.long 0x0 20. "Capabilities_List,Capabilities List Indicates presence of an extended capability item. Hardwired to 1." "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "INTx_Status,INTx Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "INTx_Assertion_Disable,INTx Assertion Disable" "0,1"
|
|
newline
|
|
rbitfld.long 0x0 9. "Fast_Back_to_Back_Enable,Fast Back-to-Back Enable Does not apply to PCI Express. Hardwired to 00" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "SERR_Enable,Controls the reporting of fatal and non-fatal errors detected by the device to the root complex" "0,1"
|
|
newline
|
|
rbitfld.long 0x0 7. "IDSEL_Stepping,IDSEL Stepping/Wait Cycle Control Does not apply to PCI Express. Hardwired to 00." "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "Parity_Error_Response,Controls whether this PCI Express controller responds to parity errors" "0,1"
|
|
newline
|
|
rbitfld.long 0x0 5. "VGA_Palette_Snoop,VGA Palette Snoop Does not apply to PCI Express. Hardwired to 00." "0,1"
|
|
newline
|
|
rbitfld.long 0x0 4. "Memory_Write_and_Invalidate,Memory Write and Invalidate Does not apply to PCI Express. Hardwired to 00." "0,1"
|
|
newline
|
|
rbitfld.long 0x0 3. "Special_Cycle_Enable,Special Cycle Enable Does not apply to PCI Express. Hardwired to 00." "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "Bus_Master_Enable,Bus Master Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "Memory_Space_Enable,Memory Space Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "I_O_Space_Enable,I/O Space Enable" "0,1"
|
|
rgroup.byte 0x8++0x0
|
|
line.byte 0x0 "Revision_ID,PCI Express Revision ID Register"
|
|
hexmask.byte 0x0 0.--7. 1. "Revision_ID,Revision specific."
|
|
group.long 0xC++0x7
|
|
line.long 0x0 "BIST,BIST Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "Not_supported_by_core,The BIST register functions are not supported by the core"
|
|
newline
|
|
bitfld.long 0x0 23. "Multi_Function_Device,Multi Function Device The default value is 0 for a single function device (CX_NFUNC = 1) or 1 for a multi-function device (CX_NFUNC != 1)" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--22. 1. "Configuration_Header_Format,Configuration Header Format Hardwired to 0 for type 0."
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "Master_Latency_Timer,Master Latency Timer Not applicable for PCI Express hardwired to 0."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "Cache_Line_Size,Cache Line Size The Cache Line Size register is RW for legacy compatibility purposes and is not applicable to PCI Express device functionality"
|
|
line.long 0x4 "BAR0,Base Address 0"
|
|
hexmask.long 0x4 4.--31. 1. "ADDRESS,BAR 0 base address bits (for a 64-bit BAR the remaining upper address bits are in BAR 1)"
|
|
newline
|
|
rbitfld.long 0x4 3. "PREF,If BAR 0 is an I/O BAR bit 3 is the second least significant bit of the base address" "0: = Non-prefetchable,1: = Prefetchable"
|
|
newline
|
|
bitfld.long 0x4 1.--2. "TYPE,If BAR 0 is an I/O BAR bit 2 the least significant bit of the base address and bit 1 is 0" "0: = 32-bit BAR,?,2: = 64-bit BAR,?"
|
|
newline
|
|
rbitfld.long 0x4 0. "Mem_I_O,Bits [3:0] are writable internally but not externally." "0: = BAR 0 is a memory BAR,1: = BAR 0 is an I/O BAR"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "BAR1,Base Address 1"
|
|
hexmask.long 0x0 0.--31. 1. "ADDRESS,BAR 1 contains the upper 32 bits of the BAR 0 base address (bits [63:32])."
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "BAR2,Base Address 2"
|
|
hexmask.long 0x0 4.--31. 1. "ADDRESS,BAR 2 base address bits (for a 64-bit BAR the remaining upper address bits are in BAR 3)"
|
|
newline
|
|
rbitfld.long 0x0 3. "PREF,If BAR 2 is an I/O BAR bit 3 is the second least significant bit of the base address" "0: = Non-prefetchable,1: = Prefetchable"
|
|
newline
|
|
bitfld.long 0x0 1.--2. "TYPE,If BAR 2 is an I/O BAR bit 2 the least significant bit of the base address and bit 1 is 0" "0: = 32-bit BAR,?,2: = 64-bit BAR,?"
|
|
newline
|
|
rbitfld.long 0x0 0. "MEM_I_O,Bits [3:0] are writable internally but not externally." "0: = BAR 2 is a memory BAR,1: = BAR 2 is an I/O BAR"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "BAR3,Base Address 3"
|
|
hexmask.long 0x0 0.--31. 1. "ADDRESS,BAR 3 bit definitions are the same as the BAR 2 bit definitions."
|
|
rgroup.long 0x28++0x7
|
|
line.long 0x0 "CISP,CardBus CIS Pointer Register"
|
|
hexmask.long 0x0 0.--31. 1. "CARDBUS_CIS_PTR_N,CardBus CIS Pointer Optional writable internally but not externally."
|
|
line.long 0x4 "SSID,Subsystem ID and Subsystem Vendor ID Register"
|
|
hexmask.long.word 0x4 16.--31. 1. "SUBSYS_DEV_ID_N,Subsystem ID Writable internally but not externally."
|
|
newline
|
|
hexmask.long.word 0x4 0.--15. 1. "SUBSYS_VENDOR_ID_N,Subsystem Vendor ID Writable internally but not externally."
|
|
group.long 0x30++0x3
|
|
line.long 0x0 "EROMBAR,Expansion ROM Base Address Register"
|
|
hexmask.long.tbyte 0x0 11.--31. 1. "ADDRESS,Expansion ROM Address"
|
|
newline
|
|
bitfld.long 0x0 0. "ENABLE,Expansion ROM Enable" "0,1"
|
|
rgroup.long 0x34++0x3
|
|
line.long 0x0 "CAPPR,Capability Pointer Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "CFG_NEXT_PTR,First Capability Pointer"
|
|
group.long 0x3C++0x3
|
|
line.long 0x0 "ILR,Interrupt Line and Pin Register"
|
|
hexmask.long.byte 0x0 8.--15. 1. "INT_PIN_MAPPING_N,Interrupt Pin Identifies the legacy interrupt Message that the device (or device function) uses"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "INTERRUPT_LINE,Interrupt Line Value in this register is system architecture specific"
|
|
rgroup.byte 0x40++0x0
|
|
line.byte 0x0 "PMCIDR,Power Management Capability ID Register"
|
|
hexmask.byte 0x0 0.--7. 1. "Power_Mgmt_Capability_ID,Power Management = 0x01"
|
|
rgroup.word 0x42++0x1
|
|
line.word 0x0 "PMCR,Power Management Capabilities Register"
|
|
hexmask.word.byte 0x0 11.--15. 1. "PME_Support,Indicates the power states that this device supports"
|
|
newline
|
|
bitfld.word 0x0 10. "D2,D2 Support" "0,1"
|
|
newline
|
|
bitfld.word 0x0 9. "D1,D1 Support" "0,1"
|
|
newline
|
|
bitfld.word 0x0 6.--8. "AUX_Curr,AUX Current" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.word 0x0 5. "DSI,Device Specific Initialization" "0,1"
|
|
newline
|
|
bitfld.word 0x0 3. "PME_CLK,Does not apply to PCI Express." "0,1"
|
|
newline
|
|
bitfld.word 0x0 0.--2. "Version,Set to 0x2 for this version of the specification." "0,1,2,3,4,5,6,7"
|
|
group.word 0x44++0x1
|
|
line.word 0x0 "PMSCR,Power Management Status and Control Register"
|
|
bitfld.word 0x0 15. "PME_STAT,PME Status" "0,1"
|
|
newline
|
|
bitfld.word 0x0 13.--14. "Data_Scale,Obtained directly from the PCI Express base specification." "0,1,2,3"
|
|
newline
|
|
hexmask.word.byte 0x0 9.--12. 1. "Data_Select,Obtained directly from the PCI Express base specification."
|
|
newline
|
|
bitfld.word 0x0 8. "PME_EN,PME Enable Bitfield access is sticky." "0,1"
|
|
newline
|
|
bitfld.word 0x0 0.--1. "Power_State,Power state. Indicates the current power state of the function." "0: D0,1: D1,2: D2,3: D3"
|
|
rgroup.byte 0x50++0x0
|
|
line.byte 0x0 "MSI_MCIDR,PCI Express MSI Message Capability ID Register"
|
|
hexmask.byte 0x0 0.--7. 1. "MSI_Message_Capability_ID,MSI Message = 0x05"
|
|
group.word 0x52++0x1
|
|
line.word 0x0 "MSI_MCR,PCI Express MSI Message Control Register"
|
|
rbitfld.word 0x0 7. "AC64,64-bit address capable." "0,1"
|
|
newline
|
|
bitfld.word 0x0 4.--6. "MME,Multiple message enable." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
rbitfld.word 0x0 1.--3. "MMC,Multiple message capable." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.word 0x0 0. "MSIE,MSI enable." "0,1"
|
|
group.long 0x54++0x7
|
|
line.long 0x0 "MSI_MADDR,PCI Express MSI Message Address Register"
|
|
hexmask.long 0x0 2.--31. 1. "Message_Address,System-specified message address"
|
|
line.long 0x4 "MSI_MUADDR,PCI Express MSI Message Upper Address Register"
|
|
hexmask.long 0x4 0.--31. 1. "Message_Upper_Address,System-specified message upper address"
|
|
group.word 0x5C++0x1
|
|
line.word 0x0 "MSI_MDATR,PCI Express MSI Message Data Register"
|
|
hexmask.word 0x0 0.--15. 1. "Message_Data,System-specified message."
|
|
rgroup.byte 0x70++0x0
|
|
line.byte 0x0 "CIDR,Capability ID Register"
|
|
hexmask.byte 0x0 0.--7. 1. "PCI_Express_Capability_ID,PCI Express = 0x10"
|
|
rgroup.word 0x72++0x1
|
|
line.word 0x0 "CR,PCI Express Capabilities Register"
|
|
hexmask.word.byte 0x0 9.--13. 1. "Interrupt_Message_Number,If this function is allocated more than one MSI interrupt number then this register is required to contain the offset between the base Message Data and the MSI Message that is generated when any of the status bits in either the.."
|
|
newline
|
|
bitfld.word 0x0 8. "Slot,Slot Implemented (RC mode only)" "0,1"
|
|
newline
|
|
hexmask.word.byte 0x0 4.--7. 1. "Device_Port_Type,Device Port Type"
|
|
newline
|
|
hexmask.word.byte 0x0 0.--3. 1. "Capability_Version,Indicates the defined PCI Express capability structure version number."
|
|
rgroup.long 0x74++0x3
|
|
line.long 0x0 "DCR,PCI Express Device Capabilities Register"
|
|
bitfld.long 0x0 28. "FLRC,Functional level reset capability" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26.--27. "CSPLS,Captured Slot Power Limit Scale" "0,1,2,3"
|
|
newline
|
|
hexmask.long.byte 0x0 18.--25. 1. "CSPLV,Captured Slot Power Limit Value For RC mode the reset value for this field is 00h; for EP mode the value is determined by received Set_Slot_Power_Limit messages"
|
|
newline
|
|
bitfld.long 0x0 15. "RBER,Role based error reporting" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "PIP,Power Indicator Present" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "AIP,Attention Indicator Present" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "ABP,Attention Button Present" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9.--11. "EP_L1_LAT,Endpoint L1 Acceptable Latency" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 6.--8. "EP_L0s_LAT,Endpoint L0s Acceptable Latency" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 5. "ET,Extended Tag Field Supported" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3.--4. "PHAN_FCT,Phantom Functions Supported" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "MAX_PL_SIZE_SUP,Maximum payload size supported. 001 = 256-bytes" "?,1: 256-bytes,?,?,?,?,?,?"
|
|
group.word 0x78++0x3
|
|
line.word 0x0 "DCTRLR,PCI Express Device Control Register"
|
|
bitfld.word 0x0 15. "IFLR,Initiate functional level reset." "0,1"
|
|
newline
|
|
bitfld.word 0x0 12.--14. "MAX_READ_SIZE,Maximum read request size" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
rbitfld.word 0x0 11. "NSE,No snoop enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 10. "APE,AUX power PM enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 9. "PFE,Phantom functions enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "ETE,Extended tag field enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 5.--7. "MAX_PAYLOAD_SIZE,Maximum payload size" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.word 0x0 4. "RO,Relaxed ordering" "0,1"
|
|
newline
|
|
bitfld.word 0x0 3. "URR,Unsupported request reporting" "0,1"
|
|
newline
|
|
bitfld.word 0x0 2. "FER,Fatal error reporting" "0,1"
|
|
newline
|
|
bitfld.word 0x0 1. "NFER,Non-fatal error reporting" "0,1"
|
|
newline
|
|
bitfld.word 0x0 0. "CER,Correctable error reporting" "0,1"
|
|
line.word 0x2 "DSR,PCI Express Device Status Register"
|
|
rbitfld.word 0x2 5. "TP,Transactions pending" "0,1"
|
|
newline
|
|
rbitfld.word 0x2 4. "APD,AUX power detected." "0,1"
|
|
newline
|
|
bitfld.word 0x2 3. "URD,Unsupported request detected" "0,1"
|
|
newline
|
|
bitfld.word 0x2 2. "FED,Fatal error detected" "0,1"
|
|
newline
|
|
bitfld.word 0x2 1. "NFED,Non-fatal error detected" "0,1"
|
|
newline
|
|
bitfld.word 0x2 0. "CED,Correctable error detected" "0,1"
|
|
rgroup.long 0x7C++0x3
|
|
line.long 0x0 "LCR,PCI Express Link Capabilities Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "Port_Number,-"
|
|
newline
|
|
bitfld.long 0x0 22. "AOC,ASPM Optionality Compliance Software is permitted to use the value of this bit to help determine whether to enable ASPM or whether to run ASPM compliance tests" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "LBWN,Link bandwidth notification capable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20. "DLLARC,Data link layer active reporting capable Set to 1 when in RC. Set to 0 when in EP." "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "CPM,Clock power management" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15.--17. "L1_EX_LAT,L1 exit latency" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 12.--14. "L0s_EX_LAT,L0s exit latency" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 10.--11. "ASPM,Active state power management (ASPM) Support" "0,1,2,3"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--9. 1. "MAX_LINK_W,Maximum link width"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "MAX_LINK_SP,Maximum link speed"
|
|
group.word 0x80++0x1
|
|
line.word 0x0 "CTRLR,PCI Express Link Control Register"
|
|
rbitfld.word 0x0 11. "LABIE,Link autonomous bandwidth interrupt enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 10. "LBMIE,Link bandwidth management interrupt enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "ECPM,Enable clock power management." "0,1"
|
|
newline
|
|
bitfld.word 0x0 7. "EXT_SYNC,Extended synch" "0,1"
|
|
newline
|
|
bitfld.word 0x0 6. "CCC,Common clock configuration" "0,1"
|
|
newline
|
|
bitfld.word 0x0 5. "RL,Retrain link (Reserved for EP devices)" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "LD,Link disable (Reserved for EP devices)" "0,1"
|
|
newline
|
|
bitfld.word 0x0 3. "RCB,Read completion boundary" "0,1"
|
|
newline
|
|
bitfld.word 0x0 0.--1. "ASPM_CTL,Active state power management (ASPM) control" "0,1,2,3"
|
|
rgroup.word 0x82++0x1
|
|
line.word 0x0 "SR,PCI Express Link Status Register"
|
|
bitfld.word 0x0 15. "LABS,Link autonomous bandwidth status. This bit is write-1-clear in RC mode; it is read-only in EP mode" "0,1"
|
|
newline
|
|
bitfld.word 0x0 14. "LBMS,Link bandwidth management status. This bit is write-1-clear in RC mode; it is read-only in EP mode" "0,1"
|
|
newline
|
|
bitfld.word 0x0 12. "SCC,Slot clock configuration" "0,1"
|
|
newline
|
|
bitfld.word 0x0 11. "LT,Link training" "0,1"
|
|
newline
|
|
hexmask.word.byte 0x0 4.--9. 1. "NEG_LINK_W,Negotiated link width"
|
|
newline
|
|
hexmask.word.byte 0x0 0.--3. 1. "LINK_SP,Negotiated link speed."
|
|
rgroup.long 0x84++0x3
|
|
line.long 0x0 "SCR,PCI Express Slot Capabilities Register"
|
|
hexmask.long.word 0x0 19.--31. 1. "Physical_Slot_Number,This hardware initialized field indicates the physical slot number attached to this Port"
|
|
newline
|
|
bitfld.long 0x0 15.--16. "SPLS,Slot power limit scale." "0,1,2,3"
|
|
newline
|
|
hexmask.long.byte 0x0 7.--14. 1. "SPLV,Slot power limit value."
|
|
newline
|
|
bitfld.long 0x0 6. "HPD,Hot plug capable." "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "HPS,Hot plug surprise." "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "PIP,Power indicator present." "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "AIP,Attention indicator present." "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "MRLSP,MRL sensor present." "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "PCP,Power controller present." "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "ABP,Attention button present." "0,1"
|
|
group.word 0x88++0x5
|
|
line.word 0x0 "SCTRLR,PCI Express Slot Control Register"
|
|
bitfld.word 0x0 10. "PCC,Power controller control." "0,1"
|
|
newline
|
|
bitfld.word 0x0 8.--9. "PIC,Power indicator control" "?,1: On,2: Blink,3: Off"
|
|
newline
|
|
bitfld.word 0x0 6.--7. "AIC,Attention indicator control" "?,1: On,2: Blink,3: Off"
|
|
newline
|
|
bitfld.word 0x0 5. "HPIE,Hot plug interrupt enable." "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "CCIE,Command completed interrupt enable." "0,1"
|
|
newline
|
|
bitfld.word 0x0 3. "PDCE,Presence detect changed enable." "0,1"
|
|
newline
|
|
bitfld.word 0x0 2. "MRLSCE,MRL sensor changed enable." "0,1"
|
|
newline
|
|
bitfld.word 0x0 1. "PFDE,Power fault detected enable." "0,1"
|
|
newline
|
|
bitfld.word 0x0 0. "ABPE,Attention button pressed enable." "0,1"
|
|
line.word 0x2 "SSR,PCI Express Slot Status Register"
|
|
rbitfld.word 0x2 6. "PDS,This bit indicates the presence of an adapter in the slot reflected by the logical OR of the Physical Layer in-band presence detect mechanism and if present any out-of-band presence detect mechanism defined for the slot's corresponding form factor" "0: Slot Empty,1: Card Present in slot"
|
|
newline
|
|
rbitfld.word 0x2 5. "MRLSS,MRL sensor state." "0: MRL closed,1: MRL open"
|
|
newline
|
|
bitfld.word 0x2 4. "CC,Command completed." "0,1"
|
|
newline
|
|
bitfld.word 0x2 3. "PDC,Presence detect changed." "0,1"
|
|
newline
|
|
bitfld.word 0x2 2. "MRLSC,MRL sensor changed." "0,1"
|
|
newline
|
|
bitfld.word 0x2 1. "PFD,Power fault detected." "0,1"
|
|
newline
|
|
bitfld.word 0x2 0. "ABP,Attention button pressed." "0,1"
|
|
line.word 0x4 "RCR,Root Control Register"
|
|
bitfld.word 0x4 3. "PMEIE,PME interrupt enable." "0,1"
|
|
newline
|
|
bitfld.word 0x4 2. "SEFEE,System error on fatal error enable." "0,1"
|
|
newline
|
|
bitfld.word 0x4 1. "SENFEE,System error on non-fatal error enable." "0,1"
|
|
newline
|
|
bitfld.word 0x4 0. "SECEE,System error on correctable error enable." "0,1"
|
|
group.long 0x90++0x3
|
|
line.long 0x0 "RSR,PCI Express Root Status Register"
|
|
bitfld.long 0x0 17. "PMEP,PME pending." "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "PMES,PME status." "0,1"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "PME_requester_ID,PME requester ID."
|
|
rgroup.long 0x94++0x3
|
|
line.long 0x0 "DC_2,PCI Express Device Capabilities 2 Register"
|
|
bitfld.long 0x0 4. "CPL_TO_DS,Completion timeout disable supported" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "CPL_TO_RS,Completion timeout ranges supported"
|
|
group.word 0x98++0x1
|
|
line.word 0x0 "DCTR_2,PCI Express Device Control 2 Register"
|
|
rbitfld.word 0x0 5. "ARIFE,ARI Forwarding Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "CPL_TOD,Completion timeout disable" "0,1"
|
|
newline
|
|
hexmask.word.byte 0x0 0.--3. 1. "CPL_TO_VAL,Completion timeout value"
|
|
rgroup.long 0x9C++0x3
|
|
line.long 0x0 "LC_2,PCI Express Link Capabilities 2 Register"
|
|
hexmask.long.byte 0x0 1.--6. 1. "Support_Link_Speed_Vector,This field indicates the supported Link speed(s) of the associated Port"
|
|
group.word 0xA0++0x1
|
|
line.word 0x0 "LCTR_2,PCI Express Link Control 2 Register"
|
|
hexmask.word.byte 0x0 12.--15. 1. "CDE,Compliance de-emphasis"
|
|
newline
|
|
bitfld.word 0x0 11. "CSOS,Compliance SOS" "0,1"
|
|
newline
|
|
bitfld.word 0x0 10. "EMC,Enter modified compliance" "0,1"
|
|
newline
|
|
bitfld.word 0x0 7.--9. "TxM,Transmit margin" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.word 0x0 6. "SDE,Selectable de-emphasis" "0,1"
|
|
newline
|
|
bitfld.word 0x0 5. "HWASD,Hardware autonomous speed disable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "EC,Enter compliance" "0,1"
|
|
newline
|
|
hexmask.word.byte 0x0 0.--3. 1. "T_LS,Target link speed"
|
|
rgroup.word 0xA2++0x1
|
|
line.word 0x0 "LS_2,PCI Express Link Status 2 Register"
|
|
bitfld.word 0x0 5. "LER,Link equalization request" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "EP3S,Equalization phase 3 complete" "0,1"
|
|
newline
|
|
bitfld.word 0x0 3. "EP2S,Equalization phase 2 complete" "0,1"
|
|
newline
|
|
bitfld.word 0x0 2. "EP1S,Equalization phase 1 complete" "0,1"
|
|
newline
|
|
bitfld.word 0x0 1. "EC,Equalization complete" "0,1"
|
|
newline
|
|
bitfld.word 0x0 0. "DE_LVL,Current de-emphasis level" "0,1"
|
|
group.long 0x100++0x1B
|
|
line.long 0x0 "AER,AER Capability Header"
|
|
hexmask.long.word 0x0 20.--31. 1. "Next_Capability_Offset,Next Capability Offset"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--19. 1. "Capability_Version,Capability Version"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "PCI_Express_Extended_Capability_ID,PCI Express Extended Capability ID Value is 0x1 for Advanced Error Reporting."
|
|
line.long 0x4 "UESR,Uncorrectable Error Status Register"
|
|
bitfld.long 0x4 20. "Unsupported_Request_Error_Status,Unsupported Request Error Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "ECRC_Error_Status,ECRC Error Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "Malformed_TLP_Status,Malformed TLP Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "Receiver_Overflow_Status,Receiver Overflow Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "Unexpected_Completion_Status,Unexpected Completion Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "Completer_Abort_Status,Completer Abort Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 14. "Completion_Timeout_Status,Completion Timeout Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "Flow_Control_Protocol_Error_Status,Flow Control Protocol Error Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "Poisoned_TLP_Status,Poisoned TLP Status" "0,1"
|
|
newline
|
|
rbitfld.long 0x4 5. "Surprise_Down_Error_Status_,Surprise Down Error Status (not supported)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "Data_Link_Protocol_Error_Status,Data Link Protocol Error Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "Undefined,Undefined for PCI Express 1.1 (Was Training Error Status for PCI Express 1.0a)" "0,1"
|
|
line.long 0x8 "UEMR,Uncorrectable Error Mask Register"
|
|
bitfld.long 0x8 20. "Unsupported_Request_Error_Mask,Unsupported Request Error Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x8 19. "ECRC_Error_Mask,ECRC Error Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x8 18. "Malformed_TLP_Mask,Malformed TLP Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x8 17. "Receiver_Overflow_Mask,Receiver Overflow Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x8 16. "Unexpected_Completion_Mask,Unexpected Completion Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x8 15. "Completer_Abort_Mask,Completer Abort Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x8 14. "Completion_Timeout_Mask,Completion Timeout Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x8 13. "Flow_Control_Protocol_Error_Mask,Flow Control Protocol Error Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x8 12. "Poisoned_TLP_Mask,Poisoned TLP Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x8 5. "Surprise_Down_Error_Mask,Surprise Down Error Mask (not supported)" "0,1"
|
|
newline
|
|
bitfld.long 0x8 4. "Data_Link_Protocol_Error_Mask,Data Link Protocol Error Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0. "Undefined,Undefined for PCI Express 1.1 (Was Training Error Mask for PCI Express 1.0a)" "0,1"
|
|
line.long 0xC "UESevR,Uncorrectable Error Severity Register"
|
|
bitfld.long 0xC 20. "Unsupported_Request_Error_Severity,Unsupported Request Error Severity" "0,1"
|
|
newline
|
|
bitfld.long 0xC 19. "ECRC_Error_Severity,ECRC Error Severity" "0,1"
|
|
newline
|
|
bitfld.long 0xC 18. "Malformed_TLP_Severity,Malformed TLP Severity" "0,1"
|
|
newline
|
|
bitfld.long 0xC 17. "Receiver_Overflow_Severity,Receiver Overflow Severity" "0,1"
|
|
newline
|
|
bitfld.long 0xC 16. "Unexpected_Completion_Severity,Unexpected Completion Severity" "0,1"
|
|
newline
|
|
bitfld.long 0xC 15. "Completer_Abort_Severity,Completer Abort Severity" "0,1"
|
|
newline
|
|
bitfld.long 0xC 14. "Completion_Timeout_Severity,Completion Timeout Severity" "0,1"
|
|
newline
|
|
bitfld.long 0xC 13. "Flow_Control_Protocol_Error_Severity,Flow Control Protocol Error Severity" "0,1"
|
|
newline
|
|
bitfld.long 0xC 12. "Poisoned_TLP_Severity,Poisoned TLP Severity" "0,1"
|
|
newline
|
|
bitfld.long 0xC 5. "Surprise_Down_Error_Severity,Surprise Down Error Severity (not supported)" "0,1"
|
|
newline
|
|
bitfld.long 0xC 4. "Data_Link_Protocol_Error_Severity,Data Link Protocol Error Severity" "0,1"
|
|
newline
|
|
bitfld.long 0xC 0. "Undefined,Undefined for PCI Express 1.1 (Was Training Error Severity for PCI Express 1.0a)" "0,1"
|
|
line.long 0x10 "CESR,Correctable Error Status Register"
|
|
bitfld.long 0x10 13. "Advisory_Non_Fatal_Error_Status,Advisory Non-Fatal Error Status" "0,1"
|
|
newline
|
|
bitfld.long 0x10 12. "Reply_Timer_Timeout_Status,Reply Timer Timeout Status" "0,1"
|
|
newline
|
|
bitfld.long 0x10 8. "REPLAY_NUM_Rollover_Status,REPLAY_NUM Rollover Status" "0,1"
|
|
newline
|
|
bitfld.long 0x10 7. "Bad_DLLP_Status,Bad DLLP Status" "0,1"
|
|
newline
|
|
bitfld.long 0x10 6. "Bad_TLP_Status,Bad TLP Status" "0,1"
|
|
newline
|
|
bitfld.long 0x10 0. "Receiver_Error_Status,Receiver Error Status" "0,1"
|
|
line.long 0x14 "CEMR,Correctable Error Mask Register"
|
|
bitfld.long 0x14 13. "Advisory_Non_Fatal_Error_Mask,Advisory Non-Fatal Error Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x14 12. "Reply_Timer_Timeout_Mask,Reply Timer Timeout Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x14 8. "REPLAY_NUM_Rollover_Mask,REPLAY_NUM Rollover Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x14 7. "Bad_DLLP_Mask,Bad DLLP Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x14 6. "Bad_TLP_Mask,Bad TLP Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x14 0. "Receiver_Error_Mask,Receiver Error Mask" "0,1"
|
|
line.long 0x18 "ACCR,Advanced Capabilities and Control Register"
|
|
bitfld.long 0x18 8. "ECRC_Check_Enable,ECRC Check Enable" "0,1"
|
|
newline
|
|
rbitfld.long 0x18 7. "ECRC_Check_Capable,ECRC Check Capable" "0,1"
|
|
newline
|
|
bitfld.long 0x18 6. "ECRC_Generation_Enable,ECRC Generation Enable" "0,1"
|
|
newline
|
|
rbitfld.long 0x18 5. "ECRC_Generation_Capability,ECRC Generation Capability" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x18 0.--4. 1. "First_Error_Pointer,First Error Pointer"
|
|
rgroup.long 0x11C++0xF
|
|
line.long 0x0 "Header_Log_Register_DWORD1,PCI Express Header Log Register 1"
|
|
hexmask.long.byte 0x0 24.--31. 1. "Byte_0,Byte n of the TLP header associated with the error."
|
|
newline
|
|
hexmask.long.byte 0x0 16.--23. 1. "Byte_1,Byte n of the TLP header associated with the error."
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "Byte_2,Byte n of the TLP header associated with the error."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "Byte_3,Byte n of the TLP header associated with the error."
|
|
line.long 0x4 "Header_Log_Register_DWORD2,PCI Express Header Log Register 2"
|
|
hexmask.long.byte 0x4 24.--31. 1. "Byte_4,Byte n of the TLP header associated with the error."
|
|
newline
|
|
hexmask.long.byte 0x4 16.--23. 1. "Byte_5,Byte n of the TLP header associated with the error."
|
|
newline
|
|
hexmask.long.byte 0x4 8.--15. 1. "Byte_6,Byte n of the TLP header associated with the error."
|
|
newline
|
|
hexmask.long.byte 0x4 0.--7. 1. "Byte_7,Byte n of the TLP header associated with the error."
|
|
line.long 0x8 "Header_Log_Register_DWORD3,PCI Express Header Log Register 3"
|
|
hexmask.long.byte 0x8 24.--31. 1. "Byte_8,Byte n of the TLP header associated with the error."
|
|
newline
|
|
hexmask.long.byte 0x8 16.--23. 1. "Byte_9,Byte n of the TLP header associated with the error."
|
|
newline
|
|
hexmask.long.byte 0x8 8.--15. 1. "Byte_A,Byte n of the TLP header associated with the error."
|
|
newline
|
|
hexmask.long.byte 0x8 0.--7. 1. "Byte_B,Byte n of the TLP header associated with the error."
|
|
line.long 0xC "Header_Log_Register_DWORD4,PCI Express Header Log Register 4"
|
|
hexmask.long.byte 0xC 24.--31. 1. "Byte_C,Byte n of the TLP header associated with the error."
|
|
newline
|
|
hexmask.long.byte 0xC 16.--23. 1. "Byte_D,Byte n of the TLP header associated with the error."
|
|
newline
|
|
hexmask.long.byte 0xC 8.--15. 1. "Byte_E,Byte n of the TLP header associated with the error."
|
|
newline
|
|
hexmask.long.byte 0xC 0.--7. 1. "Byte_F,Byte n of the TLP header associated with the error."
|
|
wgroup.long 0x1010++0x3
|
|
line.long 0x0 "MASK0,BAR 0 Mask Register"
|
|
hexmask.long 0x0 1.--31. 1. "MASK,Indicates which BAR 0 bits to mask (make non- writable) from host software which in turn determines the size of the BAR"
|
|
newline
|
|
bitfld.long 0x0 0. "ENABLE,Bit 0 is interpreted as BAR Enable when writing to the BAR Mask register rather than as a mask bit because bit 0 of a BAR is always masked from writing by host software" "0: BAR 0 is disabled,1: BAR 0 is enabled"
|
|
rgroup.long 0x1014++0x3
|
|
line.long 0x0 "MASK1,BAR 1 Mask Register"
|
|
hexmask.long 0x0 0.--31. 1. "MASK,Bits [31:1]: BAR 1 Mask value interpreted the same way as BAR 0 Mask"
|
|
wgroup.long 0x1018++0x7
|
|
line.long 0x0 "MASK2,BAR 2 Mask Register"
|
|
hexmask.long 0x0 1.--31. 1. "BAR2_MASK_N,Indicates which BAR 2 bits to mask (make non- writable) from host software which in turn determines the size of the BAR"
|
|
newline
|
|
bitfld.long 0x0 0. "BAR2_ENABLED_N,Bit 0 is interpreted as BAR Enable when writing to the BAR Mask register rather than as a mask bit because bit 0 of a BAR is always masked from writing by host software" "0: BAR 2 is disabled,1: BAR 2 is enabled"
|
|
line.long 0x4 "MASK3,BAR 3 Mask Register"
|
|
hexmask.long 0x4 0.--31. 1. "MASK,Bits [31:1]: BAR 3 Mask value interpreted the same way as BAR 2 Mask"
|
|
wgroup.long 0x1030++0x3
|
|
line.long 0x0 "EROMMASK,Expansion ROM BAR Mask Register"
|
|
hexmask.long 0x0 1.--31. 1. "ROM_MASK_N,Indicates which Expansion ROM BAR bits to mask (make non-writable) from host software which in turn determines the size of the BAR"
|
|
newline
|
|
bitfld.long 0x0 0. "ROM_BAR_ENABLED_N,Expansion ROM BAR Enable" "0: Expansion ROM BAR is disabled,1: Expansion ROM BAR is enabled"
|
|
tree.end
|
|
tree "PCIE_PL"
|
|
base ad:0x72FFC000
|
|
group.long 0x700++0x27
|
|
line.long 0x0 "ALTRTR,Ack Latency Timer and Replay Timer Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "Replay_Time_Limit,Replay Time Limit The replay timer expires when it reaches this limit"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "Round_Trip_Latency_Time_Limit,Round Trip Latency Time Limit The Ack/Nak latency timer expires when it reaches this limit"
|
|
line.long 0x4 "VSDR,Vendor Specific DLLP Register"
|
|
hexmask.long 0x4 0.--31. 1. "Vendor_Specific_DLLP,Vendor Specific DLLP Register Used to send a specific PCI Express DLLP"
|
|
line.long 0x8 "PFLR,Port Force Link Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. "Low_Power_Entrance_Count,Low Power Entrance Count The Power Management state will wait for this many clock cycles for the associated completion of a CfgWr to D-state register to go low-power"
|
|
newline
|
|
hexmask.long.byte 0x8 16.--21. 1. "Link_State,Link State The Link state that the core will be forced to when bit 15 (Force Link) is set"
|
|
newline
|
|
bitfld.long 0x8 15. "Force_Link,Force Link Forces the Link to the state specified by the Link State field" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x8 0.--7. 1. "Link_Number,Link Number Not used for Endpoint"
|
|
line.long 0xC "AFLACR,Ack Frequency and L0-L1 ASPM Control Register"
|
|
bitfld.long 0xC 30. "Enter_ASPM_L1,Enter ASPM L1 without receive in L0s" "0,1"
|
|
newline
|
|
bitfld.long 0xC 27.--29. "L1_Entrance_Latency,L1 Entrance Latency Values correspond to:" "0: 1 us,1: 2 us,2: 4 us,3: 8 us,4: 16 us,5: 32 us,6: 64 us,7: 64 us"
|
|
newline
|
|
bitfld.long 0xC 24.--26. "L0s_Entrance_Latency,L0s Entrance Latency Values correspond to:" "0: 1 us,1: 2 us,2: 3 us,3: 4 us,4: 5 us,5: 6 us,6: 7 us,7: 7 us"
|
|
newline
|
|
hexmask.long.byte 0xC 16.--23. 1. "Common_Clock_N_FTS,Common Clock N_FTS This is the N_FTS when common clock is used"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--15. 1. "N_FTS,N_FTS The number of Fast Training Sequence ordered sets to be transmitted when transitioning from L0s to L0"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--7. 1. "Ack_Frequency,Ack Frequency The core accumulates the number of pending Ack's specified here (up to 255) before sending an Ack DLLP see Link Layer: (Flow Control and ACK/NAK DLLPs) for more details"
|
|
line.long 0x10 "PLCR,Port Link Control Register"
|
|
rbitfld.long 0x10 23. "Crosslink_Active,Crosslink Active" "0,1"
|
|
newline
|
|
bitfld.long 0x10 22. "Crosslink_Enable,Crosslink Enable" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x10 16.--21. 1. "Link_Mode_Enable,Link Mode Enable The default value is the number of Lanes supported"
|
|
newline
|
|
bitfld.long 0x10 7. "Fast_Link_Mode,Fast Link Mode Sets all internal timers to Fast Mode for speeding up simulation" "0,1"
|
|
newline
|
|
bitfld.long 0x10 5. "DLL_Link_Enable,DLL Link Enable Enables Link initialization" "0,1"
|
|
newline
|
|
bitfld.long 0x10 3. "Reset_Assert,Reset Assert Triggers a recovery and forces the LTSSM to the Hot Reset state (downstream port only)" "0,1"
|
|
newline
|
|
bitfld.long 0x10 2. "Loopback_Enable,Loopback Enable Turns on loopback." "0,1"
|
|
newline
|
|
bitfld.long 0x10 1. "Scramble_Disable,Scramble Disable Turns off data scrambling." "0,1"
|
|
newline
|
|
bitfld.long 0x10 0. "Vendor_Specific_DLLP_Request,Vendor Specific DLLP Request When software writes a '1' to this bit the core transmits the DLLP contained in the VSDRVendor Specific DLLP Register" "0,1"
|
|
line.long 0x14 "LSR,Lane Skew Register"
|
|
bitfld.long 0x14 31. "Disable_Lane_to_Lane_Deskew,Disable Lane-to-Lane Deskew Causes the core to disable the internal Lane-to-Lane deskew logic." "0,1"
|
|
newline
|
|
bitfld.long 0x14 25. "Ack_Nak_Disable,Ack/Nak Disable Prevents the core from sending Ack and Nak DLLPs." "0,1"
|
|
newline
|
|
bitfld.long 0x14 24. "Flow_Control_Disable,Flow Control Disable Prevents the core from sending FC DLLPs." "0,1"
|
|
line.long 0x18 "TIMER_CTRL_MAX_NUM,Timer Control and Max Function Number Register"
|
|
hexmask.long.byte 0x18 24.--28. 1. "UPDATE_FREQ_TIMER,This is an internally reserved field. Do not use. This register field is sticky."
|
|
newline
|
|
hexmask.long.byte 0x18 19.--23. 1. "TIMER_MOD_ACK_NAK,Ack Latency Timer Modifier"
|
|
newline
|
|
hexmask.long.byte 0x18 14.--18. 1. "TIMER_MOD_REPLAY_TIMER,Replay Timer Limit Modifier"
|
|
newline
|
|
hexmask.long.byte 0x18 0.--7. 1. "MAX_FUNC_NUM,Maximum function number that can be used in a request"
|
|
line.long 0x1C "STRFM1,Symbol Timer Register and Filter Mask Register 1"
|
|
hexmask.long.word 0x1C 16.--31. 1. "Mask_RX_SSM_Filtering_and_Error_Handling_Rules,Mask RX_SSM Filtering and Error Handling Rules: Mask 1 There are several mask bits to turn off the filtering and error handling rules In each case 0 applies the associated filtering rule and 1 masks the.."
|
|
newline
|
|
bitfld.long 0x1C 15. "Disable_FC_Watchdog_Timer,Disable FC Watchdog Timer" "0,1"
|
|
newline
|
|
hexmask.long.word 0x1C 0.--10. 1. "SKP_Interval_Value,SKP Interval Value The number of symbol times to wait between transmitting SKP ordered sets"
|
|
line.long 0x20 "STRFM2,Filter Mask Register 2"
|
|
hexmask.long 0x20 0.--31. 1. "Mask_RX_SSM_Filtering_and_Error_Handling_Rules,This field modifies the RX-SSM filtering and error handling rules."
|
|
line.long 0x24 "AMODNPSR,AMBA Multiple Outbound Decomposed NP Sub-Requests Control Register"
|
|
bitfld.long 0x24 0. "Enable_AMBA_Multiple_Outbound_Decomposed_NP_SubRequests,Enable AMBA Multiple Outbound Decomposed NP Sub- Requests" "0,1"
|
|
rgroup.long 0x728++0x17
|
|
line.long 0x0 "DEBUG0,Debug Register 0"
|
|
hexmask.long 0x0 0.--31. 1. "VALUE,The value on pepl_debug_info[31:0]."
|
|
line.long 0x4 "DEBUG1,Debug Register 1"
|
|
hexmask.long 0x4 0.--31. 1. "VALUE,The value on pepl_debug_info[63:32]."
|
|
line.long 0x8 "TPFCSR,Transmit Posted FC Credit Status Register"
|
|
hexmask.long.byte 0x8 12.--19. 1. "Transmit_Posted_Header_FC_Credits,Transmit Posted Header FC Credits The Posted Header credits advertised by the receiver at the other end of the Link updated with each UpdateFC DLLP"
|
|
newline
|
|
hexmask.long.word 0x8 0.--11. 1. "Transmit_Posted_Data_FC_Credits,Transmit Posted Data FC Credits The Posted Data credits advertised by the receiver at the other end of the Link updated with each UpdateFC DLLP"
|
|
line.long 0xC "TNFCSR,Transmit Non-Posted FC Credit Status Register"
|
|
hexmask.long.byte 0xC 12.--19. 1. "Transmit_Non_Posted_Header_FC_Credits,Transmit Non-Posted Header FC Credits The Non-Posted Header credits advertised by the receiver at the other end of the Link updated with each UpdateFC DLLP"
|
|
newline
|
|
hexmask.long.word 0xC 0.--11. 1. "Transmit_Non_Posted_Data_FC_Credits,Transmit Non-Posted Data FC Credits The Non-Posted Data credits advertised by the receiver at the other end of the Link updated with each UpdateFC DLLP"
|
|
line.long 0x10 "TCFCSR,Transmit Completion FC Credit Status Register"
|
|
hexmask.long.byte 0x10 12.--19. 1. "Transmit_Completion_Header_FC_Credits,Transmit Completion Header FC Credits The Completion Header credits advertised by the receiver at the other end of the Link updated with each UpdateFC DLLP"
|
|
newline
|
|
hexmask.long.word 0x10 0.--11. 1. "Transmit_Completion_Data_FC_Credits,Transmit Completion Data FC Credits The Completion Data credits advertised by the receiver at the other end of the Link updated with each UpdateFC DLLP"
|
|
line.long 0x14 "QSR,Queue Status Register"
|
|
bitfld.long 0x14 2. "Received_Queue_Not_Empty,Received Queue Not Empty Indicates there is data in one or more of the receive buffers." "0,1"
|
|
newline
|
|
bitfld.long 0x14 1. "Transmit_Retry_Buffer_Not_Empty,Transmit Retry Buffer Not Empty Indicates that there is data in the transmit retry buffer." "0,1"
|
|
newline
|
|
bitfld.long 0x14 0. "Received_TLP_FC_Credits_Not_Returned,Received TLP FC Credits Not Returned Indicates that the core has sent a TLP but has not yet received an UpdateFC DLLP indicating that the credits for that TLP have been restored by the receiver at the other end of the.." "0,1"
|
|
group.long 0x80C++0x3
|
|
line.long 0x0 "G2CR,Gen2 Control Register"
|
|
bitfld.long 0x0 20. "De_emphasis_level,Used to set the de-emphasis level for upstream ports." "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "Config_Tx_Compliance_Receive_Bit,Config Tx Compliance Receive Bit When set to 1 signals LTSSM to transmit TS ordered sets with the compliance receive bit assert (equal to 1)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "Config_PHY_Tx_Swing,Config PHY Tx Swing Indicates the voltage level the PHY should drive" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "Directed_Speed_Change,Directed Speed Change Indicates to the LTSSM whether or not to initiate a speed change to Gen2" "0,1"
|
|
newline
|
|
hexmask.long.word 0x0 8.--16. 1. "Predetermined_Number_of_Lanes,Predetermined Number of Lanes Used to limit the effective link width to ignore 'broken' lanes that detect a receiver"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "N_FTS,Sets the Number of Fast Training Sequences (N_FTS) that the core advertises as its N_FTS during Gen2 Link training"
|
|
rgroup.long 0x810++0x3
|
|
line.long 0x0 "PHY_STATUS,PHY Status"
|
|
hexmask.long 0x0 0.--31. 1. "PHY_Status,PHY Status Data received directly from the phy_cfg_status bus."
|
|
group.long 0x814++0x1B
|
|
line.long 0x0 "PHY_CTRL,PHY Control"
|
|
hexmask.long 0x0 0.--31. 1. "PHY_Control,PHY Control Data sent directly to the cfg_phy_control bus."
|
|
line.long 0x4 "MRCCR0,Master Response Composer Control Register 0"
|
|
hexmask.long.byte 0x4 8.--15. 1. "Remote_Max_Bridge_Tag,Remote Max Bridge Tag Specifies the maximum number (-1) of Non-Posted AMBA requests outstanding at one time issued from the bridge master"
|
|
newline
|
|
bitfld.long 0x4 0.--2. "Remote_Read_Request_Size,Remote Read Request Size Specifies the largest amount of data (bytes) that will ever be requested (via an inbound MemRd TLP) by a remote device" "0: 128,1: 256,2: 512,3: 1024,4: 2048,5: 4096 default: 128,?,?"
|
|
line.long 0x8 "MRCCR1,Master Response Composer Control Register 1"
|
|
bitfld.long 0x8 0. "Segmented_Buffer_Controller_Initialize,Segmented Buffer Controller Initialize" "0,1"
|
|
line.long 0xC "MSICA,MSI Controller Address"
|
|
hexmask.long 0xC 0.--31. 1. "MSI_Controller_Address,MSI Controller Address System specified address for MSI memory write transaction termination"
|
|
line.long 0x10 "MSICUA,MSI Controller Upper Address"
|
|
hexmask.long 0x10 0.--31. 1. "MSI_Controller_Upper_Address,MSI Controller Upper Address System specified upper address for MSI memory write transaction termination"
|
|
line.long 0x14 "MSICIn_ENB,MSI Controller Interrupt n Enable"
|
|
hexmask.long 0x14 0.--31. 1. "MSI_Interrupt0_Enable,MSI Interrupt#0 Enable Specifies which interrupts are enabled"
|
|
line.long 0x18 "MSICIn_MASK,MSI Controller Interrupt n Mask"
|
|
hexmask.long 0x18 0.--31. 1. "MSI_Interrupt0_Mask,MSI Interrupt#0 Mask Allows enabled interrupts to be masked"
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x830)++0x3
|
|
line.long 0x0 "MSICIn$1_STATUS,MSI Controller Interrupt nStatus"
|
|
hexmask.long 0x0 0.--31. 1. "MSI_Interrupt0_Status,MSI Interrupt#0 Status If an MSI is detected for EP#0 one bit in this register is set"
|
|
repeat.end
|
|
group.long 0x888++0x3
|
|
line.long 0x0 "MSICGPIO,MSI Controller General Purpose IO Register"
|
|
hexmask.long 0x0 0.--31. 1. "MSI_GPIO_Register,MSI GPIO Register The contents of this register drives the top-level output msi_ctrl_io[31:0]"
|
|
group.long 0x900++0x1F
|
|
line.long 0x0 "iATMVR,iATM Viewport Register"
|
|
bitfld.long 0x0 31. "Region_Direction,Region Direction Defines the region being accessed as either" "0: Outbound,1: Inbound"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "Region_Index,Region Index Defines which region is being accessed when writing to the control base limit and target registers"
|
|
line.long 0x4 "iATMRC1,iATM Region Control 1 Register"
|
|
bitfld.long 0x4 20.--22. "Function_Number,Function Number Outbound: When the address of an outbound TLP is matched to this region then the function number used in generating the 'Function' part of the Requester ID (RID) field of the TLP is taken from this 3-bit register" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "AT,AT NA" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 9.--10. "ATTR,ATTR Outbound: When the address of an outbound TLP is matched to this region then the ATTR field of the TLP is changed to the value in this register" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 8. "TD,TD Outbound: When the address of an outbound TLP is matched to this region then the TD field of the TLP is changed to the value in this register" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5.--7. "TC,TC Outbound: When the address of an outbound TLP is matched to this region then the TC field of the TLP is changed to the value in this register" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--4. 1. "TYPE,TYPE Outbound: When the address of an outbound TLP is matched to this region then the TYPE field of the TLP is changed to the value in this register"
|
|
line.long 0x8 "iATMRC2,iATM Region Control 2 Register"
|
|
bitfld.long 0x8 31. "Region_Enable,Region Enable Outbound / Inbound: This bit must be set to '1' for address translation to take place" "0,1"
|
|
newline
|
|
bitfld.long 0x8 30. "Match_Mode,Match Mode Outbound: Not used" "0,1"
|
|
newline
|
|
bitfld.long 0x8 29. "Invert_Mode,Invert Mode Outbound / Inbound: When set the address matching region is inverted" "0,1"
|
|
newline
|
|
bitfld.long 0x8 28. "CFG_Shift_Mode,CFG Shift Mode This is useful for CFG transactions where the PCIe configuration mechanism maps bits [27:12] of the address to the bus/device and function number" "0,1"
|
|
newline
|
|
bitfld.long 0x8 27. "Fuzzy_Type_Match_Mode,Fuzzy Type Match Mode Outbound: Not used" "0,1"
|
|
newline
|
|
bitfld.long 0x8 24.--25. "Response_Code,Response Code Outbound: Not used" "0: - Normal RX_SSM filter response is used.,1: - Unsupported Request (UR),2: - Completer Abort (CA),3: - Not used / undefined / reserved."
|
|
newline
|
|
bitfld.long 0x8 21. "Message_Code_Match_Enable,Message Code Match Enable Outbound: Not used" "0,1"
|
|
newline
|
|
bitfld.long 0x8 20. "Virtual_Function_Number_Match_Enable,Virtual Function Number Match Enable Outbound: Not used" "0,1"
|
|
newline
|
|
bitfld.long 0x8 19. "Function_Number_Match_Enable,Function Number Match Enable Outbound: Not used" "0,1"
|
|
newline
|
|
bitfld.long 0x8 18. "AT_Match_Enable,AT Match Enable Outbound: Not used" "0,1"
|
|
newline
|
|
bitfld.long 0x8 16. "ATTR_Match_Enable,ATTR Match Enable Outbound: Not used" "0,1"
|
|
newline
|
|
bitfld.long 0x8 15. "TD_Match_Enable,TD Match Enable Outbound: Not used" "0,1"
|
|
newline
|
|
bitfld.long 0x8 14. "TC_Match_Enable,TC Match Enable Outbound: Not used" "0,1"
|
|
newline
|
|
bitfld.long 0x8 8.--10. "BAR_Number,BAR Number Outbound: Not used" "0: - BAR#0,1: - BAR#1,2: - BAR#2,3: - BAR#3,4: - BAR#4,5: - BAR#5,6: - ROM,7: - reserved"
|
|
newline
|
|
hexmask.long.byte 0x8 0.--7. 1. "Message_Code,Message Code Outbound: When the address of an outbound TLP is matched to this region and the translated TLP TYPE field is Msg or MsgD; then the Message field of the TLP is changed to the value in this register"
|
|
line.long 0xC "iATMRLBA,iATM Region Lower Base Address Register"
|
|
hexmask.long.word 0xC 16.--31. 1. "Address_upper,Forms bits [31:16] of the start address of the address region to be translated."
|
|
newline
|
|
hexmask.long.word 0xC 0.--15. 1. "Address_lower,Forms bits [15:0] of the start address of the address region to be translated"
|
|
line.long 0x10 "iATMRUBA,iATM Region Upper Base Address Register"
|
|
hexmask.long 0x10 0.--31. 1. "Address,Outbound / Inbound: Forms bits [63:32] of the start (and end) address of the address region to be translated"
|
|
line.long 0x14 "iATMRLA,iATM Region Limit Address Register"
|
|
hexmask.long.word 0x14 16.--31. 1. "Address_upper,Forms bits [31:16] of the end address of the address region to be translated."
|
|
newline
|
|
hexmask.long.word 0x14 0.--15. 1. "Address_lower,Forms bits [15:0] of the end address of the address region to be translated"
|
|
line.long 0x18 "iATMRLTA,iATM Region Lower Target Address Register"
|
|
hexmask.long.word 0x18 16.--31. 1. "Address_upper,Forms bits [31:16] of the of the new address of the translated region."
|
|
newline
|
|
hexmask.long.word 0x18 0.--15. 1. "Address_lower,Forms bits [15:0] of the start address of the new address of the translated region"
|
|
line.long 0x1C "iATMRUTA,iATM Region Upper Target Address Register"
|
|
hexmask.long 0x1C 0.--31. 1. "Address,Outbound / Inbound: Forms bits [63:32] of the start address of the new address of the translated region"
|
|
tree.end
|
|
tree "PCIE_RC"
|
|
base ad:0x72FFC000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "DeviceID,Device ID and Vendor ID Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "Vendor_ID,Vendor ID-16C3"
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "Command,Command and Status Register"
|
|
bitfld.long 0x0 31. "Signaled_System_Error,Signaled System Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 30. "Detected_Parity_Error,Detected Parity Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "Received_Master_Abort,Received Master Abort" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "Received_Target_Abort,Received Target Abort" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "Signaled_Target_Abort,Signaled Target Abort" "0,1"
|
|
newline
|
|
rbitfld.long 0x0 25.--26. "DEVSEL_Timing,DEVSEL Timing Does not apply to PCI Express. Hardwired to 00." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 24. "Master_Data_Parity_Error,Master Data Parity Error" "0,1"
|
|
newline
|
|
rbitfld.long 0x0 23. "Fast_Back_to_Back_Capable,Fast Back-to-Back Capable Not applicable for PCI Express. Hardwired to 0." "0,1"
|
|
newline
|
|
rbitfld.long 0x0 21. "SixtySix_MHz_Capable,66 MHz Capable Not applicable for PCI Express. Hardwired to 0." "0,1"
|
|
newline
|
|
rbitfld.long 0x0 20. "Capabilities_List,Capabilities List Indicates presence of an extended capability item. Hardwired to 1." "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "INTx_Status,INTx Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "INTx_Assertion_Disable,INTx Assertion Disable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "Fast_Back_to_Back_Enable,Fast Back-to-Back Enable Not applicable for PCI Express. Must be hardwired to 0." "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "SERR_Enable,SERR# Enable" "0,1"
|
|
newline
|
|
rbitfld.long 0x0 7. "IDSEL_Stepping,IDSEL Stepping/Wait Cycle Control Not applicable for PCI Express. Must be hardwired to 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "Parity_Error_Response,Parity Error Response" "0,1"
|
|
newline
|
|
rbitfld.long 0x0 5. "VGA_Palette_Snoop,VGA Palette Snoop Not applicable for PCI Express. Must be hardwired to 0." "0,1"
|
|
newline
|
|
rbitfld.long 0x0 4. "Memory_Write_and_Invalidate,Memory Write and Invalidate Not applicable for PCI Express. Must be hardwired to 0." "0,1"
|
|
newline
|
|
rbitfld.long 0x0 3. "Special_Cycle_Enable,Special Cycle Enable Not applicable for PCI Express. Must be hardwired to 0." "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "Bus_Master_Enable,Bus Master Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "Memory_Space_Enable,Memory Space Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "I_O_Space_Enable,I/O Space Enable" "0,1"
|
|
group.long 0xC++0x7
|
|
line.long 0x0 "BIST,BIST Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "Not_supported_by__core,The BIST register functions are not supported by the core"
|
|
newline
|
|
bitfld.long 0x0 23. "Multi_Function_Device,Multi Function Device The default value is 0 for a single function device (`CX_NFUNC = 1) or 1 for a multi-function device (`CX_NFUNC != 1)" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--22. 1. "Configuration_Header_Format,Configuration Header Format Hardwired to 0 for type 0."
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "Master_Latency_Timer,Master Latency Timer Not applicable for PCI Express hardwired to 0."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "Cache_Line_Size,Cache Line Size The Cache Line Size register is RW for legacy compatibility purposes and is not applicable to PCI Express device functionality"
|
|
line.long 0x4 "BAR0,Base Address 0"
|
|
hexmask.long 0x4 4.--31. 1. "ADDRESS,BAR 0 base address bits (for a 64-bit BAR the remaining upper address bits are in BAR 1)"
|
|
newline
|
|
rbitfld.long 0x4 3. "PREF,If BAR 0 is an I/O BAR bit 3 is the second least significant bit of the base address" "0: = Non-prefetchable,1: = Prefetchable"
|
|
newline
|
|
bitfld.long 0x4 1.--2. "TYPE,If BAR 0 is an I/O BAR bit 2 the least significant bit of the base address and bit 1 is 0" "0: = 32-bit BAR,?,2: = 64-bit BAR,?"
|
|
newline
|
|
rbitfld.long 0x4 0. "Mem_I_O,Bits [3:0] are writable internally but not externally." "0: = BAR 0 is a memory BAR,1: = BAR 0 is an I/O BAR"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "BAR1,Base Address 1"
|
|
hexmask.long 0x0 0.--31. 1. "ADDRESS,BAR 1 contains the upper 32 bits of the BAR 0 base address (bits [63:32])."
|
|
group.long 0x18++0x1B
|
|
line.long 0x0 "BNR,Bus Number Registers"
|
|
hexmask.long.byte 0x0 24.--31. 1. "SECONDARY_LAT_TMR,Secondary latency timer."
|
|
newline
|
|
hexmask.long.byte 0x0 16.--23. 1. "SUBORD_BUS_NUM,Subordinate bus number."
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "SECONDARY_BUS_NUM,Secondary bus number."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "PRIMARY_BUS_NUM,Primary bus number."
|
|
line.long 0x4 "IOBLSSR,I/O Base Limit Secondary Status Register"
|
|
bitfld.long 0x4 31. "DET_PARITY_ERR,Detected Parity Error." "0,1"
|
|
newline
|
|
bitfld.long 0x4 30. "RX_SYS_ERR,Received System Error." "0,1"
|
|
newline
|
|
bitfld.long 0x4 29. "RX_MASTER_ABORT,Received Master Abort." "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "RX_TARGET_ABORT,Received Target Abort." "0,1"
|
|
newline
|
|
bitfld.long 0x4 27. "SIG_TARGET_ABORT,Signaled Target Abort." "0,1"
|
|
newline
|
|
bitfld.long 0x4 24. "MSTR_DAT_PARITY_ERR,Master Data Parity Error." "0,1"
|
|
newline
|
|
rbitfld.long 0x4 23. "FAST_B2B_CAP,Reserved." "0,1"
|
|
newline
|
|
rbitfld.long 0x4 21. "CAP66M,66 MHz Capable. Not applicable to PCI Express hardwired to 0." "0,1"
|
|
newline
|
|
hexmask.long.byte 0x4 12.--15. 1. "IO_SL,I/O Space Limit."
|
|
newline
|
|
hexmask.long.byte 0x4 4.--7. 1. "IO_SB,I/O Space Base."
|
|
line.long 0x8 "MEM_BLR,Memory Base and Memory Limit Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. "MEM_LIM_ADD,Memory Limit Address."
|
|
newline
|
|
hexmask.long.byte 0x8 8.--15. 1. "MEM_BASE_ADD,Memory Base Address."
|
|
line.long 0xC "PREF_MEM_BLR,Prefetchable Memory Base and Limit Register"
|
|
hexmask.long.word 0xC 20.--31. 1. "UPPER12_END_ADD,Upper 12 bits of 32-bit Prefetchable Memory End Address."
|
|
newline
|
|
hexmask.long.word 0xC 4.--15. 1. "UPPER12_START_ADD,Upper 12 bits of 32-bit Prefetchable Memory Start Address."
|
|
line.long 0x10 "PREF_BASE_U32,Prefetchable Base Upper 32 Bits Register"
|
|
hexmask.long 0x10 0.--31. 1. "UPPER32_BASE_PREF_MEM_ADD,Upper 32 Bits of Base Address of Prefetchable Memory Space"
|
|
line.long 0x14 "PREF_LIM_U32,Prefetchable Limit Upper 32 Bits Register"
|
|
hexmask.long 0x14 0.--31. 1. "UPPER32_LIM_PREF_MEM_ADD,Upper 32 Bits of Limit Address of Prefetchable Memory Space"
|
|
line.long 0x18 "IO_BASE_LIM_U16,I/O Base and Limit Upper 16 Bits Register"
|
|
hexmask.long.word 0x18 16.--31. 1. "UPPER16_IO_LIM,Upper 16 Bits of I/O Limit (if 32-bit I/O decoding is supported for devices on the secondary side)."
|
|
newline
|
|
hexmask.long.word 0x18 0.--15. 1. "UPPER16_IO_BASE,Upper 16 Bits of I/O Base (if 32-bit I/O decoding is supported for devices on the secondary side)."
|
|
rgroup.long 0x34++0x3
|
|
line.long 0x0 "CAPPR,Capability Pointer Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "CFG_NEXT_PTR,First Capability Pointer."
|
|
group.long 0x38++0x3
|
|
line.long 0x0 "EROMBAR,Expansion ROM Base Address Register"
|
|
hexmask.long.tbyte 0x0 11.--31. 1. "ADDRESS,Expansion ROM Address"
|
|
newline
|
|
bitfld.long 0x0 0. "ENABLE,Expansion ROM Enable" "0,1"
|
|
rgroup.long 0x3C++0x3
|
|
line.long 0x0 "Interrupt_Line_Register,PCI Express Interrupt Line Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "Interrupt_Line,Used to communicate interrupt line routing information."
|
|
group.long 0x40++0x7
|
|
line.long 0x0 "PMCR,Power Management Capability Register"
|
|
hexmask.long.byte 0x0 27.--31. 1. "PME_Support,PME_Support Identifies the power states from which the core can generate PME Messages"
|
|
newline
|
|
bitfld.long 0x0 26. "D2_Support,D2 Support writable through the IDBI" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "D1_Support,D1 Support writable through the IDBI" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22.--24. "AUX_Current,AUX Current writable through the IDBI" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 21. "DSI,Device Specific Initialization (DSI) writable through the IDBI" "0,1"
|
|
newline
|
|
rbitfld.long 0x0 19. "PME_Clock,PME Clock hardwired to 0" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16.--18. "Power_Management_specification_version,Power Management specification version writable through the IDBI" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "Next_Capability_Pointer,Next Capability Pointer See and ."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "Power_Management_Capability_ID,Power Management Capability ID"
|
|
line.long 0x4 "PMCSR,Power Management Control and Status Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. "Data_register_for_additional_information,Data register for additional information (not supported)"
|
|
newline
|
|
rbitfld.long 0x4 23. "Bus_Power_Clock_Control_Enable,Bus Power/Clock Control Enable hardwired to 0" "0,1"
|
|
newline
|
|
rbitfld.long 0x4 22. "B2_B3_Support,B2/B3 Support hardwired to 0" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "PME_Status,PME Status Indicates if a previously enabled PME event occurred or not." "0,1"
|
|
newline
|
|
rbitfld.long 0x4 13.--14. "Data_Scale,Data Scale (not supported)" "0,1,2,3"
|
|
newline
|
|
hexmask.long.byte 0x4 9.--12. 1. "Data_Select,Data Select (not supported)"
|
|
newline
|
|
bitfld.long 0x4 8. "PME_Enable,PME Enable (sticky bit) A value of 1 indicates that the device is enabled to generate PME." "0,1"
|
|
newline
|
|
rbitfld.long 0x4 3. "No_Soft_Reset,No Soft Reset writable through the IDBI" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0.--1. "Power_State,Power State The written value is ignored if the specific state is not supported" "0: D0,1: D1,2: D2,3: D3"
|
|
group.long 0x70++0x13
|
|
line.long 0x0 "CIDR,PCI Express Capability ID Register"
|
|
hexmask.long.byte 0x0 25.--29. 1. "Interrupt_Message_Number,Interrupt Message Number Updated by hardware writable through the IDBI."
|
|
newline
|
|
bitfld.long 0x0 24. "Slot_Implemented,Slot Implemented writable through the IDBI" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 20.--23. 1. "Device_Port_Type,Device/Port Type Indicates the specific type of this PCI Express Function"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--19. 1. "PCI_Express_Capability_Version,PCI Express Capability Version"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "Next_Capability_Pointer,Next Capability Pointer"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "PCI_Express_Capability_ID,PCI Express Capability ID"
|
|
line.long 0x4 "DCR,Device Capabilities Register"
|
|
bitfld.long 0x4 26.--27. "Captured_Slot_Power_Limit_Scale,Captured Slot Power Limit Scale Upstream port only." "0,1,2,3"
|
|
newline
|
|
hexmask.long.byte 0x4 18.--25. 1. "Captured_Slot_Power_Limit_Value,Captured Slot Power Limit Value Upstream port only."
|
|
newline
|
|
bitfld.long 0x4 15. "Role_Based_Error_Reporting,Role-Based Error Reporting writable through the IDBI" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9.--11. "Endpoint_L1_Acceptable_Latency,Endpoint L1 Acceptable Latency Must be 0x0 for non-Endpoint devices." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 6.--8. "Endpoint_L0s_Acceptable_Latency,Endpoint L0s Acceptable Latency Must be 0x0 for non-Endpoint devices." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 5. "Extended_Tag_Field_Supported,Extended Tag Field Supported This bit is writable through the IDBI" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3.--4. "Phantom_Function_Supported,Phantom Function Supported This field is writable through the IDBI" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 0.--2. "Max_Payload_Size_Supported,Max_Payload_Size Supported writable through the IDBI" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "DConR,Device Control Register"
|
|
rbitfld.long 0x8 21. "Transaction_Pending,Transaction Pending Hard-wired to 0." "0,1"
|
|
newline
|
|
rbitfld.long 0x8 20. "Aux_Power_Detected,Aux Power Detected From sys_aux_pwr_det input port." "0,1"
|
|
newline
|
|
bitfld.long 0x8 19. "Unsupported_Request_Detected,Unsupported Request Detected Errors are logged in this register regardless of whether error reporting is enabled in the Device Control register" "0,1"
|
|
newline
|
|
bitfld.long 0x8 18. "Fatal_Error_Detected,Fatal Error Detected Errors are logged in this register regardless of whether error reporting is enabled in the Device Control register" "0,1"
|
|
newline
|
|
bitfld.long 0x8 17. "Non_Fatal_Error_detected,Non-Fatal Error detected Errors are logged in this register regardless of whether error reporting is enabled in the Device Control register" "0,1"
|
|
newline
|
|
bitfld.long 0x8 16. "Correctable_Error_Detected,Correctable Error Detected Errors are logged in this register regardless of whether error reporting is enabled in the Device Control register" "0,1"
|
|
newline
|
|
rbitfld.long 0x8 12.--14. "Max_Read_Request_Size,Max_Read_Request_Size" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
rbitfld.long 0x8 11. "Enable_No_Snoop,Enable No Snoop" "0,1"
|
|
newline
|
|
rbitfld.long 0x8 10. "AUX_Power_PM_Enable,AUX Power PM Enable" "0,1"
|
|
newline
|
|
rbitfld.long 0x8 9. "Phantom_Function_Enable,Phantom Function Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 8. "Extended_Tag_Field_Enable,Extended Tag Field Enable" "0,1"
|
|
newline
|
|
rbitfld.long 0x8 5.--7. "Max_Payload_Size,Max_Payload_Size" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
rbitfld.long 0x8 4. "Enable_Relaxed_Ordering,Enable Relaxed Ordering" "0,1"
|
|
newline
|
|
rbitfld.long 0x8 3. "Unsupported_Request_Reporting_Enable,Unsupported Request Reporting Enable" "0,1"
|
|
newline
|
|
rbitfld.long 0x8 2. "Fatal_Error_Reporting_Enable,Fatal Error Reporting Enable" "0,1"
|
|
newline
|
|
rbitfld.long 0x8 1. "Non_Fatal_Error_Reporting_Enable,Non-Fatal Error Reporting Enable" "0,1"
|
|
newline
|
|
rbitfld.long 0x8 0. "Correctable_Error_Reporting_Enable,Correctable Error Reporting Enable" "0,1"
|
|
line.long 0xC "LCR,Link Capabilities Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. "Port_Number,Port Number"
|
|
newline
|
|
bitfld.long 0xC 21. "Link_Bandwidth_Notification_Capability,Link Bandwidth Notification Capability Hardwired to 1 for Downstream Ports and 0 for Upstream Ports" "0,1"
|
|
newline
|
|
rbitfld.long 0xC 20. "Data_Link_Layer_Active_Reporting_Capable,Data Link Layer Active Reporting Capable Hardwired to 1 for Downstream Ports and 0 for Upstream Ports" "0,1"
|
|
newline
|
|
rbitfld.long 0xC 19. "Surprise_Down_Error_Reporting_Capable,Surprise Down Error Reporting Capable Not supported hardwired to 0x0." "0,1"
|
|
newline
|
|
bitfld.long 0xC 18. "Clock_Power_Management,Clock Power Management Component can tolerate the removal of refclk via CLKREQ# (if supported)" "0,1"
|
|
newline
|
|
bitfld.long 0xC 15.--17. "L1_Exit_Latency,L1 Exit Latency Writable through the IDBI." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0xC 12.--14. "L0s_Exit_Latency,L0s Exit Latency Writable through the IDBI." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0xC 10.--11. "Active_State_Link_PM_Support,Active State Link PM Support The default value is the value you specify during core configuration writable through the IDBI" "0,1,2,3"
|
|
newline
|
|
hexmask.long.byte 0xC 4.--9. 1. "Maximum_Link_Width,Maximum Link Width Writable through the IDBI."
|
|
newline
|
|
hexmask.long.byte 0xC 0.--3. 1. "Max_Link_Speeds,Max Link Speeds Indicates the supported maximum Link speeds of the associated Port"
|
|
line.long 0x10 "LCSR,Link Control and Status Register"
|
|
bitfld.long 0x10 31. "Link_Autonomous_Bandwidth_Status,Link Autonomous Bandwidth Status This bit is set by hardware to indicate that hardware has autonomously changed Link speed or width without the Port transitioning through DL_Down status for reasons other than to attempt.." "0,1"
|
|
newline
|
|
bitfld.long 0x10 30. "Link_Bandwidth_Management_Status,Link Bandwidth Management Status This bit is set by hardware to indicate that either of the following has occurred without the Port transitioning through DL_Down status: *A Link retraining has completed following a write.." "0,1"
|
|
newline
|
|
rbitfld.long 0x10 29. "Data_Link_Layer_Active,Data Link Layer Active This bit must be implemented if the corresponding Data Link Layer Link Active Reporting capability bit is implemented" "0,1"
|
|
newline
|
|
bitfld.long 0x10 28. "Slot_Clock_Configuration,Slot Clock Configuration Indicates that the component uses the same physical reference clock that the platform provides on the connector" "0,1"
|
|
newline
|
|
bitfld.long 0x10 27. "Link_Training,Link Training This bit is not applicable and is reserved for Endpoints PCI Express to PCI/PCI-X bridges" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x10 20.--25. 1. "Negotiated_Link_Width,Negotiated Link Width Set automatically by hardware after Link initialization"
|
|
newline
|
|
hexmask.long.byte 0x10 16.--19. 1. "Link_Speed,Link Speed Indicates the negotiated Link speed"
|
|
newline
|
|
rbitfld.long 0x10 11. "Link_Autonomous_Bandwidth_Interrupt_Enable,Link Autonomous Bandwidth Interrupt Enable When set this bit enables the generation of an interrupt to indicate that the Link Autonomous Bandwidth Status bit has been set" "0,1"
|
|
newline
|
|
bitfld.long 0x10 10. "Link_Bandwidth_Management_Interrupt_Enable,Link Bandwidth Management Interrupt Enable When set this bit enables the generation of an interrupt to indicate that the Link Bandwidth Management Status bit has been set" "0,1"
|
|
newline
|
|
bitfld.long 0x10 9. "Hardware_Autonomous_Width_Disable,Hardware Autonomous Width Disable Not supported hardwired to 0." "0,1"
|
|
newline
|
|
rbitfld.long 0x10 8. "Enable_Clock_Power_Management,Enable Clock Power Management Hardwired to 0 if Clock Power Management is disabled in the Link Capabilities register" "0,1"
|
|
newline
|
|
rbitfld.long 0x10 7. "Extended_Synch,Extended Synch" "0,1"
|
|
newline
|
|
rbitfld.long 0x10 6. "Common_Clock_Configuration,Common Clock Configuration" "0,1"
|
|
newline
|
|
bitfld.long 0x10 5. "Retrain_Link,Retrain Link This bit is reserved for PCI Express-to-PCI/PCI-X bridges." "0,1"
|
|
newline
|
|
rbitfld.long 0x10 4. "Link_Disable,Link Disable This bit is reserved for PCI Express-to-PCI/PCI-X bridges." "0,1"
|
|
newline
|
|
bitfld.long 0x10 3. "RCB,Read Completion Boundary (RCB) RC: Writable through IDBI" "0,1"
|
|
newline
|
|
rbitfld.long 0x10 0.--1. "Active_State_Link_PM_Control,Active State Link PM Control" "0,1,2,3"
|
|
rgroup.long 0x84++0x3
|
|
line.long 0x0 "SCR,Slot Capabilities Register"
|
|
hexmask.long.word 0x0 19.--31. 1. "Physical_Slot_Number,Physical Slot Number writable through the IDBI"
|
|
newline
|
|
bitfld.long 0x0 18. "No_Command_Complete_Support,No Command Complete Support writable through the IDBI" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "Electromechanical_Interlock_Present,Electromechanical Interlock Present writable through the IDBI" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15.--16. "Slot_Power_Limit_Scale,Slot Power Limit Scale writable through the IDBI" "0,1,2,3"
|
|
newline
|
|
hexmask.long.byte 0x0 7.--14. 1. "Slot_Power_Limit_Value,Slot Power Limit Value writable through the IDBI"
|
|
newline
|
|
bitfld.long 0x0 6. "Hot_Plug_Capable,Hot-Plug Capable writable through the IDBI" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "Hot_Plug_Surprise,Hot-Plug Surprise writable through the IDBI" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "Power_Indicator_Present,Power Indicator Present writable through the IDBI" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "Attention_Indicator_Present_1,Attention Indicator Present writable through the IDBI" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "MRL_Sensor_Present,MRL Sensor Present writable through the IDBI" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "Power_Controller_Present_0,Power Controller Present writable through the IDBI" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "Attention_Indicator_Present,Attention Indicator Present writable through the IDBI" "0,1"
|
|
group.long 0x88++0xB
|
|
line.long 0x0 "SCSR,Slot Control and Status Register"
|
|
bitfld.long 0x0 24. "Data_Link_Layer_State_Changed,Data Link Layer State Changed" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "Electromechanical_Interlock_Status,Electromechanical Interlock Status" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "Presence_Detect_State,Presence Detect State" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "MRL_Sensor_State,MRL Sensor State" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20. "Command_Completed,Command Completed" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "Presence_Detect_Changed,Presence Detect Changed" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "MRL_Sensor_Changed,MRL Sensor Changed" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "Power_Fault_Detected,Power Fault Detected" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "Attention_Button_Pressed,Attention Button Pressed" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "Data_Link_Layer_State_Changed_Enable,Data Link Layer State Changed Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "Electromechanical_Interlock_Control,Electromechanical Interlock Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "Power_Controller_Control,Power Controller Control" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "Power_Indicator_Control,Power Indicator Control" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 6.--7. "Attention_Indicator_Control,Attention Indicator Control" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 5. "Hot_Plug_Interrupt_Enable,Hot-Plug Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "Command_Completed_Interrupt_Enable,Command Completed Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "Presence_Detect_Changed_Enable,Presence Detect Changed Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "MRL_Sensor_Changed_Enable,MRL Sensor Changed Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "Power_Fault_Detected_Enable,Power Fault Detected Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "Attention_Button_Pressed_Enable,Attention Button Pressed Enable" "0,1"
|
|
line.long 0x4 "RCCR,Root Control and Capabilities Register"
|
|
bitfld.long 0x4 16. "CRS_Software_Visibility,CRS Software Visibility Not supported hardwired to 0x0." "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "CRS_Software_Visibility_Enable,CRS Software Visibility Enable Not supported hardwired to 0x0." "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "PME_Interrupt_Enable,PME Interrupt Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "System_Error_on_Fatal_Error_Enable,System Error on Fatal Error Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "System_Error_on_Non_fatal_Error_Enable,System Error on Non-fatal Error Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "System_Error_on_Correctable_Error_Enable,System Error on Correctable Error Enable" "0,1"
|
|
line.long 0x8 "RSR,Root Status Register"
|
|
bitfld.long 0x8 17. "PME_Pending,PME Pending" "0,1"
|
|
newline
|
|
bitfld.long 0x8 16. "PME_Status,PME Status" "0,1"
|
|
newline
|
|
hexmask.long.word 0x8 0.--15. 1. "PME_Requester_ID,PME Requester ID"
|
|
rgroup.long 0x94++0x3
|
|
line.long 0x0 "DCR2,Device Capabilities 2 Register"
|
|
bitfld.long 0x0 4. "Completion_Timeout_Disable_Supported,Completion Timeout Disable Supported" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "Completion_Timeout_Ranges_Supported,Completion Timeout Ranges Supported This field is applicable only to Root Ports Endpoints that issue Requests on their own behalf and PCI Express to PCI/PCI-X Bridges that take ownership of Requests issued on PCI.."
|
|
group.long 0x98++0x3
|
|
line.long 0x0 "DCSR2,Device Control and Status 2 Register"
|
|
bitfld.long 0x0 4. "Completion_Timeout_Disable,Completion Timeout Disable" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "Completion_Timeout_Value,Completion Timeout Value If the default range is chosen the core will have a timeout in the range of 16ms to 55ms"
|
|
rgroup.long 0x9C++0x3
|
|
line.long 0x0 "LCR2,Link Capabilities 2 Register"
|
|
bitfld.long 0x0 8. "Crosslink_Supported,Crosslink Supported" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 1.--7. 1. "Supported_Link_Speeds_Vector,Supported Link Speeds Vector Indicates the supported Link speeds of the associated Port"
|
|
group.long 0xA0++0x3
|
|
line.long 0x0 "LCSR2,Link Control and Status 2 Register"
|
|
bitfld.long 0x0 21. "Link_Equalization_Request,Link Equalization Request" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20. "Equalization_Phase_3_Successful,Equalization Phase 3 Successful" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "Equalization_Phase_2_Successful,Equalization Phase 2 Successful" "0,1"
|
|
newline
|
|
rbitfld.long 0x0 18. "Equalization_Phase_1_Successful,Equalization Phase 1 Successful This is a sticky bit." "0,1"
|
|
newline
|
|
rbitfld.long 0x0 17. "Equalization_Complete,Equalization Complete This is a sticky bit." "0,1"
|
|
newline
|
|
rbitfld.long 0x0 16. "Current_Deemphasis_Level,Current De-emphasis Level" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 12.--15. 1. "Compliance_Pre_set_Deemphasis,Compliance Pre-set/ De-emphasis This is a sticky bit"
|
|
newline
|
|
bitfld.long 0x0 11. "Compliance_SOS,Compliance SOS When set to 1b the LTSSM is required to send SKP Ordered Sets periodically in between the (modified) compliance patterns" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "Enter_Modified_Compliance,Enter Modified Compliance When this bit is set to 1b the device transmits Modified Compliance Pattern if the LTSSM enters Polling" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7.--9. "Transmit_Margin,Transmit Margin This field is reset to 000b on entry to the LTSSM Polling" "0: 800-1200 mV for full swing 400-600 mV for half-..,?,?,3: 200-400 mV for full-swing and 100-200 mV for..,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 6. "Selectable_Deemphasis,Selectable De-emphasis When the Link is operating at 2" "0: -6 dB,1: -3.5 dB"
|
|
newline
|
|
bitfld.long 0x0 5. "Hardware_Autonomous_Speed_Disable,Hardware Autonomous Speed Disable When cfg_hw_auto_sp_dis signal is asserted the application must disable hardware from changing the Link speed for device-specific reasons other than attempting to correct unreliable.." "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "Enter_Compliance,Enter Compliance Software is permitted to force a link to enter Compliance mode at the speed indicated in the Target Link Speed field by setting this bit to 1b in both components on a link and then initiating a hot reset on the link" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "Target_Link_Speed,Target Link Speed For Downstream ports this field sets an upper limit on link operational speed by restricting the values advertised by the upstream component in its training sequences: The encoding is the binary value of the bit in.."
|
|
group.long 0x100++0x1B
|
|
line.long 0x0 "AER,AER Capability Header"
|
|
hexmask.long.word 0x0 20.--31. 1. "Next_Capability_Offset,Next Capability Offset"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--19. 1. "Capability_Version,Capability Version"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "PCI_Express_Extended_Capability_ID,PCI Express Extended Capability ID Value is 0x1 for Advanced Error Reporting."
|
|
line.long 0x4 "UESR,Uncorrectable Error Status Register"
|
|
bitfld.long 0x4 20. "Unsupported_Request_Error_Status,Unsupported Request Error Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "ECRC_Error_Status,ECRC Error Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "Malformed_TLP_Status,Malformed TLP Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "Receiver_Overflow_Status,Receiver Overflow Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "Unexpected_Completion_Status,Unexpected Completion Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "Completer_Abort_Status,Completer Abort Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 14. "Completion_Timeout_Status,Completion Timeout Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "Flow_Control_Protocol_Error_Status,Flow Control Protocol Error Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "Poisoned_TLP_Status,Poisoned TLP Status" "0,1"
|
|
newline
|
|
rbitfld.long 0x4 5. "Surprise_Down_Error_Status,Surprise Down Error Status (not supported)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "Data_Link_Protocol_Error_Status,Data Link Protocol Error Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "Undefined,Undefined for PCI Express 1.1 (Was Training Error Status for PCI Express 1.0a)" "0,1"
|
|
line.long 0x8 "UEMR,Uncorrectable Error Mask Register"
|
|
bitfld.long 0x8 20. "Unsupported_Request_Error_Mask,Unsupported Request Error Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x8 19. "ECRC_Error_Mask,ECRC Error Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x8 18. "Malformed_TLP_Mask,Malformed TLP Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x8 17. "Receiver_Overflow_Mask,Receiver Overflow Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x8 16. "Unexpected_Completion_Mask,Unexpected Completion Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x8 15. "Completer_Abort_Mask,Completer Abort Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x8 14. "Completion_Timeout_Mask,Completion Timeout Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x8 13. "Flow_Control_Protocol_Error_Mask,Flow Control Protocol Error Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x8 12. "Poisoned_TLP_Mask,Poisoned TLP Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x8 5. "Surprise_Down_Error_Mask,Surprise Down Error Mask (not supported)" "0,1"
|
|
newline
|
|
bitfld.long 0x8 4. "Data_Link_Protocol_Error_Mask,Data Link Protocol Error Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0. "Undefined,Undefined for PCI Express 1.1 (Was Training Error Mask for PCI Express 1.0a)" "0,1"
|
|
line.long 0xC "UESevR,Uncorrectable Error Severity Register"
|
|
bitfld.long 0xC 20. "Unsupported_Request_Error_Severity,Unsupported Request Error Severity" "0,1"
|
|
newline
|
|
bitfld.long 0xC 19. "ECRC_Error_Severity,ECRC Error Severity" "0,1"
|
|
newline
|
|
bitfld.long 0xC 18. "Malformed_TLP_Severity,Malformed TLP Severity" "0,1"
|
|
newline
|
|
bitfld.long 0xC 17. "Receiver_Overflow_Severity,Receiver Overflow Severity" "0,1"
|
|
newline
|
|
bitfld.long 0xC 16. "Unexpected_Completion_Severity,Unexpected Completion Severity" "0,1"
|
|
newline
|
|
bitfld.long 0xC 15. "Completer_Abort_Severity,Completer Abort Severity" "0,1"
|
|
newline
|
|
bitfld.long 0xC 14. "Completion_Timeout_Severity,Completion Timeout Severity" "0,1"
|
|
newline
|
|
bitfld.long 0xC 13. "Flow_Control_Protocol_Error_Severity,Flow Control Protocol Error Severity" "0,1"
|
|
newline
|
|
bitfld.long 0xC 12. "Poisoned_TLP_Severity,Poisoned TLP Severity" "0,1"
|
|
newline
|
|
bitfld.long 0xC 5. "Surprise_Down_Error_Severity,Surprise Down Error Severity (not supported)" "0,1"
|
|
newline
|
|
bitfld.long 0xC 4. "Data_Link_Protocol_Error_Severity,Data Link Protocol Error Severity" "0,1"
|
|
newline
|
|
bitfld.long 0xC 0. "Undefined,Undefined for PCI Express 1.1 (Was Training Error Severity for PCI Express 1.0a)" "0,1"
|
|
line.long 0x10 "CESR,Correctable Error Status Register"
|
|
bitfld.long 0x10 13. "Advisory_Non_Fatal_Error_Status,Advisory Non-Fatal Error Status" "0,1"
|
|
newline
|
|
bitfld.long 0x10 12. "Reply_Timer_Timeout_Status,Reply Timer Timeout Status" "0,1"
|
|
newline
|
|
bitfld.long 0x10 8. "REPLAY_NUM_Rollover_Status,REPLAY_NUM Rollover Status" "0,1"
|
|
newline
|
|
bitfld.long 0x10 7. "Bad_DLLP_Status,Bad DLLP Status" "0,1"
|
|
newline
|
|
bitfld.long 0x10 6. "Bad_TLP_Status,Bad TLP Status" "0,1"
|
|
newline
|
|
bitfld.long 0x10 0. "Receiver_Error_Status,Receiver Error Status" "0,1"
|
|
line.long 0x14 "CEMR,Correctable Error Mask Register"
|
|
bitfld.long 0x14 13. "Advisory_Non_Fatal_Error_Mask,Advisory Non-Fatal Error Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x14 12. "Reply_Timer_Timeout_Mask,Reply Timer Timeout Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x14 8. "REPLAY_NUM_Rollover_Mask,REPLAY_NUM Rollover Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x14 7. "Bad_DLLP_Mask,Bad DLLP Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x14 6. "Bad_TLP_Mask,Bad TLP Mask" "0,1"
|
|
newline
|
|
bitfld.long 0x14 0. "Receiver_Error_Mask,Receiver Error Mask" "0,1"
|
|
line.long 0x18 "AECCR,Advanced Error Capabilities and Control Register"
|
|
bitfld.long 0x18 8. "ECRC_Check_Enable,ECRC Check Enable" "0,1"
|
|
newline
|
|
rbitfld.long 0x18 7. "ECRC_Check_Capable,ECRC Check Capable" "0,1"
|
|
newline
|
|
bitfld.long 0x18 6. "ECRC_Generation_Enable,ECRC Generation Enable" "0,1"
|
|
newline
|
|
rbitfld.long 0x18 5. "ECRC_Generation_Capability,ECRC Generation Capability" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x18 0.--4. 1. "First_Error_Pointer,First Error Pointer"
|
|
rgroup.long 0x11C++0xF
|
|
line.long 0x0 "Header_Log_Register_DWORD1,PCI Express Header Log Register 1"
|
|
hexmask.long.byte 0x0 24.--31. 1. "Byte_0,Byte n of the TLP header associated with the error."
|
|
newline
|
|
hexmask.long.byte 0x0 16.--23. 1. "Byte_1,Byte n of the TLP header associated with the error."
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "Byte_2,Byte n of the TLP header associated with the error."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "Byte_3,Byte n of the TLP header associated with the error."
|
|
line.long 0x4 "Header_Log_Register_DWORD2,PCI Express Header Log Register 2"
|
|
hexmask.long.byte 0x4 24.--31. 1. "Byte_4,Byte n of the TLP header associated with the error."
|
|
newline
|
|
hexmask.long.byte 0x4 16.--23. 1. "Byte_5,Byte n of the TLP header associated with the error."
|
|
newline
|
|
hexmask.long.byte 0x4 8.--15. 1. "Byte_6,Byte n of the TLP header associated with the error."
|
|
newline
|
|
hexmask.long.byte 0x4 0.--7. 1. "Byte_7,Byte n of the TLP header associated with the error."
|
|
line.long 0x8 "Header_Log_Register_DWORD3,PCI Express Header Log Register 3"
|
|
hexmask.long.byte 0x8 24.--31. 1. "Byte_8,Byte n of the TLP header associated with the error."
|
|
newline
|
|
hexmask.long.byte 0x8 16.--23. 1. "Byte_9,Byte n of the TLP header associated with the error."
|
|
newline
|
|
hexmask.long.byte 0x8 8.--15. 1. "Byte_A,Byte n of the TLP header associated with the error."
|
|
newline
|
|
hexmask.long.byte 0x8 0.--7. 1. "Byte_B,Byte n of the TLP header associated with the error."
|
|
line.long 0xC "Header_Log_Register_DWORD4,PCI Express Header Log Register 4"
|
|
hexmask.long.byte 0xC 24.--31. 1. "Byte_C,Byte n of the TLP header associated with the error."
|
|
newline
|
|
hexmask.long.byte 0xC 16.--23. 1. "Byte_D,Byte n of the TLP header associated with the error."
|
|
newline
|
|
hexmask.long.byte 0xC 8.--15. 1. "Byte_E,Byte n of the TLP header associated with the error."
|
|
newline
|
|
hexmask.long.byte 0xC 0.--7. 1. "Byte_F,Byte n of the TLP header associated with the error."
|
|
group.long 0x12C++0x7
|
|
line.long 0x0 "RECR,Root Error Command Register"
|
|
bitfld.long 0x0 2. "Fatal_Error_Reporting_Enable,Fatal Error Reporting Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "Non_Fatal_Error_Reporting_Enable,Non-Fatal Error Reporting Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "Correctable_Error_Reporting_Enable,Correctable Error Reporting Enable" "0,1"
|
|
line.long 0x4 "RESR,Root Error Status Register"
|
|
hexmask.long.byte 0x4 27.--31. 1. "Advanced_Error_Interrupt_Message_Number,Advanced Error Interrupt Message Number writable through the IDBI"
|
|
newline
|
|
bitfld.long 0x4 6. "Fatal_Error_Messages_Received,Fatal Error Messages Received" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "Non_Fatal_Error_Messages_Received,Non-Fatal Error Messages Received" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "First_Uncorrectable_Fatal,First Uncorrectable Fatal" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "Multiple_ERR_FATAL_NONFATAL_Received,Multiple ERR_FATAL/NONFATAL Received" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "ERR_FATAL_NONFATAL_Received,ERR_FATAL/NONFATAL Received" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "Multiple_ERR_COR_Received,Multiple ERR_COR Received" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "ERR_COR_Received,ERR_COR Received" "0,1"
|
|
rgroup.long 0x134++0x3
|
|
line.long 0x0 "ESIR,Error Source Identification Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "ERR_FATAL_NONFATAL_SID,ERR_FATAL/NONFATAL Source Identification"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "ERR_COR_SID,ERR_COR Source Identification"
|
|
rgroup.long 0x1010++0x7
|
|
line.long 0x0 "MASK0,BAR 0 Mask Register"
|
|
hexmask.long 0x0 1.--31. 1. "MASK,Indicates which BAR 0 bits to mask (make non- writable) from host software which in turn determines the size of the BAR"
|
|
newline
|
|
bitfld.long 0x0 0. "ENABLE,Bit 0 is interpreted as BAR Enable when writing to the BAR Mask register rather than as a mask bit because bit 0 of a BAR is always masked from writing by host software" "0: BAR 0 is disabled,1: BAR 0 is enabled"
|
|
line.long 0x4 "MASK1,BAR 1 Mask Register"
|
|
hexmask.long 0x4 0.--31. 1. "MASK,Bits [31:1]: BAR 1 Mask value interpreted the same way as BAR 0 Mask"
|
|
group.long 0x1038++0x3
|
|
line.long 0x0 "EROMMASK,Expansion ROM BAR Mask Register"
|
|
hexmask.long 0x0 1.--31. 1. "ROM_MASK_N,Indicates which Expansion ROM BAR bits to mask (make non-writable) from host software which in turn determines the size of the BAR"
|
|
newline
|
|
bitfld.long 0x0 0. "ROM_BAR_ENABLED_N,Expansion ROM BAR Enable" "0: Expansion ROM BAR is disabled,1: Expansion ROM BAR is enabled"
|
|
tree.end
|
|
tree.end
|
|
tree "PIT (Periodic Interrupt Timer)"
|
|
base ad:0x0
|
|
tree "PIT_0"
|
|
base ad:0x4003A000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "MCR,PIT Module Control Register"
|
|
bitfld.long 0x0 1. "MDIS,Module Disable - (PIT section)" "0: Clock for standard PIT timers is enabled.,1: Clock for standard PIT timers is disabled."
|
|
bitfld.long 0x0 0. "FRZ,Freeze" "0: Timers continue to run in Debug mode.,1: Timers are stopped in Debug mode."
|
|
rgroup.long 0xE0++0x7
|
|
line.long 0x0 "LTMR64H,PIT Upper Lifetime Timer Register"
|
|
hexmask.long 0x0 0.--31. 1. "LTH,Life Timer value"
|
|
line.long 0x4 "LTMR64L,PIT Lower Lifetime Timer Register"
|
|
hexmask.long 0x4 0.--31. 1. "LTL,Life Timer value"
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x10)
|
|
group.long ($2+0x100)++0x3
|
|
line.long 0x0 "LDVAL$1,Timer Load Value Register"
|
|
hexmask.long 0x0 0.--31. 1. "TSV,Timer Start Value"
|
|
repeat.end
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x10)
|
|
rgroup.long ($2+0x104)++0x3
|
|
line.long 0x0 "CVAL$1,Current Timer Value Register"
|
|
hexmask.long 0x0 0.--31. 1. "TVL,Current Timer Value"
|
|
repeat.end
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x10)
|
|
group.long ($2+0x108)++0x3
|
|
line.long 0x0 "TCTRL$1,Timer Control Register"
|
|
bitfld.long 0x0 2. "CHN,Chain Mode" "0: Timer is not chained.,1: Timer is chained to previous timer. For example.."
|
|
bitfld.long 0x0 1. "TIE,Timer Interrupt Enable" "0: Interrupt requests from Timer n are disabled.,1: Interrupt will be requested whenever TIF is set."
|
|
bitfld.long 0x0 0. "TEN,Timer Enable" "0: Timer n is disabled.,1: Timer n is enabled."
|
|
repeat.end
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x10)
|
|
group.long ($2+0x10C)++0x3
|
|
line.long 0x0 "TFLG$1,Timer Flag Register"
|
|
bitfld.long 0x0 0. "TIF,Timer Interrupt Flag" "0: Timeout has not yet occurred.,1: Timeout has occurred."
|
|
repeat.end
|
|
tree.end
|
|
tree "PIT_1"
|
|
base ad:0x400AA000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "MCR,PIT Module Control Register"
|
|
bitfld.long 0x0 1. "MDIS,Module Disable - (PIT section)" "0: Clock for standard PIT timers is enabled.,1: Clock for standard PIT timers is disabled."
|
|
bitfld.long 0x0 0. "FRZ,Freeze" "0: Timers continue to run in Debug mode.,1: Timers are stopped in Debug mode."
|
|
rgroup.long 0xE0++0x7
|
|
line.long 0x0 "LTMR64H,PIT Upper Lifetime Timer Register"
|
|
hexmask.long 0x0 0.--31. 1. "LTH,Life Timer value"
|
|
line.long 0x4 "LTMR64L,PIT Lower Lifetime Timer Register"
|
|
hexmask.long 0x4 0.--31. 1. "LTL,Life Timer value"
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x10)
|
|
group.long ($2+0x100)++0x3
|
|
line.long 0x0 "LDVAL$1,Timer Load Value Register"
|
|
hexmask.long 0x0 0.--31. 1. "TSV,Timer Start Value"
|
|
repeat.end
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x10)
|
|
rgroup.long ($2+0x104)++0x3
|
|
line.long 0x0 "CVAL$1,Current Timer Value Register"
|
|
hexmask.long 0x0 0.--31. 1. "TVL,Current Timer Value"
|
|
repeat.end
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x10)
|
|
group.long ($2+0x108)++0x3
|
|
line.long 0x0 "TCTRL$1,Timer Control Register"
|
|
bitfld.long 0x0 2. "CHN,Chain Mode" "0: Timer is not chained.,1: Timer is chained to previous timer. For example.."
|
|
bitfld.long 0x0 1. "TIE,Timer Interrupt Enable" "0: Interrupt requests from Timer n are disabled.,1: Interrupt will be requested whenever TIF is set."
|
|
bitfld.long 0x0 0. "TEN,Timer Enable" "0: Timer n is disabled.,1: Timer n is enabled."
|
|
repeat.end
|
|
repeat 6. (increment 0x0 0x1)(increment 0x0 0x10)
|
|
group.long ($2+0x10C)++0x3
|
|
line.long 0x0 "TFLG$1,Timer Flag Register"
|
|
bitfld.long 0x0 0. "TIF,Timer Interrupt Flag" "0: Timeout has not yet occurred.,1: Timeout has occurred."
|
|
repeat.end
|
|
tree.end
|
|
tree.end
|
|
tree "PLLDIG (PLL Digital Interface)"
|
|
base ad:0x0
|
|
tree "PLLDIG_0"
|
|
base ad:0x4003C000
|
|
group.long 0x20++0x13
|
|
line.long 0x0 "PLLCR,PLLDIG PLL Control Register"
|
|
rbitfld.long 0x0 8.--9. "CLKCFG,Clock Configuration" "0: PLL off,?,?,3: Normal mode with PLL running."
|
|
bitfld.long 0x0 3. "LOLIE,Loss-of-lock interrupt enable." "0: Ignore loss-of-lock. Interrupt not requested.,1: Enable interrupt request upon loss-of-lock."
|
|
line.long 0x4 "PLLSR,PLLDIG PLL Status Register"
|
|
bitfld.long 0x4 3. "LOLF,Loss-of-lock flag." "0: No loss of lock detected. Interrupt service not..,1: Loss of lock detected. Interrupt service.."
|
|
rbitfld.long 0x4 2. "LOCK,Lock status bit. Indicates whether PLL has acquired lock." "0: PLL is unlocked.,1: PLL is locked."
|
|
line.long 0x8 "PLLDV,PLLDIG PLL Divider Register"
|
|
hexmask.long.byte 0x8 25.--30. 1. "RFDPHI1,PHI1 reduced frequency divider."
|
|
hexmask.long.byte 0x8 16.--21. 1. "RFDPHI,PHI reduced frequency divider."
|
|
bitfld.long 0x8 12.--14. "PREDIV,Input clock predivider." "0: Divide by 1,1: Divide by 1,2: Divide by 2,3: Divide by 3,4: Divide by 4,5: Divide by 5,6: Divide by 6,7: Divide by 7"
|
|
newline
|
|
hexmask.long.byte 0x8 0.--7. 1. "MFD,Loop multiplication factor divider."
|
|
line.long 0xC "PLLFM,PLLDIG PLL Frequency Modulation Register"
|
|
bitfld.long 0xC 30. "SSCGBYP,Modulation enable." "0: Spread spectrum modulation is not bypassed.,1: Spread spectrum modulation is bypassed."
|
|
hexmask.long.word 0xC 16.--25. 1. "STEPSIZE,Modulation period."
|
|
hexmask.long.word 0xC 0.--10. 1. "STEPNO,Increment step."
|
|
line.long 0x10 "PLLFD,PLLDIG PLL Fractional Divide Register"
|
|
bitfld.long 0x10 30. "SMDEN,Sigma Delta Modulation Enable" "0: Sigma delta modulation disabled,1: Sigma delta modulation enabled"
|
|
hexmask.long.word 0x10 0.--14. 1. "MFN,Numerator for fractional loop division factor (see Clock configuration)."
|
|
group.long 0x38++0x3
|
|
line.long 0x0 "PLLCAL1,PLL Calibration Register 1"
|
|
hexmask.long.byte 0x0 24.--30. 1. "NDAC1,This field sets the limit for calibration DAC in multiple calibration mode."
|
|
tree.end
|
|
tree "PLLDIG_1"
|
|
base ad:0x4003C080
|
|
group.long 0x20++0x13
|
|
line.long 0x0 "PLLCR,PLLDIG PLL Control Register"
|
|
rbitfld.long 0x0 8.--9. "CLKCFG,Clock Configuration" "0: PLL off,?,?,3: Normal mode with PLL running."
|
|
bitfld.long 0x0 3. "LOLIE,Loss-of-lock interrupt enable." "0: Ignore loss-of-lock. Interrupt not requested.,1: Enable interrupt request upon loss-of-lock."
|
|
line.long 0x4 "PLLSR,PLLDIG PLL Status Register"
|
|
bitfld.long 0x4 3. "LOLF,Loss-of-lock flag." "0: No loss of lock detected. Interrupt service not..,1: Loss of lock detected. Interrupt service.."
|
|
rbitfld.long 0x4 2. "LOCK,Lock status bit. Indicates whether PLL has acquired lock." "0: PLL is unlocked.,1: PLL is locked."
|
|
line.long 0x8 "PLLDV,PLLDIG PLL Divider Register"
|
|
hexmask.long.byte 0x8 25.--30. 1. "RFDPHI1,PHI1 reduced frequency divider."
|
|
hexmask.long.byte 0x8 16.--21. 1. "RFDPHI,PHI reduced frequency divider."
|
|
bitfld.long 0x8 12.--14. "PREDIV,Input clock predivider." "0: Divide by 1,1: Divide by 1,2: Divide by 2,3: Divide by 3,4: Divide by 4,5: Divide by 5,6: Divide by 6,7: Divide by 7"
|
|
newline
|
|
hexmask.long.byte 0x8 0.--7. 1. "MFD,Loop multiplication factor divider."
|
|
line.long 0xC "PLLFM,PLLDIG PLL Frequency Modulation Register"
|
|
bitfld.long 0xC 30. "SSCGBYP,Modulation enable." "0: Spread spectrum modulation is not bypassed.,1: Spread spectrum modulation is bypassed."
|
|
hexmask.long.word 0xC 16.--25. 1. "STEPSIZE,Modulation period."
|
|
hexmask.long.word 0xC 0.--10. 1. "STEPNO,Increment step."
|
|
line.long 0x10 "PLLFD,PLLDIG PLL Fractional Divide Register"
|
|
bitfld.long 0x10 30. "SMDEN,Sigma Delta Modulation Enable" "0: Sigma delta modulation disabled,1: Sigma delta modulation enabled"
|
|
hexmask.long.word 0x10 0.--14. 1. "MFN,Numerator for fractional loop division factor (see Clock configuration)."
|
|
group.long 0x38++0x3
|
|
line.long 0x0 "PLLCAL1,PLL Calibration Register 1"
|
|
hexmask.long.byte 0x0 24.--30. 1. "NDAC1,This field sets the limit for calibration DAC in multiple calibration mode."
|
|
tree.end
|
|
tree "PLLDIG_2"
|
|
base ad:0x4003C100
|
|
group.long 0x20++0x13
|
|
line.long 0x0 "PLLCR,PLLDIG PLL Control Register"
|
|
rbitfld.long 0x0 8.--9. "CLKCFG,Clock Configuration" "0: PLL off,?,?,3: Normal mode with PLL running."
|
|
bitfld.long 0x0 3. "LOLIE,Loss-of-lock interrupt enable." "0: Ignore loss-of-lock. Interrupt not requested.,1: Enable interrupt request upon loss-of-lock."
|
|
line.long 0x4 "PLLSR,PLLDIG PLL Status Register"
|
|
bitfld.long 0x4 3. "LOLF,Loss-of-lock flag." "0: No loss of lock detected. Interrupt service not..,1: Loss of lock detected. Interrupt service.."
|
|
rbitfld.long 0x4 2. "LOCK,Lock status bit. Indicates whether PLL has acquired lock." "0: PLL is unlocked.,1: PLL is locked."
|
|
line.long 0x8 "PLLDV,PLLDIG PLL Divider Register"
|
|
hexmask.long.byte 0x8 25.--30. 1. "RFDPHI1,PHI1 reduced frequency divider."
|
|
hexmask.long.byte 0x8 16.--21. 1. "RFDPHI,PHI reduced frequency divider."
|
|
bitfld.long 0x8 12.--14. "PREDIV,Input clock predivider." "0: Divide by 1,1: Divide by 1,2: Divide by 2,3: Divide by 3,4: Divide by 4,5: Divide by 5,6: Divide by 6,7: Divide by 7"
|
|
newline
|
|
hexmask.long.byte 0x8 0.--7. 1. "MFD,Loop multiplication factor divider."
|
|
line.long 0xC "PLLFM,PLLDIG PLL Frequency Modulation Register"
|
|
bitfld.long 0xC 30. "SSCGBYP,Modulation enable." "0: Spread spectrum modulation is not bypassed.,1: Spread spectrum modulation is bypassed."
|
|
hexmask.long.word 0xC 16.--25. 1. "STEPSIZE,Modulation period."
|
|
hexmask.long.word 0xC 0.--10. 1. "STEPNO,Increment step."
|
|
line.long 0x10 "PLLFD,PLLDIG PLL Fractional Divide Register"
|
|
bitfld.long 0x10 30. "SMDEN,Sigma Delta Modulation Enable" "0: Sigma delta modulation disabled,1: Sigma delta modulation enabled"
|
|
hexmask.long.word 0x10 0.--14. 1. "MFN,Numerator for fractional loop division factor (see Clock configuration)."
|
|
group.long 0x38++0x3
|
|
line.long 0x0 "PLLCAL1,PLL Calibration Register 1"
|
|
hexmask.long.byte 0x0 24.--30. 1. "NDAC1,This field sets the limit for calibration DAC in multiple calibration mode."
|
|
tree.end
|
|
tree "PLLDIG_3"
|
|
base ad:0x4003C180
|
|
group.long 0x20++0x13
|
|
line.long 0x0 "PLLCR,PLLDIG PLL Control Register"
|
|
rbitfld.long 0x0 8.--9. "CLKCFG,Clock Configuration" "0: PLL off,?,?,3: Normal mode with PLL running."
|
|
bitfld.long 0x0 3. "LOLIE,Loss-of-lock interrupt enable." "0: Ignore loss-of-lock. Interrupt not requested.,1: Enable interrupt request upon loss-of-lock."
|
|
line.long 0x4 "PLLSR,PLLDIG PLL Status Register"
|
|
bitfld.long 0x4 3. "LOLF,Loss-of-lock flag." "0: No loss of lock detected. Interrupt service not..,1: Loss of lock detected. Interrupt service.."
|
|
rbitfld.long 0x4 2. "LOCK,Lock status bit. Indicates whether PLL has acquired lock." "0: PLL is unlocked.,1: PLL is locked."
|
|
line.long 0x8 "PLLDV,PLLDIG PLL Divider Register"
|
|
hexmask.long.byte 0x8 25.--30. 1. "RFDPHI1,PHI1 reduced frequency divider."
|
|
hexmask.long.byte 0x8 16.--21. 1. "RFDPHI,PHI reduced frequency divider."
|
|
bitfld.long 0x8 12.--14. "PREDIV,Input clock predivider." "0: Divide by 1,1: Divide by 1,2: Divide by 2,3: Divide by 3,4: Divide by 4,5: Divide by 5,6: Divide by 6,7: Divide by 7"
|
|
newline
|
|
hexmask.long.byte 0x8 0.--7. 1. "MFD,Loop multiplication factor divider."
|
|
line.long 0xC "PLLFM,PLLDIG PLL Frequency Modulation Register"
|
|
bitfld.long 0xC 30. "SSCGBYP,Modulation enable." "0: Spread spectrum modulation is not bypassed.,1: Spread spectrum modulation is bypassed."
|
|
hexmask.long.word 0xC 16.--25. 1. "STEPSIZE,Modulation period."
|
|
hexmask.long.word 0xC 0.--10. 1. "STEPNO,Increment step."
|
|
line.long 0x10 "PLLFD,PLLDIG PLL Fractional Divide Register"
|
|
bitfld.long 0x10 30. "SMDEN,Sigma Delta Modulation Enable" "0: Sigma delta modulation disabled,1: Sigma delta modulation enabled"
|
|
hexmask.long.word 0x10 0.--14. 1. "MFN,Numerator for fractional loop division factor (see Clock configuration)."
|
|
group.long 0x38++0x3
|
|
line.long 0x0 "PLLCAL1,PLL Calibration Register 1"
|
|
hexmask.long.byte 0x0 24.--30. 1. "NDAC1,This field sets the limit for calibration DAC in multiple calibration mode."
|
|
tree.end
|
|
tree "PLLDIG_4"
|
|
base ad:0x4003C200
|
|
group.long 0x20++0x13
|
|
line.long 0x0 "PLLCR,PLLDIG PLL Control Register"
|
|
rbitfld.long 0x0 8.--9. "CLKCFG,Clock Configuration" "0: PLL off,?,?,3: Normal mode with PLL running."
|
|
bitfld.long 0x0 3. "LOLIE,Loss-of-lock interrupt enable." "0: Ignore loss-of-lock. Interrupt not requested.,1: Enable interrupt request upon loss-of-lock."
|
|
line.long 0x4 "PLLSR,PLLDIG PLL Status Register"
|
|
bitfld.long 0x4 3. "LOLF,Loss-of-lock flag." "0: No loss of lock detected. Interrupt service not..,1: Loss of lock detected. Interrupt service.."
|
|
rbitfld.long 0x4 2. "LOCK,Lock status bit. Indicates whether PLL has acquired lock." "0: PLL is unlocked.,1: PLL is locked."
|
|
line.long 0x8 "PLLDV,PLLDIG PLL Divider Register"
|
|
hexmask.long.byte 0x8 25.--30. 1. "RFDPHI1,PHI1 reduced frequency divider."
|
|
hexmask.long.byte 0x8 16.--21. 1. "RFDPHI,PHI reduced frequency divider."
|
|
bitfld.long 0x8 12.--14. "PREDIV,Input clock predivider." "0: Divide by 1,1: Divide by 1,2: Divide by 2,3: Divide by 3,4: Divide by 4,5: Divide by 5,6: Divide by 6,7: Divide by 7"
|
|
newline
|
|
hexmask.long.byte 0x8 0.--7. 1. "MFD,Loop multiplication factor divider."
|
|
line.long 0xC "PLLFM,PLLDIG PLL Frequency Modulation Register"
|
|
bitfld.long 0xC 30. "SSCGBYP,Modulation enable." "0: Spread spectrum modulation is not bypassed.,1: Spread spectrum modulation is bypassed."
|
|
hexmask.long.word 0xC 16.--25. 1. "STEPSIZE,Modulation period."
|
|
hexmask.long.word 0xC 0.--10. 1. "STEPNO,Increment step."
|
|
line.long 0x10 "PLLFD,PLLDIG PLL Fractional Divide Register"
|
|
bitfld.long 0x10 30. "SMDEN,Sigma Delta Modulation Enable" "0: Sigma delta modulation disabled,1: Sigma delta modulation enabled"
|
|
hexmask.long.word 0x10 0.--14. 1. "MFN,Numerator for fractional loop division factor (see Clock configuration)."
|
|
group.long 0x38++0x3
|
|
line.long 0x0 "PLLCAL1,PLL Calibration Register 1"
|
|
hexmask.long.byte 0x0 24.--30. 1. "NDAC1,This field sets the limit for calibration DAC in multiple calibration mode."
|
|
tree.end
|
|
tree.end
|
|
tree "PMC (Power Management Controller)"
|
|
base ad:0x400C8000
|
|
group.long 0x4++0xF
|
|
line.long 0x0 "CR,PMC Control Register"
|
|
bitfld.long 0x0 31. "VM_PMC_ENABLE,PMC voltage monitor enable control bit" "0: No control bit can be written in PMC_CR..,1: This Control register can be written."
|
|
bitfld.long 0x0 5. "LVD_VDDOSC_ENABLE,LVD enable control bit" "0: LVD is disabled,1: LVD is enabled"
|
|
newline
|
|
bitfld.long 0x0 4. "LVD_VDD3p3_ENABLE,LVD enable control bit" "0: LVD is disabled,1: LVD is Enabled"
|
|
bitfld.long 0x0 3. "HVD_VDDPMC_ENABLE,HVD enable control bit" "0: HVD is disabled,1: HVD is enabled"
|
|
newline
|
|
bitfld.long 0x0 2. "LVD_VDDPMC_ENABLE,LVD enable control bit" "0: LVD is disabled,1: LVD is enabled"
|
|
bitfld.long 0x0 1. "HVD_HPVDD_ENABLE,HVD enable control bit" "0: HVD is disabled,1: HVD is enabled"
|
|
newline
|
|
bitfld.long 0x0 0. "LVD_HPVDD_ENABLE,LVD enable control bit" "0: LVD is disabled,1: LVD is enabled"
|
|
line.long 0x4 "REE,PMC Reset Event Enable"
|
|
bitfld.long 0x4 31. "VM_PMC_RST_EN,PMC voltage monitor Reset Event enable control bit" "0: No Reset event enable bits can be written in..,1: This PMC_REE register can be written"
|
|
bitfld.long 0x4 5. "LVD_VDDOSC_RST_EN,LVD Reset Event enable control bit" "0: No Reset occurs,1: A Reset occurs"
|
|
newline
|
|
bitfld.long 0x4 4. "LVD_VDD3p3_RST_EN,LVD Reset Event enable control bit" "0: No Reset occurs,1: A Reset occurs"
|
|
bitfld.long 0x4 3. "HVD_VDDPMC_RST_EN,HVD Reset Event enable control bit" "0: No Reset occurs,1: A Reset occurs"
|
|
newline
|
|
bitfld.long 0x4 2. "LVD_VDDPMC_RST_EN,LVD Reset Event enable control bit" "0: No Reset occurs,1: A Reset occurs"
|
|
bitfld.long 0x4 1. "HVD_HPVDD_RST_EN,HVD Reset Event enable control bit" "0: No Reset occurs,1: A Reset occurs"
|
|
newline
|
|
bitfld.long 0x4 0. "LVD_HPVDD_RST_EN,LVD Reset Event Enable control bit." "0: No Reset occurs,1: A Reset occurs"
|
|
line.long 0x8 "FEE,PMC Fault Event Enable"
|
|
bitfld.long 0x8 5. "LVD_VDDOSC_FAULT_EN,LVD Fault Event enable control bit" "0: No Fault reaction occurs,1: A Fault reaction occurs"
|
|
bitfld.long 0x8 4. "LVD_VDD3p3_FAULT_EN,LVD Fault Event enable control bit" "0: No Fault reaction occurs,1: A Fault reaction occurs"
|
|
newline
|
|
bitfld.long 0x8 3. "HVD_VDDPMC_FAULT_EN,HVD fault Event enable control bit" "0: No Fault reaction occurs,1: A Fault reaction occurs"
|
|
bitfld.long 0x8 2. "LVD_VDDPMC_FAULT_EN,LVD Fault Event enable control bit" "0: No Fault reaction occurs,1: A Fault reaction occurs"
|
|
newline
|
|
bitfld.long 0x8 1. "HVD_HPVDD_FAULT_EN,HVD Fault Event enable control bit" "0: No Fault reaction occurs,1: A Fault reaction occurs"
|
|
bitfld.long 0x8 0. "LVD_HPVDD_FAULT_EN,LVD Fault Event Enable control bit." "0: No Fault reaction occurs,1: A Fault reaction occurs"
|
|
line.long 0xC "IEE,PMC Interrupt Event Enable"
|
|
bitfld.long 0xC 5. "LVD_VDDOSC_INT_EN,LVD Interrupt Event enable control bit" "0: No Interrupt occurs,1: An interrupt Occurs"
|
|
bitfld.long 0xC 4. "LVD_VDD3p3_INT_EN,LVD Interrupt Event enable control bit" "0: No Interrupt occurs,1: An Interrupt occurs"
|
|
newline
|
|
bitfld.long 0xC 3. "HVD_VDDPMC_INT_EN,HVD Interrupt Event enable control bit" "0: No Interrupt occurs,1: An Interrupt occurs"
|
|
bitfld.long 0xC 2. "LVD_VDDPMC_INT_EN,LVD Interrupt Event enable control bit" "0: No Interrupt occurs,1: An Interrupt occurs"
|
|
newline
|
|
bitfld.long 0xC 1. "HVD_HPVDD_INT_EN,HVD Interrupt Event enable control bit" "0: No Interrupt occurs,1: An Interrupt occurs"
|
|
bitfld.long 0xC 0. "LVD_HPVDD_INT_EN,LVD Interrupt Event Enable control bit." "0: No Interrupt occurs,1: An Interrupt occurs"
|
|
wgroup.long 0x14++0x3
|
|
line.long 0x0 "FIR,PMC Fault Injection Register"
|
|
bitfld.long 0x0 2. "STEST_FAULT,LVD Selftest Fault injection" "0: No Fault is sent,1: Fault injected."
|
|
bitfld.long 0x0 1. "HVD_FAULT,High Voltage Detect Fault injection." "0: No Fault is sent,1: Fault injected."
|
|
newline
|
|
bitfld.long 0x0 0. "LVD_FAULT,Low Voltage Detect Fault injection." "0: No Fault is sent to FCCU,1: Fault is injected to FCCU."
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "ADC_CS,PMC ADC Channel Select Register"
|
|
hexmask.long.byte 0x0 0.--6. 1. "ADC_CS,ADC Channel Select"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "STCR,PMC Self Test Control Register"
|
|
rbitfld.long 0x0 31. "ST_DONE,Self Test Done status." "0: Self test running,1: Self test completed/not triggered."
|
|
bitfld.long 0x0 30. "ST_RESULT,ST_RESULT. Self Test result status." "0: Self Test Failed,1: Self Test Passed"
|
|
newline
|
|
hexmask.long.word 0x0 19.--29. 1. "ST_SINGLE_VD_RISE_RESULT,Single LVD Voltage detect rise result status"
|
|
hexmask.long.word 0x0 8.--18. 1. "ST_SINGLE_VD_FALL_RESULT,Single LVD Voltage detect fall result status"
|
|
newline
|
|
bitfld.long 0x0 7. "ST_FULL_SW_VD_ABORT_RESULT,Software triggered Full Voltage Detect Selftest Abort Result" "0: Selftest abort didnt occured,1: Selftest abort occured"
|
|
bitfld.long 0x0 6. "ST_SINGLE_VD_ABORT_RESULT,Single Voltage Detect Mode Selftest Abort Result" "0: Selftest Abort event didnt occured,1: Selftest Abort event occured"
|
|
newline
|
|
bitfld.long 0x0 4.--5. "ST_MODE,Self Test mode bits for testing of LVDs and HVDs." "0: Default,1: S/W triggered self test.,2: Single LVD test,?"
|
|
hexmask.long.byte 0x0 0.--3. 1. "VD_ST_CTRL,Voltage Detect Self Test Control."
|
|
tree.end
|
|
tree "QuadSPI (Quad Serial Peripheral Interface)"
|
|
base ad:0x400A6000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "MCR,Module Configuration Register"
|
|
bitfld.long 0x0 29.--31. "DQS_CD,DQS coarse delay configuration." "0: no delay on internal dqs.,?,2: shift by 1/2 flash clock cycle on internal DQS.,3: shift by 1/4 flash clock cycle on internal DQS.,4: shift by 1 flash clock cycle on internal DQS.,5: shift by 3/4 flash clock cycle on internal DQS.,6: shift by 1+ 1/2 flash clock cycle on internal DQS.,7: shift by 1+ 1/4 flash clock cycle on internal DQS"
|
|
bitfld.long 0x0 26. "REFCLK_SEL,Reference clock selection for internally generated DQS" "0: Inverted QuadSPI internal reference clock,1: Non-inverted QuadSPI internal reference clock"
|
|
newline
|
|
bitfld.long 0x0 25. "CFG_BIT,Always write '1' to this bit" "0,1"
|
|
bitfld.long 0x0 24. "DQS_MDSL,DQS Mode select" "0: DQS from external flash,1: Internally generated DQS"
|
|
newline
|
|
bitfld.long 0x0 14. "MDIS,Module Disable" "0: Enable QuadSPI clocks.,1: Disable QuadSPI clocks."
|
|
bitfld.long 0x0 11. "CLR_TXF,Clear TX FIFO/Buffer. Invalidates the TX Buffer content. This is a self-clearing field." "0: No action.,1: Read and write pointers of the TX Buffer are.."
|
|
newline
|
|
bitfld.long 0x0 10. "CLR_RXF,Clear RX FIFO. Invalidates the RX Buffer. This is a self-clearing field." "0: No action.,1: Read and write pointers of the RX Buffer are.."
|
|
bitfld.long 0x0 7. "DDR_EN,DDR mode enable" "0: 2x and 4x clocks are disabled for SDR..,1: 2x and 4x clocks are enabled supports both SDR.."
|
|
newline
|
|
bitfld.long 0x0 6. "DQS_EN,DQS enable" "0: DQS disabled.,1: DQS enabled. When enabled the incoming data is.."
|
|
bitfld.long 0x0 5. "DQS_LAT_EN,DQS Latency Enable" "0: DQS Latency disabled,1: DQS feature with latency included enabled"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "END_CFG,Defines the endianness of the QuadSPI module. For more details refer to Byte Ordering Endianess" "0,1,2,3"
|
|
bitfld.long 0x0 1. "SWRSTHD,Software reset for AHB domain" "0: No action,1: AHB domain flops are reset. Does not reset.."
|
|
newline
|
|
bitfld.long 0x0 0. "SWRSTSD,Software reset for serial flash domain" "0: No action,1: Serial Flash domain flops are reset. Does not.."
|
|
group.long 0x8++0x1F
|
|
line.long 0x0 "IPCR,IP Configuration Register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SEQID,Points to a sequence in the Look-up table"
|
|
bitfld.long 0x0 16. "PAR_EN,When set a transaction to two serial flash devices is triggered in parallel mode" "0,1"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "IDATSZ,IP data transfer size"
|
|
line.long 0x4 "FLSHCR,Flash Configuration Register"
|
|
bitfld.long 0x4 16.--17. "TDH,Serial flash data in hold time" "0: Data aligned with the posedge of Internal..,1: Data aligned with 2x serial flash half clock,2: Data aligned with 4x serial flash half clock,?"
|
|
hexmask.long.byte 0x4 8.--11. 1. "TCSH,Serial flash CS hold time in terms of serial flash clock cycles"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--3. 1. "TCSS,Serial flash CS setup time in terms of serial flash clock cycles"
|
|
line.long 0x8 "BUF0CR,Buffer0 Configuration Register"
|
|
bitfld.long 0x8 31. "HP_EN,High Priority Enable" "0,1"
|
|
hexmask.long.byte 0x8 8.--15. 1. "ADATSZ,AHB data transfer size"
|
|
newline
|
|
hexmask.long.byte 0x8 0.--4. 1. "MSTRID,Master ID"
|
|
line.long 0xC "BUF1CR,Buffer1 Configuration Register"
|
|
hexmask.long.byte 0xC 8.--15. 1. "ADATSZ,AHB data transfer size"
|
|
hexmask.long.byte 0xC 0.--4. 1. "MSTRID,Master ID"
|
|
line.long 0x10 "BUF2CR,Buffer2 Configuration Register"
|
|
hexmask.long.byte 0x10 8.--15. 1. "ADATSZ,AHB data transfer size"
|
|
hexmask.long.byte 0x10 0.--4. 1. "MSTRID,Master ID"
|
|
line.long 0x14 "BUF3CR,Buffer3 Configuration Register"
|
|
bitfld.long 0x14 31. "ALLMST,All master enable" "0,1"
|
|
hexmask.long.byte 0x14 8.--15. 1. "ADATSZ,AHB data transfer size"
|
|
newline
|
|
hexmask.long.byte 0x14 0.--4. 1. "MSTRID,Master ID: The ID of the AHB master associated with BUFFER3"
|
|
line.long 0x18 "BFGENCR,Buffer Generic Configuration Register"
|
|
bitfld.long 0x18 16. "PAR_EN,When set a transaction to two serial flash devices is triggered in parallel mode" "0,1"
|
|
hexmask.long.byte 0x18 12.--15. 1. "SEQID,Points to a sequence in the Look-up-table"
|
|
line.long 0x1C "SOCCR,SOC Configuration Register"
|
|
hexmask.long.byte 0x1C 16.--23. 1. "FDCC_FB,Fine delay chain configuration for Flash B"
|
|
hexmask.long.byte 0x1C 0.--7. 1. "FDCC_FA,Fine delay chain configuration for Flash A"
|
|
group.long 0x30++0xB
|
|
line.long 0x0 "BUF0IND,Buffer0 Top Index Register"
|
|
hexmask.long 0x0 3.--31. 1. "TPINDX0,Top index of buffer 0."
|
|
line.long 0x4 "BUF1IND,Buffer1 Top Index Register"
|
|
hexmask.long 0x4 3.--31. 1. "TPINDX1,Top index of buffer 1."
|
|
line.long 0x8 "BUF2IND,Buffer2 Top Index Register"
|
|
hexmask.long 0x8 3.--31. 1. "TPINDX2,Top index of buffer 2."
|
|
group.long 0x100++0xB
|
|
line.long 0x0 "SFAR,Serial Flash Address Register"
|
|
hexmask.long 0x0 0.--31. 1. "SFADR,Serial Flash Address. The register content is used as byte address for all following IP Commands."
|
|
line.long 0x4 "SFACR,Serial Flash Address Configuration Register"
|
|
bitfld.long 0x4 16. "WA,Word Addressable" "0: Byte addressable serial flash mode.,1: Word (2 byte) addressable serial flash mode."
|
|
hexmask.long.byte 0x4 0.--3. 1. "CAS,Column Address Space"
|
|
line.long 0x8 "SMPR,Sampling Register"
|
|
bitfld.long 0x8 6. "FSDLY,Full Speed Delay selection for SDR instructions. Select the delay with respect to the reference edge for the sample point valid for full speed commands." "0: One clock cycle delay,1: Two clock cycles delay. This bit is also used in.."
|
|
bitfld.long 0x8 5. "FSPHS,Full Speed Phase selection for SDR instructions." "0: Select sampling at non-inverted clock,1: Select sampling at inverted clock. This bit is.."
|
|
rgroup.long 0x10C++0x3
|
|
line.long 0x0 "RBSR,RX Buffer Status Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "RDCTR,Read Counter"
|
|
hexmask.long.byte 0x0 8.--13. 1. "RDBFL,RX Buffer Fill Level"
|
|
group.long 0x110++0x3
|
|
line.long 0x0 "RBCT,RX Buffer Control Register"
|
|
bitfld.long 0x0 8. "RXBRD,RX Buffer Readout. This field specifies the access scheme for the RX Buffer readout." "0: RX Buffer content is read using the AHB Bus..,1: RX Buffer content is read using the IP Bus.."
|
|
hexmask.long.byte 0x0 0.--4. 1. "WMRK,RX Buffer Watermark"
|
|
rgroup.long 0x150++0x3
|
|
line.long 0x0 "TBSR,TX Buffer Status Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "TRCTR,Transmit Counter"
|
|
hexmask.long.byte 0x0 8.--13. 1. "TRBFL,TX Buffer Fill Level"
|
|
group.long 0x154++0x7
|
|
line.long 0x0 "TBDR,TX Buffer Data Register"
|
|
hexmask.long 0x0 0.--31. 1. "TXDATA,TX Data On write access the data is written into the next available entry of the TX Buffer and the QPSI_TBSR[TRBFL] field is updated accordingly"
|
|
line.long 0x4 "TBCT,Tx Buffer Control Register"
|
|
hexmask.long.byte 0x4 0.--4. 1. "WMRK,Determines the watermark for the TX Buffer"
|
|
rgroup.long 0x15C++0x3
|
|
line.long 0x0 "SR,Status Register"
|
|
bitfld.long 0x0 27. "TXFULL,TX Buffer Full. Asserted when no more data can be stored." "0,1"
|
|
bitfld.long 0x0 26. "TXDMA,TXDMA" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "TXWA,TX Buffer watermark Available" "0,1"
|
|
bitfld.long 0x0 24. "TXEDA,Tx Buffer Enough Data Available" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "RXDMA,RX Buffer DMA. Asserted when RX Buffer read out via DMA is active i.e DMA is requested or running." "0,1"
|
|
bitfld.long 0x0 19. "RXFULL,RX Buffer Full" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "RXWE,RX Buffer Watermark Exceeded" "0,1"
|
|
bitfld.long 0x0 14. "AHB3FUL,AHB 3 Buffer Full. Asserted when AHB 3 buffer is full." "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "AHB2FUL,AHB 2 Buffer Full. Asserted when AHB 2 buffer is full." "0,1"
|
|
bitfld.long 0x0 12. "AHB1FUL,AHB 1 Buffer Full. Asserted when AHB 1 buffer is full." "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "AHB0FUL,AHB 0 Buffer Full. Asserted when AHB 0 buffer is full." "0,1"
|
|
bitfld.long 0x0 10. "AHB3NE,AHB 3 Buffer Not Empty. Asserted when AHB 3 buffer contains data." "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "AHB2NE,AHB 2 Buffer Not Empty. Asserted when AHB 2 buffer contains data." "0,1"
|
|
bitfld.long 0x0 8. "AHB1NE,AHB 1 Buffer Not Empty. Asserted when AHB 1 buffer contains data." "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "AHB0NE,AHB 0 Buffer Not Empty. Asserted when AHB 0 buffer contains data." "0,1"
|
|
bitfld.long 0x0 6. "AHBTRN,AHB Access Transaction pending" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "AHBGNT,AHB Command priority Granted: Asserted when another module has been granted priority of AHB Commands against IP Commands" "0,1"
|
|
bitfld.long 0x0 3. "KEY_FET,Key Fetch. Asserted when OTFAD enabled and AES key fetch ongoing." "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "AHB_ACC,AHB Access. Asserted when the transaction currently executed was initiated by AHB bus." "0,1"
|
|
bitfld.long 0x0 1. "IP_ACC,IP Access. Asserted when transaction currently executed was initiated by IP bus." "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "BUSY,Module Busy" "0,1"
|
|
group.long 0x160++0x7
|
|
line.long 0x0 "FR,Flag Register"
|
|
bitfld.long 0x0 30. "IAKFEF,Illegal Access during Key Fetch Error Flag" "0,1"
|
|
bitfld.long 0x0 29. "KFEF,Key Fetch Error Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "TBFF,TX Buffer Fill Flag" "0,1"
|
|
bitfld.long 0x0 26. "TBUF,TX Buffer Underrun Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "ILLINE,Illegal Instruction Error Flag" "0,1"
|
|
bitfld.long 0x0 17. "RBOF,RX Buffer Overflow Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "RBDF,RX Buffer Drain Flag" "0,1"
|
|
bitfld.long 0x0 15. "ABSEF,AHB Sequence Error Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "AITEF,AHB Illegal transaction error flag" "0,1"
|
|
bitfld.long 0x0 13. "AIBSEF,AHB Illegal Burst Size Error Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "ABOF,AHB Buffer Overflow Flag" "0,1"
|
|
bitfld.long 0x0 11. "IUEF,IP Command Usage Error Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "IPAEF,IP Command Trigger during AHB Access Error Flag" "0,1"
|
|
bitfld.long 0x0 6. "IPIEF,IP Command Trigger could not be executed Error Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "IPGEF,IP Command Trigger during AHB Grant Error Flag" "0,1"
|
|
bitfld.long 0x0 0. "TFF,IP Command Transaction Finished Flag" "0,1"
|
|
line.long 0x4 "RSER,Interrupt and DMA Request Select and Enable Register"
|
|
bitfld.long 0x4 30. "IAKFIE,Illegal Access during Key Fetch Interrupt Enable" "0: No IAKFEF interrupt will be generated,1: IAKFEF interrupt will be generated"
|
|
bitfld.long 0x4 29. "KFEIE,Key Fetch Error Interrupt Enable" "0: No KFEF interrupt will be generated,1: KFEF interrupt will be generated"
|
|
newline
|
|
bitfld.long 0x4 27. "TBFIE,TX Buffer Fill Interrupt Enable" "0: No TBFF interrupt will be generated,1: TBFF interrupt will be generated"
|
|
bitfld.long 0x4 26. "TBUIE,TX Buffer Underrun Interrupt Enable" "0: No TBUF interrupt will be generated,1: TBUF interrupt will be generated"
|
|
newline
|
|
bitfld.long 0x4 25. "TBFDE,TX Buffer Fill DMA Enable" "0: No DMA request will be generated,1: DMA request will be generated"
|
|
bitfld.long 0x4 23. "ILLINIE,Illegal Instruction Error Interrupt Enable. Triggered by ILLINE flag in QSPI_FR" "0: No ILLINE interrupt will be generated,1: ILLINE interrupt will be generated"
|
|
newline
|
|
bitfld.long 0x4 21. "RBDDE,RX Buffer Drain DMA Enable: Enables generation of DMA requests for RX Buffer Drain" "0: No DMA request will be generated,1: DMA request will be generated"
|
|
bitfld.long 0x4 17. "RBOIE,RX Buffer Overflow Interrupt Enable" "0: No RBOF interrupt will be generated,1: RBOF interrupt will be generated"
|
|
newline
|
|
bitfld.long 0x4 16. "RBDIE,RX Buffer Drain Interrupt Enable: Enables generation of IRQ requests for RX Buffer Drain" "0: No RBDF interrupt will be generated,1: RBDF Interrupt will be generated"
|
|
bitfld.long 0x4 15. "ABSEIE,AHB Sequence Error Interrupt Enable: Triggered by ABSEF flags of QSPI_FR" "0: No ABSEF interrupt will be generated,1: ABSEF interrupt will be generated"
|
|
newline
|
|
bitfld.long 0x4 14. "AITIE,AHB Illegal transaction interrupt enable." "0: No AITEF interrupt will be generated,1: AITEF interrupt will be generated"
|
|
bitfld.long 0x4 13. "AIBSIE,AHB Illegal Burst Size Interrupt Enable" "0: No AIBSEF interrupt will be generated,1: AIBSEF interrupt will be generated"
|
|
newline
|
|
bitfld.long 0x4 12. "ABOIE,AHB Buffer Overflow Interrupt Enable" "0: No ABOF interrupt will be generated,1: ABOF interrupt will be generated"
|
|
bitfld.long 0x4 11. "IUEIE,IP Command Usage Error Interrupt Enable" "0: No IUEF interrupt will be generated,1: IUEF interrupt will be generated"
|
|
newline
|
|
bitfld.long 0x4 7. "IPAEIE,IP Command Trigger during AHB Access Error Interrupt Enable" "0: No IPAEF interrupt will be generated,1: IPAEF interrupt will be generated"
|
|
bitfld.long 0x4 6. "IPIEIE,IP Command Trigger during IP Access Error Interrupt Enable" "0: No IPIEF interrupt will be generated,1: IPIEF interrupt will be generated"
|
|
newline
|
|
bitfld.long 0x4 4. "IPGEIE,IP Command Trigger during AHB Grant Error Interrupt Enable" "0: No IPGEF interrupt will be generated,1: IPGEF interrupt will be generated"
|
|
bitfld.long 0x4 0. "TFIE,Transaction Finished Interrupt Enable" "0: No TFF interrupt will be generated,1: TFF interrupt will be generated"
|
|
rgroup.long 0x168++0x3
|
|
line.long 0x0 "SPNDST,Sequence Suspend Status Register"
|
|
hexmask.long.byte 0x0 9.--15. 1. "DATLFT,Data left: Provides information about the amount of data left to be read in the suspended sequence"
|
|
bitfld.long 0x0 6.--7. "SPDBUF,Suspended Buffer: Provides the suspended buffer number. Valid only when SUSPND is set to 1'b1" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 0. "SUSPND,When set it signifies that a sequence is in suspended state" "0,1"
|
|
wgroup.long 0x16C++0x3
|
|
line.long 0x0 "SPTRCLR,Sequence Pointer Clear Register"
|
|
bitfld.long 0x0 8. "IPPTRC,IP Pointer Clear: 1: Clears the sequence pointer for IP accesses as defined in QuadSPI_IPCR This is a self-clearing field" "?,1: Clears the sequence pointer for IP accesses as.."
|
|
bitfld.long 0x0 0. "BFPTRC,Buffer Pointer Clear: 1: Clears the sequence pointer for AHB accesses as defined in QuadSPI_BFGENCR" "?,1: Clears the sequence pointer for AHB accesses as.."
|
|
group.long 0x180++0xF
|
|
line.long 0x0 "SFA1AD,Serial Flash A1 Top Address"
|
|
hexmask.long.tbyte 0x0 10.--31. 1. "TPADA1,Top address for Serial Flash A1. In effect TPADxx is the first location of the next memory."
|
|
line.long 0x4 "SFA2AD,Serial Flash A2 Top Address"
|
|
hexmask.long.tbyte 0x4 10.--31. 1. "TPADA2,Top address for Serial Flash A2. In effect TPxxAD is the first location of the next memory."
|
|
line.long 0x8 "SFB1AD,Serial Flash B1Top Address"
|
|
hexmask.long.tbyte 0x8 10.--31. 1. "TPADB1,Top address for Serial Flash B1.In effect TPxxAD is the first location of the next memory."
|
|
line.long 0xC "SFB2AD,Serial Flash B2Top Address"
|
|
hexmask.long.tbyte 0xC 10.--31. 1. "TPADB2,Top address for Serial Flash B2. In effect TPxxAD is the first location of the next memory."
|
|
repeat 32. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x200)++0x3
|
|
line.long 0x0 "RBDR$1,RX Buffer Data Register"
|
|
hexmask.long 0x0 0.--31. 1. "RXDATA,RX Data"
|
|
repeat.end
|
|
group.long 0x300++0x7
|
|
line.long 0x0 "LUTKEY,LUT Key Register"
|
|
hexmask.long 0x0 0.--31. 1. "KEY,The key to lock or unlock the LUT. The KEY is 0x5AF05AF0. The read value is always 0x5AF05AF0"
|
|
line.long 0x4 "LCKCR,LUT Lock Configuration Register"
|
|
bitfld.long 0x4 1. "UNLOCK,Unlocks the LUT when the following two conditions are met: 1" "0,1"
|
|
bitfld.long 0x4 0. "LOCK,Locks the LUT when the following condition is met: This register is written just after the LUTKEYLUT Key Register The LUT key register was written with 0x5AF05AF0 key" "0,1"
|
|
repeat 64. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x310)++0x3
|
|
line.long 0x0 "LUT$1,Look-up Table register"
|
|
hexmask.long.byte 0x0 26.--31. 1. "INSTR1,Instruction 1"
|
|
bitfld.long 0x0 24.--25. "PAD1,Pad information for INSTR1." "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--23. 1. "OPRND1,Operand for INSTR1."
|
|
hexmask.long.byte 0x0 10.--15. 1. "INSTR0,Instruction 0"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "PAD0,Pad information for INSTR0." "0: 1 Pad,1: 2 Pads,2: 4 Pads,3: 8 Pads"
|
|
hexmask.long.byte 0x0 0.--7. 1. "OPRND0,Operand for INSTR0."
|
|
repeat.end
|
|
tree.end
|
|
tree "SAR_ADC (Analog-to-Digital Converter)"
|
|
base ad:0x4004D000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "MCR,Main Configuration Register"
|
|
bitfld.long 0x0 31. "OWREN,Overwrite Enable" "0: Older valid conversion data is not overwritten..,1: Newer conversion result is always overwritten.."
|
|
bitfld.long 0x0 30. "WLSIDE,Selects whether conversion data is left or right aligned." "0: The conversion data is written right aligned..,1: Data is written left aligned (from 15 to (15 -.."
|
|
newline
|
|
bitfld.long 0x0 29. "MODE,Normal Scan Mode Select" "0: One-Shot Operation mode: configuration for one..,1: Scan Operation mode: configuration for.."
|
|
bitfld.long 0x0 24. "NSTART,Normal Conversion Start" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "JTRGEN,Injection External Trigger Enable" "0: Injected conversion not started by external..,1: Injected conversion is started by external trigger"
|
|
bitfld.long 0x0 21. "JEDGE,Injection Trigger Edge Selection" "0: Falling edge is trigger,1: Rising edge is trigger"
|
|
newline
|
|
bitfld.long 0x0 20. "JSTART,Start Injection Conversion" "0,1"
|
|
bitfld.long 0x0 15. "STCL,Self-Testing Configuration Lock" "0: Self-test registers are not locked.,1: The self-test configuration is locked (STCR1.."
|
|
newline
|
|
bitfld.long 0x0 14. "CALSTART,Calibration Start" "0: No effect (default return value),1: Start calibration"
|
|
bitfld.long 0x0 13. "AVGEN,Average Enable" "0: Disable,1: Enable (default)"
|
|
newline
|
|
bitfld.long 0x0 11.--12. "NRSMPL,Number of Averaging Samples." "0: 16 samples,1: 32 samples,2: 128 samples,3: 512 samples"
|
|
bitfld.long 0x0 9.--10. "TSAMP,Sample Period of Calibration Conversions" "0: 22 cycles of ADC clk (default),1: 8 cycles of ADC clk,2: 16 cycle of ADC clk,3: 32 cycle of ADC clk"
|
|
newline
|
|
bitfld.long 0x0 8. "ADCLKSE,Analog Clock Frequency Select" "0: AD_clk frequency is defined by..,1: AD_clk frequency is equal to bus clock frequency."
|
|
bitfld.long 0x0 7. "ABORTCHAIN,Abort Conversion Chain" "0: Chain conversion has been aborted or Chain..,1: Abort current Chain conversion."
|
|
newline
|
|
bitfld.long 0x0 6. "ABORT,Abort Conversion" "0,1"
|
|
bitfld.long 0x0 5. "ACKO,Auto-Clock-Off Mode Enable" "0: Auto-Clock-Off feature is disabled.,1: Auto-Clock-Off feature is enabled."
|
|
newline
|
|
bitfld.long 0x0 4. "ADCLKDIV,Analog Clock Divide Factor" "0: AD_clk is bus_clock divded by two (1/2) (default),1: AD_clk is bus_clock divded by four (1/4)"
|
|
bitfld.long 0x0 0. "PWDN,Power down enable" "0: When ADC status is in Power Down mode..,1: Request to entner Power Down mode."
|
|
line.long 0x4 "MSR,Main Status Register"
|
|
rbitfld.long 0x4 31. "CALIBRTD,SAR_ADC Calibration Status" "0: Uncalibrated or Calibration unsuccessful,1: Calibrated or Calibration successful"
|
|
bitfld.long 0x4 30. "CALFAIL,Calibration Failed" "0: Calibration passed (must be checked with CALBUSY..,1: Calibration failed"
|
|
newline
|
|
rbitfld.long 0x4 29. "CALBUSY,Calibration busy" "0: ADC is ready for use,1: ADC is busy in a calibration process"
|
|
rbitfld.long 0x4 24. "NSTART,Normal Conversion Status" "0: Normal conversion is not in process.,1: Normal conversion is in process."
|
|
newline
|
|
rbitfld.long 0x4 23. "JABORT,Injected conversion Abort Status" "0: Injected conversion has not been aborted.,1: Injected conversion has been aborted."
|
|
rbitfld.long 0x4 20. "JSTART,Injected Conversion Status" "0: Injected conversion is not in process.,1: Injected conversion is in process."
|
|
newline
|
|
rbitfld.long 0x4 18. "SELF_TEST_S,SELF_TEST_S signals that a self-test conversion is in process." "0: Self-test conversion is not in process,1: Self-test conversion is in process"
|
|
hexmask.long.byte 0x4 9.--15. 1. "CHADDR,Channel Address"
|
|
newline
|
|
rbitfld.long 0x4 5. "ACKO,>Auto Clock Off Enable" "0: Auto Clock Off feature is not enabled,1: Auto Clock Off feature is enabled"
|
|
rbitfld.long 0x4 0.--2. "ADCSTATUS,ADC Status" "0,1,2,3,4,5,6,7"
|
|
group.long 0x10++0xB
|
|
line.long 0x0 "ISR,Interrupt Status Register"
|
|
bitfld.long 0x0 3. "JEOC,Injected Channel End Of Conversion" "0: Injected channel end of conversion has not..,1: Injected channel end of conversion has occurred"
|
|
bitfld.long 0x0 2. "JECH,Injected End Of Conversion Chain" "0: Injected channel end of conversion chain has not..,1: Injected channel end of conversion chain has.."
|
|
newline
|
|
bitfld.long 0x0 1. "EOC,End of Channel Conversion" "0: Channel end of conversion has not occurred,1: Channel end of conversion has occurred"
|
|
bitfld.long 0x0 0. "ECH,End of Conversion Chain" "0: End of conversion chain has not occurred,1: End of conversion chain has occurred"
|
|
line.long 0x4 "CEOCFR0,Channel Pending Register"
|
|
bitfld.long 0x4 7. "EOC_CH7,Channel 7 conversion complete." "0: Conversion not complete,1: Conversion complete"
|
|
bitfld.long 0x4 6. "EOC_CH6,Channel 6 conversion complete." "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
|
bitfld.long 0x4 5. "EOC_CH5,Channel 5 conversion complete." "0: Conversion not complete,1: Conversion complete"
|
|
bitfld.long 0x4 4. "EOC_CH4,Channel 4 conversion complete." "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
|
bitfld.long 0x4 3. "EOC_CH3,Channel 3 conversion complete." "0: Conversion not complete,1: Conversion complete"
|
|
bitfld.long 0x4 2. "EOC_CH2,Channel 2 conversion complete." "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
|
bitfld.long 0x4 1. "EOC_CH1,Channel 1 conversion complete." "0: Conversion not complete,1: Conversion complete"
|
|
bitfld.long 0x4 0. "EOC_CH0,Channel 0 conversion complete." "0: Conversion not complete,1: Conversion complete"
|
|
line.long 0x8 "CEOCFR1,Channel Pending Register 1"
|
|
bitfld.long 0x8 7. "EOC_CH39,Channel 39 conversion complete." "0: Conversion not complete,1: Conversion complete"
|
|
bitfld.long 0x8 6. "EOC_CH38,Channel 38 conversion complete." "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
|
bitfld.long 0x8 5. "EOC_CH37,Channel 37 conversion complete." "0: Conversion not complete,1: Conversion complete"
|
|
bitfld.long 0x8 4. "EOC_CH36,Channel 36 conversion complete." "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
|
bitfld.long 0x8 3. "EOC_CH35,Channel 35 conversion complete." "0: Conversion not complete,1: Conversion complete"
|
|
bitfld.long 0x8 2. "EOC_CH34,Channel 34 conversion complete." "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
|
bitfld.long 0x8 1. "EOC_CH33,Channel 33 conversion complete." "0: Conversion not complete,1: Conversion complete"
|
|
bitfld.long 0x8 0. "EOC_CH32,Channel 32 conversion complete." "0: Conversion not complete,1: Conversion complete"
|
|
group.long 0x20++0xB
|
|
line.long 0x0 "IMR,Interrupt Mask Register"
|
|
bitfld.long 0x0 3. "MSKJEOC,End of Injected Conversion Interrupt Mask" "0: End of Injected Conversion Inerrupt Disabled,1: End of Injected Conversion Inerrupt Enabled"
|
|
bitfld.long 0x0 2. "MSKJECH,End of Injected Chain Conversion Interrupt Mask" "0: End of Injected Chain Conversion Inerrupt Disabled,1: End of Injected Chain Conversion Inerrupt Enabled"
|
|
newline
|
|
bitfld.long 0x0 1. "MSKEOC,End of Conversion Interrupt Mask" "0: End of Conversion Inerrupt Disabled,1: End of Conversion Inerrupt Enabled"
|
|
bitfld.long 0x0 0. "MSKECH,End of Chain Conversion Interrupt Mask" "0: End of Chain Conversion Inerrupt Disabled,1: End of Chain Conversion Inerrupt Enabled"
|
|
line.long 0x4 "CIMR0,Channel Interrupt Mask Register 0"
|
|
bitfld.long 0x4 7. "CIM7,Channel 7 interrupt enable." "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x4 6. "CIM6,Channel 6 interrupt enable." "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x4 5. "CIM5,Channel 5 interrupt enable." "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x4 4. "CIM4,Channel 4 interrupt enable." "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x4 3. "CIM3,Channel 3 interrupt enable." "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x4 2. "CIM2,Channel 2 interrupt enable." "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x4 1. "CIM1,Channel 1 interrupt enable." "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x4 0. "CIM0,Channel 0 interrupt enable." "0: Interrupt disabled,1: Interrupt enabled"
|
|
line.long 0x8 "CIMR1,Channel Interrupt Mask Register 1"
|
|
bitfld.long 0x8 7. "CIM39,Channel 39 interrupt enable." "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x8 6. "CIM38,Channel 38 interrupt enable." "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x8 5. "CIM37,Channel 37 interrupt enable." "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x8 4. "CIM36,Channel 36 interrupt enable." "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x8 3. "CIM35,Channel 35 interrupt enable." "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x8 2. "CIM34,Channel 34 interrupt enable." "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x8 1. "CIM33,Channel 33 interrupt enable." "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x8 0. "CIM32,Channel 32 interrupt enable." "0: Interrupt disabled,1: Interrupt enabled"
|
|
group.long 0x30++0x7
|
|
line.long 0x0 "WTISR,Watchdog Threshold Interrupt Status Register"
|
|
bitfld.long 0x0 15. "WDG7H,Interrupt generated due to channel conversion value above high level threshold." "0: Interrupt not asserted,1: Interrupt asserted"
|
|
bitfld.long 0x0 14. "WDG7L,Interrupt generated due to channel conversion value below low level threshold." "0: Interrupt not asserted,1: Interrupt asserted"
|
|
newline
|
|
bitfld.long 0x0 13. "WDG6H,Interrupt generated due to channel conversion value above high level threshold." "0: Interrupt not asserted,1: Interrupt asserted"
|
|
bitfld.long 0x0 12. "WDG6L,Interrupt generated due to channel conversion value below low level threshold." "0: Interrupt not asserted,1: Interrupt asserted"
|
|
newline
|
|
bitfld.long 0x0 11. "WDG5H,Interrupt generated due to channel conversion value above high level threshold." "0: Interrupt not asserted,1: Interrupt asserted"
|
|
bitfld.long 0x0 10. "WDG5L,Interrupt generated due to channel conversion value below low level threshold." "0: Interrupt not asserted,1: Interrupt asserted"
|
|
newline
|
|
bitfld.long 0x0 9. "WDG4H,Interrupt generated due to channel conversion value above high level threshold." "0: Interrupt not asserted,1: Interrupt asserted"
|
|
bitfld.long 0x0 8. "WDG4L,Interrupt generated due to channel conversion value below low level threshold." "0: Interrupt not asserted,1: Interrupt asserted"
|
|
newline
|
|
bitfld.long 0x0 7. "WDG3H,Interrupt generated due to channel conversion value above high level threshold." "0: Interrupt not asserted,1: Interrupt asserted"
|
|
bitfld.long 0x0 6. "WDG3L,Interrupt generated due to channel conversion value below low level threshold." "0: Interrupt not asserted,1: Interrupt asserted"
|
|
newline
|
|
bitfld.long 0x0 5. "WDG2H,Interrupt generated due to channel conversion value above high level threshold." "0: Interrupt not asserted,1: Interrupt asserted"
|
|
bitfld.long 0x0 4. "WDG2L,Interrupt generated due to channel conversion value below low level threshold." "0: Interrupt not asserted,1: Interrupt asserted"
|
|
newline
|
|
bitfld.long 0x0 3. "WDG1H,Interrupt generated due to channel conversion value above high level threshold." "0: Interrupt not asserted,1: Interrupt asserted"
|
|
bitfld.long 0x0 2. "WDG1L,Interrupt generated due to channel conversion value below low level threshold." "0: Interrupt not asserted,1: Interrupt asserted"
|
|
newline
|
|
bitfld.long 0x0 1. "WDG0H,Interrupt generated due to channel conversion value above high low level threshold." "0: Interrupt not asserted,1: Interrupt asserted"
|
|
bitfld.long 0x0 0. "WDG0L,Interrupt generated due to channel conversion value below low level threshold." "0: Interrupt not asserted,1: Interrupt asserted"
|
|
line.long 0x4 "WTIMR,Watchdog Threshold Interrupt Mask Register"
|
|
bitfld.long 0x4 15. "MSKWDG7H,This corresponds to the mask bit for the interrupt generated on the converted value being lower than the corresponding THRHLRn[THRL] threshold" "0,1"
|
|
bitfld.long 0x4 14. "MSKWDG7L,This corresponds to the mask bit for the interrupt generated on the converted value being lower than the corresponding THRHLRn[THRL] threshold" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
newline
|
|
bitfld.long 0x4 13. "MSKWDG6H,This corresponds to the mask bit for the interrupt generated on the converted value being lower than the corresponding THRHLRn[THRL] threshold" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
bitfld.long 0x4 12. "MSKWDG6L,This corresponds to the mask bit for the interrupt generated on the converted value being lower than the corresponding THRHLRn[THRL] threshold" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
newline
|
|
bitfld.long 0x4 11. "MSKWDG5H,This corresponds to the mask bit for the interrupt generated on the converted value being lower than the corresponding THRHLRn[THRL] threshold" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
bitfld.long 0x4 10. "MSKWDG5L,This corresponds to the mask bit for the interrupt generated on the converted value being lower than the corresponding THRHLRn[THRL] threshold" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
newline
|
|
bitfld.long 0x4 9. "MSKWDG4H,This corresponds to the mask bit for the interrupt generated on the converted value being lower than the corresponding THRHLRn[THRL] threshold" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
bitfld.long 0x4 8. "MSKWDG4L,This corresponds to the mask bit for the interrupt generated on the converted value being lower than the corresponding THRHLRn[THRL] threshold" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
newline
|
|
bitfld.long 0x4 7. "MSKWDG3H,This corresponds to the mask bit for the interrupt generated on the converted value being lower than the corresponding THRHLRn[THRL] threshold" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
bitfld.long 0x4 6. "MSKWDG3L,This corresponds to the mask bit for the interrupt generated on the converted value being lower than the corresponding THRHLRn[THRL] threshold" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
newline
|
|
bitfld.long 0x4 5. "MSKWDG2H,This corresponds to the mask bit for the interrupt generated on the converted value being lower than the corresponding THRHLRn[THRL] threshold" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
bitfld.long 0x4 4. "MSKWDG2L,This corresponds to the mask bit for the interrupt generated on the converted value being lower than the corresponding THRHLRn[THRL] threshold" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
newline
|
|
bitfld.long 0x4 3. "MSKWDG1H,This corresponds to the mask bit for the interrupt generated on the converted value being higher than the corresponding THRHLRn[THRH] threshold" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
bitfld.long 0x4 2. "MSKWDG1L,This corresponds to the mask bit for the interrupt generated on the converted value being lower than the corresponding THRHLRn[THRL] threshold" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
newline
|
|
bitfld.long 0x4 1. "MSKWDG0H,This corresponds to the mask bit for the interrupt generated on the converted value being higher than the corresponding THRHLRn[THRH] threshold" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
bitfld.long 0x4 0. "MSKWDG0L,This corresponds to the mask bit for the interrupt generated on the converted value being lower than the corresponding THRHLRn[THRL] threshold" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
group.long 0x40++0xB
|
|
line.long 0x0 "DMAE,DMAE Register"
|
|
bitfld.long 0x0 1. "DCLR,DMA Clear sequence enable" "0: DMA request cleared by Acknowledge from DMA..,1: DMA request cleared on read of data registers"
|
|
bitfld.long 0x0 0. "DMAEN,DMA global enable." "0: DMA feature is disabled.,1: DMA feature is enabled."
|
|
line.long 0x4 "DMAR0,DMA Register 0"
|
|
bitfld.long 0x4 7. "DMA7,Channel 7 DMA enable." "0: Transfer of data in DMA mode is disabled,1: Transfer of data in DMA mode is enabled"
|
|
bitfld.long 0x4 6. "DMA6,Channel 6 DMA enable." "0: Transfer of data in DMA mode is disabled,1: Transfer of data in DMA mode is enabled"
|
|
newline
|
|
bitfld.long 0x4 5. "DMA5,Channel 5 DMA enable." "0: Transfer of data in DMA mode is disabled,1: Transfer of data in DMA mode is enabled"
|
|
bitfld.long 0x4 4. "DMA4,Channel 4 DMA enable." "0: Transfer of data in DMA mode is disabled,1: Transfer of data in DMA mode is enabled"
|
|
newline
|
|
bitfld.long 0x4 3. "DMA3,Channel 3 DMA enable." "0: Transfer of data in DMA mode is disabled,1: Transfer of data in DMA mode is enabled"
|
|
bitfld.long 0x4 2. "DMA2,Channel 2 DMA enable." "0: Transfer of data in DMA mode is disabled,1: Transfer of data in DMA mode is enabled"
|
|
newline
|
|
bitfld.long 0x4 1. "DMA1,Channel 1 DMA enable." "0: Transfer of data in DMA mode is disabled,1: Transfer of data in DMA mode is enabled"
|
|
bitfld.long 0x4 0. "DMA0,Channel 0 DMA enable." "0: Transfer of data in DMA mode is disabled,1: Transfer of data in DMA mode is enabled"
|
|
line.long 0x8 "DMAR1,DMA Register 1"
|
|
bitfld.long 0x8 7. "DMA39,Channel 39 DMA enable." "0: Transfer of data in DMA mode is disabled,1: Transfer of data in DMA mode is enabled"
|
|
bitfld.long 0x8 6. "DMA38,Channel 38 DMA enable." "0: Transfer of data in DMA mode is disabled,1: Transfer of data in DMA mode is enabled"
|
|
newline
|
|
bitfld.long 0x8 5. "DMA37,Channel 37 DMA enable." "0: Transfer of data in DMA mode is disabled,1: Transfer of data in DMA mode is enabled"
|
|
bitfld.long 0x8 4. "DMA36,Channel 36 DMA enable." "0: Transfer of data in DMA mode is disabled,1: Transfer of data in DMA mode is enabled"
|
|
newline
|
|
bitfld.long 0x8 3. "DMA35,Channel 35 DMA enable." "0: Transfer of data in DMA mode is disabled,1: Transfer of data in DMA mode is enabled"
|
|
bitfld.long 0x8 2. "DMA34,Channel 34 DMA enable." "0: Transfer of data in DMA mode is disabled,1: Transfer of data in DMA mode is enabled"
|
|
newline
|
|
bitfld.long 0x8 1. "DMA33,Channel 33 DMA enable." "0: Transfer of data in DMA mode is disabled,1: Transfer of data in DMA mode is enabled"
|
|
bitfld.long 0x8 0. "DMA32,Channel 32 DMA enable." "0: Transfer of data in DMA mode is disabled,1: Transfer of data in DMA mode is enabled"
|
|
group.long 0x60++0xF
|
|
line.long 0x0 "THRHLR0,Analog Watchdog Threshold Register 0"
|
|
hexmask.long.word 0x0 16.--27. 1. "THRH,High threshold value for channel n."
|
|
hexmask.long.word 0x0 0.--11. 1. "THRL,Low threshold value for channel n."
|
|
line.long 0x4 "THRHLR1,Analog Watchdog Threshold Register 1"
|
|
hexmask.long.word 0x4 16.--27. 1. "THRH,High threshold value for channel n."
|
|
hexmask.long.word 0x4 0.--11. 1. "THRL,Low threshold value for channel n."
|
|
line.long 0x8 "THRHLR2,Analog Watchdog Threshold Register 2"
|
|
hexmask.long.word 0x8 16.--27. 1. "THRH,High threshold value for channel n."
|
|
hexmask.long.word 0x8 0.--11. 1. "THRL,Low threshold value for channel n."
|
|
line.long 0xC "THRHLR3,Analog Watchdog Threshold Register 2"
|
|
hexmask.long.word 0xC 16.--27. 1. "THRH,High threshold value for channel n."
|
|
hexmask.long.word 0xC 0.--11. 1. "THRL,Low threshold value for channel n."
|
|
group.long 0x80++0xB
|
|
line.long 0x0 "PSCR,Presampling Control Register"
|
|
bitfld.long 0x0 3.--4. "PREVAL1,Internal Presampling voltage selection." "0,1,2,3"
|
|
bitfld.long 0x0 1.--2. "PREVAL0,Internal Presampling voltage selection." "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 0. "PRECONV,Convert Presampled value If bit PRECONV is set presampling is followed by the conversion" "0,1"
|
|
line.long 0x4 "PSR0,Presampling Register 0"
|
|
bitfld.long 0x4 7. "PRES7,Presampling enable for channel 7." "0: Presampling is disabled.,1: Presampling is enabled."
|
|
bitfld.long 0x4 6. "PRES6,Presampling enable for channel 6." "0: Presampling is disabled.,1: Presampling is enabled."
|
|
newline
|
|
bitfld.long 0x4 5. "PRES5,Presampling enable for channel 5." "0: Presampling is disabled.,1: Presampling is enabled."
|
|
bitfld.long 0x4 4. "PRES4,Presampling enable for channel 4." "0: Presampling is disabled.,1: Presampling is enabled."
|
|
newline
|
|
bitfld.long 0x4 3. "PRES3,Presampling enable for channel 3." "0: Presampling is disabled.,1: Presampling is enabled."
|
|
bitfld.long 0x4 2. "PRES2,Presampling enable for channel 2." "0: Presampling is disabled.,1: Presampling is enabled."
|
|
newline
|
|
bitfld.long 0x4 1. "PRES1,Presampling enable for channel 1." "0: Presampling is disabled.,1: Presampling is enabled."
|
|
bitfld.long 0x4 0. "PRES0,Presampling enable for channel 0." "0: Presampling is disabled.,1: Presampling is enabled."
|
|
line.long 0x8 "PSR1,Presampling Register 1"
|
|
bitfld.long 0x8 7. "PRES39,Presampling enable for channel 39." "0: Presampling is disabled,1: Presampling is enabled"
|
|
bitfld.long 0x8 6. "PRES38,Presampling enable for channel 38." "0: Presampling is disabled,1: Presampling is enabled"
|
|
newline
|
|
bitfld.long 0x8 5. "PRES37,Presampling enable for channel 37." "0: Presampling is disabled,1: Presampling is enabled"
|
|
bitfld.long 0x8 4. "PRES36,Presampling enable for channel 36." "0: Presampling is disabled,1: Presampling is enabled"
|
|
newline
|
|
bitfld.long 0x8 3. "PRES35,Presampling enable for channel 35." "0: Presampling is disabled,1: Presampling is enabled"
|
|
bitfld.long 0x8 2. "PRES34,Presampling enable for channel 34." "0: Presampling is disabled,1: Presampling is enabled"
|
|
newline
|
|
bitfld.long 0x8 1. "PRES33,Presampling enable for channel 33." "0: Presampling is disabled,1: Presampling is enabled"
|
|
bitfld.long 0x8 0. "PRES32,Presampling enable for channel 32." "0: Presampling is disabled,1: Presampling is enabled"
|
|
group.long 0x94++0x7
|
|
line.long 0x0 "CTR0,Conversion Timing Register 0"
|
|
hexmask.long.byte 0x0 0.--7. 1. "INPSAMP,Sampling Phase Duration"
|
|
line.long 0x4 "CTR1,Conversion Timing Register 2"
|
|
hexmask.long.byte 0x4 0.--7. 1. "INPSAMP,Sampling Phase Duration"
|
|
group.long 0xA4++0x7
|
|
line.long 0x0 "NCMR0,Normal Conversion Mask Register"
|
|
bitfld.long 0x0 7. "CH7,Normal sampling enable for channel 7." "0: Normal sampling is disabled.,1: Normal sampling is enabled."
|
|
bitfld.long 0x0 6. "CH6,Normal sampling enable for channel 6." "0: Normal sampling is disabled.,1: Normal sampling is enabled."
|
|
newline
|
|
bitfld.long 0x0 5. "CH5,Normal sampling enable for channel 5." "0: Normal sampling is disabled.,1: Normal sampling is enabled."
|
|
bitfld.long 0x0 4. "CH4,Normal sampling enable for channel 4." "0: Normal sampling is disabled.,1: Normal sampling is enabled."
|
|
newline
|
|
bitfld.long 0x0 3. "CH3,Normal sampling enable for channel 3." "0: Normal sampling is disabled.,1: Normal sampling is enabled."
|
|
bitfld.long 0x0 2. "CH2,Normal sampling enable for channel 2." "0: Normal sampling is disabled.,1: Normal sampling is enabled."
|
|
newline
|
|
bitfld.long 0x0 1. "CH1,Normal sampling enable for channel 1." "0: Normal sampling is disabled.,1: Normal sampling is enabled."
|
|
bitfld.long 0x0 0. "CH0,Normal sampling enable for channel 0." "0: Normal sampling is disabled.,1: Normal sampling is enabled."
|
|
line.long 0x4 "NCMR1,Normal Conversion Mask Register"
|
|
bitfld.long 0x4 7. "CH39,Normal sampling enable for channel 39." "0: Normal sampling is disabled.,1: Normal sampling is enabled."
|
|
bitfld.long 0x4 6. "CH38,Normal sampling enable for channel 38." "0: Normal sampling is disabled.,1: Normal sampling is enabled."
|
|
newline
|
|
bitfld.long 0x4 5. "CH37,Normal sampling enable for channel 37." "0: Normal sampling is disabled.,1: Normal sampling is enabled."
|
|
bitfld.long 0x4 4. "CH36,Normal sampling enable for channel 36." "0: Normal sampling is disabled.,1: Normal sampling is enabled."
|
|
newline
|
|
bitfld.long 0x4 3. "CH35,Normal sampling enable for channel 35." "0: Normal sampling is disabled.,1: Normal sampling is enabled."
|
|
bitfld.long 0x4 2. "CH34,Normal sampling enable for channel 34." "0: Normal sampling is disabled.,1: Normal sampling is enabled."
|
|
newline
|
|
bitfld.long 0x4 1. "CH33,Normal sampling enable for channel 33." "0: Normal sampling is disabled.,1: Normal sampling is enabled."
|
|
bitfld.long 0x4 0. "CH32,Normal sampling enable for channel 32." "0: Normal sampling is disabled.,1: Normal sampling is enabled."
|
|
group.long 0xB4++0x7
|
|
line.long 0x0 "JCMR0,Injected Conversion Mask Register"
|
|
bitfld.long 0x0 7. "CH7,Injected sampling enable for channel 7." "0: Injected sampling is disabled.,1: Injected sampling is enabled."
|
|
bitfld.long 0x0 6. "CH6,Injected sampling enable for channel 6." "0: Injected sampling is disabled.,1: Injected sampling is enabled."
|
|
newline
|
|
bitfld.long 0x0 5. "CH5,Injected sampling enable for channel 5." "0: Injected sampling is disabled.,1: Injected sampling is enabled."
|
|
bitfld.long 0x0 4. "CH4,Injected sampling enable for channel 4." "0: Injected sampling is disabled.,1: Injected sampling is enabled."
|
|
newline
|
|
bitfld.long 0x0 3. "CH3,Injected sampling enable for channel 3." "0: Injected sampling is disabled.,1: Injected sampling is enabled."
|
|
bitfld.long 0x0 2. "CH2,Injected sampling enable for channel 2." "0: Injected sampling is disabled.,1: Injected sampling is enabled."
|
|
newline
|
|
bitfld.long 0x0 1. "CH1,Injected sampling enable for channel 1." "0: Injected sampling is disabled.,1: Injected sampling is enabled."
|
|
bitfld.long 0x0 0. "CH0,Injected sampling enable for channel 0." "0: Injected sampling is disabled.,1: Injected sampling is enabled."
|
|
line.long 0x4 "JCMR1,Injected Conversion Mask Register"
|
|
bitfld.long 0x4 7. "CH39,Injected sampling enable for channel 39." "0: Injected sampling is disabled.,1: Injected sampling is enabled."
|
|
bitfld.long 0x4 6. "CH38,Injected sampling enable for channel 38." "0: Injected sampling is disabled.,1: Injected sampling is enabled."
|
|
newline
|
|
bitfld.long 0x4 5. "CH37,Injected sampling enable for channel 37." "0: Injected sampling is disabled.,1: Injected sampling is enabled."
|
|
bitfld.long 0x4 4. "CH36,Injected sampling enable for channel 36." "0: Injected sampling is disabled.,1: Injected sampling is enabled."
|
|
newline
|
|
bitfld.long 0x4 3. "CH35,Injected sampling enable for channel 35." "0: Injected sampling is disabled.,1: Injected sampling is enabled."
|
|
bitfld.long 0x4 2. "CH34,Injected sampling enable for channel 34." "0: Injected sampling is disabled.,1: Injected sampling is enabled."
|
|
newline
|
|
bitfld.long 0x4 1. "CH33,Injected sampling enable for channel 33." "0: Injected sampling is disabled.,1: Injected sampling is enabled."
|
|
bitfld.long 0x4 0. "CH32,Injected sampling enable for channel 32." "0: Injected sampling is disabled.,1: Injected sampling is enabled."
|
|
group.long 0xC0++0x3
|
|
line.long 0x0 "USROFSGN,User OFFSET and Gain Register"
|
|
hexmask.long.word 0x0 16.--25. 1. "GAINUSER,User Defined Gain value"
|
|
hexmask.long.byte 0x0 0.--7. 1. "OFFSUSER,User Defined Offset"
|
|
group.long 0xC8++0x3
|
|
line.long 0x0 "PDEDR,Power Down Exit Delay Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "PDED,The delay between the power down bit reset and the start of conversion"
|
|
rgroup.long 0x100++0x1F
|
|
line.long 0x0 "CDR0,Channel n Data Register"
|
|
bitfld.long 0x0 19. "VALID,Conversion data valid" "0,1"
|
|
bitfld.long 0x0 18. "OVERW,Data Overwrite" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "RESULT,This field reflects the mode of conversion for the corresponding channel." "0: Data is a result of Normal conversion mode,1: Data is a result of Injected conversion mode,2: Data is a result of CTU conversion mode,?"
|
|
hexmask.long.word 0x0 0.--11. 1. "CDATA,Converted channel data."
|
|
line.long 0x4 "CDR1,Channel n Data Register"
|
|
bitfld.long 0x4 19. "VALID,Conversion data valid" "0,1"
|
|
bitfld.long 0x4 18. "OVERW,Data Overwrite" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "RESULT,This field reflects the mode of conversion for the corresponding channel." "0: Data is a result of Normal conversion mode,1: Data is a result of Injected conversion mode,2: Data is a result of CTU conversion mode,?"
|
|
hexmask.long.word 0x4 0.--11. 1. "CDATA,Converted channel data."
|
|
line.long 0x8 "CDR2,Channel n Data Register"
|
|
bitfld.long 0x8 19. "VALID,Conversion data valid" "0,1"
|
|
bitfld.long 0x8 18. "OVERW,Data Overwrite" "0,1"
|
|
newline
|
|
bitfld.long 0x8 16.--17. "RESULT,This field reflects the mode of conversion for the corresponding channel." "0: Data is a result of Normal conversion mode,1: Data is a result of Injected conversion mode,2: Data is a result of CTU conversion mode,?"
|
|
hexmask.long.word 0x8 0.--11. 1. "CDATA,Converted channel data."
|
|
line.long 0xC "CDR3,Channel n Data Register"
|
|
bitfld.long 0xC 19. "VALID,Conversion data valid" "0,1"
|
|
bitfld.long 0xC 18. "OVERW,Data Overwrite" "0,1"
|
|
newline
|
|
bitfld.long 0xC 16.--17. "RESULT,This field reflects the mode of conversion for the corresponding channel." "0: Data is a result of Normal conversion mode,1: Data is a result of Injected conversion mode,2: Data is a result of CTU conversion mode,?"
|
|
hexmask.long.word 0xC 0.--11. 1. "CDATA,Converted channel data."
|
|
line.long 0x10 "CDR4,Channel n Data Register"
|
|
bitfld.long 0x10 19. "VALID,Conversion data valid" "0,1"
|
|
bitfld.long 0x10 18. "OVERW,Data Overwrite" "0,1"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "RESULT,This field reflects the mode of conversion for the corresponding channel." "0: Data is a result of Normal conversion mode,1: Data is a result of Injected conversion mode,2: Data is a result of CTU conversion mode,?"
|
|
hexmask.long.word 0x10 0.--11. 1. "CDATA,Converted channel data."
|
|
line.long 0x14 "CDR5,Channel n Data Register"
|
|
bitfld.long 0x14 19. "VALID,Conversion data valid" "0,1"
|
|
bitfld.long 0x14 18. "OVERW,Data Overwrite" "0,1"
|
|
newline
|
|
bitfld.long 0x14 16.--17. "RESULT,This field reflects the mode of conversion for the corresponding channel." "0: Data is a result of Normal conversion mode,1: Data is a result of Injected conversion mode,2: Data is a result of CTU conversion mode,?"
|
|
hexmask.long.word 0x14 0.--11. 1. "CDATA,Converted channel data."
|
|
line.long 0x18 "CDR6,Channel n Data Register"
|
|
bitfld.long 0x18 19. "VALID,Conversion data valid" "0,1"
|
|
bitfld.long 0x18 18. "OVERW,Data Overwrite" "0,1"
|
|
newline
|
|
bitfld.long 0x18 16.--17. "RESULT,This field reflects the mode of conversion for the corresponding channel." "0: Data is a result of Normal conversion mode,1: Data is a result of Injected conversion mode,2: Data is a result of CTU conversion mode,?"
|
|
hexmask.long.word 0x18 0.--11. 1. "CDATA,Converted channel data."
|
|
line.long 0x1C "CDR7,Channel n Data Register"
|
|
bitfld.long 0x1C 19. "VALID,Conversion data valid" "0,1"
|
|
bitfld.long 0x1C 18. "OVERW,Data Overwrite" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "RESULT,This field reflects the mode of conversion for the corresponding channel." "0: Data is a result of Normal conversion mode,1: Data is a result of Injected conversion mode,2: Data is a result of CTU conversion mode,?"
|
|
hexmask.long.word 0x1C 0.--11. 1. "CDATA,Converted channel data."
|
|
rgroup.long 0x180++0x1F
|
|
line.long 0x0 "CDR32,Channel n Data Register"
|
|
bitfld.long 0x0 19. "VALID,Conversion data valid" "0,1"
|
|
bitfld.long 0x0 18. "OVERW,Data Overwrite" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "RESULT,This field reflects the mode of conversion for the corresponding channel." "0: Data is a result of Normal conversion mode,1: Data is a result of Injected conversion mode,2: Data is a result of CTU conversion mode,?"
|
|
hexmask.long.word 0x0 0.--11. 1. "CDATA,Channel converted data."
|
|
line.long 0x4 "CDR33,Channel n Data Register"
|
|
bitfld.long 0x4 19. "VALID,Conversion data valid" "0,1"
|
|
bitfld.long 0x4 18. "OVERW,Data Overwrite" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "RESULT,This field reflects the mode of conversion for the corresponding channel." "0: Data is a result of Normal conversion mode,1: Data is a result of Injected conversion mode,2: Data is a result of CTU conversion mode,?"
|
|
hexmask.long.word 0x4 0.--11. 1. "CDATA,Channel converted data."
|
|
line.long 0x8 "CDR34,Channel n Data Register"
|
|
bitfld.long 0x8 19. "VALID,Conversion data valid" "0,1"
|
|
bitfld.long 0x8 18. "OVERW,Data Overwrite" "0,1"
|
|
newline
|
|
bitfld.long 0x8 16.--17. "RESULT,This field reflects the mode of conversion for the corresponding channel." "0: Data is a result of Normal conversion mode,1: Data is a result of Injected conversion mode,2: Data is a result of CTU conversion mode,?"
|
|
hexmask.long.word 0x8 0.--11. 1. "CDATA,Channel converted data."
|
|
line.long 0xC "CDR35,Channel n Data Register"
|
|
bitfld.long 0xC 19. "VALID,Conversion data valid" "0,1"
|
|
bitfld.long 0xC 18. "OVERW,Data Overwrite" "0,1"
|
|
newline
|
|
bitfld.long 0xC 16.--17. "RESULT,This field reflects the mode of conversion for the corresponding channel." "0: Data is a result of Normal conversion mode,1: Data is a result of Injected conversion mode,2: Data is a result of CTU conversion mode,?"
|
|
hexmask.long.word 0xC 0.--11. 1. "CDATA,Channel converted data."
|
|
line.long 0x10 "CDR36,Channel n Data Register"
|
|
bitfld.long 0x10 19. "VALID,Conversion data valid" "0,1"
|
|
bitfld.long 0x10 18. "OVERW,Data Overwrite" "0,1"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "RESULT,This field reflects the mode of conversion for the corresponding channel." "0: Data is a result of Normal conversion mode,1: Data is a result of Injected conversion mode,2: Data is a result of CTU conversion mode,?"
|
|
hexmask.long.word 0x10 0.--11. 1. "CDATA,Channel converted data."
|
|
line.long 0x14 "CDR37,Channel n Data Register"
|
|
bitfld.long 0x14 19. "VALID,Conversion data valid" "0,1"
|
|
bitfld.long 0x14 18. "OVERW,Data Overwrite" "0,1"
|
|
newline
|
|
bitfld.long 0x14 16.--17. "RESULT,This field reflects the mode of conversion for the corresponding channel." "0: Data is a result of Normal conversion mode,1: Data is a result of Injected conversion mode,2: Data is a result of CTU conversion mode,?"
|
|
hexmask.long.word 0x14 0.--11. 1. "CDATA,Channel converted data."
|
|
line.long 0x18 "CDR38,Channel n Data Register"
|
|
bitfld.long 0x18 19. "VALID,Conversion data valid" "0,1"
|
|
bitfld.long 0x18 18. "OVERW,Data Overwrite" "0,1"
|
|
newline
|
|
bitfld.long 0x18 16.--17. "RESULT,This field reflects the mode of conversion for the corresponding channel." "0: Data is a result of Normal conversion mode,1: Data is a result of Injected conversion mode,2: Data is a result of CTU conversion mode,?"
|
|
hexmask.long.word 0x18 0.--11. 1. "CDATA,Channel converted data."
|
|
line.long 0x1C "CDR39,Channel n Data Register"
|
|
bitfld.long 0x1C 19. "VALID,Conversion data valid" "0,1"
|
|
bitfld.long 0x1C 18. "OVERW,Data Overwrite" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "RESULT,This field reflects the mode of conversion for the corresponding channel." "0: Data is a result of Normal conversion mode,1: Data is a result of Injected conversion mode,2: Data is a result of CTU conversion mode,?"
|
|
hexmask.long.word 0x1C 0.--11. 1. "CDATA,Channel converted data."
|
|
group.long 0x280++0xF
|
|
line.long 0x0 "THRHLR4,Analog Watchdog Threshold Register 4"
|
|
hexmask.long.word 0x0 16.--27. 1. "THRH,High threshold value for channel n."
|
|
hexmask.long.word 0x0 0.--11. 1. "THRL,Low threshold value for channel n."
|
|
line.long 0x4 "THRHLR5,Analog Watchdog Threshold Register 5"
|
|
hexmask.long.word 0x4 16.--27. 1. "THRH,High threshold value for channel n."
|
|
hexmask.long.word 0x4 0.--11. 1. "THRL,Low threshold value for channel n."
|
|
line.long 0x8 "THRHLR6,Analog Watchdog Threshold Register 6"
|
|
hexmask.long.word 0x8 16.--27. 1. "THRH,High threshold value for channel n."
|
|
hexmask.long.word 0x8 0.--11. 1. "THRL,Low threshold value for channel n."
|
|
line.long 0xC "THRHLR7,Analog Watchdog Threshold Register 7"
|
|
hexmask.long.word 0xC 16.--27. 1. "THRH,High threshold value for channel n."
|
|
hexmask.long.word 0xC 0.--11. 1. "THRL,Low threshold value for channel n."
|
|
group.long 0x2B0++0x3
|
|
line.long 0x0 "CWSELR0,Channel Watchdog Select Register"
|
|
hexmask.long.byte 0x0 28.--31. 1. "WSEL_CH7,Channel Watchdog select for channel n 0000 : THRHLR0 register is selected 0001 : THRHLR1 register is selected 0010 : THRHLR2 register is selected"
|
|
hexmask.long.byte 0x0 24.--27. 1. "WSEL_CH6,Channel Watchdog select for channel n 0000 : THRHLR0 register is selected 0001 : THRHLR1 register is selected 0010 : THRHLR2 register is selected"
|
|
newline
|
|
hexmask.long.byte 0x0 20.--23. 1. "WSEL_CH5,Channel Watchdog select for channel n 0000 : THRHLR0 register is selected 0001 : THRHLR1 register is selected 0010 : THRHLR2 register is selected"
|
|
hexmask.long.byte 0x0 16.--19. 1. "WSEL_CH4,Channel Watchdog select for channel n 0000 : THRHLR0 register is selected 0001 : THRHLR1 register is selected 0010 : THRHLR2 register is selected"
|
|
newline
|
|
hexmask.long.byte 0x0 12.--15. 1. "WSEL_CH3,Channel Watchdog select for channel n 0000 : THRHLR0 register is selected 0001 : THRHLR1 register is selected 0010 : THRHLR2 register is selected"
|
|
hexmask.long.byte 0x0 8.--11. 1. "WSEL_CH2,Channel Watchdog select for channel n 0000 : THRHLR0 register is selected 0001 : THRHLR1 register is selected 0010 : THRHLR2 register is selected"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--7. 1. "WSEL_CH1,Channel Watchdog select for channel n 0000 : THRHLR0 register is selected 0001 : THRHLR1 register is selected 0010 : THRHLR2 register is selected"
|
|
hexmask.long.byte 0x0 0.--3. 1. "WSEL_CH0,Channel Watchdog select for channel n 0000 : THRHLR0 register is selected 0001 : THRHLR1 register is selected 0010 : THRHLR2 register is selected"
|
|
group.long 0x2C0++0x3
|
|
line.long 0x0 "CWSELR4,Channel Watchdog Select Register"
|
|
hexmask.long.byte 0x0 28.--31. 1. "WSEL_CH39,Channel Watchdog select for channel n 0000 : THRHLR0 register is selected 0001 : THRHLR1 register is selected 0010 : THRHLR2 register is selected"
|
|
hexmask.long.byte 0x0 24.--27. 1. "WSEL_CH38,Channel Watchdog select for channel n 0000 : THRHLR0 register is selected 0001 : THRHLR1 register is selected 0010 : THRHLR2 register is selected"
|
|
newline
|
|
hexmask.long.byte 0x0 20.--23. 1. "WSEL_CH37,Channel Watchdog select for channel n 0000 : THRHLR0 register is selected 0001 : THRHLR1 register is selected 0010 : THRHLR2 register is selected"
|
|
hexmask.long.byte 0x0 16.--19. 1. "WSEL_CH36,Channel Watchdog select for channel n 0000 : THRHLR0 register is selected 0001 : THRHLR1 register is selected 0010 : THRHLR2 register is selected"
|
|
newline
|
|
hexmask.long.byte 0x0 12.--15. 1. "WSEL_CH35,Channel Watchdog select for channel n 0000 : THRHLR0 register is selected 0001 : THRHLR1 register is selected 0010 : THRHLR2 register is selected"
|
|
hexmask.long.byte 0x0 8.--11. 1. "WSEL_CH34,Channel Watchdog select for channel n 0000 : THRHLR0 register is selected 0001 : THRHLR1 register is selected 0010 : THRHLR2 register is selected"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--7. 1. "WSEL_CH33,Channel Watchdog select for channel n 0000 : THRHLR0 register is selected 0001 : THRHLR1 register is selected 0010 : THRHLR2 register is selected"
|
|
hexmask.long.byte 0x0 0.--3. 1. "WSEL_CH32,Channel Watchdog select for channel n 0000 : THRHLR0 register is selected 0001 : THRHLR1 register is selected 0010 : THRHLR2 register is selected"
|
|
group.long 0x2E0++0x7
|
|
line.long 0x0 "CWENR0,Channel Watchdog Enable Register"
|
|
bitfld.long 0x0 7. "CWEN7,Watchdog enable for channel 7." "0: Watchdog is disabled.,1: Watchdog is enabled."
|
|
bitfld.long 0x0 6. "CWEN6,Watchdog enable for channel 6." "0: Watchdog is disabled.,1: Watchdog is enabled."
|
|
newline
|
|
bitfld.long 0x0 5. "CWEN5,Watchdog enable for channel 5." "0: Watchdog is disabled.,1: Watchdog is enabled."
|
|
bitfld.long 0x0 4. "CWEN4,Watchdog enable for channel 4." "0: Watchdog is disabled.,1: Watchdog is enabled."
|
|
newline
|
|
bitfld.long 0x0 3. "CWEN3,Watchdog enable for channel 3." "0: Watchdog is disabled.,1: Watchdog is enabled."
|
|
bitfld.long 0x0 2. "CWEN2,Watchdog enable for channel 2." "0: Watchdog is disabled.,1: Watchdog is enabled."
|
|
newline
|
|
bitfld.long 0x0 1. "CWEN1,Watchdog enable for channel 1." "0: Watchdog is disabled.,1: Watchdog is enabled."
|
|
bitfld.long 0x0 0. "CWEN0,Watchdog enable for channel 0." "0: Watchdog is disabled.,1: Watchdog is enabled."
|
|
line.long 0x4 "CWENR1,Channel Watchdog Enable Register"
|
|
bitfld.long 0x4 7. "CWEN39,Watchdog enable for channel 39." "0: Watchdog is disabled.,1: Watchdog is enabled."
|
|
bitfld.long 0x4 6. "CWEN38,Watchdog enable for channel 38." "0: Watchdog is disabled.,1: Watchdog is enabled."
|
|
newline
|
|
bitfld.long 0x4 5. "CWEN37,Watchdog enable for channel 37." "0: Watchdog is disabled.,1: Watchdog is enabled."
|
|
bitfld.long 0x4 4. "CWEN36,Watchdog enable for channel 36." "0: Watchdog is disabled.,1: Watchdog is enabled."
|
|
newline
|
|
bitfld.long 0x4 3. "CWEN35,Watchdog enable for channel 35." "0: Watchdog is disabled.,1: Watchdog is enabled."
|
|
bitfld.long 0x4 2. "CWEN34,Watchdog enable for channel 34." "0: Watchdog is disabled.,1: Watchdog is enabled."
|
|
newline
|
|
bitfld.long 0x4 1. "CWEN33,Watchdog enable for channel 33." "0: Watchdog is disabled.,1: Watchdog is enabled."
|
|
bitfld.long 0x4 0. "CWEN32,Watchdog enable for channel 32." "0: Watchdog is disabled.,1: Watchdog is enabled."
|
|
group.long 0x2F0++0x7
|
|
line.long 0x0 "AWORR0,Analog Watchdog Out of Range Register"
|
|
bitfld.long 0x0 7. "AWOR_CH7,Indicates channel 7 converted data is out of range." "0: Converted data is out of range.,1: Converted data is in range."
|
|
bitfld.long 0x0 6. "AWOR_CH6,Indicates channel 6 converted data is out of range." "0: Converted data is out of range.,1: Converted data is in range."
|
|
newline
|
|
bitfld.long 0x0 5. "AWOR_CH5,Indicates channel 5 converted data is out of range." "0: Converted data is out of range.,1: Converted data is in range."
|
|
bitfld.long 0x0 4. "AWOR_CH4,Indicates channel 4 converted data is out of range." "0: Converted data is out of range.,1: Converted data is in range."
|
|
newline
|
|
bitfld.long 0x0 3. "AWOR_CH3,Indicates channel 3 converted data is out of range." "0: Converted data is out of range.,1: Converted data is in range."
|
|
bitfld.long 0x0 2. "AWOR_CH2,Indicates channel 2 converted data is out of range." "0: Converted data is out of range.,1: Converted data is in range."
|
|
newline
|
|
bitfld.long 0x0 1. "AWOR_CH1,Indicates channel 1 converted data is out of range." "0: Converted data is out of range.,1: Converted data is in range."
|
|
bitfld.long 0x0 0. "AWOR_CH0,Indicates channel 0 converted data is out of range." "0: Converted data is out of range.,1: Converted data is in range."
|
|
line.long 0x4 "AWORR1,Analog Watchdog Out of Range Register"
|
|
bitfld.long 0x4 7. "AWOR_CH39,Indicates channel 39 converted data is out of range." "0: Converted data is out of range.,1: Converted data is in range."
|
|
bitfld.long 0x4 6. "AWOR_CH38,Indicates channel 38 converted data is out of range." "0: Converted data is out of range.,1: Converted data is in range."
|
|
newline
|
|
bitfld.long 0x4 5. "AWOR_CH37,Indicates channel 37 converted data is out of range." "0: Converted data is out of range.,1: Converted data is in range."
|
|
bitfld.long 0x4 4. "AWOR_CH36,Indicates channel 36 converted data is out of range." "0: Converted data is out of range.,1: Converted data is in range."
|
|
newline
|
|
bitfld.long 0x4 3. "AWOR_CH35,Indicates channel 35 converted data is out of range." "0: Converted data is out of range.,1: Converted data is in range."
|
|
bitfld.long 0x4 2. "AWOR_CH34,Indicates channel 34 converted data is out of range." "0: Converted data is out of range.,1: Converted data is in range."
|
|
newline
|
|
bitfld.long 0x4 1. "AWOR_CH33,Indicates channel 33 converted data is out of range." "0: Converted data is out of range.,1: Converted data is in range."
|
|
bitfld.long 0x4 0. "AWOR_CH32,Indicates channel 32 converted data is out of range." "0: Converted data is out of range.,1: Converted data is in range."
|
|
group.long 0x340++0x13
|
|
line.long 0x0 "STCR1,Self-Test Configuration Register 1"
|
|
hexmask.long.byte 0x0 24.--31. 1. "INPSAMP_C,Sampling phase duration for the test conversions related to Algorithm C."
|
|
hexmask.long.byte 0x0 8.--15. 1. "INPSAMP_S,Sampling phase duration for the test conversions related to Algorithm S."
|
|
line.long 0x4 "STCR2,Self-Test Configuration Register 2"
|
|
bitfld.long 0x4 27. "MSKWDSERR,Watchdog Sequence Error Interrupt mask" "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x4 26. "SERR,Error fault injection bit (write-only)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "MSKWDTERR,Watchdog Timer Error Interrupt Mask" "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x4 23. "MSKST_EOC,Self-Test EOC Interrupt Mask" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x4 18. "MSKWDG_EOA_C,End of Algorithm C Interrupt Mask" "0: Interrupt disabled,1: Interrrupt enabled"
|
|
bitfld.long 0x4 16. "MSKWDG_EOA_S,End of Algorithm S Interrupt Mask" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x4 15. "MSKERR_C,Error on Algorithm C Channel Interrupt Mask" "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x4 13. "MSKERR_S2,Error on Algorithm S2 Channel Interrupt Mask" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x4 12. "MSKERR_S1,Error on Algorithm S1 Channel Interrupt Mask" "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x4 11. "MSKERR_S0,Error on Algorithm S0 Channel Interrupt Mask" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x4 7. "EN,Self-Testing Channel Enable" "0: OFF,1: ON"
|
|
bitfld.long 0x4 4. "FMA_WDSERR,Fault Mapping for Watchdog Sequence Error" "0: NCF mapping,1: CF mapping"
|
|
newline
|
|
bitfld.long 0x4 3. "FMA_WDTERR,Fault Mapping for Watchdog Timer Error" "0: NCF mapping,1: CF mapping"
|
|
bitfld.long 0x4 2. "FMA_C,Fault Mapping for Algorithm C" "0: NCF mapping,1: CF mapping"
|
|
newline
|
|
bitfld.long 0x4 0. "FMA_S,Fault Mapping for BGAP Algorithm" "0: NCF mapping,1: CF mapping"
|
|
line.long 0x8 "STCR3,Self-Test Configuration Register 3"
|
|
bitfld.long 0x8 8.--9. "ALG,One-Shot Operation mode algorithm scheduling: 00-Algorithm S (single step=MSTEP) Reserved Algorithm C (single step=MSTEP) Algorithm S (default) For test/debug purposes" "0,1,2,3"
|
|
hexmask.long.byte 0x8 0.--4. 1. "MSTEP,For One-shot Operation mode: Current step for Algorithm S//C"
|
|
line.long 0xC "STBRR,Self-Test Baud Rate Register"
|
|
bitfld.long 0xC 16.--18. "WDT,The watchdog timer value is used to monitor the algorithm sequence to verify that it is correctly executing within the safe time period" "0: 0.1 ms ((0x0008 * Prescaler) cycles at 80 MHz),1: 0.5 ms ((0x0027 * Prescaler) cycles at 80 MHz),2: 1 ms ((0x004E * Prescaler) cycles at 80 MHz),3: 2 ms ((0x009C * Prescaler) cycles at 80 MHz),4: 5 ms ((0x0187 * Prescaler) cycles at 80 MHz),5: 10 ms ((0x030D * Prescaler) cycles at 80 MHz),6: 20 ms (0x061A * Prescaler) cycles at 80 MHz),7: 50 ms (0x0F42 * Prescaler) cycles at 80 MHz)"
|
|
hexmask.long.byte 0xC 0.--7. 1. "BR,Algorithm Baud Rate"
|
|
line.long 0x10 "STSR1,Self-Test Status Register 1"
|
|
bitfld.long 0x10 27. "WDSERR,Watchdog Sequence Errors" "0: No failure,1: Failure occurred"
|
|
bitfld.long 0x10 25. "WDTERR,Watchdog Timer Error" "0: No failure,1: Failure occurred"
|
|
newline
|
|
bitfld.long 0x10 24. "OVERWR,Overwrite Error" "0: No overwrite error,1: Overwrite error occurred"
|
|
bitfld.long 0x10 23. "ST_EOC,Self-Test EOC" "0: Self-test end of conversion is not complete.,1: Self-test end of conversion is complete."
|
|
newline
|
|
bitfld.long 0x10 18. "WDG_EOA_C,Indicates that Algorithm C has completed" "0: Self-test end of Algorithm C conversion is not..,1: Self-test end of Agorithm C conversion is.."
|
|
bitfld.long 0x10 16. "WDG_EOA_S,Indicates that Algorithm S has been completed" "0: Self-test end of Algorithm S conversion is not..,1: Self-test end of Agorithm S conversion is.."
|
|
newline
|
|
bitfld.long 0x10 15. "ERR_C,Algorithm C Error" "0: No Algorithm C error,1: Algorithm C error occurred"
|
|
bitfld.long 0x10 13. "ERR_S2,SAR_ADC_STSR1[ERR_S2] indicates an error on the self-test channel (Algorithm S (SUPPLY) Step2)" "0: No error occurred on the sampled signal,1: Error occurred on the sampled signal"
|
|
newline
|
|
bitfld.long 0x10 12. "ERR_S1,SAR_ADC_STSR1[ERR_S1] indicates an error on the self-test channel (Algorithm S (SUPPLY) Step1)" "0: no VDD ERROR,1: VDD ERROR occurred"
|
|
bitfld.long 0x10 11. "ERR_S0,SAR_ADC_STSR1[ERR_S0] indicates an error on the self-test channel (Algorithm S (SUPPLY) Step0)" "0: No VREF error,1: VREF error occurred"
|
|
newline
|
|
hexmask.long.byte 0x10 5.--9. 1. "STEP_C,Algorithm C Step Number Error"
|
|
rgroup.long 0x354++0xB
|
|
line.long 0x0 "STSR2,Self-Test Status Register 2"
|
|
bitfld.long 0x0 31. "OVFL,OVFL Overflow Bit Overflow Bit is set when divisor is zero" "0,1"
|
|
hexmask.long.word 0x0 16.--27. 1. "DATA1,DATA1 Test channel converted data when the ERR_S1 has occurred"
|
|
newline
|
|
hexmask.long.word 0x0 0.--11. 1. "DATA0,Test channel converted data when the ERR_S1 has occurred"
|
|
line.long 0x4 "STSR3,Self-Test Status Register 3"
|
|
hexmask.long.word 0x4 16.--27. 1. "DATA1,Test channel converted data when the ERR_S2 has occurred"
|
|
hexmask.long.word 0x4 0.--11. 1. "DATA0,Test channel converted data when the ERR_S0 has occurred"
|
|
line.long 0x8 "STSR4,Self-Test Status Register 4"
|
|
hexmask.long.word 0x8 16.--27. 1. "DATA1,Test channel converted data when the ERR_C has occurred. Algorithm C => TEST channel data"
|
|
hexmask.long.word 0x8 0.--11. 1. "DATA0,DATA0"
|
|
rgroup.long 0x370++0x7
|
|
line.long 0x0 "STDR1,Self-Test Data Register 1"
|
|
bitfld.long 0x0 19. "VALID,Valid Data" "0,1"
|
|
bitfld.long 0x0 18. "OWERWR,Overwrite Data" "0,1"
|
|
newline
|
|
hexmask.long.word 0x0 0.--11. 1. "TCDATA,Test Channel Converted Data"
|
|
line.long 0x4 "STDR2,Self-Test Data Register 2"
|
|
hexmask.long.word 0x4 20.--31. 1. "FDATA,Fractional Data"
|
|
bitfld.long 0x4 19. "VALID,Valid Data" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "OVERWR,Overwrite Data" "0,1"
|
|
hexmask.long.word 0x4 0.--11. 1. "IDATA,Integer Data"
|
|
group.long 0x380++0xF
|
|
line.long 0x0 "STAW0R,Self-Test Analog Watchdog Register"
|
|
bitfld.long 0x0 31. "AWDE,Enables/disables the comparison of the conversion result from the ADC supply self-test Step0 to the thresholds contained in this register (THRH and THRL)" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x0 30. "WDTE,Watchdog timer enable (related to the Algorithm S)" "0: Disabled,1: Enabled"
|
|
newline
|
|
hexmask.long.word 0x0 16.--27. 1. "THRH,High threshold value for Algorithm S Step0"
|
|
hexmask.long.word 0x0 0.--11. 1. "THRL,Low threshold value for Algorithm S Step0"
|
|
line.long 0x4 "STAW1AR,Self-Test Analog Watchdog Register"
|
|
bitfld.long 0x4 31. "AWDE,Analog watchdog enable related to Algorithm S (Step1)." "0,1"
|
|
hexmask.long.word 0x4 16.--27. 1. "THRH,High threshold value (integer part) for Algorithm S (Step1) test channel (unsigned coding)."
|
|
newline
|
|
hexmask.long.word 0x4 0.--11. 1. "THRL,Low threshold value (integer part) for Algorithm S (Step1) test channel (unsigned coding)."
|
|
line.long 0x8 "STAW1BR,Self-Test Analog Watchdog Register 1B"
|
|
hexmask.long.word 0x8 16.--27. 1. "THRH,High threshold value (fractional part) for Algorithm S (Step1) test channel (unsigned coding)."
|
|
hexmask.long.word 0x8 0.--11. 1. "THRL,Low threshold value (fractional part) for Algorithm S (Step1) test channel (unsigned coding)."
|
|
line.long 0xC "STAW2R,Self-Test Analog Watchdog Register 2"
|
|
bitfld.long 0xC 31. "AWDE,Analog watchdog enable related to Algorithm S (Step2)." "0,1"
|
|
hexmask.long.word 0xC 0.--11. 1. "THRL,Threshold Level Low"
|
|
rgroup.long 0x390++0x3
|
|
line.long 0x0 "STAW3R,Self-Test Analog Watchdog Register 3"
|
|
group.long 0x394++0x7
|
|
line.long 0x0 "STAW4R,Self-Test Analog Watchdog Register 4"
|
|
bitfld.long 0x0 31. "AWDE,Analog watchdog enable (related to the Algorithm C)" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x0 30. "WDTE,Watchdog timer enable (related to the Algorithm C)." "0: Disabled,1: Enabled"
|
|
newline
|
|
hexmask.long.word 0x0 16.--27. 1. "THRH,High threshold value for Step0 of Algorithm C."
|
|
hexmask.long.word 0x0 0.--11. 1. "THRL,Low threshold value for Step0 of Algorithm C."
|
|
line.long 0x4 "STAW5R,Self-Test Analog Watchdog Register 5"
|
|
hexmask.long.word 0x4 16.--27. 1. "THRH,High threshold value for step N of Algorithm C (N = 1 to CS-1)."
|
|
hexmask.long.word 0x4 0.--11. 1. "THRL,Low threshold value for Step0 of Algorithm C."
|
|
rgroup.long 0x39C++0x3
|
|
line.long 0x0 "CALSTAT,Calibration Status register"
|
|
hexmask.long.word 0x0 16.--31. 1. "TEST_RESULT,Test Result for last failing test (FIXED_VALUE - RAW_SAR_DATA)"
|
|
bitfld.long 0x0 13. "STAT_14,Status of calibration step 14" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "STAT_13,Status of calibration step 13" "0: Calculated gain within range,1: Calculated gain out of range"
|
|
bitfld.long 0x0 11. "STAT_12,Status of Calibration step 12" "0: Test passed,1: Test failed"
|
|
newline
|
|
bitfld.long 0x0 10. "STAT_11,Status of calibration step 11" "0: Test passed,1: Test failed"
|
|
bitfld.long 0x0 9. "STAT_10,Status of calibration step 10" "0: Test passed,1: Test failed"
|
|
newline
|
|
bitfld.long 0x0 8. "STAT_9,Status of calibration step 9" "0: Test passed,1: Test failed"
|
|
bitfld.long 0x0 7. "STAT_8,Status of calibration step 8" "0: Test passed,1: Test failed"
|
|
newline
|
|
bitfld.long 0x0 6. "STAT_7,Status of calibration step 7" "0: Test passed,1: Test failed"
|
|
bitfld.long 0x0 5. "STAT_6,Status of calibration step 6" "0: Test passed,1: Test failed"
|
|
newline
|
|
bitfld.long 0x0 4. "STAT_5,Status of calibration step 5" "0: Test passed,1: Test failed"
|
|
bitfld.long 0x0 3. "STAT_4,Status of calibration step 4" "0: Test passed,1: Test failed"
|
|
newline
|
|
bitfld.long 0x0 2. "STAT_3,Status of calibration step 3" "0: Test passed,1: Test failed"
|
|
bitfld.long 0x0 1. "STAT_2,Status of calibration step 2" "0: Test passed,1: Test failed"
|
|
newline
|
|
bitfld.long 0x0 0. "STAT_1,Status of calibration step 1" "0: Test passed,1: Test failed"
|
|
tree.end
|
|
tree "SEMA42 (Semaphores2)"
|
|
base ad:0x40082000
|
|
repeat 16. (increment 0x0 0x1)(increment 0x0 0x1)
|
|
group.byte ($2)++0x0
|
|
line.byte 0x0 "GATE$1,Gate Register"
|
|
hexmask.byte 0x0 0.--3. 1. "GTFSM,Gate Finite State Machine."
|
|
repeat.end
|
|
rgroup.word 0x42++0x1
|
|
line.word 0x0 "RSTGT_R,Reset Gate Read"
|
|
bitfld.word 0x0 14.--15. "ROZ,This field always returns the value 0 when read." "0,1,2,3"
|
|
bitfld.word 0x0 12.--13. "RSTGSM,Reset Gate Finite State Machine" "0: Idle waiting for the first data pattern write.,1: Waiting for the second data pattern write.,2: The 2-write sequence has completed. Generate the..,3: This state encoding is never used and therefore.."
|
|
hexmask.word.byte 0x0 8.--11. 1. "RSTGMS,Reset Gate Bus Master"
|
|
hexmask.word.byte 0x0 0.--7. 1. "RSTGTN,Reset Gate Number"
|
|
wgroup.word 0x42++0x1
|
|
line.word 0x0 "RSTGT_W,Reset Gate Write"
|
|
hexmask.word.byte 0x0 8.--15. 1. "RSTGDP,Reset Gate Data Pattern"
|
|
hexmask.word.byte 0x0 0.--7. 1. "RSTGTN,Reset Gate Number"
|
|
tree.end
|
|
tree "SIPI (Serial Interprocessor Interface)"
|
|
base ad:0x40074000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "CCR0,SIPI Channel Control Register 0"
|
|
bitfld.long 0x0 16. "TC,Send Trigger Command." "0: Trigger command not sent,1: Trigger command sent"
|
|
bitfld.long 0x0 6.--7. "WL,Word Length Transfer." "0: 8-bit,1: 16-bit,2: 32-bit,3: not used"
|
|
newline
|
|
bitfld.long 0x0 5. "CHEN,Channel Enable." "0: Channel is disabled,1: Channel is enabled"
|
|
bitfld.long 0x0 4. "ST,Streaming Transfer." "0: Streaming transfer is disabled,1: Streaming transfer is enabled"
|
|
newline
|
|
bitfld.long 0x0 3. "IDT,ID Read Request Transfer." "0: ID read request not sent,1: ID read request sent"
|
|
bitfld.long 0x0 2. "RRT,Read Request Transfer." "0: Read request will not be sent,1: Read request transfer by the initiator. This bit.."
|
|
newline
|
|
bitfld.long 0x0 1. "WRT,Write Request Transfer." "0: No write request will be sent,1: Write request transfer by the initiator. This.."
|
|
bitfld.long 0x0 0. "DEN,DMA Enable." "0: Channel will be used for bus interface access.,1: Channel will be used for DMA access"
|
|
line.long 0x4 "CSR0,SIPI Channel Status Register 0"
|
|
bitfld.long 0x4 7. "RAR,Read Answer Reception." "0: Read answer not received,1: Read answer received"
|
|
rbitfld.long 0x4 4.--6. "TID,Transaction ID of transmitted frame." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 3. "ACKR,Acknowledge Received." "0: Acknowledge not received,1: Acknowledge received"
|
|
rbitfld.long 0x4 2. "CB,Channel Busy." "0: Channel 0 free,1: Channel 0 busy"
|
|
group.long 0xC++0x7
|
|
line.long 0x0 "CIR0,SIPI Channel Interrupt Register 0"
|
|
bitfld.long 0x0 5. "WAIE,Write Acknowledge Interrupt Enable." "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
bitfld.long 0x0 4. "RAIE,Read Answer Interrupt Enable." "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
newline
|
|
bitfld.long 0x0 3. "TCIE,Trigger Command Interrupt Enable." "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
bitfld.long 0x0 2. "TOIE,Timeout Error Interrupt Enabled." "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
newline
|
|
bitfld.long 0x0 1. "TIDIE,Transaction ID Error Interrupt Enable." "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
bitfld.long 0x0 0. "ACKIE,Acknowledge Error Interrupt Enable." "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
line.long 0x4 "CTOR0,SIPI Channel Timeout Register 0"
|
|
hexmask.long.byte 0x4 0.--7. 1. "TOR,Timeout value for transmitted requests."
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "CCRC0,SIPI Channel CRC Register 0"
|
|
hexmask.long.word 0x0 16.--31. 1. "CRCI,Reflects received CRC value at initiator"
|
|
hexmask.long.word 0x0 0.--15. 1. "CRCT,Reflects received CRC value at target"
|
|
group.long 0x18++0xF
|
|
line.long 0x0 "CAR0,SIPI Channel Address Register 0"
|
|
hexmask.long 0x0 0.--31. 1. "CAR,These bits contain the address of the target node."
|
|
line.long 0x4 "CDR0,SIPI Channel Data Register 0"
|
|
hexmask.long 0x4 0.--31. 1. "CDR,Data register bits. Contains the data that will be transmitted or received."
|
|
line.long 0x8 "CCR1,SIPI Channel Control Register 1"
|
|
bitfld.long 0x8 16. "TC,Send Trigger Command." "0: Trigger command not sent,1: Trigger command sent"
|
|
bitfld.long 0x8 6.--7. "WL,Word Length Transfer." "0: 8-bit,1: 16-bit,2: 32-bit,3: not used"
|
|
newline
|
|
bitfld.long 0x8 5. "CHEN,Channel Enable." "0: Channel is disabled,1: Channel is enabled"
|
|
bitfld.long 0x8 4. "ST,This bit is hard-coded to 0" "0: Streaming transfer is disabled,1: Streaming transfer is enabled"
|
|
newline
|
|
bitfld.long 0x8 3. "IDT,ID Read Request Transfer." "0: ID read request not sent,1: ID read request sent"
|
|
bitfld.long 0x8 2. "RRT,Read Request Transfer" "0: Read request will not be sent,1: Read request transfer by the initiator. This bit.."
|
|
newline
|
|
bitfld.long 0x8 1. "WRT,Write Request Transfer." "0: No write request will be sent,1: Write request transfer by the initiator. This.."
|
|
bitfld.long 0x8 0. "DEN,DMA Enable." "0: Channel will be used for bus interface access.,1: Channel will be used for DMA access"
|
|
line.long 0xC "CSR1,SIPI Channel Status Register 1"
|
|
bitfld.long 0xC 7. "RAR,Read Answer Reception." "0: Read answer not received,1: Read answer received"
|
|
rbitfld.long 0xC 4.--6. "TID,Transaction ID of transmitted frame" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0xC 3. "ACKR,Acknowledge Received." "0: Acknowledge not received,1: Acknowledge received"
|
|
rbitfld.long 0xC 2. "CB,Channel Busy." "0: Channel 1 free,1: Channel 1 busy"
|
|
group.long 0x2C++0x7
|
|
line.long 0x0 "CIR1,SIPI Channel Interrupt Register 1"
|
|
bitfld.long 0x0 5. "WAIE,Write Acknowledge Interrupt Enable." "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
bitfld.long 0x0 4. "RAIE,Read Answer Interrupt Enable." "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
newline
|
|
bitfld.long 0x0 3. "TCIE,Trigger Command Interrupt Enable." "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
bitfld.long 0x0 2. "TOIE,Timeout Error Interrupt Enabled." "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
newline
|
|
bitfld.long 0x0 1. "TIDIE,Transaction ID Error Interrupt Enable." "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
bitfld.long 0x0 0. "ACKIE,Acknowledge Error Interrupt Enable." "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
line.long 0x4 "CTOR1,SIPI Channel Timeout Register 1"
|
|
hexmask.long.byte 0x4 0.--7. 1. "TOR,Timeout value for transmitted requests."
|
|
rgroup.long 0x34++0x3
|
|
line.long 0x0 "CCRC1,SIPI Channel CRC Register 1"
|
|
hexmask.long.word 0x0 16.--31. 1. "CRCI,Reflects received CRC value at initiator"
|
|
hexmask.long.word 0x0 0.--15. 1. "CRCT,Reflects received CRC value at target"
|
|
group.long 0x38++0xF
|
|
line.long 0x0 "CAR1,SIPI Channel Address Register 1"
|
|
hexmask.long 0x0 0.--31. 1. "CAR,These bits contain the address of the target node."
|
|
line.long 0x4 "CDR1,SIPI Channel Data Register 1"
|
|
hexmask.long 0x4 0.--31. 1. "CDR,Data register bits. Contains the data that will be transmitted or received."
|
|
line.long 0x8 "CCR2,SIPI Channel Control Register 2"
|
|
bitfld.long 0x8 16. "TC,Send Trigger Command." "0: Trigger command not sent,1: Trigger command sent"
|
|
bitfld.long 0x8 6.--7. "WL,Word Length Transfer." "0: 8-bit,1: 16-bit,2: 32-bit,3: not used"
|
|
newline
|
|
bitfld.long 0x8 5. "CHEN,Channel Enable." "0: Channel is disabled,1: Channel is enabled"
|
|
bitfld.long 0x8 4. "ST,This bit is hard-coded to 0" "0: Streaming transfer is disabled,1: Streaming transfer is enabled"
|
|
newline
|
|
bitfld.long 0x8 3. "IDT,ID Read Request Transfer." "0: ID read request not sent,1: ID read request sent"
|
|
bitfld.long 0x8 2. "RRT,Read Request Transfer." "0: Read request will not be sent,1: Read request transfer by the initiator. This bit.."
|
|
newline
|
|
bitfld.long 0x8 1. "WRT,Write Request Transfer." "0: No write request will be sent,1: Write request transfer by the initiator. This.."
|
|
bitfld.long 0x8 0. "DEN,DMA Enable." "0: Channel will be used for bus interface access.,1: Channel will be used for DMA access"
|
|
line.long 0xC "CSR2,SIPI Channel Status Register 2"
|
|
bitfld.long 0xC 7. "RAR,Read Answer Reception." "0: Read answer not received,1: Read answer received"
|
|
rbitfld.long 0xC 4.--6. "TID,Transaction ID of transmitted frame." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0xC 3. "ACKR,Acknowledge Received." "0: Acknowledge not received,1: Acknowledge received"
|
|
rbitfld.long 0xC 2. "CB,Channel Busy." "0: Channel 2 free,1: Channel 2 busy"
|
|
group.long 0x4C++0x7
|
|
line.long 0x0 "CIR2,SIPI Channel Interrupt Register 2"
|
|
bitfld.long 0x0 5. "WAIE,Write Acknowledge Interrupt Enable." "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
bitfld.long 0x0 4. "RAIE,Read Answer Interrupt Enable." "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
newline
|
|
bitfld.long 0x0 3. "TCIE,Trigger Command Interrupt Enable." "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
bitfld.long 0x0 2. "TOIE,Timeout Error Interrupt Enabled." "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
newline
|
|
bitfld.long 0x0 1. "TIDIE,Transaction ID Error Interrupt Enable." "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
bitfld.long 0x0 0. "ACKIE,Acknowledge Error Interrupt Enable." "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
line.long 0x4 "CTOR2,SIPI Channel Timeout Register 2"
|
|
hexmask.long.byte 0x4 0.--7. 1. "TOR,Timeout counter runs on the prescaled peripheral clock"
|
|
rgroup.long 0x54++0x3
|
|
line.long 0x0 "CCRC2,SIPI Channel CRC Register 2"
|
|
hexmask.long.word 0x0 16.--31. 1. "CRCI,Reflects received CRC value at initiator"
|
|
hexmask.long.word 0x0 0.--15. 1. "CRCT,Reflects received CRC value at target"
|
|
group.long 0x58++0x3
|
|
line.long 0x0 "CAR2,SIPI Channel Address Register 2"
|
|
hexmask.long 0x0 0.--31. 1. "CAR,These bits contain the address of the target node."
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x5C)++0x3
|
|
line.long 0x0 "CDR2_$1,SIPI Channel Data Register 2"
|
|
hexmask.long 0x0 0.--31. 1. "CDR2,Data register bits. Contains the data that will be transmitted or received."
|
|
repeat.end
|
|
group.long 0x7C++0x7
|
|
line.long 0x0 "CCR3,SIPI Channel Control Register 3"
|
|
bitfld.long 0x0 16. "TC,Send Trigger Command." "0: Trigger command not sent,1: Trigger command sent"
|
|
bitfld.long 0x0 6.--7. "WL,Word Length Transfer." "0: 8-bit,1: 16-bit,2: 32-bit,3: not used"
|
|
newline
|
|
bitfld.long 0x0 5. "CHEN,Channel Enable." "0: Channel is disabled,1: Channel is enabled"
|
|
bitfld.long 0x0 4. "ST,Streaming Transfer." "0: Streaming transfer is disabled,1: Streaming transfer is enabled"
|
|
newline
|
|
bitfld.long 0x0 3. "IDT,ID Read Request Transfer." "0: ID read request not sent,1: ID read request sent"
|
|
bitfld.long 0x0 2. "RRT,Read Request Transfer." "0: Read request will not be sent,1: Read request transfer by the initiator. This bit.."
|
|
newline
|
|
bitfld.long 0x0 1. "WRT,Write Request Transfer." "0: No write request will be sent,1: Write request transfer by the initiator. This.."
|
|
bitfld.long 0x0 0. "DEN,DMA Enable." "0: Channel will be used for bus interface access.,1: Channel will be used for DMA access"
|
|
line.long 0x4 "CSR3,SIPI Channel Status Register 3"
|
|
bitfld.long 0x4 7. "RAR,Read Answer Reception." "0: Read answer not received,1: Read answer received"
|
|
rbitfld.long 0x4 4.--6. "TID,Transaction ID of transmitted frame." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 3. "ACKR,Acknowledge Received." "0: Acknowledge not received,1: Acknowledge received"
|
|
rbitfld.long 0x4 2. "CB,Channel Busy." "0: Channel 3 free,1: Channel 3 busy"
|
|
group.long 0x88++0x7
|
|
line.long 0x0 "CIR3,SIPI Channel Interrupt Register 3"
|
|
bitfld.long 0x0 5. "WAIE,Write Acknowledge Interrupt Enable." "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
bitfld.long 0x0 4. "RAIE,Read Answer Interrupt Enable." "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
newline
|
|
bitfld.long 0x0 3. "TCIE,Trigger Command Interrupt Enable." "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
bitfld.long 0x0 2. "TOIE,Timeout Error Interrupt Enabled." "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
newline
|
|
bitfld.long 0x0 1. "TIDIE,Transaction ID Error Interrupt Enable." "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
bitfld.long 0x0 0. "ACKIE,Acknowledge Error Interrupt Enable." "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
line.long 0x4 "CTOR3,SIPI Channel Timeout Register 3"
|
|
hexmask.long.byte 0x4 0.--7. 1. "TOR,Timeout value for transmitted requests."
|
|
rgroup.long 0x90++0x3
|
|
line.long 0x0 "CCRC3,SIPI Channel CRC Register 3"
|
|
hexmask.long.word 0x0 16.--31. 1. "CRCI,Reflects received CRC value at initiator"
|
|
hexmask.long.word 0x0 0.--15. 1. "CRCT,Reflects received CRC value at target"
|
|
group.long 0x94++0x1F
|
|
line.long 0x0 "CAR3,SIPI Channel Address Register 3"
|
|
hexmask.long 0x0 0.--31. 1. "CAR,These bits contain the address of the target node."
|
|
line.long 0x4 "CDR3,SIPI Channel Data Register 3"
|
|
hexmask.long 0x4 0.--31. 1. "CDR,Data register bits. Contains the data that will be transmitted or received."
|
|
line.long 0x8 "MCR,SIPI Module Configuration Register"
|
|
bitfld.long 0x8 31. "FRZ,Freeze Enable" "0: Not enabled to enter Freeze mode,1: Enabled to enter Freeze mode"
|
|
bitfld.long 0x8 29. "HALT,Halt Mode Enable" "0: No Freeze mode request,1: Enters Freeze mode if FRZ bit is asserted."
|
|
newline
|
|
hexmask.long.word 0x8 16.--26. 1. "PRSCLR,Timeout counter prescaler"
|
|
bitfld.long 0x8 14.--15. "AID,Address Increment/Decrement" "0: no change. address stays same,1: address increments by 4,2: address decrements by 4,3: not used"
|
|
newline
|
|
bitfld.long 0x8 10. "CRCIE,CRC Error Interrupt Enable" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
bitfld.long 0x8 9. "MCRIE,Max Count Reached Interrupt Enable" "0: Interrupt is disabled,1: Interrupt is enabled"
|
|
newline
|
|
bitfld.long 0x8 4. "CHNSB,Channel coding select bit." "0: Code Table II (see SIPI Header Channel Number..,1: Code Table I (see SIPI Header Channel Number.."
|
|
bitfld.long 0x8 3. "TEN,Target Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 2. "INIT,Initialization Mode" "0: Normal Mode,1: Initialization Mode"
|
|
bitfld.long 0x8 1. "MOEN,Module Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0. "SR,Soft Reset" "0,1"
|
|
line.long 0xC "SR,SIPI Status Register"
|
|
rbitfld.long 0xC 31. "FRZACK,Freeze Mode Acknowledge" "0: SIPI not in Freeze mode,1: SIPI in Freeze mode"
|
|
rbitfld.long 0xC 30. "LPMACK,Low Power Mode Acknowledge." "0: SIPI is not in low power mode,1: SIPI is in Disable Mode."
|
|
newline
|
|
bitfld.long 0xC 10. "GCRCE,Global CRC Error Bit." "0: No CRC error,1: CRC error occurred"
|
|
bitfld.long 0xC 9. "MCR,Maximum Count Reached." "0,1"
|
|
newline
|
|
hexmask.long.byte 0xC 4.--7. 1. "TE,Trigger Event on Respective Channels. This field enables interrupts for target nodes."
|
|
hexmask.long.byte 0xC 0.--3. 1. "STATE,These bits reflect the transmit state machine status"
|
|
line.long 0x10 "MAXCR,SIPI Max Count Register"
|
|
hexmask.long 0x10 2.--31. 1. "MXCNT,This field contains the maximum address count value at the target node"
|
|
line.long 0x14 "ARR,SIPI Address Reload Register"
|
|
hexmask.long 0x14 2.--31. 1. "ADRLD,ADRLD contains the reload value for the address counter at the target node"
|
|
line.long 0x18 "ACR,SIPI Address Count Register"
|
|
hexmask.long 0x18 2.--31. 1. "ADCNT,Feflects the count value of address counter at target node."
|
|
line.long 0x1C "ERR,SIPI Error Register"
|
|
bitfld.long 0x1C 26. "TOE3,Timeout Error for Channel 3." "0: Timeout error didn't occur,1: Timeout error occured"
|
|
bitfld.long 0x1C 25. "TIDE3,Transaction ID Error for Channel 3." "0: Received transaction ID matched with the stored ID,1: Received transaction ID didn't match with the.."
|
|
newline
|
|
bitfld.long 0x1C 24. "ACKE3,Acknowledge Error for Channel 3." "0: Acknowledge received is correct.,1: Acknowledge received is not correct."
|
|
bitfld.long 0x1C 18. "TOE2,Timeout Error for Channel 2." "0: Timeout error didn't occur,1: Timeout error occured"
|
|
newline
|
|
bitfld.long 0x1C 17. "TIDE2,Transaction ID Error for Channel 2." "0: Received transaction ID matched with the stored ID,1: Received transaction ID didn't match with the.."
|
|
bitfld.long 0x1C 16. "ACKE2,Acknowledge Error for Channel 2." "0: Acknowledge received is correct,1: Acknowledge received is not correct"
|
|
newline
|
|
bitfld.long 0x1C 10. "TOE1,Timeout Error for Channel 1." "0: Timeout error didn't occur,1: Timeout error occured"
|
|
bitfld.long 0x1C 9. "TIDE1,Transaction ID Error for Channel 1." "0: Received transaction ID matched with the stored ID,1: Received transaction ID didn't match with the.."
|
|
newline
|
|
bitfld.long 0x1C 8. "ACKE1,Acknowledge Error for Channel 1." "0: Acknowledge received is correct,1: Acknowledge received is not correct"
|
|
bitfld.long 0x1C 2. "TOE0,Timeout Error for Channel 0." "0: Timeout error didn't occur,1: Timeout error occured"
|
|
newline
|
|
bitfld.long 0x1C 1. "TIDE0,Transaction ID Error for Channel 0." "0: Received transaction ID matched with the stored ID,1: Received transaction ID didn't match with the.."
|
|
bitfld.long 0x1C 0. "ACKE0,Acknowledge Error for Channel 0." "0: Acknowledge received is correct.,1: Acknowledge received is not correct."
|
|
tree.end
|
|
tree "SIUL2 (System Integration Unit Lite2)"
|
|
base ad:0x4006C000
|
|
rgroup.long 0x4++0x7
|
|
line.long 0x0 "MIDR1,SIUL2 MCU ID Register #1"
|
|
bitfld.long 0x0 15. "CSP,Always reads back zero" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 10.--14. 1. "PKG,Package Settings"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--7. 1. "MAJOR_MASK,Major Mask Revision"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "MINOR_MASK,Minor Mask Revision"
|
|
line.long 0x4 "MIDR2,SIUL2 MCU ID Register #2"
|
|
bitfld.long 0x4 31. "SF,Manufacturer" "0: NXP,?"
|
|
newline
|
|
hexmask.long.byte 0x4 27.--30. 1. "PART_DIFFERENTIATOR,Part Differentiator"
|
|
newline
|
|
hexmask.long.byte 0x4 23.--26. 1. "SPEED_GRADING,Speed Grading"
|
|
newline
|
|
bitfld.long 0x4 0. "FR,FlexRay present" "0: FlexRay is not present,1: FlexRay is present"
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "DISR0,SIUL2 DMA/Interrupt Status Flag Register0"
|
|
bitfld.long 0x0 31. "EIF31,External Interrupt Status Flag 31" "0: No interrupt or DMA event has occurred on the pad,1: An interrupt or DMA event as defined by.."
|
|
newline
|
|
bitfld.long 0x0 30. "EIF30,External Interrupt Status Flag 30" "0: No interrupt or DMA event has occurred on the pad,1: An interrupt or DMA event as defined by.."
|
|
newline
|
|
bitfld.long 0x0 29. "EIF29,External Interrupt Status Flag 29" "0: No interrupt or DMA event has occurred on the pad,1: An interrupt or DMA event as defined by.."
|
|
newline
|
|
bitfld.long 0x0 28. "EIF28,External Interrupt Status Flag 28" "0: No interrupt or DMA event has occurred on the pad,1: An interrupt or DMA event as defined by.."
|
|
newline
|
|
bitfld.long 0x0 27. "EIF27,External Interrupt Status Flag 27" "0: No interrupt or DMA event has occurred on the pad,1: An interrupt or DMA event as defined by.."
|
|
newline
|
|
bitfld.long 0x0 26. "EIF26,External Interrupt Status Flag 26" "0: No interrupt or DMA event has occurred on the pad,1: An interrupt or DMA event as defined by.."
|
|
newline
|
|
bitfld.long 0x0 25. "EIF25,External Interrupt Status Flag 25" "0: No interrupt or DMA event has occurred on the pad,1: An interrupt or DMA event as defined by.."
|
|
newline
|
|
bitfld.long 0x0 24. "EIF24,External Interrupt Status Flag 24" "0: No interrupt or DMA event has occurred on the pad,1: An interrupt or DMA event as defined by.."
|
|
newline
|
|
bitfld.long 0x0 23. "EIF23,External Interrupt Status Flag 23" "0: No interrupt or DMA event has occurred on the pad,1: An interrupt or DMA event as defined by.."
|
|
newline
|
|
bitfld.long 0x0 22. "EIF22,External Interrupt Status Flag 22" "0: No interrupt or DMA event has occurred on the pad,1: An interrupt or DMA event as defined by.."
|
|
newline
|
|
bitfld.long 0x0 21. "EIF21,External Interrupt Status Flag 21" "0: No interrupt or DMA event has occurred on the pad,1: An interrupt or DMA event as defined by.."
|
|
newline
|
|
bitfld.long 0x0 20. "EIF20,External Interrupt Status Flag 20" "0: No interrupt or DMA event has occurred on the pad,1: An interrupt or DMA event as defined by.."
|
|
newline
|
|
bitfld.long 0x0 19. "EIF19,External Interrupt Status Flag 19" "0: No interrupt or DMA event has occurred on the pad,1: An interrupt or DMA event as defined by.."
|
|
newline
|
|
bitfld.long 0x0 18. "EIF18,External Interrupt Status Flag 18" "0: No interrupt or DMA event has occurred on the pad,1: An interrupt or DMA event as defined by.."
|
|
newline
|
|
bitfld.long 0x0 17. "EIF17,External Interrupt Status Flag 17" "0: No interrupt or DMA event has occurred on the pad,1: An interrupt or DMA event as defined by.."
|
|
newline
|
|
bitfld.long 0x0 16. "EIF16,External Interrupt Status Flag 16" "0: No interrupt or DMA event has occurred on the pad,1: An interrupt or DMA event as defined by.."
|
|
newline
|
|
bitfld.long 0x0 15. "EIF15,External Interrupt Status Flag 15" "0: No interrupt or DMA event has occurred on the pad,1: An interrupt or DMA event as defined by.."
|
|
newline
|
|
bitfld.long 0x0 14. "EIF14,External Interrupt Status Flag 14" "0: No interrupt or DMA event has occurred on the pad,1: An interrupt or DMA event as defined by.."
|
|
newline
|
|
bitfld.long 0x0 13. "EIF13,External Interrupt Status Flag 13" "0: No interrupt or DMA event has occurred on the pad,1: An interrupt or DMA event as defined by.."
|
|
newline
|
|
bitfld.long 0x0 12. "EIF12,External Interrupt Status Flag 12" "0: No interrupt or DMA event has occurred on the pad,1: An interrupt or DMA event as defined by.."
|
|
newline
|
|
bitfld.long 0x0 11. "EIF11,External Interrupt Status Flag 11" "0: No interrupt or DMA event has occurred on the pad,1: An interrupt or DMA event as defined by.."
|
|
newline
|
|
bitfld.long 0x0 10. "EIF10,External Interrupt Status Flag 10" "0: No interrupt or DMA event has occurred on the pad,1: An interrupt or DMA event as defined by.."
|
|
newline
|
|
bitfld.long 0x0 9. "EIF9,External Interrupt Status Flag 9" "0: No interrupt or DMA event has occurred on the pad,1: An interrupt or DMA event as defined by.."
|
|
newline
|
|
bitfld.long 0x0 8. "EIF8,External Interrupt Status Flag 8" "0: No interrupt or DMA event has occurred on the pad,1: An interrupt or DMA event as defined by.."
|
|
newline
|
|
bitfld.long 0x0 7. "EIF7,External Interrupt Status Flag 7" "0: No interrupt or DMA event has occurred on the pad,1: An interrupt or DMA event as defined by.."
|
|
newline
|
|
bitfld.long 0x0 6. "EIF6,External Interrupt Status Flag 6" "0: No interrupt or DMA event has occurred on the pad,1: An interrupt or DMA event as defined by.."
|
|
newline
|
|
bitfld.long 0x0 5. "EIF5,External Interrupt Status Flag 5" "0: No interrupt or DMA event has occurred on the pad,1: An interrupt or DMA event as defined by.."
|
|
newline
|
|
bitfld.long 0x0 4. "EIF4,External Interrupt Status Flag 4" "0: No interrupt or DMA event has occurred on the pad,1: An interrupt or DMA event as defined by.."
|
|
newline
|
|
bitfld.long 0x0 3. "EIF3,External Interrupt Status Flag 3" "0: No interrupt or DMA event has occurred on the pad,1: An interrupt or DMA event as defined by.."
|
|
newline
|
|
bitfld.long 0x0 2. "EIF2,External Interrupt Status Flag 2" "0: No interrupt or DMA event has occurred on the pad,1: An interrupt or DMA event as defined by.."
|
|
newline
|
|
bitfld.long 0x0 1. "EIF1,External Interrupt Status Flag 1" "0: No interrupt or DMA event has occurred on the pad,1: An interrupt or DMA event as defined by.."
|
|
newline
|
|
bitfld.long 0x0 0. "EIF0,External Interrupt Status Flag 0" "0: No interrupt or DMA event has occurred on the pad,1: An interrupt or DMA event as defined by.."
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "DIRER0,SIUL2 DMA/Interrupt Request Enable Register0"
|
|
bitfld.long 0x0 31. "EIRE31,External Interrupt or DMA Request Enable 31" "0: Interrupt or DMA requests from the corresponding..,1: Set EIF[x] bit causes either a DMA or an.."
|
|
newline
|
|
bitfld.long 0x0 30. "EIRE30,External Interrupt or DMA Request Enable 30" "0: Interrupt or DMA requests from the corresponding..,1: Set EIF[x] bit causes either a DMA or an.."
|
|
newline
|
|
bitfld.long 0x0 29. "EIRE29,External Interrupt or DMA Request Enable 29" "0: Interrupt or DMA requests from the corresponding..,1: Set EIF[x] bit causes either a DMA or an.."
|
|
newline
|
|
bitfld.long 0x0 28. "EIRE28,External Interrupt or DMA Request Enable 28" "0: Interrupt or DMA requests from the corresponding..,1: Set EIF[x] bit causes either a DMA or an.."
|
|
newline
|
|
bitfld.long 0x0 27. "EIRE27,External Interrupt or DMA Request Enable 27" "0: Interrupt or DMA requests from the corresponding..,1: Set EIF[x] bit causes either a DMA or an.."
|
|
newline
|
|
bitfld.long 0x0 26. "EIRE26,External Interrupt or DMA Request Enable 26" "0: Interrupt or DMA requests from the corresponding..,1: Set EIF[x] bit causes either a DMA or an.."
|
|
newline
|
|
bitfld.long 0x0 25. "EIRE25,External Interrupt or DMA Request Enable 25" "0: Interrupt or DMA requests from the corresponding..,1: Set EIF[x] bit causes either a DMA or an.."
|
|
newline
|
|
bitfld.long 0x0 24. "EIRE24,External Interrupt or DMA Request Enable 24" "0: Interrupt or DMA requests from the corresponding..,1: Set EIF[x] bit causes either a DMA or an.."
|
|
newline
|
|
bitfld.long 0x0 23. "EIRE23,External Interrupt or DMA Request Enable 23" "0: Interrupt or DMA requests from the corresponding..,1: Set EIF[x] bit causes either a DMA or an.."
|
|
newline
|
|
bitfld.long 0x0 22. "EIRE22,External Interrupt or DMA Request Enable 22" "0: Interrupt or DMA requests from the corresponding..,1: Set EIF[x] bit causes either a DMA or an.."
|
|
newline
|
|
bitfld.long 0x0 21. "EIRE21,External Interrupt or DMA Request Enable 21" "0: Interrupt or DMA requests from the corresponding..,1: Set EIF[x] bit causes either a DMA or an.."
|
|
newline
|
|
bitfld.long 0x0 20. "EIRE20,External Interrupt or DMA Request Enable 20" "0: Interrupt or DMA requests from the corresponding..,1: Set EIF[x] bit causes either a DMA or an.."
|
|
newline
|
|
bitfld.long 0x0 19. "EIRE19,External Interrupt or DMA Request Enable 19" "0: Interrupt or DMA requests from the corresponding..,1: Set EIF[x] bit causes either a DMA or an.."
|
|
newline
|
|
bitfld.long 0x0 18. "EIRE18,External Interrupt or DMA Request Enable 18" "0: Interrupt or DMA requests from the corresponding..,1: Set EIF[x] bit causes either a DMA or an.."
|
|
newline
|
|
bitfld.long 0x0 17. "EIRE17,External Interrupt or DMA Request Enable 17" "0: Interrupt or DMA requests from the corresponding..,1: Set EIF[x] bit causes either a DMA or an.."
|
|
newline
|
|
bitfld.long 0x0 16. "EIRE16,External Interrupt or DMA Request Enable 16" "0: Interrupt or DMA requests from the corresponding..,1: Set EIF[x] bit causes either a DMA or an.."
|
|
newline
|
|
bitfld.long 0x0 15. "EIRE15,External Interrupt or DMA Request Enable 15" "0: Interrupt or DMA requests from the corresponding..,1: Set EIF[x] bit causes either a DMA or an.."
|
|
newline
|
|
bitfld.long 0x0 14. "EIRE14,External Interrupt or DMA Request Enable 14" "0: Interrupt or DMA requests from the corresponding..,1: Set EIF[x] bit causes either a DMA or an.."
|
|
newline
|
|
bitfld.long 0x0 13. "EIRE13,External Interrupt or DMA Request Enable 13" "0: Interrupt or DMA requests from the corresponding..,1: Set EIF[x] bit causes either a DMA or an.."
|
|
newline
|
|
bitfld.long 0x0 12. "EIRE12,External Interrupt or DMA Request Enable 12" "0: Interrupt or DMA requests from the corresponding..,1: Set EIF[x] bit causes either a DMA or an.."
|
|
newline
|
|
bitfld.long 0x0 11. "EIRE11,External Interrupt or DMA Request Enable 11" "0: Interrupt or DMA requests from the corresponding..,1: Set EIF[x] bit causes either a DMA or an.."
|
|
newline
|
|
bitfld.long 0x0 10. "EIRE10,External Interrupt or DMA Request Enable 10" "0: Interrupt or DMA requests from the corresponding..,1: Set EIF[x] bit causes either a DMA or an.."
|
|
newline
|
|
bitfld.long 0x0 9. "EIRE9,External Interrupt or DMA Request Enable 9" "0: Interrupt or DMA requests from the corresponding..,1: Set EIF[x] bit causes either a DMA or an.."
|
|
newline
|
|
bitfld.long 0x0 8. "EIRE8,External Interrupt or DMA Request Enable 8" "0: Interrupt or DMA requests from the corresponding..,1: Set EIF[x] bit causes either a DMA or an.."
|
|
newline
|
|
bitfld.long 0x0 7. "EIRE7,External Interrupt or DMA Request Enable 7" "0: Interrupt or DMA requests from the corresponding..,1: Set EIF[x] bit causes either a DMA or an.."
|
|
newline
|
|
bitfld.long 0x0 6. "EIRE6,External Interrupt or DMA Request Enable 6" "0: Interrupt or DMA requests from the corresponding..,1: Set EIF[x] bit causes either a DMA or an.."
|
|
newline
|
|
bitfld.long 0x0 5. "EIRE5,External Interrupt or DMA Request Enable 5" "0: Interrupt or DMA requests from the corresponding..,1: Set EIF[x] bit causes either a DMA or an.."
|
|
newline
|
|
bitfld.long 0x0 4. "EIRE4,External Interrupt or DMA Request Enable 4" "0: Interrupt or DMA requests from the corresponding..,1: Set EIF[x] bit causes either a DMA or an.."
|
|
newline
|
|
bitfld.long 0x0 3. "EIRE3,External Interrupt or DMA Request Enable 3" "0: Interrupt or DMA requests from the corresponding..,1: Set EIF[x] bit causes either a DMA or an.."
|
|
newline
|
|
bitfld.long 0x0 2. "EIRE2,External Interrupt or DMA Request Enable 2" "0: Interrupt or DMA requests from the corresponding..,1: Set EIF[x] bit causes either a DMA or an.."
|
|
newline
|
|
bitfld.long 0x0 1. "EIRE1,External Interrupt or DMA Request Enable 1" "0: Interrupt or DMA requests from the corresponding..,1: Set EIF[x] bit causes either a DMA or an.."
|
|
newline
|
|
bitfld.long 0x0 0. "EIRE0,External Interrupt or DMA Request Enable 0" "0: Interrupt or DMA requests from the corresponding..,1: Set EIF[x] bit causes either a DMA or an.."
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "DIRSR0,SIUL2 DMA/Interrupt Request Select Register0"
|
|
bitfld.long 0x0 31. "DIRSR31,DMA/Interrupt Request Select Register-Selects between DMA request or external interrupt request when an edge-triggered event occurs on the corresponding pin" "0: Interrupt request is selected,1: DMA request is selected"
|
|
newline
|
|
bitfld.long 0x0 30. "DIRSR30,DMA/Interrupt Request Select Register-Selects between DMA request or external interrupt request when an edge-triggered event occurs on the corresponding pin" "0: Interrupt request is selected,1: DMA request is selected"
|
|
newline
|
|
bitfld.long 0x0 29. "DIRSR29,DMA/Interrupt Request Select Register-Selects between DMA request or external interrupt request when an edge-triggered event occurs on the corresponding pin" "0: Interrupt request is selected,1: DMA request is selected"
|
|
newline
|
|
bitfld.long 0x0 28. "DIRSR28,DMA/Interrupt Request Select Register-Selects between DMA request or external interrupt request when an edge-triggered event occurs on the corresponding pin" "0: Interrupt request is selected,1: DMA request is selected"
|
|
newline
|
|
bitfld.long 0x0 27. "DIRSR27,DMA/Interrupt Request Select Register-Selects between DMA request or external interrupt request when an edge-triggered event occurs on the corresponding pin" "0: Interrupt request is selected,1: DMA request is selected"
|
|
newline
|
|
bitfld.long 0x0 26. "DIRSR26,DMA/Interrupt Request Select Register-Selects between DMA request or external interrupt request when an edge-triggered event occurs on the corresponding pin" "0: Interrupt request is selected,1: DMA request is selected"
|
|
newline
|
|
bitfld.long 0x0 25. "DIRSR25,DMA/Interrupt Request Select Register-Selects between DMA request or external interrupt request when an edge-triggered event occurs on the corresponding pin" "0: Interrupt request is selected,1: DMA request is selected"
|
|
newline
|
|
bitfld.long 0x0 24. "DIRSR24,DMA/Interrupt Request Select Register-Selects between DMA request or external interrupt request when an edge-triggered event occurs on the corresponding pin" "0: Interrupt request is selected,1: DMA request is selected"
|
|
newline
|
|
bitfld.long 0x0 23. "DIRSR23,DMA/Interrupt Request Select Register-Selects between DMA request or external interrupt request when an edge-triggered event occurs on the corresponding pin" "0: Interrupt request is selected,1: DMA request is selected"
|
|
newline
|
|
bitfld.long 0x0 22. "DIRSR22,DMA/Interrupt Request Select Register-Selects between DMA request or external interrupt request when an edge-triggered event occurs on the corresponding pin" "0: Interrupt request is selected,1: DMA request is selected"
|
|
newline
|
|
bitfld.long 0x0 21. "DIRSR21,DMA/Interrupt Request Select Register-Selects between DMA request or external interrupt request when an edge-triggered event occurs on the corresponding pin" "0: Interrupt request is selected,1: DMA request is selected"
|
|
newline
|
|
bitfld.long 0x0 20. "DIRSR20,DMA/Interrupt Request Select Register-Selects between DMA request or external interrupt request when an edge-triggered event occurs on the corresponding pin" "0: Interrupt request is selected,1: DMA request is selected"
|
|
newline
|
|
bitfld.long 0x0 19. "DIRSR19,DMA/Interrupt Request Select Register-Selects between DMA request or external interrupt request when an edge-triggered event occurs on the corresponding pin" "0: Interrupt request is selected,1: DMA request is selected"
|
|
newline
|
|
bitfld.long 0x0 18. "DIRSR18,DMA/Interrupt Request Select Register-Selects between DMA request or external interrupt request when an edge-triggered event occurs on the corresponding pin" "0: Interrupt request is selected,1: DMA request is selected"
|
|
newline
|
|
bitfld.long 0x0 17. "DIRSR17,DMA/Interrupt Request Select Register-Selects between DMA request or external interrupt request when an edge-triggered event occurs on the corresponding pin" "0: Interrupt request is selected,1: DMA request is selected"
|
|
newline
|
|
bitfld.long 0x0 16. "DIRSR16,DMA/Interrupt Request Select Register-Selects between DMA request or external interrupt request when an edge-triggered event occurs on the corresponding pin" "0: Interrupt request is selected,1: DMA request is selected"
|
|
newline
|
|
bitfld.long 0x0 15. "DIRSR15,DMA/Interrupt Request Select Register-Selects between DMA request or external interrupt request when an edge-triggered event occurs on the corresponding pin" "0: Interrupt request is selected,1: DMA request is selected"
|
|
newline
|
|
bitfld.long 0x0 14. "DIRSR14,DMA/Interrupt Request Select Register-Selects between DMA request or external interrupt request when an edge-triggered event occurs on the corresponding pin" "0: Interrupt request is selected,1: DMA request is selected"
|
|
newline
|
|
bitfld.long 0x0 13. "DIRSR13,DMA/Interrupt Request Select Register-Selects between DMA request or external interrupt request when an edge-triggered event occurs on the corresponding pin" "0: Interrupt request is selected,1: DMA request is selected"
|
|
newline
|
|
bitfld.long 0x0 12. "DIRSR12,DMA/Interrupt Request Select Register-Selects between DMA request or external interrupt request when an edge-triggered event occurs on the corresponding pin" "0: Interrupt request is selected,1: DMA request is selected"
|
|
newline
|
|
bitfld.long 0x0 11. "DIRSR11,DMA/Interrupt Request Select Register-Selects between DMA request or external interrupt request when an edge-triggered event occurs on the corresponding pin" "0: Interrupt request is selected,1: DMA request is selected"
|
|
newline
|
|
bitfld.long 0x0 10. "DIRSR10,DMA/Interrupt Request Select Register-Selects between DMA request or external interrupt request when an edge-triggered event occurs on the corresponding pin" "0: Interrupt request is selected,1: DMA request is selected"
|
|
newline
|
|
bitfld.long 0x0 9. "DIRSR9,DMA/Interrupt Request Select Register-Selects between DMA request or external interrupt request when an edge-triggered event occurs on the corresponding pin" "0: Interrupt request is selected,1: DMA request is selected"
|
|
newline
|
|
bitfld.long 0x0 8. "DIRSR8,DMA/Interrupt Request Select Register-Selects between DMA request or external interrupt request when an edge-triggered event occurs on the corresponding pin" "0: Interrupt request is selected,1: DMA request is selected"
|
|
newline
|
|
bitfld.long 0x0 7. "DIRSR7,DMA/Interrupt Request Select Register-Selects between DMA request or external interrupt request when an edge-triggered event occurs on the corresponding pin" "0: Interrupt request is selected,1: DMA request is selected"
|
|
newline
|
|
bitfld.long 0x0 6. "DIRSR6,DMA/Interrupt Request Select Register-Selects between DMA request or external interrupt request when an edge-triggered event occurs on the corresponding pin" "0: Interrupt request is selected,1: DMA request is selected"
|
|
newline
|
|
bitfld.long 0x0 5. "DIRSR5,DMA/Interrupt Request Select Register-Selects between DMA request or external interrupt request when an edge-triggered event occurs on the corresponding pin" "0: Interrupt request is selected,1: DMA request is selected"
|
|
newline
|
|
bitfld.long 0x0 4. "DIRSR4,DMA/Interrupt Request Select Register-Selects between DMA request or external interrupt request when an edge-triggered event occurs on the corresponding pin" "0: Interrupt request is selected,1: DMA request is selected"
|
|
newline
|
|
bitfld.long 0x0 3. "DIRSR3,DMA/Interrupt Request Select Register-Selects between DMA request or external interrupt request when an edge-triggered event occurs on the corresponding pin" "0: Interrupt request is selected,1: DMA request is selected"
|
|
newline
|
|
bitfld.long 0x0 2. "DIRSR2,DMA/Interrupt Request Select Register-Selects between DMA request or external interrupt request when an edge-triggered event occurs on the corresponding pin" "0: Interrupt request is selected,1: DMA request is selected"
|
|
newline
|
|
bitfld.long 0x0 1. "DIRSR1,DMA/Interrupt Request Select Register-Selects between DMA request or external interrupt request when an edge-triggered event occurs on the corresponding pin" "0: Interrupt request is selected,1: DMA request is selected"
|
|
newline
|
|
bitfld.long 0x0 0. "DIRSR0,DMA/Interrupt Request Select Register-Selects between DMA request or external interrupt request when an edge-triggered event occurs on the corresponding pin" "0: Interrupt request is selected,1: DMA request is selected"
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "IREER0,SIUL2 Interrupt Rising-Edge Event Enable Register 0"
|
|
bitfld.long 0x0 31. "IREE31,Enable rising-edge events to cause the EIF31 bit to be set." "0: Rising-edge event is disabled,1: Rising-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 30. "IREE30,Enable rising-edge events to cause the EIF30 bit to be set." "0: Rising-edge event is disabled,1: Rising-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 29. "IREE29,Enable rising-edge events to cause the EIF29 bit to be set." "0: Rising-edge event is disabled,1: Rising-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 28. "IREE28,Enable rising-edge events to cause the EIF28 bit to be set." "0: Rising-edge event is disabled,1: Rising-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 27. "IREE27,Enable rising-edge events to cause the EIF27 bit to be set." "0: Rising-edge event is disabled,1: Rising-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 26. "IREE26,Enable rising-edge events to cause the EIF26 bit to be set." "0: Rising-edge event is disabled,1: Rising-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 25. "IREE25,Enable rising-edge events to cause the EIF25 bit to be set." "0: Rising-edge event is disabled,1: Rising-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 24. "IREE24,Enable rising-edge events to cause the EIF24 bit to be set." "0: Rising-edge event is disabled,1: Rising-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 23. "IREE23,Enable rising-edge events to cause the EIF23 bit to be set." "0: Rising-edge event is disabled,1: Rising-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 22. "IREE22,Enable rising-edge events to cause the EIF22 bit to be set." "0: Rising-edge event is disabled,1: Rising-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 21. "IREE21,Enable rising-edge events to cause the EIF21 bit to be set." "0: Rising-edge event is disabled,1: Rising-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 20. "IREE20,Enable rising-edge events to cause the EIF20 bit to be set." "0: Rising-edge event is disabled,1: Rising-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 19. "IREE19,Enable rising-edge events to cause the EIF19 bit to be set." "0: Rising-edge event is disabled,1: Rising-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 18. "IREE18,Enable rising-edge events to cause the EIF18 bit to be set." "0: Rising-edge event is disabled,1: Rising-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 17. "IREE17,Enable rising-edge events to cause the EIF17 bit to be set." "0: Rising-edge event is disabled,1: Rising-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 16. "IREE16,Enable rising-edge events to cause the EIF16 bit to be set." "0: Rising-edge event is disabled,1: Rising-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 15. "IREE15,Enable rising-edge events to cause the EIF15 bit to be set." "0: Rising-edge event is disabled,1: Rising-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 14. "IREE14,Enable rising-edge events to cause the EIF14 bit to be set." "0: Rising-edge event is disabled,1: Rising-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 13. "IREE13,Enable rising-edge events to cause the EIF13 bit to be set." "0: Rising-edge event is disabled,1: Rising-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 12. "IREE12,Enable rising-edge events to cause the EIF12 bit to be set." "0: Rising-edge event is disabled,1: Rising-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 11. "IREE11,Enable rising-edge events to cause the EIF11 bit to be set." "0: Rising-edge event is disabled,1: Rising-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 10. "IREE10,Enable rising-edge events to cause the EIF10 bit to be set." "0: Rising-edge event is disabled,1: Rising-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 9. "IREE9,Enable rising-edge events to cause the EIF9 bit to be set." "0: Rising-edge event is disabled,1: Rising-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 8. "IREE8,Enable rising-edge events to cause the EIF8 bit to be set." "0: Rising-edge event is disabled,1: Rising-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 7. "IREE7,Enable rising-edge events to cause the EIF7 bit to be set." "0: Rising-edge event is disabled,1: Rising-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 6. "IREE6,Enable rising-edge events to cause the EIF6 bit to be set." "0: Rising-edge event is disabled,1: Rising-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 5. "IREE5,Enable rising-edge events to cause the EIF5 bit to be set." "0: Rising-edge event is disabled,1: Rising-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 4. "IREE4,Enable rising-edge events to cause the EIF4 bit to be set." "0: Rising-edge event is disabled,1: Rising-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 3. "IREE3,Enable rising-edge events to cause the EIF3 bit to be set." "0: Rising-edge event is disabled,1: Rising-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 2. "IREE2,Enable rising-edge events to cause the EIF2 bit to be set." "0: Rising-edge event is disabled,1: Rising-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 1. "IREE1,Enable rising-edge events to cause the EIF1 bit to be set." "0: Rising-edge event is disabled,1: Rising-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 0. "IREE0,Enable rising-edge events to cause the EIF0 bit to be set." "0: Rising-edge event is disabled,1: Rising-edge event is enabled"
|
|
group.long 0x30++0x3
|
|
line.long 0x0 "IFEER0,SIUL2 Interrupt Falling-Edge Event Enable Register 0"
|
|
bitfld.long 0x0 31. "IFEE31,Enable falling-edge events to cause the EIF31 bit to be set." "0: Falling-edge event is disabled,1: Falling-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 30. "IFEE30,Enable falling-edge events to cause the EIF30 bit to be set." "0: Falling-edge event is disabled,1: Falling-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 29. "IFEE29,Enable falling-edge events to cause the EIF29 bit to be set." "0: Falling-edge event is disabled,1: Falling-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 28. "IFEE28,Enable falling-edge events to cause the EIF28 bit to be set." "0: Falling-edge event is disabled,1: Falling-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 27. "IFEE27,Enable falling-edge events to cause the EIF27 bit to be set." "0: Falling-edge event is disabled,1: Falling-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 26. "IFEE26,Enable falling-edge events to cause the EIF26 bit to be set." "0: Falling-edge event is disabled,1: Falling-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 25. "IFEE25,Enable falling-edge events to cause the EIF25 bit to be set." "0: Falling-edge event is disabled,1: Falling-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 24. "IFEE24,Enable falling-edge events to cause the EIF24 bit to be set." "0: Falling-edge event is disabled,1: Falling-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 23. "IFEE23,Enable falling-edge events to cause the EIF23 bit to be set." "0: Falling-edge event is disabled,1: Falling-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 22. "IFEE22,Enable falling-edge events to cause the EIF22 bit to be set." "0: Falling-edge event is disabled,1: Falling-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 21. "IFEE21,Enable falling-edge events to cause the EIF21 bit to be set." "0: Falling-edge event is disabled,1: Falling-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 20. "IFEE20,Enable falling-edge events to cause the EIF20 bit to be set." "0: Falling-edge event is disabled,1: Falling-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 19. "IFEE19,Enable falling-edge events to cause the EIF19 bit to be set." "0: Falling-edge event is disabled,1: Falling-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 18. "IFEE18,Enable falling-edge events to cause the EIF18 bit to be set." "0: Falling-edge event is disabled,1: Falling-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 17. "IFEE17,Enable falling-edge events to cause the EIF17 bit to be set." "0: Falling-edge event is disabled,1: Falling-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 16. "IFEE16,Enable falling-edge events to cause the EIF16 bit to be set." "0: Falling-edge event is disabled,1: Falling-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 15. "IFEE15,Enable falling-edge events to cause the EIF15 bit to be set." "0: Falling-edge event is disabled,1: Falling-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 14. "IFEE14,Enable falling-edge events to cause the EIF14 bit to be set." "0: Falling-edge event is disabled,1: Falling-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 13. "IFEE13,Enable falling-edge events to cause the EIF13 bit to be set." "0: Falling-edge event is disabled,1: Falling-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 12. "IFEE12,Enable falling-edge events to cause the EIF12 bit to be set." "0: Falling-edge event is disabled,1: Falling-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 11. "IFEE11,Enable falling-edge events to cause the EIF11 bit to be set." "0: Falling-edge event is disabled,1: Falling-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 10. "IFEE10,Enable falling-edge events to cause the EIF10 bit to be set." "0: Falling-edge event is disabled,1: Falling-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 9. "IFEE9,Enable falling-edge events to cause the EIF9 bit to be set." "0: Falling-edge event is disabled,1: Falling-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 8. "IFEE8,Enable falling-edge events to cause the EIF8 bit to be set." "0: Falling-edge event is disabled,1: Falling-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 7. "IFEE7,Enable falling-edge events to cause the EIF7 bit to be set." "0: Falling-edge event is disabled,1: Falling-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 6. "IFEE6,Enable falling-edge events to cause the EIF6 bit to be set." "0: Falling-edge event is disabled,1: Falling-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 5. "IFEE5,Enable falling-edge events to cause the EIF5 bit to be set." "0: Falling-edge event is disabled,1: Falling-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 4. "IFEE4,Enable falling-edge events to cause the EIF4 bit to be set." "0: Falling-edge event is disabled,1: Falling-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 3. "IFEE3,Enable falling-edge events to cause the EIF3 bit to be set." "0: Falling-edge event is disabled,1: Falling-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 2. "IFEE2,Enable falling-edge events to cause the EIF2 bit to be set." "0: Falling-edge event is disabled,1: Falling-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 1. "IFEE1,Enable falling-edge events to cause the EIF1 bit to be set." "0: Falling-edge event is disabled,1: Falling-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 0. "IFEE0,Enable falling-edge events to cause the EIF0 bit to be set." "0: Falling-edge event is disabled,1: Falling-edge event is enabled"
|
|
group.long 0x38++0x3
|
|
line.long 0x0 "IFER0,SIUL2 Interrupt Filter Enable Register 0"
|
|
bitfld.long 0x0 31. "IFE31,Enable digital glitch filter on the interrupt pad input." "0: Filter is disabled,1: Filter is enabled"
|
|
newline
|
|
bitfld.long 0x0 30. "IFE30,Enable digital glitch filter on the interrupt pad input." "0: Filter is disabled,1: Filter is enabled"
|
|
newline
|
|
bitfld.long 0x0 29. "IFE29,Enable digital glitch filter on the interrupt pad input." "0: Filter is disabled,1: Filter is enabled"
|
|
newline
|
|
bitfld.long 0x0 28. "IFE28,Enable digital glitch filter on the interrupt pad input." "0: Filter is disabled,1: Filter is enabled"
|
|
newline
|
|
bitfld.long 0x0 27. "IFE27,Enable digital glitch filter on the interrupt pad input." "0: Filter is disabled,1: Filter is enabled"
|
|
newline
|
|
bitfld.long 0x0 26. "IFE26,Enable digital glitch filter on the interrupt pad input." "0: Filter is disabled,1: Filter is enabled"
|
|
newline
|
|
bitfld.long 0x0 25. "IFE25,Enable digital glitch filter on the interrupt pad input." "0: Filter is disabled,1: Filter is enabled"
|
|
newline
|
|
bitfld.long 0x0 24. "IFE24,Enable digital glitch filter on the interrupt pad input." "0: Filter is disabled,1: Filter is enabled"
|
|
newline
|
|
bitfld.long 0x0 23. "IFE23,Enable digital glitch filter on the interrupt pad input." "0: Filter is disabled,1: Filter is enabled"
|
|
newline
|
|
bitfld.long 0x0 22. "IFE22,Enable digital glitch filter on the interrupt pad input." "0: Filter is disabled,1: Filter is enabled"
|
|
newline
|
|
bitfld.long 0x0 21. "IFE21,Enable digital glitch filter on the interrupt pad input." "0: Filter is disabled,1: Filter is enabled"
|
|
newline
|
|
bitfld.long 0x0 20. "IFE20,Enable digital glitch filter on the interrupt pad input." "0: Filter is disabled,1: Filter is enabled"
|
|
newline
|
|
bitfld.long 0x0 19. "IFE19,Enable digital glitch filter on the interrupt pad input." "0: Filter is disabled,1: Filter is enabled"
|
|
newline
|
|
bitfld.long 0x0 18. "IFE18,Enable digital glitch filter on the interrupt pad input." "0: Filter is disabled,1: Filter is enabled"
|
|
newline
|
|
bitfld.long 0x0 17. "IFE17,Enable digital glitch filter on the interrupt pad input." "0: Filter is disabled,1: Filter is enabled"
|
|
newline
|
|
bitfld.long 0x0 16. "IFE16,Enable digital glitch filter on the interrupt pad input." "0: Filter is disabled,1: Filter is enabled"
|
|
newline
|
|
bitfld.long 0x0 15. "IFE15,Enable digital glitch filter on the interrupt pad input." "0: Filter is disabled,1: Filter is enabled"
|
|
newline
|
|
bitfld.long 0x0 14. "IFE14,Enable digital glitch filter on the interrupt pad input." "0: Filter is disabled,1: Filter is enabled"
|
|
newline
|
|
bitfld.long 0x0 13. "IFE13,Enable digital glitch filter on the interrupt pad input." "0: Filter is disabled,1: Filter is enabled"
|
|
newline
|
|
bitfld.long 0x0 12. "IFE12,Enable digital glitch filter on the interrupt pad input." "0: Filter is disabled,1: Filter is enabled"
|
|
newline
|
|
bitfld.long 0x0 11. "IFE11,Enable digital glitch filter on the interrupt pad input." "0: Filter is disabled,1: Filter is enabled"
|
|
newline
|
|
bitfld.long 0x0 10. "IFE10,Enable digital glitch filter on the interrupt pad input." "0: Filter is disabled,1: Filter is enabled"
|
|
newline
|
|
bitfld.long 0x0 9. "IFE9,Enable digital glitch filter on the interrupt pad input." "0: Filter is disabled,1: Filter is enabled"
|
|
newline
|
|
bitfld.long 0x0 8. "IFE8,Enable digital glitch filter on the interrupt pad input." "0: Filter is disabled,1: Filter is enabled"
|
|
newline
|
|
bitfld.long 0x0 7. "IFE7,Enable digital glitch filter on the interrupt pad input." "0: Filter is disabled,1: Filter is enabled"
|
|
newline
|
|
bitfld.long 0x0 6. "IFE6,Enable digital glitch filter on the interrupt pad input." "0: Filter is disabled,1: Filter is enabled"
|
|
newline
|
|
bitfld.long 0x0 5. "IFE5,Enable digital glitch filter on the interrupt pad input." "0: Filter is disabled,1: Filter is enabled"
|
|
newline
|
|
bitfld.long 0x0 4. "IFE4,Enable digital glitch filter on the interrupt pad input." "0: Filter is disabled,1: Filter is enabled"
|
|
newline
|
|
bitfld.long 0x0 3. "IFE3,Enable digital glitch filter on the interrupt pad input." "0: Filter is disabled,1: Filter is enabled"
|
|
newline
|
|
bitfld.long 0x0 2. "IFE2,Enable digital glitch filter on the interrupt pad input." "0: Filter is disabled,1: Filter is enabled"
|
|
newline
|
|
bitfld.long 0x0 1. "IFE1,Enable digital glitch filter on the interrupt pad input." "0: Filter is disabled,1: Filter is enabled"
|
|
newline
|
|
bitfld.long 0x0 0. "IFE0,Enable digital glitch filter on the interrupt pad input." "0: Filter is disabled,1: Filter is enabled"
|
|
repeat 32. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x40)++0x3
|
|
line.long 0x0 "IFMCR$1,SIUL2 Interrupt Filter Maximum Counter Register"
|
|
hexmask.long.byte 0x0 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting"
|
|
repeat.end
|
|
group.long 0xC0++0x3
|
|
line.long 0x0 "IFCPR,SIUL2 Interrupt Filter Clock Prescaler Register"
|
|
hexmask.long.byte 0x0 0.--3. 1. "IFCP,Interrupt Filter Clock Prescaler setting"
|
|
repeat 310. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x240)++0x3
|
|
line.long 0x0 "MSCR$1,SIUL2 Multiplexed Signal Configuration"
|
|
bitfld.long 0x0 30.--31. "DDR_DO_TRIM,DDR Trim" "0: min delay,1: + ~50ps delay,2: + ~100ps delay,3: + ~150ps delay"
|
|
newline
|
|
bitfld.long 0x0 29. "DDR_INPUT,DDR Input" "0: CMOS input receiver mode (ipp_ibe=1),1: differential DDR input receiver mode (ipp_ibe=1)."
|
|
newline
|
|
bitfld.long 0x0 27.--28. "DDR_SEL,DDR Select" "0: DDR3 DDR3L modes,?,2: LPDDR2 mode,?"
|
|
newline
|
|
bitfld.long 0x0 24.--26. "DDR_ODT,On die Termination." "?,1: 120 Ohm ODT,2: 60 Ohm ODT,3: 40 Ohm ODT,4: 30 Ohm ODT,5: 24 Ohm ODT,6: 20 Ohm ODT,7: 17 Ohm ODT"
|
|
newline
|
|
bitfld.long 0x0 22.--23. "DCYCLE_TRIM,Dcycle Trim" "0: No duty cycle change,1: Left side pad pulse shrink i.e. 45% / 55%,2: Right side pad pulse shrink i.e. 55% / 45%,3: Right side pad pulse shrink i.e. 55% / 45%"
|
|
newline
|
|
bitfld.long 0x0 21. "OBE,Output Buffer Enable field" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 20. "ODE,Open Drain Enable field" "0: Output is CMOS,1: Output is open drain"
|
|
newline
|
|
bitfld.long 0x0 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 18. "HYS,Hysteresis Enable field" "0: CMOS Input,1: Schmitt trigger input"
|
|
newline
|
|
bitfld.long 0x0 17. "INV,Invert Data Output field" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 16. "PKE,Pull Enable field" "0: Pull Disabled,1: Pull Enabled"
|
|
newline
|
|
bitfld.long 0x0 14.--15. "SRE,Slew Rate field" "0: Low frequency slew rate (50 Mhz),1: Medium frequency slew rate (100Mhz),2: Medium frequency slew rate (100Mhz),3: High frequency slew rate (200Mhz)"
|
|
newline
|
|
bitfld.long 0x0 13. "PUE,Pull Select Field" "0: Pullup or pulldown resistors disable,1: Pullup or pulldown resistors enable"
|
|
newline
|
|
bitfld.long 0x0 11.--12. "PUS,Pull Up / Down Config Field" "0: 100 kOhm pulldown,1: 50 kOhm pullup,2: 100 kOhm pullup,3: 33 kOhm pullup"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "DSE,Drive strength field" "0: Output driver disabled,1: 240 Ohm,2: 240/2 = 120 Ohm,3: 240/3 Ohm = 80 Ohm,4: 240/4=60 Ohm,5: 240/5 Ohm = 48 Ohm,6: 240/6=40 Ohm,7: 240/7 = 34 Ohm (max drive strength)"
|
|
newline
|
|
bitfld.long 0x0 6.--7. "CRPOINT_TRIM,Crosspoint Trim" "0: No crosspoint change,1: Output crosspoint is +70mV to -70mV,2: Output crosspoint is -70mV to +70mV,3: Output crosspoint is +140mV higher"
|
|
newline
|
|
bitfld.long 0x0 5. "SMC,Safe Mode Control" "0: To drive pad in hi-z state using OBE = 0 when..,1: No effect on IP/SIUL driven OBE value"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "MUX_MODE,Mux Mode Select field"
|
|
repeat.end
|
|
repeat 512. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0xA40)++0x3
|
|
line.long 0x0 "IMCR$1,SIUL2 Input Multiplexed Signal Configuration Register"
|
|
bitfld.long 0x0 0.--2. "DAISY,DAISY bit" "0,1,2,3,4,5,6,7"
|
|
repeat.end
|
|
repeat 41. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x1300)++0x3
|
|
line.long 0x0 "GPDO$1,SIUL2 GPIO Pad Data Output Register"
|
|
bitfld.long 0x0 24. "PDO_4n,Pad Data Out" "0: Logic low value,1: Logic high value"
|
|
newline
|
|
bitfld.long 0x0 16. "PDO_4n1,Pad Data Out" "0: Logic low value,1: Logic high value"
|
|
newline
|
|
bitfld.long 0x0 8. "PDO_4n2,Pad Data Out" "0: Logic low value,1: Logic high value"
|
|
newline
|
|
bitfld.long 0x0 0. "PDO_4n3,Pad Data Out" "0: Logic low value,1: Logic high value"
|
|
repeat.end
|
|
repeat 41. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x1500)++0x3
|
|
line.long 0x0 "GPDI$1,SIUL2 GPIO Pad Data Input Register"
|
|
bitfld.long 0x0 24. "PDI_4n,Pad Data In" "0: Logic low value,1: Logic high value"
|
|
newline
|
|
bitfld.long 0x0 16. "PDI_4n1,Pad Data In" "0: Logic low value,1: Logic high value"
|
|
newline
|
|
bitfld.long 0x0 8. "PDI_4n2,Pad Data In" "0: Logic low value,1: Logic high value"
|
|
newline
|
|
bitfld.long 0x0 0. "PDI_4n3,Pad Data In" "0: Logic low value,1: Logic high value"
|
|
repeat.end
|
|
group.word 0x1700++0x13
|
|
line.word 0x0 "PGPDO1,SIUL2 Parallel GPIO Pad Data Out Register"
|
|
hexmask.word 0x0 0.--15. 1. "PPDO,Parallel Pad Data Out"
|
|
line.word 0x2 "PGPDO0,SIUL2 Parallel GPIO Pad Data Out Register"
|
|
hexmask.word 0x2 0.--15. 1. "PPDO,Parallel Pad Data Out"
|
|
line.word 0x4 "PGPDO3,SIUL2 Parallel GPIO Pad Data Out Register"
|
|
hexmask.word 0x4 0.--15. 1. "PPDO,Parallel Pad Data Out"
|
|
line.word 0x6 "PGPDO2,SIUL2 Parallel GPIO Pad Data Out Register"
|
|
hexmask.word 0x6 0.--15. 1. "PPDO,Parallel Pad Data Out"
|
|
line.word 0x8 "PGPDO5,SIUL2 Parallel GPIO Pad Data Out Register"
|
|
hexmask.word 0x8 0.--15. 1. "PPDO,Parallel Pad Data Out"
|
|
line.word 0xA "PGPDO4,SIUL2 Parallel GPIO Pad Data Out Register"
|
|
hexmask.word 0xA 0.--15. 1. "PPDO,Parallel Pad Data Out"
|
|
line.word 0xC "PGPDO7,SIUL2 Parallel GPIO Pad Data Out Register"
|
|
hexmask.word 0xC 0.--15. 1. "PPDO,Parallel Pad Data Out"
|
|
line.word 0xE "PGPDO6,SIUL2 Parallel GPIO Pad Data Out Register"
|
|
hexmask.word 0xE 0.--15. 1. "PPDO,Parallel Pad Data Out"
|
|
line.word 0x10 "PGPDO9,SIUL2 Parallel GPIO Pad Data Out Register"
|
|
hexmask.word 0x10 0.--15. 1. "PPDO,Parallel Pad Data Out"
|
|
line.word 0x12 "PGPDO8,SIUL2 Parallel GPIO Pad Data Out Register"
|
|
hexmask.word 0x12 0.--15. 1. "PPDO,Parallel Pad Data Out"
|
|
group.word 0x1716++0x1
|
|
line.word 0x0 "PGPDO10,SIUL2 Parallel GPIO Pad Data Out Register"
|
|
hexmask.word 0x0 0.--15. 1. "PPDO,Parallel Pad Data Out"
|
|
rgroup.word 0x1740++0x13
|
|
line.word 0x0 "PGPDI1,SIUL2 Parallel GPIO Pad Data In Register"
|
|
hexmask.word 0x0 0.--15. 1. "PPDI,Parallel Pad Data In"
|
|
line.word 0x2 "PGPDI0,SIUL2 Parallel GPIO Pad Data In Register"
|
|
hexmask.word 0x2 0.--15. 1. "PPDI,Parallel Pad Data In"
|
|
line.word 0x4 "PGPDI3,SIUL2 Parallel GPIO Pad Data In Register"
|
|
hexmask.word 0x4 0.--15. 1. "PPDI,Parallel Pad Data In"
|
|
line.word 0x6 "PGPDI2,SIUL2 Parallel GPIO Pad Data In Register"
|
|
hexmask.word 0x6 0.--15. 1. "PPDI,Parallel Pad Data In"
|
|
line.word 0x8 "PGPDI5,SIUL2 Parallel GPIO Pad Data In Register"
|
|
hexmask.word 0x8 0.--15. 1. "PPDI,Parallel Pad Data In"
|
|
line.word 0xA "PGPDI4,SIUL2 Parallel GPIO Pad Data In Register"
|
|
hexmask.word 0xA 0.--15. 1. "PPDI,Parallel Pad Data In"
|
|
line.word 0xC "PGPDI7,SIUL2 Parallel GPIO Pad Data In Register"
|
|
hexmask.word 0xC 0.--15. 1. "PPDI,Parallel Pad Data In"
|
|
line.word 0xE "PGPDI6,SIUL2 Parallel GPIO Pad Data In Register"
|
|
hexmask.word 0xE 0.--15. 1. "PPDI,Parallel Pad Data In"
|
|
line.word 0x10 "PGPDI9,SIUL2 Parallel GPIO Pad Data In Register"
|
|
hexmask.word 0x10 0.--15. 1. "PPDI,Parallel Pad Data In"
|
|
line.word 0x12 "PGPDI8,SIUL2 Parallel GPIO Pad Data In Register"
|
|
hexmask.word 0x12 0.--15. 1. "PPDI,Parallel Pad Data In"
|
|
rgroup.word 0x1756++0x1
|
|
line.word 0x0 "PGPDI10,SIUL2 Parallel GPIO Pad Data In Register"
|
|
hexmask.word 0x0 0.--15. 1. "PPDI,Parallel Pad Data In"
|
|
repeat 11. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x1780)++0x3
|
|
line.long 0x0 "MPGPDO$1,SIUL2 Masked Parallel GPIO Pad Data Out Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "MASK,Mask Field"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "MPPDO,Masked Parallel Pad Data Out"
|
|
repeat.end
|
|
tree.end
|
|
tree "SPI (Serial Peripheral Interface)"
|
|
base ad:0x0
|
|
tree "SPI_0"
|
|
base ad:0x40057000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "MCR,Module Configuration Register"
|
|
bitfld.long 0x0 31. "MSTR,Master/Slave Mode Select" "0: Enables Slave mode,1: Enables Master mode"
|
|
bitfld.long 0x0 30. "CONT_SCKE,Continuous SCK Enable" "0: Continuous SCK disabled.,1: Continuous SCK enabled."
|
|
newline
|
|
rbitfld.long 0x0 28.--29. "DCONF,SPI Configuration." "0: SPI,?,?,?"
|
|
bitfld.long 0x0 27. "FRZ,Freeze" "0: Do not halt serial transfers in Debug mode.,1: Halt serial transfers in Debug mode."
|
|
newline
|
|
bitfld.long 0x0 26. "MTFE,Modified Transfer Format Enable" "0: Modified SPI transfer format disabled.,1: Modified SPI transfer format enabled."
|
|
bitfld.long 0x0 25. "PCSSE,Peripheral Chip Select Strobe Enable" "0: PCS5/ PCSS is used as the Peripheral Chip..,1: PCS5/ PCSS is used as an active-low PCS Strobe.."
|
|
newline
|
|
bitfld.long 0x0 24. "ROOE,Receive FIFO Overflow Overwrite Enable" "0: Incoming data is ignored.,1: Incoming data is shifted into the shift register."
|
|
hexmask.long.byte 0x0 16.--23. 1. "PCSIS,Peripheral Chip Select x Inactive State"
|
|
newline
|
|
bitfld.long 0x0 14. "MDIS,Module Disable" "0: Enables the module clocks.,1: Allows external logic to disable the module.."
|
|
bitfld.long 0x0 13. "DIS_TXF,Disable Transmit FIFO" "0: TX FIFO is enabled.,1: TX FIFO is disabled."
|
|
newline
|
|
bitfld.long 0x0 12. "DIS_RXF,Disable Receive FIFO" "0: RX FIFO is enabled.,1: RX FIFO is disabled."
|
|
bitfld.long 0x0 11. "CLR_TXF,Clear TX FIFO" "0: Do not clear the TX FIFO counter.,1: Clear the TX FIFO counter."
|
|
newline
|
|
bitfld.long 0x0 10. "CLR_RXF,Clear RX FIFO" "0: Do not clear the RX FIFO counter.,1: Clear the RX FIFO counter."
|
|
bitfld.long 0x0 8.--9. "SMPL_PT,Sample Point" "0: 0 protocol clock cycles between SCK edge and SIN..,1: 1 protocol clock cycle between SCK edge and SIN..,2: 2 protocol clock cycles between SCK edge and SIN..,?"
|
|
newline
|
|
bitfld.long 0x0 3. "XSPI,Extended SPI Mode" "0: Normal SPI Mode. Frame size can be up to 16..,1: Extended SPI Mode. Up to 32 bit SPI Frames along.."
|
|
bitfld.long 0x0 2. "FCPCS,Fast Continuous PCS Mode." "0: Normal or Slow Continuous PCS mode. Masking of..,1: Fast Continuous PCS mode. Delays masked via.."
|
|
newline
|
|
bitfld.long 0x0 1. "PES,Parity Error Stop" "0: SPI frame transmission continues.,1: SPI frame transmission stops."
|
|
bitfld.long 0x0 0. "HALT,Halt" "0: Start transfers.,1: Stop transfers."
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "TCR,Transfer Count Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "SPI_TCNT,SPI Transfer Counter"
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0xC)++0x3
|
|
line.long 0x0 "CTAR$1,Clock and Transfer Attributes Register (In Master Mode)"
|
|
bitfld.long 0x0 31. "DBR,Double Baud Rate" "0: The baud rate is computed normally with a 50/50..,1: The baud rate is doubled with the duty cycle.."
|
|
hexmask.long.byte 0x0 27.--30. 1. "FMSZ,Frame Size"
|
|
newline
|
|
bitfld.long 0x0 26. "CPOL,Clock Polarity" "0: The inactive state value of SCK is low.,1: The inactive state value of SCK is high."
|
|
bitfld.long 0x0 25. "CPHA,Clock Phase" "0: Data is captured on the leading edge of SCK and..,1: Data is changed on the leading edge of SCK and.."
|
|
newline
|
|
bitfld.long 0x0 24. "LSBFE,LSB First" "0: Data is transferred MSB first.,1: Data is transferred LSB first."
|
|
bitfld.long 0x0 22.--23. "PCSSCK,PCS to SCK Delay Prescaler" "0: PCS to SCK Prescaler value is 1.,1: PCS to SCK Prescaler value is 3.,2: PCS to SCK Prescaler value is 5.,3: PCS to SCK Prescaler value is 7."
|
|
newline
|
|
bitfld.long 0x0 20.--21. "PASC,After SCK Delay Prescaler" "0: Delay after Transfer Prescaler value is 1.,1: Delay after Transfer Prescaler value is 3.,2: Delay after Transfer Prescaler value is 5.,3: Delay after Transfer Prescaler value is 7."
|
|
bitfld.long 0x0 18.--19. "PDT,Delay after Transfer Prescaler" "0: Delay after Transfer Prescaler value is 1.,1: Delay after Transfer Prescaler value is 3.,2: Delay after Transfer Prescaler value is 5.,3: Delay after Transfer Prescaler value is 7."
|
|
newline
|
|
bitfld.long 0x0 16.--17. "PBR,Baud Rate Prescaler" "0: Baud Rate Prescaler value is 2.,1: Baud Rate Prescaler value is 3.,2: Baud Rate Prescaler value is 5.,3: Baud Rate Prescaler value is 7."
|
|
hexmask.long.byte 0x0 12.--15. 1. "CSSCK,PCS to SCK Delay Scaler"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "ASC,After SCK Delay Scaler"
|
|
hexmask.long.byte 0x0 4.--7. 1. "DT,Delay After Transfer Scaler"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "BR,Baud Rate Scaler"
|
|
repeat.end
|
|
group.long 0xC++0x3
|
|
line.long 0x0 "CTAR_SLAVE,Clock and Transfer Attributes Register (In Slave Mode)"
|
|
hexmask.long.byte 0x0 27.--31. 1. "FMSZ,Frame Size"
|
|
bitfld.long 0x0 26. "CPOL,Clock Polarity" "0: The inactive state value of SCK is low.,1: The inactive state value of SCK is high."
|
|
newline
|
|
bitfld.long 0x0 25. "CPHA,Clock Phase" "0: Data is captured on the leading edge of SCK and..,1: Data is changed on the leading edge of SCK and.."
|
|
bitfld.long 0x0 24. "PE,Parity Enable" "0: No parity bit included/checked.,1: Parity bit is transmitted instead of last data.."
|
|
newline
|
|
bitfld.long 0x0 23. "PP,Parity Polarity" "0: Even Parity: the number of 1 bits in the..,1: Odd Parity: the number of 1 bits in the.."
|
|
group.long 0x2C++0xB
|
|
line.long 0x0 "SR,Status Register"
|
|
bitfld.long 0x0 31. "TCF,Transfer Complete Flag" "0: Transfer not complete.,1: Transfer complete."
|
|
rbitfld.long 0x0 30. "TXRXS,TX and RX Status" "0: Transmit and receive operations are disabled..,1: Transmit and receive operations are enabled (The.."
|
|
newline
|
|
bitfld.long 0x0 28. "EOQF,End of Queue Flag" "0: EOQ is not set in the executing command.,1: EOQ is set in the executing SPI command."
|
|
bitfld.long 0x0 27. "TFUF,Transmit FIFO Underflow Flag" "0: No TX FIFO underflow.,1: TX FIFO underflow has occurred."
|
|
newline
|
|
bitfld.long 0x0 25. "TFFF,Transmit FIFO Fill Flag" "0: TX FIFO is full.,1: TX FIFO is not full."
|
|
rbitfld.long 0x0 24. "BSYF,Busy Flag." "0: No Cyclic Command Transfer in Progress.,1: Cyclic Command Transfer is in progress. Current.."
|
|
newline
|
|
bitfld.long 0x0 23. "CMDTCF,Command Transfer Complete Flag." "0: Data Transfer by current Command not complete.,1: Data Transfer by current Command is complete."
|
|
bitfld.long 0x0 21. "SPEF,SPI Parity Error Flag" "0: No parity error.,1: Parity error has occurred."
|
|
newline
|
|
bitfld.long 0x0 19. "RFOF,Receive FIFO Overflow Flag" "0: No Rx FIFO overflow.,1: Rx FIFO overflow has occurred."
|
|
bitfld.long 0x0 18. "TFIWF,Tranmit FIFO Invalid Write Flag" "0: No Invalid Data present in TX FIFO.,1: Invalid Data present in TX FIFO since CMD FIFO.."
|
|
newline
|
|
bitfld.long 0x0 17. "RFDF,Receive FIFO Drain Flag" "0: RX FIFO is empty.,1: RX FIFO is not empty."
|
|
bitfld.long 0x0 16. "CMDFFF,Command FIFO Fill Flag" "0: CMD FIFO is full.,1: CMD FIFO is not full."
|
|
newline
|
|
hexmask.long.byte 0x0 12.--15. 1. "TXCTR,TX FIFO Counter"
|
|
hexmask.long.byte 0x0 8.--11. 1. "TXNXTPTR,Transmit Next Pointer"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--7. 1. "RXCTR,RX FIFO Counter"
|
|
hexmask.long.byte 0x0 0.--3. 1. "POPNXTPTR,Pop Next Pointer"
|
|
line.long 0x4 "RSER,DMA/Interrupt Request Select and Enable Register"
|
|
bitfld.long 0x4 31. "TCF_RE,Transmission Complete Request Enable" "0: TCF interrupt requests are disabled.,1: TCF interrupt requests are enabled."
|
|
bitfld.long 0x4 30. "CMDFFF_RE,Command FIFO Fill Flag Request Enable." "0: CMDFFF interrupts or DMA requests are disabled.,1: CMDFFF interrupts or DMA requests are enabled."
|
|
newline
|
|
bitfld.long 0x4 28. "EOQF_RE,Finished Request Enable" "0: EOQF interrupt requests are disabled.,1: EOQF interrupt requests are enabled."
|
|
bitfld.long 0x4 27. "TFUF_RE,Transmit FIFO Underflow Request Enable" "0: TFUF interrupt requests are disabled.,1: TFUF interrupt requests are enabled."
|
|
newline
|
|
bitfld.long 0x4 25. "TFFF_RE,Transmit FIFO Fill Request Enable" "0: TFFF interrupts or DMA requests are disabled.,1: TFFF interrupts or DMA requests are enabled."
|
|
bitfld.long 0x4 24. "TFFF_DIRS,Transmit FIFO Fill DMA or Interrupt Request Select" "0: TFFF flag generates interrupt requests.,1: TFFF flag generates DMA requests."
|
|
newline
|
|
bitfld.long 0x4 23. "CMDTCF_RE,Command Transmission Complete Request Enable." "0: CMDTCF interrupt requests are disabled.,1: CMDTCF interrupt requests are enabled."
|
|
bitfld.long 0x4 21. "SPEF_RE,SPI Parity Error Request Enable" "0: SPEF interrupt requests are disabled.,1: SPEF interrupt requests are enabled."
|
|
newline
|
|
bitfld.long 0x4 19. "RFOF_RE,Receive FIFO Overflow Request Enable" "0: RFOF interrupt requests are disabled.,1: RFOF interrupt requests are enabled."
|
|
bitfld.long 0x4 18. "TFIWF_RE,Transmit FIFO Invalid Write Request Enable." "0: TFIWF interrupt requests are disabled.,1: TFIWF interrupt requests are enabled."
|
|
newline
|
|
bitfld.long 0x4 17. "RFDF_RE,Receive FIFO Drain Request Enable" "0: RFDF interrupt or DMA requests are disabled.,1: RFDF interrupt or DMA requests are enabled."
|
|
bitfld.long 0x4 16. "RFDF_DIRS,Receive FIFO Drain DMA or Interrupt Request Select" "0: Interrupt request.,1: DMA request."
|
|
newline
|
|
bitfld.long 0x4 15. "CMDFFF_DIRS,Command FIFO Fill DMA or Interrupt Request Select" "0: CMDFFF flag generates interrupt requests.,1: CMDFFF flag generates DMA requests."
|
|
line.long 0x8 "PUSHR,PUSH TX FIFO Register In Master Mode"
|
|
bitfld.long 0x8 31. "CONT,Continuous Peripheral Chip Select Enable" "0: Return PCSn signals to their inactive state..,1: Keep PCSn signals asserted between transfers."
|
|
bitfld.long 0x8 28.--30. "CTAS,Clock and Transfer Attributes Select" "0: CTAR0,1: CTAR1,2: CTAR2,3: CTAR3,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x8 27. "EOQ,End Of Queue" "0: The SPI data is not the last data to transfer.,1: The SPI data is the last data to transfer."
|
|
bitfld.long 0x8 26. "CTCNT,Clear Transfer Counter" "0: Do not clear the TCR[TCNT] field.,1: Clear the TCR[TCNT] field."
|
|
newline
|
|
bitfld.long 0x8 25. "PE_MASC,Parity Enable or Mask T ASC delay in the current frame" "0: PE - No parity bit included/checked. MASC - T..,1: PE - Parity bit is transmitted instead of the.."
|
|
bitfld.long 0x8 24. "PP_MCSC,Parity Polarity or Mask T CSC delay in the next frame" "0: PP - Even Parity: the number of 1 bits in the..,1: PP - Odd Parity: the number of 1 bits in the.."
|
|
newline
|
|
hexmask.long.byte 0x8 16.--23. 1. "PCS,PCS"
|
|
hexmask.long.word 0x8 0.--15. 1. "TXDATA,Transmit Data"
|
|
group.long 0x34++0x3
|
|
line.long 0x0 "PUSHR_SLAVE,PUSH TX FIFO Register In Slave Mode"
|
|
hexmask.long.word 0x0 0.--15. 1. "TXDATA,Transmit Data"
|
|
rgroup.long 0x38++0x3
|
|
line.long 0x0 "POPR,POP RX FIFO Register"
|
|
hexmask.long 0x0 0.--31. 1. "RXDATA,Received Data"
|
|
repeat 5. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x3C)++0x3
|
|
line.long 0x0 "TXFR$1,Transmit FIFO Registers"
|
|
hexmask.long.word 0x0 16.--31. 1. "TXCMD_TXDATA,Transmit Command or Transmit Data"
|
|
hexmask.long.word 0x0 0.--15. 1. "TXDATA,Transmit Data"
|
|
repeat.end
|
|
repeat 5. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x7C)++0x3
|
|
line.long 0x0 "RXFR$1,Receive FIFO Registers"
|
|
hexmask.long 0x0 0.--31. 1. "RXDATA,Receive Data"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x11C)++0x3
|
|
line.long 0x0 "CTARE$1,Clock and Transfer Attributes Register Extended"
|
|
bitfld.long 0x0 16. "FMSZE,Frame Size Extended" "0: Default Mode. Up to 16 bit SPI frames can be..,1: Up to 32 bit SPI frames can be transferred. Each.."
|
|
hexmask.long.word 0x0 0.--10. 1. "DTCP,Data Transfer Count Preload"
|
|
repeat.end
|
|
rgroup.long 0x13C++0x3
|
|
line.long 0x0 "SREX,Status Register Extended"
|
|
bitfld.long 0x0 14. "RXCTR4,RX FIFO Counter[4]" "0,1"
|
|
bitfld.long 0x0 11. "TXCTR4,TX FIFO Counter[4]" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--8. 1. "CMDCTR,CMD FIFO Counter"
|
|
hexmask.long.byte 0x0 0.--3. 1. "CMDNXTPTR,Command Next Pointer"
|
|
tree.end
|
|
tree "SPI_1"
|
|
base ad:0x400C0000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "MCR,Module Configuration Register"
|
|
bitfld.long 0x0 31. "MSTR,Master/Slave Mode Select" "0: Enables Slave mode,1: Enables Master mode"
|
|
bitfld.long 0x0 30. "CONT_SCKE,Continuous SCK Enable" "0: Continuous SCK disabled.,1: Continuous SCK enabled."
|
|
newline
|
|
rbitfld.long 0x0 28.--29. "DCONF,SPI Configuration." "0: SPI,?,?,?"
|
|
bitfld.long 0x0 27. "FRZ,Freeze" "0: Do not halt serial transfers in Debug mode.,1: Halt serial transfers in Debug mode."
|
|
newline
|
|
bitfld.long 0x0 26. "MTFE,Modified Transfer Format Enable" "0: Modified SPI transfer format disabled.,1: Modified SPI transfer format enabled."
|
|
bitfld.long 0x0 25. "PCSSE,Peripheral Chip Select Strobe Enable" "0: PCS5/ PCSS is used as the Peripheral Chip..,1: PCS5/ PCSS is used as an active-low PCS Strobe.."
|
|
newline
|
|
bitfld.long 0x0 24. "ROOE,Receive FIFO Overflow Overwrite Enable" "0: Incoming data is ignored.,1: Incoming data is shifted into the shift register."
|
|
hexmask.long.byte 0x0 16.--23. 1. "PCSIS,Peripheral Chip Select x Inactive State"
|
|
newline
|
|
bitfld.long 0x0 14. "MDIS,Module Disable" "0: Enables the module clocks.,1: Allows external logic to disable the module.."
|
|
bitfld.long 0x0 13. "DIS_TXF,Disable Transmit FIFO" "0: TX FIFO is enabled.,1: TX FIFO is disabled."
|
|
newline
|
|
bitfld.long 0x0 12. "DIS_RXF,Disable Receive FIFO" "0: RX FIFO is enabled.,1: RX FIFO is disabled."
|
|
bitfld.long 0x0 11. "CLR_TXF,Clear TX FIFO" "0: Do not clear the TX FIFO counter.,1: Clear the TX FIFO counter."
|
|
newline
|
|
bitfld.long 0x0 10. "CLR_RXF,Clear RX FIFO" "0: Do not clear the RX FIFO counter.,1: Clear the RX FIFO counter."
|
|
bitfld.long 0x0 8.--9. "SMPL_PT,Sample Point" "0: 0 protocol clock cycles between SCK edge and SIN..,1: 1 protocol clock cycle between SCK edge and SIN..,2: 2 protocol clock cycles between SCK edge and SIN..,?"
|
|
newline
|
|
bitfld.long 0x0 3. "XSPI,Extended SPI Mode" "0: Normal SPI Mode. Frame size can be up to 16..,1: Extended SPI Mode. Up to 32 bit SPI Frames along.."
|
|
bitfld.long 0x0 2. "FCPCS,Fast Continuous PCS Mode." "0: Normal or Slow Continuous PCS mode. Masking of..,1: Fast Continuous PCS mode. Delays masked via.."
|
|
newline
|
|
bitfld.long 0x0 1. "PES,Parity Error Stop" "0: SPI frame transmission continues.,1: SPI frame transmission stops."
|
|
bitfld.long 0x0 0. "HALT,Halt" "0: Start transfers.,1: Stop transfers."
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "TCR,Transfer Count Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "SPI_TCNT,SPI Transfer Counter"
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0xC)++0x3
|
|
line.long 0x0 "CTAR$1,Clock and Transfer Attributes Register (In Master Mode)"
|
|
bitfld.long 0x0 31. "DBR,Double Baud Rate" "0: The baud rate is computed normally with a 50/50..,1: The baud rate is doubled with the duty cycle.."
|
|
hexmask.long.byte 0x0 27.--30. 1. "FMSZ,Frame Size"
|
|
newline
|
|
bitfld.long 0x0 26. "CPOL,Clock Polarity" "0: The inactive state value of SCK is low.,1: The inactive state value of SCK is high."
|
|
bitfld.long 0x0 25. "CPHA,Clock Phase" "0: Data is captured on the leading edge of SCK and..,1: Data is changed on the leading edge of SCK and.."
|
|
newline
|
|
bitfld.long 0x0 24. "LSBFE,LSB First" "0: Data is transferred MSB first.,1: Data is transferred LSB first."
|
|
bitfld.long 0x0 22.--23. "PCSSCK,PCS to SCK Delay Prescaler" "0: PCS to SCK Prescaler value is 1.,1: PCS to SCK Prescaler value is 3.,2: PCS to SCK Prescaler value is 5.,3: PCS to SCK Prescaler value is 7."
|
|
newline
|
|
bitfld.long 0x0 20.--21. "PASC,After SCK Delay Prescaler" "0: Delay after Transfer Prescaler value is 1.,1: Delay after Transfer Prescaler value is 3.,2: Delay after Transfer Prescaler value is 5.,3: Delay after Transfer Prescaler value is 7."
|
|
bitfld.long 0x0 18.--19. "PDT,Delay after Transfer Prescaler" "0: Delay after Transfer Prescaler value is 1.,1: Delay after Transfer Prescaler value is 3.,2: Delay after Transfer Prescaler value is 5.,3: Delay after Transfer Prescaler value is 7."
|
|
newline
|
|
bitfld.long 0x0 16.--17. "PBR,Baud Rate Prescaler" "0: Baud Rate Prescaler value is 2.,1: Baud Rate Prescaler value is 3.,2: Baud Rate Prescaler value is 5.,3: Baud Rate Prescaler value is 7."
|
|
hexmask.long.byte 0x0 12.--15. 1. "CSSCK,PCS to SCK Delay Scaler"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "ASC,After SCK Delay Scaler"
|
|
hexmask.long.byte 0x0 4.--7. 1. "DT,Delay After Transfer Scaler"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "BR,Baud Rate Scaler"
|
|
repeat.end
|
|
group.long 0xC++0x3
|
|
line.long 0x0 "CTAR_SLAVE,Clock and Transfer Attributes Register (In Slave Mode)"
|
|
hexmask.long.byte 0x0 27.--31. 1. "FMSZ,Frame Size"
|
|
bitfld.long 0x0 26. "CPOL,Clock Polarity" "0: The inactive state value of SCK is low.,1: The inactive state value of SCK is high."
|
|
newline
|
|
bitfld.long 0x0 25. "CPHA,Clock Phase" "0: Data is captured on the leading edge of SCK and..,1: Data is changed on the leading edge of SCK and.."
|
|
bitfld.long 0x0 24. "PE,Parity Enable" "0: No parity bit included/checked.,1: Parity bit is transmitted instead of last data.."
|
|
newline
|
|
bitfld.long 0x0 23. "PP,Parity Polarity" "0: Even Parity: the number of 1 bits in the..,1: Odd Parity: the number of 1 bits in the.."
|
|
group.long 0x2C++0xB
|
|
line.long 0x0 "SR,Status Register"
|
|
bitfld.long 0x0 31. "TCF,Transfer Complete Flag" "0: Transfer not complete.,1: Transfer complete."
|
|
rbitfld.long 0x0 30. "TXRXS,TX and RX Status" "0: Transmit and receive operations are disabled..,1: Transmit and receive operations are enabled (The.."
|
|
newline
|
|
bitfld.long 0x0 28. "EOQF,End of Queue Flag" "0: EOQ is not set in the executing command.,1: EOQ is set in the executing SPI command."
|
|
bitfld.long 0x0 27. "TFUF,Transmit FIFO Underflow Flag" "0: No TX FIFO underflow.,1: TX FIFO underflow has occurred."
|
|
newline
|
|
bitfld.long 0x0 25. "TFFF,Transmit FIFO Fill Flag" "0: TX FIFO is full.,1: TX FIFO is not full."
|
|
rbitfld.long 0x0 24. "BSYF,Busy Flag." "0: No Cyclic Command Transfer in Progress.,1: Cyclic Command Transfer is in progress. Current.."
|
|
newline
|
|
bitfld.long 0x0 23. "CMDTCF,Command Transfer Complete Flag." "0: Data Transfer by current Command not complete.,1: Data Transfer by current Command is complete."
|
|
bitfld.long 0x0 21. "SPEF,SPI Parity Error Flag" "0: No parity error.,1: Parity error has occurred."
|
|
newline
|
|
bitfld.long 0x0 19. "RFOF,Receive FIFO Overflow Flag" "0: No Rx FIFO overflow.,1: Rx FIFO overflow has occurred."
|
|
bitfld.long 0x0 18. "TFIWF,Tranmit FIFO Invalid Write Flag" "0: No Invalid Data present in TX FIFO.,1: Invalid Data present in TX FIFO since CMD FIFO.."
|
|
newline
|
|
bitfld.long 0x0 17. "RFDF,Receive FIFO Drain Flag" "0: RX FIFO is empty.,1: RX FIFO is not empty."
|
|
bitfld.long 0x0 16. "CMDFFF,Command FIFO Fill Flag" "0: CMD FIFO is full.,1: CMD FIFO is not full."
|
|
newline
|
|
hexmask.long.byte 0x0 12.--15. 1. "TXCTR,TX FIFO Counter"
|
|
hexmask.long.byte 0x0 8.--11. 1. "TXNXTPTR,Transmit Next Pointer"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--7. 1. "RXCTR,RX FIFO Counter"
|
|
hexmask.long.byte 0x0 0.--3. 1. "POPNXTPTR,Pop Next Pointer"
|
|
line.long 0x4 "RSER,DMA/Interrupt Request Select and Enable Register"
|
|
bitfld.long 0x4 31. "TCF_RE,Transmission Complete Request Enable" "0: TCF interrupt requests are disabled.,1: TCF interrupt requests are enabled."
|
|
bitfld.long 0x4 30. "CMDFFF_RE,Command FIFO Fill Flag Request Enable." "0: CMDFFF interrupts or DMA requests are disabled.,1: CMDFFF interrupts or DMA requests are enabled."
|
|
newline
|
|
bitfld.long 0x4 28. "EOQF_RE,Finished Request Enable" "0: EOQF interrupt requests are disabled.,1: EOQF interrupt requests are enabled."
|
|
bitfld.long 0x4 27. "TFUF_RE,Transmit FIFO Underflow Request Enable" "0: TFUF interrupt requests are disabled.,1: TFUF interrupt requests are enabled."
|
|
newline
|
|
bitfld.long 0x4 25. "TFFF_RE,Transmit FIFO Fill Request Enable" "0: TFFF interrupts or DMA requests are disabled.,1: TFFF interrupts or DMA requests are enabled."
|
|
bitfld.long 0x4 24. "TFFF_DIRS,Transmit FIFO Fill DMA or Interrupt Request Select" "0: TFFF flag generates interrupt requests.,1: TFFF flag generates DMA requests."
|
|
newline
|
|
bitfld.long 0x4 23. "CMDTCF_RE,Command Transmission Complete Request Enable." "0: CMDTCF interrupt requests are disabled.,1: CMDTCF interrupt requests are enabled."
|
|
bitfld.long 0x4 21. "SPEF_RE,SPI Parity Error Request Enable" "0: SPEF interrupt requests are disabled.,1: SPEF interrupt requests are enabled."
|
|
newline
|
|
bitfld.long 0x4 19. "RFOF_RE,Receive FIFO Overflow Request Enable" "0: RFOF interrupt requests are disabled.,1: RFOF interrupt requests are enabled."
|
|
bitfld.long 0x4 18. "TFIWF_RE,Transmit FIFO Invalid Write Request Enable." "0: TFIWF interrupt requests are disabled.,1: TFIWF interrupt requests are enabled."
|
|
newline
|
|
bitfld.long 0x4 17. "RFDF_RE,Receive FIFO Drain Request Enable" "0: RFDF interrupt or DMA requests are disabled.,1: RFDF interrupt or DMA requests are enabled."
|
|
bitfld.long 0x4 16. "RFDF_DIRS,Receive FIFO Drain DMA or Interrupt Request Select" "0: Interrupt request.,1: DMA request."
|
|
newline
|
|
bitfld.long 0x4 15. "CMDFFF_DIRS,Command FIFO Fill DMA or Interrupt Request Select" "0: CMDFFF flag generates interrupt requests.,1: CMDFFF flag generates DMA requests."
|
|
line.long 0x8 "PUSHR,PUSH TX FIFO Register In Master Mode"
|
|
bitfld.long 0x8 31. "CONT,Continuous Peripheral Chip Select Enable" "0: Return PCSn signals to their inactive state..,1: Keep PCSn signals asserted between transfers."
|
|
bitfld.long 0x8 28.--30. "CTAS,Clock and Transfer Attributes Select" "0: CTAR0,1: CTAR1,2: CTAR2,3: CTAR3,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x8 27. "EOQ,End Of Queue" "0: The SPI data is not the last data to transfer.,1: The SPI data is the last data to transfer."
|
|
bitfld.long 0x8 26. "CTCNT,Clear Transfer Counter" "0: Do not clear the TCR[TCNT] field.,1: Clear the TCR[TCNT] field."
|
|
newline
|
|
bitfld.long 0x8 25. "PE_MASC,Parity Enable or Mask T ASC delay in the current frame" "0: PE - No parity bit included/checked. MASC - T..,1: PE - Parity bit is transmitted instead of the.."
|
|
bitfld.long 0x8 24. "PP_MCSC,Parity Polarity or Mask T CSC delay in the next frame" "0: PP - Even Parity: the number of 1 bits in the..,1: PP - Odd Parity: the number of 1 bits in the.."
|
|
newline
|
|
hexmask.long.byte 0x8 16.--23. 1. "PCS,PCS"
|
|
hexmask.long.word 0x8 0.--15. 1. "TXDATA,Transmit Data"
|
|
group.long 0x34++0x3
|
|
line.long 0x0 "PUSHR_SLAVE,PUSH TX FIFO Register In Slave Mode"
|
|
hexmask.long.word 0x0 0.--15. 1. "TXDATA,Transmit Data"
|
|
rgroup.long 0x38++0x3
|
|
line.long 0x0 "POPR,POP RX FIFO Register"
|
|
hexmask.long 0x0 0.--31. 1. "RXDATA,Received Data"
|
|
repeat 5. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x3C)++0x3
|
|
line.long 0x0 "TXFR$1,Transmit FIFO Registers"
|
|
hexmask.long.word 0x0 16.--31. 1. "TXCMD_TXDATA,Transmit Command or Transmit Data"
|
|
hexmask.long.word 0x0 0.--15. 1. "TXDATA,Transmit Data"
|
|
repeat.end
|
|
repeat 5. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x7C)++0x3
|
|
line.long 0x0 "RXFR$1,Receive FIFO Registers"
|
|
hexmask.long 0x0 0.--31. 1. "RXDATA,Receive Data"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x11C)++0x3
|
|
line.long 0x0 "CTARE$1,Clock and Transfer Attributes Register Extended"
|
|
bitfld.long 0x0 16. "FMSZE,Frame Size Extended" "0: Default Mode. Up to 16 bit SPI frames can be..,1: Up to 32 bit SPI frames can be transferred. Each.."
|
|
hexmask.long.word 0x0 0.--10. 1. "DTCP,Data Transfer Count Preload"
|
|
repeat.end
|
|
rgroup.long 0x13C++0x3
|
|
line.long 0x0 "SREX,Status Register Extended"
|
|
bitfld.long 0x0 14. "RXCTR4,RX FIFO Counter[4]" "0,1"
|
|
bitfld.long 0x0 11. "TXCTR4,TX FIFO Counter[4]" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--8. 1. "CMDCTR,CMD FIFO Counter"
|
|
hexmask.long.byte 0x0 0.--3. 1. "CMDNXTPTR,Command Next Pointer"
|
|
tree.end
|
|
tree "SPI_2"
|
|
base ad:0x40059000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "MCR,Module Configuration Register"
|
|
bitfld.long 0x0 31. "MSTR,Master/Slave Mode Select" "0: Enables Slave mode,1: Enables Master mode"
|
|
bitfld.long 0x0 30. "CONT_SCKE,Continuous SCK Enable" "0: Continuous SCK disabled.,1: Continuous SCK enabled."
|
|
newline
|
|
rbitfld.long 0x0 28.--29. "DCONF,SPI Configuration." "0: SPI,?,?,?"
|
|
bitfld.long 0x0 27. "FRZ,Freeze" "0: Do not halt serial transfers in Debug mode.,1: Halt serial transfers in Debug mode."
|
|
newline
|
|
bitfld.long 0x0 26. "MTFE,Modified Transfer Format Enable" "0: Modified SPI transfer format disabled.,1: Modified SPI transfer format enabled."
|
|
bitfld.long 0x0 25. "PCSSE,Peripheral Chip Select Strobe Enable" "0: PCS5/ PCSS is used as the Peripheral Chip..,1: PCS5/ PCSS is used as an active-low PCS Strobe.."
|
|
newline
|
|
bitfld.long 0x0 24. "ROOE,Receive FIFO Overflow Overwrite Enable" "0: Incoming data is ignored.,1: Incoming data is shifted into the shift register."
|
|
hexmask.long.byte 0x0 16.--23. 1. "PCSIS,Peripheral Chip Select x Inactive State"
|
|
newline
|
|
bitfld.long 0x0 14. "MDIS,Module Disable" "0: Enables the module clocks.,1: Allows external logic to disable the module.."
|
|
bitfld.long 0x0 13. "DIS_TXF,Disable Transmit FIFO" "0: TX FIFO is enabled.,1: TX FIFO is disabled."
|
|
newline
|
|
bitfld.long 0x0 12. "DIS_RXF,Disable Receive FIFO" "0: RX FIFO is enabled.,1: RX FIFO is disabled."
|
|
bitfld.long 0x0 11. "CLR_TXF,Clear TX FIFO" "0: Do not clear the TX FIFO counter.,1: Clear the TX FIFO counter."
|
|
newline
|
|
bitfld.long 0x0 10. "CLR_RXF,Clear RX FIFO" "0: Do not clear the RX FIFO counter.,1: Clear the RX FIFO counter."
|
|
bitfld.long 0x0 8.--9. "SMPL_PT,Sample Point" "0: 0 protocol clock cycles between SCK edge and SIN..,1: 1 protocol clock cycle between SCK edge and SIN..,2: 2 protocol clock cycles between SCK edge and SIN..,?"
|
|
newline
|
|
bitfld.long 0x0 3. "XSPI,Extended SPI Mode" "0: Normal SPI Mode. Frame size can be up to 16..,1: Extended SPI Mode. Up to 32 bit SPI Frames along.."
|
|
bitfld.long 0x0 2. "FCPCS,Fast Continuous PCS Mode." "0: Normal or Slow Continuous PCS mode. Masking of..,1: Fast Continuous PCS mode. Delays masked via.."
|
|
newline
|
|
bitfld.long 0x0 1. "PES,Parity Error Stop" "0: SPI frame transmission continues.,1: SPI frame transmission stops."
|
|
bitfld.long 0x0 0. "HALT,Halt" "0: Start transfers.,1: Stop transfers."
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "TCR,Transfer Count Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "SPI_TCNT,SPI Transfer Counter"
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0xC)++0x3
|
|
line.long 0x0 "CTAR$1,Clock and Transfer Attributes Register (In Master Mode)"
|
|
bitfld.long 0x0 31. "DBR,Double Baud Rate" "0: The baud rate is computed normally with a 50/50..,1: The baud rate is doubled with the duty cycle.."
|
|
hexmask.long.byte 0x0 27.--30. 1. "FMSZ,Frame Size"
|
|
newline
|
|
bitfld.long 0x0 26. "CPOL,Clock Polarity" "0: The inactive state value of SCK is low.,1: The inactive state value of SCK is high."
|
|
bitfld.long 0x0 25. "CPHA,Clock Phase" "0: Data is captured on the leading edge of SCK and..,1: Data is changed on the leading edge of SCK and.."
|
|
newline
|
|
bitfld.long 0x0 24. "LSBFE,LSB First" "0: Data is transferred MSB first.,1: Data is transferred LSB first."
|
|
bitfld.long 0x0 22.--23. "PCSSCK,PCS to SCK Delay Prescaler" "0: PCS to SCK Prescaler value is 1.,1: PCS to SCK Prescaler value is 3.,2: PCS to SCK Prescaler value is 5.,3: PCS to SCK Prescaler value is 7."
|
|
newline
|
|
bitfld.long 0x0 20.--21. "PASC,After SCK Delay Prescaler" "0: Delay after Transfer Prescaler value is 1.,1: Delay after Transfer Prescaler value is 3.,2: Delay after Transfer Prescaler value is 5.,3: Delay after Transfer Prescaler value is 7."
|
|
bitfld.long 0x0 18.--19. "PDT,Delay after Transfer Prescaler" "0: Delay after Transfer Prescaler value is 1.,1: Delay after Transfer Prescaler value is 3.,2: Delay after Transfer Prescaler value is 5.,3: Delay after Transfer Prescaler value is 7."
|
|
newline
|
|
bitfld.long 0x0 16.--17. "PBR,Baud Rate Prescaler" "0: Baud Rate Prescaler value is 2.,1: Baud Rate Prescaler value is 3.,2: Baud Rate Prescaler value is 5.,3: Baud Rate Prescaler value is 7."
|
|
hexmask.long.byte 0x0 12.--15. 1. "CSSCK,PCS to SCK Delay Scaler"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "ASC,After SCK Delay Scaler"
|
|
hexmask.long.byte 0x0 4.--7. 1. "DT,Delay After Transfer Scaler"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "BR,Baud Rate Scaler"
|
|
repeat.end
|
|
group.long 0xC++0x3
|
|
line.long 0x0 "CTAR_SLAVE,Clock and Transfer Attributes Register (In Slave Mode)"
|
|
hexmask.long.byte 0x0 27.--31. 1. "FMSZ,Frame Size"
|
|
bitfld.long 0x0 26. "CPOL,Clock Polarity" "0: The inactive state value of SCK is low.,1: The inactive state value of SCK is high."
|
|
newline
|
|
bitfld.long 0x0 25. "CPHA,Clock Phase" "0: Data is captured on the leading edge of SCK and..,1: Data is changed on the leading edge of SCK and.."
|
|
bitfld.long 0x0 24. "PE,Parity Enable" "0: No parity bit included/checked.,1: Parity bit is transmitted instead of last data.."
|
|
newline
|
|
bitfld.long 0x0 23. "PP,Parity Polarity" "0: Even Parity: the number of 1 bits in the..,1: Odd Parity: the number of 1 bits in the.."
|
|
group.long 0x2C++0xB
|
|
line.long 0x0 "SR,Status Register"
|
|
bitfld.long 0x0 31. "TCF,Transfer Complete Flag" "0: Transfer not complete.,1: Transfer complete."
|
|
rbitfld.long 0x0 30. "TXRXS,TX and RX Status" "0: Transmit and receive operations are disabled..,1: Transmit and receive operations are enabled (The.."
|
|
newline
|
|
bitfld.long 0x0 28. "EOQF,End of Queue Flag" "0: EOQ is not set in the executing command.,1: EOQ is set in the executing SPI command."
|
|
bitfld.long 0x0 27. "TFUF,Transmit FIFO Underflow Flag" "0: No TX FIFO underflow.,1: TX FIFO underflow has occurred."
|
|
newline
|
|
bitfld.long 0x0 25. "TFFF,Transmit FIFO Fill Flag" "0: TX FIFO is full.,1: TX FIFO is not full."
|
|
rbitfld.long 0x0 24. "BSYF,Busy Flag." "0: No Cyclic Command Transfer in Progress.,1: Cyclic Command Transfer is in progress. Current.."
|
|
newline
|
|
bitfld.long 0x0 23. "CMDTCF,Command Transfer Complete Flag." "0: Data Transfer by current Command not complete.,1: Data Transfer by current Command is complete."
|
|
bitfld.long 0x0 21. "SPEF,SPI Parity Error Flag" "0: No parity error.,1: Parity error has occurred."
|
|
newline
|
|
bitfld.long 0x0 19. "RFOF,Receive FIFO Overflow Flag" "0: No Rx FIFO overflow.,1: Rx FIFO overflow has occurred."
|
|
bitfld.long 0x0 18. "TFIWF,Tranmit FIFO Invalid Write Flag" "0: No Invalid Data present in TX FIFO.,1: Invalid Data present in TX FIFO since CMD FIFO.."
|
|
newline
|
|
bitfld.long 0x0 17. "RFDF,Receive FIFO Drain Flag" "0: RX FIFO is empty.,1: RX FIFO is not empty."
|
|
bitfld.long 0x0 16. "CMDFFF,Command FIFO Fill Flag" "0: CMD FIFO is full.,1: CMD FIFO is not full."
|
|
newline
|
|
hexmask.long.byte 0x0 12.--15. 1. "TXCTR,TX FIFO Counter"
|
|
hexmask.long.byte 0x0 8.--11. 1. "TXNXTPTR,Transmit Next Pointer"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--7. 1. "RXCTR,RX FIFO Counter"
|
|
hexmask.long.byte 0x0 0.--3. 1. "POPNXTPTR,Pop Next Pointer"
|
|
line.long 0x4 "RSER,DMA/Interrupt Request Select and Enable Register"
|
|
bitfld.long 0x4 31. "TCF_RE,Transmission Complete Request Enable" "0: TCF interrupt requests are disabled.,1: TCF interrupt requests are enabled."
|
|
bitfld.long 0x4 30. "CMDFFF_RE,Command FIFO Fill Flag Request Enable." "0: CMDFFF interrupts or DMA requests are disabled.,1: CMDFFF interrupts or DMA requests are enabled."
|
|
newline
|
|
bitfld.long 0x4 28. "EOQF_RE,Finished Request Enable" "0: EOQF interrupt requests are disabled.,1: EOQF interrupt requests are enabled."
|
|
bitfld.long 0x4 27. "TFUF_RE,Transmit FIFO Underflow Request Enable" "0: TFUF interrupt requests are disabled.,1: TFUF interrupt requests are enabled."
|
|
newline
|
|
bitfld.long 0x4 25. "TFFF_RE,Transmit FIFO Fill Request Enable" "0: TFFF interrupts or DMA requests are disabled.,1: TFFF interrupts or DMA requests are enabled."
|
|
bitfld.long 0x4 24. "TFFF_DIRS,Transmit FIFO Fill DMA or Interrupt Request Select" "0: TFFF flag generates interrupt requests.,1: TFFF flag generates DMA requests."
|
|
newline
|
|
bitfld.long 0x4 23. "CMDTCF_RE,Command Transmission Complete Request Enable." "0: CMDTCF interrupt requests are disabled.,1: CMDTCF interrupt requests are enabled."
|
|
bitfld.long 0x4 21. "SPEF_RE,SPI Parity Error Request Enable" "0: SPEF interrupt requests are disabled.,1: SPEF interrupt requests are enabled."
|
|
newline
|
|
bitfld.long 0x4 19. "RFOF_RE,Receive FIFO Overflow Request Enable" "0: RFOF interrupt requests are disabled.,1: RFOF interrupt requests are enabled."
|
|
bitfld.long 0x4 18. "TFIWF_RE,Transmit FIFO Invalid Write Request Enable." "0: TFIWF interrupt requests are disabled.,1: TFIWF interrupt requests are enabled."
|
|
newline
|
|
bitfld.long 0x4 17. "RFDF_RE,Receive FIFO Drain Request Enable" "0: RFDF interrupt or DMA requests are disabled.,1: RFDF interrupt or DMA requests are enabled."
|
|
bitfld.long 0x4 16. "RFDF_DIRS,Receive FIFO Drain DMA or Interrupt Request Select" "0: Interrupt request.,1: DMA request."
|
|
newline
|
|
bitfld.long 0x4 15. "CMDFFF_DIRS,Command FIFO Fill DMA or Interrupt Request Select" "0: CMDFFF flag generates interrupt requests.,1: CMDFFF flag generates DMA requests."
|
|
line.long 0x8 "PUSHR,PUSH TX FIFO Register In Master Mode"
|
|
bitfld.long 0x8 31. "CONT,Continuous Peripheral Chip Select Enable" "0: Return PCSn signals to their inactive state..,1: Keep PCSn signals asserted between transfers."
|
|
bitfld.long 0x8 28.--30. "CTAS,Clock and Transfer Attributes Select" "0: CTAR0,1: CTAR1,2: CTAR2,3: CTAR3,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x8 27. "EOQ,End Of Queue" "0: The SPI data is not the last data to transfer.,1: The SPI data is the last data to transfer."
|
|
bitfld.long 0x8 26. "CTCNT,Clear Transfer Counter" "0: Do not clear the TCR[TCNT] field.,1: Clear the TCR[TCNT] field."
|
|
newline
|
|
bitfld.long 0x8 25. "PE_MASC,Parity Enable or Mask T ASC delay in the current frame" "0: PE - No parity bit included/checked. MASC - T..,1: PE - Parity bit is transmitted instead of the.."
|
|
bitfld.long 0x8 24. "PP_MCSC,Parity Polarity or Mask T CSC delay in the next frame" "0: PP - Even Parity: the number of 1 bits in the..,1: PP - Odd Parity: the number of 1 bits in the.."
|
|
newline
|
|
hexmask.long.byte 0x8 16.--23. 1. "PCS,PCS"
|
|
hexmask.long.word 0x8 0.--15. 1. "TXDATA,Transmit Data"
|
|
group.long 0x34++0x3
|
|
line.long 0x0 "PUSHR_SLAVE,PUSH TX FIFO Register In Slave Mode"
|
|
hexmask.long.word 0x0 0.--15. 1. "TXDATA,Transmit Data"
|
|
rgroup.long 0x38++0x3
|
|
line.long 0x0 "POPR,POP RX FIFO Register"
|
|
hexmask.long 0x0 0.--31. 1. "RXDATA,Received Data"
|
|
repeat 5. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x3C)++0x3
|
|
line.long 0x0 "TXFR$1,Transmit FIFO Registers"
|
|
hexmask.long.word 0x0 16.--31. 1. "TXCMD_TXDATA,Transmit Command or Transmit Data"
|
|
hexmask.long.word 0x0 0.--15. 1. "TXDATA,Transmit Data"
|
|
repeat.end
|
|
repeat 5. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x7C)++0x3
|
|
line.long 0x0 "RXFR$1,Receive FIFO Registers"
|
|
hexmask.long 0x0 0.--31. 1. "RXDATA,Receive Data"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x11C)++0x3
|
|
line.long 0x0 "CTARE$1,Clock and Transfer Attributes Register Extended"
|
|
bitfld.long 0x0 16. "FMSZE,Frame Size Extended" "0: Default Mode. Up to 16 bit SPI frames can be..,1: Up to 32 bit SPI frames can be transferred. Each.."
|
|
hexmask.long.word 0x0 0.--10. 1. "DTCP,Data Transfer Count Preload"
|
|
repeat.end
|
|
rgroup.long 0x13C++0x3
|
|
line.long 0x0 "SREX,Status Register Extended"
|
|
bitfld.long 0x0 14. "RXCTR4,RX FIFO Counter[4]" "0,1"
|
|
bitfld.long 0x0 11. "TXCTR4,TX FIFO Counter[4]" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--8. 1. "CMDCTR,CMD FIFO Counter"
|
|
hexmask.long.byte 0x0 0.--3. 1. "CMDNXTPTR,Command Next Pointer"
|
|
tree.end
|
|
tree "SPI_3"
|
|
base ad:0x400C2000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "MCR,Module Configuration Register"
|
|
bitfld.long 0x0 31. "MSTR,Master/Slave Mode Select" "0: Enables Slave mode,1: Enables Master mode"
|
|
bitfld.long 0x0 30. "CONT_SCKE,Continuous SCK Enable" "0: Continuous SCK disabled.,1: Continuous SCK enabled."
|
|
newline
|
|
rbitfld.long 0x0 28.--29. "DCONF,SPI Configuration." "0: SPI,?,?,?"
|
|
bitfld.long 0x0 27. "FRZ,Freeze" "0: Do not halt serial transfers in Debug mode.,1: Halt serial transfers in Debug mode."
|
|
newline
|
|
bitfld.long 0x0 26. "MTFE,Modified Transfer Format Enable" "0: Modified SPI transfer format disabled.,1: Modified SPI transfer format enabled."
|
|
bitfld.long 0x0 25. "PCSSE,Peripheral Chip Select Strobe Enable" "0: PCS5/ PCSS is used as the Peripheral Chip..,1: PCS5/ PCSS is used as an active-low PCS Strobe.."
|
|
newline
|
|
bitfld.long 0x0 24. "ROOE,Receive FIFO Overflow Overwrite Enable" "0: Incoming data is ignored.,1: Incoming data is shifted into the shift register."
|
|
hexmask.long.byte 0x0 16.--23. 1. "PCSIS,Peripheral Chip Select x Inactive State"
|
|
newline
|
|
bitfld.long 0x0 14. "MDIS,Module Disable" "0: Enables the module clocks.,1: Allows external logic to disable the module.."
|
|
bitfld.long 0x0 13. "DIS_TXF,Disable Transmit FIFO" "0: TX FIFO is enabled.,1: TX FIFO is disabled."
|
|
newline
|
|
bitfld.long 0x0 12. "DIS_RXF,Disable Receive FIFO" "0: RX FIFO is enabled.,1: RX FIFO is disabled."
|
|
bitfld.long 0x0 11. "CLR_TXF,Clear TX FIFO" "0: Do not clear the TX FIFO counter.,1: Clear the TX FIFO counter."
|
|
newline
|
|
bitfld.long 0x0 10. "CLR_RXF,Clear RX FIFO" "0: Do not clear the RX FIFO counter.,1: Clear the RX FIFO counter."
|
|
bitfld.long 0x0 8.--9. "SMPL_PT,Sample Point" "0: 0 protocol clock cycles between SCK edge and SIN..,1: 1 protocol clock cycle between SCK edge and SIN..,2: 2 protocol clock cycles between SCK edge and SIN..,?"
|
|
newline
|
|
bitfld.long 0x0 3. "XSPI,Extended SPI Mode" "0: Normal SPI Mode. Frame size can be up to 16..,1: Extended SPI Mode. Up to 32 bit SPI Frames along.."
|
|
bitfld.long 0x0 2. "FCPCS,Fast Continuous PCS Mode." "0: Normal or Slow Continuous PCS mode. Masking of..,1: Fast Continuous PCS mode. Delays masked via.."
|
|
newline
|
|
bitfld.long 0x0 1. "PES,Parity Error Stop" "0: SPI frame transmission continues.,1: SPI frame transmission stops."
|
|
bitfld.long 0x0 0. "HALT,Halt" "0: Start transfers.,1: Stop transfers."
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "TCR,Transfer Count Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "SPI_TCNT,SPI Transfer Counter"
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0xC)++0x3
|
|
line.long 0x0 "CTAR$1,Clock and Transfer Attributes Register (In Master Mode)"
|
|
bitfld.long 0x0 31. "DBR,Double Baud Rate" "0: The baud rate is computed normally with a 50/50..,1: The baud rate is doubled with the duty cycle.."
|
|
hexmask.long.byte 0x0 27.--30. 1. "FMSZ,Frame Size"
|
|
newline
|
|
bitfld.long 0x0 26. "CPOL,Clock Polarity" "0: The inactive state value of SCK is low.,1: The inactive state value of SCK is high."
|
|
bitfld.long 0x0 25. "CPHA,Clock Phase" "0: Data is captured on the leading edge of SCK and..,1: Data is changed on the leading edge of SCK and.."
|
|
newline
|
|
bitfld.long 0x0 24. "LSBFE,LSB First" "0: Data is transferred MSB first.,1: Data is transferred LSB first."
|
|
bitfld.long 0x0 22.--23. "PCSSCK,PCS to SCK Delay Prescaler" "0: PCS to SCK Prescaler value is 1.,1: PCS to SCK Prescaler value is 3.,2: PCS to SCK Prescaler value is 5.,3: PCS to SCK Prescaler value is 7."
|
|
newline
|
|
bitfld.long 0x0 20.--21. "PASC,After SCK Delay Prescaler" "0: Delay after Transfer Prescaler value is 1.,1: Delay after Transfer Prescaler value is 3.,2: Delay after Transfer Prescaler value is 5.,3: Delay after Transfer Prescaler value is 7."
|
|
bitfld.long 0x0 18.--19. "PDT,Delay after Transfer Prescaler" "0: Delay after Transfer Prescaler value is 1.,1: Delay after Transfer Prescaler value is 3.,2: Delay after Transfer Prescaler value is 5.,3: Delay after Transfer Prescaler value is 7."
|
|
newline
|
|
bitfld.long 0x0 16.--17. "PBR,Baud Rate Prescaler" "0: Baud Rate Prescaler value is 2.,1: Baud Rate Prescaler value is 3.,2: Baud Rate Prescaler value is 5.,3: Baud Rate Prescaler value is 7."
|
|
hexmask.long.byte 0x0 12.--15. 1. "CSSCK,PCS to SCK Delay Scaler"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "ASC,After SCK Delay Scaler"
|
|
hexmask.long.byte 0x0 4.--7. 1. "DT,Delay After Transfer Scaler"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "BR,Baud Rate Scaler"
|
|
repeat.end
|
|
group.long 0xC++0x3
|
|
line.long 0x0 "CTAR_SLAVE,Clock and Transfer Attributes Register (In Slave Mode)"
|
|
hexmask.long.byte 0x0 27.--31. 1. "FMSZ,Frame Size"
|
|
bitfld.long 0x0 26. "CPOL,Clock Polarity" "0: The inactive state value of SCK is low.,1: The inactive state value of SCK is high."
|
|
newline
|
|
bitfld.long 0x0 25. "CPHA,Clock Phase" "0: Data is captured on the leading edge of SCK and..,1: Data is changed on the leading edge of SCK and.."
|
|
bitfld.long 0x0 24. "PE,Parity Enable" "0: No parity bit included/checked.,1: Parity bit is transmitted instead of last data.."
|
|
newline
|
|
bitfld.long 0x0 23. "PP,Parity Polarity" "0: Even Parity: the number of 1 bits in the..,1: Odd Parity: the number of 1 bits in the.."
|
|
group.long 0x2C++0xB
|
|
line.long 0x0 "SR,Status Register"
|
|
bitfld.long 0x0 31. "TCF,Transfer Complete Flag" "0: Transfer not complete.,1: Transfer complete."
|
|
rbitfld.long 0x0 30. "TXRXS,TX and RX Status" "0: Transmit and receive operations are disabled..,1: Transmit and receive operations are enabled (The.."
|
|
newline
|
|
bitfld.long 0x0 28. "EOQF,End of Queue Flag" "0: EOQ is not set in the executing command.,1: EOQ is set in the executing SPI command."
|
|
bitfld.long 0x0 27. "TFUF,Transmit FIFO Underflow Flag" "0: No TX FIFO underflow.,1: TX FIFO underflow has occurred."
|
|
newline
|
|
bitfld.long 0x0 25. "TFFF,Transmit FIFO Fill Flag" "0: TX FIFO is full.,1: TX FIFO is not full."
|
|
rbitfld.long 0x0 24. "BSYF,Busy Flag." "0: No Cyclic Command Transfer in Progress.,1: Cyclic Command Transfer is in progress. Current.."
|
|
newline
|
|
bitfld.long 0x0 23. "CMDTCF,Command Transfer Complete Flag." "0: Data Transfer by current Command not complete.,1: Data Transfer by current Command is complete."
|
|
bitfld.long 0x0 21. "SPEF,SPI Parity Error Flag" "0: No parity error.,1: Parity error has occurred."
|
|
newline
|
|
bitfld.long 0x0 19. "RFOF,Receive FIFO Overflow Flag" "0: No Rx FIFO overflow.,1: Rx FIFO overflow has occurred."
|
|
bitfld.long 0x0 18. "TFIWF,Tranmit FIFO Invalid Write Flag" "0: No Invalid Data present in TX FIFO.,1: Invalid Data present in TX FIFO since CMD FIFO.."
|
|
newline
|
|
bitfld.long 0x0 17. "RFDF,Receive FIFO Drain Flag" "0: RX FIFO is empty.,1: RX FIFO is not empty."
|
|
bitfld.long 0x0 16. "CMDFFF,Command FIFO Fill Flag" "0: CMD FIFO is full.,1: CMD FIFO is not full."
|
|
newline
|
|
hexmask.long.byte 0x0 12.--15. 1. "TXCTR,TX FIFO Counter"
|
|
hexmask.long.byte 0x0 8.--11. 1. "TXNXTPTR,Transmit Next Pointer"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--7. 1. "RXCTR,RX FIFO Counter"
|
|
hexmask.long.byte 0x0 0.--3. 1. "POPNXTPTR,Pop Next Pointer"
|
|
line.long 0x4 "RSER,DMA/Interrupt Request Select and Enable Register"
|
|
bitfld.long 0x4 31. "TCF_RE,Transmission Complete Request Enable" "0: TCF interrupt requests are disabled.,1: TCF interrupt requests are enabled."
|
|
bitfld.long 0x4 30. "CMDFFF_RE,Command FIFO Fill Flag Request Enable." "0: CMDFFF interrupts or DMA requests are disabled.,1: CMDFFF interrupts or DMA requests are enabled."
|
|
newline
|
|
bitfld.long 0x4 28. "EOQF_RE,Finished Request Enable" "0: EOQF interrupt requests are disabled.,1: EOQF interrupt requests are enabled."
|
|
bitfld.long 0x4 27. "TFUF_RE,Transmit FIFO Underflow Request Enable" "0: TFUF interrupt requests are disabled.,1: TFUF interrupt requests are enabled."
|
|
newline
|
|
bitfld.long 0x4 25. "TFFF_RE,Transmit FIFO Fill Request Enable" "0: TFFF interrupts or DMA requests are disabled.,1: TFFF interrupts or DMA requests are enabled."
|
|
bitfld.long 0x4 24. "TFFF_DIRS,Transmit FIFO Fill DMA or Interrupt Request Select" "0: TFFF flag generates interrupt requests.,1: TFFF flag generates DMA requests."
|
|
newline
|
|
bitfld.long 0x4 23. "CMDTCF_RE,Command Transmission Complete Request Enable." "0: CMDTCF interrupt requests are disabled.,1: CMDTCF interrupt requests are enabled."
|
|
bitfld.long 0x4 21. "SPEF_RE,SPI Parity Error Request Enable" "0: SPEF interrupt requests are disabled.,1: SPEF interrupt requests are enabled."
|
|
newline
|
|
bitfld.long 0x4 19. "RFOF_RE,Receive FIFO Overflow Request Enable" "0: RFOF interrupt requests are disabled.,1: RFOF interrupt requests are enabled."
|
|
bitfld.long 0x4 18. "TFIWF_RE,Transmit FIFO Invalid Write Request Enable." "0: TFIWF interrupt requests are disabled.,1: TFIWF interrupt requests are enabled."
|
|
newline
|
|
bitfld.long 0x4 17. "RFDF_RE,Receive FIFO Drain Request Enable" "0: RFDF interrupt or DMA requests are disabled.,1: RFDF interrupt or DMA requests are enabled."
|
|
bitfld.long 0x4 16. "RFDF_DIRS,Receive FIFO Drain DMA or Interrupt Request Select" "0: Interrupt request.,1: DMA request."
|
|
newline
|
|
bitfld.long 0x4 15. "CMDFFF_DIRS,Command FIFO Fill DMA or Interrupt Request Select" "0: CMDFFF flag generates interrupt requests.,1: CMDFFF flag generates DMA requests."
|
|
line.long 0x8 "PUSHR,PUSH TX FIFO Register In Master Mode"
|
|
bitfld.long 0x8 31. "CONT,Continuous Peripheral Chip Select Enable" "0: Return PCSn signals to their inactive state..,1: Keep PCSn signals asserted between transfers."
|
|
bitfld.long 0x8 28.--30. "CTAS,Clock and Transfer Attributes Select" "0: CTAR0,1: CTAR1,2: CTAR2,3: CTAR3,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x8 27. "EOQ,End Of Queue" "0: The SPI data is not the last data to transfer.,1: The SPI data is the last data to transfer."
|
|
bitfld.long 0x8 26. "CTCNT,Clear Transfer Counter" "0: Do not clear the TCR[TCNT] field.,1: Clear the TCR[TCNT] field."
|
|
newline
|
|
bitfld.long 0x8 25. "PE_MASC,Parity Enable or Mask T ASC delay in the current frame" "0: PE - No parity bit included/checked. MASC - T..,1: PE - Parity bit is transmitted instead of the.."
|
|
bitfld.long 0x8 24. "PP_MCSC,Parity Polarity or Mask T CSC delay in the next frame" "0: PP - Even Parity: the number of 1 bits in the..,1: PP - Odd Parity: the number of 1 bits in the.."
|
|
newline
|
|
hexmask.long.byte 0x8 16.--23. 1. "PCS,PCS"
|
|
hexmask.long.word 0x8 0.--15. 1. "TXDATA,Transmit Data"
|
|
group.long 0x34++0x3
|
|
line.long 0x0 "PUSHR_SLAVE,PUSH TX FIFO Register In Slave Mode"
|
|
hexmask.long.word 0x0 0.--15. 1. "TXDATA,Transmit Data"
|
|
rgroup.long 0x38++0x3
|
|
line.long 0x0 "POPR,POP RX FIFO Register"
|
|
hexmask.long 0x0 0.--31. 1. "RXDATA,Received Data"
|
|
repeat 5. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x3C)++0x3
|
|
line.long 0x0 "TXFR$1,Transmit FIFO Registers"
|
|
hexmask.long.word 0x0 16.--31. 1. "TXCMD_TXDATA,Transmit Command or Transmit Data"
|
|
hexmask.long.word 0x0 0.--15. 1. "TXDATA,Transmit Data"
|
|
repeat.end
|
|
repeat 5. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x7C)++0x3
|
|
line.long 0x0 "RXFR$1,Receive FIFO Registers"
|
|
hexmask.long 0x0 0.--31. 1. "RXDATA,Receive Data"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x11C)++0x3
|
|
line.long 0x0 "CTARE$1,Clock and Transfer Attributes Register Extended"
|
|
bitfld.long 0x0 16. "FMSZE,Frame Size Extended" "0: Default Mode. Up to 16 bit SPI frames can be..,1: Up to 32 bit SPI frames can be transferred. Each.."
|
|
hexmask.long.word 0x0 0.--10. 1. "DTCP,Data Transfer Count Preload"
|
|
repeat.end
|
|
rgroup.long 0x13C++0x3
|
|
line.long 0x0 "SREX,Status Register Extended"
|
|
bitfld.long 0x0 14. "RXCTR4,RX FIFO Counter[4]" "0,1"
|
|
bitfld.long 0x0 11. "TXCTR4,TX FIFO Counter[4]" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--8. 1. "CMDCTR,CMD FIFO Counter"
|
|
hexmask.long.byte 0x0 0.--3. 1. "CMDNXTPTR,Command Next Pointer"
|
|
tree.end
|
|
tree.end
|
|
tree "SRC (System Reset Controller)"
|
|
base ad:0x4007C000
|
|
rgroup.long 0x0++0x7
|
|
line.long 0x0 "BMR1,Boot Mode Register 1"
|
|
hexmask.long.byte 0x0 24.--31. 1. "BOOT_CFG4,BOOT_CFG Byte 3"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--23. 1. "BOOT_CFG3,BOOT_CFG Byte 2"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "BOOT_CFG2,BOOT_CFG Byte 1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "BOOT_CFG1,BOOT_CFG Byte 0"
|
|
line.long 0x4 "BMR2,Boot Mode Register 2"
|
|
bitfld.long 0x4 24.--25. "BMOD,BOOTMOD CAPTURED VALUE" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 4. "BT_FUSE_SEL,BT_FUSE_SEL" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "FIELD_RETURN,FIELD_RETURN" "0,1"
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "GPR1_BOOT,General Purpose Register 1 For Boot"
|
|
bitfld.long 0x0 0. "PERSIST_BOOT_DISABLE_FAST_REBOOT,Indicates the state of Fast Reboot from DDR" "0: Fast reboot is disabled,1: Fast reboot is enabled"
|
|
group.long 0x100++0x17
|
|
line.long 0x0 "GPR1,General Purpose Register 1"
|
|
bitfld.long 0x0 31. "VIDEO_PLL_SOURCE_SELECT,Video PLL Source Selection" "0: FIRC is selected as source of PLL clock,1: FXOSC is selected as source of PLL clock"
|
|
newline
|
|
bitfld.long 0x0 30. "PERIPH_PLL_SOURCE_SELECT,PLL SOURCE SELECTION" "0: FIRC is selected as source of PLL,1: FXOSC is selected as source of PLL"
|
|
newline
|
|
bitfld.long 0x0 29. "DDR_PLL_SOURCE_SELECT,DDR PLL Source Selection" "0: FIRC is selected as source of PLL clock,1: FXOSC is selected as source of PLL clock"
|
|
newline
|
|
bitfld.long 0x0 28. "ENET_PLL_SOURCE_SELECT,ENET PLL Source Selection" "0: FIRC is selected as source of PLL clock,1: FXOSC is selected as source of PLL clock"
|
|
newline
|
|
bitfld.long 0x0 27. "ARM_PLL_SOURCE_SELECT,ARM PLL Source Selection" "0: FIRC is selected as source of PLL clock,1: FXOSC is selected as source of PLL clock"
|
|
line.long 0x4 "GPR2,General Purpose Register 2"
|
|
bitfld.long 0x4 4. "FSNCF4,FCCU SW NCF4" "0: FCCU SW Fault is not asserted,1: FCCU SW Fault is asserted"
|
|
newline
|
|
bitfld.long 0x4 3. "FSNCF3,FCCU SW NCF3" "0: FCCU SW Fault is not asserted,1: FCCU SW Fault is asserted"
|
|
newline
|
|
bitfld.long 0x4 2. "FSNCF2,FCCU SW NCF2" "0: FCCU SW Fault is not asserted,1: FCCU SW Fault is asserted"
|
|
newline
|
|
bitfld.long 0x4 1. "FSNCF1,FCCU SW NCF1" "0: FCCU SW Fault is not asserted,1: FCCU SW Fault is asserted"
|
|
newline
|
|
bitfld.long 0x4 0. "FSNCF0,FCCU SW NCF0" "0: FCCU SW Fault is not asserted,1: FCCU SW Fault is asserted"
|
|
line.long 0x8 "GPR3,General Purpose Register 3"
|
|
bitfld.long 0x8 6. "LVDS_BANDGAP_REF_ENABLE,LVDS_BANDGAP_REF_ENABLE When LFAST LVDS pads are not used it is recommended to Disable LVDS bandgap reference by writing 0 to this bit to reduce leakage." "0: Disable LVDS BANDGAP Reference,1: Enable LVDS BANDGAP Reference"
|
|
newline
|
|
bitfld.long 0x8 5. "PCIE_RFCC_CLK,PCIe REF clock select" "0: Internal clock (PCIE_REF_CLK) is used as the..,1: External clock (PCI_REF_PAD_CLK_P.."
|
|
newline
|
|
bitfld.long 0x8 4. "PCCAS,PCIE_COMMON_CLOCK_ARCHITECTURE_SELECT" "0: Normal LFAST operation on LFAST_TXP pad,1: PCIe Ref clock is exported on LFAST_TXP pad for.."
|
|
newline
|
|
bitfld.long 0x8 3. "D32SS,This bitfield has no relation with selction of FXOSC as PLL source. It simply means:" "0: DDR 32KHz clock is to be derived from 40MHz..,?"
|
|
newline
|
|
bitfld.long 0x8 1. "ENET_MODE,Selects the ENET mode of operation which decides the clocking scheme for ENET." "0: RMII Mode,1: RGMII Mode"
|
|
newline
|
|
bitfld.long 0x8 0. "HPSMI_CLK_ENABLE,Enable the clock for HPSMI If HPSMI clock gating to be done this bit along with HPSMI PCTL needs to be deasserted When HPSMI clock is gated then any access to HPSMI would hang the system it is advisable to ungate the HPSMI clock before.." "0: Disable HPSMI clock,1: Enable HPSMI clock"
|
|
line.long 0xC "GPR4,General Purpose Register 4"
|
|
bitfld.long 0xC 0. "TSENS_ENABLE,Temperature sensor enable" "0: Disabled,1: Enabled"
|
|
line.long 0x10 "GPR5,General Purpose Register 5"
|
|
bitfld.long 0x10 27.--29. "PCIE_PHY_RX0_EQ,Rx Equalizer Setting" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x10 22.--26. 1. "PCIE_PHY_LOS_LEVEL,Loss-of-Signal Detector Sensitivity Level Control"
|
|
newline
|
|
bitfld.long 0x10 19.--21. "PCIE_PHY_LOS_BIAS,Loss-of-Signal Detector Threshold Level Control. It sets the LOS detection threshold level." "0: 105 mV,1: 120 mV,2: 135 mV,3: 150 mV,4: 45 mV,5: 60 mV,6: 75 mV,7: 90 mV"
|
|
newline
|
|
bitfld.long 0x10 17. "PCIE_APPS_PM_XMT_TURNOFF,PCIE_APPS_PM_XMT_TURNOFF" "0,1"
|
|
newline
|
|
bitfld.long 0x10 16. "GPR_PCIE_PERST_N,GPR_PCIE_PERST_N" "0: To de-assert reset,1: To assert reset"
|
|
newline
|
|
bitfld.long 0x10 15. "GPR_PCIE_BUTTON_RST_N,GPR_PCIE_BUTTON_RST_N" "0: To de-assert reset,1: To assert reset"
|
|
newline
|
|
bitfld.long 0x10 14. "GPR_PCIE_APP_REQ_EXIT_L1,GPR_PCIE_APP_REQ_EXIT_L1" "0,1"
|
|
newline
|
|
bitfld.long 0x10 13. "GPR_PCIE_APP_READY_ENTR_L23,GPR_PCIE_APP_READY_ENTR_L23" "0,1"
|
|
newline
|
|
bitfld.long 0x10 12. "GPR_PCIE_APP_REQ_ENTR_L1,GPR_PCIE_APP_REQ_ENTR_L1" "0,1"
|
|
newline
|
|
bitfld.long 0x10 11. "GPR_PCIE_APP_INIT_RST,GPR_PCIE_APP_INIT_RST" "0,1"
|
|
newline
|
|
bitfld.long 0x10 9. "GPR_PCIE_APP_LTSSM_ENABLE,GPR_PCIE_APP_LTSSM_ENABLE" "0: To hold the LTSSM in the Detect state until your..,1: To allow the LTSSM to continue link establishment"
|
|
newline
|
|
bitfld.long 0x10 8. "GPR_PCIE_SYS_INT,GPR_PCIE_SYS_INT" "0,1"
|
|
newline
|
|
bitfld.long 0x10 5.--7. "GPR_PCIE_DIAG_CTRL_BUS,GPR_PCIE_DIAG_CTRL_BUS" "0: Select Fast Link Mode,1: Insert LCRC error by inverting the LSB of LCRC,2: Insert ECRC error by inverting the LSB of ECRC,3: Both LCRC and ECRC error insertion if desired.,4: Select Fast Link Mode,5: Select Fast Link Mode,6: Select Fast Link Mode,7: Select Fast Link Mode"
|
|
newline
|
|
hexmask.long.byte 0x10 1.--4. 1. "GPR_PCIE_DEVICE_TYPE,GPR_PCIE_DEVICE_TYPE"
|
|
newline
|
|
bitfld.long 0x10 0. "GPR_PCIE_APPS_PM_XMT_PME,GPR_PCIE_APPS_PM_XMT_PME" "0,1"
|
|
line.long 0x14 "GPR6,General Purpose Register 6"
|
|
hexmask.long.byte 0x14 25.--31. 1. "PCIE_PCS_TX_SWING_LOW,Tx Amplitude (Low Swing Mode)"
|
|
newline
|
|
hexmask.long.byte 0x14 18.--24. 1. "PCIE_PCS_TX_SWING_FULL,Tx Amplitude (Full Swing Mode)"
|
|
newline
|
|
hexmask.long.byte 0x14 12.--17. 1. "PCIE_PCS_TX_DEEMPH_GEN1,Tx De-emphasis at 3.5 dB"
|
|
newline
|
|
hexmask.long.byte 0x14 6.--11. 1. "PCIE_PCS_TX_DEEMPH_GEN2_6DB,Tx De-emphasis at 6 dB"
|
|
newline
|
|
hexmask.long.byte 0x14 0.--5. 1. "PCIE_PCS_TX_DEEMPH_GEN2_3P5DB,Tx De-emphasis at 3.5 dB"
|
|
group.long 0x11C++0x3
|
|
line.long 0x0 "GPR8,General Purpose Register 8"
|
|
hexmask.long.word 0x0 23.--31. 1. "IOMux_CTRL,IOMux Input Muxin Control"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "DCU_QOS,This field drives the minimum value of 2D-ACE QoS to NIC301"
|
|
group.long 0x124++0x1B
|
|
line.long 0x0 "GPR10,General Purpose Register 10"
|
|
bitfld.long 0x0 31. "PCIE_APP_LTSSM_EN_CLR_MASK,PCIE_APP_LTSSM_EN_CLR_MASK" "0: To mask clearing of GPR_PCIE_APP_LTSSM_ENABLE..,1: To allow clearing of GPR_PCIE_APP_LTSSM_ENABLE.."
|
|
newline
|
|
bitfld.long 0x0 30. "PCIE_CFG_READY_CLR_MASK,PCIE_CFG_READY_CLR_MASK" "0: To mask clearing of PCIE_CFG_READY register field,1: To allow clearing of PCIE_CFG_READY register field"
|
|
newline
|
|
bitfld.long 0x0 8. "JPEG_D_HARD_RST,JPEG Decoder Hard Reset. This bit is used to assert a hard reset to the JPEG decoder module." "0: No reset,1: Hard reset"
|
|
newline
|
|
bitfld.long 0x0 1. "CLUSTER1_CLOCK_GATING_ENABLE,This register field is used to enable the gating of cluster1 clock." "0: Disable cluster1 clock gating.,1: Enable cluster1 clock gating."
|
|
newline
|
|
bitfld.long 0x0 0. "CLUSTER0_CLOCK_GATING_ENABLE,This register field is used to enable the gating of cluster0 clock." "0: Disable cluster0 clock gating.,1: Enable cluster0 clock gating."
|
|
line.long 0x4 "GPR11,General Purpose Register 11"
|
|
bitfld.long 0x4 22. "PCIE_CFG_READY,PCIE_CFG_READY" "0: The transaction layer responds to all inbound..,1: The transaction layer accepts inbound.."
|
|
newline
|
|
hexmask.long.byte 0x4 17.--21. 1. "PCIE_MSI_VECTOR,PCIE_MSI_VECTOR"
|
|
newline
|
|
bitfld.long 0x4 14.--16. "PCIE_MSI_TC,PCIE_MSI_TC" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 11.--13. "PCIE_MSI_FUNC_NUM,PCIE_MSI_FUNC_NUM" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--6. 1. "PCIE_PHY_MPLL_MULTIPLIER,MPLL Frequency Multiplier Control"
|
|
line.long 0x8 "GPR12,General Purpose Register 12"
|
|
bitfld.long 0x8 6. "PEI_NIC,Parity error injection in read address to NIC301 (master port M11) from DEC200_Encoder/fastDMA" "0: Disabled,1: Inject Parity Error in the read address path.."
|
|
newline
|
|
bitfld.long 0x8 5. "PEI_FDMA,Parity error injection in read data of FastDMA" "0: Disabled,1: Inject Parity Error in the read data path of.."
|
|
newline
|
|
bitfld.long 0x8 4. "PEI_DEC200,Parity error injection in read data of DEC200 encoder" "0: Disabled,1: Inject Parity Error in the read data path of.."
|
|
newline
|
|
bitfld.long 0x8 2. "PCE_NIC,Parity check enable in read address to NIC301 (master port M11) from DEC200_encoder/FastDMA" "0: Disabled,1: Parity Check Enable in the read address path.."
|
|
newline
|
|
bitfld.long 0x8 1. "PCE_FDMA,Parity check enable in read data of FastDMA" "0: Disabled,1: Parity Check Enable in the read data path of.."
|
|
newline
|
|
bitfld.long 0x8 0. "PCE_DEC200,Parity check enable in read data of DEC200 encoder" "0: Disabled,1: Parity Check Enable in the read data path of.."
|
|
line.long 0xC "GPR13,General Purpose Register 13"
|
|
bitfld.long 0xC 3. "CM4_WFE,WFE Input to Cortex-M4" "0: No reaction,1: Take Cortex-M4 out of WFE mode"
|
|
newline
|
|
bitfld.long 0xC 2. "WFE_SEL_CA53_COMPLEX,WFE_SEL_CA53_COMPLEX" "0: Cortex-A53_3 WFE output used as WFE input to..,1: Cortex-M4 WFE output used as WFE input to first.."
|
|
newline
|
|
bitfld.long 0xC 1. "SPNIDEN,SPNIDEN" "0: Debug in the secure world is disabled,1: Debug in the secure world is enabled"
|
|
newline
|
|
bitfld.long 0xC 0. "SPIDEN,SPIDEN" "0: Debug in the secure world is disabled,1: Debug in the secure world is enabled"
|
|
line.long 0x10 "GPR14,General Purpose Register 14"
|
|
bitfld.long 0x10 24.--26. "VSEL_DCU,VSEL_DCU" "?,?,?,?,4: Manual 3.3V mode IO supply auto-detect disabled..,?,?,7: Manual 1.2/1.5/1.8V mode IO supply auto-detect.."
|
|
newline
|
|
bitfld.long 0x10 21.--23. "VSEL_ETHERNET,VSEL_ETHERNET" "?,?,?,?,4: Manual 3.3V mode IO supply auto-detect disabled..,?,?,7: Manual 1.2/1.5/1.8V mode IO supply auto-detect.."
|
|
newline
|
|
bitfld.long 0x10 15.--17. "VSEL_GPIO2,VSEL_GPIO2" "?,?,?,?,4: Manual 3.3V mode IO supply auto-detect disabled..,?,?,7: Manual 1.2/1.5/1.8V mode IO supply auto-detect.."
|
|
newline
|
|
bitfld.long 0x10 12.--14. "VSEL_GPIO1,VSEL_GPIO1" "?,?,?,?,4: Manual 3.3V mode IO supply auto-detect disabled..,?,?,7: Manual 1.2/1.5/1.8V mode IO supply auto-detect.."
|
|
newline
|
|
bitfld.long 0x10 9.--11. "VSEL_GPIO0,VSEL_GPIO0" "?,?,?,?,4: Manual 3.3V mode IO supply auto-detect disabled..,?,?,?"
|
|
newline
|
|
bitfld.long 0x10 6.--8. "VSEL_VIU1,VSEL_VIU1" "?,?,?,?,4: Manual 3.3V mode IO supply auto-detect disabled..,?,?,7: Manual 1.2/1.5/1.8V mode IO supply auto-detect.."
|
|
newline
|
|
bitfld.long 0x10 3.--5. "VSEL_VIU0,VSEL_VIU0" "?,?,?,?,4: Manual 3.3V mode IO supply auto-detect disabled..,?,?,7: Manual 1.2/1.5/1.8V mode IO supply auto-detect.."
|
|
newline
|
|
bitfld.long 0x10 0.--2. "VSEL_QuadSPI,VSEL_QuadSPI" "?,?,?,?,4: Manual 3.3V mode IO supply auto-detect disabled..,?,?,7: Manual 1.2/1.5/1.8V mode IO supply auto-detect.."
|
|
line.long 0x14 "GPR15,General Purpose Register 15"
|
|
hexmask.long.byte 0x14 3.--7. 1. "CCI_QOS_OVERRIDE,CCI_QOS_OVERRIDE"
|
|
line.long 0x18 "GPR16,General Purpose Register 16"
|
|
bitfld.long 0x18 31. "FCCU_NMI_DIS,FCCU NMI Disable for Cortex-M4" "0: Enable NMI from FCCU,1: Diasble NMI from FCCU"
|
|
newline
|
|
bitfld.long 0x18 28. "CA53_3_SYSBARDISABLE,SYSBARDISABLE of core 1 of cluster 1" "0,1"
|
|
newline
|
|
bitfld.long 0x18 27. "CA53_2_SYSBARDISABLE,SYSBARDISABLE of core 0 of cluster 1" "0,1"
|
|
newline
|
|
bitfld.long 0x18 26. "CA53_1_SYSBARDISABLE,SYSBARDISABLE of core 1 of cluster 0" "0,1"
|
|
newline
|
|
bitfld.long 0x18 25. "CA53_0_SYSBARDISABLE,SYSBARDISABLE of core 0 of cluster 0" "0,1"
|
|
newline
|
|
bitfld.long 0x18 9. "CA53_1_BROADCASTOUTER,CA53_1_BROADCASTOUTER" "0,1"
|
|
newline
|
|
bitfld.long 0x18 8. "CA53_1_BROADCASTINNER,BROADCASTINNER of Cortex-A53CA" "0,1"
|
|
newline
|
|
bitfld.long 0x18 6. "CA53_0_BROADCASTOUTER,CA53_0_BROADCASTOUTER" "0,1"
|
|
newline
|
|
bitfld.long 0x18 5. "CA53_0_BROADCASTINNER,CA53_0_BROADCASTINNER" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x18 0.--3. 1. "CA53_SYSTEM_ERROR_INTERRUPT_REQUEST_EN,Per core control of NSEI"
|
|
rgroup.long 0x144++0x13
|
|
line.long 0x0 "GPR18,General Purpose Register 18"
|
|
hexmask.long.byte 0x0 0.--3. 1. "CORE_WARM_RESET_STATUS,Warm Reset Status Of Cortex-A53 core"
|
|
line.long 0x4 "GPR19,General Purpose Register 19"
|
|
hexmask.long 0x4 0.--31. 1. "CNTVALUEB_CLUSTER0_LOW_BITS,Lower 32 bits of CNTVALUEB of System counter in Cortex-A53 Cluster0"
|
|
line.long 0x8 "GPR20,General Purpose Register 20"
|
|
hexmask.long 0x8 0.--31. 1. "CNTVALUEB_CLUSTER0_HIGH_BITS,Upper 32 bits of CNTVALUEB of System counter in Cortex-A53 Cluster0"
|
|
line.long 0xC "GPR21,General Purpose Register 21"
|
|
hexmask.long 0xC 0.--31. 1. "CNTVALUEB_CLUSTER1_LOW_BITS,Lower 32 bits of CNTVALUEB of System counter in Cortex-A53 Cluster1"
|
|
line.long 0x10 "GPR22,General Purpose Register 22"
|
|
hexmask.long 0x10 0.--31. 1. "CNTVALUEB_CLUSTER1_HIGH_BITS,Upper 32 bits of CNTVALUEB of System counter in Cortex-A53 Cluster1"
|
|
group.long 0x158++0x13
|
|
line.long 0x0 "GPR23,DDR_MEMORY_ACCESS_SECURE"
|
|
hexmask.long 0x0 0.--31. 1. "DDR_MEM_BLK_RET_SEC,The entire DDR memory space may be divided into 32 regions and software can write 1 to the bit corresponding to the region loaded with valid data"
|
|
line.long 0x4 "GPR24,DDR_MEMORY_ACCESS_NON_SECURE"
|
|
hexmask.long 0x4 0.--31. 1. "DDR_MEM_BLK_RET_NON_SEC,The entire DDR memory space may be divided into 32 regions and software can write 1 to the bit corresponding to the region loaded with valid data"
|
|
line.long 0x8 "GPR25,SRAM_MEMORY_ACCESS_SECURE"
|
|
hexmask.long 0x8 0.--31. 1. "SRAM_MEM_BLK_RST_RET_SEC,The entire SRAM memory space may be divided into 32 regions and software can write 1 to the bit corresponding to the region loaded with valid data"
|
|
line.long 0xC "GPR26,SRAM_MEMORY_ACCESS_NON_SECURE"
|
|
hexmask.long 0xC 0.--31. 1. "SRAM_MEM_BLK_RST_RET_NON_SEC,The entire SRAM memory space may be divided into 32 regions and software can write 1 to the bit corresponding to the region loaded with valid data"
|
|
line.long 0x10 "GPR27,SELFTEST CONFIGURATION REGISTER"
|
|
bitfld.long 0x10 2. "RST_AFT_MBISTONLY_SLFTST,Enable reset Assertion after MBIST Only Selftest This bit should always be programmed before running any selftest." "0: No Reset is issued to the system after MBIST..,1: PHASE 1 reset is issued to the system after.."
|
|
newline
|
|
bitfld.long 0x10 1. "EXT_RST_ASSERT_DIS,Disable assertion of reset pin during online self-test" "0: RESET pin is asserted during online selftest,1: RESET pin is not asserted during online selftest"
|
|
newline
|
|
bitfld.long 0x10 0. "STCU_UF_RST_DIS,Disable destructive reset assertion due to STCU unrecoverable fault at RGM" "0: STCU unrecoverable fault triggers a destructive..,1: STCU unrecoverable fault does not trigger a.."
|
|
rgroup.long 0x180++0x3
|
|
line.long 0x0 "PCIE_CONFIG_1,PCIe Configuration1 register"
|
|
bitfld.long 0x0 28. "PCIE_WAKE,Wake Up." "0,1"
|
|
newline
|
|
bitfld.long 0x0 25.--27. "PCIE_PHY_MAC_RXSTATUS,Receive status and error codes for each lane. Encoding is as follows:" "0: Received data OK,1: A SKP set has been added. For Gen1/2 a SKP set..,2: A SKP set has been removed. For Gen1/2: A SKP..,3: Receiver detected,4: Decode error. For Gen1/2 this indicates..,5: Elastic buffer overflow,6: Elastic buffer underflow,7: Receive disparity error."
|
|
newline
|
|
bitfld.long 0x0 23. "PCIE_RDLH_LINK_UP,Data link layer up/down indicator" "0: Link is down,1: Link is up"
|
|
newline
|
|
bitfld.long 0x0 20.--22. "PCIE_PM_CURNT_STATE,Indicates the current power state" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 19. "PCIE_CFG_MSI_EN,PCIe config MSI enable" "0,1"
|
|
newline
|
|
hexmask.long.word 0x0 2.--17. 1. "PCIE_RADM_MSG_REQ_ID,The requester ID of the received Message."
|
|
newline
|
|
bitfld.long 0x0 1. "PCIE_SMLH_LINK_UP,PHY Link up/down indicator" "0: Link is down,1: Link is up"
|
|
newline
|
|
bitfld.long 0x0 0. "PCIE_PM_STATUS,PCIE_RC_PMCSR[PME_Status] bit of the PMCSR." "0,1"
|
|
group.long 0x184++0x7
|
|
line.long 0x0 "DDR_SELF_REF_CTRL,DDR Self Refresh Control register"
|
|
bitfld.long 0x0 4. "SRAM_BLK_PRSRV_RST,SRAM block preserve on reset" "0: SRAM contents are not retained across a..,1: SRAM contents are retained across a functional.."
|
|
newline
|
|
bitfld.long 0x0 3. "DDR1_EN_SLF_REF_RST,DDR1 enable self refresh on reset" "0: DDR1 contents are not retained across a..,1: DDR1 contents are retained across a functional.."
|
|
newline
|
|
bitfld.long 0x0 2. "DDR0_EN_SLF_REF_RST,DDR0 enable self refresh on reset" "0: DDR0 contents are not retained across a..,1: DDR0 contents are retained across a functional.."
|
|
newline
|
|
bitfld.long 0x0 1. "DDR1_SLF_REF_CLR,DDR1 self refresh clear" "0: DDR1 RESET and CKE pads are not currently safe..,1: DDR1 RESET and CKE pads are currently safe.."
|
|
newline
|
|
bitfld.long 0x0 0. "DDR0_SLF_REF_CLR,DDR0 self refresh clear" "0: DDR0 RESET and CKE pads are not currently safe..,1: DDR0 RESET and CKE pads are currently safe.."
|
|
line.long 0x4 "PCIE_CONFIG_0,PCIe Configuration0 register"
|
|
bitfld.long 0x4 23. "PCIE_MSI_REQ,Once asserted this bit remains asserted until the PCIe_CTRLR asserts corresponding acknowledgment or grant signal" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x4 17.--22. 1. "PCIE_SLV_RESP_ERR_MAP,Slave Response Error Map."
|
|
newline
|
|
bitfld.long 0x4 15.--16. "PCIE_MSTR_RESP_ERR_MAP,Master Response Error Map" "0: CPL abort,1: Unsupported request,?,?"
|
|
newline
|
|
bitfld.long 0x4 13. "PCIE_PIPE0_TX_DEEMPH,PIPE Transmitter De-emphasis" "0: Tx de-emphasis enabled per PCIe DEEMPH settings..,1: Tx de-emphasis disabled."
|
|
newline
|
|
bitfld.long 0x4 12. "PCIE_PHY_RTUNE_REQ,Termination Resistor Tune Request" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "PCIE_PCS_CMN_CLK,PCIe PCS common clocks" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8.--10. "PCIE_PHY_TX_VBOOST_LVL,Transmitter Voltage Boost Level" "?,?,?,3: Corresponds to a launch amplitude of 0.844 V,4: (default): corresponds to a launch amplitude of..,5: Corresponds to a launch amplitude of 1.156 V,?,?"
|
|
newline
|
|
bitfld.long 0x4 7. "PCIE_APP_UNLK_MSG,PCIe app unlock message" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x4 2.--6. 1. "PCIE_PHY_TX0_OFST,PCIe PHY Tx0 term offset"
|
|
newline
|
|
bitfld.long 0x4 0. "PCIE_LNK_REQ_RST_CLR,PCIe link request reset clear" "0,1"
|
|
group.long 0x198++0x3
|
|
line.long 0x0 "SOC_MISC_CONFIG2,SOC_MISC_CONFIG REGISTER 2"
|
|
bitfld.long 0x0 29. "ECC_DCU,Disable ECC - DCU" "0: ECC error reporting is enabled,1: ECC error reporting is disabled"
|
|
newline
|
|
bitfld.long 0x0 28. "ECC_ENET,Disable ECC - ENET" "0: ECC error reporting is enabled,1: ECC error reporting is disabled"
|
|
newline
|
|
bitfld.long 0x0 27. "ECC_FASTDMA,Disable ECC - FastDMA" "0: ECC error reporting is enabled,1: ECC error reporting is disabled"
|
|
newline
|
|
bitfld.long 0x0 26. "ECC_IPUS,Disable ECC - IPUS" "0: ECC error reporting is enabled,1: ECC error reporting is disabled"
|
|
newline
|
|
bitfld.long 0x0 25. "ECC_KRAM,Disable ECC - KRAM" "0: ECC error reporting is enabled,1: ECC error reporting is disabled"
|
|
newline
|
|
bitfld.long 0x0 24. "ECC_PCIE,Disable ECC - PCIE" "0: ECC error reporting is enabled,1: ECC error reporting is disabled"
|
|
tree.end
|
|
tree "SSE (Safe State Engine)"
|
|
base ad:0x40079000
|
|
group.long 0x0++0x13
|
|
line.long 0x0 "CFG,Configuration Register"
|
|
bitfld.long 0x0 8. "EWD_EN,Early Watchdog Window Service" "0: If the write trigger occurs before the..,1: No watchdog error will be declared and.."
|
|
bitfld.long 0x0 6.--7. "PAR_EN,Parity Checking Enable" "0: Parity checking is disabled and parity status..,?,2: Parity checking is enabled and it is required to..,3: Parity checking is enabled and it is required to.."
|
|
newline
|
|
bitfld.long 0x0 5. "WD_EN,Watchdog Enable" "0: No watchdog error will be reported.,1: Watchdog error will be reported when it occurs."
|
|
bitfld.long 0x0 4. "WD_STK,Watchdog output sticky" "0: Single pulse.,1: Sticky until W1C operation on SSE_STATE [WD_ERR]"
|
|
newline
|
|
bitfld.long 0x0 3. "CMP_OPT,Compare Option" "0: Result will be '1' when CR's contents are..,1: Result will be '1' when CR's contents are equal.."
|
|
bitfld.long 0x0 2. "IN3_SEL,IN3 Select" "0: Watchdog output event will be connected to the..,1: IN3 will be connected to the LUT's address bit 0."
|
|
newline
|
|
bitfld.long 0x0 1. "IN02_SEL,IN0- IN2 select" "0: Input register bit [2:0] is used as the address..,1: IN2-IN0 is used as the address to the LUT (bits.."
|
|
bitfld.long 0x0 0. "WDENSRC,Watchdog restart source" "0: Downcounter will restart on write trigger.,1: Downcounter will restart on the rising edge of.."
|
|
line.long 0x4 "IR,Input Register"
|
|
hexmask.long.word 0x4 0.--15. 1. "IN_VAL,Input value to be compared"
|
|
line.long 0x8 "CR,Compare Register"
|
|
hexmask.long.word 0x8 0.--15. 1. "CR_VAL,Value to be compared with Input register"
|
|
line.long 0xC "LUT_LSB,First Look Up Table Register"
|
|
hexmask.long 0xC 0.--31. 1. "LSB_VAL,Value of the first look up table"
|
|
line.long 0x10 "LUT_MSB,Second Look Up Table Register"
|
|
hexmask.long 0x10 0.--31. 1. "MSB_VAL,Value of the second look up table"
|
|
group.long 0x20++0xF
|
|
line.long 0x0 "WD_WIN,Watchdog Window Value"
|
|
hexmask.long 0x0 0.--31. 1. "WD_WIN,Watchdog window"
|
|
line.long 0x4 "WD_TO,Watchdog Timeout"
|
|
hexmask.long 0x4 0.--31. 1. "WD_TO_VAL,Timeout value for the watchdog"
|
|
line.long 0x8 "INT_EN,Interrupt Enable Register"
|
|
bitfld.long 0x8 1.--2. "OUT3_IE,OUT3 Interrupt Enable" "0: OUT3 Interrupt is disabled.,1: A parity error will generate an interrupt.,2: A watchdog error will generate an interrupt.,3: A parity or a watchdog error will generate an.."
|
|
bitfld.long 0x8 0. "OUT2_IE,OUT2 Interrupt Enable" "0: No interrupt will be generated on the rising..,1: An interrupt will be generated on the rising.."
|
|
line.long 0xC "STATE,State Register"
|
|
bitfld.long 0xC 8. "OUT2_ST,OUT2 Status" "0: Rising edge of OUT1 has not occured so far.,1: Rising edge of OUT1 has occured."
|
|
bitfld.long 0xC 7. "PAR_ERR,Parity Error" "0: No parity error has occured.,1: Parity error has occured."
|
|
newline
|
|
bitfld.long 0xC 6. "WD_ERR,Watchdog Error" "0: No watchdog error has occured.,1: Watchdog error has occured."
|
|
rbitfld.long 0xC 4.--5. "ST_UNENC,Unencoded State Values" "0: First State.,1: Second State.,2: Third State.,3: Fourth State."
|
|
newline
|
|
hexmask.long.byte 0xC 0.--3. 1. "ST_ENC,Encoded state values"
|
|
tree.end
|
|
tree "STCU2 (Self-Test Control Unit)"
|
|
base ad:0x400E4000
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "RUNSW,STCU2 Run Software Register"
|
|
bitfld.long 0x0 9. "MBSWPLLEN,On-Line MBIST with PLL Enabled" "0: On-Line MBIST is executed without using the..,1: On-Line MBIST is executed using the PLL.."
|
|
bitfld.long 0x0 8. "LBSWPLLEN,On-Line LBIST with PLL Enabled" "0: On-Line LBIST is executed without using the..,1: On-Line LBIST is executed using the PLL.."
|
|
newline
|
|
bitfld.long 0x0 0. "RUNSW,RUNSW The RUNSW bit is automatically cleared by the STCU2 when the on-line self testing procedure has been completed" "0: Idle,1: On-line self testing procedure is running"
|
|
wgroup.long 0x8++0x3
|
|
line.long 0x0 "SKC,STCU2 SK Code Register"
|
|
hexmask.long 0x0 0.--31. 1. "SKC,STCU2 security key code for on-line Test = 753F924Eh: Key1 to unlock the write access the STCU2 = 8AC06DB1h: Key2 to unlock the write access the STCU2"
|
|
group.long 0xC++0x3
|
|
line.long 0x0 "CFG,STCU2 Configuration Register"
|
|
hexmask.long.word 0x0 21.--30. 1. "PTR,LBIST or MBIST pointer PTR defines the logical pointer to the first LBIST or MBIST to be scheduled when the self testing procedure is enabled"
|
|
hexmask.long.byte 0x0 13.--20. 1. "LB_DELAY,Delay LBIST run LB_DELAY defines the delay between the LBIST starts when more than a single LBIST is selected to be executed concurrently with the purpose of smoothing the power consumption transient"
|
|
newline
|
|
bitfld.long 0x0 8. "WRP,Write Protection 0: Specific STCU2 registers can be written through IPS bus interface 1: Specific STCU2 registers cannot be written though IPS preventing in such a way any user application write operation" "0: Specific STCU2 registers can be written through..,1: Specific STCU2 registers cannot be written.."
|
|
bitfld.long 0x0 0.--2. "CLK_CFG,Logic Memory BIST and STCU2 core CLK Clock configuration CLK_CFG defines the ratio between the sys_clk and the TCK used to program both the LBIST and the MBIST and the STCU2 core clock" "0,1,2,3,4,5,6,7"
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "WDG,STCU2 Watchdog Register Granularity"
|
|
hexmask.long 0x0 0.--31. 1. "WDGEOC,Watchdog End of Count Timer This value has to be set in order to define the time budget related to the On-Line Self Test execution and check that everything is correctly working within this slot of time"
|
|
group.long 0x24++0x7
|
|
line.long 0x0 "ERR_STAT,STCU2 Error Register"
|
|
rbitfld.long 0x0 25. "ABORTHW,On-line hardware abort flag You can always read this field" "0: No hardware abort was requested during the..,1: A hardware abort was detected during the On-Life.."
|
|
rbitfld.long 0x0 20. "LOCKESW,On-Line LOCK Error You can always read this field" "0: In case PLL is enabled it is correctly locked..,1: When the PLL is enabled this flag highlight that.."
|
|
newline
|
|
rbitfld.long 0x0 19. "WDTOSW,On-Line Watchdog time-out You can always read this field" "0: LBIST andMBIST time slots completed within the..,1: LBIST andMBIST time slots not completed within.."
|
|
rbitfld.long 0x0 17. "ENGESW,On-Line Engine Error You can always read this field" "0: Valid Engine execution,1: Invalid Engine execution. The following.."
|
|
newline
|
|
rbitfld.long 0x0 16. "INVPSW,On-Line Invalid Pointer You can always read this field" "0: Valid linked pointer list,1: Invalid linked pointer list. The following.."
|
|
bitfld.long 0x0 9. "UFSF,Unrecoverable Faults Status Flag This flag reports the global status of the UF" "0: No errors that trigger the Unrecoverable Faults..,1: There are errors that trigger the Unrecoverable.."
|
|
newline
|
|
bitfld.long 0x0 8. "RFSF,Recoverable Faults Status Flag This flag reports the global status of the RF" "0: No errors that trigger the Recoverable Faults..,1: There are errors that trigger the Recoverable.."
|
|
line.long 0x4 "ERR_FM,STCU2 Error FM Register"
|
|
bitfld.long 0x4 4. "LOCKEUFM,PLL LOCK Unrecoverable Fault Mapping" "0: Recoverable Fault Mapping,1: Unrecoverable Fault Mapping"
|
|
bitfld.long 0x4 3. "WDTOUFM,Watchdog time-out Unrecoverable Fault Mapping" "0: Recoverable Fault Mapping,1: Unrecoverable Fault Mapping"
|
|
newline
|
|
bitfld.long 0x4 1. "ENGEUFM,Engine Error Unrecoverable fault Mapping" "0: Recoverable Fault Mapping,1: Unrecoverable Fault Mapping"
|
|
bitfld.long 0x4 0. "INVPUFM,Invalid Pointer Unrecoverable Fault Mapping" "0: Recoverable Fault Mapping,1: Unrecoverable Mapping"
|
|
rgroup.long 0x3C++0x3
|
|
line.long 0x0 "LBSSW0,STCU2 On-Line LBIST Status Register 0"
|
|
bitfld.long 0x0 26. "LBSSW26,LBSSWx: On-Line status of the selected LBIST" "0: Failed LBIST execution,1: Successful LBIST execution"
|
|
bitfld.long 0x0 25. "LBSSW25,LBSSWx: On-Line status of the selected LBIST" "0: Failed LBIST execution,1: Successful LBIST execution"
|
|
newline
|
|
bitfld.long 0x0 24. "LBSSW24,LBSSWx: On-Line status of the selected LBIST" "0: Failed LBIST execution,1: Successful LBIST execution"
|
|
bitfld.long 0x0 23. "LBSSW23,LBSSWx: On-Line status of the selected LBIST" "0: Failed LBIST execution,1: Successful LBIST execution"
|
|
newline
|
|
bitfld.long 0x0 22. "LBSSW22,LBSSWx: On-Line status of the selected LBIST" "0: Failed LBIST execution,1: Successful LBIST execution"
|
|
bitfld.long 0x0 21. "LBSSW21,LBSSWx: On-Line status of the selected LBIST" "0: Failed LBIST execution,1: Successful LBIST execution"
|
|
newline
|
|
bitfld.long 0x0 20. "LBSSW20,LBSSWx: On-Line status of the selected LBIST" "0: Failed LBIST execution,1: Successful LBIST execution"
|
|
bitfld.long 0x0 19. "LBSSW19,LBSSWx: On-Line status of the selected LBIST" "0: Failed LBIST execution,1: Successful LBIST execution"
|
|
newline
|
|
bitfld.long 0x0 18. "LBSSW18,LBSSWx: On-Line status of the selected LBIST" "0: Failed LBIST execution,1: Successful LBIST execution"
|
|
bitfld.long 0x0 17. "LBSSW17,LBSSWx: On-Line status of the selected LBIST" "0: Failed LBIST execution,1: Successful LBIST execution"
|
|
newline
|
|
bitfld.long 0x0 16. "LBSSW16,LBSSWx: On-Line status of the selected LBIST" "0: Failed LBIST execution,1: Successful LBIST execution"
|
|
bitfld.long 0x0 15. "LBSSW15,LBSSWx: On-Line status of the selected LBIST" "0: Failed LBIST execution,1: Successful LBIST execution"
|
|
newline
|
|
bitfld.long 0x0 14. "LBSSW14,LBSSWx: On-Line status of the selected LBIST" "0: Failed LBIST execution,1: Successful LBIST execution"
|
|
bitfld.long 0x0 13. "LBSSW13,LBSSWx: On-Line status of the selected LBIST" "0: Failed LBIST execution,1: Successful LBIST execution"
|
|
newline
|
|
bitfld.long 0x0 12. "LBSSW12,LBSSWx: On-Line status of the selected LBIST" "0: Failed LBIST execution,1: Successful LBIST execution"
|
|
bitfld.long 0x0 11. "LBSSW11,LBSSWx: On-Line status of the selected LBIST" "0: Failed LBIST execution,1: Successful LBIST execution"
|
|
newline
|
|
bitfld.long 0x0 10. "LBSSW10,LBSSWx: On-Line status of the selected LBIST" "0: Failed LBIST execution,1: Successful LBIST execution"
|
|
bitfld.long 0x0 9. "LBSSW9,LBSSWx: On-Line status of the selected LBIST" "0: Failed LBIST execution,1: Successful LBIST execution"
|
|
newline
|
|
bitfld.long 0x0 8. "LBSSW8,LBSSWx: On-Line status of the selected LBIST" "0: Failed LBIST execution,1: Successful LBIST execution"
|
|
bitfld.long 0x0 7. "LBSSW7,LBSSWx: On-Line status of the selected LBIST" "0: Failed LBIST execution,1: Successful LBIST execution"
|
|
newline
|
|
bitfld.long 0x0 6. "LBSSW6,LBSSWx: On-Line status of the selected LBIST" "0: Failed LBIST execution,1: Successful LBIST execution"
|
|
bitfld.long 0x0 5. "LBSSW5,LBSSWx: On-Line status of the selected LBIST" "0: Failed LBIST execution,1: Successful LBIST execution"
|
|
newline
|
|
bitfld.long 0x0 4. "LBSSW4,LBSSWx: On-Line status of the selected LBIST" "0: Failed LBIST execution,1: Successful LBIST execution"
|
|
bitfld.long 0x0 3. "LBSSW3,LBSSWx: On-Line status of the selected LBIST" "0: Failed LBIST execution,1: Successful LBIST execution"
|
|
newline
|
|
bitfld.long 0x0 2. "LBSSW2,LBSSWx: On-Line status of the selected LBIST" "0: Failed LBIST execution,1: Successful LBIST execution"
|
|
bitfld.long 0x0 1. "LBSSW1,LBSSWx: On-Line status of the selected LBIST" "0: Failed LBIST execution,1: Successful LBIST execution"
|
|
newline
|
|
bitfld.long 0x0 0. "LBSSW0,LBSSWx: On-Line status of the selected LBIST" "0: Failed LBIST execution,1: Successful LBIST execution"
|
|
rgroup.long 0x44++0x3
|
|
line.long 0x0 "LBESW0,STCU2 On-Line LBIST End Flag Register 0"
|
|
bitfld.long 0x0 26. "LBESW26,LBESWx: On-Line LBIST End status" "0: LBIST execution not yet completed,1: LBIST execution finished"
|
|
bitfld.long 0x0 25. "LBESW25,LBESWx: On-Line LBIST End status" "0: LBIST execution not yet completed,1: LBIST execution finished"
|
|
newline
|
|
bitfld.long 0x0 24. "LBESW24,LBESWx: On-Line LBIST End status" "0: LBIST execution not yet completed,1: LBIST execution finished"
|
|
bitfld.long 0x0 23. "LBESW23,LBESWx: On-Line LBIST End status" "0: LBIST execution not yet completed,1: LBIST execution finished"
|
|
newline
|
|
bitfld.long 0x0 22. "LBESW22,LBESWx: On-Line LBIST End status" "0: LBIST execution not yet completed,1: LBIST execution finished"
|
|
bitfld.long 0x0 21. "LBESW21,LBESWx: On-Line LBIST End status" "0: LBIST execution not yet completed,1: LBIST execution finished"
|
|
newline
|
|
bitfld.long 0x0 20. "LBESW20,LBESWx: On-Line LBIST End status" "0: LBIST execution not yet completed,1: LBIST execution finished"
|
|
bitfld.long 0x0 19. "LBESW19,LBESWx: On-Line LBIST End status" "0: LBIST execution not yet completed,1: LBIST execution finished"
|
|
newline
|
|
bitfld.long 0x0 18. "LBESW18,LBESWx: On-Line LBIST End status" "0: LBIST execution not yet completed,1: LBIST execution finished"
|
|
bitfld.long 0x0 17. "LBESW17,LBESWx: On-Line LBIST End status" "0: LBIST execution not yet completed,1: LBIST execution finished"
|
|
newline
|
|
bitfld.long 0x0 16. "LBESW16,LBESWx: On-Line LBIST End status" "0: LBIST execution not yet completed,1: LBIST execution finished"
|
|
bitfld.long 0x0 15. "LBESW15,LBESWx: On-Line LBIST End status" "0: LBIST execution not yet completed,1: LBIST execution finished"
|
|
newline
|
|
bitfld.long 0x0 14. "LBESW14,LBESWx: On-Line LBIST End status" "0: LBIST execution not yet completed,1: LBIST execution finished"
|
|
bitfld.long 0x0 13. "LBESW13,LBESWx: On-Line LBIST End status" "0: LBIST execution not yet completed,1: LBIST execution finished"
|
|
newline
|
|
bitfld.long 0x0 12. "LBESW12,LBESWx: On-Line LBIST End status" "0: LBIST execution not yet completed,1: LBIST execution finished"
|
|
bitfld.long 0x0 11. "LBESW11,LBESWx: On-Line LBIST End status" "0: LBIST execution not yet completed,1: LBIST execution finished"
|
|
newline
|
|
bitfld.long 0x0 10. "LBESW10,LBESWx: On-Line LBIST End status" "0: LBIST execution not yet completed,1: LBIST execution finished"
|
|
bitfld.long 0x0 9. "LBESW9,LBESWx: On-Line LBIST End status" "0: LBIST execution not yet completed,1: LBIST execution finished"
|
|
newline
|
|
bitfld.long 0x0 8. "LBESW8,LBESWx: On-Line LBIST End status" "0: LBIST execution not yet completed,1: LBIST execution finished"
|
|
bitfld.long 0x0 7. "LBESW7,LBESWx: On-Line LBIST End status" "0: LBIST execution not yet completed,1: LBIST execution finished"
|
|
newline
|
|
bitfld.long 0x0 6. "LBESW6,LBESWx: On-Line LBIST End status" "0: LBIST execution not yet completed,1: LBIST execution finished"
|
|
bitfld.long 0x0 5. "LBESW5,LBESWx: On-Line LBIST End status" "0: LBIST execution not yet completed,1: LBIST execution finished"
|
|
newline
|
|
bitfld.long 0x0 4. "LBESW4,LBESWx: On-Line LBIST End status" "0: LBIST execution not yet completed,1: LBIST execution finished"
|
|
bitfld.long 0x0 3. "LBESW3,LBESWx: On-Line LBIST End status" "0: LBIST execution not yet completed,1: LBIST execution finished"
|
|
newline
|
|
bitfld.long 0x0 2. "LBESW2,LBESWx: On-Line LBIST End status" "0: LBIST execution not yet completed,1: LBIST execution finished"
|
|
bitfld.long 0x0 1. "LBESW1,LBESWx: On-Line LBIST End status" "0: LBIST execution not yet completed,1: LBIST execution finished"
|
|
newline
|
|
bitfld.long 0x0 0. "LBESW0,LBESWx: On-Line LBIST End status" "0: LBIST execution not yet completed,1: LBIST execution finished"
|
|
group.long 0x54++0x3
|
|
line.long 0x0 "LBUFM0,STCU2 LBIST Unrecoverable FM Register 0"
|
|
bitfld.long 0x0 26. "LBUFM26,LBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x0 25. "LBUFM25,LBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x0 24. "LBUFM24,LBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x0 23. "LBUFM23,LBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x0 22. "LBUFM22,LBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x0 21. "LBUFM21,LBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x0 20. "LBUFM20,LBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x0 19. "LBUFM19,LBIST Unrecoverable Fault Mapping" "0: Recoverable Fault Mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x0 18. "LBUFM18,LBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x0 17. "LBUFM17,LBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x0 16. "LBUFM16,LBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x0 15. "LBUFM15,LBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x0 14. "LBUFM14,LBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x0 13. "LBUFM13,LBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x0 12. "LBUFM12,LBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x0 11. "LBUFM11,LBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x0 10. "LBUFM10,LBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x0 9. "LBUFM9,LBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x0 8. "LBUFM8,LBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x0 7. "LBUFM7,LBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x0 6. "LBUFM6,LBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x0 5. "LBUFM5,LBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x0 4. "LBUFM4,LBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x0 3. "LBUFM3,LBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x0 2. "LBUFM2,LBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x0 1. "LBUFM1,LBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x0 0. "LBUFM0,LBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
rgroup.long 0xDC++0xB
|
|
line.long 0x0 "MBSSW0,STCU2 On-Line MBIST Status Register 0"
|
|
bitfld.long 0x0 31. "MBSSW31,On-Line status (NMCUT range = 0 to 31) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
bitfld.long 0x0 30. "MBSSW30,On-Line status (NMCUT range = 0 to 31) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
newline
|
|
bitfld.long 0x0 29. "MBSSW29,On-Line status (NMCUT range = 0 to 31) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
bitfld.long 0x0 28. "MBSSW28,On-Line status (NMCUT range = 0 to 31) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
newline
|
|
bitfld.long 0x0 27. "MBSSW27,On-Line status (NMCUT range = 0 to 31) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
bitfld.long 0x0 26. "MBSSW26,On-Line status (NMCUT range = 0 to 31) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
newline
|
|
bitfld.long 0x0 25. "MBSSW25,On-Line status (NMCUT range = 0 to 31) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
bitfld.long 0x0 24. "MBSSW24,On-Line status (NMCUT range = 0 to 31) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
newline
|
|
bitfld.long 0x0 23. "MBSSW23,On-Line status (NMCUT range = 0 to 31) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
bitfld.long 0x0 22. "MBSSW22,On-Line status (NMCUT range = 0 to 31) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
newline
|
|
bitfld.long 0x0 21. "MBSSW21,On-Line status (NMCUT range = 0 to 31) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
bitfld.long 0x0 20. "MBSSW20,On-Line status (NMCUT range = 0 to 31) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
newline
|
|
bitfld.long 0x0 19. "MBSSW19,On-Line status (NMCUT range = 0 to 31) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
bitfld.long 0x0 18. "MBSSW18,On-Line status (NMCUT range = 0 to 31) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
newline
|
|
bitfld.long 0x0 17. "MBSSW17,On-Line status (NMCUT range = 0 to 31) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
bitfld.long 0x0 16. "MBSSW16,On-Line status (NMCUT range = 0 to 31) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
newline
|
|
bitfld.long 0x0 15. "MBSSW15,On-Line status (NMCUT range = 0 to 31) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
bitfld.long 0x0 14. "MBSSW14,On-Line status (NMCUT range = 0 to 31) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
newline
|
|
bitfld.long 0x0 13. "MBSSW13,On-Line status (NMCUT range = 0 to 31) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
bitfld.long 0x0 12. "MBSSW12,On-Line status (NMCUT range = 0 to 31) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
newline
|
|
bitfld.long 0x0 11. "MBSSW11,On-Line status (NMCUT range = 0 to 31) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
bitfld.long 0x0 10. "MBSSW10,On-Line status (NMCUT range = 0 to 31) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
newline
|
|
bitfld.long 0x0 9. "MBSSW9,On-Line status (NMCUT range = 0 to 31) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
bitfld.long 0x0 8. "MBSSW8,On-Line status (NMCUT range = 0 to 31) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
newline
|
|
bitfld.long 0x0 7. "MBSSW7,On-Line status (NMCUT range = 0 to 31) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
bitfld.long 0x0 6. "MBSSW6,On-Line status (NMCUT range = 0 to 31) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
newline
|
|
bitfld.long 0x0 5. "MBSSW5,On-Line status (NMCUT range = 0 to 31) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
bitfld.long 0x0 4. "MBSSW4,On-Line status (NMCUT range = 0 to 31) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
newline
|
|
bitfld.long 0x0 3. "MBSSW3,On-Line status (NMCUT range = 0 to 31) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
bitfld.long 0x0 2. "MBSSW2,On-Line status (NMCUT range = 0 to 31) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
newline
|
|
bitfld.long 0x0 1. "MBSSW1,On-Line status (NMCUT range = 0 to 31) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
bitfld.long 0x0 0. "MBSSW0,On-Line status (NMCUT range = 0 to 31) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
line.long 0x4 "MBSSW1,STCU2 On-Line MBIST Status Register 1"
|
|
bitfld.long 0x4 31. "MBSSW63,MBSSWx: On-Line status (NMCUT range = 32 to 63) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
bitfld.long 0x4 30. "MBSSW62,MBSSWx: On-Line status (NMCUT range = 32 to 63) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
newline
|
|
bitfld.long 0x4 29. "MBSSW61,MBSSWx: On-Line status (NMCUT range = 32 to 63) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
bitfld.long 0x4 28. "MBSSW60,MBSSWx: On-Line status (NMCUT range = 32 to 63) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
newline
|
|
bitfld.long 0x4 27. "MBSSW59,MBSSWx: On-Line status (NMCUT range = 32 to 63) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
bitfld.long 0x4 26. "MBSSW58,MBSSWx: On-Line status (NMCUT range = 32 to 63) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
newline
|
|
bitfld.long 0x4 25. "MBSSW57,MBSSWx: On-Line status (NMCUT range = 32 to 63) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
bitfld.long 0x4 24. "MBSSW56,MBSSWx: On-Line status (NMCUT range = 32 to 63) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
newline
|
|
bitfld.long 0x4 23. "MBSSW55,MBSSWx: On-Line status (NMCUT range = 32 to 63) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
bitfld.long 0x4 22. "MBSSW54,MBSSWx: On-Line status (NMCUT range = 32 to 63) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
newline
|
|
bitfld.long 0x4 21. "MBSSW53,MBSSWx: On-Line status (NMCUT range = 32 to 63) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
bitfld.long 0x4 20. "MBSSW52,MBSSWx: On-Line status (NMCUT range = 32 to 63) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
newline
|
|
bitfld.long 0x4 19. "MBSSW51,MBSSWx: On-Line status (NMCUT range = 32 to 63) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
bitfld.long 0x4 18. "MBSSW50,MBSSWx: On-Line status (NMCUT range = 32 to 63) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
newline
|
|
bitfld.long 0x4 17. "MBSSW49,MBSSWx: On-Line status (NMCUT range = 32 to 63) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
bitfld.long 0x4 16. "MBSSW48,MBSSWx: On-Line status (NMCUT range = 32 to 63) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
newline
|
|
bitfld.long 0x4 15. "MBSSW47,MBSSWx: On-Line status (NMCUT range = 32 to 63) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
bitfld.long 0x4 14. "MBSSW46,MBSSWx: On-Line status (NMCUT range = 32 to 63) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
newline
|
|
bitfld.long 0x4 13. "MBSSW45,MBSSWx: On-Line status (NMCUT range = 32 to 63) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
bitfld.long 0x4 12. "MBSSW44,MBSSWx: On-Line status (NMCUT range = 32 to 63) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
newline
|
|
bitfld.long 0x4 11. "MBSSW43,MBSSWx: On-Line status (NMCUT range = 32 to 63) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
bitfld.long 0x4 10. "MBSSW42,MBSSWx: On-Line status (NMCUT range = 32 to 63) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
newline
|
|
bitfld.long 0x4 9. "MBSSW41,MBSSWx: On-Line status (NMCUT range = 32 to 63) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
bitfld.long 0x4 8. "MBSSW40,MBSSWx: On-Line status (NMCUT range = 32 to 63) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
newline
|
|
bitfld.long 0x4 7. "MBSSW39,MBSSWx: On-Line status (NMCUT range = 32 to 63) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
bitfld.long 0x4 6. "MBSSW38,MBSSWx: On-Line status (NMCUT range = 32 to 63) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
newline
|
|
bitfld.long 0x4 5. "MBSSW37,MBSSWx: On-Line status (NMCUT range = 32 to 63) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
bitfld.long 0x4 4. "MBSSW36,MBSSWx: On-Line status (NMCUT range = 32 to 63) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
newline
|
|
bitfld.long 0x4 3. "MBSSW35,MBSSWx: On-Line status (NMCUT range = 32 to 63) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
bitfld.long 0x4 2. "MBSSW34,MBSSWx: On-Line status (NMCUT range = 32 to 63) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
newline
|
|
bitfld.long 0x4 1. "MBSSW33,MBSSWx: On-Line status (NMCUT range = 32 to 63) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
bitfld.long 0x4 0. "MBSSW32,MBSSWx: On-Line status (NMCUT range = 32 to 63) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
line.long 0x8 "MBSSW2,STCU2 On-Line MBIST Status High Register 2"
|
|
bitfld.long 0x8 13. "MBSSW77,MBSSWx: On-Line status (NMCUT range = 64 to 95) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
bitfld.long 0x8 12. "MBSSW76,MBSSWx: On-Line status (NMCUT range = 64 to 95) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
newline
|
|
bitfld.long 0x8 11. "MBSSW75,MBSSWx: On-Line status (NMCUT range = 64 to 95) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
bitfld.long 0x8 10. "MBSSW74,MBSSWx: On-Line status (NMCUT range = 64 to 95) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
newline
|
|
bitfld.long 0x8 9. "MBSSW73,MBSSWx: On-Line status (NMCUT range = 64 to 95) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
bitfld.long 0x8 8. "MBSSW72,MBSSWx: On-Line status (NMCUT range = 64 to 95) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
newline
|
|
bitfld.long 0x8 7. "MBSSW71,MBSSWx: On-Line status (NMCUT range = 64 to 95) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
bitfld.long 0x8 6. "MBSSW70,MBSSWx: On-Line status (NMCUT range = 64 to 95) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
newline
|
|
bitfld.long 0x8 5. "MBSSW69,MBSSWx: On-Line status (NMCUT range = 64 to 95) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
bitfld.long 0x8 4. "MBSSW68,MBSSWx: On-Line status (NMCUT range = 64 to 95) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
newline
|
|
bitfld.long 0x8 3. "MBSSW67,MBSSWx: On-Line status (NMCUT range = 64 to 95) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
bitfld.long 0x8 2. "MBSSW66,MBSSWx: On-Line status (NMCUT range = 64 to 95) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
newline
|
|
bitfld.long 0x8 1. "MBSSW65,MBSSWx: On-Line status (NMCUT range = 64 to 95) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
bitfld.long 0x8 0. "MBSSW64,MBSSWx: On-Line status (NMCUT range = 64 to 95) of the selected MBIST" "0: Failed NMCUT BIST execution,1: No Fault detected during the NMCUT BIST execution"
|
|
rgroup.long 0x11C++0xB
|
|
line.long 0x0 "MBESW0,STCU2 On-Line MBIST End Flag Register 0"
|
|
bitfld.long 0x0 31. "MBESW31,MBESWx: On-Line End status (0 to 31) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
bitfld.long 0x0 30. "MBESW30,MBESWx: On-Line End status (0 to 31) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
newline
|
|
bitfld.long 0x0 29. "MBESW29,MBESWx: On-Line End status (0 to 31) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
bitfld.long 0x0 28. "MBESW28,MBESWx: On-Line End status (0 to 31) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
newline
|
|
bitfld.long 0x0 27. "MBESW27,MBESWx: On-Line End status (0 to 31) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
bitfld.long 0x0 26. "MBESW26,MBESWx: On-Line End status (0 to 31) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
newline
|
|
bitfld.long 0x0 25. "MBESW25,MBESWx: On-Line End status (0 to 31) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
bitfld.long 0x0 24. "MBESW24,MBESWx: On-Line End status (0 to 31) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
newline
|
|
bitfld.long 0x0 23. "MBESW23,MBESWx: On-Line End status (0 to 31) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
bitfld.long 0x0 22. "MBESW22,MBESWx: On-Line End status (0 to 31) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
newline
|
|
bitfld.long 0x0 21. "MBESW21,MBESWx: On-Line End status (0 to 31) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
bitfld.long 0x0 20. "MBESW20,MBESWx: On-Line End status (0 to 31) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
newline
|
|
bitfld.long 0x0 19. "MBESW19,MBESWx: On-Line End status (0 to 31) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
bitfld.long 0x0 18. "MBESW18,MBESWx: On-Line End status (0 to 31) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
newline
|
|
bitfld.long 0x0 17. "MBESW17,MBESWx: On-Line End status (0 to 31) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
bitfld.long 0x0 16. "MBESW16,MBESWx: On-Line End status (0 to 31) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
newline
|
|
bitfld.long 0x0 15. "MBESW15,MBESWx: On-Line End status (0 to 31) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
bitfld.long 0x0 14. "MBESW14,MBESWx: On-Line End status (0 to 31) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
newline
|
|
bitfld.long 0x0 13. "MBESW13,MBESWx: On-Line End status (0 to 31) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
bitfld.long 0x0 12. "MBESW12,MBESWx: On-Line End status (0 to 31) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
newline
|
|
bitfld.long 0x0 11. "MBESW11,MBESWx: On-Line End status (0 to 31) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
bitfld.long 0x0 10. "MBESW10,MBESWx: On-Line End status (0 to 31) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
newline
|
|
bitfld.long 0x0 9. "MBESW9,MBESWx: On-Line End status (0 to 31) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
bitfld.long 0x0 8. "MBESW8,MBESWx: On-Line End status (0 to 31) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
newline
|
|
bitfld.long 0x0 7. "MBESW7,MBESWx: On-Line End status (0 to 31) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
bitfld.long 0x0 6. "MBESW6,MBESWx: On-Line End status (0 to 31) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
newline
|
|
bitfld.long 0x0 5. "MBESW5,MBESWx: On-Line End status (0 to 31) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
bitfld.long 0x0 4. "MBESW4,MBESWx: On-Line End status (0 to 31) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
newline
|
|
bitfld.long 0x0 3. "MBESW3,MBESWx: On-Line End status (0 to 31) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
bitfld.long 0x0 2. "MBESW2,MBESWx: On-Line End status (0 to 31) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
newline
|
|
bitfld.long 0x0 1. "MBESW1,MBESWx: On-Line End status (0 to 31) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
bitfld.long 0x0 0. "MBESW0,MBESWx: On-Line End status (0 to 31) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
line.long 0x4 "MBESW1,STCU2 On-Line MBIST End Flag Register 1"
|
|
bitfld.long 0x4 31. "MBESW63,On-Line End status (32 to 63) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
bitfld.long 0x4 30. "MBESW62,On-Line End status (32 to 63) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
newline
|
|
bitfld.long 0x4 29. "MBESW61,On-Line End status (32 to 63) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
bitfld.long 0x4 28. "MBESW60,On-Line End status (32 to 63) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
newline
|
|
bitfld.long 0x4 27. "MBESW59,On-Line End status (32 to 63) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
bitfld.long 0x4 26. "MBESW58,On-Line End status (32 to 63) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
newline
|
|
bitfld.long 0x4 25. "MBESW57,On-Line End status (32 to 63) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
bitfld.long 0x4 24. "MBESW56,On-Line End status (32 to 63) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
newline
|
|
bitfld.long 0x4 23. "MBESW55,On-Line End status (32 to 63) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
bitfld.long 0x4 22. "MBESW54,On-Line End status (32 to 63) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
newline
|
|
bitfld.long 0x4 21. "MBESW53,On-Line End status (32 to 63) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
bitfld.long 0x4 20. "MBESW52,On-Line End status (32 to 63) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
newline
|
|
bitfld.long 0x4 19. "MBESW51,On-Line End status (32 to 63) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
bitfld.long 0x4 18. "MBESW50,On-Line End status (32 to 63) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
newline
|
|
bitfld.long 0x4 17. "MBESW49,On-Line End status (32 to 63) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
bitfld.long 0x4 16. "MBESW48,On-Line End status (32 to 63) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
newline
|
|
bitfld.long 0x4 15. "MBESW47,On-Line End status (32 to 63) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
bitfld.long 0x4 14. "MBESW46,On-Line End status (32 to 63) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
newline
|
|
bitfld.long 0x4 13. "MBESW45,On-Line End status (32 to 63) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
bitfld.long 0x4 12. "MBESW44,On-Line End status (32 to 63) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
newline
|
|
bitfld.long 0x4 11. "MBESW43,On-Line End status (32 to 63) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
bitfld.long 0x4 10. "MBESW42,On-Line End status (32 to 63) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
newline
|
|
bitfld.long 0x4 9. "MBESW41,On-Line End status (32 to 63) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
bitfld.long 0x4 8. "MBESW40,On-Line End status (32 to 63) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
newline
|
|
bitfld.long 0x4 7. "MBESW39,On-Line End status (32 to 63) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
bitfld.long 0x4 6. "MBESW38,On-Line End status (32 to 63) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
newline
|
|
bitfld.long 0x4 5. "MBESW37,On-Line End status (32 to 63) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
bitfld.long 0x4 4. "MBESW36,On-Line End status (32 to 63) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
newline
|
|
bitfld.long 0x4 3. "MBESW35,On-Line End status (32 to 63) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
bitfld.long 0x4 2. "MBESW34,On-Line End status (32 to 63) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
newline
|
|
bitfld.long 0x4 1. "MBESW33,On-Line End status (32 to 63) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
bitfld.long 0x4 0. "MBESW32,On-Line End status (32 to 63) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
line.long 0x8 "MBESW2,STCU2 On-Line MBIST End Flag Register 2"
|
|
bitfld.long 0x8 13. "MBESW77,MBESWx: On-Line End status (64 to 95) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
bitfld.long 0x8 12. "MBESW76,MBESWx: On-Line End status (64 to 95) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
newline
|
|
bitfld.long 0x8 11. "MBESW75,MBESWx: On-Line End status (64 to 95) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
bitfld.long 0x8 10. "MBESW74,MBESWx: On-Line End status (64 to 95) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
newline
|
|
bitfld.long 0x8 9. "MBESW73,MBESWx: On-Line End status (64 to 95) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
bitfld.long 0x8 8. "MBESW72,MBESWx: On-Line End status (64 to 95) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
newline
|
|
bitfld.long 0x8 7. "MBESW71,MBESWx: On-Line End status (64 to 95) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
bitfld.long 0x8 6. "MBESW70,MBESWx: On-Line End status (64 to 95) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
newline
|
|
bitfld.long 0x8 5. "MBESW69,MBESWx: On-Line End status (64 to 95) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
bitfld.long 0x8 4. "MBESW68,MBESWx: On-Line End status (64 to 95) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
newline
|
|
bitfld.long 0x8 3. "MBESW67,MBESWx: On-Line End status (64 to 95) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
bitfld.long 0x8 2. "MBESW66,MBESWx: On-Line End status (64 to 95) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
newline
|
|
bitfld.long 0x8 1. "MBESW65,MBESWx: On-Line End status (64 to 95) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
bitfld.long 0x8 0. "MBESW64,MBESWx: On-Line End status (64 to 95) of the selected MBIST" "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
group.long 0x15C++0xB
|
|
line.long 0x0 "MBUFM0,STCU2 MBIST Unrecoverable FM Register 0"
|
|
bitfld.long 0x0 31. "MBUFM31,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x0 30. "MBUFM30,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x0 29. "MBUFM29,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x0 28. "MBUFM28,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x0 27. "MBUFM27,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x0 26. "MBUFM26,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x0 25. "MBUFM25,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x0 24. "MBUFM24,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x0 23. "MBUFM23,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x0 22. "MBUFM22,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x0 21. "MBUFM21,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x0 20. "MBUFM20,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x0 19. "MBUFM19,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x0 18. "MBUFM18,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x0 17. "MBUFM17,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x0 16. "MBUFM16,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x0 15. "MBUFM15,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x0 14. "MBUFM14,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x0 13. "MBUFM13,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x0 12. "MBUFM12,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x0 11. "MBUFM11,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x0 10. "MBUFM10,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x0 9. "MBUFM9,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x0 8. "MBUFM8,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x0 7. "MBUFM7,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x0 6. "MBUFM6,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x0 5. "MBUFM5,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x0 4. "MBUFM4,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x0 3. "MBUFM3,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x0 2. "MBUFM2,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x0 1. "MBUFM1,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x0 0. "MBUFM0,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
line.long 0x4 "MBUFM1,STCU2 MBIST Unrecoverable FM Register 1"
|
|
bitfld.long 0x4 31. "MBUFM63,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x4 30. "MBUFM62,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x4 29. "MBUFM61,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x4 28. "MBUFM60,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x4 27. "MBUFM59,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x4 26. "MBUFM58,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x4 25. "MBUFM57,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x4 24. "MBUFM56,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x4 23. "MBUFM55,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x4 22. "MBUFM54,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x4 21. "MBUFM53,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x4 20. "MBUFM52,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x4 19. "MBUFM51,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x4 18. "MBUFM50,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x4 17. "MBUFM49,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x4 16. "MBUFM48,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x4 15. "MBUFM47,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x4 14. "MBUFM46,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x4 13. "MBUFM45,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x4 12. "MBUFM44,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x4 11. "MBUFM43,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x4 10. "MBUFM42,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x4 9. "MBUFM41,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x4 8. "MBUFM40,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x4 7. "MBUFM39,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x4 6. "MBUFM38,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x4 5. "MBUFM37,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x4 4. "MBUFM36,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x4 3. "MBUFM35,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x4 2. "MBUFM34,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x4 1. "MBUFM33,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x4 0. "MBUFM32,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
line.long 0x8 "MBUFM2,STCU2 MBIST Unrecoverable FM Register 2"
|
|
bitfld.long 0x8 13. "MBUFM77,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x8 12. "MBUFM76,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x8 11. "MBUFM75,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x8 10. "MBUFM74,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x8 9. "MBUFM73,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x8 8. "MBUFM72,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x8 7. "MBUFM71,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x8 6. "MBUFM70,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x8 5. "MBUFM69,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x8 4. "MBUFM68,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x8 3. "MBUFM67,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x8 2. "MBUFM66,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
newline
|
|
bitfld.long 0x8 1. "MBUFM65,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
bitfld.long 0x8 0. "MBUFM64,MBIST Unrecoverable Fault Mapping" "0: Recoverable Fault mapping,1: Unrecoverable Fault mapping"
|
|
repeat 27. (increment 0x0 0x1)(increment 0x0 0x40)
|
|
group.long ($2+0x200)++0x3
|
|
line.long 0x0 "LB_CTRL$1,STCU2 LBIST Control Register"
|
|
bitfld.long 0x0 31. "CSM,Concurrent/sequential mode The next LBIST is scheduled concurrently to the current one if the CSM bit is set to 1; otherwise it is scheduled sequentially to the completion of the current LBIST execution" "0: Sequential mode,1: Concurrent mode"
|
|
hexmask.long.word 0x0 21.--30. 1. "PTR,Next LBIST or MBIST pointer PTR defines the logical pointer to the next LBIST or MBIST to be scheduled"
|
|
newline
|
|
bitfld.long 0x0 16.--18. "SHS,Shift speed SHS defines the shift speed" "0: Shift at full rate (bist_clk),1: Shift at 1/2 rate (bist_clk),2: Shift at 1/3 rate (bist_clk),3: Shift at 1/4 rate (bist_clk),4: Shift at 1/5 rate (bist_clk),5: Shift at 1/6rate (bist_clk),6: Shift at 1/7rate (bist_clk),7: Shift at 1/8 rate (bist_clk)"
|
|
hexmask.long.byte 0x0 12.--15. 1. "SCEN_OFF,Scan enable OFF SCEN_OFF defines the number of clock cycles OFF following the falling transition on the SCEN Scen_off must be programmed to a value >=1"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "SCEN_ON,Scan enable ON SCEN_ON defines the number of clock cycles OFF following the rising transition on the SCEN Scen_on delay register value must be programmed to a value >=1>"
|
|
bitfld.long 0x0 6. "PFT,Past Flush Test The LBIST controller by default applies ies 32 Flush Test patterns" "0: Apply Flush Test Patterns,1: Skip Flush Test Patterns"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--5. 1. "CWS,Capture window size CWS defines the capture window size."
|
|
repeat.end
|
|
repeat 27. (increment 0x0 0x1)(increment 0x0 0x40)
|
|
group.long ($2+0x204)++0x3
|
|
line.long 0x0 "LB_PCS$1,STCU2 LBIST PC Stop Register"
|
|
hexmask.long 0x0 0.--25. 1. "PCS,Pattern counter stop PCS defines the pattern counter stop value."
|
|
repeat.end
|
|
repeat 27. (increment 0x0 0x1)(increment 0x0 0x40)
|
|
group.long ($2+0x220)++0x3
|
|
line.long 0x0 "LB_MISRELSW$1,STCU2 On-Line LBIST MISR Expected Low Register"
|
|
hexmask.long 0x0 0.--31. 1. "MISRESWx,On-Line MISR Expected low Bits This field defines the low part (31..0) of the Expected MISR."
|
|
repeat.end
|
|
repeat 27. (increment 0x0 0x1)(increment 0x0 0x40)
|
|
group.long ($2+0x224)++0x3
|
|
line.long 0x0 "LB_MISREHSW$1,STCU2 On-Line LBIST MISR Expected High Register"
|
|
hexmask.long 0x0 0.--31. 1. "MISRESWx,On-Line MISR Expected high Bits This field defines the high part (63-32) of the Expected MISR."
|
|
repeat.end
|
|
repeat 27. (increment 0x0 0x1)(increment 0x0 0x40)
|
|
rgroup.long ($2+0x228)++0x3
|
|
line.long 0x0 "LB_MISRRLSW$1,STCU2 On-Line LBIST MISR Read Low Register"
|
|
hexmask.long 0x0 0.--31. 1. "MISRRSWx,On-Line MISR Read Low Bin This field is equivalent to the Low Bits (31-0) of the MISR obtained at the end of the On-Line LBIST execution"
|
|
repeat.end
|
|
repeat 27. (increment 0x0 0x1)(increment 0x0 0x40)
|
|
rgroup.long ($2+0x22C)++0x3
|
|
line.long 0x0 "LB_MISRRHSW$1,STCU2 On-Line LBIST MISR Read High Register"
|
|
hexmask.long 0x0 0.--31. 1. "MISRRSWx,On-Line MISR Read High Bits This field is equivalent to the Low Bits (63-32) of the MISR obtained at the end of the On-Line LBIST execution"
|
|
repeat.end
|
|
group.long 0x1200++0x3
|
|
line.long 0x0 "ALGOSEL,STCU2 Algorithm Select Register"
|
|
bitfld.long 0x0 31. "MEMINIT,Memory Initialisation" "0: Algorithm disabled (no initialization),1: Algorithm enabled (will result in initialization)"
|
|
bitfld.long 0x0 13. "BSCCHK,Basic Check" "0: Algorithm disabled,1: Algorithm enabled"
|
|
newline
|
|
bitfld.long 0x0 3. "MCPS,March C+ Single" "0: Algorithm disabled,1: Algorithm enabled"
|
|
group.long 0x120C++0x7
|
|
line.long 0x0 "STGGR,STCU2 MBIST Stagger Register"
|
|
hexmask.long 0x0 0.--31. 1. "STAG,Number of core clock cycles between execution of one BIST and the next one."
|
|
line.long 0x4 "BSTART,STCU2 BIST Start Register"
|
|
bitfld.long 0x4 31. "CLKEN,IPS clock enable enables the IPS clock for the BIST's and deactivates jpg_doze when set" "0: If cleared it disables the clocks and sets..,1: Enables the ips clock for the BIST's and.."
|
|
bitfld.long 0x4 23. "KSTAT,Keep Status" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "BRST,BISTS Reset" "0: Do not reset the BIST,1: Reset the BIST"
|
|
bitfld.long 0x4 0.--2. "BSTART,Program BISTs" "0: NOP (reset value),1: Run BISTs MCT will run the selected BIST's..,?,?,4: Program BISTs only MCT will only program BISTs..,5: Program BISTs and start them.,?,?"
|
|
repeat 78. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x1214)++0x3
|
|
line.long 0x0 "MB_CTRL$1,STCU2 MBIST Control Register"
|
|
bitfld.long 0x0 31. "CSM,Concurrent/sequential mode" "0: Sequential mode,1: Concurrent mode"
|
|
hexmask.long.word 0x0 21.--30. 1. "PTR,NextLBIST or MBIST pointer PTR defines the logical pointer to the next LBIST orMBIST to be scheduled"
|
|
newline
|
|
bitfld.long 0x0 20. "BSEL,BIST Select" "0: Selected BIST is not selected for execution.,1: Selected BIST is selected for execution."
|
|
repeat.end
|
|
tree.end
|
|
tree "STM (System Timer Module)"
|
|
base ad:0x0
|
|
tree "STM_0"
|
|
base ad:0x4000D000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "CR,STM Control Register"
|
|
hexmask.long.byte 0x0 8.--15. 1. "CPS,Counter Prescaler."
|
|
bitfld.long 0x0 1. "FRZ,Freeze." "0: STM counter continues to run in debug mode.,1: STM counter is stopped in debug mode."
|
|
bitfld.long 0x0 0. "TEN,Timer counter Enabled." "0: Counter is disabled.,1: Counter is enabled."
|
|
line.long 0x4 "CNT,STM Count Register"
|
|
hexmask.long 0x4 0.--31. 1. "CNT,Timer count value used as the time base for all channels."
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x10)
|
|
group.long ($2+0x10)++0x3
|
|
line.long 0x0 "CCR$1,STM Channel Control Register"
|
|
bitfld.long 0x0 0. "CEN,Channel Enable" "0: The channel is disabled.,1: The channel is enabled."
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x10)
|
|
group.long ($2+0x14)++0x3
|
|
line.long 0x0 "CIR$1,STM Channel Interrupt Register"
|
|
bitfld.long 0x0 0. "CIF,Channel Interrupt Flag" "0: No interrupt request.,1: Interrupt request due to a match on the channel."
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x10)
|
|
group.long ($2+0x18)++0x3
|
|
line.long 0x0 "CMP$1,STM Channel Compare Register"
|
|
hexmask.long 0x0 0.--31. 1. "CMP,Compare value for channel n."
|
|
repeat.end
|
|
tree.end
|
|
tree "STM_1"
|
|
base ad:0x40087000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "CR,STM Control Register"
|
|
hexmask.long.byte 0x0 8.--15. 1. "CPS,Counter Prescaler."
|
|
bitfld.long 0x0 1. "FRZ,Freeze." "0: STM counter continues to run in debug mode.,1: STM counter is stopped in debug mode."
|
|
bitfld.long 0x0 0. "TEN,Timer counter Enabled." "0: Counter is disabled.,1: Counter is enabled."
|
|
line.long 0x4 "CNT,STM Count Register"
|
|
hexmask.long 0x4 0.--31. 1. "CNT,Timer count value used as the time base for all channels."
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x10)
|
|
group.long ($2+0x10)++0x3
|
|
line.long 0x0 "CCR$1,STM Channel Control Register"
|
|
bitfld.long 0x0 0. "CEN,Channel Enable" "0: The channel is disabled.,1: The channel is enabled."
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x10)
|
|
group.long ($2+0x14)++0x3
|
|
line.long 0x0 "CIR$1,STM Channel Interrupt Register"
|
|
bitfld.long 0x0 0. "CIF,Channel Interrupt Flag" "0: No interrupt request.,1: Interrupt request due to a match on the channel."
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x10)
|
|
group.long ($2+0x18)++0x3
|
|
line.long 0x0 "CMP$1,STM Channel Compare Register"
|
|
hexmask.long 0x0 0.--31. 1. "CMP,Compare value for channel n."
|
|
repeat.end
|
|
tree.end
|
|
tree.end
|
|
tree "SWT (Software Watchdog Timer)"
|
|
base ad:0x0
|
|
tree "SWT0"
|
|
base ad:0x4000A000
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "CR,SWT Control Register"
|
|
bitfld.long 0x0 31. "MAP0,Master Access Protection for Master 0" "0: Access for the master is not enabled,1: Access for the master is enabled"
|
|
bitfld.long 0x0 30. "MAP1,Master Access Protection for Master 1" "0: Access for the master is not enabled,1: Access for the master is enabled"
|
|
newline
|
|
bitfld.long 0x0 29. "MAP2,Master Access Protection for Master 2" "0: Access for the master is not enabled,1: Access for the master is enabled"
|
|
bitfld.long 0x0 28. "MAP3,Master Access Protection for Master 3" "0: Access for the master is not enabled,1: Access for the master is enabled"
|
|
newline
|
|
bitfld.long 0x0 27. "MAP4,Master Access Protection for Master 4" "0: Access for the master is not enabled,1: Access for the master is enabled"
|
|
bitfld.long 0x0 26. "MAP5,Master Access Protection for Master 5" "0: Access for the master is not enabled,1: Access for the master is enabled"
|
|
newline
|
|
bitfld.long 0x0 25. "MAP6,Master Access Protection for Master 6" "0: Access for the master is not enabled,1: Access for the master is enabled"
|
|
bitfld.long 0x0 24. "MAP7,Master Access Protection for Master 7" "0: Access for the master is not enabled,1: Access for the master is enabled"
|
|
newline
|
|
bitfld.long 0x0 9.--10. "SMD,Service Mode" "0: Fixed Service Sequence: The watchdog is serviced..,1: Keyed Service Sequence: The watchdog is serviced..,2: Reserved-do not use. Writing a value can cause..,3: Reserved-do not use. Writing this value can.."
|
|
bitfld.long 0x0 8. "RIA,Reset on Invalid Access" "0: Invalid access to the SWT generates a bus error,1: Invalid access to the SWT causes a reset request.."
|
|
newline
|
|
bitfld.long 0x0 7. "WND,Window Mode" "0: Regular mode: service sequence can be done at..,1: Windowed mode: service sequence is valid only.."
|
|
bitfld.long 0x0 6. "ITR,Interrupt Then Reset Request" "0: Generate a reset request on a time-out,1: Generate an interrupt on an initial time-out;.."
|
|
newline
|
|
bitfld.long 0x0 5. "HLK,Hard Lock" "0: SWT_CR SWT_TO SWT_WN and SWT_SK are read/write..,1: SWT_CR SWT_TO SWT_WN and SWT_SK are read-only.."
|
|
bitfld.long 0x0 4. "SLK,Soft Lock" "0: SWT_CR SWT_TO SWT_WN and SWT_SK are read/write..,1: SWT_CR SWT_TO SWT_WN and SWT_SK are read-only.."
|
|
newline
|
|
bitfld.long 0x0 1. "FRZ,Debug Mode Control" "0: SWT counter continues to run in debug mode,1: SWT counter is stopped in debug mode"
|
|
bitfld.long 0x0 0. "WEN,Watchdog Enabled" "0: SWT is disabled,1: SWT is enabled"
|
|
line.long 0x4 "IR,SWT Interrupt Register"
|
|
bitfld.long 0x4 0. "TIF,Time-out Interrupt Flag" "0: No interrupt request,1: Interrupt request due to an initial time-out"
|
|
line.long 0x8 "TO,SWT Time-out Register"
|
|
hexmask.long 0x8 0.--31. 1. "WTO,Watchdog time-out period in clock cycles"
|
|
line.long 0xC "WN,SWT Window Register"
|
|
hexmask.long 0xC 0.--31. 1. "WST,Window Start Value"
|
|
wgroup.long 0x10++0x3
|
|
line.long 0x0 "SR,SWT Service Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "WSC,Watchdog Service Code"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "CO,SWT Counter Output Register"
|
|
hexmask.long 0x0 0.--31. 1. "CNT,Watchdog Count"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "SK,SWT Service Key Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "SK,Service Key"
|
|
tree.end
|
|
tree "SWT1"
|
|
base ad:0x4000B000
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "CR,SWT Control Register"
|
|
bitfld.long 0x0 31. "MAP0,Master Access Protection for Master 0" "0: Access for the master is not enabled,1: Access for the master is enabled"
|
|
bitfld.long 0x0 30. "MAP1,Master Access Protection for Master 1" "0: Access for the master is not enabled,1: Access for the master is enabled"
|
|
newline
|
|
bitfld.long 0x0 29. "MAP2,Master Access Protection for Master 2" "0: Access for the master is not enabled,1: Access for the master is enabled"
|
|
bitfld.long 0x0 28. "MAP3,Master Access Protection for Master 3" "0: Access for the master is not enabled,1: Access for the master is enabled"
|
|
newline
|
|
bitfld.long 0x0 27. "MAP4,Master Access Protection for Master 4" "0: Access for the master is not enabled,1: Access for the master is enabled"
|
|
bitfld.long 0x0 26. "MAP5,Master Access Protection for Master 5" "0: Access for the master is not enabled,1: Access for the master is enabled"
|
|
newline
|
|
bitfld.long 0x0 25. "MAP6,Master Access Protection for Master 6" "0: Access for the master is not enabled,1: Access for the master is enabled"
|
|
bitfld.long 0x0 24. "MAP7,Master Access Protection for Master 7" "0: Access for the master is not enabled,1: Access for the master is enabled"
|
|
newline
|
|
bitfld.long 0x0 9.--10. "SMD,Service Mode" "0: Fixed Service Sequence: The watchdog is serviced..,1: Keyed Service Sequence: The watchdog is serviced..,2: Reserved-do not use. Writing a value can cause..,3: Reserved-do not use. Writing this value can.."
|
|
bitfld.long 0x0 8. "RIA,Reset on Invalid Access" "0: Invalid access to the SWT generates a bus error,1: Invalid access to the SWT causes a reset request.."
|
|
newline
|
|
bitfld.long 0x0 7. "WND,Window Mode" "0: Regular mode: service sequence can be done at..,1: Windowed mode: service sequence is valid only.."
|
|
bitfld.long 0x0 6. "ITR,Interrupt Then Reset Request" "0: Generate a reset request on a time-out,1: Generate an interrupt on an initial time-out;.."
|
|
newline
|
|
bitfld.long 0x0 5. "HLK,Hard Lock" "0: SWT_CR SWT_TO SWT_WN and SWT_SK are read/write..,1: SWT_CR SWT_TO SWT_WN and SWT_SK are read-only.."
|
|
bitfld.long 0x0 4. "SLK,Soft Lock" "0: SWT_CR SWT_TO SWT_WN and SWT_SK are read/write..,1: SWT_CR SWT_TO SWT_WN and SWT_SK are read-only.."
|
|
newline
|
|
bitfld.long 0x0 1. "FRZ,Debug Mode Control" "0: SWT counter continues to run in debug mode,1: SWT counter is stopped in debug mode"
|
|
bitfld.long 0x0 0. "WEN,Watchdog Enabled" "0: SWT is disabled,1: SWT is enabled"
|
|
line.long 0x4 "IR,SWT Interrupt Register"
|
|
bitfld.long 0x4 0. "TIF,Time-out Interrupt Flag" "0: No interrupt request,1: Interrupt request due to an initial time-out"
|
|
line.long 0x8 "TO,SWT Time-out Register"
|
|
hexmask.long 0x8 0.--31. 1. "WTO,Watchdog time-out period in clock cycles"
|
|
line.long 0xC "WN,SWT Window Register"
|
|
hexmask.long 0xC 0.--31. 1. "WST,Window Start Value"
|
|
wgroup.long 0x10++0x3
|
|
line.long 0x0 "SR,SWT Service Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "WSC,Watchdog Service Code"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "CO,SWT Counter Output Register"
|
|
hexmask.long 0x0 0.--31. 1. "CNT,Watchdog Count"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "SK,SWT Service Key Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "SK,Service Key"
|
|
tree.end
|
|
tree "SWT2"
|
|
base ad:0x40084000
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "CR,SWT Control Register"
|
|
bitfld.long 0x0 31. "MAP0,Master Access Protection for Master 0" "0: Access for the master is not enabled,1: Access for the master is enabled"
|
|
bitfld.long 0x0 30. "MAP1,Master Access Protection for Master 1" "0: Access for the master is not enabled,1: Access for the master is enabled"
|
|
newline
|
|
bitfld.long 0x0 29. "MAP2,Master Access Protection for Master 2" "0: Access for the master is not enabled,1: Access for the master is enabled"
|
|
bitfld.long 0x0 28. "MAP3,Master Access Protection for Master 3" "0: Access for the master is not enabled,1: Access for the master is enabled"
|
|
newline
|
|
bitfld.long 0x0 27. "MAP4,Master Access Protection for Master 4" "0: Access for the master is not enabled,1: Access for the master is enabled"
|
|
bitfld.long 0x0 26. "MAP5,Master Access Protection for Master 5" "0: Access for the master is not enabled,1: Access for the master is enabled"
|
|
newline
|
|
bitfld.long 0x0 25. "MAP6,Master Access Protection for Master 6" "0: Access for the master is not enabled,1: Access for the master is enabled"
|
|
bitfld.long 0x0 24. "MAP7,Master Access Protection for Master 7" "0: Access for the master is not enabled,1: Access for the master is enabled"
|
|
newline
|
|
bitfld.long 0x0 9.--10. "SMD,Service Mode" "0: Fixed Service Sequence: The watchdog is serviced..,1: Keyed Service Sequence: The watchdog is serviced..,2: Reserved-do not use. Writing a value can cause..,3: Reserved-do not use. Writing this value can.."
|
|
bitfld.long 0x0 8. "RIA,Reset on Invalid Access" "0: Invalid access to the SWT generates a bus error,1: Invalid access to the SWT causes a reset request.."
|
|
newline
|
|
bitfld.long 0x0 7. "WND,Window Mode" "0: Regular mode: service sequence can be done at..,1: Windowed mode: service sequence is valid only.."
|
|
bitfld.long 0x0 6. "ITR,Interrupt Then Reset Request" "0: Generate a reset request on a time-out,1: Generate an interrupt on an initial time-out;.."
|
|
newline
|
|
bitfld.long 0x0 5. "HLK,Hard Lock" "0: SWT_CR SWT_TO SWT_WN and SWT_SK are read/write..,1: SWT_CR SWT_TO SWT_WN and SWT_SK are read-only.."
|
|
bitfld.long 0x0 4. "SLK,Soft Lock" "0: SWT_CR SWT_TO SWT_WN and SWT_SK are read/write..,1: SWT_CR SWT_TO SWT_WN and SWT_SK are read-only.."
|
|
newline
|
|
bitfld.long 0x0 1. "FRZ,Debug Mode Control" "0: SWT counter continues to run in debug mode,1: SWT counter is stopped in debug mode"
|
|
bitfld.long 0x0 0. "WEN,Watchdog Enabled" "0: SWT is disabled,1: SWT is enabled"
|
|
line.long 0x4 "IR,SWT Interrupt Register"
|
|
bitfld.long 0x4 0. "TIF,Time-out Interrupt Flag" "0: No interrupt request,1: Interrupt request due to an initial time-out"
|
|
line.long 0x8 "TO,SWT Time-out Register"
|
|
hexmask.long 0x8 0.--31. 1. "WTO,Watchdog time-out period in clock cycles"
|
|
line.long 0xC "WN,SWT Window Register"
|
|
hexmask.long 0xC 0.--31. 1. "WST,Window Start Value"
|
|
wgroup.long 0x10++0x3
|
|
line.long 0x0 "SR,SWT Service Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "WSC,Watchdog Service Code"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "CO,SWT Counter Output Register"
|
|
hexmask.long 0x0 0.--31. 1. "CNT,Watchdog Count"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "SK,SWT Service Key Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "SK,Service Key"
|
|
tree.end
|
|
tree "SWT3"
|
|
base ad:0x40085000
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "CR,SWT Control Register"
|
|
bitfld.long 0x0 31. "MAP0,Master Access Protection for Master 0" "0: Access for the master is not enabled,1: Access for the master is enabled"
|
|
bitfld.long 0x0 30. "MAP1,Master Access Protection for Master 1" "0: Access for the master is not enabled,1: Access for the master is enabled"
|
|
newline
|
|
bitfld.long 0x0 29. "MAP2,Master Access Protection for Master 2" "0: Access for the master is not enabled,1: Access for the master is enabled"
|
|
bitfld.long 0x0 28. "MAP3,Master Access Protection for Master 3" "0: Access for the master is not enabled,1: Access for the master is enabled"
|
|
newline
|
|
bitfld.long 0x0 27. "MAP4,Master Access Protection for Master 4" "0: Access for the master is not enabled,1: Access for the master is enabled"
|
|
bitfld.long 0x0 26. "MAP5,Master Access Protection for Master 5" "0: Access for the master is not enabled,1: Access for the master is enabled"
|
|
newline
|
|
bitfld.long 0x0 25. "MAP6,Master Access Protection for Master 6" "0: Access for the master is not enabled,1: Access for the master is enabled"
|
|
bitfld.long 0x0 24. "MAP7,Master Access Protection for Master 7" "0: Access for the master is not enabled,1: Access for the master is enabled"
|
|
newline
|
|
bitfld.long 0x0 9.--10. "SMD,Service Mode" "0: Fixed Service Sequence: The watchdog is serviced..,1: Keyed Service Sequence: The watchdog is serviced..,2: Reserved-do not use. Writing a value can cause..,3: Reserved-do not use. Writing this value can.."
|
|
bitfld.long 0x0 8. "RIA,Reset on Invalid Access" "0: Invalid access to the SWT generates a bus error,1: Invalid access to the SWT causes a reset request.."
|
|
newline
|
|
bitfld.long 0x0 7. "WND,Window Mode" "0: Regular mode: service sequence can be done at..,1: Windowed mode: service sequence is valid only.."
|
|
bitfld.long 0x0 6. "ITR,Interrupt Then Reset Request" "0: Generate a reset request on a time-out,1: Generate an interrupt on an initial time-out;.."
|
|
newline
|
|
bitfld.long 0x0 5. "HLK,Hard Lock" "0: SWT_CR SWT_TO SWT_WN and SWT_SK are read/write..,1: SWT_CR SWT_TO SWT_WN and SWT_SK are read-only.."
|
|
bitfld.long 0x0 4. "SLK,Soft Lock" "0: SWT_CR SWT_TO SWT_WN and SWT_SK are read/write..,1: SWT_CR SWT_TO SWT_WN and SWT_SK are read-only.."
|
|
newline
|
|
bitfld.long 0x0 1. "FRZ,Debug Mode Control" "0: SWT counter continues to run in debug mode,1: SWT counter is stopped in debug mode"
|
|
bitfld.long 0x0 0. "WEN,Watchdog Enabled" "0: SWT is disabled,1: SWT is enabled"
|
|
line.long 0x4 "IR,SWT Interrupt Register"
|
|
bitfld.long 0x4 0. "TIF,Time-out Interrupt Flag" "0: No interrupt request,1: Interrupt request due to an initial time-out"
|
|
line.long 0x8 "TO,SWT Time-out Register"
|
|
hexmask.long 0x8 0.--31. 1. "WTO,Watchdog time-out period in clock cycles"
|
|
line.long 0xC "WN,SWT Window Register"
|
|
hexmask.long 0xC 0.--31. 1. "WST,Window Start Value"
|
|
wgroup.long 0x10++0x3
|
|
line.long 0x0 "SR,SWT Service Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "WSC,Watchdog Service Code"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "CO,SWT Counter Output Register"
|
|
hexmask.long 0x0 0.--31. 1. "CNT,Watchdog Count"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "SK,SWT Service Key Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "SK,Service Key"
|
|
tree.end
|
|
tree "SWT4"
|
|
base ad:0x40086000
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "CR,SWT Control Register"
|
|
bitfld.long 0x0 31. "MAP0,Master Access Protection for Master 0" "0: Access for the master is not enabled,1: Access for the master is enabled"
|
|
bitfld.long 0x0 30. "MAP1,Master Access Protection for Master 1" "0: Access for the master is not enabled,1: Access for the master is enabled"
|
|
newline
|
|
bitfld.long 0x0 29. "MAP2,Master Access Protection for Master 2" "0: Access for the master is not enabled,1: Access for the master is enabled"
|
|
bitfld.long 0x0 28. "MAP3,Master Access Protection for Master 3" "0: Access for the master is not enabled,1: Access for the master is enabled"
|
|
newline
|
|
bitfld.long 0x0 27. "MAP4,Master Access Protection for Master 4" "0: Access for the master is not enabled,1: Access for the master is enabled"
|
|
bitfld.long 0x0 26. "MAP5,Master Access Protection for Master 5" "0: Access for the master is not enabled,1: Access for the master is enabled"
|
|
newline
|
|
bitfld.long 0x0 25. "MAP6,Master Access Protection for Master 6" "0: Access for the master is not enabled,1: Access for the master is enabled"
|
|
bitfld.long 0x0 24. "MAP7,Master Access Protection for Master 7" "0: Access for the master is not enabled,1: Access for the master is enabled"
|
|
newline
|
|
bitfld.long 0x0 9.--10. "SMD,Service Mode" "0: Fixed Service Sequence: The watchdog is serviced..,1: Keyed Service Sequence: The watchdog is serviced..,2: Reserved-do not use. Writing a value can cause..,3: Reserved-do not use. Writing this value can.."
|
|
bitfld.long 0x0 8. "RIA,Reset on Invalid Access" "0: Invalid access to the SWT generates a bus error,1: Invalid access to the SWT causes a reset request.."
|
|
newline
|
|
bitfld.long 0x0 7. "WND,Window Mode" "0: Regular mode: service sequence can be done at..,1: Windowed mode: service sequence is valid only.."
|
|
bitfld.long 0x0 6. "ITR,Interrupt Then Reset Request" "0: Generate a reset request on a time-out,1: Generate an interrupt on an initial time-out;.."
|
|
newline
|
|
bitfld.long 0x0 5. "HLK,Hard Lock" "0: SWT_CR SWT_TO SWT_WN and SWT_SK are read/write..,1: SWT_CR SWT_TO SWT_WN and SWT_SK are read-only.."
|
|
bitfld.long 0x0 4. "SLK,Soft Lock" "0: SWT_CR SWT_TO SWT_WN and SWT_SK are read/write..,1: SWT_CR SWT_TO SWT_WN and SWT_SK are read-only.."
|
|
newline
|
|
bitfld.long 0x0 1. "FRZ,Debug Mode Control" "0: SWT counter continues to run in debug mode,1: SWT counter is stopped in debug mode"
|
|
bitfld.long 0x0 0. "WEN,Watchdog Enabled" "0: SWT is disabled,1: SWT is enabled"
|
|
line.long 0x4 "IR,SWT Interrupt Register"
|
|
bitfld.long 0x4 0. "TIF,Time-out Interrupt Flag" "0: No interrupt request,1: Interrupt request due to an initial time-out"
|
|
line.long 0x8 "TO,SWT Time-out Register"
|
|
hexmask.long 0x8 0.--31. 1. "WTO,Watchdog time-out period in clock cycles"
|
|
line.long 0xC "WN,SWT Window Register"
|
|
hexmask.long 0xC 0.--31. 1. "WST,Window Start Value"
|
|
wgroup.long 0x10++0x3
|
|
line.long 0x0 "SR,SWT Service Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "WSC,Watchdog Service Code"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "CO,SWT Counter Output Register"
|
|
hexmask.long 0x0 0.--31. 1. "CNT,Watchdog Count"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "SK,SWT Service Key Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "SK,Service Key"
|
|
tree.end
|
|
tree.end
|
|
tree "TMU (Temperature Sensor)"
|
|
base ad:0x400CE000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "MR,Mode Register"
|
|
bitfld.long 0x0 31. "ME,Monitor mode enable." "0: No monitoring. Power saving mode.,1: Monitoring of site enabled."
|
|
bitfld.long 0x0 26.--27. "ALPF,Average low pass filter setting" "0: 1.0,1: 0.5,2: 0.25,3: 0.125"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "MSITE,Monitoring site select. Site 0 is monitored by default."
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "SR,Status Register"
|
|
bitfld.long 0x0 30. "MIE,Monitoring interval exceeded" "0: Monitoring interval not exceeded.,1: Monitoring interval exceeded. The time required.."
|
|
bitfld.long 0x0 29. "ORL,Out-of-range low temperature measurement detected" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "ORH,Out-of-range high temperature measurement detected" "0,1"
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "MTMIR,Monitor Temperature Measurement Interval Register"
|
|
hexmask.long.byte 0x0 0.--3. 1. "TMI,Temperature monitoring interval in seconds"
|
|
group.long 0x20++0x7
|
|
line.long 0x0 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x0 31. "ITTEIE,Immediate temperature threshold exceeded interrupt enable." "0: Disabled.,1: Interrupt enabled. Generate an interrupt if.."
|
|
bitfld.long 0x0 30. "ATTEIE,Average temperature threshold exceeded interrupt enable." "0: Disabled.,1: Interrupt enabled. Generate an interrupt if.."
|
|
newline
|
|
bitfld.long 0x0 29. "ATCTEIE,Average temperature critical threshold exceeded interrupt enable." "0: Disabled.,1: Interrupt enabled. Generate an interrupt if.."
|
|
line.long 0x4 "IDR,Interrupt Detect Register"
|
|
bitfld.long 0x4 31. "ITTE,Immediate temperature threshold exceeded. Write 1 to clear." "0: No threshold exceeded.,1: Immediate temperature threshold as defined by.."
|
|
bitfld.long 0x4 30. "ATTE,Average temperature threshold exceeded. Write 1 to clear." "0: No threshold exceeded.,1: Average temperature threshold as defined by.."
|
|
newline
|
|
bitfld.long 0x4 29. "ATCTE,Average temperature critical threshold exceeded.Write 1 to clear." "0: No threshold exceeded.,1: Average temperature critical threshold as.."
|
|
rgroup.long 0x40++0x7
|
|
line.long 0x0 "MHTCR,Monitor High Temperature Capture Register"
|
|
bitfld.long 0x0 31. "V,Valid reading.(Re-)enabling the TMU will automatically clear this bit and start a new search." "0: Temperature reading is not valid due to no..,1: Temperature reading is valid."
|
|
hexmask.long.byte 0x0 0.--7. 1. "TEMP,Highest temperature recorded in degree Celsius by monitored site"
|
|
line.long 0x4 "MLTCR,Monitor Low Temperature Capture Register"
|
|
bitfld.long 0x4 31. "V,Valid reading.(Re-)enabling the TMU will automatically clear this bit and start a new search." "0: Temperature reading is not valid due to no..,1: Temperature reading is valid."
|
|
hexmask.long.byte 0x4 0.--7. 1. "TEMP,Lowest temperature recorded in degree Celsius by monitored site"
|
|
group.long 0x50++0xB
|
|
line.long 0x0 "MHTITR,Monitor High Temperature Immediate Threshold Register"
|
|
bitfld.long 0x0 31. "EN,Enable threshold." "0: Disabled.,1: Threshold enabled."
|
|
hexmask.long.byte 0x0 0.--7. 1. "TEMP,High temperature immediate threshold value"
|
|
line.long 0x4 "MHTATR,Monitor High Temperature Average Threshold Register"
|
|
bitfld.long 0x4 31. "EN,Enable threshold." "0: Disabled.,1: Threshold enabled."
|
|
hexmask.long.byte 0x4 0.--7. 1. "TEMP,High temperature average threshold value"
|
|
line.long 0x8 "MHTACTR,Monitor High Temperature Average Critical Threshold Register"
|
|
bitfld.long 0x8 31. "EN,Enable threshold." "0: Disabled.,1: Threshold enabled."
|
|
hexmask.long.byte 0x8 0.--7. 1. "TEMP,High temperature average critical threshold value"
|
|
group.long 0x80++0x7
|
|
line.long 0x0 "TCFGR,Temperature Configuration Register"
|
|
bitfld.long 0x0 16.--18. "Data1,Temperature configuration Data1" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x0 0.--3. 1. "Data0,Temperature configuration Data0"
|
|
line.long 0x4 "SCFGR,Sensor Configuration Register"
|
|
hexmask.long.byte 0x4 0.--6. 1. "SENSOR,Sensor value."
|
|
rgroup.long 0x100++0x7
|
|
line.long 0x0 "RITSR,Report Immediate Temperature Site Register"
|
|
bitfld.long 0x0 31. "V,Valid measured temperature." "0: Not valid. Temperature out of sensor range or..,1: Valid."
|
|
hexmask.long.byte 0x0 0.--7. 1. "TEMP,Last temperature reading at monitored site when V=1."
|
|
line.long 0x4 "RATSR,Report Average Temperature Site Register"
|
|
bitfld.long 0x4 31. "V,Valid measured temperature." "0: Not valid. Temperature out of sensor range or..,1: Valid."
|
|
hexmask.long.byte 0x4 0.--7. 1. "TEMP,Average temperature reading at monitored site when V=1."
|
|
group.long 0xF00++0x3
|
|
line.long 0x0 "EUMR,Engineering Use Mode Register"
|
|
bitfld.long 0x0 21.--22. "BG_CAL,Bandgap Calibration" "0: ADC buffer disabled,1: ADC buffer in Offset Calibration mode,2: ADC buffer disabled,3: ADC buffer in Functional mode"
|
|
tree.end
|
|
tree "uSDHC (Secure Digital Host Controller)"
|
|
base ad:0x4005D000
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "S_ADDR,DMA System Address"
|
|
hexmask.long 0x0 2.--31. 1. "DS_ADDR,DMA System Address: This register contains the 32-bit system memory address for a DMA transfer"
|
|
line.long 0x4 "BLK_ATT,Block Attributes"
|
|
hexmask.long.word 0x4 16.--31. 1. "BLKCNT,Blocks Count For Current Transfer: This register is enabled when the Block Count Enable bit in the Transfer Mode register is set to 1 and is valid only for multiple block transfers"
|
|
newline
|
|
hexmask.long.word 0x4 0.--12. 1. "BLKSIZE,Transfer Block Size: This register specifies the block size for block data transfers"
|
|
line.long 0x8 "CMD_ARG,Command Argument"
|
|
hexmask.long 0x8 0.--31. 1. "CMDARG,Command Argument: The SD/MMC Command Argument is specified as bits 39-8 of the Command Format in the SD or MMC Specification"
|
|
line.long 0xC "CMD_XFR_TYP,Command Transfer Type"
|
|
hexmask.long.byte 0xC 24.--29. 1. "CMDINX,Command Index: These bits shall be set to the command number that is specified in bits 45-40 of the Command-Format in the SD Memory Card Physical Layer Specification and SDIO Card Specification"
|
|
newline
|
|
bitfld.long 0xC 22.--23. "CMDTYP,Command Type: There are three types of special commands: Suspend Resume and Abort" "0: Normal Other commands,1: Suspend CMD52 for writing Bus Suspend in CCCR,2: Resume CMD52 for writing Function Select in CCCR,3: Abort CMD12 CMD52 for writing I/O Abort in CCCR"
|
|
newline
|
|
bitfld.long 0xC 21. "DPSEL,Data Present Select: This bit is set to 1 to indicate that data is present and shall be transferred using the DAT line" "0: No Data Present,1: Data Present"
|
|
newline
|
|
bitfld.long 0xC 20. "CICEN,Command Index Check Enable: If this bit is set to 1 the uSDHC will check the Index field in the response to see if it has the same value as the command index" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0xC 19. "CCCEN,Command CRC Check Enable: If this bit is set to 1 the uSDHC shall check the CRC field in the response" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0xC 16.--17. "RSPTYP,Response Type Select:" "0: No Response,1: Response Length 136,2: Response Length 48,3: Response Length 48 check Busy after response"
|
|
rgroup.long 0x10++0xF
|
|
line.long 0x0 "CMD_RSP0,Command Response0"
|
|
hexmask.long 0x0 0.--31. 1. "CMDRSP0,Command Response 0: Refer to Command Response3Command Response3 for the mapping of command responses from the SD Bus to this register for each response type"
|
|
line.long 0x4 "CMD_RSP1,Command Response1"
|
|
hexmask.long 0x4 0.--31. 1. "CMDRSP1,Command Response 1: Refer to Command Response3Command Response3 for the mapping of command responses from the SD Bus to this register for each response type"
|
|
line.long 0x8 "CMD_RSP2,Command Response2"
|
|
hexmask.long 0x8 0.--31. 1. "CMDRSP2,Command Response 2: Refer to Command Response3Command Response3 for the mapping of command responses from the SD Bus to this register for each response type"
|
|
line.long 0xC "CMD_RSP3,Command Response3"
|
|
hexmask.long 0xC 0.--31. 1. "CMDRSP3,Command Response 3: Refer to Command Response3Command Response3 for the mapping of command responses from the SD Bus to this register for each response type"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "DATA_BUFF_ACC_PORT,Data Buffer Access Port"
|
|
hexmask.long 0x0 0.--31. 1. "DATCONT,Data Content: The Buffer Data Port register is for 32-bit data access by the core or the external DMA"
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x0 "PRES_STATE,Present State"
|
|
hexmask.long.byte 0x0 24.--31. 1. "DLSL,DAT[7:0] Line Signal Level: This status is used to check the DAT line level to recover from errors and for debugging"
|
|
newline
|
|
bitfld.long 0x0 23. "CLSL,CMD Line Signal Level: This status is used to check the CMD line level to recover from errors and for debugging" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "WPSPL,Write Protect Switch Pin Level: The Write Protect Switch is supported for memory and combo cards" "0: Write protected (WP=1),1: Write enabled (WP=0)"
|
|
newline
|
|
bitfld.long 0x0 16. "CINST,Card Inserted: This bit indicates whether a card has been inserted" "0: Power on Reset or No Card,1: Card Inserted"
|
|
newline
|
|
bitfld.long 0x0 11. "BREN,Buffer Read Enable: This status bit is used for non-DMA read transfers" "0: Read disable,1: Read enable"
|
|
newline
|
|
bitfld.long 0x0 10. "BWEN,Buffer Write Enable: This status bit is used for non-DMA write transfers" "0: Write disable,1: Write enable"
|
|
newline
|
|
bitfld.long 0x0 9. "RTA,Read Transfer Active: This status bit is used for detecting completion of a read transfer" "0: No valid data,1: Transferring data"
|
|
newline
|
|
bitfld.long 0x0 8. "WTA,Write Transfer Active: This status bit indicates a write transfer is active" "0: No valid data,1: Transferring data"
|
|
newline
|
|
bitfld.long 0x0 7. "SDOFF,SD Clock Gated Off Internally: This status bit indicates that the SD Clock is internally gated off because of buffer over/under-run or read pause without read wait assertion or the driver set FRC_SDCLK_ON bit is 0 to stop the SD clock in idle.." "0: SD Clock is active,1: SD Clock is gated off"
|
|
newline
|
|
bitfld.long 0x0 6. "PEROFF,ipg_perclk Gated Off Internally: This status bit indicates that the ipg_perclk is internally gated off" "0: ipg_perclk is active,1: ipg_perclk is gated off"
|
|
newline
|
|
bitfld.long 0x0 5. "HCKOFF,hclk Gated Off Internally: This status bit indicates that the hclk is internally gated off" "0: hclk is active,1: hclk is gated off"
|
|
newline
|
|
bitfld.long 0x0 4. "BUSOFF,Bus clock Gated Off internally: This status bit indicates that the bus clock is internally gated off" "0: Bus clock is active.,1: Bus clock is gated off."
|
|
newline
|
|
bitfld.long 0x0 3. "SDSTB,SD Clock Stable This status bit indicates that the internal card clock is stable" "0: clock is changing frequency and not stable,1: clock is stable"
|
|
newline
|
|
bitfld.long 0x0 2. "DLA,Data Line Active This status bit indicates whether one of the DAT lines on the SD Bus is in use" "0: DAT Line Inactive,1: DAT Line Active"
|
|
newline
|
|
bitfld.long 0x0 1. "CDIHB,Command Inhibit (DAT): This status bit is generated if either the DAT Line Active or the Read Transfer Active is set to 1" "0: Can issue command which uses the DAT line,1: Cannot issue command which uses the DAT line"
|
|
newline
|
|
bitfld.long 0x0 0. "CIHB,Command Inhibit (CMD): If this status bit is 0 it indicates that the CMD line is not in use and the uSDHC can issue a SD/MMC Command using the CMD line" "0: Can issue command using only CMD line,1: Cannot issue command"
|
|
group.long 0x28++0x17
|
|
line.long 0x0 "PROT_CTRL,Protocol Control"
|
|
bitfld.long 0x0 31. "RD_NO8CLK_EN,Only for debug. enable S/W RD_DONE_NO_8CLK bit" "0: Disable S/W RD_DONE_NO_8CLK uSHDC determines if..,1: S/W RD_DONE_NO_8CLK is enabled"
|
|
newline
|
|
bitfld.long 0x0 30. "NON_EXACT_BLK_RD,Current block read is non-exact block read. It's only used for SDIO." "0: The block read is exact block read. Host driver..,1: The block read is non-exact block read. Host.."
|
|
newline
|
|
bitfld.long 0x0 26. "WECRM,Wakeup Event Enable On SD Card Removal: This bit enables a wakeup event via a Card Removal in the Interrupt Status register" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 25. "WECINS,Wakeup Event Enable On SD Card Insertion: This bit enables a wakeup event via a Card Insertion in the Interrupt Status register" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 24. "WECINT,Wakeup Event Enable On Card Interrupt: This bit enables a wakeup event via a Card Interrupt in the Interrupt Status register" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 21.--23. "RD_WAIT_POINT,Read wait point : This is only for debug purpose" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 20. "RD_DONE_NO_8CLK,Read done no 8 clock: According to the SD/MMC spec for read data transaction 8 clocks are needed after the end bit of the last data block" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "IABG,Interrupt At Block Gap: This bit is valid only in 4-bit mode of the SDIO card and selects a sample point in the interrupt cycle" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 18. "RWCTL,Read Wait Control: The read wait function is optional for SDIO cards" "0: Disable Read Wait Control and stop SD Clock at..,1: Enable Read Wait Control and assert Read Wait.."
|
|
newline
|
|
bitfld.long 0x0 17. "CREQ,Continue Request: This bit is used to restart a transaction which was stopped using the Stop At Block Gap Request" "0: No effect,1: Restart"
|
|
newline
|
|
bitfld.long 0x0 16. "SABGREQ,Stop At Block Gap Request: This bit is used to stop executing a transaction at the next block gap for both DMA and non-DMA transfers" "0: Transfer,1: Stop"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "DMASEL,DMA Select: This field is valid while DMA (SDMA or ADMA) is enabled and selects the DMA operation." "0: No DMA or Simple DMA is selected,1: ADMA1 is selected,2: ADMA2 is selected,?"
|
|
newline
|
|
bitfld.long 0x0 7. "CDSS,Card Detect Signal Selection: This bit selects the source for the card detection." "0: Card Detection Level is selected (for normal..,1: Card Detection Test Level is selected (for test.."
|
|
newline
|
|
bitfld.long 0x0 6. "CDTL,Card Detect Test Level: This is bit is enabled while the Card Detection Signal Selection is set to 1 and it indicates card insertion" "0: Card Detect Test Level is 0 no card inserted,1: Card Detect Test Level is 1 card inserted"
|
|
newline
|
|
bitfld.long 0x0 4.--5. "EMODE,Endian Mode: The uSDHC supports all four endian modes in data transfer" "0: Big Endian Mode,1: Half Word Big Endian Mode,2: Little Endian Mode,?"
|
|
newline
|
|
bitfld.long 0x0 3. "D3CD,DAT3 as Card Detection Pin: If this bit is set DAT3 should be pulled down to act as a card detection pin" "0: DAT3 does not monitor Card Insertion,1: DAT3 as Card Detection Pin"
|
|
newline
|
|
bitfld.long 0x0 1.--2. "DTW,Data Transfer Width: This bit selects the data width of the SD bus for a data transfer" "0: 1-bit mode,1: 4-bit mode,2: 8-bit mode,?"
|
|
newline
|
|
bitfld.long 0x0 0. "LCTL,LED Control: This bit fully controlled by the Host Driver is used to caution the user not to remove the card while the card is being accessed" "0: LED off,1: LED on"
|
|
line.long 0x4 "SYS_CTRL,System Control"
|
|
bitfld.long 0x4 27. "INITA,Initialization Active: When this bit is set 80 SD-Clocks are sent to the card" "0,1"
|
|
newline
|
|
bitfld.long 0x4 26. "RSTD,Software Reset For DAT Line: Only part of the data circuit is reset" "0: No Reset,1: Reset"
|
|
newline
|
|
bitfld.long 0x4 25. "RSTC,Software Reset For CMD Line: Only part of the command circuit is reset" "0: No Reset,1: Reset"
|
|
newline
|
|
bitfld.long 0x4 24. "RSTA,Software Reset For ALL: This reset effects the entire Host Controller except for the card detection circuit" "0: No Reset,1: Reset"
|
|
newline
|
|
bitfld.long 0x4 23. "IPP_RST_N,This register's value will be output to CARD from pad directly for hardware reset of the card if card support this feature" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x4 16.--19. 1. "DTOCV,Data Timeout Counter Value: This value determines the interval by which DAT line timeouts are detected"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--15. 1. "SDCLKFS,SDCLK Frequency Select: This register is used to select the frequency of the SDCLK pin"
|
|
newline
|
|
hexmask.long.byte 0x4 4.--7. 1. "DVS,Divisor: This register is used to provide a more exact divisor to generate the desired SD clock frequency"
|
|
line.long 0x8 "INT_STATUS,Interrupt Status"
|
|
bitfld.long 0x8 28. "DMAE,DMA Error: Occurs when an Internal DMA transfer has failed" "0: No Error,1: Error"
|
|
newline
|
|
bitfld.long 0x8 24. "AC12E,Auto CMD12 Error: Occurs when detecting that one of the bits in the Auto CMD12 Error Status register has changed from 0 to 1" "0: No Error,1: Error"
|
|
newline
|
|
bitfld.long 0x8 22. "DEBE,Data End Bit Error: Occurs either when detecting 0 at the end bit position of read data which uses the DAT line or at the end bit position of the CRC" "0: No Error,1: Error"
|
|
newline
|
|
bitfld.long 0x8 21. "DCE,Data CRC Error: Occurs when detecting a CRC error when transferring read data which uses the DAT line or when detecting the Write CRC status having a value other than 010" "0: No Error,1: Error"
|
|
newline
|
|
bitfld.long 0x8 20. "DTOE,Data Timeout Error: Occurs when detecting one of following time-out conditions" "0: No Error,1: Time out"
|
|
newline
|
|
bitfld.long 0x8 19. "CIE,Command Index Error: Occurs if a Command Index error occurs in the command response." "0: No Error,1: Error"
|
|
newline
|
|
bitfld.long 0x8 18. "CEBE,Command End Bit Error: Occurs when detecting that the end bit of a command response is 0." "0: No Error,1: End Bit Error Generated"
|
|
newline
|
|
bitfld.long 0x8 17. "CCE,Command CRC Error: Command CRC Error is generated in two cases" "0: No Error,1: CRC Error Generated."
|
|
newline
|
|
bitfld.long 0x8 16. "CTOE,Command Timeout Error: Occurs only if no response is returned within 64 SDCLK cycles from the end bit of the command" "0: No Error,1: Time out"
|
|
newline
|
|
bitfld.long 0x8 8. "CINT,Card Interrupt: This status bit is set when an interrupt signal is detected from the external card" "0: No Card Interrupt,1: Generate Card Interrupt"
|
|
newline
|
|
bitfld.long 0x8 7. "CRM,Card Removal: This status bit is set if the Card Inserted bit in the Present State register changes from 1 to 0" "0: Card state unstable or inserted,1: Card removed"
|
|
newline
|
|
bitfld.long 0x8 6. "CINS,Card Insertion: This status bit is set if the Card Inserted bit in the Present State register changes from 0 to 1" "0: Card state unstable or removed,1: Card inserted"
|
|
newline
|
|
bitfld.long 0x8 5. "BRR,Buffer Read Ready: This status bit is set if the Buffer Read Enable bit in the Present State register changes from 0 to 1" "0: Not ready to read buffer,1: Ready to read buffer"
|
|
newline
|
|
bitfld.long 0x8 4. "BWR,Buffer Write Ready: This status bit is set if the Buffer Write Enable bit in the Present State register changes from 0 to 1" "0: Not ready to write buffer,1: Ready to write buffer:"
|
|
newline
|
|
bitfld.long 0x8 3. "DINT,DMA Interrupt: Occurs only when the internal DMA finishes the data transfer successfully" "0: No DMA Interrupt,1: DMA Interrupt is generated"
|
|
newline
|
|
bitfld.long 0x8 2. "BGE,Block Gap Event: If the Stop At Block Gap Request bit in the Protocol Control register is set this bit is set when a read or write transaction is stopped at a block gap" "0: No block gap event,1: Transaction stopped at block gap"
|
|
newline
|
|
bitfld.long 0x8 1. "TC,Transfer Complete: This bit is set when a read or write transfer is completed" "0: Transfer not complete,1: Transfer complete"
|
|
newline
|
|
bitfld.long 0x8 0. "CC,Command Complete: This bit is set when you receive the end bit of the command response (except Auto CMD12)" "0: Command not complete,1: Command complete"
|
|
line.long 0xC "INT_STATUS_EN,Interrupt Status Enable"
|
|
bitfld.long 0xC 28. "DMAESEN,DMA Error Status Enable:" "0: Masked,1: Enabled"
|
|
newline
|
|
bitfld.long 0xC 24. "AC12ESEN,Auto CMD12 Error Status Enable:" "0: Masked,1: Enabled"
|
|
newline
|
|
bitfld.long 0xC 22. "DEBESEN,Data End Bit Error Status Enable:" "0: Masked,1: Enabled"
|
|
newline
|
|
bitfld.long 0xC 21. "DCESEN,Data CRC Error Status Enable:" "0: Masked,1: Enabled"
|
|
newline
|
|
bitfld.long 0xC 20. "DTOESEN,Data Timeout Error Status Enable:" "0: Masked,1: Enabled"
|
|
newline
|
|
bitfld.long 0xC 19. "CIESEN,Command Index Error Status Enable:" "0: Masked,1: Enabled"
|
|
newline
|
|
bitfld.long 0xC 18. "CEBESEN,Command End Bit Error Status Enable:" "0: Masked,1: Enabled"
|
|
newline
|
|
bitfld.long 0xC 17. "CCESEN,Command CRC Error Status Enable:" "0: Masked,1: Enabled"
|
|
newline
|
|
bitfld.long 0xC 16. "CTOESEN,Command Timeout Error Status Enable:" "0: Masked,1: Enabled"
|
|
newline
|
|
bitfld.long 0xC 8. "CINTSEN,Card Interrupt Status Enable: If this bit is set to 0 the uSDHC will clear the interrupt request to the System" "0: Masked,1: Enabled"
|
|
newline
|
|
bitfld.long 0xC 7. "CRMSEN,Card Removal Status Enable:" "0: Masked,1: Enabled"
|
|
newline
|
|
bitfld.long 0xC 6. "CINSSEN,Card Insertion Status Enable:" "0: Masked,1: Enabled"
|
|
newline
|
|
bitfld.long 0xC 5. "BRRSEN,Buffer Read Ready Status Enable:" "0: Masked,1: Enabled"
|
|
newline
|
|
bitfld.long 0xC 4. "BWRSEN,Buffer Write Ready Status Enable:" "0: Masked,1: Enabled"
|
|
newline
|
|
bitfld.long 0xC 3. "DINTSEN,DMA Interrupt Status Enable:" "0: Masked,1: Enabled"
|
|
newline
|
|
bitfld.long 0xC 2. "BGESEN,Block Gap Event Status Enable:" "0: Masked,1: Enabled"
|
|
newline
|
|
bitfld.long 0xC 1. "TCSEN,Transfer Complete Status Enable:" "0: Masked,1: Enabled"
|
|
newline
|
|
bitfld.long 0xC 0. "CCSEN,Command Complete Status Enable: 1 Enabled 0 Masked" "0,1"
|
|
line.long 0x10 "INT_SIGNAL_EN,Interrupt Signal Enable"
|
|
bitfld.long 0x10 28. "DMAEIEN,DMA Error Interrupt Enable:" "0: Masked,1: Enable"
|
|
newline
|
|
bitfld.long 0x10 24. "AC12EIEN,Auto CMD12 Error Interrupt Enable:" "0: Masked,1: Enabled"
|
|
newline
|
|
bitfld.long 0x10 22. "DEBEIEN,Data End Bit Error Interrupt Enable:" "0: Masked,1: Enabled"
|
|
newline
|
|
bitfld.long 0x10 21. "DCEIEN,Data CRC Error Interrupt Enable:" "0: Masked,1: Enabled"
|
|
newline
|
|
bitfld.long 0x10 20. "DTOEIEN,Data Timeout Error Interrupt Enable:" "0: Masked,1: Enabled"
|
|
newline
|
|
bitfld.long 0x10 19. "CIEIEN,Command Index Error Interrupt Enable:" "0: Masked,1: Enabled"
|
|
newline
|
|
bitfld.long 0x10 18. "CEBEIEN,Command End Bit Error Interrupt Enable:" "0: Masked,1: Enabled"
|
|
newline
|
|
bitfld.long 0x10 17. "CCEIEN,Command CRC Error Interrupt Enable:" "0: Masked,1: Enabled"
|
|
newline
|
|
bitfld.long 0x10 16. "CTOEIEN,Command Timeout Error Interrupt Enable" "0: Masked,1: Enabled"
|
|
newline
|
|
bitfld.long 0x10 8. "CINTIEN,Card Interrupt Interrupt Enable:" "0: Masked,1: Enabled"
|
|
newline
|
|
bitfld.long 0x10 7. "CRMIEN,Card Removal Interrupt Enable:" "0: Masked,1: Enabled"
|
|
newline
|
|
bitfld.long 0x10 6. "CINSIEN,Card Insertion Interrupt Enable:" "0: Masked,1: Enabled"
|
|
newline
|
|
bitfld.long 0x10 5. "BRRIEN,Buffer Read Ready Interrupt Enable:" "0: Masked,1: Enabled"
|
|
newline
|
|
bitfld.long 0x10 4. "BWRIEN,Buffer Write Ready Interrupt Enable:" "0: Masked,1: Enabled"
|
|
newline
|
|
bitfld.long 0x10 3. "DINTIEN,DMA Interrupt Enable:" "0: Masked,1: Enabled"
|
|
newline
|
|
bitfld.long 0x10 2. "BGEIEN,Block Gap Event Interrupt Enable:" "0: Masked,1: Enabled"
|
|
newline
|
|
bitfld.long 0x10 1. "TCIEN,Transfer Complete Interrupt Enable:" "0: Masked,1: Enabled"
|
|
newline
|
|
bitfld.long 0x10 0. "CCIEN,Command Complete Interrupt Enable:" "0: Masked,1: Enabled"
|
|
line.long 0x14 "AUTOCMD12_ERR_STATUS,Auto CMD12 Error Status"
|
|
bitfld.long 0x14 22. "EXECUTE_TUNING,Execute Tuning: When std_tuning_en bit is set this bit is used to start tuning procedure" "0,1"
|
|
newline
|
|
rbitfld.long 0x14 7. "CNIBAC12E,Command Not Issued By Auto CMD12 Error: Setting this bit to 1 means CMD_wo_DAT is not executed due to an Auto CMD12 Error (D04-D01) in this register" "0: No error,1: Not Issued"
|
|
newline
|
|
rbitfld.long 0x14 4. "AC12IE,Auto CMD12 Index Error: Occurs if the Command Index error occurs in response to a command." "0: No error,1: Error the CMD index in response is not CMD12"
|
|
newline
|
|
rbitfld.long 0x14 3. "AC12CE,Auto CMD12 CRC Error: Occurs when detecting a CRC error in the command response." "0: No CRC error,1: CRC Error Met in Auto CMD12 Response"
|
|
newline
|
|
rbitfld.long 0x14 2. "AC12EBE,Auto CMD12 End Bit Error: Occurs when detecting that the end bit of command response is 0 which should be 1" "0: No error,1: End Bit Error Generated"
|
|
newline
|
|
rbitfld.long 0x14 1. "AC12TOE,Auto CMD12 Timeout Error: Occurs if no response is returned within 64 SDCLK cycles from the end bit of the command" "0: No error,1: Time out"
|
|
newline
|
|
rbitfld.long 0x14 0. "AC12NE,Auto CMD12 Not Executed: If memory multiple block data transfer is not started due to a command error this bit is not set because it is not necessary to issue an Auto CMD12" "0: Executed,1: Not executed"
|
|
rgroup.long 0x40++0x3
|
|
line.long 0x0 "HOST_CTRL_CAP,Host Controller Capabilities"
|
|
bitfld.long 0x0 26. "VS18,Voltage Support 1.8V: This bit shall depend on the Host System ability." "0: 1.8V not supported,1: 1.8V supported"
|
|
newline
|
|
bitfld.long 0x0 25. "VS30,Voltage Support 3.0V: This bit shall depend on the Host System ability." "0: 3.0V not supported,1: 3.0V supported"
|
|
newline
|
|
bitfld.long 0x0 24. "VS33,Voltage Support 3.3V: This bit shall depend on the Host System ability." "0: 3.3V not supported,1: 3.3V supported"
|
|
newline
|
|
bitfld.long 0x0 23. "SRS,Suspend / Resume Support: This bit indicates whether the uSDHC supports Suspend / Resume functionality" "0: Not supported,1: Supported"
|
|
newline
|
|
bitfld.long 0x0 22. "DMAS,DMA Support: This bit indicates whether the uSDHC is capable of using the internal DMA to transfer data between system memory and the data buffer directly" "0: DMA not supported,1: DMA Supported"
|
|
newline
|
|
bitfld.long 0x0 21. "HSS,High Speed Support: This bit indicates whether the uSDHC supports High Speed mode and the Host System can supply a SD Clock frequency from 25 MHz to 40 MHz" "0: High Speed Not Supported,1: High Speed Supported"
|
|
newline
|
|
bitfld.long 0x0 20. "ADMAS,ADMA Support: This bit indicates whether the uSDHC supports the ADMA feature." "0: Advanced DMA Not supported,1: Advanced DMA Supported"
|
|
newline
|
|
bitfld.long 0x0 16.--18. "MBL,Max Block Length: This value indicates the maximum block size that the Host Driver can read and write to the buffer in the uSDHC" "0: 512 bytes,1: 1024 bytes,2: 2048 bytes,3: 4096 bytes,?,?,?,?"
|
|
group.long 0x44++0x7
|
|
line.long 0x0 "WTMK_LVL,Watermark Level"
|
|
hexmask.long.byte 0x0 24.--28. 1. "WR_BRST_LEN,Write Burst Length: The number of words the uSDHC writes in a single burst"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--23. 1. "WR_WML,Write Watermark Level: The number of words used as the watermark level (FIFO threshold) in a DMA write operation"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--12. 1. "RD_BRST_LEN,Read Burst Length: The number of words the uSDHC reads in a single burst"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "RD_WML,Read Watermark Level: The number of words used as the watermark level (FIFO threshold) in a DMA read operation"
|
|
line.long 0x4 "MIX_CTRL,Mixer Control"
|
|
bitfld.long 0x4 31. "CMD_DMY_EN,Only for debug. It's used to control the number of dummy clock cycles after each command." "0,1"
|
|
newline
|
|
bitfld.long 0x4 30. "CMD_DMY_WAIT_CFG,Only for debug" "0,1"
|
|
newline
|
|
bitfld.long 0x4 29. "AC12_RD_POINT,Only for debug" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "AC23EN,Auto CMD23 Enable When this bit is set to 1 the Host Controller issues a CMD23 automatically before issuing a command specified in the Command Register" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "MSBSEL,Multi / Single Block Select: This bit enables multiple block DAT line data transfers" "0: Single Block,1: Multiple Blocks"
|
|
newline
|
|
bitfld.long 0x4 4. "DTDSEL,Data Transfer Direction Select: This bit defines the direction of DAT line data transfers" "0: Write (Host to Card),1: Read (Card to Host)"
|
|
newline
|
|
bitfld.long 0x4 3. "DDR_EN,Dual Data Rate mode selection" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "AC12EN,Auto CMD12 Enable: Multiple block transfers for memory require a CMD12 to stop the transaction" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x4 1. "BCEN,Block Count Enable: This bit is used to enable the Block Count register which is only relevant for multiple block transfers" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x4 0. "DMAEN,DMA Enable: This bit enables DMA functionality" "0: Disable,1: Enable"
|
|
wgroup.long 0x50++0x3
|
|
line.long 0x0 "FORCE_EVENT,Force Event"
|
|
bitfld.long 0x0 31. "FEVTCINT,Force Event Card Interrupt: Writing 1 to this bit generates a short low-level pulse on the internal DAT[1] line as if a self clearing interrupt was received from the external card" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "FEVTDMAE,Force Event DMA Error: Forces the DMAE bit of Interrupt Status Register to be set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "FEVTAC12E,Force Event Auto Command 12 Error: Forces the AC12E bit of Interrupt Status Register to be set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "FEVTDEBE,Force Event Data End Bit Error: Forces the DEBE bit of Interrupt Status Register to be set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "FEVTDCE,Force Event Data CRC Error: Forces the DCE bit of Interrupt Status Register to be set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20. "FEVTDTOE,Force Event Data Time Out Error: Force the DTOE bit of Interrupt Status Register to be set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "FEVTCIE,Force Event Command Index Error: Forces the CCE bit of Interrupt Status Register to be set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "FEVTCEBE,Force Event Command End Bit Error: Forces the CEBE bit of Interrupt Status Register to be set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "FEVTCCE,Force Event Command CRC Error: Forces the CCE bit of Interrupt Status Register to be set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "FEVTCTOE,Force Event Command Time Out Error: Forces the CTOE bit of Interrupt Status Register to be set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "FEVTCNIBAC12E,Force Event Command Not Executed By Auto Command 12 Error: Forces the CNIBAC12E bit in the Auto Command12 Error Status Register to be set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "FEVTAC12IE,Force Event Auto Command 12 Index Error: Forces the AC12IE bit in the Auto Command12 Error Status Register to be set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "FEVTAC12EBE,Force Event Auto Command 12 End Bit Error: Forces the AC12EBE bit in the Auto Command12 Error Status Register to be set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "FEVTAC12CE,Force Event Auto Command 12 CRC Error: Forces the AC12CE bit in the Auto Command12 Error Status Register to be set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "FEVTAC12TOE,Force Event Auto Command 12 Time Out Error: Forces the AC12TOE bit in the Auto Command12 Error Status Register to be set" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "FEVTAC12NE,Force Event Auto Command 12 Not Executed: Forces the AC12NE bit in the Auto Command12 Error Status Register to be set" "0,1"
|
|
rgroup.long 0x54++0x3
|
|
line.long 0x0 "ADMA_ERR_STATUS,ADMA Error Status Register"
|
|
bitfld.long 0x0 3. "ADMADCE,ADMA Descritor Error: This error occurs when invalid descriptor fetched by ADMA:" "0: No Error,1: Error"
|
|
newline
|
|
bitfld.long 0x0 2. "ADMALME,ADMA Length Mismatch Error: This error occurs in the following 2 cases: While the Block Count Enable is being set the total data length specified by the Descriptor table is different from that specified by the Block Count and Block Length Total.." "0: No Error,1: Error"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "ADMAES,ADMA Error State (when ADMA Error is occurred" "0,1,2,3"
|
|
group.long 0x58++0x3
|
|
line.long 0x0 "ADMA_SYS_ADDR,ADMA System Address"
|
|
hexmask.long 0x0 2.--31. 1. "ADS_ADDR,ADMA System Address: This register holds the word address of the executing command in the Descriptor table"
|
|
group.long 0xC0++0xB
|
|
line.long 0x0 "VEND_SPEC,Vendor Specific Register"
|
|
bitfld.long 0x0 29. "AC12_RD_CHKBUSY_EN,Only for debug. Auto CMD12 to terminate multi-block read needs to check busy or not" "0: Auto CMD12 to terminate multi-block read doesn't..,1: Auto CMD12 to terminate multi-block read needs.."
|
|
newline
|
|
bitfld.long 0x0 28. "CMD_OE_PRE_EN,Only for debug. Control the assert point of CMD_OE signal" "0: CMD_OE and CMD_O assert at the same time,1: CMD_OE asserts one clock cycle before CMD_O"
|
|
newline
|
|
hexmask.long.byte 0x0 24.--27. 1. "DBG_SEL,Debug Select Select the internal sub-module to show its internal state value."
|
|
newline
|
|
hexmask.long.byte 0x0 16.--23. 1. "INT_ST_VAL,Internal State Value Internal state value reflecting the corresponding state value selected by Debug Select field"
|
|
newline
|
|
bitfld.long 0x0 15. "CRC_CHK_DIS,CRC check disable" "0: check CRC16 for every read data packet and check..,1: ignore CRC16 check for every read data packet.."
|
|
newline
|
|
rbitfld.long 0x0 14. "CARD_CLK_SOFT_EN,card clock software enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "IPG_PERCLK_SOFT_EN,ipg_perclk software enable" "0: gate off the ipg_perclk,1: enable the ipg_perclk"
|
|
newline
|
|
bitfld.long 0x0 12. "HCLK_SOFT_EN,Please note hardware auto-enables the AHB clock when the internal DMA is enabled even if HCLK_SOFT_EN is 0" "0: gate off the AHB clock.,1: enable the AHB clock."
|
|
newline
|
|
bitfld.long 0x0 11. "BUS_CLK_SOFT_EN,Bus clock software enable" "0: Gate off the bus clock.,1: Enable the bus clock."
|
|
newline
|
|
bitfld.long 0x0 9. "AC12_ISNOT_ABORT,This bit only uses for debugging. Auto CMD12 is not a abort command:" "0: Hardware treats the Auto CMD12 as abort command,1: Hardwae doesn't treat the Auto CMD12 as abort.."
|
|
newline
|
|
bitfld.long 0x0 8. "FRC_SDCLK_ON,Force CLK output active:" "0: CLK active or inactive is fully controlled by..,1: force CLK active"
|
|
newline
|
|
bitfld.long 0x0 7. "CLKONJ_IN_ABORT,This bit only uses for debugging. Force CLK output active when sending Abort command:" "0: the CLK output is active when sending abort..,1: the CLK output is inactive when sending abort.."
|
|
newline
|
|
bitfld.long 0x0 6. "WP_POL,This bit only uses for debugging. Polarity of the WP pin:" "0: WP pin is high active,1: WP pin is low active"
|
|
newline
|
|
bitfld.long 0x0 5. "CD_POL,This bit only uses for debugging. Polarity of the CD pin:" "0: CD pin is low active,1: CD pin is high active"
|
|
newline
|
|
bitfld.long 0x0 4. "DAT3_CD_POL,This bit only uses for debugging. Polarity of Dat3 pin when it's used as card detection:" "0: card detected when DAT3 is high,1: card detected when DAT3 is low"
|
|
newline
|
|
bitfld.long 0x0 3. "AC12_WR_CHKBUSY_EN,Check busy enable after auto CMD12 for write data packet" "0: Not check busy after auto CMD12 for write data..,1: Check busy after auto CMD12 for write data packet"
|
|
newline
|
|
bitfld.long 0x0 2. "CONFLICT_CHK_EN,It's not implemented in uSDHC IP. Conflict check enable." "0: conflict check disable,1: conflict check enable"
|
|
newline
|
|
bitfld.long 0x0 1. "VSELECT,Voltage Selection Change the value of output signal VSELECT to control the voltage on pads for external card" "0: Change the voltage to high voltage range around..,1: Change the voltage to low voltage range around.."
|
|
newline
|
|
bitfld.long 0x0 0. "EXT_DMA_EN,External DMA Request Enable Enable the request to external DMA" "0: In any scenario uSDHC does not send out external..,1: When internal DMA is not active the external DMA.."
|
|
line.long 0x4 "MMC_BOOT,MMC Boot Register"
|
|
hexmask.long.word 0x4 16.--31. 1. "BOOT_BLK_CNT,The value defines the Stop At Block Gap value of automatic mode"
|
|
newline
|
|
bitfld.long 0x4 8. "DISABLE_TIME_OUT,Please note when this bit is set there is no timeout check no matter boot_en is set or not" "0: enable time out,1: Disable time out"
|
|
newline
|
|
bitfld.long 0x4 7. "AUTO_SABG_EN,When boot enable auto stop at block gap function" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "BOOT_EN,Boot mode enable 0: fast boot disable 1: fast boot enable" "0: fast boot disable,1: fast boot enable"
|
|
newline
|
|
bitfld.long 0x4 5. "BOOT_MODE,Boot mode select 0: normal boot 1: alternative boot" "0: normal boot,1: alternative boot"
|
|
newline
|
|
bitfld.long 0x4 4. "BOOT_ACK,Boot ack mode select 0: no ack 1: ack" "0: no ack,1: ack"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--3. 1. "DTOCV_ACK,Boot ACK time out counter value."
|
|
line.long 0x8 "VEND_SPEC2,Vendor Specific 2 Register"
|
|
bitfld.long 0x8 7. "CARD_INT_AUTO_CLR_DIS,Disable the feature to clear the Card interrupt status bit when Card Interrupt status enable bit is cleared" "0: Card interrupt status bit(CINT) can be cleared..,1: Card interrupt status bit(CINT) can only be.."
|
|
newline
|
|
bitfld.long 0x8 3. "CARD_INT_D3_TEST,Card interrupt detection test. This bit only uses for debugging." "0: Check the card interrupt only when DAT[3] is high.,1: Check the card interrupt by ignoring the status.."
|
|
rgroup.long 0xFC++0x3
|
|
line.long 0x0 "HOST_CTRL_VER,Host Controller Version"
|
|
hexmask.long.byte 0x0 8.--15. 1. "VVN,Vendor Version Number: These status bits are reserved for the vendor version number"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "SVN,Specification Version Number: These status bits indicate the Host Controller Specification Version."
|
|
tree.end
|
|
tree "VIULite (Video-In-Lite)"
|
|
base ad:0x0
|
|
tree "VIULite_0"
|
|
base ad:0x40064000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "SCR,Status And Control Register"
|
|
rbitfld.long 0x0 30. "VSYNC,Vertical sync status." "0,1"
|
|
rbitfld.long 0x0 29. "HSYNC,Horizontal sync status." "0,1"
|
|
newline
|
|
rbitfld.long 0x0 28. "FIELD_NO,Field number extracted from ITU-656 stream." "0,1"
|
|
bitfld.long 0x0 27. "DMA_ACT,DMA transfer of current field/frame is busy (write by software cleared at end of transfer)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "ITU_MODE,ITU mode indicator." "0: Input data stream is parallel format,1: Input data stream is ITU-R BT.656 format"
|
|
bitfld.long 0x0 11.--12. "CPP,Clock cycles per pixel." "0: 1 cycle per pixel,1: 2 cycles per pixel,2: 3 cycles per pixel,?"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "INPUT_WIDTH,Width of input video data." "0: 8-bit wide,1: 10-bit wide,2: 12-bit wide,3: 14-bit wide,4: 16-bit wide,?,6: 20-bit wide,?"
|
|
bitfld.long 0x0 6. "PCLK_POL,Pixel clock polarity control bit. pix_clk will be reversed when the bit is set." "0: Active high,1: Active low"
|
|
newline
|
|
bitfld.long 0x0 5. "VSYNC_POL,Vsync polarity control bit. Vsync will be reversed when the bit is set." "0: Active high,1: Active low"
|
|
bitfld.long 0x0 4. "HSYNC_POL,Hsync polarity control bit. Hsync will be reversed when the bit is set." "0: Active high,1: Active low"
|
|
newline
|
|
bitfld.long 0x0 2. "ECC_EN,When this bit is set ECC errors generate ERROR_IRQ and the nature of ECC error gets reflected on the ERROR_CODE bit field" "0,1"
|
|
bitfld.long 0x0 1. "LENDIAN,Data endian control bit." "0: Big endian,1: Little endian"
|
|
newline
|
|
bitfld.long 0x0 0. "SOFT_RESET,Writing 1 to this bit generates an internal reset to all components except NON-STATUS registers in the VIU block" "0,1"
|
|
line.long 0x4 "INTR,Interrupt Register"
|
|
hexmask.long.byte 0x4 28.--31. 1. "ERROR_CODE,Error code. Signals errors that triggered error IRQ. Other values not given are reserved."
|
|
bitfld.long 0x4 23. "FRAME_END_IRQ,A field/frame transfer over interrupt status bit. Write '1' to clear FRAME_END_IRQ." "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "LINE_END_IRQ,Line transfer over interrupt status bit. Write '1' to clear LINE_END_IRQ." "0,1"
|
|
bitfld.long 0x4 21. "ERROR_IRQ,Error interrupt status bit. Write '1' to clear ERROR_IRQ." "0,1"
|
|
newline
|
|
bitfld.long 0x4 20. "DMA_END_IRQ,One DMA transfer over interrupt status bit" "0,1"
|
|
bitfld.long 0x4 19. "VSTART_IRQ,An active field/frame start interrupt status bit. Write '1' to clear VSTART_IRQ." "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "HSYNC_IRQ,An active line end interrupt status bit. Write '1' to clear HSYNC_IRQ." "0,1"
|
|
bitfld.long 0x4 17. "VSYNC_IRQ,An active field/frame end interrupt status bit. Write '1' to clear VSYNC_IRQ." "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "FIELD_IRQ,Field indicator interrupt status bit. Write '1' to clear FIELD_IRQ." "0,1"
|
|
bitfld.long 0x4 7. "FRAME_END_EN,Interrupt enable bit for FRAME_END_IRQ." "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "LINE_END_EN,Interrupt enable bit for LINE_END_IRQ." "0,1"
|
|
bitfld.long 0x4 5. "ERROR_EN,Interrupt enable bit for ERROR_IRQ." "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "DMA_END_EN,Interrupt enable bit for DMA_END_IRQ." "0,1"
|
|
bitfld.long 0x4 3. "VSTART_EN,Interrupt enable bit for VSTART_IRQ." "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "HSYNC_EN,Interrupt enable bit for HSYNC_IRQ." "0,1"
|
|
bitfld.long 0x4 1. "VSYNC_EN,Interrupt enable bit for VSYNC_IRQ." "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "FIELD_EN,Interrupt enablt bit for FIELD_IRQ." "0,1"
|
|
rgroup.long 0x8++0x7
|
|
line.long 0x0 "DINVSZ,Detected Input Video Pixel and Line Count"
|
|
hexmask.long.word 0x0 16.--31. 1. "DETECTED_LINEC,Detected number of active lines in each input video field/frame."
|
|
hexmask.long.word 0x0 0.--15. 1. "DETECTED_PIX_ELC,Detected number of active pixels in each input video line."
|
|
line.long 0x4 "DINVFL,Detected Input Video Frame Length"
|
|
hexmask.long.word 0x4 16.--31. 1. "DETECTED_FRAME_HEIGHT,Detected number of total lines of each input video field/frame."
|
|
hexmask.long.word 0x4 0.--15. 1. "DETECTED_FRAME_WIDTH,Detected number of clock cycles of each input video line."
|
|
group.long 0x10++0xF
|
|
line.long 0x0 "DMA_SIZE,DMA Size Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "DMA_SIZE,DMA size register"
|
|
line.long 0x4 "DMA_ADDR,Base Address Of Every Field/Frame Of Picture In Memory"
|
|
hexmask.long 0x4 3.--31. 1. "ADDR,Base address of every field of picture in memory used by DMA"
|
|
line.long 0x8 "DMA_INC,Horizontal DMA Increment"
|
|
hexmask.long.word 0x8 3.--15. 1. "INC,This field is the increment added at the end of each line to the current destination address of the DMA"
|
|
line.long 0xC "INVSZ,Input Video Pixel and Line Count"
|
|
hexmask.long.word 0xC 16.--31. 1. "LINEC,Expected number of active lines in each input video field/frame"
|
|
hexmask.long.word 0xC 0.--15. 1. "PIXELC,Expected number of active pixels in each input video line it shall be an integer multiple of 4"
|
|
group.long 0x24++0xB
|
|
line.long 0x0 "ALPHA,Programable Alpha Value"
|
|
hexmask.long.byte 0x0 0.--7. 1. "ALPHA,Alpha value used for picture blending"
|
|
line.long 0x4 "ACT_ORG,Active Image Original Coordinate"
|
|
hexmask.long.word 0x4 16.--31. 1. "ACT_ORG_Y,Active image original Y-coordinate value for clipping."
|
|
hexmask.long.word 0x4 0.--15. 1. "ACT_ORG_X,Active image original X-coordinate value for clipping."
|
|
line.long 0x8 "ACT_SIZE,Active Image Size"
|
|
hexmask.long.word 0x8 16.--31. 1. "ACT_IMG_HEIGHT,Active image height for clipping. Value '0' means no image clipping on Y direction."
|
|
hexmask.long.word 0x8 0.--15. 1. "ACT_IMG_WIDTH,Active image width for clipping. Value '0' means no image clipping on X direction."
|
|
tree.end
|
|
tree "VIULite_1"
|
|
base ad:0x400D0000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "SCR,Status And Control Register"
|
|
rbitfld.long 0x0 30. "VSYNC,Vertical sync status." "0,1"
|
|
rbitfld.long 0x0 29. "HSYNC,Horizontal sync status." "0,1"
|
|
newline
|
|
rbitfld.long 0x0 28. "FIELD_NO,Field number extracted from ITU-656 stream." "0,1"
|
|
bitfld.long 0x0 27. "DMA_ACT,DMA transfer of current field/frame is busy (write by software cleared at end of transfer)" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "ITU_MODE,ITU mode indicator." "0: Input data stream is parallel format,1: Input data stream is ITU-R BT.656 format"
|
|
bitfld.long 0x0 11.--12. "CPP,Clock cycles per pixel." "0: 1 cycle per pixel,1: 2 cycles per pixel,2: 3 cycles per pixel,?"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "INPUT_WIDTH,Width of input video data." "0: 8-bit wide,1: 10-bit wide,2: 12-bit wide,3: 14-bit wide,4: 16-bit wide,?,6: 20-bit wide,?"
|
|
bitfld.long 0x0 6. "PCLK_POL,Pixel clock polarity control bit. pix_clk will be reversed when the bit is set." "0: Active high,1: Active low"
|
|
newline
|
|
bitfld.long 0x0 5. "VSYNC_POL,Vsync polarity control bit. Vsync will be reversed when the bit is set." "0: Active high,1: Active low"
|
|
bitfld.long 0x0 4. "HSYNC_POL,Hsync polarity control bit. Hsync will be reversed when the bit is set." "0: Active high,1: Active low"
|
|
newline
|
|
bitfld.long 0x0 2. "ECC_EN,When this bit is set ECC errors generate ERROR_IRQ and the nature of ECC error gets reflected on the ERROR_CODE bit field" "0,1"
|
|
bitfld.long 0x0 1. "LENDIAN,Data endian control bit." "0: Big endian,1: Little endian"
|
|
newline
|
|
bitfld.long 0x0 0. "SOFT_RESET,Writing 1 to this bit generates an internal reset to all components except NON-STATUS registers in the VIU block" "0,1"
|
|
line.long 0x4 "INTR,Interrupt Register"
|
|
hexmask.long.byte 0x4 28.--31. 1. "ERROR_CODE,Error code. Signals errors that triggered error IRQ. Other values not given are reserved."
|
|
bitfld.long 0x4 23. "FRAME_END_IRQ,A field/frame transfer over interrupt status bit. Write '1' to clear FRAME_END_IRQ." "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "LINE_END_IRQ,Line transfer over interrupt status bit. Write '1' to clear LINE_END_IRQ." "0,1"
|
|
bitfld.long 0x4 21. "ERROR_IRQ,Error interrupt status bit. Write '1' to clear ERROR_IRQ." "0,1"
|
|
newline
|
|
bitfld.long 0x4 20. "DMA_END_IRQ,One DMA transfer over interrupt status bit" "0,1"
|
|
bitfld.long 0x4 19. "VSTART_IRQ,An active field/frame start interrupt status bit. Write '1' to clear VSTART_IRQ." "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "HSYNC_IRQ,An active line end interrupt status bit. Write '1' to clear HSYNC_IRQ." "0,1"
|
|
bitfld.long 0x4 17. "VSYNC_IRQ,An active field/frame end interrupt status bit. Write '1' to clear VSYNC_IRQ." "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "FIELD_IRQ,Field indicator interrupt status bit. Write '1' to clear FIELD_IRQ." "0,1"
|
|
bitfld.long 0x4 7. "FRAME_END_EN,Interrupt enable bit for FRAME_END_IRQ." "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "LINE_END_EN,Interrupt enable bit for LINE_END_IRQ." "0,1"
|
|
bitfld.long 0x4 5. "ERROR_EN,Interrupt enable bit for ERROR_IRQ." "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "DMA_END_EN,Interrupt enable bit for DMA_END_IRQ." "0,1"
|
|
bitfld.long 0x4 3. "VSTART_EN,Interrupt enable bit for VSTART_IRQ." "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "HSYNC_EN,Interrupt enable bit for HSYNC_IRQ." "0,1"
|
|
bitfld.long 0x4 1. "VSYNC_EN,Interrupt enable bit for VSYNC_IRQ." "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "FIELD_EN,Interrupt enablt bit for FIELD_IRQ." "0,1"
|
|
rgroup.long 0x8++0x7
|
|
line.long 0x0 "DINVSZ,Detected Input Video Pixel and Line Count"
|
|
hexmask.long.word 0x0 16.--31. 1. "DETECTED_LINEC,Detected number of active lines in each input video field/frame."
|
|
hexmask.long.word 0x0 0.--15. 1. "DETECTED_PIX_ELC,Detected number of active pixels in each input video line."
|
|
line.long 0x4 "DINVFL,Detected Input Video Frame Length"
|
|
hexmask.long.word 0x4 16.--31. 1. "DETECTED_FRAME_HEIGHT,Detected number of total lines of each input video field/frame."
|
|
hexmask.long.word 0x4 0.--15. 1. "DETECTED_FRAME_WIDTH,Detected number of clock cycles of each input video line."
|
|
group.long 0x10++0xF
|
|
line.long 0x0 "DMA_SIZE,DMA Size Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "DMA_SIZE,DMA size register"
|
|
line.long 0x4 "DMA_ADDR,Base Address Of Every Field/Frame Of Picture In Memory"
|
|
hexmask.long 0x4 3.--31. 1. "ADDR,Base address of every field of picture in memory used by DMA"
|
|
line.long 0x8 "DMA_INC,Horizontal DMA Increment"
|
|
hexmask.long.word 0x8 3.--15. 1. "INC,This field is the increment added at the end of each line to the current destination address of the DMA"
|
|
line.long 0xC "INVSZ,Input Video Pixel and Line Count"
|
|
hexmask.long.word 0xC 16.--31. 1. "LINEC,Expected number of active lines in each input video field/frame"
|
|
hexmask.long.word 0xC 0.--15. 1. "PIXELC,Expected number of active pixels in each input video line it shall be an integer multiple of 4"
|
|
group.long 0x24++0xB
|
|
line.long 0x0 "ALPHA,Programable Alpha Value"
|
|
hexmask.long.byte 0x0 0.--7. 1. "ALPHA,Alpha value used for picture blending"
|
|
line.long 0x4 "ACT_ORG,Active Image Original Coordinate"
|
|
hexmask.long.word 0x4 16.--31. 1. "ACT_ORG_Y,Active image original Y-coordinate value for clipping."
|
|
hexmask.long.word 0x4 0.--15. 1. "ACT_ORG_X,Active image original X-coordinate value for clipping."
|
|
line.long 0x8 "ACT_SIZE,Active Image Size"
|
|
hexmask.long.word 0x8 16.--31. 1. "ACT_IMG_HEIGHT,Active image height for clipping. Value '0' means no image clipping on Y direction."
|
|
hexmask.long.word 0x8 0.--15. 1. "ACT_IMG_WIDTH,Active image width for clipping. Value '0' means no image clipping on X direction."
|
|
tree.end
|
|
tree.end
|
|
tree "VSEQ (Vision Sequencer)"
|
|
base ad:0x0
|
|
tree "VSEQ_CTRL_BLK (VSEQ Control Block)"
|
|
base ad:0x7C021000
|
|
group.long 0x0++0x27
|
|
line.long 0x0 "CLKRST,Clock and Reset control register"
|
|
bitfld.long 0x0 17. "CM0p_CLK_EN,Sequencer core clock enable" "0: Cortex-M0+ clock disabled,1: Cortex-M0+ clock enabled"
|
|
newline
|
|
bitfld.long 0x0 1. "CM0p_RESET,Sequencer core reset" "0: Sequencer core in normal operation state,1: Sequencer core in Reset state"
|
|
newline
|
|
bitfld.long 0x0 0. "SEQ_INT_RESET,Sequencer internal logic reset" "0: Internal peripherals in normal operation state,1: Internal peripherals in Reset state"
|
|
line.long 0x4 "MSGCTRL,Messaging control and status register"
|
|
bitfld.long 0x4 17. "INBOUND_MSG_ACKED,Sequencer inbound message interrupt acknowledge (IRQ to Host)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "INBOUND_MSG_RDY,Sequencer inbound message ready (IRQ to Cortex-M0+)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "OUTBOUND_MSG_ACKED,Sequencer outbound message interrupt acknowledge (IRQ to Cortex-M0+)" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "OUTBOUND_MSG_RDY,Sequencer outbound message ready (IRQ to Host)" "0,1"
|
|
line.long 0x8 "OUTMSG_ADDR,Sequencer outbound message addres/offset"
|
|
hexmask.long 0x8 0.--31. 1. "OUTBOUND_MSG_ADDR,Sequencer core to Host CPU outbound message address/offset"
|
|
line.long 0xC "OUTMSG_LEN,Sequencer outbound message length"
|
|
hexmask.long.word 0xC 0.--11. 1. "OUTBOUND_MSG_LEN,Sequencer outbound message length"
|
|
line.long 0x10 "INMSG_ADDR,Sequencer inbound message address/offset"
|
|
hexmask.long 0x10 0.--31. 1. "INBOUND_MSG_ADDR,Sequencer Inbound message address/offset"
|
|
line.long 0x14 "INMSG_LEN,Sequencer inbound message length"
|
|
hexmask.long.word 0x14 0.--11. 1. "INBOUND_MSG_LEN,Sequencer Inbound message address offset"
|
|
line.long 0x18 "ERRSTAT,Internal error status register"
|
|
bitfld.long 0x18 16. "SEQ_MEM_PERR,CRAM/PRAM Parity error status bit" "0,1"
|
|
newline
|
|
bitfld.long 0x18 1. "INBOUND_MSG_CFG_ERR,Inbound message configuration error" "0,1"
|
|
newline
|
|
bitfld.long 0x18 0. "OUTBOUND_MSG_CFG_ERR,Outbound message configuration error" "0,1"
|
|
line.long 0x1C "SEQ_CORE_IRQ_EN,Sequencer (Cortex-M0+) interrupts enable register"
|
|
bitfld.long 0x1C 8. "FDMA_ERR_IRQ_EN,FastDMA Error interrupt enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x1C 7. "SW_EVT_DONE_IRQ_EN,Software Event Done interrupt enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x1C 6. "OTHR_EVT_DONE_IRQ_EN,OTHER Event Counter DONE interrupt enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x1C 5. "IPUV_EVT_DONE_IRQ_EN,IPUV Event Counter DONE interrupt enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x1C 4. "IPUS_EVT_DONE_IRQ_EN,IPUS Event Counter DONE interrupt enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x1C 3. "OUTMSG_ACK_IRQ_EN,Outbound Message Acknowledged Interrupt enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x1C 2. "INMSG_RDY_IRQ_EN,Inbound Message Ready Interrupt enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x1C 1. "IDMA_DONE_IRQ_EN,Sequencer Internal-DMA Transfer Done interrupt enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x1C 0. "SEQ_INT_ERR_IRQ_EN,Sequencer internal error interrupt enable" "0: Disable,1: Enable"
|
|
line.long 0x20 "HOST_IRQ_EN,Host interrupts enable register"
|
|
hexmask.long.byte 0x20 16.--23. 1. "SW_EVT_TRIG_EN,Software Events Trigger (interrupt) enable"
|
|
newline
|
|
bitfld.long 0x20 8. "SEQ_MEM_PERR_IRQ_EN,Parity Error interrupt enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x20 6. "OTHR_EVT_DONE_IRQ_EN,OTHER Event Counter DONE interrupt enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x20 5. "IPUV_EVT_DONE_IRQ_EN,IPUV Event Counter DONE interrupt enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x20 4. "IPUS_EVT_DONE_IRQ_EN,IPUS Event Counter DONE interrupt enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x20 3. "INMSG_ACK_IRQ_EN,Inbound Message Acknowledged Interrupt enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x20 2. "OUTMSG_RDY_IRQ_EN,Outbound Message Ready Interrupt enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x20 1. "IDMA_DONE_IRQ_EN,Sequencer Internal-DMA Transfer Done Interrupt enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x20 0. "SEQ_INT_ERR_IRQ_EN,Sequencer internal error interrupt enable" "0: Disable,1: Enable"
|
|
line.long 0x24 "PTYCTRL,AHB Master priority control register"
|
|
bitfld.long 0x24 0. "XBAR_PTY,Crossbar AHB-master priority control" "0: Fixed Priority (default). Priority order is:..,1: Round-Robin. Arbitration order is: Cortex-M0+.."
|
|
tree.end
|
|
tree "VSEQ_EVT_CTRL (Event Controller Block)"
|
|
base ad:0x7C022000
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "DONE_ENGN_TYPE,Done Event Status of various types of Engines"
|
|
bitfld.long 0x0 2. "DONE_OTHR_ENGN,Done status of Other/Misc. engines" "0,1"
|
|
bitfld.long 0x0 1. "DONE_IPUV_ENGN,Done status of IPUV engines" "0,1"
|
|
bitfld.long 0x0 0. "DONE_IPUS_ENGN,Done status of IPUS engines" "0,1"
|
|
group.long 0x4++0xB
|
|
line.long 0x0 "IPUS_CNTR_MAX_VAL,Maximum value of IPUS Event counters"
|
|
hexmask.long.byte 0x0 0.--3. 1. "IPUS_CNTR_MAX_VAL,Maximum value of IPUS Event counters"
|
|
line.long 0x4 "IPUS_CNTR_CLREVT_ENC,'Clear event' command Register for binary encoded IPUS Event counter"
|
|
hexmask.long.byte 0x4 0.--5. 1. "IPUS_CNTR_CLREVT_ENC,'Clear event' command for binary encoded IPUS Event counter"
|
|
line.long 0x8 "IPUS_CNTR_CLREVT,'Clear event' command Register for bit-selected IPUS Event counters"
|
|
hexmask.long.byte 0x8 0.--7. 1. "IPUS_CNTR_CLREVT,'Clear event' command for bit-selected IPUS Event counter(s)"
|
|
rgroup.long 0x10++0x7
|
|
line.long 0x0 "IPUS_CNTR_NXTEVT,'Next event' or Done-event status reported by FF1 logic"
|
|
hexmask.long.byte 0x0 0.--5. 1. "IPUS_CNTR_NXTEVT,'Next event' or Done-event status reported by FF1 logic"
|
|
line.long 0x4 "IPUS_CNTR_ALLEVT,Done-event status reported by each IPUS Event Counter"
|
|
hexmask.long.byte 0x4 0.--7. 1. "IPUS_CNTR_ALLEVT,Done-event status reported by each IPUS Event Counter"
|
|
group.long 0x18++0x13
|
|
line.long 0x0 "IPUS_ENGN_TRIG_ENC,Trigger command Register for binary encoded IPUS Free-Engine counter"
|
|
hexmask.long.byte 0x0 0.--5. 1. "IPUS_ENGN_TRIG_ENC,Trigger command for binary encoded IPUS Free-Engine counter"
|
|
line.long 0x4 "IPUS_ENGN_TRIG,Trigger command Register for bit-selected IPUS Free-Engine counters"
|
|
hexmask.long.byte 0x4 0.--7. 1. "IPUS_ENGN_TRIG,Trigger command for bit-selected IPUS Free-Engine counters"
|
|
line.long 0x8 "IPUS_ENGN_FREE_ENC,Free-up command Register for binary encoded IPUS Free-Engine counter"
|
|
hexmask.long.byte 0x8 0.--5. 1. "IPUS_ENGN_FREE_ENC,Free-up command for binary encoded IPUS Free-Engine counter"
|
|
line.long 0xC "IPUS_ENGN_FREE,Free-up command Register for bit-selected IPUS Free-Engine counters"
|
|
hexmask.long.byte 0xC 0.--7. 1. "IPUS_ENGN_FREE,Free-up command for bit-selected IPUS Free-Engine counters"
|
|
line.long 0x10 "IPUS_ENGN_USBL,Register to indicate IPUS Engines usable by current task"
|
|
hexmask.long.byte 0x10 0.--7. 1. "IPUS_ENGN_USBL,IPUS Engines usable by current task"
|
|
rgroup.long 0x2C++0xB
|
|
line.long 0x0 "IPUS_ENGN_FF1,Available Free IPUS Engine and Engine with a Free buffer indicator"
|
|
hexmask.long.byte 0x0 16.--21. 1. "IPUS_ENGN_FF1_BUF_AVL,Available IPUS Engine with atleast one Free buffer"
|
|
hexmask.long.byte 0x0 0.--5. 1. "IPUS_ENGN_FF1_AVL,Available Free IPUS Engine indicator"
|
|
line.long 0x4 "IPUS_ENGN_AVL,All available Free IPUS Engines indicator"
|
|
hexmask.long.byte 0x4 0.--7. 1. "IPUS_ENGN_AVL,All available Free IPUS Engines indicator"
|
|
line.long 0x8 "IPUS_ENGN_BUF_AVL,All available IPUS Engines with atleast one Free Buffer indicator"
|
|
hexmask.long.byte 0x8 0.--7. 1. "IPUS_ENGN_BUF_AVL,All available IPUS Engines with atleast one Free Buffer indicator"
|
|
group.long 0x38++0xB
|
|
line.long 0x0 "IPUV_CNTR_MAX_VAL,Maximum value of IPUV Event counters"
|
|
hexmask.long.byte 0x0 0.--3. 1. "IPUV_CNTR_MAX_VAL,Maximum value of IPUV Event counters"
|
|
line.long 0x4 "IPUV_CNTR_CLREVT_ENC,'Clear event' command Register for binary encoded IPUV Event counter"
|
|
hexmask.long.byte 0x4 0.--5. 1. "IPUV_CNTR_CLREVT_ENC,'Clear event' command for binary encoded IPUV Event counter"
|
|
line.long 0x8 "IPUV_CNTR_CLREVT,'Clear event' command Register for bit-selected IPUV Event counters"
|
|
hexmask.long.byte 0x8 0.--3. 1. "IPUV_CNTR_CLREVT,'Clear event' command for bit-selected IPUV Event counter(s)"
|
|
rgroup.long 0x44++0x7
|
|
line.long 0x0 "IPUV_CNTR_NXTEVT,'Next event' or Done-event status reported by FF1 logic"
|
|
hexmask.long.byte 0x0 0.--5. 1. "IPUV_CNTR_NXTEVT,'Next event' or Done-event status reported by FF1 logic"
|
|
line.long 0x4 "IPUV_CNTR_ALLEVT,Done-event status reported by each IPUV Event Counter"
|
|
hexmask.long.byte 0x4 0.--3. 1. "IPUV_CNTR_ALLEVT,Done-event status reported by each IPUV Event Counter"
|
|
group.long 0x4C++0x13
|
|
line.long 0x0 "IPUV_ENGN_TRIG_ENC,Trigger command Register for binary encoded IPUV Free-Engine counter"
|
|
hexmask.long.byte 0x0 0.--5. 1. "IPUV_ENGN_TRIG_ENC,Trigger command for binary encoded IPUV Free-Engine counter"
|
|
line.long 0x4 "IPUV_ENGN_TRIG,Trigger command Register for bit-selected IPUV Free-Engine counters"
|
|
hexmask.long.byte 0x4 0.--3. 1. "IPUV_ENGN_TRIG,Trigger command for bit-selected IPUV Free-Engine counters"
|
|
line.long 0x8 "IPUV_ENGN_FREE_ENC,Free-up command Register for binary encoded IPUV Free-Engine counter"
|
|
hexmask.long.byte 0x8 0.--5. 1. "IPUV_ENGN_FREE_ENC,Free-up command for binary encoded IPUV Free-Engine counter"
|
|
line.long 0xC "IPUV_ENGN_FREE,Free-up command Register for bit-selected IPUV Free-Engine counters"
|
|
hexmask.long.byte 0xC 0.--3. 1. "IPUV_ENGN_FREE,Free-up command for bit-selected IPUV Free-Engine counters"
|
|
line.long 0x10 "IPUV_ENGN_USBL,Register to indicate IPUV Engines usable by current task"
|
|
hexmask.long.byte 0x10 0.--3. 1. "IPUV_ENGN_USBL,IPUV Engines usable by current task"
|
|
rgroup.long 0x60++0xB
|
|
line.long 0x0 "IPUV_ENGN_FF1,Available Free IPUV Engine and Engine with a Free buffer indicator"
|
|
hexmask.long.byte 0x0 16.--21. 1. "IPUV_ENGN_FF1_BUF_AVL,Available IPUV Engine with atleast one Free buffer"
|
|
hexmask.long.byte 0x0 0.--5. 1. "IPUV_ENGN_FF1_AVL,Available Free IPUV Engine indicator"
|
|
line.long 0x4 "IPUV_ENGN_AVL,All available Free IPUV Engines indicator"
|
|
hexmask.long.byte 0x4 0.--3. 1. "IPUV_ENGN_AVL,All available Free IPUV Engines indicator"
|
|
line.long 0x8 "IPUV_ENGN_BUF_AVL,All available IPUV Engines with atleast one Free Buffer indicator"
|
|
hexmask.long.byte 0x8 0.--3. 1. "IPUV_ENGN_BUF_AVL,All available IPUV Engines with atleast one Free Buffer indicator"
|
|
group.long 0x6C++0x7
|
|
line.long 0x0 "OTHR_CNTR_CLREVT_ENC,'Clear event' command Register for binary encoded Other/Misc Event counter"
|
|
hexmask.long.byte 0x0 0.--5. 1. "OTHR_CNTR_CLREVT_ENC,'Clear event' command for binary encoded Other/Misc Event counter"
|
|
line.long 0x4 "OTHR_CNTR_CLREVT,'Clear event' command Register for bit-selected Other/Misc Event counters"
|
|
hexmask.long 0x4 0.--25. 1. "OTHR_CNTR_CLREVT,'Clear event' command for bit-selected Other/Misc Event counter(s)"
|
|
rgroup.long 0x74++0x3
|
|
line.long 0x0 "OTHR_CNTR_ALLEVT,Done-event status reported by each Other/Misc Event Counter"
|
|
hexmask.long 0x0 0.--25. 1. "OTHR_CNTR_ALLEVT,Done-event status reported by each Other/Misc Event Counter"
|
|
group.long 0x78++0xF
|
|
line.long 0x0 "OTHR_ENGN_TRIG_ENC,Trigger command Register for binary encoded Other/Misc Free-Engine counter"
|
|
hexmask.long.byte 0x0 0.--5. 1. "OTHR_ENGN_TRIG_ENC,Trigger command for binary encoded Other/Misc Free-Engine counter"
|
|
line.long 0x4 "OTHR_ENGN_TRIG,Trigger command Register for bit-selected Other/Misc Free-Engine counters"
|
|
hexmask.long 0x4 0.--25. 1. "OTHR_ENGN_TRIG,Trigger command for bit-selected Other/Misc Free-Engine counters"
|
|
line.long 0x8 "OTHR_ENGN_FREE_ENC,Free-up command Register for binary encoded Other/Misc Free-Engine counter"
|
|
hexmask.long.byte 0x8 0.--5. 1. "OTHR_ENGN_FREE_ENC,Free-up command for binary encoded Other/Misc Free-Engine counter"
|
|
line.long 0xC "OTHR_ENGN_FREE,Free-up command Register for bit-selected Other/Misc Free-Engine counters"
|
|
hexmask.long 0xC 0.--25. 1. "OTHR_ENGN_FREE,Free-up command for bit-selected Other/Misc Free-Engine counters"
|
|
rgroup.long 0x8C++0x7
|
|
line.long 0x0 "OTHR_ENGN_AVL,All available Free Other/Misc Engines indicator"
|
|
hexmask.long 0x0 0.--25. 1. "OTHR_ENGN_AVL,All available Free Other/Misc Engines indicator"
|
|
line.long 0x4 "OTHR_ENGN_BUF_AVL,All available Other/Misc Engines with atleast one Free Buffer indicator"
|
|
hexmask.long 0x4 0.--25. 1. "OTHR_ENGN_BUF_AVL,All available Other/Misc Engines with atleast one Free Buffer indicator"
|
|
group.long 0x94++0xB
|
|
line.long 0x0 "OTHR0_CNTR_MAX_VAL,Maximum value of Event Counter for Other Engine-0"
|
|
hexmask.long.byte 0x0 0.--4. 1. "OTHR0_CNTR_MAX_VAL,Maximum value of Event counter for Other Engine-0"
|
|
line.long 0x4 "SW_EVT_TRIG,Software Defined Event Triggers (Interrupts) assert control"
|
|
hexmask.long.byte 0x4 0.--7. 1. "SW_EVT_TRIG,Software Defined Event Trigger (Interrupt) assert control"
|
|
line.long 0x8 "SW_EVT_CLR_DONE,Software Defined Event Triggers (Interrupts) to Host CPU"
|
|
bitfld.long 0x8 16. "SW_EVT_DONE,Software Defined Event Trigger (Interrupt) Done/Acknowledge Status bit" "0,1"
|
|
hexmask.long.byte 0x8 0.--7. 1. "SW_EVT_CLR,Software Defined Event Trigger (Interrupt) deassert control"
|
|
tree.end
|
|
tree "VSEQ_INT_DMA (VSEQ Internal DMA Engine)"
|
|
base ad:0x7C024000
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "KRAM_ADDR,Kernel-RAM Address as Start Address for DMA Transfer"
|
|
hexmask.long.word 0x0 0.--13. 1. "KRAM_ADDR,Kernel-RAM Address as Start Address for DMA Transfer"
|
|
line.long 0x4 "TARGET_IPUx_ENGN,Target IPUx Engine to be programmed with Kernel code via DMA"
|
|
hexmask.long.byte 0x4 16.--21. 1. "TARGET_IPUV_ENGN,Target IPUV Engine to be programmed Kernel Code via DMA"
|
|
hexmask.long.byte 0x4 0.--5. 1. "TARGET_IPUS_ENGN,Target IPUS Engine to be programmed Kernel Code via DMA"
|
|
line.long 0x8 "TRANSFER_LEN,DMA Transfer Length or Byte Count"
|
|
hexmask.long.word 0x8 0.--14. 1. "TRANSFER_LEN,DMA Transfer length or Byte Count to be transferred"
|
|
line.long 0xC "CTRL_STAT,DMA Control and Status register"
|
|
rbitfld.long 0xC 19. "BED,Bus Transfer error during DMA Destination access" "0: No error,1: Bus Transfer error during Destination access"
|
|
rbitfld.long 0xC 18. "DMA_CFG_ERR,DMA Configuration Error" "0: No error,1: DMA configuration error"
|
|
newline
|
|
rbitfld.long 0xC 17. "BUSY,DMA Transfer in progress indicator" "0: DMA transfer is not active,1: DMA transfer has been initiated"
|
|
bitfld.long 0xC 16. "DMA_DONE,DMA Transfer complete" "0,1"
|
|
newline
|
|
bitfld.long 0xC 0. "START,Start DMA Transfer from Kernel RAM to selected IPUx Engine's IMEM" "0,1"
|
|
tree.end
|
|
tree.end
|
|
tree "WKPU (Wakeup Unit)"
|
|
base ad:0x40063000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "NSR,NMI Status Flag Register"
|
|
bitfld.long 0x0 31. "NIF0,NMI Status Flag 0" "0: No event has occurred on the pad,1: An event as defined by NREE0 and NFEE0 has.."
|
|
bitfld.long 0x0 30. "NOVF0,NMI Overrun Status Flag 0" "0: No overrun has occurred on NMI input 0,1: An overrun has occurred on NMI input 0"
|
|
newline
|
|
bitfld.long 0x0 23. "NIF1,NMI Status Flag 1" "0: No event has occurred on the pad,1: An event as defined by NREE1 and NFEE1 has.."
|
|
bitfld.long 0x0 22. "NOVF1,NMI Overrun Status Flag 1" "0: No overrun has occurred on NMI input 1,1: An overrun has occurred on NMI input 1"
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "NCR,NMI Configuration Register"
|
|
bitfld.long 0x0 31. "NLOCK0,NMI Configuration Lock Register 0" "0,1"
|
|
bitfld.long 0x0 29.--30. "NDSS0,NMI Destination Source Select 0" "0: Non-maskable interrupt,?,?,3: Reserved Reserved"
|
|
newline
|
|
bitfld.long 0x0 28. "NWRE0,NMI Wakeup Request Enable 0 If wakeup requests are disabled the corresponding NDSS field must be set to 11 to disable wakeups from an NMI" "0: System wakeup requests from the corresponding..,1: A set NIF0 bit or set NOVF0 bit causes a system.."
|
|
bitfld.long 0x0 26. "NREE0,NMI Rising-edge Events Enable 0." "0: Rising-edge event is disabled,1: Rising-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 25. "NFEE0,NMI Falling-edge Events Enable 0." "0: Falling-edge event is disabled,1: Falling-edge event is enabled"
|
|
bitfld.long 0x0 24. "NFE0,NMI Filter Enable 0. Enable analog glitch filter on the NMI pad input." "0: Filter is disabled,1: Filter is enabled"
|
|
newline
|
|
bitfld.long 0x0 23. "NLOCK1,NMI Configuration Lock Register 1" "0,1"
|
|
bitfld.long 0x0 21.--22. "NDSS1,NMI Destination Source Select 1" "0: Non-maskable interrupt,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 20. "NWRE1,NMI Wakeup Request Enable 1" "0: System wakeup requests from the corresponding..,1: A set NIF1 bit or set NOVF1 bit causes a system.."
|
|
bitfld.long 0x0 18. "NREE1,NMI Rising-edge Events Enable 1." "0: Rising-edge event is disabled,1: Rising-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 17. "NFEE1,NMI Falling-edge Events Enable 1." "0: Falling-edge event is disabled,1: Falling-edge event is enabled"
|
|
bitfld.long 0x0 16. "NFE1,NMI Filter Enable 1. Enable analog glitch filter on the NMI pad input." "0: Filter is disabled,1: Filter is enabled"
|
|
tree.end
|
|
tree "XBIC (Crossbar Integrity Checker)"
|
|
base ad:0x40092000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "MCR,XBIC Module Control Register"
|
|
bitfld.long 0x0 31. "SE0,Slave Port Enable for EDC error detect." "0: Attribute integrity checking disabled for slave..,1: Attribute integrity checking enabled for slave.."
|
|
bitfld.long 0x0 30. "SE1,Slave Port Enable for EDC error detect." "0: Attribute integrity checking disabled for slave..,1: Attribute integrity checking enabled for slave.."
|
|
newline
|
|
bitfld.long 0x0 29. "SE2,Slave Port Enable for EDC error detect." "0: Attribute integrity checking disabled for slave..,1: Attribute integrity checking enabled for slave.."
|
|
bitfld.long 0x0 28. "SE3,Slave Port Enable for EDC error detect." "0: Attribute integrity checking disabled for slave..,1: Attribute integrity checking enabled for slave.."
|
|
newline
|
|
bitfld.long 0x0 27. "SE4,Slave Port Enable for EDC error detect." "0: Attribute integrity checking disabled for slave..,1: Attribute integrity checking enabled for slave.."
|
|
bitfld.long 0x0 26. "SE5,Slave Port Enable for EDC error detect." "0: Attribute integrity checking disabled for slave..,1: Attribute integrity checking enabled for slave.."
|
|
newline
|
|
bitfld.long 0x0 25. "SE6,Slave Port Enable for EDC error detect." "0: Attribute integrity checking disabled for slave..,1: Attribute integrity checking enabled for slave.."
|
|
bitfld.long 0x0 24. "SE7,Slave Port Enable for EDC error detect." "0: Attribute integrity checking disabled for slave..,1: Attribute integrity checking enabled for slave.."
|
|
newline
|
|
bitfld.long 0x0 23. "ME0,Master Port Enable for slave driven signal safety check." "0: Attribute integrity checking disabled for master..,1: Attribute integrity checking enabled for master.."
|
|
bitfld.long 0x0 22. "ME1,Master Port Enable for slave driven signal safety check." "0: Attribute integrity checking disabled for master..,1: Attribute integrity checking enabled for master.."
|
|
newline
|
|
bitfld.long 0x0 21. "ME2,Master Port Enable for slave driven signal safety check." "0: Attribute integrity checking disabled for master..,1: Attribute integrity checking enabled for master.."
|
|
bitfld.long 0x0 20. "ME3,Master Port Enable for slave driven signal safety check." "0: Attribute integrity checking disabled for master..,1: Attribute integrity checking enabled for master.."
|
|
newline
|
|
bitfld.long 0x0 19. "ME4,Master Port Enable for slave driven signal safety check." "0: Attribute integrity checking disabled for master..,1: Attribute integrity checking enabled for master.."
|
|
bitfld.long 0x0 18. "ME5,Master Port Enable for slave driven signal safety check." "0: Attribute integrity checking disabled for master..,1: Attribute integrity checking enabled for master.."
|
|
newline
|
|
bitfld.long 0x0 17. "ME6,Master Port Enable for slave driven signal safety check." "0: Attribute integrity checking disabled for master..,1: Attribute integrity checking enabled for master.."
|
|
bitfld.long 0x0 16. "ME7,Master Port Enable for slave driven signal safety check." "0: Attribute integrity checking disabled for master..,1: Attribute integrity checking enabled for master.."
|
|
line.long 0x4 "EIR,XBIC Error Injection Register"
|
|
bitfld.long 0x4 31. "EIE,Error Injection Enable." "0: Error injection disabled,1: Error injection enabled"
|
|
bitfld.long 0x4 12.--14. "SLV,Target Slave Port" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--11. 1. "MST,Target Master ID"
|
|
hexmask.long.byte 0x4 0.--7. 1. "SYN,Syndrome"
|
|
rgroup.long 0x8++0x7
|
|
line.long 0x0 "ESR,XBIC Error Status Register"
|
|
bitfld.long 0x0 31. "VLD,Error Status Valid." "0: No error detected other fields of the ESR and..,1: Error detected all fields of the ESR and EAR are.."
|
|
bitfld.long 0x0 30. "DPSE0,Data phase slave port error." "0: No error on slave port 0,1: Data phase error on slave port 0"
|
|
newline
|
|
bitfld.long 0x0 29. "DPSE1,Data phase slave port error." "0: No error on slave port 1,1: Data phase error on slave port 1"
|
|
bitfld.long 0x0 28. "DPSE2,Data phase slave port error." "0: No error on slave port 2,1: Data phase error on slave port 2"
|
|
newline
|
|
bitfld.long 0x0 27. "DPSE3,Data phase slave port error." "0: No error on slave port 3,1: Data phase error on slave port 3"
|
|
bitfld.long 0x0 26. "DPSE4,Data phase slave port error." "0: No error on slave port 4,1: Data phase error on slave port 4"
|
|
newline
|
|
bitfld.long 0x0 25. "DPSE5,Data phase slave port error." "0: No error on slave port 5,1: Data phase error on slave port 5"
|
|
bitfld.long 0x0 24. "DPSE6,Data phase slave port error." "0: No error on slave port 6,1: Data phase error on slave port 6"
|
|
newline
|
|
bitfld.long 0x0 23. "DPSE7,Data phase slave port error." "0: No error on slave port 7,1: Data phase error on slave port 7"
|
|
bitfld.long 0x0 22. "DPME0,Data phase master port error." "0: No error on master port 0,1: Data phase error on master port 0"
|
|
newline
|
|
bitfld.long 0x0 21. "DPME1,Data phase master port error." "0: No error on master port 1,1: Data phase error on master port 1"
|
|
bitfld.long 0x0 20. "DPME2,Data phase master port error." "0: No error on master port 2,1: Data phase error on master port 2"
|
|
newline
|
|
bitfld.long 0x0 19. "DPME3,Data phase master port error." "0: No error on master port 3,1: Data phase error on master port 3"
|
|
bitfld.long 0x0 18. "DPME4,Data phase master port error." "0: No error on master port 4,1: Data phase error on master port 4"
|
|
newline
|
|
bitfld.long 0x0 17. "DPME5,Data phase master port error." "0: No error on master port 5,1: Data phase error on master port 5"
|
|
bitfld.long 0x0 16. "DPME6,Data phase master port error." "0: No error on master port 6,1: Data phase error on master port 6"
|
|
newline
|
|
bitfld.long 0x0 15. "DPME7,Data phase master port error." "0: No error on master port 7,1: Data phase error on master port 7"
|
|
bitfld.long 0x0 12.--14. "SLV,Slave Port. The slave port targeted by the last transfer with an error." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "MST,Master ID. The master ID value of the last transfer with an error."
|
|
hexmask.long.byte 0x0 0.--7. 1. "SYN,Syndrome"
|
|
line.long 0x4 "EAR,XBIC Error Address Register"
|
|
hexmask.long 0x4 0.--31. 1. "ADDR,The address of the last transfer with an error."
|
|
tree.end
|
|
tree "XRDC (Extended Resource Domain Controller)"
|
|
base ad:0x40004000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CR,Control Register"
|
|
bitfld.long 0x0 30. "LK1,1-bit Lock" "0: Register can be written by any secure privileged..,1: Register is locked (read-only) until the next.."
|
|
rbitfld.long 0x0 8. "VAW,Virtualization aware" "0: Implementation is not virtualization aware.,1: Implementation is virtualization aware."
|
|
newline
|
|
rbitfld.long 0x0 7. "MRF,Memory Region Format" "?,1: SMPU family format."
|
|
hexmask.long.byte 0x0 1.--4. 1. "HRL,Hardware Revision Level"
|
|
newline
|
|
bitfld.long 0x0 0. "GVLD,Global Valid (XRDC global enable/disable)." "0: XRDC is disabled. All accesses from all bus..,1: XRDC is enabled."
|
|
rgroup.long 0xF0++0xB
|
|
line.long 0x0 "HWCFG0,Hardware Configuration Register 0"
|
|
hexmask.long.byte 0x0 24.--27. 1. "NPAC,Number of PACs"
|
|
hexmask.long.byte 0x0 16.--23. 1. "NMRC,Number of MRCs"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "NMSTR,Number of bus masters"
|
|
hexmask.long.byte 0x0 0.--7. 1. "NDID,Number of domains"
|
|
line.long 0x4 "HWCFG1,Hardware Configuration Register 1"
|
|
hexmask.long.byte 0x4 0.--3. 1. "DID,Domain identifier number"
|
|
line.long 0x8 "HWCFG2,Hardware Configuration Register 2"
|
|
bitfld.long 0x8 31. "PIDP31,Process identifier present from bus master 31" "0: Bus master 31 does not source a process..,1: Bus master 31 sources a process identifier.."
|
|
bitfld.long 0x8 30. "PIDP30,Process identifier present from bus master 30" "0: Bus master 30 does not source a process..,1: Bus master 30 sources a process identifier.."
|
|
newline
|
|
bitfld.long 0x8 29. "PIDP29,Process identifier present from bus master 29" "0: Bus master 29 does not source a process..,1: Bus master 29 sources a process identifier.."
|
|
bitfld.long 0x8 28. "PIDP28,Process identifier present from bus master 28" "0: Bus master 28 does not source a process..,1: Bus master 28 sources a process identifier.."
|
|
newline
|
|
bitfld.long 0x8 27. "PIDP27,Process identifier present from bus master 27" "0: Bus master 27 does not source a process..,1: Bus master 27 sources a process identifier.."
|
|
bitfld.long 0x8 26. "PIDP26,Process identifier present from bus master 26" "0: Bus master 26 does not source a process..,1: Bus master 26 sources a process identifier.."
|
|
newline
|
|
bitfld.long 0x8 25. "PIDP25,Process identifier present from bus master 25" "0: Bus master 25 does not source a process..,1: Bus master 25 sources a process identifier.."
|
|
bitfld.long 0x8 24. "PIDP24,Process identifier present from bus master 24" "0: Bus master 24 does not source a process..,1: Bus master 24 sources a process identifier.."
|
|
newline
|
|
bitfld.long 0x8 23. "PIDP23,Process identifier present from bus master 23" "0: Bus master 23 does not source a process..,1: Bus master 23 sources a process identifier.."
|
|
bitfld.long 0x8 22. "PIDP22,Process identifier present from bus master 22" "0: Bus master 22 does not source a process..,1: Bus master 22 sources a process identifier.."
|
|
newline
|
|
bitfld.long 0x8 21. "PIDP21,Process identifier present from bus master 21" "0: Bus master 21 does not source a process..,1: Bus master 21 sources a process identifier.."
|
|
bitfld.long 0x8 20. "PIDP20,Process identifier present from bus master 20" "0: Bus master 20 does not source a process..,1: Bus master 20 sources a process identifier.."
|
|
newline
|
|
bitfld.long 0x8 19. "PIDP19,Process identifier present from bus master 19" "0: Bus master 19 does not source a process..,1: Bus master 19 sources a process identifier.."
|
|
bitfld.long 0x8 18. "PIDP18,Process identifier present from bus master 18" "0: Bus master 18 does not source a process..,1: Bus master 18 sources a process identifier.."
|
|
newline
|
|
bitfld.long 0x8 17. "PIDP17,Process identifier present from bus master 17" "0: Bus master 17 does not source a process..,1: Bus master 17 sources a process identifier.."
|
|
bitfld.long 0x8 16. "PIDP16,Process identifier present from bus master 16" "0: Bus master 16 does not source a process..,1: Bus master 16 sources a process identifier.."
|
|
newline
|
|
bitfld.long 0x8 15. "PIDP15,Process identifier present from bus master 15" "0: Bus master 15 does not source a process..,1: Bus master 15 sources a process identifier.."
|
|
bitfld.long 0x8 14. "PIDP14,Process identifier present from bus master 14" "0: Bus master 14 does not source a process..,1: Bus master 14 sources a process identifier.."
|
|
newline
|
|
bitfld.long 0x8 13. "PIDP13,Process identifier present from bus master 13" "0: Bus master 13 does not source a process..,1: Bus master 13 sources a process identifier.."
|
|
bitfld.long 0x8 12. "PIDP12,Process identifier present from bus master 12" "0: Bus master 12 does not source a process..,1: Bus master 12 sources a process identifier.."
|
|
newline
|
|
bitfld.long 0x8 11. "PIDP11,Process identifier present from bus master 11" "0: Bus master 11 does not source a process..,1: Bus master 11 sources a process identifier.."
|
|
bitfld.long 0x8 10. "PIDP10,Process identifier present from bus master 10" "0: Bus master 10 does not source a process..,1: Bus master 10 sources a process identifier.."
|
|
newline
|
|
bitfld.long 0x8 9. "PIDP9,Process identifier present from bus master 9" "0: Bus master 9 does not source a process..,1: Bus master 9 sources a process identifier.."
|
|
bitfld.long 0x8 8. "PIDP8,Process identifier present from bus master 8" "0: Bus master 8 does not source a process..,1: Bus master 8 sources a process identifier.."
|
|
newline
|
|
bitfld.long 0x8 7. "PIDP7,Process identifier present from bus master 7" "0: Bus master 7 does not source a process..,1: Bus master 7 sources a process identifier.."
|
|
bitfld.long 0x8 6. "PIDP6,Process identifier present from bus master 6" "0: Bus master 6 does not source a process..,1: Bus master 6 sources a process identifier.."
|
|
newline
|
|
bitfld.long 0x8 5. "PIDP5,Process identifier present from bus master 5" "0: Bus master 5 does not source a process..,1: Bus master 5 sources a process identifier.."
|
|
bitfld.long 0x8 4. "PIDP4,Process identifier present from bus master 4" "0: Bus master 4 does not source a process..,1: Bus master 4 sources a process identifier.."
|
|
newline
|
|
bitfld.long 0x8 3. "PIDP3,Process identifier present from bus master 3" "0: Bus master 3 does not source a process..,1: Bus master 3 sources a process identifier.."
|
|
bitfld.long 0x8 2. "PIDP2,Process identifier present from bus master 2" "0: Bus master 2 does not source a process..,1: Bus master 2 sources a process identifier.."
|
|
newline
|
|
bitfld.long 0x8 1. "PIDP1,Process identifier present from bus master 1" "0: Bus master 1 does not source a process..,1: Bus master 1 sources a process identifier.."
|
|
bitfld.long 0x8 0. "PIDP0,Process identifier present from bus master 0" "0: Bus master 0 does not source a process..,1: Bus master 0 sources a process identifier.."
|
|
repeat 64. (increment 0x0 0x1)(increment 0x0 0x1)
|
|
rgroup.byte ($2+0x100)++0x0
|
|
line.byte 0x0 "MDACFG$1,Master Domain Assignment Configuration Register"
|
|
bitfld.byte 0x0 7. "NCM,Non-CPU Master" "0: Bus master is a processor.,1: Bus master is a non-processor."
|
|
hexmask.byte 0x0 0.--3. 1. "NMDAR,Number of master domain assignment registers for bus master n"
|
|
repeat.end
|
|
repeat 16. (increment 0x0 0x1)(increment 0x0 0x1)
|
|
rgroup.byte ($2+0x140)++0x0
|
|
line.byte 0x0 "MRCFG$1,Memory Region Configuration Register"
|
|
hexmask.byte 0x0 0.--4. 1. "NMGD,Number of memory region descriptors for MRC i"
|
|
repeat.end
|
|
repeat 16. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x200)++0x3
|
|
line.long 0x0 "DERRLOC$1,Domain Error Location Register"
|
|
hexmask.long.byte 0x0 16.--19. 1. "PACINST,PAC instance"
|
|
hexmask.long.word 0x0 0.--15. 1. "MRCINST,MRC instance"
|
|
repeat.end
|
|
repeat 20. (increment 0x0 0x1)(increment 0x0 0x10)
|
|
rgroup.long ($2+0x400)++0x3
|
|
line.long 0x0 "DERR_W0_$1,Domain Error Word0 Register"
|
|
hexmask.long 0x0 0.--31. 1. "EADDR,Error address. This is the access address that generated an access violation."
|
|
repeat.end
|
|
repeat 20. (increment 0x0 0x1)(increment 0x0 0x10)
|
|
rgroup.long ($2+0x404)++0x3
|
|
line.long 0x0 "DERR_W1_$1,Domain Error Word1 Register"
|
|
bitfld.long 0x0 30.--31. "EST,Error state" "0: No access violation has been detected.,1: No access violation has been detected.,2: A single access violation has been detected.,3: Multiple access violations for this domain have.."
|
|
bitfld.long 0x0 24.--26. "EPORT,Error port" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 11. "ERW,Error read/write" "0: Read access,1: Write access"
|
|
bitfld.long 0x0 8.--10. "EATR,Error attributes. This field captures certain attributes of the access violation." "0: Secure user mode instruction fetch access,1: Secure user mode data access,2: Secure privileged mode instruction fetch access,3: Secure privileged mode data access,4: Nonsecure user mode instruction fetch access,5: Nonsecure user mode data access,6: Nonsecure privileged mode instruction fetch access,7: Nonsecure privileged mode data access"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "EDID,Error domain identifier. This field captures the domain identifier of the access violation."
|
|
repeat.end
|
|
repeat 20. (increment 0x0 0x1)(increment 0x0 0x10)
|
|
rgroup.long ($2+0x408)++0x3
|
|
line.long 0x0 "DERR_W2_$1,Domain Error Word2 Register"
|
|
repeat.end
|
|
repeat 20. (increment 0x0 0x1)(increment 0x0 0x10)
|
|
wgroup.long ($2+0x40C)++0x3
|
|
line.long 0x0 "DERR_W3_$1,Domain Error Word3 Register"
|
|
bitfld.long 0x0 30.--31. "RECR,Rearm Error Capture Registers" "0,1,2,3"
|
|
repeat.end
|
|
repeat 64. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x700)++0x3
|
|
line.long 0x0 "PID$1,Process Identifier"
|
|
bitfld.long 0x0 29.--30. "LK2,Lock" "0: Register can be written by any secure privileged..,1: Register can be written by any secure privileged..,2: Register can only be written by a secure..,3: Register is locked (read-only) until the next.."
|
|
bitfld.long 0x0 28. "TSM,Three-state model" "0,1"
|
|
newline
|
|
rbitfld.long 0x0 24. "ELK22H,Enable (LK2 = 2) special Handling" "0: LK2 has special handing and LMNUM will capture..,1: LK2 is in its standard form and LMNUM will be.."
|
|
hexmask.long.byte 0x0 16.--21. 1. "LMNUM,Locked Master NUMber"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--5. 1. "PID,Process identifier"
|
|
repeat.end
|
|
repeat 64. (increment 0x0 0x1)(increment 0x0 0x20)
|
|
group.long ($2+0x800)++0x3
|
|
line.long 0x0 "MDA_Wm_$1,Master Domain Assignment Wm.n (DFMT=0)"
|
|
bitfld.long 0x0 31. "VLD,Valid" "0: The Wm domain assignment is invalid.,1: The Wm domain assignment is valid."
|
|
bitfld.long 0x0 30. "LK1,1-bit Lock" "0: Register can be written by any secure privileged..,1: Register is locked (read-only) until the next.."
|
|
newline
|
|
rbitfld.long 0x0 29. "DFMT,Domain format" "0,1"
|
|
hexmask.long.byte 0x0 24.--27. 1. "LPID,Logical partition Identifier"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--21. 1. "PID,Process Identifier"
|
|
hexmask.long.byte 0x0 8.--13. 1. "PIDM,Process Identifier Mask"
|
|
newline
|
|
bitfld.long 0x0 6.--7. "PE,Process identifier enable" "0: No process identifier is included in the domain..,1: No process identifier is included in the domain..,2: The process identifier is included in the domain..,3: The process identifier is included in the domain.."
|
|
bitfld.long 0x0 4.--5. "DIDS,DID Select" "0: Use MDAn[3:0] as the domain identifier.,1: Use the input DID as the domain identifier.,2: Use MDAn[3:2] concatenated with the low-order 2..,?"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "DID,Domain identifier" "0,1,2,3,4,5,6,7"
|
|
repeat.end
|
|
repeat 512. (increment 0x0 0x1)(increment 0x0 0x8)
|
|
group.long ($2+0x1000)++0x3
|
|
line.long 0x0 "PDAC_W0_$1,Peripheral Domain Access Control W0"
|
|
bitfld.long 0x0 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by W0[SNUM] in the.."
|
|
hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore number. Include this hardware semaphore in the DxACP access evaluation."
|
|
newline
|
|
bitfld.long 0x0 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 18.--20. "D6ACP,Domain 6 access control policy. See description for D7ACP ." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 15.--17. "D5ACP,Domain 5 access control policy. See description for D7ACP ." "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 12.--14. "D4ACP,Domain 4 access control policy. See description for D7ACP ." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 9.--11. "D3ACP,Domain 3 access control policy. See description for D7ACP ." "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 6.--8. "D2ACP,Domain 2 access control policy. See description for D7ACP ." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 3.--5. "D1ACP,Domain 1 access control policy. See description for D7ACP ." "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 0.--2. "D0ACP,Domain 0 access control policy. See description for D7ACP ." "0,1,2,3,4,5,6,7"
|
|
repeat.end
|
|
repeat 512. (increment 0x0 0x1)(increment 0x0 0x8)
|
|
group.long ($2+0x1004)++0x3
|
|
line.long 0x0 "PDAC_W1_$1,Peripheral Domain Access Control W1"
|
|
bitfld.long 0x0 31. "VLD,Valid" "0: The PDACn assignment is invalid.,1: The PDACn assignment is valid."
|
|
bitfld.long 0x0 29.--30. "LK2,Lock" "0: Entire PDACn can be written.,1: Entire PDACn can be written.,2: Domain 'x' can only update the DxACP field; no..,3: PDACn is locked (read-only) until the next reset."
|
|
repeat.end
|
|
repeat 256. (increment 0x0 0x1)(increment 0x0 0x20)
|
|
group.long ($2+0x2000)++0x3
|
|
line.long 0x0 "MRGD_W0_$1,Memory Region Descriptor W0"
|
|
hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address"
|
|
repeat.end
|
|
repeat 256. (increment 0x0 0x1)(increment 0x0 0x20)
|
|
group.long ($2+0x2004)++0x3
|
|
line.long 0x0 "MRGD_W1_$1,Memory Region Descriptor W1"
|
|
hexmask.long 0x0 5.--31. 1. "ENDADDR,End Address"
|
|
repeat.end
|
|
repeat 256. (increment 0x0 0x1)(increment 0x0 0x20)
|
|
group.long ($2+0x2008)++0x3
|
|
line.long 0x0 "MRGD_W2_$1,Memory Region Descriptor W2"
|
|
bitfld.long 0x0 30. "SE,Semaphore enable" "0: Do not include a semaphore in the DxACP..,1: Include the semaphore defined by W2[SNUM] in the.."
|
|
hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore number. Include this hardware semaphore in the DxACP access evaluation."
|
|
newline
|
|
bitfld.long 0x0 21.--23. "D7ACP,Domain 7 access control policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 18.--20. "D6ACP,Domain 6 access control policy. See description for D7ACP ." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 15.--17. "D5ACP,Domain 5 access control policy. See description for D7ACP ." "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 12.--14. "D4ACP,Domain 4 access control policy. See description for D7ACP ." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 9.--11. "D3ACP,Domain 3 access control policy. See description for D7ACP ." "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 6.--8. "D2ACP,Domain 2 access control policy. See description for D7ACP ." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 3.--5. "D1ACP,Domain 1 access control policy. See description for D7ACP ." "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 0.--2. "D0ACP,Domain 0 access control policy. See description for D7ACP ." "0,1,2,3,4,5,6,7"
|
|
repeat.end
|
|
repeat 256. (increment 0x0 0x1)(increment 0x0 0x20)
|
|
group.long ($2+0x200C)++0x3
|
|
line.long 0x0 "MRGD_W3_$1,Memory Region Descriptor W3"
|
|
bitfld.long 0x0 31. "VLD,Valid" "0,1"
|
|
bitfld.long 0x0 29.--30. "LK2,Lock" "0: Entire MRGDn can be written.,1: Entire MRGDn can be written.,2: Domain 'x' can only update the DxACP field; no..,3: MRGDn is locked (read-only) until the next reset."
|
|
repeat.end
|
|
tree.end
|
|
AUTOINDENT.OFF
|