284 lines
20 KiB
Plaintext
284 lines
20 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: PL310 r2p0 On-Chip Peripherals
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; @Props: Released
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; @Author: SOL
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; @Changelog: 2011-07-22 SOL
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; @Manufacturer: TI - Texas Instruments
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; @Doc: DDI0246E_l2c310_r3p1_trm.pdf
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; @Core: Cortex-A9
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; @Copyright: (C) 1989-2014 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: perpl310.per 5897 2015-01-09 10:48:24Z askoncej $
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config 16. 8.
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tree.open "PL310 (L2 Cache Controller)"
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base ad:0x48242000
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width 40.
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rgroup.long 0x00++0x07 "Cache ID and Cache Type"
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line.long 0x00 "CACHE_ID,Cache ID Register"
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hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Implementer"
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hexmask.long.byte 0x00 10.--15. 1. " CACHE_ID ,CACHE ID"
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textline " "
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bitfld.long 0x00 6.--9. " PART_NUMBER ,Part number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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hexmask.long.byte 0x00 0.--5. 1. " RTL_RELEASE ,RTL release"
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line.long 0x04 "CACHE_TYPE,Cache Type Register"
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bitfld.long 0x04 31. " DATA_BANKING ,Data banking" "Not implemented,Implemented"
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bitfld.long 0x04 25.--28. " CTYPE ,Ctype" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x04 24. " H ,H" "0,1"
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bitfld.long 0x04 20.--22. " DSIZE_L2_CACHE_WAY_SIZE ,Read from Auxiliary Control Register[19:17]" "0,1,2,3,4,5,6,7"
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textline " "
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bitfld.long 0x04 18. " L2_ASSOCIATIVITY ,Read from Auxiliary Control Register [16]" "0,1"
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bitfld.long 0x04 12.--13. " L2_CACHE_LINE_LENGTH ,L2 cache line length" "32 bytes,?..."
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textline " "
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bitfld.long 0x04 8.--10. " ISIZE_L2_CACHE_WAY_SIZE ,Read from Auxiliary Control Register[19:17]" "0,1,2,3,4,5,6,7"
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bitfld.long 0x04 6. " L2_ASSOCIATIVITY ,Read from Auxiliary Control Register [16]" "0,1"
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textline " "
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bitfld.long 0x04 0.--1. " L2_CACHE_LINE_LENGTH ,L2 cache line length" "32 bytes,?..."
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group.long 0x100++0x0f "Control"
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line.long 0x00 "CONTROL,Control Register"
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bitfld.long 0x00 0. " L2_CACHE_ENABLE ,L2 Cache enable" "Disabled,Enabled"
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line.long 0x04 "AUXILIARY_CONTROL,Auxiliary Control Register"
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bitfld.long 0x04 30. " EARLY_BRESP_ENABLE ,Early BRESP enable" "Disabled,Enabled"
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bitfld.long 0x04 29. " INSTRUCTION_PREFETCH_ENABLE ,Instruction prefetch enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x04 28. " DATA_PREFETCH_ENABLE ,Data prefetch enablea" "Disabled,Enabled"
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bitfld.long 0x04 27. " NON-SECURE_INTERRUPT_ACCESS_CONTROL ,Non-secure interrupt access control" "Disabled,Enabled"
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textline " "
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bitfld.long 0x04 26. " NON-SECURE_LOCKDOWN_ENABLE ,Non-secure lockdown enable" "Disabled,Enabled"
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bitfld.long 0x04 25. " CACHE_REPLACEMENT_POLICY ,Cache replacement policy" "Pseudo-random,Round-robin"
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textline " "
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bitfld.long 0x04 23.--24. " FORCE_WRITE_ALLOCATE ,Force write allocate" "AWCACHE used,No allocation,AWCACHE Overridden,Mapped to 00"
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bitfld.long 0x04 22. " SHARED_ATTRIBUTE_OVERRIDE_ENABLE ,Shared attribute override enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x04 21. " PARITY_ENABLE ,Parity enable" "Disabled,Enabled"
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bitfld.long 0x04 20. " EVENT_MONITOR_BUS_ENABLE ,Event monitor bus enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x04 17.--19. " WAY-SIZE ,Way-size" "Reserved,16KB,32KB,64KB,128KB,256KB,512KB,?..."
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bitfld.long 0x04 16. " ASSOCIATIVITY ,Associativity" "8-way,16-way"
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textline " "
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bitfld.long 0x04 13. " SHARED_ATTRIBUTE_INVALIDATE_ENABLE ,Shared attribute invalidate enable" "Disabled,Enabled"
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bitfld.long 0x04 12. " EXCLUSIVE_CACHE_CONFIGURATION ,Exclusive cache configuration" "Disabled,Enabled"
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textline " "
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bitfld.long 0x04 11. " STORE_BUFFER_DEVICE_LIMITATION_ENABLE ,Store buffer device limitation Enable" "Disabled,Enabled"
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bitfld.long 0x04 10. " HIGH_PRIORITY_SO_DEV_READS_ENABLE ,High Priority for Strongly Ordered and Device Reads Enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x04 0. " FULL_LINE_ZERO_ENABLE ,Full Line of Zero Enable" "Disabled,Enabled"
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line.long 0x08 "TAG_RAM_LATENCY_CONTROL,Tag RAM Latency Control Register"
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bitfld.long 0x08 8.--10. " RAM_WRITE_ACCESS_LATENCY ,RAM write access latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
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bitfld.long 0x08 4.--6. " RAM_READ_ACCESS_LATENCY ,RAM read access latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
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textline " "
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bitfld.long 0x08 0.--2. " RAM_SETUP_LATENCY ,RAM setup latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
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line.long 0x0c "DATA_RAM_LATENCY_CONTROL,Data RAM Latency Control Register"
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bitfld.long 0x0c 8.--10. " RAM_WRITE_ACCESS_LATENCY ,RAM write access latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
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bitfld.long 0x0c 4.--6. " RAM_READ_ACCESS_LATENCY ,RAM read access latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
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textline " "
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bitfld.long 0x0c 0.--2. " RAM_SETUP_LATENCY ,RAM setup latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
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group.long 0x200++0x0b "Interrupt/Counter Control"
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line.long 0x00 "EVENT_COUNTER_CONTROL,Event Counter Control Register"
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bitfld.long 0x00 2. " COUNTER_RESET[1] , Event Counter1 reset" "No effect,Reset"
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bitfld.long 0x00 1. " COUNTER_RESET[0] , Event Counter0 reset" "No effect,Reset"
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textline " "
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bitfld.long 0x00 0. " EVENT_COUNTER_ENABLE ,Event counter enable" "Disabled,Enabled"
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line.long 0x04 "EVENT_COUNTER1_CONFIGURATION,Event Counter 1 Configuration Register"
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bitfld.long 0x04 2.--5. " COUNTER_EVENT_SOURCE ,Counter event source" "Disabled,CO,DRHIT,DRREQ,DWHIT,DWREQ,DWTREQ,IRHIT,IRREQ,WA,IPFALLOC,EPFHIT,EPFALLOC,SRRCVD,SRCONF,EPFRCVD"
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bitfld.long 0x04 0.--1. " EVENT_COUNTER_INTERRUPT_GENERATION ,Event counter interrupt generation" "Disabled,Enabled-Increment,Enabled-Overflow,Disabled"
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line.long 0x08 "EVENT_COUNTER0_CONFIGURATION,Event Counter 0 Configuration Register"
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bitfld.long 0x08 2.--5. " COUNTER_EVENT_SOURCE ,Counter event source" "Disabled,CO,DRHIT,DRREQ,DWHIT,DWREQ,DWTREQ,IRHIT,IRREQ,WA,IPFALLOC,EPFHIT,EPFALLOC,SRRCVD,SRCONF,EPFRCVD"
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bitfld.long 0x08 0.--1. " EVENT_COUNTER_INTERRUPT_GENERATION ,Event counter interrupt generation" "Disabled,Enabled-Increment,Enabled-Overflow,Disabled"
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width 40.
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if (((data.long(ad:0x48242000+0x204))&0x3c)==0x00)
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group.long 0x20c++0x03
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line.long 0x00 "EVENT_COUNTER1_VALUE,Event Counter 1 Value Register"
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else
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rgroup.long 0x20c++0x03
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line.long 0x00 "EVENT_COUNTER1_VALUE,Event Counter 1 Value Register"
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endif
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if (((data.long(ad:0x48242000+0x208))&0x3c)==0x00)
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group.long 0x210++0x03
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line.long 0x00 "EVENT_COUNTER0_VALUE,Event Counter 0 Value Register"
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else
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rgroup.long 0x210++0x03
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line.long 0x00 "EVENT_COUNTER0_VALUE,Event Counter 0 Value Register"
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endif
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group.long 0x214++0x03
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line.long 0x00 "INTERRUPT_MASK,Interrupt Mask Register"
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bitfld.long 0x00 8. " DECERR ,DECERR from L3" "Masked,Enabled"
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bitfld.long 0x00 7. " SLVERR ,SLVERR from L3" "Masked,Enabled"
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bitfld.long 0x00 6. " ERRRD ,Error on L2 data RAM" "Masked,Enabled"
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textline " "
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bitfld.long 0x00 5. " ERRRT ,Error on L2 tag RAM" "Masked,Enabled"
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bitfld.long 0x00 4. " ERRWD ,Error on L2 data RAM" "Masked,Enabled"
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bitfld.long 0x00 3. " ERRWT ,Error on L2 tag RAM" "Masked,Enabled"
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textline " "
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bitfld.long 0x00 2. " PARRD ,Parity Error on L2 data RAM" "Masked,Enabled"
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bitfld.long 0x00 1. " PARRT ,Parity Error on L2 tag RAM" "Masked,Enabled"
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bitfld.long 0x00 0. " ECNTR ,Event Counter1/0 Overflow Increment" "Masked,Enabled"
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rgroup.long 0x218++0x07
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line.long 0x00 "MASKED_INTERRUPT_STATUS,Masked Interrupt Status Register"
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bitfld.long 0x00 8. " DECERR ,DECERR from L3" "Low,High"
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bitfld.long 0x00 7. " SLVERR ,SLVERR from L3" "Low,High"
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bitfld.long 0x00 6. " ERRRD ,Error on L2 data RAM" "Low,High"
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textline " "
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bitfld.long 0x00 5. " ERRRT ,Error on L2 tag RAM" "Low,High"
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bitfld.long 0x00 4. " ERRWD ,Error on L2 data RAM" "Low,High"
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bitfld.long 0x00 3. " ERRWT ,Error on L2 tag RAM" "Low,High"
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textline " "
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bitfld.long 0x00 2. " PARRD ,Parity Error on L2 data RAM" "Low,High"
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bitfld.long 0x00 1. " PARRT ,Parity Error on L2 tag RAM" "Low,High"
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bitfld.long 0x00 0. " ECNTR ,Event Counter1/0 Overflow Increment" "Low,High"
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line.long 0x04 "RAW_INTERRUPT_STATUS,Raw Interrupt Status Register"
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bitfld.long 0x04 8. " DECERR ,DECERR from L3" "Low,High"
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bitfld.long 0x04 7. " SLVERR ,SLVERR from L3" "Low,High"
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bitfld.long 0x04 6. " ERRRD ,Error on L2 data RAM" "Low,High"
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textline " "
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bitfld.long 0x04 5. " ERRRT ,Error on L2 tag RAM" "Low,High"
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bitfld.long 0x04 4. " ERRWD ,Error on L2 data RAM" "Low,High"
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bitfld.long 0x04 3. " ERRWT ,Error on L2 tag RAM" "Low,High"
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textline " "
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bitfld.long 0x04 2. " PARRD ,Parity Error on L2 data RAM" "Low,High"
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bitfld.long 0x04 1. " PARRT ,Parity Error on L2 tag RAM" "Low,High"
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bitfld.long 0x04 0. " ECNTR ,Event Counter1/0 Overflow Increment" "Low,High"
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wgroup.long 0x220++0x03
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line.long 0x00 "INTERRUPT_CLEAR,Interrupt Clear Register"
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bitfld.long 0x00 8. " DECERR ,DECERR from L3" "No effect,Clear"
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bitfld.long 0x00 7. " SLVERR ,SLVERR from L3" "No effect,Clear"
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bitfld.long 0x00 6. " ERRRD ,Error on L2 data RAM" "No effect,Clear"
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textline " "
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bitfld.long 0x00 5. " ERRRT ,Error on L2 tag RAM" "No effect,Clear"
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bitfld.long 0x00 4. " ERRWD ,Error on L2 data RAM" "No effect,Clear"
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bitfld.long 0x00 3. " ERRWT ,Error on L2 tag RAM" "No effect,Clear"
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textline " "
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bitfld.long 0x00 2. " PARRD ,Parity Error on L2 data RAM" "No effect,Clear"
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bitfld.long 0x00 1. " PARRT ,Parity Error on L2 tag RAM" "No effect,Clear"
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bitfld.long 0x00 0. " ECNTR ,Event Counter1/0 Overflow Increment" "No effect,Clear"
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group.long 0x730++0x03 "Cache Maintenance Operations"
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line.long 0x00 "CACHE_SYNC,Cache Sync Register"
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group.long 0x770++0x03
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line.long 0x00 "INVALIDATE_LINE_BY_PA,Invalidate Line by PA Register"
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hexmask.long.tbyte 0x00 12.--31. 1. " TAG ,Tag"
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hexmask.long.byte 0x00 5.--11. 1. " INDEX ,Index"
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bitfld.long 0x00 0. " C ,C" "0,1"
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group.long 0x77C++0x03
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line.long 0x00 "INVALIDATE_BY_WAY,Invalidate by Way Register"
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hexmask.long.word 0x00 0.--15. 1. " WAY_BITS , Way bits"
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group.long 0x7B0++0x03
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line.long 0x00 "CLEAN_LINE_BY_PA,Clea n Line by PA Register"
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hexmask.long.tbyte 0x00 12.--31. 1. " TAG ,Tag"
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hexmask.long.byte 0x00 5.--11. 1. " INDEX ,Index"
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bitfld.long 0x00 0. " C ,C" "0,1"
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group.long 0x7B8++0x07
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line.long 0x00 "CLEAN_LINE_BY_INDEX/WAY,Clean Line by Index/Way Register"
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bitfld.long 0x00 28.--31. " WAY ,Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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hexmask.long.byte 0x00 5.--11. 1. " INDEX ,Index"
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bitfld.long 0x00 0. " C ,C" "0,1"
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line.long 0x04 "CLEAN_BY_WAY,Clean by Way Register"
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hexmask.long.word 0x04 0.--15. 1. " WAY_BITS , Way bits"
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group.long 0x7F0++0x03
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line.long 0x00 "CLEAN_AND_INVALIDATE_LINE_BY_PA,Clean and Invalidate Line by PA Register"
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hexmask.long.tbyte 0x00 12.--31. 1. " TAG ,Tag"
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hexmask.long.byte 0x00 5.--11. 1. " INDEX ,Index"
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bitfld.long 0x00 0. " C ,C" "0,1"
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group.long 0x7F8++0x07
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line.long 0x00 "CLEAN_AND_INVALIDATE_LINE_BY_INDEX/WAY,Clean and Invalidate Line by Index/Way Register"
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bitfld.long 0x00 28.--31. " WAY ,Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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hexmask.long.byte 0x00 5.--11. 1. " INDEX ,Index"
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bitfld.long 0x00 0. " C ,C" "0,1"
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line.long 0x04 "CLEAN_AND_INVALIDATE_BY_WAY,Clean and Invalidate by Way Register"
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hexmask.long.word 0x04 0.--15. 1. " WAY_BITS , Way bits"
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width 40.
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group.long 0x900++0x3f "Cache Lockdown"
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line.long 0x00 "DATA_LOCKDOWN_0_BY_WAY,Data Lockdown 0 by Way Register"
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hexmask.long.word 0x00 0.--15. 1. " DATALOCK000 ,DATALOCK000"
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line.long 0x04 "INSTRUCTION_LOCKDOWN_0_BY_WAY,Instruction Lockdown 0 by Way Register"
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hexmask.long.word 0x04 0.--15. 1. " INSTRLOCK000 ,INSTRLOCK000"
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line.long 0x08 "DATA_LOCKDOWN_1_BY_WAY,Data Lockdown 1 by Way Register"
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hexmask.long.word 0x08 0.--15. 1. " DATALOCK001 ,DATALOCK001"
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line.long 0x0c "INSTRUCTION_LOCKDOWN_1_BY_WAY,Instruction Lockdown 1 by Way Register"
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hexmask.long.word 0x0c 0.--15. 1. " INSTRLOCK001 ,INSTRLOCK001"
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line.long 0x10 "DATA_LOCKDOWN_2_BY_WAY,Data Lockdown 2 by Way Register"
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hexmask.long.word 0x10 0.--15. 1. " DATALOCK010 ,DATALOCK010"
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line.long 0x14 "INSTRUCTION_LOCKDOWN_2_BY_WAY,Instruction Lockdown 2 by Way Register"
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hexmask.long.word 0x14 0.--15. 1. " INSTRLOCK010 ,INSTRLOCK010"
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line.long 0x18 "DATA_LOCKDOWN_3_BY_WAY,Data Lockdown 3 by Way Register"
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hexmask.long.word 0x18 0.--15. 1. " DATALOCK011 ,DATALOCK011"
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line.long 0x1c "INSTRUCTION_LOCKDOWN_3_BY_WAY,Instruction Lockdown 3 by Way Register"
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hexmask.long.word 0x1c 0.--15. 1. " INSTRLOCK011 ,INSTRLOCK011"
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line.long 0x20 "DATA_LOCKDOWN_4_BY_WAY,Data Lockdown 4 by Way Register"
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hexmask.long.word 0x20 0.--15. 1. " DATALOCK100 ,DATALOCK100"
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line.long 0x24 "INSTRUCTION_LOCKDOWN_4_BY_WAY,Instruction Lockdown 4 by Way Register"
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hexmask.long.word 0x24 0.--15. 1. " INSTRLOCK100 ,INSTRLOCK100"
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line.long 0x28 "DATA_LOCKDOWN_5_BY_WAY,Data Lockdown 5 by Way Register"
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hexmask.long.word 0x28 0.--15. 1. " DATALOCK101 ,DATALOCK101"
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line.long 0x2c "INSTRUCTION_LOCKDOWN_5_BY_WAY,Instruction Lockdown 5 by Way Register"
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hexmask.long.word 0x2c 0.--15. 1. " INSTRLOCK101 ,INSTRLOCK101"
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line.long 0x30 "DATA_LOCKDOWN_6_BY_WAY,Data Lockdown 6 by Way Register"
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hexmask.long.word 0x30 0.--15. 1. " DATALOCK110 ,DATALOCK110"
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line.long 0x34 "INSTRUCTION_LOCKDOWN_6_BY_WAY,Instruction Lockdown 6 by Way Register"
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hexmask.long.word 0x34 0.--15. 1. " INSTRLOCK110 ,INSTRLOCK110"
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line.long 0x38 "DATA_LOCKDOWN_7_BY_WAY,Data Lockdown 7 by Way Register"
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hexmask.long.word 0x38 0.--15. 1. " DATALOCK111 ,DATALOCK111"
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line.long 0x3c "INSTRUCTION_LOCKDOWN_7_BY_WAY,Instruction Lockdown 7 by Way Register"
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hexmask.long.word 0x3c 0.--15. 1. " INSTRLOCK111 ,INSTRLOCK111"
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group.long 0x950++0x07
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line.long 0x00 "LOCKDOWN_BY_LINE_ENABLE,Lockdown by Line Enable Register"
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bitfld.long 0x00 0. " LOCKDOWN_BY_LINE_ENABLE ,Lockdown by line enable" "Disabled,Enabled"
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line.long 0x04 "UNLOCK_ALL_LINES_BY_WAY,Unlock All Lines by Way Register"
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bitfld.long 0x04 15. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[15] ,Unlock all lines for way 15" "Disabled,In progress"
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bitfld.long 0x04 14. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[14] ,Unlock all lines for way 14" "Disabled,In progress"
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textline " "
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bitfld.long 0x04 13. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[13] ,Unlock all lines for way 13" "Disabled,In progress"
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bitfld.long 0x04 12. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[12] ,Unlock all lines for way 12" "Disabled,In progress"
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textline " "
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bitfld.long 0x04 11. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[11] ,Unlock all lines for way 11" "Disabled,In progress"
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bitfld.long 0x04 10. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[10] ,Unlock all lines for way 10" "Disabled,In progress"
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textline " "
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bitfld.long 0x04 9. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[9] ,Unlock all lines for way 9" "Disabled,In progress"
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bitfld.long 0x04 8. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[8] ,Unlock all lines for way 8" "Disabled,In progress"
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textline " "
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bitfld.long 0x04 7. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[7] ,Unlock all lines for way 7" "Disabled,In progress"
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bitfld.long 0x04 6. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[6] ,Unlock all lines for way 6" "Disabled,In progress"
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textline " "
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bitfld.long 0x04 5. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[5] ,Unlock all lines for way 5" "Disabled,In progress"
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bitfld.long 0x04 4. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[4] ,Unlock all lines for way 4" "Disabled,In progress"
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textline " "
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bitfld.long 0x04 3. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[3] ,Unlock all lines for way 3" "Disabled,In progress"
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bitfld.long 0x04 2. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[2] ,Unlock all lines for way 2" "Disabled,In progress"
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textline " "
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bitfld.long 0x04 2. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[1] ,Unlock all lines for way 1" "Disabled,In progress"
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bitfld.long 0x04 1. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[0] ,Unlock all lines for way 1" "Disabled,In progress"
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group.long 0xC00++0x03 "Address Filtering"
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line.long 0x00 "ADDRESS_FILTERING_START,Address Filtering Start Register"
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hexmask.long.word 0x00 20.--31. 0x10 " ADDRESS_FILTERING_START ,Address filtering start address"
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bitfld.long 0x00 0. " ADDRESS_FILTERING_ENABLE ,Address filtering enable" "Disabled,Enabled"
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group.long 0xC04++0x03
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line.long 0x00 "ADDRESS_FILTERING_END,Address Filtering End Register"
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hexmask.long.word 0x00 20.--31. 0x10 " ADDRESS_FILTERING_END ,Address filtering end address"
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width 40.
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group.long 0xF40++0x03 "Debug, Prefetch and Power"
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line.long 0x00 "DEBUG_CONTROL,Debug Control Register"
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bitfld.long 0x00 2. " SPNIDEN ,Value of SPNIDEN input" "Low,High"
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bitfld.long 0x00 1. " DWB ,Disable write-back" "No,Yes"
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bitfld.long 0x00 0. " DCL ,Disable cache linefill" "No,Yes"
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width 40.
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group.long 0xF60++0x03
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line.long 0x00 "PREFETCH_OFFSET,Prefetch Offset Register"
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bitfld.long 0x00 30. " DOUBLE_LINEFILL_ENABLE ,Double linefill enable" "Disabled,Enabled"
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bitfld.long 0x00 29. " INSTRUCTION_PREFETCH_ENABLE ,Instruction prefetch enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 28. " DATA_PREFETCH_ENABLE ,Data prefetch enable" "Disabled,Enabled"
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bitfld.long 0x00 27. " DOUBLE_LINEFILL_ON_WRAP_READ_DISABLE ,Double linefill on WRAP read disable" "No,Yes"
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textline " "
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bitfld.long 0x00 24. " PREFETCH_DROP_ENABLE ,Prefetch drop enable" "Disabled,Enabled"
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bitfld.long 0x00 23. " INCR_DOUBLE_LINEFILL_ENABLE ,Incr double Linefill enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 21. " NOT_SAME_ID_ON_EXCLUSIVE_SEQUENCE_ENABLE ,Not same ID on exclusive sequence enable" "Disabled,Enabled"
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hexmask.long.byte 0x00 0.--4. 1. " PREFETCH_OFFSET ,Prefetch Offset"
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group.long 0xF80++0x03
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line.long 0x00 "POWER_CTRL,Power Control Register"
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bitfld.long 0x00 1. " DYNAMIC_CLK_GATING_EN ,Dynamic clock gating enable" "Disabled,Enabled"
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bitfld.long 0x00 0. " STANDBY_MODE_EN ,Standby mode enable" "Disabled,Enabled"
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width 0xb
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tree.end
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textline ""
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